WorldWideScience

Sample records for radiation hardened cmos

  1. Radiation-hardened bulk CMOS technology

    International Nuclear Information System (INIS)

    Dawes, W.R. Jr.; Habing, D.H.

    1979-01-01

    The evolutionary development of a radiation-hardened bulk CMOS technology is reviewed. The metal gate hardened CMOS status is summarized, including both radiation and reliability data. The development of a radiation-hardened bulk silicon gate process which was successfully implemented to a commercial microprocessor family and applied to a new, radiation-hardened, LSI standard cell family is also discussed. The cell family is reviewed and preliminary characterization data is presented. Finally, a brief comparison of the various radiation-hardened technologies with regard to performance, reliability, and availability is made

  2. Design optimization of radiation-hardened CMOS integrated circuits

    International Nuclear Information System (INIS)

    1975-01-01

    Ionizing-radiation-induced threshold voltage shifts in CMOS integrated circuits will drastically degrade circuit performance unless the design parameters related to the fabrication process are properly chosen. To formulate an approach to CMOS design optimization, experimentally observed analytical relationships showing strong dependences between threshold voltage shifts and silicon dioxide thickness are utilized. These measurements were made using radiation-hardened aluminum-gate CMOS inverter circuits and have been corroborated by independent data taken from MOS capacitor structures. Knowledge of these relationships allows one to define ranges of acceptable CMOS design parameters based upon radiation-hardening capabilities and post-irradiation performance specifications. Furthermore, they permit actual design optimization of CMOS integrated circuits which results in optimum pre- and post-irradiation performance with respect to speed, noise margins, and quiescent power consumption. Theoretical and experimental results of these procedures, the applications of which can mean the difference between failure and success of a CMOS integrated circuit in a radiation environment, are presented

  3. Radiation response of two Harris semiconductor radiation hardened 1k CMOS RAMs

    International Nuclear Information System (INIS)

    Abare, W.E.; Huffman, D.D.; Moffett, G.E.

    1982-01-01

    This paper describes the testing of two types 1K CMOS static RAMs in various transient and steady state ionizing radiation environments. Type HM 6551R (256x4 bits) and type HM 6508R (1024x1 bit) RAMs were evaluated. The RAMs are radiation hardened versions of Harris' commercial RAMs. A brief description of the radiation hardened process is presented

  4. Radiation-hardened bulk Si-gate CMOS microprocessor family

    International Nuclear Information System (INIS)

    Stricker, R.E.; Dingwall, A.G.F.; Cohen, S.; Adams, J.R.; Slemmer, W.C.

    1979-01-01

    RCA and Sandia Laboratories jointly developed a radiation-hardened bulk Si-gate CMOS technology which is used to fabricate the CDP-1800 series microprocessor family. Total dose hardness of 1 x 10 6 rads (Si) and transient upset hardness of 5 x 10 8 rads (Si)/sec with no latch up at any transient level was achieved. Radiation-hardened parts manufactured to date include the CDP-1802 microprocessor, the CDP-1834 ROM, the CDP-1852 8-bit I/O port, the CDP-1856 N-bit 1 of 8 decoder, and the TCC-244 256 x 4 Static RAM. The paper is divided into three parts. In the first section, the basic fundamentals of the non-hardened C 2 L technology used for the CDP-1800 series microprocessor parts is discussed along with the primary reasons for hardening this technology. The second section discusses the major changes in the fabrication sequence that are required to produce radiation-hardened devices. The final section details the electrical performance characteristics of the hardened devices as well as the effects of radiation on device performance. Also included in this section is a discussion of the TCC-244 256 x 4 Static RAM designed jointly by RCA and Sandia Laboratories for this application

  5. Radiation-hardened CMOS integrated circuits

    International Nuclear Information System (INIS)

    Pikor, A.; Reiss, E.M.

    1980-01-01

    Substantial effort has been directed at radiation-hardening CMOS integrated circuits using various oxide processes. While most of these integrated circuits have been successful in demonstrating megarad hardness, further investigations have shown that the 'wet-oxide process' is most compatible with the RCA CD4000 Series process. This article describes advances in the wet-oxide process that have resulted in multimegarad hardness and yield to MIL-M-38510 screening requirements. The implementation of these advances into volume manufacturing is geared towards supplying devices for aerospace requirements such as the Defense Meterological Satellite program (DMSP) and the Global Positioning Satellite (GPS). (author)

  6. Radiation-hardened CMOS/SOS LSI circuits

    International Nuclear Information System (INIS)

    Aubuchon, K.G.; Peterson, H.T.; Shumake, D.P.

    1976-01-01

    The recently developed technology for building radiation-hardened CMOS/SOS devices has now been applied to the fabrication of LSI circuits. This paper describes and presents results on three different circuits: an 8-bit adder/subtractor (Al gate), a 256-bit shift register (Si gate), and a polycode generator (Al gate). The 256-bit shift register shows very little degradation after 1 x 10 6 rads (Si), with an increase from 1.9V to 2.9V in minimum operating voltage, a decrease of about 20% in maximum frequency, and little or no change in quiescent current. The p-channel thresholds increase from -0.9V to -1.3V, while the n-channel thresholds decrease from 1.05 to 0.23V, and the n-channel leakage remains below 1nA/mil. Excellent hardening results were also obtained on the polycode generator circuit. Ten circuits were irradiated to 1 x 10 6 rads (Si), and all continued to function well, with an increase in minimum power supply voltage from 2.85V to 5.85V and an increase in quiescent current by a factor of about 2. Similar hardening results were obtained on the 8-bit adder, with the minimum power supply voltage increasing from 2.2V to 4.6V and the add time increasing from 270 to 350 nsec after 1 x 10 6 rads (Si). These results show that large CMOS/SOS circuits can be hardened to above 1 x 10 6 rads (Si) with either the Si gate or Al gate technology. The paper also discusses the relative advantages of the Si gate versus the Al gate technology

  7. Radiation hardening of CMOS-based circuitry in SMART transmitters

    International Nuclear Information System (INIS)

    Loescher, D.H.

    1993-02-01

    Process control transmitters that incorporate digital signal processing could be used advantageously in nuclear power plants; however, because such transmitters are too sensitive to radiation, they are not used. The Electric Power Research Institute sponsored work at Sandia National Laboratories under EPRI contract RP2614-58 to determine why SMART transmitters fail when exposed to radiation and to design and demonstrate SMART transmitter circuits that could tolerate radiation. The term ''SMART'' denotes transmitters that contain digital logic. Tests showed that transmitter failure was caused by failure of the complementary metal oxide semiconductors (CMOS)-integrated circuits which are used extensively in commercial transmitters. Radiation-hardened replacements were not available for the radiation-sensitive CMOS circuits. A conceptual design showed that a radiation-tolerant transmitter could be constructed. A prototype for an analog-to-digital converter subsection worked satisfactorily after a total dose of 30 megarads(Si). Encouraging results were obtained from preliminary bench-top tests on a dc-to-dc converter for the power supply subsection

  8. Process controls for radiation hardened aluminum gate bulk silicon CMOS

    International Nuclear Information System (INIS)

    Gregory, B.L.

    1975-01-01

    Optimized dry oxides have recently yielded notable improvements in CMOS radiation-hardness. By following the proper procedures and recipes, it is now possible to produce devices which will function satisfactorily after exposure to a total ionizing dose in excess of 10 6 RADS (Si). This paper is concerned with the controls required on processing parameters once the optimized process is defined. In this process, the pre-irradiation electrical parameters must be closely controlled to insure that devices will function after irradiation. In particular, the specifications on n- and p-channel threshold voltages require tight control of fixed oxide charge, surface-state density, oxide thickness, and substrate and p-well surface concentrations. In order to achieve the above level of radiation hardness, certain processing procedures and parameters must also be closely controlled. Higher levels of cleanliness are required in the hardened process than are commonly required for commercial CMOS since, for hardened dry oxides, no impurity gettering can be employed during or after oxidation. Without such gettering, an unclean oxide is unacceptable due to bias-temperature instability. Correct pre-oxidation cleaning, residual surface damage removal, proper oxidation and annealing temperatures and times, and the correct metal sintering cycle are all important in determining device hardness. In a reproducible, hardened process, each of these processing steps must be closely controlled. (U.S.)

  9. CMOS optimization for radiation hardness

    International Nuclear Information System (INIS)

    Derbenwick, G.F.; Fossum, J.G.

    1975-01-01

    Several approaches to the attainment of radiation-hardened MOS circuits have been investigated in the last few years. These have included implanting the SiO 2 gate insulator with aluminum, using chrome-aluminum layered gate metallization, using Al 2 O 3 as the gate insulator, and optimizing the MOS fabrication process. Earlier process optimization studies were restricted primarily to p-channel devices operating with negative gate biases. Since knowledge of the hardness dependence upon processing and design parameters is essential in producing hardened integrated circuits, a comprehensive investigation of the effects of both process and design optimization on radiation-hardened CMOS integrated circuits was undertaken. The goals are to define and establish a radiation-hardened processing sequence for CMOS integrated circuits and to formulate quantitative relationships between process and design parameters and the radiation hardness. Using these equations, the basic CMOS design can then be optimized for radiation hardness and some understanding of the basic physics responsible for the radiation damage can be gained. Results are presented

  10. Total dose and dose rate radiation characterization of EPI-CMOS radiation hardened memory and microprocessor devices

    International Nuclear Information System (INIS)

    Gingerich, B.L.; Hermsen, J.M.; Lee, J.C.; Schroeder, J.E.

    1984-01-01

    The process, circuit discription, and total dose radiation characteristics are presented for two second generation hardened 4K EPI-CMOS RAMs and a first generation 80C85 microprocessor. Total dose radiation performance is presented to 10M rad-Si and effects of biasing and operating conditions are discussed. The dose rate sensitivity of the 4K RAMs is also presented along with single event upset (SEU) test data

  11. Using a novel spectroscopic reflectometer to optimize a radiation-hardened submicron silicon-on-sapphire CMOS process

    International Nuclear Information System (INIS)

    Do, N.T.; Zawaideh, E.; Vu, T.Q.; Warren, G.; Mead, D.; Do, N.T.; Li, G.P.; Tsai, C.S.

    1999-01-01

    A radiation-hardened sub-micron silicon-on-sapphire CMOS process is monitored and optimized using a novel optical technique based on spectroscopic reflectometry. Quantitative measurements of the crystal quality, surface roughness, and device radiation hardness show excellent correlation between this technique and the Atomic Force Microscopy. (authors)

  12. A Radiation Hardened by Design CMOS ASIC for Thermopile Readouts

    Science.gov (United States)

    Quilligan, G.; Aslam, S.; DuMonthier, J.

    2012-01-01

    A radiation hardened by design (RHBD) mixed-signal application specific integrated circuit (ASIC) has been designed for a thermopile readout for operation in the harsh Jovian orbital environment. The multi-channel digitizer (MCD) ASIC includes 18 low noise amplifier channels which have tunable gain/filtering coefficients, a 16-bit sigma-delta analog-digital converter (SDADC) and an on-chip controller. The 18 channels, SDADC and controller were designed to operate with immunity to single event latchup (SEL) and to at least 10 Mrad total ionizing dose (TID). The ASIC also contains a radiation tolerant 16-bit 20 MHz Nyquist ADC for general purpose instrumentation digitizer needs. The ASIC is currently undergoing fabrication in a commercial 180 nm CMOS process. Although this ASIC was designed specifically for the harsh radiation environment of the NASA led JEO mission it is suitable for integration into instrumentation payloads 011 the ESA JUICE mission where the radiation hardness requirements are slightly less stringent.

  13. Using a novel spectroscopic reflectometer to optimize a radiation-hardened submicron silicon-on-sapphire CMOS process; Utilisation d'une nouvelle reflectometrie spectroscopique pour optimiser un procede de fabrication CMOS/SOS durci aux radiations

    Energy Technology Data Exchange (ETDEWEB)

    Do, N.T.; Zawaideh, E.; Vu, T.Q.; Warren, G.; Mead, D. [Raytheon Systems company, Microelectronics Div., Newport Beach, California (United States); Li, G.P.; Tsai, C.S. [California Univ., School of Engineering, Newport Beach, CA (United States)

    1999-07-01

    A radiation-hardened sub-micron silicon-on-sapphire CMOS process is monitored and optimized using a novel optical technique based on spectroscopic reflectometry. Quantitative measurements of the crystal quality, surface roughness, and device radiation hardness show excellent correlation between this technique and the Atomic Force Microscopy. (authors)

  14. Radiation hardening of integrated circuits technologies

    International Nuclear Information System (INIS)

    Auberton-Herve, A.J.; Leray, J.L.

    1991-01-01

    The radiation hardening studies started in the mid decade -1960-1970. To survive the different military or space radiative environment, a new engineering science borned, to understand the degradation of electronics components. The different solutions to improve the electronic behavior in such environment, have been named radiation hardening of the technologies. Improvement of existing technologies, and qualification method have been widely studied. However, at the other hand, specific technologies was developped : The Silicon On Insulator technologies for CMOS or Bipolar. The HSOI3HD technology (supported by DGA-CEA DAM and LETI with THOMSON TMS) offers today the highest hardening level for the integration density of hundreds of thousand transistors on the same silicon. Full complex systems would be realized on a single die with a technological radiation hardening and no more system hardening

  15. Custom high-reliability radiation-hard CMOS-LSI circuit design

    International Nuclear Information System (INIS)

    Barnard, W.J.

    1981-01-01

    Sandia has developed a custom CMOS-LSI design capability to provide high reliability radiation-hardened circuits. This capability relies on (1) proven design practices to enhance reliability, (2) use of well characterized cells and logic modules, (3) computer-aided design tools to reduce design time and errors and to standardize design definition, and (4) close working relationships with the system designer and technology fabrication personnel. Trade-offs are made during the design between circuit complexity/performance and technology/producibility for high reliability and radiation-hardened designs to result. Sandia has developed and is maintaining a radiation-hardened bulk CMOS technology fabrication line for production of prototype and small production volume parts

  16. CMOS/SOS 4k Rams hardened to 100 Krads (s:)

    International Nuclear Information System (INIS)

    Napoli, L.S.; Heagerty, W.F.; Smeltzer, R.K.; Yeh, J.L.

    1982-01-01

    Two CMOS/SOS 4K memories were fabricated with a recently developed, hardened SOS process. Memory functionality after radiation doses well in excess of 100 Krads(Si) was demonstrated. The critical device processing steps were identified. The radiationinduced failure mode of the memories is understood in terms of the circuit organization and the radiation behavior of the individual transistors in the memories

  17. Radiation Induced Fault Analysis for Wide Temperature BiCMOS Circuits, Phase I

    Data.gov (United States)

    National Aeronautics and Space Administration — State of the art Radiation Hardened by Design (RHBD) techniques do not account for wide temperature variations in BiCMOS process. Silicon-Germanium BiCMOS process...

  18. Novel circuits for radiation hardened memories

    International Nuclear Information System (INIS)

    Haraszti, T.P.; Mento, R.P.; Moyer, N.E.; Grant, W.M.

    1992-01-01

    This paper reports on implementation of large storage semiconductor memories which combine radiation hardness with high packing density, operational speed, and low power dissipation and require both hardened circuit and hardened process technologies. Novel circuits, including orthogonal shuffle type of write-read arrays, error correction by weighted bidirectional codes and associative iterative repair circuits, are proposed for significant improvements of SRAMs' immunity against the effects of total dose and cosmic particle impacts. The implementation of the proposed circuit resulted in fault-tolerant 40-Mbit and 10-Mbit monolithic memories featuring a data rate of 120 MHz and power dissipation of 880 mW. These experimental serial-parallel memories were fabricated with a nonhardened standard CMOS processing technology, yet provided a total dose hardness of 1 Mrad and a projected SEU rate of 1 x 10 - 12 error/bit/day. Using radiation hardened processing improvements by factors of 10 to 100 are predicted in both total dose hardness and SEU rate

  19. A Novel Radiation Hardened CAM

    CERN Document Server

    Shojaii, Seyed Ruhollah; The ATLAS collaboration

    2018-01-01

    This poster describes an innovative Content Addressable Memory cell with radiation hardened (RH-CAM) architecture. The RH-CAM is designed in a commercial 28 nm CMOS technology. The circuit has been simulated in worst-case conditions, and the effects due to single particles are analyzed injecting a fault current into a circuit node. The proposed architecture can perform on-time pattern recognition tasks in harsh environments, such as very front-end electronics in hadron colliders and in space applications.

  20. Radiation-hardened nonvolatile MNOS RAM

    International Nuclear Information System (INIS)

    Wrobel, T.F.; Dodson, W.H.; Hash, G.L.; Jones, R.V.; Nasby, R.D.; Olson, R.J.

    1983-01-01

    A radiation hardened nonvolatile MNOS RAM is being developed at Sandia National Laboratories. The memory organization is 128 x 8 bits and utilizes two p-channel MNOS transistors per memory cell. The peripheral circuitry is constructed with CMOS metal gate and is processed with standard Sandia rad-hard processing techniques. The devices have memory retention after a dose-rate exposure of 1E12 rad(Si)/s, are functional after total dose exposure of 1E6 rad(Si), and are dose-rate upset resistant to levels of 7E8 rad(Si)/s

  1. Radiation hardening of smart electronics

    International Nuclear Information System (INIS)

    Mayo, C.W.; Cain, V.R.; Marks, K.A.; Millward, D.G.

    1991-02-01

    Microprocessor based ''smart'' pressure, level, and flow transmitters were tested to determine the radiation hardness of this class of electronic instrumentation for use in reactor building applications. Commercial grade Complementary Metal Oxide Semiconductor (CMOS) integrated circuits used in these transmitters were found to fail at total gamma dose levels between 2500 and 10,000 rad. This results in an unacceptably short lifetime in many reactor building radiation environments. Radiation hardened integrated circuits can, in general, provide satisfactory service life for normal reactor operations when not restricted to the extremely low power budget imposed by standard 4--20 mA two-wire instrument loops. The design of these circuits will require attention to vendor radiation hardness specifications, dose rates, process control with respect to radiation hardness factors, and non-volatile programmable memory technology. 3 refs., 2 figs

  2. An Innovative Radiation Hardened CAM Architecture

    CERN Document Server

    Shojaii, Seyed Ruhollah; The ATLAS collaboration

    2018-01-01

    This article describes an innovative Content Addressable Memory (CAM) cell with radiation hardened (RH) architecture. The RH-CAM is designed in a commercial 28 nm CMOS technology. The circuit has been simulated in worst-case conditions, and the effects due to single particles have been analyzed by injecting a current pulse into a circuit node. The proposed architecture is suitable for on-time pattern recognition tasks in harsh environments, such as front-end electronics in hadron colliders and in space applications.

  3. Challenges in hardening technologies using shallow-trench isolation

    International Nuclear Information System (INIS)

    Shaneyfelt, M.R.; Dodd, P.E.; Draper, B.L.; Flores, R.S.

    1998-02-01

    Challenges related to radiation hardening CMOS technologies with shallow-trench isolation are explored. Results show that trench hardening can be more difficult than simply replacing the trench isolation oxide with a hardened field oxide

  4. Two transistor cluster DICE Cells with the minimum area for a hardened 28-nm CMOS and 65-nm SRAM layout design

    International Nuclear Information System (INIS)

    Stenin, V.Ya.; Stepanov, P.V.

    2015-01-01

    A hardened DICE cell layout design is based on the two spaced transistor clusters of the DICE cell each consisting of four transistors. The larger the distance between these two CMOS transistor clusters, the more robust the hardened DICE SRAM to Single Event Upsets. Some versions of the 28-nm and 65-nm DICE CMOS SRAM block composition have been suggested with minimum cluster distances of 2.27-2.32 mkm. The area of hardened 28-nm DICE CMOS cells is larger than the area of 28-nm 6T CMOS cells by a factor of 2.1 [ru

  5. Radiation-hardenable diluents for radiation-hardenable compositions

    International Nuclear Information System (INIS)

    Schuster, K.E.; Rosenkranz, H.J.; Furh, K.; Ruedolph, H.

    1979-01-01

    Radiation-crosslinkable diluents for radiation-hardenable compositions (binders) consisting of a mixture of triacrylates of a reaction product of trimethylol propane and ethylene oxide with an average degree of ethoxylation of from 2.5 to 4 are described. The ethoxylated trimethylol propane is substantially free from trimethylol propane and has the following distribution: 4 to 5% by weight of monoethoxylation product, 14 to 16% by weight of diethoxylation product, 20 to 30% by weight of triethoxylation product, 20 to 30% by weight of tetraethoxylation product, 16 to 18% by weight of pentaethoxylation product, and 6 to 8% by weight of hexaethoxylation product. The diluents effectively reduce the viscosity of radiation-hardenable compositions and do not have any adverse effect upon their reactivity or upon the properties of the resulting hardened products

  6. Radiation-hard silicon gate bulk CMOS cell family

    International Nuclear Information System (INIS)

    Gibbon, C.F.; Habing, D.H.; Flores, R.S.

    1980-01-01

    A radiation-hardened bulk silicon gate CMOS technology and a topologically simple, high-performance dual-port cell family utilizing this process have been demonstrated. Additional circuits, including a random logic circuit containing 4800 transistors on a 236 x 236 mil die, are presently being designed and processed. Finally, a joint design-process effort is underway to redesign the cell family in reduced design rules; this results in a factor of 2.5 cell size reduction and a factor of 3 decrease in chip interconnect area. Cell performance is correspondingly improved

  7. LDRD Final Report - Investigations of the impact of the process integration of deposited magnetic films for magnetic memory technologies on radiation-hardened CMOS devices and circuits - LDRD Project (FY99)

    Energy Technology Data Exchange (ETDEWEB)

    MYERS,DAVID R.; JESSING,JEFFREY R.; SPAHN,OLGA B.; SHANEYFELT,MARTY R.

    2000-01-01

    This project represented a coordinated LLNL-SNL collaboration to investigate the feasibility of developing radiation-hardened magnetic non-volatile memories using giant magnetoresistance (GMR) materials. The intent of this limited-duration study was to investigate whether giant magnetoresistance (GMR) materials similar to those used for magnetic tunnel junctions (MTJs) were process compatible with functioning CMOS circuits. Sandia's work on this project demonstrated that deposition of GMR materials did not affect the operation nor the radiation hardness of Sandia's rad-hard CMOS technology, nor did the integration of GMR materials and exposure to ionizing radiation affect the magnetic properties of the GMR films. Thus, following deposition of GMR films on rad-hard integrated circuits, both the circuits and the films survived ionizing radiation levels consistent with DOE mission requirements. Furthermore, Sandia developed techniques to pattern deposited GMR films without degrading the completed integrated circuits upon which they were deposited. The present feasibility study demonstrated all the necessary processing elements to allow fabrication of the non-volatile memory elements onto an existing CMOS chip, and even allow the use of embedded (on-chip) non-volatile memories for system-on-a-chip applications, even in demanding radiation environments. However, funding agencies DTRA, AIM, and DARPA did not have any funds available to support the required follow-on technology development projects that would have been required to develop functioning prototype circuits, nor were such funds available from LDRD nor from other DOE program funds.

  8. LDRD Final Report - Investigations of the impact of the process integration of deposited magnetic films for magnetic memory technologies on radiation hardened CMOS devices and circuits - LDRD Project (FY99)

    International Nuclear Information System (INIS)

    Myers, David R.; Jessing, Jeffrey R.; Spahn, Olga B.; Shaneyfelt, Marty R.

    2000-01-01

    This project represented a coordinated LLNL-SNL collaboration to investigate the feasibility of developing radiation-hardened magnetic non-volatile memories using giant magnetoresistance (GMR) materials. The intent of this limited-duration study was to investigate whether giant magnetoresistance (GMR) materials similar to those used for magnetic tunnel junctions (MTJs) were process compatible with functioning CMOS circuits. Sandia's work on this project demonstrated that deposition of GMR materials did not affect the operation nor the radiation hardness of Sandia's rad-hard CMOS technology, nor did the integration of GMR materials and exposure to ionizing radiation affect the magnetic properties of the GMR films. Thus, following deposition of GMR films on rad-hard integrated circuits, both the circuits and the films survived ionizing radiation levels consistent with DOE mission requirements. Furthermore, Sandia developed techniques to pattern deposited GMR films without degrading the completed integrated circuits upon which they were deposited. The present feasibility study demonstrated all the necessary processing elements to allow fabrication of the non-volatile memory elements onto an existing CMOS chip, and even allow the use of embedded (on-chip) non-volatile memories for system-on-a-chip applications, even in demanding radiation environments. However, funding agencies DTRA, AIM, and DARPA did not have any funds available to support the required follow-on technology development projects that would have been required to develop functioning prototype circuits, nor were such funds available from LDRD nor from other DOE program funds

  9. Multi-MGy Radiation Hardened Camera for Nuclear Facilities

    International Nuclear Information System (INIS)

    Girard, Sylvain; Boukenter, Aziz; Ouerdane, Youcef; Goiffon, Vincent; Corbiere, Franck; Rolando, Sebastien; Molina, Romain; Estribeau, Magali; Avon, Barbara; Magnan, Pierre; Paillet, Philippe; Duhamel, Olivier; Gaillardin, Marc; Raine, Melanie

    2015-01-01

    There is an increasing interest in developing cameras for surveillance systems to monitor nuclear facilities or nuclear waste storages. Particularly, for today's and the next generation of nuclear facilities increasing safety requirements consecutive to Fukushima Daiichi's disaster have to be considered. For some applications, radiation tolerance needs to overcome doses in the MGy(SiO 2 ) range whereas the most tolerant commercial or prototypes products based on solid state image sensors withstand doses up to few kGy. The objective of this work is to present the radiation hardening strategy developed by our research groups to enhance the tolerance to ionizing radiations of the various subparts of these imaging systems by working simultaneously at the component and system design levels. Developing radiation-hardened camera implies to combine several radiation-hardening strategies. In our case, we decided not to use the simplest one, the shielding approach. This approach is efficient but limits the camera miniaturization and is not compatible with its future integration in remote-handling or robotic systems. Then, the hardening-by-component strategy appears mandatory to avoid the failure of one of the camera subparts at doses lower than the MGy. Concerning the image sensor itself, the used technology is a CMOS Image Sensor (CIS) designed by ISAE team with custom pixel designs used to mitigate the total ionizing dose (TID) effects that occur well below the MGy range in classical image sensors (e.g. Charge Coupled Devices (CCD), Charge Injection Devices (CID) and classical Active Pixel Sensors (APS)), such as the complete loss of functionality, the dark current increase and the gain drop. We'll present at the conference a comparative study between these radiation-hardened pixel radiation responses with respect to conventional ones, demonstrating the efficiency of the choices made. The targeted strategy to develop the complete radiation hard camera

  10. Multi-MGy Radiation Hardened Camera for Nuclear Facilities

    Energy Technology Data Exchange (ETDEWEB)

    Girard, Sylvain; Boukenter, Aziz; Ouerdane, Youcef [Universite de Saint-Etienne, Lab. Hubert Curien, UMR-CNRS 5516, F-42000 Saint-Etienne (France); Goiffon, Vincent; Corbiere, Franck; Rolando, Sebastien; Molina, Romain; Estribeau, Magali; Avon, Barbara; Magnan, Pierre [ISAE, Universite de Toulouse, F-31055 Toulouse (France); Paillet, Philippe; Duhamel, Olivier; Gaillardin, Marc; Raine, Melanie [CEA, DAM, DIF, F-91297 Arpajon (France)

    2015-07-01

    There is an increasing interest in developing cameras for surveillance systems to monitor nuclear facilities or nuclear waste storages. Particularly, for today's and the next generation of nuclear facilities increasing safety requirements consecutive to Fukushima Daiichi's disaster have to be considered. For some applications, radiation tolerance needs to overcome doses in the MGy(SiO{sub 2}) range whereas the most tolerant commercial or prototypes products based on solid state image sensors withstand doses up to few kGy. The objective of this work is to present the radiation hardening strategy developed by our research groups to enhance the tolerance to ionizing radiations of the various subparts of these imaging systems by working simultaneously at the component and system design levels. Developing radiation-hardened camera implies to combine several radiation-hardening strategies. In our case, we decided not to use the simplest one, the shielding approach. This approach is efficient but limits the camera miniaturization and is not compatible with its future integration in remote-handling or robotic systems. Then, the hardening-by-component strategy appears mandatory to avoid the failure of one of the camera subparts at doses lower than the MGy. Concerning the image sensor itself, the used technology is a CMOS Image Sensor (CIS) designed by ISAE team with custom pixel designs used to mitigate the total ionizing dose (TID) effects that occur well below the MGy range in classical image sensors (e.g. Charge Coupled Devices (CCD), Charge Injection Devices (CID) and classical Active Pixel Sensors (APS)), such as the complete loss of functionality, the dark current increase and the gain drop. We'll present at the conference a comparative study between these radiation-hardened pixel radiation responses with respect to conventional ones, demonstrating the efficiency of the choices made. The targeted strategy to develop the complete radiation hard camera

  11. Radiation-hardened gate-around n-MOSFET structure for radiation-tolerant application-specific integrated circuits

    International Nuclear Information System (INIS)

    Lee, Min Su; Lee, Hee Chul

    2012-01-01

    To overcome the total ionizing dose effect on an n-type metal-oxide-semiconductor field-effect transistor (n-MOSFET), we designed a radiation-hardened gate-around n-MOSFET structure and evaluated it through a radiation-exposure experiment. Each test device was fabricated in a commercial 0.35-micron complementary metal-oxide-semiconductor (CMOS) process. The fabricated devices were evaluated under a total dose of 1 Mrad (Si) at a dose rate of 250 krad/h to obtain very high reliability for space electronics. The experimental results showed that the gate-around n-MOSFET structure had very good performance against 1 Mrad (Si) of gamma radiation, while the conventional n-MOSFET experienced a considerable amount of radiation-induced leakage current. Furthermore, a source follower designed with the gate-around transistor worked properly at 1 Mrad (Si) of gamma radiation while a source follower designed with the conventional n-MOSFET lost its functionality.

  12. SEU testing of a novel hardened register implemented using standard CMOS technology

    International Nuclear Information System (INIS)

    Monnier, T.; Roche, F.M.; Cosculluela, J.; Velazco, R.

    1999-01-01

    A novel memory structure, designed to tolerate SEU perturbations, has been implemented in registers and tested. The design was completed using a standard submicron nonradiation hardened CMOS technology. This paper presents the results of heavy ions tests which evidence the noticeable improvement of the SEU-robustness with an increased LET threshold and reduced cross-section, without significant impact to die real estate, write time, or power consumption

  13. A Demonstrator Analog Signal Processing Circuit in a Radiation Hard SOI-CMOS Technology

    CERN Multimedia

    2002-01-01

    % RD-9 A Demonstrator Analog Signal Processing Circuit in a Radiation Hard SOI-CMOS Technology \\\\ \\\\Radiation hardened SOI-CMOS (Silicon-On-Insulator, Complementary Metal-Oxide- \\linebreak Semiconductor planar microelectronic circuit technology) was a likely candidate technology for mixed analog-digital signal processing electronics in experiments at the future high luminosity hadron colliders. We have studied the analog characteristics of circuit designs realized in the Thomson TCS radiation hard technologies HSOI3-HD. The feature size of this technology was 1.2 $\\mu$m. We have irradiated several devices up to 25~Mrad and 3.10$^{14}$ neutrons cm$^{-2}$. Gain, noise characteristics and speed have been measured. Irradiation introduces a degradation which in the interesting bandwidth of 0.01~MHz~-~1~MHz is less than 40\\%. \\\\ \\\\Some specific SOI phenomena have been studied in detail, like the influence on the noise spectrum of series resistence in the thin silicon film that constitutes the body of the transistor...

  14. Radiation hardened COTS-based 32-bit microprocessor

    International Nuclear Information System (INIS)

    Haddad, N.; Brown, R.; Cronauer, T.; Phan, H.

    1999-01-01

    A high performance radiation hardened 32-bit RISC microprocessor based upon a commercial single chip CPU has been developed. This paper presents the features of radiation hardened microprocessor, the methods used to radiation harden this device, the results of radiation testing, and shows that the RAD6000 is well-suited for the vast majority of space applications. (authors)

  15. Radiation-hardened CMOS integrated circuits

    International Nuclear Information System (INIS)

    Derbenwick, G.F.; Hughes, R.C.

    1977-01-01

    Electronic circuits that operate properly after exposure to ionizing radiation are necessary for nuclear weapon systems, satellites, and apparatus designed for use in radiation environments. The program to develop and theoretically model radiation-tolerant integrated circuit components has resulted in devices that show an improvement in hardness up to a factor of ten thousand over earlier devices. An inverter circuit produced functions properly after an exposure of 10 6 Gy (Si) which, as far as is known, is the record for an integrated circuit

  16. Design and implementation of a programming circuit in radiation-hardened FPGA

    International Nuclear Information System (INIS)

    Wu Lihua; Han Xiaowei; Zhao Yan; Liu Zhongli; Yu Fang; Chen, Stanley L.

    2011-01-01

    We present a novel programming circuit used in our radiation-hardened field programmable gate array (FPGA) chip. This circuit provides the ability to write user-defined configuration data into an FPGA and then read it back. The proposed circuit adopts the direct-access programming point scheme instead of the typical long token shift register chain. It not only saves area but also provides more flexible configuration operations. By configuring the proposed partial configuration control register, our smallest configuration section can be conveniently configured as a single data and a flexible partial configuration can be easily implemented. The hierarchical simulation scheme, optimization of the critical path and the elaborate layout plan make this circuit work well. Also, the radiation hardened by design programming point is introduced. This circuit has been implemented in a static random access memory (SRAM)-based FPGA fabricated by a 0.5 μm partial-depletion silicon-on-insulator CMOS process. The function test results of the fabricated chip indicate that this programming circuit successfully realizes the desired functions in the configuration and read-back. Moreover, the radiation test results indicate that the programming circuit has total dose tolerance of 1 x 10 5 rad(Si), dose rate survivability of 1.5 x 10 11 rad(Si)/s and neutron fluence immunity of 1 x 10 14 n/cm 2 .

  17. Design and implementation of a programming circuit in radiation-hardened FPGA

    Science.gov (United States)

    Lihua, Wu; Xiaowei, Han; Yan, Zhao; Zhongli, Liu; Fang, Yu; Chen, Stanley L.

    2011-08-01

    We present a novel programming circuit used in our radiation-hardened field programmable gate array (FPGA) chip. This circuit provides the ability to write user-defined configuration data into an FPGA and then read it back. The proposed circuit adopts the direct-access programming point scheme instead of the typical long token shift register chain. It not only saves area but also provides more flexible configuration operations. By configuring the proposed partial configuration control register, our smallest configuration section can be conveniently configured as a single data and a flexible partial configuration can be easily implemented. The hierarchical simulation scheme, optimization of the critical path and the elaborate layout plan make this circuit work well. Also, the radiation hardened by design programming point is introduced. This circuit has been implemented in a static random access memory (SRAM)-based FPGA fabricated by a 0.5 μm partial-depletion silicon-on-insulator CMOS process. The function test results of the fabricated chip indicate that this programming circuit successfully realizes the desired functions in the configuration and read-back. Moreover, the radiation test results indicate that the programming circuit has total dose tolerance of 1 × 105 rad(Si), dose rate survivability of 1.5 × 1011 rad(Si)/s and neutron fluence immunity of 1 × 1014 n/cm2.

  18. Radiation hardenable coating mixture

    International Nuclear Information System (INIS)

    Howard, D.D.

    1977-01-01

    This invention relates to coatings that harden under radiation and to their compositions. Specifically, this invention concerns unsaturated urethane resins polymerisable by addition and to compositions, hardening under the effect of radiation, containing these resins. These resins feature the presence of at least one unsaturated ethylenic terminal group of structure CH 2 =C and containing the product of the reaction of an organic isocyanate compound with at least two isocyanate groups and one polyester polyol with at least two hydroxyl groups, and one unsaturated monomer compound polymerisable by addition having a single active hydrogen group reacting with the isocyanate [fr

  19. Radiation-chemical hardening of phenol-formaldehyde oligomers

    International Nuclear Information System (INIS)

    Shlapatskaya, V.V.; Omel'chenko, S.I.

    1978-01-01

    Radiation-chemical hardening of phenol formaldehyde oligomers of the resol type has been studied in the presence of furfural and diallylphthalate diluents. The samples have been hardened on an electron accelerator at an electron energy of 1.0-1.1 MeV and a dose rate of 2-3 Mrad/s. The kinetics of hardening has been studied on the yield of gel fraction within the range of absorbed doses from 7 to 400 Mrad. Radiation-chemical hardening of the studied compositions is activated with sensitizers, namely, amines, metal chlorides, and heterocyclic derivatives of metals. Furfural and diallylphthalate compositions are suitable for forming glass-fibre plastic items by the wet method and coatings under the action of ionizing radiations

  20. High-speed nonvolatile CMOS/MNOS RAM

    International Nuclear Information System (INIS)

    Derbenwick, G.F.; Dodson, W.D.; Sokel, R.J.

    1979-01-01

    A bulk silicon technology for a high-speed static CMOS/MNOS RAM has been developed. Radiation-hardened, high voltage CMOS circuits have been fabricated for the memory array driving circuits and the enhancement-mode p-channel MNOS memory transistors have been fabricated using a native tunneling oxide with a 45 nm CVD Si 3 N 4 insulator deposited at 750 0 C. Read cycle times less than 350 ns and write cycle times of 1 μs are projected for the final 1Kx1 design. The CMOS circuits provide adequate speed for the write and read cycles and minimize the standby power dissipation. Retention times well in excess of 30 min are projected

  1. Radiation sensitivity of integrated circuits Pt. 1

    International Nuclear Information System (INIS)

    Bereczkine Kerenyi, Ilona

    1986-01-01

    The cosmic ray sensitivity of CMOS integrated circuits are overviewed in three parts. The aim is to analyze the effects of ionizing radiation on the degradation of electronic parameters, the effects of the electric state during irradiation, and the radiation hardening of ICs. In this Part 1 a general introduction of the response of semiconductors to cosmic radiation is given, and the radiation tolerance and hardening of small-scale integrated CMOS ICs is analyzed in detail. The devices include various basic inverters and simple gate ICs. (R.P.)

  2. Radiation-hardened control system

    International Nuclear Information System (INIS)

    Vandermolen, R.I.; Smith, S.F.; Emery, M.S.

    1993-01-01

    A radiation-hardened bit-slice control system with associated input/output circuits was developed to prove that programmable circuits could be constructed to successfully implement intelligent functions in a highly radioactive environment. The goal for this effort was to design and test a programmable control system that could withstand a minimum total dose of 10 7 rads (gamma). The Radiation Hardened Control System (RHCS) was tested in operation at a dose rate that ranged up to 135 krad/h, with an average total dose of 10.75 Mrads. Further testing beyond the required 10 7 rads was also conducted. RHCS performed properly through the target dose of 10 7 rads, and sporadic intermittent failures in some programmable logic devices were noted after ∼ 13 Mrads

  3. Thermomechanical properties of radiation hardened oligoesteracrylates

    International Nuclear Information System (INIS)

    Lomonosova, N.V.; Chikin, Yu.A.

    1984-01-01

    Thermomechanical properties of radiation hardened oligoesteracrylates are studied by the methods of isothermal heating and thermal mechanics. Films of dimethacrylate of ethylene glycol, triethylene glycol (TGM-3), tetraethylene glycol, tridecaethylene glycol and TGM-3 mixture with methyl methacrylate hardened by different doses (5-150 kGy) using Co 60 installation with a dose rate of 2x10 -3 kGy/s served as a subject of the research. During oligoesteracrylate hargening a space network is formed, chain sections between lattice points of which are in a stressed state. Maximum of deformation is observed at 210-220 deg C on thermomechanical curves of samples hardened by doses > 5 kGy, which form and intensity is dependent on an absorbed dose. Presence of a high-temperature maximum on diaqrams of isometric heating of spatially cross-linked oligoesteracrylates is discovered. High thermal stability of three-dimensional network of radiation hardened oligoesteracrylates provides satisfactory tensile properties (40% of initial strength) in sample testing an elevated temperatures (200-250 deg C)

  4. E-Beam Effects on CMOS Active Pixel Sensors

    International Nuclear Information System (INIS)

    Kang, Dong Ook; Jo, Gyu Seong; Kim, Hyeon Daek; Kim, Hyunk Taek; Kim, Jong Yeol; Kim, Chan Kyu

    2011-01-01

    Three different CMOS active pixel structures manufactured in a deep submicron process have been evaluated with electron beam. The devices were exposed to 1 MeV electron beam up to 5kGy. Dark current increased after E-beam irradiation differently at each pixel structure. Dark current change is dependent on CMOS pixel structures. CMOS image sensors are now good candidates in demanding applications such as medical image sensor, particle detection and space remote sensing. In these situations, CISs are exposed to high doses of radiation. In fact radiation is known to generate trapped charge in CMOS oxides. It can lead to threshold voltage shifts and current leakages in MOSFETs and dark current increase in photodiodes. We studied ionizing effects in three types of CMOS APSs fabricated by 0.25 CMOS process. The devices were irradiated by a Co 60 source up to 50kGy. All irradiation took place at room temperature. The dark current in the three different pixels exhibits increase with electron beam exposure. From the above figure, the change of dark current is dependent on the pixel structure. Double junction structure has shown relatively small increase of dark current after electron beam irradiation. The dark current in the three different pixels exhibits increase with electron beam exposure. The contribution of the total ionizing dose to the dark current increase is small here, since the devices were left unbiased during the electron beam irradiation. Radiation hardness in dependent on the pixel structures. Pixel2 is relatively vulnerable to radiation exposure. Pixel3 has radiation hardened structure

  5. SEU-hardened design for shift register in CMOS APS

    International Nuclear Information System (INIS)

    Meng Liya; Liu Zedong; Hu Dajiang; Wang Qingxiang

    2012-01-01

    The inverter-based quasi-static shift register in CMOS APS, which is used in ionizing radiation environment, is susceptible to single event upset (SEU), thus affecting the CMOS active pixel sensor (APS) working. The analysis of the SEU for inverter-based quasi-static shift register concludes that the most sensitive node to single event transient (SET) exists in the input of inverter, and the threshold voltage and capacitance of input node of inverter determine the capability of anti-SEU. A new method was proposed, which replaced the inverter with Schmitt trigger in shift register. Because there is a hysteresis on voltage transfer characteristic of Schmitt trigger, there is high flip threshold, thus better capability of anti-SEU can be achieved. Simulation results show that the anti-SEU capability of Schmitt trigger is 10 times more than that of inverter. (authors)

  6. Radiation hardening coating material

    International Nuclear Information System (INIS)

    McDonald, W.H.; Prucnal, P.J.; DeMajistre, Robert.

    1977-01-01

    This invention concerns a radiation hardening coating material. First a resin is prepared by reaction of bisphenol diglycidylic ether with acrylic or methacrylic acids. Then the reactive solvent is prepared by reaction of acrylic or methacrylic acids with epichlorhydrine or epibromhydrine. Then a solution consisting of the resin dissolved in the reactive solvent is prepared. A substrate (wood, paper, polyesters, polyamines etc.) is coated with this composition and exposed to ionizing radiations (electron beams) or ultraviolet radiations [fr

  7. Radiation hardening of semiconductor parts

    International Nuclear Information System (INIS)

    Anon.

    1993-01-01

    This chapter is an overview of total-ionizing-dose and single-event hardening techniques and should be used as a guide to a range of research publications. It should be stressed that there is no clear and simple route to a radiation-tolerant silicon integrated circuit. What works for one fabrication process may not work for another, and there are many complex interactions within individual processes and designs. The authors have attempted to highlight the most important factors and those process changes which should bring improved hardness. The main point is that radiation-hardening as a procedure must be approached in a methodical fashion and with a good understanding of the response mechanisms involved

  8. RHOBOT: Radiation hardened robotics

    Energy Technology Data Exchange (ETDEWEB)

    Bennett, P.C.; Posey, L.D. [Sandia National Labs., Albuquerque, NM (United States)

    1997-10-01

    A survey of robotic applications in radioactive environments has been conducted, and analysis of robotic system components and their response to the varying types and strengths of radiation has been completed. Two specific robotic systems for accident recovery and nuclear fuel movement have been analyzed in detail for radiation hardness. Finally, a general design approach for radiation-hardened robotics systems has been developed and is presented. This report completes this project which was funded under the Laboratory Directed Research and Development program.

  9. RHOBOT: Radiation hardened robotics

    International Nuclear Information System (INIS)

    Bennett, P.C.; Posey, L.D.

    1997-10-01

    A survey of robotic applications in radioactive environments has been conducted, and analysis of robotic system components and their response to the varying types and strengths of radiation has been completed. Two specific robotic systems for accident recovery and nuclear fuel movement have been analyzed in detail for radiation hardness. Finally, a general design approach for radiation-hardened robotics systems has been developed and is presented. This report completes this project which was funded under the Laboratory Directed Research and Development program

  10. Development of Single-Event Upset hardened programmable logic devices in deep submicron CMOS

    International Nuclear Information System (INIS)

    Bonacini, S.

    2007-11-01

    The electronics associated to the particle detectors of the Large Hadron Collider (LHC), under construction at CERN, will operate in a very harsh radiation environment. Commercial Off-The-Shelf (COTS) components cannot be used in the vicinity of particle collision due to their poor radiation tolerance. This thesis is a contribution to the effort to cover the need for radiation-tolerant SEU-robust (Single Event Upset) programmable components for application in high energy physics experiments. Two components are under development: a Programmable Logic Device (PLD) and a Field-Programmable Gate Array (FPGA). The PLD is a fuse-based, 10-input, 8-I/O general architecture device in 0.25 μm CMOS technology. The FPGA under development is a 32*32 logic block array, equivalent to ∼ 25 k gates, in 0.13 μm CMOS. The irradiation test results obtained in the CMOS 0.25 μm technology demonstrate good robustness of the circuit up to an LET (Linear Energy Transfer) of 79.6 cm 2 *MeV/mg, which make it suitable for the target environment. The CMOS 0.13 μm circuit has showed robustness to an LET of 37.4 cm 2 *MeV/mg in the static test mode and has increased sensitivity in the dynamic test mode. This work focused also on the research for an SEU-robust register in both the mentioned technologies. The SEU-robust register is employed as a user data flip-flop in the FPGA and PLD designs and as a configuration cell as well in the FPGA design

  11. Thermal Radiometer Signal Processing Using Radiation Hard CMOS Application Specific Integrated Circuits for Use in Harsh Planetary Environments

    Science.gov (United States)

    Quilligan, G.; DuMonthier, J.; Aslam, S.; Lakew, B.; Kleyner, I.; Katz, R.

    2015-01-01

    Thermal radiometers such as proposed for the Europa Clipper flyby mission require low noise signal processing for thermal imaging with immunity to Total Ionizing Dose (TID) and Single Event Latchup (SEL). Described is a second generation Multi- Channel Digitizer (MCD2G) Application Specific Integrated Circuit (ASIC) that accurately digitizes up to 40 thermopile pixels with greater than 50 Mrad (Si) immunity TID and 174 MeV-sq cm/mg SEL. The MCD2G ASIC uses Radiation Hardened By Design (RHBD) techniques with a 180 nm CMOS process node.

  12. An improved standard total dose test for CMOS space electronics

    International Nuclear Information System (INIS)

    Fleetwood, D.M.; Winokur, P.S.; Riewe, L.C.; Pease, R.L.

    1989-01-01

    The postirradiation response of hardened and commercial CMOS devices is investigated as a function of total dose, dose rate, and annealing time and temperature. Cobalt-60 irradiation at ≅ 200 rad(SiO 2 )/s followed by a 1-week 100 degrees C biased anneal and testing is shown to be an effective screen of hardened devices for space use. However, a similar screen and single-point test performed after Co-60 irradiation and elevated temperature anneal cannot be generally defined for commercial devices. In the absence of detailed knowledge about device and circuit radiation response, a two-point standard test is proposed to ensure space surviability of CMOS circuits: a Co-60 irradiation and test to screen against oxide-trapped charge related failures, and an additional rebound test to screen against interface-trap related failures. Testing implications for bipolar technologies are also discussed

  13. Radiation-hardened optoelectronic components: detectors

    International Nuclear Information System (INIS)

    Wiczer, J.J.

    1986-01-01

    In this talk, we will survey recent research in the area of radiation hardened optical detectors. We have studied conventional silicon photodiode structures, special radiation hardened silicon photodiodes, and special double heterojunction AlGaAs/GaAs photodiodes in neutron, gamma, pulsed x-ray and charged particle environments. We will present results of our work and summarize other research in this area. Our studies have shown that detectors can be made to function acceptably after exposures to neutron fluences of 10 15 n/cm 2 , total dose gamma exposures of 10 8 rad (Si), and flash x-ray environments of 10 8 rad/sec (Si). We will describe detector structures that can operate through these conditions, pre-rad and post-rad operational characteristics, and experimental conditions that produced these results. 23 refs., 10 figs., 1 tab

  14. Radiation hardening of metals irradiated by heavy ions

    International Nuclear Information System (INIS)

    Didyk, A.Yu.; Skuratov, V.A.; Mikhajlova, N.Yu.; Regel', V.R.

    1988-01-01

    The damage dose dependence in the 10 -4 -10 -2 dpa region of radiation hardening of Al, V, Ni, Cu irradiated by xenon ions with 124 MeV energy is investigated using the microhardness technique and transmission electron microscope. It is shown that the pure metals radiation hardening is stimulated for defects clusters with the typical size less than 5 nm, as in the case of neutron and the light charge ion irradiation

  15. Exploration of a radiation hardening stabilized voltage power supply

    International Nuclear Information System (INIS)

    Xie Zeyuan; Xu Xianguo

    2014-01-01

    This paper mainly introduces the design method of radiation hardening stabilized voltage power supply that makes use of commercial radiation resistant electronic devices and the test results of radiation performance of the power supply and devices are presented in detail. The experiment results show that the hardened power supply can normally work until 1000 Gy (Si) total dose and 1 × 10 14 n/cm 2 neutron radiation, and it doesn't latchup at about 1 × l0 9 Gy (Si)/s gamma transient dose rate. (authors)

  16. Radiation-hardened micro-electronics for nuclear instrumentation

    International Nuclear Information System (INIS)

    Van Uffelen, M.

    2007-01-01

    The successful development and deployment of future fission and thermonuclear fusion reactors depends to a large extent on the advances of different enabling technologies. Not only the materials need to be custom engineered but also the instrumentation, the electronics and the communication equipment need to support operation in this harsh environment, with expected radiation levels during maintenance up to several MGy. Indeed, there are yet no commercially available electronic devices available off-the-shelf which demonstrated a satisfying operation at these extremely high radiation levels. The main goal of this task is to identify commercially available radiation tolerant technologies, and to design dedicated and integrated electronic circuits, using radiation hardening techniques, both at the topological and architectural level. Within a stepwise approach, we first design circuits with discrete components and look for an equivalent integrated technology. This will enable us to develop innovative instrumentation and communication tools for the next generation of nuclear reactors, where both radiation hardening and miniaturization play a dominant role

  17. 0.25μm radiation tolerant technology for space applications

    International Nuclear Information System (INIS)

    Haddad, N.; Brady, F.; Scott, T.; Yoder, J.

    1999-01-01

    Lockheed Martin federal systems has developed a state-of-the-art radiation tolerant 0,25 μm CMOS capability that is compatible with commercial foundries as well as radiation hardened fabrication. A technology test chip was designed, fabricated and evaluated for performance, power and radiation hardness in order to validate the methodology and evaluate the technology. Testing results show that -) the active transistor threshold shift is negligible for 0.25 μm CMOS, -) the hardened STI (shallow trench isolation) can support Mega-rad applications, and -) the holding voltage is well beyond the operating voltage of 2.5 V. This technology is intended to support high density, high performance and low power space applications

  18. BUSFET -- A radiation-hardened SOI transistor

    International Nuclear Information System (INIS)

    Schwank, J.R.; Shaneyfelt, M.R.; Draper, B.L.; Dodd, P.E.

    1999-01-01

    The total-dose hardness of SOI technology is limited by radiation-induced charge trapping in gate, field, and SOI buried oxides. Charge trapping in the buried oxide can lead to back-channel leakage and makes hardening SOI transistors more challenging than hardening bulk-silicon transistors. Two avenues for hardening the back-channel are (1) to use specially prepared SOI buried oxides that reduce the net amount of trapped positive charge or (2) to design transistors that are less sensitive to the effects of trapped charge in the buried oxide. In this work, the authors propose a partially-depleted SOI transistor structure for mitigating the effects of trapped charge in the buried oxide on radiation hardness. They call this structure the BUSFET--Body Under Source FET. The BUSFET utilizes a shallow source and a deep drain. As a result, the silicon depletion region at the back channel caused by radiation-induced charge trapping in the buried oxide does not form a conducting path between source and drain. Thus, the BUSFET structure design can significantly reduce radiation-induced back-channel leakage without using specially prepared buried oxides. Total dose hardness is achieved without degrading the intrinsic SEU or dose rate hardness of SOI technology. The effectiveness of the BUSFET structure for reducing total-dose back-channel leakage depends on several variables, including the top silicon film thickness and doping concentration, and the depth of the source. 3-D simulations show that for a body doping concentration of 10 18 cm -3 , a drain bias of 3 V, and a source depth of 90 nm, a silicon film thickness of 180 nm is sufficient to almost completely eliminate radiation-induced back-channel leakage. However, for a doping concentration of 3 x 10 17 cm -3 , a thicker silicon film (300 nm) must be used

  19. Update on radiation-hardened microcomputers for robotics and teleoperated systems

    International Nuclear Information System (INIS)

    Sias, F.R. Jr.; Tulenko, J.S.

    1993-01-01

    Since many programs sponsored by the Department of Defense are being canceled, it is important to select carefully radiation-hardened microprocessors for projects that will mature (or will require continued support) several years in the future. At the present time there are seven candidate 32-bit processors that should be considered for long-range planning for high-performance radiation-hardened computer systems. For Department of Energy applications it is also important to consider efforts at standardization that require the use of the VxWorks operating system and hardware based on the VMEbus. Of the seven processors, one has been delivered and is operating and other systems are scheduled to be delivered late in 1993 or early in 1994. At the present time the Honeywell-developed RH32, the Harris RH-3000 and the Harris RHC-3000 are leading contenders for meeting DOE requirements for a radiation-hardened advanced 32-bit microprocessor. These are all either compatible with or are derivatives of the MIPS R3000 Reduced Instruction Set Computer. It is anticipated that as few as two of the seven radiation-hardened processors will be supported by the space program in the long run

  20. The review of radiation effects of γ total dose in CMOS circuits

    International Nuclear Information System (INIS)

    Chen Panxun; Gao Wenming; Xie Zeyuan; Mi Bang

    1992-01-01

    Radiation performances of commercial and rad-hard CMOS circuits are reviewed. Threshold voltage, static power current, V in -V out characteristic and propagation delay time related with total dose are presented for CMOS circuits from several manufacturing processes. The performance of radiation-annealing of experimental circuits had been observed for two years. The comparison has been made between the CMOS circuits made in China and the commercial RCA products. 60 Co γ source can serve as γ simulator of the nuclear explosion

  1. Radiation hardening and embrittlement of some refractory metals and alloys

    International Nuclear Information System (INIS)

    Fabritsiev, S.; Pokrovskyb

    2007-01-01

    Tungsten is proposed for application in the ITER divertor and limiter as plasma facing material. The tungsten operation temperature in the ITER divertor is relatively high. Hence, the ductile properties of tungsten will be controlled by the low temperature radiation embrittlement. The mechanism of radiation hardening and embrittlement under neutron irradiation at low temperature is well studied for FCC metals, in particular for copper. At the same time, low-temperature radiation hardening of BCC materials, in particular for refractory metals, is less studied. This study presents the results of investigation into radiation hardening and embrittlement of pure metals: W, Mo and Nb, and W-Re and Ta-4W alloys. The materials were in the annealed conditions. The specimens were irradiated in the SM-2 reactor to doses of 10 -4 -10 -1 dpa at 80 C and then tested for tension at 80 C. The study of the stress-strain curves of unirradiated specimens revealed a yield drop for W, Mo, Nb, Ta-4W, W-Re. After the yield drop some metals (Mo,Nb) retain their capability for strain hardening and demonstrate a high elongation (20-50%). Radiation hardening is maximum in Mo (∝400MPa) and minimum in Nb (∝100 MPa). In this case the dependence slope for Nb is similar to that for pure copper irradiated in SM-2 under the same conditions. Ii and Ta-4W have a higher slope. Measurement of electrical resistivity of irradiated specimens showed that for all materials it is increased monotonously with an increase in the irradiation dose. A minimum gain in electrical resistivity with a dose was observed for Nb (∝3% at 0.1 dpa). As for Mo it was essentially higher, i.e. ∝ 30%. The gain was maximum for W-Re alloy. Comparison of radiation hardening dose dependencies obtained in this study with the data for FCC metals (Cu) showed that in spite of the quantitative difference the qualitative behavior of these two classes of metals is similar. (orig.)

  2. Future challenges in single event effects for advanced CMOS technologies

    International Nuclear Information System (INIS)

    Guo Hongxia; Wang Wei; Luo Yinhong; Zhao Wen; Guo Xiaoqiang; Zhang Keying

    2010-01-01

    SEE have became a substantial Achilles heel for the reliability of space-based advanced CMOS technologies with features size downscaling. Future space and defense systems require identification and understanding of single event effects to develop hardening approaches for advanced technologies, including changes in device geometry and materials affect energy deposition, charge collection,circuit upset, parametric degradation devices. Topics covered include the impact of technology scaling on radiation response, including single event transients in high speed digital circuits, evidence for single event effects caused by proton direct ionization, and the impact for SEU induced by particle energy effects and indirect ionization. The single event effects in CMOS replacement technologies are introduced briefly. (authors)

  3. Estimation of radiation hardening in ferritic steels using the cluster dynamics models

    Energy Technology Data Exchange (ETDEWEB)

    Kwon, Jun Hyun; Kim, Whung Whoe; Hong, Jun Hwa [Korea Atomic Energy Research Institute, Taejon (Korea, Republic of)

    2005-07-01

    Evolution of microstructure under irradiation brings about the mechanical property changes of materials, of which the major concern is radiation hardening in this work. Radiation hardening is generally expressed in terms of an increase in yield strength as a function of radiation dose and temperature. Cluster dynamics model for radiation hardening has been developed to describe the evolution of point defects clusters (PDCs) and copperrich precipitates (CRPs). While the mathematical models developed by Stoller focus on the evolution of PDCs in ferritic steels under neutron irradiation, we slightly modify the model by including the CRP growth and estimate the magnitude of hardening induced by PDC and CRP. The model is then used to calculate the changes in yield strength of RPV steels. The calculation results are compared to measured yield strength values, obtained from surveillance testing of PWR vessel steels in France.

  4. Radiation effects on radiation-hardened KU and KS-4V optical fibres

    International Nuclear Information System (INIS)

    Ivanov, A.A.; Tugarinov, S.N.; Kaschuck, Y.A.; Krasilnikov, A.V.; Bender, S.E.

    1999-01-01

    The aim of this work was to test the un-pretreated and the hardened (H 2 -loaded and pre-irradiated) KS-4V and KU optical fibres in reactor environment by in-situ measurements of both the radiation-induced loss and the luminescence in the visible spectral region. Both the radio-luminescent and the transmission spectra were in-situ detected during irradiation by charge-coupled-device (CCD) linear detector in the visible spectral region of 400 to 700 nm. The radiation induced loss spectra at the fast neutron fluence of 2*10 6 n/cm 2 shows the hardened, H 2 -loading and pre-irradiating effects in the both KU and KS-4V fibres. KU un-pretreated fibre shows a big radiation absorption band of non-bridging oxygen centered at the wavelength of 630 nm. It appears that the KS-4V hardened fibre has a specific point in the loss spectrum in the vicinity of 460 nm. Other measurements were performed, particularly after reactor shutdown and at 3 different neutron fluences with constant neutron flux after restarting

  5. Overview of CMOS process and design options for image sensor dedicated to space applications

    Science.gov (United States)

    Martin-Gonthier, P.; Magnan, P.; Corbiere, F.

    2005-10-01

    With the growth of huge volume markets (mobile phones, digital cameras...) CMOS technologies for image sensor improve significantly. New process flows appear in order to optimize some parameters such as quantum efficiency, dark current, and conversion gain. Space applications can of course benefit from these improvements. To illustrate this evolution, this paper reports results from three technologies that have been evaluated with test vehicles composed of several sub arrays designed with some space applications as target. These three technologies are CMOS standard, improved and sensor optimized process in 0.35μm generation. Measurements are focussed on quantum efficiency, dark current, conversion gain and noise. Other measurements such as Modulation Transfer Function (MTF) and crosstalk are depicted in [1]. A comparison between results has been done and three categories of CMOS process for image sensors have been listed. Radiation tolerance has been also studied for the CMOS improved process in the way of hardening the imager by design. Results at 4, 15, 25 and 50 krad prove a good ionizing dose radiation tolerance applying specific techniques.

  6. Radiation Hardened 10BASE-T Ethernet Physical Layer (PHY)

    Science.gov (United States)

    Lin, Michael R. (Inventor); Petrick, David J. (Inventor); Ballou, Kevin M. (Inventor); Espinosa, Daniel C. (Inventor); James, Edward F. (Inventor); Kliesner, Matthew A. (Inventor)

    2017-01-01

    Embodiments may provide a radiation hardened 10BASE-T Ethernet interface circuit suitable for space flight and in compliance with the IEEE 802.3 standard for Ethernet. The various embodiments may provide a 10BASE-T Ethernet interface circuit, comprising a field programmable gate array (FPGA), a transmitter circuit connected to the FPGA, a receiver circuit connected to the FPGA, and a transformer connected to the transmitter circuit and the receiver circuit. In the various embodiments, the FPGA, transmitter circuit, receiver circuit, and transformer may be radiation hardened.

  7. Development of Single-Event Upset hardened programmable logic devices in deep submicron CMOS; Developpement de circuits logiques programmables resistants aux aleas logiques en technologie CMOS submicrometrique

    Energy Technology Data Exchange (ETDEWEB)

    Bonacini, S

    2007-11-15

    The electronics associated to the particle detectors of the Large Hadron Collider (LHC), under construction at CERN, will operate in a very harsh radiation environment. Commercial Off-The-Shelf (COTS) components cannot be used in the vicinity of particle collision due to their poor radiation tolerance. This thesis is a contribution to the effort to cover the need for radiation-tolerant SEU-robust (Single Event Upset) programmable components for application in high energy physics experiments. Two components are under development: a Programmable Logic Device (PLD) and a Field-Programmable Gate Array (FPGA). The PLD is a fuse-based, 10-input, 8-I/O general architecture device in 0.25 {mu}m CMOS technology. The FPGA under development is a 32*32 logic block array, equivalent to {approx} 25 k gates, in 0.13 {mu}m CMOS. The irradiation test results obtained in the CMOS 0.25 {mu}m technology demonstrate good robustness of the circuit up to an LET (Linear Energy Transfer) of 79.6 cm{sup 2}*MeV/mg, which make it suitable for the target environment. The CMOS 0.13 {mu}m circuit has showed robustness to an LET of 37.4 cm{sup 2}*MeV/mg in the static test mode and has increased sensitivity in the dynamic test mode. This work focused also on the research for an SEU-robust register in both the mentioned technologies. The SEU-robust register is employed as a user data flip-flop in the FPGA and PLD designs and as a configuration cell as well in the FPGA design.

  8. BUSFET - A Novel Radiation-Hardened SOI Transistor

    International Nuclear Information System (INIS)

    Schwank, J.R.; Shaneyfelt, M.R.; Draper, B.L.; Dodd, P.E.

    1999-01-01

    The total-dose hardness of SOI technology is limited by radiation-induced charge trapping in gate, field, and SOI buried oxides. Charge trapping in the buried oxide can lead to back-channel leakage and makes hardening SOI transistors more challenging than hardening bulk-silicon transistors. Two avenues for hardening the back-channel are (1) to use specially prepared SOI buried oxides that reduce the net amount of trapped positive charge or (2) to design transistors that are less sensitive to the effects of trapped charge in the buried oxide. In this work, we propose a new partially-depleted SOI transistor structure that we call the BUSFET--Body Under Source FET. The BUSFET utilizes a shallow source and a deep drain. As a result, the silicon depletion region at the back channel caused by radiation-induced charge trapping in the buried oxide does not form a conducting path between source and drain. Thus, the BUSFET structure design can significantly reduce radiation-induced back-channel leakage without using specially prepared buried oxides. Total dose hardness is achieved without degrading the intrinsic SEU and dose rate hardness of SOI technology. The effectiveness of the BUSFET structure for reducing total-dose back-channel leakage depends on several variables, including the top silicon film thickness and doping concentration and the depth of the source. 3-D simulations show that for a doping concentration of 10 18 cm -3 and a source depth of 90 nm, a silicon film thickness of 180 nm is sufficient to almost completely eliminate radiation-induced back-channel leakage. However, for a doping concentration of 3x10 17 cm -3 , a thicker silicon film (300 nm) must be used

  9. Non-destructive screening method for radiation hardened performance of large scale integration

    International Nuclear Information System (INIS)

    Zhou Dong; Xi Shanbin; Guo Qi; Ren Diyuan; Li Yudong; Sun Jing; Wen Lin

    2013-01-01

    The space radiation environment could induce radiation damage on the electronic devices. As the performance of commercial devices is generally superior to that of radiation hardened devices, it is necessary to screen out the devices with good radiation hardened performance from the commercial devices and applying these devices to space systems could improve the reliability of the systems. Combining the mathematical regression analysis with the different physical stressing experiments, we investigated the non-destructive screening method for radiation hardened performance of the integrated circuit. The relationship between the change of typical parameters and the radiation performance of the circuit was discussed. The irradiation-sensitive parameters were confirmed. The pluralistic linear regression equation toward the prediction of the radiation performance was established. Finally, the regression equations under stress conditions were verified by practical irradiation. The results show that the reliability and accuracy of the non-destructive screening method can be elevated by combining the mathematical regression analysis with the practical stressing experiment. (authors)

  10. Radiation imaging detectors made by wafer post-processing of CMOS chips

    NARCIS (Netherlands)

    Blanco Carballo, V.M.

    2009-01-01

    In this thesis several wafer post-processing steps have been applied to CMOS chips. Amplification gas strucutures are built on top of the microchips. A complete radiation imaging detector is obtained this way. Integrated Micromegas-like and GEM-like structures were fabricated on top of Timepix CMOS

  11. Coatings hardenable by ionizing radiation and their applications

    International Nuclear Information System (INIS)

    Aronoff, E.J.; Labana, S.S.

    1976-01-01

    The invention deals with the production of a coating medium which can be hardened by ionizing radiation. The composition includes tetravinyl compounds containing no free hydroxyl groups which were obtained by the conversion of di-epoxides with acryl or methacryl acid via the intermediary step of a divinyl ester condensation product. The intermediary product is converted with acryloyl or methacryloyl halides. The mass still contains non-polymerisable solvent (such as tolual, xylol), pigments and fillers. It is of advantage if the di-epoxide has a molecular weight of 140 to 500. Furthermore, coatings are to be made of this coating medium which are hardened by ionizing radiation at temperatures between 20 0 C and 70 0 C. 19 examples. (HK) [de

  12. Comparison of analytical models and experimental results for single-event upset in CMOS SRAMs

    International Nuclear Information System (INIS)

    Mnich, T.M.; Diehl, S.E.; Shafer, B.D.

    1983-01-01

    In an effort to design fully radiation-hardened memories for satellite and deep-space applications, a 16K and a 2K CMOS static RAM were modeled for single-particle upset during the design stage. The modeling resulted in the addition of a hardening feedback resistor in the 16K remained tentatively unaltered. Subsequent experiments, using the Lawrence Berkeley Laboratories' 88-inch cyclotron to accelerate krypton and oxygen ions, established an upset threshold for the 2K and the 16K without resistance added, as well as a hardening threshold for the 16K with feedback resistance added. Results for the 16K showed it to be hardenable to the higher level than previously published data for other unhardened 16K RAMs. The data agreed fairly well with the modeling results; however, a close look suggests that modification of the simulation methodology is required to accurately predict the resistance necessary to harden the RAM cell

  13. Radiation hardening of optical fibers and fiber sensors for space applications: recent advances

    Science.gov (United States)

    Girard, S.; Ouerdane, Y.; Pinsard, E.; Laurent, A.; Ladaci, A.; Robin, T.; Cadier, B.; Mescia, L.; Boukenter, A.

    2017-11-01

    In these ICSO proceedings, we review recent advances from our group concerning the radiation hardening of optical fiber and fiber-based sensors for space applications and compare their benefits to state-of-the-art results. We focus on the various approaches we developed to enhance the radiation tolerance of two classes of optical fibers doped with rare-earths: the erbium (Er)-doped ones and the ytterbium/erbium (Er/Yb)-doped ones. As a first approach, we work at the component level, optimizing the fiber structure and composition to reduce their intrinsically high radiation sensitivities. For the Erbium-doped fibers, this has been achieved using a new structure for the fiber that is called Hole-Assisted Carbon Coated (HACC) optical fibers whereas for the Er/Ybdoped optical fibers, their hardening was successfully achieved adding to the fiber, the Cerium element, that prevents the formation of the radiation-induced point defects responsible for the radiation induced attenuation in the infrared part of the spectrum. These fibers are used as part of more complex systems like amplifiers (Erbium-doped Fiber Amplifier, EDFA or Yb-EDFA) or source (Erbium-doped Fiber Source, EDFS or Yb- EDFS), we discuss the impact of using radiation-hardened fibers on the system radiation vulnerability and demonstrate the resistance of these systems to radiation constraints associated with today and future space missions. Finally, we will discuss another radiation hardening approach build in our group and based on a hardening-by-system strategy in which the amplifier is optimized during its elaboration for its future mission considering the radiation effects and not in-lab.

  14. Latch-up and radiation integrated circuit--LURIC: a test chip for CMOS latch-up investigation

    International Nuclear Information System (INIS)

    Estreich, D.B.

    1978-11-01

    A CMOS integrated circuit test chip (Latch-Up and Radiation Integrated Circuit--LURIC) designed for CMOS latch-up and radiation effects research is described. The purpose of LURIC is (a) to provide information on the physics of CMOS latch-up, (b) to study the layout dependence of CMOS latch-up, and (c) to provide special latch-up test structures for the development and verification of a latch-up model. Many devices and test patterns on LURIC are also well suited for radiation effects studies. LURIC contains 86 devices and related test structures. A 12-layer mask set allows both metal gate CMOS and silicon gate ELA (Extended Linear Array) CMOS to be fabricated. Six categories of test devices and related test structures are included. These are (a) the CD4007 metal gate CMOS IC with auxiliary test structures, (b) ELA CMOS cells, (c) field-aided lateral pnp transistors, (d) p-well and substrate spreading resistance test structures, (e) latch-up test structures (simplified symmetrical latch-up paths), and (f) support test patterns (e.g., MOS capacitors, p + n diodes, MOS test transistors, van der Pauw and Kelvin contact resistance test patterns, etc.). A standard probe pattern array has been used on all twenty-four subchips for testing convenience

  15. Formulating the strength factor α for improved predictability of radiation hardening

    Energy Technology Data Exchange (ETDEWEB)

    Tan, L., E-mail: tanl@ornl.gov; Busby, J.T.

    2015-10-15

    Analytical equations were developed to calculate the strength factors of precipitates, Frank loops, and cavities in austenitic alloys, which strongly depend on barrier type, size, geometry and density, as well as temperature. Calculated strength factors were successfully used to estimate radiation hardening using the broadly employed dispersed barrier-hardening model, leading to good agreement with experimentally measured hardening in neutron-irradiated type 304 and 316 stainless steel variants. The formulated strength factor provides a route for more reliable hardening predictions and can be easily incorporated into component simulations and design.

  16. Radiation-hardened I2L 8*8 multiplier circuit

    International Nuclear Information System (INIS)

    Doyle, B.R.; Kreps, S.A.; Van Vonno, N.W.; Lake, G.W.

    1979-01-01

    Development of improved Substrate Fed I 2 L (SFL) processing has been combined with geometry and fanout constraints to design a radiation hardened LSI 8.8 Multiplier. This study describes details of the process and circuit design and gives resultant electrical and radiation test performance

  17. Characterisation of diode-connected SiGe BiCMOS HBTs for space applications

    Science.gov (United States)

    Venter, Johan; Sinha, Saurabh; Lambrechts, Wynand

    2016-02-01

    Silicon-germanium (SiGe) bipolar complementary metal-oxide semiconductor (BiCMOS) transistors have vertical doping profiles reaching deeper into the substrate when compared to lateral CMOS transistors. Apart from benefiting from high-speed, high current gain and low-output resistance due to its vertical profile, BiCMOS technology is increasingly becoming a preferred technology for researchers to realise next-generation space-based optoelectronic applications. BiCMOS transistors have inherent radiation hardening, to an extent predictable cryogenic performance and monolithic integration potential. SiGe BiCMOS transistors and p-n junction diodes have been researched and used as a primary active component for over the last two decades. However, further research can be conducted with diode-connected heterojunction bipolar transistors (HBTs) operating at cryogenic temperatures. This work investigates these characteristics and models devices by adapting standard fabrication technology components. This work focuses on measurements of the current-voltage relationship (I-V curves) and capacitance-voltage relationships (C-V curves) of diode-connected HBTs. One configuration is proposed and measured, which is emitterbase shorted. The I-V curves are measured for various temperature points ranging from room temperature (300 K) to the temperature of liquid nitrogen (77 K). The measured datasets are used to extract a model of the formed diode operating at cryogenic temperatures and used as a standard library component in computer aided software designs. The advantage of having broad-range temperature models of SiGe transistors becomes apparent when considering implementation of application-specific integrated circuits and silicon-based infrared radiation photodetectors on a single wafer, thus shortening interconnects and lowering parasitic interference, decreasing the overall die size and improving on overall cost-effectiveness. Primary applications include space-based geothermal

  18. Radiation effects of protons and 60Co γ rays on CMOS operational amplifier

    International Nuclear Information System (INIS)

    Lu Wu; Ren Diyuan; Guo Qi; Yu Xuefeng; Yan Rongliang

    1997-01-01

    Radiation effects of 60 Co γ ray and 4,7 and 30 MeV protons on LF 7650 CMOS operational amplifier were investigated. The damage mechanism of LF7650 was discussed. It is indicated that the mobility reduction of major carrier caused by ionizing and displacement damage is the chief mechanism causing the failure of CMOS operational amplifier irradiated by protons, and that is why the degradation of LF 7650 caused by protons is much more serious than that caused by 60 Co γ ray. In addition, a comparison of proton radiation effects on CMOS operational amplifier and MOSFET showed a significant difference in mechanism

  19. Design considerations for a radiation hardened nonvolatile memory

    International Nuclear Information System (INIS)

    Murray, J.R.

    1993-01-01

    Sub-optimal design practices can reduce the radiation hardness of a circuit even though it is fabricated in a radiation hardened process. This is especially true for a nonvolatile memory, as compared to a standard digital circuit, where high voltages and unusual bias conditions are required. This paper will discuss the design technique's used in the development of a 64K EEPROM (Electrically Erasable Programmable Read Only Memory) to maximize radiation hardness. The circuit radiation test results will be reviewed in order to provide validation of the techniques

  20. Radiation dose effects, hardening of electronic components

    International Nuclear Information System (INIS)

    Dupont-Nivet, E.

    1991-01-01

    This course reviews the mechanism of interaction between ionizing radiation and a silicon oxide type dielectric, in particular the effect of electron-hole pairs creation in the material. Then effects of cumulated dose on electronic components and especially in MOS technology are examined. Finally methods hardening of these components are exposed. 93 refs

  1. An investigation of medical radiation detection using CMOS image sensors in smartphones

    Energy Technology Data Exchange (ETDEWEB)

    Kang, Han Gyu [Department of Senior Healthcare, Graduate School of Eulji University, Daejeon 301-746 (Korea, Republic of); Song, Jae-Jun [Department of Otorhinolaryngology-Head & Neck Surgery, Korea University, Guro Hospital,148, Gurodong-ro, Guro-gu, Seoul 152-703 (Korea, Republic of); Lee, Kwonhee [Graduate Program in Bio-medical Science, Korea University, 2511 Sejong-ro, Sejong City 339-770 (Korea, Republic of); Nam, Ki Chang [Department of Medical Engineering, College of Medicine, Dongguk University, 32 Dongguk-ro, Goyang-si, Gyeonggi-do 410-820 (Korea, Republic of); Hong, Seong Jong; Kim, Ho Chul [Department of Radiological Science, Eulji University, 553 Yangji-dong, Sujeong-gu, Seongnam-si, Gyeonggi-do 431-713 (Korea, Republic of)

    2016-07-01

    Medical radiation exposure to patients has increased with the development of diagnostic X-ray devices and multi-channel computed tomography (CT). Despite the fact that the low-dose CT technique can significantly reduce medical radiation exposure to patients, the increasing number of CT examinations has increased the total medical radiation exposure to patients. Therefore, medical radiation exposure to patients should be monitored to prevent cancers caused by diagnostic radiation. However, without using thermoluminescence or glass dosimeters, it is hardly measure doses received by patients during medical examinations accurately. Hence, it is necessary to develop radiation monitoring devices and algorithms that are reasonably priced and have superior radiation detection efficiencies. The aim of this study is to investigate the feasibility of medical dose measurement using complementary metal oxide semiconductor (CMOS) sensors in smartphone cameras with an algorithm to extract the X-ray interacted pixels. We characterized the responses of the CMOS sensors in a smartphone with respect to the X-rays generated by a general diagnostic X-ray system. The characteristics of the CMOS sensors in a smartphone camera, such as dose response linearity, dose rate dependence, energy dependence, angular dependence, and minimum detectable activity were evaluated. The high energy gamma-ray of 662 keV from Cs-137 can be detected using the smartphone camera. The smartphone cameras which employ the developed algorithm can detect medical radiations.

  2. An investigation of medical radiation detection using CMOS image sensors in smartphones

    International Nuclear Information System (INIS)

    Kang, Han Gyu; Song, Jae-Jun; Lee, Kwonhee; Nam, Ki Chang; Hong, Seong Jong; Kim, Ho Chul

    2016-01-01

    Medical radiation exposure to patients has increased with the development of diagnostic X-ray devices and multi-channel computed tomography (CT). Despite the fact that the low-dose CT technique can significantly reduce medical radiation exposure to patients, the increasing number of CT examinations has increased the total medical radiation exposure to patients. Therefore, medical radiation exposure to patients should be monitored to prevent cancers caused by diagnostic radiation. However, without using thermoluminescence or glass dosimeters, it is hardly measure doses received by patients during medical examinations accurately. Hence, it is necessary to develop radiation monitoring devices and algorithms that are reasonably priced and have superior radiation detection efficiencies. The aim of this study is to investigate the feasibility of medical dose measurement using complementary metal oxide semiconductor (CMOS) sensors in smartphone cameras with an algorithm to extract the X-ray interacted pixels. We characterized the responses of the CMOS sensors in a smartphone with respect to the X-rays generated by a general diagnostic X-ray system. The characteristics of the CMOS sensors in a smartphone camera, such as dose response linearity, dose rate dependence, energy dependence, angular dependence, and minimum detectable activity were evaluated. The high energy gamma-ray of 662 keV from Cs-137 can be detected using the smartphone camera. The smartphone cameras which employ the developed algorithm can detect medical radiations.

  3. Radiation effects in semiconductors: technologies for hardened integrated circuits

    International Nuclear Information System (INIS)

    Charlot, J.M.

    1983-09-01

    Various technologies are used to manufacture integrated circuits for electronic systems. But for specific applications, including those with radiation environment, it is necessary to choose an appropriate technologie or to improve a specific one in order to reach a definite hardening level. The aim of this paper is to present the main effects induced by radiation (neutrons and gamma rays) into the basic semiconductor devices, to explain some physical degradation mechanisms and to propose solutions for hardened integrated circuit fabrication. The analysis involves essentially the monolithic structure of the integrated circuits and the isolation technology of active elements. In conclusion, the advantages of EPIC and SOS technologies are described and the potentialities of new technologies (GaAs and SOI) are presented

  4. Radiation effects in semiconductors: technologies for hardened integrated circuits

    International Nuclear Information System (INIS)

    Charlot, J.M.

    1984-01-01

    Various technologies are used to manufacture integrated circuits for electronic systems. But for specific applications, including those with radiation environment, it is necessary to choose an appropriate technology or to improve a specific one in order to reach a definite hardening level. The aim of this paper is to present the main effects induced by radiation (neutrons and gamma rays) into the basic semiconductor devices, to explain some physical degradation mechanisms and to propose solutions for hardened integrated circuit fabrication. The analysis involves essentially the monolithic structure of the integrated circuits and the isolation technology of active elements. In conclusion, the advantages of EPIC and SOS technologies are described and the potentialities of new technologies (GaAs and SOI) are presented. (author)

  5. Development of radiation hard CMOS active pixel sensors for HL-LHC

    International Nuclear Information System (INIS)

    Pernegger, Heinz

    2016-01-01

    New pixel detectors, based on commercial high voltage and/or high resistivity full CMOS processes, hold promise as next-generation active pixel sensors for inner and intermediate layers of the upgraded ATLAS tracker. The use of commercial CMOS processes allow cost-effective detector construction and simpler hybridisation techniques. The paper gives an overview of the results obtained on AMS-produced CMOS sensors coupled to the ATLAS Pixel FE-I4 readout chips. The SOI (silicon-on-insulator) produced sensors by XFAB hold great promise as radiation hard SOI-CMOS sensors due to their combination of partially depleted SOI transistors reducing back-gate effects. The test results include pre-/post-irradiation comparison, measurements of charge collection regions as well as test beam results.

  6. Dynamic testing for radiation induced failures in a standard CMOS submicron technology pixel front-end

    International Nuclear Information System (INIS)

    Venuto, D. de; Corsi, F.; Ohletz, M.J.

    1999-01-01

    A testing method for the detection of performance degradation induced by high-dose irradiation in high-energy experiments has been developed. The method used is based on a fault signature generation defined on the basis of the state-space analysis for linear circuits. By sampling the response of the circuit under test (CUT) to a single rectangular pulse, a set of parameters α are evaluated which are functions of the circuit singularities and constitute a signature for the CUT. Amplitude perturbations of these parameters engendered by element drift failure indicate a possible faulty condition. The effects of radiation induced faults in the analogue CMOS front-end of a silicon pixel detector employed in high energy physics experiments has been investigated. The results show that, even for the 800 krad dose, the test devised is able to detect the degradation of the amplifier performances. The results show also that hardened devices do not necessarily produce high circuit immunity to radiation and the proposed test method provides a mean to detect these performance deviations and to monitor them during the operating life of the chip. (A.C.)

  7. A Radiation Hardened Housekeeping Slave Node (RH-HKSN) ASIC

    Data.gov (United States)

    National Aeronautics and Space Administration — This projects seeks to continue the development of the Radiation Hardened Housekeeping Slave Node (RH-HKSN) ASIC. The effort has taken parallel paths by implementing...

  8. Radiation hardness of CMOS monolithic active pixel sensors manufactured in a 0.18 μm CMOS process

    Energy Technology Data Exchange (ETDEWEB)

    Linnik, Benjamin [Goethe-Universitaet Frankfurt (Germany); Collaboration: CBM-MVD-Collaboration

    2015-07-01

    CMOS Monolithic Active Pixels Sensors (MAPS) are considered as the technology of choice for various vertex detectors in particle and heavy-ion physics including the STAR HFT, the upgrade of the ALICE ITS, the future ILC detectors and the CBM experiment at FAIR. To match the requirements of those detectors, their hardness to radiation is being improved, among others in a joined research activity of the Goethe University Frankfurt and the IPHC Strasbourg. It was assumed that combining an improved high resistivity (1-8 kΩcm) sensitive medium with the features of a 0.18 μm CMOS process, is suited to reach substantial improvements in terms of radiation hardness as compared to earlier sensor designs. This strategy was tested with a novel generation of sensor prototypes named MIMOSA-32 and MIMOSA-34. We show results on the radiation hardness of those sensors and discuss its impact on the design of future vertex detectors.

  9. Radiation response of high speed CMOS integrated circuits

    International Nuclear Information System (INIS)

    Yue, H.; Davison, D.; Jennings, R.F.; Lothongkam, P.; Rinerson, D.; Wyland, D.

    1987-01-01

    This paper studies the total dose and dose rate radiation response of the FCT family of high speed CMOS integrated circuits. Data taken on the devices is used to establish the dominant failure modes, and this data is further analyzed using one-sided tolerance factors for normal distribution statistical analysis

  10. Technologies Enabling Custom Radiation-Hardened Component Development, Phase I

    Data.gov (United States)

    National Aeronautics and Space Administration — Two primary paths are available for the creation of a Rad-Hard ASIC. The first approach is to use a radiation hardened process such as existing Rad-Hard foundries....

  11. Radiation Hardened Ethernet PHY and Switch Fabric, Phase I

    Data.gov (United States)

    National Aeronautics and Space Administration — Innoflight will develop a new family of radiation hardened (up to 3 Mrad(Si)), fault-tolerant, high data-rate (up to 8 Gbps), low power Gigabit Ethernet PHY and...

  12. Radiation-Hardened Memristor-based Memory for Extreme Environments, Phase I

    Data.gov (United States)

    National Aeronautics and Space Administration — NASA space exploration missions require radiation-hardened memory technologies that can survive and operate over a wide temperature range. Memristors...

  13. Principles and techniques of radiation hardening. Volume 2. Transient radiation effects in electronics (TREE)

    International Nuclear Information System (INIS)

    Rudie, N.J.

    1976-01-01

    The three-volume book is intended to serve as a review of the effects of thermonuclear explosion induced radiation (x-rays, gamma rays, and beta particles) and the resulting electromagnetic pulse (EMP). Volume 2 deals with the following topics: radiation effects on quartz crystals, tantalum capacitors, bipolar semiconductor devices and integrated circuits, field effect transistors, and miscellaneous electronic devices; hardening electronic systems to photon and neutron radiation; nuclear radiation source and/or effects simulation techniques; and radiation dosimetry

  14. Configurable Radiation Hardened High Speed Isolated Interface ASIC, Phase I

    Data.gov (United States)

    National Aeronautics and Space Administration — NVE Corporation will design and build an innovative, low cost, flexible, configurable, radiation hardened, galvanically isolated, interface ASIC chip set that will...

  15. A 0.18 micrometer CMOS Thermopile Readout ASIC Immune to 50 MRAD Total Ionizing Dose (SI) and Single Event Latchup to 174MeV-cm(exp 2)/mg

    Science.gov (United States)

    Quilligan, Gerard T.; Aslam, Shahid; Lakew, Brook; DuMonthier, Jeffery J.; Katz, Richard B.; Kleyner, Igor

    2014-01-01

    Radiation hardened by design (RHBD) techniques allow commercial CMOS circuits to operate in high total ionizing dose and particle fluence environments. Our radiation hard multi-channel digitizer (MCD) ASIC (Figure 1) is a versatile analog system on a chip (SoC) fabricated in 180nm CMOS. It provides 18 chopper stabilized amplifier channels, a 16- bit sigma-delta analog-digital converter (SDADC) and an on-chip controller. The MCD was evaluated at Goddard Space Flight Center and Texas A&M University's radiation effects facilities and found to be immune to single event latchup (SEL) and total ionizing dose (TID) at 174 MeV-cm(exp 2)/mg and 50 Mrad (Si) respectively.

  16. Experimental research on transient ionizing radiation effects of CMOS microcontroller

    International Nuclear Information System (INIS)

    Jin Xiaoming; Fan Ruyu; Chen Wei; Wang Guizhen; Lin Dongsheng; Yang Shanchao; Bai Xiaoyan

    2010-01-01

    This paper presents an experimental test system of CMOS microcontroller EE80C196KC20. Based on this system, the transient ionizing radiation effects on microcontroller were investigated using 'Qiangguang-I' accelerator. The gamma pulse width was 20 ns and the dose rate (for the Si atom) was in the range of 6.7 x 10 6 to 2.0 x 10 8 Gy/s in the experimental study. The disturbance and latchup effects were observed at different dose rate levels. Latchup threshold of the microcontroller was obtained. Disturbance interval and the system power supply current have a relationship with the dose rate level. The transient ionizing radiation induces photocurrent in the PN junctions that are inherent in CMOS circuits. The photocurrent is responsible for the electrical and functional degradation. (authors)

  17. Space Qualified, Radiation Hardened, Dense Monolithic Flash Memory, Phase I

    Data.gov (United States)

    National Aeronautics and Space Administration — Radiation hardened nonvolatile memories for space is still primarily confined to EEPROM. There is high density effective or cost effective NVM solution available to...

  18. Advanced CMOS Radiation Effects Testing and Analysis

    Science.gov (United States)

    Pellish, J. A.; Marshall, P. W.; Rodbell, K. P.; Gordon, M. S.; LaBel, K. A.; Schwank, J. R.; Dodds, N. A.; Castaneda, C. M.; Berg, M. D.; Kim, H. S.; hide

    2014-01-01

    Presentation at the annual NASA Electronic Parts and Packaging (NEPP) Program Electronic Technology Workshop (ETW). The material includes an update of progress in this NEPP task area over the past year, which includes testing, evaluation, and analysis of radiation effects data on the IBM 32 nm silicon-on-insulator (SOI) complementary metal oxide semiconductor (CMOS) process. The testing was conducted using test vehicles supplied by directly by IBM.

  19. Optimized radiation-hardened erbium doped fiber amplifiers for long space missions

    Science.gov (United States)

    Ladaci, A.; Girard, S.; Mescia, L.; Robin, T.; Laurent, A.; Cadier, B.; Boutillier, M.; Ouerdane, Y.; Boukenter, A.

    2017-04-01

    In this work, we developed and exploited simulation tools to optimize the performances of rare earth doped fiber amplifiers (REDFAs) for space missions. To describe these systems, a state-of-the-art model based on the rate equations and the particle swarm optimization technique is developed in which we also consider the main radiation effect on REDFA: the radiation induced attenuation (RIA). After the validation of this tool set by confrontation between theoretical and experimental results, we investigate how the deleterious radiation effects on the amplifier performance can be mitigated following adequate strategies to conceive the REDFA architecture. The tool set was validated by comparing the calculated Erbium-doped fiber amplifier (EDFA) gain degradation under X-rays at ˜300 krad(SiO2) with the corresponding experimental results. Two versions of the same fibers were used in this work, a standard optical fiber and a radiation hardened fiber, obtained by loading the previous fiber with hydrogen gas. Based on these fibers, standard and radiation hardened EDFAs were manufactured and tested in different operating configurations, and the obtained data were compared with simulation data done considering the same EDFA structure and fiber properties. This comparison reveals a good agreement between simulated gain and experimental data (vulnerability in terms of gain. The presented approach is a complementary and effective tool for hardening by device techniques and opens new perspectives for the applications of REDFAs and lasers in harsh environments.

  20. Process for hardening synthetic resins by ionizing radiation

    International Nuclear Information System (INIS)

    Hesse, W.; Ritz, J.

    1975-01-01

    Synthetic resins containing hydroxy groups and polymerizable carbon-carbon bonds are reacted with diketenes to yield aceto ester derivatives, which when reacted with metal compounds to form chelates, and mixed with copolymerizable monomers, are capable of being hardened by unusually low radiation doses to form coatings and articles with superior properties. (E.C.B.)

  1. The capability of pulsed laser radiation for cutting band saws hardening

    Directory of Open Access Journals (Sweden)

    Marinin Evgeny

    2017-01-01

    Full Text Available The article deals with the possibilities of pulsed laser radiation for hardening the band saws. The regimes of pulsed laser hardening the band saws of 1 mm thick made of tool steel 9CrV are grounded theoretically and experimentally tested. Selected and justified modes of treatment harden in the autohardening mode without additional heat removal. The results of the experimental research of microhardness are presented and formed as a result of processing of the microstructure. Selected modes increase the microhardness of the surface to 8500 MPa and form ultra highly dispersed structure in the surface layer characterized by high resistance to abrasion.

  2. Space Qualified, Radiation Hardened, Dense Monolithic Flash Memory, Phase II

    Data.gov (United States)

    National Aeronautics and Space Administration — Space Micro proposes to build a radiation hardened by design (RHBD) flash memory, using a modified version of our RH-eDRAM Memory Controller to solve all the single...

  3. Simulation of pulsed-ionizing-radiation-induced errors in CMOS memory circuits

    International Nuclear Information System (INIS)

    Massengill, L.W.

    1987-01-01

    Effects of transient ionizing radiation on complementary metal-oxide-semiconductor (CMOS) memory circuits was studied by computer simulation. Simulation results have uncovered the dominant mechanism leading to information loss (upset) in dense (CMOS) circuits: rail span collapse. This effect is the catastrophic reduction in the local power supply at a RAM cell location due to the conglomerate radiation-induced photocurrents from all other RAM cells flowing through the power-supply-interconnect distribution. Rail-span collapse leads to reduced RAM cell-noise margins and can predicate upset. Results show that rail-span collapse in the dominant pulsed radiation effect in many memory circuits, preempting local circuit responses to the radiation. Several techniques to model power-supply noise, such as that arising from rail span collapse, are presented in this work. These include an analytical model for design optimization against these effects, a hierarchical computer-analysis technique for efficient power bus noise simulation in arrayed circuits, such as memories, and a complete circuit-simulation tool for noise margin analysis of circuits with arbitrary topologies

  4. Radiation hardening techniques for rare-earth based optical fibers and amplifiers

    International Nuclear Information System (INIS)

    Girard, Sylvain; Marcandella, Claude; Vivona, Marilena; Prudenzano, Luciano Mescia F.; Laurent, Arnaud; Robin, Thierry; Cadier, Benoit; Pinsard, Emmanuel; Ouerdane, Youcef; Boukenter, Aziz; Cannas, Marco; Boscaino, Roberto

    2012-01-01

    Er/Yb doped fibers and amplifiers have been shown to be very radiation sensitive, limiting their integration in space. We present an approach including successive hardening techniques to enhance their radiation tolerance. The efficiency of our approach is demonstrated by comparing the radiation responses of optical amplifiers made with same lengths of different rare-earth doped fibers and exposed to gamma-rays. Previous studies indicated that such amplifiers suffered significant degradation for doses exceeding 10 krad. Applying our techniques significantly enhances the amplifier radiation resistance, resulting in a very limited degradation up to 50 krad. Our optimization techniques concern the fiber composition, some possible pre-treatments and the interest of simulation tools used to harden by design the amplifiers. We showed that adding cerium inside the fiber phospho-silicate-based core strongly decreases the fiber radiation sensitivity compared to the standard fiber. For both fibers, a pre-treatment with hydrogen permits to enhance again the fiber resistance. Furthermore, simulations tools can also be used to improve the tolerance of the fiber amplifier by helping identifying the best amplifier configuration for operation in the radiative environment. (authors)

  5. A novel CMOS SRAM feedback element for SEU environments

    International Nuclear Information System (INIS)

    Verghese, S.; Wortman, J.J.; Kerns, S.E.

    1987-01-01

    A hardened CMOS SRAM has been proposed which utilizes a leaky polysilicon Schottky diode placed in the feedback path to attain the SEU immunity of resistor-coupled SRAMs while improving the access speed of the cell. Novel polysilicon hybrid Schottky-resistor structures which emulate the leaky diodes have been designed and fabricated. The elements' design criteria and methods of fulfilling them are presented along with a practical implementation scheme for CMOS SRAM cells

  6. Radiation Effects and Hardening Techniques for Spacecraft Microelectronics

    Science.gov (United States)

    Gambles, J. W.; Maki, G. K.

    2002-01-01

    The natural radiation from the Van Allen belts, solar flares, and cosmic rays found outside of the protection of the earth's atmosphere can produce deleterious effects on microelectronics used in space systems. Historically civil space agencies and the commercial satellite industry have been able to utilize components produced in special radiation hardened fabrication process foundries that were developed during the 1970s and 1980s under sponsorship of the Departments of Defense (DoD) and Energy (DoE). In the post--cold war world the DoD and DoE push to advance the rad--hard processes has waned. Today the available rad--hard components lag two-plus technology node generations behind state- of-the-art commercial technologies. As a result space craft designers face a large performance gap when trying to utilize available rad--hard components. Compounding the performance gap problems, rad--hard components are becoming increasingly harder to get. Faced with the economic pitfalls associated with low demand versus the ever increasing investment required for integrated circuit manufacturing equipment most sources of rad--hard parts have simply exited this market in recent years, leaving only two domestic US suppliers of digital rad--hard components. This paper summarizes the radiation induced mechanisms that can cause digital microelectronics to fail in space, techniques that can be applied to mitigate these failure mechanisms, and ground based testing used to validate radiation hardness/tolerance. The radiation hardening techniques can be broken down into two classes, Hardness By Process (HBP) and Hardness By Design (HBD). Fortunately many HBD techniques can be applied to commercial fabrication processes providing space craft designer with radiation tolerant Application Specific Integrated Circuits (ASICs) that can bridge the performance gap between the special HBP foundries and the commercial state-of-the-art performance.

  7. Radiation hardening of MOS devices by boron

    International Nuclear Information System (INIS)

    Danchenko, V.

    1975-01-01

    A novel technique is disclosed for radiation hardening of MOS devices and specifically for stabilizing the gate threshold potential at room temperature of a radiation subjected MOS field-effect device of the type having a semiconductor substrate, an insulating layer of oxide on the substrate, and a gate electrode disposed on the insulating layer. In the preferred embodiment, the novel inventive technique contemplates the introduction of boron into the insulating oxide, the boron being introduced within a layer of the oxide of about 100A to 300A thickness immediately adjacent the semiconductor-insulator interface. The concentration of boron in the oxide layer is preferably maintained on the order of 10 atoms/ cm 3 . The novel technique serves to reduce and substantially annihilate radiation induced positive gate charge accumulations, which accumulations, if not eliminated, would cause shifting of the gate threshold potential of a radiation subjected MOS device, and thus render the device unstable and/or inoperative. (auth)

  8. A research on radiation calibration of high dynamic range based on the dual channel CMOS

    Science.gov (United States)

    Ma, Kai; Shi, Zhan; Pan, Xiaodong; Wang, Yongsheng; Wang, Jianghua

    2017-10-01

    The dual channel complementary metal-oxide semiconductor (CMOS) can get high dynamic range (HDR) image through extending the gray level of the image by using image fusion with high gain channel image and low gain channel image in a same frame. In the process of image fusion with dual channel, it adopts the coefficients of radiation response of a pixel from dual channel in a same frame, and then calculates the gray level of the pixel in the HDR image. For the coefficients of radiation response play a crucial role in image fusion, it has to find an effective method to acquire these parameters. In this article, it makes a research on radiation calibration of high dynamic range based on the dual channel CMOS, and designs an experiment to calibrate the coefficients of radiation response for the sensor it used. In the end, it applies these response parameters in the dual channel CMOS which calibrates, and verifies the correctness and feasibility of the method mentioned in this paper.

  9. Sequential circuit design for radiation hardened multiple voltage integrated circuits

    Science.gov (United States)

    Clark, Lawrence T [Phoenix, AZ; McIver, III, John K.

    2009-11-24

    The present invention includes a radiation hardened sequential circuit, such as a bistable circuit, flip-flop or other suitable design that presents substantial immunity to ionizing radiation while simultaneously maintaining a low operating voltage. In one embodiment, the circuit includes a plurality of logic elements that operate on relatively low voltage, and a master and slave latches each having storage elements that operate on a relatively high voltage.

  10. Microhardness technique for determination of radiation hardening in austenitic stainless steel using

    International Nuclear Information System (INIS)

    Hofman, A.

    1995-01-01

    The use of microhardness technique to determine the radiation hardening has been studied. Microhardness measurements have been conducted on austenitic stainless steel 0H18N10T irradiated up to 2·10 23 nm -2 . It was determined that the increase in microhardness varies directly with the measured increase in the 0,2% offret yield strength and has been found that microhardness technique may be an effective tool to measurements of radiation induced hardening. Based on the results and Cahoon's relation that σ 0,2 (MPa)=3,27HV(0,1) n method for evaluating the yield stress σ 0,2 by microhardness technique is analyzed. 14 refs., 3 figs., 3 tabs

  11. Characterization of Radiation Hardened Bipolar Linear Devices for High Total Dose Missions

    Science.gov (United States)

    McClure, Steven S.; Harris, Richard D.; Rax, Bernard G.; Thorbourn, Dennis O.

    2012-01-01

    Radiation hardened linear devices are characterized for performance in combined total dose and displacement damage environments for a mission scenario with a high radiation level. Performance at low and high dose rate for both biased and unbiased conditions is compared and the impact to hardness assurance methodology is discussed.

  12. Radiation hardness of two CMOS prototypes for the ATLAS HL-LHC upgrade project

    CERN Document Server

    Huffman, B T; Arndt, K; Bates, R; Benoit, M; Di Bello, F; Blue, A; Bortoletto, D; Buckland, M; Buttar, C; Caragiulo, P; Das, D; Dopke, J; Dragone, A; Ehrler, F; Fadeyev, V; Galloway, Z; Grabas, H; Gregor, I M; Grenier, P; Grillo, A; Hoeferkamp, M; Hommels, L B A; John, J; Kanisauskas, K; Kenney, C; Kramberger, J; Liang, Z; Mandic, I; Maneuski, D; Martinez-McKinney, F; McMahon, S; Meng, L; Mikuž, M; Muenstermann, D; Nickerson, R; Peric, I; Phillips, P; Plackett, R; Rubbo, F; Segal, J; Seidel, S; Seiden, A; Shipsey, I; Song, W; Stanitzki, M; Su, D; Tamma, C; Turchetta, R; Vigani, L; olk, J; Wang, R; Warren, M; Wilson, F; Worm, S; Xiu, Q; Zhang, J; Zhu, H

    2016-01-01

    The LHC luminosity upgrade, known as the High Luminosity LHC (HL-LHC), will require the replacement of the existing silicon strip tracker and the transistion radiation tracker. Although a baseline design for this tracker exists the ATLAS collaboration and other non-ATLAS groups are exploring the feasibility of using CMOS Monolithic Active Pixel Sensors (MAPS) which would be arranged in a strip-like fashion and would take advantage of the service and support structure already being developed for the upgrade. Two test devices made with theAMSH35 process (a High voltage or HV CMOS process) have been subjected to various radiation environments and have performed well. The results of these tests are presented in this paper.

  13. Radiation-hard Active Pixel Sensors for HL-LHC Detector Upgrades based on HV-CMOS Technology

    International Nuclear Information System (INIS)

    Miucci, A; Gonzalez-Sevilla, S; Ferrere, D; Iacobucci, G; Rosa, A La; Muenstermann, D; Gonella, L; Hemperek, T; Hügging, F; Krüger, H; Obermann, T; Wermes, N; Garcia-Sciveres, M; Backhaus, M; Capeans, M; Feigl, S; Nessi, M; Pernegger, H; Ristic, B; George, M

    2014-01-01

    Luminosity upgrades are discussed for the LHC (HL-LHC) which would make updates to the detectors necessary, requiring in particular new, even more radiation-hard and granular, sensors for the inner detector region. A proposal for the next generation of inner detectors is based on HV-CMOS: a new family of silicon sensors based on commercial high-voltage CMOS technology, which enables the fabrication of part of the pixel electronics inside the silicon substrate itself. The main advantages of this technology with respect to the standard silicon sensor technology are: low material budget, fast charge collection time, high radiation tolerance, low cost and operation at room temperature. A traditional readout chip is still needed to receive and organize the data from the active sensor and to handle high-level functionality such as trigger management. HV-CMOS has been designed to be compatible with both pixel and strip readout. In this paper an overview of HV2FEI4, a HV-CMOS prototype in 180 nm AMS technology, will be given. Preliminary results after neutron and X-ray irradiation are shown

  14. Characterization and radiation studies of diode test structures in LFoundry CMOS technology

    Energy Technology Data Exchange (ETDEWEB)

    Daas, Michael; Gonella, Laura; Hemperek, Tomasz; Huegging, Fabian; Krueger, Hans; Pohl, David-Leon; Wermes, Norbert [Physikalisches Institut der Universitaet Bonn (Germany); Macchiolo, Anna [Max-Planck-Institut fuer Physik, Muenchen (Germany)

    2016-07-01

    In order to prepare for the High Luminosity upgrade of the LHC, all subdetector systems of the ATLAS experiment will be upgraded. In preparation for this process, different possibilities for new radiation-hard and cost-efficient silicon sensor technologies to be used as part of hybrid pixel detectors in the ATLAS inner tracker are being investigated. One promising way to optimize the cost-efficiency of silicon-based pixel detectors is to use commercially available CMOS technologies such as the 150 nm process by LFoundry. In this talk, several CMOS pixel test structures, such as simple diodes and small pixel arrays, that were manufactured in this technology are characterized regarding general performance and radiation hardness and compared to each other as well as to the current ATLAS pixel detector.

  15. Nuclear Radiation Degradation Study on HD Camera Based on CMOS Image Sensor at Different Dose Rates.

    Science.gov (United States)

    Wang, Congzheng; Hu, Song; Gao, Chunming; Feng, Chang

    2018-02-08

    In this work, we irradiated a high-definition (HD) industrial camera based on a commercial-off-the-shelf (COTS) CMOS image sensor (CIS) with Cobalt-60 gamma-rays. All components of the camera under test were fabricated without radiation hardening, except for the lens. The irradiation experiments of the HD camera under biased conditions were carried out at 1.0, 10.0, 20.0, 50.0 and 100.0 Gy/h. During the experiment, we found that the tested camera showed a remarkable degradation after irradiation and differed in the dose rates. With the increase of dose rate, the same target images become brighter. Under the same dose rate, the radiation effect in bright area is lower than that in dark area. Under different dose rates, the higher the dose rate is, the worse the radiation effect will be in both bright and dark areas. And the standard deviations of bright and dark areas become greater. Furthermore, through the progressive degradation analysis of the captured image, experimental results demonstrate that the attenuation of signal to noise ratio (SNR) versus radiation time is not obvious at the same dose rate, and the degradation is more and more serious with increasing dose rate. Additionally, the decrease rate of SNR at 20.0, 50.0 and 100.0 Gy/h is far greater than that at 1.0 and 10.0 Gy/h. Even so, we confirm that the HD industrial camera is still working at 10.0 Gy/h during the 8 h of measurements, with a moderate decrease of the SNR (5 dB). The work is valuable and can provide suggestion for camera users in the radiation field.

  16. A COTS-based single board radiation-hardened computer for space applications

    International Nuclear Information System (INIS)

    Stewart, S.; Hillman, R.; Layton, P.; Krawzsenek, D.

    1999-01-01

    There is great community interest in the ability to use COTS (Commercial-Off-The-Shelf) technology in radiation environments. Space Electronics, Inc. has developed a high performance COTS-based radiation hardened computer. COTS approaches were selected for both hardware and software. Through parts testing, selection and packaging, all requirements have been met without parts or process development. Reliability, total ionizing dose and single event performance are attractive. The characteristics, performance and radiation resistance of the single board computer will be presented. (authors)

  17. Simulation of Hamming Coding and Decoding for Microcontroller Radiation Hardening

    OpenAIRE

    Rehab I. Abdul Rahman; Mazhar B. Tayel

    2015-01-01

    This paper presents a method of hardening the 8051 micro-controller, able to assure reliable operation in the presence of bit flips caused by radiation. Aiming at avoiding such faults in the 8051 micro-controller, Hamming code protection was used in its SRAM memory and registers. A VHDL code has been used for this hamming code protection.

  18. Nuclear Radiation Degradation Study on HD Camera Based on CMOS Image Sensor at Different Dose Rates

    Directory of Open Access Journals (Sweden)

    Congzheng Wang

    2018-02-01

    Full Text Available In this work, we irradiated a high-definition (HD industrial camera based on a commercial-off-the-shelf (COTS CMOS image sensor (CIS with Cobalt-60 gamma-rays. All components of the camera under test were fabricated without radiation hardening, except for the lens. The irradiation experiments of the HD camera under biased conditions were carried out at 1.0, 10.0, 20.0, 50.0 and 100.0 Gy/h. During the experiment, we found that the tested camera showed a remarkable degradation after irradiation and differed in the dose rates. With the increase of dose rate, the same target images become brighter. Under the same dose rate, the radiation effect in bright area is lower than that in dark area. Under different dose rates, the higher the dose rate is, the worse the radiation effect will be in both bright and dark areas. And the standard deviations of bright and dark areas become greater. Furthermore, through the progressive degradation analysis of the captured image, experimental results demonstrate that the attenuation of signal to noise ratio (SNR versus radiation time is not obvious at the same dose rate, and the degradation is more and more serious with increasing dose rate. Additionally, the decrease rate of SNR at 20.0, 50.0 and 100.0 Gy/h is far greater than that at 1.0 and 10.0 Gy/h. Even so, we confirm that the HD industrial camera is still working at 10.0 Gy/h during the 8 h of measurements, with a moderate decrease of the SNR (5 dB. The work is valuable and can provide suggestion for camera users in the radiation field.

  19. Radiation damage studies on STAR250 CMOS sensor at 300 keV for electron microscopy

    International Nuclear Information System (INIS)

    Faruqi, A.R.; Henderson, R.; Holmes, J.

    2006-01-01

    There is a pressing need for better electronic detectors to replace film for recording high-resolution images using electron cryomicroscopy. Our previous work has shown that direct electron detection in CMOS sensors is promising in terms of resolution and efficiency at 120 keV [A.R. Faruqi, R. Henderson, M. Prydderch, R. Turchetta, P. Allport, A. Evans, Nucl. Instr. and Meth. 546 (2005) 170], but in addition, the detectors must not be damaged by the electron irradiation. We now present new measurements on the radiation tolerance of a 25 μm pitch CMOS active-pixel sensor, the STAR250, which was designed by FillFactory using radiation-hard technology for space applications. Our tests on the STAR250 aimed to establish the imaging performance at 300 keV following irradiation. The residual contrast, measured on shadow images of a 300 mesh grid, was >80% after corrections for increased dark current, following irradiation with up to 5x10 7 electrons/pixel (equivalent to 80,000 electron/μm 2 ). A CMOS sensor with this degree of radiation tolerance would survive a year of normal usage for low-dose electron cryomicroscopy, which is a very useful advance

  20. High temperature, radiation hardened electronics for application to nuclear power plants

    International Nuclear Information System (INIS)

    Gover, J.E.

    1980-01-01

    Electronic circuits were developed and built at Sandia for many aerospace and energy systems applications. Among recent developments were high temperature electronics for geothermal well logging and radiation hardened electronics for a variety of aerospace applications. Sandia has also been active in technology transfer to commercial industry in both of these areas

  1. Evaluation method of radiation stability of hardened cement paste with chemical additives

    Energy Technology Data Exchange (ETDEWEB)

    Medvedev, Vyacheslav; Pustovgar, Andrey [National Research Univ. ' Moscow State Univ. of Civil Engineering' (MSUCE), Moscow (Russian Federation); National Research Univ. ' Moscow State Univ. of Civil Engineering' (MSUCE), Moscow (Russian Federation). Scientific Research Inst. of Constructional Materials and Technologies; Denisov, Alexander; Soloviev, Vitaly [National Research Univ. ' Moscow State Univ. of Civil Engineering' (MSUCE), Moscow (Russian Federation)

    2013-07-01

    The influence of additives on the radiation resistance of the concrete will occur through the influence of radiation changes of hardened cement paste on radiation changes of concrete and can be quite significant. The test sequence was produced according to the modified method. The samples were prepared in the form of prisms with the following dimensions: 10 mm x 10 mm, 30 mm long. Measurement series were produced after each heating and cooling sequence. Then the difference between the values before and after heating was calculated. (orig.)

  2. Radiation-hardened MRAM-based LUT for non-volatile FPGA soft error mitigation with multi-node upset tolerance

    Science.gov (United States)

    Zand, Ramtin; DeMara, Ronald F.

    2017-12-01

    In this paper, we have developed a radiation-hardened non-volatile lookup table (LUT) circuit utilizing spin Hall effect (SHE)-magnetic random access memory (MRAM) devices. The design is motivated by modeling the effect of radiation particles striking hybrid complementary metal oxide semiconductor/spin based circuits, and the resistive behavior of SHE-MRAM devices via established and precise physics equations. The models developed are leveraged in the SPICE circuit simulator to verify the functionality of the proposed design. The proposed hardening technique is based on using feedback transistors, as well as increasing the radiation capacity of the sensitive nodes. Simulation results show that our proposed LUT circuit can achieve multiple node upset (MNU) tolerance with more than 38% and 60% power-delay product improvement as well as 26% and 50% reduction in device count compared to the previous energy-efficient radiation-hardened LUT designs. Finally, we have performed a process variation analysis showing that the MNU immunity of our proposed circuit is realized at the cost of increased susceptibility to transistor and MRAM variations compared to an unprotected LUT design.

  3. A 0.18μm CMOS low-power radiation sensor for UWB wireless transmission

    International Nuclear Information System (INIS)

    Crepaldi, M; Demarchi, D; Gabrielli, A; Khan, A; Pikhay, E; Roizin, Y; Villani, G; Zhang, Z

    2012-01-01

    The paper describes the design of a floating gate MOS sensor embedded in a readout CMOS element, used as a radiation monitor. A maximum sensitivity of 1 mV/rad is estimated within an absorbed dose range from 1 to 10 krad. The paper shows in particular the design of a microelectronic circuit that includes the floating gate sensor, an oscillator, a modulator, a transmitter and an integrated antenna. A prototype of the circuit has recently been simulated, fabricated and tested exploiting a commercial 180 nm, 4 metal CMOS technology. Some simulation results are presented along with a measurement of the readout circuit response to an input voltage swing. Given the small estimated area of the complete chip prototype, that is less than 1 mm 2 , the chip fits a large variety of applications, from spot radiation monitoring systems in medicine to punctual measurements or radiation level in High-Energy Physics experiments.

  4. Radiation Tolerant Design with 0.18-micron CMOS Technology

    CERN Document Server

    Chen, Li; Durdle , Nelson G.

    This thesis discusse s th e issues r elated to the us e of enclosed-gate layou t trans isto rs and guard rings in a 0.18 μ m CMOS technology in order to im prove the radiation tolerance of ASICs. The thin gate oxides of subm icron technologies ar e inherently m ore radiation tole rant tha n the thick er oxides present in less advanced technologies. Using a commercial deep subm icron technology to bu ild up radiation-ha rdened circuits introduces several advantages com pared to a dedicated radiation-ha rd technology, such as speed, power, area, stability, and expense. Som e novel aspects related to the use of encl osed-gate layout transist ors are presented in this th esis. A m odel to calculate the aspect ratio is introduced and verified. Some im portant electrica l par ameters of the tran sistors such as threshold voltage, leakage current, subthreshold slope, and transconducta nce are studied before and afte...

  5. Open Source Radiation Hardened by Design Technology

    Science.gov (United States)

    Shuler, Robert

    2016-01-01

    The proposed technology allows use of the latest microcircuit technology with lowest power and fastest speed, with minimal delay and engineering costs, through new Radiation Hardened by Design (RHBD) techniques that do not require extensive process characterization, technique evaluation and re-design at each Moore's Law generation. The separation of critical node groups is explicitly parameterized so it can be increased as microcircuit technologies shrink. The technology will be open access to radiation tolerant circuit vendors. INNOVATION: This technology would enhance computation intensive applications such as autonomy, robotics, advanced sensor and tracking processes, as well as low power applications such as wireless sensor networks. OUTCOME / RESULTS: 1) Simulation analysis indicates feasibility. 2)Compact voting latch 65 nanometer test chip designed and submitted for fabrication -7/2016. INFUSION FOR SPACE / EARTH: This technology may be used in any digital integrated circuit in which a high level of resistance to Single Event Upsets is desired, and has the greatest benefit outside low earth orbit where cosmic rays are numerous.

  6. Radiation hardenable impregnating agents for the consolidating conservation of wooden objects

    International Nuclear Information System (INIS)

    Schaudy, R.

    1985-01-01

    Radiation hardenable impregnating agents offer some advantages over the conventional agents. At the author's institution objects up to 110 cm length can be impregnated for conservation. More than 200 monomers and resins have been investigated. The procedure of impregnation is outlined and some kinds of wooden objects conserved in this way listed. (G.W.)

  7. Influence of oxygen impurity atoms on defect clusters and radiation hardening in neutron-irradiated vanadium

    International Nuclear Information System (INIS)

    Bajaj, R.; Wechsler, M.S.

    1975-01-01

    Single crystal TEM samples and polycrystalline tensile samples of vanadium containing 60-640 wt ppm oxygen were irradiated at about 100 0 C to about 1.3 x 10 19 neutrons/cm 2 (E greater than 1 MeV) and post-irradiation annealed up to 800 0 C. The defect cluster density increased and the average size decreased with increasing oxygen concentration. Higher oxygen concentrations caused the radiation hardening and radiation-anneal hardening to increase. The observations are consistent with the nucleation of defect clusters by small oxygen or oxygen-point defect complexes and the trapping of oxygen at defect clusters upon post-irradiation annealing

  8. Development of radiation hardened pixel sensors for charged particle detection

    CERN Document Server

    Koziel, Michal

    2014-01-01

    CMOS Pixel Sensors are being developed since a few years to equip vertex detectors for future high-energy physics experiments with the crucial advantages of a low material budget and low production costs. The features simultaneously required are a short readout time, high granularity and high tolerance to radiation. This thesis mainly focuses on the radiation tolerance studies. To achieve the targeted readout time (tens of microseconds), the sensor pixel readout was organized in parallel columns restricting in addition the readout to pixels that had collected the signal charge. The pixels became then more complex, and consequently more sensitive to radiation. Different in-pixel architectures were studied and it was concluded that the tolerance to ionizing radiation was limited to 300 krad with the 0.35- m fabrication process currently used, while the targeted value was several Mrad. Improving this situation calls for implementation of the sensors in processes with a smaller feature size which naturally imp...

  9. Integration of Radiation-Hard Magnetic Random Access Memory with CMOS ICs

    CERN Document Server

    Cerjan, C J

    2000-01-01

    The research undertaken in this LDRD-funded project addressed the joint development of magnetic material-based nonvolatile, radiation-hard memory cells with Sandia National Laboratory. Specifically, the goal of this project was to demonstrate the intrinsic radiation-hardness of Giant Magneto-Resistive (GMR) materials by depositing representative alloy combinations upon radiation-hardened silicon-based integrated circuits. All of the stated goals of the project were achieved successfully. The necessary films were successfully deposited upon typical integrated circuits; the materials retained their magnetic field response at the highest radiation doses; and a patterning approach was developed that did not degrade the as-fabricated properties of the underlying circuitry. These results establish the feasibility of building radiation-hard magnetic memory cells.

  10. Large area CMOS image sensors

    International Nuclear Information System (INIS)

    Turchetta, R; Guerrini, N; Sedgwick, I

    2011-01-01

    CMOS image sensors, also known as CMOS Active Pixel Sensors (APS) or Monolithic Active Pixel Sensors (MAPS), are today the dominant imaging devices. They are omnipresent in our daily life, as image sensors in cellular phones, web cams, digital cameras, ... In these applications, the pixels can be very small, in the micron range, and the sensors themselves tend to be limited in size. However, many scientific applications, like particle or X-ray detection, require large format, often with large pixels, as well as other specific performance, like low noise, radiation hardness or very fast readout. The sensors are also required to be sensitive to a broad spectrum of radiation: photons from the silicon cut-off in the IR down to UV and X- and gamma-rays through the visible spectrum as well as charged particles. This requirement calls for modifications to the substrate to be introduced to provide optimized sensitivity. This paper will review existing CMOS image sensors, whose size can be as large as a single CMOS wafer, and analyse the technical requirements and specific challenges of large format CMOS image sensors.

  11. Passive radiation detection using optically active CMOS sensors

    Science.gov (United States)

    Dosiek, Luke; Schalk, Patrick D.

    2013-05-01

    Recently, there have been a number of small-scale and hobbyist successes in employing commodity CMOS-based camera sensors for radiation detection. For example, several smartphone applications initially developed for use in areas near the Fukushima nuclear disaster are capable of detecting radiation using a cell phone camera, provided opaque tape is placed over the lens. In all current useful implementations, it is required that the sensor not be exposed to visible light. We seek to build a system that does not have this restriction. While building such a system would require sophisticated signal processing, it would nevertheless provide great benefits. In addition to fulfilling their primary function of image capture, cameras would also be able to detect unknown radiation sources even when the danger is considered to be low or non-existent. By experimentally profiling the image artifacts generated by gamma ray and β particle impacts, algorithms are developed to identify the unique features of radiation exposure, while discarding optical interaction and thermal noise effects. Preliminary results focus on achieving this goal in a laboratory setting, without regard to integration time or computational complexity. However, future work will seek to address these additional issues.

  12. Principles and techniques of radiation hardening. Volume 3. Electromagnetic pulse (EMP) and system generated EMP

    International Nuclear Information System (INIS)

    Rudie, N.J.

    1976-01-01

    The three-volume book is intended to serve as a review of the effects of thermonuclear explosion induced radiation (x-rays, gamma rays, and beta particles) and the resulting electromagnetic pulse (EMP). Volume 3 deals with the following topics: selected fundamentals of electromagnetic theory; EMP induced currents on antennas and cables; the EMP response of electronics; EMP hardening; EMP testing; injection currents; internal electromagnetic pulse (IEMP); replacement currents; and system generated electromagnetic pulse (SGEMP) hardening

  13. Study on radiation damage of electron and γ-rays and mechanism of nuclear hardening

    International Nuclear Information System (INIS)

    Jing Tao

    2001-01-01

    Radiation damage effects of electrons and γ-rays are presented. The damage defects are studied by experimental methods. On the basis of these studies the damage mechanism and nuclear hardening techniques are studied

  14. Development of a radiation hardened ANDROS robot for environmental restoration and waste management operations

    International Nuclear Information System (INIS)

    Tulenko, J.S.; Youk, G.; Ekdahl, D.; Liu, H.; Zhou, H.; Phillips, K.; Sias, F.; Jones, S.; Cable, T.; Harvey, H.

    1995-01-01

    A radiation hardened and tolerant version of the ANDROS V-A and VI-A system has been developed by a team composed of engineers and scientists from REMOTEC, Inc. and the University of Florida. The final upgrade of the major control components to a hardness level greater than one megarad is detailed. Over twelve hundred parts were reviewed. The project has completed its Phase 1 and Phase 2 SBIR redesign with the upgrade of all control components. The facilities at the University of Florida which include a linear accelerator and multiple cobalt irradiators have provided the capability to perform the extensive testing required. The commercial production of this radiation hardened ANDROS makes available a mobile platform that can serve as a main work and inspection system for hazardous tasks facing the world nuclear industry

  15. Radiation hardening and irradiation testing of in-cell electronics for MA23/APM

    International Nuclear Information System (INIS)

    Friant, A.

    1988-09-01

    We relate briefly the radiation hardening method used to guarantee a gamma resistance of 10 Mrad for the whole electronic equipment associated with the slave arm of MA23 M servomanipulator which will be set up in cell 404 in Marcoule (APM). We describe the radiation testing of electronic devices and of the various subsystems designed by the D. LETI groups involved in the MA23/APM project

  16. Radiation Effects and Component Hardening testing program at the Oak Ridge National Laboratory

    International Nuclear Information System (INIS)

    Draper, J.V.; Weil, B.S.; Chesser, J.B.

    1993-01-01

    This paper describes Phase II of the Radiation Effects and Component Hardening (REACH) testing program, performed as part of the joint collaborative agreement between the United States Department of Energy (USDOE) and the Power Reactor and Nuclear Fuel Development Corporation (PNC) of Japan, Components and materials were submitted to 10 5 R/hr gamma radiation fields for 10,000 hr, producing accumulated doses of 10 9 R; most performed as expected

  17. Radiation-hardened optically reconfigurable gate array exploiting holographic memory characteristics

    Science.gov (United States)

    Seto, Daisaku; Watanabe, Minoru

    2015-09-01

    In this paper, we present a proposal for a radiation-hardened optically reconfigurable gate array (ORGA). The ORGA is a type of field programmable gate array (FPGA). The ORGA configuration can be executed by the exploitation of holographic memory characteristics even if 20% of the configuration data are damaged. Moreover, the optoelectronic technology enables the high-speed reconfiguration of the programmable gate array. Such a high-speed reconfiguration can increase the radiation tolerance of its programmable gate array to 9.3 × 104 times higher than that of current FPGAs. Through experimentation, this study clarified the configuration dependability using the impulse-noise emulation and high-speed configuration capabilities of the ORGA with corrupt configuration contexts. Moreover, the radiation tolerance of the programmable gate array was confirmed theoretically through probabilistic calculation.

  18. The development of radiation hardened robot for nuclear facility

    International Nuclear Information System (INIS)

    Kim, Seung Ho; Jung, Seung Ho; Kim, Byung Soo and others

    2000-04-01

    The work conducted in this stage covers development of core technology of tele-robot system including monitoring technique in high-level radioactive area, tele-sensing technology and radiation-hardened technology for the non-destructive tele-inspection system which monitors the primary coolant system during the normal operations of PHWR(Pressurized Heavy Water Reactor) NPPs and measures the decrease of bending part of feeder pipe during overall. Based on the developed core technology, the monitoring mobile robot system of the primary coolant system and the feeder pipe inspecting robot system are developed

  19. The development of radiation hardened robot for nuclear facility

    Energy Technology Data Exchange (ETDEWEB)

    Kim, Seung Ho; Jung, Seung Ho; Kim, Byung Soo and others

    2000-04-01

    The work conducted in this stage covers development of core technology of tele-robot system including monitoring technique in high-level radioactive area, tele-sensing technology and radiation-hardened technology for the non-destructive tele-inspection system which monitors the primary coolant system during the normal operations of PHWR(Pressurized Heavy Water Reactor) NPPs and measures the decrease of bending part of feeder pipe during overall. Based on the developed core technology, the monitoring mobile robot system of the primary coolant system and the feeder pipe inspecting robot system are developed.

  20. A comparison of ionizing radiation damage in CMOS devices from 60Co gamma rays, electrons and protons

    International Nuclear Information System (INIS)

    He Baoping; Yao Zhibin; Zhang Fengqi

    2009-01-01

    Radiation hardened CC4007RH and non-radiation hardened CC4011 devices were irradiated using 60 Co gamma rays, 1 MeV electrons and 1-9 MeV protons to compare the ionizing radiation damage of the gamma rays with the charged particles. For all devices examined, with experimental uncertainty, the radiation induced threshold voltage shifts (ΔV th ) generated by 60 Co gamma rays are equal to that of 1 MeV electron and 1-7 MeV proton radiation under 0 gate bias condition. Under 5 V gate bias condition, the distinction of threshold voltage shifts (ΔV th ) generated by 60 Co gamma rays and 1 MeV electrons irradiation are not large, and the radiation damage for protons below 9 MeV is always less than that of 60 Co gamma rays. The lower energy the proton has, the less serious the radiation damage becomes. (authors)

  1. A radiation-hardened SOI-based FPGA

    International Nuclear Information System (INIS)

    Han Xiaowei; Wu Lihua; Zhao Yan; Li Yan; Zhang Qianli; Chen Liang; Zhang Guoquan; Li Jianzhong; Yang Bo; Gao Jiantou; Wang Jian; Li Ming; Liu Guizhai; Zhang Feng; Guo Xufeng; Chen, Stanley L.; Liu Zhongli; Yu Fang; Zhao Kai

    2011-01-01

    A radiation-hardened SRAM-based field programmable gate array VS1000 is designed and fabricated with a 0.5 μm partial-depletion silicon-on-insulator logic process at the CETC 58th Institute. The new logic cell (LC), with a multi-mode based on 3-input look-up-table (LUT), increases logic density about 12% compared to a traditional 4-input LUT The logic block (LB), consisting of 2 LCs, can be used in two functional modes: LUT mode and distributed read access memory mode. The hierarchical routing channel block and switch block can significantly improve the flexibility and routability of the routing resource. The VS1000 uses a CQFP208 package and contains 392 reconfigurable LCs, 112 reconfigurable user I/Os and IEEE 1149.1 compatible with boundary-scan logic for testing and programming. The function test results indicate that the hardware and software cooperate successfully and the VS1000 works correctly. Moreover, the radiation test results indicate that the VS1000 chip has total dose tolerance of 100 krad(Si), a dose rate survivability of 1.5 x 10 11 rad(Si)/s and a neutron fluence immunity of 1 x 10 14 n/cm 2 . (semiconductor integrated circuits)

  2. Radiation-Hard Complementary Integrated Circuits Based on Semiconducting Single-Walled Carbon Nanotubes.

    Science.gov (United States)

    McMorrow, Julian J; Cress, Cory D; Gaviria Rojas, William A; Geier, Michael L; Marks, Tobin J; Hersam, Mark C

    2017-03-28

    Increasingly complex demonstrations of integrated circuit elements based on semiconducting single-walled carbon nanotubes (SWCNTs) mark the maturation of this technology for use in next-generation electronics. In particular, organic materials have recently been leveraged as dopant and encapsulation layers to enable stable SWCNT-based rail-to-rail, low-power complementary metal-oxide-semiconductor (CMOS) logic circuits. To explore the limits of this technology in extreme environments, here we study total ionizing dose (TID) effects in enhancement-mode SWCNT-CMOS inverters that employ organic doping and encapsulation layers. Details of the evolution of the device transport properties are revealed by in situ and in operando measurements, identifying n-type transistors as the more TID-sensitive component of the CMOS system with over an order of magnitude larger degradation of the static power dissipation. To further improve device stability, radiation-hardening approaches are explored, resulting in the observation that SWNCT-CMOS circuits are TID-hard under dynamic bias operation. Overall, this work reveals conditions under which SWCNTs can be employed for radiation-hard integrated circuits, thus presenting significant potential for next-generation satellite and space applications.

  3. Radiation-Hardened Circuitry Using Mask-Programmable Analog Arrays. Final Report

    Energy Technology Data Exchange (ETDEWEB)

    Britton, Jr., Charles L. [Oak Ridge National Lab. (ORNL), Oak Ridge, TN (United States); Ericson, Milton Nance [Oak Ridge National Lab. (ORNL), Oak Ridge, TN (United States); Bobrek, Miljko [Oak Ridge National Lab. (ORNL), Oak Ridge, TN (United States); Blalock, Benjamin [Univ. of Tennessee, Knoxville, TN (United States)

    2015-12-01

    As the recent accident at Fukushima Daiichi so vividly demonstrated, telerobotic technologies capable of withstanding high radiation environments need to be readily available to enable operations, repair, and recovery under severe accident scenarios where human entry is extremely dangerous or not possible. Telerobotic technologies that enable remote operation in high dose rate environments have undergone revolutionary improvement over the past few decades. However, much of this technology cannot be employed in nuclear power environments due the radiation sensitivity of the electronics and the organic insulator materials currently in use. This is the final report of the activities involving the NEET 2 project Radiation Hardened Circuitry Using Mask-Programmable Analog Arrays. We present a detailed functional block diagram of the proposed data acquisition system, the thought process leading to technical decisions, the implemented system, and the tested results from the systems. This system will be capable of monitoring at least three parameters of importance to nuclear reactor monitoring: temperature, radiation level, and pressure.

  4. Study of interaction among silicon, lithium, oxygen and radiation-induced defects for radiation-hardened solar cells

    Science.gov (United States)

    Berman, P. A.

    1973-01-01

    In order to improve reliability and the useful lifetime of solar cell arrays for space use, a program was undertaken to develop radiation-hardened lithium-doped silicon solar cells. These cells were shown to be significantly more resistant to degradation by ionized particles than the presently used n-p nonlithium-doped silicon solar cells. The results of various analyses performed to develop a more complete understanding of the physics of the interaction among lithium, silicon, oxygen, and radiation-induced defects are presented. A discussion is given of those portions of the previous model of radiation damage annealing which were found to be in error and those portions which were upheld by these extensive investigations.

  5. A radiation-hardened 1K-bit dielectrically isolated random access memory

    International Nuclear Information System (INIS)

    Sandors, T.J.; Boarman, J.W.; Kasten, A.J.; Wood, G.M.

    1982-01-01

    Dielectric Isolation has been used for many years as the bipolar technology for latch-up free, radiation hardened integrated circuits in strategic systems. The state-of-the-art up to this point has been the manufacture of MSI functions containing a maximum of several hundred isolated components. This paper discusses a 1024 Bit Random Access Memory chip containing over 4000 dielectrically isolated components which has been designed for strategic radiation environments. The process utilized and the circuit design of the 1024 Bit RAM have been previously discussed. The techniques used are similar to those employed for the MX digital integrated circuits except for specific items required to make this a true LSI technology. These techniques, along with electrical and radiation data for the RAM, are presented

  6. Process for hardening an alkyd resin composition using ionizing radiation. [electron beams, gamma radiation

    Energy Technology Data Exchange (ETDEWEB)

    Watanabe, T; Murata, K; Maruyama, T

    1969-11-27

    In an alkyd resin composition having free hydroxide radicals and containing a conjugated unsaturated fatty acid and/or oil as a component thereof, a process for hardening an alkyd resin composition comprises the steps of dissolving into a vinyl monomer, the product obtained by the semi-esterification reaction of said hydroxide radicals with acid anhydrides having polymerizable radicals and hardening by ionizing radiation to provide a coating with a high degree of cross-linking, with favorable properties such as toughness, hardness, chemical resistance and resistance to weather and with the feasibility of being applied as the ground and finish coat on metals, wood, paper, outdoor construction or the like. Any kind of ionization radiation, particularly accelerated electron beams, ..gamma.. radiation can be used at 50/sup 0/C to -5/sup 0/C for a few seconds or minutes, permitting continuous operation. In one example, 384 parts of phthalic anhydride, 115 parts of pentaerythritol, 233 parts of trimethylol ethane, 288 parts of tung fatty acid and 49 parts of para-tertiary-butyl benzoic acid are mixed and heated with 60 parts of xylene to an acid value of 12. In addition, 271 parts of maleic anhydride and 0.6 parts of hydroquinone are admixed with the content and heated to terminate the reaction. 100 parts of a 50% stylene solution of this alkyd resin are mixed with 1 part of a 60% toluene solution of cobalt naphthenate, and then coated on a glass plate and irradiated with high energy electron beams of 300 kV with a dose of 5 Mrad for 1 sec.

  7. Micro-scale characterization of a CMOS-based neutron detector for in-phantom measurements in radiation therapy

    Science.gov (United States)

    Arbor, Nicolas; Higueret, Stephane; Husson, Daniel

    2018-04-01

    The CMOS sensor AlphaRad has been designed at the IPHC Strasbourg for real-time monitoring of fast and thermal neutrons over a full energy spectrum. Completely integrated, highly transparent to photons and optimized for low power consumption, this sensor offers very interesting characteristics for the study of internal neutrons in radiation therapy with anthropomorphic phantoms. However, specific effects related to the CMOS metal substructure and to the charge collection process of low energy particles must be carefully estimated before being used for medical applications. We present a detailed characterization of the AlphaRad chip in the MeV energy range using proton and alpha micro-beam experiments performed at the AIFIRA facility (CENBG, Bordeaux). Two-dimensional maps of the charge collection were carried out on a micro-metric scale to be integrated into a Geant4 Monte Carlo simulation of the system. The gamma rejection, as well as the fast and thermal neutrons separation, were studied using both simulation and experimental data. The results highlight the potential of a future system based on CMOS sensor for in-phantom neutron detection in radiation therapies.

  8. Effect of Pigment Colouring on Physico-mechanical Properties of Hardened Cement Paste and Response of Colour Intensity to UV Radiation

    International Nuclear Information System (INIS)

    Khattab, M.M.; Abdel-Rahman, H.A.; Hassan, M.S.

    2010-01-01

    In this work, different ratios of pigment colour was mixed with cement paste during mixing. The pigment colour used was Phthalocyanine Green. The effect of pigment colouring on hardened cement paste (HCP) was characterized in terms of compressive strength, IR spectroscopic analysis and X-ray diffraction. In addition, the effect of UV radiation on the colour strength of hardened cement paste/pigment colour composites was investigated. The results indicated that the increase in the ratio of pigment colour was accompanied with a slight decrease in the values of compressive strength. The exposure of the coloured hardened cement paste to UV radiation for long lengths of time causes a little effect on the colour intensity

  9. Absorbed dose by a CMOS in radiotherapy

    International Nuclear Information System (INIS)

    Borja H, C. G.; Valero L, C. Y.; Guzman G, K. A.; Banuelos F, A.; Hernandez D, V. M.; Vega C, H. R.; Paredes G, L. C.

    2011-10-01

    Absorbed dose by a complementary metal oxide semiconductor (CMOS) circuit as part of a pacemaker, has been estimated using Monte Carlo calculations. For a cancer patient who is a pacemaker carrier, scattered radiation could damage pacemaker CMOS circuits affecting patient's health. Absorbed dose in CMOS circuit due to scattered photons is too small and therefore is not the cause of failures in pacemakers, but neutron calculations shown an absorbed dose that could cause damage in CMOS due to neutron-hydrogen interactions. (Author)

  10. Proposed radiation hardened mobile vehicle for Chernobyl dismantlement and nuclear accident response

    International Nuclear Information System (INIS)

    Rowland, M.S.; Holliday, M.A.; Karpachov, J.A.

    1995-01-01

    Researchers are developing a radiation hardened, Telerobotic Dismantling System (TDS) to remediate the Chernobyl facility. To withstand the severe radiation fields, the robotic system, will rely on electrical motors, actuators, and relays proven in the Chernobyl power station. Due to its dust suppression characteristics and ability to cut arbitrary materials the authors propose using a water knife as the principle tool to slice up the large fuel containing masses. The front end of the robot will use a minimum number of moving parts by locating most of the susceptible and bulky components outside the work area. Hardened and shielded video cameras will be designed for remote control and viewing of the robotic functions. Operators will supervise and control robot movements based on feedback from a suite of sensory systems that would include vision systems, radiation detection and measurement systems and force reflection systems. A gripper will be instrumented with a variety of sensors (e.g. force, torque, or tactile), allowing varying debris surface properties to be grasped. The gripper will allow the operator to manipulate and segregate debris items without entering the radiologically and physically dangerous dismantlement operations area. The robots will initially size reduce the FCM's to reduce the primary sources of the airborne radionuclides. The robot will then remove the high level waste for packaging or decontamination, and storage nearby

  11. Radiation-hardened microwave communications system

    International Nuclear Information System (INIS)

    Smith, S.F.; Crutcher, R.I.; Vandermolen, R.I.

    1990-01-01

    The consolidated fuel reprocessing program (CFRP) at the Oak Ridge National Laboratory (ORNL) has been developing signal transmission techniques and equipment to improve the efficiency of remote handling operations for nuclear applications. These efforts have been largely directed toward the goals of (a) remotely controlling bilateral force-reflecting servomanipulators for dexterous manipulation-based operations in remote maintenance tasks and (b) providing television viewing of the work site. In September 1987, developmental microwave transceiving hardware operating with dish antennas was demonstrated in the advanced integrated maintenance system (AIMS) facility at ORNL, successfully implementing both high-quality one-way television transmissions and simultaneous bidirectional digital control data transmissions with very low error rates. Initial test results based on digital transmission at a 1.0-Mbaud data rate indicated that the error rates of the microwave system were comparable to those of a hardwired system. During these test intervals, complex manipulator operations were performed, and the AIMS transporter was moved repeatedly without adverse effects on data integrity. Results of these tests have been factored into subsequent phases of the development program, with an ultimate goal of designing a fully radiation-hardened microwave signal transmission system for use in nuclear facilities

  12. Radiation hardening at 77 K in Zn and Cu single crystals at low doses

    International Nuclear Information System (INIS)

    Gonzalez, H.C.; Bisogni, E.A.

    1980-01-01

    There is controversy about radiation hardening phenomenon and its additivity with other hardening mechanisms. The purpose of this work is to contribute to the understanding of this subject, through measurements made in Zn and Cu single crystals. Post-irradiation measurements of yield stress of Zn, made on different single crystals, show a direct proportionality to the 0.5 power of the dose. It is determined that for a dose greater than 3.7 x 10 16 neutrons cm -2 s -1 there is always cleavage. The maximum critical resolved shear stress measured is about 8.82 MPa. In order to study additivity it is necessary to lower experimental errors. A micro tensile machine is designed to operate in the CNEA facility RA1 in a bath of liquid N 2 . Experimental measurements of yield stress with dose are carried out in-situ on the same single crystals. Experimental results on Cu and Zn show that radiation induced yield stress increases with a 0.5 power law. It must be taken into account that the definition of radiation induced yield stress stands for radiation created obstacles operating alone. The radiation induced yield stress adds algebraically to the athermal component of the initial yield stress but is not exactly additive to the other thermally activated mechanisms. A gradual transition from one to the other type of obstacles is observed. (author)

  13. Simulations of depleted CMOS sensors for high-radiation environments

    CERN Document Server

    Liu, J.; Bhat, S.; Breugnon, P.; Caicedo, I.; Chen, Z.; Degerli, Y.; Godiot-Basolo, S.; Guilloux, F.; Hemperek, T.; Hirono, T.; Hügging, F.; Krüger, H.; Moustakas, K.; Pangaud, P.; Rozanov, A.; Rymaszewski, P.; Schwemling, P.; Wang, M.; Wang, T.; Wermes, N.; Zhang, L.

    2017-01-01

    After the Phase II upgrade for the Large Hadron Collider (LHC), the increased luminosity requests a new upgraded Inner Tracker (ITk) for the ATLAS experiment. As a possible option for the ATLAS ITk, a new pixel detector based on High Voltage/High Resistivity CMOS (HV/HR CMOS) technology is under study. Meanwhile, a new CMOS pixel sensor is also under development for the tracker of Circular Electron Position Collider (CEPC). In order to explore the sensor electric properties, such as the breakdown voltage and charge collection efficiency, 2D/3D Technology Computer Aided Design (TCAD) simulations have been performed carefully for the above mentioned both of prototypes. In this paper, the guard-ring simulation for a HV/HR CMOS sensor developed for the ATLAS ITk and the charge collection efficiency simulation for a CMOS sensor explored for the CEPC tracker will be discussed in details. Some comparisons between the simulations and the latest measurements will also be addressed.

  14. Development of a Depleted Monolithic CMOS Sensor in a 150 nm CMOS Technology for the ATLAS Inner Tracker Upgrade

    CERN Document Server

    Wang, T.

    2017-01-01

    The recent R&D focus on CMOS sensors with charge collection in a depleted zone has opened new perspectives for CMOS sensors as fast and radiation hard pixel devices. These sensors, labelled as depleted CMOS sensors (DMAPS), have already shown promising performance as feasible candidates for the ATLAS Inner Tracker (ITk) upgrade, possibly replacing the current passive sensors. A further step to exploit the potential of DMAPS is to investigate the suitability of equipping the outer layers of the ATLAS ITk upgrade with fully monolithic CMOS sensors. This paper presents the development of a depleted monolithic CMOS pixel sensor designed in the LFoundry 150 nm CMOS technology, with the focus on design details and simulation results.

  15. Absorbed dose by a CMOS in radiotherapy

    Energy Technology Data Exchange (ETDEWEB)

    Borja H, C. G.; Valero L, C. Y.; Guzman G, K. A.; Banuelos F, A.; Hernandez D, V. M.; Vega C, H. R. [Universidad Autonoma de Zacatecas, Unidad Academica de Estudios Nucleares, Calle Cipres No. 10, Fracc. La Penuela, 98068 Zacatecas (Mexico); Paredes G, L. C., E-mail: candy_borja@hotmail.com [ININ, Carretera Mexico-Toluca s/n, 52750 Ocoyoacac, Estado de Mexico (Mexico)

    2011-10-15

    Absorbed dose by a complementary metal oxide semiconductor (CMOS) circuit as part of a pacemaker, has been estimated using Monte Carlo calculations. For a cancer patient who is a pacemaker carrier, scattered radiation could damage pacemaker CMOS circuits affecting patient's health. Absorbed dose in CMOS circuit due to scattered photons is too small and therefore is not the cause of failures in pacemakers, but neutron calculations shown an absorbed dose that could cause damage in CMOS due to neutron-hydrogen interactions. (Author)

  16. Depleted CMOS pixels for LHC proton–proton experiments

    International Nuclear Information System (INIS)

    Wermes, N.

    2016-01-01

    While so far monolithic pixel detectors have remained in the realm of comparatively low rate and radiation applications outside LHC, new developments exploiting high resistivity substrates with three or four well CMOS process options allow reasonably large depletion depths and full CMOS circuitry in a monolithic structure. This opens up the possibility to target CMOS pixel detectors also for high radiation pp-experiments at the LHC upgrade, either in a hybrid-type fashion or even fully monolithic. Several pixel matrices have been prototyped with high ohmic substrates, high voltage options, and full CMOS electronics. They were characterized in the lab and in test beams. An overview of the necessary development steps and different approaches as well as prototype results are presented in this paper.

  17. Thin film silicon on silicon nitride for radiation hardened dielectrically isolated MISFET's

    International Nuclear Information System (INIS)

    Neamen, D.; Shedd, W.; Buchanan, B.

    1975-01-01

    The permanent ionizing radiation effects resulting from charge trapping in a silicon nitride isolation dielectric have been determined for a total ionizing dose up to 10 7 rads (Si). Junction FET's, whose active channel region is directly adjacent to the silicon-silicon nitride interface, were used to measure the effects of the radiation induced charge trapping in the Si 3 N 4 isolation dielectric. The JFET saturation current and channel conductance versus junction gate voltage and substrate voltage were characterized as a function of the total ionizing radiation dose. The experimental results on the Si 3 N 4 are compared to results on similar devices with SiO 2 dielectric isolation. The ramifications of using the silicon nitride for fabricating radiation hardened dielectrically isolated MIS devices are discussed

  18. A Radiation-Hard Analog Memory In The AVLSI-RA Process

    International Nuclear Information System (INIS)

    Britton, C.L. Jr.; Wintenberg, A.L.; Read, K.F.; Simpson, M.L.; Young, G.R.; Clonts, L.G.; Kennedy, E.J.; Smith, R.S.; Swann, B.K.; Musser, J.A.

    1995-01-01

    A radiation hardened analog memory for an Interpolating Pad Camber has been designed at Oak Ridge National Laboratory and fabricated by Harris Semiconductor in the AVLSI-RA CMOS process. The goal was to develop a rad-hard analog pipeline that would deliver approximately 9-bit performance, a readout settling time of 500ns following read enable, an input and output dynamic range of +/-2.25V, a corrected rms pedestal of approximately 5mV or less, and a power dissipation of less than 10mW/channel. The pre- and post-radiation measurements to 5MRad are presented

  19. Forecasting noise and radiation hardness of CMOS front-end electronics beyond the 100 nm frontier

    International Nuclear Information System (INIS)

    Re, V.; Gaioni, L.; Manghisoni, M.; Ratti, L.; Traversi, G.

    2010-01-01

    The progress of industrial microelectronic technologies has already overtaken the 130 nm CMOS generation that is currently the focus of IC designers for new front-end chips in LHC upgrades and other detector applications. In a broader time span, sub-100 nm CMOS processes may become appealing for the design of very compact front-end systems with advanced integrated functionalities. This is especially true in the case of pixel detectors, both for monolithic devices (MAPS) and for hybrid implementations where a high resistivity sensor is connected to a CMOS readout chip. Technologies beyond the 100 nm frontier have peculiar features, such as the evolution of the device gate material to reduce tunneling currents through the thin dielectric. These new physical device parameters may impact on functional properties such as noise and radiation hardness. On the basis of experimental data relevant to commercial devices, this work studies potential advantages and challenges associated to the design of low-noise and rad-hard analog circuits in these aggressively scaled technologies.

  20. Radiation-hard Active Pixel Sensors for HL-LHC Detector Upgrades based on HV-CMOS Technology

    CERN Document Server

    Miucci, A; Hemperek, T.; Hügging, F.; Krüger, H.; Obermann, T.; Wermes, N.; Garcia-Sciveres, M.; Backhaus, M.; Capeans, M.; Feigl, S.; Nessi, M.; Pernegger, H.; Ristic, B.; Gonzalez-Sevilla, S.; Ferrere, D.; Iacobucci, G.; Rosa, A.La; Muenstermann, D.; George, M.; Grosse-Knetter, J.; Quadt, A.; Rieger, J.; Weingarten, J.; Bates, R.; Blue, A.; Buttar, C.; Hynds, D.; Kreidl, C.; Peric, I.; Breugnon, P.; Pangaud, P.; Godiot-Basolo, S.; Fougeron, D.; Bompard, F.; Clemens, J.C.; Liu, J; Barbero, M.; Rozanov, A

    2014-01-01

    Luminosity upgrades are discussed for the LHC (HL-LHC) which would make updates to the detectors necessary, requiring in particular new, even more radiation-hard and granular, sensors for the inner detector region. 1Corresponding author. c CERN 2014, published under the terms of the Creative Commons Attribution 3.0 License by IOP Publishing Ltd and Sissa Medialab srl. Any further distribution of this work must maintain attribution to the author(s) and the published article’s title, journal citation and DOI. doi:10.1088/1748-0221/9/05/C050642014 JINST 9 C05064 A proposal for the next generation of inner detectors is based on HV-CMOS: a new family of silicon sensors based on commercial high-voltage CMOS technology, which enables the fabrication of part of the pixel electronics inside the silicon substrate itself. The main advantages of this technology with respect to the standard silicon sensor technology are: low material budget, fast charge collection time, high radiation tolerance, low cost and operation a...

  1. CMOS pixel development for the ATLAS experiment at HL-LHC

    CERN Document Server

    Rimoldi, Marco; The ATLAS collaboration

    2017-01-01

    To cope with the rate and radiation environment expected at the HL-LHC new approaches are being developed on CMOS pixel detectors, providing charge collection in a depleted layer. They are based on: HV enabling technologies that allow to use high depletion voltages, high resistivity wafers for large depletion depths; radiation hard processed with multiple nested wells to allow CMOS electronics embedded with sufficient shielding into the sensor substrate and backside processing and thinning for material minimization and backside voltage application. Since 2014, members of more than 20 groups in the ATLAS experiment are actively pursuing CMOS pixel R$\\&$D in an ATLAS Demonstrator program pursuing sensor design and characterizations. The goal of this program is to demonstrate that depleted CMOS pixels are suited for high rate, fast timing and high radiation operation at LHC. For this a number of technologies have been explored and characterized. In this presentation the challenges for the usage of CMOS pixel...

  2. SEU-hardened silicon bipolar and GaAs MESFET SRAM cells using local redundancy techniques

    International Nuclear Information System (INIS)

    Hauser, J.R.

    1992-01-01

    Silicon bipolar and GaAs FET SRAM's have proven to be more difficult to harden with respect to single-event upset mechanisms than have silicon CMOS SRAM's. This is a fundamental property of bipolar and JFET or MESFET device technologies which do not have a high-impedance, nonactive isolation between the control electrode and the current or voltage being controlled. All SEU circuit level hardening techniques applied at the local level must use some type of information storage redundancy so that information loss on one node due to an SEU event can be recovered from information stored elsewhere in the cell. In CMOS technologies, this can be achieved by the use of simple cross-coupling resistors, whereas in bipolar and FET technologies, no such simple approach is possible. Several approaches to the use of local redundancy in bipolar and FET technologies are discussed in this paper. At the expense of increased cell complexity and increased power consumption and write time, several approaches are capable of providing complete SEU hardness at the local cell level

  3. Radiation Hardened NULL Convention Logic Asynchronous Circuit Design

    Directory of Open Access Journals (Sweden)

    Liang Zhou

    2015-10-01

    Full Text Available This paper proposes a radiation hardened NULL Convention Logic (NCL architecture that can recover from a single event latchup (SEL or single event upset (SEU fault without deadlock or any data loss. The proposed architecture is analytically proved to be SEL resistant, and by extension, proved to be SEU resistant. The SEL/SEU resistant version of a 3-stage full-word pipelined NCL 4 × 4 unsigned multiplier was implemented using the IBM cmrf8sf 130 nm 1.2 V process at the transistor level and simulated exhaustively with SEL fault injection to validate the proposed architectures. Compared with the original version, the SEL/SEU resilient version has 1.31× speed overhead, 2.74× area overhead, and 2.79× energy per operation overhead.

  4. Architecture and performance of radiation-hardened 64-bit SOS/MNOS memory

    International Nuclear Information System (INIS)

    Kliment, D.C.; Ronen, R.S.; Nielsen, R.L.; Seymour, R.N.; Splinter, M.R.

    1976-01-01

    This paper discusses the circuit architecture and performance of a nonvolatile 64-bit MNOS memory fabricated on silicon on sapphire (SOS). The circuit is a test vehicle designed to demonstrate the feasibility of a high-performance, high-density, radiation-hardened MNOS/SOS memory. The array is organized as 16 words by 4 bits and is fully decoded. It utilizes a two-(MNOS) transistor-per-bit cell and differential sensing scheme and is realized in PMOS static resistor load logic. The circuit was fabricated and tested as both a fast write random access memory (RAM) and an electrically alterable read only memory (EAROM) to demonstrate design and process flexibility. Discrete device parameters such as retention, circuit electrical characteristics, and tolerance to total dose and transient radiation are presented

  5. A mixed analog-digital radiation hard technology for high energy physics electronics DMILL (Durci Mixte sur Isolant Logico-Linéaire)

    CERN Document Server

    Beuville, E; Borgeaud, P; Fourches, N T; Rouger, M; Blanc, J P; Bruel, M; Delevoye-Orsier, E; Gautier, J; Du Port de Pontcharra, J; Truche, R; Dupont-Nivet, E; Flament, O; Leray, J L; Martin, J L; Montaron, J; Borel, G; Brice, J M; Chatagnon, P; Terrier, C; Aubert, Jean-Jacques; Delpierre, P A; Habrard, M C; Potheau, R; CERN. Geneva. Detector Research and Development Committee

    1992-01-01

    The high radiation level expected in the inner regions of the high luminosity LHC detectors (gamma and neutron) will require radiation hardened electronics. A consortium between the CEA (Commissariat a l'Energie Atomique) and Thomson TMS (Thomson Composants Militaires et Spatiaux) has been created to push for the development and the industrialization of a nascent technology which looks particularly adapted to the needs of HEP electronics. This technology, currently under development at the LETI(CEA), uses a SIMOX substrate with an epitaxial silicon film. It includes CMOS, JFETs and vertical bipolar transistors with a potential multi-megarad hardness. The CMOS and bipolar transistors constitute a rad-hard BiCMOS which will be useful to design analog and digital high-speed architectures. JFETs, which have intrinsically high hardness behaviour and low noise performances even at low temperature will enable very rad-hard, low noise front end electronics to be designed. Present results, together with the improvemen...

  6. Hardening device, by inserts, of electronic component against radiation

    International Nuclear Information System (INIS)

    Val, C.

    1987-01-01

    The hardening device includes at least two materials, one with high atomic number with respect to the other. One of these materials is set as inserts in a layer of the other material. The hardening device is then made by stacking of such layers, the insert density varying from one layer to the other, making thus vary the atomic number resulting from the hardening device along its thickness, following a predefined law [fr

  7. Charge collection and non-ionizing radiation tolerance of CMOS pixel sensors using a 0.18 μm CMOS process

    Science.gov (United States)

    Zhang, Ying; Zhu, Hongbo; Zhang, Liang; Fu, Min

    2016-09-01

    The proposed Circular Electron Positron Collider (CEPC) will be primarily aimed for precision measurements of the discovered Higgs boson. Its innermost vertex detector, which will play a critical role in heavy-flavor tagging, must be constructed with fine-pitched silicon pixel sensors with low power consumption and fast readout. CMOS pixel sensor (CPS), as one of the most promising candidate technologies, has already demonstrated its excellent performance in several high energy physics experiments. Therefore it has been considered for R&D for the CEPC vertex detector. In this paper, we present the preliminary studies to improve the collected signal charge over the equivalent input capacitance ratio (Q / C), which will be crucial to reduce the analog power consumption. We have performed detailed 3D device simulation and evaluated potential impacts from diode geometry, epitaxial layer properties and non-ionizing radiation damage. We have proposed a new approach to improve the treatment of the boundary conditions in simulation. Along with the TCAD simulation, we have designed the exploratory prototype utilizing the TowerJazz 0.18 μm CMOS imaging sensor process and we will verify the simulation results with future measurements.

  8. Environmental hardening of a mobile-manipulator system for nuclear environments

    International Nuclear Information System (INIS)

    Jones, S.L.; Cable, T.; Tulenko, J.S.; Toshkov, S.; Sias, F.R. Jr.

    1993-01-01

    This research report discusses the radiation hardening of a commercially available mobile robot, the REMOTEC ANDROS. This hardening effort is culminating in the availability of a megarad hardened mobile platform to access areas in nuclear facilities with extremely high levels of radiation (0.1 to 1 Mrad). These radiation levels may be encountered both during routine repair and monitoring activities and accident situations. The project has completed a phase-I U.S. Department of Energy Small Business Innovative Research contract and is now in a phase-II effort with completion scheduled in early 1995. The research involves the evaluation of the material and electrical components of an ANDROS robot to determine the anticipated radiation hardness of the current production version and evaluation of the components that must be replaced or modified to harden the system to higher radiation levels. The work being reported is based on an evaluation of the complete list of all electronic, electrical, and mechanical parts used in the robot and includes initial experimental radiation evaluations performed at the University of Florida

  9. The total dose effects on the 1/f noise of deep submicron CMOS transistors

    International Nuclear Information System (INIS)

    Hu Rongbin; Wang Yuxin; Lu Wu

    2014-01-01

    Using 0.18 μm CMOS transistors, the total dose effects on the 1/f noise of deep-submicron CMOS transistors are studied for the first time in mainland China. From the experimental results and the theoretic analysis, we realize that total dose radiation causes a lot of trapped positive charges in STI (shallow trench isolation) SiO 2 layers, which induces a current leakage passage, increasing the 1/f noise power of CMOS transistors. In addition, we design some radiation-hardness structures on the CMOS transistors and the experimental results show that, until the total dose achieves 750 krad, the 1/f noise power of the radiation-hardness CMOS transistors remains unchanged, which proves our conclusion. (semiconductor devices)

  10. Radiation effects in advanced microelectronics technologies

    Science.gov (United States)

    Johnston, A. H.

    1998-06-01

    The pace of device scaling has increased rapidly in recent years. Experimental CMOS devices have been produced with feature sizes below 0.1 /spl mu/m, demonstrating that devices with feature sizes between 0.1 and 0.25 /spl mu/m will likely be available in mainstream technologies after the year 2000. This paper discusses how the anticipated changes in device dimensions and design are likely to affect their radiation response in space environments. Traditional problems, such as total dose effects, SEU and latchup are discussed, along with new phenomena. The latter include hard errors from heavy ions (microdose and gate-rupture errors), and complex failure modes related to advanced circuit architecture. The main focus of the paper is on commercial devices, which are displacing hardened device technologies in many space applications. However, the impact of device scaling on hardened devices is also discussed.

  11. CMOS Pixel Development for the ATLAS Experiment at HL-LHC

    CERN Document Server

    Ristic, Branislav; The ATLAS collaboration

    2017-01-01

    To cope with the rate and radiation environment expected at the HL-LHC new approaches are being developed on CMOS pixel detectors, providing charge collection in a depleted layer. They are based on technologies that allow to use high depletion voltages (HV-MAPS) and high resistivity wafers (HR-MAPS) for large depletion depths; radiation hard processed with multiple nested wells to allow CMOS electronics to be embedded safely into the sensor substrate. We are investigating depleted CMOS pixels with monolithic or hybrid designs concerning their suitability for high rate, fast timing and high radiation operation at LHC. This paper will discuss recent results on the main candidate technologies and the current development towards a monolithic solution.

  12. Radiation hardening revisited: Role of intracascade clustering

    DEFF Research Database (Denmark)

    Singh, B.N.; Foreman, A.J.E.; Trinkaus, H.

    1997-01-01

    be explained in terms of conventional dispersed-barrier hardening because (a) the grown-in dislocations are not free, and (b) irradiation-induced defect clusters are not rigid indestructible Orowan obstacles. A new model called 'cascade-induced source hardening' is presented where glissile loops produced...... directly in cascades are envisaged to decorate the grown-in dislocations so that they cannot act as dislocation sources. The upper yield stress is related to the breakaway stress which is necessary to pull the dislocation away from the clusters/loops decorating it. The magnitude of the breakaway stress has...

  13. CMOS pixel development for the ATLAS experiment at HL-LHC

    CERN Document Server

    Risti{c}, Branislav; The ATLAS collaboration

    2017-01-01

    To cope with the rate and radiation environment expected at the HL-LHC new approaches are being developed on CMOS pixel detectors, providing charge collection in a depleted layer. They are based on: HV enabling technologies that allow to use high depletion voltages (HV-MAPS), high resistivity wafers for large depletion depths (HR-MAPS); radiation hard processed with multiple nested wells to allow CMOS electronics embedded with sufficient shielding into the sensor substrate and backside processing and thinning for material minimization and backside voltage application. Since 2014, members of more than 20 groups in the ATLAS experiment are actively pursuing CMOS pixel R&D in an ATLAS Demonstrator program pursuing sensor design and characterizations. The goal of this program is to demonstrate that depleted CMOS pixels, with monolithic or hybrid designs, are suited for high rate, fast timing and high radiation operation at LHC. For this a number of technologies have been explored and characterized. In this pr...

  14. CMOS Pixel Development for the ATLAS Experiment at HL-LHC

    CERN Document Server

    Gaudiello, Andrea; The ATLAS collaboration

    2017-01-01

    To cope with the rate and radiation environment expected at the HL-LHC new approaches are being developed on CMOS pixel detectors, providing charge collection in a depleted layer. They are based on: HV enabling technologies that allow to use high depletion voltages (HV-MAPS), high resistivity wafers for large depletion depths (HR-MAPS); radiation hard processed with multiple nested wells to allow CMOS electronics embedded with sufficient shielding into the sensor substrate and backside processing and thinning for material minimization and backside voltage application. Since 2014, members of more than 20 groups in the ATLAS experiment are actively pursuing CMOS pixel R&D in an ATLAS Demonstrator program pursuing sensor design and characterizations. The goal of this program is to demonstrate that depleted CMOS pixels, with monolithic or hybrid designs, are suited for high rate, fast timing and high radiation operation at LHC. For this a number of technologies have been explored and characterized. In this pr...

  15. Neutron absorbed dose in a pacemaker CMOS

    International Nuclear Information System (INIS)

    Borja H, C. G.; Guzman G, K. A.; Valero L, C.; Banuelos F, A.; Hernandez D, V. M.; Vega C, H. R.; Paredes G, L.

    2012-01-01

    The neutron spectrum and the absorbed dose in a Complementary Metal Oxide Semiconductor (CMOS), has been estimated using Monte Carlo methods. Eventually a person with a pacemaker becomes an oncology patient that must be treated in a linear accelerator. Pacemaker has integrated circuits as CMOS that are sensitive to intense and pulsed radiation fields. Above 7 MV therapeutic beam is contaminated with photoneutrons that could damage the CMOS. Here, the neutron spectrum and the absorbed dose in a CMOS cell was calculated, also the spectra were calculated in two point-like detectors in the room. Neutron spectrum in the CMOS cell shows a small peak between 0.1 to 1 MeV and a larger peak in the thermal region, joined by epithermal neutrons, same features were observed in the point-like detectors. The absorbed dose in the CMOS was 1.522 x 10 -17 Gy per neutron emitted by the source. (Author)

  16. Neutron absorbed dose in a pacemaker CMOS

    Energy Technology Data Exchange (ETDEWEB)

    Borja H, C. G.; Guzman G, K. A.; Valero L, C.; Banuelos F, A.; Hernandez D, V. M.; Vega C, H. R. [Universidad Autonoma de Zacatecas, Unidad Academica de Estudios Nucleares, Cipres No. 10, Fracc. La Penuela, 98068 Zacatecas (Mexico); Paredes G, L., E-mail: fermineutron@yahoo.com [ININ, Carretera Mexico-Toluca s/n, 52750 Ocoyoacac, Estado de Mexico (Mexico)

    2012-06-15

    The neutron spectrum and the absorbed dose in a Complementary Metal Oxide Semiconductor (CMOS), has been estimated using Monte Carlo methods. Eventually a person with a pacemaker becomes an oncology patient that must be treated in a linear accelerator. Pacemaker has integrated circuits as CMOS that are sensitive to intense and pulsed radiation fields. Above 7 MV therapeutic beam is contaminated with photoneutrons that could damage the CMOS. Here, the neutron spectrum and the absorbed dose in a CMOS cell was calculated, also the spectra were calculated in two point-like detectors in the room. Neutron spectrum in the CMOS cell shows a small peak between 0.1 to 1 MeV and a larger peak in the thermal region, joined by epithermal neutrons, same features were observed in the point-like detectors. The absorbed dose in the CMOS was 1.522 x 10{sup -17} Gy per neutron emitted by the source. (Author)

  17. A simple method to identify radiation and annealing biases that lead to worst-case CMOS static RAM postirradiation response

    International Nuclear Information System (INIS)

    Fleetwood, D.M.; Dressendorfer, P.V.

    1987-01-01

    The authors illustrate a simple method to identify bias conditions that lead to worst-case postirradiation speed and timing response for SRAMs. Switching cell states between radiation and anneal should lead to maximum speed and timing degradation for many hardened designs and technologies. The greatest SRAM cell imbalance is also established by these radiation and annealing conditions for the hardened and commercial parts that we have examined. These results should provide insight into the behavior of SRAMs during and after irradiation. The results should also be useful to establishing guidelines for integrated-circuit functionality testing, and SEU and dose-rate upset testing, after total-dose irradiation

  18. Why semiconductors must be hardened when used in space

    International Nuclear Information System (INIS)

    Winokur, P.S.

    2000-01-01

    The natural space radiation environment presents a great challenge to present and future satellite systems with significant assets in space. Defining requirements for such systems demands knowledge about the space radiation environment and its effects on electronics and optoelectronics technologies, as well as suitable risk assessment of the uncertainties involved. For mission of high radiation levels, radiation-hardened integrated circuits will be required to preform critical mission functions. The most successful systems in space will be those that are best able to blend standard commercial electronics with custom radiation-hardened electronics in a mix that is suitable for the system of interest

  19. Radiation hardened high efficiency silicon space solar cell

    International Nuclear Information System (INIS)

    Garboushian, V.; Yoon, S.; Turner, J.

    1993-01-01

    A silicon solar cell with AMO 19% Beginning of Life (BOL) efficiency is reported. The cell has demonstrated equal or better radiation resistance when compared to conventional silicon space solar cells. Conventional silicon space solar cell performance is generally ∼ 14% at BOL. The Radiation Hardened High Efficiency Silicon (RHHES) cell is thinned for high specific power (watts/kilogram). The RHHES space cell provides compatibility with automatic surface mounting technology. The cells can be easily combined to provide desired power levels and voltages. The RHHES space cell is more resistant to mechanical damage due to micrometeorites. Micro-meteorites which impinge upon conventional cells can crack the cell which, in turn, may cause string failure. The RHHES, operating in the same environment, can continue to function with a similar crack. The RHHES cell allows for very efficient thermal management which is essential for space cells generating higher specific power levels. The cell eliminates the need for electrical insulation layers which would otherwise increase the thermal resistance for conventional space panels. The RHHES cell can be applied to a space concentrator panel system without abandoning any of the attributes discussed. The power handling capability of the RHHES cell is approximately five times more than conventional space concentrator solar cells

  20. Characterization of active CMOS pixel sensors on high resistive substrate

    Energy Technology Data Exchange (ETDEWEB)

    Hirono, Toko; Hemperek, Tomasz; Huegging, Fabian; Krueger, Hans; Rymaszewski, Piotr; Wermes, Norbert [Physikalisches Institut, Universitaet Bonn, Bonn (Germany)

    2016-07-01

    Active CMOS pixel sensors are very attractive as radiation imaging pixel detector because they do not need cost-intensive fine pitch bump bonding. High radiation tolerance and time resolution are required to apply those sensors to upcoming particle physics experiments. To achieve these requirements, the active CMOS pixel sensors were developed on high resistive substrates. Signal charges are collected faster by drift in high resistive substrates than in standard low resistive substrates yielding also a higher radiation tolerance. A prototype of the active CMOS pixel sensor has been fabricated in the LFoundry 150 nm CMOS process on 2 kΩcm substrate. This prototype chip was thinned down to 300 μm and the backside has been processed and can contacted by an aluminum contact. The breakdown voltage is around -115 V, and the depletion width has been measured to be as large as 180 μm at a bias voltage of -110 V. Gain and noise of the readout circuitry agree with the designed values. Performance tests in the lab and test beam have been done before and after irradiation with X-rays and neutrons. In this presentation, the measurement results of the active CMOS prototype sensors are shown.

  1. Proton Radiation Effects on Dark Signal Distribution of PPD CMOS Image Sensors: Both TID and DDD Effects.

    Science.gov (United States)

    Xue, Yuanyuan; Wang, Zujun; Chen, Wei; Liu, Minbo; He, Baoping; Yao, Zhibin; Sheng, Jiangkun; Ma, Wuying; Dong, Guantao; Jin, Junshan

    2017-11-30

    Four-transistor (T) pinned photodiode (PPD) CMOS image sensors (CISs) with four-megapixel resolution using 11µm pitch high dynamic range pixel were radiated with 3 MeV and 10MeV protons. The dark signal was measured pre- and post-radiation, with the dark signal post irradiation showing a remarkable increase. A theoretical method of dark signal distribution pre- and post-radiation is used to analyze the degradation mechanisms of the dark signal distribution. The theoretical results are in good agreement with experimental results. This research would provide a good understanding of the proton radiation effects on the CIS and make it possible to predict the dark signal distribution of the CIS under the complex proton radiation environments.

  2. CMOS pixel sensors on high resistive substrate for high-rate, high-radiation environments

    Energy Technology Data Exchange (ETDEWEB)

    Hirono, Toko, E-mail: thirono@uni-bonn.de [Physikalisches Institute der Universität Bonn, Bonn (Germany); Barbero, Marlon; Breugnon, Patrick; Godiot, Stephanie [CPPM, Aix-Marseille Universite, CNRS/IN2P3, Marseille (France); Gonella, Laura; Hemperek, Tomasz; Hügging, Fabian; Krüger, Hans [Physikalisches Institute der Universität Bonn, Bonn (Germany); Liu, Jian; Pangaud, Patrick [CPPM, Aix-Marseille Universite, CNRS/IN2P3, Marseille (France); Peric, Ivan [IPE, Karlsruher Institut für Technologie, Karlsruhe (Germany); Pohl, David-Leon [Physikalisches Institute der Universität Bonn, Bonn (Germany); Rozanov, Alexandre [CPPM, Aix-Marseille Universite, CNRS/IN2P3, Marseille (France); Rymaszewski, Piotr [Physikalisches Institute der Universität Bonn, Bonn (Germany); Wang, Anqing [CPPM, Aix-Marseille Universite, CNRS/IN2P3, Marseille (France); Wermes, Norbert [Physikalisches Institute der Universität Bonn, Bonn (Germany)

    2016-09-21

    A depleted CMOS active pixel sensor (DMAPS) has been developed on a substrate with high resistivity in a high voltage process. High radiation tolerance and high time resolution can be expected because of the charge collection by drift. A prototype of DMAPS was fabricated in a 150 nm process by LFoundry. Two variants of the pixel layout were tested, and the measured depletion depths of the variants are 166 μm and 80 μm. We report the results obtained with the prototype fabricated in this technology.

  3. Radiation hardening: study of production velocity and post-irradiation recovery of defect clusters produced by neutron irradiation at 77 K

    International Nuclear Information System (INIS)

    Gonzalez, Hector C.; Miralles, Monica T.

    1999-01-01

    This work includes three basic studies using radiation hardening of Cu single crystals irradiated at 77 K in the RA-1-reactor of CNEA: 1) The initial of a production curve of defect clusters originated during radiation until 5.2 x 10 20 n m 2 . The shape of the curve is compared with those obtained from measurement of resistivity increased (Δρ) with neutronic doses (φt) and the acceptance of the linear dependency of Δρ with Frenkel Pairs concentration (PFs); 2) The isochronal hardening recovery in the temperature interval of stage V (T > 450 K). The existence of the sub-stages Vb (∼ 550 K) and Vc (∼ 587 K), determined for the first time from hardening measurements, are shown and compared with results obtained by other techniques; 3) Isothermal recoveries performed in the temperature interval of the sub-stage Vc to determine phenomenologically the apparent activation energy of the sub-stage. The value obtained was in agreement with the energy for Cu vacancies auto diffusion. (author)

  4. Prevention of CMOS latch-up by gold doping

    International Nuclear Information System (INIS)

    Dawes, W.R.; Derbenwick, G.F.

    1976-01-01

    CMOS integrated circuits fabricated with the bulk silicon technology typically exhibit latch-up effects in either an ionizing radiation environment or an overvoltage stress condition. The latch-up effect has been shown to arise from regenerative switching, analogous to an SCR, in the adjacent parasitic bipolar transistors formed during the fabrication of a bulk CMOS device. Once latch-up has been initiated, it is usually self-sustaining and eventually destructive. Naturally, the circuit is inoperative during latch-up. This paper discusses a generic process technique that prevents the latch-up mechanism in CMOS devices

  5. Paint and binding material to be hardened by ionizing radiations

    International Nuclear Information System (INIS)

    Johnson, O.B.; Labana, S.S.

    1976-01-01

    The invention concerns a paint binding material which can be hardened due to the effect of ionising radiation, consisting of a dispersion of a) an ethylene unsaturated material in b) at least one vinyl monomer. Component (a) is a reaction product of graded rubber particles (0.1 - 4 μm) and an ethylene unsaturated component with a reactive epoxy-, hydroxy- or carbonyl-group, which is connected to the rubber by ester or urethane links. The rubber particles have a core of cross linked elastomer acrylic polymers, an outer shell of reactive groups and an intermediate layer made from the core monomer and the shell. 157 examples explain the manufacturing process. The paint is suitable for covering articles which will later be subject to distortion. (UWI) [de

  6. Efficient, radiation-hardened, 800-keV neutral beam injection system

    International Nuclear Information System (INIS)

    Anderson, O.A.; Cooper, W.S.; Goldberg, D.A.; Ruby, L.; Soroka, L.; Fink, J.H.

    1982-10-01

    Recent advances and new concepts in negative ion generation, transport, acceleration, and neutrailzation make it appear likely that an efficient, radiation-hardened neutral beam injection system could be developed in time for the proposed FED-A tokamak. These new developments include the operation of steady-state H - ion sources at over 5 A per meter of source length, the concept of using strong-focussing electrostatic structures for low-gradient dc acceleration of high-current sheet beams of negative ions and the transport of these beams around corners, and the development of powerful oxygen-iodine chemical lasers which will make possible the efficient conversion of the negative ions to neutrals using a photodetachment scheme in which the ion beam passes through the laser cavity

  7. Backside illuminated CMOS-TDI line scan sensor for space applications

    Science.gov (United States)

    Cohen, Omer; Ofer, Oren; Abramovich, Gil; Ben-Ari, Nimrod; Gershon, Gal; Brumer, Maya; Shay, Adi; Shamay, Yaron

    2018-05-01

    A multi-spectral backside illuminated Time Delayed Integration Radiation Hardened line scan sensor utilizing CMOS technology was designed for continuous scanning Low Earth Orbit small satellite applications. The sensor comprises a single silicon chip with 4 independent arrays of pixels where each array is arranged in 2600 columns with 64 TDI levels. A multispectral optical filter whose spectral responses per array are adjustable per system requirement is assembled at the package level. A custom 4T Pixel design provides the required readout speed, low-noise, very low dark current, and high conversion gains. A 2-phase internally controlled exposure mechanism improves the sensor's dynamic MTF. The sensor high level of integration includes on-chip 12 bit per pixel analog to digital converters, on-chip controller, and CMOS compatible voltage levels. Thus, the power consumption and the weight of the supporting electronics are reduced, and a simple electrical interface is provided. An adjustable gain provides a Full Well Capacity ranging from 150,000 electrons up to 500,000 electrons per column and an overall readout noise per column of less than 120 electrons. The imager supports line rates ranging from 50 to 10,000 lines/sec, with power consumption of less than 0.5W per array. Thus, the sensor is characterized by a high pixel rate, a high dynamic range and a very low power. To meet a Latch-up free requirement RadHard architecture and design rules were utilized. In this paper recent electrical and electro-optical measurements of the sensor's Flight Models will be presented for the first time.

  8. Radiation hardness tests and characterization of the CLARO-CMOS, a low power and fast single-photon counting ASIC in 0.35 micron CMOS technology

    International Nuclear Information System (INIS)

    Fiorini, M.; Andreotti, M.; Baldini, W.; Calabrese, R.; Carniti, P.; Cassina, L.; Cotta Ramusino, A.; Giachero, A.; Gotti, C.; Luppi, E.; Maino, M.; Malaguti, R.; Pessina, G.; Tomassetti, L.

    2014-01-01

    The CLARO-CMOS is a prototype ASIC that allows fast photon counting with 5 ns peaking time, a recovery time to baseline smaller than 25 ns, and a power consumption of less than 1 mW per channel. This chip is capable of single-photon counting with multi-anode photomultipliers and finds applications also in the read-out of silicon photomultipliers and microchannel plates. The prototype is realized in AMS 0.35 micron CMOS technology. In the LHCb RICH environment, assuming 10 years of operation at the nominal luminosity expected after the upgrade in Long Shutdown 2 (LS2), the ASIC must withstand a total fluence of about 6×10 12 1 MeV n eq /cm 2 and a total ionizing dose of 400 krad. A systematic evaluation of the radiation effects on the CLARO-CMOS performance is therefore crucial to ensure long term stability of the electronics front-end. The results of multi-step irradiation tests with neutrons and X-rays up to the fluence of 10 14 cm −2 and a dose of 4 Mrad, respectively, are presented, including measurement of single event effects during irradiation and chip performance evaluation before and after each irradiation step. - Highlights: • CLARO chip capable of single-photon counting with 5 ns peaking time. • Chip irradiated up to very high neutron, proton and X-rays fluences, as expected for upgraded LHCb RICH detectors. • No significant performance degradation is observed after irradiation

  9. Insulator photocurrents: Application to dose rate hardening of CMOS/SOI integrated circuits

    International Nuclear Information System (INIS)

    Dupont-Nivet, E.; Coiec, Y.M.; Flament, O.; Tinel, F.

    1998-01-01

    Irradiation of insulators with a pulse of high energy x-rays can induce photocurrents in the interconnections of integrated circuits. The authors present, here, a new method to measure and analyze this effect together with a simple model. They also demonstrate that these insulator photocurrents have to be taken into account to obtain high levels of dose-rate hardness with CMOS on SOI integrated circuits, especially flip-flops or memory blocks of ASICs. They show that it explains some of the upsets observed in a SRAM embedded in an ASIC

  10. Radiation Hardened Telerobotic Dismantling System Development Final Report CRADA No. TC-1340-96

    Energy Technology Data Exchange (ETDEWEB)

    Smith, C. [Lawrence Livermore National Lab. (LLNL), Livermore, CA (United States); Lightman, A. [Lawrence Livermore National Lab. (LLNL), Livermore, CA (United States)

    2017-09-27

    This project was a collaborative effort between the University of California, LLNL and RedZone Robotics, Inc. for the development of radiation-hardened telerobotic dismantling systems for use in applications such as nuclear facility remediation, nuclear accident response, and Chemobyltype remediation. The project supported the design, development, fabrication and testing of a Ukrainian robotic systems. The project was completed on time and within budget. All deliverables were completed. The final project deliverables were consistent with the plans developed in the original project with the exception that the fabricated systems remained in Ukraine.

  11. The use of microhardness tests to determine the radiation hardening of austenitic stainless steel; Zastosowanie pomiarow mikrotwardosci dla okreslenia umocnienia radiacyjnego stali austenitycznej napromienionej neutronami

    Energy Technology Data Exchange (ETDEWEB)

    Hofman, A.; Kochanski, T.; Malczyk, A.

    1994-12-31

    The use of microhardness technique to determine the radiation hardening has been studied. Microhardness measurements have been conducted on austenitic stainless steel OH18N1OT irradiated up to 2x10{sup 19} ncm{sup -2}. It was determined that the increase in microhardness varies directly with the measured increase in the 0.2% offset yield strength and has been found that microhardness technique may be an effective tool to measurements of radiation induced hardening. (author). 18 refs, 3 figs, 3 tabs.

  12. Superconducting (radiation hardened) magnets for mirror fusion devices

    International Nuclear Information System (INIS)

    Henning, C.D.; Dalder, E.N.C.; Miller, J.R.; Perkins, J.R.

    1983-01-01

    Superconducting magnets for mirror fusion have evolved considerably since the Baseball II magnet in 1970. Recently, the Mirror Fusion Test Facility (MFTF-B) yin-yang has been tested to a full field of 7.7 T with radial dimensions representative of a full scale reactor. Now the emphasis has turned to the manufacture of very high field solenoids (choke coils) that are placed between the tandem mirror central cell and the yin-yang anchor-plug set. For MFTF-B the choke coil field reaches 12 T, while in future devices like the MFTF-Upgrade, Fusion Power Demonstration and Mirror Advanced Reactor Study (MARS) reactor the fields are doubled. Besides developing high fields, the magnets must be radiation hardened. Otherwise, thick neutron shields increase the magnet size to an unacceptable weight and cost. Neutron fluences in superconducting magnets must be increased by an order of magnitude or more. Insulators must withstand 10 10 to 10 11 rads, while magnet stability must be retained after the copper has been exposed to fluence above 10 19 neutrons/cm 2

  13. BUSFET - A Novel Radiation-Hardened SOI Transistor

    International Nuclear Information System (INIS)

    Dodd, P.E.; Draper, B.L.; Schwank, J.R.; Shaneyfelt, M.R.

    1999-01-01

    A partially-depleted SOI transistor structure has been designed that does not require the use of specially-processed hardened buried oxides for total-dose hardness and maintains the intrinsic SEU and dose rate hardness advantages of SOI technology

  14. Radiation Hardening and Verification Procedure for Compact Flip-Flop Design

    Energy Technology Data Exchange (ETDEWEB)

    Kwon, Inyong; Sung, Seung Hwan [Korea Atomic Energy Research Institute, Daejeon (Korea, Republic of)

    2016-10-15

    For radiation-related applications applying electronic devices in nuclear, space, medicine, and scientific experiment, single event transients (SETs) and single event upsets (SEUs) are become primary concern since they can cause malfunctions in a system by affecting the signal transition and flipping digital bits. The D flip-flop as a register is generally used in digital circuits that require data stability and high speed. For many years, radiation-hardened-by-design (RHBD) circuits have been gradually developed from traditional circuit architectures. One of common methods is to exploit redundancy in an important circuit block to preserve the correct signal. This technique uses a voting process to have a correct output when other duplicated systems fail due to a single event effect (SEE) including SET and SEU. For instance, B. Olson applied the redundancy technique, formally referred the triple modular redundancy (TMR). Other researchers use various error detection and correction (EDAC) algorithms including redundant bits in the storage circuits to detect and correct errors at the system level. practical experiments at radiation exposure facilities. Korea Atomic Energy Research Institute (KAERI) operates a laboratory with high energy radioactive isotope, {sup 60}Co in Jeongeup, Korea. The facility can provide various experiments requiring experimental environment changes by controlling radiation activity and radiated energy. The future direction on RHBD circuits would be integration with the digital DFF presented in this paper and analog front-end units such as OP-amp for charge sensitive or shaping amplifier. Analog-to-digital converters (ADCs) are also major components necessarily imbedded in the most of sensor related electronics. Thus RHBD techniques are inevitably required to protect these circuits from SEE; specifically, SEUs for digital logics and SETs for analog signals. Since most ADCs consist of both analog and digital circuits in their architectures

  15. A large dynamic range radiation-tolerant analog memory in a quarter- micron CMOS technology

    CERN Document Server

    Anelli, G; Rivetti, A

    2001-01-01

    An analog memory prototype containing 8*128 cells has been designed in a commercial quarter-micron CMOS process. The aim of this work is to investigate the possibility of designing large dynamic range mixed-mode switched capacitor circuits for high-energy physics (HEP) applications in deep submicron CMOS technologies. Special layout techniques have been used to make the circuit radiation tolerant. The memory cells employ gate-oxide capacitors for storage, permitting a very high density. A voltage write-voltage read architecture has been chosen to minimize the sensitivity to absolute capacitor values. The measured input voltage range is 2.3 V (the power supply voltage V/sub DD/ is equal to 2.5 V), with a linearity of almost 8 bits over 2 V. The dynamic range is more than 11 bits. The pedestal variation is +or-0.5 mV peak-to-peak. The noise measured, which is dominated by the noise of the measurement setup, is around 0.8 mV rms. The characteristics of the memory have been measured before irradiation and after 1...

  16. A large dynamic range radiation tolerant analog memory in a quarter micron CMOS technology

    CERN Document Server

    Anelli, G; Rivetti, A

    2000-01-01

    A 8*128 cell analog memory prototype has been designed in a commercial 0.25 jam CMOS process. The aim of this work was to investigate the possibility of designing large dynamic range mixed- mode switched capacitor circuits for High-Energy Physics (HEP) applications in deep submicron CMOS technologies. Special layout techniques have been used to make the circuit radiation tolerant left bracket 1 right bracket . The memory cells employ gate-oxide capacitors for storage, allowing for a very high density. A voltage write - voltage read architecture has been chosen to minimize the sensitivity to absolute capacitor values. The measured input voltage range is 2.3 V (V//D//D = 2.5 V), with a linearity of at least 7.5 bits over 2 V. The dynamic range is more than 11 bits. The pedestal variation is plus or minus 0.5 mV peak-to-peak. The noise measured, which is dominated by the noise of the measurement setup, is around 0.8 mV rms. The characteristics of the memory have been measured before irradiation and after lOMrd (...

  17. Investigation of epitaxial silicon layers as a material for radiation hardened silicon detectors

    International Nuclear Information System (INIS)

    Li, Z.; Eremin, V.; Ilyashenko, I.; Ivanov, A.; Verbitskaya, E.

    1997-12-01

    Epitaxial grown thick layers (≥ 100 micrometers) of high resistivity silicon (Epi-Si) have been investigated as a possible candidate of radiation hardened material for detectors for high-energy physics. As grown Epi-Si layers contain high concentration (up to 2 x 10 12 cm -3 ) of deep levels compared with that in standard high resistivity bulk Si. After irradiation of test diodes by protons (E p = 24 GeV) with a fluence of 1.5 x 10 11 cm -2 , no additional radiation induced deep traps have been detected. A reasonable explanation is that there is a sink of primary radiation induced defects (interstitial and vacancies), possibly by as-grown defects, in epitaxial layers. The ''sinking'' process, however, becomes non-effective at high radiation fluences (10 14 cm -2 ) due to saturation of epitaxial defects by high concentration of radiation induced ones. As a result, at neutron fluence of 1 x 10 14 cm -2 the deep level spectrum corresponds to well-known spectrum of radiation induced defects in high resistivity bulk Si. The net effective concentration in the space charge region equals to 3 x 10 12 cm -3 after 3 months of room temperature storage and reveals similar annealing behavior for epitaxial as compared to bulk silicon

  18. Identification of radiation induced dark current sources in pinned photodiode CMOS image sensors

    International Nuclear Information System (INIS)

    Goiffon, V.; Virmontois, C.; Magnan, P.; Cervantes, P.; Place, S.; Estribeau, M.; Martin-Gonthier, P.; Gaillardin, M.; Girard, S.; Paillet, P.

    2012-01-01

    This paper presents an investigation of Total Ionizing Dose (TID) induced dark current sources in Pinned Photodiodes (PPD) CMOS Image Sensors based on pixel design variations. The influence of several layout parameters is studied. Only one parameter is changed at a time enabling the direct evaluation of its contribution to the observed device degradation. By this approach, the origin of radiation induced dark current in PPD is localized on the pixel layout. The PPD peripheral shallow trench isolation does not seem to play a role in the degradation. The PPD area and a transfer gate contribution independent of the pixel dimensions appear to be the main sources of the TID induced dark current increase. This study also demonstrates that applying a negative voltage on the transfer gate during integration strongly reduces the radiation induced dark current. (authors)

  19. Radiation hardness evaluation of the commercial 150 nm CMOS process using 60Co source

    International Nuclear Information System (INIS)

    Carna, M; Havranek, M; Hejtmanek, M; Janoska, Z; Marcisovsky, M; Neue, G; Tomasek, L; Vrba, V

    2014-01-01

    We present a study of radiation effects on MOSFET transistors irradiated with a 60 Co source to a total absorbed dose of 1.5 Mrad. The transistor test structures were manufactured using a commercial 150 nm CMOS process and are composed of transistors of different types (NMOS and PMOS), dimensions and insulation from the bulk material by means of deep n-wells. We have observed a degradation of electrical characteristics of both PMOS and NMOS transistors, namely a large increase of the leakage current of the NMOS transistors after irradiation

  20. Design and characterization of radiation resistant integrated circuits for the LHC particle detectors using deep sub-micron CMOS technologies

    International Nuclear Information System (INIS)

    Anelli, Giovanni Maria

    2000-01-01

    The electronic circuits associated with the particle detectors of the CERN Large Hadron Collider (LHC) have to work in a highly radioactive environment. This work proposes a methodology allowing the design of radiation resistant integrated circuits using the commercial sub-micron CMOS technology. This method uses the intrinsic radiation resistance of ultra-thin grid oxides, the technology of enclosed layout transistors (ELT), and the protection rings to avoid the radio-induced creation of leakage currents. In order to check the radiation tolerance level, several test structures have been designed and tested with different radiation sources. These tests have permitted to study the physical phenomena responsible for the damages induced by the radiations and the possible remedies. Then, the particular characteristics of ELT transistors and their influence on the design of complex integrated circuits has been explored. The modeling of the W/L ratio, the asymmetries (for instance in the output conductance) and the performance of ELT couplings have never been studied yet. The noise performance of the 0.25 μ CMOS technology, used in the design of several integrated circuits of the LHC detectors, has been characterized before and after irradiation. Finally, two integrated circuits designed using the proposed method are presented. The first one is an analogic memory and the other is a circuit used for the reading of the signals of one of the LHC detectors. Both circuits were irradiated and have endured very high doses practically without any sign of performance degradation. (J.S.)

  1. Effects of plasma-deposited silicon nitride passivation on the radiation hardness of CMOS integrated circuits

    International Nuclear Information System (INIS)

    Clement, J.J.

    1980-01-01

    The use of plasma-deposited silicon nitride as a final passivation over metal-gate CMOS integrated circuits degrades the radiation hardness of these devices. The hardness degradation is manifested by increased radiation-induced threshold voltage shifts caused principally by the charging of new interface states and, to a lesser extent, by the trapping of holes created upon exposure to ionizing radiation. The threshold voltage shifts are a strong function of the deposition temperature, and show very little dependence on thickness for films deposited at 300 0 C. There is some correlation between the threshold voltage shifts and the hydrogen content of the PECVD silicon nitride films used as the final passivation layer as a function of deposition temperature. The mechanism by which the hydrogen contained in these films may react with the Si/SiO 2 interface is not clear at this point

  2. DEVELOPMENT AND RESEARCH OF ULTRASONIC OSCILLATORY SYSTEM FOR HARDENING OF SPRING PLATE BILLETS

    Directory of Open Access Journals (Sweden)

    V. A. Tomilo

    2015-01-01

    Full Text Available Various schemes of ultrasonic oscillatory system are developed: with a «force nonsensitive» support, with a «force sensitive» support, with the deforming steel balls in bulk. Results of the ultrasonic treatment showed that hardening of a surface of the samples took place when the vibration amplitude of a radiator exceeds a certain level. The level of hardening increases with increase in amplitude of fluctuations of a radiator. Higher level of hardening is registered when the surface is treated by steel balls.

  3. Investigation of HV/HR-CMOS technology for the ATLAS Phase-II Strip Tracker Upgrade

    International Nuclear Information System (INIS)

    Fadeyev, V.; Galloway, Z.; Grabas, H.; Grillo, A.A.; Liang, Z.; Martinez-Mckinney, F.; Seiden, A.; Volk, J.; Affolder, A.; Buckland, M.; Meng, L.; Arndt, K.; Bortoletto, D.; Huffman, T.; John, J.; McMahon, S.; Nickerson, R.; Phillips, P.; Plackett, R.; Shipsey, I.

    2016-01-01

    ATLAS has formed strip CMOS project to study the use of CMOS MAPS devices as silicon strip sensors for the Phase-II Strip Tracker Upgrade. This choice of sensors promises several advantages over the conventional baseline design, such as better resolution, less material in the tracking volume, and faster construction speed. At the same time, many design features of the sensors are driven by the requirement of minimizing the impact on the rest of the detector. Hence the target devices feature long pixels which are grouped to form a virtual strip with binary-encoded z position. The key performance aspects are radiation hardness compatibility with HL-LHC environment, as well as extraction of the full hit position with full-reticle readout architecture. To date, several test chips have been submitted using two different CMOS technologies. The AMS 350 nm is a high voltage CMOS process (HV-CMOS), that features the sensor bias of up to 120 V. The TowerJazz 180 nm high resistivity CMOS process (HR-CMOS) uses a high resistivity epitaxial layer to provide the depletion region on top of the substrate. We have evaluated passive pixel performance, and charge collection projections. The results strongly support the radiation tolerance of these devices to radiation dose of the HL-LHC in the strip tracker region. We also describe design features for the next chip submission that are motivated by our technology evaluation.

  4. Investigation of HV/HR-CMOS technology for the ATLAS Phase-II Strip Tracker Upgrade

    Science.gov (United States)

    Fadeyev, V.; Galloway, Z.; Grabas, H.; Grillo, A. A.; Liang, Z.; Martinez-Mckinney, F.; Seiden, A.; Volk, J.; Affolder, A.; Buckland, M.; Meng, L.; Arndt, K.; Bortoletto, D.; Huffman, T.; John, J.; McMahon, S.; Nickerson, R.; Phillips, P.; Plackett, R.; Shipsey, I.; Vigani, L.; Bates, R.; Blue, A.; Buttar, C.; Kanisauskas, K.; Maneuski, D.; Benoit, M.; Di Bello, F.; Caragiulo, P.; Dragone, A.; Grenier, P.; Kenney, C.; Rubbo, F.; Segal, J.; Su, D.; Tamma, C.; Das, D.; Dopke, J.; Turchetta, R.; Wilson, F.; Worm, S.; Ehrler, F.; Peric, I.; Gregor, I. M.; Stanitzki, M.; Hoeferkamp, M.; Seidel, S.; Hommels, L. B. A.; Kramberger, G.; Mandić, I.; Mikuž, M.; Muenstermann, D.; Wang, R.; Zhang, J.; Warren, M.; Song, W.; Xiu, Q.; Zhu, H.

    2016-09-01

    ATLAS has formed strip CMOS project to study the use of CMOS MAPS devices as silicon strip sensors for the Phase-II Strip Tracker Upgrade. This choice of sensors promises several advantages over the conventional baseline design, such as better resolution, less material in the tracking volume, and faster construction speed. At the same time, many design features of the sensors are driven by the requirement of minimizing the impact on the rest of the detector. Hence the target devices feature long pixels which are grouped to form a virtual strip with binary-encoded z position. The key performance aspects are radiation hardness compatibility with HL-LHC environment, as well as extraction of the full hit position with full-reticle readout architecture. To date, several test chips have been submitted using two different CMOS technologies. The AMS 350 nm is a high voltage CMOS process (HV-CMOS), that features the sensor bias of up to 120 V. The TowerJazz 180 nm high resistivity CMOS process (HR-CMOS) uses a high resistivity epitaxial layer to provide the depletion region on top of the substrate. We have evaluated passive pixel performance, and charge collection projections. The results strongly support the radiation tolerance of these devices to radiation dose of the HL-LHC in the strip tracker region. We also describe design features for the next chip submission that are motivated by our technology evaluation.

  5. Investigation of HV/HR-CMOS technology for the ATLAS Phase-II Strip Tracker Upgrade

    Energy Technology Data Exchange (ETDEWEB)

    Fadeyev, V., E-mail: fadeyev@ucsc.edu [Santa Cruz Institute for Particle Physics, University of California, Santa Cruz, CA 95064 (United States); Galloway, Z.; Grabas, H.; Grillo, A.A.; Liang, Z.; Martinez-Mckinney, F.; Seiden, A.; Volk, J. [Santa Cruz Institute for Particle Physics, University of California, Santa Cruz, CA 95064 (United States); Affolder, A.; Buckland, M.; Meng, L. [Department of Physics, University of Liverpool, O. Lodge Laboratory, Oxford Street, Liverpool L69 7ZE (United Kingdom); Arndt, K.; Bortoletto, D.; Huffman, T.; John, J.; McMahon, S.; Nickerson, R.; Phillips, P.; Plackett, R.; Shipsey, I. [Department of Physics, Oxford University, Oxford (United Kingdom); and others

    2016-09-21

    ATLAS has formed strip CMOS project to study the use of CMOS MAPS devices as silicon strip sensors for the Phase-II Strip Tracker Upgrade. This choice of sensors promises several advantages over the conventional baseline design, such as better resolution, less material in the tracking volume, and faster construction speed. At the same time, many design features of the sensors are driven by the requirement of minimizing the impact on the rest of the detector. Hence the target devices feature long pixels which are grouped to form a virtual strip with binary-encoded z position. The key performance aspects are radiation hardness compatibility with HL-LHC environment, as well as extraction of the full hit position with full-reticle readout architecture. To date, several test chips have been submitted using two different CMOS technologies. The AMS 350 nm is a high voltage CMOS process (HV-CMOS), that features the sensor bias of up to 120 V. The TowerJazz 180 nm high resistivity CMOS process (HR-CMOS) uses a high resistivity epitaxial layer to provide the depletion region on top of the substrate. We have evaluated passive pixel performance, and charge collection projections. The results strongly support the radiation tolerance of these devices to radiation dose of the HL-LHC in the strip tracker region. We also describe design features for the next chip submission that are motivated by our technology evaluation.

  6. Development of Radiation-hard Bandgap Reference and Temperature Sensor in CMOS 130 nm Technology

    CERN Document Server

    Kuczynska, Marika; Bugiel, Szymon; Firlej, Miroslaw; Fiutowski, Tomasz; Idzik, Marek; Michelis, Stefano; Moron, Jakub; Przyborowski, Dominik; Swientek, Krzysztof

    2015-01-01

    A stable reference voltage (or current) source is a standard component of today's microelectronics systems. In particle physics experiments such reference is needed in spite of harsh ionizing radiation conditions, i.e. doses exceeding 100 Mrads and fluences above 1e15 n/cm2. After such radiation load a bandgap reference using standard p-n junction of bipolar transistor does not work properly. Instead of using standard p-n junctions, two enclosed layout transistor (ELTMOS) structures are used to create radiation-hard diodes: the ELT bulk diode and the diode obtained using the ELTMOS as dynamic threshold transistor (DTMOS). In this paper we have described several sub-1V references based on ELTMOS bulk diode and DTMOS based diode, using CMOS 130 nm process. Voltage references the structures with additional PTAT (Proportional To Absolute Temperature) output for temperature measurements were also designed. We present and compare post-layout simulations of the developed bandgap references and temperature sensors, w...

  7. Total-ionizing-dose effects on isolation oxides in modern CMOS technologies

    International Nuclear Information System (INIS)

    Barnaby, Hugh J.; Mclain, Michael; Esqueda, Ivan Sanchez

    2007-01-01

    This paper presents experimental data on the total dose response of deep sub-micron bulk CMOS devices and integrated circuits. Ionizing radiation experiments on shallow trench isolation (STI) field oxide MOS capacitors (FOXCAP) indicate a characteristic build-up of radiation-induced defects in the dielectric. In this paper, capacitors fabricated with STI, thermal, SIMOX and bipolar base oxides of similar thickness are compared and show the STI oxide to be most susceptible to radiation effects. Experimental data on irradiated shift registers and n-channel MOSFETs are also presented. These data indicate that radiation damage to the STI can increase the off-state current of n-channel devices and the standby current of CMOS integrated circuits

  8. Radiation Hardened Electronics Destined For Severe Nuclear Reactor Environments

    Energy Technology Data Exchange (ETDEWEB)

    Holbert, Keith E. [Arizona State Univ., Tempe, AZ (United States); Clark, Lawrence T. [Arizona State Univ., Tempe, AZ (United States)

    2016-02-19

    Post nuclear accident conditions represent a harsh environment for electronics. The full station blackout experience at Fukushima shows the necessity for emergency sensing capabilities in a radiation-enhanced environment. This NEET (Nuclear Energy Enabling Technologies) research project developed radiation hardened by design (RHBD) electronics using commercially available technology that employs commercial off-the-shelf (COTS) devices and present generation circuit fabrication techniques to improve the total ionizing dose (TID) hardness of electronics. Such technology not only has applicability to severe accident conditions but also to facilities throughout the nuclear fuel cycle in which radiation tolerance is required. For example, with TID tolerance to megarads of dose, electronics could be deployed for long-term monitoring, inspection and decontamination missions. The present work has taken a two-pronged approach, specifically, development of both board and application-specific integrated circuit (ASIC) level RHBD techniques. The former path has focused on TID testing of representative microcontroller ICs with embedded flash (eFlash) memory, as well as standalone flash devices that utilize the same fabrication technologies. The standalone flash devices are less complicated, allowing better understanding of the TID response of the crucial circuits. Our TID experiments utilize biased components that are in-situ tested, and in full operation during irradiation. A potential pitfall in the qualification of memory circuits is the lack of rigorous testing of the possible memory states. For this reason, we employ test patterns that include all ones, all zeros, a checkerboard of zeros and ones, an inverse checkerboard, and random data. With experimental evidence of improved radiation response for unbiased versus biased conditions, a demonstration-level board using the COTS devices was constructed. Through a combination of redundancy and power gating, the demonstration

  9. Investigating Degradation Mechanisms in 130 nm and 90 nm Commercial CMOS Technologies Under Extreme Radiation Conditions

    Science.gov (United States)

    Ratti, Lodovico; Gaioni, Luigi; Manghisoni, Massimo; Traversi, Gianluca; Pantano, Devis

    2008-08-01

    The purpose of this paper is to study the mechanisms underlying performance degradation in 130 nm and 90 nm commercial CMOS technologies exposed to high doses of ionizing radiation. The investigation has been mainly focused on their noise properties in view of applications to the design of low-noise, low-power analog circuits to be operated in harsh environment. Experimental data support the hypothesis that charge trapping in shallow trench isolation (STI), besides degrading the static characteristics of interdigitated NMOS transistors, also affects their noise performances in a substantial fashion. The model discussed in this paper, presented in a previous work focused on CMOS devices irradiated with a 10 Mrad(SiO2) gamma -ray dose, has been applied here also to transistors exposed to much higher (up to 100 Mrad(SiO2 )) doses of X-rays. Such a model is able to account for the extent of the observed noise degradation as a function of the device polarity, dimensions and operating point.

  10. Large Format CMOS-based Detectors for Diffraction Studies

    Science.gov (United States)

    Thompson, A. C.; Nix, J. C.; Achterkirchen, T. G.; Westbrook, E. M.

    2013-03-01

    Complementary Metal Oxide Semiconductor (CMOS) devices are rapidly replacing CCD devices in many commercial and medical applications. Recent developments in CMOS fabrication have improved their radiation hardness, device linearity, readout noise and thermal noise, making them suitable for x-ray crystallography detectors. Large-format (e.g. 10 cm × 15 cm) CMOS devices with a pixel size of 100 μm × 100 μm are now becoming available that can be butted together on three sides so that very large area detector can be made with no dead regions. Like CCD systems our CMOS systems use a GdOS:Tb scintillator plate to convert stopping x-rays into visible light which is then transferred with a fiber-optic plate to the sensitive surface of the CMOS sensor. The amount of light per x-ray on the sensor is much higher in the CMOS system than a CCD system because the fiber optic plate is only 3 mm thick while on a CCD system it is highly tapered and much longer. A CMOS sensor is an active pixel matrix such that every pixel is controlled and readout independently of all other pixels. This allows these devices to be readout while the sensor is collecting charge in all the other pixels. For x-ray diffraction detectors this is a major advantage since image frames can be collected continuously at up 20 Hz while the crystal is rotated. A complete diffraction dataset can be collected over five times faster than with CCD systems with lower radiation exposure to the crystal. In addition, since the data is taken fine-phi slice mode the 3D angular position of diffraction peaks is improved. We have developed a cooled 6 sensor CMOS detector with an active area of 28.2 × 29.5 cm with 100 μm × 100 μm pixels and a readout rate of 20 Hz. The detective quantum efficiency exceeds 60% over the range 8-12 keV. One, two and twelve sensor systems are also being developed for a variety of scientific applications. Since the sensors are butt able on three sides, even larger systems could be built at

  11. Large Format CMOS-based Detectors for Diffraction Studies

    International Nuclear Information System (INIS)

    Thompson, A C; Westbrook, E M; Nix, J C; Achterkirchen, T G

    2013-01-01

    Complementary Metal Oxide Semiconductor (CMOS) devices are rapidly replacing CCD devices in many commercial and medical applications. Recent developments in CMOS fabrication have improved their radiation hardness, device linearity, readout noise and thermal noise, making them suitable for x-ray crystallography detectors. Large-format (e.g. 10 cm × 15 cm) CMOS devices with a pixel size of 100 μm × 100 μm are now becoming available that can be butted together on three sides so that very large area detector can be made with no dead regions. Like CCD systems our CMOS systems use a GdOS:Tb scintillator plate to convert stopping x-rays into visible light which is then transferred with a fiber-optic plate to the sensitive surface of the CMOS sensor. The amount of light per x-ray on the sensor is much higher in the CMOS system than a CCD system because the fiber optic plate is only 3 mm thick while on a CCD system it is highly tapered and much longer. A CMOS sensor is an active pixel matrix such that every pixel is controlled and readout independently of all other pixels. This allows these devices to be readout while the sensor is collecting charge in all the other pixels. For x-ray diffraction detectors this is a major advantage since image frames can be collected continuously at up 20 Hz while the crystal is rotated. A complete diffraction dataset can be collected over five times faster than with CCD systems with lower radiation exposure to the crystal. In addition, since the data is taken fine-phi slice mode the 3D angular position of diffraction peaks is improved. We have developed a cooled 6 sensor CMOS detector with an active area of 28.2 × 29.5 cm with 100 μm × 100 μm pixels and a readout rate of 20 Hz. The detective quantum efficiency exceeds 60% over the range 8-12 keV. One, two and twelve sensor systems are also being developed for a variety of scientific applications. Since the sensors are butt able on three sides, even larger systems could be built at

  12. CMOS pixel sensor development for the ATLAS experiment at the High Luminosity-LHC

    Science.gov (United States)

    Rimoldi, M.

    2017-12-01

    The current ATLAS Inner Detector will be replaced with a fully silicon based detector called Inner Tracker (ITk) before the start of the High Luminosity-LHC project (HL-LHC) in 2026. To cope with the harsh environment expected at the HL-LHC, new approaches are being developed for pixel detectors based on CMOS technology. Such detectors can provide charge collection, analog amplification and digital processing in the same silicon wafer. The radiation hardness is improved thanks to multiple nested wells which give the embedded CMOS electronics sufficient shielding. The goal of this programme is to demonstrate that depleted CMOS pixels are suitable for high rate, fast timing and high radiation operation at the LHC . A number of alternative solutions have been explored and characterised. In this document, test results of the sensors fabricated in different CMOS processes are reported.

  13. CMOS circuits manual

    CERN Document Server

    Marston, R M

    1995-01-01

    CMOS Circuits Manual is a user's guide for CMOS. The book emphasizes the practical aspects of CMOS and provides circuits, tables, and graphs to further relate the fundamentals with the applications. The text first discusses the basic principles and characteristics of the CMOS devices. The succeeding chapters detail the types of CMOS IC, including simple inverter, gate and logic ICs and circuits, and complex counters and decoders. The last chapter presents a miscellaneous collection of two dozen useful CMOS circuits. The book will be useful to researchers and professionals who employ CMOS circu

  14. Radiation Hardened Structured ASIC Platform with Compensation of Delay for Temperature and Voltage Variations for Multiple Redundant Temporal Voting Latch Technology

    Science.gov (United States)

    Ardalan, Sasan (Inventor)

    2018-01-01

    The invention relates to devices and methods of maintaining the current starved delay at a constant value across variations in voltage and temperature to increase the speed of operation of the sequential logic in the radiation hardened ASIC design.

  15. Hardening by means of ionising radiation

    International Nuclear Information System (INIS)

    Spoor, H.; Demmler, K.

    1979-01-01

    The polymerisable ethylic unsaturated mixture can be hardened by means of electron irradiation and used as a corrosion preventive layer. The mixture mainly consists of at least a di-olefinic unsaturated polyester, partial esters of polycarbonic acids, in particular the monoester of dicarbonic acids, with a copolymerizable C-C double bond, and mono-olefine unsaturated hydrocarbons, for example vinyl aromatics. The coatings exhibit good adhesion to the substrate, in particular to metal, and good flexibility. (DG) [de

  16. Simulation and measurement of total ionizing dose radiation induced image lag increase in pinned photodiode CMOS image sensors

    Energy Technology Data Exchange (ETDEWEB)

    Liu, Jing [School of Materials Science and Engineering, Xiangtan University, Hunan (China); State Key Laboratory of Intense Pulsed Irradiation Simulation and Effect, Northwest Institute of Nuclear Technology, P.O.Box 69-10, Xi’an (China); Chen, Wei, E-mail: chenwei@nint.ac.cn [State Key Laboratory of Intense Pulsed Irradiation Simulation and Effect, Northwest Institute of Nuclear Technology, P.O.Box 69-10, Xi’an (China); Wang, Zujun, E-mail: wangzujun@nint.ac.cn [State Key Laboratory of Intense Pulsed Irradiation Simulation and Effect, Northwest Institute of Nuclear Technology, P.O.Box 69-10, Xi’an (China); Xue, Yuanyuan; Yao, Zhibin; He, Baoping; Ma, Wuying; Jin, Junshan; Sheng, Jiangkun; Dong, Guantao [State Key Laboratory of Intense Pulsed Irradiation Simulation and Effect, Northwest Institute of Nuclear Technology, P.O.Box 69-10, Xi’an (China)

    2017-06-01

    This paper presents an investigation of total ionizing dose (TID) induced image lag sources in pinned photodiodes (PPD) CMOS image sensors based on radiation experiments and TCAD simulation. The radiation experiments have been carried out at the Cobalt −60 gamma-ray source. The experimental results show the image lag degradation is more and more serious with increasing TID. Combining with the TCAD simulation results, we can confirm that the junction of PPD and transfer gate (TG) is an important region forming image lag during irradiation. These simulations demonstrate that TID can generate a potential pocket leading to incomplete transfer.

  17. Study of a design criterion for 316L irradiated represented by a strain hardened material

    International Nuclear Information System (INIS)

    Gouin, H.

    1999-01-01

    The aim of this study is to analyse the consequence of radiation on different structure submitted to imposed displacement loading and for damages due to plastic instability or rupture. The main consequence of radiation is a material hardening with a ductility decrease. This effect is similar to initial mechanical hardening: the mechanical properties (determined on smooth tensile specimen) evolve in the same way while irradiation or mechanical hardening increase. So in this study, radiation hardening is simulated by mechanical hardening (swaging). Tests were carried out for which two damages were considered: plastic instability and rupture. These two damages were studied with initial mechanical hardening (5 tested hammering rate 0, 15, 25, 35 and 45% on 316L stainless steel). Likewise two types of loading were studied: tensile or bending loading on specimens with or without geometrical singularities (notches). From tensile tests, two deformation criteria are proposed for prevention against the two quoted damages. Numerical study is carried out allowing to confirm hypothesis made at the time of the tensile test result interpretation and to validate the rupture criterion by applying on bending test. (author)

  18. Study of radiation hardening in reactor pressure vessel steels

    International Nuclear Information System (INIS)

    Nogiwa, Kimihiro; Nishimura, Akihiko

    2008-01-01

    In order to investigate the dependence of hardening on copper precipitate diameter and density, in-situ transmission electron microscopy (TEM) observations during tensile tests of dislocation gliding through copper rich-precipitates in thermally aged and neutron irradiated Fe-Cu alloys were performed. The obstacle strength has been estimated from the critical bow-out angle, φ, of dislocations. The obstacle distance on the dislocation line measured from in-situ TEM observations were compared with number density and diameter measured by 3D-AP (three dimensional atom probe) and TEM observation. A comparison is made between hardening estimation based on the critical bowing angles and those obtained from conventional tensile tests. (author)

  19. Pixel front-end development in 65 nm CMOS technology

    International Nuclear Information System (INIS)

    Havránek, M; Hemperek, T; Kishishita, T; Krüger, H; Wermes, N

    2014-01-01

    Luminosity upgrade of the LHC (HL-LHC) imposes severe constraints on the detector tracking systems in terms of radiation hardness and capability to cope with higher hit rates. One possible way of keeping track with increasing luminosity is the usage of more advanced technologies. Ultra deep sub-micron CMOS technologies allow a design of complex and high speed electronics with high integration density. In addition, these technologies are inherently radiation hard. We present a prototype of analog pixel front-end integrated circuit designed in 65 nm CMOS technology with applications oriented towards the ATLAS Pixel Detector upgrade. The aspects of ultra deep sub-micron design and performance of the analog pixel front-end circuits will be discussed

  20. Neutron absorbed dose in a pacemaker CMOS

    Energy Technology Data Exchange (ETDEWEB)

    Borja H, C. G.; Guzman G, K. A.; Valero L, C. Y.; Banuelos F, A.; Hernandez D, V. M.; Vega C, H. R. [Universidad Autonoma de Zacatecas, Unidad Academica de Estudios Nucleares, Calle Cipres No. 10, Fracc. La Penuela, 98068 Zacatecas (Mexico); Paredes G, L., E-mail: candy_borja@hotmail.com [ININ, Carretera Mexico-Toluca s/n, 52750 Ocoyoacac, Estado de Mexico (Mexico)

    2011-11-15

    The absorbed dose due to neutrons by a Complementary Metal Oxide Semiconductor (CMOS) has been estimated using Monte Carlo methods. Eventually a person with a pacemaker becomes a patient that must be treated by radiotherapy with a linear accelerator; the pacemaker has integrated circuits as CMOS that are sensitive to intense and pulsed radiation fields. When the Linac is working in Bremsstrahlung mode an undesirable neutron field is produced due to photoneutron reactions; these neutrons could damage the CMOS putting the patient at risk during the radiotherapy treatment. In order to estimate the neutron dose in the CMOS a Monte Carlo calculation was carried out where a full radiotherapy vault room was modeled with a W-made spherical shell in whose center was located the source term of photoneutrons produced by a Linac head operating in Bremsstrahlung mode at 18 MV. In the calculations a phantom made of tissue equivalent was modeled while a beam of photoneutrons was applied on the phantom prostatic region using a field of 10 x 10 cm{sup 2}. During simulation neutrons were isotropically transported from the Linac head to the phantom chest, here a 1 {theta} x 1 cm{sup 2} cylinder made of polystyrene was modeled as the CMOS, where the neutron spectrum and the absorbed dose were estimated. Main damages to CMOS are by protons produced during neutron collisions protective cover made of H-rich materials, here the neutron spectrum that reach the CMOS was calculated showing a small peak around 0.1 MeV and a larger peak in the thermal region, both connected through epithermal neutrons. (Author)

  1. Radiation hardening of oxygen-doped niobium by 14-MeV neutrons

    International Nuclear Information System (INIS)

    Bradley, E.R.; Jones, R.H.

    1983-09-01

    The flow properties of niobium containing 185 and 480 wt ppM oxygen have been studied following irradiation at 300K with T(d,n) neutrons to fluence levels ranging from 6 x 10 20 to 2 x 10 22 m -2 . Two hardening stages connected by a plateau region were observed in the niobium containing 185 wt ppM oxygen. Increasing the oxygen content by 300 wt ppM oxygen shifted the beginning of the high-fluence hardening stage from 6 x 10 21 to 1 x 10 21 m -2 , thereby eliminating the plateau region. This shift resulted in 1.5 times more hardening in the oxygen-doped niobium irradiated to fluence levels above 5 x 10 21 m -2

  2. Evaluation on the Effect of Composition on Radiation Hardening and Embrittlement in Model FeCrAl Alloys

    Energy Technology Data Exchange (ETDEWEB)

    Field, Kevin G. [Oak Ridge National Lab. (ORNL), Oak Ridge, TN (United States); Briggs, Samuel A. [Oak Ridge National Lab. (ORNL), Oak Ridge, TN (United States); Edmondson, Philip [Oak Ridge National Lab. (ORNL), Oak Ridge, TN (United States); Hu, Xunxiang [Oak Ridge National Lab. (ORNL), Oak Ridge, TN (United States); Littrell, Kenneth C. [Oak Ridge National Lab. (ORNL), Oak Ridge, TN (United States); Howard, Richard [Oak Ridge National Lab. (ORNL), Oak Ridge, TN (United States); Parish, Chad M. [Oak Ridge National Lab. (ORNL), Oak Ridge, TN (United States); Yamamoto, Yukinori [Oak Ridge National Lab. (ORNL), Oak Ridge, TN (United States)

    2015-09-18

    This report details the findings of post-radiation mechanical testing and microstructural characterization performed on a series of model and commercial FeCrAl alloys to assist with the development of a cladding technology with enhanced accident tolerance. The samples investigated include model alloys with simple ferritic grain structure and two commercial alloys with minor solute additions. These samples were irradiated in the High Flux Isotope Reactor (HFIR) at Oak Ridge National Laboratory (ORNL) up to nominal doses of 7.0 dpa near or at Light Water Reactor (LWR) relevant temperatures (300-400 C). Characterization included a suite of techniques including small angle neutron scattering (SANS), atom probe tomography (APT), and transmission based electron microscopy techniques. Mechanical testing included tensile tests at room temperature on sub-sized tensile specimens. The goal of this work was to conduct detailed characterization and mechanical testing to begin establishing empirical and/or theoretical structure-property relationships for radiation-induced hardening and embrittlement in the FeCrAl alloy class. Development of such relationships will provide insight on the performance of FeCrAl alloys in an irradiation environment and will enable further development of the alloy class for applications within a LWR environment. A particular focus was made on establishing trends, including composition and radiation dose. The report highlights in detail the pertinent findings based on this work. This report shows that radiation hardening in the alloys is primarily composition dependent due to the phase separation in the high-Cr FeCrAl alloys. Other radiation induced/enhanced microstructural features were less dependent on composition and when observed at low number densities, were not a significant contributor to the observed mechanical responses. Pre-existing microstructure in the alloys was found to be important, with grain boundaries and pre-existing dislocation

  3. Radiation-Hardened Circuitry Using Mask-Programmable Analog Arrays. Report 3

    Energy Technology Data Exchange (ETDEWEB)

    Britton, Jr, Charles L. [Oak Ridge National Lab. (ORNL), Oak Ridge, TN (United States); Shelton, Jacob H. [Oak Ridge National Lab. (ORNL), Oak Ridge, TN (United States); Ericson, Milton Nance [Oak Ridge National Lab. (ORNL), Oak Ridge, TN (United States); Blalock, Benjamin [Univ. of Tennessee, Knoxville, TN (United States)

    2015-03-01

    As the recent accident at Fukushima Daiichi so vividly demonstrated, telerobotic technologies capable of withstanding high radiation environments need to be readily available to enable operations, repair, and recovery under severe accident scenarios when human entry is extremely dangerous or not possible. Telerobotic technologies that enable remote operation in high dose rate environments have undergone revolutionary improvement over the past few decades. However, much of this technology cannot be employed in nuclear power environments because of the radiation sensitivity of the electronics and the organic insulator materials currently in use. This is a report of the activities involving Task 3 of the Nuclear Energy Enabling Technologies (NEET) 2 project Radiation Hardened Circuitry Using Mask-Programmable Analog Arrays [1]. Evaluation of the performance of the system for both pre- and post-irradiation as well as operation at elevated temperature will be performed. Detailed performance of the system will be documented to ensure the design meets requirements prior to any extended evaluation. A suite of tests will be developed which will allow evaluation before and after irradiation and during temperature. Selection of the radiation exposure facilities will be determined in the early phase of the project. Radiation exposure will consist of total integrated dose (TID) up to 200 kRad or above with several intermediate doses during test. Dose rates will be in various ranges determined by the facility that will be used with a target of 30 kRad/hr. Many samples of the pre-commercial devices to be used will have been tested in previous projects to doses of at least 300 kRad and temperatures up to 125C. The complete systems will therefore be tested for performance at intermediate doses. Extended temperature testing will be performed up to the limit of the commercial sensors. The test suite performed at each test point will consist of operational testing of the three basic

  4. Characterization of a fully resonant, 1-MHz, 25-watt, DC/DC converter fabricated in a rad-hard BiCMOS/high-voltage process

    International Nuclear Information System (INIS)

    Titus, J.L.; Gehlhausen, M.A.; Desko, J.C. Jr.; Nguyen, T.T.; Roberts, D.J.; Shibib, M.A.; Hollenbach, K.E.

    1995-01-01

    This paper presents the characterization of a DC/DC converter prototype when its power integrated circuit (PIC) chip is exposed to total dose, dose rate, neutron, and heavy ion environments. This fully resonant, 1-MHZ, 25-Watt, DC/DC converter is composed of a brassboard, populated with input/output filters, isolation transformers, output rectifier, capacitors, resistors, and PIC chip, integrating the primary-side control circuitry, secondary-side control circuitry, power switch, gate-drive circuitry, and voltage references. The brassboard is built using commercial off-the-shelf components; and the PIC chip is fabricated using AT and T's rad-hard, bipolar complementary metal-oxide semiconductor (BiCMOS)/high-voltage process. The intent of this paper is to demonstrate that the PIC chip is fabricated with a radiation-hardened process and to demonstrate that various analog, digital, and power functions can be effectively integrated

  5. High-voltage CMOS detectors

    International Nuclear Information System (INIS)

    Ehrler, F.; Blanco, R.; Leys, R.; Perić, I.

    2016-01-01

    High-voltage CMOS (HVCMOS) pixel sensors are depleted active pixel sensors implemented in standard commercial CMOS processes. The sensor element is the n-well/p-substrate diode. The sensor electronics are entirely placed inside the n-well which is at the same time used as the charge collection electrode. High voltage is used to deplete the part of the substrate around the n-well. HVCMOS sensors allow implementation of complex in-pixel electronics. This, together with fast signal collection, allows a good time resolution, which is required for particle tracking in high energy physics. HVCMOS sensors will be used in Mu3e experiment at PSI and are considered as an option for both ATLAS and CLIC (CERN). Radiation tolerance and time walk compensation have been tested and results are presented. - Highlights: • High-voltage CMOS sensors will be used in Mu3e experiment at PSI (Switzerland). • HVCMOS sensors are considered as an option for ATLAS (LHC/CERN) and CLIC (CERN). • Efficiency of more than 95% (99%) has been measured with (un-)irradiated chips. • The time resolution measured in the beam tests is nearly 100 ns. • We plan to improve time resolution and efficiency by using high-resistive substrate.

  6. High-voltage CMOS detectors

    Energy Technology Data Exchange (ETDEWEB)

    Ehrler, F., E-mail: felix.ehrler@student.kit.edu; Blanco, R.; Leys, R.; Perić, I.

    2016-07-11

    High-voltage CMOS (HVCMOS) pixel sensors are depleted active pixel sensors implemented in standard commercial CMOS processes. The sensor element is the n-well/p-substrate diode. The sensor electronics are entirely placed inside the n-well which is at the same time used as the charge collection electrode. High voltage is used to deplete the part of the substrate around the n-well. HVCMOS sensors allow implementation of complex in-pixel electronics. This, together with fast signal collection, allows a good time resolution, which is required for particle tracking in high energy physics. HVCMOS sensors will be used in Mu3e experiment at PSI and are considered as an option for both ATLAS and CLIC (CERN). Radiation tolerance and time walk compensation have been tested and results are presented. - Highlights: • High-voltage CMOS sensors will be used in Mu3e experiment at PSI (Switzerland). • HVCMOS sensors are considered as an option for ATLAS (LHC/CERN) and CLIC (CERN). • Efficiency of more than 95% (99%) has been measured with (un-)irradiated chips. • The time resolution measured in the beam tests is nearly 100 ns. • We plan to improve time resolution and efficiency by using high-resistive substrate.

  7. Minimalist fault-tolerance techniques for mitigating single-event effects in non-radiation-hardened microcontrollers

    Science.gov (United States)

    Caldwell, Douglas Wyche

    Commercial microcontrollers--monolithic integrated circuits containing microprocessor, memory and various peripheral functions--such as are used in industrial, automotive and military applications, present spacecraft avionics system designers an appealing mix of higher performance and lower power together with faster system-development time and lower unit costs. However, these parts are not radiation-hardened for application in the space environment and Single-Event Effects (SEE) caused by high-energy, ionizing radiation present a significant challenge. Mitigating these effects with techniques which require minimal additional support logic, and thereby preserve the high functional density of these devices, can allow their benefits to be realized. This dissertation uses fault-tolerance to mitigate the transient errors and occasional latchups that non-hardened microcontrollers can experience in the space radiation environment. Space systems requirements and the historical use of fault-tolerant computers in spacecraft provide context. Space radiation and its effects in semiconductors define the fault environment. A reference architecture is presented which uses two or three microcontrollers with a combination of hardware and software voting techniques to mitigate SEE. A prototypical spacecraft function (an inertial measurement unit) is used to illustrate the techniques and to explore how real application requirements impact the fault-tolerance approach. Low-cost approaches which leverage features of existing commercial microcontrollers are analyzed. A high-speed serial bus is used for voting among redundant devices and a novel wire-OR output voting scheme exploits the bidirectional controls of I/O pins. A hardware testbed and prototype software were constructed to evaluate two- and three-processor configurations. Simulated Single-Event Upsets (SEUs) were injected at high rates and the response of the system monitored. The resulting statistics were used to evaluate

  8. DMILL circuits. The hardened electronics decuples its performances

    International Nuclear Information System (INIS)

    Anon.

    1998-01-01

    Thanks to the DMILL (mixed logic-linear hardening) technology under development at the CEA, MHS, a French company specialized in the fabrication of integrated circuits now produces hardened electronic circuits ten times more resistant to radiations than its competitors. Outside the initial market (several thousands of circuits for the LHC particle accelerator of Geneva), a broad choice of applications is opened to this technology: national defense, space, civil nuclear and medical engineering, and high temperature applications. Short paper. (J.S.)

  9. Evaluation of the Leon3 soft-core processor within a Xilinx radiation-hardened field-programmable gate array.

    Energy Technology Data Exchange (ETDEWEB)

    Learn, Mark Walter

    2012-01-01

    The purpose of this document is to summarize the work done to evaluate the performance of the Leon3 soft-core processor in a radiation environment while instantiated in a radiation-hardened static random-access memory based field-programmable gate array. This evaluation will look at the differences between two soft-core processors: the open-source Leon3 core and the fault-tolerant Leon3 core. Radiation testing of these two cores was conducted at the Texas A&M University Cyclotron facility and Lawrence Berkeley National Laboratory. The results of these tests are included within the report along with designs intended to improve the mitigation of the open-source Leon3. The test setup used for evaluating both versions of the Leon3 is also included within this document.

  10. CMOS pixel sensor development for the ATLAS experiment at the High Luminosity-LHC

    CERN Document Server

    Rimoldi, Marco; The ATLAS collaboration

    2017-01-01

    The current ATLAS Inner Detector will be replaced with a fully silicon based detector called Inner Tracker (ITk) before the start of the High Luminosity-LHC project (HL-LHC) in 2026. To cope with the harsh environment expected at the HL-LHC, new approaches are being developed for pixel detector based on CMOS pixel techology. Such detectors provide charge collection, analog and digital amplification in the same silicon bulk. The radiation hardness is obtained with multiple nested wells that have embedded the CMOS electronics with sufficient shielding. The goal of this programme is to demonstrate that depleted CMOS pixels are suitable for high rate, fast timing and high radiation operation at the LHC. A number of alternative solutions have been explored and characterised, and are presented in this document.

  11. An introduction to deep submicron CMOS for vertex applications

    CERN Document Server

    Campbell, M; Cantatore, E; Faccio, F; Heijne, Erik H M; Jarron, P; Santiard, Jean-Claude; Snoeys, W; Wyllie, K

    2001-01-01

    Microelectronics has become a key enabling technology in the development of tracking detectors for High Energy Physics. Deep submicron CMOS is likely to be extensively used in all future tracking systems. Radiation tolerance in the Mrad region has been achieved and complete readout chips comprising many millions of transistors now exist. The choice of technology is dictated by market forces but the adoption of deep submicron CMOS for tracking applications still poses some challenges. The techniques used are reviewed and some of the future challenges are discussed.

  12. Gamma and Proton-Induced Dark Current Degradation of 5T CMOS Pinned Photodiode 0.18 mu{m} CMOS Image Sensors

    Science.gov (United States)

    Martin, E.; Nuns, T.; David, J.-P.; Gilard, O.; Vaillant, J.; Fereyre, P.; Prevost, V.; Boutillier, M.

    2014-02-01

    The radiation tolerance of a 0.18 μm technology CMOS commercial image sensor has been evaluated with Co60 and proton irradiations. The effects of protons on the hot pixels and dynamic bias and duty cycle conditions during gamma irradiations are studied.

  13. A monolithic 180 nm CMOS dosimeter for In Vivo Dosimetry medical application

    International Nuclear Information System (INIS)

    Villani, E.G.; Crepaldi, M.; DeMarchi, D.; Gabrielli, A.; Khan, A.; Pikhay, E.; Roizin, Y.; Rosenfeld, A.; Zhang, Z.

    2014-01-01

    The design and development of a monolithic system-on-chip dosimeter fabricated in a standard 180 nm CMOS technology is described. The device is intended for real time In Vivo measurement of dose of radiation during radiotherapy sessions. Owing to its proposed small size, of approximately 1 mm 3 , such solution could be made in-body implantable and, as such, provide a much-enhanced high-resolution, real-time dose measurement for quality assurance in radiation therapy. The device transmits the related information on dose of radiation wirelessly to an external receiver operating in the MICS band. The various phases of this two years project, started in 2011, including the design and development of radiation sensors and integrated RF to perform the readout, will be described. - Highlights: • A novel monolithic CMOS dosimeter of size of 1 mm 3 has been proposed. • Three different fabrications using a CMOS 180 nm technology have been carried out. • Radiation tests results showed a sensitivity of 1 cGy with accuracy better than 3%. • Preliminary RF tests showed that an RF signal is detectable in free air

  14. Photoresponse analysis of the CMOS photodiodes for CMOS x-ray image sensor

    Energy Technology Data Exchange (ETDEWEB)

    Kim, Young Soo; Ha, Jang Ho; Kim, Han Soo; Yeo, Sun Mok [Korea Atomic Energy Research Institute, Daejeon (Korea, Republic of)

    2012-11-15

    Although in the short term CMOS active pixel sensors (APSs) cannot compete with the conventionally used charge coupled devices (CCDs) for high quality scientific imaging, recent development in CMOS APSs indicate that CMOS performance level of CCDs in several domains. CMOS APSs possess thereby a number of advantages such as simpler driving requirements and low power operation. CMOS image sensors can be processed in standard CMOS technologies and the potential of on-chip integration of analog and digital circuitry makes them more suitable for several vision systems where system cost is of importance. Moreover, CMOS imagers can directly benefit from on-going technological progress in the field of CMOS technologies. Due to these advantages, the CMOS APSs are currently being investigated actively for various applications such as star tracker, navigation camera and X-ray imaging etc. In most detection systems, it is thought that the sensor is most important, since this decides the signal and noise level. So, in CMOS APSs, the pixel is very important compared to other functional blocks. In order to predict the performance of such image sensor, a detailed understanding of the photocurrent generation in the photodiodes that comprise the CMOS APS is required. In this work, we developed the analytical model that can calculate the photocurrent generated in CMOS photodiode comprising CMOS APSs. The photocurrent calculations and photo response simulations with respect to the wavelength of the incident photon were performed using this model for four types of photodiodes that can be fabricated in standard CMOS process. n{sup +}/p{sup -}sub and n{sup +}/p{sup -}epi/p{sup -}sub photodiode show better performance compared to n{sup -}well/p{sup -}sub and n{sup -}well/p{sup -}epi/p{sup -}sub due to the wider depletion width. Comparing n{sup +}/p{sup -}sub and n{sup +}/p{sup -}epi/p{sup -}sub photodiode, n{sup +}/p{sup -}sub has higher photo-responsivity in longer wavelength because of

  15. Photoresponse analysis of the CMOS photodiodes for CMOS x-ray image sensor

    International Nuclear Information System (INIS)

    Kim, Young Soo; Ha, Jang Ho; Kim, Han Soo; Yeo, Sun Mok

    2012-01-01

    Although in the short term CMOS active pixel sensors (APSs) cannot compete with the conventionally used charge coupled devices (CCDs) for high quality scientific imaging, recent development in CMOS APSs indicate that CMOS performance level of CCDs in several domains. CMOS APSs possess thereby a number of advantages such as simpler driving requirements and low power operation. CMOS image sensors can be processed in standard CMOS technologies and the potential of on-chip integration of analog and digital circuitry makes them more suitable for several vision systems where system cost is of importance. Moreover, CMOS imagers can directly benefit from on-going technological progress in the field of CMOS technologies. Due to these advantages, the CMOS APSs are currently being investigated actively for various applications such as star tracker, navigation camera and X-ray imaging etc. In most detection systems, it is thought that the sensor is most important, since this decides the signal and noise level. So, in CMOS APSs, the pixel is very important compared to other functional blocks. In order to predict the performance of such image sensor, a detailed understanding of the photocurrent generation in the photodiodes that comprise the CMOS APS is required. In this work, we developed the analytical model that can calculate the photocurrent generated in CMOS photodiode comprising CMOS APSs. The photocurrent calculations and photo response simulations with respect to the wavelength of the incident photon were performed using this model for four types of photodiodes that can be fabricated in standard CMOS process. n + /p - sub and n + /p - epi/p - sub photodiode show better performance compared to n - well/p - sub and n - well/p - epi/p - sub due to the wider depletion width. Comparing n + /p - sub and n + /p - epi/p - sub photodiode, n + /p - sub has higher photo-responsivity in longer wavelength because of the higher electron diffusion current

  16. Radiation Hardened Structured ASIC Platform for Rapid Chip Development for Very High Speed System on a Chip (SoC) and Complex Digital Logic Systems, Phase I

    Data.gov (United States)

    National Aeronautics and Space Administration — Radiation Hardened Application Specific Integrated Circuits (ASICs) provide for the highest performance, lowest power and size for Space Missions. In order to...

  17. Geant4-based simulations of charge collection in CMOS Active Pixel Sensors

    International Nuclear Information System (INIS)

    Esposito, M.; Allinson, N.M.; Price, T.; Anaxagoras, T.

    2017-01-01

    Geant4 is an object-oriented toolkit for the simulation of the interaction of particles and radiation with matter. It provides a snapshot of the state of a simulated particle in time, as it travels through a specified geometry. One important area of application is the modelling of radiation detector systems. Here, we extend the abilities of such modelling to include charge transport and sharing in pixelated CMOS Active Pixel Sensors (APSs); though similar effects occur in other pixel detectors. The CMOS APSs discussed were developed in the framework of the PRaVDA consortium to assist the design of custom sensors to be used in an energy-range detector for proton Computed Tomography (pCT). The development of ad-hoc classes, providing a charge transport model for a CMOS APS and its integration into the standard Geant4 toolkit, is described. The proposed charge transport model includes, charge generation, diffusion, collection, and sharing across adjacent pixels, as well as the full electronic chain for a CMOS APS. The proposed model is validated against experimental data acquired with protons in an energy range relevant for pCT.

  18. Photon imaging using post-processed CMOS chips

    NARCIS (Netherlands)

    Melai, J.

    2010-01-01

    This thesis presents our work on an integrated photon detector made by post-processing of CMOS sensor arrays. The aim of the post-processing is to combine all elements of the detector into a single monolithic device. These elements include a photocathode to convert photon radiation into electronic

  19. First tests of a novel radiation hard CMOS sensor process for Depleted Monolithic Active Pixel Sensors

    Science.gov (United States)

    Pernegger, H.; Bates, R.; Buttar, C.; Dalla, M.; van Hoorne, J. W.; Kugathasan, T.; Maneuski, D.; Musa, L.; Riedler, P.; Riegel, C.; Sbarra, C.; Schaefer, D.; Schioppa, E. J.; Snoeys, W.

    2017-06-01

    The upgrade of the ATLAS [1] tracking detector for the High-Luminosity Large Hadron Collider (LHC) at CERN requires novel radiation hard silicon sensor technologies. Significant effort has been put into the development of monolithic CMOS sensors but it has been a challenge to combine a low capacitance of the sensing node with full depletion of the sensitive layer. Low capacitance brings low analog power. Depletion of the sensitive layer causes the signal charge to be collected by drift sufficiently fast to separate hits from consecutive bunch crossings (25 ns at the LHC) and to avoid losing the charge by trapping. This paper focuses on the characterization of charge collection properties and detection efficiency of prototype sensors originally designed in the framework of the ALICE Inner Tracking System (ITS) upgrade [2]. The prototypes are fabricated both in the standard TowerJazz 180nm CMOS imager process [3] and in an innovative modification of this process developed in collaboration with the foundry, aimed to fully deplete the sensitive epitaxial layer and enhance the tolerance to non-ionizing energy loss. Sensors fabricated in standard and modified process variants were characterized using radioactive sources, focused X-ray beam and test beams before and after irradiation. Contrary to sensors manufactured in the standard process, sensors from the modified process remain fully functional even after a dose of 1015neq/cm2, which is the the expected NIEL radiation fluence for the outer pixel layers in the future ATLAS Inner Tracker (ITk) [4].

  20. First tests of a novel radiation hard CMOS sensor process for Depleted Monolithic Active Pixel Sensors

    International Nuclear Information System (INIS)

    Pernegger, H.; Hoorne, J.W. van; Kugathasan, T.; Musa, L.; Riedler, P.; Riegel, C.; Schaefer, D.; Schioppa, E.J.; Snoeys, W.; Bates, R.; Buttar, C.; Maneuski, D.; Dalla, M.; Sbarra, C.

    2017-01-01

    The upgrade of the ATLAS [1] tracking detector for the High-Luminosity Large Hadron Collider (LHC) at CERN requires novel radiation hard silicon sensor technologies. Significant effort has been put into the development of monolithic CMOS sensors but it has been a challenge to combine a low capacitance of the sensing node with full depletion of the sensitive layer. Low capacitance brings low analog power. Depletion of the sensitive layer causes the signal charge to be collected by drift sufficiently fast to separate hits from consecutive bunch crossings (25 ns at the LHC) and to avoid losing the charge by trapping. This paper focuses on the characterization of charge collection properties and detection efficiency of prototype sensors originally designed in the framework of the ALICE Inner Tracking System (ITS) upgrade [2]. The prototypes are fabricated both in the standard TowerJazz 180nm CMOS imager process [3] and in an innovative modification of this process developed in collaboration with the foundry, aimed to fully deplete the sensitive epitaxial layer and enhance the tolerance to non-ionizing energy loss. Sensors fabricated in standard and modified process variants were characterized using radioactive sources, focused X-ray beam and test beams before and after irradiation. Contrary to sensors manufactured in the standard process, sensors from the modified process remain fully functional even after a dose of 10"1"5 n _e_q/cm"2, which is the the expected NIEL radiation fluence for the outer pixel layers in the future ATLAS Inner Tracker (ITk) [4].

  1. Radiation tolerance study of a commercial 65 nm CMOS technology for high energy physics applications

    Energy Technology Data Exchange (ETDEWEB)

    Ding, Lili, E-mail: lili03.ding@gmail.com [Department of Information Engineering, Padova University, Via Gradenigo 6/B, 35131 Padova (Italy); INFN, Padova, Via Marzolo 8, 35131 Padova (Italy); State Key Laboratory of Pulsed Radiation Simulation and Effect, Northwest Institute of Nuclear Technology, Xi' an (China); Gerardin, Simone [Department of Information Engineering, Padova University, Via Gradenigo 6/B, 35131 Padova (Italy); INFN, Padova, Via Marzolo 8, 35131 Padova (Italy); Bagatin, Marta [Department of Information Engineering, Padova University, Via Gradenigo 6/B, 35131 Padova (Italy); Bisello, Dario [Department of Physics and Astronomy, Padova University, Via Marzolo 8, 35131 Padova (Italy); INFN, Padova, Via Marzolo 8, 35131 Padova (Italy); Mattiazzo, Serena [Department of Physics and Astronomy, Padova University, Via Marzolo 8, 35131 Padova (Italy); Paccagnella, Alessandro [Department of Information Engineering, Padova University, Via Gradenigo 6/B, 35131 Padova (Italy); INFN, Padova, Via Marzolo 8, 35131 Padova (Italy)

    2016-09-21

    This paper reports the radiation tolerance study of a commercial 65 nm technology, which is a strong candidate for the Large Hadron Collider applications. After exposure to 3 MeV protons till 1 Grad dose, the 65 nm CMOS transistors, especially the pMOSFETs, showed severe long-term degradation mainly in the saturation drain currents. There were some differences between the degradation levels in the nMOSFETs and the pMOSFETs, which were likely attributed to the positive charges trapped in the gate spacers. After exposure to heavy ions till multiple strikes, the pMOSFETs did not show any sudden loss of drain currents, the degradations in the characteristics were negligible.

  2. Contribution to the study of ionizing radiation effects on bipolar technologies: application to the hardening of integrated circuits

    International Nuclear Information System (INIS)

    Briand, R.

    2001-01-01

    The use of analog integrated circuits in radiation environments raises the problem of their behaviour with respect to the different effects induced by particles and radiations. The first chapter of this thesis presents the origins of radiations and the different topologies of bipolar transistors. The effects of ionizing radiations on bipolar components, like cumulative dose, dose rates, and single events, are detailed in three distinct chapters with the same scientifical approach. The simulation of the physical degradation phenomena of the components allows to establish original electrical models coming from the understanding of the induced mechanisms. These models are used to evaluate the degradations occurring in linear analogic circuits. Common and original hardening methods are presented, some of which are applied to bipolar integrated circuit technologies. Finally, experimental laser beam test techniques are presented, which are used to reproduce the dose rate and the single events. (J.S.)

  3. A brief review of cavity swelling and hardening in irradiated copper and copper alloys

    International Nuclear Information System (INIS)

    Zinkle, S.J.

    1990-01-01

    The literature on radiation-induced swelling and hardening in copper and its alloy is reviewed. Void formation does not occur during irradiation of copper unless suitable impurity atoms such as oxygen or helium are present. Void formation occurs for neutron irradiation temperatures of 180 to 550 degree C, with peak swelling occurring at ∼320 degree C for irradiation at a damage rate of 2 x 10 -7 dpa/s. The post-transient swelling rate has been measured to be ∼0.5%/dpa at temperatures near 400 degree C. Dispersion-strengthened copper has been found to be very resistant to void swelling due to the high sink density associated with the dispersion-stabilized dislocation structure. Irradiation of copper at temperatures below 400 degree C generally causes an increase in strength due to the formation of defect clusters which inhibit dislocation motion. The radiation hardening can be adequately described by Seeger's dispersed barrier model, with a barrier strength for small defect clusters of α ∼ 0.2. The radiation hardening apparently saturates for fluences greater than ∼10 24 n/m 2 during irradiation at room temperature due to a saturation of the defect cluster density. Grain boundaries can modify the hardening behavior by blocking the transmission of dislocation slip bands, leading to a radiation- modified Hall-Petch relation between yield strength and grain size. Radiation-enhanced recrystallization can lead to softening of cold-worked copper alloys at temperatures above 300 degree C

  4. Radiometric assessment of quality of concrete mix with respect to hardened concrete strength

    International Nuclear Information System (INIS)

    Czechowski, J.

    1983-01-01

    The experiments have confirmed the relationship between the intensity of backscattered gamma radiation and the density of fresh concrete, and also between the flow of backscattered fast neutrons and the water content. From the said two parameters it is possible to derive the compression strength of concrete over the determined period of mix hardening, e.g., after 28 days. For a certain composition of concrete it is possible to derive empirical relations between the intensity of backscattered gamma radiation and neutrons and concrete strength after hardening and to construct suitable nomograms. (Ha)

  5. Electron bombardment cross-linking of coating materials. Pt.2. Analysis of patent literature on formulating radiation-hardenable binders

    International Nuclear Information System (INIS)

    Mileo, J.-C.

    1976-01-01

    The process of drying paints and varnishes by electron irradiation is analyzed from the chemical standpoint. A review is made of the different methods of producing radiation hardenable resins that have resulted in abundant patent literature. These resins are classified according to the nature of the reactive unsaturations they contain: unsaturations of the maleic ester type; simple (meth)acrylic esters and amides; β-hydroxyl (meth)acrylic esters, their (un)saturated esters and other derivatives; siloxanes; maleimides; allylic unsaturations; saturated resins [fr

  6. Changed of the working capacity of CMOS integrated circuits under ionizing radiations effect of low and high dose rate; Izmeneniya rabotosposobnosti KMOP integral`nykh mikroskhem pri vozdejstvii ioniziruyushchikh izluchenij s nizkoj i vysokoj intensivnost`yu

    Energy Technology Data Exchange (ETDEWEB)

    Bogatyrev, Yu V; Korshunov, F P

    1994-12-31

    Results of experimental investigations into the working capacity of different types of integrated CMOS circuits under effect of electron and gamma radiation are presented. Methods for evaluating IC CMOS under low irradiation intensity using the microcircuit testing under hugh intensity or at increased temperature with regard to the processes of parameter reconstruction after irradiation are proposed.

  7. The secondary hardening phenomenon in strain-hardened MP35N alloy

    International Nuclear Information System (INIS)

    Asgari, S.; El-Danaf, E.; Shaji, E.; Kalidindi, S.R.; Doherty, R.D.

    1998-01-01

    Mechanical testing and microscopy techniques were used to investigate the influence of aging on the structure and strengthening of MP35N alloy. It was confirmed that aging the deformed material at 600 C for 4 h provided additional strengthening, here referred to as secondary hardening, in addition to the primary strain hardening. The secondary hardening phenomenon was shown to be distinctly different from typical age hardening processes in that it only occurred in material deformed beyond a certain cold work level. At moderate strains, aging caused a shift in the entire stress-strain curve of the annealed material to higher stresses while at high strains, it produced shear localization and limited work softening. The secondary hardening increment was also found to be grain size dependent. The magnitude of the secondary hardening appeared to be controlled by the flow stress in the strain hardened material. A model is proposed to explain the observations and is supported by direct experimental evidence. The model is based on formation of h.c.p. nuclei through the Suzuki mechanism, that is segregation of solute atoms to stacking faults, on aging the strain hardened material. The h.c.p. precipitates appear to thicken only in the presence of high dislocation density produced by prior cold work

  8. Effects of initial microstructure and helium production on radiation hardening in F82H Steels

    Energy Technology Data Exchange (ETDEWEB)

    Okubo, N.; Wakai, E.; Takada, F.; Jitsukawa, S. [Japan Atomic Energy Agency, Naga-gun, Ibaraki-ken (Japan); Katoh, Y. [Oak Ridge Noational Laboratory, TN (United States)

    2007-07-01

    Full text of publication follows: Fission neutron irradiation to steels doped with isotope boron-10 is frequently conducted to study effects of the helium production on mechanical properties. The intrinsic mechanical properties of F82H steels could have been changed due to the boron doping. Recently, we reported that co-doping with boron and nitrogen to F82H (F82H+B+N) improved the mechanical properties of F82H doped only with boron. The mechanical properties of F82H+B+N are successfully comparable with the non-doped F82H before irradiation. In order to evaluate the effects of initial microstructure and helium production on radiation hardening, F82H and F82H+B+N were irradiate d Specimens used in this study were standard F82H martensitic steels, F82H steels doped with 60 mass ppm {sup 10}B and 200 ppm N (F82H+10B+N) and F82H steels doped with 60 mass ppm {sup 11}B and 200 ppm N (F82H+11B+N). Initial microstructures were changed by tempering conditions, and the tempering temperatures were at 700, 750 and 780 deg. C. Irradiation was performed at nominally 250 deg. C to 2 dpa in JMTR. Tensile properties were measured for the specimens before and after irradiation. Change of yield stress due to the irradiation in the F82H+11B+N steels depended strongly on the initial microstructure and hardness before irradiation. The radiation hardening due to helium production in the F82H+10B+N steels was less than 60 MPa in these experiments. Size of dimple in the fracture surface of specimen with helium production was larger than that with non-helium production. (authors)

  9. Simultaneous surface engineering and bulk hardening of precipitation hardening stainless steel

    DEFF Research Database (Denmark)

    Frandsen, Rasmus Berg; Christiansen, Thomas; Somers, Marcel A. J.

    2006-01-01

    This article addresses simultaneous bulk precipitation hardening and low temperature surface engineering of two commercial precipitation hardening stainless steels: Sandvik Nanoflex® and Uddeholm Corrax®. Surface engineering comprised gaseous nitriding or gaseous carburising. Microstructural....... The duration and temperature of the nitriding/carburising surface hardening treatment can be chosen in agreement with the thermal treatment for obtaining optimal bulk hardness in the precipitation hardening stainless steel....... characterisation of the cases developed included X-ray diffraction analysis, reflected light microscopy and micro-hardness testing. It was found that the incorporation of nitrogen or carbon resulted in a hardened case consisting of a combination of (tetragonal) martensite and expanded (cubic) austenite...

  10. Hardening and microstructural evolution of A533b steels irradiated with Fe ions and electrons

    Energy Technology Data Exchange (ETDEWEB)

    Watanabe, H., E-mail: watanabe@riam.kyushu-u.ac.jp [Research Institute for Applied Mechanics, Kyushu University, 6-1, Kasuga-kouenn, Kasugashi, Fukuoka, 816-8580 (Japan); Arase, S. [Interdisciplinary Graduate School of Kyushu University, 6-1, Kasuga-kouenn, Kasugashi, Fukuoka, 816-8580 (Japan); Yamamoto, T.; Wells, P. [Dept. Chemical Engineering, UCSB Engineering II, RM3357, Santa Barbara, CA, 93106-5080 (United States); Onishi, T. [Interdisciplinary Graduate School of Kyushu University, 6-1, Kasuga-kouenn, Kasugashi, Fukuoka, 816-8580 (Japan); Odette, G.R. [Dept. Chemical Engineering, UCSB Engineering II, RM3357, Santa Barbara, CA, 93106-5080 (United States)

    2016-04-01

    Radiation hardening and embrittlement of A533B steels is heavily dependent on the Cu content. In this study, to investigate the effect of copper on the microstructural evolution of these materials, A533B steels with different Cu levels were irradiated with 2.4 MeV Fe ions and 1.0 MeV electrons. Ion irradiation was performed from room temperature (RT) to 350 °C with doses up to 1 dpa. At RT and 290 °C, low dose (<0.1 dpa) hardening trend corresponded with ΔH ∝ (dpa){sup n}, with n initially approximately 0.5 and consistent with a barrier hardening mechanism, but saturating at ≈0.1 dpa. At higher dose levels, the radiation-induced hardening exhibited a strong Cu content dependence at 290 °C, but not at 350 °C. Electron irradiation using high-voltage electron microscopy revealed the growth of interstitial-type dislocation loops and enrichment of Ni, Mn, and Si in the vicinities of pre-existing dislocations at doses for which the radiation-induced hardness due to ion irradiation was prominent.

  11. CMOS sensors for atmospheric imaging

    Science.gov (United States)

    Pratlong, Jérôme; Burt, David; Jerram, Paul; Mayer, Frédéric; Walker, Andrew; Simpson, Robert; Johnson, Steven; Hubbard, Wendy

    2017-09-01

    Recent European atmospheric imaging missions have seen a move towards the use of CMOS sensors for the visible and NIR parts of the spectrum. These applications have particular challenges that are completely different to those that have driven the development of commercial sensors for applications such as cell-phone or SLR cameras. This paper will cover the design and performance of general-purpose image sensors that are to be used in the MTG (Meteosat Third Generation) and MetImage satellites and the technology challenges that they have presented. We will discuss how CMOS imagers have been designed with 4T pixel sizes of up to 250 μm square achieving good charge transfer efficiency, or low lag, with signal levels up to 2M electrons and with high line rates. In both devices a low noise analogue read-out chain is used with correlated double sampling to suppress the readout noise and give a maximum dynamic range that is significantly larger than in standard commercial devices. Radiation hardness is a particular challenge for CMOS detectors and both of these sensors have been designed to be fully radiation hard with high latch-up and single-event-upset tolerances, which is now silicon proven on MTG. We will also cover the impact of ionising radiation on these devices. Because with such large pixels the photodiodes have a large open area, front illumination technology is sufficient to meet the detection efficiency requirements but with thicker than standard epitaxial silicon to give improved IR response (note that this makes latch up protection even more important). However with narrow band illumination reflections from the front and back of the dielectric stack on the top of the sensor produce Fabry-Perot étalon effects, which have been minimised with process modifications. We will also cover the addition of precision narrow band filters inside the MTG package to provide a complete imaging subsystem. Control of reflected light is also critical in obtaining the

  12. A vertex detector for the International Linear Collider based on CMOS sensors

    Energy Technology Data Exchange (ETDEWEB)

    Besson, Auguste [Institut de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France)]. E-mail: abesson@in2p3.fr; Claus, Gilles [Institut de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); Colledani, Claude [Institut de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); Degerli, Yavuz [CEA Saclay, DAPNIA, Gif-sur-Yvette Cedex (France); Deptuch, Grzegorz [Institut de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); Deveaux, Michael [Institut de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France) and GSI, Planckstrasse 1, Darmstadt 64291 (Germany); Dulinski, Wojciech [Institut de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); Fourches, Nicolas [CEA Saclay, DAPNIA, Gif-sur-Yvette Cedex (France); Goffe, Mathieu [Institut de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); Grandjean, Damien [Institut de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); Guilloux, Fabrice [Institut de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); Heini, Sebastien [Institut de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France)]|[GSI, Planckstrasse 1, Darmstadt 64291 (Germany); Himmi, Abdelkader; Hu, Christine; Jaaskelainen, Kimmo [Institut de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); Li, Yan; Lutz, Pierre; Orsini, Fabienne [CEA Saclay, DAPNIA, Gif-sur-Yvette Cedex (France); Pellicioli, Michel; Scopelliti, Emanuele; Shabetai, Alexandre; Szelezniak, Michal; Valin, Isabelle [Institut de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); Winter, Marc [Institut de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France)]. E-mail: marc.winter@ires.in2p3.f

    2006-11-30

    The physics programme at the International Linear Collider (ILC) calls for a vertex detector (VD) providing unprecedented flavour tagging performances, especially for c-quarks and {tau} leptons. This requirement makes a very granular, thin and multi-layer VD installed very close to the interaction region mandatory. Additional constraints, mainly on read-out speed and radiation tolerance, originate from the beam background, which governs the occupancy and the radiation level the detector should be able to cope with. CMOS sensors are being developed to fulfil these requirements. This report addresses the ILC requirements (highly related to beamstrahlung), the main advantages and features of CMOS sensors, the demonstrated performances and the specific aspects of a VD based on this technology. The status of the main R and D directions (radiation tolerance, thinning procedure and read-out speed) are also presented.

  13. Testbeam results of irradiated ams H18 HV-CMOS pixel sensor prototypes

    Science.gov (United States)

    Benoit, M.; Braccini, S.; Casse, G.; Chen, H.; Chen, K.; Di Bello, F. A.; Ferrere, D.; Golling, T.; Gonzalez-Sevilla, S.; Iacobucci, G.; Kiehn, M.; Lanni, F.; Liu, H.; Meng, L.; Merlassino, C.; Miucci, A.; Muenstermann, D.; Nessi, M.; Okawa, H.; Perić, I.; Rimoldi, M.; Ristić, B.; Barrero Pinto, M. Vicente; Vossebeld, J.; Weber, M.; Weston, T.; Wu, W.; Xu, L.; Zaffaroni, E.

    2018-02-01

    HV-CMOS pixel sensors are a promising option for the tracker upgrade of the ATLAS experiment at the LHC, as well as for other future tracking applications in which large areas are to be instrumented with radiation-tolerant silicon pixel sensors. We present results of testbeam characterisations of the 4th generation of Capacitively Coupled Pixel Detectors (CCPDv4) produced with the ams H18 HV-CMOS process that have been irradiated with different particles (reactor neutrons and 18 MeV protons) to fluences between 1× 1014 and 5× 1015 1-MeV- neq. The sensors were glued to ATLAS FE-I4 pixel readout chips and measured at the CERN SPS H8 beamline using the FE-I4 beam telescope. Results for all fluences are very encouraging with all hit efficiencies being better than 97% for bias voltages of 85 V. The sample irradiated to a fluence of 1× 1015 neq—a relevant value for a large volume of the upgraded tracker—exhibited 99.7% average hit efficiency. The results give strong evidence for the radiation tolerance of HV-CMOS sensors and their suitability as sensors for the experimental HL-LHC upgrades and future large-area silicon-based tracking detectors in high-radiation environments.

  14. Study of hard X-ray dose enhancement effects for some kinds of semiconductor devices

    CERN Document Server

    Guo Hong Xia; Chen Yu Sheng; Zhou Hui; He Chao Hui; Xie Ya Ning; Huang Yu Ying; He Wei; Hu Tian Dou

    2002-01-01

    Experimental results of X-ray dose enhancement effects are given for CMOS4069 and floating gate ROMs irradiated in Beijing Synchrotron Radiation Facility and in cobalt source. Shift of threshold voltage vs. total dose for CMOS4069 and the errors vs. total dose for 28f256 and 29c256 have been tested on line and the equivalent relation of total dose damage under the same accumulated dose is provided comparing the response of devices irradiated by X-ray and gamma-ray source. These results can be provided for X-ray radiation hardening technology as an effective evaluation data

  15. Layout techniques to enhance the radiation tolerance of standard CMOS technologies demonstrated on a pixel detector readout chip

    CERN Document Server

    Snoeys, W; Burns, M; Campbell, M; Cantatore, E; Carrer, N; Casagrande, L; Cavagnoli, A; Dachs, C; Di Liberto, S; Formenti, F; Giraldo, A; Heijne, Erik H M; Jarron, Pierre; Letheren, M F; Marchioro, A; Martinengo, P; Meddi, F; Mikulec, B; Morando, M; Morel, M; Noah, E; Paccagnella, A; Ropotar, I; Saladino, S; Sansen, Willy; Santopietro, F; Scarlassara, F; Segato, G F; Signe, P M; Soramel, F; Vannucci, Luigi; Vleugels, K

    2000-01-01

    A new pixel readout prototype has been developed at CERN for high- energy physics applications. This full mixed mode circuit has been implemented in a commercial 0.5 mu m CMOS technology. Its radiation tolerance has been enhanced by designing all NMOS transistors in enclosed geometry and introducing guardrings wherever necessary. The technique is explained and its effectiveness demonstrated on various irradiation measurements on individual transistors and on the prototype. Circuit performance started to degrade only after a total dose of 600 krad-1.7 Mrad depending on the type of radiation. 10 keV X-rays, /sup 60/Co gamma-rays, 6.5 MeV protons, and minimum ionizing particles were used. Implications of this layout approach on the circuit design and perspectives for even deeper submicron technologies are discussed. (20 refs).

  16. Radiation effects in semiconductors

    CERN Document Server

    2011-01-01

    There is a need to understand and combat potential radiation damage problems in semiconductor devices and circuits. Written by international experts, this book explains the effects of radiation on semiconductor devices, radiation detectors, and electronic devices and components. These contributors explore emerging applications, detector technologies, circuit design techniques, new materials, and innovative system approaches. The text focuses on how the technology is being used rather than the mathematical foundations behind it. It covers CMOS radiation-tolerant circuit implementations, CMOS pr

  17. A hardenability test proposal

    Energy Technology Data Exchange (ETDEWEB)

    Murthy, N.V.S.N. [Ingersoll-Rand (I) Ltd., Bangalore (India)

    1996-12-31

    A new approach for hardenability evaluation and its application to heat treatable steels will be discussed. This will include an overview and deficiencies of the current methods and discussion on the necessity for a new approach. Hardenability terminology will be expanded to avoid ambiguity and over-simplification as encountered with the current system. A new hardenability definition is proposed. Hardenability specification methods are simplified and rationalized. The new hardenability evaluation system proposed here utilizes a test specimen with varying diameter as an alternative to the cylindrical Jominy hardenability test specimen and is readily applicable to the evaluation of a wide variety of steels with different cross-section sizes.

  18. Development of CMOS pixel sensors for tracking and vertexing in high energy physics experiments

    CERN Document Server

    Senyukov, Serhiy; Besson, Auguste; Claus, Giles; Cousin, Loic; Dulinski, Wojciech; Goffe, Mathieu; Hippolyte, Boris; Maria, Robert; Molnar, Levente; Sanchez Castro, Xitzel; Winter, Marc

    2014-01-01

    CMOS pixel sensors (CPS) represent a novel technological approach to building charged particle detectors. CMOS processes allow to integrate a sensing volume and readout electronics in a single silicon die allowing to build sensors with a small pixel pitch ($\\sim 20 \\mu m$) and low material budget ($\\sim 0.2-0.3\\% X_0$) per layer. These characteristics make CPS an attractive option for vertexing and tracking systems of high energy physics experiments. Moreover, thanks to the mass production industrial CMOS processes used for the manufacturing of CPS the fabrication construction cost can be significantly reduced in comparison to more standard semiconductor technologies. However, the attainable performance level of the CPS in terms of radiation hardness and readout speed is mostly determined by the fabrication parameters of the CMOS processes available on the market rather than by the CPS intrinsic potential. The permanent evolution of commercial CMOS processes towards smaller feature sizes and high resistivity ...

  19. Comparison of Thermal Creep Strain Calculation Results Using Time Hardening and Strain Hardening Rules

    International Nuclear Information System (INIS)

    Kim, Junehyung; Cheon, Jinsik; Lee, Byoungoon; Lee, Chanbock

    2014-01-01

    One of the design criteria for the fuel rod in PGSFR is the thermal creep strain of the cladding, because the cladding is exposed to a high temperature for a long time during reactor operation period. In general, there are two kind of calculation scheme for thermal creep strain: time hardening and strain hardening rules. In this work, thermal creep strain calculation results for HT9 cladding by using time hardening and strain hardening rules are compared by employing KAERI's current metallic fuel performance analysis code, MACSIS. Also, thermal creep strain calculation results by using ANL's metallic fuel performance analysis code, LIFE-METAL which adopts strain hardening rule are compared with those by using MACSIS. Thermal creep strain calculation results for HT9 cladding by using time hardening and strain hardening rules were compared by employing KAERI's current metallic fuel performance analysis code, MACSIS. Also, thermal creep strain calculation results by using ANL's metallic fuel performance analysis code, LIFE-METAL which adopts strain hardening rule were compared with those by using MACSIS. Tertiary creep started earlier in time hardening rule than in strain hardening rule. Also, calculation results by MACSIS with strain hardening and those obtained by using LIFE-METAL were almost identical to each other

  20. A capacitive CMOS-MEMS sensor designed by multi-physics simulation for integrated CMOS-MEMS technology

    Science.gov (United States)

    Konishi, Toshifumi; Yamane, Daisuke; Matsushima, Takaaki; Masu, Kazuya; Machida, Katsuyuki; Toshiyoshi, Hiroshi

    2014-01-01

    This paper reports the design and evaluation results of a capacitive CMOS-MEMS sensor that consists of the proposed sensor circuit and a capacitive MEMS device implemented on the circuit. To design a capacitive CMOS-MEMS sensor, a multi-physics simulation of the electromechanical behavior of both the MEMS structure and the sensing LSI was carried out simultaneously. In order to verify the validity of the design, we applied the capacitive CMOS-MEMS sensor to a MEMS accelerometer implemented by the post-CMOS process onto a 0.35-µm CMOS circuit. The experimental results of the CMOS-MEMS accelerometer exhibited good agreement with the simulation results within the input acceleration range between 0.5 and 6 G (1 G = 9.8 m/s2), corresponding to the output voltages between 908.6 and 915.4 mV, respectively. Therefore, we have confirmed that our capacitive CMOS-MEMS sensor and the multi-physics simulation will be beneficial method to realize integrated CMOS-MEMS technology.

  1. Effect of hardening on the crack growth rate of austenitic stainless steels in primary PWR conditions

    International Nuclear Information System (INIS)

    Castano, M.L.; Garcia, M.S.; Diego, G. de; Gomez-Briceno, D.; Francia, L.

    2002-01-01

    Intergranular cracking of non-sensitized materials, found in light water reactor (LWR) components exposed to neutron radiation, has been attributed to Irradiation Assisted Stress Corrosion Cracking (IASCC). Cracking of baffle former bolts, fabricated of AISI-316L and AISI-347, have been reported in some Europeans and US PWR plants. Examinations of removed bolts indicate the intergranular cracking characteristics can be associated with IASCC phenomena. Neutron radiation produce critical modifications of the microstructure and microchemical of stainless steels such hardening due to irradiation and Radiation Induce Segregation (RIS) at grain boundaries, among others. Chromium depletion at grain boundary due to RIS seems to justify the intergranular cracking of irradiated materials, both in plant and in lab tests, at high electrochemical corrosion potential (BWR-NWC environments), but it is not enough to explain cracking at low corrosion potential (BWR-HWC and PWR environments). In these latter conditions, hardening is considered a possible additional mechanism to explain the behavior of irradiated material. Radiation Hardening can be simulated in non irradiated material by mechanical deformation. Although some differences exists in the types of defects produced by radiation and mechanical deformation, it is accepted that the study of the stress corrosion behavior of unirradiated austenitic steels with different hardening levels would contribute to the understanding of IASCC mechanism. In order to evaluate the influence of hardening on the stress corrosion susceptibility of austenitic steels, crack growth rate tests with 316L and 347 stainless steels with nominal yield strengths from 500 to 900 MPa, produced by cold work are being carried out at 340 deg C in PWR conditions. Preliminary results indicate that crack propagation was obtained in the 316Lss and 347ss cold worked, even with a yield strength of 550 MPa. (authors)

  2. CMOS-based avalanche photodiodes for direct particle detection

    International Nuclear Information System (INIS)

    Stapels, Christopher J.; Squillante, Michael R.; Lawrence, William G.; Augustine, Frank L.; Christian, James F.

    2007-01-01

    Active Pixel Sensors (APSs) in complementary metal-oxide-semiconductor (CMOS) technology are augmenting Charge-Coupled Devices (CCDs) as imaging devices and cameras in some demanding optical imaging applications. Radiation Monitoring Devices are investigating the APS concept for nuclear detection applications and has successfully migrated avalanche photodiode (APD) pixel fabrication to a CMOS environment, creating pixel detectors that can be operated with internal gain as proportional detectors. Amplification of the signal within the diode allows identification of events previously hidden within the readout noise of the electronics. Such devices can be used to read out a scintillation crystal, as in SPECT or PET, and as direct-conversion particle detectors. The charge produced by an ionizing particle in the epitaxial layer is collected by an electric field within the diode in each pixel. The monolithic integration of the readout circuitry with the pixel sensors represents an improved design compared to the current hybrid-detector technology that requires wire or bump bonding. In this work, we investigate designs for CMOS APD detector elements and compare these to typical values for large area devices. We characterize the achievable detector gain and the gain uniformity over the active area. The excess noise in two different pixel structures is compared. The CMOS APD performance is demonstrated by measuring the energy spectra of X-rays from 55 Fe

  3. Effect of yield strength on stress corrosion crack propagation under PWR and BWR environments of hardened stainless steels

    Energy Technology Data Exchange (ETDEWEB)

    Castano, M.L.; Garcia, M.S.; Diego, G. de; Gomez-Briceno, D. [CIEMAT, Nuclear Fission Department, Structural Materials Program, Avda. Complutense 22, 28040 Madrid (Spain)

    2004-07-01

    Core components of light water reactor (LWR), mainly made of austenitic stainless steels (SS), subjected to stress and exposed to relatively high fast neutron flux may suffer a cracking process termed as Irradiation Assisted Stress Corrosion Cracking (IASCC). Neutron radiation leads to critical modifications in material characteristics, which can modify their stress corrosion cracking (SCC) response. Current knowledge highlights three fundamental factors, induced by radiation, as primary contributors to IASCC of core materials: Radiation Induced Segregation (RIS) at grain boundaries, Radiation Hardening and Radiolysis. Most of the existing literature on IASCC is focussed on the influence of RIS, mainly chromium depletion, which can promote IASCC in oxidizing environments, such a Boiling Water Reactor (BWR) under normal water chemistry. However, in non-oxidizing environments, such as primary water of Pressurized Water Reactor (PWR) or BWR hydrogen water chemistry, the role played by chromium depletion at grain boundary on IASCC behaviour of highly irradiated material is irrelevant. One important issue with limited study is the effect of radiation induced hardening. The role of hardening on IASCC is became stronger considered, especially for environments where other factors, like micro-chemistry, have no significant influence. To formulate the mechanism of IASCC, a well-established method is to isolate and quantify the effect of individual parameters. The use of unirradiated material and the simulation of the irradiation effects is a procedure used with success for evaluating the influence of irradiation effects. Radiation hardening can be simulated by mechanical deformation and, although some differences exist in the types of defects produced, it is believed that the study of the SCC behaviour of unirradiated materials with different hardening levels would contribute to the understanding of IASCC mechanism. In order to evaluate the influence of hardening on the

  4. Influence of Cooling Condition on the Performance of Grinding Hardened Layer in Grind-hardening

    Science.gov (United States)

    Wang, G. C.; Chen, J.; Xu, G. Y.; Li, X.

    2018-02-01

    45# steel was grinded and hardened on a surface grinding machine to study the effect of three different cooling media, including emulsion, dry air and liquid nitrogen, on the microstructure and properties of the hardened layer. The results show that the microstructure of material surface hardened with emulsion is pearlite and no hardened layer. The surface roughness is small and the residual stress is compressive stress. With cooling condition of liquid nitrogen and dry air, the specimen surface are hardened, the organization is martensite, the surface roughness is also not changed, but high hardness of hardened layer and surface compressive stress were obtained when grinding using liquid nitrogen. The deeper hardened layer grinded with dry air was obtained and surface residual stress is tensile stress. This study provides an experimental basis for choosing the appropriate cooling mode to effectively control the performance of grinding hardened layer.

  5. A MGy radiation-hardened sensor instrumentation link for nuclear reactor monitoring and remote handling

    Energy Technology Data Exchange (ETDEWEB)

    Verbeeck, Jens; Cao, Ying [KU Leuven - KUL, Div. LRD-MAGyICS, Kasteelpark Arenberg 10, 3001 Heverlee (Belgium); Van Uffelen, Marco; Mont Casellas, Laura; Damiani, Carlo; Morales, Emilio Ruiz; Santana, Roberto Ranz [Fusion for Energy - F4E, c/Josep,n deg. 2, Torres Diagonal Litoral, Ed. B3, 08019 Barcelona (Spain); Meek, Richard; Haist, Bernhard [Oxford Technologies Ltd. OTL, 7 Nuffield Way, Abingdon OX14 1RL (United Kingdom); De Cock, Wouter; Vermeeren, Ludo [SCK-CEN, Boeretang 200, 2400 Mol (Belgium); Steyaert, Michiel [KU Leuven, ESAT-MICAS, KasteelparkArenberg 10, 3001 Heverlee (Belgium); Leroux, Paul [KU Leuven, ESAT-MICAS, KasteelparkArenberg 10, 3001 Heverlee (Belgium)

    2015-07-01

    Decommissioning, dismantling and remote handling applications in nuclear facilities all require robotic solutions that are able to survive in radiation environments. Recently raised safety, radiation hardness and cost efficiency demands from both the nuclear regulatory and the society impose severe challenges in traditional methods. For example, in case of the dismantling of the Fukushima sites, solutions that survive accumulated doses higher than 1 MGy are mandatory. To allow remote operation of these tools in nuclear environments, electronics were used to be shielded with several centimeters of lead or even completely banned in these solutions. However, shielding electronics always leads to bulky and heavy solutions, which reduces the flexibility of robotic tools. It also requires longer repair time and produces extra waste further in a dismantling or decommissioning cycle. In addition, often in current reactor designs, due to size restrictions and the need to inspect very tight areas there are limitations to the use of shielding. A MGy radiation-hardened sensor instrumentation link developed by MAGyICS provides a solution to build a flexible, easy removable and small I and C module with MGy radiation tolerance without any shielding. Hereby it removes all these pains to implement electronics in robotic tools. The demonstrated solution in this poster is developed for ITER Remote Handling equipments operating in high radiation environments (>1 MGy) in and around the Tokamak. In order to obtain adequately accurate instrumentation and control information, as well as to ease the umbilical management, there is a need of front-end electronics that will have to be located close to those actuators and sensors on the remote handling tool. In particular, for diverter remote handling, it is estimated that these components will face gamma radiation up to 300 Gy/h (in-vessel) and a total dose of 1 MGy. The radiation-hardened sensor instrumentation link presented here, consists

  6. Radiation effects in LDD MOS devices

    International Nuclear Information System (INIS)

    Woodruff, R.L.; Adams, J.R.

    1987-01-01

    The purpose of this work is to investigate the response of lightly doped drain (LDD) n-channel transistors to ionizing radiation. Transistors were fabricated with conventional (non-LDD) and lightly doped drain (LDD) structures using both standard (non-hardened) and radiation hardened gate oxides. Characterization of the transistors began with a correlation of the total-dose effects due to 10 keV x-rays with Co-60 gamma rays. The authors find that for the gate oxides and transistor structures investigated in this work, 10 keV x-rays produce more fixed-charge guild-up in the gate oxide, and more interface charge than do Co-60 gamma rays. They determined that the radiation response of LDD transistors is similar to that of conventional (non-LDD) transistors. In addition, both standard and radiation-hardened transistors subjected to hot carrier stress before irradiation show a similar radiation response. After exposure to 1.0 x 10 6 rads(Si), non-hardened transistors show increased susceptibility to hot-carrier graduation, while the radiation-hardened transistors exhibit similar hot-carrier degradation to non-irradiated devices. The authors have demonstrated a fully-integrated radiation hardened process tht is solid to 1.0 x 10 6 rads(Si), and shows promise for achieving 1.0 x 10 7 rad(Si) total-dose capability

  7. Influence of transfer gate design and bias on the radiation hardness of pinned photodiode CMOS image sensors

    International Nuclear Information System (INIS)

    Goiffon, V.; Estribeau, M.; Cervantes, P.; Molina, R.; Magnan, P.; Gaillardin, M.

    2014-01-01

    The effects of Cobalt 60 gamma-ray irradiation on pinned photodiode (PPD) CMOS image sensors (CIS) are investigated by comparing the total ionizing dose (TID) response of several transfer gate (TG) and PPD designs manufactured using a 180 nm CIS process. The TID induced variations of charge transfer efficiency (CTE), pinning voltage, equilibrium full well capacity (EFWC), full well capacity (FWC) and dark current measured on the different pixel designs lead to the conclusion that only three degradation sources are responsible for all the observed radiation effects: the pre-metal dielectric (PMD) positive trapped charge, the TG sidewall spacer positive trapped charge and, with less influence, the TG channel shallow trench isolation (STI) trapped charge. The different FWC evolutions with TID presented here are in very good agreement with a recently proposed analytical model. This work also demonstrates that the peripheral STI is not responsible for the observed degradations and thus that the enclosed layout TG design does not improve the radiation hardness of PPD CIS. The results of this study also lead to the conclusion that the TG OFF voltage bias during irradiation has no influence on the radiation effects. Alternative design and process solutions to improve the radiation hardness of PPD CIS are discussed. (authors)

  8. Post-CMOS selective electroplating technique for the improvement of CMOS-MEMS accelerometers

    International Nuclear Information System (INIS)

    Liu, Yu-Chia; Tsai, Ming-Han; Fang, Weileun; Tang, Tsung-Lin

    2011-01-01

    This study presents a simple approach to improve the performance of the CMOS-MEMS capacitive accelerometer by means of the post-CMOS metal electroplating process. The metal layer can be selectively electroplated on the MEMS structures at low temperature and the thickness of the metal layer can be easily adjusted by this process. Thus the performance of the capacitive accelerometer (i.e. sensitivity, noise floor and the minimum detectable signal) can be improved. In application, the proposed accelerometers have been implemented using (1) the standard CMOS 0.35 µm 2P4M process by CMOS foundry, (2) Ti/Au seed layers deposition/patterning by MEMS foundry and (3) in-house post-CMOS electroplating and releasing processes. Measurements indicate that the sensitivity is improved 2.85-fold, noise is decreased near 1.7-fold and the minimum detectable signal is improved from 1 to 0.2 G after nickel electroplating. Moreover, unwanted structure deformation due to the temperature variation is significantly suppressed by electroplated nickel.

  9. CMOS/SOS RAM transient radiation upset and ''inversion'' effect investigation

    International Nuclear Information System (INIS)

    Nikiforov, A.Y.; Poljakov, I.V.

    1996-01-01

    The Complementary Metal-Oxide-Semiconductor/Silicon-on-Sapphire Random Access Memory (CMOS/SOS RAM) transient upset and inversion effect were investigated with pulsed laser, pulsed voltage generator and low-intensity light simulators. It was found that the inversion of information occurs due to memory cell photocurrents simultaneously with the power supply voltage drop transfer to memory cells outputs

  10. On-Line High Dose-Rate Gamma Ray Irradiation Test of the CCD/CMOS Cameras

    Energy Technology Data Exchange (ETDEWEB)

    Cho, Jai Wan; Jeong, Kyung Min [Korea Atomic Energy Research Institute, Daejeon (Korea, Republic of)

    2012-05-15

    In this paper, test results of gamma ray irradiation to CCD/CMOS cameras are described. From the CAMS (containment atmospheric monitoring system) data of Fukushima Dai-ichi nuclear power plant station, we found out that the gamma ray dose-rate when the hydrogen explosion occurred in nuclear reactors 1{approx}3 is about 160 Gy/h. If assumed that the emergency response robot for the management of severe accident of the nuclear power plant has been sent into the reactor area to grasp the inside situation of reactor building and to take precautionary measures against releasing radioactive materials, the CCD/CMOS cameras, which are loaded with the robot, serve as eye of the emergency response robot. In the case of the Japanese Quince robot system, which was sent to carry out investigating the unit 2 reactor building refueling floor situation, 7 CCD/CMOS cameras are used. 2 CCD cameras of Quince robot are used for the forward and backward monitoring of the surroundings during navigation. And 2 CCD (or CMOS) cameras are used for monitoring the status of front-end and back-end motion mechanics such as flippers and crawlers. A CCD camera with wide field of view optics is used for monitoring the status of the communication (VDSL) cable reel. And another 2 CCD cameras are assigned for reading the indication value of the radiation dosimeter and the instrument. In the preceding assumptions, a major problem which arises when dealing with CCD/CMOS cameras in the severe accident situations of the nuclear power plant is the presence of high dose-rate gamma irradiation fields. In the case of the DBA (design basis accident) situations of the nuclear power plant, in order to use a CCD/CMOS camera as an ad-hoc monitoring unit in the vicinity of high radioactivity structures and components of the nuclear reactor area, a robust survivability of this camera in such intense gamma-radiation fields therefore should be verified. The CCD/CMOS cameras of various types were gamma irradiated at a

  11. From vertex detectors to inner trackers with CMOS pixel sensors

    CERN Document Server

    Besson, A.

    2017-01-01

    The use of CMOS Pixel Sensors (CPS) for high resolution and low material vertex detectors has been validated with the 2014 and 2015 physics runs of the STAR-PXL detector at RHIC/BNL. This opens the door to the use of CPS for inner tracking devices, with 10-100 times larger sensitive area, which require therefore a sensor design privileging power saving, response uniformity and robustness. The 350 nm CMOS technology used for the STAR-PXL sensors was considered as too poorly suited to upcoming applications like the upgraded ALICE Inner Tracking System (ITS), which requires sensors with one order of magnitude improvement on readout speed and improved radiation tolerance. This triggered the exploration of a deeper sub-micron CMOS technology, Tower-Jazz 180 nm, for the design of a CPS well adapted for the new ALICE-ITS running conditions. This paper reports the R&D results for the conception of a CPS well adapted for the ALICE-ITS.

  12. Radiation Hardening of Silicon Detectors

    CERN Multimedia

    Leroy, C; Glaser, M

    2002-01-01

    %RD48 %title\\\\ \\\\Silicon detectors will be widely used in experiments at the CERN Large Hadron Collider where high radiation levels will cause significant bulk damage. In addition to increased leakage current and charge collection losses worsening the signal to noise, the induced radiation damage changes the effective doping concentration and represents the limiting factor to long term operation of silicon detectors. The objectives are to develop radiation hard silicon detectors that can operate beyond the limits of the present devices and that ensure guaranteed operation for the whole lifetime of the LHC experimental programme. Radiation induced defect modelling and experimental results show that the silicon radiation hardness depends on the atomic impurities present in the initial monocrystalline material.\\\\ \\\\ Float zone (FZ) silicon materials with addition of oxygen, carbon, nitrogen, germanium and tin were produced as well as epitaxial silicon materials with epilayers up to 200 $\\mu$m thickness. Their im...

  13. Radiation hard pixel sensors using high-resistive wafers in a 150 nm CMOS processing line

    Science.gov (United States)

    Pohl, D.-L.; Hemperek, T.; Caicedo, I.; Gonella, L.; Hügging, F.; Janssen, J.; Krüger, H.; Macchiolo, A.; Owtscharenko, N.; Vigani, L.; Wermes, N.

    2017-06-01

    Pixel sensors using 8'' CMOS processing technology have been designed and characterized offering the benefits of industrial sensor fabrication, including large wafers, high throughput and yield, as well as low cost. The pixel sensors are produced using a 150 nm CMOS technology offered by LFoundry in Avezzano. The technology provides multiple metal and polysilicon layers, as well as metal-insulator-metal capacitors that can be employed for AC-coupling and redistribution layers. Several prototypes were fabricated and are characterized with minimum ionizing particles before and after irradiation to fluences up to 1.1 × 1015 neq cm-2. The CMOS-fabricated sensors perform equally well as standard pixel sensors in terms of noise and hit detection efficiency. AC-coupled sensors even reach 100% hit efficiency in a 3.2 GeV electron beam before irradiation.

  14. Pitch dependence of the tolerance of CMOS monolithic active pixel sensors to non-ionizing radiation

    International Nuclear Information System (INIS)

    Doering, D.; Deveaux, M.; Domachowski, M.; Fröhlich, I.; Koziel, M.; Müntz, C.; Scharrer, P.; Stroth, J.

    2013-01-01

    CMOS monolithic active pixel sensors (MAPS) have demonstrated excellent performance as tracking detectors for charged particles. They provide an outstanding spatial resolution (a few μm), a detection efficiency of ≳99.9%, very low material budget (0.05%X 0 ) and good radiation tolerance (≳1Mrad, ≳10 13 n eq /cm 2 ) (Deveaux et al. [1]). This makes them an interesting technology for various applications in heavy ion and particle physics. Their tolerance to bulk damage was recently improved by using high-resistivity (∼1kΩcm) epitaxial layers as sensitive volume (Deveaux et al. [1], Dorokhov et al. [2]). The radiation tolerance of conventional MAPS is known to depend on the pixel pitch. This is as a higher pitch extends the distance, which signal electrons have to travel by thermal diffusion before being collected. Increased diffusion paths turn into a higher probability of loosing signal charge due to recombination. Provided that a similar effect exists in MAPS with high-resistivity epitaxial layer, it could be used to extend their radiation tolerance further. We addressed this question with MIMOSA-18AHR prototypes, which were provided by the IPHC Strasbourg and irradiated with reactor neutrons. We report about the results of this study and provide evidences that MAPS with 10μm pixel pitch tolerate doses of ≳3×10 14 n eq /cm 2

  15. BioCMOS Interfaces and Co-Design

    CERN Document Server

    Carrara, Sandro

    2013-01-01

    The application of CMOS circuits and ASIC VLSI systems to problems in medicine and system biology has led to the emergence of Bio/CMOS Interfaces and Co-Design as an exciting and rapidly growing area of research. The mutual inter-relationships between VLSI-CMOS design and the biophysics of molecules interfacing with silicon and/or onto metals has led to the emergence of the interdisciplinary engineering approach to Bio/CMOS interfaces. This new approach, facilitated by 3D circuit design and nanotechnology, has resulted in new concepts and applications for VLSI systems in the bio-world. This book offers an invaluable reference to the state-of-the-art in Bio/CMOS interfaces. It describes leading-edge research in the field of CMOS design and VLSI development for applications requiring integration of biological molecules onto the chip. It provides multidisciplinary content ranging from biochemistry to CMOS design in order to address Bio/CMOS interface co-design in bio-sensing applications.

  16. Degradation of CMOS image sensors in deep-submicron technology due to γ-irradiation

    Science.gov (United States)

    Rao, Padmakumar R.; Wang, Xinyang; Theuwissen, Albert J. P.

    2008-09-01

    In this work, radiation induced damage mechanisms in deep submicron technology is resolved using finger gated-diodes (FGDs) as a radiation sensitive tool. It is found that these structures are simple yet efficient structures to resolve radiation induced damage in advanced CMOS processes. The degradation of the CMOS image sensors in deep-submicron technology due to γ-ray irradiation is studied by developing a model for the spectral response of the sensor and also by the dark-signal degradation as a function of STI (shallow-trench isolation) parameters. It is found that threshold shifts in the gate-oxide/silicon interface as well as minority carrier life-time variations in the silicon bulk are minimal. The top-layer material properties and the photodiode Si-SiO2 interface quality are degraded due to γ-ray irradiation. Results further suggest that p-well passivated structures are inevitable for radiation-hard designs. It was found that high electrical fields in submicron technologies pose a threat to high quality imaging in harsh environments.

  17. Study of radiation-induced leakage current between adjacent devices in a CMOS integrated circuit

    Institute of Scientific and Technical Information of China (English)

    Ding Lili; Guo Hongxia; Chen Wei; Fan Ruyu

    2012-01-01

    Radiation-induced inter-device leakage is studied using an analytical model and TCAD simulation.There were some different opinions in understanding the process of defect build-up in trench oxide and parasitic leakage path turning on from earlier studies.To reanalyze this problem and make it beyond argument,every possible variable is considered using theoretical analysis,not just the change of electric field or oxide thickness independently.Among all possible inter-device leakage paths,parasitic structures with N-well as both drain and source are comparatively more sensitive to the total dose effect when a voltage discrepancy exists between the drain and source region.Since N-well regions are commonly connected to the same power supply,these kinds of structures will not be a problem in a real CMOS integrated circuit.Generally speaking,conduction paths of inter-device leakage existing in a real integrated circuit and under real electrical circumstances are not very sensitive to the total ionizing dose effect.

  18. Hybrid CMOS/Molecular Integrated Circuits

    Science.gov (United States)

    Stan, M. R.; Rose, G. S.; Ziegler, M. M.

    CMOS silicon technologies are likely to run out of steam in the next 10-15 years despite revolutionary advances in the past few decades. Molecular and other nanoscale technologies show significant promise but it is unlikely that they will completely replace CMOS, at least in the near term. This chapter explores opportunities for using CMOS and nanotechnology to enhance and complement each other in hybrid circuits. As an example of such a hybrid CMOS/nano system, a nanoscale programmable logic array (PLA) based on majority logic is described along with its supplemental CMOS circuitry. It is believed that such systems will be able to sustain the historical advances in the semiconductor industry while addressing manufacturability, yield, power, cost, and performance challenges.

  19. A Spacecraft Housekeeping System-on-Chip in a Radiation Hardened Structured ASIC

    Science.gov (United States)

    Suarez, George; DuMonthier, Jeffrey J.; Sheikh, Salman S.; Powell, Wesley A.; King, Robyn L.

    2012-01-01

    Housekeeping systems are essential to health monitoring of spacecraft and instruments. Typically, sensors are distributed across various sub-systems and data is collected using components such as analog-to-digital converters, analog multiplexers and amplifiers. In most cases programmable devices are used to implement the data acquisition control and storage, and the interface to higher level systems. Such discrete implementations require additional size, weight, power and interconnect complexity versus an integrated circuit solution, as well as the qualification of multiple parts. Although commercial devices are readily available, they are not suitable for space applications due the radiation tolerance and qualification requirements. The Housekeeping System-o n-A-Chip (HKSOC) is a low power, radiation hardened integrated solution suitable for spacecraft and instrument control and data collection. A prototype has been designed and includes a wide variety of functions including a 16-channel analog front-end for driving and reading sensors, analog-to-digital and digital-to-analog converters, on-chip temperature sensor, power supply current sense circuits, general purpose comparators and amplifiers, a 32-bit processor, digital I/O, pulse-width modulation (PWM) generators, timers and I2C master and slave serial interfaces. In addition, the device can operate in a bypass mode where the processor is disabled and external logic is used to control the analog and mixed signal functions. The device is suitable for stand-alone or distributed systems where multiple chips can be deployed across different sub-systems as intelligent nodes with computing and processing capabilities.

  20. Radiation evaluation of commercial ferroelectric nonvolatile memories

    International Nuclear Information System (INIS)

    Benedetto, J.M.; DeLancey, W.M.; Oldham, T.R.; McGarrity, J.M.; Tipton, C.W.; Brassington, M.; Fisch, D.E.

    1991-01-01

    This paper reports on ferroelectric (FE) on complementary metal-oxide semiconductor (CMOS) 4-kbit nonvolatile memories, 8-bit octal latches (with and without FE), and process control test chips that were used to establish a baseline characterization of the radiation response of CMOS/FE integrated devices and to determine whether the additional FE processing caused significant degradation to the baseline CMOS process. Functional failure of all 4-kbit memories and octal latches occurred at total doses of between 2 and 4 krad(Si), most likely due to field- oxide effects in the underlying CMOS. No significant difference was observed between the radiation responses of devices with and without the FE film in this commercial process

  1. Radiation hardening of diagnostics

    International Nuclear Information System (INIS)

    Siemon, R.E.

    1991-01-01

    The world fusion program has advanced to the stage where it is appropriate to construct a number of devices for the purpose of burning DT fuel. In these next-generation experiments, the expected flux and fluence of 14 MeV neutrons and associated gamma rays will pose a significant challenge to the operation and diagnostics of the fusion device. Radiation effects include structural damage to materials such as vacuum windows and seals, modifications to electrical properties such as electrical conductivity and dielectric strength and impaired optical properties such as reduced transparency and luminescence of windows and fiber optics during irradiation. In preparation for construction and operation of these new facilities, the fusion diagnostics community needs to work with materials scientists to develop a better understanding of radiation effects, and to undertake a testing program aimed at developing workable solutions for this multi-faceted problem. A unique facility to help in this regard is the Los Alamos Spallation Radiation Effects Facility, a neutron source located at the beam stop of the world's most powerful accelerator, the Los Alamos Meson Physics Facility (LAMPF). The LAMPF proton beam generates 10 16 neutrons per second because of ''spallation'' reactions when the protons collide with the copper nuclei in the beam stop

  2. CMOS MEMS Fabrication Technologies and Devices

    Directory of Open Access Journals (Sweden)

    Hongwei Qu

    2016-01-01

    Full Text Available This paper reviews CMOS (complementary metal-oxide-semiconductor MEMS (micro-electro-mechanical systems fabrication technologies and enabled micro devices of various sensors and actuators. The technologies are classified based on the sequence of the fabrication of CMOS circuitry and MEMS elements, while SOI (silicon-on-insulator CMOS MEMS are introduced separately. Introduction of associated devices follows the description of the respective CMOS MEMS technologies. Due to the vast array of CMOS MEMS devices, this review focuses only on the most typical MEMS sensors and actuators including pressure sensors, inertial sensors, frequency reference devices and actuators utilizing different physics effects and the fabrication processes introduced. Moreover, the incorporation of MEMS and CMOS is limited to monolithic integration, meaning wafer-bonding-based stacking and other integration approaches, despite their advantages, are excluded from the discussion. Both competitive industrial products and state-of-the-art research results on CMOS MEMS are covered.

  3. Fabrication of CMOS-compatible nanopillars for smart bio-mimetic CMOS image sensors

    KAUST Repository

    Saffih, Faycal; Elshurafa, Amro M.; Mohammad, Mohammad Ali; Nelson-Fitzpatrick, Nathan E.; Evoy, S.

    2012-01-01

    . The fabrication of the nanopillars was carried out keeping the CMOS process in mind to ultimately obtain a CMOS-compatible process. This work serves as an initial step in the ultimate objective of integrating photo-sensors based on these nanopillars seamlessly

  4. Investigation of CMOS pixel sensor with 0.18 μm CMOS technology for high-precision tracking detector

    International Nuclear Information System (INIS)

    Zhang, L.; Wang, M.; Fu, M.; Zhang, Y.; Yan, W.

    2017-01-01

    The Circular Electron Positron Collider (CEPC) proposed by the Chinese high energy physics community is aiming to measure Higgs particles and their interactions precisely. The tracking detector including Silicon Inner Tracker (SIT) and Forward Tracking Disks (FTD) has driven stringent requirements on sensor technologies in term of spatial resolution, power consumption and readout speed. CMOS Pixel Sensor (CPS) is a promising candidate to approach these requirements. This paper presents the preliminary studies on the sensor optimization for tracking detector to achieve high collection efficiency while keeping necessary spatial resolution. Detailed studies have been performed on the charge collection using a 0.18 μm CMOS image sensor process. This process allows high resistivity epitaxial layer, leading to a significant improvement on the charge collection and therefore improving the radiation tolerance. Together with the simulation results, the first exploratory prototype has bee designed and fabricated. The prototype includes 9 different pixel arrays, which vary in terms of pixel pitch, diode size and geometry. The total area of the prototype amounts to 2 × 7.88 mm 2 .

  5. First result on biased CMOS MAPs-on-diamond devices

    Energy Technology Data Exchange (ETDEWEB)

    Kanxheri, K., E-mail: keida.kanxheri@pg.infn.it [Università degli Studi di Perugia, Perugia (Italy); INFN Perugia, Perugia (Italy); Citroni, M.; Fanetti, S. [LENS Firenze, Florence (Italy); Lagomarsino, S. [Università degli Studi di Firenze, Florence (Italy); INFN Firenze, Pisa (Italy); Morozzi, A. [Università degli Studi di Perugia, Perugia (Italy); INFN Perugia, Perugia (Italy); Parrini, G. [Università degli Studi di Firenze, Florence (Italy); Passeri, D. [Università degli Studi di Perugia, Perugia (Italy); INFN Perugia, Perugia (Italy); Sciortino, S. [Università degli Studi di Firenze, Florence (Italy); INFN Firenze, Pisa (Italy); Servoli, L. [INFN Perugia, Perugia (Italy)

    2015-10-01

    Recently a new type of device, the MAPS-on-diamond, obtained bonding a thinned to 25 μm CMOS Monolithic Active Pixel Sensor to a standard 500 μm pCVD diamond substrate, has been proposed and fabricated, allowing a highly segmented readout (10×10 μm pixel size) of the signal produced in the diamond substrate. The bonding between the two materials has been obtained using a new laser technique to deliver the needed energy at the interface. A biasing scheme has been adopted to polarize the diamond substrate to allow the charge transport inside the diamond without disrupting the functionalities of the CMOS Monolithic Active Pixel Sensor. The main concept of this class of devices is the capability of the charges generated in the diamond by ionizing radiation to cross the silicon–diamond interface and to be collected by the MAPS photodiodes. In this work we demonstrate that such passage occurs and measure its overall efficiency. This study has been carried out first calibrating the CMOS MAPS with monochromatic X-rays, and then testing the device with charged particles (electrons) either with and without biasing the diamond substrate, to compare the amount of signal collected.

  6. Research-grade CMOS image sensors for demanding space applications

    Science.gov (United States)

    Saint-Pé, Olivier; Tulet, Michel; Davancens, Robert; Larnaudie, Franck; Magnan, Pierre; Corbière, Franck; Martin-Gonthier, Philippe; Belliot, Pierre

    2017-11-01

    Imaging detectors are key elements for optical instruments and sensors on board space missions dedicated to Earth observation (high resolution imaging, atmosphere spectroscopy...), Solar System exploration (micro cameras, guidance for autonomous vehicle...) and Universe observation (space telescope focal planes, guiding sensors...). This market has been dominated by CCD technology for long. Since the mid- 90s, CMOS Image Sensors (CIS) have been competing with CCDs for more and more consumer domains (webcams, cell phones, digital cameras...). Featuring significant advantages over CCD sensors for space applications (lower power consumption, smaller system size, better radiations behaviour...), CMOS technology is also expanding in this field, justifying specific R&D and development programs funded by national and European space agencies (mainly CNES, DGA, and ESA). All along the 90s and thanks to their increasingly improving performances, CIS have started to be successfully used for more and more demanding applications, from vision and control functions requiring low-level performances to guidance applications requiring medium-level performances. Recent technology improvements have made possible the manufacturing of research-grade CIS that are able to compete with CCDs in the high-performances arena. After an introduction outlining the growing interest of optical instruments designers for CMOS image sensors, this talk will present the existing and foreseen ways to reach high-level electro-optics performances for CIS. The developments of CIS prototypes built using an imaging CMOS process and of devices based on improved designs will be presented.

  7. Coating compositions hardenable by ionization beams

    International Nuclear Information System (INIS)

    Chaudhari, D.; Haering, E.; Dobbelstein, A.; Hoselmann, W.

    1976-01-01

    Coating compositions hardenable by ionizing radiation are described which contain as binding agents a mixture of at least 1 unsaturated olefin compound containing urethane groups, and at least 1 further unsaturated olefin compound that may be copolymerized. The unsaturated olefin compound containing the urethane groups is a reaction product of a compound containing carboxylic acid groups and a compound containing at least 1 isocyanate group where the mixture of the two olefins may contain conventional additives of the lacquer industry. 6 claims, no drawings

  8. Skin hardening effect in patients with polymorphic light eruption: comparison of UVB hardening in hospital with a novel home UV-hardening device.

    Science.gov (United States)

    Franken, S M; Genders, R E; de Gruijl, F R; Rustemeyer, T; Pavel, S

    2013-01-01

    An effective prophylactic treatment of patients with polymorphic light eruption (PLE) consists of repeated low, gradually increasing exposures to UVB radiation. This so-called UV(B) hardening induces better tolerance of the skin to sunlight. SunshowerMedical company (Amsterdam) has developed an UV (B) source that can be used during taking shower. The low UV fluence of this apparatus makes it an interesting device for UV hardening. In a group of PLE patients, we compared the effectiveness of the irradiation with SunshowerMedical at home with that of the UVB treatment in the hospital. The PLE patients were randomized for one of the treatments. The hospital treatment consisted of irradiations with broad-band UVB (Waldmann 85/UV21 lamps) twice a week during 6 weeks. The home UV-device was used each day with the maximal irradiation time of 6 min. The outcome assessment was based on the information obtained from patients' dermatological quality of life (DLQI) questionnaires, the ability of both phototherapies to reduce the provocation reaction and from the patients' evaluation of the long-term benefits of their phototherapies. Sixteen patients completed treatment with SunshowerMedical and thirteen completed treatment in hospital. Both types of phototherapy were effective. There was a highly significant improvement in DLQI with either treatment. In most cases, the hardening reduced or even completely suppressed clinical UV provocation of PLE. The patients using SunshowerMedical at home were, however, much more content with the treatment procedure than the patients visiting the dermatological units. Both treatments were equally effective in the induction of skin tolerance to sunlight in PLE patients. However, the home treatment was much better accepted than the treatment in the hospital. © 2011 The Authors. Journal of the European Academy of Dermatology and Venereology © 2011 European Academy of Dermatology and Venereology.

  9. Preparation of Self Hardening-modelling Polyurethane for Wood Repairing and Cracks Injection

    International Nuclear Information System (INIS)

    Meligi, G.A.; Elnahas, H.H.; Ammar, A.H.

    2014-01-01

    Self hardening composite as a modelling clay was prepared from polyurethane, two parts (A) and (B) where (A) contains polyol (polyether), vinyl acetate versatic ester copolymer (VAcVe) and magnesium silicate or wood powder and (B) contains toluene diisocyanate (TDI) as a hardening agent. The two parts mixed thoroughly giving soft putty like feel, open working time 1-2 h and cures hard overnight (24 h full cure). Factors affecting working time and full cure were evaluated. Also, measurements of surface hardness, compressive strength, scanning electron microscopy (SEM), water absorption and effect of ionizing radiation were studied. The suggestion for using the prepared polyurethane composite as clay dries as hard as a rock in the field of wood repair and cracks injection for building walls were recommended. Keywords: Polyurethane, modelling clay, radiation, wood repair and cracks injection.

  10. Floating Gate CMOS Dosimeter With Frequency Output

    Science.gov (United States)

    Garcia-Moreno, E.; Isern, E.; Roca, M.; Picos, R.; Font, J.; Cesari, J.; Pineda, A.

    2012-04-01

    This paper presents a gamma radiation dosimeter based on a floating gate sensor. The sensor is coupled with a signal processing circuitry, which furnishes a square wave output signal, the frequency of which depends on the total dose. Like any other floating gate dosimeter, it exhibits zero bias operation and reprogramming capabilities. The dosimeter has been designed in a standard 0.6 m CMOS technology. The whole dosimeter occupies a silicon area of 450 m250 m. The initial sensitivity to a radiation dose is Hz/rad, and to temperature and supply voltage is kHz/°C and 0.067 kHz/mV, respectively. The lowest detectable dose is less than 1 rad.

  11. Characterisation of a CMOS charge transfer device for TDI imaging

    International Nuclear Information System (INIS)

    Rushton, J.; Holland, A.; Stefanov, K.; Mayer, F.

    2015-01-01

    The performance of a prototype true charge transfer imaging sensor in CMOS is investigated. The finished device is destined for use in TDI applications, especially Earth-observation, and to this end radiation tolerance must be investigated. Before this, complete characterisation is required. This work starts by looking at charge transfer inefficiency and then investigates responsivity using mean-variance techniques

  12. Effects of solute elements on hardening of thermally-aged RPV model alloys

    International Nuclear Information System (INIS)

    Dohi, Kenji; Nishida, Kenji; Nomoto, Akiyoshi; Soneda, Naoki; Liu, Li; Sekimura, Naoto; Li Zhengcao

    2012-01-01

    The investigation of effects of solute elements on the copper-enriched cluster, which is a cause of radiation embrittlement of reactor pressure vessel steels, is needed in order to understand the mechanism of the hardening and the cluster formation. The dependence of the hardness change and the formation of thermally-aged Fe-Cu model alloys doped Ni, Si and Mn on aging time are investigated using Vickers harness tester and three dimensional atom probe. Ni addition suppresses hardening, and Si addition accelerates hardening slightly at the initial stage of the aging. Mn addition accelerates hardening much more but does not almost affect the peak hardness. Ni and Si addition increase the number density and the size of the cluster, while Mn addition remarkably increases the number density and the size of the cluster at the initial stage of the aging. In addition, there is no clear correlation between the square root of the volume fraction of the clusters and the hardness change for all of the alloys. The reasons are considered to be the decrease in the solute hardening caused by the cluster formation and the difference in the shear modulus of the cluster due to the difference in the chemical composition of the cluster. (author)

  13. A non-linear kinematic hardening function

    International Nuclear Information System (INIS)

    Ottosen, N.S.

    1977-05-01

    Based on the classical theory of plasticity, and accepting the von Mises criterion as the initial yield criterion, a non-linear kinematic hardening function applicable both to Melan-Prager's and to Ziegler's hardening rule is proposed. This non-linear hardening function is determined by means of the uniaxial stress-strain curve, and any such curve is applicable. The proposed hardening function considers the problem of general reversed loading, and a smooth change in the behaviour from one plastic state to another nearlying plastic state is obtained. A review of both the kinematic hardening theory and the corresponding non-linear hardening assumptions is given, and it is shown that material behaviour is identical whether Melan-Prager's or Ziegler's hardening rule is applied, provided that the von Mises yield criterion is adopted. (author)

  14. A high speed, low power consumption LVDS interface for CMOS pixel sensors

    Energy Technology Data Exchange (ETDEWEB)

    Shi, Zhan, E-mail: sz1134@163.com [Dalian University of Technology, No. 2 Linggong Road, 116024 Dalian (China); Tang, Zhenan, E-mail: tangza@dlut.edu.cn [Dalian University of Technology, No. 2 Linggong Road, 116024 Dalian (China); Tian, Yong [Dalian University of Technology, No. 2 Linggong Road, 116024 Dalian (China); Pham, Hung; Valin, Isabelle; Jaaskelainen, Kimmo [IPHC, 23 rue du Loess 67037 Strasbourg (France); CNRS, UMR7178, 67037 Strasbourg (France)

    2015-01-01

    The use of CMOS Pixel Sensors (CPSs) offers a promising approach to the design of vertex detectors in High Energy Physics (HEP) experiments. As the CPS equipping the upgraded Solenoidal Tracker at RHIC (STAR) pixel detector, ULTIMATE perfectly illustrates the potential of CPSs for HEP applications. However, further development of CPSs with respect to readout speed is required to fulfill the readout time requirement of the next generation HEP detectors, such as the upgrade of A Large Ion Collider Experiment (ALICE) Inner Tracking System (ITS), the International Linear Collider (ILC), and the Compressed Baryonic Matter (CBM) vertex detectors. One actual limitation of CPSs is related to the speed of the Low-Voltage Differential Signaling (LVDS) circuitry implementing the interface between the sensor and the Data Acquisition (DAQ) system. To improve the transmission rate while keeping the power consumption at a low level, a source termination technique and a special current comparator were adopted for the LVDS driver and receiver, respectively. Moreover, hardening techniques are used. The circuitry was designed and submitted for fabrication in a 0.18-µm CMOS Image Sensor (CIS) process at the end of 2011. The test results indicated that the LVDS driver and receiver can operate properly at the data rate of 1.2 Gb/s with power consumption of 19.6 mW.

  15. Laser transformation hardening effect on hardening zone features and surface hardness of tool steel AISI D2

    Directory of Open Access Journals (Sweden)

    D. Lesyk

    2017-06-01

    Full Text Available The relationship of technological input regimes of the laser transformation hardening on change the hardening depth, hardening width, and hardening angle, as well as surface hardness of the tool steel AISI D2 using multifactor experiment with elements of the analysis of variance and regression equations was determined. The laser transformation hardening process implemented by controlling the heating temperature using Nd:YAG fiber laser with scanner, pyrometer and proportional-integral-differential controller. The linear and quadratic regression models are developed, as well as response surface to determine the effect of the heating temperature and feed rate of the treated surface on the energy density of the laser beam, hardening depths, hardening width, hardening angle, and surface hardness are designed. The main effect on the energy density of the laser beam has a velocity laser treatment, on the other hand, the main effect on the geometrical parameters of the laser hardened zone and surface hardness has temperature heating are shown. The optimum magnitudes of the heating temperature (1270 °C and feed rate of the treated surface (90 mm/min for laser transformation hardening of the tool steel AISI D2 using fiber laser with scanner were defined.

  16. Modeling copper precipitation hardening and embrittlement in a dilute Fe-0.3at.%Cu alloy under neutron irradiation

    Science.gov (United States)

    Bai, Xian-Ming; Ke, Huibin; Zhang, Yongfeng; Spencer, Benjamin W.

    2017-11-01

    Neutron irradiation in light water reactors can induce precipitation of nanometer sized Cu clusters in reactor pressure vessel steels. The Cu precipitates impede dislocation gliding, leading to an increase in yield strength (hardening) and an upward shift of ductile-to-brittle transition temperature (embrittlement). In this work, cluster dynamics modeling is used to model the entire Cu precipitation process (nucleation, growth, and coarsening) in a Fe-0.3at.%Cu alloy under neutron irradiation at 300°C based on the homogenous nucleation mechanism. The evolution of the Cu cluster number density and mean radius predicted by the modeling agrees well with experimental data reported in literature for the same alloy under the same irradiation conditions. The predicted precipitation kinetics is used as input for a dispersed barrier hardening model to correlate the microstructural evolution with the radiation hardening and embrittlement in this alloy. The predicted radiation hardening agrees well with the mechanical test results in the literature. Limitations of the model and areas for future improvement are also discussed in this work.

  17. Superheat effect on bainite steel hardenability

    International Nuclear Information System (INIS)

    Kubachek, V.V.; Sklyuev, P.V.

    1978-01-01

    The bainite hardenability of 34KhN1M and 35 KhN1M2Ph steels has been investigated by the end-face hardening technique. It is established that, as the temperature of austenitization rises from 900 to 1280 deg C, the temperature of bainite transformation increases and bainite hardenability of the steels falls off. A repeated slow heating to 900 deg C of previously overheated 34KhN1M steel breaks up grain, lowers the temperature of the bainite transformation and raises the hardenability to values obtained with ordinary hardening from 900 deg C. A similar heating of previously overheated 35KhN1M2Ph steel is accompanied by restoration of initial coarse grains and maintenance of both the elevated bainite transformation temperature and to lower hardenability corresponding to hardening from the temperature of previous overheating

  18. Large area CMOS active pixel sensor x-ray imager for digital breast tomosynthesis: Analysis, modeling, and characterization.

    Science.gov (United States)

    Zhao, Chumin; Kanicki, Jerzy; Konstantinidis, Anastasios C; Patel, Tushita

    2015-11-01

    Large area x-ray imagers based on complementary metal-oxide-semiconductor (CMOS) active pixel sensor (APS) technology have been proposed for various medical imaging applications including digital breast tomosynthesis (DBT). The low electronic noise (50-300 e-) of CMOS APS x-ray imagers provides a possible route to shrink the pixel pitch to smaller than 75 μm for microcalcification detection and possible reduction of the DBT mean glandular dose (MGD). In this study, imaging performance of a large area (29×23 cm2) CMOS APS x-ray imager [Dexela 2923 MAM (PerkinElmer, London)] with a pixel pitch of 75 μm was characterized and modeled. The authors developed a cascaded system model for CMOS APS x-ray imagers using both a broadband x-ray radiation and monochromatic synchrotron radiation. The experimental data including modulation transfer function, noise power spectrum, and detective quantum efficiency (DQE) were theoretically described using the proposed cascaded system model with satisfactory consistency to experimental results. Both high full well and low full well (LFW) modes of the Dexela 2923 MAM CMOS APS x-ray imager were characterized and modeled. The cascaded system analysis results were further used to extract the contrast-to-noise ratio (CNR) for microcalcifications with sizes of 165-400 μm at various MGDs. The impact of electronic noise on CNR was also evaluated. The LFW mode shows better DQE at low air kerma (Ka<10 μGy) and should be used for DBT. At current DBT applications, air kerma (Ka∼10 μGy, broadband radiation of 28 kVp), DQE of more than 0.7 and ∼0.3 was achieved using the LFW mode at spatial frequency of 0.5 line pairs per millimeter (lp/mm) and Nyquist frequency ∼6.7 lp/mm, respectively. It is shown that microcalcifications of 165-400 μm in size can be resolved using a MGD range of 0.3-1 mGy, respectively. In comparison to a General Electric GEN2 prototype DBT system (at MGD of 2.5 mGy), an increased CNR (by ∼10) for

  19. Irradiation of the CLARO-CMOS chip, a fast ASIC for single-photon counting

    International Nuclear Information System (INIS)

    Andreotti, M.; Baldini, W.; Calabrese, R.; Carniti, P.; Cassina, L.; Cotta Ramusino, A.; Fiorini, M.; Giachero, A.; Gotti, C.; Luppi, E.; Maino, M.; Malaguti, R.; Pessina, G.; Tomassetti, L.

    2015-01-01

    The CLARO-CMOS is a prototype ASIC that allows fast photon counting with low power consumption, built in AMS 0.35 μm CMOS technology. It is intended to be used as a front-end readout for the upgraded LHCb RICH detectors. In this environment, assuming 10 years of operation at the nominal luminosity expected after the upgrade, the ASIC must withstand a total fluence of about 6×10 12 1 MeV n eq /cm 2 and a total ionising dose of 400 krad. Long term stability of the electronics front-end is essential and the effects of radiation damage on the CLARO-CMOS performance must be carefully studied. This paper describes results of multi-step irradiation tests with protons up to the dose of ~8 Mrad, including measurement of single event effects during irradiation and chip performance evaluation before and after each irradiation step

  20. Influence of Hardening Model on Weld Residual Stress Distribution

    Energy Technology Data Exchange (ETDEWEB)

    Mullins, Jonathan; Gunnars, Jens (Inspecta Technology AB, Stockholm (Sweden))

    2009-06-15

    This study is the third stage of a project sponsored by the Swedish Radiation Safety Authority (SSM) to improve the weld residual stress modelling procedures currently used in Sweden. The aim of this study was to determine which material hardening model gave the best agreement with experimentally measured weld residual stress distributions. Two girth weld geometries were considered: 19mm and 65mm thick girth welds with Rin/t ratios of 10.5 and 2.8, respectively. The FE solver ABAQUS Standard v6.5 was used for analysis. As a preliminary step some improvements were made to the welding simulation procedure used in part one of the project. First, monotonic stress strain curves and a mixed isotropic/kinematic hardening model were sourced from the literature for 316 stainless steel. Second, more detailed information was obtained regarding the geometry and welding sequence for the Case 1 weld (compared with phase 1 of this project). Following the preliminary step, welding simulations were conducted using isotropic, kinematic and mixed hardening models. The isotropic hardening model gave the best overall agreement with experimental measurements; it is therefore recommended for future use in welding simulations. The mixed hardening model gave good agreement for predictions of the hoop stress but tended to under estimate the magnitude of the axial stress. It must be noted that two different sources of data were used for the isotropic and mixed models in this study and this may have contributed to the discrepancy in predictions. When defining a mixed hardening model it is difficult to delineate the relative contributions of isotropic and kinematic hardening and for the model used it may be that a greater isotropic hardening component should have been specified. The kinematic hardening model consistently underestimated the magnitude of both the axial and hoop stress and is not recommended for use. Two sensitivity studies were also conducted. In the first the effect of using a

  1. Influence of Hardening Model on Weld Residual Stress Distribution

    International Nuclear Information System (INIS)

    Mullins, Jonathan; Gunnars, Jens

    2009-06-01

    This study is the third stage of a project sponsored by the Swedish Radiation Safety Authority (SSM) to improve the weld residual stress modelling procedures currently used in Sweden. The aim of this study was to determine which material hardening model gave the best agreement with experimentally measured weld residual stress distributions. Two girth weld geometries were considered: 19mm and 65mm thick girth welds with Rin/t ratios of 10.5 and 2.8, respectively. The FE solver ABAQUS Standard v6.5 was used for analysis. As a preliminary step some improvements were made to the welding simulation procedure used in part one of the project. First, monotonic stress strain curves and a mixed isotropic/kinematic hardening model were sourced from the literature for 316 stainless steel. Second, more detailed information was obtained regarding the geometry and welding sequence for the Case 1 weld (compared with phase 1 of this project). Following the preliminary step, welding simulations were conducted using isotropic, kinematic and mixed hardening models. The isotropic hardening model gave the best overall agreement with experimental measurements; it is therefore recommended for future use in welding simulations. The mixed hardening model gave good agreement for predictions of the hoop stress but tended to under estimate the magnitude of the axial stress. It must be noted that two different sources of data were used for the isotropic and mixed models in this study and this may have contributed to the discrepancy in predictions. When defining a mixed hardening model it is difficult to delineate the relative contributions of isotropic and kinematic hardening and for the model used it may be that a greater isotropic hardening component should have been specified. The kinematic hardening model consistently underestimated the magnitude of both the axial and hoop stress and is not recommended for use. Two sensitivity studies were also conducted. In the first the effect of using a

  2. Extracting material response from simple mechanical tests on hardening-softening-hardening viscoplastic solids

    Science.gov (United States)

    Mohan, Nisha

    Compliant foams are usually characterized by a wide range of desirable mechanical properties. These properties include viscoelasticity at different temperatures, energy absorption, recoverability under cyclic loading, impact resistance, and thermal, electrical, acoustic and radiation-resistance. Some foams contain nano-sized features and are used in small-scale devices. This implies that the characteristic dimensions of foams span multiple length scales, rendering modeling their mechanical properties difficult. Continuum mechanics-based models capture some salient experimental features like the linear elastic regime, followed by non-linear plateau stress regime. However, they lack mesostructural physical details. This makes them incapable of accurately predicting local peaks in stress and strain distributions, which significantly affect the deformation paths. Atomistic methods are capable of capturing the physical origins of deformation at smaller scales, but suffer from impractical computational intensity. Capturing deformation at the so-called meso-scale, which is capable of describing the phenomenon at a continuum level, but with some physical insights, requires developing new theoretical approaches. A fundamental question that motivates the modeling of foams is `how to extract the intrinsic material response from simple mechanical test data, such as stress vs. strain response?' A 3D model was developed to simulate the mechanical response of foam-type materials. The novelty of this model includes unique features such as the hardening-softening-hardening material response, strain rate-dependence, and plastically compressible solids with plastic non-normality. Suggestive links from atomistic simulations of foams were borrowed to formulate a physically informed hardening material input function. Motivated by a model that qualitatively captured the response of foam-type vertically aligned carbon nanotube (VACNT) pillars under uniaxial compression [2011,"Analysis of

  3. Microelectronic test structures for CMOS technology

    CERN Document Server

    Ketchen, Mark B

    2011-01-01

    Microelectronic Test Structures for CMOS Technology and Products addresses the basic concepts of the design of test structures for incorporation within test-vehicles, scribe-lines, and CMOS products. The role of test structures in the development and monitoring of CMOS technologies and products has become ever more important with the increased cost and complexity of development and manufacturing. In this timely volume, IBM scientists Manjul Bhushan and Mark Ketchen emphasize high speed characterization techniques for digital CMOS circuit applications and bridging between circuit performance an

  4. Experimental measurement of a high resolution CMOS detector coupled to CsI scintillators under X-ray radiation

    International Nuclear Information System (INIS)

    Michail, C.; Valais, I.; Seferis, I.; Kalyvas, N.; Fountos, G.; Kandarakis, I.

    2015-01-01

    The purpose of the present study was to assess the information content of structured CsI:Tl scintillating screens, specially treated to be compatible to a CMOS digital imaging optical sensor, in terms of the information capacity (IC), based on Shannon's mathematical communication theory. IC was assessed after the experimental determination of the Modulation Transfer Function (MTF) and the Normalized Noise Power Spectrum (NNPS) in the mammography and general radiography energy range. The CMOS sensor was coupled to three columnar CsI:Tl scintillator screens obtained from the same manufacturer with thicknesses of 130, 140 and 170 μm respectively, which were placed in direct contact with the optical sensor. The MTF was measured using the slanted-edge method while NNPS was determined by 2D Fourier transforming of uniformly exposed images. Both parameters were assessed by irradiation under the mammographic W/Rh (130, 140 and 170 μm CsI screens) and the RQA-5 (140 and 170 μm CsI screens) (IEC 62220-1) beam qualities. The detector response function was linear for the exposure range under investigation. At 70 kVp, under the RQA-5 conditions IC values were found to range between 2229 and 2340 bits/mm 2 . At 28 kVp the corresponding IC values were found to range between 2262 and 2968 bits/mm 2 . The information content of CsI:Tl scintillating screens in combination to the high resolution CMOS sensor, investigated in the present study, where found optimized for use in digital mammography imaging systems. - Highlights: • Three structured CsI:Tl screens (130,140 & 170 um) were coupled to a CMOS sensor. • MTF of the CsI/CMOS was higher than GOS:Tb and CsI based digital imaging systems. • IC of CsI:Tl/CMOS was found optimized for use in digital mammography systems

  5. Design and Characterization of a Built-In CMOS TID Smart Sensor

    Science.gov (United States)

    Agustin, Javier; Gil, Carlos; Lopez-Vallejo, Marisa; Ituero, Pablo

    2015-04-01

    This paper describes a total ionization dose (TID) sensor that presents the following advantages: it is a digital sensor able to be integrated in CMOS circuits; it has a configurable sensitivity that allows radiation doses ranging from very low to high levels; its interface helps to integrate this design in a multidisciplinary sensor network; and it is self-timed, hence it does not need a clock signal. We designed, implemented and manufactured the sensor in a 0.35 μm CMOS commercial technology. It was irradiated with a 60Co source. This test was used to characterize the sensor in terms of the radiation response up to 575 krad. After irradiation, we monitored the sensor to control charge redistribution and annealing effects for 80 hours. We also exposed our design to meticulous temperature analysis from 0 to 50°C and we studied the acceleration on the annealing phenomena due to high temperatures. Sensor calibration takes into account the results of all tests. Finally we propose to use this sensor in a self-recovery system. The sensor manufactured in this work has an area of 0.047 mm 2, of which 22% is dedicated to measuring radiation. Its energy per conversion is 463 pJ.

  6. CMOS sensors in 90 nm fabricated on high resistivity wafers: Design concept and irradiation results

    International Nuclear Information System (INIS)

    Rivetti, A.; Battaglia, M.; Bisello, D.; Caselle, M.; Chalmet, P.; Costa, M.; Demaria, N.; Giubilato, P.; Ikemoto, Y.; Kloukinas, K.; Mansuy, C.; Marchioro, A.; Mugnier, H.; Pantano, D.; Potenza, A.; Rousset, J.; Silvestrin, L.; Wyss, J.

    2013-01-01

    The LePix project aims at improving the radiation hardness and the readout speed of monolithic CMOS sensors through the use of standard CMOS technologies fabricated on high resistivity substrates. In this context, high resistivity means beyond 400Ωcm, which is at least one order of magnitude greater than the typical value (1–10Ωcm) adopted for integrated circuit production. The possibility of employing these lightly doped substrates was offered by one foundry for an otherwise standard 90 nm CMOS process. In the paper, the case for such a development is first discussed. The sensor design is then described, along with the key challenges encountered in fabricating the detecting element in a very deep submicron process. Finally, irradiation results obtained on test matrices are reported

  7. Investigation of single event latchup

    International Nuclear Information System (INIS)

    Xue Yuxiong; Yang Shengsheng; Cao Zhou; Ba Dedong; An Heng; Chen Luojing; Guo Gang

    2012-01-01

    Radiation effects on avionics microelectronics are important reliability issues for many space applications. In particular, single-event latchup (SEL) phenomenon is a major threat to CMOS integrated circuits in space systems. To effectively circumvent the failure, it is important to know the behavior of such devices during latchup. In this paper, the mechanisms for SEL in CMOS devices are investigated. Several microelectronic devices used in avionics are tested using heavy ion beams, pulsed laser and 252 Cf source. Based on the SEL test results, SEL-hardening and monitoring methods for preventing SEL from the systems design level are proposed. (authors)

  8. Characterization of total ionizing dose damage in COTS pinned photodiode CMOS image sensors

    Energy Technology Data Exchange (ETDEWEB)

    Wang, Zujun, E-mail: wangzujun@nint.ac.cn; Ma, Wuying; Huang, Shaoyan; Yao, Zhibin; Liu, Minbo; He, Baoping; Sheng, Jiangkun; Xue, Yuan [State Key Laboratory of Intense Pulsed Radiation Simulation and Effect, Northwest Institute of Nuclear Technology, P.O.Box 69-10, Xi’an, Shaanxi 710024 (China); Liu, Jing [School of Materials Science and Engineering, Xiangtan University, Hunan (China)

    2016-03-15

    The characterization of total ionizing dose (TID) damage in COTS pinned photodiode (PPD) CMOS image sensors (CISs) is investigated. The radiation experiments are carried out at a {sup 60}Co γ-ray source. The CISs are produced by 0.18-μm CMOS technology and the pixel architecture is 8T global shutter pixel with correlated double sampling (CDS) based on a 4T PPD front end. The parameters of CISs such as temporal domain, spatial domain, and spectral domain are measured at the CIS test system as the EMVA 1288 standard before and after irradiation. The dark current, random noise, dark signal non-uniformity (DSNU), photo response non-uniformity (PRNU), overall system gain, saturation output, dynamic range (DR), signal to noise ratio (SNR), quantum efficiency (QE), and responsivity versus the TID are reported. The behaviors of the tested CISs show remarkable degradations after radiation. The degradation mechanisms of CISs induced by TID damage are also analyzed.

  9. High-voltage pixel detectors in commercial CMOS technologies for ATLAS, CLIC and Mu3e experiments

    CERN Document Server

    Peric,I et al.

    2013-01-01

    High-voltage particle detectors in commercial CMOS technologies are a detector family that allows implementation of low-cost, thin and radiation-tolerant detectors with a high time resolution. In the R/D phase of the development, a radiation tolerance of 1015 neq=cm2 , nearly 100% detection efficiency and a spatial resolution of about 3 μm were demonstrated. Since 2011 the HV detectors have first applications: the technology is presently the main option for the pixel detector of the planned Mu3e experiment at PSI (Switzerland). Several prototype sensors have been designed in a standard 180 nm HV CMOS process and successfully tested. Thanks to its high radiation tolerance, the HV detectors are also seen at CERN as a promising alternative to the standard options for ATLAS upgrade and CLIC. In order to test the concept, within ATLAS upgrade R/D, we are currently exploring an active pixel detector demonstrator HV2FEI4; also implemented in the 180 nm HV process.

  10. Proof of principle study of the use of a CMOS active pixel sensor for proton radiography.

    Science.gov (United States)

    Seco, Joao; Depauw, Nicolas

    2011-02-01

    Proof of principle study of the use of a CMOS active pixel sensor (APS) in producing proton radiographic images using the proton beam at the Massachusetts General Hospital (MGH). A CMOS APS, previously tested for use in s-ray radiation therapy applications, was used for proton beam radiographic imaging at the MGH. Two different setups were used as a proof of principle that CMOS can be used as proton imaging device: (i) a pen with two metal screws to assess spatial resolution of the CMOS and (ii) a phantom with lung tissue, bone tissue, and water to assess tissue contrast of the CMOS. The sensor was then traversed by a double scattered monoenergetic proton beam at 117 MeV, and the energy deposition inside the detector was recorded to assess its energy response. Conventional x-ray images with similar setup at voltages of 70 kVp and proton images using commercial Gafchromic EBT 2 and Kodak X-Omat V films were also taken for comparison purposes. Images were successfully acquired and compared to x-ray kVp and proton EBT2/X-Omat film images. The spatial resolution of the CMOS detector image is subjectively comparable to the EBT2 and Kodak X-Omat V film images obtained at the same object-detector distance. X-rays have apparent higher spatial resolution than the CMOS. However, further studies with different commercial films using proton beam irradiation demonstrate that the distance of the detector to the object is important to the amount of proton scatter contributing to the proton image. Proton images obtained with films at different distances from the source indicate that proton scatter significantly affects the CMOS image quality. Proton radiographic images were successfully acquired at MGH using a CMOS active pixel sensor detector. The CMOS demonstrated spatial resolution subjectively comparable to films at the same object-detector distance. Further work will be done in order to establish the spatial and energy resolution of the CMOS detector for protons. The

  11. Large area CMOS active pixel sensor x-ray imager for digital breast tomosynthesis: Analysis, modeling, and characterization

    Energy Technology Data Exchange (ETDEWEB)

    Zhao, Chumin; Kanicki, Jerzy, E-mail: kanicki@eecs.umich.edu [Solid-State Electronics Laboratory, Department of Electrical Engineering and Computer Science, University of Michigan, Ann Arbor, Michigan 48109 (United States); Konstantinidis, Anastasios C. [Department of Medical Physics and Biomedical Engineering, University College London, London WC1E 6BT, United Kingdom and Diagnostic Radiology and Radiation Protection, Christie Medical Physics and Engineering, The Christie NHS Foundation Trust, Manchester M20 4BX (United Kingdom); Patel, Tushita [Department of Physics, University of Virginia, Charlottesville, Virginia 22908 (United States)

    2015-11-15

    Purpose: Large area x-ray imagers based on complementary metal-oxide-semiconductor (CMOS) active pixel sensor (APS) technology have been proposed for various medical imaging applications including digital breast tomosynthesis (DBT). The low electronic noise (50–300 e{sup −}) of CMOS APS x-ray imagers provides a possible route to shrink the pixel pitch to smaller than 75 μm for microcalcification detection and possible reduction of the DBT mean glandular dose (MGD). Methods: In this study, imaging performance of a large area (29 × 23 cm{sup 2}) CMOS APS x-ray imager [Dexela 2923 MAM (PerkinElmer, London)] with a pixel pitch of 75 μm was characterized and modeled. The authors developed a cascaded system model for CMOS APS x-ray imagers using both a broadband x-ray radiation and monochromatic synchrotron radiation. The experimental data including modulation transfer function, noise power spectrum, and detective quantum efficiency (DQE) were theoretically described using the proposed cascaded system model with satisfactory consistency to experimental results. Both high full well and low full well (LFW) modes of the Dexela 2923 MAM CMOS APS x-ray imager were characterized and modeled. The cascaded system analysis results were further used to extract the contrast-to-noise ratio (CNR) for microcalcifications with sizes of 165–400 μm at various MGDs. The impact of electronic noise on CNR was also evaluated. Results: The LFW mode shows better DQE at low air kerma (K{sub a} < 10 μGy) and should be used for DBT. At current DBT applications, air kerma (K{sub a} ∼ 10 μGy, broadband radiation of 28 kVp), DQE of more than 0.7 and ∼0.3 was achieved using the LFW mode at spatial frequency of 0.5 line pairs per millimeter (lp/mm) and Nyquist frequency ∼6.7 lp/mm, respectively. It is shown that microcalcifications of 165–400 μm in size can be resolved using a MGD range of 0.3–1 mGy, respectively. In comparison to a General Electric GEN2 prototype DBT system (at

  12. Large area CMOS active pixel sensor x-ray imager for digital breast tomosynthesis: Analysis, modeling, and characterization

    International Nuclear Information System (INIS)

    Zhao, Chumin; Kanicki, Jerzy; Konstantinidis, Anastasios C.; Patel, Tushita

    2015-01-01

    Purpose: Large area x-ray imagers based on complementary metal-oxide-semiconductor (CMOS) active pixel sensor (APS) technology have been proposed for various medical imaging applications including digital breast tomosynthesis (DBT). The low electronic noise (50–300 e − ) of CMOS APS x-ray imagers provides a possible route to shrink the pixel pitch to smaller than 75 μm for microcalcification detection and possible reduction of the DBT mean glandular dose (MGD). Methods: In this study, imaging performance of a large area (29 × 23 cm 2 ) CMOS APS x-ray imager [Dexela 2923 MAM (PerkinElmer, London)] with a pixel pitch of 75 μm was characterized and modeled. The authors developed a cascaded system model for CMOS APS x-ray imagers using both a broadband x-ray radiation and monochromatic synchrotron radiation. The experimental data including modulation transfer function, noise power spectrum, and detective quantum efficiency (DQE) were theoretically described using the proposed cascaded system model with satisfactory consistency to experimental results. Both high full well and low full well (LFW) modes of the Dexela 2923 MAM CMOS APS x-ray imager were characterized and modeled. The cascaded system analysis results were further used to extract the contrast-to-noise ratio (CNR) for microcalcifications with sizes of 165–400 μm at various MGDs. The impact of electronic noise on CNR was also evaluated. Results: The LFW mode shows better DQE at low air kerma (K a < 10 μGy) and should be used for DBT. At current DBT applications, air kerma (K a ∼ 10 μGy, broadband radiation of 28 kVp), DQE of more than 0.7 and ∼0.3 was achieved using the LFW mode at spatial frequency of 0.5 line pairs per millimeter (lp/mm) and Nyquist frequency ∼6.7 lp/mm, respectively. It is shown that microcalcifications of 165–400 μm in size can be resolved using a MGD range of 0.3–1 mGy, respectively. In comparison to a General Electric GEN2 prototype DBT system (at MGD of 2.5 m

  13. Optoelectronic circuits in nanometer CMOS technology

    CERN Document Server

    Atef, Mohamed

    2016-01-01

    This book describes the newest implementations of integrated photodiodes fabricated in nanometer standard CMOS technologies. It also includes the required fundamentals, the state-of-the-art, and the design of high-performance laser drivers, transimpedance amplifiers, equalizers, and limiting amplifiers fabricated in nanometer CMOS technologies. This book shows the newest results for the performance of integrated optical receivers, laser drivers, modulator drivers and optical sensors in nanometer standard CMOS technologies. Nanometer CMOS technologies rapidly advanced, enabling the implementation of integrated optical receivers for high data rates of several Giga-bits per second and of high-pixel count optical imagers and sensors. In particular, low cost silicon CMOS optoelectronic integrated circuits became very attractive because they can be extensively applied to short-distance optical communications, such as local area network, chip-to-chip and board-to-board interconnects as well as to imaging and medical...

  14. Theoretical and experimental study of the dark signal in CMOS image sensors affected by neutron radiation from a nuclear reactor

    Science.gov (United States)

    Xue, Yuanyuan; Wang, Zujun; He, Baoping; Yao, Zhibin; Liu, Minbo; Ma, Wuying; Sheng, Jiangkun; Dong, Guantao; Jin, Junshan

    2017-12-01

    The CMOS image sensors (CISs) are irradiated with neutron from a nuclear reactor. The dark signal in CISs affected by neutron radiation is studied theoretically and experimentally. The Primary knock-on atoms (PKA) energy spectra for 1 MeV incident neutrons are simulated by Geant4. And the theoretical models for the mean dark signal, dark signal non-uniformity (DSNU) and dark signal distribution versus neutron fluence are established. The results are found to be in good agreement with the experimental outputs. Finally, the dark signal in the CISs under the different neutron fluence conditions is estimated. This study provides the theoretical and experimental evidence for the displacement damage effects on the dark signal CISs.

  15. Electrical Interconnections Through CMOS Wafers

    DEFF Research Database (Denmark)

    Rasmussen, Frank Engel

    2003-01-01

    Chips with integrated vias are currently the ultimate miniaturizing solution for 3D packaging of microsystems. Previously the application of vias has almost exclusively been demonstrated within MEMS technology, and only a few of these via technologies have been CMOS compatible. This thesis...... describes the development of vias through a silicon wafer containing Complementary Metal-Oxide Semiconductor (CMOS) circuitry. Two via technologies have been developed and fabricated in blank silicon wafers; one based on KOH etching of wafer through-holes and one based on DRIE of wafer through......-holes. The most promising of these technologies --- the DRIE based process --- has been implemented in CMOS wafers containing hearing aid amplifiers. The main challenges in the development of a CMOS compatible via process depend on the chosen process for etching of wafer through-holes. In the case of KOH etching...

  16. CMOS test and evaluation a physical perspective

    CERN Document Server

    Bhushan, Manjul

    2015-01-01

    This book extends test structure applications described in Microelectronic Test Struc­tures for CMOS Technology (Springer 2011) to digital CMOS product chips. Intended for engineering students and professionals, this book provides a single comprehensive source for evaluating CMOS technology and product test data from a basic knowledge of the physical behavior of the constituent components. Elementary circuits that exhibit key properties of complex CMOS chips are simulated and analyzed, and an integrated view of design, test and characterization is developed. Appropriately designed circuit monitors embedded in the CMOS chip serve to correlate CMOS technology models and circuit design tools to the hardware and also aid in test debug. Impact of silicon process variability, reliability, and power and performance sensitivities to a range of product application conditions are described. Circuit simulations exemplify the methodologies presented, and problems are included at the end of the chapters.

  17. Evaluation of accelerated test parameters for CMOS IC total dose hardness prediction

    International Nuclear Information System (INIS)

    Sogoyan, A.V.; Nikiforov, A.Y.; Chumakov, A.I.

    1999-01-01

    The approach to accelerated test parameters evaluation is presented in order to predict CMOS IC total dose behavior in variable dose-rate environment. The technique is based on the analytical model of MOSFET parameters total dose degradation. The simple way to estimate model parameter is proposed using IC's input-output MOSFET radiation test results. (authors)

  18. Total ionizing dose radiation hardness of the ATLAS MDT-ASD and the HP-Agilent 0.5 um CMOS process

    CERN Document Server

    Posch, C

    2002-01-01

    A total ionizing dose (TID) test of the MDT-ASD, the ATLAS MDT front-end chip has been performed at the Harvard Cyclotron Lab. The MDT-ASD is an 8-channel drift tube read-out ASIC fabricated in a commercial 0.5 um CMOS process (AMOS14TB). The accumulated TID at the end of the test was 300 krad, delivered by 160 MeV protons at a rate of approximately 70 rad/sec. All 10 irradiated chips retained their full functionality and performance and showed only irrelevantly small changes in device parameters. As the total accumulated dose is substantially higher than the relevant ATLAS Radiation Tolerance Criteria (RTCtid), the results of this test indicate that MDT-ASD meets the ATLAS TID radiation hardness requirements. In addition, the results of this test correspond well with results of a 30 keV gamma TID irradiation test performed by us on an earlier prototype at the CERN x-ray facility as well as with results of other irradiation test on this process found in literature.

  19. Wideband CMOS receivers

    CERN Document Server

    Oliveira, Luis

    2015-01-01

    This book demonstrates how to design a wideband receiver operating in current mode, in which the noise and non-linearity are reduced, implemented in a low cost single chip, using standard CMOS technology.  The authors present a solution to remove the transimpedance amplifier (TIA) block and connect directly the mixer’s output to a passive second-order continuous-time Σ∆ analog to digital converter (ADC), which operates in current-mode. These techniques enable the reduction of area, power consumption, and cost in modern CMOS receivers.

  20. Radiation-tolerant delta-sigma time-to-digital converters

    CERN Document Server

    Cao, Ying; Steyaert, Michiel

    2015-01-01

    This book focuses on the design of a Mega-Gray (a standard unit of total ionizing radiation) radiation-tolerant ps-resolution time-to-digital converter (TDC) for a light detection and ranging (LIDAR) system used in a gamma-radiation environment. Several radiation-hardened-by-design (RHBD) techniques are demonstrated throughout the design of the TDC and other circuit techniques to improve the TDC's resolution in a harsh environment are also investigated. Readers can learn from scratch how to design a radiation-tolerant IC. Information regarding radiation effects, radiation-hardened design techniques and  measurements are organized in such a way that readers can easily gain a thorough understanding of the topic. Readers will also learn the design theory behind the newly proposed delta-sigma TDC. Readers can quickly acquire knowledge about the design of radiation-hardened bandgap voltage references and low-jitter relaxation oscillators, which are introduced in the content from a designer's perspective.   · �...

  1. Radiation effects on microelectronics

    International Nuclear Information System (INIS)

    Gover, J.E.

    1987-01-01

    Applications of radiation-hardened microelectronics in nuclear power systems include (a) light water reactor (LWR) containment building, postaccident instrumentation that can operate through the beta and gamma radiation released in a design basis loss-of-coolant accident; (b) advanced LWR instrumentation and control systems employing distributed digital integrated circuit (IC) technology to achieve a high degree of artificial intelligence and thereby reduce the probability of operator error under accident conditions; (c) instrumentation, command, control and communication systems for space nuclear power applications that must operate during the neutron and gamma-ray core leakage environments as well as the background electron, proton, and heavy charged particle environments of space; and (d) robotics systems designed for the described functions. Advanced microelectronics offer advantages in cost and reliability over alternative approaches to instrumentation and control. No semiconductor technology is hard to all classes of radiation effects phenomena. As the effects have become better understood, however, significant progress has been made in hardening IC technology. Application of hardened microelectronics to nuclear power systems has lagged military applications because of the limited market potential of hardened instruments and numerous institutional impediments

  2. CMOS Pixel Sensors for High Precision Beam Telescopes and Vertex Detectors

    International Nuclear Information System (INIS)

    Masi, R. de; Baudot, J.; Fontaine, J.-Ch.

    2009-01-01

    CMOS sensors of the MIMOSA (standing for Minimum Ionising particle MOS Active pixel sensor) series are developed at IPHC since a decade and have ended up with full scale devices used in beam telescopes and in demonstrators of future vertex detectors. The sensors deliver analogue, unfiltered, signals and are therefore limited to read-out frequencies of ∼ 1 kframe/s. Since a few years, a fast architecture is being developed in collaboration with IRFU, which aims to speed up the read-out by 1-2 orders of magnitude. The first full scale sensor based on this architecture was fabricated recently and is being tested. Made of 660,000 pixels (18 μm pitch) covering an active area of ∼ 2 cm 2 , it delivers zero-suppressed binary signals, which allow running at ∼ 10 kframes/s. It will equip the beam telescope of the E.U. project EUDET and serve as a forerunner of the sensor equipping the 2 layers of the PIXEL detector of the STAR experiment at RHIC. The contribution to the conference will overview the main features and test results of this pioneering sensor. It will next describe its evolution towards read-out frequencies approaching 100 kframes/s, as required for the vertex detectors of the CBM experiment at FAIR and at the ILC. Finally, the issue of radiation tolerance will be addressed, in the context of a newly available CMOS process using a depleted substrate. A prototype sensor was fabricated in a such CMOS process. The talk will summarise beam test results showing, for the first time, that fluences of 10 14 n eq /cm 2 may be tolerable for CMOS sensors. Overall, the talk provides an overview of the status and plans of CMOS pixel sensors at the frontier of their achievements and outreach. (author)

  3. Design Methodologies and to Combat Radiation Induced Corruption in FPGAs and SoCs, Phase I

    Data.gov (United States)

    National Aeronautics and Space Administration — Traditional radiation hardened by process (RHBP) and radiation hardened by design (RHBD) techniques have seen success in mitigating the effects of radiation induced...

  4. Working hardening modelization in zirconium alloys

    International Nuclear Information System (INIS)

    Sanchez, P.; Pochettino, Alberto A.

    1999-01-01

    Working hardening effects on mechanical properties and crystallographic textures formation in Zr-based alloys are studied. The hardening mechanisms for different grain deformations and topological conditions of simple crystal yield are considered. Results obtained show that the differences in the cold rolling textures (L and T textures) can be related with hardening microstructural parameters. (author)

  5. Practical aspects of systems hardening

    International Nuclear Information System (INIS)

    Shepherd, W.J.

    1989-01-01

    Applications of hardening technology in a practical system require a balance between the factors governing affordability, producibility, and survivability of the finished design. Without careful consideration of the top-level system operating constraints, a design engineer may find himself with a survivable but overweight, unproductive, expensive design. This paper explores some lessons learned in applying hardening techniques to several laser communications programs and is intended as an introductory guide to novice designers faced with the task of hardening a space system

  6. Development of ultra-light pixelated systems based on CMOS sensors for future high precision vertex detectors

    Energy Technology Data Exchange (ETDEWEB)

    Winter, Marc [Institut Pluridisciplinaire Hubert Curien - IPHC, 23 rue du loess - BP28, 67037 Strasbourg cedex 2 (France)

    2010-07-01

    CMOS pixel sensors have demonstrated attractive performances in terms of spatial resolution and material budget. The recent emergence of high resistivity substrates in mass production CMOS processes has originated particularly high signal-to-noise ratios and improved the non-ionising radiation tolerance to fluences close to 10{sup 14} Neq/cm{sup 2}. These achievements, obtained with MIMOSA sensors developed at IPHC (Strasbourg) and IRFU (Saclay) will be overviewed and put in perspective of the numerous applications of the sensors. These include collider experiments at RHIC, LHC, ILC and CLIC. The development of ultra-light ladders composed of these sensors and featuring 0.1% to 0.3% of radiation length, will be summarised. The contribution to the conference will also address the evolution of these pixelated systems, including on-going R on multi-tier sensors exploiting vertical integration technologies. (author)

  7. Distributed CMOS Bidirectional Amplifiers Broadbanding and Linearization Techniques

    CERN Document Server

    El-Khatib, Ziad; Mahmoud, Samy A

    2012-01-01

    This book describes methods to design distributed amplifiers useful for performing circuit functions such as duplexing, paraphrase amplification, phase shifting power splitting and power combiner applications.  A CMOS bidirectional distributed amplifier is presented that combines for the first time device-level with circuit-level linearization, suppressing the third-order intermodulation distortion. It is implemented in 0.13μm RF CMOS technology for use in highly linear, low-cost UWB Radio-over-Fiber communication systems. Describes CMOS distributed amplifiers for optoelectronic applications such as Radio-over-Fiber systems, base station transceivers and picocells; Presents most recent techniques for linearization of CMOS distributed amplifiers; Includes coverage of CMOS I-V transconductors, as well as CMOS on-chip inductor integration and modeling; Includes circuit applications for UWB Radio-over-Fiber networks.

  8. A CMOS Morlet Wavelet Generator

    Directory of Open Access Journals (Sweden)

    A. I. Bautista-Castillo

    2017-04-01

    Full Text Available The design and characterization of a CMOS circuit for Morlet wavelet generation is introduced. With the proposed Morlet wavelet circuit, it is possible to reach a~low power consumption, improve standard deviation (σ control and also have a small form factor. A prototype in a double poly, three metal layers, 0.5 µm CMOS process from MOSIS foundry was carried out in order to verify the functionality of the proposal. However, the design methodology can be extended to different CMOS processes. According to the performance exhibited by the circuit, may be useful in many different signal processing tasks such as nonlinear time-variant systems.

  9. CMOS image sensors: State-of-the-art

    Science.gov (United States)

    Theuwissen, Albert J. P.

    2008-09-01

    This paper gives an overview of the state-of-the-art of CMOS image sensors. The main focus is put on the shrinkage of the pixels : what is the effect on the performance characteristics of the imagers and on the various physical parameters of the camera ? How is the CMOS pixel architecture optimized to cope with the negative performance effects of the ever-shrinking pixel size ? On the other hand, the smaller dimensions in CMOS technology allow further integration on column level and even on pixel level. This will make CMOS imagers even smarter that they are already.

  10. All-CMOS night vision viewer with integrated microdisplay

    Science.gov (United States)

    Goosen, Marius E.; Venter, Petrus J.; du Plessis, Monuko; Faure, Nicolaas M.; Janse van Rensburg, Christo; Rademeyer, Pieter

    2014-02-01

    The unrivalled integration potential of CMOS has made it the dominant technology for digital integrated circuits. With the advent of visible light emission from silicon through hot carrier electroluminescence, several applications arose, all of which rely upon the advantages of mature CMOS technologies for a competitive edge in a very active and attractive market. In this paper we present a low-cost night vision viewer which employs only standard CMOS technologies. A commercial CMOS imager is utilized for near infrared image capturing with a 128x96 pixel all-CMOS microdisplay implemented to convey the image to the user. The display is implemented in a standard 0.35 μm CMOS process, with no process alterations or post processing. The display features a 25 μm pixel pitch and a 3.2 mm x 2.4 mm active area, which through magnification presents the virtual image to the user equivalent of a 19-inch display viewed from a distance of 3 meters. This work represents the first application of a CMOS microdisplay in a low-cost consumer product.

  11. The RD50 activity in the context of future pixel detector systems

    International Nuclear Information System (INIS)

    Casse, G.

    2015-01-01

    The CERN/RD50 collaboration is dedicated to the radiation hardening of semiconductor sensors for future super-collider needs. The findings of this collaboration are therefore especially relevant to the pixel devices for the LHC experiment upgrades. A considerable amount of results on the enhancement of the radiation tolerance of silicon sensors has been found within RD50. The research towards radiation hardening has highlighted, and increased the knowledge on properties of sensors that are relevant to other applications. For example radiation hardening relies on the speed of signal collection in irradiated devices. As a consequence, the methods envisaged for increasing this collection speed turn out to be promising for significantly improving the performance of time resolved, high spatial resolution systems. A new type of device processing strongly emerging for production of future pixel sensor systems is the HV-CMOS technology. The RD50 research methodology provides the tools for characterising the behaviour of the deep collecting electrode (deep n-well) for this type of device after irradiation and the optimal framework for comparing the performance of the new devices with the current state of the art

  12. Monolithic pixel development in 180 nm CMOS for the outer pixel layers in the ATLAS experiment

    CERN Document Server

    Kugathasan, Thanushan; Buttar, Craig; Berdalovic, Ivan; Blochet, Bastien; Cardella, Roberto Calogero; Dalla, Marco; Egidos Plaja, Nuria; Hemperek, Tomasz; Van Hoorne, Jacobus Willem; Maneuski, Dima; Marin Tobon, Cesar Augusto; Moustakas, Konstantinos; Mugnier, Herve; Musa, Luciano; Pernegger, Heinz; Riedler, Petra; Riegel, Christian; Rousset, Jerome; Sbarra, Carla; Schaefer, Douglas Michael; Schioppa, Enrico Junior; Sharma, Abhishek; Snoeys, Walter; Solans Sanchez, Carlos; Wang, Tianyang; Wermes, Norbert

    2017-01-01

    The ATLAS experiment at CERN plans to upgrade its Inner Tracking System for the High-Luminosity LHC in 2026. After the ALPIDE monolithic sensor for the ALICE ITS was successfully implemented in a 180 nm CMOS Imaging Sensor technology, the process was modified to combine full sensor depletion with a low sensor capacitance (≈ 2.5fF), for increased radiation tolerance and low analog power consumption. Efficiency and charge collection time were measured with comparisons before and after irradiation. This paper summarises the measurements and the ATLAS-specific development towards full-reticle size CMOS sensors and modules in this modified technology.

  13. Monolithic front-end ICs for interpolating cathode pad and strip detectors for GEM

    International Nuclear Information System (INIS)

    O'Connor, P.

    1993-05-01

    We are developing CMOS circuits for readout of interpolating cathode strip and pad chambers for the GEM experiment at the SSC. Because these detectors require position resolution of about 1% of the strip pitch, the electronic noise level must be less than 2000 electrons. Several test chips have been fabricated to demonstrate the feasibility of achieving the combination of low noise, speed, and wide dynamic range in CMOS. Results to date show satisfactory noise and linearity performance. Future development will concentrate on radiation-hardening the central tracker ASIC design, optimizing the shaper peaking time and noise contribution, providing more user-configurable output options, and packaging and test issues

  14. High-voltage pixel detectors in commercial CMOS technologies for ATLAS, CLIC and Mu3e experiments

    CERN Document Server

    Peric, Ivan; Backhaus, Malte; Barbero, Marlon; Benoit, Mathieu; Berger, Niklaus; Bompard, Frederic; Breugnon, Patrick; Clemens, Jean-Claude; Dannheim, Dominik; Dierlamm, Alexander; Feigl, Simon; Fischer, Peter; Fougeron, Denis; Garcia-Sciveres, Maurice; Heim, Timon; Hügging, Fabian; Kiehn, Moritz; Kreidl, Christian; Krüger, Hans; La Rosa, Alessandro; Liu, Jian; Lütticke, Florian; Mariñas, Carlos; Meng, Lingxin; Miucci, Antonio; Münstermann, Daniel; Nguyen, Hong Hanh; Obermann, Theresa; Pangaud, Patrick; Perrevoort, Ann-Kathrin; Rozanov, Alexandre; Schöning, André; Schwenker, Benjamin; Wiedner, Dirk

    2013-01-01

    High-voltage particle detectors in commercial CMOS technologies are a detector family that allows implementation of low-cost, thin and radiation-tolerant detectors with a high time resolution. In the R/D phase of the development, a radiation tolerance of 10 15 n eq = cm 2 , nearly 100% detection ef fi ciency and a spatial resolution of about 3 μ m were demonstrated. Since 2011 the HV detectors have fi rst applications: the technology is presently the main option for the pixel detector of the planned Mu3e experiment at PSI (Switzerland). Several prototype sensors have been designed in a standard 180 nm HV CMOS process and successfully tested. Thanks to its high radiation tolerance, the HV detectors are also seen at CERN as a promising alternative to the standard options for ATLAS upgrade and CLIC. In order to test the concept, within ATLAS upgrade R/D, we are currently exploring an active pixel detector demonstrator HV2FEI4; also implemented in the 180 nm HV process

  15. Ionizing Radiation Effects on the Noise of 65 nm CMOS Transistors for Pixel Sensor Readout at Extreme Total Dose Levels

    CERN Document Server

    Re, V.; Manghisoni, M.; Riceputi, E.; Traversi, G.; Ratti, L.

    2018-01-01

    This paper is focused on the study of the noise performance of 65 nm CMOS transistors at extremely high total ionizing dose (TID) levels of the order of several hundreds of Mrad(SiO2). Noise measurements are reported and discussed, analyzing radiation effects on 1/ f noise and channel thermal noise. In nMOSFETs, up to 10 Mrad(SiO2), the experimental behavior is consistent with a damage mechanism mainly associ- ated with lateral isolation oxides, and can be modeled by parasitic transistors turning on after irradiation and contributing to the total noise of the device. At very high dose, these parasitic transistors tend to be turned off by negative charge accumulating in interface states and compensating radiation-induced positive charge building up inside thick isolation oxides. Effects associated with ionization and hydrogen transport in spacer oxides may become dominant at 600 Mrad(SiO2) and may explain the observed noise behavior at extremely high TID. The results of this analysis provide an understanding o...

  16. Développement de circuits logiques programmables résistants aux alas logiques en technologie CMOS submicrométrique

    CERN Document Server

    Bonacini, Sandro; Kloukinas, Kostas

    2007-01-01

    The electronics associated to the particle detectors of the Large Hadron Collider (LHC), under construction at CERN, will operate in a very harsh radiation environment. Most of the microelectronics components developed for the first generation of LHC experiments have been designed with very precise experiment-specific goals and are hardly adaptable to other applications. Commercial Off-The-Shelf (COTS) components cannot be used in the vicinity of particle collision due to their poor radiation tolerance. This thesis is a contribution to the effort to cover the need for radiation-tolerant SEU-robust programmable components for application in High Energy Physics (HEP) experiments. Two components are under development: a Programmable Logic Device (PLD) and a Field-Programmable Gate Array (FPGA). The PLD is a fuse-based, 10-input, 8-I/O general architecture device in 0.25 micron CMOS technology. The FPGA under development is instead a 32x32 logic block array, equivalent to ~25k gates, in 0.13 micron CMOS. This wor...

  17. Beyond CMOS nanodevices 1

    CERN Document Server

    Balestra, Francis

    2014-01-01

    This book offers a comprehensive review of the state-of-the-art in innovative Beyond-CMOS nanodevices for developing novel functionalities, logic and memories dedicated to researchers, engineers and students.  It particularly focuses on the interest of nanostructures and nanodevices (nanowires, small slope switches, 2D layers, nanostructured materials, etc.) for advanced More than Moore (RF-nanosensors-energy harvesters, on-chip electronic cooling, etc.) and Beyond-CMOS logic and memories applications

  18. Beyond CMOS nanodevices 2

    CERN Document Server

    Balestra, Francis

    2014-01-01

    This book offers a comprehensive review of the state-of-the-art in innovative Beyond-CMOS nanodevices for developing novel functionalities, logic and memories dedicated to researchers, engineers and students. The book will particularly focus on the interest of nanostructures and nanodevices (nanowires, small slope switches, 2D layers, nanostructured materials, etc.) for advanced More than Moore (RF-nanosensors-energy harvesters, on-chip electronic cooling, etc.) and Beyond-CMOS logic and memories applications.

  19. Solution hardening and strain hardening at elevated temperatures

    International Nuclear Information System (INIS)

    Kocks, U.F.

    1982-10-01

    Solutes can significantly increase the rate of strain hardening; as a consequence, the saturation stress, at which strain hardening tends to cease for a given temperature and strain rate, is increased more than the yield stress: this is the major effect of solutes on strength at elevated temperatures, especially in the regime where dynamic strain-aging occurs. It is shown that local solute mobility can affect both the rate of dynamic recovery and the dislocation/dislocation interaction strength. The latter effect leads to multiplicative solution strengthening. It is explained by a new model based on repeated dislocation unlocking, in a high-temperature limit, which also rationalizes the stress dependence of static and dynamic strain-aging, and may help explain the plateau of the yield stress at elevated temperatures. 15 figures

  20. Study of built-in amplifier performance on HV-CMOS sensor for the ATLAS phase-II strip tracker upgrade

    Energy Technology Data Exchange (ETDEWEB)

    Liang, Z., E-mail: zhijun.liang@cern.ch [University of California Santa Cruz, Santa Cruz Institute for Particle Physics (SCIPP) (United States); Institute of High Energy Physics, Beijing (China); Affolder, A. [University of Liverpool (United Kingdom); Arndt, K. [University of Oxford (United Kingdom); Bates, R. [SUPA – School of Physics and Astronomy, University of Glasgow, Glasgow (United Kingdom); Benoit, M.; Di Bello, F. [University of Geneva (Switzerland); Blue, A. [SUPA – School of Physics and Astronomy, University of Glasgow, Glasgow (United Kingdom); Bortoletto, D. [University of Oxford (United Kingdom); Buckland, M. [University of Liverpool (United Kingdom); CERN, European Center for Nuclear Research (Switzerland); Buttar, C. [SUPA – School of Physics and Astronomy, University of Glasgow, Glasgow (United Kingdom); Caragiulo, P. [SLAC National Accelerator Laboratory (United States); Das, D.; Dopke, J. [Rutherford Appleton Laboratory, Didcot (United Kingdom); Dragone, A. [SLAC National Accelerator Laboratory (United States); Ehrler, F. [Karlsruhe Institute of Technology (Germany); Fadeyev, V.; Galloway, Z.; Grabas, H. [University of California Santa Cruz, Santa Cruz Institute for Particle Physics (SCIPP) (United States); Gregor, I.M. [Deutsches Elektronen-Synchrotron (Germany); Grenier, P. [SLAC National Accelerator Laboratory (United States); and others

    2016-09-21

    This paper focuses on the performance of analog readout electronics (built-in amplifier) integrated on the high-voltage (HV) CMOS silicon sensor chip, as well as its radiation hardness. Since the total collected charge from minimum ionizing particle (MIP) for the CMOS sensor is 10 times lower than for a conventional planar sensor, it is crucial to integrate a low noise built-in amplifier on the sensor chip to improve the signal to noise ratio of the system. As part of the investigation for the ATLAS strip detector upgrade, a test chip that comprises several pixel arrays with different geometries, as well as standalone built-in amplifiers and built-in amplifiers in pixel arrays has been fabricated in a 0.35 μm high-voltage CMOS process. Measurements of the gain and the noise of both the standalone amplifiers and built-in amplifiers in pixel arrays were performed before and after gamma radiation of up to 60 Mrad. Of special interest is the variation of the noise as a function of the sensor capacitance. We optimized the configuration of the amplifier for a fast rise time to adapt to the LHC bunch crossing period of 25 ns, and measured the timing characteristics including jitter. Our results indicate an adequate amplifier performance for monolithic structures used in HV-CMOS technology. The results have been incorporated in the next submission of a large-structure chip.

  1. Variation-aware advanced CMOS devices and SRAM

    CERN Document Server

    Shin, Changhwan

    2016-01-01

    This book provides a comprehensive overview of contemporary issues in complementary metal-oxide semiconductor (CMOS) device design, describing how to overcome process-induced random variations such as line-edge-roughness, random-dopant-fluctuation, and work-function variation, and the applications of novel CMOS devices to cache memory (or Static Random Access Memory, SRAM). The author places emphasis on the physical understanding of process-induced random variation as well as the introduction of novel CMOS device structures and their application to SRAM. The book outlines the technical predicament facing state-of-the-art CMOS technology development, due to the effect of ever-increasing process-induced random/intrinsic variation in transistor performance at the sub-30-nm technology nodes. Therefore, the physical understanding of process-induced random/intrinsic variations and the technical solutions to address these issues plays a key role in new CMOS technology development. This book aims to provide the reade...

  2. Hardening Azure applications

    CERN Document Server

    Gaurav, Suraj

    2015-01-01

    Learn what it takes to build large scale, mission critical applications -hardened applications- on the Azure cloud platform. This 208 page book covers the techniques and engineering principles that every architect and developer needs to know to harden their Azure/.NET applications to ensure maximum reliability and high availability when deployed at scale. While the techniques are implemented in .NET and optimized for Azure, the principles here will also be valuable for users of other cloud-based development platforms. Applications come in a variety of forms, from simple apps that can be bui

  3. Monolithic CMOS imaging x-ray spectrometers

    Science.gov (United States)

    Kenter, Almus; Kraft, Ralph; Gauron, Thomas; Murray, Stephen S.

    2014-07-01

    The Smithsonian Astrophysical Observatory (SAO) in collaboration with SRI/Sarnoff is developing monolithic CMOS detectors optimized for x-ray astronomy. The goal of this multi-year program is to produce CMOS x-ray imaging spectrometers that are Fano noise limited over the 0.1-10keV energy band while incorporating the many benefits of CMOS technology. These benefits include: low power consumption, radiation "hardness", high levels of integration, and very high read rates. Small format test devices from a previous wafer fabrication run (2011-2012) have recently been back-thinned and tested for response below 1keV. These devices perform as expected in regards to dark current, read noise, spectral response and Quantum Efficiency (QE). We demonstrate that running these devices at rates ~> 1Mpix/second eliminates the need for cooling as shot noise from any dark current is greatly mitigated. The test devices were fabricated on 15μm, high resistivity custom (~30kΩ-cm) epitaxial silicon and have a 16 by 192 pixel format. They incorporate 16μm pitch, 6 Transistor Pinned Photo Diode (6TPPD) pixels which have ~40μV/electron sensitivity and a highly parallel analog CDS signal chain. Newer, improved, lower noise detectors have just been fabricated (October 2013). These new detectors are fabricated on 9μm epitaxial silicon and have a 1k by 1k format. They incorporate similar 16μm pitch, 6TPPD pixels but have ~ 50% higher sensitivity and much (3×) lower read noise. These new detectors have undergone preliminary testing for functionality in Front Illuminated (FI) form and are presently being prepared for back thinning and packaging. Monolithic CMOS devices such as these, would be ideal candidate detectors for the focal planes of Solar, planetary and other space-borne x-ray astronomy missions. The high through-put, low noise and excellent low energy response, provide high dynamic range and good time resolution; bright, time varying x-ray features could be temporally and

  4. Simulation of design dependent failure exposure levels for CMOS ICs

    International Nuclear Information System (INIS)

    Kaul, N.; Bhuva, B.L.; Rangavajjhala, V.; van der Molen, H.; Kerns, S.E.

    1990-01-01

    The total dose exposure of CMOS ICs introduces bias-dependent parameter shifts in individual devices. The bias dependency of individual parameter shifts of devices cause different designs to behave differently under identical testing conditions. This paper studies the effect of design and bias on the radiation tolerance of ICs and presents an automated design tool that produces different designs for a logic function, and presents important parameters of each design to circuit designer for trade off analysis

  5. Poly-SiGe for MEMS-above-CMOS sensors

    CERN Document Server

    Gonzalez Ruiz, Pilar; Witvrouw, Ann

    2014-01-01

    Polycrystalline SiGe has emerged as a promising MEMS (Microelectromechanical Systems) structural material since it provides the desired mechanical properties at lower temperatures compared to poly-Si, allowing the direct post-processing on top of CMOS. This CMOS-MEMS monolithic integration can lead to more compact MEMS with improved performance. The potential of poly-SiGe for MEMS above-aluminum-backend CMOS integration has already been demonstrated. However, aggressive interconnect scaling has led to the replacement of the traditional aluminum metallization by copper (Cu) metallization, due to its lower resistivity and improved reliability. Poly-SiGe for MEMS-above-CMOS sensors demonstrates the compatibility of poly-SiGe with post-processing above the advanced CMOS technology nodes through the successful fabrication of an integrated poly-SiGe piezoresistive pressure sensor, directly fabricated above 0.13 m Cu-backend CMOS. Furthermore, this book presents the first detailed investigation on the influence o...

  6. CMOS dot matrix microdisplay

    Science.gov (United States)

    Venter, Petrus J.; Bogalecki, Alfons W.; du Plessis, Monuko; Goosen, Marius E.; Nell, Ilse J.; Rademeyer, P.

    2011-03-01

    Display technologies always seem to find a wide range of interesting applications. As devices develop towards miniaturization, niche applications for small displays may emerge. While OLEDs and LCDs dominate the market for small displays, they have some shortcomings as relatively expensive technologies. Although CMOS is certainly not the dominating semiconductor for photonics, its widespread use, favourable cost and robustness present an attractive potential if it could find application in the microdisplay environment. Advances in improving the quantum efficiency of avalanche electroluminescence and the favourable spectral characteristics of light generated through the said mechanism may afford CMOS the possibility to be used as a display technology. This work shows that it is possible to integrate a fully functional display in a completely standard CMOS technology mainly geared towards digital design while using light sources completely compatible with the process and without any post processing required.

  7. Ultra-low power high temperature and radiation hard complementary metal-oxide-semiconductor (CMOS) silicon-on-insulator (SOI) voltage reference.

    Science.gov (United States)

    Boufouss, El Hafed; Francis, Laurent A; Kilchytska, Valeriya; Gérard, Pierre; Simon, Pascal; Flandre, Denis

    2013-12-13

    This paper presents an ultra-low power CMOS voltage reference circuit which is robust under biomedical extreme conditions, such as high temperature and high total ionized dose (TID) radiation. To achieve such performances, the voltage reference is designed in a suitable 130 nm Silicon-on-Insulator (SOI) industrial technology and is optimized to work in the subthreshold regime of the transistors. The design simulations have been performed over the temperature range of -40-200 °C and for different process corners. Robustness to radiation was simulated using custom model parameters including TID effects, such as mobilities and threshold voltages degradation. The proposed circuit has been tested up to high total radiation dose, i.e., 1 Mrad (Si) performed at three different temperatures (room temperature, 100 °C and 200 °C). The maximum drift of the reference voltage V(REF) depends on the considered temperature and on radiation dose; however, it remains lower than 10% of the mean value of 1.5 V. The typical power dissipation at 2.5 V supply voltage is about 20 μW at room temperature and only 75 μW at a high temperature of 200 °C. To understand the effects caused by the combination of high total ionizing dose and temperature on such voltage reference, the threshold voltages of the used SOI MOSFETs were extracted under different conditions. The evolution of V(REF) and power consumption with temperature and radiation dose can then be explained in terms of the different balance between fixed oxide charge and interface states build-up. The total occupied area including pad-ring is less than 0.09 mm2.

  8. Development of a hardened X-ray imager for the Megajoule Laser radiative environment

    International Nuclear Information System (INIS)

    Rousseau, A.

    2014-01-01

    Thermonuclear fusion experiments are led on Megajoule class laser facility by imploding a capsule filled with Deuterium and Tritium. In this context, it is necessary to diagnose the core size and the shape of the compressed target in order to provide valuable information and identify reasons for failure. State of the art X-ray imaging diagnostics cannot realize measurements without being perturbed by the nuclear background. The diagnostic that has been designed in this thesis combine high spatial resolution X-ray imaging at high energy and radiation tolerance to nuclear background. We have first guaranteed, theoretically and experimentally, survivability of X ray multilayer coating to energetic neutrons irradiation. Consequently, we have design the X-ray imaging system in order to achieve 5 μm resolution in a spectral range up to 95 keV. The X-ray image has then been converted into visible light in order to be easily transferred through a hardened optical relay to a protected area where the optical analyser is set. This analyser, combining light amplifier and pixelised detector, has also been studied and a novel method has been developed to reduce nuclear related transient perturbations on the device. This by parts design associated with Monte-Carlo Simulation (GEANT4) and experimental campaign on FCI facility (OMEGA) led to a coherent diagnostic architecture which will sustain high level of nuclear perturbation. (author) [fr

  9. Advantages of dry hardened cask storage over wet storage for spent nuclear fuel

    Energy Technology Data Exchange (ETDEWEB)

    Romanato, Luiz Sergio, E-mail: romanato@ctmsp.mar.mil.b [Centro Tecnologico da Marinha em Sao Paulo (CTMSP), Sao Paulo, SP (Brazil). Dept. da Qualidade

    2011-07-01

    Pools are generally used to store and maintain spent nuclear fuel assemblies for cooling, after removed from reactors. After three to five years stored in the pools, spent fuel can be reprocessed or sent to a final disposition in a geological repository and handled as radioactive waste or sent to another site waiting for future solution. Spent fuel can be stored in dry or wet installations, depending on the method adopted by the nuclear plant. If this storage were exclusively wet, at the installation decommissioning in the future, another solution for storage will need to be found. Today, after a preliminary cooling, the spent fuel assemblies can be removed from the pool and sent to dry hardened storage installations. This kind of storage does not need complex radiation monitoring and it is safer than wet storage. Brazil has two nuclear reactors in operation, a third reactor is under construction and they use wet spent fuel storage . Dry hardened casks use metal or both metal and concrete for radiation shielding and they are safe, especially during an earthquake. An earthquake struck Japan on March 11, 2011 damaging Fukushima Daiichi nuclear power plant. The occurrence of earthquakes in Brazil is very small but dry casks can resist to other events, including terrorist acts, better than pools. This paper shows the advantages of dry hardened cask storage in comparison with the wet storage (water pools) for spent nuclear fuel. (author)

  10. Advantages of dry hardened cask storage over wet storage for spent nuclear fuel

    International Nuclear Information System (INIS)

    Romanato, Luiz Sergio

    2011-01-01

    Pools are generally used to store and maintain spent nuclear fuel assemblies for cooling, after removed from reactors. After three to five years stored in the pools, spent fuel can be reprocessed or sent to a final disposition in a geological repository and handled as radioactive waste or sent to another site waiting for future solution. Spent fuel can be stored in dry or wet installations, depending on the method adopted by the nuclear plant. If this storage were exclusively wet, at the installation decommissioning in the future, another solution for storage will need to be found. Today, after a preliminary cooling, the spent fuel assemblies can be removed from the pool and sent to dry hardened storage installations. This kind of storage does not need complex radiation monitoring and it is safer than wet storage. Brazil has two nuclear reactors in operation, a third reactor is under construction and they use wet spent fuel storage . Dry hardened casks use metal or both metal and concrete for radiation shielding and they are safe, especially during an earthquake. An earthquake struck Japan on March 11, 2011 damaging Fukushima Daiichi nuclear power plant. The occurrence of earthquakes in Brazil is very small but dry casks can resist to other events, including terrorist acts, better than pools. This paper shows the advantages of dry hardened cask storage in comparison with the wet storage (water pools) for spent nuclear fuel. (author)

  11. Study of a design criterion for 316L irradiated represented by a strain hardened material; Etude d'un critere de dimensionnement d'un acier 316L irradie represente par un materiau ecroui

    Energy Technology Data Exchange (ETDEWEB)

    Gouin, H

    1999-07-01

    The aim of this study is to analyse the consequence of radiation on different structure submitted to imposed displacement loading and for damages due to plastic instability or rupture. The main consequence of radiation is a material hardening with a ductility decrease. This effect is similar to initial mechanical hardening: the mechanical properties (determined on smooth tensile specimen) evolve in the same way while irradiation or mechanical hardening increase. So in this study, radiation hardening is simulated by mechanical hardening (swaging). Tests were carried out for which two damages were considered: plastic instability and rupture. These two damages were studied with initial mechanical hardening (5 tested hammering rate 0, 15, 25, 35 and 45% on 316L stainless steel). Likewise two types of loading were studied: tensile or bending loading on specimens with or without geometrical singularities (notches). From tensile tests, two deformation criteria are proposed for prevention against the two quoted damages. Numerical study is carried out allowing to confirm hypothesis made at the time of the tensile test result interpretation and to validate the rupture criterion by applying on bending test. (author)

  12. On the integration of ultrananocrystalline diamond (UNCD with CMOS chip

    Directory of Open Access Journals (Sweden)

    Hongyi Mi

    2017-03-01

    Full Text Available A low temperature deposition of high quality ultrananocrystalline diamond (UNCD film onto a finished Si-based CMOS chip was performed to investigate the compatibility of the UNCD deposition process with CMOS devices for monolithic integration of MEMS on Si CMOS platform. DC and radio-frequency performances of the individual PMOS and NMOS devices on the CMOS chip before and after the UNCD deposition were characterized. Electrical characteristics of CMOS after deposition of the UNCD film remained within the acceptable ranges, namely showing small variations in threshold voltage Vth, transconductance gm, cut-off frequency fT and maximum oscillation frequency fmax. The results suggest that low temperature UNCD deposition is compatible with CMOS to realize monolithically integrated CMOS-driven MEMS/NEMS based on UNCD.

  13. Characterization of various Si-photodiode junction combinations and layout specialities in 0.18µm CMOS and HV-CMOS technologies

    Science.gov (United States)

    Jonak-Auer, I.; Synooka, O.; Kraxner, A.; Roger, F.

    2017-12-01

    With the ongoing miniaturization of CMOS technologies the need for integrated optical sensors on smaller scale CMOS nodes arises. In this paper we report on the development and implementation of different optical sensor concepts in high performance 0.18µm CMOS and high voltage (HV) CMOS technologies on three different substrate materials. The integration process is such that complete modularity of the CMOS processes remains untouched and no additional masks or ion implantation steps are necessary for the sensor integration. The investigated processes support 1.8V and 3V standard CMOS functionality as well as HV transistors capable of operating voltages of 20V and 50V. These processes intrinsically offer a wide variety of junction combinations, which can be exploited for optical sensing purposes. The availability of junction depths from submicron to several microns enables the selection of spectral range from blue to infrared wavelengths. By appropriate layout the contributions of photo-generated carriers outside the target spectral range can be kept to a minimum. Furthermore by making use of other features intrinsically available in 0.18µm CMOS and HV-CMOS processes dark current rates of optoelectronic devices can be minimized. We present TCAD simulations as well as spectral responsivity, dark current and capacitance data measured for various photodiode layouts and the influence of different EPI and Bulk substrate materials thereon. We show examples of spectral responsivity of junction combinations optimized for peak sensitivity in the ranges of 400-500nm, 550-650nm and 700-900nm. Appropriate junction combination enables good spectral resolution for colour sensing applications even without any additional filter implementation. We also show that by appropriate use of shallow trenches dark current values of photodiodes can further be reduced.

  14. Understanding of radiation effect on sinks in aluminum materials for research reactors

    Energy Technology Data Exchange (ETDEWEB)

    Choi, Sang Il; Kim, Ji Hyun [UNIST, Daejeon (Korea, Republic of)

    2015-05-15

    Aluminum and its alloy are widely used in structural materials for research reactor such as guide tube and cladding because of its physical properties such as high thermal conductivity, neutron economy and corrosion resistant properties. Although aluminum and its alloy have excellent characteristic, radiation induced hardening and swelling are still important safety concern. From microstructural analysis, it was confirmed that dislocation loop, void and precipitate are major sinks which induced swelling and hardening. Among these defects, precipitation such as Mg{sub 2}Si and Si were generated by reaction between alloy elements and transmutations. Therefore, radiation induced swelling and hardening can be predicted by analyzing these defect. However, quantitative analysis of these defects has not been done by computational tools. Therefore, it is unclear that specific mechanism of alloy element effects on the irradiation swelling and hardening in aluminum alloys. Historically, radiation induced phenomena such as swelling, growth and hardening is simulated by Mean Field Radiation Damage Theory (MFRDT). From the MFRDT, reactions of irradiation defect and sink are calculated and then sink density is evolved at each type of sinks. The aim of this study is understanding of radiation effect on sink behavior. From the simplified reaction mechanism, defect concentration, sink density and irradiation hardening are calculated at each sink type. Transmutation effect was mostly dominant and dislocation loop and void effect were negligible.

  15. Influence of Microstructure and Process Conditions on Simultaneous Low-Temperature Surface Hardening and Bulk Precipitation Hardening of Nanoflex®

    DEFF Research Database (Denmark)

    Bottoli, Federico; Winther, Grethe; Christiansen, Thomas L.

    2015-01-01

    Precipitation hardening martensitic stainless steel Nanoflex was low-temperature nitrided or nitrocarburized. In these treatments, simultaneous hardening of the bulk, by precipitation hardening, and the surface by dissolving nitrogen/carbon can be obtained because the treatment temperatures...... and times for these essentially different hardening mechanisms are compatible. The effect of the processing history of the steel on the nitrided/nitrocarburized case was investigated by varying the amounts of austenite and martensite through variation of the degree of plastic deformation by tensile strain...... consisting of martensite results in the deepest nitrided case, while a shallow case develops on a microstructure consisting of austenite. For an initial microstructure consisting of both martensite and austenite a non-uniform case depth is achieved. Simultaneous bulk and surface hardening is only possible...

  16. Devising Strain Hardening Models Using Kocks–Mecking Plots—A Comparison of Model Development for Titanium Aluminides and Case Hardening Steel

    Directory of Open Access Journals (Sweden)

    Markus Bambach

    2016-08-01

    Full Text Available The present study focuses on the development of strain hardening models taking into account the peculiarities of titanium aluminides. In comparison to steels, whose behavior has been studied extensively in the past, titanium aluminides possess a much larger initial work hardening rate, a sharp peak stress and pronounced softening. The work hardening behavior of a TNB-V4 (Ti–44.5Al–6.25Nb–0.8Mo–0.1B alloy is studied using isothermal hot compression tests conducted on a Gleeble 3500 simulator, and compared to the typical case hardening steel 25MoCrS4. The behavior is analyzed with the help of the Kocks-Mecking plots. In contrast to steel the TNB-V4 alloy shows a non-linear course of θ (i.e., no stage-III hardening initially and exhibits neither a plateau (stage IV hardening nor an inflection point at all deformation conditions. The present paper describes the development and application of a methodology for the design of strain hardening models for the TNB-V4 alloy and the 25CrMoS4 steel by taking the course of the Kocks-Mecking plots into account. Both models use different approaches for the hardening and softening mechanisms and accurately predict the flow stress over a wide range of deformation conditions. The methodology may hence assist in further developments of more sophisticated physically-based strain hardening models for TiAl-alloys.

  17. Microstructure and grain size effects on irradiation hardening of low carbon steel for reactor tanks

    International Nuclear Information System (INIS)

    Milasin, N.

    1964-05-01

    Irradiation hardening of steel for reactor pressure vessels has been studied extensively during the past few years. A great number of experimental results concerning the behaviour of these steels in the radiation field and several review papers (1,2) have been published. Most of the papers deal with the effects of specific metallurgical factors or irradiation conditions (temperature, flux) on irradiation hardening and embrittlement. In addition, a number of experiments are performed to give evidence on the mechanism of irradiation hardening of these steels. However, this mechanism is still unknown due to the complexity of steel as a system. Among different methods used in radiation damage studies, the changes of mechanical properties have been mainly investigated. By using Hall-Petch's empirical relation, σ y =σ i +k y d -1/2 between lower yield stress, σ y , and grain size, 2d, the information about the effect of irradiation on the parameters σ i and k y is obtained. Taking as a base interpretation of σ i and k y given by Petch and his co-workers it has been concluded that radiation does not change the stress to start slip but that it increase the friction that opposes the passage of free dislocations across a slip plane. In attempting to apply Hall-Petch's relation to one unirradiated ferritic steel with a carbon content higher than 0.15% some difficulties were encountered. The results obtained indicate that the influence of grain size can not be isolated from other factors introduced by the treatments used to produce different grain sizes. This paper deals with a similar problem in the case of irradiated steel. The results obtained give the changes of the mechanical properties of steel in neutron irradiation field as a function of microstructure and grain size. In addition, the mechanical properties of irradiated steel are measured after annealing at 150 deg C and 450 deg C. On the basis of the experimental results obtained the relative microstructure and

  18. Hydrogen embrittlement susceptibility of laser-hardened 4140 steel

    Energy Technology Data Exchange (ETDEWEB)

    Tsay, L.W.; Lin, Z.W. [Nat. Taiwan Ocean Univ., Keelung (Taiwan). Inst. of Mater. Eng.; Shiue, R.K. [Institute of Materials Sciences and Engineering, National Dong Hwa University, Hualien, Taiwan (Taiwan); Chen, C. [Institute of Materials Sciences and Engineering, National Taiwan University, Taipei, Taiwan (Taiwan)

    2000-10-15

    Slow strain rate tensile (SSRT) tests were performed to investigate the susceptibility to hydrogen embrittlement of laser-hardened AISI 4140 specimens in air, gaseous hydrogen and saturated H{sub 2}S solution. Experimental results indicated that round bar specimens with two parallel hardened bands on opposite sides along the loading axis (i.e. the PH specimens), exhibited a huge reduction in tensile ductility for all test environments. While circular-hardened (CH) specimens with 1 mm hardened depth and 6 mm wide within the gauge length were resistant to gaseous hydrogen embrittlement. However, fully hardened CH specimens became susceptible to hydrogen embrittlement for testing in air at a lower strain rate. The strength of CH specimens increased with decreasing the depth of hardened zones in a saturated H{sub 2}S solution. The premature failure of hardened zones in a susceptible environment caused the formation of brittle intergranular fracture and the decrease in tensile ductility. (orig.)

  19. Charged particle detection performances of CMOS pixel sensors produced in a 0.18 um process with a high resistivity epitaxial layer

    CERN Document Server

    Senyukov, Serhiy; Besson, Auguste; Claus, Gilles; Cousin, Loic; Dorokhov, Andrei; Dulinski, Wojciech; Goffe, Mathieu; Hu-Guo, Christine; Winter, Marc

    2013-01-01

    The apparatus of the ALICE experiment at CERN will be upgraded in 2017/18 during the second long shutdown of the LHC (LS2). A major motivation for this upgrade is to extend the physics reach for charmed and beauty particles down to low transverse momenta. This requires a substantial improvement of the spatial resolution and the data rate capability of the ALICE Inner Tracking System (ITS). To achieve this goal, the new ITS will be equipped with 50 um thin CMOS Pixel Sensors (CPS) covering either the 3 innermost layers or all the 7 layers of the detector. The CPS being developed for the ITS upgrade at IPHC (Strasbourg) is derived from the MIMOSA 28 sensor realised for the STAR-PXL at RHIC in a 0.35 um CMOS process. In order to satisfy the ITS upgrade requirements in terms of readout speed and radiation tolerance, a CMOS process with a reduced feature size and a high resistivity epitaxial layer should be exploited. In this respect, the charged particle detection performance and radiation hardness of the TowerJa...

  20. Properties of CMOS devices and circuits fabricated on high-resistivity, detector-grade silicon

    International Nuclear Information System (INIS)

    Holland, S.

    1991-11-01

    A CMOS process that is compatible with silicon p-i-n radiation detectors has been developed and characterized. A total of twelve mask layers are used in the process. The NMOS device is formed in a retrograde well while the PMOS device is fabricated directly in the high-resistivity silicon. Isolation characteristics are similar to a standard foundary CMOS process. Circuit performance using 3 μm design rules has been evaluated. The measured propagation delay and power-delay product for a 51-stage ring oscillator was 1.5 ns and 43 fJ, respectively. Measurements on a simple cascode amplifier results in a gain-bandwidth product of 200 MHz at a bias current of 15 μA. The input-referred noise of the cascode amplifier is 20 nV/√Hz at 1 MHz

  1. Dark current spectroscopy of space and nuclear environment induced displacement damage defects in pinned photodiode based CMOS image sensors

    International Nuclear Information System (INIS)

    Belloir, Jean-Marc

    2016-01-01

    CMOS image sensors are envisioned for an increasing number of high-end scientific imaging applications such as space imaging or nuclear experiments. Indeed, the performance of high-end CMOS image sensors has dramatically increased in the past years thanks to the unceasing improvements of microelectronics, and these image sensors have substantial advantages over CCDs which make them great candidates to replace CCDs in future space missions. However, in space and nuclear environments, CMOS image sensors must face harsh radiation which can rapidly degrade their electro-optical performances. In particular, the protons, electrons and ions travelling in space or the fusion neutrons from nuclear experiments can displace silicon atoms in the pixels and break the crystalline structure. These displacement damage effects lead to the formation of stable defects and to the introduction of states in the forbidden bandgap of silicon, which can allow the thermal generation of electron-hole pairs. Consequently, non ionizing radiation leads to a permanent increase of the dark current of the pixels and thus a decrease of the image sensor sensitivity and dynamic range. The aim of the present work is to extend the understanding of the effect of displacement damage on the dark current increase of CMOS image sensors. In particular, this work focuses on the shape of the dark current distribution depending on the particle type, energy and fluence but also on the image sensor physical parameters. Thanks to the many conditions tested, an empirical model for the prediction of the dark current distribution induced by displacement damage in nuclear or space environments is experimentally validated and physically justified. Another central part of this work consists in using the dark current spectroscopy technique for the first time on irradiated CMOS image sensors to detect and characterize radiation-induced silicon bulk defects. Many types of defects are detected and two of them are identified

  2. Fabrication of CMOS-compatible nanopillars for smart bio-mimetic CMOS image sensors

    KAUST Repository

    Saffih, Faycal

    2012-06-01

    In this paper, nanopillars with heights of 1μm to 5μm and widths of 250nm to 500nm have been fabricated with a near room temperature etching process. The nanopillars were achieved with a continuous deep reactive ion etching technique and utilizing PMMA (polymethylmethacrylate) and Chromium as masking layers. As opposed to the conventional Bosch process, the usage of the unswitched deep reactive ion etching technique resulted in nanopillars with smooth sidewalls with a measured surface roughness of less than 40nm. Moreover, undercut was nonexistent in the nanopillars. The proposed fabrication method achieves etch rates four times faster when compared to the state-of-the-art, leading to higher throughput and more vertical side walls. The fabrication of the nanopillars was carried out keeping the CMOS process in mind to ultimately obtain a CMOS-compatible process. This work serves as an initial step in the ultimate objective of integrating photo-sensors based on these nanopillars seamlessly along with the controlling transistors to build a complete bio-inspired smart CMOS image sensor on the same wafer. © 2012 IEEE.

  3. A new circuit technique for reduced leakage current in Deep Submicron CMOS technologies

    Directory of Open Access Journals (Sweden)

    A. Schmitz

    2005-01-01

    Full Text Available Modern CMOS processes in the Deep Submicron regime are restricted to supply voltages below 2 volts and further to account for the transistors' field strength limitations and to reduce the power per logic gate. To maintain the high switching performance, the threshold voltage must be scaled according with the supply voltage. However, this leads to an increased subthreshold current of the transistors in standby mode (VGS=0. Another source of leakage is gate current, which becomes significant for gate oxides of 3nm and below. We propose a Self-Biasing Virtual Rails (SBVR - CMOS technique which acts like an adaptive local supply voltage in case of standby mode. Most important sources of leakage currents are reduced by this technique. Moreover, SBVR-CMOS is capable of conserving stored information in sleep mode, which is vital for memory circuits. Memories are exposed to radiation causing soft errors. This well-known problem becomes even worse in standby mode of typical SRAMs, that have low driving performance to withstand alpha particle hits. In this paper, a 16-transistor SRAM cell is proposed, which combines the advantage of extremely low leakage currents with a very high soft error stability.

  4. On drift fields in CMOS monolithic active pixel sensors

    Energy Technology Data Exchange (ETDEWEB)

    Deveaux, Michael [Goethe-Universitaet, Frankfurt (Germany); Collaboration: CBM-MVD-Collaboration

    2016-07-01

    CMOS Monolithic Active Pixel Sensors (MAPS) combine an excellent spatial resolution of few μm with a very low material budget of 0.05% X{sub 0}. To extend their radiation tolerance to the level needed for future experiments like e.g. CBM, it is regularly considered to deplete their active volume. We discuss the limits of this strategy accounting for the specific features of the sensing elements of MAPS. Moreover, we introduce an alternative approach to generate the drift fields needed to provoke a faster charge collection by means of doping gradients.

  5. A Standard CMOS Humidity Sensor without Post-Processing

    OpenAIRE

    Nizhnik, Oleg; Higuchi, Kohei; Maenaka, Kazusuke

    2011-01-01

    A 2 ?W power dissipation, voltage-output, humidity sensor accurate to 5% relative humidity was developed using the LFoundry 0.15 ?m CMOS technology without post-processing. The sensor consists of a woven lateral array of electrodes implemented in CMOS top metal, a Intervia Photodielectric 8023?10 humidity-sensitive layer, and a CMOS capacitance to voltage converter.

  6. Fully CMOS-compatible titanium nitride nanoantennas

    Energy Technology Data Exchange (ETDEWEB)

    Briggs, Justin A., E-mail: jabriggs@stanford.edu [Department of Applied Physics, Stanford University, 348 Via Pueblo Mall, Stanford, California 94305 (United States); Department of Materials Science and Engineering, Stanford University, 496 Lomita Mall, Stanford, California 94305 (United States); Naik, Gururaj V.; Baum, Brian K.; Dionne, Jennifer A. [Department of Materials Science and Engineering, Stanford University, 496 Lomita Mall, Stanford, California 94305 (United States); Petach, Trevor A.; Goldhaber-Gordon, David [Department of Physics, Stanford University, 382 Via Pueblo Mall, Stanford, California 94305 (United States)

    2016-02-01

    CMOS-compatible fabrication of plasmonic materials and devices will accelerate the development of integrated nanophotonics for information processing applications. Using low-temperature plasma-enhanced atomic layer deposition (PEALD), we develop a recipe for fully CMOS-compatible titanium nitride (TiN) that is plasmonic in the visible and near infrared. Films are grown on silicon, silicon dioxide, and epitaxially on magnesium oxide substrates. By optimizing the plasma exposure per growth cycle during PEALD, carbon and oxygen contamination are reduced, lowering undesirable loss. We use electron beam lithography to pattern TiN nanopillars with varying diameters on silicon in large-area arrays. In the first reported single-particle measurements on plasmonic TiN, we demonstrate size-tunable darkfield scattering spectroscopy in the visible and near infrared regimes. The optical properties of this CMOS-compatible material, combined with its high melting temperature and mechanical durability, comprise a step towards fully CMOS-integrated nanophotonic information processing.

  7. An RF Energy Harvester System Using UHF Micropower CMOS Rectifier Based on a Diode Connected CMOS Transistor

    Directory of Open Access Journals (Sweden)

    Mohammad Reza Shokrani

    2014-01-01

    Full Text Available This paper presents a new type diode connected MOS transistor to improve CMOS conventional rectifier's performance in RF energy harvester systems for wireless sensor networks in which the circuits are designed in 0.18 μm TSMC CMOS technology. The proposed diode connected MOS transistor uses a new bulk connection which leads to reduction in the threshold voltage and leakage current; therefore, it contributes to increment of the rectifier’s output voltage, output current, and efficiency when it is well important in the conventional CMOS rectifiers. The design technique for the rectifiers is explained and a matching network has been proposed to increase the sensitivity of the proposed rectifier. Five-stage rectifier with a matching network is proposed based on the optimization. The simulation results shows 18.2% improvement in the efficiency of the rectifier circuit and increase in sensitivity of RF energy harvester circuit. All circuits are designed in 0.18 μm TSMC CMOS technology.

  8. An RF energy harvester system using UHF micropower CMOS rectifier based on a diode connected CMOS transistor.

    Science.gov (United States)

    Shokrani, Mohammad Reza; Khoddam, Mojtaba; Hamidon, Mohd Nizar B; Kamsani, Noor Ain; Rokhani, Fakhrul Zaman; Shafie, Suhaidi Bin

    2014-01-01

    This paper presents a new type diode connected MOS transistor to improve CMOS conventional rectifier's performance in RF energy harvester systems for wireless sensor networks in which the circuits are designed in 0.18  μm TSMC CMOS technology. The proposed diode connected MOS transistor uses a new bulk connection which leads to reduction in the threshold voltage and leakage current; therefore, it contributes to increment of the rectifier's output voltage, output current, and efficiency when it is well important in the conventional CMOS rectifiers. The design technique for the rectifiers is explained and a matching network has been proposed to increase the sensitivity of the proposed rectifier. Five-stage rectifier with a matching network is proposed based on the optimization. The simulation results shows 18.2% improvement in the efficiency of the rectifier circuit and increase in sensitivity of RF energy harvester circuit. All circuits are designed in 0.18 μm TSMC CMOS technology.

  9. On residual stresses and fatigue of laser hardened steels

    International Nuclear Information System (INIS)

    Lin, Ru.

    1992-01-01

    This thesis deals with studies on residual stresses and fatigue properties of laser-transformation hardened steels. Two types of specimens, cylinders and fatigue specimens were used in the studies. The cylinders, made of Swedish steels SS 2244 and SS 2258 which correspond to AISI 4140 and AISI 52100 respectively, were locally hardened by a single scan of laser beam in the longitudinal direction, with various laser parameters. Residual stress distributions across the hardened tracks were measured by means of X-ray diffraction. The origins of residual stresses were investigated and discussed. For the fatigue specimens, including smooth and notched types made of Swedish steels SS 2244, SS 2225 and SS 1572 (similar to AISI 4140, AISI 4130 and AISI 1035, respectively), laser hardening was carried out in the gauge section. The residual stress field induced by the hardening process and the fatigue properties by plane bending fatigue test were studied. In order to investigate the stability of the residual stress field, stress measurements were also made on specimens being loaded near the fatigue limits for over 10 7 cycles. Further the concept of local fatigue strength was employed to correlate quantitatively the effect of hardness and residual stress field on the fatigue limits. In addition a group of smooth specimens of SS 2244 was induction hardened and the hardening results were compared with the corresponding laser hardened ones in terms of residual stress and fatigue behaviour. It has been found that compressive stresses exist in the hardened zone of all the specimens studied. The laser hardening condition, the specimen and how the hardening is carried out can significantly affect the residual stress field. Laser hardening can greatly improve the fatigue properties by inducing a hardened and compressed surface layer. (112 refs.)(au)

  10. On residual stresses and fatigue of laser hardened steels

    Energy Technology Data Exchange (ETDEWEB)

    Lin, Ru.

    1992-01-01

    This thesis deals with studies on residual stresses and fatigue properties of laser-transformation hardened steels. Two types of specimens, cylinders and fatigue specimens were used in the studies. The cylinders, made of Swedish steels SS 2244 and SS 2258 which correspond to AISI 4140 and AISI 52100 respectively, were locally hardened by a single scan of laser beam in the longitudinal direction, with various laser parameters. Residual stress distributions across the hardened tracks were measured by means of X-ray diffraction. The origins of residual stresses were investigated and discussed. For the fatigue specimens, including smooth and notched types made of Swedish steels SS 2244, SS 2225 and SS 1572 (similar to AISI 4140, AISI 4130 and AISI 1035, respectively), laser hardening was carried out in the gauge section. The residual stress field induced by the hardening process and the fatigue properties by plane bending fatigue test were studied. In order to investigate the stability of the residual stress field, stress measurements were also made on specimens being loaded near the fatigue limits for over 10[sup 7] cycles. Further the concept of local fatigue strength was employed to correlate quantitatively the effect of hardness and residual stress field on the fatigue limits. In addition a group of smooth specimens of SS 2244 was induction hardened and the hardening results were compared with the corresponding laser hardened ones in terms of residual stress and fatigue behaviour. It has been found that compressive stresses exist in the hardened zone of all the specimens studied. The laser hardening condition, the specimen and how the hardening is carried out can significantly affect the residual stress field. Laser hardening can greatly improve the fatigue properties by inducing a hardened and compressed surface layer. (112 refs.)(au).

  11. Nanometer CMOS ICs from basics to ASICs

    CERN Document Server

    J M Veendrick, Harry

    2017-01-01

    This textbook provides a comprehensive, fully-updated introduction to the essentials of nanometer CMOS integrated circuits. It includes aspects of scaling to even beyond 12nm CMOS technologies and designs. It clearly describes the fundamental CMOS operating principles and presents substantial insight into the various aspects of design implementation and application. Coverage includes all associated disciplines of nanometer CMOS ICs, including physics, lithography, technology, design, memories, VLSI, power consumption, variability, reliability and signal integrity, testing, yield, failure analysis, packaging, scaling trends and road blocks. The text is based upon in-house Philips, NXP Semiconductors, Applied Materials, ASML, IMEC, ST-Ericsson, TSMC, etc., courseware, which, to date, has been completed by more than 4500 engineers working in a large variety of related disciplines: architecture, design, test, fabrication process, packaging, failure analysis and software.

  12. CMOS-sensors for energy-resolved X-ray imaging

    International Nuclear Information System (INIS)

    Doering, D.; Amar-Youcef, S.; Deveaux, M.; Linnik, B.; Müntz, C.; Stroth, Joachim; Baudot, J.; Dulinski, W.; Kachel, M.

    2016-01-01

    Due to their low noise, CMOS Monolithic Active Pixel Sensors are suited to sense X-rays with a few keV quantum energy, which is of interest for high resolution X-ray imaging. Moreover, the good energy resolution of the silicon sensors might be used to measure this quantum energy. Combining both features with the good spatial resolution of CMOS sensors opens the potential to build ''color sensitive' X-ray cameras. Taking such colored images is hampered by the need to operate the CMOS sensors in a single photon counting mode, which restricts the photon flux capability of the sensors. More importantly, the charge sharing between the pixels smears the potentially good energy resolution of the sensors. Based on our experience with CMOS sensors for charged particle tracking, we studied techniques to overcome the latter by means of an offline processing of the data obtained from a CMOS sensor prototype. We found that the energy resolution of the pixels can be recovered at the expense of reduced quantum efficiency. We will introduce the results of our study and discuss the feasibility of taking colored X-ray pictures with CMOS sensors

  13. Laser Surface Hardening of Groove Edges

    Science.gov (United States)

    Hussain, A.; Hamdani, A. H.; Akhter, R.; Aslam, M.

    2013-06-01

    Surface hardening of groove-edges made of 3Cr13 Stainless Steel has been carried out using 500 W CO2 laser with a rectangular beam of 2.5×3 mm2. The processing speed was varied from 150-500 mm/min. It was seen that the hardened depth increases with increase in laser interaction time. A maximum hardened depth of around 1mm was achieved. The microhardness of the transformed zone was 2.5 times the hardness of base metal. The XRD's and microstructural analysis were also reported.

  14. Ionizing radiation effects on implanted pacemakers

    International Nuclear Information System (INIS)

    Holzer, J.; Aiginger, H.; Binder, W.

    1998-01-01

    Fourteen multi-programmable pacemakers and 2 intercardial defibrillators were exposed to 60 Co radiation, to 9 MeV electrons and to 6 MV and 10 MV photon radiation. The pacemakers were placed into a water phantom. The following parameters were examined: telemetry, battery, pulse frequency, pulse amplitude, and period at accumulated doses from 2 Gy to 100 Gy. It is concluded that pacemakers in CMOS/Bipolar technology and in 8μ CMOS technology should not be exposed to an absorbed dose exceeding 5 Gy, the latest generation of pacemakers in the 3μm technology will perform satisfactorily up to 70 Gy. (P.A.)

  15. CMOS compatible thin-film ALD tungsten nanoelectromechanical devices

    Science.gov (United States)

    Davidson, Bradley Darren

    This research focuses on the development of a novel, low-temperature, CMOS compatible, atomic-layer-deposition (ALD) enabled NEMS fabrication process for the development of ALD Tungsten (WALD) NEMS devices. The devices are intended for use in CMOS/NEMS hybrid systems, and NEMS based micro-processors/controllers capable of reliable operation in harsh environments not accessible to standard CMOS technologies. The majority of NEMS switches/devices to date have been based on carbon-nano-tube (CNT) designs. The devices consume little power during actuation, and as expected, have demonstrated actuation voltages much smaller than MEMS switches. Unfortunately, NEMS CNT switches are not typically CMOS integrable due to the high temperatures required for their growth, and their fabrication typically results in extremely low and unpredictable yields. Thin-film NEMS devices offer great advantages over reported CNT devices for several reasons, including: higher fabrication yields, low-temperature (CMOS compatible) deposition techniques like ALD, and increased control over design parameters/device performance metrics, i.e., device geometry. Furthermore, top-down, thin-film, nano-fabrication techniques are better capable of producing complicated device geometries than CNT based processes, enabling the design and development of multi-terminal switches well-suited for low-power hybrid NEMS/CMOS systems as well as electromechanical transistors and logic devices for use in temperature/radiation hard computing architectures. In this work several novel, low-temperature, CMOS compatible fabrication technologies, employing WALD as a structural layer for MEMS or NEMS devices, were developed. The technologies developed are top-down nano-scale fabrication processes based on traditional micro-machining techniques commonly used in the fabrication of MEMS devices. Using these processes a variety of novel WALD NEMS devices have been successfully fabricated and characterized. Using two different

  16. MEMS capacitive pressure sensor monolithically integrated with CMOS readout circuit by using post CMOS processes

    Science.gov (United States)

    Jang, Munseon; Yun, Kwang-Seok

    2017-12-01

    In this paper, we presents a MEMS pressure sensor integrated with a readout circuit on a chip for an on-chip signal processing. The capacitive pressure sensor is formed on a CMOS chip by using a post-CMOS MEMS processes. The proposed device consists of a sensing capacitor that is square in shape, a reference capacitor and a readout circuitry based on a switched-capacitor scheme to detect capacitance change at various environmental pressures. The readout circuit was implemented by using a commercial 0.35 μm CMOS process with 2 polysilicon and 4 metal layers. Then, the pressure sensor was formed by wet etching of metal 2 layer through via hole structures. Experimental results show that the MEMS pressure sensor has a sensitivity of 11 mV/100 kPa at the pressure range of 100-400 kPa.

  17. Hardening Embrittlement and Non-Hardening Embrittlement of Welding-Heat-Affected Zones in a Cr-Mo Low Alloy Steel

    Directory of Open Access Journals (Sweden)

    Yu Zhao

    2018-06-01

    Full Text Available The embrittlement of heat affected zones (HAZs resulting from the welding of a P-doped 2.25Cr-1Mo steel was studied by the analysis of the fracture appearance transition temperatures (FATTs of the HAZs simulated under a heat input of 45 kJ/cm with different peak temperatures. The FATTs of the HAZs both with and without tempering increased with the rise of the peak temperature. However, the FATTs were apparently lower for the tempered HAZs. For the as-welded (untempered HAZs, the FATTs were mainly affected by residual stress, martensite/austenite (M/A islands, and bainite morphology. The observed embrittlement is a hardening embrittlement. On the other hand, the FATTs of the tempered HAZs were mainly affected by phosphorus grain boundary segregation, thereby causing a non-hardening embrittlement. The results demonstrate that the hardening embrittlement of the as-welded HAZs was more severe than the non-hardening embrittlement of the tempered HAZs. Consequently, a post-weld heat treatment should be carried out if possible so as to eliminate the hardening embrittlement.

  18. X-ray beam hardening correction for measuring density in linear accelerator industrial computed tomography

    International Nuclear Information System (INIS)

    Zhou Rifeng; Wang Jue; Chen Weimin

    2009-01-01

    Due to X-ray attenuation being approximately proportional to material density, it is possible to measure the inner density through Industrial Computed Tomography (ICT) images accurately. In practice, however, a number of factors including the non-linear effects of beam hardening and diffuse scattered radiation complicate the quantitative measurement of density variations in materials. This paper is based on the linearization method of beam hardening correction, and uses polynomial fitting coefficient which is obtained by the curvature of iron polychromatic beam data to fit other materials. Through theoretical deduction, the paper proves that the density measure error is less than 2% if using pre-filters to make the spectrum of linear accelerator range mainly 0.3 MeV to 3 MeV. Experiment had been set up at an ICT system with a 9 MeV electron linear accelerator. The result is satisfactory. This technique makes the beam hardening correction easy and simple, and it is valuable for measuring the ICT density and making use of the CT images to recognize materials. (authors)

  19. JPL CMOS Active Pixel Sensor Technology

    Science.gov (United States)

    Fossum, E. R.

    1995-01-01

    This paper will present the JPL-developed complementary metal- oxide-semiconductor (CMOS) active pixel sensor (APS) technology. The CMOS APS has achieved performance comparable to charge coupled devices, yet features ultra low power operation, random access readout, on-chip timing and control, and on-chip analog to digital conversion. Previously published open literature will be reviewed.

  20. Planar pixel sensors in commercial CMOS technologies

    Energy Technology Data Exchange (ETDEWEB)

    Gonella, Laura; Hemperek, Tomasz; Huegging, Fabian; Krueger, Hans; Wermes, Norbert [Physikalisches Institut der Universitaet Bonn, Nussallee 12, 53115 Bonn (Germany); Macchiolo, Anna [Max-Planck-Institut fuer Physik, Foehringer Ring 6, 80805 Muenchen (Germany)

    2015-07-01

    For the upgrade of the ATLAS experiment at the high luminosity LHC, an all-silicon tracker is foreseen to cope with the increased rate and radiation levels. Pixel and strip detectors will have to cover an area of up to 200m2. To produce modules in high number at reduced costs, new sensor and bonding technologies have to be investigated. Commercial CMOS technologies on high resistive substrates can provide significant advantages in this direction. They offer cost effective, large volume sensor production. In addition to this, production is done on 8'' wafers allowing wafer-to-wafer bonding to the electronics, an interconnection technology substantially cheaper than the bump bonding process used for hybrid pixel detectors at the LHC. Both active and passive n-in-p pixel sensor prototypes have been submitted in a 150 nm CMOS technology on a 2kΩ cm substrate. The passive sensor design will be used to characterize sensor properties and to investigate wafer-to-wafer bonding technologies. This first prototype is made of a matrix of 36 x 16 pixels of size compatible with the FE-I4 readout chip (i.e. 50 μm x 250 μm). Results from lab characterization of this first submission are shown together with TCAD simulations. Work towards a full size FE-I4 sensor for wafer-to-wafer bonding is discussed.

  1. Bake hardening of nanograin AA7075 aluminum alloy

    International Nuclear Information System (INIS)

    Dehghani, Kamran

    2011-01-01

    Highlights: ► The bake hardening behavior of AA7075 was studied and compared with its coarse-grain counterpart. ► Nanograin AA7075 exhibited 88–100% increase in bake hardenability. ► Nanograin AA7075 exhibited 36–38% increase in final yield strength after baking. ► Maximum bake hardenability and final yield stress were about 185 MPa and 719 MPa. - Abstract: In the present work, the bake hardening of nanostructured AA7075 aluminum alloy was compared with that of its coarse-grain counterpart. Surface severe plastic deformation (SSPD) was used to produce nanograin layers on both surfaces of workpieces. The nanostructured layers were characterized using scanning electron microscopy (SEM) and atomic force microscopy (AFM) techniques. The thickness of nanostructured layer, having the grains of 50–110 nm, was about 75 μm on each side of workpiece. The bake hardenability of nanograin and coarse-grain AA7075 was then compared by pre-straining to 2, 4 and 6% followed by baking at 100 °C and 200 °C for 20 min. Comparing to coarse-grain case, there was about 88–100% increase in bake hardenability and about 36–38% increase in yield strength after the bake hardening of present nanograin AA7075. Such an increase in bake hardenability and strength was achieved when the thickness of two nanograin layers was about only one-tenth of the whole thickness.

  2. High performance flexible CMOS SOI FinFETs

    KAUST Repository

    Fahad, Hossain M.; Sevilla, Galo T.; Ghoneim, Mohamed T.; Hussain, Muhammad Mustafa

    2014-01-01

    We demonstrate the first ever CMOS compatible soft etch back based high performance flexible CMOS SOI FinFETs. The move from planar to non-planar FinFETs has enabled continued scaling down to the 14 nm technology node. This has been possible due

  3. Decal electronics for printed high performance cmos electronic systems

    KAUST Repository

    Hussain, Muhammad Mustafa

    2017-11-23

    High performance complementary metal oxide semiconductor (CMOS) electronics are critical for any full-fledged electronic system. However, state-of-the-art CMOS electronics are rigid and bulky making them unusable for flexible electronic applications. While there exist bulk material reduction methods to flex them, such thinned CMOS electronics are fragile and vulnerable to handling for high throughput manufacturing. Here, we show a fusion of a CMOS technology compatible fabrication process for flexible CMOS electronics, with inkjet and conductive cellulose based interconnects, followed by additive manufacturing (i.e. 3D printing based packaging) and finally roll-to-roll printing of packaged decal electronics (thin film transistors based circuit components and sensors) focusing on printed high performance flexible electronic systems. This work provides the most pragmatic route for packaged flexible electronic systems for wide ranging applications.

  4. Structural heredity influence upon principles of strain wave hardening

    Science.gov (United States)

    Kiricheck, A. V.; Barinov, S. V.; Yashin, A. V.

    2017-02-01

    It was established experimentally that by penetration of a strain wave through material hardened not only the technological modes of processing, but also a technological heredity - the direction of the fibers of the original macrostructure have an influence upon the diagram of microhardness. By penetration of the strain wave along fibers, the degree of hardening the material is less, however, a product is hardened throughout its entire section mainly along fibers. In the direction of the strain waves across fibers of the original structure of material, the degree of material hardening is much higher, the depth of the hardened layer with the degree of hardening not less than 50% makes at least 3 mm. It was found that under certain conditions the strain wave can completely change the original structure of the material. Thus, a heterogeneously hardened structure characterized by the interchange of harder and more viscous areas is formed, which is beneficial for assurance of high operational properties of material.

  5. Batch Processing of CMOS Compatible Feedthroughs

    DEFF Research Database (Denmark)

    Rasmussen, F.E.; Heschel, M.; Hansen, Ole

    2003-01-01

    . The feedthrough technology employs a simple solution to the well-known CMOS compatibility issue of KOH by protecting the CMOS side of the wafer using sputter deposited TiW/Au. The fabricated feedthroughs exhibit excellent electrical performance having a serial resistance of 40 mOmega and a parasitic capacitance...... of 2.5 pF. (C) 2003 Elsevier Science B.V. All rights reserved....

  6. An experimental study on the influence of scatter and beam hardening in x-ray CT for dimensional metrology

    International Nuclear Information System (INIS)

    Lifton, J J; McBride, J W; Malcolm, A A

    2016-01-01

    Scattered radiation and beam hardening introduce artefacts that degrade the quality of data in x-ray computed tomography (CT). It is unclear how these artefacts influence dimensional measurements evaluated from CT data. Understanding and quantifying the influence of these artefacts on dimensional measurements is required to evaluate the uncertainty of CT-based dimensional measurements. In this work the influence of scatter and beam hardening on dimensional measurements is investigated using the beam stop array scatter correction method and spectrum pre-filtration for the measurement of an object with internal and external cylindrical dimensional features. Scatter and beam hardening are found to influence dimensional measurements when evaluated using the ISO50 surface determination method. On the other hand, a gradient-based surface determination method is found to be robust to the influence of artefacts and leads to more accurate dimensional measurements than those evaluated using the ISO50 method. In addition to these observations the GUM method for evaluating standard measurement uncertainties is applied and the standard measurement uncertainty due to scatter and beam hardening is estimated. (paper)

  7. Technology CAD for germanium CMOS circuit

    Energy Technology Data Exchange (ETDEWEB)

    Saha, A.R. [Department of Electronics and ECE, IIT Kharagpur, Kharagpur-721302 (India)]. E-mail: ars.iitkgp@gmail.com; Maiti, C.K. [Department of Electronics and ECE, IIT Kharagpur, Kharagpur-721302 (India)

    2006-12-15

    Process simulation for germanium MOSFETs (Ge-MOSFETs) has been performed in 2D SILVACO virtual wafer fabrication (VWF) suite towards the technology CAD for Ge-CMOS process development. Material parameters and mobility models for Germanium were incorporated in simulation via C-interpreter function. We also report on the device design issues along with the DC and RF characterization of the bulk Ge-MOSFETs, AC parameter extraction and circuit simulation of Ge-CMOS. Simulation results are compared with bulk-Si devices. Simulations predict a cut-off frequency, f {sub T} of about 175 GHz for Ge-MOSFETs compared to 70 GHz for a similar gate-length Si MOSFET. For a single stage Ge-CMOS inverter circuit, a GATE delay of 0.6 ns is predicted.

  8. Technology CAD for germanium CMOS circuit

    International Nuclear Information System (INIS)

    Saha, A.R.; Maiti, C.K.

    2006-01-01

    Process simulation for germanium MOSFETs (Ge-MOSFETs) has been performed in 2D SILVACO virtual wafer fabrication (VWF) suite towards the technology CAD for Ge-CMOS process development. Material parameters and mobility models for Germanium were incorporated in simulation via C-interpreter function. We also report on the device design issues along with the DC and RF characterization of the bulk Ge-MOSFETs, AC parameter extraction and circuit simulation of Ge-CMOS. Simulation results are compared with bulk-Si devices. Simulations predict a cut-off frequency, f T of about 175 GHz for Ge-MOSFETs compared to 70 GHz for a similar gate-length Si MOSFET. For a single stage Ge-CMOS inverter circuit, a GATE delay of 0.6 ns is predicted

  9. Resistor Extends Life Of Battery In Clocked CMOS Circuit

    Science.gov (United States)

    Wells, George H., Jr.

    1991-01-01

    Addition of fixed resistor between battery and clocked complementary metal oxide/semiconductor (CMOS) circuit reduces current drawn from battery. Basic idea to minimize current drawn from battery by operating CMOS circuit at lowest possible current consistent with use of simple, fixed off-the-shelf components. Prolongs lives of batteries in such low-power CMOS circuits as watches and calculators.

  10. Carbon Nanotube Integration with a CMOS Process

    Science.gov (United States)

    Perez, Maximiliano S.; Lerner, Betiana; Resasco, Daniel E.; Pareja Obregon, Pablo D.; Julian, Pedro M.; Mandolesi, Pablo S.; Buffa, Fabian A.; Boselli, Alfredo; Lamagna, Alberto

    2010-01-01

    This work shows the integration of a sensor based on carbon nanotubes using CMOS technology. A chip sensor (CS) was designed and manufactured using a 0.30 μm CMOS process, leaving a free window on the passivation layer that allowed the deposition of SWCNTs over the electrodes. We successfully investigated with the CS the effect of humidity and temperature on the electrical transport properties of SWCNTs. The possibility of a large scale integration of SWCNTs with CMOS process opens a new route in the design of more efficient, low cost sensors with high reproducibility in their manufacture. PMID:22319330

  11. Microstructure and grain size effects on irradiation hardening of low carbon steel for reactor tanks

    Energy Technology Data Exchange (ETDEWEB)

    Milasin, N [Institute of Nuclear Sciences Boris Kidric, Vinca, Beograd (Serbia and Montenegro)

    1964-05-15

    Irradiation hardening of steel for reactor pressure vessels has been studied extensively during the past few years. A great number of experimental results concerning the behaviour of these steels in the radiation field and several review papers (1,2) have been published. Most of the papers deal with the effects of specific metallurgical factors or irradiation conditions (temperature, flux) on irradiation hardening and embrittlement. In addition, a number of experiments are performed to give evidence on the mechanism of irradiation hardening of these steels. However, this mechanism is still unknown due to the complexity of steel as a system. Among different methods used in radiation damage studies, the changes of mechanical properties have been mainly investigated. By using Hall-Petch's empirical relation, {sigma}{sub y}={sigma}{sub i}+k{sub y} d{sup -1/2} between lower yield stress, {sigma}{sub y}, and grain size, 2d, the information about the effect of irradiation on the parameters {sigma}{sub i} and k{sub y} is obtained. Taking as a base interpretation of {sigma}{sub i} and k{sub y} given by Petch and his co-workers it has been concluded that radiation does not change the stress to start slip but that it increase the friction that opposes the passage of free dislocations across a slip plane. In attempting to apply Hall-Petch's relation to one unirradiated ferritic steel with a carbon content higher than 0.15% some difficulties were encountered. The results obtained indicate that the influence of grain size can not be isolated from other factors introduced by the treatments used to produce different grain sizes. This paper deals with a similar problem in the case of irradiated steel. The results obtained give the changes of the mechanical properties of steel in neutron irradiation field as a function of microstructure and grain size. In addition, the mechanical properties of irradiated steel are measured after annealing at 150 deg C and 450 deg C. On the basis of

  12. Single photon detection and localization accuracy with an ebCMOS camera

    Energy Technology Data Exchange (ETDEWEB)

    Cajgfinger, T. [CNRS/IN2P3, Institut de Physique Nucléaire de Lyon, Villeurbanne F-69622 (France); Dominjon, A., E-mail: agnes.dominjon@nao.ac.jp [Université de Lyon, Université de Lyon 1, Lyon 69003 France. (France); Barbier, R. [CNRS/IN2P3, Institut de Physique Nucléaire de Lyon, Villeurbanne F-69622 (France); Université de Lyon, Université de Lyon 1, Lyon 69003 France. (France)

    2015-07-01

    The CMOS sensor technologies evolve very fast and offer today very promising solutions to existing issues facing by imaging camera systems. CMOS sensors are very attractive for fast and sensitive imaging thanks to their low pixel noise (1e-) and their possibility of backside illumination. The ebCMOS group of IPNL has produced a camera system dedicated to Low Light Level detection and based on a 640 kPixels ebCMOS with its acquisition system. After reminding the principle of detection of an ebCMOS and the characteristics of our prototype, we confront our camera to other imaging systems. We compare the identification efficiency and the localization accuracy of a point source by four different photo-detection devices: the scientific CMOS (sCMOS), the Charge Coupled Device (CDD), the Electron Multiplying CCD (emCCD) and the Electron Bombarded CMOS (ebCMOS). Our ebCMOS camera is able to identify a single photon source in less than 10 ms with a localization accuracy better than 1 µm. We report as well efficiency measurement and the false positive identification of the ebCMOS camera by identifying more than hundreds of single photon sources in parallel. About 700 spots are identified with a detection efficiency higher than 90% and a false positive percentage lower than 5. With these measurements, we show that our target tracking algorithm can be implemented in real time at 500 frames per second under a photon flux of the order of 8000 photons per frame. These results demonstrate that the ebCMOS camera concept with its single photon detection and target tracking algorithm is one of the best devices for low light and fast applications such as bioluminescence imaging, quantum dots tracking or adaptive optics.

  13. Broadband image sensor array based on graphene-CMOS integration

    Science.gov (United States)

    Goossens, Stijn; Navickaite, Gabriele; Monasterio, Carles; Gupta, Shuchi; Piqueras, Juan José; Pérez, Raúl; Burwell, Gregory; Nikitskiy, Ivan; Lasanta, Tania; Galán, Teresa; Puma, Eric; Centeno, Alba; Pesquera, Amaia; Zurutuza, Amaia; Konstantatos, Gerasimos; Koppens, Frank

    2017-06-01

    Integrated circuits based on complementary metal-oxide-semiconductors (CMOS) are at the heart of the technological revolution of the past 40 years, enabling compact and low-cost microelectronic circuits and imaging systems. However, the diversification of this platform into applications other than microcircuits and visible-light cameras has been impeded by the difficulty to combine semiconductors other than silicon with CMOS. Here, we report the monolithic integration of a CMOS integrated circuit with graphene, operating as a high-mobility phototransistor. We demonstrate a high-resolution, broadband image sensor and operate it as a digital camera that is sensitive to ultraviolet, visible and infrared light (300-2,000 nm). The demonstrated graphene-CMOS integration is pivotal for incorporating 2D materials into the next-generation microelectronics, sensor arrays, low-power integrated photonics and CMOS imaging systems covering visible, infrared and terahertz frequencies.

  14. CMOS Cell Sensors for Point-of-Care Diagnostics

    Science.gov (United States)

    Adiguzel, Yekbun; Kulah, Haluk

    2012-01-01

    The burden of health-care related services in a global era with continuously increasing population and inefficient dissipation of the resources requires effective solutions. From this perspective, point-of-care diagnostics is a demanded field in clinics. It is also necessary both for prompt diagnosis and for providing health services evenly throughout the population, including the rural districts. The requirements can only be fulfilled by technologies whose productivity has already been proven, such as complementary metal-oxide-semiconductors (CMOS). CMOS-based products can enable clinical tests in a fast, simple, safe, and reliable manner, with improved sensitivities. Portability due to diminished sensor dimensions and compactness of the test set-ups, along with low sample and power consumption, is another vital feature. CMOS-based sensors for cell studies have the potential to become essential counterparts of point-of-care diagnostics technologies. Hence, this review attempts to inform on the sensors fabricated with CMOS technology for point-of-care diagnostic studies, with a focus on CMOS image sensors and capacitance sensors for cell studies. PMID:23112587

  15. CMOS capacitive sensors for lab-on-chip applications a multidisciplinary approach

    CERN Document Server

    Ghafar-Zadeh, Ebrahim

    2010-01-01

    The main components of CMOS capacitive biosensors including sensing electrodes, bio-functionalized sensing layer, interface circuitries and microfluidic packaging are verbosely explained in chapters 2-6 after a brief introduction on CMOS based LoCs in Chapter 1. CMOS Capacitive Sensors for Lab-on-Chip Applications is written in a simple pedagogical way. It emphasises practical aspects of fully integrated CMOS biosensors rather than mathematical calculations and theoretical details. By using CMOS Capacitive Sensors for Lab-on-Chip Applications, the reader will have circuit design methodologies,

  16. Instabilities in power law gradient hardening materials

    DEFF Research Database (Denmark)

    Niordson, Christian Frithiof; Tvergaard, Viggo

    2005-01-01

    Tension and compression instabilities are investigated for specimens with dimensions in the micron range. A finite strain generalization of a higher order strain gradient plasticity theory is implemented in a finite element scheme capable of modeling power law hardening materials. Effects...... of gradient hardening are found to delay the onset of localization under plane strain tension, and significantly reduce strain gradients in the localized zone. For plane strain compression gradient hardening is found to increase the load-carrying capacity significantly....

  17. CMOS MEMS capacitive absolute pressure sensor

    International Nuclear Information System (INIS)

    Narducci, M; Tsai, J; Yu-Chia, L; Fang, W

    2013-01-01

    This paper presents the design, fabrication and characterization of a capacitive pressure sensor using a commercial 0.18 µm CMOS (complementary metal–oxide–semiconductor) process and postprocess. The pressure sensor is capacitive and the structure is formed by an Al top electrode enclosed in a suspended SiO 2 membrane, which acts as a movable electrode against a bottom or stationary Al electrode fixed on the SiO 2 substrate. Both the movable and fixed electrodes form a variable parallel plate capacitor, whose capacitance varies with the applied pressure on the surface. In order to release the membranes the CMOS layers need to be applied postprocess and this mainly consists of four steps: (1) deposition and patterning of PECVD (plasma-enhanced chemical vapor deposition) oxide to protect CMOS pads and to open the pressure sensor top surface, (2) etching of the sacrificial layer to release the suspended membrane, (3) deposition of PECVD oxide to seal the etching holes and creating vacuum inside the gap, and finally (4) etching of the passivation oxide to open the pads and allow electrical connections. This sensor design and fabrication is suitable to obey the design rules of a CMOS foundry and since it only uses low-temperature processes, it allows monolithic integration with other types of CMOS compatible sensors and IC (integrated circuit) interface on a single chip. Experimental results showed that the pressure sensor has a highly linear sensitivity of 0.14 fF kPa −1 in the pressure range of 0–300 kPa. (paper)

  18. CMOS front-end electronics for radiation sensors

    CERN Document Server

    AUTHOR|(CDS)2071026

    2015-01-01

    This book offers a comprehensive treatment of front-end electronics for radiation detection. It discusses the fundamental principles of signal processing for radiation detectors and describes circuits at the level of functional building blocks, omitting transistor-level implementation. It also covers important system-level topics commonly found in the world of front-end electronics for radiation sensors. The book develops the topics in detail, with a constant focus on practical problems. It also provides real implementation examples that offer insights and stimuli for more experienced engineers already working in the field.

  19. Precipitation and Hardening in Magnesium Alloys

    Science.gov (United States)

    Nie, Jian-Feng

    2012-11-01

    Magnesium alloys have received an increasing interest in the past 12 years for potential applications in the automotive, aircraft, aerospace, and electronic industries. Many of these alloys are strong because of solid-state precipitates that are produced by an age-hardening process. Although some strength improvements of existing magnesium alloys have been made and some novel alloys with improved strength have been developed, the strength level that has been achieved so far is still substantially lower than that obtained in counterpart aluminum alloys. Further improvements in the alloy strength require a better understanding of the structure, morphology, orientation of precipitates, effects of precipitate morphology, and orientation on the strengthening and microstructural factors that are important in controlling the nucleation and growth of these precipitates. In this review, precipitation in most precipitation-hardenable magnesium alloys is reviewed, and its relationship with strengthening is examined. It is demonstrated that the precipitation phenomena in these alloys, especially in the very early stage of the precipitation process, are still far from being well understood, and many fundamental issues remain unsolved even after some extensive and concerted efforts made in the past 12 years. The challenges associated with precipitation hardening and age hardening are identified and discussed, and guidelines are outlined for the rational design and development of higher strength, and ultimately ultrahigh strength, magnesium alloys via precipitation hardening.

  20. The microstructural origin of work hardening stages

    DEFF Research Database (Denmark)

    Hughes, D. A.; Hansen, N.

    2018-01-01

    The strain evolution of the flow stress and work hardening rate in stages III and IV is explored by utilizing a fully described deformation microstructure. Extensive measurements by transmission electron microscopy reveal a hierarchical subdivision of grains by low angle incidental dislocation...... addition of the classical Taylor and Hall-Petch formulations. Model predictions agree closely with experimental values of flow stress and work hardening rate in stages III and IV. Strong connections between the evolutionary stages of the deformation microstructure and work hardening rates create a new...... (modern) basis for the classic problem of work hardening in metals and alloys. These connections lead the way for the future development of ultra high strength ductile metals produced via plastic deformation.(c) 2018 Acta Materialia Inc. Published by Elsevier Ltd. All rights reserved....

  1. A One Chip Hardened Solution for High Speed SpaceWire System Implementations. Session: Components

    Science.gov (United States)

    Marshall, Joseph R.; Berger, Richard W.; Rakow, Glenn P.

    2007-01-01

    An Application Specific Integrated Circuit (ASIC) that implements the SpaceWire protocol has been developed in a radiation hardened 0.25 micron CMOS technology. This effort began in March 2003 as a joint development between the NASA Goddard Space Flight Center (GSFC) and BAE Systems. The BAE Systems SpaceWire ASIC is comprised entirely of reusable core elements, many of which are already flight-proven. It incorporates a router with 4 SpaceWire ports and two local ports, dual PC1 bus interfaces, a microcontroller, 32KB of internal memory, and a memory controller for additional external memory use. The SpaceWire cores are also reused in other ASICs under development. The SpaceWire ASIC is planned for use on the Geostationary Operational Environmental Satellites (GOES)-R, the Lunar Reconnaissance Orbiter (LRO) and other missions. Engineering and flight parts have been delivered to programs and users. This paper reviews the SpaceWire protocol and those elements of it that have been built into the current and next SpaceWire reusable cores and features within the core that go beyond the current standard and can be enabled or disabled by the user. The adaptation of SpaceWire to BAE Systems' On Chip Bus (OCB) for compatibility with the other reusable cores will be reviewed and highlighted. Optional configurations within user systems and test boards will be shown. The physical implementation of the design will be described and test results from the hardware will be discussed. Application of this ASIC and other ASICs containing the SpaceWire cores and embedded microcontroller to Plug and Play and reconfigurable implementations will be described. Finally, the BAE Systems roadmap for SpaceWire developments will be updated, including some products already in design as well as longer term plans.

  2. Use of pre-irradiated commercial MOSFETs in a power supply hardened to withstand gamma radiation

    International Nuclear Information System (INIS)

    Marceau, M.; Huillet, H.

    1999-01-01

    This paper describes the approach used to design a hardened power supply capable of operating to a total gamma irradiation dose of 10 kGy(Si). Pre-irradiation of power MOSFETs proved to be necessary, and the paper also discusses the effects of this treatment. (authors)

  3. Ferroelectric memories: A possible answer to the hardened nonvolatile question

    International Nuclear Information System (INIS)

    Messenger, G.C.; Coppage, F.N.

    1988-01-01

    Ferroelectric memory cells have been fabricated using a process compatible with semiconductor VLSI (Very Large-Scale Integration) manufacturing techniques which are basically nonvolatile and radiation hard. The memory can be made NDRO (Nondestructive Readout) for strategic systems using several techniques; the most practical is probably a rapid read/restore in combination with EDAC software. This memory can replace plated wire and will have substantial advantages in cost, weight, size, power and speed. It provides a practical cost-competitive solution to the need for nonvolatile RAM in all hardened tactical, avionic, and space systems

  4. A Single-Transistor Active Pixel CMOS Image Sensor Architecture

    International Nuclear Information System (INIS)

    Zhang Guo-An; He Jin; Zhang Dong-Wei; Su Yan-Mei; Wang Cheng; Chen Qin; Liang Hai-Lang; Ye Yun

    2012-01-01

    A single-transistor CMOS active pixel image sensor (1 T CMOS APS) architecture is proposed. By switching the photosensing pinned diode, resetting and selecting can be achieved by diode pull-up and capacitive coupling pull-down of the source follower. Thus, the reset and selected transistors can be removed. In addition, the reset and selected signal lines can be shared to reduce the metal signal line, leading to a very high fill factor. The pixel design and operation principles are discussed in detail. The functionality of the proposed 1T CMOS APS architecture has been experimentally verified using a fabricated chip in a standard 0.35 μm CMOS AMIS technology

  5. Self-calibrated humidity sensor in CMOS without post-processing.

    Science.gov (United States)

    Nizhnik, Oleg; Higuchi, Kohei; Maenaka, Kazusuke

    2012-01-01

    A 1.1 μW power dissipation, voltage-output humidity sensor with 10% relative humidity accuracy was developed in the LFoundry 0.15 μm CMOS technology without post-processing. The sensor consists of a woven lateral array of electrodes implemented in CMOS top metal, a humidity-sensitive layer of Intervia Photodielectric 8023D-10, a CMOS capacitance to voltage converter, and the self-calibration circuitry.

  6. Self-Calibrated Humidity Sensor in CMOS without Post-Processing

    OpenAIRE

    Nizhnik, Oleg; Higuchi, Kohei; Maenaka, Kazusuke

    2011-01-01

    A 1.1 μW power dissipation, voltage-output humidity sensor with 10% relative humidity accuracy was developed in the LFoundry 0.15 μm CMOS technology without post-processing. The sensor consists of a woven lateral array of electrodes implemented in CMOS top metal, a humidity-sensitive layer of Intervia Photodielectric 8023D-10, a CMOS capacitance to voltage converter, and the self-calibration circuitry.

  7. Radiation effects in a CMOS/SOS/Al-Gate D/A converter and on-chip diagnostic transistors

    International Nuclear Information System (INIS)

    Brucker, G.J.; Heagerty, W.

    1976-01-01

    This paper presents the results obtained from total dose and transient radiation tests on a CMOS/SOS/Al-Gate D/A converter and on-chip diagnostic transistors. Samples were irradiated by cobalt-60 gamma rays under worst-case conditions, and by 10-MeV electron pulses of 50-ns and 4.4-μs duration. Devices were fabricated with three different insulators; the two discussed here are standard wet oxide and a pyrogenic oxide. Test transistors on the D/A chips made it possible to diagnose the failure modes of the converter and to evaluate some special designs. These consisted of standard edge p- and n-channel transistors, edgeless units, edgeless tetrode transistors, and an edgeless type transmission gate with a diode clamp from substrate to gate. The total dose results indicate that the pyrogenic oxide increased the failure dose of the operational amplifier portion of the converter from 10 3 rads (Si) to 2 x 10 6 rads (Si); however, the sample and hold failed after exposure to a low level of 10 3 rads (Si). Test devices indicated this to be due to the radiation-induced leakage current of the transmission gate which discharges the sample and hold capacitor. The diode clamp decreased the threshold voltage shifts and the leakage currents. The edgeless devices improved the device performance because of a more abrupt turn-on. Narrow-pulse test data indicated that the edgeless units produced less photocurrent than the edge units by about a factor of three to four. Converter upset levels are less than or equal to 10 9 rads/s due to precision requirements which make a few millivolt transients untenable

  8. Atomistic study of the hardening of ferritic iron by Ni-Cr decorated dislocation loops

    Science.gov (United States)

    Bonny, G.; Bakaev, A.; Terentyev, D.; Zhurkin, E.; Posselt, M.

    2018-01-01

    The exact nature of the radiation defects causing hardening in reactor structural steels consists of several components that are not yet clearly determined. While generally, the hardening is attributed to dislocation loops, voids and secondary phases (radiation-induced precipitates), recent advanced experimental and computational studies point to the importance of solute-rich clusters (SRCs). Depending on the exact composition of the steel, SRCs may contain Mn, Ni and Cu (e.g. in reactor pressure vessel steels) or Ni, Cr, Si, Mn (e.g. in high-chromium steels for generation IV and fusion applications). One of the hypotheses currently implied to explain their formation is the process of radiation-induced diffusion and segregation of these elements to small dislocation loops (heterogeneous nucleation), so that the distinction between SRCs and loops becomes somewhat blurred. In this work, we perform an atomistic study to investigate the enrichment of loops by Ni and Cr solutes and their interaction with an edge dislocation. The dislocation loops decorated with Ni and Cr solutes are obtained by Monte Carlo simulations, while the effect of solute segregation on the loop's strength and interaction mechanism is then addressed by large scale molecular dynamics simulations. The synergy of the Cr-Ni interaction and their competition to occupy positions in the dislocation loop core are specifically clarified.

  9. Fatigue hardening and softening studies on strain hardened 18-8 austenitic stainless steel

    International Nuclear Information System (INIS)

    Ramakrishna Prasad, C.; Vasudevan, R.

    1976-01-01

    Metals when subjected to fatigue harden or soften depending on their previous mechanical history. Annealed or mildly cold worked metals are known to harden while severely cold worked metals soften when subjected to fatigue loading. In the present work samples of austenitic 18-8 steel cold worked to 11% and 22% reduction in area were mounted in a vertical pulsator and fatigued in axial tension-compression. Clear cut effects were produced and it was noticed that these depended on the extent of cold work, the amplitude as well as the number of cycles of fatigue and mean stress if any. (orig.) [de

  10. Fully depleted CMOS pixel sensor development and potential applications

    Energy Technology Data Exchange (ETDEWEB)

    Baudot, J.; Kachel, M. [Universite de Strasbourg, IPHC, 23 rue du Loess 67037 Strasbourg (France); CNRS, UMR7178, 67037 Strasbourg (France)

    2015-07-01

    CMOS pixel sensors are often opposed to hybrid pixel sensors due to their very different sensitive layer. In standard CMOS imaging processes, a thin (about 20 μm) low resistivity epitaxial layer acts as the sensitive volume and charge collection is mostly driven by thermal agitation. In contrast, the so-called hybrid pixel technology exploits a thick (typically 300 μm) silicon sensor with high resistivity allowing for the depletion of this volume, hence charges drift toward collecting electrodes. But this difference is fading away with the recent availability of some CMOS imaging processes based on a relatively thick (about 50 μm) high resistivity epitaxial layer which allows for full depletion. This evolution extents the range of applications for CMOS pixel sensors where their known assets, high sensitivity and granularity combined with embedded signal treatment, could potentially foster breakthrough in detection performances for specific scientific instruments. One such domain is the Xray detection for soft energies, typically below 10 keV, where the thin sensitive layer was previously severely impeding CMOS sensor usage. Another application becoming realistic for CMOS sensors, is the detection in environment with a high fluence of non-ionizing radiation, such as hadron colliders. However, when considering highly demanding applications, it is still to be proven that micro-circuits required to uniformly deplete the sensor at the pixel level, do not mitigate the sensitivity and efficiency required. Prototype sensors in two different technologies with resistivity higher than 1 kΩ, sensitive layer between 40 and 50 μm and featuring pixel pitch in the range 25 to 50 μm, have been designed and fabricated. Various biasing architectures were adopted to reach full depletion with only a few volts. Laboratory investigations with three types of sources (X-rays, β-rays and infrared light) demonstrated the validity of the approach with respect to depletion, keeping a

  11. CMOS/SOS processing

    Science.gov (United States)

    Ramondetta, P.

    1980-01-01

    Report describes processes used in making complementary - metal - oxide - semiconductor/silicon-on-sapphire (CMOS/SOS) integrated circuits. Report lists processing steps ranging from initial preparation of sapphire wafers to final mapping of "good" and "bad" circuits on a wafer.

  12. CMOS-NEMS Copper Switches Monolithically Integrated Using a 65 nm CMOS Technology

    Directory of Open Access Journals (Sweden)

    Jose Luis Muñoz-Gamarra

    2016-02-01

    Full Text Available This work demonstrates the feasibility to obtain copper nanoelectromechanical (NEMS relays using a commercial complementary metal oxide semiconductor (CMOS technology (ST 65 nm following an intra CMOS-MEMS approach. We report experimental demonstration of contact-mode nano-electromechanical switches obtaining low operating voltage (5.5 V, good ION/IOFF (103 ratio, abrupt subthreshold swing (4.3 mV/decade and minimum dimensions (3.50 μm × 100 nm × 180 nm, and gap of 100 nm. With these dimensions, the operable Cell area of the switch will be 3.5 μm (length × 0.2 μm (100 nm width + 100 nm gap = 0.7 μm2 which is the smallest reported one using a top-down fabrication approach.

  13. Radiation modification of materials

    International Nuclear Information System (INIS)

    Pikaev, A.K.

    1987-01-01

    Industrial and radiation chemical processes of material modification based on cross-linking of polymers as a result of radiation are considered. Among them are production of cables and rods with irradiated modified insulation, production of hardened and thermo-shrinkaging polymer products (films, tubes, fashioned products), production of radiation cross-linked polyethylene foam, technology of radiation vulcanization of elastomers. Attention is paid to radiation plants on the basis of γ-sources and electron acceleratos as well as to radiation conditions

  14. CMOS Enabled Microfluidic Systems for Healthcare Based Applications

    KAUST Repository

    Khan, Sherjeel M.; Gumus, Abdurrahman; Nassar, Joanna M.; Hussain, Muhammad Mustafa

    2018-01-01

    With the increased global population, it is more important than ever to expand accessibility to affordable personalized healthcare. In this context, a seamless integration of microfluidic technology for bioanalysis and drug delivery and complementary metal oxide semiconductor (CMOS) technology enabled data-management circuitry is critical. Therefore, here, the fundamentals, integration aspects, and applications of CMOS-enabled microfluidic systems for affordable personalized healthcare systems are presented. Critical components, like sensors, actuators, and their fabrication and packaging, are discussed and reviewed in detail. With the emergence of the Internet-of-Things and the upcoming Internet-of-Everything for a people-process-data-device connected world, now is the time to take CMOS-enabled microfluidics technology to as many people as possible. There is enormous potential for microfluidic technologies in affordable healthcare for everyone, and CMOS technology will play a major role in making that happen.

  15. CMOS Enabled Microfluidic Systems for Healthcare Based Applications

    KAUST Repository

    Khan, Sherjeel M.

    2018-02-27

    With the increased global population, it is more important than ever to expand accessibility to affordable personalized healthcare. In this context, a seamless integration of microfluidic technology for bioanalysis and drug delivery and complementary metal oxide semiconductor (CMOS) technology enabled data-management circuitry is critical. Therefore, here, the fundamentals, integration aspects, and applications of CMOS-enabled microfluidic systems for affordable personalized healthcare systems are presented. Critical components, like sensors, actuators, and their fabrication and packaging, are discussed and reviewed in detail. With the emergence of the Internet-of-Things and the upcoming Internet-of-Everything for a people-process-data-device connected world, now is the time to take CMOS-enabled microfluidics technology to as many people as possible. There is enormous potential for microfluidic technologies in affordable healthcare for everyone, and CMOS technology will play a major role in making that happen.

  16. A review of the stages of work hardening

    Energy Technology Data Exchange (ETDEWEB)

    Rollett, A.D.; Kocks, U.F.

    1993-07-01

    Stages of work hardening are reviewed with emphasis on links between each stage. Simple quantitative descriptions are given for each stage. Similarities between stage I, easy glide, and stage IV, large strain hardening, are pointed out both in terms of magnitude of the hardening rate and of the underlying mechanism of dislocation debris accumulation. Stage II is described as an athermal hardening stage that occurs when statistical variations in the dislocation ``forest`` lead to geometrical storage of dislocations. The steadily decreasing hardening rate observed in stage III is characterized by the increasing rate of loss of dislocation density due to dynamic recovery. Stage III appears to have an asymptote to a saturation stress which is determined by the characteristics of the dislocation tangles, or cell walls. The imperfect nature of the dynamic recovery process, however, leads to the accumulation of dislocation debris and this, by analogy with stage 1, causes the apparent saturation stress to rise, thus causing stage IV.

  17. High performance flexible CMOS SOI FinFETs

    KAUST Repository

    Fahad, Hossain M.

    2014-06-01

    We demonstrate the first ever CMOS compatible soft etch back based high performance flexible CMOS SOI FinFETs. The move from planar to non-planar FinFETs has enabled continued scaling down to the 14 nm technology node. This has been possible due to the reduction in off-state leakage and reduced short channel effects on account of the superior electrostatic charge control of multiple gates. At the same time, flexible electronics is an exciting expansion opportunity for next generation electronics. However, a fully integrated low-cost system will need to maintain ultra-large-scale-integration density, high performance and reliability - same as today\\'s traditional electronics. Up until recently, this field has been mainly dominated by very weak performance organic electronics enabled by low temperature processes, conducive to low melting point plastics. Now however, we show the world\\'s highest performing flexible version of 3D FinFET CMOS using a state-of-the-art CMOS compatible fabrication technique for high performance ultra-mobile consumer applications with stylish design. © 2014 IEEE.

  18. Toward CMOS image sensor based glucose monitoring.

    Science.gov (United States)

    Devadhasan, Jasmine Pramila; Kim, Sanghyo

    2012-09-07

    Complementary metal oxide semiconductor (CMOS) image sensor is a powerful tool for biosensing applications. In this present study, CMOS image sensor has been exploited for detecting glucose levels by simple photon count variation with high sensitivity. Various concentrations of glucose (100 mg dL(-1) to 1000 mg dL(-1)) were added onto a simple poly-dimethylsiloxane (PDMS) chip and the oxidation of glucose was catalyzed with the aid of an enzymatic reaction. Oxidized glucose produces a brown color with the help of chromogen during enzymatic reaction and the color density varies with the glucose concentration. Photons pass through the PDMS chip with varying color density and hit the sensor surface. Photon count was recognized by CMOS image sensor depending on the color density with respect to the glucose concentration and it was converted into digital form. By correlating the obtained digital results with glucose concentration it is possible to measure a wide range of blood glucose levels with great linearity based on CMOS image sensor and therefore this technique will promote a convenient point-of-care diagnosis.

  19. Design and Characterization of CMOS On-Chip Antennas for 60 GHz Communications

    Directory of Open Access Journals (Sweden)

    D.Titz

    2012-04-01

    Full Text Available In this paper, we present the design and the measurement of two antennas realized on a 130nm CMOS process. They both radiate in the 60 GHz band and are dedicated to Wireless Personal Area Network (WPAN applications. The antennas are manufactured within the frame of a multi-wafer project with several surrounding microelectronic circuits. The first antenna is an Inverted-F antenna (IFA. It has a maximum gain of -8 dBi and a -10 dB matching bandwidth of 20%. The second radiator is a meandered dipole. It has a maximum gain of -14 dBi and a -10 dB matching bandwidth of 10%. The challenging measurement of their reflection coefficient and their gain radiation pattern are presented. Simulated versus measured curves are analyzed. We especially demonstrate the necessity to take into account the closest microelectronic circuits of the antennas for accurate modeling of the radiating performance of 60 GHz on-chip dies.

  20. Pattern imprinting in CMOS static RAMs from Co-60 irradiation

    International Nuclear Information System (INIS)

    Schott, J.T.; Zugich, M.H.

    1987-01-01

    Total dose irradiation of various CMOS SRAMs is shown to imprint the pattern stored in the memory during irradiation. This imprinted pattern is the preferred state of the memory at subsequent power-up. Imprinting can occur at dose levels significantly below the failure level of the devices and is consistent with the bias dependent radiation induced threshold shifts of the individual transistors of the memory cells. However, before total imprinting occurs, other unusual imprinting phenomena can occur, such as a reverse imprinting effect seen in SOS memories, which is probably related to the bias dependence of back-channel leakage

  1. Avalanche-mode silicon LEDs for monolithic optical coupling in CMOS technology

    NARCIS (Netherlands)

    Dutta, Satadal

    2017-01-01

    Complementary Metal-Oxide-Semiconductor (CMOS) integrated circuit (IC) technology is the most commercially successful platform in modern electronic and control systems. So called "smart power" technologies such as Bipolar CMOS DMOS (BCD), combine the computational power of CMOS with high voltage

  2. Design of CMOS imaging system based on FPGA

    Science.gov (United States)

    Hu, Bo; Chen, Xiaolai

    2017-10-01

    In order to meet the needs of engineering applications for high dynamic range CMOS camera under the rolling shutter mode, a complete imaging system is designed based on the CMOS imaging sensor NSC1105. The paper decides CMOS+ADC+FPGA+Camera Link as processing architecture and introduces the design and implementation of the hardware system. As for camera software system, which consists of CMOS timing drive module, image acquisition module and transmission control module, the paper designs in Verilog language and drives it to work properly based on Xilinx FPGA. The ISE 14.6 emulator ISim is used in the simulation of signals. The imaging experimental results show that the system exhibits a 1280*1024 pixel resolution, has a frame frequency of 25 fps and a dynamic range more than 120dB. The imaging quality of the system satisfies the requirement of the index.

  3. CMOS Electrochemical Instrumentation for Biosensor Microsystems: A Review

    Directory of Open Access Journals (Sweden)

    Haitao Li

    2016-12-01

    Full Text Available Modern biosensors play a critical role in healthcare and have a quickly growing commercial market. Compared to traditional optical-based sensing, electrochemical biosensors are attractive due to superior performance in response time, cost, complexity and potential for miniaturization. To address the shortcomings of traditional benchtop electrochemical instruments, in recent years, many complementary metal oxide semiconductor (CMOS instrumentation circuits have been reported for electrochemical biosensors. This paper provides a review and analysis of CMOS electrochemical instrumentation circuits. First, important concepts in electrochemical sensing are presented from an instrumentation point of view. Then, electrochemical instrumentation circuits are organized into functional classes, and reported CMOS circuits are reviewed and analyzed to illuminate design options and performance tradeoffs. Finally, recent trends and challenges toward on-CMOS sensor integration that could enable highly miniaturized electrochemical biosensor microsystems are discussed. The information in the paper can guide next generation electrochemical sensor design.

  4. Test CMOS/SOS RAM for transient radiation upset comparative research and failure analysis

    International Nuclear Information System (INIS)

    Nikiforov, A.Y.; Poljakov, I.V.

    1995-01-01

    The test Complementary Metal-Oxide-Semiconductor/Silicon-on-Sapphire Random Access Memory (CMOS/SOS RAM) with eight types of memory cells was designed and tested at high dose rates with a flash X-ray machine and laser simulator. The memory cell (MC) design with additional transistors and RC-chain was found to be upset free up to 2 x 10 12 rad(Si)/s. An inversion effect was discovered in which almost 100% logic upset was observed in poorly protected memory cell arrays at very high dose rates

  5. Radiation hardness assurances categories for COTS technologies

    International Nuclear Information System (INIS)

    Hash, G.L.; Shaneyfelt, M.R.; Sexton, F.W.; Winokur, P.S.

    1997-01-01

    A comparison of the radiation tolerance of three commercial, and one radiation hardened SRAM is presented for four radiation environments. This work has shown the difficulty associated with strictly categorizing a device based solely on its radiation response, since its category depends on the specific radiation environment considered. For example, the 3.3-V Paradigm SRAM could be considered a radiation-tolerant device except for its SEU response. A more useful classification depends on the methods the manufacturer uses to ensure radiation hardness, i.e. whether specific design and process techniques have been used to harden the device. Finally, this work has shown that burned-in devices may fail functionally as much as 50% lower in total dose environments than non-burned-in devices. No burn-in effect was seen in dose-rate upset, latchup, or SEE environments. The user must ensure that total dose lot acceptance testing was performed on burned-in devices

  6. Thermal annealing response following irradiation of a CMOS imager for the JUICE JANUS instrument

    Science.gov (United States)

    Lofthouse-Smith, D.-D.; Soman, M. R.; Allanwood, E. A. H.; Stefanov, K. D.; Holland, A. D.; Leese, M.; Turne, P.

    2018-03-01

    ESA's JUICE (JUpiter ICy moon Explorer) spacecraft is an L-class mission destined for the Jovian system in 2030. Its primary goals are to investigate the conditions for planetary formation and the emergence of life, and how does the solar system work. The JANUS camera, an instrument on JUICE, uses a 4T back illuminated CMOS image sensor, the CIS115 designed by Teledyne e2v. JANUS imager test campaigns are studying the CIS115 following exposure to gammas, protons, electrons and heavy ions, simulating the harsh radiation environment present in the Jovian system. The degradation of 4T CMOS device performance following proton fluences is being studied, as well as the effectiveness of thermal annealing to reverse radiation damage. One key parameter for the JANUS mission is the Dark current of the CIS115, which has been shown to degrade in previous radiation campaigns. A thermal anneal of the CIS115 has been used to accelerate any annealing following the irradiation as well as to study the evolution of any performance characteristics. CIS115s have been irradiated to double the expected End of Life (EOL) levels for displacement damage radiation (2×1010 protons, 10 MeV equivalent). Following this, devices have undergone a thermal anneal cycle at 100oC for 168 hours to reveal the extent to which CIS115 recovers pre-irradiation performance. Dark current activation energy analysis following proton fluence gives information on trap species present in the device and how effective anneal is at removing these trap species. Thermal anneal shows no quantifiable change in the activation energy of the dark current following irradiation.

  7. Gun muzzle flash detection using a CMOS single photon avalanche diode

    Science.gov (United States)

    Merhav, Tomer; Savuskan, Vitali; Nemirovsky, Yael

    2013-10-01

    Si based sensors, in particular CMOS Image sensors, have revolutionized low cost imaging systems but to date have hardly been considered as possible candidates for gun muzzle flash detection, due to performance limitations, and low SNR in the visible spectrum. In this study, a CMOS Single Photon Avalanche Diode (SPAD) module is used to record and sample muzzle flash events in the visible spectrum, from representative weapons, common on the modern battlefield. SPADs possess two crucial properties for muzzle flash imaging - Namely, very high photon detection sensitivity, coupled with a unique ability to convert the optical signal to a digital signal at the source pixel, thus practically eliminating readout noise. This enables high sampling frequencies in the kilohertz range without SNR degradation, in contrast to regular CMOS image sensors. To date, the SPAD has not been utilized for flash detection in an uncontrolled environment, such as gun muzzle flash detection. Gun propellant manufacturers use alkali salts to suppress secondary flashes ignited during the muzzle flash event. Common alkali salts are compounds based on Potassium or Sodium, with spectral emission lines around 769nm and 589nm, respectively. A narrow band filter around the Potassium emission doublet is used in this study to favor the muzzle flash signal over solar radiation. This research will demonstrate the SPAD's ability to accurately sample and reconstruct the temporal behavior of the muzzle flash in the visible wavelength under the specified imaging conditions. The reconstructed signal is clearly distinguishable from background clutter, through exploitation of flash temporal characteristics.

  8. Monolithic integration of micromachined sensors and CMOS circuits based on SOI technologies

    International Nuclear Information System (INIS)

    Yu Xiaomei; Tang Yaquan; Zhang Haitao

    2008-01-01

    This note presents a novel way to monolithically integrate micro-cantilever sensors and signal conditioning circuits by combining SOI CMOS and SOI micromachining technologies. In order to improve the sensor performance and reduce the system volume, an integrated sensor system composed of a piezoresistive cantilever array, a temperature-compensation current reference, a digitally controlled multiplexer and an instrument amplifier is designed and finally fabricated. A post-SOI CMOS process is developed to realize the integrated sensor system which is based on a standard CMOS process with one more mask to define the cantilever structure at the end of the process. Measurements on the finished SOI CMOS devices and circuits show that the integration process has good compatibility both for the cantilever sensors and for the CMOS circuits, and the SOI CMOS integration process can decrease about 25% sequences compared with the bulk silicon CMOS process. (note)

  9. Modeling of SONOS Memory Cell Erase Cycle

    Science.gov (United States)

    Phillips, Thomas A.; MacLeod, Todd C.; Ho, Fat H.

    2011-01-01

    Utilization of Silicon-Oxide-Nitride-Oxide-Silicon (SONOS) nonvolatile semiconductor memories as a flash memory has many advantages. These electrically erasable programmable read-only memories (EEPROMs) utilize low programming voltages, have a high erase/write cycle lifetime, are radiation hardened, and are compatible with high-density scaled CMOS for low power, portable electronics. In this paper, the SONOS memory cell erase cycle was investigated using a nonquasi-static (NQS) MOSFET model. Comparisons were made between the model predictions and experimental data.

  10. CMOS-compatible spintronic devices: a review

    Science.gov (United States)

    Makarov, Alexander; Windbacher, Thomas; Sverdlov, Viktor; Selberherr, Siegfried

    2016-11-01

    For many decades CMOS devices have been successfully scaled down to achieve higher speed and increased performance of integrated circuits at lower cost. Today’s charge-based CMOS electronics encounters two major challenges: power dissipation and variability. Spintronics is a rapidly evolving research and development field, which offers a potential solution to these issues by introducing novel ‘more than Moore’ devices. Spin-based magnetoresistive random-access memory (MRAM) is already recognized as one of the most promising candidates for future universal memory. Magnetic tunnel junctions, the main elements of MRAM cells, can also be used to build logic-in-memory circuits with non-volatile storage elements on top of CMOS logic circuits, as well as versatile compact on-chip oscillators with low power consumption. We give an overview of CMOS-compatible spintronics applications. First, we present a brief introduction to the physical background considering such effects as magnetoresistance, spin-transfer torque (STT), spin Hall effect, and magnetoelectric effects. We continue with a comprehensive review of the state-of-the-art spintronic devices for memory applications (STT-MRAM, domain wall-motion MRAM, and spin-orbit torque MRAM), oscillators (spin torque oscillators and spin Hall nano-oscillators), logic (logic-in-memory, all-spin logic, and buffered magnetic logic gate grid), sensors, and random number generators. Devices with different types of resistivity switching are analyzed and compared, with their advantages highlighted and challenges revealed. CMOS-compatible spintronic devices are demonstrated beginning with predictive simulations, proceeding to their experimental confirmation and realization, and finalized by the current status of application in modern integrated systems and circuits. We conclude the review with an outlook, where we share our vision on the future applications of the prospective devices in the area.

  11. Investigation of a Hardened Cement Paste Grout

    DEFF Research Database (Denmark)

    Esteves, Luis Pedro; Sørensen, Eigil Verner

    This report documents a series of tests performed on a hardened cement paste grout delivered by the client, Det Norske Veritas A/S.......This report documents a series of tests performed on a hardened cement paste grout delivered by the client, Det Norske Veritas A/S....

  12. Neutron flux and annealing effects on irradiation hardening of RPV materials

    Science.gov (United States)

    Chaouadi, R.; Gérard, R.

    2011-11-01

    This paper aims to examine an eventual effect of neutron flux, sometimes referred to as dose rate effect, on irradiation hardening of a typical A533B reactor pressure vessel steel. Tensile tests on both low flux (reactor surveillance data) and high flux (BR2 reactor) were performed in a large fluence range. The obtained results indicate two features. First, the surveillance data exhibit a constant (˜90 MPa) higher yield strength than the high flux data. However, this difference cannot be explained from a flux effect but most probably from differences in the initial tensile properties. The hardening kinetic of both low and high flux is the same. Annealing at low temperature, 345 °C/40 h, to eventually reveal unstable matrix damage did not affect both BR2 and surveillance specimens. This is confirmed by other annealing experimental data including both tensile and hardness measurements and tensile data on A508 forging and weld. It is suggested that the absence of flux effect on the tensile properties while different radiation-induced microstructures can be attributed to thermal ageing effects.

  13. CMOS MAPS in a Homogeneous 3D Process for Charged Particle Tracking

    CERN Document Server

    Manazza, A; Manghisoni, M; Re, V; Traversi, G; Bettarini, S; Forti, F; Morsani, F; Rizzo, G; 10.1109/TNS.2014.2299341

    2014-01-01

    This work presents the characterization of deep n-well (DNW) CMOS monolithic active pixel sensors (MAPS) fabricated in a 130 nm homogeneous, vertically integrated technology. An evaluation of the 3D MAPS device performance, designed for application of the experiments at the future high luminosity colliders, is provided through the characterization of the prototypes, including tests with infrared (IR) laser, 55Fe and 90Sr sources. The radiation hardness study of the technology will also be presented together with its impact on 3D DNW MAPS performance.

  14. Radiation effects in optoelectronic devices

    International Nuclear Information System (INIS)

    Barnes, C.E.

    1977-03-01

    A summary is given of studies on radiation effects in light-emitting diodes, laser diodes, detectors, optical isolators and optical fibers. It is shown that the study of radiation damage in these devices can provide valuable information concerning the nature of the devices themselves, as well as methods of hardening these devices for applications in radiation environments

  15. Small Pixel Hybrid CMOS X-ray Detectors

    Science.gov (United States)

    Hull, Samuel; Bray, Evan; Burrows, David N.; Chattopadhyay, Tanmoy; Falcone, Abraham; Kern, Matthew; McQuaide, Maria; Wages, Mitchell

    2018-01-01

    Concepts for future space-based X-ray observatories call for a large effective area and high angular resolution instrument to enable precision X-ray astronomy at high redshift and low luminosity. Hybrid CMOS detectors are well suited for such high throughput instruments, and the Penn State X-ray detector lab, in collaboration with Teledyne Imaging Sensors, has recently developed new small pixel hybrid CMOS X-ray detectors. These prototype 128x128 pixel devices have 12.5 micron pixel pitch, 200 micron fully depleted depth, and include crosstalk eliminating CTIA amplifiers and in-pixel correlated double sampling (CDS) capability. We report on characteristics of these new detectors, including the best read noise ever measured for an X-ray hybrid CMOS detector, 5.67 e- (RMS).

  16. CMOS SPAD-based image sensor for single photon counting and time of flight imaging

    OpenAIRE

    Dutton, Neale Arthur William

    2016-01-01

    The facility to capture the arrival of a single photon, is the fundamental limit to the detection of quantised electromagnetic radiation. An image sensor capable of capturing a picture with this ultimate optical and temporal precision is the pinnacle of photo-sensing. The creation of high spatial resolution, single photon sensitive, and time-resolved image sensors in complementary metal oxide semiconductor (CMOS) technology offers numerous benefits in a wide field of applications....

  17. Active Pixel Sensors in ams H18/H35 HV-CMOS Technology for the ATLAS HL-LHC Upgrade

    CERN Document Server

    Ristic, Branislav

    2016-09-21

    Deep sub micron HV-CMOS processes offer the opportunity for sensors built by industry standard techniques while being HV tolerant, making them good candidates for drift-based, fast collecting, thus radiation-hard pixel detectors. For the upgrade of the ATLAS Pixel Detector towards the HL-LHC requirements, active pixel sensors in HV-CMOS technology were investigated. These implement amplifier and discriminator stages directly in insulating deep n-wells, which also act as collecting electrodes. The deep n-wells allow for bias voltages up to 150V leading to a depletion depth of several 10um. Prototype sensors in the ams H18 180nm and H35 350nm HV-CMOS processes have been manufactured, acting as a potential drop-in replacement for the current ATLAS Pixel sensors, thus leaving higher level processing such as trigger handling to dedicated read-out chips. Sensors were thoroughly tested in lab measurements as well as in testbeam experiments. Irradiation with X-rays and protons revealed a tolerance to ionizing doses o...

  18. CMOS Enabled Microfluidic Systems for Healthcare Based Applications.

    Science.gov (United States)

    Khan, Sherjeel M; Gumus, Abdurrahman; Nassar, Joanna M; Hussain, Muhammad M

    2018-04-01

    With the increased global population, it is more important than ever to expand accessibility to affordable personalized healthcare. In this context, a seamless integration of microfluidic technology for bioanalysis and drug delivery and complementary metal oxide semiconductor (CMOS) technology enabled data-management circuitry is critical. Therefore, here, the fundamentals, integration aspects, and applications of CMOS-enabled microfluidic systems for affordable personalized healthcare systems are presented. Critical components, like sensors, actuators, and their fabrication and packaging, are discussed and reviewed in detail. With the emergence of the Internet-of-Things and the upcoming Internet-of-Everything for a people-process-data-device connected world, now is the time to take CMOS-enabled microfluidics technology to as many people as possible. There is enormous potential for microfluidic technologies in affordable healthcare for everyone, and CMOS technology will play a major role in making that happen. © 2018 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  19. CMOS serial link for fully duplexed data communication

    Science.gov (United States)

    Lee, Kyeongho; Kim, Sungjoon; Ahn, Gijung; Jeong, Deog-Kyoon

    1995-04-01

    This paper describes a CMOS serial link allowing fully duplexed 500 Mbaud serial data communication. The CMOS serial link is a robust and low-cost solution to high data rate requirements. A central charge pump PLL for generating multiphase clocks for oversampling is shared by several serial link channels. Fully duplexed serial data communication is realized in the bidirectional bridge by separating incoming data from the mixed signal on the cable end. The digital PLL accomplishes process-independent data recovery by using a low-ratio oversampling, a majority voting, and a parallel data recovery scheme. Mostly, digital approach could extend its bandwidth further with scaled CMOS technology. A single channel serial link and a charge pump PLL are integrated in a test chip using 1.2 micron CMOS process technology. The test chip confirms upto 500 Mbaud unidirectional mode operation and 320 Mbaud fully duplexed mode operation with pseudo random data patterns.

  20. Direct single electron detection with a CMOS detector for electron microscopy

    International Nuclear Information System (INIS)

    Faruqi, A.R.; Henderson, R.; Pryddetch, M.; Allport, P.; Evans, A.

    2005-01-01

    We report the results of an investigation into the use of a monolithic active pixel sensor (MAPS) for electron microscopy. MAPS, designed originally for astronomers at the Rutherford Appleton Laboratories, was installed in a 120 kV electron microscope (Philips CM12) at the MRC Laboratory in Cambridge for tests which included recording single electrons at 40 and 120 keV, and measuring signal-to-noise ratio (SNR), spatial resolution and radiation sensitivity. Our results show that, due to the excellent SNR and resolution, it is possible to register single electrons. The radiation damage to the detector is apparent with low doses and gets progressively greater so that its lifetime is limited to 600,000-900,000 electrons/pixel (very approximately 10-15 krad). Provided this detector can be radiation hardened to reduce its radiation sensitivity several hundred fold and increased in size, it will provide excellent performance for all types of electron microscopy

  1. CMOS Compatible SOI MESFETs for Radiation Hardened DC-to-DC Converters, Phase I

    Data.gov (United States)

    National Aeronautics and Space Administration — We have developed a novel metal-semiconductor field-effect-transistor (MESFET) technology suitable for extreme environment electronics. The MESFET technology is...

  2. Decal electronics for printed high performance cmos electronic systems

    KAUST Repository

    Hussain, Muhammad Mustafa; Sevilla, Galo Torres; Cordero, Marlon Diaz; Kutbee, Arwa T.

    2017-01-01

    High performance complementary metal oxide semiconductor (CMOS) electronics are critical for any full-fledged electronic system. However, state-of-the-art CMOS electronics are rigid and bulky making them unusable for flexible electronic applications

  3. CMOS Thermal Ox and Diffusion Furnace: Tystar Tytan 2000

    Data.gov (United States)

    Federal Laboratory Consortium — Description:CORAL Names: CMOS Wet Ox, CMOS Dry Ox, Boron Doping (P-type), Phos. Doping (N-Type)This four-stack furnace bank is used for the thermal growth of silicon...

  4. CMOS Compressed Imaging by Random Convolution

    OpenAIRE

    Jacques, Laurent; Vandergheynst, Pierre; Bibet, Alexandre; Majidzadeh, Vahid; Schmid, Alexandre; Leblebici, Yusuf

    2009-01-01

    We present a CMOS imager with built-in capability to perform Compressed Sensing. The adopted sensing strategy is the random Convolution due to J. Romberg. It is achieved by a shift register set in a pseudo-random configuration. It acts as a convolutive filter on the imager focal plane, the current issued from each CMOS pixel undergoing a pseudo-random redirection controlled by each component of the filter sequence. A pseudo-random triggering of the ADC reading is finally applied to comp...

  5. Numerical and experimental comparison of plastic work-hardening rules

    International Nuclear Information System (INIS)

    Haisler, W.E.

    1977-01-01

    The purpose of this paper is to describe recent numerical and experimental correlation studies of several plastic work-hardening rules. The mechanical sublayer model and the combined kinematic-isotropic hardening rules are examined and the numerical results for several structural geometries are compared to experimental results. Both monotonic and cyclic loads are considered. The governing incremental plasticity relations are developed for both work-hardening models. The combined kinematic-isotropic hardening model is developed in terms of a ratio γ which controls the relative contribution of kinematic hardening (yield surface translation) and isotropic hardening (yield surface expansion). In addition to making use of a uniaxial stress-strain curve as input data, the model allows for the input of a yield surface size vs. uniaxial plastic strain curve obtained from a cyclic uniaxial reverse loading test. The mechanical sublayer model is developed in general form and a new method for determining the sublayer parameters (stress weighting factors and yield stresses) is presented. It is demonstrated that former procedures used to obtain the sublayer parameters are inconsistent for multiaxial loading. Numerical and experimental results are presented for a cylinder, circular plate with punch, and a steel pressure vessel. The numerical results are obtained with the computer program AGGIE I. The comparison study indicates that reasonable agreement is obtained with both hardening models; the choice depending upon whether the loading is monotonic or cyclic

  6. The challenge of sCMOS image sensor technology to EMCCD

    Science.gov (United States)

    Chang, Weijing; Dai, Fang; Na, Qiyue

    2018-02-01

    In the field of low illumination image sensor, the noise of the latest scientific-grade CMOS image sensor is close to EMCCD, and the industry thinks it has the potential to compete and even replace EMCCD. Therefore we selected several typical sCMOS and EMCCD image sensors and cameras to compare their performance parameters. The results show that the signal-to-noise ratio of sCMOS is close to EMCCD, and the other parameters are superior. But signal-to-noise ratio is very important for low illumination imaging, and the actual imaging results of sCMOS is not ideal. EMCCD is still the first choice in the high-performance application field.

  7. Mixed-signal 0.18μm CMOS and SiGe BiCMOS foundry technologies for ROIC applications

    Science.gov (United States)

    Kar-Roy, Arjun; Howard, David; Racanelli, Marco; Scott, Mike; Hurwitz, Paul; Zwingman, Robert; Chaudhry, Samir; Jordan, Scott

    2010-10-01

    Today's readout integrated-circuits (ROICs) require a high level of integration of high performance analog and low power digital logic. TowerJazz offers a commercial 0.18μm CMOS technology platform for mixed-signal, RF, and high performance analog applications which can be used for ROIC applications. The commercial CA18HD dual gate oxide 1.8V/3.3V and CA18HA dual gate oxide 1.8V/5V RF/mixed signal processes, consisting of six layers of metallization, have high density stacked linear MIM capacitors, high-value resistors, triple-well isolation and thick top aluminum metal. The CA18HA process also has scalable drain extended LDMOS devices, up to 40V Vds, for high-voltage sensor applications, and high-performance bipolars for low noise requirements in ROICs. Also discussed are the available features of the commercial SBC18 SiGe BiCMOS platform with SiGe NPNs operating up to 200/200GHz (fT/fMAX frequencies in manufacturing and demonstrated to 270 GHz fT, for reduced noise and integrated RF capabilities which could be used in ROICs. Implementation of these technologies in a thick film SOI process for integrated RF switch and power management and the availability of high fT vertical PNPs to enable complementary BiCMOS (CBiCMOS), for RF enabled ROICs, are also described in this paper.

  8. Variationen und ihre Kompensation in CMOS Digitalschaltungen

    OpenAIRE

    Baumann, Thomas

    2010-01-01

    Variationen bei der Herstellung und während des Betriebs von CMOS Schaltungen beeinflussen deren Geschwindigkeit und erschweren die Verifikation der in der Spezifikation zugesicherten Eigenschaften. In dieser Arbeit wird eine abstraktionsebenenübergreifende Vorgehensweise zur Abschätzung des Einflusses von Prozess- und betriebsbedingten Umgebungsvariationen auf die Geschwindigkeit einer Schaltung vorgestellt. Neben Untersuchungen der Laufzeitsensitivität in low-power CMOS Technologien von...

  9. CMOS Integrated Carbon Nanotube Sensor

    International Nuclear Information System (INIS)

    Perez, M. S.; Lerner, B.; Boselli, A.; Lamagna, A.; Obregon, P. D. Pareja; Julian, P. M.; Mandolesi, P. S.; Buffa, F. A.

    2009-01-01

    Recently carbon nanotubes (CNTs) have been gaining their importance as sensors for gases, temperature and chemicals. Advances in fabrication processes simplify the formation of CNT sensor on silicon substrate. We have integrated single wall carbon nanotubes (SWCNTs) with complementary metal oxide semiconductor process (CMOS) to produce a chip sensor system. The sensor prototype was designed and fabricated using a 0.30 um CMOS process. The main advantage is that the device has a voltage amplifier so the electrical measure can be taken and amplified inside the sensor. When the conductance of the SWCNTs varies in response to media changes, this is observed as a variation in the output tension accordingly.

  10. CMOS analog circuit design

    CERN Document Server

    Allen, Phillip E

    1987-01-01

    This text presents the principles and techniques for designing analog circuits to be implemented in a CMOS technology. The level is appropriate for seniors and graduate students familiar with basic electronics, including biasing, modeling, circuit analysis, and some familiarity with frequency response. Students learn the methodology of analog integrated circuit design through a hierarchically-oriented approach to the subject that provides thorough background and practical guidance for designing CMOS analog circuits, including modeling, simulation, and testing. The authors' vast industrial experience and knowledge is reflected in the circuits, techniques, and principles presented. They even identify the many common pitfalls that lie in the path of the beginning designer--expert advice from veteran designers. The text mixes the academic and practical viewpoints in a treatment that is neither superficial nor overly detailed, providing the perfect balance.

  11. Characterization of active CMOS sensors for capacitively coupled pixel detectors

    Energy Technology Data Exchange (ETDEWEB)

    Hirono, Toko; Gonella, Laura; Janssen, Jens; Hemperek, Tomasz; Huegging, Fabian; Krueger, Hans; Wermes, Norbert [Institute of Physics, University of Bonn (Germany); Peric, Ivan [Institut fuer Prozessdatenverarbeitung und Elektronik, Karlsruher Institut fuer Technologie, Karlsruhe (Germany)

    2015-07-01

    Active CMOS pixel sensor is one of the most attractive candidates for detectors of upcoming particle physics experiments. In contrast to conventional sensors of hybrid detectors, signal processing circuit can be integrated in the active CMOS sensor. The characterization and optimization of the pixel circuit are indispensable to obtain a good performance from the sensors. The prototype chips of the active CMOS sensor were fabricated in the AMS 180nm and L-Foundry 150 nm CMOS processes, respectively a high voltage and high resistivity technology. Both chips have a charge sensitive amplifier and a comparator in each pixel. The chips are designed to be glued to the FEI4 pixel readout chip. The signals from 3 pixels of the prototype chips are capacitively coupled to the FEI4 input pads. We have performed lab tests and test beams to characterize the prototypes. In this presentation, the measurement results of the active CMOS prototype sensors are shown.

  12. Use of COTS microelectronics in radiation environments

    International Nuclear Information System (INIS)

    Winokur, P.S.; Lum, G.K.; Shaneyfelt, M.R.; Sexton, F.W.; Hash, G.L.; Scott, L.

    1999-01-01

    This paper addresses key issues for the cost-effective use of COTS (Commercially available Off The Shelf) microelectronics in radiation environments that enable circuit or system designers to manage risks and ensure mission success. They review several factors and tradeoffs affecting the successful application of COTS parts including (1) hardness assurance and qualification issues, (2) system hardening techniques, and (3) life-cycle costs. The paper also describes several experimental studies that address trends in total-dose, transient, and single-event radiation hardness as COTS technology scales to smaller feature sizes. As an example, the level at which dose-rate upset occurs in Samsung SRAMs increases from 1.4 x 10 8 rad(Si)/s for a 256K SRAM to 7.7 x 10 9 rad(Si)/s for a 4M SRAM, indicating unintentional hardening improvements in the design of process of a commercial technology. Additional experiments were performed to quantify variations in radiation hardness for COTS parts. In one study, only small (10--15%) variations were found in the dose-rate upset and latchup thresholds for Samsung 4M SRAMs from three different date codes. In another study, irradiations of 4M SRAMs from Samsung, Hitachi, and Toshiba indicate large differences in total-dose radiation hardness. The paper attempts to carefully define terms and clear up misunderstandings about the definitions of COTS and radiation-hardened (RH) technology

  13. COMPLEX SURFACE HARDENING OF STEEL ARTICLES

    Directory of Open Access Journals (Sweden)

    A. V. Kovalchuk

    2014-01-01

    Full Text Available The method of complex surface hardening of steel detailswas designed. The method is a compound of two processes of hardening: chemical heat treatment and physical vapor deposition (PVD of the coating. The result, achieved in this study is much higher, than in other work on this topic and is cumulative. The method designed can be used in mechanical engineering, medicine, energetics and is perspective for military and space technologies.

  14. Long term ionization response of several BiCMOS VLSIC technologies

    International Nuclear Information System (INIS)

    Pease, R.L.; Combs, W.; Clark, S.

    1992-01-01

    BiCMOS is emerging as a strong competitor to CMOS for gate arrays and memories because of its performance advantages for the same feature size. In this paper, the authors examine the long term ionization response of five BiCMOS technologies by characterizing test structures which emphasize the various failure modes of CMOS and bipolar. The primary failure modes are found to be associated with the recessed field oxide isolation; edge leakage in the n channel MOSFETs and buried layer to buried layer leakage in the bipolar. The ionization failure thresholds for worst case bias were in the range of 5-20 Krad(Si) for both failure modes in all five technologies

  15. Dielectric strength of SiO2 in a CMOS transistor structure

    International Nuclear Information System (INIS)

    Soden, J.M.

    1979-01-01

    The distribution of experimental dielectric strengths of SiO 2 gate dielectric in a CMOS transistor structure is shown to be composed of a primary, statistically-normal distribution of high dielectric strength and a secondary distribution spread through the lower dielectric strength region. The dielectric strength was not significantly affected by high level (1 x 10 6 RADS (Si)) gamma radiation or high temperature (200 0 C) stress. The primary distribution breakdowns occurred at topographical edges, mainly at the gate/field oxide interface, and the secondary distribution breakdowns occurred at random locations in the central region of the gate

  16. BiCMOS amplifier-discriminator integrated circuit for gas-filled detector readout

    International Nuclear Information System (INIS)

    Herve, C.; Dzahini, D.; Le Caer, T.; Richer, J.-P.; Torki, K.

    2005-01-01

    The paper presents a 16-channel amplifier-discriminator designed in BiCMOS technology. It will be used for the binary parallel readout of gas-filled detectors being designed at the European Synchrotron Radiation Facility. The circuit (named AMS211) has been manufactured. The measured transimpedance gain (400 KΩ), bandwidth (25 MHz) and noise (1570 e - +95 e - /pF ENC) well match the simulated results. The discriminator thresholds are individually controlled by built-in Digital to Analogue Converter. The experience gained with a first prototype of readout electronics indicates that the AMS211 should meet our requirements

  17. BiCMOS amplifier-discriminator integrated circuit for gas-filled detector readout

    Energy Technology Data Exchange (ETDEWEB)

    Herve, C. [European Synchrotron Radiation Facility, BP 220, 38043 Grenoble Cedex (France)]. E-mail: herve@esrf.fr; Dzahini, D. [Laboratoire de Physique Subatomique et de Cosmologie, Grenoble (France); Le Caer, T. [European Synchrotron Radiation Facility, BP 220, 38043 Grenoble Cedex (France); Richer, J.-P. [Laboratoire de Physique Subatomique et de Cosmologie, Grenoble (France); Torki, K. [Laboratoire TIMA, Grenoble (France)

    2005-03-21

    The paper presents a 16-channel amplifier-discriminator designed in BiCMOS technology. It will be used for the binary parallel readout of gas-filled detectors being designed at the European Synchrotron Radiation Facility. The circuit (named AMS211) has been manufactured. The measured transimpedance gain (400 K{omega}), bandwidth (25 MHz) and noise (1570 e{sup -}+95 e{sup -}/pF ENC) well match the simulated results. The discriminator thresholds are individually controlled by built-in Digital to Analogue Converter. The experience gained with a first prototype of readout electronics indicates that the AMS211 should meet our requirements.

  18. First principle leakage current reduction technique for CMOS devices

    CSIR Research Space (South Africa)

    Tsague, HD

    2015-12-01

    Full Text Available This paper presents a comprehensive study of leakage reduction techniques applicable to CMOS based devices. In the process, mathematical equations that model the power-performance trade-offs in CMOS logic circuits are presented. From those equations...

  19. Experimental characterization of a 10 μW 55 μm-pitch FPN-compensated CMOS digital pixel sensor for X-ray imagers

    Energy Technology Data Exchange (ETDEWEB)

    Figueras, Roger, E-mail: roger.figueras@imb-cnm.csic.es [Institut de Microelectrònica de Barcelona IMB-CNM(CSIC), Bellaterra (Spain); Martínez, Ricardo; Terés, Lluís [Institut de Microelectrònica de Barcelona IMB-CNM(CSIC), Bellaterra (Spain); Serra-Graells, Francisco [Institut de Microelectrònica de Barcelona IMB-CNM(CSIC), Bellaterra (Spain); Department of Microelectronics and Electronic Systems, Universitat Autònoma de Barcelona, Bellaterra (Spain)

    2014-10-11

    This paper presents experimental results obtained from both electrical and radiation tests of a new room-temperature digital pixel sensor (DPS) circuit specifically optimized for digital direct X-ray imaging. The 10 μW 55 μm-pitch CMOS active pixel circuit under test includes self-bias capability, built-in test, selectable e{sup −}/h{sup +} collection, 10-bit charge-integration A/D conversion, individual gain tuning for fixed pattern noise (FPN) cancellation, and digital-only I/O interface, which make it suitable for 2D modular chip assemblies in large and seamless sensing areas. Experimental results for this DPS architecture in 0.18 μm 1P6M CMOS technology are reported, returning good performance in terms of linearity, 2ke{sub rms}{sup −} of ENC, inter-pixel crosstalk below 0.5 LSB, 50 Mbps of I/O speed, and good radiation response for its use in digital X-ray imaging.

  20. Hardening of niobium alloys at precrystallization annealing

    International Nuclear Information System (INIS)

    Vasil'eva, E.V.; Pustovalov, V.A.

    1989-01-01

    Niobium base alloys were investigated. It is shown that precrystallization annealing of niobium-molybdenum, niobium-vanadium and niobium-zirconium alloys elevates much more sufficiently their resistance to microplastic strains, than to macroplastic strains. Hardening effect differs sufficiently for different alloys. The maximal hardening is observed for niobium-vanadium alloys, the minimal one - for niobium-zirconium alloys

  1. Neutron irradiation test of depleted CMOS pixel detector prototypes

    International Nuclear Information System (INIS)

    Mandić, I.; Cindro, V.; Gorišek, A.; Hiti, B.; Kramberger, G.; Mikuž, M.; Zavrtanik, M.; Hemperek, T.; Daas, M.; Hügging, F.; Krüger, H.; Pohl, D.-L.; Wermes, N.; Gonella, L.

    2017-01-01

    Charge collection properties of depleted CMOS pixel detector prototypes produced on p-type substrate of 2 kΩ cm initial resistivity (by LFoundry 150 nm process) were studied using Edge-TCT method before and after neutron irradiation. The test structures were produced for investigation of CMOS technology in tracking detectors for experiments at HL-LHC upgrade. Measurements were made with passive detector structures in which current pulses induced on charge collecting electrodes could be directly observed. Thickness of depleted layer was estimated and studied as function of neutron irradiation fluence. An increase of depletion thickness was observed after first two irradiation steps to 1 · 10 13 n/cm 2 and 5 · 10 13 n/cm 2 and attributed to initial acceptor removal. At higher fluences the depletion thickness at given voltage decreases with increasing fluence because of radiation induced defects contributing to the effective space charge concentration. The behaviour is consistent with that of high resistivity silicon used for standard particle detectors. The measured thickness of the depleted layer after irradiation with 1 · 10 15 n/cm 2 is more than 50 μm at 100 V bias. This is sufficient to guarantee satisfactory signal/noise performance on outer layers of pixel trackers in HL-LHC experiments.

  2. Ion traps fabricated in a CMOS foundry

    Energy Technology Data Exchange (ETDEWEB)

    Mehta, K. K.; Ram, R. J. [Department of Electrical Engineering and Computer Science, Massachusetts Institute of Technology, Cambridge, Massachusetts 02139 (United States); Eltony, A. M.; Chuang, I. L. [Center for Ultracold Atoms, Research Laboratory of Electronics and Department of Physics, Massachusetts Institute of Technology, Cambridge, Massachusetts 02139 (United States); Bruzewicz, C. D.; Sage, J. M., E-mail: jsage@ll.mit.edu; Chiaverini, J., E-mail: john.chiaverini@ll.mit.edu [Lincoln Laboratory, Massachusetts Institute of Technology, Lexington, Massachusetts 02420 (United States)

    2014-07-28

    We demonstrate trapping in a surface-electrode ion trap fabricated in a 90-nm CMOS (complementary metal-oxide-semiconductor) foundry process utilizing the top metal layer of the process for the trap electrodes. The process includes doped active regions and metal interconnect layers, allowing for co-fabrication of standard CMOS circuitry as well as devices for optical control and measurement. With one of the interconnect layers defining a ground plane between the trap electrode layer and the p-type doped silicon substrate, ion loading is robust and trapping is stable. We measure a motional heating rate comparable to those seen in surface-electrode traps of similar size. This demonstration of scalable quantum computing hardware utilizing a commercial CMOS process opens the door to integration and co-fabrication of electronics and photonics for large-scale quantum processing in trapped-ion arrays.

  3. Charged particle detection performances of CMOS pixel sensors produced in a 0.18 μm process with a high resistivity epitaxial layer

    Science.gov (United States)

    Senyukov, S.; Baudot, J.; Besson, A.; Claus, G.; Cousin, L.; Dorokhov, A.; Dulinski, W.; Goffe, M.; Hu-Guo, C.; Winter, M.

    2013-12-01

    The apparatus of the ALICE experiment at CERN will be upgraded in 2017/18 during the second long shutdown of the LHC (LS2). A major motivation for this upgrade is to extend the physics reach for charmed and beauty particles down to low transverse momenta. This requires a substantial improvement of the spatial resolution and the data rate capability of the ALICE Inner Tracking System (ITS). To achieve this goal, the new ITS will be equipped with 50 μm thin CMOS Pixel Sensors (CPS) covering either the three innermost layers or all the 7 layers of the detector. The CPS being developed for the ITS upgrade at IPHC (Strasbourg) is derived from the MIMOSA 28 sensor realised for the STAR-PXL at RHIC in a 0.35 μm CMOS process. In order to satisfy the ITS upgrade requirements in terms of readout speed and radiation tolerance, a CMOS process with a reduced feature size and a high resistivity epitaxial layer should be exploited. In this respect, the charged particle detection performance and radiation hardness of the TowerJazz 0.18 μm CMOS process were studied with the help of the first prototype chip MIMOSA 32. The beam tests performed with negative pions of 120 GeV/c at the CERN-SPS allowed to measure a signal-to-noise ratio (SNR) for the non-irradiated chip in the range between 22 and 32 depending on the pixel design. The chip irradiated with the combined dose of 1 MRad and 1013neq /cm2 was observed to yield an SNR ranging between 11 and 23 for coolant temperatures varying from 15 °C to 30 °C. These SNR values were measured to result in particle detection efficiencies above 99.5% and 98% before and after irradiation, respectively. These satisfactory results allow to validate the TowerJazz 0.18 μm CMOS process for the ALICE ITS upgrade.

  4. Charged particle detection performances of CMOS pixel sensors produced in a 0.18μm process with a high resistivity epitaxial layer

    Energy Technology Data Exchange (ETDEWEB)

    Senyukov, S., E-mail: serhiy.senyukov@cern.ch; Baudot, J.; Besson, A.; Claus, G.; Cousin, L.; Dorokhov, A.; Dulinski, W.; Goffe, M.; Hu-Guo, C.; Winter, M.

    2013-12-01

    The apparatus of the ALICE experiment at CERN will be upgraded in 2017/18 during the second long shutdown of the LHC (LS2). A major motivation for this upgrade is to extend the physics reach for charmed and beauty particles down to low transverse momenta. This requires a substantial improvement of the spatial resolution and the data rate capability of the ALICE Inner Tracking System (ITS). To achieve this goal, the new ITS will be equipped with 50μm thin CMOS Pixel Sensors (CPS) covering either the three innermost layers or all the 7 layers of the detector. The CPS being developed for the ITS upgrade at IPHC (Strasbourg) is derived from the MIMOSA 28 sensor realised for the STAR-PXL at RHIC in a 0.35μm CMOS process. In order to satisfy the ITS upgrade requirements in terms of readout speed and radiation tolerance, a CMOS process with a reduced feature size and a high resistivity epitaxial layer should be exploited. In this respect, the charged particle detection performance and radiation hardness of the TowerJazz0.18μm CMOS process were studied with the help of the first prototype chip MIMOSA 32. The beam tests performed with negative pions of 120 GeV/c at the CERN-SPS allowed to measure a signal-to-noise ratio (SNR) for the non-irradiated chip in the range between 22 and 32 depending on the pixel design. The chip irradiated with the combined dose of 1 MRad and 10{sup 13}n{sub eq}/cm{sup 2} was observed to yield an SNR ranging between 11 and 23 for coolant temperatures varying from 15 °C to 30 °C. These SNR values were measured to result in particle detection efficiencies above 99.5% and 98% before and after irradiation, respectively. These satisfactory results allow to validate the TowerJazz0.18μm CMOS process for the ALICE ITS upgrade.

  5. CMOS front ends for millimeter wave wireless communication systems

    CERN Document Server

    Deferm, Noël

    2015-01-01

    This book focuses on the development of circuit and system design techniques for millimeter wave wireless communication systems above 90GHz and fabricated in nanometer scale CMOS technologies. The authors demonstrate a hands-on methodology that was applied to design six different chips, in order to overcome a variety of design challenges. Behavior of both actives and passives, and how to design them to achieve high performance is discussed in detail. This book serves as a valuable reference for millimeter wave designers, working at both the transistor level and system level.   Discusses advantages and disadvantages of designing wireless mm-wave communication circuits and systems in CMOS; Analyzes the limitations and pitfalls of building mm-wave circuits in CMOS; Includes mm-wave building block and system design techniques and applies these to 6 different CMOS chips; Provides guidelines for building measurement setups to evaluate high-frequency chips.  

  6. Merits of CMOS/SIMOX technology for low-voltage SRAM macros

    CERN Document Server

    Kumagai, K; Yamada, T; Nakamura, H; Onishi, H; Matsubara, Y; Imai, K; Kurosawa, S

    1999-01-01

    A 128-kbit SRAM (static random access memory) macro with the 0.35 mu m FD (fully-depleted) CMOS/SIMOX (separation by implantation of oxygen) technology has been developed to demonstrate the merits of that technology for low-voltage $9 applications. Its access time at Vdd =1.5 V was comparable with that obtained with the 0.35 mu m standard bulk CMOS technology at Vdd=3.3 V, due to the combination of the small S/D capacitance and the small back-bias effect. As the $9 yield of the 128-kbit SRAM macros was almost the same as the standard bulk CMOS technology, the manufacturability of the 0.35 mu m FD-CMOS/SIMOX technology has also been demonstrated. (7 refs).

  7. Hybrid Josephson-CMOS Memory in Advanced Technologies and Larger Sizes

    International Nuclear Information System (INIS)

    Liu, Q; Van Duzer, T; Fujiwara, K; Yoshikawa, N

    2006-01-01

    Recent progress on demonstrating components of the 64 kb Josephson-CMOS hybrid memory has encouraged exploration of the advancement possible with use of advanced technologies for both the Josephson and CMOS parts of the memory, as well as considerations of the effect of memory size on access time and power dissipation. The simulations to be reported depend on the use of an approximate model for 90 nm CMOS at 4 K. This model is an extension of the one we developed for 0.25 μm CMOS and have already verified. For the Josephson parts, we have chosen 20 kA/cm 2 technology, which was recently demonstrated. The calculations show that power dissipation and access time increase rather slowly with increasing size of the memory

  8. Investigation of srawberry hardening in low temperatures in vitro

    OpenAIRE

    Lukoševičiūtė, Vanda; Rugienius, Rytis; Kavaliauskaitė, Danguolė

    2007-01-01

    Cold resistance of different strawberry varieties in vitro and ability to retain hardening after defrosting and repeated hardening. Phytohormons – gibberellin and abscisic acid added in the growing medium were investigated in Horticulture plant genetic and biotechnology department of LIH. We tried to model common conditions in temperate zone when freeze-thaw cycles often occur during wintertime. For investigation in vitro strawberries for the first time hardened in light at the temperature of...

  9. CMOS Imaging Sensor Technology for Aerial Mapping Cameras

    Science.gov (United States)

    Neumann, Klaus; Welzenbach, Martin; Timm, Martin

    2016-06-01

    In June 2015 Leica Geosystems launched the first large format aerial mapping camera using CMOS sensor technology, the Leica DMC III. This paper describes the motivation to change from CCD sensor technology to CMOS for the development of this new aerial mapping camera. In 2002 the DMC first generation was developed by Z/I Imaging. It was the first large format digital frame sensor designed for mapping applications. In 2009 Z/I Imaging designed the DMC II which was the first digital aerial mapping camera using a single ultra large CCD sensor to avoid stitching of smaller CCDs. The DMC III is now the third generation of large format frame sensor developed by Z/I Imaging and Leica Geosystems for the DMC camera family. It is an evolution of the DMC II using the same system design with one large monolithic PAN sensor and four multi spectral camera heads for R,G, B and NIR. For the first time a 391 Megapixel large CMOS sensor had been used as PAN chromatic sensor, which is an industry record. Along with CMOS technology goes a range of technical benefits. The dynamic range of the CMOS sensor is approx. twice the range of a comparable CCD sensor and the signal to noise ratio is significantly better than with CCDs. Finally results from the first DMC III customer installations and test flights will be presented and compared with other CCD based aerial sensors.

  10. Coating compositions hardenable by ionization beams

    International Nuclear Information System (INIS)

    Chaudhari, D.; Haering, E.; Dobbelstein, A.; Hoselmann, W.

    1976-01-01

    Coating compositions hardenable by ionizing radiation comprise as binding agents a mixture of A. at least 1 unsaturated olefin compound containing urethane groups, and B. at least 1 further unsaturated olefin compound that may be copolymerized. The unsaturated olefin compound A. containing the urethane groups in a reaction product of (a) a compound of the general formula (CHR 1 = CR 2 COOCH 2 CH(OH)CH 2 O CO-)/sub n/R where n is 1 or 2, where R stands for a straight chain or branched alkyl group of valence n, where R 1 is hydrogen, methyl; or the group -COOCH 2 CH(OH)CH 2 OCOR 3 - where R 3 is a monovalent alkyl residue and where R 2 is hydrogen or methyl, and (b) a compound containing at least 1 isocyanate group where the mixture of (A) and (B) may contain conventional additives of the lacquer industry. 6 claims

  11. Work Hardening Behavior of 1020 Steel During Cold-Beating Simulation

    Science.gov (United States)

    CUI, Fengkui; LING, Yuanfei; XUE, Jinxue; LIU, Jia; LIU, Yuhui; LI, Yan

    2017-03-01

    The present research of cold-beating formation mainly focused on roller design and manufacture, kinematics, constitutive relation, metal flow law, thermo-mechanical coupling, surface micro-topography and microstructure evolution. However, the research on surface quality and performance of workpieces in the process of cold-beating is rare. Cold-beating simulation experiment of 1020 steel is conducted at room temperature and strain rates ranging from 2000 to 4000 s-1 base on the law of plastic forming. According to the experimental data, the model of strain hardening of 1020 steel is established, Scanning Electron Microscopy(SEM) is conducted, the mechanism of the work hardening of 1020 steel is clarified by analyzing microstructure variation of 1020 steel. It is found that the strain rate hardening effect of 1020 steel is stronger than the softening effect induced by increasing temperatures, the process of simulation cold-beating cause the grain shape of 1020 steel significant change and microstructure elongate significantly to form a fibrous tissue parallel to the direction of deformation, the higher strain rate, the more obvious grain refinement and the more hardening effect. Additionally, the change law of the work hardening rate is investigated, the relationship between dislocation density and strain, the relationship between work hardening rate and dislocation density is obtained. Results show that the change trend of the work hardening rate of 1020 steel is divided into two stages, the work hardening rate decreases dramatically in the first stage and slowly decreases in the second stage, finally tending toward zero. Dislocation density increases with increasing strain and strain rate, work hardening rate decreases with increasing dislocation density. The research results provide the basis for solving the problem of improving the surface quality and performance of workpieces under cold-beating formation of 1020 steel.

  12. HARDENING OF CRANE RAILS BY PLASMA DISCRETE-TIME SURFACE TREATMENT

    Directory of Open Access Journals (Sweden)

    S. S. Samotugin

    2017-01-01

    Full Text Available Crane wheels and rails are subjected to intensive wear in the process of operation. Therefore, improvement of these components’ performance can be considered a task of high importance. A promising direction in this regard is surface treatment by highly concentrated energy flows such as laser beams or plasma jets. This thesis suggests that the use of gradient plasma surface treatment can improve the performance of crane rails. A research was conducted, according to which hardened zones were deposited on crane rails under different treatment modes. Microhardness was measured both at the surface and in depth using custom-made microsections. The article includes the results of study of plasma surface hardening effects on wear resistance of crane rails. Change of plasma surface treatment parameters (current, plasma torch movement speed, argon gas flow rate allows for desired steel hardness and structure, while the choice of optimal location for hardened zones makes it possible to significantly improve wear resistance and crack resistance. As a result of plasma surface hardening, the fine-grained martensite structure is obtained with mainly lamellar morphology and higher hardness rate compared toinduction hardening or overlaying. Wear test of carbon steels revealed that plasma surfacing reduces abrasive wear rate compared to the irinitial state by 2 to 3 times. Enough sharp boundary between hardened and non-hardened portions has a positive effect on the performance of parts under dynamic loads, contributing to the inhibition of cracks during the transition from solid to a soft metal. For carbon and low alloy rail steels, the properties achieved by plasma surface hardening can effectively replace induction hardening or overlaying.The mode range for plasma surface treatment that allow sobtaining a surface layer with certain operating properties has been determined.

  13. A procedure for the hardening of materials

    International Nuclear Information System (INIS)

    Dearnaley, G.

    1984-01-01

    A method of hardening metals or ceramics which have fcc, bcc or hcp structures in which two species of differing atomic radii are introduced into the material to be hardened. One species is of a size such that it can diffuse through the lattice normally. The other is of a size such that it can diffuse readily only along dislocations. Ion bombardment is the preferred method of introducing the species with different atomic radii. The material to be hardened is subjected to heat and plastic deformation so as to cause a large number of dislocations with jogs. The species meet at the jogs where they interact and are trapped and set up strain fields which prevent further deformation of the material. (author)

  14. An Anisotropic Hardening Model for Springback Prediction

    Science.gov (United States)

    Zeng, Danielle; Xia, Z. Cedric

    2005-08-01

    As more Advanced High-Strength Steels (AHSS) are heavily used for automotive body structures and closures panels, accurate springback prediction for these components becomes more challenging because of their rapid hardening characteristics and ability to sustain even higher stresses. In this paper, a modified Mroz hardening model is proposed to capture realistic Bauschinger effect at reverse loading, such as when material passes through die radii or drawbead during sheet metal forming process. This model accounts for material anisotropic yield surface and nonlinear isotropic/kinematic hardening behavior. Material tension/compression test data are used to accurately represent Bauschinger effect. The effectiveness of the model is demonstrated by comparison of numerical and experimental springback results for a DP600 straight U-channel test.

  15. An Anisotropic Hardening Model for Springback Prediction

    International Nuclear Information System (INIS)

    Zeng, Danielle; Xia, Z. Cedric

    2005-01-01

    As more Advanced High-Strength Steels (AHSS) are heavily used for automotive body structures and closures panels, accurate springback prediction for these components becomes more challenging because of their rapid hardening characteristics and ability to sustain even higher stresses. In this paper, a modified Mroz hardening model is proposed to capture realistic Bauschinger effect at reverse loading, such as when material passes through die radii or drawbead during sheet metal forming process. This model accounts for material anisotropic yield surface and nonlinear isotropic/kinematic hardening behavior. Material tension/compression test data are used to accurately represent Bauschinger effect. The effectiveness of the model is demonstrated by comparison of numerical and experimental springback results for a DP600 straight U-channel test

  16. Cryo-CMOS Circuits and Systems for Quantum Computing Applications

    NARCIS (Netherlands)

    Patra, B; Incandela, R.M.; van Dijk, J.P.G.; Homulle, H.A.R.; Song, Lin; Shahmohammadi, M.; Staszewski, R.B.; Vladimirescu, A.; Babaie, M.; Sebastiano, F.; Charbon, E.E.E.

    2018-01-01

    A fault-tolerant quantum computer with millions of quantum bits (qubits) requires massive yet very precise control electronics for the manipulation and readout of individual qubits. CMOS operating at cryogenic temperatures down to 4 K (cryo-CMOS) allows for closer system integration, thus promising

  17. From VHF to UHF CMOS-MEMS Monolithically Integrated Resonators

    DEFF Research Database (Denmark)

    Teva, Jordi; Berini, Abadal Gabriel; Uranga, A.

    2008-01-01

    This paper presents the design, fabrication and characterization of microresonators exhibiting resonance frequencies in the VHF and UHF bands, fabricated using the available layers of the standard and commercial CMOS technology, AMS-0.35mum. The resonators are released in a post-CMOS process cons...

  18. CMOS-compatible high-voltage integrated circuits

    Energy Technology Data Exchange (ETDEWEB)

    Parpia, Z

    1988-01-01

    Considerable savings in cost and development time can be achieved if high-voltage ICs (HVICs) are fabricated in an existing low-voltage process. In this thesis, the feasibility of fabricating HVICs in a standard CMOS process is investigated. The high-voltage capabilities of an existing 5-{mu}m CMOS process are first studied. High-voltage n- and p-channel transistors with breakdown voltages of 50 and 190 V, respectively, were fabricated without any modifications to the process under consideration. SPICE models for these transistors are developed, and their accuracy verified by comparison with experimental results. In addition, the effect of the interconnect metallization on the high-voltage performance of these devices is also examined. Polysilicon field plates are found to be effective in preventing premature interconnect induced breakdown in these devices. A novel high-voltage transistor structure, the insulated base transistor (IBT), based on a merged MOS-bipolar concept, is proposed and implemented. In order to enhance the high-voltage device capabilities, an improved CMOS-compatible HVIC process using junction isolation is developed.

  19. CMOS Image Sensors: Electronic Camera On A Chip

    Science.gov (United States)

    Fossum, E. R.

    1995-01-01

    Recent advancements in CMOS image sensor technology are reviewed, including both passive pixel sensors and active pixel sensors. On- chip analog to digital converters and on-chip timing and control circuits permit realization of an electronic camera-on-a-chip. Highly miniaturized imaging systems based on CMOS image sensor technology are emerging as a competitor to charge-coupled devices for low cost uses.

  20. ANISOTROPIC STRAIN-HARDENING IN POLYCRYSTALLINE COPPER AND ALUMINUM

    NARCIS (Netherlands)

    HESS, F

    1993-01-01

    A new viscoplastic model for the plastic stress-strain behaviour of f.c.c. metals is presented. In this model the strain hardening results from increasing dislocation densities. The observed stagnation of strain hardening after strain reversals is explained by a lowering of the increase in

  1. Surface hardening of titanium alloys with melting depth controlled by heat sink

    Science.gov (United States)

    Oden, Laurance L.; Turner, Paul C.

    1995-01-01

    A process for forming a hard surface coating on titanium alloys includes providing a piece of material containing titanium having at least a portion of one surface to be hardened. The piece having a portion of a surface to be hardened is contacted on the backside by a suitable heat sink such that the melting depth of said surface to be hardened may be controlled. A hardening material is then deposited as a slurry. Alternate methods of deposition include flame, arc, or plasma spraying, electrodeposition, vapor deposition, or any other deposition method known by those skilled in the art. The surface to be hardened is then selectively melted to the desired depth, dependent on the desired coating thickness, such that a molten pool is formed of the piece surface and the deposited hardening material. Upon cooling a hardened surface is formed.

  2. Depleted fully monolithic CMOS pixel detectors using a column based readout architecture for the ATLAS Inner Tracker upgrade

    Science.gov (United States)

    Wang, T.; Barbero, M.; Berdalovic, I.; Bespin, C.; Bhat, S.; Breugnon, P.; Caicedo, I.; Cardella, R.; Chen, Z.; Degerli, Y.; Egidos, N.; Godiot, S.; Guilloux, F.; Hemperek, T.; Hirono, T.; Krüger, H.; Kugathasan, T.; Hügging, F.; Marin Tobon, C. A.; Moustakas, K.; Pangaud, P.; Schwemling, P.; Pernegger, H.; Pohl, D.-L.; Rozanov, A.; Rymaszewski, P.; Snoeys, W.; Wermes, N.

    2018-03-01

    Depleted monolithic active pixel sensors (DMAPS), which exploit high voltage and/or high resistivity add-ons of modern CMOS technologies to achieve substantial depletion in the sensing volume, have proven to have high radiation tolerance towards the requirements of ATLAS in the high-luminosity LHC era. DMAPS integrating fast readout architectures are currently being developed as promising candidates for the outer pixel layers of the future ATLAS Inner Tracker, which will be installed during the phase II upgrade of ATLAS around year 2025. In this work, two DMAPS prototype designs, named LF-Monopix and TJ-Monopix, are presented. LF-Monopix was fabricated in the LFoundry 150 nm CMOS technology, and TJ-Monopix has been designed in the TowerJazz 180 nm CMOS technology. Both chips employ the same readout architecture, i.e. the column drain architecture, whereas different sensor implementation concepts are pursued. The paper makes a joint description of the two prototypes, so that their technical differences and challenges can be addressed in direct comparison. First measurement results for LF-Monopix will also be shown, demonstrating for the first time a fully functional fast readout DMAPS prototype implemented in the LFoundry technology.

  3. CMOS image sensor-based immunodetection by refractive-index change.

    Science.gov (United States)

    Devadhasan, Jasmine P; Kim, Sanghyo

    2012-01-01

    A complementary metal oxide semiconductor (CMOS) image sensor is an intriguing technology for the development of a novel biosensor. Indeed, the CMOS image sensor mechanism concerning the detection of the antigen-antibody (Ag-Ab) interaction at the nanoscale has been ambiguous so far. To understand the mechanism, more extensive research has been necessary to achieve point-of-care diagnostic devices. This research has demonstrated a CMOS image sensor-based analysis of cardiovascular disease markers, such as C-reactive protein (CRP) and troponin I, Ag-Ab interactions on indium nanoparticle (InNP) substrates by simple photon count variation. The developed sensor is feasible to detect proteins even at a fg/mL concentration under ordinary room light. Possible mechanisms, such as dielectric constant and refractive-index changes, have been studied and proposed. A dramatic change in the refractive index after protein adsorption on an InNP substrate was observed to be a predominant factor involved in CMOS image sensor-based immunoassay.

  4. Research on SEU hardening of heterogeneous Dual-Core SoC

    Science.gov (United States)

    Huang, Kun; Hu, Keliu; Deng, Jun; Zhang, Tao

    2017-08-01

    The implementation of Single-Event Upsets (SEU) hardening has various schemes. However, some of them require a lot of human, material and financial resources. This paper proposes an easy scheme on SEU hardening for Heterogeneous Dual-core SoC (HD SoC) which contains three techniques. First, the automatic Triple Modular Redundancy (TMR) technique is adopted to harden the register heaps of the processor and the instruction-fetching module. Second, Hamming codes are used to harden the random access memory (RAM). Last, a software signature technique is applied to check the programs which are running on CPU. The scheme need not to consume additional resources, and has little influence on the performance of CPU. These technologies are very mature, easy to implement and needs low cost. According to the simulation result, the scheme can satisfy the basic demand of SEU-hardening.

  5. Hardening and softening mechanisms of pearlitic steel wire under torsion

    International Nuclear Information System (INIS)

    Zhao, Tian-Zhang; Zhang, Shi-Hong; Zhang, Guang-Liang; Song, Hong-Wu; Cheng, Ming

    2014-01-01

    Highlights: • Mechanical behavior of pearlitic steel wire is studied using torsion. • Work hardening results from refinement lamellar pearlitic structure. • Softening results from recovery, shear bands and lamellar fragmentations. • A microstructure based analytical flow stress model is established. - Abstract: The mechanical behaviors and microstructure evolution of pearlitic steel wires under monotonic shear deformation have been investigated by a torsion test and a number of electron microscopy techniques including scanning electron microscopy (SEM) and transmission electron microscopy (TEM), with an aim to reveal the softening and hardening mechanisms of a randomly oriented pearlitic structure during a monotonic stain path. Significantly different from the remarkable strain hardening in cold wire drawing, the strain hardening rate during torsion drops to zero quickly after a short hardening stage. The microstructure observations indicate that the inter-lamellar spacing (ILS) decreases and the dislocations accumulate with strain, which leads to hardening of the material. Meanwhile, when the strain is larger than 0.154, the enhancement of dynamic recovery, shear bands (SBs) and cementite fragmentations results in the softening and balances the strain hardening. A microstructure based analytical flow stress model with considering the influence of ILS on the mean free path of dislocations and the softening caused by SBs and cementite fragmentations, has been established and the predicted flow shear curve meets well with the measured curve in the torsion test

  6. CMOS circuit design, layout and simulation

    CERN Document Server

    Baker, R Jacob

    2010-01-01

    The Third Edition of CMOS Circuit Design, Layout, and Simulation continues to cover the practical design of both analog and digital integrated circuits, offering a vital, contemporary view of a wide range of analog/digital circuit blocks including: phase-locked-loops, delta-sigma sensing circuits, voltage/current references, op-amps, the design of data converters, and much more. Regardless of one's integrated circuit (IC) design skill level, this book allows readers to experience both the theory behind, and the hands-on implementation of, complementary metal oxide semiconductor (CMOS) IC design via detailed derivations, discussions, and hundreds of design, layout, and simulation examples.

  7. ALDO: A radiation-tolerant, low-noise, adjustable low drop-out linear regulator in 0.35 μm CMOS technology

    International Nuclear Information System (INIS)

    Carniti, P.; Cassina, L.; Gotti, C.; Maino, M.; Pessina, G.

    2016-01-01

    In this work we present ALDO, an adjustable low drop-out linear regulator designed in AMS 0.35 μm CMOS technology. It is specifically tailored for use in the upgraded LHCb RICH detector in order to improve the power supply noise for the front end readout chip (CLARO). ALDO is designed with radiation-tolerant solutions such as an all-MOS band-gap voltage reference and layout techniques aiming to make it able to operate in harsh environments like High Energy Physics accelerators. It is capable of driving up to 200 mA while keeping an adequate power supply filtering capability in a very wide frequency range from 10 Hz up to 100 MHz. This property allows us to suppress the noise and high frequency spikes that could be generated by a DC/DC regulator, for example. ALDO also shows a very low noise of 11.6 μV RMS in the same frequency range. Its output is protected with over-current and short detection circuits for a safe integration in tightly packed environments. Design solutions and measurements of the first prototype are presented.

  8. ALDO: A radiation-tolerant, low-noise, adjustable low drop-out linear regulator in 0.35 μm CMOS technology

    Energy Technology Data Exchange (ETDEWEB)

    Carniti, P., E-mail: paolo.carniti@mib.infn.it [INFN, Sezione di Milano Bicocca, I-20126 Milano (Italy); Dipartimento di Fisica, Università di Milano Bicocca, I-20126 Milano (Italy); Cassina, L.; Gotti, C.; Maino, M.; Pessina, G. [INFN, Sezione di Milano Bicocca, I-20126 Milano (Italy); Dipartimento di Fisica, Università di Milano Bicocca, I-20126 Milano (Italy)

    2016-07-11

    In this work we present ALDO, an adjustable low drop-out linear regulator designed in AMS 0.35 μm CMOS technology. It is specifically tailored for use in the upgraded LHCb RICH detector in order to improve the power supply noise for the front end readout chip (CLARO). ALDO is designed with radiation-tolerant solutions such as an all-MOS band-gap voltage reference and layout techniques aiming to make it able to operate in harsh environments like High Energy Physics accelerators. It is capable of driving up to 200 mA while keeping an adequate power supply filtering capability in a very wide frequency range from 10 Hz up to 100 MHz. This property allows us to suppress the noise and high frequency spikes that could be generated by a DC/DC regulator, for example. ALDO also shows a very low noise of 11.6 μV RMS in the same frequency range. Its output is protected with over-current and short detection circuits for a safe integration in tightly packed environments. Design solutions and measurements of the first prototype are presented.

  9. ALDO: A radiation-tolerant, low-noise, adjustable low drop-out linear regulator in 0.35 μm CMOS technology

    Science.gov (United States)

    Carniti, P.; Cassina, L.; Gotti, C.; Maino, M.; Pessina, G.

    2016-07-01

    In this work we present ALDO, an adjustable low drop-out linear regulator designed in AMS 0.35 μm CMOS technology. It is specifically tailored for use in the upgraded LHCb RICH detector in order to improve the power supply noise for the front end readout chip (CLARO). ALDO is designed with radiation-tolerant solutions such as an all-MOS band-gap voltage reference and layout techniques aiming to make it able to operate in harsh environments like High Energy Physics accelerators. It is capable of driving up to 200 mA while keeping an adequate power supply filtering capability in a very wide frequency range from 10 Hz up to 100 MHz. This property allows us to suppress the noise and high frequency spikes that could be generated by a DC/DC regulator, for example. ALDO also shows a very low noise of 11.6 μV RMS in the same frequency range. Its output is protected with over-current and short detection circuits for a safe integration in tightly packed environments. Design solutions and measurements of the first prototype are presented.

  10. Neutron-irradiation + helium hardening and embrittlement modeling of 9% Cr-steels in an engineering perspective (HELENA)

    International Nuclear Information System (INIS)

    Chaouadi, Rachid

    2008-01-01

    This report provides a physically-based engineering model to estimate the radiation hardening of 9%Cr-steels under both displacement damage (dpa) and helium. The model is essentially based on the dispersed barrier hardening theory and the dynamic re-solution of helium under displacement cascades. However, a number of assumptions and simplifications were considered to obtain a simple description of irradiation hardening and embrittlement primarily relying on the available experimental data. As a result, two components were basically identified, the dpa component that can be associated with black dots and small loops and the He-component accounting for helium bubbles. The dpa component is strongly dependent on the irradiation temperature and its dependence law was based on a first-order annealing kinetics. The damage accumulation law was also modified to take saturation into account. Finally, the global kinetics of the damage accumulation kept defined, its amplitude is fitted to one experimental condition. The model was rationalized on an experimental database that mainly consists of ∝9%Cr-steels irradiated in the technologically important temperature range of 50 to 600 C up do 50 dpa and with a He-content up to ∝5000 appm, including neutron and proton irradiation as well as implantation. The test temperature effect is taken into account through a normalization procedure based on the change of the Young's modulus and the anelastic deformation that occurs at high temperature. Finally, the hardening-to-embrittlement correlation is obtained using the load diagram approach. Despite the large experimental scatter, inherent to the variety of the materials and irradiation as well as testing conditions, the obtained results are very promising. Improvement of the model performance is still possible by including He-hardening saturation and high temperature softening but unfortunately, at this stage, a number of conflicting experimental data reported in literature should

  11. Neutron-irradiation + helium hardening and embrittlement modeling of 9% Cr-steels in an engineering perspective (HELENA)

    Energy Technology Data Exchange (ETDEWEB)

    Chaouadi, Rachid

    2008-07-01

    This report provides a physically-based engineering model to estimate the radiation hardening of 9%Cr-steels under both displacement damage (dpa) and helium. The model is essentially based on the dispersed barrier hardening theory and the dynamic re-solution of helium under displacement cascades. However, a number of assumptions and simplifications were considered to obtain a simple description of irradiation hardening and embrittlement primarily relying on the available experimental data. As a result, two components were basically identified, the dpa component that can be associated with black dots and small loops and the He-component accounting for helium bubbles. The dpa component is strongly dependent on the irradiation temperature and its dependence law was based on a first-order annealing kinetics. The damage accumulation law was also modified to take saturation into account. Finally, the global kinetics of the damage accumulation kept defined, its amplitude is fitted to one experimental condition. The model was rationalized on an experimental database that mainly consists of {proportional_to}9%Cr-steels irradiated in the technologically important temperature range of 50 to 600 C up do 50 dpa and with a He-content up to {proportional_to}5000 appm, including neutron and proton irradiation as well as implantation. The test temperature effect is taken into account through a normalization procedure based on the change of the Young's modulus and the anelastic deformation that occurs at high temperature. Finally, the hardening-to-embrittlement correlation is obtained using the load diagram approach. Despite the large experimental scatter, inherent to the variety of the materials and irradiation as well as testing conditions, the obtained results are very promising. Improvement of the model performance is still possible by including He-hardening saturation and high temperature softening but unfortunately, at this stage, a number of conflicting experimental data

  12. EFFECT OF HARDENING TIME ON DEFORMATION-STRENGTH INDICATORS OF CONCRETE FOR INJECTION WITH A TWO-STAGE EXPANSION DURING HARDENING IN WATER

    Directory of Open Access Journals (Sweden)

    Tatjana N. Zhilnikova

    2017-01-01

    Full Text Available Abstract. Objectives Concretes for injection with a two-stage expansion are a kind of selfstressing concrete obtained with the use of self-stressing cement.The aim of the work is to study the influence of the duration of aging on the porosity, strength and self-stress of concrete hardening in water, depending on the expansion value at the first stage. At the first stage, the compacted concrete mixture is expanded to ensure complete filling of the formwork space. At the second stage, the hardening concrete expands due to the formation of an increased amount of ettringite. This process is prolonged in time, with the amount of self-stress and strength dependant on the conditions of hardening. Methods  Experimental evaluation of self-stress, strength and porosity of concretes that are permanently hardened in water, under air-moist and air-dry conditions after different expansion at the first stage. The self-stress of cement stone is the result of superposition of two processes: the hardening of the structure due to hydration of silicates and its expansion as a result of hydration of calcium aluminates with the subsequent formation of ettringite. The magnitude of self-stress is determined by the ratio of these two processes. The self-stress of the cement stone changes in a manner similar to the change in its expansion. The stabilisation of expansion is accompanied by stabilisation of self-stress of cement stone. Results  The relationship of self-stress, strength and porosity of concrete for injection with a two-stage expansion on the duration and humidity conditions of hardening, taking into account the conditions of deformation limitation at the first stage, is revealed. Conclusion During prolonged hardening in an aqueous medium, self-stresses are reduced up to 25% with the exception of expansion at the first stage and up to 20% with an increase in volume up to 5% at the first stage. The increase in compressive strength is up to 28% relative to

  13. Effects of total dose of ionizing radiation on integrated circuits

    Energy Technology Data Exchange (ETDEWEB)

    Silveira, Marcilei A.G.; Cirne, K.H.; Gimenez, S.; Santos, R.B.B. [Centro Universitario da FEI, Sao Bernardo do Campo, SP (Brazil); Added, N.; Barbosa, M.D.L.; Medina, N.H.; Tabacniks, M.H. [Universidade de Sao Paulo (IF/USP), SP (Brazil). Inst. de Fisica; Lima, J.A. de; Seixas Junior, L.E.; Melo, W. [Centro de Tecnologia da Informacao Paulo Archer, Sao Paulo, SP (Brazil)

    2011-07-01

    Full text: The study of ionizing radiation effects on materials used in electronic devices is of great relevance for the progress of global technological development and, particularly, it is a necessity in some strategic areas in Brazil. Electronic circuits are strongly influenced by radiation and the need for IC's featuring radiation hardness is largely growing to meet the stringent environment in space electronics. On the other hand, aerospace agencies are encouraging both scientific community and semiconductors industry to develop hardened-by-design components using standard manufacturing processes to achieve maximum performance, while significantly reducing costs. To understand the physical phenomena responsible for changes in devices exposed to ionizing radiation several kinds of radiation should then be considered, among them alpha particles, protons, gamma and X-rays. Radiation effects on the integrated circuits are usually divided into two categories: total ionizing dose (TID), a cumulative dose that shifts the threshold voltage and increases transistor's off-state current; single events effects (SEE), a transient effect which can deposit charge directly into the device and disturb the properties of electronic circuits. TID is one of the most common effects and may generate degradation in some parameters of the CMOS electronic devices, such as the threshold voltage oscillation, increase of the sub-threshold slope and increase of the off-state current. The effects of ionizing radiation are the creation of electron-hole pairs in the oxide layer changing operation mode parameters of the electronic device. Indirectly, there will be also changes in the device due to the formation of secondary electrons from the interaction of electromagnetic radiation with the material, since the charge carriers can be trapped both in the oxide layer and in the interface with the oxide. In this work we have investigated the behavior of MOSFET devices fabricated with

  14. Photon detection with CMOS sensors for fast imaging

    International Nuclear Information System (INIS)

    Baudot, J.; Dulinski, W.; Winter, M.; Barbier, R.; Chabanat, E.; Depasse, P.; Estre, N.

    2009-01-01

    Pixel detectors employed in high energy physics aim to detect single minimum ionizing particle with micrometric positioning resolution. Monolithic CMOS sensors succeed in this task thanks to a low equivalent noise charge per pixel of around 10 to 15 e - , and a pixel pitch varying from 10 to a few 10 s of microns. Additionally, due to the possibility for integration of some data treatment in the sensor itself, readout times of 100μs have been reached for 100 kilo-pixels sensors. These aspects of CMOS sensors are attractive for applications in photon imaging. For X-rays of a few keV, the efficiency is limited to a few % due to the thin sensitive volume. For visible photons, the back-thinned version of CMOS sensor is sensitive to low intensity sources, of a few hundred photons. When a back-thinned CMOS sensor is combined with a photo-cathode, a new hybrid detector results (EBCMOS) and operates as a fast single photon imager. The first EBCMOS was produced in 2007 and demonstrated single photon counting with low dark current capability in laboratory conditions. It has been compared, in two different biological laboratories, with existing CCD-based 2D cameras for fluorescence microscopy. The current EBCMOS sensitivity and frame rate is comparable to existing EMCCDs. On-going developments aim at increasing this frame rate by, at least, an order of magnitude. We report in conclusion, the first test of a new CMOS sensor, LUCY, which reaches 1000 frames per second.

  15. Contact CMOS imaging of gaseous oxygen sensor array.

    Science.gov (United States)

    Daivasagaya, Daisy S; Yao, Lei; Yi Yung, Ka; Hajj-Hassan, Mohamad; Cheung, Maurice C; Chodavarapu, Vamsy P; Bright, Frank V

    2011-10-01

    We describe a compact luminescent gaseous oxygen (O 2 ) sensor microsystem based on the direct integration of sensor elements with a polymeric optical filter and placed on a low power complementary metal-oxide semiconductor (CMOS) imager integrated circuit (IC). The sensor operates on the measurement of excited-state emission intensity of O 2 -sensitive luminophore molecules tris(4,7-diphenyl-1,10-phenanthroline) ruthenium(II) ([Ru(dpp) 3 ] 2+ ) encapsulated within sol-gel derived xerogel thin films. The polymeric optical filter is made with polydimethylsiloxane (PDMS) that is mixed with a dye (Sudan-II). The PDMS membrane surface is molded to incorporate arrays of trapezoidal microstructures that serve to focus the optical sensor signals on to the imager pixels. The molded PDMS membrane is then attached with the PDMS color filter. The xerogel sensor arrays are contact printed on top of the PDMS trapezoidal lens-like microstructures. The CMOS imager uses a 32 × 32 (1024 elements) array of active pixel sensors and each pixel includes a high-gain phototransistor to convert the detected optical signals into electrical currents. Correlated double sampling circuit, pixel address, digital control and signal integration circuits are also implemented on-chip. The CMOS imager data is read out as a serial coded signal. The CMOS imager consumes a static power of 320 µW and an average dynamic power of 625 µW when operating at 100 Hz sampling frequency and 1.8 V DC. This CMOS sensor system provides a useful platform for the development of miniaturized optical chemical gas sensors.

  16. Single-chip RF communications systems in CMOS

    DEFF Research Database (Denmark)

    Olesen, Ole

    1997-01-01

    The paper describes the state of the art of the Nordic mobile communication project ConFront. This is a cooperation project with 3 Nordic universities and local industry. The ultimate goal is to make a CMOS one-chip mobile phone.......The paper describes the state of the art of the Nordic mobile communication project ConFront. This is a cooperation project with 3 Nordic universities and local industry. The ultimate goal is to make a CMOS one-chip mobile phone....

  17. CMOS sigma-delta converters practical design guide

    CERN Document Server

    De la Rosa, Jose M

    2013-01-01

    A comprehensive overview of Sigma-Delta Analog-to-Digital Converters (ADCs) and a practical guide to their design in nano-scale CMOS for optimal performance. This book presents a systematic and comprehensive compilation of sigma-delta converter operating principles, the new advances in architectures and circuits, design methodologies and practical considerations - going from system-level specifications to silicon integration, packaging and measurements, with emphasis on nanometer CMOS implementation. The book emphasizes practical design issues - from high-level behavioural modelling i

  18. Hardening of single crystals of magnesium by low neutron doses at 77 K

    International Nuclear Information System (INIS)

    Gonzalez, H.C.

    1984-01-01

    Radiation hardening in Mg single crystals at 77 K is studied with a microtensile machine operating in-situ in the CNEA reactor facility RA1. Experimental results show that the dose dependence of the yield stress is similar to that previously observed in irradiated Cu and Zn. The radiation-induced yield stress, due to the presence of radiation obstacles operating alone, increases according to a 0.5 power law. It adds algebraically to the athermal component of the initial yield stress, but is not exactly additive to the other thermally activated mechanisms. For doses higher than 4.5 x 10 16 neutrons/cm 2 , a strong instability in the deformation is observed. Post irradiation experiments in tensile tests performed with a hard machine show a continuous stress drop. This effect is attributed to the dislocation channeling phenomenon which takes place during the tensile test. (author)

  19. High-Voltage-Input Level Translator Using Standard CMOS

    Science.gov (United States)

    Yager, Jeremy A.; Mojarradi, Mohammad M.; Vo, Tuan A.; Blalock, Benjamin J.

    2011-01-01

    proposed integrated circuit would translate (1) a pair of input signals having a low differential potential and a possibly high common-mode potential into (2) a pair of output signals having the same low differential potential and a low common-mode potential. As used here, "low" and "high" refer to potentials that are, respectively, below or above the nominal supply potential (3.3 V) at which standard complementary metal oxide/semiconductor (CMOS) integrated circuits are designed to operate. The input common-mode potential could lie between 0 and 10 V; the output common-mode potential would be 2 V. This translation would make it possible to process the pair of signals by use of standard 3.3-V CMOS analog and/or mixed-signal (analog and digital) circuitry on the same integrated-circuit chip. A schematic of the circuit is shown in the figure. Standard 3.3-V CMOS circuitry cannot withstand input potentials greater than about 4 V. However, there are many applications that involve low-differential-potential, high-common-mode-potential input signal pairs and in which standard 3.3-V CMOS circuitry, which is relatively inexpensive, would be the most appropriate circuitry for performing other functions on the integrated-circuit chip that handles the high-potential input signals. Thus, there is a need to combine high-voltage input circuitry with standard low-voltage CMOS circuitry on the same integrated-circuit chip. The proposed circuit would satisfy this need. In the proposed circuit, the input signals would be coupled into both a level-shifting pair and a common-mode-sensing pair of CMOS transistors. The output of the level-shifting pair would be fed as input to a differential pair of transistors. The resulting differential current output would pass through six standoff transistors to be mirrored into an output branch by four heterojunction bipolar transistors. The mirrored differential current would be converted back to potential by a pair of diode-connected transistors

  20. CMOS monolithic active pixel sensors for high energy physics

    Energy Technology Data Exchange (ETDEWEB)

    Snoeys, W., E-mail: walter.snoeys@cern.ch

    2014-11-21

    Monolithic pixel detectors integrating sensor matrix and readout in one piece of silicon are only now starting to make their way into high energy physics. Two major requirements are radiation tolerance and low power consumption. For the most extreme radiation levels, signal charge has to be collected by drift from a depletion layer onto a designated collection electrode without losing the signal charge elsewhere in the in-pixel circuit. Low power consumption requires an optimization of Q/C, the ratio of the collected signal charge over the input capacitance [1]. Some solutions to combine sufficient Q/C and collection by drift require exotic fabrication steps. More conventional solutions up to now require a simple in-pixel readout circuit. Both high voltage CMOS technologies and Monolithic Active Pixel Sensors (MAPS) technologies with high resistivity epitaxial layers offer high voltage diodes. The choice between the two is not fundamental but more a question of how much depletion can be reached and also of availability and cost. This paper tries to give an overview.