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Sample records for programmable microfluidic processor

  1. Probabilistic programmable quantum processors

    International Nuclear Information System (INIS)

    Buzek, V.; Ziman, M.; Hillery, M.

    2004-01-01

    We analyze how to improve performance of probabilistic programmable quantum processors. We show how the probability of success of the probabilistic processor can be enhanced by using the processor in loops. In addition, we show that an arbitrary SU(2) transformations of qubits can be encoded in program state of a universal programmable probabilistic quantum processor. The probability of success of this processor can be enhanced by a systematic correction of errors via conditional loops. Finally, we show that all our results can be generalized also for qudits. (Abstract Copyright [2004], Wiley Periodicals, Inc.)

  2. A High-Voltage Integrated Circuit Engine for a Dielectrophoresis-based Programmable Micro-Fluidic Processor

    Science.gov (United States)

    Current, K. Wayne; Yuk, Kelvin; McConaghy, Charles; Gascoyne, Peter R. C.; Schwartz, Jon A.; Vykoukal, Jody V.; Andrews, Craig

    2010-01-01

    A high-voltage (HV) integrated circuit has been demonstrated to transport droplets on programmable paths across its coated surface. This chip is the engine for a dielectrophoresis (DEP)-based micro-fluidic lab-on-a-chip system. This chip creates DEP forces that move and help inject droplets. Electrode excitation voltage and frequency are variable. With the electrodes driven with a 100V peak-to-peak periodic waveform, the maximum high-voltage electrode waveform frequency is about 200Hz. Data communication rate is variable up to 250kHz. This demonstration chip has a 32×32 array of nominally 100V electrode drivers. It is fabricated in a 130V SOI CMOS fabrication technology, dissipates a maximum of 1.87W, and is about 10.4 mm × 8.2 mm. PMID:23989241

  3. Architectural design and analysis of a programmable image processor

    International Nuclear Information System (INIS)

    Siyal, M.Y.; Chowdhry, B.S.; Rajput, A.Q.K.

    2003-01-01

    In this paper we present an architectural design and analysis of a programmable image processor, nicknamed Snake. The processor was designed with a high degree of parallelism to speed up a range of image processing operations. Data parallelism found in array processors has been included into the architecture of the proposed processor. The implementation of commonly used image processing algorithms and their performance evaluation are also discussed. The performance of Snake is also compared with other types of processor architectures. (author)

  4. Digitally programmable microfluidic automaton for multiscale combinatorial mixing and sample processing†

    Science.gov (United States)

    Jensen, Erik C.; Stockton, Amanda M.; Chiesl, Thomas N.; Kim, Jungkyu; Bera, Abhisek; Mathies, Richard A.

    2013-01-01

    A digitally programmable microfluidic Automaton consisting of a 2-dimensional array of pneumatically actuated microvalves is programmed to perform new multiscale mixing and sample processing operations. Large (µL-scale) volume processing operations are enabled by precise metering of multiple reagents within individual nL-scale valves followed by serial repetitive transfer to programmed locations in the array. A novel process exploiting new combining valve concepts is developed for continuous rapid and complete mixing of reagents in less than 800 ms. Mixing, transfer, storage, and rinsing operations are implemented combinatorially to achieve complex assay automation protocols. The practical utility of this technology is demonstrated by performing automated serial dilution for quantitative analysis as well as the first demonstration of on-chip fluorescent derivatization of biomarker targets (carboxylic acids) for microchip capillary electrophoresis on the Mars Organic Analyzer. A language is developed to describe how unit operations are combined to form a microfluidic program. Finally, this technology is used to develop a novel microfluidic 6-sample processor for combinatorial mixing of large sets (>26 unique combinations) of reagents. The digitally programmable microfluidic Automaton is a versatile programmable sample processor for a wide range of process volumes, for multiple samples, and for different types of analyses. PMID:23172232

  5. Reconfigurable lattice mesh designs for programmable photonic processors.

    Science.gov (United States)

    Pérez, Daniel; Gasulla, Ivana; Capmany, José; Soref, Richard A

    2016-05-30

    We propose and analyse two novel mesh design geometries for the implementation of tunable optical cores in programmable photonic processors. These geometries are the hexagonal and the triangular lattice. They are compared here to a previously proposed square mesh topology in terms of a series of figures of merit that account for metrics that are relevant to on-chip integration of the mesh. We find that that the hexagonal mesh is the most suitable option of the three considered for the implementation of the reconfigurable optical core in the programmable processor.

  6. A programmable systolic trigger processor for FERA bus data

    International Nuclear Information System (INIS)

    Appelquist, G.; Hovander, B.; Sellden, B.; Bohm, C.

    1992-09-01

    A generic CAMAC based trigger processor module for fast processing of large amounts of ADC data, has been designed. This module has been realised using complex programmable gate arrays (LCAs from XILINX). The gate arrays have been connected to memories and multipliers in such a way that different gate array configurations can cover a wide range of module applications. Using this module, it is possible to construct complex trigger processors. The module uses both the fast ECL FERA bus and the CAMAC bus for inputs and outputs. The latter, however, is primarily used for set-up and control but may also be used for data output. Large numbers of ADCs can be served by a hierarchical arrangement of trigger processor modules, processing ADC data with pipe-line arithmetics producing the final result at the apex of the pyramid. The trigger decision will be transmitted to the data acquisition system via a logic signal while numeric results may be extracted by the CAMAC controller. The trigger processor was originally developed for the proposed neutral particle search experiment at CERN, NUMASS. There it was designed to serve as a second level trigger processor. It was required to correct all ADC raw data for efficiency and pedestal, calculate the total calorimeter energy, obtain the optimal time of flight data and calculate the particle mass. A suitable mass cut would then deliver the trigger decision. More complex triggers were also considered. (au)

  7. Probabilistic programmable quantum processors with multiple copies of program states

    International Nuclear Information System (INIS)

    Brazier, Adam; Buzek, Vladimir; Knight, Peter L.

    2005-01-01

    We examine the execution of general U(1) transformations on programmable quantum processors. We show that, with only the minimal assumption of availability of copies of the 1-qubit program state, the apparent advantage of existing schemes proposed by G. Vidal et al. [Phys. Rev. Lett. 88, 047905 (2002)] and M. Hillery et al. [Phys. Rev. A 65, 022301 (2003)] to execute a general U(1) transformation with greater probability using complex program states appears not to hold

  8. Construction of programmable interconnected 3D microfluidic networks

    International Nuclear Information System (INIS)

    Hunziker, Patrick R; Wolf, Marc P; Wang, Xueya; Zhang, Bei; Marsch, Stephan; Salieb-Beugelaar, Georgette B

    2015-01-01

    Microfluidic systems represent a key-enabling platform for novel diagnostic tools for use at the point-of-care in clinical contexts as well as for evolving single cell diagnostics. The design of 3D microfluidic systems is an active field of development, but construction of true interconnected 3D microfluidic networks is still a challenge, in particular when the goal is rapid prototyping, accurate design and flexibility. We report a novel approach for the construction of programmable 3D microfluidic systems consisting of modular 3D template casting of interconnected threads to allow user-programmable flow paths and examine its structural characteristics and its modular function. To overcome problems with thread template casting reported in the literature, low-surface-energy polymer threads were used, that allow solvent-free production. Connected circular channels with excellent roundness and low diameter variability were created. Variable channel termination allowed programming a flow path on-the-fly, thus rendering the resulting 3D microfluidic systems highly customizable even after production. Thus, construction of programmable/reprogrammable fully 3D microfluidic systems by template casting of a network of interconnecting threads is feasible, leads to high-quality and highly reproducible, complex 3D geometries. (paper)

  9. Towards a programmable magnetic bead microarray in a microfluidic channel

    DEFF Research Database (Denmark)

    Smistrup, Kristian; Bruus, Henrik; Hansen, Mikkel Fougt

    2007-01-01

    to use larger currents and obtain forces of longer range than from thin current lines at a given power limit. Guiding of magnetic beads in the hybrid magnetic separator and the construction of a programmable microarray of magnetic beads in the microfluidic channel by hydrodynamic focusing is presented....

  10. A programmable two-qubit quantum processor in silicon.

    Science.gov (United States)

    Watson, T F; Philips, S G J; Kawakami, E; Ward, D R; Scarlino, P; Veldhorst, M; Savage, D E; Lagally, M G; Friesen, Mark; Coppersmith, S N; Eriksson, M A; Vandersypen, L M K

    2018-03-29

    Now that it is possible to achieve measurement and control fidelities for individual quantum bits (qubits) above the threshold for fault tolerance, attention is moving towards the difficult task of scaling up the number of physical qubits to the large numbers that are needed for fault-tolerant quantum computing. In this context, quantum-dot-based spin qubits could have substantial advantages over other types of qubit owing to their potential for all-electrical operation and ability to be integrated at high density onto an industrial platform. Initialization, readout and single- and two-qubit gates have been demonstrated in various quantum-dot-based qubit representations. However, as seen with small-scale demonstrations of quantum computers using other types of qubit, combining these elements leads to challenges related to qubit crosstalk, state leakage, calibration and control hardware. Here we overcome these challenges by using carefully designed control techniques to demonstrate a programmable two-qubit quantum processor in a silicon device that can perform the Deutsch-Josza algorithm and the Grover search algorithm-canonical examples of quantum algorithms that outperform their classical analogues. We characterize the entanglement in our processor by using quantum-state tomography of Bell states, measuring state fidelities of 85-89 per cent and concurrences of 73-82 per cent. These results pave the way for larger-scale quantum computers that use spins confined to quantum dots.

  11. A programmable two-qubit quantum processor in silicon

    Science.gov (United States)

    Watson, T. F.; Philips, S. G. J.; Kawakami, E.; Ward, D. R.; Scarlino, P.; Veldhorst, M.; Savage, D. E.; Lagally, M. G.; Friesen, Mark; Coppersmith, S. N.; Eriksson, M. A.; Vandersypen, L. M. K.

    2018-03-01

    Now that it is possible to achieve measurement and control fidelities for individual quantum bits (qubits) above the threshold for fault tolerance, attention is moving towards the difficult task of scaling up the number of physical qubits to the large numbers that are needed for fault-tolerant quantum computing. In this context, quantum-dot-based spin qubits could have substantial advantages over other types of qubit owing to their potential for all-electrical operation and ability to be integrated at high density onto an industrial platform. Initialization, readout and single- and two-qubit gates have been demonstrated in various quantum-dot-based qubit representations. However, as seen with small-scale demonstrations of quantum computers using other types of qubit, combining these elements leads to challenges related to qubit crosstalk, state leakage, calibration and control hardware. Here we overcome these challenges by using carefully designed control techniques to demonstrate a programmable two-qubit quantum processor in a silicon device that can perform the Deutsch–Josza algorithm and the Grover search algorithm—canonical examples of quantum algorithms that outperform their classical analogues. We characterize the entanglement in our processor by using quantum-state tomography of Bell states, measuring state fidelities of 85–89 per cent and concurrences of 73–82 per cent. These results pave the way for larger-scale quantum computers that use spins confined to quantum dots.

  12. Power estimation on functional level for programmable processors

    Directory of Open Access Journals (Sweden)

    M. Schneider

    2004-01-01

    Full Text Available In diesem Beitrag werden verschiedene Ansätze zur Verlustleistungsschätzung von programmierbaren Prozessoren vorgestellt und bezüglich ihrer Übertragbarkeit auf moderne Prozessor-Architekturen wie beispielsweise Very Long Instruction Word (VLIW-Architekturen bewertet. Besonderes Augenmerk liegt hierbei auf dem Konzept der sogenannten Functional-Level Power Analysis (FLPA. Dieser Ansatz basiert auf der Einteilung der Prozessor-Architektur in funktionale Blöcke wie beispielsweise Processing-Unit, Clock-Netzwerk, interner Speicher und andere. Die Verlustleistungsaufnahme dieser Bl¨ocke wird parameterabhängig durch arithmetische Modellfunktionen beschrieben. Durch automatisierte Analyse von Assemblercodes des zu schätzenden Systems mittels eines Parsers können die Eingangsparameter wie beispielsweise der erzielte Parallelitätsgrad oder die Art des Speicherzugriffs gewonnen werden. Dieser Ansatz wird am Beispiel zweier moderner digitaler Signalprozessoren durch eine Vielzahl von Basis-Algorithmen der digitalen Signalverarbeitung evaluiert. Die ermittelten Schätzwerte für die einzelnen Algorithmen werden dabei mit physikalisch gemessenen Werten verglichen. Es ergibt sich ein sehr kleiner maximaler Schätzfehler von 3%. In this contribution different approaches for power estimation for programmable processors are presented and evaluated concerning their capability to be applied to modern digital signal processor architectures like e.g. Very Long InstructionWord (VLIW -architectures. Special emphasis will be laid on the concept of so-called Functional-Level Power Analysis (FLPA. This approach is based on the separation of the processor architecture into functional blocks like e.g. processing unit, clock network, internal memory and others. The power consumption of these blocks is described by parameter dependent arithmetic model functions. By application of a parser based automized analysis of assembler codes of the systems to be estimated

  13. Power estimation on functional level for programmable processors

    Science.gov (United States)

    Schneider, M.; Blume, H.; Noll, T. G.

    2004-05-01

    In diesem Beitrag werden verschiedene Ansätze zur Verlustleistungsschätzung von programmierbaren Prozessoren vorgestellt und bezüglich ihrer Übertragbarkeit auf moderne Prozessor-Architekturen wie beispielsweise Very Long Instruction Word (VLIW)-Architekturen bewertet. Besonderes Augenmerk liegt hierbei auf dem Konzept der sogenannten Functional-Level Power Analysis (FLPA). Dieser Ansatz basiert auf der Einteilung der Prozessor-Architektur in funktionale Blöcke wie beispielsweise Processing-Unit, Clock-Netzwerk, interner Speicher und andere. Die Verlustleistungsaufnahme dieser Bl¨ocke wird parameterabhängig durch arithmetische Modellfunktionen beschrieben. Durch automatisierte Analyse von Assemblercodes des zu schätzenden Systems mittels eines Parsers können die Eingangsparameter wie beispielsweise der erzielte Parallelitätsgrad oder die Art des Speicherzugriffs gewonnen werden. Dieser Ansatz wird am Beispiel zweier moderner digitaler Signalprozessoren durch eine Vielzahl von Basis-Algorithmen der digitalen Signalverarbeitung evaluiert. Die ermittelten Schätzwerte für die einzelnen Algorithmen werden dabei mit physikalisch gemessenen Werten verglichen. Es ergibt sich ein sehr kleiner maximaler Schätzfehler von 3%. In this contribution different approaches for power estimation for programmable processors are presented and evaluated concerning their capability to be applied to modern digital signal processor architectures like e.g. Very Long InstructionWord (VLIW) -architectures. Special emphasis will be laid on the concept of so-called Functional-Level Power Analysis (FLPA). This approach is based on the separation of the processor architecture into functional blocks like e.g. processing unit, clock network, internal memory and others. The power consumption of these blocks is described by parameter dependent arithmetic model functions. By application of a parser based automized analysis of assembler codes of the systems to be estimated the input

  14. 3D-Flow processor for a programmable Level-1 trigger (feasibility study)

    International Nuclear Information System (INIS)

    Crosetto, D.

    1992-10-01

    A feasibility study has been made to use the 3D-Flow processor in a pipelined programmable parallel processing architecture to identify particles such as electrons, jets, muons, etc., in high-energy physics experiments

  15. Plastic-Based Structurally Programmable Microfluidic Biochips for Clinical Diagnostics

    National Research Council Canada - National Science Library

    Ahn, Chong H; Nevin, Joseph H; Beaucage, Gregory

    2005-01-01

    ... and reliable measurements of metabolic parameters from a human body with minimum invasion. The fully integrated disposable biochip is capable of precise volume control with smart microfluidic manipulation without costly on-chip microfluidic components...

  16. Rapid prototyping and evaluation of programmable SIMD SDR processors in LISA

    Science.gov (United States)

    Chen, Ting; Liu, Hengzhu; Zhang, Botao; Liu, Dongpei

    2013-03-01

    With the development of international wireless communication standards, there is an increase in computational requirement for baseband signal processors. Time-to-market pressure makes it impossible to completely redesign new processors for the evolving standards. Due to its high flexibility and low power, software defined radio (SDR) digital signal processors have been proposed as promising technology to replace traditional ASIC and FPGA fashions. In addition, there are large numbers of parallel data processed in computation-intensive functions, which fosters the development of single instruction multiple data (SIMD) architecture in SDR platform. So a new way must be found to prototype the SDR processors efficiently. In this paper we present a bit-and-cycle accurate model of programmable SIMD SDR processors in a machine description language LISA. LISA is a language for instruction set architecture which can gain rapid model at architectural level. In order to evaluate the availability of our proposed processor, three common baseband functions, FFT, FIR digital filter and matrix multiplication have been mapped on the SDR platform. Analytical results showed that the SDR processor achieved the maximum of 47.1% performance boost relative to the opponent processor.

  17. Framework Programmable Platform for the advanced software development workstation: Framework processor design document

    Science.gov (United States)

    Mayer, Richard J.; Blinn, Thomas M.; Mayer, Paula S. D.; Ackley, Keith A.; Crump, Wes; Sanders, Les

    1991-01-01

    The design of the Framework Processor (FP) component of the Framework Programmable Software Development Platform (FFP) is described. The FFP is a project aimed at combining effective tool and data integration mechanisms with a model of the software development process in an intelligent integrated software development environment. Guided by the model, this Framework Processor will take advantage of an integrated operating environment to provide automated support for the management and control of the software development process so that costly mistakes during the development phase can be eliminated.

  18. Supertracker: A Programmable Parallel Pipeline Arithmetic Processor For Auto-Cueing Target Processing

    Science.gov (United States)

    Mack, Harold; Reddi, S. S.

    1980-04-01

    Supertracker represents a programmable parallel pipeline computer architecture that has been designed to meet the real time image processing requirements of auto-cueing target data processing. The prototype bread-board currently under development will be designed to perform input video preprocessing and processing for 525-line and 875-line TV formats FLIR video, automatic display gain and contrast control, and automatic target cueing, classification, and tracking. The video preprocessor is capable of performing operations full frames of video data in real time, e.g., frame integration, storage, 3 x 3 convolution, and neighborhood processing. The processor architecture is being implemented using bit-slice microprogrammable arithmetic processors, operating in parallel. Each processor is capable of up to 20 million operations per second. Multiple frame memories are used for additional flexibility.

  19. Preliminary design of an advanced programmable digital filter network for large passive acoustic ASW systems. [Parallel processor

    Energy Technology Data Exchange (ETDEWEB)

    McWilliams, T.; Widdoes, Jr., L. C.; Wood, L.

    1976-09-30

    The design of an extremely high performance programmable digital filter of novel architecture, the LLL Programmable Digital Filter, is described. The digital filter is a high-performance multiprocessor having general purpose applicability and high programmability; it is extremely cost effective either in a uniprocessor or a multiprocessor configuration. The architecture and instruction set of the individual processor was optimized with regard to the multiple processor configuration. The optimal structure of a parallel processing system was determined for addressing the specific Navy application centering on the advanced digital filtering of passive acoustic ASW data of the type obtained from the SOSUS net. 148 figures. (RWR)

  20. Programmable level-1 trigger with 3D-Flow processor array

    International Nuclear Information System (INIS)

    Crosetto, D.

    1994-01-01

    The 3D-Flow parallel processing system is a new concept in processor architecture, system architecture, and assembly architecture. Compared to the electronics used in present systems, this approach reduces the cost and complexity of the hardware and allows easy assembly, disassembly, incremental upgrading, and maintenance of different interconnection topologies. The 3D-Flow parallel-processing system benefits high energy physics (HEP) by allowing: (1) common less costly hardware to be used in different experiments. (2) new uses of existing installations. (3) tuning of trigger based on the first analyzed data, and (4) selection of desired events directly from raw data. The goal of this parallel-processing architecture is to acquire multiple data in parallel (up to 100 million frames per second) and to process them at high speed, accomplishing digital filtering on the input data, pattern recognition (particle identification), data moving, and data formatting. The main features of the system are its programmability, scalability, high-speed communication, and low cost. The compactness of the 3D-Flow parallel-processing system in concert with the processor architecture allows processor interconnections to be mapped into the geometry of sensors (detectors in HEP) without large interconnection signal delay, enabling real-time pattern recognition. The overall 3D-Flow project has passed a major design review at Fermilab (Reviewers included experts in computers, triggering, system assembly, and electronics)

  1. A High-Voltage SOI CMOS Exciter Chip for a Programmable Fluidic Processor System.

    Science.gov (United States)

    Current, K W; Yuk, K; McConaghy, C; Gascoyne, P R C; Schwartz, J A; Vykoukal, J V; Andrews, C

    2007-06-01

    A high-voltage (HV) integrated circuit has been demonstrated to transport fluidic droplet samples on programmable paths across the array of driving electrodes on its hydrophobically coated surface. This exciter chip is the engine for dielectrophoresis (DEP)-based micro-fluidic lab-on-a-chip systems, creating field excitations that inject and move fluidic droplets onto and about the manipulation surface. The architecture of this chip is expandable to arrays of N X N identical HV electrode driver circuits and electrodes. The exciter chip is programmable in several senses. The routes of multiple droplets may be set arbitrarily within the bounds of the electrode array. The electrode excitation waveform voltage amplitude, phase, and frequency may be adjusted based on the system configuration and the signal required to manipulate a particular fluid droplet composition. The voltage amplitude of the electrode excitation waveform can be set from the minimum logic level up to the maximum limit of the breakdown voltage of the fabrication technology. The frequency of the electrode excitation waveform can also be set independently of its voltage, up to a maximum depending upon the type of droplets that must be driven. The exciter chip can be coated and its oxide surface used as the droplet manipulation surface or it can be used with a top-mounted, enclosed fluidic chamber consisting of a variety of materials. The HV capability of the exciter chip allows the generated DEP forces to penetrate into the enclosed chamber region and an adjustable voltage amplitude can accommodate a variety of chamber floor thicknesses. This demonstration exciter chip has a 32 x 32 array of nominally 100 V electrode drivers that are individually programmable at each time point in the procedure to either of two phases: 0deg and 180deg with respect to the reference clock. For this demonstration chip, while operating the electrodes with a 100-V peak-to-peak periodic waveform, the maximum HV electrode

  2. A self-contained, programmable microfluidic cell culture system with real-time microscopy access

    DEFF Research Database (Denmark)

    Skafte-Pedersen, Peder; Hemmingsen, Mette; Sabourin, David

    2011-01-01

    Utilizing microfluidics is a promising way for increasing the throughput and automation of cell biology research. We present a complete self-contained system for automated cell culture and experiments with real-time optical read-out. The system offers a high degree of user-friendliness, stability...... enables the system to perform parallel, programmable and multiconditional assays on a single chip. A modular approach provides system versatility and allows many different chips to be used dependent upon application. We validate the system's performance by demonstrating on-chip passive switching...... and mixing by peristaltically driven flows. Applicability for biological assays is demonstrated by on-chip cell culture including on-chip transfection and temporally programmable gene expression....

  3. Evaluation of the Leon3 soft-core processor within a Xilinx radiation-hardened field-programmable gate array.

    Energy Technology Data Exchange (ETDEWEB)

    Learn, Mark Walter

    2012-01-01

    The purpose of this document is to summarize the work done to evaluate the performance of the Leon3 soft-core processor in a radiation environment while instantiated in a radiation-hardened static random-access memory based field-programmable gate array. This evaluation will look at the differences between two soft-core processors: the open-source Leon3 core and the fault-tolerant Leon3 core. Radiation testing of these two cores was conducted at the Texas A&M University Cyclotron facility and Lawrence Berkeley National Laboratory. The results of these tests are included within the report along with designs intended to improve the mitigation of the open-source Leon3. The test setup used for evaluating both versions of the Leon3 is also included within this document.

  4. The LASS hardware processor

    International Nuclear Information System (INIS)

    Kunz, P.F.

    1976-01-01

    The problems of data analysis with hardware processors are reviewed and a description is given of a programmable processor. This processor, the 168/E, has been designed for use in the LASS multi-processor system; it has an execution speed comparable to the IBM 370/168 and uses the subset of IBM 370 instructions appropriate to the LASS analysis task. (Auth.)

  5. A Fastbus module for trigger applications based on a digital signal processor and on programmable gate arrays

    International Nuclear Information System (INIS)

    Battaiotto, P.; Colavita, A.; Fratnik, F.; Lanceri, L.; Udine Univ.

    1991-01-01

    The new generation of DSP microprocessors based on RISC and Harvard-like architectures can conveniently take the place of specially built processors in fast trigger circuits for high-energy physics experiments. Presently available programmable gate arrays are well matched to them in speed and contribute to simplify the design of trigger circuits. Using these components, we designed and constructed a Fastbus module. We describe an application for the total-energy trigger of DELPHI, performing the readout of digitized calorimeter trigger data and some simple computations in less than 3 μs. (orig.)

  6. Implementation of an EPICS IOC on an Embedded Soft Core Processor Using Field Programmable Gate Arrays

    International Nuclear Information System (INIS)

    Douglas Curry; Alicia Hofler; Hai Dong; Trent Allison; J. Hovater; Kelly Mahoney

    2005-01-01

    At Jefferson Lab, we have been evaluating soft core processors running an EPICS IOC over μClinux on our custom hardware. A soft core processor is a flexible CPU architecture that is configured in the FPGA as opposed to a hard core processor which is fixed in silicon. Combined with an on-board Ethernet port, the technology incorporates the IOC and digital control hardware within a single FPGA. By eliminating the general purpose computer IOC, the designer is no longer tied to a specific platform, e.g. PC, VME, or VXI, to serve as the intermediary between the high level controls and the field hardware. This paper will discuss the design and development process as well as specific applications for JLab's next generation low-level RF controls and Machine Protection Systems

  7. Microlens array processor with programmable weight mask and direct optical input

    Science.gov (United States)

    Schmid, Volker R.; Lueder, Ernst H.; Bader, Gerhard; Maier, Gert; Siegordner, Jochen

    1999-03-01

    We present an optical feature extraction system with a microlens array processor. The system is suitable for online implementation of a variety of transforms such as the Walsh transform and DCT. Operating with incoherent light, our processor accepts direct optical input. Employing a sandwich- like architecture, we obtain a very compact design of the optical system. The key elements of the microlens array processor are a square array of 15 X 15 spherical microlenses on acrylic substrate and a spatial light modulator as transmissive mask. The light distribution behind the mask is imaged onto the pixels of a customized a-Si image sensor with adjustable gain. We obtain one output sample for each microlens image and its corresponding weight mask area as summation of the transmitted intensity within one sensor pixel. The resulting architecture is very compact and robust like a conventional camera lens while incorporating a high degree of parallelism. We successfully demonstrate a Walsh transform into the spatial frequency domain as well as the implementation of a discrete cosine transform with digitized gray values. We provide results showing the transformation performance for both synthetic image patterns and images of natural texture samples. The extracted frequency features are suitable for neural classification of the input image. Other transforms and correlations can be implemented in real-time allowing adaptive optical signal processing.

  8. An open-source, programmable pneumatic setup for operation and automated control of single- and multi-layer microfluidic devices

    Directory of Open Access Journals (Sweden)

    Kara Brower

    2018-04-01

    Full Text Available Microfluidic technologies have been used across diverse disciplines (e.g. high-throughput biological measurement, fluid physics, laboratory fluid manipulation but widespread adoption has been limited in part due to the lack of openly disseminated resources that enable non-specialist labs to make and operate their own devices. Here, we report the open-source build of a pneumatic setup capable of operating both single and multilayer (Quake-style microfluidic devices with programmable scripting automation. This setup can operate both simple and complex devices with 48 device valve control inputs and 18 sample inputs, with modular design for easy expansion, at a fraction of the cost of similar commercial solutions. We present a detailed step-by-step guide to building the pneumatic instrumentation, as well as instructions for custom device operation using our software, Geppetto, through an easy-to-use GUI for live on-chip valve actuation and a scripting system for experiment automation. We show robust valve actuation with near real-time software feedback and demonstrate use of the setup for high-throughput biochemical measurements on-chip. This open-source setup will enable specialists and novices alike to run microfluidic devices easily in their own laboratories. Keywords: Microfluidics, Pneumatics, Laboratory automation, Biochip, BioMEMs, Biohacking, Fluid handling, Micro total analysis systems (μTAS, Quake-style valves

  9. A programmable systolic array correlator as a trigger processor for electron pairs in rich (ring image Cherenkov) counters

    Science.gov (United States)

    Männer, R.

    1989-12-01

    This paper describes a systolic array processor for a ring image Cherenkov counter which is capable of identifying pairs of electron circles with a known radius and a certain minimum distance within 15 μs. The processor is a very flexible and fast device. It consists of 128 x 128 processing elements (PEs), where one PE is assigned to each pixel of the image. All PEs run synchronously at 40 MHz. The identification of electron circles is done by correlating the detector image with the proper circle circumference. Circle centers are found by peak detection in the correlation result. A second correlation with a circle disc allows circles of closed electron pairs to be rejected. The trigger decision is generated if a pseudo adder detects at least two remaining circles. The device is controlled by a freely programmable sequencer. A VLSI chip containing 8 x 8 PEs is being developed using a VENUS design system and will be produced in 2μ CMOS technology.

  10. A programmable systolic array correlator as a trigger processor for electron pairs in RICH (ring image Cherenkov) counters

    International Nuclear Information System (INIS)

    Maenner, R.

    1989-01-01

    This paper describes a systolic array processor for a ring image Cherenkov counter which is capable of identifying pairs of electron circles with a known radius and a certain minimum distance within 15 μs. The processor is a very flexible and fast device. It consists of 128x128 processing elements (PEs), where one PE is assigned to each pixel of the image. All PEs run synchronously at 40 MHz. The identification of electron circles is done by correlating the detector image with the proper circle circumference. Circle centers are found by peak detection in the correlation result. A second correlation with a circle disc allows circles of closed electron pairs to be rejected. The trigger decision is generated if a pseudo adder detects at least two remaining circles. The device is controlled by a freely programmable sequencer. A VLSI chip containing 8x8 PEs is being developed using a VENUS design system and will be produced in 2μ CMOS technology. (orig.)

  11. Review of the first 50 cases completed by the RACR mammography QA programme; Phantom image quality, processor control and dose considerations

    International Nuclear Information System (INIS)

    McLean, D.; Chan, W.; Eckert, M.; Heard, R.

    1997-01-01

    The Mammography Quality Assurance Programme, recently established by the Royal Australasian College of Radiologists, has processed the first 50 applications. This programme, which closely follows the programme of the American College of Radiology (ACR), utilizes phantom film images, thermoluminescent dosimetry measurement of mean glandular dose, processor control charts, clinical images, equipment reports and required survey information to establish that a centre conforms to a minimum standard in mammography. The present paper describes the initial results of the first phantom images, dose measurements, processor control and survey information. Fifty films have been evaluated up to the present time with a failure rate of 26%. The major causes of failure were unacceptable film artefacts and poor contrast (as indicated by reduced fibre and mass visibility). A surprising result was the high failure in processing, where 23% of units reviewed had significant problems, including failure to keep the processor within required control limits. Only one centre recorded a mean glandular dose above 2 mGy with no centre over the 3 mGy limit. A review of the frequency of the quality control testing shows that the acceptance of quality assurance in mammography, while greater than in the initial stages of the ACR programme, is less than current US practice. These initial results for the accreditation process probably reflect an initial period of adjustment, as seen by the high pass rate achieved by centres that have re submitted material to gain accreditation. (authors)

  12. Programmable optical processor chips: toward photonic RF filters with DSP-level flexibility and MHz-band selectivity

    Directory of Open Access Journals (Sweden)

    Xie Yiwei

    2017-12-01

    Full Text Available Integrated optical signal processors have been identified as a powerful engine for optical processing of microwave signals. They enable wideband and stable signal processing operations on miniaturized chips with ultimate control precision. As a promising application, such processors enables photonic implementations of reconfigurable radio frequency (RF filters with wide design flexibility, large bandwidth, and high-frequency selectivity. This is a key technology for photonic-assisted RF front ends that opens a path to overcoming the bandwidth limitation of current digital electronics. Here, the recent progress of integrated optical signal processors for implementing such RF filters is reviewed. We highlight the use of a low-loss, high-index-contrast stoichiometric silicon nitride waveguide which promises to serve as a practical material platform for realizing high-performance optical signal processors and points toward photonic RF filters with digital signal processing (DSP-level flexibility, hundreds-GHz bandwidth, MHz-band frequency selectivity, and full system integration on a chip scale.

  13. A 1,000 Frames/s Programmable Vision Chip with Variable Resolution and Row-Pixel-Mixed Parallel Image Processors

    Directory of Open Access Journals (Sweden)

    Nanjian Wu

    2009-07-01

    Full Text Available A programmable vision chip with variable resolution and row-pixel-mixed parallel image processors is presented. The chip consists of a CMOS sensor array, with row-parallel 6-bit Algorithmic ADCs, row-parallel gray-scale image processors, pixel-parallel SIMD Processing Element (PE array, and instruction controller. The resolution of the image in the chip is variable: high resolution for a focused area and low resolution for general view. It implements gray-scale and binary mathematical morphology algorithms in series to carry out low-level and mid-level image processing and sends out features of the image for various applications. It can perform image processing at over 1,000 frames/s (fps. A prototype chip with 64 × 64 pixels resolution and 6-bit gray-scale image is fabricated in 0.18 mm Standard CMOS process. The area size of chip is 1.5 mm × 3.5 mm. Each pixel size is 9.5 μm × 9.5 μm and each processing element size is 23 μm × 29 μm. The experiment results demonstrate that the chip can perform low-level and mid-level image processing and it can be applied in the real-time vision applications, such as high speed target tracking.

  14. Development of a General-Purpose Analysis System Based on a Programmable Fluid Processor Final Report CRADA No. TC-2027-01

    Energy Technology Data Exchange (ETDEWEB)

    McConaghy, C. F. [Lawrence Livermore National Lab. (LLNL), Livermore, CA (United States); Gascoyne, P. R. [Lawrence Livermore National Lab. (LLNL), Livermore, CA (United States)

    2017-09-28

    The purpose ofthis project was to develop a general-purpose analysis system based on a programmable fluid processor (PFP). The PFP is an array of electrodes surrounded by fluid reservoirs and injectors. Injected droplets of various reagents are manjpulated and combined on the array by Dielectrophoretic (DEP) forces. The goal was to create a small handheld device that could accomplish the tasks currently undertaken by much larger, time consuming, manual manipulation in the lab. The entire effo1t was funded by DARPA under the Bio-Flips program. MD Anderson Cancer Center was the PI for the DARPA effort. The Bio-Flips program was a 3- year program that ran from September 2000 to September 2003. The CRADA was somewhat behind the Bi-Flips program running from June 2001 to June 2004 with a no cost extension to September 2004.

  15. Programming list processes. SLIP: symmetric list processor - applications; Le traitement de listes en programmation. SLIP: langage de listes symetrique - applications

    Energy Technology Data Exchange (ETDEWEB)

    Broudin, Y [Commissariat a l' Energie Atomique, Centre d' Etudes Nucleaires de Saclay, 91 - Gif-sur-Yvette (France)

    1966-06-01

    Modern aspects of programming languages are essentially turned towards list processing. The ordinary methods of sequential treatment become inadequate and we must substitute list processes for them, where the cells of a group have no neighbourhood connection, but where the address of one cell is contained in the preceding one. These methods are required in 'time sharing' solving problems. They also allow us to treat new problems and to solve others in the shortest time. Many examples are presented after an abstract of the most usual list languages and a detailed study of one of them : SLIP. Among these examples one should note: locating of words in a dictionary or in a card index, treatment of non numerical symbols, formal derivation. The problems are treated in Fortran II on an IBM 7094 machine. The subroutines which make up the language are presented in an appendix. (author) [French] La programmation moderne ne se satisfait plus des methodes classiques de traitement sequentiel ni des tableaux a positions de memoire contigues. Elle tend a generaliser les methodes de listes ou les cellules d'un groupe n'ont pas de relation de voisinage, mais sont enchainees en listes, l'une donnant l'adresse machine de l'autre. Ces methodes sont indispensables en 'partage de temps' et dans les traitements en 'temps reel'. De plus, elles permettent de traiter des problemes nouveaux et d'optimiser le temps de traitement de nombreux autres. De nombreux exemples sont traites, apres un resume des langages les plus utilises et une etude plus precise d'un langage de listes: SLIP. Parmi les exemples traites signalons la recherche lexicographique, le traitement de symboles alphanumeriques, la derivation formelle. Probleme traite en Fortran II sur IBM 7094. Les sous-programmes constitutifs du langage sont fournis en annexe. (auteur)

  16. Special purpose processors for high energy physics applications

    International Nuclear Information System (INIS)

    Verkerk, C.

    1978-01-01

    The review on the subject of hardware processors from very fast decision logic for the split field magnet facility at CERN, to a point-finding processor used to relieve the data-acquisition minicomputer from the task of monitoring the SPS experiment is given. Block diagrams of decision making processor, point-finding processor, complanarity and opening angle processor and programmable track selector module are presented and discussed. The applications of fully programmable but slower processor on the one hand, and very fast and programmable decision logic on the other hand are given in this review

  17. Programme

    OpenAIRE

    Hobday, E, fl. 1905, artist

    2003-01-01

    A photograph of an illustrated programme listing dances. The illustration shows a snake charmer playing to a snake while another man watches. Buildings and trees can be seen behind a wall in the distance. In the lower right-hand corner of the programme is the signature 'E. Hobday'. The programme is almost certainly related to the Punjab Ball, Lahore. It is placed next to the Punjab Ball Menu in the album and the Menu is also illustrated by 'E. Hobday'.

  18. Microfluidic electronics.

    Science.gov (United States)

    Cheng, Shi; Wu, Zhigang

    2012-08-21

    Microfluidics, a field that has been well-established for several decades, has seen extensive applications in the areas of biology, chemistry, and medicine. However, it might be very hard to imagine how such soft microfluidic devices would be used in other areas, such as electronics, in which stiff, solid metals, insulators, and semiconductors have previously dominated. Very recently, things have radically changed. Taking advantage of native properties of microfluidics, advances in microfluidics-based electronics have shown great potential in numerous new appealing applications, e.g. bio-inspired devices, body-worn healthcare and medical sensing systems, and ergonomic units, in which conventional rigid, bulky electronics are facing insurmountable obstacles to fulfil the demand on comfortable user experience. Not only would the birth of microfluidic electronics contribute to both the microfluidics and electronics fields, but it may also shape the future of our daily life. Nevertheless, microfluidic electronics are still at a very early stage, and significant efforts in research and development are needed to advance this emerging field. The intention of this article is to review recent research outcomes in the field of microfluidic electronics, and address current technical challenges and issues. The outlook of future development in microfluidic electronic devices and systems, as well as new fabrication techniques, is also discussed. Moreover, the authors would like to inspire both the microfluidics and electronics communities to further exploit this newly-established field.

  19. Reconfigurable microfluidic platform in ice

    OpenAIRE

    Varejka, M.

    2008-01-01

    Microfluidic devices are popular tools in the biotechnology industry where they provide smaller reagent requirements, high speed of analysis and the possibility for automation. The aim of the project is to make a flexible biocompatible microfluidic platform adapted to different specific applications, mainly analytical and separations which parameters and configuration can be changed multiple times by changing corresponding computer programme. The current project has been sup...

  20. Neurovision processor for designing intelligent sensors

    Science.gov (United States)

    Gupta, Madan M.; Knopf, George K.

    1992-03-01

    A programmable multi-task neuro-vision processor, called the Positive-Negative (PN) neural processor, is proposed as a plausible hardware mechanism for constructing robust multi-task vision sensors. The computational operations performed by the PN neural processor are loosely based on the neural activity fields exhibited by certain nervous tissue layers situated in the brain. The neuro-vision processor can be programmed to generate diverse dynamic behavior that may be used for spatio-temporal stabilization (STS), short-term visual memory (STVM), spatio-temporal filtering (STF) and pulse frequency modulation (PFM). A multi- functional vision sensor that performs a variety of information processing operations on time- varying two-dimensional sensory images can be constructed from a parallel and hierarchical structure of numerous individually programmed PN neural processors.

  1. Online track processor for the CDF upgrade

    International Nuclear Information System (INIS)

    Thomson, E. J.

    2002-01-01

    A trigger track processor, called the eXtremely Fast Tracker (XFT), has been designed for the CDF upgrade. This processor identifies high transverse momentum (> 1.5 GeV/c) charged particles in the new central outer tracking chamber for CDF II. The XFT design is highly parallel to handle the input rate of 183 Gbits/s and output rate of 44 Gbits/s. The processor is pipelined and reports the result for a new event every 132 ns. The processor uses three stages: hit classification, segment finding, and segment linking. The pattern recognition algorithms for the three stages are implemented in programmable logic devices (PLDs) which allow in-situ modification of the algorithm at any time. The PLDs reside on three different types of modules. The complete system has been installed and commissioned at CDF II. An overview of the track processor and performance in CDF Run II are presented

  2. Rapid geodesic mapping of brain functional connectivity: implementation of a dedicated co-processor in a field-programmable gate array (FPGA) and application to resting state functional MRI.

    Science.gov (United States)

    Minati, Ludovico; Cercignani, Mara; Chan, Dennis

    2013-10-01

    Graph theory-based analyses of brain network topology can be used to model the spatiotemporal correlations in neural activity detected through fMRI, and such approaches have wide-ranging potential, from detection of alterations in preclinical Alzheimer's disease through to command identification in brain-machine interfaces. However, due to prohibitive computational costs, graph-based analyses to date have principally focused on measuring connection density rather than mapping the topological architecture in full by exhaustive shortest-path determination. This paper outlines a solution to this problem through parallel implementation of Dijkstra's algorithm in programmable logic. The processor design is optimized for large, sparse graphs and provided in full as synthesizable VHDL code. An acceleration factor between 15 and 18 is obtained on a representative resting-state fMRI dataset, and maps of Euclidean path length reveal the anticipated heterogeneous cortical involvement in long-range integrative processing. These results enable high-resolution geodesic connectivity mapping for resting-state fMRI in patient populations and real-time geodesic mapping to support identification of imagined actions for fMRI-based brain-machine interfaces. Copyright © 2013 IPEM. Published by Elsevier Ltd. All rights reserved.

  3. Median and Morphological Specialized Processors for a Real-Time Image Data Processing

    Directory of Open Access Journals (Sweden)

    Kazimierz Wiatr

    2002-01-01

    Full Text Available This paper presents the considerations on selecting a multiprocessor MISD architecture for fast implementation of the vision image processing. Using the author′s earlier experience with real-time systems, implementing of specialized hardware processors based on the programmable FPGA systems has been proposed in the pipeline architecture. In particular, the following processors are presented: median filter and morphological processor. The structure of a universal reconfigurable processor developed has been proposed as well. Experimental results are presented as delays on LCA level implementation for median filter, morphological processor, convolution processor, look-up-table processor, logic processor and histogram processor. These times compare with delays in general purpose processor and DSP processor.

  4. Theoretical microfluidics

    DEFF Research Database (Denmark)

    Bruus, Henrik

    Microfluidics is a young and rapidly expanding scientific discipline, which deals with fluids and solutions in miniaturized systems, the so-called lab-on-a-chip systems. It has applications in chemical engineering, pharmaceutics, biotechnology and medicine. As the lab-on-a-chip systems grow...

  5. Cassava processors' awareness of occupational and environmental ...

    African Journals Online (AJOL)

    A larger percentage (74.5%) of the respondents indicated that the Agricultural Development Programme (ADP) is their source of information. The result also showed that processor's awareness of occupational hazards associated with the different stages of cassava processing vary because their involvement in these stages

  6. High-Performance Linear Algebra Processor using FPGA

    National Research Council Canada - National Science Library

    Johnson, J

    2004-01-01

    With recent advances in FPGA (Field Programmable Gate Array) technology it is now feasible to use these devices to build special purpose processors for floating point intensive applications that arise in scientific computing...

  7. Microfluidic Device

    Science.gov (United States)

    Tai, Yu-Chong (Inventor); Zheng, Siyang (Inventor); Lin, Jeffrey Chun-Hui (Inventor); Kasdan, Harvey L. (Inventor)

    2017-01-01

    Described herein are particular embodiments relating to a microfluidic device that may be utilized for cell sensing, counting, and/or sorting. Particular aspects relate to a microfabricated device that is capable of differentiating single cell types from dense cell populations. One particular embodiment relates a device and methods of using the same for sensing, counting, and/or sorting leukocytes from whole, undiluted blood samples.

  8. Soft tubular microfluidics for 2D and 3D applications

    Science.gov (United States)

    Xi, Wang; Kong, Fang; Yeo, Joo Chuan; Yu, Longteng; Sonam, Surabhi; Dao, Ming; Gong, Xiaobo; Teck Lim, Chwee

    2017-10-01

    Microfluidics has been the key component for many applications, including biomedical devices, chemical processors, microactuators, and even wearable devices. This technology relies on soft lithography fabrication which requires cleanroom facilities. Although popular, this method is expensive and labor-intensive. Furthermore, current conventional microfluidic chips precludes reconfiguration, making reiterations in design very time-consuming and costly. To address these intrinsic drawbacks of microfabrication, we present an alternative solution for the rapid prototyping of microfluidic elements such as microtubes, valves, and pumps. In addition, we demonstrate how microtubes with channels of various lengths and cross-sections can be attached modularly into 2D and 3D microfluidic systems for functional applications. We introduce a facile method of fabricating elastomeric microtubes as the basic building blocks for microfluidic devices. These microtubes are transparent, biocompatible, highly deformable, and customizable to various sizes and cross-sectional geometries. By configuring the microtubes into deterministic geometry, we enable rapid, low-cost formation of microfluidic assemblies without compromising their precision and functionality. We demonstrate configurable 2D and 3D microfluidic systems for applications in different domains. These include microparticle sorting, microdroplet generation, biocatalytic micromotor, triboelectric sensor, and even wearable sensing. Our approach, termed soft tubular microfluidics, provides a simple, cheaper, and faster solution for users lacking proficiency and access to cleanroom facilities to design and rapidly construct microfluidic devices for their various applications and needs.

  9. Embedded Processor Laboratory

    Data.gov (United States)

    Federal Laboratory Consortium — The Embedded Processor Laboratory provides the means to design, develop, fabricate, and test embedded computers for missile guidance electronics systems in support...

  10. Multithreading in vector processors

    Science.gov (United States)

    Evangelinos, Constantinos; Kim, Changhoan; Nair, Ravi

    2018-01-16

    In one embodiment, a system includes a processor having a vector processing mode and a multithreading mode. The processor is configured to operate on one thread per cycle in the multithreading mode. The processor includes a program counter register having a plurality of program counters, and the program counter register is vectorized. Each program counter in the program counter register represents a distinct corresponding thread of a plurality of threads. The processor is configured to execute the plurality of threads by activating the plurality of program counters in a round robin cycle.

  11. PREFACE: Nano- and microfluidics Nano- and microfluidics

    Science.gov (United States)

    Jacobs, Karin

    2011-05-01

    The field of nano- and microfluidics emerged at the end of the 1990s parallel to the demand for smaller and smaller containers and channels for chemical, biochemical and medical applications such as blood and DNS analysis [1], gene sequencing or proteomics [2, 3]. Since then, new journals and conferences have been launched and meanwhile, about two decades later, a variety of microfluidic applications are on the market. Briefly, 'the small flow becomes mainstream' [4]. Nevertheless, research in nano- and microfluidics is more than downsizing the spatial dimensions. For liquids on the nanoscale, surface and interface phenomena grow in importance and may even dominate the behavior in some systems. The studies collected in this special issue all concentrate on these type of systems and were part ot the priority programme SPP1164 'Nano- and Microfluidics' of the German Science Foundation (Deutsche Forschungsgemeinschaft, DFG). The priority programme was initiated in 2002 by Hendrik Kuhlmann and myself and was launched in 2004. Friction between a moving liquid and a solid wall may, for instance, play an important role so that the usual assumption of a no-slip boundary condition is no longer valid. Likewise, the dynamic deformations of soft objects like polymers, vesicles or capsules in flow arise from the subtle interplay between the (visco-)elasticity of the object and the viscous stresses in the surrounding fluid and, potentially, the presence of structures confining the flow like channels. Consequently, new theories were developed ( see articles in this issue by Münch and Wagner, Falk and Mecke, Bonthuis et al, Finken et al, Almenar and Rauscher, Straube) and experiments were set up to unambiguously demonstrate deviations from bulk, or 'macro', behavior (see articles in this issue by Wolff et al, Vinogradova and Belyaev, Hahn et al, Seemann et al, Grüner and Huber, Müller-Buschbaum et al, Gutsche et al, Braunmüller et al, Laube et al, Brücker, Nottebrock et al

  12. Programmable Quantum Photonic Processor Using Silicon Photonics

    Science.gov (United States)

    2017-04-01

    8 Figure 6: (a) Proposed on-demand single photon source based on dynamic cavity storage . (b) Example of a gate implementation...electronic architectures tuned to implement artificial neural networks that improve upon both computational speed and energy efficiency. 3.6 All...states are in the dual- rail logic representation. Approved for Public Release; Distribution Unlimited. 6 Figure 3: Schematic of two-photon

  13. Microfluidic interconnects

    Science.gov (United States)

    Benett, William J.; Krulevitch, Peter A.

    2001-01-01

    A miniature connector for introducing microliter quantities of solutions into microfabricated fluidic devices. The fluidic connector, for example, joins standard high pressure liquid chromatography (HPLC) tubing to 1 mm diameter holes in silicon or glass, enabling ml-sized volumes of sample solutions to be merged with .mu.l-sized devices. The connector has many features, including ease of connect and disconnect; a small footprint which enables numerous connectors to be located in a small area; low dead volume; helium leak-tight; and tubing does not twist during connection. Thus the connector enables easy and effective change of microfluidic devices and introduction of different solutions in the devices.

  14. Integrated fuel processor development

    International Nuclear Information System (INIS)

    Ahmed, S.; Pereira, C.; Lee, S. H. D.; Krumpelt, M.

    2001-01-01

    The Department of Energy's Office of Advanced Automotive Technologies has been supporting the development of fuel-flexible fuel processors at Argonne National Laboratory. These fuel processors will enable fuel cell vehicles to operate on fuels available through the existing infrastructure. The constraints of on-board space and weight require that these fuel processors be designed to be compact and lightweight, while meeting the performance targets for efficiency and gas quality needed for the fuel cell. This paper discusses the performance of a prototype fuel processor that has been designed and fabricated to operate with liquid fuels, such as gasoline, ethanol, methanol, etc. Rated for a capacity of 10 kWe (one-fifth of that needed for a car), the prototype fuel processor integrates the unit operations (vaporization, heat exchange, etc.) and processes (reforming, water-gas shift, preferential oxidation reactions, etc.) necessary to produce the hydrogen-rich gas (reformate) that will fuel the polymer electrolyte fuel cell stacks. The fuel processor work is being complemented by analytical and fundamental research. With the ultimate objective of meeting on-board fuel processor goals, these studies include: modeling fuel cell systems to identify design and operating features; evaluating alternative fuel processing options; and developing appropriate catalysts and materials. Issues and outstanding challenges that need to be overcome in order to develop practical, on-board devices are discussed

  15. Embedded processor extensions for image processing

    Science.gov (United States)

    Thevenin, Mathieu; Paindavoine, Michel; Letellier, Laurent; Heyrman, Barthélémy

    2008-04-01

    The advent of camera phones marks a new phase in embedded camera sales. By late 2009, the total number of camera phones will exceed that of both conventional and digital cameras shipped since the invention of photography. Use in mobile phones of applications like visiophony, matrix code readers and biometrics requires a high degree of component flexibility that image processors (IPs) have not, to date, been able to provide. For all these reasons, programmable processor solutions have become essential. This paper presents several techniques geared to speeding up image processors. It demonstrates that a gain of twice is possible for the complete image acquisition chain and the enhancement pipeline downstream of the video sensor. Such results confirm the potential of these computing systems for supporting future applications.

  16. Run-time Adaptable VLIW Processors : Resources, Performance, Power Consumption, and Reliability Trade-offs

    NARCIS (Netherlands)

    Anjam, F.

    2013-01-01

    In this dissertation, we propose to combine programmability with reconfigurability by implementing an adaptable programmable VLIW processor in a reconfigurable hardware. The approach allows applications to be developed at high-level (C language level), while at the same time, the processor

  17. Logistic Fuel Processor Development

    National Research Council Canada - National Science Library

    Salavani, Reza

    2004-01-01

    ... to light gases then steam reform the light gases into hydrogen rich stream. This report documents the efforts in developing a fuel processor capable of providing hydrogen to a 3kW fuel cell stack...

  18. 3081/E processor

    International Nuclear Information System (INIS)

    Kunz, P.F.; Gravina, M.; Oxoby, G.

    1984-04-01

    The 3081/E project was formed to prepare a much improved IBM mainframe emulator for the future. Its design is based on a large amount of experience in using the 168/E processor to increase available CPU power in both online and offline environments. The processor will be at least equal to the execution speed of a 370/168 and up to 1.5 times faster for heavy floating point code. A single processor will thus be at least four times more powerful than the VAX 11/780, and five processors on a system would equal at least the performance of the IBM 3081K. With its large memory space and simple but flexible high speed interface, the 3081/E is well suited for the online and offline needs of high energy physics in the future

  19. Logistic Fuel Processor Development

    National Research Council Canada - National Science Library

    Salavani, Reza

    2004-01-01

    The Air Base Technologies Division of the Air Force Research Laboratory has developed a logistic fuel processor that removes the sulfur content of the fuel and in the process converts logistic fuel...

  20. Adaptive signal processor

    Energy Technology Data Exchange (ETDEWEB)

    Walz, H.V.

    1980-07-01

    An experimental, general purpose adaptive signal processor system has been developed, utilizing a quantized (clipped) version of the Widrow-Hoff least-mean-square adaptive algorithm developed by Moschner. The system accommodates 64 adaptive weight channels with 8-bit resolution for each weight. Internal weight update arithmetic is performed with 16-bit resolution, and the system error signal is measured with 12-bit resolution. An adapt cycle of adjusting all 64 weight channels is accomplished in 8 ..mu..sec. Hardware of the signal processor utilizes primarily Schottky-TTL type integrated circuits. A prototype system with 24 weight channels has been constructed and tested. This report presents details of the system design and describes basic experiments performed with the prototype signal processor. Finally some system configurations and applications for this adaptive signal processor are discussed.

  1. Adaptive signal processor

    International Nuclear Information System (INIS)

    Walz, H.V.

    1980-07-01

    An experimental, general purpose adaptive signal processor system has been developed, utilizing a quantized (clipped) version of the Widrow-Hoff least-mean-square adaptive algorithm developed by Moschner. The system accommodates 64 adaptive weight channels with 8-bit resolution for each weight. Internal weight update arithmetic is performed with 16-bit resolution, and the system error signal is measured with 12-bit resolution. An adapt cycle of adjusting all 64 weight channels is accomplished in 8 μsec. Hardware of the signal processor utilizes primarily Schottky-TTL type integrated circuits. A prototype system with 24 weight channels has been constructed and tested. This report presents details of the system design and describes basic experiments performed with the prototype signal processor. Finally some system configurations and applications for this adaptive signal processor are discussed

  2. Array processor architecture

    Science.gov (United States)

    Barnes, George H. (Inventor); Lundstrom, Stephen F. (Inventor); Shafer, Philip E. (Inventor)

    1983-01-01

    A high speed parallel array data processing architecture fashioned under a computational envelope approach includes a data base memory for secondary storage of programs and data, and a plurality of memory modules interconnected to a plurality of processing modules by a connection network of the Omega gender. Programs and data are fed from the data base memory to the plurality of memory modules and from hence the programs are fed through the connection network to the array of processors (one copy of each program for each processor). Execution of the programs occur with the processors operating normally quite independently of each other in a multiprocessing fashion. For data dependent operations and other suitable operations, all processors are instructed to finish one given task or program branch before all are instructed to proceed in parallel processing fashion on the next instruction. Even when functioning in the parallel processing mode however, the processors are not locked-step but execute their own copy of the program individually unless or until another overall processor array synchronization instruction is issued.

  3. Functional unit for a processor

    NARCIS (Netherlands)

    Rohani, A.; Kerkhoff, Hans G.

    2013-01-01

    The invention relates to a functional unit for a processor, such as a Very Large Instruction Word Processor. The invention further relates to a processor comprising at least one such functional unit. The invention further relates to a functional unit and processor capable of mitigating the effect of

  4. Multiple Embedded Processors for Fault-Tolerant Computing

    Science.gov (United States)

    Bolotin, Gary; Watson, Robert; Katanyoutanant, Sunant; Burke, Gary; Wang, Mandy

    2005-01-01

    A fault-tolerant computer architecture has been conceived in an effort to reduce vulnerability to single-event upsets (spurious bit flips caused by impingement of energetic ionizing particles or photons). As in some prior fault-tolerant architectures, the redundancy needed for fault tolerance is obtained by use of multiple processors in one computer. Unlike prior architectures, the multiple processors are embedded in a single field-programmable gate array (FPGA). What makes this new approach practical is the recent commercial availability of FPGAs that are capable of having multiple embedded processors. A working prototype (see figure) consists of two embedded IBM PowerPC 405 processor cores and a comparator built on a Xilinx Virtex-II Pro FPGA. This relatively simple instantiation of the architecture implements an error-detection scheme. A planned future version, incorporating four processors and two comparators, would correct some errors in addition to detecting them.

  5. Microfluidic sieve valves

    Science.gov (United States)

    Quake, Stephen R; Marcus, Joshua S; Hansen, Carl L

    2015-01-13

    Sieve valves for use in microfluidic device are provided. The valves are useful for impeding the flow of particles, such as chromatography beads or cells, in a microfluidic channel while allowing liquid solution to pass through the valve. The valves find particular use in making microfluidic chromatography modules.

  6. Microfluidic Dye Lasers

    DEFF Research Database (Denmark)

    Kristensen, Anders; Balslev, Søren; Gersborg-Hansen, Morten

    2006-01-01

    A technology for miniaturized, polymer based lasers, suitable for integration with planar waveguides and microfluidic networks is presented. The microfluidic dye laser device consists of a microfluidic channel with an embedded optical resonator. The devices are fabricated in a thin polymer film...

  7. SPAR thermal analysis processors reference manual, system level 16. Volume 1: Program executive. Volume 2: Theory. Volume 3: Demonstration problems. Volume 4: Experimental thermal element capability. Volume 5: Programmer reference

    Science.gov (United States)

    Marlowe, M. B.; Moore, R. A.; Whetstone, W. D.

    1979-01-01

    User instructions are given for performing linear and nonlinear steady state and transient thermal analyses with SPAR thermal analysis processors TGEO, SSTA, and TRTA. It is assumed that the user is familiar with basic SPAR operations and basic heat transfer theory.

  8. 3081//sub E/ processor

    International Nuclear Information System (INIS)

    Kunz, P.F.; Gravina, M.; Oxoby, G.; Trang, Q.; Fucci, A.; Jacobs, D.; Martin, B.; Storr, K.

    1983-03-01

    Since the introduction of the 168//sub E/, emulating processors have been successful over an amazingly wide range of applications. This paper will describe a second generation processor, the 3081//sub E/. This new processor, which is being developed as a collaboration between SLAC and CERN, goes beyond just fixing the obvious faults of the 168//sub E/. Not only will the 3081//sub E/ have much more memory space, incorporate many more IBM instructions, and have much more memory space, incorporate many more IBM instructions, and have full double precision floating point arithmetic, but it will also have faster execution times and be much simpler to build, debug, and maintain. The simple interface and reasonable cost of the 168//sub E/ will be maintained for the 3081//sub E/

  9. The Central Trigger Processor (CTP)

    CERN Multimedia

    Franchini, Matteo

    2016-01-01

    The Central Trigger Processor (CTP) receives trigger information from the calorimeter and muon trigger processors, as well as from other sources of trigger. It makes the Level-1 decision (L1A) based on a trigger menu.

  10. Very Long Instruction Word Processors

    Indian Academy of Sciences (India)

    Pentium Processor have modified the processor architecture to exploit parallelism in a program. .... The type of operation itself is encoded using 14 bits. .... text of designing simple architectures with low power consump- tion and execute x86 ...

  11. The Molen Polymorphic Media Processor

    NARCIS (Netherlands)

    Kuzmanov, G.K.

    2004-01-01

    In this dissertation, we address high performance media processing based on a tightly coupled co-processor architectural paradigm. More specifically, we introduce a reconfigurable media augmentation of a general purpose processor and implement it into a fully operational processor prototype. The

  12. Dual-core Itanium Processor

    CERN Multimedia

    2006-01-01

    Intel’s first dual-core Itanium processor, code-named "Montecito" is a major release of Intel's Itanium 2 Processor Family, which implements the Intel Itanium architecture on a dual-core processor with two cores per die (integrated circuit). Itanium 2 is much more powerful than its predecessor. It has lower power consumption and thermal dissipation.

  13. Multimode power processor

    Science.gov (United States)

    O'Sullivan, George A.; O'Sullivan, Joseph A.

    1999-01-01

    In one embodiment, a power processor which operates in three modes: an inverter mode wherein power is delivered from a battery to an AC power grid or load; a battery charger mode wherein the battery is charged by a generator; and a parallel mode wherein the generator supplies power to the AC power grid or load in parallel with the battery. In the parallel mode, the system adapts to arbitrary non-linear loads. The power processor may operate on a per-phase basis wherein the load may be synthetically transferred from one phase to another by way of a bumpless transfer which causes no interruption of power to the load when transferring energy sources. Voltage transients and frequency transients delivered to the load when switching between the generator and battery sources are minimized, thereby providing an uninterruptible power supply. The power processor may be used as part of a hybrid electrical power source system which may contain, in one embodiment, a photovoltaic array, diesel engine, and battery power sources.

  14. Rapid manufacturing for microfluidics

    CSIR Research Space (South Africa)

    Land, K

    2012-10-01

    Full Text Available for microfluidics K. LAND, S. HUGO, M MBANJWA, L FOURIE CSIR Materials Science and Manufacturing P O Box 395, Pretoria 0001, SOUTH AFRICA Email: kland@csir.co.za INTRODUCTION Microfluidics refers to the manipulation of very small volumes of fluid.... Microfluidics is at the forefront of developing solutions for drug discovery, diagnostics (from glucose tests to malaria and TB testing) and environmental diagnostics (E-coli monitoring of drinking water). In order to quickly implement new designs, a rapid...

  15. Commercialization of microfluidic devices.

    Science.gov (United States)

    Volpatti, Lisa R; Yetisen, Ali K

    2014-07-01

    Microfluidic devices offer automation and high-throughput screening, and operate at low volumes of consumables. Although microfluidics has the potential to reduce turnaround times and costs for analytical devices, particularly in medical, veterinary, and environmental sciences, this enabling technology has had limited diffusion into consumer products. This article analyzes the microfluidics market, identifies issues, and highlights successful commercialization strategies. Addressing niche markets and establishing compatibility with existing workflows will accelerate market penetration. Copyright © 2014 Elsevier Ltd. All rights reserved.

  16. Tunable Microfluidic Dye Laser

    DEFF Research Database (Denmark)

    Olsen, Brian Bilenberg; Helbo, Bjarne; Kutter, Jörg Peter

    2003-01-01

    We present a tunable microfluidic dye laser fabricated in SU-8. The tunability is enabled by integrating a microfluidic diffusion mixer with an existing microfluidic dye laser design by Helbo et al. By controlling the relative flows in the mixer between a dye solution and a solvent......, the concentration of dye in the laser cavity can be adjusted, allowing the wavelength to be tuned. Wavelength tuning controlled by the dye concentration was demonstrated with macroscopic dye lasers already in 1971, but this principle only becomes practically applicable by the use of microfluidic mixing...

  17. First level trigger processor for the ZEUS calorimeter

    International Nuclear Information System (INIS)

    Dawson, J.W.; Talaga, R.L.; Burr, G.W.; Laird, R.J.; Smith, W.; Lackey, J.

    1990-01-01

    This paper discusses the design of the first level trigger processor for the ZEUS calorimeter. This processor accepts data from the 13,000 photomultipliers of the calorimeter which is topologically divided into 16 regions, and after regional preprocessing, performs logical and numerical operations which cross regional boundaries. Because the crossing period at the HERA collider is 96 ns, it is necessary that first-level trigger decisions be made in pipelined hardware. One microsecond is allowed for the processor to perform the required logical and numerical operations, during which time the data from ten crossings would be resident in the processor while being clocked through the pipelined hardware. The circuitry is implemented in 100K ECL, Advanced CMOS discrete devices, and programmable gate arrays, and operates in a VME environment. All tables and registers are written/read from VME, and all diagnostic codes are executed from VME. Preprocessed data flows into the processor at a rate of 5.2GB/s, and processed data flows from the processor to the Global First-Level Trigger at a rate of 700MB/s. The system allows for subsets of the logic to be configured by software and for various important variables to be histogrammed as they flow through the processor. 2 refs., 3 figs

  18. First-level trigger processor for the ZEUS calorimeter

    International Nuclear Information System (INIS)

    Dawson, J.W.; Talaga, R.L.; Burr, G.W.; Laird, R.J.; Smith, W.; Lackey, J.

    1990-01-01

    The design of the first-level trigger processor for the Zeus calorimeter is discussed. This processor accepts data from the 13,000 photomultipliers of the calorimeter, which is topologically divided into 16 regions, and after regional preprocessing performs logical and numerical operations that cross regional boundaries. Because the crossing period at the HERA collider is 96 ns, it is necessary that first-level trigger decisions be made in pipelined hardware. One microsecond is allowed for the processor to perform the required logical and numerical operations, during which time the data from ten crossings would be resident in the processor while being clocked through the pipelined hardware. The circuitry is implemented in 100K emitter-coupled logic (ECL), advanced CMOS discrete devices and programmable gate arrays, and operates in a VME environment. All tables and registers are written/read from VME, and all diagnostic codes are executed from VME. Preprocessed data flows into the processor at a rate of 5.2 Gbyte/s, and processed data flows from the processor to the global first-level trigger at a rate of 70 Mbyte/s. The system allows for subsets of the logic to be configured by software and for various important variables to be histogrammed as they flow through the processor

  19. 3D Printed Multimaterial Microfluidic Valve.

    Directory of Open Access Journals (Sweden)

    Steven J Keating

    Full Text Available We present a novel 3D printed multimaterial microfluidic proportional valve. The microfluidic valve is a fundamental primitive that enables the development of programmable, automated devices for controlling fluids in a precise manner. We discuss valve characterization results, as well as exploratory design variations in channel width, membrane thickness, and membrane stiffness. Compared to previous single material 3D printed valves that are stiff, these printed valves constrain fluidic deformation spatially, through combinations of stiff and flexible materials, to enable intricate geometries in an actuated, functionally graded device. Research presented marks a shift towards 3D printing multi-property programmable fluidic devices in a single step, in which integrated multimaterial valves can be used to control complex fluidic reactions for a variety of applications, including DNA assembly and analysis, continuous sampling and sensing, and soft robotics.

  20. Feasibility analysis of real-time physical modeling using WaveCore processor technology on FPGA

    NARCIS (Netherlands)

    Verstraelen, Martinus Johannes Wilhelmina; Pfeifle, Florian; Bader, Rolf

    2015-01-01

    WaveCore is a scalable many-core processor technology. This technology is specifically developed and optimized for real-time acoustical modeling applications. The programmable WaveCore soft-core processor is silicon-technology independent and hence can be targeted to ASIC or FPGA technologies. The

  1. SLAC Scanner Processor: a FASTBUS module for data collection and processing

    International Nuclear Information System (INIS)

    Brafman, H.; Glanzman, T.; Lankford, A.J.; Olsen, J.; Paffrath, L.

    1984-10-01

    A new, general purpose, programmable FASTBUS module, the SLAC Scanner Processor (SSP), is introduced. Both hardware and software elements of SSP operation are discussed. The role of the SSP within the upgraded Mark II Detector at SLAC is described

  2. Video frame processor

    International Nuclear Information System (INIS)

    Joshi, V.M.; Agashe, Alok; Bairi, B.R.

    1993-01-01

    This report provides technical description regarding the Video Frame Processor (VFP) developed at Bhabha Atomic Research Centre. The instrument provides capture of video images available in CCIR format. Two memory planes each with a capacity of 512 x 512 x 8 bit data enable storage of two video image frames. The stored image can be processed on-line and on-line image subtraction can also be carried out for image comparisons. The VFP is a PC Add-on board and is I/O mapped within the host IBM PC/AT compatible computer. (author). 9 refs., 4 figs., 19 photographs

  3. Trigger and decision processors

    International Nuclear Information System (INIS)

    Franke, G.

    1980-11-01

    In recent years there have been many attempts in high energy physics to make trigger and decision processes faster and more sophisticated. This became necessary due to a permanent increase of the number of sensitive detector elements in wire chambers and calorimeters, and in fact it was possible because of the fast developments in integrated circuits technique. In this paper the present situation will be reviewed. The discussion will be mainly focussed upon event filtering by pure software methods and - rather hardware related - microprogrammable processors as well as random access memory triggers. (orig.)

  4. Optical Finite Element Processor

    Science.gov (United States)

    Casasent, David; Taylor, Bradley K.

    1986-01-01

    A new high-accuracy optical linear algebra processor (OLAP) with many advantageous features is described. It achieves floating point accuracy, handles bipolar data by sign-magnitude representation, performs LU decomposition using only one channel, easily partitions and considers data flow. A new application (finite element (FE) structural analysis) for OLAPs is introduced and the results of a case study presented. Error sources in encoded OLAPs are addressed for the first time. Their modeling and simulation are discussed and quantitative data are presented. Dominant error sources and the effects of composite error sources are analyzed.

  5. Microfluidics for chemical processing

    NARCIS (Netherlands)

    Gardeniers, Johannes G.E.

    2006-01-01

    Microfluidic systems, and more specifically, microfluidic chips, have a number of features that make them particularly useful for the study of chemical reactions on-line. The present paper will discuss two examples, the study of fluidic behaviour at high pressures and the excitation and detection of

  6. AMD's 64-bit Opteron processor

    CERN Multimedia

    CERN. Geneva

    2003-01-01

    This talk concentrates on issues that relate to obtaining peak performance from the Opteron processor. Compiler options, memory layout, MPI issues in multi-processor configurations and the use of a NUMA kernel will be covered. A discussion of recent benchmarking projects and results will also be included.BiographiesDavid RichDavid directs AMD's efforts in high performance computing and also in the use of Opteron processors...

  7. System-level modeling and simulation of the cell culture microfluidic biochip ProCell

    DEFF Research Database (Denmark)

    Minhass, Wajid Hassan; Pop, Paul; Madsen, Jan

    2010-01-01

    Microfluidic biochips offer a promising alternative to a conventional biochemical laboratory. There are two technologies for the microfluidic biochips: droplet-based and flow-based. In this paper we are interested in flow-based microfluidic biochips, where the liquid flows continuously through pre......-defined micro-channels using valves and pumps. We present an approach to the system-level modeling and simulation of a cell culture microfluidic biochip called ProCell, Programmable Cell Culture Chip. ProCell contains a cell culture chamber, which is envisioned to run 256 simultaneous experiments (viewed...

  8. Composable processor virtualization for embedded systems

    NARCIS (Netherlands)

    Molnos, A.M.; Milutinovic, A.; She, D.; Goossens, K.G.W.

    2010-01-01

    Processor virtualization divides a physical processor's time among a set of virual machines, enabling efficient hardware utilization, application security and allowing co-existence of different operating systems on the same processor. Through initially intended for the server domain, virtualization

  9. Cell manipulation in microfluidics

    International Nuclear Information System (INIS)

    Yun, Hoyoung; Kim, Kisoo; Lee, Won Gu

    2013-01-01

    Recent advances in the lab-on-a-chip field in association with nano/microfluidics have been made for new applications and functionalities to the fields of molecular biology, genetic analysis and proteomics, enabling the expansion of the cell biology field. Specifically, microfluidics has provided promising tools for enhancing cell biological research, since it has the ability to precisely control the cellular environment, to easily mimic heterogeneous cellular environment by multiplexing, and to analyze sub-cellular information by high-contents screening assays at the single-cell level. Various cell manipulation techniques in microfluidics have been developed in accordance with specific objectives and applications. In this review, we examine the latest achievements of cell manipulation techniques in microfluidics by categorizing externally applied forces for manipulation: (i) optical, (ii) magnetic, (iii) electrical, (iv) mechanical and (v) other manipulations. We furthermore focus on history where the manipulation techniques originate and also discuss future perspectives with key examples where available. (topical review)

  10. Microfluidic chemical reaction circuits

    Science.gov (United States)

    Lee, Chung-cheng [Irvine, CA; Sui, Guodong [Los Angeles, CA; Elizarov, Arkadij [Valley Village, CA; Kolb, Hartmuth C [Playa del Rey, CA; Huang, Jiang [San Jose, CA; Heath, James R [South Pasadena, CA; Phelps, Michael E [Los Angeles, CA; Quake, Stephen R [Stanford, CA; Tseng, Hsian-rong [Los Angeles, CA; Wyatt, Paul [Tipperary, IE; Daridon, Antoine [Mont-Sur-Rolle, CH

    2012-06-26

    New microfluidic devices, useful for carrying out chemical reactions, are provided. The devices are adapted for on-chip solvent exchange, chemical processes requiring multiple chemical reactions, and rapid concentration of reagents.

  11. Distributed processor systems

    International Nuclear Information System (INIS)

    Zacharov, B.

    1976-01-01

    In recent years, there has been a growing tendency in high-energy physics and in other fields to solve computational problems by distributing tasks among the resources of inter-coupled processing devices and associated system elements. This trend has gained further momentum more recently with the increased availability of low-cost processors and with the development of the means of data distribution. In two lectures, the broad question of distributed computing systems is examined and the historical development of such systems reviewed. An attempt is made to examine the reasons for the existence of these systems and to discern the main trends for the future. The components of distributed systems are discussed in some detail and particular emphasis is placed on the importance of standards and conventions in certain key system components. The ideas and principles of distributed systems are discussed in general terms, but these are illustrated by a number of concrete examples drawn from the context of the high-energy physics environment. (Auth.)

  12. Green Secure Processors: Towards Power-Efficient Secure Processor Design

    Science.gov (United States)

    Chhabra, Siddhartha; Solihin, Yan

    With the increasing wealth of digital information stored on computer systems today, security issues have become increasingly important. In addition to attacks targeting the software stack of a system, hardware attacks have become equally likely. Researchers have proposed Secure Processor Architectures which utilize hardware mechanisms for memory encryption and integrity verification to protect the confidentiality and integrity of data and computation, even from sophisticated hardware attacks. While there have been many works addressing performance and other system level issues in secure processor design, power issues have largely been ignored. In this paper, we first analyze the sources of power (energy) increase in different secure processor architectures. We then present a power analysis of various secure processor architectures in terms of their increase in power consumption over a base system with no protection and then provide recommendations for designs that offer the best balance between performance and power without compromising security. We extend our study to the embedded domain as well. We also outline the design of a novel hybrid cryptographic engine that can be used to minimize the power consumption for a secure processor. We believe that if secure processors are to be adopted in future systems (general purpose or embedded), it is critically important that power issues are considered in addition to performance and other system level issues. To the best of our knowledge, this is the first work to examine the power implications of providing hardware mechanisms for security.

  13. Use of Digital Signal Processors (DSP) in high energy physics experiments

    International Nuclear Information System (INIS)

    Crosetto, D.

    1988-01-01

    The FDDP - Fast Digital Data Processor - is a modular system for executing parallel digital processing algorithms to perform programmable trigger decisions or programmable on-line data reduction. Typical application involve zero suppression and pulse shape analysis. The characteristics of the system are: modularity, expandability and flexibility. (author). 4 refs, 5 figs

  14. Embedded SoPC Design with Nios II Processor and Verilog Examples

    CERN Document Server

    Chu, Pong P

    2012-01-01

    Explores the unique hardware programmability of FPGA-based embedded systems, using a learn-by-doing approach to introduce the concepts and techniques for embedded SoPC design with Verilog An SoPC (system on a programmable chip) integrates a processor, memory modules, I/O peripherals, and custom hardware accelerators into a single FPGA (field-programmable gate array) device. In addition to the customized software, customized hardware can be developed and incorporated into the embedded system as well-allowing us to configure the soft-core processor, create tailored I/O interfaces, and develop s

  15. Processors and systems (picture processing)

    Energy Technology Data Exchange (ETDEWEB)

    Gemmar, P

    1983-01-01

    Automatic picture processing requires high performance computers and high transmission capacities in the processor units. The author examines the possibilities of operating processors in parallel in order to accelerate the processing of pictures. He therefore discusses a number of available processors and systems for picture processing and illustrates their capacities for special types of picture processing. He stresses the fact that the amount of storage required for picture processing is exceptionally high. The author concludes that it is as yet difficult to decide whether very large groups of simple processors or highly complex multiprocessor systems will provide the best solution. Both methods will be aided by the development of VLSI. New solutions have already been offered (systolic arrays and 3-d processing structures) but they also are subject to losses caused by inherently parallel algorithms. Greater efforts must be made to produce suitable software for multiprocessor systems. Some possibilities for future picture processing systems are discussed. 33 references.

  16. Seismometer array station processors

    International Nuclear Information System (INIS)

    Key, F.A.; Lea, T.G.; Douglas, A.

    1977-01-01

    A description is given of the design, construction and initial testing of two types of Seismometer Array Station Processor (SASP), one to work with data stored on magnetic tape in analogue form, the other with data in digital form. The purpose of a SASP is to detect the short period P waves recorded by a UK-type array of 20 seismometers and to edit these on to a a digital library tape or disc. The edited data are then processed to obtain a rough location for the source and to produce seismograms (after optimum processing) for analysis by a seismologist. SASPs are an important component in the scheme for monitoring underground explosions advocated by the UK in the Conference of the Committee on Disarmament. With digital input a SASP can operate at 30 times real time using a linear detection process and at 20 times real time using the log detector of Weichert. Although the log detector is slower, it has the advantage over the linear detector that signals with lower signal-to-noise ratio can be detected and spurious large amplitudes are less likely to produce a detection. It is recommended, therefore, that where possible array data should be recorded in digital form for input to a SASP and that the log detector of Weichert be used. Trial runs show that a SASP is capable of detecting signals down to signal-to-noise ratios of about two with very few false detections, and at mid-continental array sites it should be capable of detecting most, if not all, the signals with magnitude above msub(b) 4.5; the UK argues that, given a suitable network, it is realistic to hope that sources of this magnitude and above can be detected and identified by seismological means alone. (author)

  17. Programme documentation to control programme for Solar-tracker; Programdokumentation til styringsprogram til Solar-tracker

    Energy Technology Data Exchange (ETDEWEB)

    Rudbeck, C.

    1995-07-01

    The report contains the programme documentation partly for a programme to control of a tracking system and partly a programme, which uses this programme to make measurements of transmittance for covering layer. Both the transmittance measurement programme and the programme is built in Borland Pascal v7.0, and is compiled in Real mode for the use on a processor of the 80X86-family. The source code for the programme for transmittance measurements and the programmes (the positioning routines) are described in Appendix B. (EHS)

  18. Modcomp MAX IV System Processors reference guide

    Energy Technology Data Exchange (ETDEWEB)

    Cummings, J.

    1990-10-01

    A user almost always faces a big problem when having to learn to use a new computer system. The information necessary to use the system is often scattered throughout many different manuals. The user also faces the problem of extracting the information really needed from each manual. Very few computer vendors supply a single Users Guide or even a manual to help the new user locate the necessary manuals. Modcomp is no exception to this, Modcomp MAX IV requires that the user be familiar with the system file usage which adds to the problem. At General Atomics there is an ever increasing need for new users to learn how to use the Modcomp computers. This paper was written to provide a condensed Users Reference Guide'' for Modcomp computer users. This manual should be of value not only to new users but any users that are not Modcomp computer systems experts. This Users Reference Guide'' is intended to provided the basic information for the use of the various Modcomp System Processors necessary to, create, compile, link-edit, and catalog a program. Only the information necessary to provide the user with a basic understanding of the Systems Processors is included. This document provides enough information for the majority of programmers to use the Modcomp computers without having to refer to any other manuals. A lot of emphasis has been placed on the file description and usage for each of the System Processors. This allows the user to understand how Modcomp MAX IV does things rather than just learning the system commands.

  19. A programmable artificial retina

    International Nuclear Information System (INIS)

    Bernard, T.M.; Zavidovique, B.Y.; Devos, F.J.

    1993-01-01

    An artificial retina is a device that intimately associates an imager with processing facilities on a monolithic circuit. Yet, except for simple environments and applications, analog hardware will not suffice to process and compact the raw image flow from the photosensitive array. To solve this output problem, an on-chip array of bare Boolean processors with halftoning facilities might be used, providing versatility from programmability. By setting the pixel memory size to 3 b, the authors have demonstrated both the technological practicality and the computational efficiency of this programmable Boolean retina concept. Using semi-static shifting structures together with some interaction circuitry, a minimal retina Boolean processor can be built with less than 30 transistors and controlled by as few as 6 global clock signals. The successful design, integration, and test of such a 65x76 Boolean retina on a 50-mm 2 CMOS 2-μm circuit are presented

  20. Event Pre Processor for the CZT Detector on MIRAX

    International Nuclear Information System (INIS)

    Kendziorra, Eckhard; Schanz, Thomas; Distratis, Giuseppe; Suchy, Slawomir

    2006-01-01

    We describe the Event Pre Processor (EPP) for the Hard X-ray Imager (HXI) on MIRAX. The EPP provides on board data reduction and event filtering for the HXI Cadmium Zinc Telluride strip detector. Emphasis is placed upon the EPP requirements, its implementation as VHDL design in a Field Programmable Gate Array (FPGA), and the description of a test environment for both the VHDL code and the FPGA hardware

  1. An end-to-end microfluidic platform for engineering life supporting microbes in space exploration missions, Phase I

    Data.gov (United States)

    National Aeronautics and Space Administration — HJ Science & Technology proposes a programmable, low-cost, and compact microfluidic platform capable of running automated end-to-end processes and optimization...

  2. Microfluidic Flame Barrier

    Science.gov (United States)

    Mungas, Gregory S. (Inventor); Fisher, David J. (Inventor); Mungas, Christopher (Inventor)

    2013-01-01

    Propellants flow through specialized mechanical hardware that is designed for effective and safe ignition and sustained combustion of the propellants. By integrating a micro-fluidic porous media element between a propellant feed source and the combustion chamber, an effective and reliable propellant injector head may be implemented that is capable of withstanding transient combustion and detonation waves that commonly occur during an ignition event. The micro-fluidic porous media element is of specified porosity or porosity gradient selected to be appropriate for a given propellant. Additionally the propellant injector head design integrates a spark ignition mechanism that withstands extremely hot running conditions without noticeable spark mechanism degradation.

  3. XL-100S microprogrammable processor

    International Nuclear Information System (INIS)

    Gorbunov, N.V.; Guzik, Z.; Sutulin, V.A.; Forytski, A.

    1983-01-01

    The XL-100S microprogrammable processor providing the multiprocessor operation mode in the XL system crate is described. The processor meets the EUR 6500 CAMAC standards, address up to 4 Mbyte memory, and interacts with 7 CAMAC branchas. Eight external requests initiate operations preset by a sequence of microcommands in a memory of the capacity up to 64 kwords of 32-Git. The microprocessor architecture allows one to emulate commands of the majority of mini- or micro-computers, including floating point operations. The XL-100S processor may be used in various branches of experimental physics: for physical experiment apparatus control, fast selection of useful physical events, organization of the of input/output operations, organization of direct assess to memory included, etc. The Am2900 microprocessor set is used as an elementary base. The device is made in the form of a single width CAMAC module

  4. Making CSB + -Trees Processor Conscious

    DEFF Research Database (Denmark)

    Samuel, Michael; Pedersen, Anders Uhl; Bonnet, Philippe

    2005-01-01

    of the CSB+-tree. We argue that it is necessary to consider a larger group of parameters in order to adapt CSB+-tree to processor architectures as different as Pentium and Itanium. We identify this group of parameters and study how it impacts the performance of CSB+-tree on Itanium 2. Finally, we propose......Cache-conscious indexes, such as CSB+-tree, are sensitive to the underlying processor architecture. In this paper, we focus on how to adapt the CSB+-tree so that it performs well on a range of different processor architectures. Previous work has focused on the impact of node size on the performance...... a systematic method for adapting CSB+-tree to new platforms. This work is a first step towards integrating CSB+-tree in MySQL’s heap storage manager....

  5. Java Processor Optimized for RTSJ

    Directory of Open Access Journals (Sweden)

    Tu Shiliang

    2007-01-01

    Full Text Available Due to the preeminent work of the real-time specification for Java (RTSJ, Java is increasingly expected to become the leading programming language in real-time systems. To provide a Java platform suitable for real-time applications, a Java processor which can execute Java bytecode is directly proposed in this paper. It provides efficient support in hardware for some mechanisms specified in the RTSJ and offers a simpler programming model through ameliorating the scoped memory of the RTSJ. The worst case execution time (WCET of the bytecodes implemented in this processor is predictable by employing the optimization method proposed in our previous work, in which all the processing interfering predictability is handled before bytecode execution. Further advantage of this method is to make the implementation of the processor simpler and suited to a low-cost FPGA chip.

  6. Using of opportunities of graphic processors for acceleration of scientific and technical calculations

    International Nuclear Information System (INIS)

    Dudnik, V.A.; Kudryavtsev, V.I.; Sereda, T.M.; Us, S.A.; Shestakov, M.V.

    2009-01-01

    The new opportunities of modern graphic processors (GPU) for acceleration of the scientific and technical calculations with the help of paralleling of a calculating task between the central processor and GPU are described. The description of using the technology NVIDIA CUDA for connection of parallel computing opportunities of GPU within the programme of the some intensive mathematical tasks is resulted. The examples of comparison of parameters of productivity in the process of these tasks' calculation without application of GPU and with use of opportunities NVIDIA CUDA for graphic processor GeForce 8800 are resulted

  7. Numerical Optimization in Microfluidics

    DEFF Research Database (Denmark)

    Jensen, Kristian Ejlebjærg

    2017-01-01

    Numerical modelling can illuminate the working mechanism and limitations of microfluidic devices. Such insights are useful in their own right, but one can take advantage of numerical modelling in a systematic way using numerical optimization. In this chapter we will discuss when and how numerical...... optimization is best used....

  8. Enzyme detection by microfluidics

    DEFF Research Database (Denmark)

    2013-01-01

    Microfluidic-implemented methods of detecting an enzyme, in particular a DNA-modifying enzyme, are provided, as well as methods for detecting a cell, or a microorganism expressing said enzyme. The enzyme is detected by providing a nucleic acid substrate, which is specifically targeted...... by that enzyme...

  9. Microfluidics for medical applications

    NARCIS (Netherlands)

    van den Berg, Albert; van den Berg, A.; Segerink, L.I.; Segerink, Loes Irene; Unknown, [Unknown

    2015-01-01

    Lab-on-a-chip devices for point of care diagnostics have been present in clinics for several years now. Alongside their continual development, research is underway to bring the organs and tissue on-a-chip to the patient, amongst other medical applications of microfluidics. This book provides the

  10. Chemistry in Microfluidic Channels

    Science.gov (United States)

    Chia, Matthew C.; Sweeney, Christina M.; Odom, Teri W.

    2011-01-01

    General chemistry introduces principles such as acid-base chemistry, mixing, and precipitation that are usually demonstrated in bulk solutions. In this laboratory experiment, we describe how chemical reactions can be performed in a microfluidic channel to show advanced concepts such as laminar fluid flow and controlled precipitation. Three sets of…

  11. Microfluidic isotachophoresis: A review

    Czech Academy of Sciences Publication Activity Database

    Smejkal, P.; Bottenus, D.; Breadmore, M. C.; Guijt, R. M.; Ivory, C. F.; Foret, František; Macka, M.

    2013-01-01

    Roč. 34, č. 11 (2013), s. 1493-1509 ISSN 0173-0835 R&D Projects: GA ČR(CZ) GAP301/11/2055 Institutional support: RVO:68081715 Keywords : chip * isotachophoresis * microfluidics * miniaturization Subject RIV: CB - Analytical Chemistry, Separation Impact factor: 3.161, year: 2013

  12. Optical Array Processor: Laboratory Results

    Science.gov (United States)

    Casasent, David; Jackson, James; Vaerewyck, Gerard

    1987-01-01

    A Space Integrating (SI) Optical Linear Algebra Processor (OLAP) is described and laboratory results on its performance in several practical engineering problems are presented. The applications include its use in the solution of a nonlinear matrix equation for optimal control and a parabolic Partial Differential Equation (PDE), the transient diffusion equation with two spatial variables. Frequency-multiplexed, analog and high accuracy non-base-two data encoding are used and discussed. A multi-processor OLAP architecture is described and partitioning and data flow issues are addressed.

  13. Fast processor for dilepton triggers

    International Nuclear Information System (INIS)

    Katsanevas, S.; Kostarakis, P.; Baltrusaitis, R.

    1983-01-01

    We describe a fast trigger processor, developed for and used in Fermilab experiment E-537, for selecting high-mass dimuon events produced by negative pions and anti-protons. The processor finds candidate tracks by matching hit information received from drift chambers and scintillation counters, and determines their momenta. Invariant masses are calculated for all possible pairs of tracks and an event is accepted if any invariant mass is greater than some preselectable minimum mass. The whole process, accomplished within 5 to 10 microseconds, achieves up to a ten-fold reduction in trigger rate

  14. Multipurpose silicon photonics signal processor core.

    Science.gov (United States)

    Pérez, Daniel; Gasulla, Ivana; Crudgington, Lee; Thomson, David J; Khokhar, Ali Z; Li, Ke; Cao, Wei; Mashanovich, Goran Z; Capmany, José

    2017-09-21

    Integrated photonics changes the scaling laws of information and communication systems offering architectural choices that combine photonics with electronics to optimize performance, power, footprint, and cost. Application-specific photonic integrated circuits, where particular circuits/chips are designed to optimally perform particular functionalities, require a considerable number of design and fabrication iterations leading to long development times. A different approach inspired by electronic Field Programmable Gate Arrays is the programmable photonic processor, where a common hardware implemented by a two-dimensional photonic waveguide mesh realizes different functionalities through programming. Here, we report the demonstration of such reconfigurable waveguide mesh in silicon. We demonstrate over 20 different functionalities with a simple seven hexagonal cell structure, which can be applied to different fields including communications, chemical and biomedical sensing, signal processing, multiprocessor networks, and quantum information systems. Our work is an important step toward this paradigm.Integrated optical circuits today are typically designed for a few special functionalities and require complex design and development procedures. Here, the authors demonstrate a reconfigurable but simple silicon waveguide mesh with different functionalities.

  15. A PEG-DA microfluidic device for chemotaxis studies

    International Nuclear Information System (INIS)

    Traore, Mahama Aziz; Behkam, Bahareh

    2013-01-01

    The study of cells in a well-defined and chemically programmable microenvironment is essential for a complete and fundamental understanding of the cell behaviors with respect to specific chemical compounds. Flow-free microfluidic devices that generate quasi-steady chemical gradients (spatially varying but temporally constant) have been demonstrated as effective chemotaxis assay platforms due to dissociating the effect of chemical cues from mechanical shear forces caused by fluid flow. In this work, we demonstrate the fabrication and characterization of a flow-free microfluidic platform made of polyethylene glycol diacrylate (PEG-DA) hydrogel. We have demonstrated that the mass transport properties of these devices can be customized by fabricating them from PEG-DA gels of four distinct molecular weights. In contrast to microfluidic devices developed using soft lithography; this class of devices can be realized using a more cost-effective approach of direct photopolymerization with fewer microfabrication steps. This microfluidic platform was tested by conducting a quantitative study of the chemotactic behavior of Escherichia coli (E. coli) RP437, a model microorganism, in presence of the chemo-effector, casamino-acids. Using the microfabrication and characterization methodology presented in this work, microfluidic platforms with well-defined and customizable diffusive properties can be developed to accommodate the study of a wide range of cell types. (paper)

  16. Predicting the behavior of microfluidic circuits made from discrete elements

    Science.gov (United States)

    Bhargava, Krisna C.; Thompson, Bryant; Iqbal, Danish; Malmstadt, Noah

    2015-10-01

    Microfluidic devices can be used to execute a variety of continuous flow analytical and synthetic chemistry protocols with a great degree of precision. The growing availability of additive manufacturing has enabled the design of microfluidic devices with new functionality and complexity. However, these devices are prone to larger manufacturing variation than is typical of those made with micromachining or soft lithography. In this report, we demonstrate a design-for-manufacturing workflow that addresses performance variation at the microfluidic element and circuit level, in context of mass-manufacturing and additive manufacturing. Our approach relies on discrete microfluidic elements that are characterized by their terminal hydraulic resistance and associated tolerance. Network analysis is employed to construct simple analytical design rules for model microfluidic circuits. Monte Carlo analysis is employed at both the individual element and circuit level to establish expected performance metrics for several specific circuit configurations. A protocol based on osmometry is used to experimentally probe mixing behavior in circuits in order to validate these approaches. The overall workflow is applied to two application circuits with immediate use at on the bench-top: series and parallel mixing circuits that are modularly programmable, virtually predictable, highly precise, and operable by hand.

  17. Predicting the behavior of microfluidic circuits made from discrete elements.

    Science.gov (United States)

    Bhargava, Krisna C; Thompson, Bryant; Iqbal, Danish; Malmstadt, Noah

    2015-10-30

    Microfluidic devices can be used to execute a variety of continuous flow analytical and synthetic chemistry protocols with a great degree of precision. The growing availability of additive manufacturing has enabled the design of microfluidic devices with new functionality and complexity. However, these devices are prone to larger manufacturing variation than is typical of those made with micromachining or soft lithography. In this report, we demonstrate a design-for-manufacturing workflow that addresses performance variation at the microfluidic element and circuit level, in context of mass-manufacturing and additive manufacturing. Our approach relies on discrete microfluidic elements that are characterized by their terminal hydraulic resistance and associated tolerance. Network analysis is employed to construct simple analytical design rules for model microfluidic circuits. Monte Carlo analysis is employed at both the individual element and circuit level to establish expected performance metrics for several specific circuit configurations. A protocol based on osmometry is used to experimentally probe mixing behavior in circuits in order to validate these approaches. The overall workflow is applied to two application circuits with immediate use at on the bench-top: series and parallel mixing circuits that are modularly programmable, virtually predictable, highly precise, and operable by hand.

  18. Very Long Instruction Word Processors

    Indian Academy of Sciences (India)

    Explicitly Parallel Instruction Computing (EPIC) is an instruction processing paradigm that has been in the spot- light due to its adoption by the next generation of Intel. Processors starting with the IA-64. The EPIC processing paradigm is an evolution of the Very Long Instruction. Word (VLIW) paradigm. This article gives an ...

  19. Microfluidic device, and related methods

    Science.gov (United States)

    Wong, Eric W. (Inventor)

    2010-01-01

    A method of making a microfluidic device is provided. The method features patterning a permeable wall on a substrate, and surrounding the permeable wall with a solid, non-permeable boundary structure to establish a microfluidic channel having a cross-sectional dimension less than 5,000 microns and a cross-sectional area at least partially filled with the permeable wall so that fluid flowing through the microfluidic channel at least partially passes through the permeable wall.

  20. VON WISPR Family Processors: Volume 1

    National Research Council Canada - National Science Library

    Wagstaff, Ronald

    1997-01-01

    ...) and the background noise they are embedded in. Processors utilizing those fluctuations such as the von WISPR Family Processors discussed herein, are methods or algorithms that preferentially attenuate the fluctuating signals and noise...

  1. Design Principles for Synthesizable Processor Cores

    DEFF Research Database (Denmark)

    Schleuniger, Pascal; McKee, Sally A.; Karlsson, Sven

    2012-01-01

    As FPGAs get more competitive, synthesizable processor cores become an attractive choice for embedded computing. Currently popular commercial processor cores do not fully exploit current FPGA architectures. In this paper, we propose general design principles to increase instruction throughput...

  2. Methods of making microfluidic devices

    KAUST Repository

    Buttner, Ulrich

    2017-06-01

    Microfluidics has advanced in terms of designs and structures, however, fabrication methods are either time consuming or expensive to produce, in terms of the facilities and equipment needed. A fast and economically viable method is provided to allow, for example, research groups to have access to microfluidic fabrication. Unlike most fabrication methods, a method is provided to fabricate a microfluidic device in one step. In an embodiment, a resolution of 50 micrometers was achieved by using maskless high-resolution digital light projection (MDLP). Bonding and channel fabrication of complex or simple structures can be rapidly incorporated to fabricate the microfluidic devices.

  3. Deterministic chaos in the processor load

    International Nuclear Information System (INIS)

    Halbiniak, Zbigniew; Jozwiak, Ireneusz J.

    2007-01-01

    In this article we present the results of research whose purpose was to identify the phenomenon of deterministic chaos in the processor load. We analysed the time series of the processor load during efficiency tests of database software. Our research was done on a Sparc Alpha processor working on the UNIX Sun Solaris 5.7 operating system. The conducted analyses proved the presence of the deterministic chaos phenomenon in the processor load in this particular case

  4. The Microfluidic Jukebox

    Science.gov (United States)

    Tan, Say Hwa; Maes, Florine; Semin, Benoît; Vrignon, Jérémy; Baret, Jean-Christophe

    2014-04-01

    Music is a form of art interweaving people of all walks of life. Through subtle changes in frequencies, a succession of musical notes forms a melody which is capable of mesmerizing the minds of people. With the advances in technology, we are now able to generate music electronically without relying solely on physical instruments. Here, we demonstrate a musical interpretation of droplet-based microfluidics as a form of novel electronic musical instruments. Using the interplay of electric field and hydrodynamics in microfluidic devices, well controlled frequency patterns corresponding to musical tracks are generated in real time. This high-speed modulation of droplet frequency (and therefore of droplet sizes) may also provide solutions that reconciles high-throughput droplet production and the control of individual droplet at production which is needed for many biochemical or material synthesis applications.

  5. Microfluidic redox battery.

    Science.gov (United States)

    Lee, Jin Wook; Goulet, Marc-Antoni; Kjeang, Erik

    2013-07-07

    A miniaturized microfluidic battery is proposed, which is the first membraneless redox battery demonstrated to date. This unique concept capitalizes on dual-pass flow-through porous electrodes combined with stratified, co-laminar flow to generate electrical power on-chip. The fluidic design is symmetric to allow for both charging and discharging operations in forward, reverse, and recirculation modes. The proof-of-concept device fabricated using low-cost materials integrated in a microfluidic chip is shown to produce competitive power levels when operated on a vanadium redox electrolyte. A complete charge/discharge cycle is performed to demonstrate its operation as a rechargeable battery, which is an important step towards providing sustainable power to lab-on-a-chip and microelectronic applications.

  6. JPP: A Java Pre-Processor

    OpenAIRE

    Kiniry, Joseph R.; Cheong, Elaine

    1998-01-01

    The Java Pre-Processor, or JPP for short, is a parsing pre-processor for the Java programming language. Unlike its namesake (the C/C++ Pre-Processor, cpp), JPP provides functionality above and beyond simple textual substitution. JPP's capabilities include code beautification, code standard conformance checking, class and interface specification and testing, and documentation generation.

  7. Microfluidic Biochip Design

    Science.gov (United States)

    Panzarella, Charles

    2004-01-01

    As humans prepare for the exploration of our solar system, there is a growing need for miniaturized medical and environmental diagnostic devices for use on spacecrafts, especially during long-duration space missions where size and power requirements are critical. In recent years, the biochip (or Lab-on-a- Chip) has emerged as a technology that might be able to satisfy this need. In generic terms, a biochip is a miniaturized microfluidic device analogous to the electronic microchip that ushered in the digital age. It consists of tiny microfluidic channels, pumps and valves that transport small amounts of sample fluids to biosensors that can perform a variety of tests on those fluids in near real time. It has the obvious advantages of being small, lightweight, requiring less sample fluids and reagents and being more sensitive and efficient than larger devices currently in use. Some of the desired space-based applications would be to provide smaller, more robust devices for analyzing blood, saliva and urine and for testing water and food supplies for the presence of harmful contaminants and microorganisms. Our group has undertaken the goal of adapting as well as improving upon current biochip technology for use in long-duration microgravity environments. In addition to developing computational models of the microfluidic channels, valves and pumps that form the basis of every biochip, we are also trying to identify potential problems that could arise in reduced gravity and develop solutions to these problems. One such problem is due to the prevalence of bubbly sample fluids in microgravity. A bubble trapped in a microfluidic channel could be detrimental to the operation of a biochip. Therefore, the process of bubble formation in microgravity needs to be studied, and a model of this process has been developed and used to understand how bubbles develop and move through biochip components. It is clear that some type of bubble filter would be necessary in Space, and

  8. Droplet based microfluidics

    International Nuclear Information System (INIS)

    Seemann, Ralf; Brinkmann, Martin; Pfohl, Thomas; Herminghaus, Stephan

    2012-01-01

    Droplet based microfluidics is a rapidly growing interdisciplinary field of research combining soft matter physics, biochemistry and microsystems engineering. Its applications range from fast analytical systems or the synthesis of advanced materials to protein crystallization and biological assays for living cells. Precise control of droplet volumes and reliable manipulation of individual droplets such as coalescence, mixing of their contents, and sorting in combination with fast analysis tools allow us to perform chemical reactions inside the droplets under defined conditions. In this paper, we will review available drop generation and manipulation techniques. The main focus of this review is not to be comprehensive and explain all techniques in great detail but to identify and shed light on similarities and underlying physical principles. Since geometry and wetting properties of the microfluidic channels are crucial factors for droplet generation, we also briefly describe typical device fabrication methods in droplet based microfluidics. Examples of applications and reaction schemes which rely on the discussed manipulation techniques are also presented, such as the fabrication of special materials and biophysical experiments.

  9. A Microfluidic Cell Concentrator

    Science.gov (United States)

    Warrick, Jay; Casavant, Ben; Frisk, Megan; Beebe, David

    2010-01-01

    Cell concentration via centrifugation is a ubiquitous step in many cell culture procedures. At the macroscale, centrifugation suffers from a number of limitations particularly when dealing with small numbers of cells (e.g., less than 50,000). On the other hand, typical microscale methods for cell concentration can affect cell physiology and bias readouts of cell behavior and function. In this paper, we present a microfluidic concentrator device that utilizes the effects of gravity to allow cells to gently settle out of a suspension into a collection region without the use of specific adhesion ligands. Dimensional analysis was performed to compare different device designs and was verified with flow modeling to optimize operational parameters. We are able to concentrate low-density cell suspensions in a microfluidic chamber, achieving a cell loss of only 1.1 ± 0.6% (SD, n=7) with no observed loss during a subsequent cell staining protocol which incorporates ~36 complete device volume replacements. This method provides a much needed interface between rare cell samples and microfluidic culture assays. PMID:20843010

  10. Microfluidics with fluid walls.

    Science.gov (United States)

    Walsh, Edmond J; Feuerborn, Alexander; Wheeler, James H R; Tan, Ann Na; Durham, William M; Foster, Kevin R; Cook, Peter R

    2017-10-10

    Microfluidics has great potential, but the complexity of fabricating and operating devices has limited its use. Here we describe a method - Freestyle Fluidics - that overcomes many key limitations. In this method, liquids are confined by fluid (not solid) walls. Aqueous circuits with any 2D shape are printed in seconds on plastic or glass Petri dishes; then, interfacial forces pin liquids to substrates, and overlaying an immiscible liquid prevents evaporation. Confining fluid walls are pliant and resilient; they self-heal when liquids are pipetted through them. We drive flow through a wide range of circuits passively by manipulating surface tension and hydrostatic pressure, and actively using external pumps. Finally, we validate the technology with two challenging applications - triggering an inflammatory response in human cells and chemotaxis in bacterial biofilms. This approach provides a powerful and versatile alternative to traditional microfluidics.The complexity of fabricating and operating microfluidic devices limits their use. Walsh et al. describe a method in which circuits are printed as quickly and simply as writing with a pen, and liquids in them are confined by fluid instead of solid walls.

  11. Microfluidic desalination : capacitive deionization on chip for microfluidic sample preparation

    NARCIS (Netherlands)

    Roelofs, Susan Helena

    2015-01-01

    The main aim of the work described in this thesis is to implement the desalination technique capacitive deionization (CDI) on a microfluidic chip to improve the reproducibility in the analysis of biological samples for drug development. Secondly, microfluidic CDI allows for the in situ study of ion

  12. Digital implementation of the preloaded filter pulse processor

    International Nuclear Information System (INIS)

    Westphal, G.P.; Cadek, G.R.; Keroe, N.; Sauter, TH.; Thorwartl, P.C.

    1995-01-01

    Adapting it's processing time to the respective pulse intervals, the Preloaded Filter (PLF) pulse processor offers optimum resolution together with highest possible throughput rates. The PLF algorithm could be formulated in a recursive manner which made possible it's implementation by means of a large field-programmable gate array, as a fast, pipe-lined digital processor with 10 MHz maximum throughput rate. While pre-filter digitization by an ADC with 12 bit resolution and 10M Hz sampling rate resulted in a poorer resolution than that of an analog filter, a digital PLF based on an ADC with 14 bit resolution and 10 MHz sampling rate, surpassed high-quality analog filters in resolution, throughput rate and long-term stability. (author) 6 refs.; 7 figs

  13. Online Fastbus processor for LEP

    International Nuclear Information System (INIS)

    Mueller, H.

    1986-01-01

    The author describes the online computing aspects of Fastbus systems using a processor module which has been developed at CERN and is now available commercially. These General Purpose Master/Slaves (GPMS) are based on 68000/10 (or optionally 68020/68881) processors. Applications include use as event-filters (DELPHI), supervisory controllers, Fastbus stand-alone diagnostic tools, and multiprocessor array components. The direct mapping of single, 32-bit assembly instructions to execute Fastbus protocols makes the use of a GPM both simple and flexible. Loosely coupled processing in Fastbus networks is possible between GPM's as they support access semaphores and use a two port memory as I/O buffer for Fastbus. Both master and slave-ports support block transfers up to 20 Mbytes/s. The CERN standard Fastbus software and the MoniCa symbolic debugging monitor are available on the GPM with real time, multiprocessing support. (Auth.)

  14. Invasive tightly coupled processor arrays

    CERN Document Server

    LARI, VAHID

    2016-01-01

    This book introduces new massively parallel computer (MPSoC) architectures called invasive tightly coupled processor arrays. It proposes strategies, architecture designs, and programming interfaces for invasive TCPAs that allow invading and subsequently executing loop programs with strict requirements or guarantees of non-functional execution qualities such as performance, power consumption, and reliability. For the first time, such a configurable processor array architecture consisting of locally interconnected VLIW processing elements can be claimed by programs, either in full or in part, using the principle of invasive computing. Invasive TCPAs provide unprecedented energy efficiency for the parallel execution of nested loop programs by avoiding any global memory access such as GPUs and may even support loops with complex dependencies such as loop-carried dependencies that are not amenable to parallel execution on GPUs. For this purpose, the book proposes different invasion strategies for claiming a desire...

  15. MICROFLUIDIC COMPONENT CAPABLE OF SELF-SEALING

    DEFF Research Database (Denmark)

    2009-01-01

    A microfluidic component (100) for building a microfluidic system is provided. The microfluidic component (100) can be mounted on a microf luidic breadboard (202) in a manner that allows it to be connected to other microfluidic components (204, 206) without the requirement of additional devices....... The microfluidic component (100) comprises at least one flexible tube piece (102) for transporting a fluid. The microfluidic component (100) also comprises means for applying and maintaining pressure (104) between the flexible tube piece (102) and a tube piece (208, 210) housed in another microfluidic component...

  16. Microfluidic Cell Culture Device

    Science.gov (United States)

    Takayama, Shuichi (Inventor); Cabrera, Lourdes Marcella (Inventor); Heo, Yun Seok (Inventor); Smith, Gary Daniel (Inventor)

    2014-01-01

    Microfluidic devices for cell culturing and methods for using the same are disclosed. One device includes a substrate and membrane. The substrate includes a reservoir in fluid communication with a passage. A bio-compatible fluid may be added to the reservoir and passage. The reservoir is configured to receive and retain at least a portion of a cell mass. The membrane acts as a barrier to evaporation of the bio-compatible fluid from the passage. A cover fluid may be added to cover the bio-compatible fluid to prevent evaporation of the bio-compatible fluid.

  17. Microfluidic Scintillation Detectors

    CERN Multimedia

    Microfluidic scintillation detectors are devices of recent introduction for the detection of high energy particles, developed within the EP-DT group at CERN. Most of the interest for such technology comes from the use of liquid scintillators, which entails the possibility of changing the active material in the detector, leading to an increased radiation resistance. This feature, together with the high spatial resolution and low thickness deriving from the microfabrication techniques used to manufacture such devices, is desirable not only in instrumentation for high energy physics experiments but also in medical detectors such as beam monitors for hadron therapy.

  18. Spatial manipulation with microfluidics

    Directory of Open Access Journals (Sweden)

    Benjamin eLin

    2015-04-01

    Full Text Available Biochemical gradients convey information through space, time, and concentration, and are ultimately capable of spatially resolving distinct cellular phenotypes, such as differentiation, proliferation, and migration. How these gradients develop, evolve, and function during development, homeostasis, and various disease states is a subject of intense interest across a variety of disciplines. Microfluidic technologies have become essential tools for investigating gradient sensing in vitro due to their ability to precisely manipulate fluids on demand in well controlled environments at cellular length scales. This minireview will highlight their utility for studying gradient sensing along with relevant applications to biology.

  19. A general-purpose trigger processor system and its application to fast vertex trigger

    International Nuclear Information System (INIS)

    Hazumi, M.; Banas, E.; Natkaniec, Z.; Ostrowicz, W.

    1997-12-01

    A general-purpose hardware trigger system has been developed. The system comprises programmable trigger processors and pattern generator/samplers. The hardware design of the system is described. An application as a prototype of the very fast vertex trigger in an asymmetric B-factory at KEK is also explained. (author)

  20. Microfluidic fuel cells and batteries

    CERN Document Server

    Kjeang, Erik

    2014-01-01

    Microfluidic fuel cells and batteries represent a special type of electrochemical power generators that can be miniaturized and integrated in a microfluidic chip. Summarizing the initial ten years of research and development in this emerging field, this SpringerBrief is the first book dedicated to microfluidic fuel cell and battery technology for electrochemical energy conversion and storage. Written at a critical juncture, where strategically applied research is urgently required to seize impending technology opportunities for commercial, analytical, and educational utility, the intention is

  1. Broadband set-top box using MAP-CA processor

    Science.gov (United States)

    Bush, John E.; Lee, Woobin; Basoglu, Chris

    2001-12-01

    Advances in broadband access are expected to exert a profound impact in our everyday life. It will be the key to the digital convergence of communication, computer and consumer equipment. A common thread that facilitates this convergence comprises digital media and Internet. To address this market, Equator Technologies, Inc., is developing the Dolphin broadband set-top box reference platform using its MAP-CA Broadband Signal ProcessorT chip. The Dolphin reference platform is a universal media platform for display and presentation of digital contents on end-user entertainment systems. The objective of the Dolphin reference platform is to provide a complete set-top box system based on the MAP-CA processor. It includes all the necessary hardware and software components for the emerging broadcast and the broadband digital media market based on IP protocols. Such reference design requires a broadband Internet access and high-performance digital signal processing. By using the MAP-CA processor, the Dolphin reference platform is completely programmable, allowing various codecs to be implemented in software, such as MPEG-2, MPEG-4, H.263 and proprietary codecs. The software implementation also enables field upgrades to keep pace with evolving technology and industry demands.

  2. Design and implementation of a high performance network security processor

    Science.gov (United States)

    Wang, Haixin; Bai, Guoqiang; Chen, Hongyi

    2010-03-01

    The last few years have seen many significant progresses in the field of application-specific processors. One example is network security processors (NSPs) that perform various cryptographic operations specified by network security protocols and help to offload the computation intensive burdens from network processors (NPs). This article presents a high performance NSP system architecture implementation intended for both internet protocol security (IPSec) and secure socket layer (SSL) protocol acceleration, which are widely employed in virtual private network (VPN) and e-commerce applications. The efficient dual one-way pipelined data transfer skeleton and optimised integration scheme of the heterogenous parallel crypto engine arrays lead to a Gbps rate NSP, which is programmable with domain specific descriptor-based instructions. The descriptor-based control flow fragments large data packets and distributes them to the crypto engine arrays, which fully utilises the parallel computation resources and improves the overall system data throughput. A prototyping platform for this NSP design is implemented with a Xilinx XC3S5000 based FPGA chip set. Results show that the design gives a peak throughput for the IPSec ESP tunnel mode of 2.85 Gbps with over 2100 full SSL handshakes per second at a clock rate of 95 MHz.

  3. 3081/E processor and its on-line use

    International Nuclear Information System (INIS)

    Rankin, P.; Bricaud, B.; Gravina, M.

    1985-05-01

    The 3081/E is a second generation emulator of a mainframe IBM. One of it's applications will be to form part of the data acquisition system of the upgraded Mark II detector for data taking at the SLAC linear collider. Since the processor does not have direct connections to I/O devices a FASTBUS interface will be provided to allow communication with both SLAC Scanner Processors (which are responsible for the accumulation of data at a crate level) and the experiment's VAX 8600 mainframe. The 3081/E's will supply a significant amount of on-line computing power to the experiment (a single 3081/E is equivalent to 4 to 5 VAX 11/780's). A major advantage of the 3081/E is that program development can be done on an IBM mainframe (such as the one used for off-line analysis) which gives the programmer access to a full range of debugging tools. The processor's performance can be continually monitored by comparison of the results obtained using it to those given when the same program is run on an IBM computer. 9 refs

  4. Accuracies Of Optical Processors For Adaptive Optics

    Science.gov (United States)

    Downie, John D.; Goodman, Joseph W.

    1992-01-01

    Paper presents analysis of accuracies and requirements concerning accuracies of optical linear-algebra processors (OLAP's) in adaptive-optics imaging systems. Much faster than digital electronic processor and eliminate some residual distortion. Question whether errors introduced by analog processing of OLAP overcome advantage of greater speed. Paper addresses issue by presenting estimate of accuracy required in general OLAP that yields smaller average residual aberration of wave front than digital electronic processor computing at given speed.

  5. Functional Verification of Enhanced RISC Processor

    OpenAIRE

    SHANKER NILANGI; SOWMYA L

    2013-01-01

    This paper presents design and verification of a 32-bit enhanced RISC processor core having floating point computations integrated within the core, has been designed to reduce the cost and complexity. The designed 3 stage pipelined 32-bit RISC processor is based on the ARM7 processor architecture with single precision floating point multiplier, floating point adder/subtractor for floating point operations and 32 x 32 booths multiplier added to the integer core of ARM7. The binary representati...

  6. Alternative Water Processor Test Development

    Science.gov (United States)

    Pickering, Karen D.; Mitchell, Julie; Vega, Leticia; Adam, Niklas; Flynn, Michael; Wjee (er. Rau); Lunn, Griffin; Jackson, Andrew

    2012-01-01

    The Next Generation Life Support Project is developing an Alternative Water Processor (AWP) as a candidate water recovery system for long duration exploration missions. The AWP consists of biological water processor (BWP) integrated with a forward osmosis secondary treatment system (FOST). The basis of the BWP is a membrane aerated biological reactor (MABR), developed in concert with Texas Tech University. Bacteria located within the MABR metabolize organic material in wastewater, converting approximately 90% of the total organic carbon to carbon dioxide. In addition, bacteria convert a portion of the ammonia-nitrogen present in the wastewater to nitrogen gas, through a combination of nitrogen and denitrification. The effluent from the BWP system is low in organic contaminants, but high in total dissolved solids. The FOST system, integrated downstream of the BWP, removes dissolved solids through a combination of concentration-driven forward osmosis and pressure driven reverse osmosis. The integrated system is expected to produce water with a total organic carbon less than 50 mg/l and dissolved solids that meet potable water requirements for spaceflight. This paper describes the test definition, the design of the BWP and FOST subsystems, and plans for integrated testing.

  7. The UA1 trigger processor

    International Nuclear Information System (INIS)

    Grayer, G.H.

    1981-01-01

    Experiment UA1 is a large multi-purpose spectrometer at the CERN proton-antiproton collider, scheduled for late 1981. The principal trigger is formed on the basis of the energy deposition in calorimeters. A trigger decision taken in under 2.4 microseconds can avoid dead time losses due to the bunched nature of the beam. To achieve this we have built fast 8-bit charge to digital converters followed by two identical digital processors tailored to the experiment. The outputs of groups of the 2440 photomultipliers in the calorimeters are summed to form a total of 288 input channels to the ADCs. A look-up table in RAM is used to convert the digitised photomultiplier signals to energy in one processor, combinations of input channels, and also counts the number of clusters with electromagnetic or hadronic energy above pre-determined levels. Up to twelve combinations of these conditions, together with external information, may be combined in coincidence or in veto to form the final trigger. Provision has been made for testing using simulated data in an off-line mode, and sampling real data when on-line. (orig.)

  8. High-Level Design for Ultra-Fast Software Defined Radio Prototyping on Multi-Processors Heterogeneous Platforms

    OpenAIRE

    Moy , Christophe; Raulet , Mickaël

    2010-01-01

    International audience; The design of Software Defined Radio (SDR) equipments (terminals, base stations, etc.) is still very challenging. We propose here a design methodology for ultra-fast prototyping on heterogeneous platforms made of GPPs (General Purpose Processors), DSPs (Digital Signal Processors) and FPGAs (Field Programmable Gate Array). Lying on a component-based approach, the methodology mainly aims at automating as much as possible the design from an algorithmic validation to a mul...

  9. Data register and processor for multiwire chambers

    International Nuclear Information System (INIS)

    Karpukhin, V.V.

    1985-01-01

    A data register and a processor for data receiving and processing from drift chambers of a device for investigating relativistic positroniums are described. The data are delivered to the register input in the form of the Grey 8 bit code, memorized and transformed to a position code. The register information is delivered to the KAMAK trunk and to the front panel plug. The processor selects particle tracks in a horizontal plane of the facility. ΔY maximum coordinate divergence and minimum point quantity on the track are set from the processor front panel. Processor solution time is 16 μs maximum quantity of simultaneously analyzed coordinates is 16

  10. Many - body simulations using an array processor

    International Nuclear Information System (INIS)

    Rapaport, D.C.

    1985-01-01

    Simulations of microscopic models of water and polypeptides using molecular dynamics and Monte Carlo techniques have been carried out with the aid of an FPS array processor. The computational techniques are discussed, with emphasis on the development and optimization of the software to take account of the special features of the processor. The computing requirements of these simulations exceed what could be reasonably carried out on a normal 'scientific' computer. While the FPS processor is highly suited to the kinds of models described, several other computationally intensive problems in statistical mechanics are outlined for which alternative processor architectures are more appropriate

  11. Sensitometric control of roentgen film processors

    International Nuclear Information System (INIS)

    Forsberg, H.; Karolinska Sjukhuset, Stockholm

    1987-01-01

    Monitoring of film processors performance is essential since image quality, patient dose and costs are influenced by the performance. A system for sensitometric constancy control of film processors and their associated components is described. Experience with the system for 3 years is given when implemented on 17 film processors. Modern high quality film processors have a stability that makes a test frequency of once a week sufficient to maintain adequate image quality. The test system is so sensitive that corrective actions almost invariably have been taken before any technical problem degraded the image quality to a visible degree. (orig.)

  12. Methods of making microfluidic devices

    KAUST Repository

    Buttner, Ulrich; Mashraei, Yousof; Agambayev, Sumeyra; Salama, Khaled N.

    2017-01-01

    Microfluidics has advanced in terms of designs and structures, however, fabrication methods are either time consuming or expensive to produce, in terms of the facilities and equipment needed. A fast and economically viable method is provided

  13. Microfluidic technology for molecular diagnostics.

    Science.gov (United States)

    Robinson, Tom; Dittrich, Petra S

    2013-01-01

    Molecular diagnostics have helped to improve the lives of millions of patients worldwide by allowing clinicians to diagnose patients earlier as well as providing better ongoing therapies. Point-of-care (POC) testing can bring these laboratory-based techniques to the patient in a home setting or to remote settings in the developing world. However, despite substantial progress in the field, there still remain many challenges. Progress in molecular diagnostics has benefitted greatly from microfluidic technology. This chapter aims to summarise the more recent advances in microfluidic-based molecular diagnostics. Sections include an introduction to microfluidic technology, the challenges of molecular diagnostics, how microfluidic advances are working to solve these issues, some alternative design approaches, and detection within these systems.

  14. Rapid mask prototyping for microfluidics.

    Science.gov (United States)

    Maisonneuve, B G C; Honegger, T; Cordeiro, J; Lecarme, O; Thiry, T; Fuard, D; Berton, K; Picard, E; Zelsmann, M; Peyrade, D

    2016-03-01

    With the rise of microfluidics for the past decade, there has come an ever more pressing need for a low-cost and rapid prototyping technology, especially for research and education purposes. In this article, we report a rapid prototyping process of chromed masks for various microfluidic applications. The process takes place out of a clean room, uses a commercially available video-projector, and can be completed in less than half an hour. We quantify the ranges of fields of view and of resolutions accessible through this video-projection system and report the fabrication of critical microfluidic components (junctions, straight channels, and curved channels). To exemplify the process, three common devices are produced using this method: a droplet generation device, a gradient generation device, and a neuro-engineering oriented device. The neuro-engineering oriented device is a compartmentalized microfluidic chip, and therefore, required the production and the precise alignment of two different masks.

  15. Passive microfluidic array card and reader

    Science.gov (United States)

    Dugan, Lawrence Christopher [Modesto, CA; Coleman, Matthew A [Oakland, CA

    2011-08-09

    A microfluidic array card and reader system for analyzing a sample. The microfluidic array card includes a sample loading section for loading the sample onto the microfluidic array card, a multiplicity of array windows, and a transport section or sections for transporting the sample from the sample loading section to the array windows. The microfluidic array card reader includes a housing, a receiving section for receiving the microfluidic array card, a viewing section, and a light source that directs light to the array window of the microfluidic array card and to the viewing section.

  16. Producing chopped firewood with firewood processors

    International Nuclear Information System (INIS)

    Kaerhae, K.; Jouhiaho, A.

    2009-01-01

    The TTS Institute's research and development project studied both the productivity of new, chopped firewood processors (cross-cutting and splitting machines) suitable for professional and independent small-scale production, and the costs of the chopped firewood produced. Seven chopped firewood processors were tested in the research, six of which were sawing processors and one shearing processor. The chopping work was carried out using wood feeding racks and a wood lifter. The work was also carried out without any feeding appliances. Altogether 132.5 solid m 3 of wood were chopped in the time studies. The firewood processor used had the most significant impact on chopping work productivity. In addition to the firewood processor, the stem mid-diameter, the length of the raw material, and of the firewood were also found to affect productivity. The wood feeding systems also affected productivity. If there is a feeding rack and hydraulic grapple loader available for use in chopping firewood, then it is worth using the wood feeding rack. A wood lifter is only worth using with the largest stems (over 20 cm mid-diameter) if a feeding rack cannot be used. When producing chopped firewood from small-diameter wood, i.e. with a mid-diameter less than 10 cm, the costs of chopping work were over 10 EUR solid m -3 with sawing firewood processors. The shearing firewood processor with a guillotine blade achieved a cost level of 5 EUR solid m -3 when the mid-diameter of the chopped stem was 10 cm. In addition to the raw material, the cost-efficient chopping work also requires several hundred annual operating hours with a firewood processor, which is difficult for individual firewood entrepreneurs to achieve. The operating hours of firewood processors can be increased to the required level by the joint use of the processors by a number of firewood entrepreneurs. (author)

  17. Enhanced Microfluidic Electromagnetic Measurements

    Science.gov (United States)

    Giovangrandi, Laurent (Inventor); Ricco, Antonio J. (Inventor); Kovacs, Gregory (Inventor)

    2015-01-01

    Techniques for enhanced microfluidic impedance spectroscopy include causing a core fluid to flow into a channel between two sheath flows of one or more sheath fluids different from the core fluid. Flow in the channel is laminar. A dielectric constant of a fluid constituting either sheath flow is much less than a dielectric constant of the core fluid. Electrical impedance is measured in the channel between at least a first pair of electrodes. In some embodiments, enhanced optical measurements include causing a core fluid to flow into a channel between two sheath flows of one or more sheath fluids different from the core fluid. An optical index of refraction of a fluid constituting either sheath flow is much less than an optical index of refraction of the core fluid. An optical property is measured in the channel.

  18. Bioanalysis in microfluidic devices.

    Science.gov (United States)

    Khandurina, Julia; Guttman, András

    2002-01-18

    Microfabricated bioanalytical devices (also referred to as laboratory-on-a-chip or micro-TAS) offer highly efficient platforms for simultaneous analysis of a large number of biologically important molecules, possessing great potential for genome, proteome and metabolome studies. Development and implementation of microfluidic-based bioanalytical tools involves both established and evolving technologies, including microlithography, micromachining, micro-electromechanical systems technology and nanotechnology. This article provides an overview of the latest developments in the key device subject areas and the basic interdisciplinary technologies. Important aspects of DNA and protein analysis, interfacing issues and system integration are all thoroughly discussed, along with applications for this novel "synergized" technology in high-throughput separations of biologically important molecules. This review also gives a better understanding of how to utilize these technologies as well as to provide appropriate technical solutions to problems perceived as being more fundamental.

  19. Digital Microfluidics Sample Analyzer

    Science.gov (United States)

    Pollack, Michael G.; Srinivasan, Vijay; Eckhardt, Allen; Paik, Philip Y.; Sudarsan, Arjun; Shenderov, Alex; Hua, Zhishan; Pamula, Vamsee K.

    2010-01-01

    Three innovations address the needs of the medical world with regard to microfluidic manipulation and testing of physiological samples in ways that can benefit point-of-care needs for patients such as premature infants, for which drawing of blood for continuous tests can be life-threatening in their own right, and for expedited results. A chip with sample injection elements, reservoirs (and waste), droplet formation structures, fluidic pathways, mixing areas, and optical detection sites, was fabricated to test the various components of the microfluidic platform, both individually and in integrated fashion. The droplet control system permits a user to control droplet microactuator system functions, such as droplet operations and detector operations. Also, the programming system allows a user to develop software routines for controlling droplet microactuator system functions, such as droplet operations and detector operations. A chip is incorporated into the system with a controller, a detector, input and output devices, and software. A novel filler fluid formulation is used for the transport of droplets with high protein concentrations. Novel assemblies for detection of photons from an on-chip droplet are present, as well as novel systems for conducting various assays, such as immunoassays and PCR (polymerase chain reaction). The lab-on-a-chip (a.k.a., lab-on-a-printed-circuit board) processes physiological samples and comprises a system for automated, multi-analyte measurements using sub-microliter samples of human serum. The invention also relates to a diagnostic chip and system including the chip that performs many of the routine operations of a central labbased chemistry analyzer, integrating, for example, colorimetric assays (e.g., for proteins), chemiluminescence/fluorescence assays (e.g., for enzymes, electrolytes, and gases), and/or conductometric assays (e.g., for hematocrit on plasma and whole blood) on a single chip platform.

  20. Parallel imaging microfluidic cytometer.

    Science.gov (United States)

    Ehrlich, Daniel J; McKenna, Brian K; Evans, James G; Belkina, Anna C; Denis, Gerald V; Sherr, David H; Cheung, Man Ching

    2011-01-01

    By adding an additional degree of freedom from multichannel flow, the parallel microfluidic cytometer (PMC) combines some of the best features of fluorescence-activated flow cytometry (FCM) and microscope-based high-content screening (HCS). The PMC (i) lends itself to fast processing of large numbers of samples, (ii) adds a 1D imaging capability for intracellular localization assays (HCS), (iii) has a high rare-cell sensitivity, and (iv) has an unusual capability for time-synchronized sampling. An inability to practically handle large sample numbers has restricted applications of conventional flow cytometers and microscopes in combinatorial cell assays, network biology, and drug discovery. The PMC promises to relieve a bottleneck in these previously constrained applications. The PMC may also be a powerful tool for finding rare primary cells in the clinic. The multichannel architecture of current PMC prototypes allows 384 unique samples for a cell-based screen to be read out in ∼6-10 min, about 30 times the speed of most current FCM systems. In 1D intracellular imaging, the PMC can obtain protein localization using HCS marker strategies at many times for the sample throughput of charge-coupled device (CCD)-based microscopes or CCD-based single-channel flow cytometers. The PMC also permits the signal integration time to be varied over a larger range than is practical in conventional flow cytometers. The signal-to-noise advantages are useful, for example, in counting rare positive cells in the most difficult early stages of genome-wide screening. We review the status of parallel microfluidic cytometry and discuss some of the directions the new technology may take. Copyright © 2011 Elsevier Inc. All rights reserved.

  1. Micro processors for plant protection

    International Nuclear Information System (INIS)

    McAffer, N.T.C.

    1976-01-01

    Micro computers can be used satisfactorily in general protection duties with economic advantages over hardwired systems. The reliability of such protection functions can be enhanced by keeping the task performed by each protection micro processor simple and by avoiding such a task being dependent on others in any substantial way. This implies that vital work done for any task is kept within it and that any communications from it to outside or to it from outside are restricted to those for controlling data transfer. Also that the amount of this data should be the minimum consistent with satisfactory task execution. Technology is changing rapidly and devices may become obsolete and be supplanted by new ones before their theoretical reliability can be confirmed or otherwise by field service. This emphasises the need for users to pool device performance data so that effective reliability judgements can be made within the lifetime of the devices. (orig.) [de

  2. Towards a Process Algebra for Shared Processors

    DEFF Research Database (Denmark)

    Buchholtz, Mikael; Andersen, Jacob; Løvengreen, Hans Henrik

    2002-01-01

    We present initial work on a timed process algebra that models sharing of processor resources allowing preemption at arbitrary points in time. This enables us to model both the functional and the timely behaviour of concurrent processes executed on a single processor. We give a refinement relation...

  3. Vector and parallel processors in computational science

    International Nuclear Information System (INIS)

    Duff, I.S.; Reid, J.K.

    1985-01-01

    These proceedings contain the articles presented at the named conference. These concern hardware and software for vector and parallel processors, numerical methods and algorithms for the computation on such processors, as well as applications of such methods to different fields of physics and related sciences. See hints under the relevant topics. (HSI)

  4. The communication processor of TUMULT-64

    NARCIS (Netherlands)

    Smit, Gerardus Johannes Maria; Jansen, P.G.

    1988-01-01

    Tumult (Twente University MULTi-processor system) is a modular extendible multi-processor system designed and implemented at the Twente University of Technology in co-operation with Oce Nederland B.V. and the Dr. Neher Laboratories (Dutch PTT). Characteristics of the hardware are: MIMD type,

  5. An interactive parallel processor for data analysis

    International Nuclear Information System (INIS)

    Mong, J.; Logan, D.; Maples, C.; Rathbun, W.; Weaver, D.

    1984-01-01

    A parallel array of eight minicomputers has been assembled in an attempt to deal with kiloparameter data events. By exporting computer system functions to a separate processor, the authors have been able to achieve computer amplification linearly proportional to the number of executing processors

  6. Comparison of Processor Performance of SPECint2006 Benchmarks of some Intel Xeon Processors

    OpenAIRE

    Abdul Kareem PARCHUR; Ram Asaray SINGH

    2012-01-01

    High performance is a critical requirement to all microprocessors manufacturers. The present paper describes the comparison of performance in two main Intel Xeon series processors (Type A: Intel Xeon X5260, X5460, E5450 and L5320 and Type B: Intel Xeon X5140, 5130, 5120 and E5310). The microarchitecture of these processors is implemented using the basis of a new family of processors from Intel starting with the Pentium 4 processor. These processors can provide a performance boost for many ke...

  7. Development of a highly reliable CRT processor

    International Nuclear Information System (INIS)

    Shimizu, Tomoya; Saiki, Akira; Hirai, Kenji; Jota, Masayoshi; Fujii, Mikiya

    1996-01-01

    Although CRT processors have been employed by the main control board to reduce the operator's workload during monitoring, the control systems are still operated by hardware switches. For further advancement, direct controller operation through a display device is expected. A CRT processor providing direct controller operation must be as reliable as the hardware switches are. The authors are developing a new type of highly reliable CRT processor that enables direct controller operations. In this paper, we discuss the design principles behind a highly reliable CRT processor. The principles are defined by studies of software reliability and of the functional reliability of the monitoring and operation systems. The functional configuration of an advanced CRT processor is also addressed. (author)

  8. Computer Generated Inputs for NMIS Processor Verification

    International Nuclear Information System (INIS)

    J. A. Mullens; J. E. Breeding; J. A. McEvers; R. W. Wysor; L. G. Chiang; J. R. Lenarduzzi; J. T. Mihalczo; J. K. Mattingly

    2001-01-01

    Proper operation of the Nuclear Identification Materials System (NMIS) processor can be verified using computer-generated inputs [BIST (Built-In-Self-Test)] at the digital inputs. Preselected sequences of input pulses to all channels with known correlation functions are compared to the output of the processor. These types of verifications have been utilized in NMIS type correlation processors at the Oak Ridge National Laboratory since 1984. The use of this test confirmed a malfunction in a NMIS processor at the All-Russian Scientific Research Institute of Experimental Physics (VNIIEF) in 1998. The NMIS processor boards were returned to the U.S. for repair and subsequently used in NMIS passive and active measurements with Pu at VNIIEF in 1999

  9. Reversible thermo-pneumatic valves on centrifugal microfluidic platforms.

    Science.gov (United States)

    Aeinehvand, Mohammad Mahdi; Ibrahim, Fatimah; Harun, Sulaiman Wadi; Kazemzadeh, Amin; Rothan, Hussin A; Yusof, Rohana; Madou, Marc

    2015-08-21

    Centrifugal microfluidic systems utilize a conventional spindle motor to automate parallel biochemical assays on a single microfluidic disk. The integration of complex, sequential microfluidic procedures on these platforms relies on robust valving techniques that allow for the precise control and manipulation of fluid flow. The ability of valves to consistently return to their former conditions after each actuation plays a significant role in the real-time manipulation of fluidic operations. In this paper, we introduce an active valving technique that operates based on the deflection of a latex film with the potential for real-time flow manipulation in a wide range of operational spinning speeds. The reversible thermo-pneumatic valve (RTPV) seals or reopens an inlet when a trapped air volume is heated or cooled, respectively. The RTPV is a gas-impermeable valve composed of an air chamber enclosed by a latex membrane and a specially designed liquid transition chamber that enables the efficient usage of the applied thermal energy. Inputting thermo-pneumatic (TP) energy into the air chamber deflects the membrane into the liquid transition chamber against an inlet, sealing it and thus preventing fluid flow. From this point, a centrifugal pressure higher than the induced TP pressure in the air chamber reopens the fluid pathway. The behaviour of this newly introduced reversible valving system on a microfluidic disk is studied experimentally and theoretically over a range of rotational frequencies from 700 RPM to 2500 RPM. Furthermore, adding a physical component (e.g., a hemispherical rubber element) to induce initial flow resistance shifts the operational range of rotational frequencies of the RTPV to more than 6000 RPM. An analytical solution for the cooling of a heated RTPV on a spinning disk is also presented, which highlights the need for the future development of time-programmable RTPVs. Moreover, the reversibility and gas impermeability of the RTPV in the

  10. Integrated lenses in polystyrene microfluidic devices

    KAUST Repository

    Fan, Yiqiang; Li, Huawei; Foulds, Ian G.

    2013-01-01

    This paper reports a new method for integrating microlenses into microfluidic devices for improved observation. Two demonstration microfluidic devices were provided which were fabricated using this new technique. The integrated microlenses were

  11. Manipulation of microfluidic droplets by electrorheological fluid

    KAUST Repository

    Zhang, Menying; Gong, Xiuqing; Wen, Weijia

    2009-01-01

    Microfluidics, especially droplet microfluidics, attracts more and more researchers from diverse fields, because it requires fewer materials and less time, produces less waste and has the potential of highly integrated and computer

  12. Microfluidic standardization: Past, present and future

    NARCIS (Netherlands)

    Heeren, H. van; Atkins, T.; Blom, M.; Bullema, J.E.; Tantra, R.; Verhoeven, D.; Verplanck, N.

    2016-01-01

    This paper addresses the issue of standardization in microfluidics. It contains the main points of an industry wide agreement about microfluidic port pitches and port nomenclature. It also addresses device classification and future steps.

  13. Analytical Bounds on the Threads in IXP1200 Network Processor

    OpenAIRE

    Ramakrishna, STGS; Jamadagni, HS

    2003-01-01

    Increasing link speeds have placed enormous burden on the processing requirements and the processors are expected to carry out a variety of tasks. Network Processors (NP) [1] [2] is the blanket name given to the processors, which are traded for flexibility and performance. Network Processors are offered by a number of vendors; to take the main burden of processing requirement of network related operations from the conventional processors. The Network Processors cover a spectrum of design trad...

  14. Effect of processor temperature on film dosimetry

    International Nuclear Information System (INIS)

    Srivastava, Shiv P.; Das, Indra J.

    2012-01-01

    Optical density (OD) of a radiographic film plays an important role in radiation dosimetry, which depends on various parameters, including beam energy, depth, field size, film batch, dose, dose rate, air film interface, postexposure processing time, and temperature of the processor. Most of these parameters have been studied for Kodak XV and extended dose range (EDR) films used in radiation oncology. There is very limited information on processor temperature, which is investigated in this study. Multiple XV and EDR films were exposed in the reference condition (d max. , 10 × 10 cm 2 , 100 cm) to a given dose. An automatic film processor (X-Omat 5000) was used for processing films. The temperature of the processor was adjusted manually with increasing temperature. At each temperature, a set of films was processed to evaluate OD at a given dose. For both films, OD is a linear function of processor temperature in the range of 29.4–40.6°C (85–105°F) for various dose ranges. The changes in processor temperature are directly related to the dose by a quadratic function. A simple linear equation is provided for the changes in OD vs. processor temperature, which could be used for correcting dose in radiation dosimetry when film is used.

  15. Optical Associative Processors For Visual Perception"

    Science.gov (United States)

    Casasent, David; Telfer, Brian

    1988-05-01

    We consider various associative processor modifications required to allow these systems to be used for visual perception, scene analysis, and object recognition. For these applications, decisions on the class of the objects present in the input image are required and thus heteroassociative memories are necessary (rather than the autoassociative memories that have been given most attention). We analyze the performance of both associative processors and note that there is considerable difference between heteroassociative and autoassociative memories. We describe associative processors suitable for realizing functions such as: distortion invariance (using linear discriminant function memory synthesis techniques), noise and image processing performance (using autoassociative memories in cascade with with a heteroassociative processor and with a finite number of autoassociative memory iterations employed), shift invariance (achieved through the use of associative processors operating on feature space data), and the analysis of multiple objects in high noise (which is achieved using associative processing of the output from symbolic correlators). We detail and provide initial demonstrations of the use of associative processors operating on iconic, feature space and symbolic data, as well as adaptive associative processors.

  16. Video image processor on the Spacelab 2 Solar Optical Universal Polarimeter /SL2 SOUP/

    Science.gov (United States)

    Lindgren, R. W.; Tarbell, T. D.

    1981-01-01

    The SOUP instrument is designed to obtain diffraction-limited digital images of the sun with high photometric accuracy. The Video Processor originated from the requirement to provide onboard real-time image processing, both to reduce the telemetry rate and to provide meaningful video displays of scientific data to the payload crew. This original concept has evolved into a versatile digital processing system with a multitude of other uses in the SOUP program. The central element in the Video Processor design is a 16-bit central processing unit based on 2900 family bipolar bit-slice devices. All arithmetic, logical and I/O operations are under control of microprograms, stored in programmable read-only memory and initiated by commands from the LSI-11. Several functions of the Video Processor are described, including interface to the High Rate Multiplexer downlink, cosmetic and scientific data processing, scan conversion for crew displays, focus and exposure testing, and use as ground support equipment.

  17. Development of Innovative Design Processor

    International Nuclear Information System (INIS)

    Park, Y.S.; Park, C.O.

    2004-01-01

    The nuclear design analysis requires time-consuming and erroneous model-input preparation, code run, output analysis and quality assurance process. To reduce human effort and improve design quality and productivity, Innovative Design Processor (IDP) is being developed. Two basic principles of IDP are the document-oriented design and the web-based design. The document-oriented design is that, if the designer writes a design document called active document and feeds it to a special program, the final document with complete analysis, table and plots is made automatically. The active documents can be written with ordinary HTML editors or created automatically on the web, which is another framework of IDP. Using the proper mix-up of server side and client side programming under the LAMP (Linux/Apache/MySQL/PHP) environment, the design process on the web is modeled as a design wizard style so that even a novice designer makes the design document easily. This automation using the IDP is now being implemented for all the reload design of Korea Standard Nuclear Power Plant (KSNP) type PWRs. The introduction of this process will allow large reduction in all reload design efforts of KSNP and provide a platform for design and R and D tasks of KNFC. (authors)

  18. Onboard spectral imager data processor

    Science.gov (United States)

    Otten, Leonard J.; Meigs, Andrew D.; Franklin, Abraham J.; Sears, Robert D.; Robison, Mark W.; Rafert, J. Bruce; Fronterhouse, Donald C.; Grotbeck, Ronald L.

    1999-10-01

    Previous papers have described the concept behind the MightySat II.1 program, the satellite's Fourier Transform imaging spectrometer's optical design, the design for the spectral imaging payload, and its initial qualification testing. This paper discusses the on board data processing designed to reduce the amount of downloaded data by an order of magnitude and provide a demonstration of a smart spaceborne spectral imaging sensor. Two custom components, a spectral imager interface 6U VME card that moves data at over 30 MByte/sec, and four TI C-40 processors mounted to a second 6U VME and daughter card, are used to adapt the sensor to the spacecraft and provide the necessary high speed processing. A system architecture that offers both on board real time image processing and high-speed post data collection analysis of the spectral data has been developed. In addition to the on board processing of the raw data into a usable spectral data volume, one feature extraction technique has been incorporated. This algorithm operates on the basic interferometric data. The algorithm is integrated within the data compression process to search for uploadable feature descriptions.

  19. Computerized microfluidic cell culture using elastomeric channels and Braille displays.

    Science.gov (United States)

    Gu, Wei; Zhu, Xiaoyue; Futai, Nobuyuki; Cho, Brenda S; Takayama, Shuichi

    2004-11-09

    Computer-controlled microfluidics would advance many types of cellular assays and microscale tissue engineering studies wherever spatiotemporal changes in fluidics need to be defined. However, this goal has been elusive because of the limited availability of integrated, programmable pumps and valves. This paper demonstrates how a refreshable Braille display, with its grid of 320 vertically moving pins, can power integrated pumps and valves through localized deformations of channel networks within elastic silicone rubber. The resulting computerized fluidic control is able to switch among: (i) rapid and efficient mixing between streams, (ii) multiple laminar flows with minimal mixing between streams, and (iii) segmented plug-flow of immiscible fluids within the same channel architecture. The same control method is used to precisely seed cells, compartmentalize them into distinct subpopulations through channel reconfiguration, and culture each cell subpopulation for up to 3 weeks under perfusion. These reliable microscale cell cultures showed gradients of cellular behavior from C2C12 myoblasts along channel lengths, as well as differences in cell density of undifferentiated myoblasts and differentiation patterns, both programmable through different flow rates of serum-containing media. This technology will allow future microscale tissue or cell studies to be more accessible, especially for high-throughput, complex, and long-term experiments. The microfluidic actuation method described is versatile and computer programmable, yet simple, well packaged, and portable enough for personal use.

  20. A data base processor semantics specification package

    Science.gov (United States)

    Fishwick, P. A.

    1983-01-01

    A Semantics Specification Package (DBPSSP) for the Intel Data Base Processor (DBP) is defined. DBPSSP serves as a collection of cross assembly tools that allow the analyst to assemble request blocks on the host computer for passage to the DBP. The assembly tools discussed in this report may be effectively used in conjunction with a DBP compatible data communications protocol to form a query processor, precompiler, or file management system for the database processor. The source modules representing the components of DBPSSP are fully commented and included.

  1. Hardware trigger processor for the MDT system

    CERN Document Server

    AUTHOR|(SzGeCERN)757787; The ATLAS collaboration; Hazen, Eric; Butler, John; Black, Kevin; Gastler, Daniel Edward; Ntekas, Konstantinos; Taffard, Anyes; Martinez Outschoorn, Verena; Ishino, Masaya; Okumura, Yasuyuki

    2017-01-01

    We are developing a low-latency hardware trigger processor for the Monitored Drift Tube system in the Muon spectrometer. The processor will fit candidate Muon tracks in the drift tubes in real time, improving significantly the momentum resolution provided by the dedicated trigger chambers. We present a novel pure-FPGA implementation of a Legendre transform segment finder, an associative-memory alternative implementation, an ARM (Zynq) processor-based track fitter, and compact ATCA carrier board architecture. The ATCA architecture is designed to allow a modular, staged approach to deployment of the system and exploration of alternative technologies.

  2. Microfluidic stretchable RF electronics.

    Science.gov (United States)

    Cheng, Shi; Wu, Zhigang

    2010-12-07

    Stretchable electronics is a revolutionary technology that will potentially create a world of radically different electronic devices and systems that open up an entirely new spectrum of possibilities. This article proposes a microfluidic based solution for stretchable radio frequency (RF) electronics, using hybrid integration of active circuits assembled on flex foils and liquid alloy passive structures embedded in elastic substrates, e.g. polydimethylsiloxane (PDMS). This concept was employed to implement a 900 MHz stretchable RF radiation sensor, consisting of a large area elastic antenna and a cluster of conventional rigid components for RF power detection. The integrated radiation sensor except the power supply was fully embedded in a thin elastomeric substrate. Good electrical performance of the standalone stretchable antenna as well as the RF power detection sub-module was verified by experiments. The sensor successfully detected the RF radiation over 5 m distance in the system demonstration. Experiments on two-dimensional (2D) stretching up to 15%, folding and twisting of the demonstrated sensor were also carried out. Despite the integrated device was severely deformed, no failure in RF radiation sensing was observed in the tests. This technique illuminates a promising route of realizing stretchable and foldable large area integrated RF electronics that are of great interest to a variety of applications like wearable computing, health monitoring, medical diagnostics, and curvilinear electronics.

  3. Field-programmable lab-on-a-chip based on microelectrode dot array architecture.

    Science.gov (United States)

    Wang, Gary; Teng, Daniel; Lai, Yi-Tse; Lu, Yi-Wen; Ho, Yingchieh; Lee, Chen-Yi

    2014-09-01

    The fundamentals of electrowetting-on-dielectric (EWOD) digital microfluidics are very strong: advantageous capability in the manipulation of fluids, small test volumes, precise dynamic control and detection, and microscale systems. These advantages are very important for future biochip developments, but the development of EWOD microfluidics has been hindered by the absence of: integrated detector technology, standard commercial components, on-chip sample preparation, standard manufacturing technology and end-to-end system integration. A field-programmable lab-on-a-chip (FPLOC) system based on microelectrode dot array (MEDA) architecture is presented in this research. The MEDA architecture proposes a standard EWOD microfluidic component called 'microelectrode cell', which can be dynamically configured into microfluidic components to perform microfluidic operations of the biochip. A proof-of-concept prototype FPLOC, containing a 30 × 30 MEDA, was developed by using generic integrated circuits computer aided design tools, and it was manufactured with standard low-voltage complementary metal-oxide-semiconductor technology, which allows smooth on-chip integration of microfluidics and microelectronics. By integrating 900 droplet detection circuits into microelectrode cells, the FPLOC has achieved large-scale integration of microfluidics and microelectronics. Compared to the full-custom and bottom-up design methods, the FPLOC provides hierarchical top-down design approach, field-programmability and dynamic manipulations of droplets for advanced microfluidic operations.

  4. Microfluidic Technologies for Synthetic Biology

    Directory of Open Access Journals (Sweden)

    Sung Kuk Lee

    2011-06-01

    Full Text Available Microfluidic technologies have shown powerful abilities for reducing cost, time, and labor, and at the same time, for increasing accuracy, throughput, and performance in the analysis of biological and biochemical samples compared with the conventional, macroscale instruments. Synthetic biology is an emerging field of biology and has drawn much attraction due to its potential to create novel, functional biological parts and systems for special purposes. Since it is believed that the development of synthetic biology can be accelerated through the use of microfluidic technology, in this review work we focus our discussion on the latest microfluidic technologies that can provide unprecedented means in synthetic biology for dynamic profiling of gene expression/regulation with high resolution, highly sensitive on-chip and off-chip detection of metabolites, and whole-cell analysis.

  5. Spontaneous oscillations in microfluidic networks

    Science.gov (United States)

    Case, Daniel; Angilella, Jean-Regis; Motter, Adilson

    2017-11-01

    Precisely controlling flows within microfluidic systems is often difficult which typically results in systems being heavily reliant on numerous external pumps and computers. Here, I present a simple microfluidic network that exhibits flow rate switching, bistablity, and spontaneous oscillations controlled by a single pressure. That is, by solely changing the driving pressure, it is possible to switch between an oscillating and steady flow state. Such functionality does not rely on external hardware and may even serve as an on-chip memory or timing mechanism. I use an analytic model and rigorous fluid dynamics simulations to show these results.

  6. Microfluidic device for drug delivery

    Science.gov (United States)

    Beebe, David J. (Inventor); MacDonald, Michael J. (Inventor); Eddington, David T. (Inventor); Mensing, Glennys A. (Inventor)

    2010-01-01

    A microfluidic device is provided for delivering a drug to an individual. The microfluidic device includes a body that defines a reservoir for receiving the drug therein. A valve interconnects the reservoir to an output needle that is insertable into the skin of an individual. A pressure source urges the drug from the reservoir toward the needle. The valve is movable between a closed position preventing the flow of the drug from the reservoir to the output needle and an open position allowing for the flow of the drug from the reservoir to the output needle in response to a predetermined condition in the physiological fluids of the individual.

  7. Photonics and Fiber Optics Processor Lab

    Data.gov (United States)

    Federal Laboratory Consortium — The Photonics and Fiber Optics Processor Lab develops, tests and evaluates high speed fiber optic network components as well as network protocols. In addition, this...

  8. Bridging Flows: Microfluidic End‐User Solutions

    DEFF Research Database (Denmark)

    Sabourin, David

    Microfluidic applications hold promise for many different end‐users both within and outside, and across many different research communities. Despite the benefits of microfluidic approaches, adoption and implementation thereof is often hindered by practical issues. Microfluidic components which......‐integrated interconnection and miniaturized peristaltic pump solutions were then combined into modular microfluidic systems. One system provides high interconnection numbers/density and allows many possible configurations. Additionally, and apart from many other accounts of modular microfluidic solutions, methods...... for control and actuation of microfluidic networks built from the modular components is described. Prototypes of the microfluidic system have begun to be distributed to external collaborators and researcher parties. These end‐users will assist in the validation of the approach and ultimately fulfil the key...

  9. Dual-nozzle microfluidic droplet generator

    Science.gov (United States)

    Choi, Ji Wook; Lee, Jong Min; Kim, Tae Hyun; Ha, Jang Ho; Ahrberg, Christian D.; Chung, Bong Geun

    2018-05-01

    The droplet-generating microfluidics has become an important technique for a variety of applications ranging from single cell analysis to nanoparticle synthesis. Although there are a large number of methods for generating and experimenting with droplets on microfluidic devices, the dispensing of droplets from these microfluidic devices is a challenge due to aggregation and merging of droplets at the interface of microfluidic devices. Here, we present a microfluidic dual-nozzle device for the generation and dispensing of uniform-sized droplets. The first nozzle of the microfluidic device is used for the generation of the droplets, while the second nozzle can accelerate the droplets and increase the spacing between them, allowing for facile dispensing of droplets. Computational fluid dynamic simulations were conducted to optimize the design parameters of the microfluidic device.

  10. Keystone Business Models for Network Security Processors

    OpenAIRE

    Arthur Low; Steven Muegge

    2013-01-01

    Network security processors are critical components of high-performance systems built for cybersecurity. Development of a network security processor requires multi-domain experience in semiconductors and complex software security applications, and multiple iterations of both software and hardware implementations. Limited by the business models in use today, such an arduous task can be undertaken only by large incumbent companies and government organizations. Neither the “fabless semiconductor...

  11. Real time monitoring of electron processors

    International Nuclear Information System (INIS)

    Nablo, S.V.; Kneeland, D.R.; McLaughlin, W.L.

    1995-01-01

    A real time radiation monitor (RTRM) has been developed for monitoring the dose rate (current density) of electron beam processors. The system provides continuous monitoring of processor output, electron beam uniformity, and an independent measure of operating voltage or electron energy. In view of the device's ability to replace labor-intensive dosimetry in verification of machine performance on a real-time basis, its application to providing archival performance data for in-line processing is discussed. (author)

  12. Multi-mode sensor processing on a dynamically reconfigurable massively parallel processor array

    Science.gov (United States)

    Chen, Paul; Butts, Mike; Budlong, Brad; Wasson, Paul

    2008-04-01

    This paper introduces a novel computing architecture that can be reconfigured in real time to adapt on demand to multi-mode sensor platforms' dynamic computational and functional requirements. This 1 teraOPS reconfigurable Massively Parallel Processor Array (MPPA) has 336 32-bit processors. The programmable 32-bit communication fabric provides streamlined inter-processor connections with deterministically high performance. Software programmability, scalability, ease of use, and fast reconfiguration time (ranging from microseconds to milliseconds) are the most significant advantages over FPGAs and DSPs. This paper introduces the MPPA architecture, its programming model, and methods of reconfigurability. An MPPA platform for reconfigurable computing is based on a structural object programming model. Objects are software programs running concurrently on hundreds of 32-bit RISC processors and memories. They exchange data and control through a network of self-synchronizing channels. A common application design pattern on this platform, called a work farm, is a parallel set of worker objects, with one input and one output stream. Statically configured work farms with homogeneous and heterogeneous sets of workers have been used in video compression and decompression, network processing, and graphics applications.

  13. Implementation of 4-way Superscalar Hash MIPS Processor Using FPGA

    Science.gov (United States)

    Sahib Omran, Safaa; Fouad Jumma, Laith

    2018-05-01

    Due to the quick advancements in the personal communications systems and wireless communications, giving data security has turned into a more essential subject. This security idea turns into a more confounded subject when next-generation system requirements and constant calculation speed are considered in real-time. Hash functions are among the most essential cryptographic primitives and utilized as a part of the many fields of signature authentication and communication integrity. These functions are utilized to acquire a settled size unique fingerprint or hash value of an arbitrary length of message. In this paper, Secure Hash Algorithms (SHA) of types SHA-1, SHA-2 (SHA-224, SHA-256) and SHA-3 (BLAKE) are implemented on Field-Programmable Gate Array (FPGA) in a processor structure. The design is described and implemented using a hardware description language, namely VHSIC “Very High Speed Integrated Circuit” Hardware Description Language (VHDL). Since the logical operation of the hash types of (SHA-1, SHA-224, SHA-256 and SHA-3) are 32-bits, so a Superscalar Hash Microprocessor without Interlocked Pipelines (MIPS) processor are designed with only few instructions that were required in invoking the desired Hash algorithms, when the four types of hash algorithms executed sequentially using the designed processor, the total time required equal to approximately 342 us, with a throughput of 4.8 Mbps while the required to execute the same four hash algorithms using the designed four-way superscalar is reduced to 237 us with improved the throughput to 5.1 Mbps.

  14. Advanced Avionics and Processor Systems for a Flexible Space Exploration Architecture

    Science.gov (United States)

    Keys, Andrew S.; Adams, James H.; Smith, Leigh M.; Johnson, Michael A.; Cressler, John D.

    2010-01-01

    The Advanced Avionics and Processor Systems (AAPS) project, formerly known as the Radiation Hardened Electronics for Space Environments (RHESE) project, endeavors to develop advanced avionic and processor technologies anticipated to be used by NASA s currently evolving space exploration architectures. The AAPS project is a part of the Exploration Technology Development Program, which funds an entire suite of technologies that are aimed at enabling NASA s ability to explore beyond low earth orbit. NASA s Marshall Space Flight Center (MSFC) manages the AAPS project. AAPS uses a broad-scoped approach to developing avionic and processor systems. Investment areas include advanced electronic designs and technologies capable of providing environmental hardness, reconfigurable computing techniques, software tools for radiation effects assessment, and radiation environment modeling tools. Near-term emphasis within the multiple AAPS tasks focuses on developing prototype components using semiconductor processes and materials (such as Silicon-Germanium (SiGe)) to enhance a device s tolerance to radiation events and low temperature environments. As the SiGe technology will culminate in a delivered prototype this fiscal year, the project emphasis shifts its focus to developing low-power, high efficiency total processor hardening techniques. In addition to processor development, the project endeavors to demonstrate techniques applicable to reconfigurable computing and partially reconfigurable Field Programmable Gate Arrays (FPGAs). This capability enables avionic architectures the ability to develop FPGA-based, radiation tolerant processor boards that can serve in multiple physical locations throughout the spacecraft and perform multiple functions during the course of the mission. The individual tasks that comprise AAPS are diverse, yet united in the common endeavor to develop electronics capable of operating within the harsh environment of space. Specifically, the AAPS tasks for

  15. NeuroFlow: A General Purpose Spiking Neural Network Simulation Platform using Customizable Processors.

    Science.gov (United States)

    Cheung, Kit; Schultz, Simon R; Luk, Wayne

    2015-01-01

    NeuroFlow is a scalable spiking neural network simulation platform for off-the-shelf high performance computing systems using customizable hardware processors such as Field-Programmable Gate Arrays (FPGAs). Unlike multi-core processors and application-specific integrated circuits, the processor architecture of NeuroFlow can be redesigned and reconfigured to suit a particular simulation to deliver optimized performance, such as the degree of parallelism to employ. The compilation process supports using PyNN, a simulator-independent neural network description language, to configure the processor. NeuroFlow supports a number of commonly used current or conductance based neuronal models such as integrate-and-fire and Izhikevich models, and the spike-timing-dependent plasticity (STDP) rule for learning. A 6-FPGA system can simulate a network of up to ~600,000 neurons and can achieve a real-time performance of 400,000 neurons. Using one FPGA, NeuroFlow delivers a speedup of up to 33.6 times the speed of an 8-core processor, or 2.83 times the speed of GPU-based platforms. With high flexibility and throughput, NeuroFlow provides a viable environment for large-scale neural network simulation.

  16. Demonstration of two-qubit algorithms with a superconducting quantum processor.

    Science.gov (United States)

    DiCarlo, L; Chow, J M; Gambetta, J M; Bishop, Lev S; Johnson, B R; Schuster, D I; Majer, J; Blais, A; Frunzio, L; Girvin, S M; Schoelkopf, R J

    2009-07-09

    Quantum computers, which harness the superposition and entanglement of physical states, could outperform their classical counterparts in solving problems with technological impact-such as factoring large numbers and searching databases. A quantum processor executes algorithms by applying a programmable sequence of gates to an initialized register of qubits, which coherently evolves into a final state containing the result of the computation. Building a quantum processor is challenging because of the need to meet simultaneously requirements that are in conflict: state preparation, long coherence times, universal gate operations and qubit readout. Processors based on a few qubits have been demonstrated using nuclear magnetic resonance, cold ion trap and optical systems, but a solid-state realization has remained an outstanding challenge. Here we demonstrate a two-qubit superconducting processor and the implementation of the Grover search and Deutsch-Jozsa quantum algorithms. We use a two-qubit interaction, tunable in strength by two orders of magnitude on nanosecond timescales, which is mediated by a cavity bus in a circuit quantum electrodynamics architecture. This interaction allows the generation of highly entangled states with concurrence up to 94 per cent. Although this processor constitutes an important step in quantum computing with integrated circuits, continuing efforts to increase qubit coherence times, gate performance and register size will be required to fulfil the promise of a scalable technology.

  17. Accuracy Limitations in Optical Linear Algebra Processors

    Science.gov (United States)

    Batsell, Stephen Gordon

    1990-01-01

    One of the limiting factors in applying optical linear algebra processors (OLAPs) to real-world problems has been the poor achievable accuracy of these processors. Little previous research has been done on determining noise sources from a systems perspective which would include noise generated in the multiplication and addition operations, noise from spatial variations across arrays, and from crosstalk. In this dissertation, we propose a second-order statistical model for an OLAP which incorporates all these system noise sources. We now apply this knowledge to determining upper and lower bounds on the achievable accuracy. This is accomplished by first translating the standard definition of accuracy used in electronic digital processors to analog optical processors. We then employ our second-order statistical model. Having determined a general accuracy equation, we consider limiting cases such as for ideal and noisy components. From the ideal case, we find the fundamental limitations on improving analog processor accuracy. From the noisy case, we determine the practical limitations based on both device and system noise sources. These bounds allow system trade-offs to be made both in the choice of architecture and in individual components in such a way as to maximize the accuracy of the processor. Finally, by determining the fundamental limitations, we show the system engineer when the accuracy desired can be achieved from hardware or architecture improvements and when it must come from signal pre-processing and/or post-processing techniques.

  18. Integrated microfluidic probe station.

    Science.gov (United States)

    Perrault, C M; Qasaimeh, M A; Brastaviceanu, T; Anderson, K; Kabakibo, Y; Juncker, D

    2010-11-01

    The microfluidic probe (MFP) consists of a flat, blunt tip with two apertures for the injection and reaspiration of a microjet into a solution--thus hydrodynamically confining the microjet--and is operated atop an inverted microscope that enables live imaging. By scanning across a surface, the microjet can be used for surface processing with the capability of both depositing and removing material; as it operates under immersed conditions, sensitive biological materials and living cells can be processed. During scanning, the MFP is kept immobile and centered over the objective of the inverted microscope, a few micrometers above a substrate that is displaced by moving the microscope stage and that is flushed continuously with the microjet. For consistent and reproducible surface processing, the gap between the MFP and the substrate, the MFP's alignment, the scanning speed, the injection and aspiration flow rates, and the image capture need all to be controlled and synchronized. Here, we present an automated MFP station that integrates all of these functionalities and automates the key operational parameters. A custom software program is used to control an independent motorized Z stage for adjusting the gap, a motorized microscope stage for scanning the substrate, up to 16 syringe pumps for injecting and aspirating fluids, and an inverted fluorescence microscope equipped with a charge-coupled device camera. The parallelism between the MFP and the substrate is adjusted using manual goniometer at the beginning of the experiment. The alignment of the injection and aspiration apertures along the scanning axis is performed using a newly designed MFP screw holder. We illustrate the integrated MFP station by the programmed, automated patterning of fluorescently labeled biotin on a streptavidin-coated surface.

  19. Video rate morphological processor based on a redundant number representation

    Science.gov (United States)

    Kuczborski, Wojciech; Attikiouzel, Yianni; Crebbin, Gregory A.

    1992-03-01

    This paper presents a video rate morphological processor for automated visual inspection of printed circuit boards, integrated circuit masks, and other complex objects. Inspection algorithms are based on gray-scale mathematical morphology. Hardware complexity of the known methods of real-time implementation of gray-scale morphology--the umbra transform and the threshold decomposition--has prompted us to propose a novel technique which applied an arithmetic system without carrying propagation. After considering several arithmetic systems, a redundant number representation has been selected for implementation. Two options are analyzed here. The first is a pure signed digit number representation (SDNR) with the base of 4. The second option is a combination of the base-2 SDNR (to represent gray levels of images) and the conventional twos complement code (to represent gray levels of structuring elements). Operation principle of the morphological processor is based on the concept of the digit level systolic array. Individual processing units and small memory elements create a pipeline. The memory elements store current image windows (kernels). All operation primitives of processing units apply a unified direction of digit processing: most significant digit first (MSDF). The implementation technology is based on the field programmable gate arrays by Xilinx. This paper justified the rationality of a new approach to logic design, which is the decomposition of Boolean functions instead of Boolean minimization.

  20. Image matrix processor for fast multi-dimensional computations

    Science.gov (United States)

    Roberson, George P.; Skeate, Michael F.

    1996-01-01

    An apparatus for multi-dimensional computation which comprises a computation engine, including a plurality of processing modules. The processing modules are configured in parallel and compute respective contributions to a computed multi-dimensional image of respective two dimensional data sets. A high-speed, parallel access storage system is provided which stores the multi-dimensional data sets, and a switching circuit routes the data among the processing modules in the computation engine and the storage system. A data acquisition port receives the two dimensional data sets representing projections through an image, for reconstruction algorithms such as encountered in computerized tomography. The processing modules include a programmable local host, by which they may be configured to execute a plurality of different types of multi-dimensional algorithms. The processing modules thus include an image manipulation processor, which includes a source cache, a target cache, a coefficient table, and control software for executing image transformation routines using data in the source cache and the coefficient table and loading resulting data in the target cache. The local host processor operates to load the source cache with a two dimensional data set, loads the coefficient table, and transfers resulting data out of the target cache to the storage system, or to another destination.

  1. Implementation of a Loosely-Coupled Lockstep Approach in the Xilinx Zynq-7000 All Programmable SoC for High Consequence Applications

    Science.gov (United States)

    2017-03-01

    Programmable SoC™ is made possible through the use of ARM® Cortex ™-A9 MPCore™ Asymmetric Multiprocessing; processor configurations utilizing the...core ARM Cortex -A9 MPCore based Processing System (PS) and Programmable Logic (PL) portions. These features allow for two processors to run...SoC™ precludes a tightly-coupled lockstep approach between the two processors . Therefore, a loosely-coupled lockstep approach implemented by a

  2. Multichannel Bipotentiostat Integrated With a Microfluidic Platform for Electrochemical Real-Time Monitoring of Cell Cultures

    DEFF Research Database (Denmark)

    Vergani, Marco; Carminati, Marco; Ferrari, Giorgio

    2012-01-01

    An electrochemical detection system specifically designed for multi-parameter real-time monitoring of stem cell culturing/differentiation in a microfluidic system is presented. It is composed of a very compact 24-channel electronic board, compatible with arrays of microelectrodes and coupled...... to a microfluidic cell culture system. A versatile data acquisition software enables performing amperometry, cyclic voltammetry and impedance spectroscopy in each of the 12 independent chambers over a 100 kHz bandwidth with current resolution down to 5 pA for 100 ms measuring time. The design of the platform, its...... realization and experimental characterization are reported, with emphasis on the analysis of impact of input capacitance (i.e., microelectrode size) and microfluidic pump operation on current noise. Programmable sequences of successive injections of analytes (ferricyanide and dopamine) and rinsing buffer...

  3. Deep Trek Re-configurable Processor for Data Acquisition (RPDA)

    Energy Technology Data Exchange (ETDEWEB)

    Bruce Ohme; Michael Johnson

    2009-06-30

    This report summarizes technical progress achieved during the cooperative research agreement between Honeywell and U.S. Department of Energy to develop a high-temperature Re-configurable Processor for Data Acquisition (RPDA). The RPDA development has incorporated multiple high-temperature (225C) electronic components within a compact co-fired ceramic Multi-Chip-Module (MCM) package. This assembly is suitable for use in down-hole oil and gas applications. The RPDA module is programmable to support a wide range of functionality. Specifically this project has demonstrated functional integrity of the RPDA package and internal components, as well as functional integrity of the RPDA configured to operate as a Multi-Channel Data Acquisition Controller. This report reviews the design considerations, electrical hardware design, MCM package design, considerations for manufacturing assembly, test and screening, and results from prototype assembly and characterization testing.

  4. Directions in parallel processor architecture, and GPUs too

    CERN Multimedia

    CERN. Geneva

    2014-01-01

    Modern computing is power-limited in every domain of computing. Performance increments extracted from instruction-level parallelism (ILP) are no longer power-efficient; they haven't been for some time. Thread-level parallelism (TLP) is a more easily exploited form of parallelism, at the expense of programmer effort to expose it in the program. In this talk, I will introduce you to disparate topics in parallel processor architecture that will impact programming models (and you) in both the near and far future. About the speaker Olivier is a senior GPU (SM) architect at NVIDIA and an active participant in the concurrency working group of the ISO C++ committee. He has also worked on very large diesel engines as a mechanical engineer, and taught at McGill University (Canada) as a faculty instructor.

  5. Optical Doppler tomography based on a field programmable gate array

    DEFF Research Database (Denmark)

    Larsen, Henning Engelbrecht; Nilsson, Ronnie Thorup; Thrane, Lars

    2008-01-01

    We report the design of and results obtained by using a field programmable gate array (FPGA) to digitally process optical Doppler tomography signals. The processor fits into the analog signal path in an existing optical coherence tomography setup. We demonstrate both Doppler frequency and envelope...... extraction using the Hilbert transform, all in a single FPGA. An FPGA implementation has certain advantages over general purpose digital signal processor (DSP) due to the fact that the processing elements operate in parallel as opposed to the DSP. which is primarily a sequential processor....

  6. A lock circuit for a multi-core processor

    DEFF Research Database (Denmark)

    2015-01-01

    An integrated circuit comprising a multiple processor cores and a lock circuit that comprises a queue register with respective bits set or reset via respective, connections dedicated to respective processor cores, whereby the queue register identifies those among the multiple processor cores...... that are enqueued in the queue register. Furthermore, the integrated circuit comprises a current register and a selector circuit configured to select a processor core and identify that processor core by a value in the current register. A selected processor core is a prioritized processor core among the cores...... configured with an integrated circuit; and a silicon die configured with an integrated circuit....

  7. MAP3D: a media processor approach for high-end 3D graphics

    Science.gov (United States)

    Darsa, Lucia; Stadnicki, Steven; Basoglu, Chris

    1999-12-01

    Equator Technologies, Inc. has used a software-first approach to produce several programmable and advanced VLIW processor architectures that have the flexibility to run both traditional systems tasks and an array of media-rich applications. For example, Equator's MAP1000A is the world's fastest single-chip programmable signal and image processor targeted for digital consumer and office automation markets. The Equator MAP3D is a proposal for the architecture of the next generation of the Equator MAP family. The MAP3D is designed to achieve high-end 3D performance and a variety of customizable special effects by combining special graphics features with high performance floating-point and media processor architecture. As a programmable media processor, it offers the advantages of a completely configurable 3D pipeline--allowing developers to experiment with different algorithms and to tailor their pipeline to achieve the highest performance for a particular application. With the support of Equator's advanced C compiler and toolkit, MAP3D programs can be written in a high-level language. This allows the compiler to successfully find and exploit any parallelism in a programmer's code, thus decreasing the time to market of a given applications. The ability to run an operating system makes it possible to run concurrent applications in the MAP3D chip, such as video decoding while executing the 3D pipelines, so that integration of applications is easily achieved--using real-time decoded imagery for texturing 3D objects, for instance. This novel architecture enables an affordable, integrated solution for high performance 3D graphics.

  8. SLAC Scanner Processor applications in the data acquisition system for the upgraded Mark II detector

    International Nuclear Information System (INIS)

    Barklow, T.; Glanzman, T.; Lankford, A.J.; Riles, K.

    1985-09-01

    The SLAC Scanner Processor is a general purpose, programmable FASTBUS crate/cable master/slave module. This device plays a central role in the readout, buffering and pre-processing of data from the upgraded Mark II detector's new central drift chamber. In addition to data readout, the SSPs assist in a variety of other services, such as detector calibration, FASTBUS system management, FASTBUS system initialization and verification, and FASTBUS module testing. 9 refs., 1 fig., 2 tabs

  9. Topology optimization of microfluidic mixers

    DEFF Research Database (Denmark)

    Andreasen, Casper Schousboe; Gersborg, Allan Roulund; Sigmund, Ole

    2009-01-01

    This paper demonstrates the application of the topology optimization method as a general and systematic approach for microfluidic mixer design. The mixing process is modeled as convection dominated transport in low Reynolds number incompressible flow. The mixer performance is maximized by altering...

  10. A microfluidic device with pillars

    DEFF Research Database (Denmark)

    2014-01-01

    The invention provides a microfluidic device for mixing liquid reagents, the device comprises, a chip forming at least one reaction chamber between a bottom and a top and extending between an inlet and an outlet. To enable manufacturing from less rigid materials, the device comprises pillars...

  11. Microfluidic technology for PET radiochemistry

    International Nuclear Information System (INIS)

    Gillies, J.M.; Prenant, C.; Chimon, G.N.; Smethurst, G.J.; Dekker, B.A.; Zweit, J.

    2006-01-01

    This paper describes the first application of a microfabricated reaction system to positron emission tomography (PET) radiochemistry. We have applied microfluidic technology to synthesise PET radiopharmaceuticals using 18 F and 124 I as labels for fluorodeoxyglucose (FDG) and Annexin-V, respectively. These reactions involved established methods of nucleophilic substitution on a mannose triflate precursor and direct iodination of the protein using iodogen as an oxidant. This has demonstrated a proof of principle of using microfluidic technology to radiochemical reactions involving low and high molecular weight compounds. Using microfluidic reactions, [ 18 F]FDG was synthesised with a 50% incorporation of the available F-18 radioactivity in a very short time of 4 s. The radiolabelling efficiency of 124 I Annexin-V was 40% after 1 min reaction time. Chromatographic analysis showed that such reaction yields are comparable to conventional methods, but in a much shorter time. The yields can be further improved with more optimisation of the microfluidic device itself and its fluid mixing profiles. This demonstrates the potential for this technology to have an impact on rapid and simpler radiopharmaceutical synthesis using short and medium half-life radionuclides

  12. Microfluidic Liquid-Liquid Contactors

    Energy Technology Data Exchange (ETDEWEB)

    Mcculloch, Quinn [Los Alamos National Lab. (LANL), Los Alamos, NM (United States)

    2017-07-25

    This report describes progress made on the microfluidic contactor. A model was developed to predict its failure, a surrogate chemical system was selected to demonstrate mass transfer, and an all-optical system has been invented and implemented to monitor carryover and flowrates.

  13. Microfluidic devices for biological applications

    CSIR Research Space (South Africa)

    Potgieter, S

    2010-01-01

    Full Text Available Microfluidics is a multi-disciplinary field that deals with the behaviour, control and manipulation of fluids constrained to sub-millilitre volumes. It is proving to be a useful tool for biological studies, affording advantages such as reduced cost...

  14. Mixing in a Microfluid Device

    DEFF Research Database (Denmark)

    Hjorth, Poul G.; Deryabin, Mikhail

    Mixing of fluids in microchannels cannot rely on turbulence since the flow takes place at extremly low Reynolds numbers. Various active and passive devices have been developed to induce mixing in microfluid flow devices. We describe here a model of an active mixer where a transverse periodic flow...

  15. Ice matrix in reconfigurable microfluidic systems

    Energy Technology Data Exchange (ETDEWEB)

    Bossi, A M [Department of Biotechnology, University of Verona, Strada Le Grazie 15, I-37134, Verona (Italy); Vareijka, M; Piletska, E V; Turner, A P F; Piletsky, S A [Cranfield Health, Cranfield University, Vincent Building B52, Cranfield, Bedfordshire, MK43 0AL (United Kingdom); Meglinski, I [Department of Physics, University of Otago, PO Box 56, Dunedin, 9054 (New Zealand)

    2013-07-01

    Microfluidic devices find many applications in biotechnologies. Here, we introduce a flexible and biocompatible microfluidic ice-based platform with tunable parameters and configuration of microfluidic patterns that can be changed multiple times during experiments. Freezing and melting of cavities, channels and complex relief structures created and maintained in the bulk of ice by continuous scanning of an infrared laser beam are used as a valve action in microfluidic systems. We demonstrate that pre-concentration of samples and transport of ions and dyes through the open channels created can be achieved in ice microfluidic patterns by IR laser-assisted zone melting. The proposed approach can be useful for performing separation and sensing processes in flexible reconfigurable microfluidic devices. (paper)

  16. Ice matrix in reconfigurable microfluidic systems

    International Nuclear Information System (INIS)

    Bossi, A M; Vareijka, M; Piletska, E V; Turner, A P F; Piletsky, S A; Meglinski, I

    2013-01-01

    Microfluidic devices find many applications in biotechnologies. Here, we introduce a flexible and biocompatible microfluidic ice-based platform with tunable parameters and configuration of microfluidic patterns that can be changed multiple times during experiments. Freezing and melting of cavities, channels and complex relief structures created and maintained in the bulk of ice by continuous scanning of an infrared laser beam are used as a valve action in microfluidic systems. We demonstrate that pre-concentration of samples and transport of ions and dyes through the open channels created can be achieved in ice microfluidic patterns by IR laser-assisted zone melting. The proposed approach can be useful for performing separation and sensing processes in flexible reconfigurable microfluidic devices. (paper)

  17. Ice matrix in reconfigurable microfluidic systems

    Science.gov (United States)

    Bossi, A. M.; Vareijka, M.; Piletska, E. V.; Turner, A. P. F.; Meglinski, I.; Piletsky, S. A.

    2013-07-01

    Microfluidic devices find many applications in biotechnologies. Here, we introduce a flexible and biocompatible microfluidic ice-based platform with tunable parameters and configuration of microfluidic patterns that can be changed multiple times during experiments. Freezing and melting of cavities, channels and complex relief structures created and maintained in the bulk of ice by continuous scanning of an infrared laser beam are used as a valve action in microfluidic systems. We demonstrate that pre-concentration of samples and transport of ions and dyes through the open channels created can be achieved in ice microfluidic patterns by IR laser-assisted zone melting. The proposed approach can be useful for performing separation and sensing processes in flexible reconfigurable microfluidic devices.

  18. Nanostructures for all-polymer microfluidic systems

    DEFF Research Database (Denmark)

    Matschuk, Maria; Bruus, Henrik; Larsen, Niels Bent

    2010-01-01

    antistiction coating was found to improve the replication fidelity (shape and depth) of nanoscale features substantially. Arrays of holes of 50 nm diameter/35 nm depth and 100 nm/100 nm diameter, respectively, were mass-produced in cyclic olefin copolymer (Topas 5013) by injection molding. Polymer microfluidic...... channel chip parts resulted from a separate injection molding process. The microfluidic chip part and the nanostructured chip part were successfully bonded to form a sealed microfluidic system using air plasma assisted thermal bonding....

  19. Control structures for high speed processors

    Science.gov (United States)

    Maki, G. K.; Mankin, R.; Owsley, P. A.; Kim, G. M.

    1982-01-01

    A special processor was designed to function as a Reed Solomon decoder with throughput data rate in the Mhz range. This data rate is significantly greater than is possible with conventional digital architectures. To achieve this rate, the processor design includes sequential, pipelined, distributed, and parallel processing. The processor was designed using a high level language register transfer language. The RTL can be used to describe how the different processes are implemented by the hardware. One problem of special interest was the development of dependent processes which are analogous to software subroutines. For greater flexibility, the RTL control structure was implemented in ROM. The special purpose hardware required approximately 1000 SSI and MSI components. The data rate throughput is 2.5 megabits/second. This data rate is achieved through the use of pipelined and distributed processing. This data rate can be compared with 800 kilobits/second in a recently proposed very large scale integration design of a Reed Solomon encoder.

  20. Real time processor for array speckle interferometry

    Science.gov (United States)

    Chin, Gordon; Florez, Jose; Borelli, Renan; Fong, Wai; Miko, Joseph; Trujillo, Carlos

    1989-02-01

    The authors are constructing a real-time processor to acquire image frames, perform array flat-fielding, execute a 64 x 64 element two-dimensional complex FFT (fast Fourier transform) and average the power spectrum, all within the 25 ms coherence time for speckles at near-IR (infrared) wavelength. The processor will be a compact unit controlled by a PC with real-time display and data storage capability. This will provide the ability to optimize observations and obtain results on the telescope rather than waiting several weeks before the data can be analyzed and viewed with offline methods. The image acquisition and processing, design criteria, and processor architecture are described.

  1. The UA1 upgrade calorimeter trigger processor

    International Nuclear Information System (INIS)

    Bains, M.; Charleton, D.; Ellis, N.; Garvey, J.; Gregory, J.; Jimack, M.P.; Jovanovic, P.; Kenyon, I.R.; Baird, S.A.; Campbell, D.; Cawthraw, M.; Coughlan, J.; Flynn, P.; Galagedera, S.; Grayer, G.; Halsall, R.; Shah, T.P.; Stephens, R.; Biddulph, P.; Eisenhandler, E.; Fensome, I.F.; Landon, M.; Robinson, D.; Oliver, J.; Sumorok, K.

    1990-01-01

    The increased luminosity of the improved CERN Collider and the more subtle signals of second-generation collider physics demand increasingly sophisticated triggering. We have built a new first-level trigger processor designed to use the excellent granularity of the UA1 upgrade calorimeter. This device is entirely digital and handles events in 1.5 μs, thus introducing no dead time. Its most novel feature is fast two-dimensional electromagnetic cluster-finding with the possibility of demanding an isolated shower of limited penetration. The processor allows multiple combinations of triggers on electromagnetic showers, hadronic jets and energy sums, including a total-energy veto of multiple interactions and a full vector sum of missing transverse energy. This hard-wired processor is about five times more powerful than its predecessor, and makes extensive use of pipelining techniques. It was used extensively in the 1988 and 1989 runs of the CERN Collider. (orig.)

  2. The UA1 upgrade calorimeter trigger processor

    International Nuclear Information System (INIS)

    Bains, N.; Baird, S.A.; Biddulph, P.

    1990-01-01

    The increased luminosity of the improved CERN Collider and the more subtle signals of second-generation collider physics demand increasingly sophisticated triggering. We have built a new first-level trigger processor designed to use the excellent granularity of the UA1 upgrade calorimeter. This device is entirely digital and handles events in 1.5 μs, thus introducing no deadtime. Its most novel feature is fast two-dimensional electromagnetic cluster-finding with the possibility of demanding an isolated shower of limited penetration. The processor allows multiple combinations of triggers on electromagnetic showers, hadronic jets and energy sums, including a total-energy veto of multiple interactions and a full vector sum of missing transverse energy. This hard-wired processor is about five times more powerful than its predecessor, and makes extensive use of pipelining techniques. It was used extensively in the 1988 and 1989 runs of the CERN Collider. (author)

  3. Development methods for VLSI-processors

    International Nuclear Information System (INIS)

    Horninger, K.; Sandweg, G.

    1982-01-01

    The aim of this project, which was originally planed for 3 years, was the development of modern system and circuit concepts, for VLSI-processors having a 32 bit wide data path. The result of this first years work is the concept of a general purpose processor. This processor is not only logically but also physically (on the chip) divided into four functional units: a microprogrammable instruction unit, an execution unit in slice technique, a fully associative cache memory and an I/O unit. For the ALU of the execution unit circuits in PLA and slice techniques have been realized. On the basis of regularity, area consumption and achievable performance the slice technique has been prefered. The designs utilize selftesting circuitry. (orig.) [de

  4. Locality-Aware Task Scheduling and Data Distribution for OpenMP Programs on NUMA Systems and Manycore Processors

    Directory of Open Access Journals (Sweden)

    Ananya Muddukrishna

    2015-01-01

    Full Text Available Performance degradation due to nonuniform data access latencies has worsened on NUMA systems and can now be felt on-chip in manycore processors. Distributing data across NUMA nodes and manycore processor caches is necessary to reduce the impact of nonuniform latencies. However, techniques for distributing data are error-prone and fragile and require low-level architectural knowledge. Existing task scheduling policies favor quick load-balancing at the expense of locality and ignore NUMA node/manycore cache access latencies while scheduling. Locality-aware scheduling, in conjunction with or as a replacement for existing scheduling, is necessary to minimize NUMA effects and sustain performance. We present a data distribution and locality-aware scheduling technique for task-based OpenMP programs executing on NUMA systems and manycore processors. Our technique relieves the programmer from thinking of NUMA system/manycore processor architecture details by delegating data distribution to the runtime system and uses task data dependence information to guide the scheduling of OpenMP tasks to reduce data stall times. We demonstrate our technique on a four-socket AMD Opteron machine with eight NUMA nodes and on the TILEPro64 processor and identify that data distribution and locality-aware task scheduling improve performance up to 69% for scientific benchmarks compared to default policies and yet provide an architecture-oblivious approach for programmers.

  5. ECH system developments including the design of an intelligent fault processor on the DIII-D tokamak

    International Nuclear Information System (INIS)

    Ponce, D.; Lohr, J.; Tooker, J.F.; O'Neill, R.C.; Moeller, C.P.; Doane, J.L.; Noraky, S.; Dubovenko, K.; Gorelov, Y.A.; Cengher, M.; Penaflor, B.G.; Ellis, R.A.

    2011-01-01

    A new generation fault processor is in development which is intended to increase fault handling flexibility and reduce the number of incomplete DIII-D shots due to gyrotron faults. The processor, which is based upon a field programmable gate array device, will analyze signals for aberrant operation and ramp down high voltage to try to avoid hard faults. The processor will then attempt to ramp back up to an attainable operating point. The new generation fault processor will be developed during an expansion of the electron cyclotron heating (ECH) areas that will include the installation of a depressed collector gyrotron and associated equipment. Existing systems will also be upgraded. Testing of real-time control of the ECH launcher poloidal drives by the DIII-D plasma control system will be completed. The ECH control system software will be upgraded for increased scalability and to increase operator productivity. Resources permitting, all systems will receive an extra layer of interlocks for the filament and magnet power supplies, added shielding for the tank electronics, programmable filament boost shape for long pulses, and electronics upgrades for the installation of the advanced fault processor.

  6. Microfluidic high gradient magnetic cell separation

    Science.gov (United States)

    Inglis, David W.; Riehn, Robert; Sturm, James C.; Austin, Robert H.

    2006-04-01

    Separation of blood cells by native susceptibility and by the selective attachment of magnetic beads has recently been demonstrated on microfluidic devices. We discuss the basic principles of how forces are generated via the magnetic susceptibility of an object and how microfluidics can be combined with micron-scale magnetic field gradients to greatly enhance in principle the fractionating power of magnetic fields. We discuss our efforts and those of others to build practical microfluidic devices for the magnetic separation of blood cells. We also discuss our attempts to integrate magnetic separation with other microfluidic features for developing handheld medical diagnostic tools.

  7. Integrated lenses in polystyrene microfluidic devices

    KAUST Repository

    Fan, Yiqiang

    2013-04-01

    This paper reports a new method for integrating microlenses into microfluidic devices for improved observation. Two demonstration microfluidic devices were provided which were fabricated using this new technique. The integrated microlenses were fabricated using a free-surface thermo-compression molding method on a polystyrene (PS) sheet which was then bonded on top of microfluidic channels as a cover plate, with the convex microlenses providing a magnified image of the channel for the easier observation of the flow in the microchannels. This approach for fabricating the integrated microlens in microfluidic devices is rapid, low cost and without the requirement of cleanroom facilities. © 2013 IEEE.

  8. Software-defined reconfigurable microwave photonics processor.

    Science.gov (United States)

    Pérez, Daniel; Gasulla, Ivana; Capmany, José

    2015-06-01

    We propose, for the first time to our knowledge, a software-defined reconfigurable microwave photonics signal processor architecture that can be integrated on a chip and is capable of performing all the main functionalities by suitable programming of its control signals. The basic configuration is presented and a thorough end-to-end design model derived that accounts for the performance of the overall processor taking into consideration the impact and interdependencies of both its photonic and RF parts. We demonstrate the model versatility by applying it to several relevant application examples.

  9. Parallel processor for fast event analysis

    International Nuclear Information System (INIS)

    Hensley, D.C.

    1983-01-01

    Current maximum data rates from the Spin Spectrometer of approx. 5000 events/s (up to 1.3 MBytes/s) and minimum analysis requiring at least 3000 operations/event require a CPU cycle time near 70 ns. In order to achieve an effective cycle time of 70 ns, a parallel processing device is proposed where up to 4 independent processors will be implemented in parallel. The individual processors are designed around the Am2910 Microsequencer, the AM29116 μP, and the Am29517 Multiplier. Satellite histogramming in a mass memory system will be managed by a commercial 16-bit μP system

  10. Time Manager Software for a Flight Processor

    Science.gov (United States)

    Zoerne, Roger

    2012-01-01

    Data analysis is a process of inspecting, cleaning, transforming, and modeling data to highlight useful information and suggest conclusions. Accurate timestamps and a timeline of vehicle events are needed to analyze flight data. By moving the timekeeping to the flight processor, there is no longer a need for a redundant time source. If each flight processor is initially synchronized to GPS, they can freewheel and maintain a fairly accurate time throughout the flight with no additional GPS time messages received. How ever, additional GPS time messages will ensure an even greater accuracy. When a timestamp is required, a gettime function is called that immediately reads the time-base register.

  11. Comparison of Processor Performance of SPECint2006 Benchmarks of some Intel Xeon Processors

    Directory of Open Access Journals (Sweden)

    Abdul Kareem PARCHUR

    2012-08-01

    Full Text Available High performance is a critical requirement to all microprocessors manufacturers. The present paper describes the comparison of performance in two main Intel Xeon series processors (Type A: Intel Xeon X5260, X5460, E5450 and L5320 and Type B: Intel Xeon X5140, 5130, 5120 and E5310. The microarchitecture of these processors is implemented using the basis of a new family of processors from Intel starting with the Pentium 4 processor. These processors can provide a performance boost for many key application areas in modern generation. The scaling of performance in two major series of Intel Xeon processors (Type A: Intel Xeon X5260, X5460, E5450 and L5320 and Type B: Intel Xeon X5140, 5130, 5120 and E5310 has been analyzed using the performance numbers of 12 CPU2006 integer benchmarks, performance numbers that exhibit significant differences in performance. The results and analysis can be used by performance engineers, scientists and developers to better understand the performance scaling in modern generation processors.

  12. Simulation of a parallel processor on a serial processor: The neutron diffusion equation

    International Nuclear Information System (INIS)

    Honeck, H.C.

    1981-01-01

    Parallel processors could provide the nuclear industry with very high computing power at a very moderate cost. Will we be able to make effective use of this power. This paper explores the use of a very simple parallel processor for solving the neutron diffusion equation to predict power distributions in a nuclear reactor. We first describe a simple parallel processor and estimate its theoretical performance based on the current hardware technology. Next, we show how the parallel processor could be used to solve the neutron diffusion equation. We then present the results of some simulations of a parallel processor run on a serial processor and measure some of the expected inefficiencies. Finally we extrapolate the results to estimate how actual design codes would perform. We find that the standard numerical methods for solving the neutron diffusion equation are still applicable when used on a parallel processor. However, some simple modifications to these methods will be necessary if we are to achieve the full power of these new computers. (orig.) [de

  13. Optical detection in microfluidic systems

    DEFF Research Database (Denmark)

    Mogensen, Klaus Bo; Kutter, Jörg Peter

    2009-01-01

    Optical detection schemes continue to be favoured for measurements in microfluidic systems. A selection of the latest progress mainly within the last two years is critically reviewed. Emphasis is on integrated solutions, such as planar waveguides, coupling schemes to the outside world, evanescent...... to ease commercialisation of the devices. This work will hopefully result in more commercial products that benefit from integrated optics, because the impact on commercial devices so far has been modest....

  14. Microfluidic Devices for Blood Fractionation

    OpenAIRE

    Hou, Han Wei; Bhagat, Ali Asgar S.; Lee, Wong Cheng J.; Huang, Sha; Han, Jongyoon; Lim, Chwee Teck

    2011-01-01

    Blood, a complex biological fluid, comprises 45% cellular components suspended in protein rich plasma. These different hematologic components perform distinct functions in vivo and thus the ability to efficiently fractionate blood into its individual components has innumerable applications in both clinical diagnosis and biological research. Yet, processing blood is not trivial. In the past decade, a flurry of new microfluidic based technologies has emerged to address this compelling problem. ...

  15. Bistable diverter valve in microfluidics

    Czech Academy of Sciences Publication Activity Database

    Tesař, Václav; Bandulasena, H.C.H.

    2011-01-01

    Roč. 50, č. 5 (2011), s. 1225-1233 ISSN 0723-4864 R&D Projects: GA ČR GA101/07/1499; GA AV ČR IAA200760705 Institutional research plan: CEZ:AV0Z20760514 Keywords : fluidics * bistable diverter valves * pressure-driven microfluidics Subject RIV: BK - Fluid Dynamics Impact factor: 1.735, year: 2011 http://www.springerlink.com/content/x4907p1908151522/

  16. Level Zero Trigger Processor for the NA62 experiment

    Science.gov (United States)

    Soldi, D.; Chiozzi, S.

    2018-05-01

    The NA62 experiment is designed to measure the ultra-rare decay K+ arrow π+ ν bar nu branching ratio with a precision of ~ 10% at the CERN Super Proton Synchrotron (SPS). The trigger system of NA62 consists in three different levels designed to select events of physics interest in a high beam rate environment. The L0 Trigger Processor (L0TP) is the lowest level system of the trigger chain. It is hardware implemented using programmable logic. The architecture of the NA62 L0TP system is a new approach compared to existing systems used in high-energy physics experiments. It is fully digital, based on a standard gigabit Ethernet communication between detectors and the L0TP Board. The L0TP Board is a commercial development board, mounting a programmable logic device (FPGA). The primitives generated by sub-detectors are sent asynchronously using the UDP protocol to the L0TP during the entire beam spill period. The L0TP realigns in time the primitives coming from seven different sources and performs a data selection based on the characteristics of the event such as energy, multiplicity and topology of hits in the sub-detectors. It guarantees a maximum latency of 1 ms. The maximum input rate is about 10 MHz for each sub-detector, while the design maximum output trigger rate is 1 MHz. A description of the trigger algorithm is presented here.

  17. Microfluidic Devices for Blood Fractionation

    Directory of Open Access Journals (Sweden)

    Chwee Teck Lim

    2011-07-01

    Full Text Available Blood, a complex biological fluid, comprises 45% cellular components suspended in protein rich plasma. These different hematologic components perform distinct functions in vivo and thus the ability to efficiently fractionate blood into its individual components has innumerable applications in both clinical diagnosis and biological research. Yet, processing blood is not trivial. In the past decade, a flurry of new microfluidic based technologies has emerged to address this compelling problem. Microfluidics is an attractive solution for this application leveraging its numerous advantages to process clinical blood samples. This paper reviews the various microfluidic approaches realized to successfully fractionate one or more blood components. Techniques to separate plasma from hematologic cellular components as well as isolating blood cells of interest including certain rare cells are discussed. Comparisons based on common separation metrics including efficiency (sensitivity, purity (selectivity, and throughput will be presented. Finally, we will provide insights into the challenges associated with blood-based separation systems towards realizing true point-of-care (POC devices and provide future perspectives.

  18. Noise limitations in optical linear algebra processors.

    Science.gov (United States)

    Batsell, S G; Jong, T L; Walkup, J F; Krile, T F

    1990-05-10

    A general statistical noise model is presented for optical linear algebra processors. A statistical analysis which includes device noise, the multiplication process, and the addition operation is undertaken. We focus on those processes which are architecturally independent. Finally, experimental results which verify the analytical predictions are also presented.

  19. A high-speed analog neural processor

    NARCIS (Netherlands)

    Masa, P.; Masa, Peter; Hoen, Klaas; Hoen, Klaas; Wallinga, Hans

    1994-01-01

    Targeted at high-energy physics research applications, our special-purpose analog neural processor can classify up to 70 dimensional vectors within 50 nanoseconds. The decision-making process of the implemented feedforward neural network enables this type of computation to tolerate weight

  20. Beeldverwerking met de Micron Automatic Processor

    OpenAIRE

    Goyens, Frank

    2017-01-01

    Deze thesis is een onderzoek naar toepassingen binnen beeldverwerking op de Micron Automata Processor hardware. De hardware wordt vergeleken met populaire hedendaagse hardware. Ook bevat dit onderzoek nuttige informatie en strategieën voor het ontwikkelen van nieuwe toepassingen. Bevindingen in dit onderzoek omvatten proof of concept algoritmes en een praktische toepassing.

  1. 7 CFR 1215.14 - Processor.

    Science.gov (United States)

    2010-01-01

    ... 7 Agriculture 10 2010-01-01 2010-01-01 false Processor. 1215.14 Section 1215.14 Agriculture Regulations of the Department of Agriculture (Continued) AGRICULTURAL MARKETING SERVICE (MARKETING AGREEMENTS... CONSUMER INFORMATION Popcorn Promotion, Research, and Consumer Information Order Definitions § 1215.14...

  2. Simplifying cochlear implant speech processor fitting

    NARCIS (Netherlands)

    Willeboer, C.

    2008-01-01

    Conventional fittings of the speech processor of a cochlear implant (CI) rely to a large extent on the implant recipient's subjective responses. For each of the 22 intracochlear electrodes the recipient has to indicate the threshold level (T-level) and comfortable loudness level (C-level) while

  3. Vector and parallel processors in computational science

    International Nuclear Information System (INIS)

    Duff, I.S.; Reid, J.K.

    1985-01-01

    This book presents the papers given at a conference which reviewed the new developments in parallel and vector processing. Topics considered at the conference included hardware (array processors, supercomputers), programming languages, software aids, numerical methods (e.g., Monte Carlo algorithms, iterative methods, finite elements, optimization), and applications (e.g., neutron transport theory, meteorology, image processing)

  4. Space Station Water Processor Process Pump

    Science.gov (United States)

    Parker, David

    1995-01-01

    This report presents the results of the development program conducted under contract NAS8-38250-12 related to the International Space Station (ISS) Water Processor (WP) Process Pump. The results of the Process Pumps evaluation conducted on this program indicates that further development is required in order to achieve the performance and life requirements for the ISSWP.

  5. Interleaved Subtask Scheduling on Multi Processor SOC

    NARCIS (Netherlands)

    Zhe, M.

    2006-01-01

    The ever-progressing semiconductor processing technique has integrated more and more embedded processors on a single system-on-achip (SoC). With such powerful SoC platforms, and also due to the stringent time-to-market deadlines, many functionalities which used to be implemented in ASICs are

  6. User manual Dieka PreProcessor

    NARCIS (Netherlands)

    Valkering, Kasper

    2000-01-01

    This is the user manual belonging to the Dieka-PreProcessor. This application was written by Wenhua Cao and revised and expanded by Kasper Valkering. The aim of this preproccesor is to be able to draw and mesh extrusion dies in ProEngineer, and do the FE-calculation in Dieka. The preprocessor makes

  7. Globe hosts launch of new processor

    CERN Multimedia

    2006-01-01

    Launch of the quadecore processor chip at the Globe. On 14 November, in a series of major media events around the world, the chip-maker Intel launched its new 'quadcore' processor. For the regions of Europe, the Middle East and Africa, the day-long launch event took place in CERN's Globe of Science and Innovation, with over 30 journalists in attendance, coming from as far away as Johannesburg and Dubai. CERN was a significant choice for the event: the first tests of this new generation of processor in Europe had been made at CERN over the preceding months, as part of CERN openlab, a research partnership with leading IT companies such as Intel, HP and Oracle. The event also provided the opportunity for the journalists to visit ATLAS and the CERN Computer Centre. The strategy of putting multiple processor cores on the same chip, which has been pursued by Intel and other chip-makers in the last few years, represents an important departure from the more traditional improvements in the sheer speed of such chips. ...

  8. Event analysis using a massively parallel processor

    International Nuclear Information System (INIS)

    Bale, A.; Gerelle, E.; Messersmith, J.; Warren, R.; Hoek, J.

    1990-01-01

    This paper describes a system for performing histogramming of n-tuple data at interactive rates using a commercial SIMD processor array connected to a work-station running the well-known Physics Analysis Workstation software (PAW). Results indicate that an order of magnitude performance improvement over current RISC technology is easily achievable

  9. gFEX, the ATLAS Calorimeter Level-1 Real Time Processor

    CERN Document Server

    AUTHOR|(SzGeCERN)759889; The ATLAS collaboration; Begel, Michael; Chen, Hucheng; Lanni, Francesco; Takai, Helio; Wu, Weihao

    2016-01-01

    The global feature extractor (gFEX) is a component of the Level-1 Calorimeter trigger Phase-I upgrade for the ATLAS experiment. It is intended to identify patterns of energy associated with the hadronic decays of high momentum Higgs, W, & Z bosons, top quarks, and exotic particles in real time at the LHC crossing rate. The single processor board will be packaged in an Advanced Telecommunications Computing Architecture (ATCA) module and implemented as a fast reconfigurable processor based on three Xilinx Vertex Ultra-scale FPGAs. The board will receive coarse-granularity information from all the ATLAS calorimeters on 276 optical fibers with the data transferred at the 40 MHz Large Hadron Collider (LHC) clock frequency. The gFEX will be controlled by a single system-on-chip processor, ZYNQ, that will be used to configure all the processor Field-Programmable Gate Array (FPGAs), monitor board health, and interface to external signals. Now, the pre-prototype board which includes one ZYNQ and one Vertex-7 FPGA ...

  10. Design Approach and Implementation of Application Specific Instruction Set Processor for SHA-3 BLAKE Algorithm

    Science.gov (United States)

    Zhang, Yuli; Han, Jun; Weng, Xinqian; He, Zhongzhu; Zeng, Xiaoyang

    This paper presents an Application Specific Instruction-set Processor (ASIP) for the SHA-3 BLAKE algorithm family by instruction set extensions (ISE) from an RISC (reduced instruction set computer) processor. With a design space exploration for this ASIP to increase the performance and reduce the area cost, we accomplish an efficient hardware and software implementation of BLAKE algorithm. The special instructions and their well-matched hardware function unit improve the calculation of the key section of the algorithm, namely G-functions. Also, relaxing the time constraint of the special function unit can decrease its hardware cost, while keeping the high data throughput of the processor. Evaluation results reveal the ASIP achieves 335Mbps and 176Mbps for BLAKE-256 and BLAKE-512. The extra area cost is only 8.06k equivalent gates. The proposed ASIP outperforms several software approaches on various platforms in cycle per byte. In fact, both high throughput and low hardware cost achieved by this programmable processor are comparable to that of ASIC implementations.

  11. Materials for microfluidic chip fabrication.

    Science.gov (United States)

    Ren, Kangning; Zhou, Jianhua; Wu, Hongkai

    2013-11-19

    Through manipulating fluids using microfabricated channel and chamber structures, microfluidics is a powerful tool to realize high sensitive, high speed, high throughput, and low cost analysis. In addition, the method can establish a well-controlled microenivroment for manipulating fluids and particles. It also has rapid growing implementations in both sophisticated chemical/biological analysis and low-cost point-of-care assays. Some unique phenomena emerge at the micrometer scale. For example, reactions are completed in a shorter amount of time as the travel distances of mass and heat are relatively small; the flows are usually laminar; and the capillary effect becomes dominant owing to large surface-to-volume ratios. In the meantime, the surface properties of the device material are greatly amplified, which can lead to either unique functions or problems that we would not encounter at the macroscale. Also, each material inherently corresponds with specific microfabrication strategies and certain native properties of the device. Therefore, the material for making the device plays a dominating role in microfluidic technologies. In this Account, we address the evolution of materials used for fabricating microfluidic chips, and discuss the application-oriented pros and cons of different materials. This Account generally follows the order of the materials introduced to microfluidics. Glass and silicon, the first generation microfluidic device materials, are perfect for capillary electrophoresis and solvent-involved applications but expensive for microfabriaction. Elastomers enable low-cost rapid prototyping and high density integration of valves on chip, allowing complicated and parallel fluid manipulation and in-channel cell culture. Plastics, as competitive alternatives to elastomers, are also rapid and inexpensive to microfabricate. Their broad variety provides flexible choices for different needs. For example, some thermosets support in-situ fabrication of

  12. Performance evaluation of throughput computing workloads using multi-core processors and graphics processors

    Science.gov (United States)

    Dave, Gaurav P.; Sureshkumar, N.; Blessy Trencia Lincy, S. S.

    2017-11-01

    Current trend in processor manufacturing focuses on multi-core architectures rather than increasing the clock speed for performance improvement. Graphic processors have become as commodity hardware for providing fast co-processing in computer systems. Developments in IoT, social networking web applications, big data created huge demand for data processing activities and such kind of throughput intensive applications inherently contains data level parallelism which is more suited for SIMD architecture based GPU. This paper reviews the architectural aspects of multi/many core processors and graphics processors. Different case studies are taken to compare performance of throughput computing applications using shared memory programming in OpenMP and CUDA API based programming.

  13. Detection methods for centrifugal microfluidic platforms

    DEFF Research Database (Denmark)

    Burger, Robert; Amato, Letizia; Boisen, Anja

    2016-01-01

    Centrifugal microfluidics has attracted much interest from academia as well as industry, since it potentially offers solutions for affordable, user-friendly and portable biosensing. A wide range of so-called fluidic unit operations, e.g. mixing, metering, liquid routing, and particle separation...... for the centrifugal microfluidics platform and cover optical as well as mechanical and electrical detection principles....

  14. Preface book Microfluidics for medical applications

    NARCIS (Netherlands)

    van den Berg, Albert; Segerink, Loes Irene

    2015-01-01

    This book presents an overview of the major microfluidics techniques and platforms used for medicine and medical applications, providing the reader with an overview of the recent developments in this field. It is divided in three parts: (1) tissue and organs on-chip, (2) microfluidics for medicine

  15. Cell Culture Microfluidic Biochips: Experimental Throughput Maximization

    DEFF Research Database (Denmark)

    Minhass, Wajid Hassan; Pop, Paul; Madsen, Jan

    2011-01-01

    Microfluidic biochips offer a promising alternative to a conventional biochemical laboratory, integrating all necessary functionalities on-chip in order to perform biochemical applications. Researchers have started to propose computer-aided design tools for the synthesis of such biochips. Our focus...... metaheuristic for experimental design generation for the cell culture microfluidic biochips, and we have evaluated our approach using multiple experimental setups....

  16. Modular microfluidic system for biological sample preparation

    Science.gov (United States)

    Rose, Klint A.; Mariella, Jr., Raymond P.; Bailey, Christopher G.; Ness, Kevin Dean

    2015-09-29

    A reconfigurable modular microfluidic system for preparation of a biological sample including a series of reconfigurable modules for automated sample preparation adapted to selectively include a) a microfluidic acoustic focusing filter module, b) a dielectrophoresis bacteria filter module, c) a dielectrophoresis virus filter module, d) an isotachophoresis nucleic acid filter module, e) a lyses module, and f) an isotachophoresis-based nucleic acid filter.

  17. Principles, Techniques, and Applications of Tissue Microfluidics

    Science.gov (United States)

    Wade, Lawrence A.; Kartalov, Emil P.; Shibata, Darryl; Taylor, Clive

    2011-01-01

    The principle of tissue microfluidics and its resultant techniques has been applied to cell analysis. Building microfluidics to suit a particular tissue sample would allow the rapid, reliable, inexpensive, highly parallelized, selective extraction of chosen regions of tissue for purposes of further biochemical analysis. Furthermore, the applicability of the techniques ranges beyond the described pathology application. For example, they would also allow the posing and successful answering of new sets of questions in many areas of fundamental research. The proposed integration of microfluidic techniques and tissue slice samples is called "tissue microfluidics" because it molds the microfluidic architectures in accordance with each particular structure of each specific tissue sample. Thus, microfluidics can be built around the tissues, following the tissue structure, or alternatively, the microfluidics can be adapted to the specific geometry of particular tissues. By contrast, the traditional approach is that microfluidic devices are structured in accordance with engineering considerations, while the biological components in applied devices are forced to comply with these engineering presets.

  18. Opportunities for microfluidic technologies in synthetic biology

    OpenAIRE

    Gulati, Shelly; Rouilly, Vincent; Niu, Xize; Chappell, James; Kitney, Richard I.; Edel, Joshua B.; Freemont, Paul S.; deMello, Andrew J.

    2009-01-01

    We introduce microfluidics technologies as a key foundational technology for synthetic biology experimentation. Recent advances in the field of microfluidics are reviewed and the potential of such a technological platform to support the rapid development of synthetic biology solutions is discussed.

  19. Data collection from FASTBUS to a DEC UNIBUS processor through the UNIBUS-Processor Interface

    International Nuclear Information System (INIS)

    Larwill, M.; Barsotti, E.; Lesny, D.; Pordes, R.

    1983-01-01

    This paper describes the use of the UNIBUS Processor Interface, an interface between FASTBUS and the Digital Equipment Corporation UNIBUS. The UPI was developed by Fermilab and the University of Illinois. Details of the use of this interface in a high energy physics experiment at Fermilab are given. The paper includes a discussion of the operation of the UPI on the UNIBUS of a VAX-11, and plans for using the UPI to perform data acquisition from FASTBUS to a VAX-11 Processor

  20. Onboard Data Processors for Planetary Ice-Penetrating Sounding Radars

    Science.gov (United States)

    Tan, I. L.; Friesenhahn, R.; Gim, Y.; Wu, X.; Jordan, R.; Wang, C.; Clark, D.; Le, M.; Hand, K. P.; Plaut, J. J.

    2011-12-01

    Among the many concerns faced by outer planetary missions, science data storage and transmission hold special significance. Such missions must contend with limited onboard storage, brief data downlink windows, and low downlink bandwidths. A potential solution to these issues lies in employing onboard data processors (OBPs) to convert raw data into products that are smaller and closely capture relevant scientific phenomena. In this paper, we present the implementation of two OBP architectures for ice-penetrating sounding radars tasked with exploring Europa and Ganymede. Our first architecture utilizes an unfocused processing algorithm extended from the Mars Advanced Radar for Subsurface and Ionosphere Sounding (MARSIS, Jordan et. al. 2009). Compared to downlinking raw data, we are able to reduce data volume by approximately 100 times through OBP usage. To ensure the viability of our approach, we have implemented, simulated, and synthesized this architecture using both VHDL and Matlab models (with fixed-point and floating-point arithmetic) in conjunction with Modelsim. Creation of a VHDL model of our processor is the principle step in transitioning to actual digital hardware, whether in a FPGA (field-programmable gate array) or an ASIC (application-specific integrated circuit), and successful simulation and synthesis strongly indicate feasibility. In addition, we examined the tradeoffs faced in the OBP between fixed-point accuracy, resource consumption, and data product fidelity. Our second architecture is based upon a focused fast back projection (FBP) algorithm that requires a modest amount of computing power and on-board memory while yielding high along-track resolution and improved slope detection capability. We present an overview of the algorithm and details of our implementation, also in VHDL. With the appropriate tradeoffs, the use of OBPs can significantly reduce data downlink requirements without sacrificing data product fidelity. Through the development

  1. Array processors based on Gaussian fraction-free method

    Energy Technology Data Exchange (ETDEWEB)

    Peng, S; Sedukhin, S [Aizu Univ., Aizuwakamatsu, Fukushima (Japan); Sedukhin, I

    1998-03-01

    The design of algorithmic array processors for solving linear systems of equations using fraction-free Gaussian elimination method is presented. The design is based on a formal approach which constructs a family of planar array processors systematically. These array processors are synthesized and analyzed. It is shown that some array processors are optimal in the framework of linear allocation of computations and in terms of number of processing elements and computing time. (author)

  2. Applications of Microfluidics in Quantitative Biology.

    Science.gov (United States)

    Bai, Yang; Gao, Meng; Wen, Lingling; He, Caiyun; Chen, Yuan; Liu, Chenli; Fu, Xiongfei; Huang, Shuqiang

    2018-05-01

    Quantitative biology is dedicated to taking advantage of quantitative reasoning and advanced engineering technologies to make biology more predictable. Microfluidics, as an emerging technique, provides new approaches to precisely control fluidic conditions on small scales and collect data in high-throughput and quantitative manners. In this review, the authors present the relevant applications of microfluidics to quantitative biology based on two major categories (channel-based microfluidics and droplet-based microfluidics), and their typical features. We also envision some other microfluidic techniques that may not be employed in quantitative biology right now, but have great potential in the near future. © 2017 Shenzhen Institutes of Advanced Technology, Chinese Academy of Sciences. Biotechnology Journal Published by Wiley-VCH Verlag GmbH & Co. KGaA.

  3. Development of an Integrated Polymer Microfluidic Stack

    International Nuclear Information System (INIS)

    Datta, Proyag; Hammacher, Jens; Pease, Mark; Gurung, Sitanshu; Goettert, Jost

    2006-01-01

    Microfluidic is a field of considerable interest. While significant research has been carried out to develop microfluidic components, very little has been done to integrate the components into a complete working system. We present a flexible modular system platform that addresses the requirements of a complete microfluidic system. A microfluidic stack system is demonstrated with the layers of the stack being modular for specific functions. The stack and accompanying infrastructure provides an attractive platform for users to transition their design concepts into a working microfluidic system quickly with very little effort. The concept is demonstrated by using the system to carry out a chemilumiscence experiment. Details regarding the fabrication, assembly and experimental methods are presented

  4. Practical Packaging Technology for Microfluidic Systems

    International Nuclear Information System (INIS)

    Lee, Hwan Yong; Han, Song I; Han, Ki Ho

    2010-01-01

    This paper presents the technology for the design, fabrication, and characterization of a microfluidic system interface (MSI): the purpose of this technology is to enable the integration of complex microfluidic systems. The MSI technology can be applied in a simple manner for realizing complex arrangements of microfluidic interconnects, integrated microvalves for fluid control, and optical windows for on-chip optical processes. A microfluidic system for the preparation of genetic samples was used as the test vehicle to prove the effectiveness of the MSI technology for packaging complex microfluidic systems with multiple functionalities. The miniaturized genetic sample preparation system comprised several functional compartments, including compartments for cell purification, cell separation, cell lysis, solid-phase DNA extraction, polymerase chain reaction, and capillary electrophoresis. Additionally, the functional operation of the solid-phase extraction and PCR thermocycling compartments was demonstrated by using the MSI

  5. Manipulation of microfluidic droplets by electrorheological fluid

    KAUST Repository

    Zhang, Menying

    2009-09-01

    Microfluidics, especially droplet microfluidics, attracts more and more researchers from diverse fields, because it requires fewer materials and less time, produces less waste and has the potential of highly integrated and computer-controlled reaction processes for chemistry and biology. Electrorheological fluid, especially giant electrorheological fluid (GERF), which is considered as a kind of smart material, has been applied to the microfluidic systems to achieve active and precise control of fluid by electrical signal. In this review article, we will introduce recent results of microfluidic droplet manipulation, GERF and some pertinent achievements by introducing GERF into microfluidic system: digital generation, manipulation of "smart droplets" and droplet manipulation by GERF. Once it is combined with real-time detection, integrated chip with multiple functions can be realized. © 2009 Wiley-VCH Verlag GmbH & Co. KGaA.

  6. Programmable trigger for electron pairs in ring image Cherenkov counters

    International Nuclear Information System (INIS)

    Glab, J.; Baur, R.; Manner, R.

    1990-01-01

    This paper describes a programmable trigger processor for the recognition of Cherenkov rings in a RICH counter. It identifies open electron pairs and suppresses close conversion and Dalitz pairs within 20 μs. More generally, the system can be used for correlating pixel images with pattern masks in order to locate all relatively well defined patterns of a certain type. The trigger processor consists of a systolic processor array of 160 x 176, i.e., 28,160 identical processing elements (PEs) that filter out open electron pairs, and a pseudo adder array that determines whether there was at least one such pair. The processor array is assembled of 20 x 22 VLSI chips containing 8 x 8 PEs each. The semi-custom chip has been developed in 2 μ CMOS standard cell technology

  7. Crispv programme

    International Nuclear Information System (INIS)

    Marinkovicj, N.

    CRISPV (Criticality and Spectrum code) is a multigroup neutron spectrum code for homogeneous reactor cores and is actually a somewhat modified version of the original CRISP programme. It is a combination of DATAPREP-II and BIGG-II programmes. It is assumed that the reactor cell is a cylindrical fuel rod in the light or heavy water moderator. DATEPREP-II CODE forms the multigroup data for homogeneous reactor and prepares the input parameters for the BIGG-II code. It has its own nuclear data library on a separate tape in binary mode. BIGG-II code is a multigroup neutron spectrum and criticality code for a homogenized medium. It has as well its own separate data library. In the CRISPV programme the overlay structure enables automatic handling of data calculated in the DATAPREP-II programme and needed in the BIGG-II core. Both programmes are written in FORTRAN for CDC 3600. Using the programme is very efficient and simple

  8. Lipsi: Probably the Smallest Processor in the World

    DEFF Research Database (Denmark)

    Schoeberl, Martin

    2018-01-01

    While research on high-performance processors is important, it is also interesting to explore processor architectures at the other end of the spectrum: tiny processor cores for auxiliary functions. While it is common to implement small circuits for such functions, such as a serial port, in dedica...... at a minimal cost....

  9. Research Progress of Microfluidic Chips Preparation and its Optical Element

    Directory of Open Access Journals (Sweden)

    Feng WANG

    2014-03-01

    Full Text Available Microfluidic technology is the emerging technologies in researching fluid channel and related applications in the micro and nano-scale space. Microfluidic chip is a new miniaturized rapid analysis platform by microfluidic technology, it has many characteristics such as liquid flow control, minimal reagent consumption, rapid analysis, which is widely used in physics, chemistry, biology, and engineering science and other fields, it has strong interdisciplinary. This paper mainly discusses research progress of materials used for microfluidic chips and the devices based on microfluidic technology, including microfluidic chip, microfluidic optical devices, microfluidic laser preparation, microfluidic chip applications, focusing on the quasi-molecular laser processing technology and femtosecond laser processing technology in the microfluidic devices preparation, and make development prospects for it.

  10. Commodity multi-processor systems in the ATLAS level-2 trigger

    CERN Document Server

    Abolins, M; Bock, R; Bogaerts, J A C; Dawson, J; Ermoline, Y; Hauser, R; Kugel, A; Lay, R; Müller, M; Noffz, K H; Pope, B; Schlereth, J L; Werner, P

    2000-01-01

    Low cost SMP (symmetric multi-processor) systems provide substantial CPU and I/O capacity. These features together with the ease of system integration make them an attractive and cost effective solution for a number of real-time applications in event selection. In ATLAS we consider them as intelligent input buffers (an "active" ROB complex), as event flow supervisors or as powerful processing nodes. Measurements of the performance of one off-the-shelf commercial 4- processor PC with two PCI buses, equipped with commercial FPGA based data source cards (microEnable) and running commercial software are presented and mapped on such applications together with a long-term programme of work. The SMP systems may be considered as an important building block in future data acquisition systems. (9 refs).

  11. Optical calorimetry in microfluidic droplets.

    Science.gov (United States)

    Chamoun, Jacob; Pattekar, Ashish; Afshinmanesh, Farzaneh; Martini, Joerg; Recht, Michael I

    2018-05-29

    A novel microfluidic calorimeter that measures the enthalpy change of reactions occurring in 100 μm diameter aqueous droplets in fluoropolymer oil has been developed. The aqueous reactants flow into a microfluidic droplet generation chip in separate fluidic channels, limiting contact between the streams until immediately before they form the droplet. The diffusion-driven mixing of reactants is predominantly restricted to within the droplet. The temperature change in droplets due to the heat of reaction is measured optically by recording the reflectance spectra of encapsulated thermochromic liquid crystals (TLC) that are added to one of the reactant streams. As the droplets travel through the channel, the spectral characteristics of the TLC represent the internal temperature, allowing optical measurement with a precision of ≈6 mK. The microfluidic chip and all fluids are temperature controlled, and the reaction heat within droplets raises their temperature until thermal diffusion dissipates the heat into the surrounding oil and chip walls. Position resolved optical temperature measurement of the droplets allows calculation of the heat of reaction by analyzing the droplet temperature profile over time. Channel dimensions, droplet generation rate, droplet size, reactant stream flows and oil flow rate are carefully balanced to provide rapid diffusional mixing of reactants compared to thermal diffusion, while avoiding thermal "quenching" due to contact between the droplets and the chip walls. Compared to conventional microcalorimetry, which has been used in this work to provide reference measurements, this new continuous flow droplet calorimeter has the potential to perform titrations ≈1000-fold faster while using ≈400-fold less reactants per titration.

  12. Magnetic separation in microfluidic systems

    DEFF Research Database (Denmark)

    Smistrup, Kristian

    2007-01-01

    to facilitate real-time monitoring of the experiments. The set-up and experimental protocol are described in detail. Results are presented for ’active’ magnetic bead separators, where on-chip microfabricated electromagnets supply the magnetic field and field gradients necessary for magnetic bead separation....... It is shown conceptually how such a system can be applied for parallel biochemical processing in a microfluidic system. ’Passive’ magnetic separators are presented, where on-chip soft magnetic elements are magnetized by an external magnetic field and create strong magnetic fields and gradients inside...

  13. Microfluidics and microscale transport processes

    CERN Document Server

    Chakraborty, Suman

    2012-01-01

    With an intense focus on micro- and nanotechnology from a fluidic perspective, this book details the research activities in key directions on both the theoretical and experimental fronts. As part of the IIT Kharagpur Research Monograph series, the text discusses topics such as capillary transport in microchannels, fluid friction and heat transfer in microchannels, electrokinetics, and interfacial transport in nanochannels. It also covers nanoparticle transport in colloidal suspensions, bubble generation in microfluidic channels, micro-heat pipe, the lattice Boltzmann method for phase changing

  14. Microfluidic Approach to Cell Microencapsulation.

    Science.gov (United States)

    Sharma, Varna; Hunckler, Michael; Ramasubramanian, Melur K; Opara, Emmanuel C; Katuri, Kalyan C

    2017-01-01

    Bioartificial pancreas made of insulin-secreting islets cells holds great promise in the treatment of individuals with Type-1 diabetes. Successful islet cell microencapsulation in biopolymers is a key step for providing immunoisolation of transplanted islet cells. Because of the variability in the size and shape of pancreatic islets, one of the main obstacles in their microencapsulation is the inability to consistently control shape, size, and microstructure of the encapsulating biopolymer capsule. In this chapter, we provide a detailed description of a microfluidic approach to islet cell encapsulation in alginate that might address the microencapsulation challenges.

  15. Bulk-memory processor for data acquisition

    International Nuclear Information System (INIS)

    Nelson, R.O.; McMillan, D.E.; Sunier, J.W.; Meier, M.; Poore, R.V.

    1981-01-01

    To meet the diverse needs and data rate requirements at the Van de Graaff and Weapons Neutron Research (WNR) facilities, a bulk memory system has been implemented which includes a fast and flexible processor. This bulk memory processor (BMP) utilizes bit slice and microcode techniques and features a 24 bit wide internal architecture allowing direct addressing of up to 16 megawords of memory and histogramming up to 16 million counts per channel without overflow. The BMP is interfaced to the MOSTEK MK 8000 bulk memory system and to the standard MODCOMP computer I/O bus. Coding for the BMP both at the microcode level and with macro instructions is supported. The generalized data acquisition system has been extended to support the BMP in a manner transparent to the user

  16. Design of Processors with Reconfigurable Microarchitecture

    Directory of Open Access Journals (Sweden)

    Andrey Mokhov

    2014-01-01

    Full Text Available Energy becomes a dominating factor for a wide spectrum of computations: from intensive data processing in “big data” companies resulting in large electricity bills, to infrastructure monitoring with wireless sensors relying on energy harvesting. In this context it is essential for a computation system to be adaptable to the power supply and the service demand, which often vary dramatically during runtime. In this paper we present an approach to building processors with reconfigurable microarchitecture capable of changing the way they fetch and execute instructions depending on energy availability and application requirements. We show how to use Conditional Partial Order Graphs to formally specify the microarchitecture of such a processor, explore the design possibilities for its instruction set, and synthesise the instruction decoder using correct-by-construction techniques. The paper is focused on the design methodology, which is evaluated by implementing a power-proportional version of Intel 8051 microprocessor.

  17. Real time processor for array speckle interferometry

    International Nuclear Information System (INIS)

    Chin, G.; Florez, J.; Borelli, R.; Fong, W.; Miko, J.; Trujillo, C.

    1989-01-01

    With the construction of several new large aperture telescopes and the development of large format array detectors in the near IR, the ability to obtain diffraction limited seeing via IR array speckle interferometry offers a powerful tool. We are constructing a real-time processor to acquire image frames, perform array flat-fielding, execute a 64 x 64 element 2D complex FFT, and to average the power spectrum all within the 25 msec coherence time for speckles at near IR wavelength. The processor is a compact unit controlled by a PC with real time display and data storage capability. It provides the ability to optimize observations and obtain results on the telescope rather than waiting several weeks before the data can be analyzed and viewed with off-line methods

  18. Parallel processor programs in the Federal Government

    Science.gov (United States)

    Schneck, P. B.; Austin, D.; Squires, S. L.; Lehmann, J.; Mizell, D.; Wallgren, K.

    1985-01-01

    In 1982, a report dealing with the nation's research needs in high-speed computing called for increased access to supercomputing resources for the research community, research in computational mathematics, and increased research in the technology base needed for the next generation of supercomputers. Since that time a number of programs addressing future generations of computers, particularly parallel processors, have been started by U.S. government agencies. The present paper provides a description of the largest government programs in parallel processing. Established in fiscal year 1985 by the Institute for Defense Analyses for the National Security Agency, the Supercomputing Research Center will pursue research to advance the state of the art in supercomputing. Attention is also given to the DOE applied mathematical sciences research program, the NYU Ultracomputer project, the DARPA multiprocessor system architectures program, NSF research on multiprocessor systems, ONR activities in parallel computing, and NASA parallel processor projects.

  19. RISC Processors and High Performance Computing

    Science.gov (United States)

    Bailey, David H.; Saini, Subhash; Craw, James M. (Technical Monitor)

    1995-01-01

    This tutorial will discuss the top five RISC microprocessors and the parallel systems in which they are used. It will provide a unique cross-machine comparison not available elsewhere. The effective performance of these processors will be compared by citing standard benchmarks in the context of real applications. The latest NAS Parallel Benchmarks, both absolute performance and performance per dollar, will be listed. The next generation of the NPB will be described. The tutorial will conclude with a discussion of future directions in the field. Technology Transfer Considerations: All of these computer systems are commercially available internationally. Information about these processors is available in the public domain, mostly from the vendors themselves. The NAS Parallel Benchmarks and their results have been previously approved numerous times for public release, beginning back in 1991.

  20. Multi-Core Processor Memory Contention Benchmark Analysis Case Study

    Science.gov (United States)

    Simon, Tyler; McGalliard, James

    2009-01-01

    Multi-core processors dominate current mainframe, server, and high performance computing (HPC) systems. This paper provides synthetic kernel and natural benchmark results from an HPC system at the NASA Goddard Space Flight Center that illustrate the performance impacts of multi-core (dual- and quad-core) vs. single core processor systems. Analysis of processor design, application source code, and synthetic and natural test results all indicate that multi-core processors can suffer from significant memory subsystem contention compared to similar single-core processors.

  1. VIRTUS: a multi-processor system in FASTBUS

    International Nuclear Information System (INIS)

    Ellett, J.; Jackson, R.; Ritter, R.; Schlein, P.; Yaeger, D.; Zweizig, J.

    1986-01-01

    VIRTUS is a system of parallel MC68000-based processors interconnected by FASTBUS that is used either on-line as an intelligent trigger component or off-line for full event processing. Each processor receives the complete set of data from one event. The host computer, a VAX 11/780, down-line loads all software to the processors, controls and monitors the functioning of all processors, and writes processed data to tape. Instructions, programs, and data are transferred among the processors and the host in the form of fixed format, variable length data blocks. (Auth.)

  2. Low-Latency Embedded Vision Processor (LLEVS)

    Science.gov (United States)

    2016-03-01

    algorithms, low-latency video processing, embedded image processor, wearable electronics, helmet-mounted systems, alternative night / day imaging...external subsystems and data sources with the device. The establishment of data interfaces in terms of data transfer rates, formats and types are...video signals from Near-visible Infrared (NVIR) sensor, Shortwave IR (SWIR) and Longwave IR (LWIR) is the main processing for Night Vision (NI) system

  3. Keystone Business Models for Network Security Processors

    Directory of Open Access Journals (Sweden)

    Arthur Low

    2013-07-01

    Full Text Available Network security processors are critical components of high-performance systems built for cybersecurity. Development of a network security processor requires multi-domain experience in semiconductors and complex software security applications, and multiple iterations of both software and hardware implementations. Limited by the business models in use today, such an arduous task can be undertaken only by large incumbent companies and government organizations. Neither the “fabless semiconductor” models nor the silicon intellectual-property licensing (“IP-licensing” models allow small technology companies to successfully compete. This article describes an alternative approach that produces an ongoing stream of novel network security processors for niche markets through continuous innovation by both large and small companies. This approach, referred to here as the "business ecosystem model for network security processors", includes a flexible and reconfigurable technology platform, a “keystone” business model for the company that maintains the platform architecture, and an extended ecosystem of companies that both contribute and share in the value created by innovation. New opportunities for business model innovation by participating companies are made possible by the ecosystem model. This ecosystem model builds on: i the lessons learned from the experience of the first author as a senior integrated circuit architect for providers of public-key cryptography solutions and as the owner of a semiconductor startup, and ii the latest scholarly research on technology entrepreneurship, business models, platforms, and business ecosystems. This article will be of interest to all technology entrepreneurs, but it will be of particular interest to owners of small companies that provide security solutions and to specialized security professionals seeking to launch their own companies.

  4. Silicon Processors Using Organically Reconfigurable Techniques (SPORT)

    Science.gov (United States)

    2014-05-19

    AFRL-OSR-VA-TR-2014-0132 SILICON PROCESSORS USING ORGANICALLY RECONFIGURABLE TECHNIQUES ( SPORT ) Dennis Prather UNIVERSITY OF DELAWARE Final Report 05...5a. CONTRACT NUMBER Silicon Processes for Organically Reconfigurable Techniques ( SPORT ) 5b. GRANT NUMBER FA9550-10-1-0363 5c...Contract: Silicon Processes for Organically Reconfigurable Techniques ( SPORT ) Contract #: FA9550-10-1-0363 Reporting Period: 1 July 2010 – 31 December

  5. Quantum chemistry on a superconducting quantum processor

    Energy Technology Data Exchange (ETDEWEB)

    Kaicher, Michael P.; Wilhelm, Frank K. [Theoretical Physics, Saarland University, 66123 Saarbruecken (Germany); Love, Peter J. [Department of Physics and Astronomy, Tufts University, Medford, MA 02155 (United States)

    2016-07-01

    Quantum chemistry is the most promising civilian application for quantum processors to date. We study its adaptation to superconducting (sc) quantum systems, computing the ground state energy of LiH through a variational hybrid quantum classical algorithm. We demonstrate how interactions native to sc qubits further reduce the amount of quantum resources needed, pushing sc architectures as a near-term candidate for simulations of more complex atoms/molecules.

  6. Debugging in a multi-processor environment

    International Nuclear Information System (INIS)

    Spann, J.M.

    1981-01-01

    The Supervisory Control and Diagnostic System (SCDS) for the Mirror Fusion Test Facility (MFTF) consists of nine 32-bit minicomputers arranged in a tightly coupled distributed computer system utilizing a share memory as the data exchange medium. Debugging of more than one program in the multi-processor environment is a difficult process. This paper describes what new tools were developed and how the testing of software is performed in the SCDS for the MFTF project

  7. Integrated bioassays in microfluidic devices: botulinum toxin assays.

    Science.gov (United States)

    Mangru, Shakuntala; Bentz, Bryan L; Davis, Timothy J; Desai, Nitin; Stabile, Paul J; Schmidt, James J; Millard, Charles B; Bavari, Sina; Kodukula, Krishna

    2005-12-01

    A microfluidic assay was developed for screening botulinum neurotoxin serotype A (BoNT-A) by using a fluorescent resonance energy transfer (FRET) assay. Molded silicone microdevices with integral valves, pumps, and reagent reservoirs were designed and fabricated. Electrical and pneumatic control hardware were constructed, and software was written to automate the assay protocol and data acquisition. Detection was accomplished by fluorescence microscopy. The system was validated with a peptide inhibitor, running 2 parallel assays, as a feasibility demonstration. The small footprint of each bioreactor cell (0.5 cm2) and scalable fluidic architecture enabled many parallel assays on a single chip. The chip is programmable to run a dilution series in each lane, generating concentration-response data for multiple inhibitors. The assay results showed good agreement with the corresponding experiments done at a macroscale level. Although the system has been developed for BoNT-A screening, a wide variety of assays can be performed on the microfluidic chip with little or no modification.

  8. Intelligent trigger processor for the crystal box

    International Nuclear Information System (INIS)

    Sanders, G.H.; Butler, H.S.; Cooper, M.D.

    1981-01-01

    A large solid angle modular NaI(Tl) detector with 432 phototubes and 88 trigger scintillators is being used to search simultaneously for three lepton flavor changing decays of muon. A beam of up to 10 6 muons stopping per second with a 6% duty factor would yield up to 1000 triggers per second from random triple coincidences. A reduction of the trigger rate to 10 Hz is required from a hardwired primary trigger processor described in this paper. Further reduction to < 1 Hz is achieved by a microprocessor based secondary trigger processor. The primary trigger hardware imposes voter coincidence logic, stringent timing requirements, and a non-adjacency requirement in the trigger scintillators defined by hardwired circuits. Sophisticated geometric requirements are imposed by a PROM-based matrix logic, and energy and vector-momentum cuts are imposed by a hardwired processor using LSI flash ADC's and digital arithmetic loci. The secondary trigger employs four satellite microprocessors to do a sparse data scan, multiplex the data acquisition channels and apply additional event filtering

  9. Multibus-based parallel processor for simulation

    Science.gov (United States)

    Ogrady, E. P.; Wang, C.-H.

    1983-01-01

    A Multibus-based parallel processor simulation system is described. The system is intended to serve as a vehicle for gaining hands-on experience, testing system and application software, and evaluating parallel processor performance during development of a larger system based on the horizontal/vertical-bus interprocessor communication mechanism. The prototype system consists of up to seven Intel iSBC 86/12A single-board computers which serve as processing elements, a multiple transmission controller (MTC) designed to support system operation, and an Intel Model 225 Microcomputer Development System which serves as the user interface and input/output processor. All components are interconnected by a Multibus/IEEE 796 bus. An important characteristic of the system is that it provides a mechanism for a processing element to broadcast data to other selected processing elements. This parallel transfer capability is provided through the design of the MTC and a minor modification to the iSBC 86/12A board. The operation of the MTC, the basic hardware-level operation of the system, and pertinent details about the iSBC 86/12A and the Multibus are described.

  10. Code compression for VLIW embedded processors

    Science.gov (United States)

    Piccinelli, Emiliano; Sannino, Roberto

    2004-04-01

    The implementation of processors for embedded systems implies various issues: main constraints are cost, power dissipation and die area. On the other side, new terminals perform functions that require more computational flexibility and effort. Long code streams must be loaded into memories, which are expensive and power consuming, to run on DSPs or CPUs. To overcome this issue, the "SlimCode" proprietary algorithm presented in this paper (patent pending technology) can reduce the dimensions of the program memory. It can run offline and work directly on the binary code the compiler generates, by compressing it and creating a new binary file, about 40% smaller than the original one, to be loaded into the program memory of the processor. The decompression unit will be a small ASIC, placed between the Memory Controller and the System bus of the processor, keeping unchanged the internal CPU architecture: this implies that the methodology is completely transparent to the core. We present comparisons versus the state-of-the-art IBM Codepack algorithm, along with its architectural implementation into the ST200 VLIW family core.

  11. Techniques for optimizing inerting in electron processors

    International Nuclear Information System (INIS)

    Rangwalla, I.J.; Korn, D.J.; Nablo, S.V.

    1993-01-01

    The design of an ''inert gas'' distribution system in an electron processor must satisfy a number of requirements. The first of these is the elimination or control of beam produced ozone and NO x which can be transported from the process zone by the product into the work area. Since the tolerable levels for O 3 in occupied areas around the processor are 3 in the beam heated process zone, or exhausting and dilution of the gas at the processor exit. The second requirement of the inerting system is to provide a suitable environment for completing efficient, free radical initiated addition polymerization. The competition between radical loss through de-excitation and that from O 2 quenching must be understood. This group has used gas chromatographic analysis of electron cured coatings to study the trade-offs of delivered dose, dose rate and O 2 concentrations in the process zone to determine the tolerable ranges of parameter excursions for production quality control purposes. These techniques are described for an ink coating system on paperboard, where a broad range of process parameters have been studied (D, D radical, O 2 ). It is then shown how the technique is used to optimize the use of higher purity (10-100 ppm O 2 ) nitrogen gas for inerting, in combination with lower purity (2-20,000 ppm O 2 ) non-cryogenically produced gas, as from a membrane or pressure swing adsorption generators. (author)

  12. Treecode with a Special-Purpose Processor

    Science.gov (United States)

    Makino, Junichiro

    1991-08-01

    We describe an implementation of the modified Barnes-Hut tree algorithm for a gravitational N-body calculation on a GRAPE (GRAvity PipE) backend processor. GRAPE is a special-purpose computer for N-body calculations. It receives the positions and masses of particles from a host computer and then calculates the gravitational force at each coordinate specified by the host. To use this GRAPE processor with the hierarchical tree algorithm, the host computer must maintain a list of all nodes that exert force on a particle. If we create this list for each particle of the system at each timestep, the number of floating-point operations on the host and that on GRAPE would become comparable, and the increased speed obtained by using GRAPE would be small. In our modified algorithm, we create a list of nodes for many particles. Thus, the amount of the work required of the host is significantly reduced. This algorithm was originally developed by Barnes in order to vectorize the force calculation on a Cyber 205. With this algorithm, the computing time of the force calculation becomes comparable to that of the tree construction, if the GRAPE backend processor is sufficiently fast. The obtained speed-up factor is 30 to 50 for a RISC-based host computer and GRAPE-1A with a peak speed of 240 Mflops.

  13. Self-contained microfluidic systems: a review.

    Science.gov (United States)

    Boyd-Moss, Mitchell; Baratchi, Sara; Di Venere, Martina; Khoshmanesh, Khashayar

    2016-08-16

    Microfluidic systems enable rapid diagnosis, screening and monitoring of diseases and health conditions using small amounts of biological samples and reagents. Despite these remarkable features, conventional microfluidic systems rely on bulky expensive external equipment, which hinders their utility as powerful analysis tools outside of research laboratories. 'Self-contained' microfluidic systems, which contain all necessary components to facilitate a complete assay, have been developed to address this limitation. In this review, we provide an in-depth overview of self-contained microfluidic systems. We categorise these systems based on their operating mechanisms into three major groups: passive, hand-powered and active. Several examples are provided to discuss the structure, capabilities and shortcomings of each group. In particular, we discuss the self-contained microfluidic systems enabled by active mechanisms, due to their unique capability for running multi-step and highly controllable diagnostic assays. Integration of self-contained microfluidic systems with the image acquisition and processing capabilities of smartphones, especially those equipped with accessory optical components, enables highly sensitive and quantitative assays, which are discussed. Finally, the future trends and possible solutions to expand the versatility of self-contained, stand-alone microfluidic platforms are outlined.

  14. Microfluidic cell culture systems for drug research.

    Science.gov (United States)

    Wu, Min-Hsien; Huang, Song-Bin; Lee, Gwo-Bin

    2010-04-21

    In pharmaceutical research, an adequate cell-based assay scheme to efficiently screen and to validate potential drug candidates in the initial stage of drug discovery is crucial. In order to better predict the clinical response to drug compounds, a cell culture model that is faithful to in vivo behavior is required. With the recent advances in microfluidic technology, the utilization of a microfluidic-based cell culture has several advantages, making it a promising alternative to the conventional cell culture methods. This review starts with a comprehensive discussion on the general process for drug discovery and development, the role of cell culture in drug research, and the characteristics of the cell culture formats commonly used in current microfluidic-based, cell-culture practices. Due to the significant differences in several physical phenomena between microscale and macroscale devices, microfluidic technology provides unique functionality, which is not previously possible by using traditional techniques. In a subsequent section, the niches for using microfluidic-based cell culture systems for drug research are discussed. Moreover, some critical issues such as cell immobilization, medium pumping or gradient generation in microfluidic-based, cell-culture systems are also reviewed. Finally, some practical applications of microfluidic-based, cell-culture systems in drug research particularly those pertaining to drug toxicity testing and those with a high-throughput capability are highlighted.

  15. Multi-processor network implementations in Multibus II and VME

    International Nuclear Information System (INIS)

    Briegel, C.

    1992-01-01

    ACNET (Fermilab Accelerator Controls Network), a proprietary network protocol, is implemented in a multi-processor configuration for both Multibus II and VME. The implementations are contrasted by the bus protocol and software design goals. The Multibus II implementation provides for multiple processors running a duplicate set of tasks on each processor. For a network connected task, messages are distributed by a network round-robin scheduler. Further, messages can be stopped, continued, or re-routed for each task by user-callable commands. The VME implementation provides for multiple processors running one task across all processors. The process can either be fixed to a particular processor or dynamically allocated to an available processor depending on the scheduling algorithm of the multi-processing operating system. (author)

  16. Ultrasensitive microfluidic solid-phase ELISA using an actuatable microwell-patterned PDMS chip.

    Science.gov (United States)

    Wang, Tanyu; Zhang, Mohan; Dreher, Dakota D; Zeng, Yong

    2013-11-07

    Quantitative detection of low abundance proteins is of significant interest for biological and clinical applications. Here we report an integrated microfluidic solid-phase ELISA platform for rapid and ultrasensitive detection of proteins with a wide dynamic range. Compared to the existing microfluidic devices that perform affinity capture and enzyme-based optical detection in a constant channel volume, the key novelty of our design is two-fold. First, our system integrates a microwell-patterned assay chamber that can be pneumatically actuated to significantly reduce the volume of chemifluorescent reaction, markedly improving the sensitivity and speed of ELISA. Second, monolithic integration of on-chip pumps and the actuatable assay chamber allow programmable fluid delivery and effective mixing for rapid and sensitive immunoassays. Ultrasensitive microfluidic ELISA was demonstrated for insulin-like growth factor 1 receptor (IGF-1R) across at least five orders of magnitude with an extremely low detection limit of 21.8 aM. The microwell-based solid-phase ELISA strategy provides an expandable platform for developing the next-generation microfluidic immunoassay systems that integrate and automate digital and analog measurements to further improve the sensitivity, dynamic ranges, and reproducibility of proteomic analysis.

  17. Merged ozone profiles from four MIPAS processors

    Science.gov (United States)

    Laeng, Alexandra; von Clarmann, Thomas; Stiller, Gabriele; Dinelli, Bianca Maria; Dudhia, Anu; Raspollini, Piera; Glatthor, Norbert; Grabowski, Udo; Sofieva, Viktoria; Froidevaux, Lucien; Walker, Kaley A.; Zehner, Claus

    2017-04-01

    The Michelson Interferometer for Passive Atmospheric Sounding (MIPAS) was an infrared (IR) limb emission spectrometer on the Envisat platform. Currently, there are four MIPAS ozone data products, including the operational Level-2 ozone product processed at ESA, with the scientific prototype processor being operated at IFAC Florence, and three independent research products developed by the Istituto di Fisica Applicata Nello Carrara (ISAC-CNR)/University of Bologna, Oxford University, and the Karlsruhe Institute of Technology-Institute of Meteorology and Climate Research/Instituto de Astrofísica de Andalucía (KIT-IMK/IAA). Here we present a dataset of ozone vertical profiles obtained by merging ozone retrievals from four independent Level-2 MIPAS processors. We also discuss the advantages and the shortcomings of this merged product. As the four processors retrieve ozone in different parts of the spectra (microwindows), the source measurements can be considered as nearly independent with respect to measurement noise. Hence, the information content of the merged product is greater and the precision is better than those of any parent (source) dataset. The merging is performed on a profile per profile basis. Parent ozone profiles are weighted based on the corresponding error covariance matrices; the error correlations between different profile levels are taken into account. The intercorrelations between the processors' errors are evaluated statistically and are used in the merging. The height range of the merged product is 20-55 km, and error covariance matrices are provided as diagnostics. Validation of the merged dataset is performed by comparison with ozone profiles from ACE-FTS (Atmospheric Chemistry Experiment-Fourier Transform Spectrometer) and MLS (Microwave Limb Sounder). Even though the merging is not supposed to remove the biases of the parent datasets, around the ozone volume mixing ratio peak the merged product is found to have a smaller (up to 0.1 ppmv

  18. Fluorescence detection system for microfluidic droplets

    Science.gov (United States)

    Chen, Binyu; Han, Xiaoming; Su, Zhen; Liu, Quanjun

    2018-05-01

    In microfluidic detection technology, because of the universality of optical methods in laboratory, optical detection is an attractive solution for microfluidic chip laboratory equipment. In addition, the equipment with high stability and low cost can be realized by integrating appropriate optical detection technology on the chip. This paper reports a detection system for microfluidic droplets. Photomultiplier tubes (PMT) is used as a detection device to improve the sensitivity of detection. This system improves the signal to noise ratio by software filtering and spatial filter. The fluorescence intensity is proportional to the concentration of the fluorescence and intensity of the laser. The fluorescence micro droplets of different concentrations can be distinguished by this system.

  19. Track recognition in 4 μs by a systolic trigger processor using a parallel Hough transform

    International Nuclear Information System (INIS)

    Klefenz, F.; Noffz, K.H.; Conen, W.; Zoz, R.; Kugel, A.; Maenner, R.; Univ. Heidelberg

    1993-01-01

    A parallel Hough transform processor has been developed that identifies circular particle tracks in a 2D projection of the OPAL jet chamber. The high-speed requirements imposed by the 8 bunch crossing mode of LEP could be fulfilled by computing the starting angle and the radius of curvature for each well defined track in less than 4 μs. The system consists of a Hough transform processor that determines well defined tracks, and a Euler processor that counts their number by applying the Euler relation to the thresholded result of the Hough transform. A prototype of a systolic processor has been built that handles one sector of the jet chamber. It consists of 35 x 32 processing elements that were loaded into 21 programmable gate arrays (XILINX). This processor runs at a clock rate of 40 MHz. It has been tested offline with about 1,000 original OPAL events. No deviations from the off-line simulation have been found. A trigger efficiency of 93% has been obtained. The prototype together with the associated drift time measurement unit has been installed at the OPAL detector at LEP and 100k events have been sampled to evaluate the system under detector conditions

  20. The Fermilab Advanced Computer Program multi-array processor system (ACPMAPS): A site oriented supercomputer for theoretical physics

    International Nuclear Information System (INIS)

    Nash, T.; Areti, H.; Atac, R.

    1988-08-01

    The ACP Multi-Array Processor System (ACPMAPS) is a highly cost effective, local memory parallel computer designed for floating point intensive grid based problems. The processing nodes of the system are single board array processors based on the FORTRAN and C programmable Weitek XL chip set. The nodes are connected by a network of very high bandwidth 16 port crossbar switches. The architecture is designed to achieve the highest possible cost effectiveness while maintaining a high level of programmability. The primary application of the machine at Fermilab will be lattice gauge theory. The hardware is supported by a transparent site oriented software system called CANOPY which shields theorist users from the underlying node structure. 4 refs., 2 figs

  1. 3D Printed Paper-Based Microfluidic Analytical Devices

    Directory of Open Access Journals (Sweden)

    Yong He

    2016-06-01

    Full Text Available As a pump-free and lightweight analytical tool, paper-based microfluidic analytical devices (μPADs attract more and more interest. If the flow speed of μPAD can be programmed, the analytical sequences could be designed and they will be more popular. This reports presents a novel μPAD, driven by the capillary force of cellulose powder, printed by a desktop three-dimensional (3D printer, which has some promising features, such as easy fabrication and programmable flow speed. First, a suitable size-scale substrate with open microchannels on its surface is printed. Next, the surface of the substrate is covered with a thin layer of polydimethylsiloxane (PDMS to seal the micro gap caused by 3D printing. Then, the microchannels are filled with a mixture of cellulose powder and deionized water in an appropriate proportion. After drying in an oven at 60 °C for 30 min, it is ready for use. As the different channel depths can be easily printed, which can be used to achieve the programmable capillary flow speed of cellulose powder in the microchannels. A series of microfluidic analytical experiments, including quantitative analysis of nitrite ion and fabrication of T-sensor were used to demonstrate its capability. As the desktop 3D printer (D3DP is very cheap and accessible, this device can be rapidly printed at the test field with a low cost and has a promising potential in the point-of-care (POC system or as a lightweight platform for analytical chemistry.

  2. Monitoring programme

    International Nuclear Information System (INIS)

    1994-06-01

    Her Majesty's Inspectorate of Pollution's 1992 report on its programme of monitoring radioactive substances is presented. Site operators' returns are verified and the report provides independent data on the environmental impact of authorized disposal of radioactive wastes. Radiation doses which may have been received by members of the public, fall well below the International Commission for Radiological Protection's (ICRP) recommended annual doses. (UK)

  3. Microfluidic biolector-microfluidic bioprocess control in microtiter plates.

    Science.gov (United States)

    Funke, Matthias; Buchenauer, Andreas; Schnakenberg, Uwe; Mokwa, Wilfried; Diederichs, Sylvia; Mertens, Alan; Müller, Carsten; Kensy, Frank; Büchs, Jochen

    2010-10-15

    In industrial-scale biotechnological processes, the active control of the pH-value combined with the controlled feeding of substrate solutions (fed-batch) is the standard strategy to cultivate both prokaryotic and eukaryotic cells. On the contrary, for small-scale cultivations, much simpler batch experiments with no process control are performed. This lack of process control often hinders researchers to scale-up and scale-down fermentation experiments, because the microbial metabolism and thereby the growth and production kinetics drastically changes depending on the cultivation strategy applied. While small-scale batches are typically performed highly parallel and in high throughput, large-scale cultivations demand sophisticated equipment for process control which is in most cases costly and difficult to handle. Currently, there is no technical system on the market that realizes simple process control in high throughput. The novel concept of a microfermentation system described in this work combines a fiber-optic online-monitoring device for microtiter plates (MTPs)--the BioLector technology--together with microfluidic control of cultivation processes in volumes below 1 mL. In the microfluidic chip, a micropump is integrated to realize distinct substrate flow rates during fed-batch cultivation in microscale. Hence, a cultivation system with several distinct advantages could be established: (1) high information output on a microscale; (2) many experiments can be performed in parallel and be automated using MTPs; (3) this system is user-friendly and can easily be transferred to a disposable single-use system. This article elucidates this new concept and illustrates applications in fermentations of Escherichia coli under pH-controlled and fed-batch conditions in shaken MTPs. Copyright 2010 Wiley Periodicals, Inc.

  4. Virtual Modular Redundancy of Processor Module in the PLC

    International Nuclear Information System (INIS)

    Lee, Kwang-Il; Hwang, SungJae; Yoon, DongHwa

    2016-01-01

    Dual Modular Redundancy (DMR) is mainly used to implement these safety control systems. DMR is conveyed when components of a system are duplicated, providing another component in case one should fault or fail. This feature has a high availability and large fault tolerant. It provides zero downtime that is required for nuclear power plants. So nuclear power plant has been commercialized by multiple redundant systems. The following paper, we propose a Virtual Modular Redundancy (VMR) rather than physical triple of the Programmable Logic Controller (PLC) processor module to ensure the reliability of the nuclear power plant control system. VMR implementation minimizes design changes to continue to use the commercially available redundant system. Also, the purpose of the VMR is to improve the efficiency and reliability in many ways, such as fault tolerant and fail-safe and cost. VMR guarantees a wide range of reliable fault recovery, fault tolerance, etc. It is prevented before it causes great damages due to the continuous failure of the two modules. The reliable communication speed is slow and also it has a small bandwidth. It is a great loss in the safety control system. However, VMR aims to avoid nuclear power plants that were suspended due to fail-safe. It is not for the purpose of commonly used. Application of VMR is actually expected to require a lot of research and trial and error until they adapt to the nuclear regulatory and standards

  5. Virtual Modular Redundancy of Processor Module in the PLC

    Energy Technology Data Exchange (ETDEWEB)

    Lee, Kwang-Il; Hwang, SungJae; Yoon, DongHwa [SOOSAN ENS Co., Seoul (Korea, Republic of)

    2016-10-15

    Dual Modular Redundancy (DMR) is mainly used to implement these safety control systems. DMR is conveyed when components of a system are duplicated, providing another component in case one should fault or fail. This feature has a high availability and large fault tolerant. It provides zero downtime that is required for nuclear power plants. So nuclear power plant has been commercialized by multiple redundant systems. The following paper, we propose a Virtual Modular Redundancy (VMR) rather than physical triple of the Programmable Logic Controller (PLC) processor module to ensure the reliability of the nuclear power plant control system. VMR implementation minimizes design changes to continue to use the commercially available redundant system. Also, the purpose of the VMR is to improve the efficiency and reliability in many ways, such as fault tolerant and fail-safe and cost. VMR guarantees a wide range of reliable fault recovery, fault tolerance, etc. It is prevented before it causes great damages due to the continuous failure of the two modules. The reliable communication speed is slow and also it has a small bandwidth. It is a great loss in the safety control system. However, VMR aims to avoid nuclear power plants that were suspended due to fail-safe. It is not for the purpose of commonly used. Application of VMR is actually expected to require a lot of research and trial and error until they adapt to the nuclear regulatory and standards.

  6. Fast track-finding trigger processor for the SLAC/LBL Mark II Detector

    International Nuclear Information System (INIS)

    Brafman, H.; Breidenbach, M.; Hettel, R.; Himel, T.; Horelick, D.

    1977-10-01

    The SLAC/LBL Mark II Magnetic Detector consists of various particle detectors arranged in cylindrical symmetry located in and around an axial magnetic field. A versatile, programmable secondary trigger processor was designed and built to find curved tracks in the detector. The system operates at a 10 MHz clock rate with a total processing time of 34 μsec and is used to ''trigger'' the data processing computer, thereby rejecting background and greatly improving the data acquisition aspects of the detector-computer combination

  7. The architecture of a video image processor for the space station

    Science.gov (United States)

    Yalamanchili, S.; Lee, D.; Fritze, K.; Carpenter, T.; Hoyme, K.; Murray, N.

    1987-01-01

    The architecture of a video image processor for space station applications is described. The architecture was derived from a study of the requirements of algorithms that are necessary to produce the desired functionality of many of these applications. Architectural options were selected based on a simulation of the execution of these algorithms on various architectural organizations. A great deal of emphasis was placed on the ability of the system to evolve and grow over the lifetime of the space station. The result is a hierarchical parallel architecture that is characterized by high level language programmability, modularity, extensibility and can meet the required performance goals.

  8. Hardware Realization of an FPGA Processor – Operating System Call Offload and Experiences

    DEFF Research Database (Denmark)

    Hindborg, Andreas Erik; Schleuniger, Pascal; Jensen, Nicklas Bo

    2014-01-01

    Field-programmable gate arrays, FPGAs, are attractive implementation platforms for low-volume signal and image processing applications. The structure of FPGAs allows for an efficient implementation of parallel algorithms. Sequential algorithms, on the other hand, often perform better...... core that can be integrated in many signal and data processing platforms on FPGAs. We also show how we allow the processor to use operating system services. For a set of SPLASH-2 and SPEC CPU2006 benchmarks we show a speedup of up to 64% over a similar Xilinx MicroBlaze implementation while using 27...

  9. C-HEAP : a heterogeneous multi-processor architecture template and scalable and flexible protocol for the design of embedded signal processing systems

    NARCIS (Netherlands)

    Nieuwland, A.K.; Kang, J.; Gangwal, O.P.; Sethuraman, R.; Busá, N.G.; Goossens, K.G.W.; Peset Llopis, R.; Lippens, P.E.R.

    2002-01-01

    The key issue in the design of Systems-on-a-Chip (SoC) is to trade-off efficiency against flexibility, and time to market versus cost. Current deep submicron processing technologies enable integration of multiple software programmable processors (e.g., CPUs, DSPs) and dedicated hardware components

  10. Particle Manipulation Methods in Droplet Microfluidics.

    Science.gov (United States)

    Tenje, Maria; Fornell, Anna; Ohlin, Mathias; Nilsson, Johan

    2018-02-06

    This Feature describes the different particle manipulation techniques available in the droplet microfluidics toolbox to handle particles encapsulated inside droplets and to manipulate whole droplets. We address the advantages and disadvantages of the different techniques to guide new users.

  11. Microfluidic Analytical Separator for Proteomics, Phase II

    Data.gov (United States)

    National Aeronautics and Space Administration — The proposed innovation is a microfluidic device designed to effect a 2-dimensional resolution of a mixture of proteins based on isoelectric point (pI) and molecular...

  12. Microfluidic Multichannel Flow Cytometer, Phase I

    Data.gov (United States)

    National Aeronautics and Space Administration — The proposed innovation is a "Microfluidic Multichannel Flow Cytometer." Several novel concepts are integrated to produce the final design, which is compatible with...

  13. Optical bio-sensors in microfluidic chips

    NARCIS (Netherlands)

    Pollnau, Markus; Dongre, C.; Pham Van So, P.V.S.; Bernhardi, Edward; Worhoff, Kerstin; de Ridder, R.M.; Hoekstra, Hugo

    2012-01-01

    Direct femtosecond laser writing is used to integrate optical waveguides that intersect the microfluidic channels in a commercial optofluidic chip. With laser excitation, fluorescently labeled DNA molecules of different sizes are separated by capillary electrophoresis with high operating speed and

  14. Microfluidic Analytical Separator for Proteomics, Phase I

    Data.gov (United States)

    National Aeronautics and Space Administration — SHOT proposes an innovative microfluidic device designed to effect a 2-dimensional resolution of a mixture of proteins based on isoelectric point (pI) and molecular...

  15. A Microfluidic Approach for Studying Piezo Channels.

    Science.gov (United States)

    Maneshi, M M; Gottlieb, P A; Hua, S Z

    2017-01-01

    Microfluidics is an interdisciplinary field intersecting many areas in engineering. Utilizing a combination of physics, chemistry, biology, and biotechnology, along with practical applications for designing devices that use low volumes of fluids to achieve high-throughput screening, is a major goal in microfluidics. Microfluidic approaches allow the study of cells growth and differentiation using a variety of conditions including control of fluid flow that generates shear stress. Recently, Piezo1 channels were shown to respond to fluid shear stress and are crucial for vascular development. This channel is ideal for studying fluid shear stress applied to cells using microfluidic devices. We have developed an approach that allows us to analyze the role of Piezo channels on any given cell and serves as a high-throughput screen for drug discovery. We show that this approach can provide detailed information about the inhibitors of Piezo channels. Copyright © 2017 Elsevier Inc. All rights reserved.

  16. Optical linear algebra processors - Architectures and algorithms

    Science.gov (United States)

    Casasent, David

    1986-01-01

    Attention is given to the component design and optical configuration features of a generic optical linear algebra processor (OLAP) architecture, as well as the large number of OLAP architectures, number representations, algorithms and applications encountered in current literature. Number-representation issues associated with bipolar and complex-valued data representations, high-accuracy (including floating point) performance, and the base or radix to be employed, are discussed, together with case studies on a space-integrating frequency-multiplexed architecture and a hybrid space-integrating and time-integrating multichannel architecture.

  17. The design of a graphics processor

    International Nuclear Information System (INIS)

    Holmes, M.; Thorne, A.R.

    1975-12-01

    The design of a graphics processor is described which takes into account known and anticipated user requirements, the availability of cheap minicomputers, the state of integrated circuit technology, and the overall need to minimise cost for a given performance. The main user needs are the ability to display large high resolution pictures, and to dynamically change the user's view in real time by means of fast coordinate processing hardware. The transformations that can be applied to 2D or 3D coordinates either singly or in combination are: translation, scaling, mirror imaging, rotation, and the ability to map the transformation origin on to any point on the screen. (author)

  18. Dual-scale topology optoelectronic processor.

    Science.gov (United States)

    Marsden, G C; Krishnamoorthy, A V; Esener, S C; Lee, S H

    1991-12-15

    The dual-scale topology optoelectronic processor (D-STOP) is a parallel optoelectronic architecture for matrix algebraic processing. The architecture can be used for matrix-vector multiplication and two types of vector outer product. The computations are performed electronically, which allows multiplication and summation concepts in linear algebra to be generalized to various nonlinear or symbolic operations. This generalization permits the application of D-STOP to many computational problems. The architecture uses a minimum number of optical transmitters, which thereby reduces fabrication requirements while maintaining area-efficient electronics. The necessary optical interconnections are space invariant, minimizing space-bandwidth requirements.

  19. Nuclear interactive evaluations on distributed processors

    International Nuclear Information System (INIS)

    Dix, G.E.; Congdon, S.P.

    1988-01-01

    BWR [boiling water reactor] nuclear design is a complicated process, involving trade-offs among a variety of conflicting objectives. Complex computer calculations and usually required for each design iteration. GE Nuclear Energy has implemented a system where the evaluations are performed interactively on a large number of small microcomputers. This approach minimizes the time it takes to carry out design iterations even through the processor speeds are low compared with modern super computers. All of the desktop microcomputers are linked to a common data base via an ethernet communications system so that design data can be shared and data quality can be maintained

  20. Integral Fast Reactor fuel pin processor

    International Nuclear Information System (INIS)

    Levinskas, D.

    1993-01-01

    This report discusses the pin processor which receives metal alloy pins cast from recycled Integral Fast Reactor (IFR) fuel and prepares them for assembly into new IFR fuel elements. Either full length as-cast or precut pins are fed to the machine from a magazine, cut if necessary, and measured for length, weight, diameter and deviation from straightness. Accepted pins are loaded into cladding jackets located in a magazine, while rejects and cutting scraps are separated into trays. The magazines, trays, and the individual modules that perform the different machine functions are assembled and removed using remote manipulators and master-slaves

  1. Lattice gauge theory using parallel processors

    International Nuclear Information System (INIS)

    Lee, T.D.; Chou, K.C.; Zichichi, A.

    1987-01-01

    The book's contents include: Lattice Gauge Theory Lectures: Introduction and Current Fermion Simulations; Monte Carlo Algorithms for Lattice Gauge Theory; Specialized Computers for Lattice Gauge Theory; Lattice Gauge Theory at Finite Temperature: A Monte Carlo Study; Computational Method - An Elementary Introduction to the Langevin Equation, Present Status of Numerical Quantum Chromodynamics; Random Lattice Field Theory; The GF11 Processor and Compiler; and The APE Computer and First Physics Results; Columbia Supercomputer Project: Parallel Supercomputer for Lattice QCD; Statistical and Systematic Errors in Numerical Simulations; Monte Carlo Simulation for LGT and Programming Techniques on the Columbia Supercomputer; Food for Thought: Five Lectures on Lattice Gauge Theory

  2. Introduction to programming multiple-processor computers

    International Nuclear Information System (INIS)

    Hicks, H.R.; Lynch, V.E.

    1985-04-01

    FORTRAN applications programs can be executed on multiprocessor computers in either a unitasking (traditional) or multitasking form. The latter allows a single job to use more than one processor simultaneously, with a consequent reduction in wall-clock time and, perhaps, the cost of the calculation. An introduction to programming in this environment is presented. The concepts of synchronization and data sharing using EVENTS and LOCKS are illustrated with examples. The strategy of strong synchronization and the use of synchronization templates are proposed. We emphasize that incorrect multitasking programs can produce irreproducible results, which makes debugging more difficult

  3. Materials for Microfluidic Immunoassays: A Review.

    Science.gov (United States)

    Mou, Lei; Jiang, Xingyu

    2017-08-01

    Conventional immunoassays suffer from at least one of these following limitations: long processing time, high costs, poor user-friendliness, technical complexity, poor sensitivity and specificity. Microfluidics, a technology characterized by the engineered manipulation of fluids in channels with characteristic lengthscale of tens of micrometers, has shown considerable promise for improving immunoassays that could overcome these limitations in medical diagnostics and biology research. The combination of microfluidics and immunoassay can detect biomarkers with faster assay time, reduced volumes of reagents, lower power requirements, and higher levels of integration and automation compared to traditional approaches. This review focuses on the materials-related aspects of the recent advances in microfluidics-based immunoassays for point-of-care (POC) diagnostics of biomarkers. We compare the materials for microfluidic chips fabrication in five aspects: fabrication, integration, function, modification and cost, and describe their advantages and drawbacks. In addition, we review materials for modifying antibodies to improve the performance of the reaction of immunoassay. We also review the state of the art in microfluidic immunoassays POC platforms, from the laboratory to routine clinical practice, and also commercial products in the market. Finally, we discuss the current challenges and future developments in microfluidic immunoassays. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  4. Micro-optics for microfluidic analytical applications.

    Science.gov (United States)

    Yang, Hui; Gijs, Martin A M

    2018-02-19

    This critical review summarizes the developments in the integration of micro-optical elements with microfluidic platforms for facilitating detection and automation of bio-analytical applications. Micro-optical elements, made by a variety of microfabrication techniques, advantageously contribute to the performance of an analytical system, especially when the latter has microfluidic features. Indeed the easy integration of optical control and detection modules with microfluidic technology helps to bridge the gap between the macroscopic world and chip-based analysis, paving the way for automated and high-throughput applications. In our review, we start the discussion with an introduction of microfluidic systems and micro-optical components, as well as aspects of their integration. We continue with a detailed description of different microfluidic and micro-optics technologies and their applications, with an emphasis on the realization of optical waveguides and microlenses. The review continues with specific sections highlighting the advantages of integrated micro-optical components in microfluidic systems for tackling a variety of analytical problems, like cytometry, nucleic acid and protein detection, cell biology, and chemical analysis applications.

  5. Microfluidic Devices in Advanced Caenorhabditis elegans Research

    Directory of Open Access Journals (Sweden)

    Muniesh Muthaiyan Shanmugam

    2016-08-01

    Full Text Available The study of model organisms is very important in view of their potential for application to human therapeutic uses. One such model organism is the nematode worm, Caenorhabditis elegans. As a nematode, C. elegans have ~65% similarity with human disease genes and, therefore, studies on C. elegans can be translated to human, as well as, C. elegans can be used in the study of different types of parasitic worms that infect other living organisms. In the past decade, many efforts have been undertaken to establish interdisciplinary research collaborations between biologists, physicists and engineers in order to develop microfluidic devices to study the biology of C. elegans. Microfluidic devices with the power to manipulate and detect bio-samples, regents or biomolecules in micro-scale environments can well fulfill the requirement to handle worms under proper laboratory conditions, thereby significantly increasing research productivity and knowledge. The recent development of different kinds of microfluidic devices with ultra-high throughput platforms has enabled researchers to carry out worm population studies. Microfluidic devices primarily comprises of chambers, channels and valves, wherein worms can be cultured, immobilized, imaged, etc. Microfluidic devices have been adapted to study various worm behaviors, including that deepen our understanding of neuromuscular connectivity and functions. This review will provide a clear account of the vital involvement of microfluidic devices in worm biology.

  6. Microfluidics for single cell analysis

    DEFF Research Database (Denmark)

    Jensen, Marie Pødenphant

    Isolation and manipulation of single cells have gained an increasing interest from researchers because of the heterogeneity of cells from the same cell culture. Single cell analysis can ensure a better understanding of differences between individual cells and potentially solve a variety of clinical...... problems. In this thesis lab on a chip systems for rare single cell analysis are investigated. The focus was to develop a commercial, disposable device for circulating tumour cell (CTC) analysis. Such a device must be able to separate rare cells from blood samples and subsequently capture the specific...... cells, and simultaneously be fabricated and operated at low costs and be user-friendly. These challenges were addressed through development of two microfluidic devices, one for rare cell isolation based on pinched flow fractionation (PFF) and one for single cell capture based on hydrodynamic trapping...

  7. System and method for programmable bank selection for banked memory subsystems

    Energy Technology Data Exchange (ETDEWEB)

    Blumrich, Matthias A. (Ridgefield, CT); Chen, Dong (Croton on Hudson, NY); Gara, Alan G. (Mount Kisco, NY); Giampapa, Mark E. (Irvington, NY); Hoenicke, Dirk (Seebruck-Seeon, DE); Ohmacht, Martin (Yorktown Heights, NY); Salapura, Valentina (Chappaqua, NY); Sugavanam, Krishnan (Mahopac, NY)

    2010-09-07

    A programmable memory system and method for enabling one or more processor devices access to shared memory in a computing environment, the shared memory including one or more memory storage structures having addressable locations for storing data. The system comprises: one or more first logic devices associated with a respective one or more processor devices, each first logic device for receiving physical memory address signals and programmable for generating a respective memory storage structure select signal upon receipt of pre-determined address bit values at selected physical memory address bit locations; and, a second logic device responsive to each of the respective select signal for generating an address signal used for selecting a memory storage structure for processor access. The system thus enables each processor device of a computing environment memory storage access distributed across the one or more memory storage structures.

  8. Printed droplet microfluidics for on demand dispensing of picoliter droplets and cells.

    Science.gov (United States)

    Cole, Russell H; Tang, Shi-Yang; Siltanen, Christian A; Shahi, Payam; Zhang, Jesse Q; Poust, Sean; Gartner, Zev J; Abate, Adam R

    2017-08-15

    Although the elementary unit of biology is the cell, high-throughput methods for the microscale manipulation of cells and reagents are limited. The existing options either are slow, lack single-cell specificity, or use fluid volumes out of scale with those of cells. Here we present printed droplet microfluidics, a technology to dispense picoliter droplets and cells with deterministic control. The core technology is a fluorescence-activated droplet sorter coupled to a specialized substrate that together act as a picoliter droplet and single-cell printer, enabling high-throughput generation of intricate arrays of droplets, cells, and microparticles. Printed droplet microfluidics provides a programmable and robust technology to construct arrays of defined cell and reagent combinations and to integrate multiple measurement modalities together in a single assay.

  9. Capture of DNA in microfluidic channel using magnetic beads: increasing capture efficiency with integrated microfluidic mixer

    DEFF Research Database (Denmark)

    Lund-Olesen, Torsten; Dufva, Hans Martin; Hansen, Mikkel Fougt

    2007-01-01

    We have studied the hybridization of target DNA in solution with probe DNA on magnetic beads immobilized on the channel sidewalls in a magnetic bead separator. The hybridization is carried out under a liquid flow and is diffusion limited. Two systems are compared: one with a straight microfluidic...... place on the surface in a microfluidic system....

  10. Recommending the heterogeneous cluster type multi-processor system computing

    International Nuclear Information System (INIS)

    Iijima, Nobukazu

    2010-01-01

    Real-time reactor simulator had been developed by reusing the equipment of the Musashi reactor and its performance improvement became indispensable for research tools to increase sampling rate with introduction of arithmetic units using multi-Digital Signal Processor(DSP) system (cluster). In order to realize the heterogeneous cluster type multi-processor system computing, combination of two kinds of Control Processor (CP) s, Cluster Control Processor (CCP) and System Control Processor (SCP), were proposed with Large System Control Processor (LSCP) for hierarchical cluster if needed. Faster computing performance of this system was well evaluated by simulation results for simultaneous execution of plural jobs and also pipeline processing between clusters, which showed the system led to effective use of existing system and enhancement of the cost performance. (T. Tanaka)

  11. SSC 254 Screen-Based Word Processors: Production Tests. The Lanier Word Processor.

    Science.gov (United States)

    Moyer, Ruth A.

    Designed for use in Trident Technical College's Secretarial Lab, this series of 12 production tests focuses on the use of the Lanier Word Processor for a variety of tasks. In tests 1 and 2, students are required to type and print out letters. Tests 3 through 8 require students to reformat a text; make corrections on a letter; divide and combine…

  12. Evaluation of the Sentinel-3 Hydrologic Altimetry Processor prototypE (SHAPE) methods.

    Science.gov (United States)

    Benveniste, J.; Garcia-Mondéjar, A.; Bercher, N.; Fabry, P. L.; Roca, M.; Varona, E.; Fernandes, J.; Lazaro, C.; Vieira, T.; David, G.; Restano, M.; Ambrózio, A.

    2017-12-01

    Inland water scenes are highly variable, both in space and time, which leads to a much broader range of radar signatures than ocean surfaces. This applies to both LRM and "SAR" mode (SARM) altimetry. Nevertheless the enhanced along-track resolution of SARM altimeters should help improve the accuracy and precision of inland water height measurements from satellite. The SHAPE project - Sentinel-3 Hydrologic Altimetry Processor prototypE - which is funded by ESA through the Scientific Exploitation of Operational Missions Programme Element (contract number 4000115205/15/I-BG) aims at preparing for the exploitation of Sentinel-3 data over the inland water domain. The SHAPE Processor implements all of the steps necessary to derive rivers and lakes water levels and discharge from Delay-Doppler Altimetry and perform their validation against in situ data. The processor uses FBR CryoSat-2 and L1A Sentinel-3A data as input and also various ancillary data (proc. param., water masks, L2 corrections, etc.), to produce surface water levels. At a later stage, water level data are assimilated into hydrological models to derive river discharge. This poster presents the improvements obtained with the new methods and algorithms over the regions of interest (Amazon and Danube rivers, Vanern and Titicaca lakes).

  13. Development of a processor embedded timing unit for the synchronized operation in KSTAR

    Energy Technology Data Exchange (ETDEWEB)

    Lee, Woongryol, E-mail: wrlee@nfri.re.kr; Lee, Taegu; Hong, Jaesic

    2016-11-15

    Highlights: • Timing board for the synchronized tokamak operation. • Processor embedded distributed control system. • Single clock source and multiple trigger signal for the plasma diagnostics. • Delay compensation among the distributed timing boards. - Abstract: The Local Timing Unit (LTU) in KSTAR provides a single clock source and multiple trigger signals with flexible configuration. Over the past seven years, the LTU had a mechanical redesign and several firmware updates for the purpose of provision of a robust operation and precision timing signal. Now we have developed a third version of a local timing unit which has a standalone operation capability. The LTU is built in a cabinet mountable 1U PIZZA box and provides twelve signal output ports, a packet mirroring interface, and an LCD interface panel. The core functions of the LTU are implemented in a Field Programmable Gate Array (FPGA) which has an internal hardcore processor. The internal processor allows the use of Linux Operating System (OS) and the Experimental Physics and Industrial Control System (EPICS). All user level application functions are controllable through the EPICS, however the time critical internal functions are performed by the FPGA logic blocks same as the previous version. The new LTU provides pluggable output module so that we can easily extend the signal output port. The easy installation and effective replacement reduce the efforts of maintenance. This paper describes design, development, and commissioning results of the new KSTAR LTU.

  14. Balanced Bipartite Graph Based Register Allocation for Network Processors in Mobile and Wireless Networks

    Directory of Open Access Journals (Sweden)

    Feilong Tang

    2010-01-01

    Full Text Available Mobile and wireless networks are the integrant infrastructure of mobile and pervasive computing that aims at providing transparent and preferred information and services for people anytime anywhere. In such environments, end-to-end network bandwidth is crucial to improve user's transparent experience when providing on-demand services such as mobile video playing. As a result, powerful computing power is required for networked nodes, especially for routers. General-purpose processors cannot meet such requirements due to their limited processing ability, and poor programmability and scalability. Intel's network processor IXP is specially designed for fast packet processing to achieve a broad bandwidth. IXP provides a large number of registers to reduce the number of memory accesses. Registers in an IXP are physically partitioned as two banks so that two source operands in an instruction have to come from the two banks respectively, which makes the IXP register allocation tricky and different from conventional ones. In this paper, we investigate an approach for efficiently generating balanced bipartite graph and register allocation algorithms for the dual-bank register allocation in IXPs. The paper presents a graph uniform 2-way partition algorithm (FPT, which provides an optimal solution to the graph partition, and a heuristic algorithm for generating balanced bipartite graph. Finally, we design a framework for IXP register allocation. Experimental results demonstrate the framework and the algorithms are efficient in register allocation for IXP network processors.

  15. Development of a processor embedded timing unit for the synchronized operation in KSTAR

    International Nuclear Information System (INIS)

    Lee, Woongryol; Lee, Taegu; Hong, Jaesic

    2016-01-01

    Highlights: • Timing board for the synchronized tokamak operation. • Processor embedded distributed control system. • Single clock source and multiple trigger signal for the plasma diagnostics. • Delay compensation among the distributed timing boards. - Abstract: The Local Timing Unit (LTU) in KSTAR provides a single clock source and multiple trigger signals with flexible configuration. Over the past seven years, the LTU had a mechanical redesign and several firmware updates for the purpose of provision of a robust operation and precision timing signal. Now we have developed a third version of a local timing unit which has a standalone operation capability. The LTU is built in a cabinet mountable 1U PIZZA box and provides twelve signal output ports, a packet mirroring interface, and an LCD interface panel. The core functions of the LTU are implemented in a Field Programmable Gate Array (FPGA) which has an internal hardcore processor. The internal processor allows the use of Linux Operating System (OS) and the Experimental Physics and Industrial Control System (EPICS). All user level application functions are controllable through the EPICS, however the time critical internal functions are performed by the FPGA logic blocks same as the previous version. The new LTU provides pluggable output module so that we can easily extend the signal output port. The easy installation and effective replacement reduce the efforts of maintenance. This paper describes design, development, and commissioning results of the new KSTAR LTU.

  16. Multiprocessor Real-Time Scheduling with Hierarchical Processor Affinities

    OpenAIRE

    Bonifaci , Vincenzo; Brandenburg , Björn; D'Angelo , Gianlorenzo; Marchetti-Spaccamela , Alberto

    2016-01-01

    International audience; Many multiprocessor real-time operating systems offer the possibility to restrict the migrations of any task to a specified subset of processors by setting affinity masks. A notion of " strong arbitrary processor affinity scheduling " (strong APA scheduling) has been proposed; this notion avoids schedulability losses due to overly simple implementations of processor affinities. Due to potential overheads, strong APA has not been implemented so far in a real-time operat...

  17. Programmable applications in a heterogeneous and concurrent environment

    International Nuclear Information System (INIS)

    Dubois, P.F.

    1995-01-01

    Equipe Basis (EB) is a new system for programmable applications which is under development at Lawrence Livermore Laboratory. EB is designed to permit user control of teams of interconnecting processes in a heterogeneous environment. Current systems work with programs written in Fortran or C on a single processor. The programs of the future will be in many languages and distributed over many processors. The object-oriented kernel can communicate data and commands between processes that are unaware of each other's inner structure. The programming language, Eiffel, is described. This document consists of extensive viewgraphs

  18. Coordinated Energy Management in Heterogeneous Processors

    Directory of Open Access Journals (Sweden)

    Indrani Paul

    2014-01-01

    Full Text Available This paper examines energy management in a heterogeneous processor consisting of an integrated CPU–GPU for high-performance computing (HPC applications. Energy management for HPC applications is challenged by their uncompromising performance requirements and complicated by the need for coordinating energy management across distinct core types – a new and less understood problem. We examine the intra-node CPU–GPU frequency sensitivity of HPC applications on tightly coupled CPU–GPU architectures as the first step in understanding power and performance optimization for a heterogeneous multi-node HPC system. The insights from this analysis form the basis of a coordinated energy management scheme, called DynaCo, for integrated CPU–GPU architectures. We implement DynaCo on a modern heterogeneous processor and compare its performance to a state-of-the-art power- and performance-management algorithm. DynaCo improves measured average energy-delay squared (ED2 product by up to 30% with less than 2% average performance loss across several exascale and other HPC workloads.

  19. Technology Programme

    Energy Technology Data Exchange (ETDEWEB)

    Batistoni, Paola; De Marco, Francesco; Pieroni, Leonardo [ed.

    2005-07-01

    The technology activities carried out by the Euratom-ENEA Association in the framework of the European Fusion Development Agreement concern the Next Step (International Thermonuclear Experimental Reactor - ITER), the Long-Term Programme (breeder blanket, materials, International Fusion Materials Irradiation Facility - IFMIF), Power Plant Conceptual Studies and Socio-Economic Studies. The Underlying Technology Programme was set up to complement the fusion activities as well to develop technologies with a wider range of interest. The Technology Programme mainly involves staff from the Frascati laboratories of the Fusion Technical and Scientific Unit and from the Brasimone laboratories of the Advanced Physics Technologies Unit. Other ENEA units also provide valuable contributions to the programme. ENEA is heavily engaged in component development/testing and in design and safety activities for the European Fusion Technology Programme. Although the work documented in the following covers a large range of topics that differ considerably because they concern the development of extremely complex systems, the high level of integration and coordination ensures the capability to cover the fusion system as a whole. In 2004 the most significant testing activities concerned the ITER primary beryllium-coated first wall. In the field of high-heat-flux components, an important achievement was the qualification of the process for depositing a copper liner on carbon fibre composite (CFC) hollow tiles. This new process, pre-brazed casting (PBC), allows the hot radial pressing (HRP) joining procedure to be used also for CFC-based armour monoblock divertor components. The PBC and HRP processes are candidates for the construction of the ITER divertor. In the materials field an important milestone was the commissioning of a new facility for chemical vapour infiltration/deposition, used for optimising silicon carbide composite (SiCf/SiC) components. Eight patents were deposited during 2004

  20. Technology Programme

    International Nuclear Information System (INIS)

    Batistoni, Paola; De Marco, Francesco; Pieroni, Leonardo

    2005-01-01

    The technology activities carried out by the Euratom-ENEA Association in the framework of the European Fusion Development Agreement concern the Next Step (International Thermonuclear Experimental Reactor - ITER), the Long-Term Programme (breeder blanket, materials, International Fusion Materials Irradiation Facility - IFMIF), Power Plant Conceptual Studies and Socio-Economic Studies. The Underlying Technology Programme was set up to complement the fusion activities as well to develop technologies with a wider range of interest. The Technology Programme mainly involves staff from the Frascati laboratories of the Fusion Technical and Scientific Unit and from the Brasimone laboratories of the Advanced Physics Technologies Unit. Other ENEA units also provide valuable contributions to the programme. ENEA is heavily engaged in component development/testing and in design and safety activities for the European Fusion Technology Programme. Although the work documented in the following covers a large range of topics that differ considerably because they concern the development of extremely complex systems, the high level of integration and coordination ensures the capability to cover the fusion system as a whole. In 2004 the most significant testing activities concerned the ITER primary beryllium-coated first wall. In the field of high-heat-flux components, an important achievement was the qualification of the process for depositing a copper liner on carbon fibre composite (CFC) hollow tiles. This new process, pre-brazed casting (PBC), allows the hot radial pressing (HRP) joining procedure to be used also for CFC-based armour monoblock divertor components. The PBC and HRP processes are candidates for the construction of the ITER divertor. In the materials field an important milestone was the commissioning of a new facility for chemical vapour infiltration/deposition, used for optimising silicon carbide composite (SiCf/SiC) components. Eight patents were deposited during 2004

  1. Expert System Constant False Alarm Rate (CFAR) Processor

    National Research Council Canada - National Science Library

    Wicks, Michael C

    2006-01-01

    An artificial intelligence system improves radar signal processor performance by increasing target probability of detection and reducing probability of false alarm in a severe radar clutter environment...

  2. Fast track trigger processor for the OPAL detector at LEP

    Energy Technology Data Exchange (ETDEWEB)

    Carter, A A; Carter, J R; Ward, D R; Heuer, R D; Jaroslawski, S; Wagner, A

    1986-09-20

    A fast hardware track trigger processor being built for the OPAL experiment is described. The processor will analyse data from the central drift chambers of OPAL to determine whether any tracks come from the interaction region, and thereby eliminate background events. The processor will find tracks over a large angular range, vertical strokecos thetavertical stroke < or approx. 0.95. The design of the processor is described, together with a brief account of its hardware implementation for OPAL. The results of feasibility studies are also presented.

  3. Special processor for in-core control systems

    International Nuclear Information System (INIS)

    Golovanov, M.N.; Duma, V.R.; Levin, G.L.; Mel'nikov, A.V.; Polikanin, A.V.; Filatov, V.P.

    1978-01-01

    The BUTs-20 special processor is discussed, designed to control the units of the in-core control equipment which are incorporated into the VECTOR communication channel, and to provide preliminary data processing prior to computer calculations. A set of instructions and flowsheet of the processor, organization of its communication with memories and other units of the system are given. The processor components: a control unit and an arithmetic logical unit are discussed. It is noted that the special processor permits more effective utilization of the computer time

  4. Development of level 2 processor for the readout of TMC

    International Nuclear Information System (INIS)

    Arai, Y.; Ikeno, M.; Murata, T.; Sudo, F.; Emura, T.

    1995-01-01

    We have developed a prototype 8-bit processor for the level 2 data processing for the Time Memory Cell (TMC). The first prototype processor successfully runs with 18 MHz clock. The operation of same clock frequency as TMC (30 MHz) will be easily achieved with simple modifications. Although the processor is very primitive one but shows its powerful performance and flexibility. To realize the compact TMC/L2P (Level 2 Processor) system, it is better to include the microcode memory within the chip. Encoding logic of the microcode must be included to reduce the microcode memory in this case. (J.P.N.)

  5. Media processors using a new microsystem architecture designed for the Internet era

    Science.gov (United States)

    Wyland, David C.

    1999-12-01

    The demands of digital image processing, communications and multimedia applications are growing more rapidly than traditional design methods can fulfill them. Previously, only custom hardware designs could provide the performance required to meet the demands of these applications. However, hardware design has reached a crisis point. Hardware design can no longer deliver a product with the required performance and cost in a reasonable time for a reasonable risk. Software based designs running on conventional processors can deliver working designs in a reasonable time and with low risk but cannot meet the performance requirements. What is needed is a media processing approach that combines very high performance, a simple programming model, complete programmability, short time to market and scalability. The Universal Micro System (UMS) is a solution to these problems. The UMS is a completely programmable (including I/O) system on a chip that combines hardware performance with the fast time to market, low cost and low risk of software designs.

  6. Inhibitory effect of common microfluidic materials on PCR outcome

    KAUST Repository

    Kodzius, Rimantas; Xiao, Kang; Wu, Jinbo; Yi, Xin; Gong, Xiuqing; Foulds, Ian G.; Wen, Weijia

    2012-01-01

    Microfluidic chips have a variety of applications in the biological sciences and medicine. In contrast with traditional experimental approaches, microfluidics entails lower sample and reagent consumption, allows faster reactions and enables

  7. Rapid microfluidic thermal cycler for nucleic acid amplification

    Science.gov (United States)

    Beer, Neil Reginald; Vafai, Kambiz

    2015-10-27

    A system for thermal cycling a material to be thermal cycled including a microfluidic heat exchanger; a porous medium in the microfluidic heat exchanger; a microfluidic thermal cycling chamber containing the material to be thermal cycled, the microfluidic thermal cycling chamber operatively connected to the microfluidic heat exchanger; a working fluid at first temperature; a first system for transmitting the working fluid at first temperature to the microfluidic heat exchanger; a working fluid at a second temperature, a second system for transmitting the working fluid at second temperature to the microfluidic heat exchanger; a pump for flowing the working fluid at the first temperature from the first system to the microfluidic heat exchanger and through the porous medium; and flowing the working fluid at the second temperature from the second system to the heat exchanger and through the porous medium.

  8. A microfluidic dialysis device for complex biological mixture SERS analysis

    KAUST Repository

    Perozziello, Gerardo; Candeloro, Patrizio; Gentile, Francesco T.; Coluccio, Maria Laura; Tallerico, Marco; De Grazia, Antonio; Nicastri, Annalisa; Perri, Angela Mena; Parrotta, Elvira; Pardeo, Francesca; Catalano, Rossella; Cuda, Giovanni; Di Fabrizio, Enzo M.

    2015-01-01

    In this paper, we present a microfluidic device fabricated with a simple and inexpensive process allowing rapid filtering of peptides from a complex mixture. The polymer microfluidic device can be used for sample preparation in biological

  9. New microfluidic platform for life sciences in South Africa

    CSIR Research Space (South Africa)

    Hugo, S

    2012-10-01

    Full Text Available is also offered as numerous devices can be implemented on one disc. A variety of components from sample preparation through to detection can be implemented simply and effectively into an integrated microfluidic solution for life sciences. The lab... in the field of centrifugal microfluidics. New microfluidic platform for life sciences in South Africa S. HUGO, K. LAND CSIR Materials Science and Manufacturing P O Box 395, Pretoria 0001, SOUTH AFRICA Email: kland@csir.co.za INTRODUCTION Microfluidic...

  10. A longitudinal multi-bunch feedback system using parallel digital signal processors

    International Nuclear Information System (INIS)

    Sapozhnikov, L.; Fox, J.D.; Olsen, J.J.; Oxoby, G.; Linscott, I.; Drago, A.; Serio, M.

    1994-01-01

    A programmable longitudinal feedback system based on four AT ampersand T 1610 digital signal processors has been developed as a component of the PEP-II R ampersand D program. This longitudinal quick prototype is a proof of concept for the PEP-II system and implements full-speed bunch-by-bunch signal processing for storage rings with bunch spacings of 4 ns. The design incorporates a phase-detector-based front end that digitizes the oscillation phases of bunches at the 250 MHz crossing rate, four programmable signal processors that compute correction signals, and a 250-MHz hold buffer/kicker driver stage that applies correction signals back on the beam. The design implements a general-purpose, table-driven downsampler that allows the system to be operated at several accelerator facilities. The hardware architecture of the signal processing is described, and the software algorithms used in the feedback signal computation are discussed. The system configuration used for tests at the LBL Advanced Light Source is presented

  11. Isolation of cancer cells by "in situ" microfluidic biofunctionalization protocols

    DEFF Research Database (Denmark)

    De Vitis, Stefania; Matarise, Giuseppina; Pardeo, Francesca

    2014-01-01

    The aim of this work is the development of a microfluidic immunosensor for the immobilization of cancer cells and their separation from healthy cells by using "in situ" microfluidic biofunctionalization protocols. These protocols allow to link antibodies on microfluidic device surfaces and can be...

  12. Controlling two-phase flow in microfluidic systems using electrowetting

    NARCIS (Netherlands)

    Gu, H.

    2011-01-01

    Electrowetting (EW)-based digital microfluidic systems (DMF) and droplet-based two-phase flow microfluidic systems (TPF) with closed channels are the most widely used microfluidic platforms. In general, these two approaches have been considered independently. However, integrating the two

  13. Polymer-based platform for microfluidic systems

    Science.gov (United States)

    Benett, William [Livermore, CA; Krulevitch, Peter [Pleasanton, CA; Maghribi, Mariam [Livermore, CA; Hamilton, Julie [Tracy, CA; Rose, Klint [Boston, MA; Wang, Amy W [Oakland, CA

    2009-10-13

    A method of forming a polymer-based microfluidic system platform using network building blocks selected from a set of interconnectable network building blocks, such as wire, pins, blocks, and interconnects. The selected building blocks are interconnectably assembled and fixedly positioned in precise positions in a mold cavity of a mold frame to construct a three-dimensional model construction of a microfluidic flow path network preferably having meso-scale dimensions. A hardenable liquid, such as poly (dimethylsiloxane) is then introduced into the mold cavity and hardened to form a platform structure as well as to mold the microfluidic flow path network having channels, reservoirs and ports. Pre-fabricated elbows, T's and other joints are used to interconnect various building block elements together. After hardening the liquid the building blocks are removed from the platform structure to make available the channels, cavities and ports within the platform structure. Microdevices may be embedded within the cast polymer-based platform, or bonded to the platform structure subsequent to molding, to create an integrated microfluidic system. In this manner, the new microfluidic platform is versatile and capable of quickly generating prototype systems, and could easily be adapted to a manufacturing setting.

  14. Valve Concepts for Microfluidic Cell Handling

    Directory of Open Access Journals (Sweden)

    M. Grabowski

    2010-01-01

    Full Text Available In this paper we present various pneumatically actuated microfluidic valves to enable user-defined fluid management within a microfluidic chip. To identify a feasible valve design, certain valve concepts are simulated in ANSYS to investigate the pressure dependent opening and closing characteristics of each design. The results are verified in a series of tests. Both the microfluidic layer and the pneumatic layer are realized by means of soft-lithographic techniques. In this way, a network of channels is fabricated in photoresist as a molding master. By casting these masters with PDMS (polydimethylsiloxane we get polymeric replicas containing the channel network. After a plasma-enhanced bonding process, the two layers are irreversibly bonded to each other. The bonding is tight for pressures up to 2 bar. The valves are integrated into a microfluidic cell handling system that is designed to manipulate cells in the presence of a liquid reagent (e.g. PEG – polyethylene glycol, for cell fusion. For this purpose a user-defined fluid management system is developed. The first test series with human cell lines show that the microfluidic chip is suitable for accumulating cells within a reaction chamber, where they can be flushed by a liquid medium.

  15. Material Biocompatibility for PCR Microfluidic Chips

    KAUST Repository

    Kodzius, Rimantas; Chang, Donald Choy; Gong, Xiuqing; Wen, Weijia; Wu, Jinbo; Xiao, Kang; Yi, Xin

    2010-01-01

    As part of the current miniaturization trend, biological reactions and processes are being adapted to microfluidics devices. PCR is the primary method employed in DNA amplification, its miniaturization is central to efforts to develop portable devices for diagnostics and testing purposes. A problem is the PCR-inhibitory effect due to interaction between PCR reagents and the surrounding environment, which effect is increased in high-surface-are-to-volume ration microfluidics. In this study, we evaluated the biocompatibility of various common materials employed in the fabrication of microfluidic chips, including silicon, several kinds of silicon oxide, glasses, plastics, wax, and adhesives. Two-temperature PCR was performed with these materials to determine their PCR-inhibitory effect. In most of the cases, addition of bovine serum albumin effectively improved the reaction yield. We also studied the individual PCR components from the standpoint of adsorption. Most of the materials did not inhibit the DNA, whereas they did show noticeable interaction with the DNA polymerase. Our test, instead of using microfluidic devices, can be easily conducted in common PCR tubes using a standard bench thermocycler. Our data supports an overview of the means by which the materials most bio-friendly to microfluidics can be selected.

  16. Material Biocompatibility for PCR Microfluidic Chips

    KAUST Repository

    Kodzius, Rimantas

    2010-04-23

    As part of the current miniaturization trend, biological reactions and processes are being adapted to microfluidics devices. PCR is the primary method employed in DNA amplification, its miniaturization is central to efforts to develop portable devices for diagnostics and testing purposes. A problem is the PCR-inhibitory effect due to interaction between PCR reagents and the surrounding environment, which effect is increased in high-surface-are-to-volume ration microfluidics. In this study, we evaluated the biocompatibility of various common materials employed in the fabrication of microfluidic chips, including silicon, several kinds of silicon oxide, glasses, plastics, wax, and adhesives. Two-temperature PCR was performed with these materials to determine their PCR-inhibitory effect. In most of the cases, addition of bovine serum albumin effectively improved the reaction yield. We also studied the individual PCR components from the standpoint of adsorption. Most of the materials did not inhibit the DNA, whereas they did show noticeable interaction with the DNA polymerase. Our test, instead of using microfluidic devices, can be easily conducted in common PCR tubes using a standard bench thermocycler. Our data supports an overview of the means by which the materials most bio-friendly to microfluidics can be selected.

  17. Microfluidic CODES: a scalable multiplexed electronic sensor for orthogonal detection of particles in microfluidic channels.

    Science.gov (United States)

    Liu, Ruxiu; Wang, Ningquan; Kamili, Farhan; Sarioglu, A Fatih

    2016-04-21

    Numerous biophysical and biochemical assays rely on spatial manipulation of particles/cells as they are processed on lab-on-a-chip devices. Analysis of spatially distributed particles on these devices typically requires microscopy negating the cost and size advantages of microfluidic assays. In this paper, we introduce a scalable electronic sensor technology, called microfluidic CODES, that utilizes resistive pulse sensing to orthogonally detect particles in multiple microfluidic channels from a single electrical output. Combining the techniques from telecommunications and microfluidics, we route three coplanar electrodes on a glass substrate to create multiple Coulter counters producing distinct orthogonal digital codes when they detect particles. We specifically design a digital code set using the mathematical principles of Code Division Multiple Access (CDMA) telecommunication networks and can decode signals from different microfluidic channels with >90% accuracy through computation even if these signals overlap. As a proof of principle, we use this technology to detect human ovarian cancer cells in four different microfluidic channels fabricated using soft lithography. Microfluidic CODES offers a simple, all-electronic interface that is well suited to create integrated, low-cost lab-on-a-chip devices for cell- or particle-based assays in resource-limited settings.

  18. Rapid wasted-free microfluidic fabrication based on ink-jet approach for microfluidic sensing applications

    Science.gov (United States)

    Jarujareet, Ungkarn; Amarit, Rattasart; Sumriddetchkajorn, Sarun

    2016-11-01

    Realizing that current microfluidic chip fabrication techniques are time consuming and labor intensive as well as always have material leftover after chip fabrication, this research work proposes an innovative approach for rapid microfluidic chip production. The key idea relies on a combination of a widely-used inkjet printing method and a heat-based polymer curing technique with an electronic-mechanical control, thus eliminating the need of masking and molds compared to typical microfluidic fabrication processes. In addition, as the appropriate amount of polymer is utilized during printing, there is much less amount of material wasted. Our inkjet-based microfluidic printer can print out the desired microfluidic chip pattern directly onto a heated glass surface, where the printed polymer is suddenly cured. Our proof-of-concept demonstration for widely-used single-flow channel, Y-junction, and T-junction microfluidic chips shows that the whole microfluidic chip fabrication process requires only 3 steps with a fabrication time of 6 minutes.

  19. Aspects of computation on asynchronous parallel processors

    International Nuclear Information System (INIS)

    Wright, M.

    1989-01-01

    The increasing availability of asynchronous parallel processors has provided opportunities for original and useful work in scientific computing. However, the field of parallel computing is still in a highly volatile state, and researchers display a wide range of opinion about many fundamental questions such as models of parallelism, approaches for detecting and analyzing parallelism of algorithms, and tools that allow software developers and users to make effective use of diverse forms of complex hardware. This volume collects the work of researchers specializing in different aspects of parallel computing, who met to discuss the framework and the mechanics of numerical computing. The far-reaching impact of high-performance asynchronous systems is reflected in the wide variety of topics, which include scientific applications (e.g. linear algebra, lattice gauge simulation, ordinary and partial differential equations), models of parallelism, parallel language features, task scheduling, automatic parallelization techniques, tools for algorithm development in parallel environments, and system design issues

  20. Efficient quantum walk on a quantum processor

    Science.gov (United States)

    Qiang, Xiaogang; Loke, Thomas; Montanaro, Ashley; Aungskunsiri, Kanin; Zhou, Xiaoqi; O'Brien, Jeremy L.; Wang, Jingbo B.; Matthews, Jonathan C. F.

    2016-01-01

    The random walk formalism is used across a wide range of applications, from modelling share prices to predicting population genetics. Likewise, quantum walks have shown much potential as a framework for developing new quantum algorithms. Here we present explicit efficient quantum circuits for implementing continuous-time quantum walks on the circulant class of graphs. These circuits allow us to sample from the output probability distributions of quantum walks on circulant graphs efficiently. We also show that solving the same sampling problem for arbitrary circulant quantum circuits is intractable for a classical computer, assuming conjectures from computational complexity theory. This is a new link between continuous-time quantum walks and computational complexity theory and it indicates a family of tasks that could ultimately demonstrate quantum supremacy over classical computers. As a proof of principle, we experimentally implement the proposed quantum circuit on an example circulant graph using a two-qubit photonics quantum processor. PMID:27146471

  1. The ALICE Central Trigger Processor (CTP) upgrade

    International Nuclear Information System (INIS)

    Krivda, M.; Alexandre, D.; Barnby, L.S.; Evans, D.; Jones, P.G.; Jusko, A.; Lietava, R.; Baillie, O. Villalobos; Pospíšil, J.

    2016-01-01

    The ALICE Central Trigger Processor (CTP) at the CERN LHC has been upgraded for LHC Run 2, to improve the Transition Radiation Detector (TRD) data-taking efficiency and to improve the physics performance of ALICE. There is a new additional CTP interaction record sent using a new second Detector Data Link (DDL), a 2 GB DDR3 memory and an extension of functionality for classes. The CTP switch has been incorporated directly onto the new LM0 board. A design proposal for an ALICE CTP upgrade for LHC Run 3 is also presented. Part of the development is a low latency high bandwidth interface whose purpose is to minimize an overall trigger latency

  2. Processor-in-memory-and-storage architecture

    Science.gov (United States)

    DeBenedictis, Erik

    2018-01-02

    A method and apparatus for performing reliable general-purpose computing. Each sub-core of a plurality of sub-cores of a processor core processes a same instruction at a same time. A code analyzer receives a plurality of residues that represents a code word corresponding to the same instruction and an indication of whether the code word is a memory address code or a data code from the plurality of sub-cores. The code analyzer determines whether the plurality of residues are consistent or inconsistent. The code analyzer and the plurality of sub-cores perform a set of operations based on whether the code word is a memory address code or a data code and a determination of whether the plurality of residues are consistent or inconsistent.

  3. Optimal processor for malfunction detection in operating nuclear reactor

    International Nuclear Information System (INIS)

    Ciftcioglu, O.

    1990-01-01

    An optimal processor for diagnosing operational transients in a nuclear reactor is described. Basic design of the processor involves real-time processing of noise signal obtained from a particular in core sensor and the optimality is based on minimum alarm failure in contrast to minimum false alarm criterion from the safe and reliable plant operation viewpoint

  4. Sojourn time tails in processor-sharing systems

    NARCIS (Netherlands)

    Egorova, R.R.

    2009-01-01

    The processor-sharing discipline was originally introduced as a modeling abstraction for the design and performance analysis of the processing unit of a computer system. Under the processor-sharing discipline, all active tasks are assumed to be processed simultaneously, receiving an equal share of

  5. ACP/R3000 processors in data acquisition systems

    International Nuclear Information System (INIS)

    Deppe, J.; Areti, H.; Atac, R.

    1989-02-01

    We describe ACP/R3000 processor based data acquisition systems for high energy physics. This VME bus compatible processor board, with a computational power equivalent to 15 VAX 11/780s or better, contains 8 Mb of memory for event buffering and has a high speed secondary bus that allows data gathering from front end electronics. 2 refs., 3 figs

  6. On the effective parallel programming of multi-core processors

    NARCIS (Netherlands)

    Varbanescu, A.L.

    2010-01-01

    Multi-core processors are considered now the only feasible alternative to the large single-core processors which have become limited by technological aspects such as power consumption and heat dissipation. However, due to their inherent parallel structure and their diversity, multi-cores are

  7. Bank switched memory interface for an image processor

    International Nuclear Information System (INIS)

    Barron, M.; Downward, J.

    1980-09-01

    A commercially available image processor is interfaced to a PDP-11/45 through an 8K window of memory addresses. When the image processor was not in use it was desired to be able to use the 8K address space as real memory. The standard method of accomplishing this would have been to use UNIBUS switches to switch in either the physical 8K bank of memory or the image processor memory. This method has the disadvantage of being rather expensive. As a simple alternative, a device was built to selectively enable or disable either an 8K bank of memory or the image processor memory. To enable the image processor under program control, GEN is contracted in size, the memory is disabled, a device partition for the image processor is created above GEN, and the image processor memory is enabled. The process is reversed to restore memory to GEN. The hardware to enable/disable the image and computer memories is controlled using spare bits from a DR-11K output register. The image processor and physical memory can be switched in or out on line with no adverse affects on the system's operation

  8. Digital image processing software system using an array processor

    International Nuclear Information System (INIS)

    Sherwood, R.J.; Portnoff, M.R.; Journeay, C.H.; Twogood, R.E.

    1981-01-01

    A versatile array processor-based system for general-purpose image processing was developed. At the heart of this system is an extensive, flexible software package that incorporates the array processor for effective interactive image processing. The software system is described in detail, and its application to a diverse set of applications at LLNL is briefly discussed. 4 figures, 1 table

  9. Designing a dataflow processor using CλaSH

    NARCIS (Netherlands)

    Niedermeier, A.; Wester, Rinse; Wester, Rinse; Rovers, K.C.; Baaij, C.P.R.; Kuper, Jan; Smit, Gerardus Johannes Maria

    2010-01-01

    In this paper we show how a simple dataflow processor can be fully implemented using CλaSH, a high level HDL based on the functional programming language Haskell. The processor was described using Haskell, the CλaSH compiler was then used to translate the design into a fully synthesisable VHDL code.

  10. Biomass is beginning to threaten the wood-processors

    International Nuclear Information System (INIS)

    Beer, G.; Sobinkovic, B.

    2004-01-01

    In this issue an exploitation of biomass in Slovak Republic is analysed. Some new projects of constructing of the stoke-holds for biomass processing are published. The grants for biomass are ascending the prices of wood raw material, which is thus becoming less accessible for the wood-processors. An excessive wood export threatens the domestic processors

  11. Digital Signal Processor System for AC Power Drivers

    Directory of Open Access Journals (Sweden)

    Ovidiu Neamtu

    2009-10-01

    Full Text Available DSP (Digital Signal Processor is the bestsolution for motor control systems to make possible thedevelopment of advanced motor drive systems. The motorcontrol processor calculates the required motor windingvoltage magnitude and frequency to operate the motor atthe desired speed. A PWM (Pulse Width Modulationcircuit controls the on and off duty cycle of the powerinverter switches to vary the magnitude of the motorvoltages.

  12. Evaluation of the Intel Sandy Bridge-EP server processor

    CERN Document Server

    Jarp, S; Leduc, J; Nowak, A; CERN. Geneva. IT Department

    2012-01-01

    In this paper we report on a set of benchmark results recently obtained by CERN openlab when comparing an 8-core “Sandy Bridge-EP” processor with Intel’s previous microarchitecture, the “Westmere-EP”. The Intel marketing names for these processors are “Xeon E5-2600 processor series” and “Xeon 5600 processor series”, respectively. Both processors are produced in a 32nm process, and both platforms are dual-socket servers. Multiple benchmarks were used to get a good understanding of the performance of the new processor. We used both industry-standard benchmarks, such as SPEC2006, and specific High Energy Physics benchmarks, representing both simulation of physics detectors and data analysis of physics events. Before summarizing the results we must stress the fact that benchmarking of modern processors is a very complex affair. One has to control (at least) the following features: processor frequency, overclocking via Turbo mode, the number of physical cores in use, the use of logical cores ...

  13. Recursive Matrix Inverse Update On An Optical Processor

    Science.gov (United States)

    Casasent, David P.; Baranoski, Edward J.

    1988-02-01

    A high accuracy optical linear algebraic processor (OLAP) using the digital multiplication by analog convolution (DMAC) algorithm is described for use in an efficient matrix inverse update algorithm with speed and accuracy advantages. The solution of the parameters in the algorithm are addressed and the advantages of optical over digital linear algebraic processors are advanced.

  14. Microfluidics of soft granular gels

    Science.gov (United States)

    Nixon, Ryan; Bhattacharjee, Tapomoy; Sawyer, W. Gregory; Angelini, Thomas E.

    Microfluidic methods for encapsulating cells and particles typically involve drop making with two immiscible fluids. The main materials constraint in this approach is surface tension, creating inherent instability between the two fluids. We can eliminate this instability by using miscible inner and outer phases. This is achieved by using granular micro gels which are chemically miscible but physically do not mix. These microgels are yield stress materials, so they flow as solid plugs far from shear gradients, and fluidize where gradients are generated - near an injection nozzle for example. We have found that tuning the yield stress of the material by varying polymer concentration, device performance can be controlled. The solid like behavior of the gel allows us to produces infinitely stable jets that maintain their integrity and configuration over long distances and times. These properties can be combined and manipulated to produce discrete particulate bunches of an inner phase, flowing inside of an outer phase, well enough even to print a Morse code message suspended within flow chambers about a millimeter in diameter moving at millimeters a second.

  15. Acoustooptic linear algebra processors - Architectures, algorithms, and applications

    Science.gov (United States)

    Casasent, D.

    1984-01-01

    Architectures, algorithms, and applications for systolic processors are described with attention to the realization of parallel algorithms on various optical systolic array processors. Systolic processors for matrices with special structure and matrices of general structure, and the realization of matrix-vector, matrix-matrix, and triple-matrix products and such architectures are described. Parallel algorithms for direct and indirect solutions to systems of linear algebraic equations and their implementation on optical systolic processors are detailed with attention to the pipelining and flow of data and operations. Parallel algorithms and their optical realization for LU and QR matrix decomposition are specifically detailed. These represent the fundamental operations necessary in the implementation of least squares, eigenvalue, and SVD solutions. Specific applications (e.g., the solution of partial differential equations, adaptive noise cancellation, and optimal control) are described to typify the use of matrix processors in modern advanced signal processing.

  16. APRON: A Cellular Processor Array Simulation and Hardware Design Tool

    Science.gov (United States)

    Barr, David R. W.; Dudek, Piotr

    2009-12-01

    We present a software environment for the efficient simulation of cellular processor arrays (CPAs). This software (APRON) is used to explore algorithms that are designed for massively parallel fine-grained processor arrays, topographic multilayer neural networks, vision chips with SIMD processor arrays, and related architectures. The software uses a highly optimised core combined with a flexible compiler to provide the user with tools for the design of new processor array hardware architectures and the emulation of existing devices. We present performance benchmarks for the software processor array implemented on standard commodity microprocessors. APRON can be configured to use additional processing hardware if necessary and can be used as a complete graphical user interface and development environment for new or existing CPA systems, allowing more users to develop algorithms for CPA systems.

  17. Experimental testing of the noise-canceling processor.

    Science.gov (United States)

    Collins, Michael D; Baer, Ralph N; Simpson, Harry J

    2011-09-01

    Signal-processing techniques for localizing an acoustic source buried in noise are tested in a tank experiment. Noise is generated using a discrete source, a bubble generator, and a sprinkler. The experiment has essential elements of a realistic scenario in matched-field processing, including complex source and noise time series in a waveguide with water, sediment, and multipath propagation. The noise-canceling processor is found to outperform the Bartlett processor and provide the correct source range for signal-to-noise ratios below -10 dB. The multivalued Bartlett processor is found to outperform the Bartlett processor but not the noise-canceling processor. © 2011 Acoustical Society of America

  18. Simulation of a processor switching circuit with APLSV

    International Nuclear Information System (INIS)

    Dilcher, H.

    1979-01-01

    The report describes the simulation of a processor switching circuit with APL. Furthermore an APL function is represented to simulate a processor in an assembly like language. Both together serve as a tool for studying processor properties. By means of the programming function it is also possible to program other simulated processors. The processor is to be used in the processing of data in real time analysis that occur in high energy physics experiments. The data are already offered to the computer in digitalized form. A typical data rate is at 10 KB/ sec. The data are structured in blocks. The particular blocks are 1 KB wide and are independent from each other. Aprocessor has to decide, whether the block data belong to an event that is part of the backround noise and can therefore be forgotten, or whether the data should be saved for a later evaluation. (orig./WB) [de

  19. New development for low energy electron beam processor

    International Nuclear Information System (INIS)

    Takei, Taro; Goto, Hitoshi; Oizumi, Matsutoshi; Hirakawa, Tetsuya; Ochi, Masafumi

    2003-01-01

    Newly developed low-energy electron beam (EB) processors that have unique designs and configurations compared to conventional ones enable electron-beam treatment of small three-dimensional objects, such as grain-like agricultural products and small plastic parts. As the EB processor can irradiate the products from the whole angles, the uniform EB treatment can be achieved at one time regardless the complex shapes of the product. Here presented are two new EB processors: the first system has cylindrical process zone, which allows three-dimensional objects to be irradiated with one-pass treatment. The second is a tube-type small EB processor, achieving not only its compactor design, but also higher beam extraction efficiency and flexible installation of the irradiation heads. The basic design of each processor and potential applications with them will be presented in this paper. (author)

  20. MPC Related Computational Capabilities of ARMv7A Processors

    DEFF Research Database (Denmark)

    Frison, Gianluca; Jørgensen, John Bagterp

    2015-01-01

    In recent years, the mass market of mobile devices has pushed the demand for increasingly fast but cheap processors. ARM, the world leader in this sector, has developed the Cortex-A series of processors with focus on computationally intensive applications. If properly programmed, these processors...... are powerful enough to solve the complex optimization problems arising in MPC in real-time, while keeping the traditional low-cost and low-power consumption. This makes these processors ideal candidates for use in embedded MPC. In this paper, we investigate the floating-point capabilities of Cortex A7, A9...... and A15 and show how to exploit the unique features of each processor to obtain the best performance, in the context of a novel implementation method for the linear-algebra routines used in MPC solvers. This method adapts high-performance computing techniques to the needs of embedded MPC. In particular...

  1. APRON: A Cellular Processor Array Simulation and Hardware Design Tool

    Directory of Open Access Journals (Sweden)

    David R. W. Barr

    2009-01-01

    Full Text Available We present a software environment for the efficient simulation of cellular processor arrays (CPAs. This software (APRON is used to explore algorithms that are designed for massively parallel fine-grained processor arrays, topographic multilayer neural networks, vision chips with SIMD processor arrays, and related architectures. The software uses a highly optimised core combined with a flexible compiler to provide the user with tools for the design of new processor array hardware architectures and the emulation of existing devices. We present performance benchmarks for the software processor array implemented on standard commodity microprocessors. APRON can be configured to use additional processing hardware if necessary and can be used as a complete graphical user interface and development environment for new or existing CPA systems, allowing more users to develop algorithms for CPA systems.

  2. Design and Testing of Digital Microfluidic Biochips

    CERN Document Server

    Zhao, Yang

    2013-01-01

    This book provides a comprehensive methodology for automated design, test and diagnosis, and use of robust, low-cost, and manufacturable digital microfluidic systems. It focuses on the development of a comprehensive CAD optimization framework for digital microfluidic biochips that unifies different design problems. With the increase in system complexity and integration levels, biochip designers can utilize the design methods described in this book to evaluate different design alternatives, and carry out design-space exploration to obtain the best design point. Describes practical design automation tools that address different design problems (e.g., synthesis, droplet routing, control-pin mapping, testing and diagnosis, and error recovery) in a unified manner; Applies test pattern generation and error-recovery techniques for digital microfluidics-based biochips; Uses real bioassays as evaluation examples, e.g., multiplexed in vitro human physiological fluids diagnostics, PCR, protein crystallization.  

  3. Temperature Sensing in Modular Microfluidic Architectures

    Directory of Open Access Journals (Sweden)

    Krisna C. Bhargava

    2016-01-01

    Full Text Available A discrete microfluidic element with integrated thermal sensor was fabricated and demonstrated as an effective probe for process monitoring and prototyping. Elements were constructed using stereolithography and market-available glass-bodied thermistors within the modular, standardized framework of previous discrete microfluidic elements demonstrated in the literature. Flow rate-dependent response due to sensor self-heating and microchannel heating and cooling was characterized and shown to be linear in typical laboratory conditions. An acid-base neutralization reaction was performed in a continuous flow setting to demonstrate applicability in process management: the ratio of solution flow rates was varied to locate the equivalence point in a titration, closely matching expected results. This element potentially enables complex, three-dimensional microfluidic architectures with real-time temperature feedback and flow rate sensing, without application specificity or restriction to planar channel routing formats.

  4. Downstream bioprocess characterisation within microfluidic devices

    DEFF Research Database (Denmark)

    Marques, Marco; Krühne, Ulrich; Szita, Nicolas

    2016-01-01

    developed which has, to some extent, hindered their implementation as early process development tools. Microfluidic devices are particularly attractive for using fewer resources, for having the possibility of parallelisation and for requiring fewer mechanical manipulations. The expectation...... is that these devices will facilitate the rapid definition of critical process parameters, and thus ultimately reduce production costs. We have developed several microfluidic mDUOs and combined them with advanced and novel analytical approaches, resulting in devices that can potentially be employed for both analytical...... for the liquid–liquid extraction of pharmaceuticals, for the purification and concentration of drug delivery vehicles, and for the flocculation of yeast cells in microfluidic devices. For the latter, we will present for the first time the capability to study flocculation-growth independent from the floc breakage...

  5. Microfluidic Pumps Containing Teflon [Trademark] AF Diaphragms

    Science.gov (United States)

    Willis, Peter; White, Victor; Grunthaner, Frank; Ikeda, Mike; Mathies, Richard A.

    2009-01-01

    Microfluidic pumps and valves based on pneumatically actuated diaphragms made of Teflon AF polymers are being developed for incorporation into laboratory-on-a-chip devices that must perform well over temperature ranges wider than those of prior diaphragm-based microfluidic pumps and valves. Other potential applications include implanted biomedical microfluidic devices, wherein the biocompatability of Teflon AF polymers would be highly advantageous. These pumps and valves have been demonstrated to function stably after cycling through temperatures from -125 to 120 C. These pumps and valves are intended to be successors to similar prior pumps and valves containing diaphragms made of polydimethylsiloxane (PDMS) [commonly known as silicone rubber]. The PDMS-containing valves ae designed to function stably only within the temperature range from 5 to 80 C. Undesirably, PDMS membranes are somwehat porous and retain water. PDMS is especially unsuitable for use at temperatures below 0 C because the formation of ice crystals increases porosity and introduces microshear.

  6. Designing Polymeric Microfluidic Platforms for Biomedical Applications

    DEFF Research Database (Denmark)

    Vedarethinam, Indumathi

    Micro- and Nanotechnology have the potential to offer a smart solution for diagnostics and academia research with rapid, low cost, robust analysis systems to facilitate biological analyses. New, high throughput microfluidic platforms have the potential to surpass in performance the conventional...... analyses systems in use today. The overall goal of this PhD project is to address two different areas using microfluidics : i) Chromosome analysis by metaphase FISH such a platform, if successful, can immediately substitute the routine, labor-intensive, glass slide-based FISH analyses in Clinical...... Cytogenetics laboratories. During the course of this project, initially the suitability of the polymeric chip substrate was tested and a microfluidic device was developed for performing interphase FISH analysis. With this device, the key factors involved in chromosome spreading crucial to FISH analysis were...

  7. Molecular Imaging Probe Development using Microfluidics

    Science.gov (United States)

    Liu, Kan; Wang, Ming-Wei; Lin, Wei-Yu; Phung, Duy Linh; Girgis, Mark D.; Wu, Anna M.; Tomlinson, James S.; Shen, Clifton K.-F.

    2012-01-01

    In this manuscript, we review the latest advancement of microfluidics in molecular imaging probe development. Due to increasing needs for medical imaging, high demand for many types of molecular imaging probes will have to be met by exploiting novel chemistry/radiochemistry and engineering technologies to improve the production and development of suitable probes. The microfluidic-based probe synthesis is currently attracting a great deal of interest because of their potential to deliver many advantages over conventional systems. Numerous chemical reactions have been successfully performed in micro-reactors and the results convincingly demonstrate with great benefits to aid synthetic procedures, such as purer products, higher yields, shorter reaction times compared to the corresponding batch/macroscale reactions, and more benign reaction conditions. Several ‘proof-of-principle’ examples of molecular imaging probe syntheses using microfluidics, along with basics of device architecture and operation, and their potential limitations are discussed here. PMID:22977436

  8. ISOLDE PROGRAMME

    CERN Multimedia

    Fedosseev, V; Herfurth, F; Scheidenberger, C; Geppert, C; Gorges, C; Ratajczyk, T; Wiederhold, J C; Vogel, S; Munch, M K; Nieminen, P; Pakarinen, J J A; Lecesne, N; Bouzomita, H; Grinyer, J; Marques moreno, F M; Parlog, M; Blank, B A; Pedroza, J; Ghetta, V; Lozeva, R; Zacarias, S M; Guillemaud mueller, D S; Cottereau, E; Cheikh mhamed, M; Tusseau nenez, S; Tungate, G; Walker, P M; Smith, A G; Fitzpatrick, C; Dominik, W M; Karny, M; Ciemny, A A; Nyman, G H; Thies, R M A; Lindberg, S K G; Langouche, G F; Velten, P; Araujo escalona, V I; Boudreau, M; Domnanich, K A; Richter, D; Lutter, R J; Javaji, A; Engel, R Y; Wiehr, S; Nacher gonzalez, E; Jungclaus, A; Ribeiro jimenez, G; Marroquin alonso, I; Cal gonzalez, J; Paziy, V; Salsac, M; Murphy, C; Podolyak, Z F; Bajoga, A D; Butler, P; Pritchard, A; Colosimo, S J; Steer, A N; Fox, S P; Wadsworth, B A; Truesdale, V L; Al monthery, M; Bracco, A; Guttormsen, M S; Badea, M N; Calinescu, S; Ujeniuc, S; Cederkall, J A; Zemlyanoy, S; Donets, E D; Golovkov, M; Schweitzer, D K; Vranicar, A; Harrichunder, S; Ncube, M; Nannini, A; Strisovska, J; Wolf, E; Gerten, R F; Lehnert, J; Rainovski, G I; Pospisil, S; Datta pramanik, U; Benzoni, G; Fedorov, D; Maier, F M; Bonanni, A; Pfeiffer, B; Griesel, T; Wehner, L W; Mikkelsen, M; Recchia, F; Lenzi, S M; Smith, J F; Kelly, C M; Acosta sanchez, L A; Chavez lomeli, E R; De melo bandeira tavares, P M; Vieira, J M; Martins da silva, M A; Lima lopes, A M; Lopes leal, T J; Mader, J; Kessler, P; Laurent, B G; Schweikhard, L C; Marx, G H; Kulczycka, E; Komorowska, M; Da silva, M F; Goncalves marques, C P; Baptista peres, M A; Welander, J E; Reiter, P; Miller, C; Martin sanchez-cano, D; Wiens, A; Blazhev, A A; Braun, N; Cappellazzo, M V; Birkenbach, B; Gerst, R; Dannhoff, M F; Sithole, M J; Bilgier, B; Nardelli, S; Araujo mendes, C M; Agramunt ros, J; Valencia marin, E; Pantea, E; Hessberger, F P; Leduc, A J; Mitsuoka, S; Carbonari, A W; Buchegger, F J; Garzon camacho, A; Dapo, H; Papka, P; Stachura, M K; Stora, T; Marsh, B A; Thiboud, J A; Heylen, H; Antalic, S; Stahl, C; Bauer, C; Thurauf, M; Maass, B; Sturm, S; Boehm, C; Wolf, N R; Ways, M; Steinsberger, T P; Riisager, K; Ruotsalainen, P A; Bastin, B; Duval, F T; Penessot, G; Flechard, X D; Desrues, P; Giovinazzo, J; Kurtukian nieto, T; Ascher, P E L; Roccia, S; Matea, I; Croizet, H A G; Bonnin, C M; Morfouace, P; Smith, A J; Guin, R; Banerjee, D; Gunnlaugsson, H P; Ohtsubo, T; Zhukov, M V; Tengborn, E A; Welker, A; Giannopoulos, E; Dessagne, P; Juscamaita vivanco, Y; Da costa pereira, L M; Hustings, J; Yu, H; Kruecken, R; Nowak, A K; Jankowski, M; Cano ott, D; Galve lahoz, P; Murphy, A S J; Shand, C M; Jones, G D; Herzberg, R; Ikin, P; Revill, J P; Everett, C; Napoli, D R; Scarel, G; Larsen, A; Tornyi, T G; Pascu, S G; Stroe, L; Toma, S; Jansson, K; Dronjak fahlander, M; Krupko, S; Hurst, A M; Veskovic, M; Nikolov, J; Masenda, H; Sibanda, W N; Rocchini, M; Klimo, J; Deicher, M; Wichert, T; Kronenberg, J; Helmke, A; Meliani, Z; Ivanov, V S; Green, B L; Keatings, J M; Kuti, I; Halasz, Z; Henry, M O; Bras de sequeira amaral, V; Espirito santo, F; Da silva, D J; Rosendahl, S; Vianden, R J; Speidel, K; Agarwal, I; Faul, T; Kownacki, J M; Martins correia, J G; Lorenz, K; Costa miranda, S M; Granadeiro costa, A R; Zyabkin, D; Kotthaus, T; Pfeiffer, M; Gironi, L; Jensen, A; Romstedt, F; Constantino silva furtado, I; Heredia cardona, J A; Jordan martin, M D; Montaner piza, A; Zacate, M O; Plewinski, F; Mesli, A; Akakpo, E H; Pichard, A; Hergemoller, F; Neu, W; Fallis starhunter, J P; Voulot, D; Mrazek, J; Ugryumov, V; Savreux, R P; Kojouharov, I M; Kern, R O; Papst, O; Fitting, J; Lauer, M; Kirsebom, O S; Jensen, K L; Jokinen, A; Rahkila, P J; Hager, U D K; Konki, J P; Dubois, M; Orr, N A; Fabian, X; Huikari, J E; Goigoux, T; Magron, C; Zakari, A A; Maietta, M; Bachelet, C E M; Roussiere, B; Li, R; Canavan, R L; Lorfing, C; Foster, R M; Gislason, H P; Shayestehaminzadeh, S; Qi, B; Mukai, M; Watanabe, Y; Willmann, L; Kurcewicz, W; Wimmer, K; Meisel, Z P; Dorvaux, O; Nowacki, F; Koudriavtsev, I; Lievens, P; Delaure, B J P; Neyens, G; Ceruti, S; Bunka, M; Vermeulen, C; Umbricht, C A; De boer, J; Podadera aliseda, I; Alcorta moreno, M; Pesudo fortes, V; Zielinska, M; Korten, W; Wang, C H; Lotay, G J; Mason, P; Rice, S J; Regan, P H; Willenegger, L M; Andreev, A; Yavuzkanat, N; Hass, M; Kumar, V; Valiente dobon, J J; Crespo campo, L; Zamfir, N - V; Deleanu, D; Clisu, C; Jeppesen, H B; Wu, C; Pain, S D; Stracener, D W; Wuosmaa, A H; Szilner, S; Colovic, P; Matousek, V; Venhart, M; Birova, M; Li, X; Stuchbery, A E; Lellep, G M; Chakraborty, S; Leoni, S; Chupp, T; Yilmaz, C; Severin, G; Garcia ramos, J E; Newton, M E; Hadinia, B; Mc glynn, E; Monteiro de sena silvares de carvalho, I; Friedag, P; Figuera, P; Koos, V; Meot, V H; Pauwels, D B; Jancso, A; Srebrny, J; Alves, E J; David bosne, E; Bengtsson, L; Kalkuehler, M; Albers, M; Bharuth-ram, K; Akkus, B; Hemmingsen, L B S; Pedersen, J T; Dos santos redondo, L M; Rubio barroso, B; Algora, A; Kozlov, V; Mavela, D L; Mokhles gerami, A; Keeley, N; Bernardo da silva, E; Unzueta solozabal, I; Schell, J; Szybowicz, M; Yang, X; Plavec, J; Lassen, J; Johnston, K; Coquard, L; Bloch, T P; Bonig, E S; Stegmann, R; Ignatov, A; Paschalis, S; Fernandez martinez, G; Schilling, M; Habermann, T; Von hahn, R; Minaya ramirez, E E; Moore, I D; Wang, Y; Saastamoinen, A J; Grahn, T; Herzan, A; Stolze, S M; Clement, E; Dijon, A; Shornikov, A; Lienard, E; Gibelin, J D; Pain, C; Canchel, G; Simpson, G S; Latrasse, L P; Huang, W; Forest, D H; Billowes, J; Flanagan, K; Strashnov, I; Binnersley, C L; Sanchez poncela, M; Simpson, J; Morrall, P S; Grant, A F; Charisopoulos, S; Lagogiannis, A; Bhattacharya, C; Olafsson, S; Stepaniuk, M; Tornqvist, H T; Heinz, A M; White iv, E R; Courtin, S; Marechal, F; Da silva fenta, A E; De lemos lima, T A; Stryjczyk, M; Dockx, K; Haller, S; Rizzi, M; Reichert, S B; Bonn, J; Thirolf, P G; Garcia rios, A R; Gugliermina, V M; Cubero campos, M A; Sanchez tembleque, V; Benito garcia, J; Senoville, M; Mountford, D J; Gelletly, W; Alharbi, T S T; Wilson, E; Rigby, S V; Andreoiu, C; Paul, E S; Harkness, L J; Judson, D S; Wraith, C; Van esbroeck, K; Wadsworth, R; Cubiss, J G; Harding, R D; Vaintraub, S; Mandal, S K; Scarpa, D; Hoff, P; Syed naeemul, H; Borcea, R; Balabanski, D L; Marginean, R; Rotaru, F; Rudolph, D; Fahlander, C H; Chudoba, V; Kay, B P; Soic, N; Naidoo, D; Veselsky, M; Kliman, J; Raisanen, J A; Dietrich, M; Maung maung than, M M T; Reed, M W; Danchev, M T; Ray, J; Roy, M; Hammen, M; Capponi, L; Veghne csatlos, M M; Fryar, J; Mirzadeh vaghefi, S P; Trindade pereira, A M; De pinho oliveira, G N; Bakenecker, A; Tramm, C; Germic, V; Morel, P A; Kowalczyk, M; Matejska-minda, M; Wolinska-cichocka, M; Ringvall moberg, A; Mantovan, R; Fransen, C H; Radeck, F; Schneiders, D W; Steinbach, T; Vibenholt, J E; Magnussen, M J; Stevnhoved, H M; Comas lijachev, V; Dasenbrock-gammon, N M; Perkowski, J; O'neill, G G; Matveev, Y; Wegner, M; Liu, Z; Perez alvarez, T; Cerato, L; Radchenko, V; Molholt, T E; Tabares giraldo, J A; Srnka, D; Dlouhy, Z; Beck, D; Werner, V R; Homm, I; Eliseev, S; Blaum, K; Probst, M B; Kaiser, C J; Martin, J A; Refsgaard, J; Peura, P J; Greenlees, P T; Auranen, K; Delahaye, P; Traykov, E K; Perez loureiro, D; Mery, A A; Couratin, C; Tsekhanovich, I; Lunney, D; Gaulard, C V; Mottram, A D; Cullen, D M; Das, S K; Van de walle, J; Mazzocchi, C; Jonson, B N G; Woehr, A; Lesher, S R; Zuber, K T; Filippin, L; De witte, H J; Van den bergh, P A M; Raabe, R; Dirkx, D; Parnefjord gustafsson, F O A; Dunlop, R A; Tarasava, K; Gernhaeuser, R A; Weinzierl, W; Berger, C; Wendt, K; Achtzehn, T; Gottwald, T; Schug, M; Rossel, R E; Dominguez reyes, R R; Fraile prieto, L M; Briz monago, J A; Koester, U H; Bunce, M R; Bowry, M D; Nakhostin, M; Shearman, R; Cresswell, J R; Joss, D T; Gredley, A; Groombridge, D; Laird, A M; Aslanoglou, X; Siem, S; Weterings, J A; Renstrom, T; Szpak, B T; Luczkowski, M J; Ghita, D; Bezbakh, A; Soltz, R A; Bollmann, J; Bhattacharya, P; Roy, S; Rahaman, M A; Wlodarski, T; Carvalho soares, J; Barzakh, A; Schertz, F; Froemmgen, N E; Liberati, V; Foy, B E; Baptista barbosa, M; Weinheimer, C P; Zboril, M; Simon, R E; Popescu, L A; Czosnyka, T; Miranda jana, P A; Leimbach, D; Naskrecki, R; Plociennik, W A; Ruchowska, E E; Chiara, C J; Walters, W; Eberth, J H; Thomas, T; Thole, P; Queiser, M T; Lo bianco, G; D'amico, F; Muller, S; Sanchez alarcon, R M; Tain enriquez, J L; Orrigo, S E A; Orlandi, R; Masango, S; Plazaola muguruza, F C; Lepareur, N G; Fiebig, J M; Ceylan, N; Wildner, E; Kowalska, M; Malbrunot, S; Garcia ruiz, R F; Pallada, S; Slezak, M; Roeckl, E; Schrieder, G H; Ilieva, S K; Koenig, K L; Amoretti, M A; Lommen, J M; Fynbo, H O U; Weyer, G O P; Koldste, G T; Madsboll, K; Jensen, J H; Nieminen, A M; Reponen, M; Villari, A; Thomas, J; Saint-laurent, M; Sorlin, O H; Carniol, B; Pereira lopez, J; Grevy, S; Plaisir, C; Marie-jeanne, M J; Georgiev, G P; Etile, A M; Le blanc, F M; Verney, D; Stefan, G I; Assie, M; Suzuki, D; Guillot, J; Vazquez rodriguez, L; Campbell, P; Deacon, A N; Ware, T; Flueras, A; Xie, L; Banerjee, K; Piersa, M; Galaviz redondo, D; Johansson, H T; Schwarz, S; Toysa, A S; Aumont, J; Van duppen, P L E; Atanasov, D; Zadvornaya, A; Renaud, M A; Xu, Z; Garrett, P E; Rapisarda, E; Reber, J A; Mattolat, C F; Raeder, S; Habs, D; Vidal, M; Perez liva, M; Calvo portela, P; Ulla pedrera, F J; Wood, R T; Lalkovski, S; Page, R; Petri, M; Barton, C J; Nichols, A J; Vermeulen, M J; Bloor, D M; Henderson, J; Wilson, G L; De angelis, G; Buerger, A; Modamio hoybjor, V; Klintefjord, M L; Ingeberg, V W; Fornal, B A; Marginean, R; Sava, T; Kusoglu, A; Suvaila, R; Lica, R; Costache, C; Mihai, R; Ionescu, A; Baeck, T M; Hoffman, C R; Sedlak, M; Koskelo, O K; Kyaw myat, K M; Gladnishki, K A; Ganguly, B; Goncalves marques, J; Cardoso, S; Seliverstov, M; Niessen, B D; Gutt, L E; Chapman, R; Spagnoletti, P N; Lopes, C; De oliveira amorim, C; Batista lopes, C M; Araujo, J; Schielke, S J; Daugas, J R; Gaudefroy, L; Chevrier, R; Szunyogh, D M; Napiorkowski, P J; Wrzosek-lipska, K; Wahl, U; Catarino, N; Pereira carvalho alves de sequeira, M; Hess, H E; Holler, A; Bettermann, L; Geibel, K; Taprogge, J; Lewandowski, L T N; Manchado de sola, F; Cakirli mutlu, R B; Das gupta, S; Thulstrup, P W; Heinz, U; Nogwanya, T; Neidherr, D M; Morales lopez, A I; Gumenyuk, O; Peaker, A R; Wakabayashi, Y; Abrahams, K J; Martin montes, E J; Mach, H A; Souza ribeiro junior, I; He, J; Chalil, A; Xing, R; Dos santos augusto, R M; Giles, T J; Dorsival, A; Trujillo hernandez, J S; Kalaninova, Z; Andel, B; Venos, D; Kraemer, J; Saha, S; Neugart, R; Eronen, T O; Kreim, K D; Heck, M K; Goncharov, M; Karthein, J; Julin, R J; Eleon, C; Achouri, N L; Grinyer, G F; Fontbonne, C M; Alfaurt, P; Lynch, K M; Wilkins, S G; Brown, A R; Imai, N; Pomorski, M J; Janiak, L; Nilsson, T; Stroke, H H; Stanja, J; Dangelser, E; Heenen, P; Godefroid, M; Mallion, S N; Gins, W A M; Stegemann, S T; Koszorus, A; Mcnulty, J F; Lin, P; Ohlert, C M; Schwerdtfeger, W; Tengblad, O; Becerril reyes, A D; Perea martinez, A; Martinez perez, M C; Margerin, V; Rudigier, M; Alexander, T D; Patel, Z V; Hammond, N; Wearing, F; Patel, A; Jenkins, D G; Corradi, L; Galtarossa, F; Debernardi, A; Giacoppo, F; Tveten, G M; Malatji, K L; Krolas, W A; Stanoiu, M A; Rickert, E U; Ter-akopian, G; Cline, D; Riihimaeki, I A; Simon, K D; Wagner, F E; Turker, M; Neef, M H; Coombes, B J; Jakubek, J; Vagena, E; Bottoni, S; Nishimura, K; Correia, J; Rodrigues valdrez, C J; Molkanov, P; Adhikari, R; Ostrowski, A N; Hallmann, O; Scheck, M; Wady, P T; Lane, J; Krasznahorkay, A J; Kunne sohler, D; Meaney, A J; Hochschulz, F; Roig, O; Behan, C C; Kargoll, S; Kemnitz, S; Carvalho teixeira, R C; Redondo cubero, A; Tallarida, G; Kaczarowski, R; Finke, F; Linnemann, A; Altenkirch, R; Saed-samii, N; Ansari, S H; Dlamini, W B; Adoons, V N; Ronning, C R; Wiedeking, M; Herlert, A J; Mehl, C V; Judge, S M; Gaertner, D; Divinskyi, S; Karabasov, M O; Zagoraios, G; Boztosun, I; Van zyl, J J; Catherall, R; Lettry, J; Wenander, F J C; Zakoucky, D; Catchen, G L; Noertershaeuser, W; Kroell, T; Leske, J; Shubina, D; Murray, I M; Pancin, J; Delaunay, F; Poincheval, J J L; Audirac, L L; Gerbaux, M T; Aouadi, M; Sole, P G P; Fallot, M P; Onillon, A; Duchemin, C; Formento cavaier, R; Audi, G; Boukhari, A; Lau, C; Martin, J A; Barre, N H; Berry, T A; Procter, T J; Bladen, L K; Axiotis, M; Muto, S; Jeong, S C; Hirayama, Y; Korgul, A B; Minamisono, K; Bingham, C R; Aprahamian, A; Bucher, B M; Severijns, N; Huyse, M L; Ferrer garcia, R; Verlinde, M N S; Romano, N; Maugeri, E A; Klupp, S C; Dehn, M H; Heinke, R M; Naubereit, P; Maira vidal, A; Vedia fernandez, M V; Ibanez garcia, P B; Bruyneel, B J E; Materna, T; Hadynska-klek, K; Al-dahan, N; Alazemi, N; Carroll, R J; Babcock, C; Patronis, N; Eleme, Z; Dhal, A; Sahin, E; Goergen, A; Maj, A; Bednarczyk, P A; Borcea, C; Negoita, F; Suliman, G; Marginean, N M; Sotty, C O; Negret, A L; Nae, S A; Nita, C; Golubev, P I; Knyazev, A; Jost, C U; Petrik, K; Vaeyrynen, S A; Dracoulis, G D; Uher, J; Fernandez dominguez, B; Chakraborty, P; Avigo, R; Falahat, S; Lekovic, F; Dorrer, H J; Mengoni, D; Derkx, X; Angus, L J; Sandhu, K S; Gregor, E; Kelly, N A; Byrne, D J; Haas, H; Lourenco, A A; Sousa pereira, S M; Sousa, J B; De melo mendonca, T M; Tavares de sousa, C; Guerreiro dos santos oliveira custodio, L M; Da rocha rodrigues, P M; Yamaguchi, T; Thompson, P C; Rosenbusch, M; Wienholtz, F; Fischer, P; Iwanicki, J S; Rusek, K M; Hanstorp, D; Vetter, U; Wolak, J M; Park, S H; Warr, N V; Doornenbal, P C; Imig, A; Seidlitz, M; Moschner, K; Vogt, A; Kaya, L; Martel bravo, I; Orduz, A K; Serot, O; Majola, S N; Litvinov, Y; Bommert, M; Hensel, S; Markevich, V; Nishio, K; Ota, S; Matos, I; Zenkevich, A; Picado sandi, E; Forstner, O; Hu, B; Ntshangase, S S; Sanchez-segovia, J

    2002-01-01

    The experiments aim at a broad exploration of the properties of atomic nuclei far away from the region of beta stability. Furthermore, the unique radioactive beams of over 60~elements produced at the on-line isotope separators ISOLDE-2 and ISOLDE-3 are used in a wide programme of atomic, solid state and surface physics. Around 300 scientists are involved in the project, coming from about 70 laboratories. \\\\ \\\\ The electromagnetic isotope separators are connected on-line with their production targets in the extracted 600 MeV proton or 910~MeV Helium-3 beam of the Synchro-Cyclotron. Secondary beams of radioactive isotopes are available at the facility in intensities of 10$^1

  9. Preparation of nanoparticles by continuous-flow microfluidics

    International Nuclear Information System (INIS)

    Jahn, Andreas; Reiner, Joseph E.; Vreeland, Wyatt N.; DeVoe, Don L.; Locascio, Laurie E.; Gaitan, Michael

    2008-01-01

    We review a variety of micro- and nanoparticle formulations produced with microfluidic methods. A diverse variety of approaches to generate microscale and nanoscale particles has been reported. Here we emphasize the use of microfluidics, specifically microfluidic systems that operate in a continuous flow mode, thereby allowing continuous generation of desired particle formulations. The generation of semiconductor quantum dots, metal colloids, emulsions, and liposomes is considered. To emphasize the potential benefits of the continuous-flow microfluidic methodology for nanoparticle generation, preliminary data on the size distribution of liposomes formed using the microfluidic approach is compared to the traditional bulk alcohol injection method.

  10. Operation placement for application-specific digital microfluidic biochips

    DEFF Research Database (Denmark)

    Alistar, Mirela; Pop, Paul; Madsen, Jan

    2013-01-01

    Microfluidic-based biochips are replacing the conventional biochemical analyzers, and are able to integrate onchip all the necessary functions for biochemical analysis using microfluidics. The digital microfluidic biochips are based on the manipulation of liquids not as a continuous flow......, but as discrete droplets on an array of electrodes. Microfluidic operations, such as transport, mixing, split, are performed on this array by routing the corresponding droplets on a series of electrodes. Researchers have proposed several approaches for the synthesis of digital microfluidic biochips. All previous...

  11. Launching applications on compute and service processors running under different operating systems in scalable network of processor boards with routers

    Science.gov (United States)

    Tomkins, James L [Albuquerque, NM; Camp, William J [Albuquerque, NM

    2009-03-17

    A multiple processor computing apparatus includes a physical interconnect structure that is flexibly configurable to support selective segregation of classified and unclassified users. The physical interconnect structure also permits easy physical scalability of the computing apparatus. The computing apparatus can include an emulator which permits applications from the same job to be launched on processors that use different operating systems.

  12. Run Control Communication for the Upgrade of the ATLAS Muon-to-Central-Trigger-Processor Interface (MUCTPI)

    CERN Document Server

    AUTHOR|(INSPIRE)INSPIRE-00223859; The ATLAS collaboration; Armbruster, Aaron James; Carrillo-Montoya, German D.; Chelstowska, Magda Anna; Czodrowski, Patrick; Deviveiros, Pier-Olivier; Eifert, Till; Ellis, Nicolas; Galster, Gorm Aske Gram Krohn; Haas, Stefan; Helary, Louis; Lagkas Nikolos, Orestis; Marzin, Antoine; Pauly, Thilo; Ryjov, Vladimir; Schmieden, Kristof; Silva Oliveira, Marcos Vinicius; Stelzer, Harald Joerg; Vichoudis, Paschalis; Wengler, Thorsten; Farthouat, Philippe

    2018-01-01

    The Muon-to-Central Trigger Processor Interface (MUCTPI) of the ATLAS experiment at the Large Hadron Collider (LHC) at CERN will be upgraded to an ATCA blade system for Run 3. The new design requires development of new communication models for control, configuration and monitoring. A System-on-Chip (SoC) with a programmable logic part and a processor part will be used for communication to the run control system and to the MUCTPI processing FPGAs. Different approaches have been compared. First, we tried an available UDP-based implementation in firmware for the programmable logic. Although this approach works as expected, it does not provide any flexibility to extend the functionality to more complex operations, e.g. for serial protocols. Second, we used the SoC processor with an embedded Linux operating system and an application-specific software written in C++ using a TCP remote-procedure-call approach. The software is built and maintained using the Yocto/OpenEmbedded framework. This approach was successfully...

  13. Run control communication for the upgrade of the ATLAS Muon-to-Central Trigger Processor Interface (MUCTPI)

    CERN Document Server

    AUTHOR|(INSPIRE)INSPIRE-00223859; The ATLAS collaboration; Armbruster, Aaron James; Carrillo-Montoya, German D.; Chelstowska, Magda Anna; Czodrowski, Patrick; Deviveiros, Pier-Olivier; Eifert, Till; Ellis, Nicolas; Farthouat, Philippe; Galster, Gorm Aske Gram Krohn; Haas, Stefan; Helary, Louis; Lagkas Nikolos, Orestis; Marzin, Antoine; Pauly, Thilo; Ryjov, Vladimir; Schmieden, Kristof; Silva Oliveira, Marcos Vinicius; Stelzer, Harald Joerg; Vichoudis, Paschalis; Wengler, Thorsten

    The Muon-to-Central-Trigger-Processor Interface (MUCTPI) of the ATLAS experiment at the Large Hadron Collider (LHC) at CERN will be upgraded to an ATCA blade system for Run 3, starting in 2021. The new design requires development of new communication models for control, configuration and monitoring. A System-on-Chip (SoC) with a programmable logic part and a processor part will be used for communication to the run control system and to the MUCTPI processing FPGAs. Different approaches have been compared. First, we tried an available UDP-based implementation in firmware for the programmable logic. Although this approach works as expected, it does not provide any flexibility to extend the functionality to more complex operations, e.g. for serial protocols. Second, we used a SoC processor with an embedded Linux operating system and an application-specific software written in C++ using a TCP remote-procedure-call approach. The software is built and maintained using the framework of the Yocto Project. This approa...

  14. Pulsed laser triggered high speed microfluidic switch

    Science.gov (United States)

    Wu, Ting-Hsiang; Gao, Lanyu; Chen, Yue; Wei, Kenneth; Chiou, Pei-Yu

    2008-10-01

    We report a high-speed microfluidic switch capable of achieving a switching time of 10 μs. The switching mechanism is realized by exciting dynamic vapor bubbles with focused laser pulses in a microfluidic polydimethylsiloxane (PDMS) channel. The bubble expansion deforms the elastic PDMS channel wall and squeezes the adjacent sample channel to control its fluid and particle flows as captured by the time-resolved imaging system. A switching of polystyrene microspheres in a Y-shaped channel has also been demonstrated. This ultrafast laser triggered switching mechanism has the potential to advance the sorting speed of state-of-the-art microscale fluorescence activated cell sorting devices.

  15. Integrated Microfluidic Sensor System with Magnetostrictive Resonators

    KAUST Repository

    Liang, Cai; Kosel, Jü rgen; Gooneratne, Chinthaka

    2011-01-01

    The present embodiments describe a method that integrates a magnetostrictive sensor with driving and detecting elements into a microfluidic chip to detect a chemical, biochemical or biomedical species. These embodiments may also measure the properties of a fluid such as viscosity, pH values. The whole system can be referred to lab-on-a-chip (LOC) or micro-total-analysis-systems (.mu.TAS). In particular, this present embodiments include three units, including a microfluidics unit, a magnetostrictive sensor, and driving/detecting elements. An analyzer may also be provided to analyze an electrical signal associated with a feature of a target specimen.

  16. Microfluidic device for acoustic cell lysis

    Science.gov (United States)

    Branch, Darren W.; Cooley, Erika Jane; Smith, Gennifer Tanabe; James, Conrad D.; McClain, Jaime L.

    2015-08-04

    A microfluidic acoustic-based cell lysing device that can be integrated with on-chip nucleic acid extraction. Using a bulk acoustic wave (BAW) transducer array, acoustic waves can be coupled into microfluidic cartridges resulting in the lysis of cells contained therein by localized acoustic pressure. Cellular materials can then be extracted from the lysed cells. For example, nucleic acids can be extracted from the lysate using silica-based sol-gel filled microchannels, nucleic acid binding magnetic beads, or Nafion-coated electrodes. Integration of cell lysis and nucleic acid extraction on-chip enables a small, portable system that allows for rapid analysis in the field.

  17. Integrated Microfluidic Gas Sensors for Water Monitoring

    Science.gov (United States)

    Zhu, L.; Sniadecki, N.; DeVoe, D. L.; Beamesderfer, M.; Semancik, S.; DeVoe, D. L.

    2003-01-01

    A silicon-based microhotplate tin oxide (SnO2) gas sensor integrated into a polymer-based microfluidic system for monitoring of contaminants in water systems is presented. This device is designed to sample a water source, control the sample vapor pressure within a microchannel using integrated resistive heaters, and direct the vapor past the integrated gas sensor for analysis. The sensor platform takes advantage of novel technology allowing direct integration of discrete silicon chips into a larger polymer microfluidic substrate, including seamless fluidic and electrical interconnects between the substrate and silicon chip.

  18. Integrated Microfluidic Sensor System with Magnetostrictive Resonators

    KAUST Repository

    Liang, Cai

    2011-12-08

    The present embodiments describe a method that integrates a magnetostrictive sensor with driving and detecting elements into a microfluidic chip to detect a chemical, biochemical or biomedical species. These embodiments may also measure the properties of a fluid such as viscosity, pH values. The whole system can be referred to lab-on-a-chip (LOC) or micro-total-analysis-systems (.mu.TAS). In particular, this present embodiments include three units, including a microfluidics unit, a magnetostrictive sensor, and driving/detecting elements. An analyzer may also be provided to analyze an electrical signal associated with a feature of a target specimen.

  19. 3D Ceramic Microfluidic Device Manufacturing

    International Nuclear Information System (INIS)

    Natarajan, Govindarajan; Humenik, James N

    2006-01-01

    Today, semiconductor processing serves as the backbone for the bulk of micromachined devices. Precision lithography and etching technology used in the semiconductor industry are also leveraged by alternate techniques like electroforming and molding. The nature of such processing is complex, limited and expensive for any manufacturing foundry. This paper details the technology elements developed to manufacture cost effective and versatile microfluidic devices for applications ranging from medical diagnostics to characterization of bioassays. Two applications using multilayer ceramic technology to manufacture complex 3D microfluidic devices are discussed

  20. Micro-Fluidic Device for Drug Delivery

    Science.gov (United States)

    Beebe, David J. (Inventor); MacDonald, Michael J. (Inventor); Eddington, David T. (Inventor); Mensing, Glennys A. (Inventor)

    2014-01-01

    A microfluidic device is provided for delivering a drug to an individual. The microfluidic device includes a body that defines a reservoir for receiving the drug therein. A valve interconnects the reservoir to an output needle that is insertable into the skin of an individual. A pressure source urges the drug from the reservoir toward the needle. The valve is movable between a closed position preventing the flow of the drug from the reservoir to the output needle and an open position allowing for the flow of the drug from the reservoir to the output needle in response to a predetermined condition in the physiological fluids of the individual.

  1. Microfluidic Apps for off-the-shelf instruments.

    Science.gov (United States)

    Mark, Daniel; von Stetten, Felix; Zengerle, Roland

    2012-07-21

    Within the last decade a huge increase in research activity in microfluidics could be observed. However, despite several commercial success stories, microfluidic chips are still not sold in high numbers in mass markets so far. Here we promote a new concept that could be an alternative approach to commercialization: designing microfluidic chips for existing off-the-shelf instruments. Such "Microfluidic Apps" could significantly lower market entry barriers and provide many advantages: developers of microfluidic chips make use of existing equipment or platforms and do not have to develop instruments from scratch; end-users can profit from microfluidics without the need to invest in new equipment; instrument manufacturers benefit from an expanded customer base due to the new applications that can be implemented in their instruments. Microfluidic Apps could be considered as low-cost disposables which can easily be distributed globally via web-shops. Therefore they could be a door-opener for high-volume mass markets.

  2. Moving-part-free microfluidic systems for lab-on-a-chip

    International Nuclear Information System (INIS)

    Luo, J K; Fu, Y Q; Du, X Y; Flewitt, A J; Milne, W I; Li, Y; Walton, A J

    2009-01-01

    Microfluidic systems are part of an emerging technology which deals with minute amounts of liquids (biological samples and reagents) on a small scale. They are fast, compact and can be made into a highly integrated system to deliver sample purification, separation, reaction, immobilization, labelling, as well as detection, thus are promising for applications such as lab-on-a-chip and handheld healthcare devices. Miniaturized micropumps typically consist of a moving-part component, such as a membrane structure, to deliver liquids, and are often unreliable, complicated in structure and difficult to be integrated with other control electronics circuits. The trend of new-generation micropumps is moving-part-free micropumps operated by advanced techniques, such as electrokinetic force, surface tension/energy, acoustic waves. This paper reviews the development and advances of relevant technologies, and introduces electrowetting-on-dielectrics and acoustic wave-based microfluidics. The programmable electrowetting micropump has been realized to dispense and manipulate droplets in 2D with up to 1000 addressable electrodes and electronics built underneath. The acoustic wave-based microfluidics can be used not only for pumping, mixing and droplet generation but also for biosensors, suitable for single-mechanism-based lab-on-a-chip applications

  3. Microfluidics' great promise for Biology - Microfluidics as a new engine for the molecular sciences

    KAUST Repository

    Kodzius, Rimantas

    2010-06-04

    History of the Life Sciences Origins of life Discoveries and instrumentation The power of genetic variation Diagnostics based on DNA/ protein variation Genomic scanning providers DNA sequencing companies Microfluidics story Commercial products available P

  4. Development & Characterization of Multifunctional Microfluidic Materials

    Science.gov (United States)

    Ucar, Ahmet Burak

    The field of microfluidics has been mostly investigated for miniaturized lab on a chip devices for analytical and clinical applications. However, there is an emerging class of "smart" microfluidic materials, combining microfluidics with soft polymers to yield new functionalities. The best inspiration for such materials found in nature is skin, whose functions are maintained and controlled by a vascular "microfluidic" network. We report here the development and characterization of a few new classes of microfluidic materials. First, we introduced microfluidic materials that can change their stiffness on demand. These materials were based on an engineered microchannel network embedded into a matrix of polydimethylsiloxane (PDMS), whose channels were filled with a liquid photoresist (SU- 8). The elastomer filled with the photoresist was initially soft. The materials were shaped into a desired geometry and then exposed to UV-light. Once photocured, the material preserved the defined shape and it could be bent, twisted or stretched with a very high recoverable strain. As soon as the external force was removed the material returned back to its predefined shape. Thus, the polymerized SU-8 acted as the 'endoskeleton' of the microfluidic network, which drastically increased the composite's elastic and bending moduli. Second, we demonstrated a class of simple and versatile soft microfluidic materials that can be turned optically transparent or colored on demand. These materials were made in the form of flexible sheets containing a microchannel network embedded in PDMS, similar to the photocurable materials. However, this time the channels were filled with a glycerolwater mixture, whose refractive index was matched with that of the PDMS matrix. By pumping such dye solutions into the channel network and consecutively replacing the medium, we showed that we can control the material's color and light transmittance in the visible and near-infrared regions, which can be used for

  5. A dedicated line-processor as used at the SHF

    International Nuclear Information System (INIS)

    Bevan, A.V.; Hatley, R.W.; Price, D.R.; Rankin, P.

    1985-01-01

    A hardwired trigger processor was used at the SLAC Hybrid Facility to find evidence for charged tracks originating from the fiducial volume of a 40'' rapidcycling bubble chamber. Straight-line projections of these tracks in the plane perpendicular to the applied magnetic field were searched for using data from three sets of proportional wire chambers (PWC). This information was made directly available to the processor by means of a special digitizing card. The results memory of the processor simulated read-only memory in a 168/E processor and was accessible by it. The 168/E controlled the issuing of a trigger command to the bubble chamber flash tubes. The same design of digitizer card used by the line processor was incorporated into the 168/E, again as read only memory, which allowed it access to the raw data for continual monitoring of trigger integrity. The design logic of the trigger processor was verified by running real PWC data through a FORTRAN simulation of the hardware. This enabled the debugging to become highly automated since a step by step, computer controlled comparison of processor registers to simulation predictions could be made

  6. Technology programme

    International Nuclear Information System (INIS)

    2007-01-01

    The technology activities carried out by the EURATOM-ENEA Association concern the continuation of the European Fusion Development Agreement (EFDA) as well as the ITER activities coordinated by the ITER International Office and Fusion for Energy. Also included in the activities are design and RD under the Broader Approach Agreement between the EU and Japan. In order to better contribute to the programme a number of consortium agreements among the Associations are being signed. Collaboration with industries in view of their participation in the construction of ITER was further strengthened, mainly in the field of magnet and divertor components. The new European Test Blanket Facility at ENEA Brasimone was completed; the design of the ITER radial neutron camera was optimised and the performance achievable with the in-vessel viewing system was further assessed by experimental trials. Design activities for the JT-60SA magnet and power supply system as well as the design and experimental activities related to the target of the International Fusion Materials Irradiation Facility were continued. Significant work was done to define quality assurance for neutronics analyses. Mockups of the ITER pre-compression ring made in glass fibre epoxy were tested. The activities and results documented in the following illustrate ENEA's efforts to support fusion development

  7. Novel memory architecture for video signal processor

    Science.gov (United States)

    Hung, Jen-Sheng; Lin, Chia-Hsing; Jen, Chein-Wei

    1993-11-01

    An on-chip memory architecture for video signal processor (VSP) is proposed. This memory structure is a two-level design for the different data locality in video applications. The upper level--Memory A provides enough storage capacity to reduce the impact on the limitation of chip I/O bandwidth, and the lower level--Memory B provides enough data parallelism and flexibility to meet the requirements of multiple reconfigurable pipeline function units in a single VSP chip. The needed memory size is decided by the memory usage analysis for video algorithms and the number of function units. Both levels of memory adopted a dual-port memory scheme to sustain the simultaneous read and write operations. Especially, Memory B uses multiple one-read-one-write memory banks to emulate the real multiport memory. Therefore, one can change the configuration of Memory B to several sets of memories with variable read/write ports by adjusting the bus switches. Then the numbers of read ports and write ports in proposed memory can meet requirement of data flow patterns in different video coding algorithms. We have finished the design of a prototype memory design using 1.2- micrometers SPDM SRAM technology and will fabricated it through TSMC, in Taiwan.

  8. A CNN-Specific Integrated Processor

    Directory of Open Access Journals (Sweden)

    Suleyman Malki

    2009-01-01

    Full Text Available Integrated Processors (IP are algorithm-specific cores that either by programming or by configuration can be re-used within many microelectronic systems. This paper looks at Cellular Neural Networks (CNN to become realized as IP. First current digital implementations are reviewed, and the memoryprocessor bandwidth issues are analyzed. Then a generic view is taken on the structure of the network, and a new intra-communication protocol based on rotating wheels is proposed. It is shown that this provides for guaranteed high-performance with a minimal network interface. The resulting node is small and supports multi-level CNN designs, giving the system a 30-fold increase in capacity compared to classical designs. As it facilitates multiple operations on a single image, and single operations on multiple images, with minimal access to the external image memory, balancing the internal and external data transfer requirements optimizes the system operation. In conventional digital CNN designs, the treatment of boundary nodes requires additional logic to handle the CNN value propagation scheme. In the new architecture, only a slight modification of the existing cells is necessary to model the boundary effect. A typical prototype for visual pattern recognition will house 4096 CNN cells with a 2% overhead for making it an IP.

  9. The ATLAS fast tracker processor design

    CERN Document Server

    Volpi, Guido; Albicocco, Pietro; Alison, John; Ancu, Lucian Stefan; Anderson, James; Andari, Nansi; Andreani, Alessandro; Andreazza, Attilio; Annovi, Alberto; Antonelli, Mario; Asbah, Needa; Atkinson, Markus; Baines, J; Barberio, Elisabetta; Beccherle, Roberto; Beretta, Matteo; Biesuz, Nicolo Vladi; Blair, R E; Bogdan, Mircea; Boveia, Antonio; Britzger, Daniel; Bryant, Partick; Burghgrave, Blake; Calderini, Giovanni; Camplani, Alessandra; Cavaliere, Viviana; Cavasinni, Vincenzo; Chakraborty, Dhiman; Chang, Philip; Cheng, Yangyang; Citraro, Saverio; Citterio, Mauro; Crescioli, Francesco; Dawe, Noel; Dell'Orso, Mauro; Donati, Simone; Dondero, Paolo; Drake, G; Gadomski, Szymon; Gatta, Mauro; Gentsos, Christos; Giannetti, Paola; Gkaitatzis, Stamatios; Gramling, Johanna; Howarth, James William; Iizawa, Tomoya; Ilic, Nikolina; Jiang, Zihao; Kaji, Toshiaki; Kasten, Michael; Kawaguchi, Yoshimasa; Kim, Young Kee; Kimura, Naoki; Klimkovich, Tatsiana; Kolb, Mathis; Kordas, K; Krizka, Karol; Kubota, T; Lanza, Agostino; Li, Ho Ling; Liberali, Valentino; Lisovyi, Mykhailo; Liu, Lulu; Love, Jeremy; Luciano, Pierluigi; Luongo, Carmela; Magalotti, Daniel; Maznas, Ioannis; Meroni, Chiara; Mitani, Takashi; Nasimi, Hikmat; Negri, Andrea; Neroutsos, Panos; Neubauer, Mark; Nikolaidis, Spiridon; Okumura, Y; Pandini, Carlo; Petridou, Chariclia; Piendibene, Marco; Proudfoot, James; Rados, Petar Kevin; Roda, Chiara; Rossi, Enrico; Sakurai, Yuki; Sampsonidis, Dimitrios; Saxon, James; Schmitt, Stefan; Schoening, Andre; Shochet, Mel; Shoijaii, Jafar; Soltveit, Hans Kristian; Sotiropoulou, Calliope-Louisa; Stabile, Alberto; Swiatlowski, Maximilian J; Tang, Fukun; Taylor, Pierre Thor Elliot; Testa, Marianna; Tompkins, Lauren; Vercesi, V; Wang, Rui; Watari, Ryutaro; Zhang, Jianhong; Zeng, Jian Cong; Zou, Rui; Bertolucci, Federico

    2015-01-01

    The extended use of tracking information at the trigger level in the LHC is crucial for the trigger and data acquisition (TDAQ) system to fulfill its task. Precise and fast tracking is important to identify specific decay products of the Higgs boson or new phenomena, as well as to distinguish the contributions coming from the many collisions that occur at every bunch crossing. However, track reconstruction is among the most demanding tasks performed by the TDAQ computing farm; in fact, complete reconstruction at full Level-1 trigger accept rate (100 kHz) is not possible. In order to overcome this limitation, the ATLAS experiment is planning the installation of a dedicated processor, the Fast Tracker (FTK), which is aimed at achieving this goal. The FTK is a pipeline of high performance electronics, based on custom and commercial devices, which is expected to reconstruct, with high resolution, the trajectories of charged-particle tracks with a transverse momentum above 1 GeV, using the ATLAS inner tracker info...

  10. Preventing Precipitation in the ISS Urine Processor

    Science.gov (United States)

    Muirhead, Dean; Carter, Layne; Williamson, Jill; Chambers, Antja

    2017-01-01

    The ISS Urine Processor Assembly (UPA) was initially designed to achieve 85% recovery of water from pretreated urine on ISS. Pretreated urine is comprised of crew urine treated with flush water, an oxidant (chromium trioxide), and an inorganic acid (sulfuric acid) to control microbial growth and inhibit precipitation. Unfortunately, initial operation of the UPA on ISS resulted in the precipitation of calcium sulfate at 85% recovery. This occurred because the calcium concentration in the crew urine was elevated in microgravity due to bone loss. The higher calcium concentration precipitated with sulfate from the pretreatment acid, resulting in a failure of the UPA due to the accumulation of solids in the Distillation Assembly. Since this failure, the UPA has been limited to a reduced recovery of water from urine to prevent calcium sulfate from reaching the solubility limit. NASA personnel have worked to identify a solution that would allow the UPA to return to a nominal recovery rate of 85%. This effort has culminated with the development of a pretreatment based on phosphoric acid instead of sulfuric acid. By eliminating the sulfate associated with the pretreatment, the brine can be concentrated to a much higher concentration before calcium sulfate reach the solubility limit. This paper summarizes the development of this pretreatment and the testing performed to verify its implementation on ISS.

  11. Element Load Data Processor (ELDAP) Users Manual

    Science.gov (United States)

    Ramsey, John K., Jr.; Ramsey, John K., Sr.

    2015-01-01

    Often, the shear and tensile forces and moments are extracted from finite element analyses to be used in off-line calculations for evaluating the integrity of structural connections involving bolts, rivets, and welds. Usually the maximum forces and moments are desired for use in the calculations. In situations where there are numerous structural connections of interest for numerous load cases, the effort in finding the true maximum force and/or moment combinations among all fasteners and welds and load cases becomes difficult. The Element Load Data Processor (ELDAP) software described herein makes this effort manageable. This software eliminates the possibility of overlooking the worst-case forces and moments that could result in erroneous positive margins of safety and/or selecting inconsistent combinations of forces and moments resulting in false negative margins of safety. In addition to forces and moments, any scalar quantity output in a PATRAN report file may be evaluated with this software. This software was originally written to fill an urgent need during the structural analysis of the Ares I-X Interstage segment. As such, this software was coded in a straightforward manner with no effort made to optimize or minimize code or to develop a graphical user interface.

  12. Scientific Computing Kernels on the Cell Processor

    Energy Technology Data Exchange (ETDEWEB)

    Williams, Samuel W.; Shalf, John; Oliker, Leonid; Kamil, Shoaib; Husbands, Parry; Yelick, Katherine

    2007-04-04

    The slowing pace of commodity microprocessor performance improvements combined with ever-increasing chip power demands has become of utmost concern to computational scientists. As a result, the high performance computing community is examining alternative architectures that address the limitations of modern cache-based designs. In this work, we examine the potential of using the recently-released STI Cell processor as a building block for future high-end computing systems. Our work contains several novel contributions. First, we introduce a performance model for Cell and apply it to several key scientific computing kernels: dense matrix multiply, sparse matrix vector multiply, stencil computations, and 1D/2D FFTs. The difficulty of programming Cell, which requires assembly level intrinsics for the best performance, makes this model useful as an initial step in algorithm design and evaluation. Next, we validate the accuracy of our model by comparing results against published hardware results, as well as our own implementations on a 3.2GHz Cell blade. Additionally, we compare Cell performance to benchmarks run on leading superscalar (AMD Opteron), VLIW (Intel Itanium2), and vector (Cray X1E) architectures. Our work also explores several different mappings of the kernels and demonstrates a simple and effective programming model for Cell's unique architecture. Finally, we propose modest microarchitectural modifications that could significantly increase the efficiency of double-precision calculations. Overall results demonstrate the tremendous potential of the Cell architecture for scientific computations in terms of both raw performance and power efficiency.

  13. Nonlinear Wave Simulation on the Xeon Phi Knights Landing Processor

    Science.gov (United States)

    Hristov, Ivan; Goranov, Goran; Hristova, Radoslava

    2018-02-01

    We consider an interesting from computational point of view standing wave simulation by solving coupled 2D perturbed Sine-Gordon equations. We make an OpenMP realization which explores both thread and SIMD levels of parallelism. We test the OpenMP program on two different energy equivalent Intel architectures: 2× Xeon E5-2695 v2 processors, (code-named "Ivy Bridge-EP") in the Hybrilit cluster, and Xeon Phi 7250 processor (code-named "Knights Landing" (KNL). The results show 2 times better performance on KNL processor.

  14. Nonlinear Wave Simulation on the Xeon Phi Knights Landing Processor

    Directory of Open Access Journals (Sweden)

    Hristov Ivan

    2018-01-01

    Full Text Available We consider an interesting from computational point of view standing wave simulation by solving coupled 2D perturbed Sine-Gordon equations. We make an OpenMP realization which explores both thread and SIMD levels of parallelism. We test the OpenMP program on two different energy equivalent Intel architectures: 2× Xeon E5-2695 v2 processors, (code-named “Ivy Bridge-EP” in the Hybrilit cluster, and Xeon Phi 7250 processor (code-named “Knights Landing” (KNL. The results show 2 times better performance on KNL processor.

  15. Optical reversible programmable Boolean logic unit.

    Science.gov (United States)

    Chattopadhyay, Tanay

    2012-07-20

    Computing with reversibility is the only way to avoid dissipation of energy associated with bit erase. So, a reversible microprocessor is required for future computing. In this paper, a design of a simple all-optical reversible programmable processor is proposed using a polarizing beam splitter, liquid crystal-phase spatial light modulators, a half-wave plate, and plane mirrors. This circuit can perform 16 logical operations according to three programming inputs. Also, inputs can be easily recovered from the outputs. It is named the "reversible programmable Boolean logic unit (RPBLU)." The logic unit is the basic building block of many complex computational operations. Hence the design is important in sense. Two orthogonally polarized lights are defined here as two logical states, respectively.

  16. Microfluidics for Antibiotic Susceptibility and Toxicity Testing

    Directory of Open Access Journals (Sweden)

    Jing Dai

    2016-10-01

    Full Text Available The recent emergence of antimicrobial resistance has become a major concern for worldwide policy makers as very few new antibiotics have been developed in the last twenty-five years. To prevent the death of millions of people worldwide, there is an urgent need for a cheap, fast and accurate set of tools and techniques that can help to discover and develop new antimicrobial drugs. In the past decade, microfluidic platforms have emerged as potential systems for conducting pharmacological studies. Recent studies have demonstrated that microfluidic platforms can perform rapid antibiotic susceptibility tests to evaluate antimicrobial drugs’ efficacy. In addition, the development of cell-on-a-chip and organ-on-a-chip platforms have enabled the early drug testing, providing more accurate insights into conventional cell cultures on the drug pharmacokinetics and toxicity, at the early and cheaper stage of drug development, i.e., prior to animal and human testing. In this review, we focus on the recent developments of microfluidic platforms for rapid antibiotics susceptibility testing, investigating bacterial persistence and non-growing but metabolically active (NGMA bacteria, evaluating antibiotic effectiveness on biofilms and combinatorial effect of antibiotics, as well as microfluidic platforms that can be used for in vitro antibiotic toxicity testing.

  17. Droplet microfluidics in (bio) chemical analysis

    Czech Academy of Sciences Publication Activity Database

    Basova, E. Y.; Foret, František

    2015-01-01

    Roč. 140, č. 1 (2015), s. 22-38 ISSN 0003-2654 R&D Projects: GA ČR(CZ) GBP206/12/G014 Institutional support: RVO:68081715 Keywords : droplet chemistry * bio analysis * microfluidics * protein Subject RIV: CB - Analytical Chemistry, Separation Impact factor: 4.033, year: 2015

  18. Light-responsive polymers for microfluidic applications

    NARCIS (Netherlands)

    ter Schiphorst, J.; Saez, J.; Diamond, D.; Benito-Lopez, F.; Schenning, A.P.H.J.

    2018-01-01

    While the microfluidic device itself may be small, often the equipment required to control fluidics in the chip unit is large e.g. pumps, valves and mixing units, which can severely limit practical use and functional scalability. In addition, components associated with fluidic control of the device,

  19. Droplet microfluidics in (bio) chemical analysis

    Czech Academy of Sciences Publication Activity Database

    Basova, E. Y.; Foret, František

    2015-01-01

    Roč. 140, č. 1 (2015), s. 22-38 ISSN 0003-2654 R&D Projects: GA ČR(CZ) GBP206/12/G014 Institutional support: RVO:68081715 Keywords : droplet chemistry * bioanalysis * microfluidics * protein Subject RIV: CB - Analytical Chemistry, Separation Impact factor: 4.033, year: 2015

  20. A Centrifugal Microfluidic Platform Using SLM Extraction

    DEFF Research Database (Denmark)

    Andreasen, Sune Zoëga; Burger, Robert; Emnéus, Jenny

    2016-01-01

    Here we present a pump-less microfluidic pla>orm which performs sample clean-up and enrichment in a single step, by integraAng Supported Liquid Membrane (SLM) extracAon. Our pla>orm offers a simple, yet very efficient, method for achieving sample pre-treatment and enrichment of rare analytes, in ...

  1. Microfluidic desalination techniques and their potential applications

    NARCIS (Netherlands)

    Roelofs, Susan Helena; van den Berg, Albert; Odijk, Mathieu

    2015-01-01

    In this review we discuss recent developments in the emerging research field of miniaturized desalination. Traditionally desalination is performed to convert salt water into potable water and research is focused on improving performance of large-scale desalination plants. Microfluidic desalination

  2. Micromechanical photothermal analyser of microfluidic samples

    DEFF Research Database (Denmark)

    2014-01-01

    The present invention relates to a micromechanical photothermal analyser of microfluidic samples comprising an oblong micro-channel extending longitudinally from a support element, the micro-channel is made from at least two materials with different thermal expansion coefficients, wherein...

  3. Design of microfluidic bioreactors using topology optimization

    DEFF Research Database (Denmark)

    Okkels, Fridolin; Bruus, Henrik

    2007-01-01

    We address the design of optimal reactors for supporting biological cultures using the method of topology optimization. For some years this method have been used to design various optimal microfluidic devices.1-4 We apply this method to distribute optimally biologic cultures within a flow...

  4. Microfluidic Sensing Platforms for Medicine and Diagnostics

    DEFF Research Database (Denmark)

    Kiilerich-Pedersen, Katrine

    the specialized laboratory. Microfluidic cell migration devices, imitating in vivo conditions were developed with success, improving the in vitro experimental setup for basic research and drug discovery. Polymer biosensors have reached a new level of maturity, and pathogen detection could benefit from...

  5. Biocatalytic process development using microfluidic miniaturized systems

    DEFF Research Database (Denmark)

    Krühne, Ulrich; Heintz, Søren; Ringborg, Rolf Hoffmeyer

    2014-01-01

    The increasing interest in biocatalytic processes means there is a clear need for a new systematic development paradigm which encompasses both protein engineering and process engineering. This paper argues that through the use of a new microfluidic platform, data can be collected more rapidly...

  6. Droplet Manipulations in Two Phase Flow Microfluidics

    NARCIS (Netherlands)

    Pit, Arjen; Duits, Michael H.G.; Mugele, Friedrich Gunther

    2015-01-01

    Even though droplet microfluidics has been developed since the early 1980s, the number of applications that have resulted in commercial products is still relatively small. This is partly due to an ongoing maturation and integration of existing methods, but possibly also because of the emergence of

  7. Parallel single-cell analysis microfluidic platform

    NARCIS (Netherlands)

    van den Brink, Floris Teunis Gerardus; Gool, Elmar; Frimat, Jean-Philippe; Bomer, Johan G.; van den Berg, Albert; le Gac, Severine

    2011-01-01

    We report a PDMS microfluidic platform for parallel single-cell analysis (PaSCAl) as a powerful tool to decipher the heterogeneity found in cell populations. Cells are trapped individually in dedicated pockets, and thereafter, a number of invasive or non-invasive analysis schemes are performed.

  8. Review of Recent Metamaterial Microfluidic Sensors.

    Science.gov (United States)

    Salim, Ahmed; Lim, Sungjoon

    2018-01-15

    Metamaterial elements/arrays exhibit a sensitive response to fluids yet with a small footprint, therefore, they have been an attractive choice to realize various sensing devices when integrated with microfluidic technology. Micro-channels made from inexpensive biocompatible materials avoid any contamination from environment and require only microliter-nanoliter sample for sensing. Simple design, easy fabrication process, light weight prototype, and instant measurements are advantages as compared to conventional (optical, electrochemical and biological) sensing systems. Inkjet-printed flexible sensors find their utilization in rapidly growing wearable electronics and health-monitoring flexible devices. Adequate sensitivity and repeatability of these low profile microfluidic sensors make them a potential candidate for point-of-care testing which novice patients can use reliably. Aside from degraded sensitivity and lack of selectivity in all practical microwave chemical sensors, they require an instrument, such as vector network analyzer for measurements and not readily available as a self-sustained portable sensor. This review article presents state-of-the-art metamaterial inspired microfluidic bio/chemical sensors (passive devices ranging from gigahertz to terahertz range) with an emphasis on metamaterial sensing circuit and microfluidic detection. We also highlight challenges and strategies to cope these issues which set future directions.

  9. Review of Recent Metamaterial Microfluidic Sensors

    Directory of Open Access Journals (Sweden)

    Ahmed Salim

    2018-01-01

    Full Text Available Metamaterial elements/arrays exhibit a sensitive response to fluids yet with a small footprint, therefore, they have been an attractive choice to realize various sensing devices when integrated with microfluidic technology. Micro-channels made from inexpensive biocompatible materials avoid any contamination from environment and require only microliter–nanoliter sample for sensing. Simple design, easy fabrication process, light weight prototype, and instant measurements are advantages as compared to conventional (optical, electrochemical and biological sensing systems. Inkjet-printed flexible sensors find their utilization in rapidly growing wearable electronics and health-monitoring flexible devices. Adequate sensitivity and repeatability of these low profile microfluidic sensors make them a potential candidate for point-of-care testing which novice patients can use reliably. Aside from degraded sensitivity and lack of selectivity in all practical microwave chemical sensors, they require an instrument, such as vector network analyzer for measurements and not readily available as a self-sustained portable sensor. This review article presents state-of-the-art metamaterial inspired microfluidic bio/chemical sensors (passive devices ranging from gigahertz to terahertz range with an emphasis on metamaterial sensing circuit and microfluidic detection. We also highlight challenges and strategies to cope these issues which set future directions.

  10. Reaction and separation opportunities with microfluidic devices

    NARCIS (Netherlands)

    Kolfschoten, R.C.

    2011-01-01

    Microfluidic devices make precisely controlled processing of substances possible on a microliter level. The advantage is that, due to the small sizes, the driving forces for mass and heat transfer are high. The surface to volume ratios are also high, which can benefit many surface oriented

  11. High content screening in microfluidic devices

    Science.gov (United States)

    Cheong, Raymond; Paliwal, Saurabh; Levchenko, Andre

    2011-01-01

    Importance of the field Miniaturization is key to advancing the state-of-the-art in high content screening (HCS), in order to enable dramatic cost savings through reduced usage of expensive biochemical reagents and to enable large-scale screening on primary cells. Microfluidic technology offers the potential to enable HCS to be performed with an unprecedented degree of miniaturization. Areas covered in this review This perspective highlights a real-world example from the authors’ work of HCS assays implemented in a highly miniaturized microfluidic format. Advantages of this technology are discussed, including cost savings, high throughput screening on primary cells, improved accuracy, the ability to study complex time-varying stimuli, and ease of automation, integration, and scaling. What the reader will gain The reader will understand the capabilities of a new microfluidics-based platform for HCS, and the advantages it provides over conventional plate-based HCS. Take home message Microfluidics technology will drive significant advancements and broader usage and applicability of HCS in drug discovery. PMID:21852997

  12. Wax-bonding 3D microfluidic chips

    KAUST Repository

    Gong, Xiuqing; Yi, Xin; Xiao, Kang; Li, Shunbo; Kodzius, Rimantas; Qin, Jianhua; Wen, Weijia

    2013-01-01

    We report a simple, low-cost and detachable microfluidic chip incorporating easily accessible paper, glass slides or other polymer films as the chip materials along with adhesive wax as the recycling bonding material. We use a laser to cut through the paper or film to form patterns and then sandwich the paper and film between glass sheets or polymer membranes . The hot-melt adhesive wax can realize bridge bonding between various materials, for example, paper, polymethylmethacrylate (PMMA) film, glass sheets, or metal plate. The bonding process is reversible and the wax is reusable through a melting and cooling process. With this process, a three-dimensional (3D) microfluidic chip is achievable by vacuating and venting the chip in a hot-water bath. To study the biocompatibility and applicability of the wax-based microfluidic chip, we tested the PCR compatibility with the chip materials first. Then we applied the wax-paper based microfluidic chip to HeLa cell electroporation (EP ). Subsequently, a prototype of a 5-layer 3D chip was fabricated by multilayer wax bonding. To check the sealing ability and the durability of the chip, green fluorescence protein (GFP) recombinant Escherichia coli (E. coli) bacteria were cultured, with which the chemotaxis of E. coli was studied in order to determine the influence of antibiotic ciprofloxacin concentration on the E. coli migration.

  13. Wax-bonding 3D microfluidic chips

    KAUST Repository

    Gong, Xiuqing

    2013-10-10

    We report a simple, low-cost and detachable microfluidic chip incorporating easily accessible paper, glass slides or other polymer films as the chip materials along with adhesive wax as the recycling bonding material. We use a laser to cut through the paper or film to form patterns and then sandwich the paper and film between glass sheets or polymer membranes . The hot-melt adhesive wax can realize bridge bonding between various materials, for example, paper, polymethylmethacrylate (PMMA) film, glass sheets, or metal plate. The bonding process is reversible and the wax is reusable through a melting and cooling process. With this process, a three-dimensional (3D) microfluidic chip is achievable by vacuating and venting the chip in a hot-water bath. To study the biocompatibility and applicability of the wax-based microfluidic chip, we tested the PCR compatibility with the chip materials first. Then we applied the wax-paper based microfluidic chip to HeLa cell electroporation (EP ). Subsequently, a prototype of a 5-layer 3D chip was fabricated by multilayer wax bonding. To check the sealing ability and the durability of the chip, green fluorescence protein (GFP) recombinant Escherichia coli (E. coli) bacteria were cultured, with which the chemotaxis of E. coli was studied in order to determine the influence of antibiotic ciprofloxacin concentration on the E. coli migration.

  14. Porous Microfluidic Devices - Fabrication adn Applications

    NARCIS (Netherlands)

    de Jong, J.; Geerken, M.J.; Lammertink, Rob G.H.; Wessling, Matthias

    2007-01-01

    The major part of microfluidic devices nowadays consists of a dense material that defines the fluidic structure. A generic fabrication method enabling the production of completely porous micro devices with user-defined channel networks is developed. The channel walls can be used as a (selective)

  15. Recent Advances in Magnetic Microfluidic Biosensors

    Directory of Open Access Journals (Sweden)

    Ioanna Giouroudi

    2017-07-01

    Full Text Available The development of portable biosening devices for the detection of biological entities such as biomolecules, pathogens, and cells has become extremely significant over the past years. Scientific research, driven by the promise for miniaturization and integration of complex laboratory equipment on inexpensive, reliable, and accurate devices, has successfully shifted several analytical and diagnostic methods to the submillimeter scale. The miniaturization process was made possible with the birth of microfluidics, a technology that could confine, manipulate, and mix very small volumes of liquids on devices integrated on standard silicon technology chips. Such devices are then directly translating the presence of these entities into an electronic signal that can be read out with a portable instrumentation. For the aforementioned tasks, the use of magnetic markers (magnetic particles—MPs—functionalized with ligands in combination with the application of magnetic fields is being strongly investigated by research groups worldwide. The greatest merits of using magnetic fields are that they can be applied either externally or from integrated microconductors and they can be well-tuned by adjusting the applied current on the microconductors. Moreover, the magnetic markers can be manipulated inside microfluidic channels by high gradient magnetic fields that can in turn be detected by magnetic sensors. All the above make this technology an ideal candidate for the development of such microfluidic biosensors. In this review, focus is given only to very recent advances in biosensors that use microfluidics in combination with magnetic sensors and magnetic markers/nanoparticles.

  16. Differential white cell count by centrifugal microfluidics.

    Energy Technology Data Exchange (ETDEWEB)

    Sommer, Gregory Jon; Tentori, Augusto M.; Schaff, Ulrich Y.

    2010-07-01

    We present a method for counting white blood cells that is uniquely compatible with centrifugation based microfluidics. Blood is deposited on top of one or more layers of density media within a microfluidic disk. Spinning the disk causes the cell populations within whole blood to settle through the media, reaching an equilibrium based on the density of each cell type. Separation and fluorescence measurement of cell types stained with a DNA dye is demonstrated using this technique. The integrated signal from bands of fluorescent microspheres is shown to be proportional to their initial concentration in suspension. Among the current generation of medical diagnostics are devices based on the principle of centrifuging a CD sized disk functionalized with microfluidics. These portable 'lab on a disk' devices are capable of conducting multiple assays directly from a blood sample, embodied by platforms developed by Gyros, Samsung, and Abaxis. [1,2] However, no centrifugal platform to date includes a differential white blood cell count, which is an important metric complimentary to diagnostic assays. Measuring the differential white blood cell count (the relative fraction of granulocytes, lymphocytes, and monocytes) is a standard medical diagnostic technique useful for identifying sepsis, leukemia, AIDS, radiation exposure, and a host of other conditions that affect the immune system. Several methods exist for measuring the relative white blood cell count including flow cytometry, electrical impedance, and visual identification from a stained drop of blood under a microscope. However, none of these methods is easily incorporated into a centrifugal microfluidic diagnostic platform.

  17. The results of a quality-control programme in mammography

    International Nuclear Information System (INIS)

    Ramsdale, M.L.; Hiles, P.A.

    1989-01-01

    A quality-control programme at a breast screening clinic is described. Daily checks include film sensitometry for X-ray processor control and radiography of a lucite phantom to monitor the consistency of the X-ray machine automatic exposure control. Weekly checks include additional measurements on the performance of the automatic exposure control for different breast thickness and an overall assessment of image quality using a prototype mammography test phantom. The test phantom measures low-contrast sensitivity, high-control resolution and small-detail visibility. The results of the quality-control programme are presented with particular attention paid to tolerances and limiting values. (author)

  18. Fabrication of a multiplexed microfluidic system for scaled up production of cross-linked biocatalytic microspheres

    CSIR Research Space (South Africa)

    Mbanjwa, M

    2014-06-01

    Full Text Available the design and fabrication of a multiplexed microfluidic system for producing biocatalytic microspheres. The microfluidic system consists of an array of 10 parallel microfluidic circuits, for simultaneous operation to demonstrate increased production...

  19. Microfluidic device for continuous single cells analysis via Raman spectroscopy enhanced by integrated plasmonic nanodimers

    KAUST Repository

    Perozziello, Gerardo; Candeloro, Patrizio; De Grazia, Antonio; Esposito, Francesco; Allione, Marco; Coluccio, Maria Laura; Tallerico, Rossana; Valpapuram, Immanuel; Tirinato, Luca; Das, Gobind; Giugni, Andrea; Torre, Bruno; Veltri, Pierangelo; Kruhne, Ulrich; Della Valle, Giuseppe; Di Fabrizio, Enzo M.

    2015-01-01

    In this work a Raman flow cytometer is presented. It consists of a microfluidic device that takes advantages of the basic principles of Raman spectroscopy and flow cytometry. The microfluidic device integrates calibrated microfluidic channels- where

  20. Interconnection blocks: a method for providing reusable, rapid, multiple, aligned and planar microfluidic interconnections

    DEFF Research Database (Denmark)

    Sabourin, David; Snakenborg, Detlef; Dufva, Hans Martin

    2009-01-01

    In this paper a method is presented for creating 'interconnection blocks' that are re-usable and provide multiple, aligned and planar microfluidic interconnections. Interconnection blocks made from polydimethylsiloxane allow rapid testing of microfluidic chips and unobstructed microfluidic observ...

  1. Reconfigurable VLIW Processor for Software Defined Radio, Phase I

    Data.gov (United States)

    National Aeronautics and Space Administration — We will design and formally verify a VLIW processor that is radiation-hardened, and where the VLIW instructions consist of predicated RISC instructions from the...

  2. Detailed algorithmic description of a processor: a recipe for ...

    African Journals Online (AJOL)

    International Journal of Natural and Applied Sciences ... a simple developed compiler could generate the code of a simple programming language. ... It should be noted that such code generation must be done on a particular processor- for ...

  3. Analysis of Intel IA-64 Processor Support for Secure Systems

    National Research Council Canada - National Science Library

    Unalmis, Bugra

    2001-01-01

    .... Systems could be constructed for which serious security threats would be eliminated. This thesis explores the Intel IA-64 processor's hardware support and its relationship to software for building a secure system...

  4. Fast parallel computation of polynomials using few processors

    DEFF Research Database (Denmark)

    Valiant, Leslie; Skyum, Sven

    1981-01-01

    It is shown that any multivariate polynomial that can be computed sequentially in C steps and has degree d can be computed in parallel in 0((log d) (log C + log d)) steps using only (Cd)0(1) processors....

  5. Optical backplane interconnect switch for data processors and computers

    Science.gov (United States)

    Hendricks, Herbert D.; Benz, Harry F.; Hammer, Jacob M.

    1989-01-01

    An optoelectronic integrated device design is reported which can be used to implement an all-optical backplane interconnect switch. The switch is sized to accommodate an array of processors and memories suitable for direct replacement into the basic avionic multiprocessor backplane. The optical backplane interconnect switch is also suitable for direct replacement of the PI bus traffic switch and at the same time, suitable for supporting pipelining of the processor and memory. The 32 bidirectional switchable interconnects are configured with broadcast capability for controls, reconfiguration, and messages. The approach described here can handle a serial interconnection of data processors or a line-to-link interconnection of data processors. An optical fiber demonstration of this approach is presented.

  6. High-speed packet filtering utilizing stream processors

    Science.gov (United States)

    Hummel, Richard J.; Fulp, Errin W.

    2009-04-01

    Parallel firewalls offer a scalable architecture for the next generation of high-speed networks. While these parallel systems can be implemented using multiple firewalls, the latest generation of stream processors can provide similar benefits with a significantly reduced latency due to locality. This paper describes how the Cell Broadband Engine (CBE), a popular stream processor, can be used as a high-speed packet filter. Results show the CBE can potentially process packets arriving at a rate of 1 Gbps with a latency less than 82 μ-seconds. Performance depends on how well the packet filtering process is translated to the unique stream processor architecture. For example the method used for transmitting data and control messages among the pseudo-independent processor cores has a significant impact on performance. Experimental results will also show the current limitations of a CBE operating system when used to process packets. Possible solutions to these issues will be discussed.

  7. 2009 Survey of Gulf of Mexico Dockside Seafood Processors

    Data.gov (United States)

    National Oceanic and Atmospheric Administration, Department of Commerce — This survey gathered and analyze economic data from seafood processors throughout the states in the Gulf region. The survey sought to collect financial variables...

  8. Huffman-based code compression techniques for embedded processors

    KAUST Repository

    Bonny, Mohamed Talal; Henkel, Jö rg

    2010-01-01

    % for ARM and MIPS, respectively. In our compression technique, we have conducted evaluations using a representative set of applications and we have applied each technique to two major embedded processor architectures, namely ARM and MIPS. © 2010 ACM.

  9. Particle simulation on a distributed memory highly parallel processor

    International Nuclear Information System (INIS)

    Sato, Hiroyuki; Ikesaka, Morio

    1990-01-01

    This paper describes parallel molecular dynamics simulation of atoms governed by local force interaction. The space in the model is divided into cubic subspaces and mapped to the processor array of the CAP-256, a distributed memory, highly parallel processor developed at Fujitsu Labs. We developed a new technique to avoid redundant calculation of forces between atoms in different processors. Experiments showed the communication overhead was less than 5%, and the idle time due to load imbalance was less than 11% for two model problems which contain 11,532 and 46,128 argon atoms. From the software simulation, the CAP-II which is under development is estimated to be about 45 times faster than CAP-256 and will be able to run the same problem about 40 times faster than Fujitsu's M-380 mainframe when 256 processors are used. (author)

  10. Radiation Tolerant Software Defined Video Processor, Phase I

    Data.gov (United States)

    National Aeronautics and Space Administration — MaXentric's is proposing a radiation tolerant Software Define Video Processor, codenamed SDVP, for the problem of advanced motion imaging in the space environment....

  11. Assembly processor program converts symbolic programming language to machine language

    Science.gov (United States)

    Pelto, E. V.

    1967-01-01

    Assembly processor program converts symbolic programming language to machine language. This program translates symbolic codes into computer understandable instructions, assigns locations in storage for successive instructions, and computer locations from symbolic addresses.

  12. Suboptimal processor for anomaly detection for system surveillance and diagnosis

    Energy Technology Data Exchange (ETDEWEB)

    Ciftcioglu, Oe.; Hoogenboom, J.E.; Dam, H. van

    1989-06-01

    Anomaly detection for nuclear reactor surveillance and diagnosis is described. The residual noise obtained as a result of autoregressive (AR) modelling is essential to obtain high sensitivity for anomaly detection. By means of the method of hypothesis testing a suboptimal anomaly detection processor is devised for system surveillance and diagnosis. Experiments are carried out to investigate the performance of the processor, which is in particular of interest for on-line and real-time applications.

  13. Reducing Competitive Cache Misses in Modern Processor Architectures

    OpenAIRE

    Prisagjanec, Milcho; Mitrevski, Pece

    2017-01-01

    The increasing number of threads inside the cores of a multicore processor, and competitive access to the shared cache memory, become the main reasons for an increased number of competitive cache misses and performance decline. Inevitably, the development of modern processor architectures leads to an increased number of cache misses. In this paper, we make an attempt to implement a technique for decreasing the number of competitive cache misses in the first level of cache memory. This tec...

  14. UA1 upgrade first-level calorimeter trigger processor

    International Nuclear Information System (INIS)

    Bains, N.; Charlton, D.; Ellis, N.; Garvey, J.; Gregory, J.; Jimack, M.P.; Jovanovic, P.; Kenyon, I.R.; Baird, S.A.; Campbell, D.; Cawthraw, M.; Coughlan, J.; Flynn, P.; Galagedera, S.; Grayer, G.; Halsall, R.; Shah, T.P.; Stephens, R.; Eisenhandler, E.; Fensome, I.; Landon, M.

    1989-01-01

    A new first-level trigger processor has been built for the UA1 experiment on the Cern SppS Collider. The processor exploits the fine granularity of the new UA1 uranium-TMP calorimeter to improve the selectivity of the trigger. The new electron trigger has improved hadron jet rejection, achieved by requiring low energy deposition around the electromagnetic cluster. A missing transverse energy trigger and a total energy trigger have also been implemented. (orig.)

  15. GA103: A microprogrammable processor for online filtering

    International Nuclear Information System (INIS)

    Calzas, A.; Danon, G.; Bouquet, B.

    1981-01-01

    GA 103 is a 16 bit microprogrammable processor which emulates the PDP 11 instruction set. It is based on the Am 2900 slices. It allows user-implemented microinstructions and addition of hardwired processors. It will perform on-line filtering tasks in the NA 14 experiment at CERN, based on the reconstruction of transverse momentum of photons detected in a lead glass calorimeter. (orig.)

  16. 16-Bit RISC Processor Design for Convolution Application

    OpenAIRE

    Anand Nandakumar Shardul

    2013-01-01

    In this project, we propose a 16-bit non-pipelined RISC processor, which is used for signal processing applications. The processor consists of the blocks, namely, program counter, clock control unit, ALU, IDU and registers. Advantageous architectural modifications have been made in the incremented circuit used in program counter and carry select adder unit of the ALU in the RISC CPU core. Furthermore, a high speed and low power modified modifies multiplier has been designed and introduced in ...

  17. Microfluidics on liquid handling stations (μF-on-LHS): a new industry-compatible microfluidic platform

    Science.gov (United States)

    Kittelmann, Jörg; Radtke, Carsten P.; Waldbaur, Ansgar; Neumann, Christiane; Hubbuch, Jürgen; Rapp, Bastian E.

    2014-03-01

    Since the early days microfluidics as a scientific discipline has been an interdisciplinary research field with a wide scope of potential applications. Besides tailored assays for point-of-care (PoC) diagnostics, microfluidics has been an important tool for large-scale screening of reagents and building blocks in organic chemistry, pharmaceutics and medical engineering. Furthermore, numerous potential marketable products have been described over the years. However, especially in industrial applications, microfluidics is often considered only an alternative technology for fluid handling, a field which is industrially mostly dominated by large-scale numerically controlled fluid and liquid handling stations. Numerous noteworthy products have dominated this field in the last decade and have been inhibited the widespread application of microfluidics technology. However, automated liquid handling stations and microfluidics do not have to be considered as mutually exclusive approached. We have recently introduced a hybrid fluidic platform combining an industrially established liquid handling station and a generic microfluidic interfacing module that allows probing a microfluidic system (such as an essay or a synthesis array) using the instrumentation provided by the liquid handling station. We term this technology "Microfluidic on Liquid Handling Stations (μF-on-LHS)" - a classical "best of both worlds"- approach that allows combining the highly evolved, automated and industry-proven LHS systems with any type of microfluidic assay. In this paper we show, to the best of our knowledge, the first droplet microfluidics application on an industrial LHS using the μF-on-LHS concept.

  18. The Serial Link Processor for the Fast TracKer (FTK) processor at ATLAS

    CERN Document Server

    Biesuz, Nicolo Vladi; The ATLAS collaboration; Luciano, Pierluigi; Magalotti, Daniel; Rossi, Enrico

    2015-01-01

    The Associative Memory (AM) system of the Fast Tracker (FTK) processor has been designed to perform pattern matching using the hit information of the ATLAS experiment silicon tracker. The AM is the heart of FTK and is mainly based on the use of ASICs (AM chips) designed on purpose to execute pattern matching with a high degree of parallelism. It finds track candidates at low resolution that are seeds for a full resolution track fitting. To solve the very challenging data traffic problems inside FTK, multiple board and chip designs have been performed. The currently proposed solution is named the “Serial Link Processor” and is based on an extremely powerful network of 2 Gb/s serial links. This paper reports on the design of the Serial Link Processor consisting of two types of boards, the Local Associative Memory Board (LAMB), a mezzanine where the AM chips are mounted, and the Associative Memory Board (AMB), a 9U VME board which holds and exercises four LAMBs. We report on the performance of the intermedia...

  19. The Serial Link Processor for the Fast TracKer (FTK) processor at ATLAS

    CERN Document Server

    Andreani, A; The ATLAS collaboration; Beccherle, R; Beretta, M; Cipriani, R; Citraro, S; Citterio, M; Colombo, A; Crescioli, F; Dimas, D; Donati, S; Giannetti, P; Kordas, K; Lanza, A; Liberali, V; Luciano, P; Magalotti, D; Neroutsos, P; Nikolaidis, S; Piendibene, M; Sakellariou, A; Shojaii, S; Sotiropoulou, C-L; Stabile, A

    2014-01-01

    The Associative Memory (AM) system of the FTK processor has been designed to perform pattern matching using the hit information of the ATLAS silicon tracker. The AM is the heart of the FTK and it finds track candidates at low resolution that are seeds for a full resolution track fitting. To solve the very challenging data traffic problems inside the FTK, multiple designs and tests have been performed. The currently proposed solution is named the “Serial Link Processor” and is based on an extremely powerful network of 2 Gb/s serial links. This paper reports on the design of the Serial Link Processor consisting of the AM chip, an ASIC designed and optimized to perform pattern matching, and two types of boards, the Local Associative Memory Board (LAMB), a mezzanine where the AM chips are mounted, and the Associative Memory Board (AMB), a 9U VME board which holds and exercises four LAMBs. Special relevance will be given to the AMchip design that includes two custom cells optimized for low consumption. We repo...

  20. The Serial Link Processor for the Fast TracKer (FTK) processor at ATLAS

    CERN Document Server

    Biesuz, Nicolo Vladi; The ATLAS collaboration; Luciano, Pierluigi; Magalotti, Daniel; Rossi, Enrico

    2015-01-01

    The Associative Memory (AM) system of the Fast Tracker (FTK) processor has been designed to perform pattern matching using the hit information of the ATLAS experiment silicon tracker. The AM is the heart of FTK and is mainly based on the use of ASICs (AM chips) designed to execute pattern matching with a high degree of parallelism. The AM system finds track candidates at low resolution that are seeds for a full resolution track fitting. To solve the very challenging data traffic problems inside FTK, multiple board and chip designs have been performed. The currently proposed solution is named the “Serial Link Processor” and is based on an extremely powerful network of 828 2 Gbit/s serial links for a total in/out bandwidth of 56 Gb/s. This paper reports on the design of the Serial Link Processor consisting of two types of boards, the Local Associative Memory Board (LAMB), a mezzanine where the AM chips are mounted, and the Associative Memory Board (AMB), a 9U VME board which holds and exercises four LAMBs. ...

  1. Reconfigurable signal processor designs for advanced digital array radar systems

    Science.gov (United States)

    Suarez, Hernan; Zhang, Yan (Rockee); Yu, Xining

    2017-05-01

    The new challenges originated from Digital Array Radar (DAR) demands a new generation of reconfigurable backend processor in the system. The new FPGA devices can support much higher speed, more bandwidth and processing capabilities for the need of digital Line Replaceable Unit (LRU). This study focuses on using the latest Altera and Xilinx devices in an adaptive beamforming processor. The field reprogrammable RF devices from Analog Devices are used as analog front end transceivers. Different from other existing Software-Defined Radio transceivers on the market, this processor is designed for distributed adaptive beamforming in a networked environment. The following aspects of the novel radar processor will be presented: (1) A new system-on-chip architecture based on Altera's devices and adaptive processing module, especially for the adaptive beamforming and pulse compression, will be introduced, (2) Successful implementation of generation 2 serial RapidIO data links on FPGA, which supports VITA-49 radio packet format for large distributed DAR processing. (3) Demonstration of the feasibility and capabilities of the processor in a Micro-TCA based, SRIO switching backplane to support multichannel beamforming in real-time. (4) Application of this processor in ongoing radar system development projects, including OU's dual-polarized digital array radar, the planned new cylindrical array radars, and future airborne radars.

  2. PixonVision real-time video processor

    Science.gov (United States)

    Puetter, R. C.; Hier, R. G.

    2007-09-01

    PixonImaging LLC and DigiVision, Inc. have developed a real-time video processor, the PixonVision PV-200, based on the patented Pixon method for image deblurring and denoising, and DigiVision's spatially adaptive contrast enhancement processor, the DV1000. The PV-200 can process NTSC and PAL video in real time with a latency of 1 field (1/60 th of a second), remove the effects of aerosol scattering from haze, mist, smoke, and dust, improve spatial resolution by up to 2x, decrease noise by up to 6x, and increase local contrast by up to 8x. A newer version of the processor, the PV-300, is now in prototype form and can handle high definition video. Both the PV-200 and PV-300 are FPGA-based processors, which could be spun into ASICs if desired. Obvious applications of these processors include applications in the DOD (tanks, aircraft, and ships), homeland security, intelligence, surveillance, and law enforcement. If developed into an ASIC, these processors will be suitable for a variety of portable applications, including gun sights, night vision goggles, binoculars, and guided munitions. This paper presents a variety of examples of PV-200 processing, including examples appropriate to border security, battlefield applications, port security, and surveillance from unmanned aerial vehicles.

  3. Review of trigger and on-line processors at SLAC

    International Nuclear Information System (INIS)

    Lankford, A.J.

    1984-07-01

    The role of trigger and on-line processors in reducing data rates to manageable proportions in e + e - physics experiments is defined not by high physics or background rates, but by the large event sizes of the general-purpose detectors employed. The rate of e + e - annihilation is low, and backgrounds are not high; yet the number of physics processes which can be studied is vast and varied. This paper begins by briefly describing the role of trigger processors in the e + e - context. The usual flow of the trigger decision process is illustrated with selected examples of SLAC trigger processing. The features are mentioned of triggering at the SLC and the trigger processing plans of the two SLC detectors: The Mark II and the SLD. The most common on-line processors at SLAC, the BADC, the SLAC Scanner Processor, the SLAC FASTBUS Controller, and the VAX CAMAC Channel, are discussed. Uses of the 168/E, 3081/E, and FASTBUS VAX processors are mentioned. The manner in which these processors are interfaced and the function they serve on line is described. Finally, the accelerator control system for the SLC is outlined. This paper is a survey in nature, and hence, relies heavily upon references to previous publications for detailed description of work mentioned here. 27 references, 9 figures, 1 table

  4. High-Speed General Purpose Genetic Algorithm Processor.

    Science.gov (United States)

    Hoseini Alinodehi, Seyed Pourya; Moshfe, Sajjad; Saber Zaeimian, Masoumeh; Khoei, Abdollah; Hadidi, Khairollah

    2016-07-01

    In this paper, an ultrafast steady-state genetic algorithm processor (GAP) is presented. Due to the heavy computational load of genetic algorithms (GAs), they usually take a long time to find optimum solutions. Hardware implementation is a significant approach to overcome the problem by speeding up the GAs procedure. Hence, we designed a digital CMOS implementation of GA in [Formula: see text] process. The proposed processor is not bounded to a specific application. Indeed, it is a general-purpose processor, which is capable of performing optimization in any possible application. Utilizing speed-boosting techniques, such as pipeline scheme, parallel coarse-grained processing, parallel fitness computation, parallel selection of parents, dual-population scheme, and support for pipelined fitness computation, the proposed processor significantly reduces the processing time. Furthermore, by relying on a built-in discard operator the proposed hardware may be used in constrained problems that are very common in control applications. In the proposed design, a large search space is achievable through the bit string length extension of individuals in the genetic population by connecting the 32-bit GAPs. In addition, the proposed processor supports parallel processing, in which the GAs procedure can be run on several connected processors simultaneously.

  5. A UNIX-based prototype biomedical virtual image processor

    International Nuclear Information System (INIS)

    Fahy, J.B.; Kim, Y.

    1987-01-01

    The authors have developed a multiprocess virtual image processor for the IBM PC/AT, in order to maximize image processing software portability for biomedical applications. An interprocess communication scheme, based on two-way metacode exchange, has been developed and verified for this purpose. Application programs call a device-independent image processing library, which transfers commands over a shared data bridge to one or more Autonomous Virtual Image Processors (AVIP). Each AVIP runs as a separate process in the UNIX operating system, and implements the device-independent functions on the image processor to which it corresponds. Application programs can control multiple image processors at a time, change the image processor configuration used at any time, and are completely portable among image processors for which an AVIP has been implemented. Run-time speeds have been found to be acceptable for higher level functions, although rather slow for lower level functions, owing to the overhead associated with sending commands and data over the shared data bridge

  6. A digital retina-like low-level vision processor.

    Science.gov (United States)

    Mertoguno, S; Bourbakis, N G

    2003-01-01

    This correspondence presents the basic design and the simulation of a low level multilayer vision processor that emulates to some degree the functional behavior of a human retina. This retina-like multilayer processor is the lower part of an autonomous self-organized vision system, called Kydon, that could be used on visually impaired people with a damaged visual cerebral cortex. The Kydon vision system, however, is not presented in this paper. The retina-like processor consists of four major layers, where each of them is an array processor based on hexagonal, autonomous processing elements that perform a certain set of low level vision tasks, such as smoothing and light adaptation, edge detection, segmentation, line recognition and region-graph generation. At each layer, the array processor is a 2D array of k/spl times/m hexagonal identical autonomous cells that simultaneously execute certain low level vision tasks. Thus, the hardware design and the simulation at the transistor level of the processing elements (PEs) of the retina-like processor and its simulated functionality with illustrative examples are provided in this paper.

  7. Air-Lubricated Thermal Processor For Dry Silver Film

    Science.gov (United States)

    Siryj, B. W.

    1980-09-01

    Since dry silver film is processed by heat, it may be viewed on a light table only seconds after exposure. On the other hand, wet films require both bulky chemicals and substantial time before an image can be analyzed. Processing of dry silver film, although simple in concept, is not so simple when reduced to practice. The main concern is the effect of film temperature gradients on uniformity of optical film density. RCA has developed two thermal processors, different in implementation but based on the same philosophy. Pressurized air is directed to both sides of the film to support the film and to conduct the heat to the film. Porous graphite is used as the medium through which heat and air are introduced. The initial thermal processor was designed to process 9.5-inch-wide film moving at speeds ranging from 0.0034 to 0.008 inch per second. The processor configuration was curved to match the plane generated by the laser recording beam. The second thermal processor was configured to process 5-inch-wide film moving at a continuously variable rate ranging from 0.15 to 3.5 inches per second. Due to field flattening optics used in this laser recorder, the required film processing area was plane. In addition, this processor was sectioned in the direction of film motion, giving the processor the capability of varying both temperature and effective processing area.

  8. Performance analysis of general purpose and digital signal processor kernels for heterogeneous systems-on-chip

    Directory of Open Access Journals (Sweden)

    T. von Sydow

    2003-01-01

    Full Text Available Various reasons like technology progress, flexibility demands, shortened product cycle time and shortened time to market have brought up the possibility and necessity to integrate different architecture blocks on one heterogeneous System-on-Chip (SoC. Architecture blocks like programmable processor cores (DSP- and GPP-kernels, embedded FPGAs as well as dedicated macros will be integral parts of such a SoC. Especially programmable architecture blocks and associated optimization techniques are discussed in this contribution. Design space exploration and thus the choice which architecture blocks should be integrated in a SoC is a challenging task. Crucial to this exploration is the evaluation of the application domain characteristics and the costs caused by individual architecture blocks integrated on a SoC. An ATE-cost function has been applied to examine the performance of the aforementioned programmable architecture blocks. Therefore, representative discrete devices have been analyzed. Furthermore, several architecture dependent optimization steps and their effects on the cost ratios are presented.

  9. FIRINPC and FIRACPC graphics post-processor support user's guide and programmer's reference

    International Nuclear Information System (INIS)

    Hensel, E.

    1992-03-01

    FIRIN is a computer program used by DOE fire protection engineers to simulate hypothetical fire accidents in compartments at DOE facilities. The FIRIN code is typically used in conjunction with a ventilation system code such as FIRAC, which models the impact of the fire compartment upon the rest of the system. The code described here, FIRINPC is a PC based implementation of the full mainframe code FIRIN. In addition, FIRINPC contains graphics support for monitoring the progress of the simulation during execution and for reviewing the complete results of the simulation upon completion of the run. This document describes how to install, test, and subsequently use the code FIRINPC, and addresses differences in usage between the PC version of the code and its mainframe predecessor. The PC version contains all of the modeling capabilities of the earlier version, with additional graphics support. This user's guide is a supplement to the original FIRIN report published by the NRC. FIRAC is a computer program used by DOE fire protection engineers to simulate the transient response of complete ventilation system to fire induced transients. FIRAC has the ability to use the FIRIN code as the driving function or source term for the ventilation system response. The current version of FIRAC does not contain interactive graphics capabilities. A third program, called POST, is made available for reviewing the results of a previous FIRIN or FIRAC simulation, without having to recompute the numerical simulation. POST uses the output data files created by FIRINPC and FIRACPC to avoid recomputation

  10. Real time image synthesis on a SIMD linear array processor: algorithms and architectures

    International Nuclear Information System (INIS)

    Letellier, Laurent

    1993-01-01

    Nowadays, image synthesis has become a widely used technique. The impressive computing power required for real time applications necessitates the use of parallel architectures. In this context, we evaluate an SIMD linear parallel architecture, SYMPATI2, dedicated to image processing. The objective of this study is to propose a cost-effective graphics accelerator relying on SYMPATI2's modular and programmable structure. The parallelization of basic image synthesis algorithms on SYMPATI2 enables us to determine its limits in this application field. These limits lead us to evaluate a new structure with a fast intercommunication network between processors, but processors have to support the message consistency, which brings about a strong decrease in performance. To solve this problem, we suggest a simple network whose access priorities are represented by tokens. The simulations of this new architecture indicate that the SIMD mode causes a drastic cut in parallelism. To cope with this drawback, we propose a context switching procedure which reduces the SIMD rigidity and increases the parallelism rate significantly. Then, the graphics accelerator we propose is compared with existing graphics workstations. This comparison indicates that our structure, which is able to accelerate both image synthesis and image processing, is competitive and well-suited for multimedia applications. (author) [fr

  11. The TIGER trigger processor for the CAMERA detector at COMPASS-II

    Energy Technology Data Exchange (ETDEWEB)

    Baumann, Tobias; Buechele, Maximilian; Fischer, Horst; Gorzellik, Matthias; Grussenmeyer, Tobias; Herrmann, Florian; Joerg, Philipp; Kremser, Paul; Kunz, Tobias; Michalski, Christoph; Schopferer, Sebastian; Szameitat, Tobias [Physikalisches Institut der Universitaet Freiburg, Freiburg im Breisgau (Germany)

    2013-07-01

    In today's nuclear and high-energy physics experiments the background-induced occupancy of the detector channels can be quite high; therefore it is important to have sophisticated trigger subsystems which process the data in real-time to generate trigger objects for the global trigger decision. In this work we present a FPGA based low-latency trigger processor for the COMPASS-II experiment. TIGER is a high-performance trigger processor that was developed to fit perfectly in the GANDALF framework and extend its versatility. It is designed as a VXS module and is allocated to the central VXS switch slot, which has a direct link from every payload slot. The synchronous transfer protocol was optimized for low latencies and offers a bandwidth of up to 8 Gbit/s per link. The centerpiece of the board is a Xilinx Virtex-6 SX315T FPGA, offering vast programmable logic, embedded memory and DSP resources. It is accompanied by DDR3 memory, a COM Express CPU and a MXM GPU. Besides the VXS backplane ports, the board features two SFP+ transceivers, 32 LVDS inputs and 32 LVDS outputs to interface with the global trigger system and a Gigabit Ethernet port for configuration and monitoring.

  12. Advanced control system for the Integral Fast Reactor fuel pin processor

    International Nuclear Information System (INIS)

    Lau, L.D.; Randall, P.F.; Benedict, R.W.; Levinskas, D.

    1993-01-01

    A computerized control system has been developed for the remotely-operated fuel pin processor used in the Integral Fast Reactor Program, Fuel Cycle Facility (FCF). The pin processor remotely shears cast EBR- reactor fuel pins to length, inspects them for diameter, straightness, length, and weight, and then inserts acceptable pins into new sodium-loaded stainless-steel fuel element jackets. Two main components comprise the control system: (1) a programmable logic controller (PLC), together with various input/output modules and associated relay ladder-logic associated computer software. The PLC system controls the remote operation of the machine as directed by the OCS, and also monitors the machine operation to make operational data available to the OCS. The OCS allows operator control of the machine, provides nearly real-time viewing of the operational data, allows on-line changes of machine operational parameters, and records the collected data for each acceptable pin on a central data archiving computer. The two main components of the control system provide the operator with various levels of control ranging from manual operation to completely automatic operation by means of a graphic touch screen interface

  13. Design and evaluation of an architecture for a digital signal processor for instrumentation applications

    Science.gov (United States)

    Fellman, Ronald D.; Kaneshiro, Ronald T.; Konstantinides, Konstantinos

    1990-03-01

    The authors present the design and evaluation of an architecture for a monolithic, programmable, floating-point digital signal processor (DSP) for instrumentation applications. An investigation of the most commonly used algorithms in instrumentation led to a design that satisfies the requirements for high computational and I/O (input/output) throughput. In the arithmetic unit, a 16- x 16-bit multiplier and a 32-bit accumulator provide the capability for single-cycle multiply/accumulate operations, and three format adjusters automatically adjust the data format for increased accuracy and dynamic range. An on-chip I/O unit is capable of handling data block transfers through a direct memory access port and real-time data streams through a pair of parallel I/O ports. I/O operations and program execution are performed in parallel. In addition, the processor includes two data memories with independent addressing units, a microsequencer with instruction RAM, and multiplexers for internal data redirection. The authors also present the structure and implementation of a design environment suitable for the algorithmic, behavioral, and timing simulation of a complete DSP system. Various benchmarking results are reported.

  14. The ALTRO Chip A 16-channel A/D Converter and Digital Processor for Gas Detectors

    CERN Document Server

    Esteve-Bosch, R; Mota, B; Musa, L

    2003-01-01

    The ALTRO (ALICE TPC Read Out) chip is a mixed-signal integrated circuit designed to be one of the building blocks of the readout electronics for gas detectors. Originally conceived and optimised for the Time Projection Chamber (TPC) of the ALICE experiment at the CERN LHC, its architecture and programmability makes it suitable for the readout of a wider class of gas detectors. In one single chip, the analogue signals from 16 channels are digitised, processed, compressed and stored in a multi-acquisition memory. The Analogue-to- Digital converters embedded in the chip have a 10-bit dynamic range and a maximum sampling rate in the range of 20 to 40MHz. After digitisation, a pipelined hardwired Processor is able to remove from the input signal a wide range of systematic and non-systematic perturbations, related to the non-ideal behaviour of the detector, temperature variation of the electronics, environmental noise, etc. Moreover, the Processor is able to suppress the signal tail within 1mus after the pulse pea...

  15. An integrated processor for photonic quantum states using a broadband light–matter interface

    International Nuclear Information System (INIS)

    Saglamyurek, E; Sinclair, N; Slater, J A; Heshami, K; Oblak, D; Tittel, W

    2014-01-01

    Faithful storage and coherent manipulation of quantum optical pulses are key for long distance quantum communications and quantum computing. Combining these functions in a light–matter interface that can be integrated on-chip with other photonic quantum technologies, e.g. sources of entangled photons, is an important step towards these applications. To date there have only been a few demonstrations of coherent pulse manipulation utilizing optical storage devices compatible with quantum states, and that only in atomic gas media (making integration difficult) and with limited capabilities. Here we describe how a broadband waveguide quantum memory based on the atomic frequency comb (AFC) protocol can be used as a programmable processor for essentially arbitrary spectral and temporal manipulations of individual quantum optical pulses. Using weak coherent optical pulses at the few photon level, we experimentally demonstrate sequencing, time-to-frequency multiplexing and demultiplexing, splitting, interfering, temporal and spectral filtering, compressing and stretching as well as selective delaying. Our integrated light–matter interface offers high-rate, robust and easily configurable manipulation of quantum optical pulses and brings fully practical optical quantum devices one step closer to reality. Furthermore, as the AFC protocol is suitable for storage of intense light pulses, our processor may also find applications in classical communications. (paper)

  16. Norwegian mastitis control programme

    Directory of Open Access Journals (Sweden)

    Østerås O

    2009-04-01

    Full Text Available Abstract This paper describes the methods and results of the Norwegian Mastitis Control Program implemented in 1982. The program has formed an integral part of the Norwegian Cattle Health Services (NCHS since 1995. The NCHS also have specific programs for milk fever, ketosis, reproduction and calf diseases. The goal of the program is to improve udder health by keeping the bulk milk somatic cell count (BMSCC low, to reduce the use of antibiotics, to keep the cost of mastitis low at herd level and improve the consumers' attitude to milk products. In 1996, a decision was made to reduce the use of antibiotics in all animal production enterprises in Norway by 25% within five years. Relevant data has been collected through the Norwegian Cattle Herd Recording System (NCHRS; including health records since 1975 and somatic cell count (SCC data since 1980. These data have been integrated within the NCHRS. Since 2000, mastitis laboratory data have also been included in the NCHRS. Data on clinical disease, SCC and mastitis bacteriology have been presented to farmers and advisors in monthly health periodicals since 1996, and on the internet since 2005. In 1996, Norwegian recommendations on the treatment of mastitis were implemented. Optimal milking protocols and milking machine function have been emphasised and less emphasis has been placed on dry cow therapy. A selective dry cow therapy program (SDCTP was implemented in 2006, and is still being implemented in new areas. Research demonstrates that the rate of clinical mastitis could be reduced by 15% after implementing SDCTP. The results so far show a 60% reduction in the clinical treatment of mastitis between 1994 and 2007, a reduction in BMSCC from 250,000 cells/ml to 114,000 cells/ml, and a total reduction in the mastitis cost from 0.23 NOK to 0.13 NOK per litre of milk delivered to the processors, corresponding to a fall from 9.2% to 1.7% of the milk price, respectively. This reduction is attributed to

  17. Norwegian mastitis control programme

    Science.gov (United States)

    2009-01-01

    This paper describes the methods and results of the Norwegian Mastitis Control Program implemented in 1982. The program has formed an integral part of the Norwegian Cattle Health Services (NCHS) since 1995. The NCHS also have specific programs for milk fever, ketosis, reproduction and calf diseases. The goal of the program is to improve udder health by keeping the bulk milk somatic cell count (BMSCC) low, to reduce the use of antibiotics, to keep the cost of mastitis low at herd level and improve the consumers' attitude to milk products. In 1996, a decision was made to reduce the use of antibiotics in all animal production enterprises in Norway by 25% within five years. Relevant data has been collected through the Norwegian Cattle Herd Recording System (NCHRS); including health records since 1975 and somatic cell count (SCC) data since 1980. These data have been integrated within the NCHRS. Since 2000, mastitis laboratory data have also been included in the NCHRS. Data on clinical disease, SCC and mastitis bacteriology have been presented to farmers and advisors in monthly health periodicals since 1996, and on the internet since 2005. In 1996, Norwegian recommendations on the treatment of mastitis were implemented. Optimal milking protocols and milking machine function have been emphasised and less emphasis has been placed on dry cow therapy. A selective dry cow therapy program (SDCTP) was implemented in 2006, and is still being implemented in new areas. Research demonstrates that the rate of clinical mastitis could be reduced by 15% after implementing SDCTP. The results so far show a 60% reduction in the clinical treatment of mastitis between 1994 and 2007, a reduction in BMSCC from 250,000 cells/ml to 114,000 cells/ml, and a total reduction in the mastitis cost from 0.23 NOK to 0.13 NOK per litre of milk delivered to the processors, corresponding to a fall from 9.2% to 1.7% of the milk price, respectively. This reduction is attributed to changes in attitude and

  18. High-speed special-purpose processor for event selection by number of direct tracks

    International Nuclear Information System (INIS)

    Kalinnikov, V.A.; Krastev, V.R.; Chudakov, E.A.

    1986-01-01

    A processor which uses data on events from five detector planes is described. To increase economy and speed in parallel processing, the processor converts the input data to superposition code and recognizes tracks by a generated search mask. The resolving time of the processor is ≤300 nsec. The processor is CAMAC-compatible and uses ECL integrated circuits

  19. Microfluidic production of polymeric functional microparticles

    Science.gov (United States)

    Jiang, Kunqiang

    This dissertation focuses on applying droplet-based microfluidics to fabricate new classes of polymeric microparticles with customized properties for various applications. The integration of microfluidic techniques with microparticle engineering allows for unprecedented control over particle size, shape, and functional properties. Specifically, three types of microparticles are discussed here: (1) Magnetic and fluorescent chitosan hydrogel microparticles and their in-situ assembly into higher-order microstructures; (2) Polydimethylsiloxane (PDMS) microbeads with phosphorescent properties for oxygen sensing; (3) Macroporous microparticles as biological immunosensors. First, we describe a microfluidic approach to generate monodisperse chitosan hydrogel microparticles that can be further connected in-situ into higher-order microstructures. Microparticles of the biopolymer chitosan are created continuously by contacting an aqueous solution of chitosan at a microfluidic T-junction with a stream of hexadecane containing a nonionic detergent, followed by downstream crosslinking of the generated droplets by a ternary flow of glutaraldehyde. Functional properties of the microparticles can be easily varied by introducing payloads such as magnetic nanoparticles and/or fluorescent dyes into the chitosan solution. We then use these prepared microparticles as "building blocks" and assemble them into high ordered microstructures, i.e. microchains with controlled geometry and flexibility. Next, we describe a new approach to produce monodisperse microbeads of PDMS using microfluidics. Using a flow-focusing configuration, a PDMS precursor solution is dispersed into microdroplets within an aqueous continuous phase. These droplets are collected and thermally cured off-chip into soft, solid microbeads. In addition, our technique allows for direct integration of payloads, such as an oxygen-sensitive porphyrin dye, into the PDMS microbeads. We then show that the resulting dye

  20. Advanced combinational microfluidic multiplexer for fuel cell reactors

    International Nuclear Information System (INIS)

    Lee, D W; Kim, Y; Cho, Y-H; Doh, I

    2013-01-01

    An advanced combinational microfluidic multiplexer capable to address multiple fluidic channels for fuel cell reactors is proposed. Using only 4 control lines and two different levels of control pressures, the proposed multiplexer addresses up to 19 fluidic channels, at least two times larger than the previous microfluidic multiplexers. The present multiplexer providing high control efficiency and simple structure for channel addressing would be used in the application areas of the integrated microfluidic systems such as fuel cell reactors and dynamic pressure generators

  1. Compilation and Synthesis for Fault-Tolerant Digital Microfluidic Biochips

    DEFF Research Database (Denmark)

    Alistar, Mirela

    Microfluidic-based biochips are replacing the conventional biochemical analyzers, by integrating all the necessary functions for biochemical analysis using microfluidics. The digital microfluidic biochips (DMBs) manipulate discrete amounts of fluids of nanoliter volume, named droplets, on an array...... of the operations in the application. During the execution of a bioassay, operations could experience transient faults, thus impacting negatively the correctness of the application. We have proposed both offline (design time) and online (runtime) recovery strategies. The online recovery strategy decides...

  2. Digital microfluidic processing of mammalian embryos for vitrification.

    Directory of Open Access Journals (Sweden)

    Derek G Pyne

    Full Text Available Cryopreservation is a key technology in biology and clinical practice. This paper presents a digital microfluidic device that automates sample preparation for mammalian embryo vitrification. Individual micro droplets manipulated on the microfluidic device were used as micro-vessels to transport a single mouse embryo through a complete vitrification procedure. Advantages of this approach, compared to manual operation and channel-based microfluidic vitrification, include automated operation, cryoprotectant concentration gradient generation, and feasibility of loading and retrieval of embryos.

  3. "Connecting worlds - a view on microfluidics for a wider application".

    Science.gov (United States)

    Fernandes, Ana C; Gernaey, Krist V; Krühne, Ulrich

    From its birth, microfluidics has been referenced as a revolutionary technology and the solution to long standing technological and sociological issues, such as detection of dilute compounds and personalized healthcare. Microfluidics has for example been envisioned as: (1) being capable of miniaturizing industrial production plants, thereby increasing their automation and operational safety at low cost; (2) being able to identify rare diseases by running bioanalytics directly on the patient's skin; (3) allowing health diagnostics in point-of-care sites through cheap lab-on-a-chip devices. However, the current state of microfluidics, although technologically advanced, has so far failed to reach the originally promised widespread use. In this paper, some of the aspects are identified and discussed that have prevented microfluidics from reaching its full potential, especially in the chemical engineering and biotechnology fields, focusing mainly on the specialization on a single target of most microfluidic devices and offering a perspective on the alternate, multi-use, "plug and play" approach. Increasing the flexibility of microfluidic platforms, by increasing their compatibility with different substrates, reactions and operation conditions, and other microfluidic systems is indeed of surmount importance and current academic and industrial approaches to modular microfluidics are presented. Furthermore, two views on the commercialization of plug-and-play microfluidics systems, leading towards improved acceptance and more widespread use, are introduced. A brief review of the main materials and fabrication strategies used in these fields, is also presented. Finally, a step-wise guide towards the development of microfluidic systems is introduced with special focus on the integration of sensors in microfluidics. The proposed guidelines are then applied for the development of two different example platforms, and to three examples taken from literature. With this work, we

  4. National programme: Finland

    International Nuclear Information System (INIS)

    Forsten, J.

    1986-01-01

    Finland's programmes in the field of reactor pressure components are presented in this paper. The following information on each of these programmes is given: the brief description of the programme; the programme's schedule and duration; the name of the project manager

  5. Optimizing Vector-Quantization Processor Architecture for Intelligent Query-Search Applications

    Science.gov (United States)

    Xu, Huaiyu; Mita, Yoshio; Shibata, Tadashi

    2002-04-01

    The architecture of a very large scale integration (VLSI) vector-quantization processor (VQP) has been optimized to develop a general-purpose intelligent query-search agent. The agent performs a similarity-based search in a large-volume database. Although similarity-based search processing is computationally very expensive, latency-free searches have become possible due to the highly parallel maximum-likelihood search architecture of the VQP chip. Three architectures of the VQP chip have been studied and their performances are compared. In order to give reasonable searching results according to the different policies, the concept of penalty function has been introduced into the VQP. An E-commerce real-estate agency system has been developed using the VQP chip implemented in a field-programmable gate array (FPGA) and the effectiveness of such an agency system has been demonstrated.

  6. Environment of symbolic and graphic programming for the SYMPATI-2 line processor

    International Nuclear Information System (INIS)

    Fernandez, Pascal

    1991-01-01

    This research thesis reports the development of a programming environment which can be easily used at all levels of development of an application in the field of image processing. The author first presents different programming environments by distinguishing, on the one hand, languages or environments which are not specific to a machine, and, on the other hand, languages or environments which are dedicated to a specialised parallel architecture. Then, after a recall of the structure of the line processor from an operational point of view, the author proposes a detailed presentation of the 4LP language, i.e. the layer 0 of the environment. The three other layers are then presented. They respectively comprise a high level symbolic language, a user-friendly and interactive graphic tool, and an interactive graphic tool for the development of applications from programme icons

  7. A multi-scale PDMS fabrication strategy to bridge the size mismatch between integrated circuits and microfluidics.

    Science.gov (United States)

    Muluneh, Melaku; Issadore, David

    2014-12-07

    In recent years there has been great progress harnessing the small-feature size and programmability of integrated circuits (ICs) for biological applications, by building microfluidics directly on top of ICs. However, a major hurdle to the further development of this technology is the inherent size-mismatch between ICs (~mm) and microfluidic chips (~cm). Increasing the area of the ICs to match the size of the microfluidic chip, as has often been done in previous studies, leads to a waste of valuable space on the IC and an increase in fabrication cost (>100×). To address this challenge, we have developed a three dimensional PDMS chip that can straddle multiple length scales of hybrid IC/microfluidic chips. This approach allows millimeter-scale ICs, with no post-processing, to be integrated into a centimeter-sized PDMS chip. To fabricate this PDMS chip we use a combination of soft-lithography and laser micromachining. Soft lithography was used to define micrometer-scale fluid channels directly on the surface of the IC, allowing fluid to be controlled with high accuracy and brought into close proximity to sensors for highly sensitive measurements. Laser micromachining was used to create ~50 μm vias to connect these molded PDMS channels to a larger PDMS chip, which can connect multiple ICs and house fluid connections to the outside world. To demonstrate the utility of this approach, we built and demonstrated an in-flow magnetic cytometer that consisted of a 5 × 5 cm(2) microfluidic chip that incorporated a commercial 565 × 1145 μm(2) IC with a GMR sensing circuit. We additionally demonstrated the modularity of this approach by building a chip that incorporated two of these GMR chips connected in series.

  8. Optical manipulation with two beam traps in microfluidic polymer systems

    DEFF Research Database (Denmark)

    Khoury Arvelo, Maria; Matteucci, Marco; Sørensen, Kristian Tølbøl

    2015-01-01

    An optical trapping system with two opposing laser beams, also known as the optical stretcher, are naturally constructed inside a microfluidic lab-on-chip system. We present and compare two approaches to combine a simple microfluidic system with either waveguides directly written in the microflui......An optical trapping system with two opposing laser beams, also known as the optical stretcher, are naturally constructed inside a microfluidic lab-on-chip system. We present and compare two approaches to combine a simple microfluidic system with either waveguides directly written...

  9. Reversible Control of Anisotropic Electrical Conductivity using Colloidal Microfluidic Networks

    National Research Council Canada - National Science Library

    Beskok, Ali; Bevan, Michael; Lagoudas, Dimitris; Ounaies, Zoubeida; Bahukudumbi, Pradipkumar; Everett, William

    2007-01-01

    This research addresses the tunable assembly of reversible colloidal structures within microfluidic networks to engineer multifunctional materials that exhibit a wide range of electrical properties...

  10. Microfabrication and Applications of Opto-Microfluidic Sensors

    Science.gov (United States)

    Zhang, Daiying; Men, Liqiu; Chen, Qiying

    2011-01-01

    A review of research activities on opto-microfluidic sensors carried out by the research groups in Canada is presented. After a brief introduction of this exciting research field, detailed discussion is focused on different techniques for the fabrication of opto-microfluidic sensors, and various applications of these devices for bioanalysis, chemical detection, and optical measurement. Our current research on femtosecond laser microfabrication of optofluidic devices is introduced and some experimental results are elaborated. The research on opto-microfluidics provides highly sensitive opto-microfluidic sensors for practical applications with significant advantages of portability, efficiency, sensitivity, versatility, and low cost. PMID:22163904

  11. THOR Fields and Wave Processor - FWP

    Science.gov (United States)

    Soucek, Jan; Rothkaehl, Hanna; Ahlen, Lennart; Balikhin, Michael; Carr, Christopher; Dekkali, Moustapha; Khotyaintsev, Yuri; Lan, Radek; Magnes, Werner; Morawski, Marek; Nakamura, Rumi; Uhlir, Ludek; Yearby, Keith; Winkler, Marek; Zaslavsky, Arnaud

    2017-04-01

    If selected, Turbulence Heating ObserveR (THOR) will become the first spacecraft mission dedicated to the study of plasma turbulence. The Fields and Waves Processor (FWP) is an integrated electronics unit for all electromagnetic field measurements performed by THOR. FWP will interface with all THOR fields sensors: electric field antennas of the EFI instrument, the MAG fluxgate magnetometer, and search-coil magnetometer (SCM), and perform signal digitization and on-board data processing. FWP box will house multiple data acquisition sub-units and signal analyzers all sharing a common power supply and data processing unit and thus a single data and power interface to the spacecraft. Integrating all the electromagnetic field measurements in a single unit will improve the consistency of field measurement and accuracy of time synchronization. The scientific value of highly sensitive electric and magnetic field measurements in space has been demonstrated by Cluster (among other spacecraft) and THOR instrumentation will further improve on this heritage. Large dynamic range of the instruments will be complemented by a thorough electromagnetic cleanliness program, which will prevent perturbation of field measurements by interference from payload and platform subsystems. Taking advantage of the capabilities of modern electronics and the large telemetry bandwidth of THOR, FWP will provide multi-component electromagnetic field waveforms and spectral data products at a high time resolution. Fully synchronized sampling of many signals will allow to resolve wave phase information and estimate wavelength via interferometric correlations between EFI probes. FWP will also implement a plasma resonance sounder and a digital plasma quasi-thermal noise analyzer designed to provide high cadence measurements of plasma density and temperature complementary to data from particle instruments. FWP will rapidly transmit information about magnetic field vector and spacecraft potential to the

  12. Nanoplasmonic and Microfluidic Devices for Biological Sensing

    KAUST Repository

    Perozziello, G.

    2017-02-16

    In this chapter we report about recent advances on the development and application of 2D and 3D plasmonic nanostructures used for sensing of biological samples by Raman spectroscopy at unprecedented resolution of analysis. Besides, we explain how the integration of these nanodevices in a microfluidic apparatus can simplify the analysis of biological samples. In the first part we introduce and motivate the convenience of using nanoplasmonic enhancers and Raman spectroscopy for biological sensing, describing the phenomena and the current approaches to fabricate nanoplasmonic structures. In the second part, we explain how specific multi-element devices produce the optimal enhancement of the Raman scattering. We report cases where biological sensing of DNA was performed at few molecules level with nanometer spatial resolutions. Finally, we show an example of microfluidic device integrating plasmonic nanodevices to sort and drive biological samples, like living cells, towards the optical probe in order to obtain optimal conditions of analysis.

  13. Microfluidics expanding the frontiers of microbial ecology.

    Science.gov (United States)

    Rusconi, Roberto; Garren, Melissa; Stocker, Roman

    2014-01-01

    Microfluidics has significantly contributed to the expansion of the frontiers of microbial ecology over the past decade by allowing researchers to observe the behaviors of microbes in highly controlled microenvironments, across scales from a single cell to mixed communities. Spatially and temporally varying distributions of organisms and chemical cues that mimic natural microbial habitats can now be established by exploiting physics at the micrometer scale and by incorporating structures with specific geometries and materials. In this article, we review applications of microfluidics that have resulted in insightful discoveries on fundamental aspects of microbial life, ranging from growth and sensing to cell-cell interactions and population dynamics. We anticipate that this flexible multidisciplinary technology will continue to facilitate discoveries regarding the ecology of microorganisms and help uncover strategies to control microbial processes such as biofilm formation and antibiotic resistance.

  14. Nanoplasmonic and Microfluidic Devices for Biological Sensing

    KAUST Repository

    Perozziello, G.; Giugni, Andrea; Allione, Marco; Torre, Bruno; Das, Gobind; Coluccio, M. L.; Marini, Monica; Tirinato, Luca; Moretti, Manola; Limongi, Tania; Candeloro, P.; Di Fabrizio, Enzo M.

    2017-01-01

    In this chapter we report about recent advances on the development and application of 2D and 3D plasmonic nanostructures used for sensing of biological samples by Raman spectroscopy at unprecedented resolution of analysis. Besides, we explain how the integration of these nanodevices in a microfluidic apparatus can simplify the analysis of biological samples. In the first part we introduce and motivate the convenience of using nanoplasmonic enhancers and Raman spectroscopy for biological sensing, describing the phenomena and the current approaches to fabricate nanoplasmonic structures. In the second part, we explain how specific multi-element devices produce the optimal enhancement of the Raman scattering. We report cases where biological sensing of DNA was performed at few molecules level with nanometer spatial resolutions. Finally, we show an example of microfluidic device integrating plasmonic nanodevices to sort and drive biological samples, like living cells, towards the optical probe in order to obtain optimal conditions of analysis.

  15. Microfluidic PMMA interfaces for rectangular glass capillaries

    International Nuclear Information System (INIS)

    Evander, Mikael; Tenje, Maria

    2014-01-01

    We present the design and fabrication of a polymeric capillary fluidic interface fabricated by micro-milling. The design enables the use of glass capillaries with any kind of cross-section in complex microfluidic setups. We demonstrate two different designs of the interface; a double-inlet interface for hydrodynamic focusing and a capillary interface with integrated pneumatic valves. Both capillary interfaces are presented together with examples of practical applications. This communication shows the design optimization and presents details of the fabrication process. The capillary interface opens up for the use of complex microfluidic systems in single-use glass capillaries. They also enable simple fabrication of glass/polymer hybrid devices that can be beneficial in many research fields where a pure polymer chip negatively affects the device's performance, e.g. acoustofluidics. (technical note)

  16. Research highlights: microfluidics meets big data.

    Science.gov (United States)

    Tseng, Peter; Weaver, Westbrook M; Masaeli, Mahdokht; Owsley, Keegan; Di Carlo, Dino

    2014-03-07

    In this issue we highlight a collection of recent work in which microfluidic parallelization and automation have been employed to address the increasing need for large amounts of quantitative data concerning cellular function--from correlating microRNA levels to protein expression, increasing the throughput and reducing the noise when studying protein dynamics in single-cells, and understanding how signal dynamics encodes information. The painstaking dissection of cellular pathways one protein at a time appears to be coming to an end, leading to more rapid discoveries which will inevitably translate to better cellular control--in producing useful gene products and treating disease at the individual cell level. From these studies it is also clear that development of large scale mutant or fusion libraries, automation of microscopy, image analysis, and data extraction will be key components as microfluidics contributes its strengths to aid systems biology moving forward.

  17. Microfluidic chip-capillary electrophoresis devices

    CERN Document Server

    Fung, Ying Sing; Du, Fuying; Guo, Wenpeng; Ma, Tongmei; Nie, Zhou; Sun, Hui; Wu, Ruige; Zhao, Wenfeng

    2015-01-01

    Capillary electrophoresis (CE) and microfluidic chip (MC) devices are relatively mature technologies, but this book demonstrates how they can be integrated into a single, revolutionary device that can provide on-site analysis of samples when laboratory services are unavailable. By introducing the combination of CE and MC technology, Microfluidic Chip-Capillary Electrophoresis Devices broadens the scope of chemical analysis, particularly in the biomedical, food, and environmental sciences. The book gives an overview of the development of MC and CE technology as well as technology that now allows for the fabrication of MC-CE devices. It describes the operating principles that make integration possible and illustrates some achievements already made by the application of MC-CE devices in hospitals, clinics, food safety, and environmental research. The authors envision further applications for private and public use once the proof-of-concept stage has been passed and obstacles to increased commercialization are ad...

  18. Microfluidic Scintillation Detectors for High Energy Physics

    CERN Document Server

    Maoddi, Pietro; Mapelli, Alessandro

    This thesis deals with the development and study of microfluidic scintillation detectors, a technology of recent introduction for the detection of high energy particles. Most of the interest for such devices comes from the use of a liquid scintillator, which entails the possibility of changing the active material in the detector, leading to increased radiation resistance. A first part of the thesis focuses on the work performed in terms of design and modelling studies of novel prototype devices, hinting to new possibilities and applications. In this framework, the simulations performed to validate selected designs and the main technological choices made in view of their fabrication are addressed. The second part of this thesis deals with the microfabrication of several prototype devices. Two different materials were studied for the manufacturing of microfluidic scintillation detectors, namely the SU-8 photosensitive epoxy and monocrystalline silicon. For what concerns the former, an original fabrication appro...

  19. Performance of Artificial Intelligence Workloads on the Intel Core 2 Duo Series Desktop Processors

    OpenAIRE

    Abdul Kareem PARCHUR; Kuppangari Krishna RAO; Fazal NOORBASHA; Ram Asaray SINGH

    2010-01-01

    As the processor architecture becomes more advanced, Intel introduced its Intel Core 2 Duo series processors. Performance impact on Intel Core 2 Duo processors are analyzed using SPEC CPU INT 2006 performance numbers. This paper studied the behavior of Artificial Intelligence (AI) benchmarks on Intel Core 2 Duo series processors. Moreover, we estimated the task completion time (TCT) @1 GHz, @2 GHz and @3 GHz Intel Core 2 Duo series processors frequency. Our results show the performance scalab...

  20. Digital signal processor for silicon audio playback devices; Silicon audio saisei kikiyo digital signal processor

    Energy Technology Data Exchange (ETDEWEB)

    NONE

    2000-03-01

    The digital audio signal processor (DSP) TC9446F series has been developed silicon audio playback devices with a memory medium of, e.g., flash memory, DVD players, and AV devices, e.g., TV sets. It corresponds to AAC (advanced audio coding) (2ch) and MP3 (MPEG1 Layer3), as the audio compressing techniques being used for transmitting music through an internet. It also corresponds to compressed types, e.g., Dolby Digital, DTS (digital theater system) and MPEG2 audio, being adopted for, e.g., DVDs. It can carry a built-in audio signal processing program, e.g., Dolby ProLogic, equalizer, sound field controlling, and 3D sound. TC9446XB has been lined up anew. It adopts an FBGA (fine pitch ball grid array) package for portable audio devices. (translated by NEDO)