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Sample records for programmable chip sopc

  1. SAD-Based Stereo Vision Machine on a System-on-Programmable-Chip (SoPC)

    Science.gov (United States)

    Zhang, Xiang; Chen, Zhangwei

    2013-01-01

    This paper, proposes a novel solution for a stereo vision machine based on the System-on-Programmable-Chip (SoPC) architecture. The SOPC technology provides great convenience for accessing many hardware devices such as DDRII, SSRAM, Flash, etc., by IP reuse. The system hardware is implemented in a single FPGA chip involving a 32-bit Nios II microprocessor, which is a configurable soft IP core in charge of managing the image buffer and users' configuration data. The Sum of Absolute Differences (SAD) algorithm is used for dense disparity map computation. The circuits of the algorithmic module are modeled by the Matlab-based DSP Builder. With a set of configuration interfaces, the machine can process many different sizes of stereo pair images. The maximum image size is up to 512 K pixels. This machine is designed to focus on real time stereo vision applications. The stereo vision machine offers good performance and high efficiency in real time. Considering a hardware FPGA clock of 90 MHz, 23 frames of 640 × 480 disparity maps can be obtained in one second with 5 × 5 matching window and maximum 64 disparity pixels. PMID:23459385

  2. Development of a synchrotron timing system on a programmable chip

    International Nuclear Information System (INIS)

    Lin Feiyu; Qiao Weimin; Wang Yanyu; Guo Yuhui

    2009-01-01

    A synchrotron requires extremely high time constraints for timing signals, so timing system is very important for a synchrotron control system. A FPGA+ARM+Linux+DSP architecture has been mainly used in timing control of the HIRFL-CSR control system. In this paper, we report the development of the SOPC(System On a Programmable Chip) based on FPGA and uClinux.It can integrate all the functions of ARM+Linux in one single FPGA chip, hence no need of the dedicated ARM chip, and the reduced cost. The maximum operation frequency of this system is 185 MHz. The hardware consumes less than 4% of total resources of FPGA chip. And both the hardware system and the operating system of the SOPC are reconfigurable. The SOPC system has a wide prospect of applications in accelerator engineering and many fields of scientific research. (authors)

  3. Embedded SoPC Design with Nios II Processor and Verilog Examples

    CERN Document Server

    Chu, Pong P

    2012-01-01

    Explores the unique hardware programmability of FPGA-based embedded systems, using a learn-by-doing approach to introduce the concepts and techniques for embedded SoPC design with Verilog An SoPC (system on a programmable chip) integrates a processor, memory modules, I/O peripherals, and custom hardware accelerators into a single FPGA (field-programmable gate array) device. In addition to the customized software, customized hardware can be developed and incorporated into the embedded system as well-allowing us to configure the soft-core processor, create tailored I/O interfaces, and develop s

  4. Research on NC motion controller based on SOPC technology

    Science.gov (United States)

    Jiang, Tingbiao; Meng, Biao

    2006-11-01

    With the rapid development of the digitization and informationization, the application of numerical control technology in the manufacturing industry becomes more and more important. However, the conventional numerical control system usually has some shortcomings such as the poor in system openness, character of real-time, cutability and reconfiguration. In order to solve these problems, this paper investigates the development prospect and advantage of the application in numerical control area with system-on-a-Programmable-Chip (SOPC) technology, and puts forward to a research program approach to the NC controller based on SOPC technology. Utilizing the characteristic of SOPC technology, we integrate high density logic device FPGA, memory SRAM, and embedded processor ARM into a single programmable logic device. We also combine the 32-bit RISC processor with high computing capability of the complicated algorithm with the FPGA device with strong motivable reconfiguration logic control ability. With these steps, we can greatly resolve the defect described in above existing numerical control systems. For the concrete implementation method, we use FPGA chip embedded with ARM hard nuclear processor to construct the control core of the motion controller. We also design the peripheral circuit of the controller according to the requirements of actual control functions, transplant real-time operating system into ARM, design the driver of the peripheral assisted chip, develop the application program to control and configuration of FPGA, design IP core of logic algorithm for various NC motion control to configured it into FPGA. The whole control system uses the concept of modular and structured design to develop hardware and software system. Thus the NC motion controller with the advantage of easily tailoring, highly opening, reconfigurable, and expandable can be implemented.

  5. The design of nuclear magnetic resonance programmable pulsed source based SOPC

    International Nuclear Information System (INIS)

    Zhang Qingshun; Zhang Yakun; Wang Wenli

    2012-01-01

    The design of pulse source in the equipment of pulsed Nuclear Magnetic Resonance is studied based on SOPC. The strong processing power of Nios Ⅱ embedded processor and the design flexibility of FPGA are fully used. The SOPC system is built. The overall design plan for the pulse source is described. The design of programmable multi-pulse generation logic user-defined components in the FPGA is introduced mainly. Part of the implementation program and the task logic simulation waveforms are presented. The pulse source has better application value because a clear, stable and good quality multi-pulse output waveform can be shown on the oscilloscope finally. The system software and hardware are easy to be modified and upgraded, meeting different application of pulsed NMR pulse sequence in variety of requirements. (authors)

  6. Communication system of LLRF based on SOPC of Nios Ⅱ softcore: design and performance

    International Nuclear Information System (INIS)

    Zhang He; Wang Fang; Qiu Feng; Wang Qunyao; Sha Peng

    2011-01-01

    DC-SC photocathode injector at Peking University and 9 cell superconducting cavity at Institute of High Energy Physics have both adopted digital LLRF control system, in which communication system based on STRATIX Ⅳ series FPGA development Kit. Through the System-on-a-Programmable-Chip (SOPC) technology and the development environment provided by NIOS Ⅱ IDE, It realized communication function with Tri-State Ethernet. The interface created by Labview has been used to set the parameters and get data. After repeating tests, the communication system has been running well all through. (authors)

  7. Design of reactor alarm instrument based on SOPC

    International Nuclear Information System (INIS)

    Li Meng; Lu Yi; Rong Ru

    2008-01-01

    The design of embedded alarm instrument in reactors based on Nios II CPU is introduced in this paper. This design uses the SOPC technology based on the Cyclone series FPGA as a digital bench, and connects the MPU and drivers and interface of times, RS232, sdram,and etc. into a FPGA chip. It is proved that the system achieves the design goals in primary experimentation. (authors)

  8. A System on a Programmable Chip Architecture for Data-Dependent Superimposed Training Channel Estimation

    Directory of Open Access Journals (Sweden)

    Fernando Martín del Campo

    2009-01-01

    with the information, a series of known symbols, whose analysis is used to define the parameters of the filters that remove the distortion of the data. Nevertheless, a part of the available bandwidth has to be destined to these symbols. Until now, no alternative solution has demonstrated to be fully satisfying for commercial use, but one technique that looks promising is superimposed training (ST. This work describes a hybrid software-hardware FPGA implementation of a recent algorithm that belongs to the ST family, known as Data-dependent Superimposed Training (DDST, which does not need extra bandwidth for its training sequences (TS as it adds them arithmetically to the data. DDST also adds a third sequence known as data-dependent sequence, that destroys the interference caused by the data over the TS. As DDST's computational burden is too high for the commercial processors used in mobile systems, a System on a Programmable Chip (SOPC approach is used in order to solve the problem.

  9. Convolutional Encoder and Viterbi Decoder Using SOPC For Variable Constraint Length

    DEFF Research Database (Denmark)

    Kulkarni, Anuradha; Dnyaneshwar, Mantri; Prasad, Neeli R.

    2013-01-01

    Convolution encoder and Viterbi decoder are the basic and important blocks in any Code Division Multiple Accesses (CDMA). They are widely used in communication system due to their error correcting capability But the performance degrades with variable constraint length. In this context to have...... detailed analysis, this paper deals with the implementation of convolution encoder and Viterbi decoder using system on programming chip (SOPC). It uses variable constraint length of 7, 8 and 9 bits for 1/2 and 1/3 code rates. By analyzing the Viterbi algorithm it is seen that our algorithm has a better...

  10. Design and implementation of embedded ion mobility spectrometry instrument based on SOPC

    Science.gov (United States)

    Zhang, Genwei; Zhao, Jiang; Yang, Liu; Liu, Bo; Jiang, Yanwei; Yang, Jie

    2015-02-01

    On the hardware platform with single CYCLONE IV FPGA Chip based on SOPC technology, the control functions of IP cores of a Ion Mobility Spectrometry instrument was tested, including 32 bit Nios II soft-core processor, high-voltage module, ion gate switch, gas flow, temperature and pressure sensors, signal acquisition and communication protocol. Embedded operating system μCLinux was successfully transplanted to the hardware platform, used to schedule all the tasks, such as system initialization, parameter setting, signal processing, recognition algorithm and results display. The system was validated using the IMS diagram of Acetone reagent, and the instrument was proved to have a strong signal resolution.

  11. Symmetric and Programmable Multi-Chip Module for Low-Power Prototyping System

    OpenAIRE

    Yen, Mao-Hsu; Chen, Sao-Jie; Lan, Sanko H.

    2001-01-01

    The advantages of a Multi-Chip Module (MCM) product are its low-power and small-size. But the design of an MCM system usually requires weeks of engineering effort, thus we need a generic MCM substrate with programmable interconnections to accelerate system prototyping. In this paper, we propose a Symmetric and Programmable MCM (SPMCM) substrate for this purpose. This SPMCM substrate consists of a symmetrical array of slots for bare-chip attachment and Field Programmable Interco...

  12. Study protocol: evaluation of specialized outpatient palliative care (SOPC) in the German state of Hesse (ELSAH study) - work package II: palliative care for pediatric patients.

    Science.gov (United States)

    Ulrich, Lisa-R; Gruber, Dania; Hach, Michaela; Boesner, Stefan; Haasenritter, Joerg; Kuss, Katrin; Seipp, Hannah; Gerlach, Ferdinand M; Erler, Antje

    2018-01-05

    In 2007, the European Association of Palliative Care (EAPC) provided a comprehensive set of recommendations and standards for the provision of adequate pediatric palliative care. A number of studies have shown deficits in pediatric palliative care compared to EAPC standards. In Germany, pediatric palliative care patients can be referred to specialized outpatient palliative care (SOPC) services, which are known to enhance quality of life, e.g. by avoiding hospitalization. However, current regulations for the provision of SOPC in Germany do not account for the different circumstances and needs of children and their families compared to adult palliative care patients. The "Evaluation of specialized outpatient palliative care (SOPC) in the German state of Hesse (ELSAH)" study aims to perform a needs assessment for pediatric patients (children, adolescents and young adults) receiving SOPC. This paper presents the study protocol for this assessment (work package II). The study uses a sequential mixed-methods study design with a focus on qualitative research. Data collection from professional and family caregivers and, as far as possible, pediatric patients, will involve both a written questionnaire based on European recommendations for pediatric palliative care, and semi-structured interviews. Additionally, professional caregivers will take part in focus group discussions and participatory observations. Interviews and focus groups will be tape- or video-recorded, transcribed verbatim and analyzed in accordance with the principles of grounded theory (interviews) and content analysis (focus groups). A structured field note template will be used to record notes taken during the participatory observations. Statistical Package for Social Sciences (SPSS, version 22 or higher) will be used for descriptive statistical analyses. The qualitative data analyses will be software-assisted by MAXQDA (version 12 or higher). This study will provide important information on what matters

  13. Prototyping Neuroadaptive Smart Antenna for 3G Wireless Communications

    Directory of Open Access Journals (Sweden)

    To William

    2005-01-01

    Full Text Available This paper describes prototyping of a neuroadaptive smart antenna beamforming algorithm using hardware-software implemented RBF neural network and FPGA system-on-programmable-chip (SoPC approach. The aim is to implement the adaptive beamforming unit in a combination of hardware and software by estimating its performance against the fixed real-time constraint based on IMT-2000 family of 3G cellular communication standards.

  14. A High-Voltage SOI CMOS Exciter Chip for a Programmable Fluidic Processor System.

    Science.gov (United States)

    Current, K W; Yuk, K; McConaghy, C; Gascoyne, P R C; Schwartz, J A; Vykoukal, J V; Andrews, C

    2007-06-01

    A high-voltage (HV) integrated circuit has been demonstrated to transport fluidic droplet samples on programmable paths across the array of driving electrodes on its hydrophobically coated surface. This exciter chip is the engine for dielectrophoresis (DEP)-based micro-fluidic lab-on-a-chip systems, creating field excitations that inject and move fluidic droplets onto and about the manipulation surface. The architecture of this chip is expandable to arrays of N X N identical HV electrode driver circuits and electrodes. The exciter chip is programmable in several senses. The routes of multiple droplets may be set arbitrarily within the bounds of the electrode array. The electrode excitation waveform voltage amplitude, phase, and frequency may be adjusted based on the system configuration and the signal required to manipulate a particular fluid droplet composition. The voltage amplitude of the electrode excitation waveform can be set from the minimum logic level up to the maximum limit of the breakdown voltage of the fabrication technology. The frequency of the electrode excitation waveform can also be set independently of its voltage, up to a maximum depending upon the type of droplets that must be driven. The exciter chip can be coated and its oxide surface used as the droplet manipulation surface or it can be used with a top-mounted, enclosed fluidic chamber consisting of a variety of materials. The HV capability of the exciter chip allows the generated DEP forces to penetrate into the enclosed chamber region and an adjustable voltage amplitude can accommodate a variety of chamber floor thicknesses. This demonstration exciter chip has a 32 x 32 array of nominally 100 V electrode drivers that are individually programmable at each time point in the procedure to either of two phases: 0deg and 180deg with respect to the reference clock. For this demonstration chip, while operating the electrodes with a 100-V peak-to-peak periodic waveform, the maximum HV electrode

  15. Programmable lab-on-a-chip system for single cell analysis

    Science.gov (United States)

    Thalhammer, S.

    2009-05-01

    The collection, selection, amplification and detection of minimum genetic samples became a part of everyday life in medical and biological laboratories, to analyze DNA-fragments of pathogens, patient samples and traces on crime scenes. About a decade ago, a handful of researchers began discussing an intriguing idea. Could the equipment needed for everyday chemistry and biology procedures be shrunk to fit on a chip in the size of a fingernail? Miniature devices for, say, analysing DNA and proteins should be faster and cheaper than conventional versions. Lab-on-a-chip is an advanced technology that integrates a microfluidic system on a microscale chip device. The "laboratory" is created by means of channels, mixers, reservoirs, diffusion chambers, integrated electrodes, pumps, valves and more. With lab-ona- chip technology, complete laboratories on a square centimetre can be created. Here, a multifunctional programmable Lab-on-a-Chip driven by nanofluidics and controlled by surface acoustic waves (SAW) is presented. This system combines serial DNA-isolation-, amplification- and array-detection-process on a modified glass-platform. The fluid actuation is controlled via SAW by interdigital transducers implemented in the chemical modified chip surface. The chemical surface modification allows fluid handling in the sub-microliter range. Minute amount of sample material is extracted by laser-based microdissection out of e.g. histological sections at the single cell level. A few picogram of genetic material are isolated and transferred via a low-pressure transfer system (SPATS) onto the chip. Subsequently the genetic material inside single droplets, which behave like "virtual" beaker, is transported to the reaction and analysis centers on the chip surface via surface acoustic waves, mainly known as noise dumping filters in mobile phones. At these "biological reactors" the genetic material is processed, e.g. amplified via polymerase chain reaction methods, and genetically

  16. Field-programmable lab-on-a-chip based on microelectrode dot array architecture.

    Science.gov (United States)

    Wang, Gary; Teng, Daniel; Lai, Yi-Tse; Lu, Yi-Wen; Ho, Yingchieh; Lee, Chen-Yi

    2014-09-01

    The fundamentals of electrowetting-on-dielectric (EWOD) digital microfluidics are very strong: advantageous capability in the manipulation of fluids, small test volumes, precise dynamic control and detection, and microscale systems. These advantages are very important for future biochip developments, but the development of EWOD microfluidics has been hindered by the absence of: integrated detector technology, standard commercial components, on-chip sample preparation, standard manufacturing technology and end-to-end system integration. A field-programmable lab-on-a-chip (FPLOC) system based on microelectrode dot array (MEDA) architecture is presented in this research. The MEDA architecture proposes a standard EWOD microfluidic component called 'microelectrode cell', which can be dynamically configured into microfluidic components to perform microfluidic operations of the biochip. A proof-of-concept prototype FPLOC, containing a 30 × 30 MEDA, was developed by using generic integrated circuits computer aided design tools, and it was manufactured with standard low-voltage complementary metal-oxide-semiconductor technology, which allows smooth on-chip integration of microfluidics and microelectronics. By integrating 900 droplet detection circuits into microelectrode cells, the FPLOC has achieved large-scale integration of microfluidics and microelectronics. Compared to the full-custom and bottom-up design methods, the FPLOC provides hierarchical top-down design approach, field-programmability and dynamic manipulations of droplets for advanced microfluidic operations.

  17. Developing technology for large-scale production of forest chips. Wood Energy Technology Programme 1999-2003. Interim report

    International Nuclear Information System (INIS)

    Hakkila, P.

    2003-01-01

    Finland is enhancing its use of renewable sources in energy production. From the 1995 level, the use of renewable energy is to be increased by 50 % by 2010, and 100 % by 2025. Wood-based fuels will play a leading role in this development. The main source of wood-based fuels is processing residues from the forest industries. However, as all processing residues are already in use, an increase is possible only as far as the capacity and wood consumption of the forest industries grow. Energy policy affects the production and availability of processing residues only indirectly. Another large source of wood-based energy is forest fuels, consisting of traditional firewood and chips comminuted from low-quality biomass. It is estimated that the reserve of technically harvest-able forest biomass is 10-16 Mm' annually, when no specific cost limit is applied. This corresponds to 2-3 Mtoe or 6-9 % of the present consumption of primary energy in Finland. How much of this re-serve it will actually be possible to harvest and utilize depends on the cost competitiveness of forest chips against alternative sources of energy. A goal of Finnish energy and climate strategies is to use 5 Mm' forest chips annually by 2010. The use of wood fuels is being promoted by means of taxation, investment aid and support for chip production from young forests. Furthermore, research and development is being supported in order to create techno-economic conditions for the competitive production of forest chips. In 1999, the National Technology Agency Tekes established the five-year Wood Energy Technology Programme to stimulate the development of efficient systems for the large-scale production of forest chips. Key tar-gets are competitive costs, reliable supply and good quality chips. The two guiding principles of the programme are: (1) close cooperation between researchers and practitioners and (2) to apply research and development to the practical applications and commercialization. As of November

  18. Synchronization method of digital pulse power supply for heavy ions accelerator in Lanzhou

    International Nuclear Information System (INIS)

    Wang Rongkun; Zhao Jiang; Wu Fengjun; Zhang Huajian; Chen Youxin; Huang Yuzhen; Gao Daqing; Zhou Zhongzu; Yan Huaihai; Yan Hongbin

    2013-01-01

    The performance of the synchrotron depends on its synchronization. A kind of synchronization method of digital pulse power supply in Heavy Ion Research Facility in Lanzhou-Cooler Storage Ring (HIRFL-CSR) was presented in detail, which is a kind of system on a programmable chip (SOPC) based on optical fiber and optical-custom component. The test of the digital power supply was performed and the current wave forms of pulse mode were given. The results show that all targets can meet the design requirements. (authors)

  19. Single-chip pulse programmer for magnetic resonance imaging using a 32-bit microcontroller.

    Science.gov (United States)

    Handa, Shinya; Domalain, Thierry; Kose, Katsumi

    2007-08-01

    A magnetic resonance imaging (MRI) pulse programmer has been developed using a single-chip microcontroller (ADmicroC7026). The microcontroller includes all the components required for the MRI pulse programmer: a 32-bit RISC CPU core, 62 kbytes of flash memory, 8 kbytes of SRAM, two 32-bit timers, four 12-bit DA converters, and 40 bits of general purpose I/O. An evaluation board for the microcontroller was connected to a host personal computer (PC), an MRI transceiver, and a gradient driver using interface circuitry. Target (embedded) and host PC programs were developed to enable MRI pulse sequence generation by the microcontroller. The pulse programmer achieved a (nominal) time resolution of approximately 100 ns and a minimum time delay between successive events of approximately 9 micros. Imaging experiments using the pulse programmer demonstrated the effectiveness of our approach.

  20. Molecular Sticker Model Stimulation on Silicon for a Maximum Clique Problem

    Directory of Open Access Journals (Sweden)

    Jianguo Ning

    2015-06-01

    Full Text Available Molecular computers (also called DNA computers, as an alternative to traditional electronic computers, are smaller in size but more energy efficient, and have massive parallel processing capacity. However, DNA computers may not outperform electronic computers owing to their higher error rates and some limitations of the biological laboratory. The stickers model, as a typical DNA-based computer, is computationally complete and universal, and can be viewed as a bit-vertically operating machine. This makes it attractive for silicon implementation. Inspired by the information processing method on the stickers computer, we propose a novel parallel computing model called DEM (DNA Electronic Computing Model on System-on-a-Programmable-Chip (SOPC architecture. Except for the significant difference in the computing medium—transistor chips rather than bio-molecules—the DEM works similarly to DNA computers in immense parallel information processing. Additionally, a plasma display panel (PDP is used to show the change of solutions, and helps us directly see the distribution of assignments. The feasibility of the DEM is tested by applying it to compute a maximum clique problem (MCP with eight vertices. Owing to the limited computing sources on SOPC architecture, the DEM could solve moderate-size problems in polynomial time.

  1. A SOPC-BASED Evaluation of AES for 2.4 GHz Wireless Network

    Science.gov (United States)

    Ken, Cai; Xiaoying, Liang

    In modern systems, data security is needed more than ever before and many cryptographic algorithms are utilized for security services. Wireless Sensor Networks (WSN) is an example of such technologies. In this paper an innovative SOPC-based approach for the security services evaluation in WSN is proposed that addresses the issues of scalability, flexible performance, and silicon efficiency for the hardware acceleration of encryption system. The design includes a Nios II processor together with custom designed modules for the Advanced Encryption Standard (AES) which has become the default choice for various security services in numerous applications. The objective of this mechanism is to present an efficient hardware realization of AES using very high speed integrated circuit hardware description language (Verilog HDL) and expand the usability for various applications. As compared to traditional customize processor design, the mechanism provides a very broad range of cost/performance points.

  2. A 1,000 Frames/s Programmable Vision Chip with Variable Resolution and Row-Pixel-Mixed Parallel Image Processors

    Directory of Open Access Journals (Sweden)

    Nanjian Wu

    2009-07-01

    Full Text Available A programmable vision chip with variable resolution and row-pixel-mixed parallel image processors is presented. The chip consists of a CMOS sensor array, with row-parallel 6-bit Algorithmic ADCs, row-parallel gray-scale image processors, pixel-parallel SIMD Processing Element (PE array, and instruction controller. The resolution of the image in the chip is variable: high resolution for a focused area and low resolution for general view. It implements gray-scale and binary mathematical morphology algorithms in series to carry out low-level and mid-level image processing and sends out features of the image for various applications. It can perform image processing at over 1,000 frames/s (fps. A prototype chip with 64 × 64 pixels resolution and 6-bit gray-scale image is fabricated in 0.18 mm Standard CMOS process. The area size of chip is 1.5 mm × 3.5 mm. Each pixel size is 9.5 μm × 9.5 μm and each processing element size is 23 μm × 29 μm. The experiment results demonstrate that the chip can perform low-level and mid-level image processing and it can be applied in the real-time vision applications, such as high speed target tracking.

  3. Programmable System-on-Chip (PSoC) Embedded Readout Designs for Liquid Helium Level Sensors.

    Science.gov (United States)

    Parasakthi, C; Gireesan, K; Usha Rani, R; Sheela, O K; Janawadkar, M P

    2014-08-01

    This article reports the development of programmable system-on-chip (PSoC)-based embedded readout designs for liquid helium level sensors using resistive liquid vapor discriminators. The system has been built for the measurement of liquid helium level in a concave-bottomed, helmet-shaped, fiber-reinforced plastic cryostat for magnetoencephalography. This design incorporates three carbon resistors as cost-effective sensors, which are mounted at desired heights inside the cryostat and were used to infer the liquid helium level by measuring their temperature-dependent resistance. Localized electrical heating of the carbon resistors was used to discriminate whether the resistor is immersed in liquid helium or its vapor by exploiting the difference in the heat transfer rates in the two environments. This report describes a single PSoC chip for the design and development of a constant current source to drive the three carbon resistors, a multiplexer to route the sensor outputs to the analog-to-digital converter (ADC), a buffer to avoid loading of the sensors, an ADC for digitizing the data, and a display using liquid crystal display cum light-emitting diode modules. The level sensor readout designed with a single PSoC chip enables cost-effective and reliable measurement system design. © 2014 Society for Laboratory Automation and Screening.

  4. Embedded System Implementation on FPGA System With μCLinux OS

    International Nuclear Information System (INIS)

    Amin, Ahmad Fairuz Muhd; Aris, Ishak; Abdullah, Raja Syamsul Azmir Raja; Sahbudin, Ratna Kalos Zakiah

    2011-01-01

    Embedded systems are taking on more complicated tasks as the processors involved become more powerful. The embedded systems have been widely used in many areas such as in industries, automotives, medical imaging, communications, speech recognition and computer vision. The complexity requirements in hardware and software nowadays need a flexibility system for further enhancement in any design without adding new hardware. Therefore, any changes in the design system will affect the processor that need to be changed. To overcome this problem, a System On Programmable Chip (SOPC) has been designed and developed using Field Programmable Gate Array (FPGA). A softcore processor, NIOS II 32-bit RISC, which is the microprocessor core was utilized in FPGA system together with the embedded operating system(OS), μClinux. In this paper, an example of web server is explained and demonstrated

  5. Embedded System Implementation on FPGA System With μCLinux OS

    Science.gov (United States)

    Fairuz Muhd Amin, Ahmad; Aris, Ishak; Syamsul Azmir Raja Abdullah, Raja; Kalos Zakiah Sahbudin, Ratna

    2011-02-01

    Embedded systems are taking on more complicated tasks as the processors involved become more powerful. The embedded systems have been widely used in many areas such as in industries, automotives, medical imaging, communications, speech recognition and computer vision. The complexity requirements in hardware and software nowadays need a flexibility system for further enhancement in any design without adding new hardware. Therefore, any changes in the design system will affect the processor that need to be changed. To overcome this problem, a System On Programmable Chip (SOPC) has been designed and developed using Field Programmable Gate Array (FPGA). A softcore processor, NIOS II 32-bit RISC, which is the microprocessor core was utilized in FPGA system together with the embedded operating system(OS), μClinux. In this paper, an example of web server is explained and demonstrated

  6. Embedded System Implementation on FPGA System With {mu}CLinux OS

    Energy Technology Data Exchange (ETDEWEB)

    Amin, Ahmad Fairuz Muhd [Institute of Advanced Technology, Universiti Putra Malaysia, 43400 Serdang, Selangor (Malaysia); Aris, Ishak [Department of Electrical and Electronic Engineering, Universiti Putra Malaysia, 43400, Serdang, Selangor (Malaysia); Abdullah, Raja Syamsul Azmir Raja; Sahbudin, Ratna Kalos Zakiah, E-mail: gs20613@mutiara.upm.edu.my, E-mail: ishak@eng.upm.edu.my, E-mail: rsa@eng.upm.edu.my [Department of Computer and Communication Systems Engineering, Universiti Putra Malaysia, 43400, Serdang, Selangor (Malaysia)

    2011-02-15

    Embedded systems are taking on more complicated tasks as the processors involved become more powerful. The embedded systems have been widely used in many areas such as in industries, automotives, medical imaging, communications, speech recognition and computer vision. The complexity requirements in hardware and software nowadays need a flexibility system for further enhancement in any design without adding new hardware. Therefore, any changes in the design system will affect the processor that need to be changed. To overcome this problem, a System On Programmable Chip (SOPC) has been designed and developed using Field Programmable Gate Array (FPGA). A softcore processor, NIOS II 32-bit RISC, which is the microprocessor core was utilized in FPGA system together with the embedded operating system(OS), {mu}Clinux. In this paper, an example of web server is explained and demonstrated

  7. Hardware-Enabled Security Through On-Chip Reconfigurable Fabric

    Science.gov (United States)

    2016-02-05

    level language (SystemC) instead of in RTL such as Verilog and VHDL . To evaluate our approach, we implemented a set of monitors including soft...techniques can be implemented after chip fabrication. The study showed that such programmable architectures can indeed support a broad range of run- time...accelerators where security techniques can be implemented after chip fabrication. The study showed that such programmable architectures can indeed support a

  8. Efficient Phase Unwrapping Architecture for Digital Holographic Microscopy

    Directory of Open Access Journals (Sweden)

    Wen-Jyi Hwang

    2011-09-01

    Full Text Available This paper presents a novel phase unwrapping architecture for accelerating the computational speed of digital holographic microscopy (DHM. A fast Fourier transform (FFT based phase unwrapping algorithm providing a minimum squared error solution is adopted for hardware implementation because of its simplicity and robustness to noise. The proposed architecture is realized in a pipeline fashion to maximize through put of thecomputation. Moreover, the number of hardware multipliers and dividers are minimized to reduce the hardware costs. The proposed architecture is used as a custom user logic in a system on programmable chip (SOPC for physical performance measurement. Experimental results reveal that the proposed architecture is effective for expediting the computational speed while consuming low hardware resources for designing an embedded DHM system.

  9. Digitalizing upgrade of the power supplies for the extraction septum magnets in HIRFL-CSR

    International Nuclear Information System (INIS)

    Zhao Jiang; Zhang Huajian; Wu Fengjun; Yuan Zhendong; Chen Youxin; Huang Yuzhen; Gao Daqing

    2014-01-01

    This paper introduces the working principle of the power supplies for the septum magnets in HIRFL-CSR and presents a feasible scheme of digitalizing these power supplies. The scheme employed the SOPC (system-on-a-programmable-chip) technology based on FPGA, the software framework of NIOSII and the polycyclic adjustment algorithm realized by the hardware description language. Then, several key problems that could be encountered in realizing the power supply control algorithm on FPGA were discussed. After the power supplies were upgraded, the beam of HIRFL-CSR was extracted more reliably and the stability of beam spot position at the experimental terminals has been obviously improved. This work would provide a valuable reference for the engineers of digitalizing other magnetic power supplies in HIRFL-CSR and of developing magnetic power supplies for heavy ion cancer therapy. (authors)

  10. Design and implementation of high-precision and low-jitter programmable delay circuitry

    International Nuclear Information System (INIS)

    Gao Yuan; Cui Ke; Zhang Hongfei; Luo Chunli; Yang Dongxu; Liang Hao; Wang Jian

    2011-01-01

    A programmable delay circuit design which has characteristics of high-precision, low-jitter, wide-programmable-range and low power is introduced. The delay circuitry uses the scheme which has two parts: the coarse delay and the fine delay that could be controlled separately. Using different coarse delay chip can reach different maximum programmable range. And the fine delay programmable chip has the minimum step which is down to 10 ps. The whole circuitry jitter will be less than 100 ps. The design has been successfully applied in Quantum Key Distribution experiment. (authors)

  11. A self-contained, programmable microfluidic cell culture system with real-time microscopy access

    DEFF Research Database (Denmark)

    Skafte-Pedersen, Peder; Hemmingsen, Mette; Sabourin, David

    2011-01-01

    Utilizing microfluidics is a promising way for increasing the throughput and automation of cell biology research. We present a complete self-contained system for automated cell culture and experiments with real-time optical read-out. The system offers a high degree of user-friendliness, stability...... enables the system to perform parallel, programmable and multiconditional assays on a single chip. A modular approach provides system versatility and allows many different chips to be used dependent upon application. We validate the system's performance by demonstrating on-chip passive switching...... and mixing by peristaltically driven flows. Applicability for biological assays is demonstrated by on-chip cell culture including on-chip transfection and temporally programmable gene expression....

  12. Preservation of forest wood chips

    Energy Technology Data Exchange (ETDEWEB)

    Kofman, P.D.; Thomsen, I.M.; Ohlsson, C.; Leer, E.; Ravn Schmidt, E.; Soerensen, M.; Knudsen, P.

    1999-01-01

    As part of the Danish Energy Research Programme on biomass utilisation for energy production (EFP), this project concerns problems connected to the handling and storing of wood chips. In this project, the possibility of preserving wood chips of the Norway Spruce (Picea Abies) is addressed, and the potential improvements by anaerobic storage are tested. Preservation of wood chips aims at reducing dry matter losses from extensive heating during storage and to reduce production of fungal spores. Fungal spores pose a health hazards to workers handling the chips. Further the producers of wood chips are interested in such a method since it would enable them to give a guarantee for the delivery of homogeneous wood chips also during the winter period. Three different types of wood chips were stored airtight and further one of these was stored in accordance with normal practise and use as reference. The results showed that airtight storage had a beneficial impact on the quality of the chips: no redistribution of moisture, low dry matter losses, unfavourable conditions for microbial activity of most fungi, and the promotion of yeasts instead of fungi with airborne spores. Likewise the firing tests showed that no combustion problems, and no increased risk to the environment or to the health of staff is caused by anaerobic storage of wood chips. In all, the tests of the anaerobic storage method of forest wood chips were a success and a large-scale test of the method will be carried out in 1999. (au)

  13. A Novel Mu Rhythm-based Brain Computer Interface Design that uses a Programmable System on Chip.

    Science.gov (United States)

    Joshi, Rohan; Saraswat, Prateek; Gajendran, Rudhram

    2012-01-01

    This paper describes the system design of a portable and economical mu rhythm based Brain Computer Interface which employs Cypress Semiconductors Programmable System on Chip (PSoC). By carrying out essential processing on the PSoC, the use of an extra computer is eliminated, resulting in considerable cost savings. Microsoft Visual Studio 2005 and PSoC Designer 5.01 are employed in developing the software for the system, the hardware being custom designed. In order to test the usability of the BCI, preliminary testing is carried out by training three subjects who were able to demonstrate control over their electroencephalogram by moving a cursor present at the center of the screen towards the indicated direction with an average accuracy greater than 70% and a bit communication rate of up to 7 bits/min.

  14. Two-Dimensional Programmable Manipulation of Magnetic Nanoparticles on-Chip

    DEFF Research Database (Denmark)

    Sarella, Anandakumar; Torti, Andrea; Donolato, Marco

    2014-01-01

    A novel device is designed for on-chip selective trap and two-dimensional remote manipulation of single and multiple fluid-borne magnetic particles using field controlled magnetic domain walls in circular nanostructures. The combination of different ring-shaped nanostructures and field sequences ...

  15. Improved On-Chip Measurement of Delay in an FPGA or ASIC

    Science.gov (United States)

    Chen, Yuan; Burke, Gary; Sheldon, Douglas

    2007-01-01

    An improved design has been devised for on-chip-circuitry for measuring the delay through a chain of combinational logic elements in a field-programmable gate array (FPGA) or application-specific integrated circuit (ASIC). In the improved design, the delay chain does not include input and output buffers and is not configured as an oscillator. Instead, the delay chain is made part of the signal chain of an on-chip pulse generator. The duration of the pulse is measured on-chip and taken to equal the delay.

  16. Implementation of real-time nonuniformity correction with multiple NUC tables using FPGA in an uncooled imaging system

    Science.gov (United States)

    Oh, Gyong Jin; Kim, Lyang-June; Sheen, Sue-Ho; Koo, Gyou-Phyo; Jin, Sang-Hun; Yeo, Bo-Yeon; Lee, Jong-Ho

    2009-05-01

    This paper presents a real time implementation of Non Uniformity Correction (NUC). Two point correction and one point correction with shutter were carried out in an uncooled imaging system which will be applied to a missile application. To design a small, light weight and high speed imaging system for a missile system, SoPC (System On a Programmable Chip) which comprises of FPGA and soft core (Micro-blaze) was used. Real time NUC and generation of control signals are implemented using FPGA. Also, three different NUC tables were made to make the operating time shorter and to reduce the power consumption in a large range of environment temperature. The imaging system consists of optics and four electronics boards which are detector interface board, Analog to Digital converter board, Detector signal generation board and Power supply board. To evaluate the imaging system, NETD was measured. The NETD was less than 160mK in three different environment temperatures.

  17. A pipelined architecture for real time correction of non-uniformity in infrared focal plane arrays imaging system using multiprocessors

    Science.gov (United States)

    Zou, Liang; Fu, Zhuang; Zhao, YanZheng; Yang, JunYan

    2010-07-01

    This paper proposes a kind of pipelined electric circuit architecture implemented in FPGA, a very large scale integrated circuit (VLSI), which efficiently deals with the real time non-uniformity correction (NUC) algorithm for infrared focal plane arrays (IRFPA). Dual Nios II soft-core processors and a DSP with a 64+ core together constitute this image system. Each processor undertakes own systematic task, coordinating its work with each other's. The system on programmable chip (SOPC) in FPGA works steadily under the global clock frequency of 96Mhz. Adequate time allowance makes FPGA perform NUC image pre-processing algorithm with ease, which has offered favorable guarantee for the work of post image processing in DSP. And at the meantime, this paper presents a hardware (HW) and software (SW) co-design in FPGA. Thus, this systematic architecture yields an image processing system with multiprocessor, and a smart solution to the satisfaction with the performance of the system.

  18. The role of research and development work on the production costs of logging residue chips

    International Nuclear Information System (INIS)

    Nousiainen, I.

    1998-01-01

    Purchase of logging residue chips in the early 80s was mainly based on production chains in which the residues were collected with load-carrying tractors at the road-side storage, from which it was chipped or crushed directly into the trailer of a waiting lorry. Six new production chains were developed in the national Bioenergy Research Programme. Three of these are now commercial. Kotimaiset Energiat Pekka Lahti Ky has developed, on the basis of a traditional logging residue production chain, a high-efficiency EVOLUTION intermediate storage chipper, suitable for chipping of logging residues. Oy Logset Ab has developed a new type of lot-chipping chip-harvester, the LOGSET 536C. Nested containers have also been developed for the lot-chipping method. MOHA multi-purpose chipper, in which the chipping and lorry-transportation of chips have been integrated, has also been developed as a part of the research programme. In addition to these, a chipper-container lorry combination, transportation of complete logging residues, and whole- tree skidding have been developed in the project for production of logging residue chips. In the beginning of the 80s the production costs of logging residues at the place of utilization were about 52 FIM/MWh, and the average transportation distance 50 km. In 1992 the production costs, 64 FIM/MWh at the distance of 100 km, was significantly higher than the price of alternative fuels. The lowest production cost level, obtainable by the developed methods is 46 FIM/MWh

  19. Perspective: Fabrication of integrated organ-on-a-chip via bioprinting.

    Science.gov (United States)

    Yang, Qingzhen; Lian, Qin; Xu, Feng

    2017-05-01

    Organ-on-a-chip has emerged as a powerful platform with widespread applications in biomedical engineering, such as pathology studies and drug screening. However, the fabrication of organ-on-a-chip is still a challenging task due to its complexity. For an integrated organ-on-a-chip, it may contain four key elements, i.e., a microfluidic chip, live cells/microtissues that are cultured in this chip, components for stimulus loading to mature the microtissues, and sensors for results readout. Recently, bioprinting has been used for fabricating organ-on-a-chip as it enables the printing of multiple materials, including biocompatible materials and even live cells in a programmable manner with a high spatial resolution. Besides, all four elements for organ-on-a-chip could be printed in a single continuous procedure on one printer; in other words, the fabrication process is assembly free. In this paper, we discuss the recent advances of organ-on-a-chip fabrication by bioprinting. Light is shed on the printing strategies, materials, and biocompatibility. In addition, some specific bioprinted organs-on-chips are analyzed in detail. Because the bioprinted organ-on-a-chip is still in its early stage, significant efforts are still needed. Thus, the challenges presented together with possible solutions and future trends are also discussed.

  20. Using a Voltage Domain Programmable Technique for Low-Power Management Cell-Based Design

    Directory of Open Access Journals (Sweden)

    Ching-Hwa Cheng

    2011-09-01

    Full Text Available The Multi-voltage technique is an effective way to reduce power consumption. In the proposed cell-based voltage domain programmable (VDP technique, the high and low voltages applied to logic gates are programmable. The flexible voltage domain reassignment allows the chip performance and power consumption to be dynamically adjusted. In the proposed technique, the power switches possess the feature of flexible programming after chip manufacturing. This VDP method does not use an external voltage regulator to regulate the supply voltage level from outside of the chip but can be easily integrated within the design. This novel technique is proven by use of a video decoder test chip, which shows 55% and 61% power reductions compared to conventional single-Vdd and low-voltage designs, respectively. This power-aware performance adjusting mechanism shows great power reduction with a good power-performance management mechanism.

  1. Programmable Nano-Bio-Chip Sensors: Analytical Meets Clinical

    Science.gov (United States)

    Jokerst, Jesse V.; Floriano, Pierre N.; Christodoulides, Nicolaos; McDevitt, John T.; Jacobson, James W.; Bhagwandin, Bryon D.

    2010-01-01

    synopsis There have been many recent advances in the nano-bio-chip (NBC) analysis methodology with implications for a number of high-morbidity diseases including HIV, cancer, and heart disease. In their Feature article, Jesse V. Jokerst of The University of Texas at Austin; Pierre N. Floriano, Nicolaos Christodoulides, and John T. McDevitt of Rice University; and James W. Jacobson and Bryon D. Bhagwandin of LabNow, Inc. discuss the construction, capabilities, and advantages of NBCs. The cover shows arrays of NBCs. Images courtesy of Glennon Simmons/McDevitt Lab and Marcha Miller of The University of Texas at Austin. PMID:20128622

  2. A CMOS analog front-end chip for amperometric electrochemical sensors

    International Nuclear Information System (INIS)

    Li Zhichao; Chen Min; Xiao Jingbo; Chen Jie; Liu Yuntao

    2015-01-01

    This paper reports a complimentary metal–oxide–semiconductor (CMOS) analog front-end chip for amperometric electrochemical sensors. The chip includes a digital configuration circuit, which can communicate with an external microcontroller by employing an I 2 C interface bus, and thus is highly programmable. Digital correlative double samples technique and an incremental sigma–delta analog to digital converter (Σ–Δ ADC) are employed to achieve a new proposed system architecture with double samples. The chip has been fabricated in a standard 0.18-μm CMOS process with high-precision and high-linearity performance occupying an area of 1.3 × 1.9 mm 2 . Sample solutions with various phosphate concentrations have been detected with a step concentration of 0.01 mg/L. (paper)

  3. Description of the SAltro-16 chip for gas detector readout

    CERN Document Server

    Aspell, P; Garcia Garcia, E; de Gaspari, M; Mager, M; Musa, L; Rehman, A; Trampitsch, G

    2010-01-01

    The S-ALTRO prototype chip is a mixed-signal integrated circuit designed to be one of the building blocks of the readout electronics for gas detectors. Its architecture is based in the ALTRO (ALICE TPC Read Out) chip, being its main difference the integration of the charge shaping amplifier in the same IC. Just like ALTRO chip, the prototype architecture and programmability make it suitable for the readout of a wider class of detectors. In one single chip, 16 analogue signals from the detector are shaped, digitised, processed, compressed and stored in a multi-acquisition memory. The Analogue-to- Digital converters embedded in the chip have a 10-bit dynamic range and a maximum sampling rate up to 40MHz. After digitisation, a pipelined Data Processor is able to remove from the input signal a wide range of perturbations, related to the non- ideal behaviour of the detector, temperature variation of the electronics, environmental noise, etc. Moreover, the Data Processor is able to suppress the pulse tail within 1�...

  4. Programmable waveform controller

    International Nuclear Information System (INIS)

    Yeh, H.T.

    1979-01-01

    A programmable waveform controller (PWC) was developed for voltage waveform generation in the laboratory. It is based on the Intel 8080 family of chips. The hardware uses the modular board approach, sharing a common 44-pin bus. The software contains two separate programs: the first generates a single connected linear ramp waveform and is capable of bipolar operation, linear interpolation between input data points, extended time range, and cycling; the second generates four independent square waveforms with variable duration and amplitude

  5. Wood chips procurement and research project at the Mikkeli region

    International Nuclear Information System (INIS)

    Saksa, T.; Auvinen, P.

    1996-01-01

    In 1993-94, a large-scale energywood production chain started as a co-operation project by the Mikkeli city forest office and local forestry societies. In 1995 over 115 000 m 3 (about 85 000 MWh of energy) of wood chips were delivered to Pursiala heat and power plant in Mikkeli. About 75 % of these chips was forest processed chips. About 70 % of the forest processed chips was whole tree chips from improvement cuttings of young forest stands and the rest was logging waste chips from regeneration cutting areas. The average total delivery costs of forest processed chips after reduction of energywood and other subsidies were approximately 45 FIM/m 3 (60 FIM/MWh) for the whole tree chips and 38 FIM/m 3 (50 FIM/MWh) for logging waste chips. The delivery costs of forest processed chips could meet the target of Bioenergy Research Programme (45 FIM/MWh) only in the most favourable cases. In an average the delivery costs were about 9 FIM/MWh more than the price obtained when sold to the heat and power plant. However the wood chip production created 27 new jobs and the increase of income to the local economy was about 2.2 milj. FIM /year. The local communities got new tax revenue about 3 FIM/MWh. The gain for the forestry was approximated to be 5 - 6 FIM/MWh. The resources of forest processed chips were studied on the basis of stand measurements. According to the study the most remarkable energywood resources were in young thinning stands on Oxalis-Myrtillus and Myrtillus forest site types. On Oxalis-Myrtillus type almost every and on Myrtillus type every second stand included energywood more than 40 m 3 /ha

  6. SVX3: A deadtimeless readout chip for silicon strip detectors

    International Nuclear Information System (INIS)

    Zimmerman, T.; Huffman, T.; Srage, J.; Stroehmer, R.; Yarema, R.; Garcia-Sciveras, M.; Luo, L.; Milgrome, O.

    1997-12-01

    A new silicon strip readout chip called the SVX3 has been designed for the 720,000 channel CDF silicon upgrade at Fermilab. SVX3 incorporates an integrator, analog delay pipeline, ADC, and data sparsification for each of 128 identical channels. Many of the operating parameters are programmable via a serial bit stream, which allows the chip to be used under a variety of conditions. Distinct features of SVX3 include use of a backside substrate contact for optimal ground referencing, and the capability of simultaneous signal acquisition and digital readout allowing deadtimeless operation in the Fermilab Tevatron

  7. Programmable neural processing on a smartdust for brain-computer interfaces.

    Science.gov (United States)

    Yuwen Sun; Shimeng Huang; Oresko, Joseph J; Cheng, Allen C

    2010-10-01

    Brain-computer interfaces (BCIs) offer tremendous promise for improving the quality of life for disabled individuals. BCIs use spike sorting to identify the source of each neural firing. To date, spike sorting has been performed by either using off-chip analysis, which requires a wired connection penetrating the skull to a bulky external power/processing unit, or via custom application-specific integrated circuits that lack the programmability to perform different algorithms and upgrades. In this research, we propose and test the feasibility of performing on-chip, real-time spike sorting on a programmable smartdust, including feature extraction, classification, compression, and wireless transmission. A detailed power/performance tradeoff analysis using DVFS is presented. Our experimental results show that the execution time and power density meet the requirements to perform real-time spike sorting and wireless transmission on a single neural channel.

  8. SPAD array chips with full frame readout for crystal characterization

    Energy Technology Data Exchange (ETDEWEB)

    Fischer, Peter; Blanco, Roberto; Sacco, Ilaria; Ritzert, Michael [Heidelberg University (Germany); Weyers, Sascha [Fraunhofer Institute for Microelectronic Circuits and Systems (Germany)

    2015-05-18

    We present single photon sensitive 2D camera chips containing 88x88 avalanche photo diodes which can be read out in full frame mode with up to 400.000 frames per second. The sensors have an imaging area of ~5mm x 5mm covered by square pixels of ~56µm x 56µm with a ~55% fill factor in the latest chip generation. The chips contain a self triggering logic with selectable (column) multiplicities of up to >=4 hits within an adjustable coincidence time window. The photon accumulation time window is programmable as well. First prototypes have demonstrated low dark count rates of <50kHz/mm2 (SPAD area) at 10 degree C for 10% masked pixels. One chip version contains an automated readout of the photon cluster position. The readout of the detailed photon distribution for single events allows the characterization of light sharing, optical crosstalk etc., in crystals or crystal arrays as they are used in PET instrumentation. This knowledge could lead to improvements in spatial or temporal resolution.

  9. A Cytomorphic Chip for Quantitative Modeling of Fundamental Bio-Molecular Circuits.

    Science.gov (United States)

    2015-08-01

    We describe a 0.35 μm BiCMOS silicon chip that quantitatively models fundamental molecular circuits via efficient log-domain cytomorphic transistor equivalents. These circuits include those for biochemical binding with automatic representation of non-modular and loading behavior, e.g., in cascade and fan-out topologies; for representing variable Hill-coefficient operation and cooperative binding; for representing inducer, transcription-factor, and DNA binding; for probabilistic gene transcription with analogic representations of log-linear and saturating operation; for gain, degradation, and dynamics of mRNA and protein variables in transcription and translation; and, for faithfully representing biological noise via tunable stochastic transistor circuits. The use of on-chip DACs and ADCs enables multiple chips to interact via incoming and outgoing molecular digital data packets and thus create scalable biochemical reaction networks. The use of off-chip digital processors and on-chip digital memory enables programmable connectivity and parameter storage. We show that published static and dynamic MATLAB models of synthetic biological circuits including repressilators, feed-forward loops, and feedback oscillators are in excellent quantitative agreement with those from transistor circuits on the chip. Computationally intensive stochastic Gillespie simulations of molecular production are also rapidly reproduced by the chip and can be reliably tuned over the range of signal-to-noise ratios observed in biological cells.

  10. Photonic Crystals: Two-Dimensional Programmable Manipulation of Magnetic Nanoparticles on-Chip (Adv. Mater. 15/2014)

    DEFF Research Database (Denmark)

    Sarella, Anandakumar; Torti, Andrea; Donolato, Marco

    2014-01-01

    P. Vavassori and co-workers demonstrate on page 2384 that field-controlled displacement of magnetic domain walls in ferromagnetic nano-ring structures allows for capture and 2-dimensional remote manipulation of fluidborne magnetic nanoparticles over a chip surface.......P. Vavassori and co-workers demonstrate on page 2384 that field-controlled displacement of magnetic domain walls in ferromagnetic nano-ring structures allows for capture and 2-dimensional remote manipulation of fluidborne magnetic nanoparticles over a chip surface....

  11. Applications of field-programmable gate arrays in scientific research

    CERN Document Server

    Sadrozinski, Hartmut F W

    2011-01-01

    Focusing on resource awareness in field-programmable gate array (FPGA) design, Applications of Field-Programmable Gate Arrays in Scientific Research covers the principle of FPGAs and their functionality. It explores a host of applications, ranging from small one-chip laboratory systems to large-scale applications in ""big science."" The book first describes various FPGA resources, including logic elements, RAM, multipliers, microprocessors, and content-addressable memory. It then presents principles and methods for controlling resources, such as process sequencing, location constraints, and in

  12. Performance of an area variable MOS varicap weighted programmable CCD transversal filter

    OpenAIRE

    Bhattacharyya, A.B.; Shankarnarayan, L.; Kapur, N.; Wallinga, Hans

    1981-01-01

    The performance of an electrically programmable CCD transversal filter (PTF) is presented in which tap-weight multiplication is performed by a novel and compact on chip voltage controlled area variable MOS varicap.

  13. Reconfigurable lattice mesh designs for programmable photonic processors.

    Science.gov (United States)

    Pérez, Daniel; Gasulla, Ivana; Capmany, José; Soref, Richard A

    2016-05-30

    We propose and analyse two novel mesh design geometries for the implementation of tunable optical cores in programmable photonic processors. These geometries are the hexagonal and the triangular lattice. They are compared here to a previously proposed square mesh topology in terms of a series of figures of merit that account for metrics that are relevant to on-chip integration of the mesh. We find that that the hexagonal mesh is the most suitable option of the three considered for the implementation of the reconfigurable optical core in the programmable processor.

  14. Design and realization of the real-time spectrograph controller for LAMOST based on FPGA

    Science.gov (United States)

    Wang, Jianing; Wu, Liyan; Zeng, Yizhong; Dai, Songxin; Hu, Zhongwen; Zhu, Yongtian; Wang, Lei; Wu, Zhen; Chen, Yi

    2008-08-01

    A large Schmitt reflector telescope, Large Sky Area Multi-Object Fiber Spectroscopic Telescope(LAMOST), is being built in China, which has effective aperture of 4 meters and can observe the spectra of as many as 4000 objects simultaneously. To fit such a large amount of observational objects, the dispersion part is composed of a set of 16 multipurpose fiber-fed double-beam Schmidt spectrographs, of which each has about ten of moveable components realtimely accommodated and manipulated by a controller. An industrial Ethernet network connects those 16 spectrograph controllers. The light from stars is fed to the entrance slits of the spectrographs with optical fibers. In this paper, we mainly introduce the design and realization of our real-time controller for the spectrograph, our design using the technique of System On Programmable Chip (SOPC) based on Field Programmable Gate Array (FPGA) and then realizing the control of the spectrographs through NIOSII Soft Core Embedded Processor. We seal the stepper motor controller as intellectual property (IP) cores and reuse it, greatly simplifying the design process and then shortening the development time. Under the embedded operating system μC/OS-II, a multi-tasks control program has been well written to realize the real-time control of the moveable parts of the spectrographs. At present, a number of such controllers have been applied in the spectrograph of LAMOST.

  15. Architectures for single-chip image computing

    Science.gov (United States)

    Gove, Robert J.

    1992-04-01

    This paper will focus on the architectures of VLSI programmable processing components for image computing applications. TI, the maker of industry-leading RISC, DSP, and graphics components, has developed an architecture for a new-generation of image processors capable of implementing a plurality of image, graphics, video, and audio computing functions. We will show that the use of a single-chip heterogeneous MIMD parallel architecture best suits this class of processors--those which will dominate the desktop multimedia, document imaging, computer graphics, and visualization systems of this decade.

  16. Collective Memory Transfers for Multi-Core Chips

    Energy Technology Data Exchange (ETDEWEB)

    Michelogiannakis, George; Williams, Alexander; Shalf, John

    2013-11-13

    Future performance improvements for microprocessors have shifted from clock frequency scaling towards increases in on-chip parallelism. Performance improvements for a wide variety of parallel applications require domain-decomposition of data arrays from a contiguous arrangement in memory to a tiled layout for on-chip L1 data caches and scratchpads. How- ever, DRAM performance suffers under the non-streaming access patterns generated by many independent cores. We propose collective memory scheduling (CMS) that actively takes control of collective memory transfers such that requests arrive in a sequential and predictable fashion to the memory controller. CMS uses the hierarchically tiled arrays formal- ism to compactly express collective operations, which greatly improves programmability over conventional prefetch or list- DMA approaches. CMS reduces application execution time by up to 32% and DRAM read power by 2.2×, compared to a baseline DMA architecture such as STI Cell.

  17. Airtight storage of wood chips for use as a fuel

    Energy Technology Data Exchange (ETDEWEB)

    Lamond, W.J.; Graham, R.; Boyd, J.E.L.; Harling, R.; Lowe, J.F.

    1993-11-01

    This study was carried out to see if airtight storage was a possible alternative to drying as a procedure for the successful storage of chipped wood for fuel. Twelve insulated bins, with a capacity of approximately 0.1 m{sup 3} each, were filled with freshly cut Sitka Spruce wood chips. Ten of these bins were sealed immediately after filling and the remaining two left unsealed for the duration of the experiment (12 months). The programme of sampling for gas, moisture content, mycology and bacteriology is described. The results showed that sealed storage reduced the overall dry matter loss in the bins to around 1% per month compared to 2% for the unsealed bins. This compares favourably with losses of around 3% per month which have been reported for open stacks of chips with much lower initial moisture contents than that used in these experiments. There was a slight reduction in the colorific value of oven dried chips between the initial and after storage samples. The moisture content of the chips in all the bins increased over the storage period. The average energy loss was 2.9% per month for sealed and 2.0% per month for unsealed treatment. A typical ecological succession was shown by the chips, commencing with field fungi and terminating with a dominant yeast population. Potential costs for suitable stores vary from Pounds 1.27 per m{sup 3} per year for a plastic covered outdoor stack to Pounds 11.72 per m{sup 3} per year for a vitreous enamel silo. (UK)

  18. Preparation and properties of functional mixed-lipid liposomes by γ-ray irradiation

    International Nuclear Information System (INIS)

    Hosoi, Fumio; Omichi, Hideki; Akama, Kazuhiro; Awai, Kouji; Yano, Yoshihiro; Nakano, Yoshio

    1998-01-01

    The feature of mixed-lipid liposomes such as polymerization and polymerized liposomes stability were investigated to find means for producing red cells containing hemoglobin inside the liposomes. The surface pressure-area isotherm values of the mixed-lipid monolayer indicated 1-stearoyl-2-(2,4-octadecadienoyl)-glycero-3-phosphocholine (SOPC) to be immiscible in cholesterol (Chol) and stearic acid (SA), and each component to contain separate domains in the bilayer membrane of liposomes. Radiation induced polymerization of mixed-SOPC liposomes was carried out using γ-rays from 60 Co at 4degC to stabilize lipid bilayers. The polymer yield increased significantly by adding Chol and SA to SOPC. The rate of polymerization of SOPC liposomes increased linearly with increasing of dose rate. The molecular weight of the polymer decreased with an increase in irradiation time. Irradiated SOPC/Chol/SA liposome vesicle size was affected by freeze-thawing. The vesicle size did not change when SOPC/Chol/SA was present in the system due to the addition of immiscible saturated 1,2-dipalmitoyl-glycero-3-phosphocholine (DPPC). (author)

  19. A programmable artificial retina

    International Nuclear Information System (INIS)

    Bernard, T.M.; Zavidovique, B.Y.; Devos, F.J.

    1993-01-01

    An artificial retina is a device that intimately associates an imager with processing facilities on a monolithic circuit. Yet, except for simple environments and applications, analog hardware will not suffice to process and compact the raw image flow from the photosensitive array. To solve this output problem, an on-chip array of bare Boolean processors with halftoning facilities might be used, providing versatility from programmability. By setting the pixel memory size to 3 b, the authors have demonstrated both the technological practicality and the computational efficiency of this programmable Boolean retina concept. Using semi-static shifting structures together with some interaction circuitry, a minimal retina Boolean processor can be built with less than 30 transistors and controlled by as few as 6 global clock signals. The successful design, integration, and test of such a 65x76 Boolean retina on a 50-mm 2 CMOS 2-μm circuit are presented

  20. Reconfigurable radio-frequency arbitrary waveforms synthesized in a silicon photonic chip.

    Science.gov (United States)

    Wang, Jian; Shen, Hao; Fan, Li; Wu, Rui; Niu, Ben; Varghese, Leo T; Xuan, Yi; Leaird, Daniel E; Wang, Xi; Gan, Fuwan; Weiner, Andrew M; Qi, Minghao

    2015-01-12

    Photonic methods of radio-frequency waveform generation and processing can provide performance advantages and flexibility over electronic methods due to the ultrawide bandwidth offered by the optical carriers. However, bulk optics implementations suffer from the lack of integration and slow reconfiguration speed. Here we propose an architecture of integrated photonic radio-frequency generation and processing and implement it on a silicon chip fabricated in a semiconductor manufacturing foundry. Our device can generate programmable radio-frequency bursts or continuous waveforms with only the light source, electrical drives/controls and detectors being off-chip. It modulates an individual pulse in a radio-frequency burst within 4 ns, achieving a reconfiguration speed three orders of magnitude faster than thermal tuning. The on-chip optical delay elements offer an integrated approach to accurately manipulating individual radio-frequency waveform features without constraints set by the speed and timing jitter of electronics, and should find applications ranging from high-speed wireless to defence electronics.

  1. Integrated programmable photonic filter on the silicon -on- insulator platform

    DEFF Research Database (Denmark)

    Liao, Shasha; Ding, Yunhong; Peucheret, Christophe

    2014-01-01

    We propose and demonstrate a silicon - on - insulator (SOI) on - chip programmable filter based on a four - tap finite impulse response structure. The photonic filter is programmable thanks to amplitude and phase modulation of each tap controlled by thermal heater s. We further demonstrate...... the tunability of the filter central wavelength, bandwidth and variable passband shape. The tuning range of the central wavelength is at least 42% of the free spectral range. The bandwidth tuning range is at least half of the free spectral range. Our scheme has distinct advantages of compactness, capability...

  2. Silicon Chip-to-Chip Mode-Division Multiplexing

    DEFF Research Database (Denmark)

    Baumann, Jan Markus; Porto da Silva, Edson; Ding, Yunhong

    2018-01-01

    A chip-to-chip mode-division multiplexing connection is demonstrated using a pair of multiplexers/demultiplexers fabricated on the silicon-on-insulator platform. Successful mode multiplexing and demultiplexing is experimentally demonstrated, using the LP01, LP11a and LP11b modes.......A chip-to-chip mode-division multiplexing connection is demonstrated using a pair of multiplexers/demultiplexers fabricated on the silicon-on-insulator platform. Successful mode multiplexing and demultiplexing is experimentally demonstrated, using the LP01, LP11a and LP11b modes....

  3. Ship-Source Oil Pollution Fund annual report, 1991-1992

    International Nuclear Information System (INIS)

    1992-01-01

    The activities of the Ship-Source Oil Pollution Fund (SOPC) are reviewed for the fiscal year commencing 1 April 1991 and ending 31 March 1992. Topics covered include the Canadian compensation regime, activities of the International Oil Pollution Compensation Fund (to which the SOPC contributes), amendments to the Canada Shipping Act, United States legislation, the Haven incident, and the status of the fund. Twenty-three oil spill incidents are described along with actions taken, if any, by the SOPC and details of any claims paid by the SOPC or the international fund. 4 figs., 1 tab

  4. A High-Voltage Integrated Circuit Engine for a Dielectrophoresis-based Programmable Micro-Fluidic Processor

    Science.gov (United States)

    Current, K. Wayne; Yuk, Kelvin; McConaghy, Charles; Gascoyne, Peter R. C.; Schwartz, Jon A.; Vykoukal, Jody V.; Andrews, Craig

    2010-01-01

    A high-voltage (HV) integrated circuit has been demonstrated to transport droplets on programmable paths across its coated surface. This chip is the engine for a dielectrophoresis (DEP)-based micro-fluidic lab-on-a-chip system. This chip creates DEP forces that move and help inject droplets. Electrode excitation voltage and frequency are variable. With the electrodes driven with a 100V peak-to-peak periodic waveform, the maximum high-voltage electrode waveform frequency is about 200Hz. Data communication rate is variable up to 250kHz. This demonstration chip has a 32×32 array of nominally 100V electrode drivers. It is fabricated in a 130V SOI CMOS fabrication technology, dissipates a maximum of 1.87W, and is about 10.4 mm × 8.2 mm. PMID:23989241

  5. Mixed-signal early vision chip with embedded image and programming memories and digital I/O

    Science.gov (United States)

    Linan-Cembrano, Gustavo; Rodriguez-Vazquez, Angel; Dominguez-Castro, Rafael; Espejo, Servando

    2003-04-01

    From a system level perspective, this paper presents a 128x128 flexible and reconfigurable Focal-Plane Analog Programmable Array Processor, which has been designed as a single chip in a 0.35μm standard digital 1P-5M CMOS technology. The core processing array has been designed to achieve high-speed of operation and large-enough accuracy (~7bit) with low power consumption. The chip includes on-chip program memory to allow for the execution of complex, sequential and/or bifurcation flow image processing algorithms. It also includes the structures and circuits needed to guarantee its embedding into conventional digital hosting systems: external data interchange and control are completely digital. The chip contains close to four million transistors, 90% of them working in analog mode. The chip features up to 330GOPs (Giga Operations per second), and uses the power supply (180GOP/Joule) and the silicon area (3.8 GOPS/mm2) efficiently, as it is able to maintain VGA processing throughputs of 100Frames/s with about 15 basic image processing tasks on each frame.

  6. Efficient Design of OFDMA-Based Programmable Wireless Radios

    Directory of Open Access Journals (Sweden)

    Shah SFA

    2008-01-01

    Full Text Available With the increasing demand for efficient spectrum management, programmable wireless radios can potentially play a key role in shaping our future spectrum use. In this paper, we consider the design of low-power programmable wireless radios based on orthogonal frequency division multiple access (OFDMA. To meet the demands of higher data rate communications, we split OFDMA symbols carrying multiuser data across several noncontiguous bands of available spectrum. To relax power consumption in analog-to-digital and digital-to-analog converters, we use a programmable narrowband RF front end comprising of programmable synthesizers and fixed low-pass filters. To perform digital baseband signal processing in an energy efficient manner, we propose efficient designs for the fast Fourier transform (FFT and inverse FFT (IFFT modules. Our designs of the FFT/IFFT modules reduce power consumption and chip area, and are capable of handling the dynamic nature of spectrum in programmable radios. To recover data that falls within the transition band of the filters, we propose a combiner similar to maximal ratio combiner. We also present the complete design of programmable wireless radios in accordance with the IEEE 802.22 (draft standard.

  7. Efficient Design of OFDMA-Based Programmable Wireless Radios

    Directory of Open Access Journals (Sweden)

    A. H. Tewfik

    2008-03-01

    Full Text Available With the increasing demand for efficient spectrum management, programmable wireless radios can potentially play a key role in shaping our future spectrum use. In this paper, we consider the design of low-power programmable wireless radios based on orthogonal frequency division multiple access (OFDMA. To meet the demands of higher data rate communications, we split OFDMA symbols carrying multiuser data across several noncontiguous bands of available spectrum. To relax power consumption in analog-to-digital and digital-to-analog converters, we use a programmable narrowband RF front end comprising of programmable synthesizers and fixed low-pass filters. To perform digital baseband signal processing in an energy efficient manner, we propose efficient designs for the fast Fourier transform (FFT and inverse FFT (IFFT modules. Our designs of the FFT/IFFT modules reduce power consumption and chip area, and are capable of handling the dynamic nature of spectrum in programmable radios. To recover data that falls within the transition band of the filters, we propose a combiner similar to maximal ratio combiner. We also present the complete design of programmable wireless radios in accordance with the IEEE 802.22 (draft standard.

  8. Nano/CMOS architectures using a field-programmable nanowire interconnect

    International Nuclear Information System (INIS)

    Snider, Gregory S; Williams, R Stanley

    2007-01-01

    A field-programmable nanowire interconnect (FPNI) enables a family of hybrid nano/CMOS circuit architectures that generalizes the CMOL (CMOS/molecular hybrid) approach proposed by Strukov and Likharev, allowing for simpler fabrication, more conservative process parameters, and greater flexibility in the choice of nanoscale devices. The FPNI improves on a field-programmable gate array (FPGA) architecture by lifting the configuration bit and associated components out of the semiconductor plane and replacing them in the interconnect with nonvolatile switches, which decreases both the area and power consumption of the circuit. This is an example of a more comprehensive strategy for improving the efficiency of existing semiconductor technology: placing a level of intelligence and configurability in the interconnect can have a profound effect on integrated circuit performance, and can be used to significantly extend Moore's law without having to shrink the transistors. Compilation of standard benchmark circuits onto FPNI chip models shows reduced area (8 x to 25 x), reduced power, slightly lower clock speeds, and high defect tolerance-an FPNI chip with 20% defective junctions and 20% broken nanowires has an effective yield of 75% with no significant slowdown along the critical path, compared to a defect-free chip. Simulations show that the density and power improvements continue as both CMOS and nano fabrication parameters scale down, although the maximum clock rate decreases due to the high resistance of very small (<10 nm) metallic nanowires

  9. Low-power digital ASIC for on-chip spectral analysis of low-frequency physiological signals

    International Nuclear Information System (INIS)

    Nie Zedong; Zhang Fengjuan; Li Jie; Wang Lei

    2012-01-01

    A digital ASIC chip customized for battery-operated body sensing devices is presented. The ASIC incorporates a novel hybrid-architecture fast Fourier transform (FFT) unit that is capable of scalable spectral analysis, a licensed ARM7TDMI IP hardcore and several peripheral IP blocks. Extensive experimental results suggest that the complete chip works as intended. The power consumption of the FFT unit is 0.69 mW at 1 MHz with 1.8 V power supply. The low-power and programmable features of the ASIC make it suitable for ‘on-the-fly’ low-frequency physiological signal processing. (semiconductor integrated circuits)

  10. All optical programmable logic array (PLA)

    Science.gov (United States)

    Hiluf, Dawit

    2018-03-01

    A programmable logic array (PLA) is an integrated circuit (IC) logic device that can be reconfigured to implement various kinds of combinational logic circuits. The device has a number of AND and OR gates which are linked together to give output or further combined with more gates or logic circuits. This work presents the realization of PLAs via the physics of a three level system interacting with light. A programmable logic array is designed such that a number of different logical functions can be combined as a sum-of-product or product-of-sum form. We present an all optical PLAs with the aid of laser light and observables of quantum systems, where encoded information can be considered as memory chip. The dynamics of the physical system is investigated using Lie algebra approach.

  11. Flip chip assembly of thinned chips for hybrid pixel detector applications

    International Nuclear Information System (INIS)

    Fritzsch, T; Zoschke, K; Rothermund, M; Oppermann, H; Woehrmann, M; Ehrmann, O; Lang, K D; Huegging, F

    2014-01-01

    There is a steady trend to ultra-thin microelectronic devices. Especially for future particle detector systems a reduced readout chip thickness is required to limit the loss of tracking precision due to scattering. The reduction of silicon thickness is performed at wafer level in a two-step thinning process. To minimize the risk of wafer breakage the thinned wafer needs to be handled by a carrier during the whole process chain of wafer bumping. Another key process is the flip chip assembly of thinned readout chips onto thin sensor tiles. Besides the prevention of silicon breakage the minimization of chip warpage is one additional task for a high yield and reliable flip chip process. A new technology using glass carrier wafer will be described in detail. The main advantage of this technology is the combination of a carrier support during wafer processing and the chip support during flip chip assembly. For that a glass wafer is glue-bonded onto the backside of the thinned readout chip wafer. After the bump deposition process the glass-readout chip stack is diced in one step. Finally the glass carrier chip is released by laser illumination after flip chip assembly of the readout chip onto sensor tile. The results of the flip chip assembly process development for the ATLAS IBL upgrade are described more in detail. The new ATLAS FEI4B chip with a size of 20 × 19 mm 2 is flip chip bonded with a thickness of only 150 μm, but the capability of this technology has been demonstrated on hybrid modules with a reduced readout chip thickness of down to 50 μm which is a major step for ultra-thin electronic systems

  12. Implementation of a Customisable Readout Sequence for the ALICE ITS Upgrade Explorer Family Chips

    CERN Document Server

    Gazzari, Matthias

    2014-01-01

    Within the ALICE ITS upgrade R&D programme the Explorer family chips are developed featuring 11700 pixels which are split into 18 different sectors with different properties. These pixels are read out sequentially leading to a time span of 2.34ms between the first and last pixel. Due to the long readout time, shot noise induced by the leakage currents in the in-pixel analogue memories makes the comparison of different sensor implementations located in distant sectors on the Explorer family chips difficult. In order to reduce this noise contribution a customisable readout sequence is developed to read parts instead of the whole chip which reduces the overall readout time. This readout sequence is integrated in the existing characterisation framework in order to choose the best performing sensor implementation through pixel-by-pixel comparison without readout-induced effects.

  13. FPGA-Based HD Camera System for the Micropositioning of Biomedical Micro-Objects Using a Contactless Micro-Conveyor

    Directory of Open Access Journals (Sweden)

    Elmar Yusifli

    2017-03-01

    Full Text Available With recent advancements, micro-object contactless conveyers are becoming an essential part of the biomedical sector. They help avoid any infection and damage that can occur due to external contact. In this context, a smart micro-conveyor is devised. It is a Field Programmable Gate Array (FPGA-based system that employs a smart surface for conveyance along with an OmniVision complementary metal-oxide-semiconductor (CMOS HD camera for micro-object position detection and tracking. A specific FPGA-based hardware design and VHSIC (Very High Speed Integrated Circuit Hardware Description Language (VHDL implementation are realized. It is done without employing any Nios processor or System on a Programmable Chip (SOPC builder based Central Processing Unit (CPU core. It keeps the system efficient in terms of resource utilization and power consumption. The micro-object positioning status is captured with an embedded FPGA-based camera driver and it is communicated to the Image Processing, Decision Making and Command (IPDC module. The IPDC is programmed in C++ and can run on a Personal Computer (PC or on any appropriate embedded system. The IPDC decisions are sent back to the FPGA, which pilots the smart surface accordingly. In this way, an automated closed-loop system is employed to convey the micro-object towards a desired location. The devised system architecture and implementation principle is described. Its functionality is also verified. Results have confirmed the proper functionality of the developed system, along with its outperformance compared to other solutions.

  14. Ship-Source Oil Pollution Fund annual report, 1992-1993

    International Nuclear Information System (INIS)

    1993-01-01

    The activities of the Ship-Source Oil Pollution Fund (SOPC) are reviewed for the fiscal year commencing 1 April 1992 and ending 31 March 1993. Topics covered include the Canadian compensation regime, activities of the International Oil Pollution Compensation Fund (to which the SOPC contributes), amendments to the Canada Shipping Act, major international incidents, the International Conference on the Revision of the 1969 Civil Liability Convention and the 1971 Fund Convention, the 1993 Oil Spill Conference, and the status of the fund. Twenty-nine oil spill incidents are described along with actions taken, if any, by the SOPC and details of any claims paid by the SOPC or the international fund. 3 figs

  15. FY1995 evolvable hardware chip; 1995 nendo shinkasuru hardware chip

    Energy Technology Data Exchange (ETDEWEB)

    NONE

    1997-03-01

    This project aims at the development of 'Evolvable Hardware' (EHW) which can adapt its hardware structure to the environment to attain better hardware performance, under the control of genetic algorithms. EHW is a key technology to explore the new application area requiring real-time performance and on-line adaptation. 1. Development of EHW-LSI for function level hardware evolution, which includes 15 DSPs in one chip. 2. Application of the EHW to the practical industrial applications such as data compression, ATM control, digital mobile communication. 3. Two patents : (1) the architecture and the processing method for programmable EHW-LSI. (2) The method of data compression for loss-less data, using EHW. 4. The first international conference for evolvable hardware was held by authors: Intl. Conf. on Evolvable Systems (ICES96). It was determined at ICES96 that ICES will be held every two years between Japan and Europe. So the new society has been established by us. (NEDO)

  16. FY1995 evolvable hardware chip; 1995 nendo shinkasuru hardware chip

    Energy Technology Data Exchange (ETDEWEB)

    NONE

    1997-03-01

    This project aims at the development of 'Evolvable Hardware' (EHW) which can adapt its hardware structure to the environment to attain better hardware performance, under the control of genetic algorithms. EHW is a key technology to explore the new application area requiring real-time performance and on-line adaptation. 1. Development of EHW-LSI for function level hardware evolution, which includes 15 DSPs in one chip. 2. Application of the EHW to the practical industrial applications such as data compression, ATM control, digital mobile communication. 3. Two patents : (1) the architecture and the processing method for programmable EHW-LSI. (2) The method of data compression for loss-less data, using EHW. 4. The first international conference for evolvable hardware was held by authors: Intl. Conf. on Evolvable Systems (ICES96). It was determined at ICES96 that ICES will be held every two years between Japan and Europe. So the new society has been established by us. (NEDO)

  17. Wood chips procurement and research project at the Mikkeli region; Puuhakkeen hankinta- ja tutkimusprojekti Mikkelin seudulla

    Energy Technology Data Exchange (ETDEWEB)

    Saksa, T [Finnish Forest Research Inst., Suonenjoki (Finland). Suonenjoki Research Station; Auvinen, P [Mikkeli city (Finland). Dept. of Agriculture and Forestry

    1997-12-31

    In 1993-94, a large-scale energywood production chain started as a co-operation project by the Mikkeli city forest office and local forestry societies. In 1995 over 115 000 m{sup 3} (about 85 000 MWh of energy) of wood chips were delivered to Pursiala heat and power plant in Mikkeli. About 75 % of these chips was forest processed chips. About 70 % of the forest processed chips was whole tree chips from improvement cuttings of young forest stands and the rest was logging waste chips from regeneration cutting areas. The average total delivery costs of forest processed chips after reduction of energywood and other subsidies were approximately 45 FIM/m{sup 3} (60 FIM/MWh) for the whole tree chips and 38 FIM/m{sup 3} (50 FIM/MWh) for logging waste chips. The delivery costs of forest processed chips could meet the target of Bioenergy Research Programme (45 FIM/MWh) only in the most favourable cases. In an average the delivery costs were about 9 FIM/MWh more than the price obtained when sold to the heat and power plant. However the wood chip production created 27 new jobs and the increase of income to the local economy was about 2.2 milj. FIM /year. The local communities got new tax revenue about 3 FIM/MWh. The gain for the forestry was approximated to be 5 - 6 FIM/MWh. The resources of forest processed chips were studied on the basis of stand measurements. According to the study the most remarkable energywood resources were in young thinning stands on Oxalis-Myrtillus and Myrtillus forest site types. On Oxalis-Myrtillus type almost every and on Myrtillus type every second stand included energywood more than 40 m{sup 3}/ha

  18. Wood chips procurement and research project at the Mikkeli region; Puuhakkeen hankinta- ja tutkimusprojekti Mikkelin seudulla

    Energy Technology Data Exchange (ETDEWEB)

    Saksa, T. [Finnish Forest Research Inst., Suonenjoki (Finland). Suonenjoki Research Station; Auvinen, P. [Mikkeli city (Finland). Dept. of Agriculture and Forestry

    1996-12-31

    In 1993-94, a large-scale energywood production chain started as a co-operation project by the Mikkeli city forest office and local forestry societies. In 1995 over 115 000 m{sup 3} (about 85 000 MWh of energy) of wood chips were delivered to Pursiala heat and power plant in Mikkeli. About 75 % of these chips was forest processed chips. About 70 % of the forest processed chips was whole tree chips from improvement cuttings of young forest stands and the rest was logging waste chips from regeneration cutting areas. The average total delivery costs of forest processed chips after reduction of energywood and other subsidies were approximately 45 FIM/m{sup 3} (60 FIM/MWh) for the whole tree chips and 38 FIM/m{sup 3} (50 FIM/MWh) for logging waste chips. The delivery costs of forest processed chips could meet the target of Bioenergy Research Programme (45 FIM/MWh) only in the most favourable cases. In an average the delivery costs were about 9 FIM/MWh more than the price obtained when sold to the heat and power plant. However the wood chip production created 27 new jobs and the increase of income to the local economy was about 2.2 milj. FIM /year. The local communities got new tax revenue about 3 FIM/MWh. The gain for the forestry was approximated to be 5 - 6 FIM/MWh. The resources of forest processed chips were studied on the basis of stand measurements. According to the study the most remarkable energywood resources were in young thinning stands on Oxalis-Myrtillus and Myrtillus forest site types. On Oxalis-Myrtillus type almost every and on Myrtillus type every second stand included energywood more than 40 m{sup 3}/ha

  19. Prototyping the HPDP Chip on STM 65 NM Process

    Science.gov (United States)

    Papadas, C.; Dramitinos, G.; Syed, M.; Helfers, T.; Dedes, G.; Schoellkopf, J.-P.; Dugoujon, L.

    2011-08-01

    Currently Astrium GmbH is involved in the of the High Performance Data Processor (HPDP) development programme for telecommunication applications under a DLR contract. The HPDP project targets the implementation of the commercially available reconfigurable array processor IP (XPP from the company PACT XPP Technologies) in a radiation hardened technology.In the current complementary development phase funded under the Greek Industry Incentive scheme, it is planned to prototype the HPDP chip in commercial STM 65 nm technology. In addition it is also planned to utilise the preliminary radiation hardened components of this library wherever possible.This abstract gives an overview of the HPDP chip architecture, the basic details of the STM 65 nm process and the design flow foreseen for the prototyping. The paper will discuss the development and integration issues involved in using the STM 65 nm process (also including the available preliminary radiation hardened components) for designs targeted to be used in space applications.

  20. Driving the SID chip: Assembly language, composition, and sound design for the C64

    Directory of Open Access Journals (Sweden)

    James Newman

    2017-12-01

    Full Text Available The MOS6581, more commonly known as the Sound Interface Device, or SID chip, was the sonic heart of the Commodore 64 home computer. By considering the chip’s development, specification, uses and creative abuses by composers and programmers, alongside its continuing legacy, this paper argues that, more than any other device, the SID chip is responsible for shaping the sound of videogame music. Compared with the brutal atonality of chips such as Atari’s TIA, the SID chip offers a complex 3-channel synthesizer with dynamic waveform selection, per-channel ADSR envelopes, multi-mode filter, ring and cross modulation. However, while the specification is sophisticated, the exploitation of the vagaries and imperfections of the chip are just as significant to its sonic character. As such, the compositional, sound design and programming techniques developed by 1980s composer-coders like Rob Hubbard and Martin Galway are central in defining the distinctive sound of C64 gameplay. Exploring the affordances of the chip and the distinctive ways they were harnessed, the argument of this paper centers on the inexorable link between the technological and the musical. Crucially, composers like Hubbard et al. developed their own bespoke low-level drivers to interface with the SID chip to create pseudo-polyphony through rapid arpeggiation and channel sharing, drum synthesis through waveform manipulation, portamento, and even sample playback. This paper analyses the indivisibility of sound design, synthesis and composition in the birth of these musical forms and aesthetics, and assesses their impact on what would go on to be defined as chiptunes.

  1. High-Resolution Digital-to-Time Converter Implemented in an FPGA Chip

    Directory of Open Access Journals (Sweden)

    Hai Wang

    2017-01-01

    Full Text Available This paper presents the design and implementation of a new digital-to-time converter (DTC. The obtained resolution is 1.02 ps, and the dynamic range is about 590 ns. The experimental results indicate that the measured differential nonlinearity (DNL and integral nonlinearity (INL are −0.17~+0.13 LSB and −0.35~+0.62 LSB, respectively. This DTC builds coarse and fine Vernier delay lines constructed by programmable delay lines (PDLs to ensure high performance delay. Benefited by the close-loop feedback mechanism of the PDLs’ control module, the presented DTC has excellent voltage and temperature stability. What is more, the proposed DTC can be implemented in a single field programmable gate array (FPGA chip.

  2. Flip chip assembly of thinned chips for hybrid pixel detector applications

    CERN Document Server

    Fritzsch, T; Woehrmann, M; Rothermund, M; Huegging, F; Ehrmann, O; Oppermann, H; Lang, K.D

    2014-01-01

    There is a steady trend to ultra-thin microelectronic devices. Especially for future particle detector systems a reduced readout chip thickness is required to limit the loss of tracking precision due to scattering. The reduction of silicon thickness is performed at wafer level in a two-step thinning process. To minimize the risk of wafer breakage the thinned wafer needs to be handled by a carrier during the whole process chain of wafer bumping. Another key process is the flip chip assembly of thinned readout chips onto thin sensor tiles. Besides the prevention of silicon breakage the minimization of chip warpage is one additional task for a high yield and reliable flip chip process. A new technology using glass carrier wafer will be described in detail. The main advantage of this technology is the combination of a carrier support during wafer processing and the chip support during flip chip assembly. For that a glass wafer is glue-bonded onto the backside of the thinned readout chip wafer. After the bump depo...

  3. The NutriChip project--translating technology into nutritional knowledge.

    Science.gov (United States)

    Vergères, Guy; Bogicevic, Biljana; Buri, Caroline; Carrara, Sandro; Chollet, Magali; Corbino-Giunta, Linda; Egger, Lotti; Gille, Doreen; Kopf-Bolanz, Katrin; Laederach, Kurt; Portmann, Reto; Ramadan, Qasem; Ramsden, Jeremy; Schwander, Flurina; Silacci, Paolo; Walther, Barbara; Gijs, Martin

    2012-09-01

    Advances in food transformation have dramatically increased the diversity of products on the market and, consequently, exposed consumers to a complex spectrum of bioactive nutrients whose potential risks and benefits have mostly not been confidently demonstrated. Therefore, tools are needed to efficiently screen products for selected physiological properties before they enter the market. NutriChip is an interdisciplinary modular project funded by the Swiss programme Nano-Tera, which groups scientists from several areas of research with the aim of developing analytical strategies that will enable functional screening of foods. The project focuses on postprandial inflammatory stress, which potentially contributes to the development of chronic inflammatory diseases. The first module of the NutriChip project is composed of three in vitro biochemical steps that mimic the digestion process, intestinal absorption, and subsequent modulation of immune cells by the bioavailable nutrients. The second module is a miniaturised form of the first module (gut-on-a-chip) that integrates a microfluidic-based cell co-culture system and super-resolution imaging technologies to provide a physiologically relevant fluid flow environment and allows sensitive real-time analysis of the products screened in vitro. The third module aims at validating the in vitro screening model by assessing the nutritional properties of selected food products in humans. Because of the immunomodulatory properties of milk as well as its amenability to technological transformation, dairy products have been selected as model foods. The NutriChip project reflects the opening of food and nutrition sciences to state-of-the-art technologies, a key step in the translation of transdisciplinary knowledge into nutritional advice.

  4. Bioprinting of 3D Convoluted Renal Proximal Tubules on Perfusable Chips

    Science.gov (United States)

    Homan, Kimberly A.; Kolesky, David B.; Skylar-Scott, Mark A.; Herrmann, Jessica; Obuobi, Humphrey; Moisan, Annie; Lewis, Jennifer A.

    2016-10-01

    Three-dimensional models of kidney tissue that recapitulate human responses are needed for drug screening, disease modeling, and, ultimately, kidney organ engineering. Here, we report a bioprinting method for creating 3D human renal proximal tubules in vitro that are fully embedded within an extracellular matrix and housed in perfusable tissue chips, allowing them to be maintained for greater than two months. Their convoluted tubular architecture is circumscribed by proximal tubule epithelial cells and actively perfused through the open lumen. These engineered 3D proximal tubules on chip exhibit significantly enhanced epithelial morphology and functional properties relative to the same cells grown on 2D controls with or without perfusion. Upon introducing the nephrotoxin, Cyclosporine A, the epithelial barrier is disrupted in a dose-dependent manner. Our bioprinting method provides a new route for programmably fabricating advanced human kidney tissue models on demand.

  5. On-chip concentration of bacteria using a 3D dielectrophoretic chip and subsequent laser-based DNA extraction in the same chip

    International Nuclear Information System (INIS)

    Cho, Yoon-Kyoung; Kim, Tae-hyeong; Lee, Jeong-Gun

    2010-01-01

    We report the on-chip concentration of bacteria using a dielectrophoretic (DEP) chip with 3D electrodes and subsequent laser-based DNA extraction in the same chip. The DEP chip has a set of interdigitated Au post electrodes with 50 µm height to generate a network of non-uniform electric fields for the efficient trapping by DEP. The metal post array was fabricated by photolithography and subsequent Ni and Au electroplating. Three model bacteria samples (Escherichia coli, Staphylococcus epidermidis, Streptococcus mutans) were tested and over 80-fold concentrations were achieved within 2 min. Subsequently, on-chip DNA extraction from the concentrated bacteria in the 3D DEP chip was performed by laser irradiation using the laser-irradiated magnetic bead system (LIMBS) in the same chip. The extracted DNA was analyzed with silicon chip-based real-time polymerase chain reaction (PCR). The total process of on-chip bacteria concentration and the subsequent DNA extraction can be completed within 10 min including the manual operation time.

  6. Chips 2020

    CERN Document Server

    2016-01-01

    The release of this second volume of CHIPS 2020 coincides with the 50th anniversary of Moore’s Law, a critical year marked by the end of the nanometer roadmap and by a significantly reduced annual rise in chip performance. At the same time, we are witnessing a data explosion in the Internet, which is consuming 40% more electrical power every year, leading to fears of a major blackout of the Internet by 2020. The messages of the first CHIPS 2020, published in 2012, concerned the realization of quantum steps for improving the energy efficiency of all chip functions. With this second volume, we review these messages and amplify upon the most promising directions: ultra-low-voltage electronics, nanoscale monolithic 3D integration, relevant-data, brain- and human-vision-inspired processing, and energy harvesting for chip autonomy. The team of authors, enlarged by more world leaders in low-power, monolithic 3D, video, and Silicon brains, presents new vistas in nanoelectronics, promising  Moore-like exponential g...

  7. Automated Software Acceleration in Programmable Logic for an Efficient NFFT Algorithm Implementation: A Case Study.

    Science.gov (United States)

    Rodríguez, Manuel; Magdaleno, Eduardo; Pérez, Fernando; García, Cristhian

    2017-03-28

    Non-equispaced Fast Fourier transform (NFFT) is a very important algorithm in several technological and scientific areas such as synthetic aperture radar, computational photography, medical imaging, telecommunications, seismic analysis and so on. However, its computation complexity is high. In this paper, we describe an efficient NFFT implementation with a hardware coprocessor using an All-Programmable System-on-Chip (APSoC). This is a hybrid device that employs an Advanced RISC Machine (ARM) as Processing System with Programmable Logic for high-performance digital signal processing through parallelism and pipeline techniques. The algorithm has been coded in C language with pragma directives to optimize the architecture of the system. We have used the very novel Software Develop System-on-Chip (SDSoC) evelopment tool that simplifies the interface and partitioning between hardware and software. This provides shorter development cycles and iterative improvements by exploring several architectures of the global system. The computational results shows that hardware acceleration significantly outperformed the software based implementation.

  8. Price of forest chips decreasing

    International Nuclear Information System (INIS)

    Hakkila, P.

    2001-01-01

    Use of forest chips was studied in 1999 in the national Puuenergia (Wood Energy) research program. Wood combusting heating plants were questioned about are the main reasons restricting the increment of the use of forest chips. Heating plants, which did not use forest chips at all or which used less than 250 m 3 (625 bulk- m 3 ) in 1999 were excluded. The main restrictions for additional use of forest chips were: too high price of forest chips; lack of suppliers and/or uncertainty of deliveries; technical problems of reception and processing of forest chips; insufficiency of boiler output especially in winter; and unsatisfactory quality of chips. The price of forest chips becomes relatively high because wood biomass used for production of forest chips has to be collected from wide area. Heavy equipment has to be used even though small fragments of wood are processed, which increases the price of chips. It is essential for forest chips that the costs can be pressed down because competition with fossil fuels, peat and industrial wood residues is hard. Low market price leads to the situation in which forest owner gets no price of the raw material, the entrepreneurs operate at the limit of profitability and renovation of machinery is difficult, and forest chips suppliers have to sell the chips at prime costs. Price of forest chips has decreased significantly during the past decade. Nominal price of forest chips is now lower than two decades ago. The real price of chips has decreased even more than the nominal price, 35% during the past decade and 20% during the last five years. Chips, made of small diameter wood, are expensive because the price includes the felling costs and harvesting is carried out at thinning lots. Price is especially high if chips are made of delimbed small diameter wood due to increased the work and reduced amount of chips. The price of logging residue chips is most profitable because cutting does not cause additional costs. Recovery of chips is

  9. Programmable trigger for electron pairs in ring image Cherenkov counters

    International Nuclear Information System (INIS)

    Glab, J.; Baur, R.; Manner, R.

    1990-01-01

    This paper describes a programmable trigger processor for the recognition of Cherenkov rings in a RICH counter. It identifies open electron pairs and suppresses close conversion and Dalitz pairs within 20 μs. More generally, the system can be used for correlating pixel images with pattern masks in order to locate all relatively well defined patterns of a certain type. The trigger processor consists of a systolic processor array of 160 x 176, i.e., 28,160 identical processing elements (PEs) that filter out open electron pairs, and a pseudo adder array that determines whether there was at least one such pair. The processor array is assembled of 20 x 22 VLSI chips containing 8 x 8 PEs each. The semi-custom chip has been developed in 2 μ CMOS standard cell technology

  10. LHCb: Radiation hard programmable delay line for LHCb Calorimeter Upgrade

    CERN Multimedia

    Mauricio Ferre, J; Vilasís Cardona, X; Picatoste Olloqui, E; Machefert, F; Lefrançois, J; Duarte, O

    2013-01-01

    This poster describes the implementation of a SPI-programmable clock delay chip based on a Delay Locked Loop (DLL) in order to shift the phase of the LHC clock (25 ns) in steps of 1ns, with a 4ps jitter and 18ps of DNL. The delay lines will be integrated into ICECAL, the LHCb calorimeter front-end ASIC in the near future. The stringent noise requirements on the ASIC imply minimizing the noise contribution of digital components. This is accomplished by implementing the DLL in differential mode. To achieve the required radiation tolerance several techniques are applied: double guard rings between PMOS and NMOS transistors as well as glitch suppressors and TMR Registers. This 5.7 mm2 chip has been implemented in CMOS 0.35um technology.

  11. Soft error evaluation and vulnerability analysis in Xilinx Zynq-7010 system-on chip

    Energy Technology Data Exchange (ETDEWEB)

    Du, Xuecheng; He, Chaohui; Liu, Shuhuan, E-mail: liushuhuan@mail.xjtu.edu.cn; Zhang, Yao; Li, Yonghong; Xiong, Ceng; Tan, Pengkang

    2016-09-21

    Radiation-induced soft errors are an increasingly important threat to the reliability of modern electronic systems. In order to evaluate system-on chip's reliability and soft error, the fault tree analysis method was used in this work. The system fault tree was constructed based on Xilinx Zynq-7010 All Programmable SoC. Moreover, the soft error rates of different components in Zynq-7010 SoC were tested by americium-241 alpha radiation source. Furthermore, some parameters that used to evaluate the system's reliability and safety were calculated using Isograph Reliability Workbench 11.0, such as failure rate, unavailability and mean time to failure (MTTF). According to fault tree analysis for system-on chip, the critical blocks and system reliability were evaluated through the qualitative and quantitative analysis.

  12. Universal lab-on-a-chip platform for complex, perfused 3D cell cultures

    Science.gov (United States)

    Sonntag, F.; Schmieder, F.; Ströbel, J.; Grünzner, S.; Busek, M.; Günther, K.; Steege, T.; Polk, C.; Klotzbach, U.

    2016-03-01

    The miniaturization, rapid prototyping and automation of lab-on-a-chip technology play nowadays a very important role. Lab-on-a-chip technology is successfully implemented not only for environmental analysis and medical diagnostics, but also as replacement of animals used for the testing of substances in the pharmaceutical and cosmetics industries. For that purpose the Fraunhofer IWS and partners developed a lab-on-a-chip platform for perfused cell-based assays in the last years, which includes different micropumps, valves, channels, reservoirs and customized cell culture modules. This technology is already implemented for the characterization of different human cell cultures and organoids, like skin, liver, endothelium, hair follicle and nephron. The advanced universal lab-on-a-chip platform for complex, perfused 3D cell cultures is divided into a multilayer basic chip with integrated micropump and application-specific 3D printed cell culture modules. Moreover a technology for surface modification of the printed cell culture modules by laser micro structuring and a complex and flexibly programmable controlling device based on an embedded Linux system was developed. A universal lab-on-a-chip platform with an optional oxygenator and a cell culture module for cubic scaffolds as well as first cell culture experiments within the cell culture device will be presented. The module is designed for direct interaction with robotic dispenser systems. This offers the opportunity to combine direct organ printing of cells and scaffolds with the microfluidic cell culture module. The characterization of the developed system was done by means of Micro-Particle Image Velocimetry (μPIV) and an optical oxygen measuring system.

  13. STUDY OF CHIP IGNITION AND CHIP MORPHOLOGY AFTER MILLING OF MAGNESIUM ALLOYS

    Directory of Open Access Journals (Sweden)

    Ireneusz Zagórski

    2016-12-01

    Full Text Available The paper analyses the impact of specified technological parameters of milling (vc, fz, ap on time to ignition. Stages leading to chip ignition were analysed. Metallographic images of magnesium chip were presented. No significant difference was observed in time to ignition in different chip fractions. Moreover, the surface of chips was free of products of ignition and signs of strong oxidation.

  14. The Advances, Challenges and Future Possibilities of Millimeter-Wave Chip-to-Chip Interconnections for Multi-Chip Systems

    Directory of Open Access Journals (Sweden)

    Amlan Ganguly

    2018-02-01

    Full Text Available With aggressive scaling of device geometries, density of manufacturing faults is expected to increase. Therefore, yield of complex Multi-Processor Systems-on-Chips (MP-SoCs will decrease due to higher probability of manufacturing defects especially, in dies with large area. Therefore, disintegration of large SoCs into smaller chips called chiplets will improve yield and cost of complex platform-based systems. This will also provide functional flexibility, modular scalability as well as the capability to integrate heterogeneous architectures and technologies in a single unit. However, with scaling of the number of chiplets in such a system, the shared resources in the system such as the interconnection fabric and memory modules will become performance bottlenecks. Additionally, the integration of heterogeneous chiplets operating at different frequencies and voltages can be challenging. State-of-the-art inter-chip communication requires power-hungry high-speed I/O circuits and data transfer over long wired traces on substrates. This increases energy consumption and latency while decreasing data bandwidth for chip-to-chip communication. In this paper, we explore the advances and the challenges of interconnecting a multi-chip system with millimeter-wave (mm-wave wireless interconnects from a variety of perspectives spanning multiple aspects of the wireless interconnection design. Our discussion on the recent advances include aspects such as interconnection topology, physical layer, Medium Access Control (MAC and routing protocols. We also present some potential paradigm-shifting applications as well as complementary technologies of wireless inter-chip communications.

  15. Programmable optical processor chips: toward photonic RF filters with DSP-level flexibility and MHz-band selectivity

    Directory of Open Access Journals (Sweden)

    Xie Yiwei

    2017-12-01

    Full Text Available Integrated optical signal processors have been identified as a powerful engine for optical processing of microwave signals. They enable wideband and stable signal processing operations on miniaturized chips with ultimate control precision. As a promising application, such processors enables photonic implementations of reconfigurable radio frequency (RF filters with wide design flexibility, large bandwidth, and high-frequency selectivity. This is a key technology for photonic-assisted RF front ends that opens a path to overcoming the bandwidth limitation of current digital electronics. Here, the recent progress of integrated optical signal processors for implementing such RF filters is reviewed. We highlight the use of a low-loss, high-index-contrast stoichiometric silicon nitride waveguide which promises to serve as a practical material platform for realizing high-performance optical signal processors and points toward photonic RF filters with digital signal processing (DSP-level flexibility, hundreds-GHz bandwidth, MHz-band frequency selectivity, and full system integration on a chip scale.

  16. Chip-to-Chip Half Duplex Spiking Data Communication over Power Supply Rails

    Science.gov (United States)

    Hashida, Takushi; Nagata, Makoto

    Chip-to-chip serial data communication is superposed on power supply over common Vdd/Vss connections through chip, package, and board traces. A power line transceiver demonstrates half duplex spiking communication at more than 100Mbps. A pair of transceivers consumes 1.35mA from 3.3V, at 130Mbps. On-chip power line LC low pass filter attenuates pseudo-differential communication spikes by 30dB, purifying power supply current for internal circuits. Bi-directional spiking communication was successfully examined in a 90-nm CMOS prototype setup of on-chip waveform capturing. A micro controller forwards clock pulses to and receives data streams from a comparator based waveform capturer formed on a different chip, through a single pair of power and ground traces. The bit error rate is small enough not to degrade waveform acquisition capability, maintaining the spurious free dynamic range of higher than 50dB.

  17. A Neuromorphic Approach for Tracking using Dynamic Neural Fields on a Programmable Vision-chip

    OpenAIRE

    Martel Julien N.P.; Sandamirskaya Yulia

    2016-01-01

    In artificial vision applications, such as tracking, a large amount of data captured by sensors is transferred to processors to extract information relevant for the task at hand. Smart vision sensors offer a means to reduce the computational burden of visual processing pipelines by placing more processing capabilities next to the sensor. In this work, we use a vision-chip in which a small processor with memory is located next to each photosensitive element. The architecture of this device is ...

  18. A proposed holistic approach to on-chip, off-chip, test, and package interconnections

    Science.gov (United States)

    Bartelink, Dirk J.

    1998-11-01

    The term interconnection has traditionally implied a `robust' connection from a transistor or a group of transistors in an IC to the outside world, usually a PC board. Optimum system utilization is done from outside the IC. As an alternative, this paper addresses `unimpeded' transistor-to-transistor interconnection aimed at reaching the high circuit densities and computational capabilities of neighboring IC's. In this view, interconnections are not made to some human-centric place outside the IC world requiring robustness—except for system input and output connections. This unimpeded interconnect style is currently available only through intra-chip signal traces in `system-on-a-chip' implementations, as exemplified by embedded DRAMs. Because the traditional off-chip penalty in performance and wiring density is so large, a merging of complex process technologies is the only option today. It is suggested that, for system integration to move forward, the traditional robustness requirement inherited from conventional packaging interconnect and IC manufacturing test must be discarded. Traditional system assembly from vendor parts requires robustness under shipping, inspection and assembly. The trend toward systems on a chip signifies willingness by semiconductor companies to design and fabricate whole systems in house, so that `in-house' chip-to-chip assembly is not beyond reach. In this scenario, bare chips never leave the controlled environment of the IC fabricator while the two major contributors to off-chip signal penalty, ESD protection and the need to source a 50-ohm test head, are avoided. With in-house assembly, ESD protection can be eliminated with the precautions already familiar in plasma etching. Test interconnection impacts the fundamentals of IC manufacturing, particularly with clock speeds approaching 1GHz, and cannot be an afterthought. It should be an integral part of the chip-to-chip interconnection bandwidth optimization, because—as we must

  19. A scalable single-chip multi-processor architecture with on-chip RTOS kernel

    NARCIS (Netherlands)

    Theelen, B.D.; Verschueren, A.C.; Reyes Suarez, V.V.; Stevens, M.P.J.; Nunez, A.

    2003-01-01

    Now that system-on-chip technology is emerging, single-chip multi-processors are becoming feasible. A key problem of designing such systems is the complexity of their on-chip interconnects and memory architecture. It is furthermore unclear at what level software should be integrated. An example of a

  20. The ALTRO Chip A 16-channel A/D Converter and Digital Processor for Gas Detectors

    CERN Document Server

    Esteve-Bosch, R; Mota, B; Musa, L

    2003-01-01

    The ALTRO (ALICE TPC Read Out) chip is a mixed-signal integrated circuit designed to be one of the building blocks of the readout electronics for gas detectors. Originally conceived and optimised for the Time Projection Chamber (TPC) of the ALICE experiment at the CERN LHC, its architecture and programmability makes it suitable for the readout of a wider class of gas detectors. In one single chip, the analogue signals from 16 channels are digitised, processed, compressed and stored in a multi-acquisition memory. The Analogue-to- Digital converters embedded in the chip have a 10-bit dynamic range and a maximum sampling rate in the range of 20 to 40MHz. After digitisation, a pipelined hardwired Processor is able to remove from the input signal a wide range of systematic and non-systematic perturbations, related to the non-ideal behaviour of the detector, temperature variation of the electronics, environmental noise, etc. Moreover, the Processor is able to suppress the signal tail within 1mus after the pulse pea...

  1. Chip compacting press; Jido kirikuzu asshukuki

    Energy Technology Data Exchange (ETDEWEB)

    Oura, K. [Yuken Kogyo Co. Ltd., Kanagawa (Japan)

    1998-08-15

    The chips exhausted from various machine tools are massy, occupy much space and make working environment worse by staying added cutting oil to lower part. The chips are exhausted as a result of machining and have not constant quality. Even if used material is same the chips have various shapes and properties by kinds and machining methods of used machine tools, and are troublesome materials from a standpoint of their treatment. Pressing and solidification of the chips have frequently been tried. A chip compacting press introduced in this paper, a relatively cheap chip compacting press aimed for relatively small scale chip treatment, and has such characteristics and effects as follows. Chips are pressed and solidified by each raw material, so fractional management can be easily conducted. As casting metal chips and curled chips of iron and aluminum can be pressed to about 1/3 to 1/5 and about 1/40, respectively, space saving can be conducted. Chip compacting pressing upgrades its transporting efficiency to make possible to reduce its transporting cost. As chip solidification controls its oxidation and most cutting oil are removed, chips are easy to recycle. 2 figs., 1 tab.

  2. On-chip electrochromic micro display for a disposable bio-sensor chip

    Science.gov (United States)

    Zhu, Yanjun; Tsukamoto, Takashiro; Tanaka, Shuji

    2017-12-01

    This paper reports an on-chip electrochromic micro display made of polyaniline (PANi) which can be easily made on a CMOS chip. Micro-patterned PANi thin films were selectively deposited on pre-patterned microelectrodes by using electrodeposition. The optimum conditions for deposition and electrochromism were investigated. An 8-pixel on-chip micro display was made on a Si chip. The color of each PANi film could be independently but simultaneously controlled, which means any 1-byte digital data could be displayed on the display. The PANi display had a response time as fast as about 100 ms, which means the transfer data rate was as fast as 80 bits per second.

  3. Development of control system for multi-converter High voltage Power supply using programmable SoC

    Science.gov (United States)

    Dave, Rasesh; Dharangutti, Jagruti; Singh, N. P.; Thakar, Aruna; Dhola, Hitesh; Gajjar, Sandip; Parmar, Darshan; Zaveri, Tanish; Baruah, Ujjwal

    2017-04-01

    Multi-converter based High Voltage Power Supplies (HVPSs) find application in multi-megawatt accelerators, RF systems. Control system for HVPS must be a combination of superior parallel processing, real time performance, fast computation and versatile connectivity. The hardware platform is expected to be robust, easily scalable for future developments with minimal overheads. This paper describes development of control system on Zynq All Programmable SoC (System on Chip) for HVPS. Typical HVPS control mechanism involves communication, generation of precise control signals/pulses for few hundred numbers of chopper and closed loop control in microsecond range for regulated output. Such kind of requirements can be met with Zynq All Programmable SoC, which is a combination of Dual core ARM Cortex A-9 Processing System (PS) and Xilinx 7 series FPGA based Programmable Logic (PL). Deterministic functions of power supply control system such as generation of control signals with precise inter-channel delay of nanosecond range and communication with individual chopper at 100kbps can be implemented on PL. PS should implement corrective tasks based on field feedback received from individual chopper, user interface and OS management that allows to take full advantage of system capabilities. PS and PL are connected with on-chip AXI-4 interface with low latency and higher bandwidth through 9 AXI ports. Typically PS boots first, this ensures secure booting and prevents external environment from tampering PL.

  4. Design and implementation of a reconfigurable mixed-signal SoC based on field programmable analog arrays

    Science.gov (United States)

    Liu, Lintao; Gao, Yuhan; Deng, Jun

    2017-11-01

    This work presents a reconfigurable mixed-signal system-on-chip (SoC), which integrates switched-capacitor-based field programmable analog arrays (FPAA), analog-to-digital converter (ADC), digital-to-analog converter, digital down converter , digital up converter, 32-bit reduced instruction-set computer central processing unit (CPU) and other digital IPs on a single chip with 0.18 μm CMOS technology. The FPAA intellectual property could be reconfigured as different function circuits, such as gain amplifier, divider, sine generator, and so on. This single-chip integrated mixed-signal system is a complete modern signal processing system, occupying a die area of 7 × 8 mm 2 and consuming 719 mW with a clock frequency of 150 MHz for CPU and 200 MHz for ADC/DAC. This SoC chip can help customers to shorten design cycles, save board area, reduce the system power consumption and depress the system integration risk, which would afford a big prospect of application for wireless communication. Project supported by the National High Technology and Development Program of China (No. 2012AA012303).

  5. "Hook"-calibration of GeneChip-microarrays: Chip characteristics and expression measures

    Directory of Open Access Journals (Sweden)

    Krohn Knut

    2008-08-01

    Full Text Available Abstract Background Microarray experiments rely on several critical steps that may introduce biases and uncertainty in downstream analyses. These steps include mRNA sample extraction, amplification and labelling, hybridization, and scanning causing chip-specific systematic variations on the raw intensity level. Also the chosen array-type and the up-to-dateness of the genomic information probed on the chip affect the quality of the expression measures. In the accompanying publication we presented theory and algorithm of the so-called hook method which aims at correcting expression data for systematic biases using a series of new chip characteristics. Results In this publication we summarize the essential chip characteristics provided by this method, analyze special benchmark experiments to estimate transcript related expression measures and illustrate the potency of the method to detect and to quantify the quality of a particular hybridization. It is shown that our single-chip approach provides expression measures responding linearly on changes of the transcript concentration over three orders of magnitude. In addition, the method calculates a detection call judging the relation between the signal and the detection limit of the particular measurement. The performance of the method in the context of different chip generations and probe set assignments is illustrated. The hook method characterizes the RNA-quality in terms of the 3'/5'-amplification bias and the sample-specific calling rate. We show that the proper judgement of these effects requires the disentanglement of non-specific and specific hybridization which, otherwise, can lead to misinterpretations of expression changes. The consequences of modifying probe/target interactions by either changing the labelling protocol or by substituting RNA by DNA targets are demonstrated. Conclusion The single-chip based hook-method provides accurate expression estimates and chip-summary characteristics

  6. Star of AOXiang: An innovative 12U CubeSat to demonstrate polarized light navigation and microgravity measurement

    Science.gov (United States)

    Yu, Xiaozhou; Zhou, Jun; Zhu, Peijie; Guo, Jian

    2018-06-01

    Most of the CubeSats have a volume range from 1U to 3U, which limits their applications due to the difficulty of miniaturizing payloads. To facilitate the needs on a larger but low-cost satellite platform, the AOXiang (AOX) project has been developed by Northwestern Polytechnical University (NPU). The primary objectives of AOX project are four-folds: 1) To demonstrate the world first 12U CubeSat Star of AOXiang and 12U orbit deployer which uses an innovative electromagnetic unlocking technology. 2) To investigate the feasibility of using polarized sunlight for spacecraft attitude determination and navigation, and perform microgravity research using a miniaturized gravimeter. 3) To test a fault tolerant on-board computer using the System On the Programmable Chip (SOPC) technology, and 4) To gain the experience from developing the CubeSat and the subsystems. The CubeSat was launched in June 2016. Now, the mission has achieved all the goals. This paper provides the detail information of the AOX project, with a focus on the introduction of the subsystems of the 12U CubeSat, the orbit deployer and the payloads. The recent in-orbit results of the first NPU are also presented. In addition to the educational objective that has been reached with more than 50 young scholars and students participated in the project.

  7. Pixel detector readout chip

    CERN Multimedia

    1991-01-01

    Close-up of a pixel detector readout chip. The photograph shows an aera of 1 mm x 2 mm containing 12 separate readout channels. The entire chip contains 1000 readout channels (around 80 000 transistors) covering a sensitive area of 8 mm x 5 mm. The chip has been mounted on a silicon detector to detect high energy particles.

  8. Performance of a Fast Binary Readout CMOS Active Pixel Sensor Chip Designed for Charged Particle Detection

    Science.gov (United States)

    Deerli, Yavuz; Besanon, Marc; Besson, Auguste; Claus, Gilles; Deptuch, Grzegorz; Dulinski, Wojciech; Fourches, Nicolas; Goffe, Mathieu; Himmi, Abdelkader; Li, Yan; Lutz, Pierre; Orsini, Fabienne; Szelezniak, Michal

    2006-12-01

    We report on the performance of the MIMOSA8 (HiMAPS1) chip. The chip is a 128times32 pixels array where 24 columns have discriminated binary outputs and eight columns analog test outputs. Offset correction techniques are used extensively in this chip to overcome process related mismatches. The array is divided in four blocks of pixels with different conversion factors and is controlled by a serially programmable sequencer. MIMOSA8 is a representative of the CMOS sensors development option considered as a promising candidate for the Vertex Detector of the future International Linear Collider (ILC). The readout technique, implemented on the chip, combines high spatial resolution capabilities with high processing readout speed. Data acquisition, providing control of the chip and signal buffering and linked to a VME system, was made on the eight analog outputs. Analog data, without and with a 55Fe X-ray source, were acquired and processed using off-line analysis software. From the reconstruction of pixel clusters, built around a central pixel, we deduce that the charge spread is limited to the closest 25 pixels and almost all the available charge is collected. The position of the total charge collection peak (and subsequently the charge-to-voltage conversion factor) stays unaffected when the clock frequency is increased even up to 150 MHz (13.6 mus readout time per frame). The discriminators, placed in the readout chain, have proved to be fully functional. Beam tests have been made with high energy electrons at DESY (Germany) to study detection efficiency. The results prove that MIMOSA8 is the first and fastest successful monolithic active pixel sensor with on-chip signal discrimination for detection of MIPs

  9. Performance analysis of general purpose and digital signal processor kernels for heterogeneous systems-on-chip

    Directory of Open Access Journals (Sweden)

    T. von Sydow

    2003-01-01

    Full Text Available Various reasons like technology progress, flexibility demands, shortened product cycle time and shortened time to market have brought up the possibility and necessity to integrate different architecture blocks on one heterogeneous System-on-Chip (SoC. Architecture blocks like programmable processor cores (DSP- and GPP-kernels, embedded FPGAs as well as dedicated macros will be integral parts of such a SoC. Especially programmable architecture blocks and associated optimization techniques are discussed in this contribution. Design space exploration and thus the choice which architecture blocks should be integrated in a SoC is a challenging task. Crucial to this exploration is the evaluation of the application domain characteristics and the costs caused by individual architecture blocks integrated on a SoC. An ATE-cost function has been applied to examine the performance of the aforementioned programmable architecture blocks. Therefore, representative discrete devices have been analyzed. Furthermore, several architecture dependent optimization steps and their effects on the cost ratios are presented.

  10. VLSI Design of SVM-Based Seizure Detection System With On-Chip Learning Capability.

    Science.gov (United States)

    Feng, Lichen; Li, Zunchao; Wang, Yuanfa

    2018-02-01

    Portable automatic seizure detection system is very convenient for epilepsy patients to carry. In order to make the system on-chip trainable with high efficiency and attain high detection accuracy, this paper presents a very large scale integration (VLSI) design based on the nonlinear support vector machine (SVM). The proposed design mainly consists of a feature extraction (FE) module and an SVM module. The FE module performs the three-level Daubechies discrete wavelet transform to fit the physiological bands of the electroencephalogram (EEG) signal and extracts the time-frequency domain features reflecting the nonstationary signal properties. The SVM module integrates the modified sequential minimal optimization algorithm with the table-driven-based Gaussian kernel to enable efficient on-chip learning. The presented design is verified on an Altera Cyclone II field-programmable gate array and tested using the two publicly available EEG datasets. Experiment results show that the designed VLSI system improves the detection accuracy and training efficiency.

  11. The impact of CHIP premium increases on insurance outcomes among CHIP eligible children.

    Science.gov (United States)

    Nikolova, Silviya; Stearns, Sally

    2014-03-03

    Within the United States, public insurance premiums are used both to discourage private health policy holders from dropping coverage and to reduce state budget costs. Prior research suggests that the odds of having private coverage and being uninsured increase with increases in public insurance premiums. The aim of this paper is to test effects of Children's Health Insurance Program (CHIP) premium increases on public insurance, private insurance, and uninsurance rates. The fact that families just below and above a state-specific income cut-off are likely very similar in terms of observable and unobservable characteristics except the premium contribution provides a natural experiment for estimating the effect of premium increases. Using 2003 Medical Expenditure Panel Survey (MEPS) merged with CHIP premiums, we compare health insurance outcomes for CHIP eligible children as of January 2003 in states with a two-tier premium structure using a cross-sectional regression discontinuity methodology. We use difference-in-differences analysis to compare longitudinal insurance outcomes by December 2003. Higher CHIP premiums are associated with higher likelihood of private insurance. Disenrollment from CHIP in response to premium increases over time does not increase the uninsurance rate. When faced with higher CHIP premiums, private health insurance may be a preferable alternative for CHIP eligible families with higher incomes. Therefore, competition in the insurance exchanges being formed under the Affordable Care Act could enhance choice.

  12. Advanced flip chip packaging

    CERN Document Server

    Lai, Yi-Shao; Wong, CP

    2013-01-01

    Advanced Flip Chip Packaging presents past, present and future advances and trends in areas such as substrate technology, material development, and assembly processes. Flip chip packaging is now in widespread use in computing, communications, consumer and automotive electronics, and the demand for flip chip technology is continuing to grow in order to meet the need for products that offer better performance, are smaller, and are environmentally sustainable. This book also: Offers broad-ranging chapters with a focus on IC-package-system integration Provides viewpoints from leading industry executives and experts Details state-of-the-art achievements in process technologies and scientific research Presents a clear development history and touches on trends in the industry while also discussing up-to-date technology information Advanced Flip Chip Packaging is an ideal book for engineers, researchers, and graduate students interested in the field of flip chip packaging.

  13. UW VLSI chip tester

    Science.gov (United States)

    McKenzie, Neil

    1989-12-01

    We present a design for a low-cost, functional VLSI chip tester. It is based on the Apple MacIntosh II personal computer. It tests chips that have up to 128 pins. All pin drivers of the tester are bidirectional; each pin is programmed independently as an input or an output. The tester can test both static and dynamic chips. Rudimentary speed testing is provided. Chips are tested by executing C programs written by the user. A software library is provided for program development. Tests run under both the Mac Operating System and A/UX. The design is implemented using Xilinx Logic Cell Arrays. Price/performance tradeoffs are discussed.

  14. Cache-aware network-on-chip for chip multiprocessors

    Science.gov (United States)

    Tatas, Konstantinos; Kyriacou, Costas; Dekoulis, George; Demetriou, Demetris; Avraam, Costas; Christou, Anastasia

    2009-05-01

    This paper presents the hardware prototype of a Network-on-Chip (NoC) for a chip multiprocessor that provides support for cache coherence, cache prefetching and cache-aware thread scheduling. A NoC with support to these cache related mechanisms can assist in improving systems performance by reducing the cache miss ratio. The presented multi-core system employs the Data-Driven Multithreading (DDM) model of execution. In DDM thread scheduling is done according to data availability, thus the system is aware of the threads to be executed in the near future. This characteristic of the DDM model allows for cache aware thread scheduling and cache prefetching. The NoC prototype is a crossbar switch with output buffering that can support a cache-aware 4-node chip multiprocessor. The prototype is built on the Xilinx ML506 board equipped with a Xilinx Virtex-5 FPGA.

  15. Experiment list: SRX122496 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available || chip antibody=Rel || treatment=LPS || time=120 min || chip antibody manufacturer 1=Santa Cruz || chip ant...ibody catalog number 1=sc-71 || chip antibody manufacturer 2=Santa Cruz || chip antibody catalog number 2=sc

  16. Smart vision chips: An overview

    Science.gov (United States)

    Koch, Christof

    1994-01-01

    This viewgraph presentation presents four working analog VLSI vision chips: (1) time-derivative retina, (2) zero-crossing chip, (3) resistive fuse, and (4) figure-ground chip; work in progress on computing motion and neuromorphic systems; and conceptual and practical lessons learned.

  17. Bioenergy in the national forestry programme

    International Nuclear Information System (INIS)

    Heikurainen, M.

    1998-01-01

    The objective of the national forestry programme is to develop the treatment, utilization and protection of forests in order to increase the employment level in the forestry sector as well as enhance the utilization of the forests for recreation purposes. Increment of the utilization of wood energy is one of the means for meeting the objective of the programme. In addition to the silvicultural reasons, one of the main reasons for increasing of the utilization of energy wood is the possibilities of energywood-related small and medium-sized entrepreneurship to employ people. The emission reduction requirements of the Kyoto summit offer also a reason for the increment of the utilization of wood energy, because the carbon dioxide emissions of biofuels are not included in the emission share of the country. The techno-economically viable unutilized wood energy potential of clearcuts has been estimated to 3.7 million m 3 and that of the integrated harvesting of first thinnings 2.3 million m 3 . On the basis of these figures the latest objective of the programme has been set to increase the energy wood harvesting and utilization to 5.0 million m 3 /a up to the year 2010. The main means listed in the programme are: Development of integrated harvesting methods, by which it is possible to produce energy wood economically (price less than 45 FIM/MWh) as a byproduct of commercial timber; The environmental support paid to the forest chips purchasers; Bioenergy capacity developed in the forest industry; Social support for product development and entrepreneurhip in the field of bioenergy; Reduction of the value added taxes of the end users of split firewood and wood briquettes

  18. Experiment list: SRX122465 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available 6 || chip antibody=Relb || treatment=LPS || time=120 min || chip antibody manufacturer 1=Bethyl || chip anti...body catalog number 1=A302-183A || chip antibody manufacturer 2=Santa Cruz || chip antibody catalog number 2

  19. Moving-part-free microfluidic systems for lab-on-a-chip

    International Nuclear Information System (INIS)

    Luo, J K; Fu, Y Q; Du, X Y; Flewitt, A J; Milne, W I; Li, Y; Walton, A J

    2009-01-01

    Microfluidic systems are part of an emerging technology which deals with minute amounts of liquids (biological samples and reagents) on a small scale. They are fast, compact and can be made into a highly integrated system to deliver sample purification, separation, reaction, immobilization, labelling, as well as detection, thus are promising for applications such as lab-on-a-chip and handheld healthcare devices. Miniaturized micropumps typically consist of a moving-part component, such as a membrane structure, to deliver liquids, and are often unreliable, complicated in structure and difficult to be integrated with other control electronics circuits. The trend of new-generation micropumps is moving-part-free micropumps operated by advanced techniques, such as electrokinetic force, surface tension/energy, acoustic waves. This paper reviews the development and advances of relevant technologies, and introduces electrowetting-on-dielectrics and acoustic wave-based microfluidics. The programmable electrowetting micropump has been realized to dispense and manipulate droplets in 2D with up to 1000 addressable electrodes and electronics built underneath. The acoustic wave-based microfluidics can be used not only for pumping, mixing and droplet generation but also for biosensors, suitable for single-mechanism-based lab-on-a-chip applications

  20. Experiment list: SRX122555 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available chip antibody=Stat1 || treatment=LPS || time=120 min || chip antibody manufacturer 1=Santa Cruz || chip anti...body catalog number 1=sc-346 || chip antibody manufacturer 2=Bethyl || chip antibody catalog number 2=A302-7

  1. On-chip digital power supply control for system-on-chip applications

    NARCIS (Netherlands)

    Meijer, M.; Pineda de Gyvez, J.; Otten, R.H.J.M.

    2005-01-01

    The authors presented an on-chip, fully-digital, power-supply control system. The scheme consists of two independent control loops that regulate power supply variations due to semiconductor process spread, temperature, and chip's workload. Smart power-switches working as linear voltage regulators

  2. Supply chains of forest chip production in Finland

    Energy Technology Data Exchange (ETDEWEB)

    Kaerhae, Kalle (Metsaeteho Oy, Helsinki (Finland)), e-mail: kalle.karha@metsateho.fi

    2010-07-15

    The Metsaeteho study investigated how logging residue chips, stump wood chips, and chips from small sized thinning wood and large-sized (rotten) roundwood used by heating and power plants were produced in Finland in 2008. Almost all the major forest chip suppliers in Finland were involved in the study. The total volume of forest chips supplied in 2008 by these suppliers was 6.5 TWh. The study was implemented by conducting an e-mail questionnaire survey and telephone interviews. Research data was collected in March-May 2009. The majority of the logging residue chips and chips from small-sized thinning wood were produced using the roadside chipping supply chain in Finland in 2008. The chipping at plant supply chain was also significant in the production of logging residue chips. 70% of all stump wood chips consumed were comminuted at the plant and 29% at terminals. The role of the terminal chipping supply chain was also significant in the production of chips from logging residues and small-sized wood chips. When producing chips from large-sized (rotten) roundwood, nearly a half of chips were comminuted at plants and more than 40% at terminals

  3. Supply systems of forest chip production in Finland

    Energy Technology Data Exchange (ETDEWEB)

    Kaerhae, K. (Metsaeteho Oy, Helsinki (Finland)), e-mail: kalle.karha@metsateho.fi

    2010-07-01

    The Metsaeteho study investigated how logging residue chips, stump wood chips, and chips from small-diameter thinning wood and large-sized (rotten) roundwood used by heating and power plants were produced in Finland in 2009. Almost all the major forest chip suppliers in Finland were involved in the study. The total volume of forest chips supplied in 2009 by these suppliers was 8,4 TWh. The study was implemented by conducting an e-mail questionnaire survey and telephone interviews. Research data was collected from March-May, 2010. The majority of the logging residue chips and chips from small-diameter thinning wood were produced using the roadside chipping supply system in Finland in 2009. The chipping at plant supply system was also significant in the production of logging residue chips. Nearly 70 % of all stump wood chips consumed were comminuted at the plant and 28 % at terminals. The role of the terminal chipping supply system was also significant in the production of chips from logging residues and small-diameter wood chips. When producing chips from large-sized (rotten) roundwood, similarly roughly 70 % of chips were comminuted at plants and 23 % at terminals. (orig.)

  4. Supply chains of forest chip production in Finland

    Energy Technology Data Exchange (ETDEWEB)

    Kaerhae, K. (Metsaeteho Oy, Helsinki (Finland)), Email: kalle.karha@metsateho.fi

    2009-07-01

    The Metsaeteho study investigated how logging residue chips. stump wood chips, and chips from small-sized thinning wood and large-sized (rotten) roundwood used by heating and power plants were produced in Finland in 2008. Almost all the major forest chip suppliers in Finland were involved in the study. The total volume of forest chips supplied in 2008 by these suppliers was 6,5 TWh. The study was implemented by conducting an e-mail questionnaire survey and telephone interviews. Research data was collected in March-May 2009. The majority of the logging residue chips and chips from small-sized thinning wood were produced using the roadside chipping supply chain in Finland in 2008. The chipping at plant supply chain was also significant in the production of logging residue chips. 70% of all stump wood chips consumed were comminuted at the plant and 29% at terminals. The role of the terminal chipping supply chain was also significant in the production of chips from logging residues and small-sized wood chips. When producing chips from large-sized (rotten) roundwood, nearly a half of chips were comminuted at plants and more than 40 % at terminals. (orig.)

  5. Single chip camera active pixel sensor

    Science.gov (United States)

    Shaw, Timothy (Inventor); Pain, Bedabrata (Inventor); Olson, Brita (Inventor); Nixon, Robert H. (Inventor); Fossum, Eric R. (Inventor); Panicacci, Roger A. (Inventor); Mansoorian, Barmak (Inventor)

    2003-01-01

    A totally digital single chip camera includes communications to operate most of its structure in serial communication mode. The digital single chip camera include a D/A converter for converting an input digital word into an analog reference signal. The chip includes all of the necessary circuitry for operating the chip using a single pin.

  6. Ultra-thin chip technology and applications

    CERN Document Server

    2010-01-01

    Ultra-thin chips are the "smart skin" of a conventional silicon chip. This book shows how very thin and flexible chips can be fabricated and used in many new applications in microelectronics, microsystems, biomedical and other fields. It provides a comprehensive reference to the fabrication technology, post processing, characterization and the applications of ultra-thin chips.

  7. An economic evaluation of a chlorhexidine chip for treating chronic periodontitis: the CHIP (chlorhexidine in periodontitis) study.

    Science.gov (United States)

    Henke, C J; Villa, K F; Aichelmann-Reidy, M E; Armitage, G C; Eber, R M; Genco, R J; Killoy, W J; Miller, D P; Page, R C; Polson, A M; Ryder, M I; Silva, S J; Somerman, M J; Van Dyke, T E; Wolff, L F; Evans, C J; Finkelman, R D

    2001-11-01

    The authors previously suggested that an adjunctive, controlled-release chlorhexidine, or CHX, chip may reduce periodontal surgical needs at little additional cost. This article presents an economic analysis of the CHX chip in general dental practice. In a one-year prospective clinical trial, 484 chronic periodontitis patients in 52 general practices across the United States were treated with either scaling and root planing, or SRP, plus any therapy prescribed by treating, unblinded dentists; or SRP plus other therapy as above but including the CHX chip. Economic data were collected from bills, case report forms and 12-month treatment recommendations from blinded periodontist evaluators. Total dental charges were higher for SRP + CHX chip patients vs. SRP patients when CHX chip costs were included (P = .027) but lower when CHX chip costs were excluded (P = .012). About one-half of the CHX chip acquisition cost was offset by savings in other charges. SRP + CHX chip patients were about 50 percent less likely to undergo surgical procedures than were SRP patients (P = .021). At the end of the trial, periodontist evaluators recommended similar additional procedures for both groups: SRP, about 46 percent; maintenance, about 37 percent; surgery, 56 percent for SRP alone and 63 percent for SRP + CHX chip. Adjunctive CHX chip use for general-practice patients with periodontitis increased costs but reduced surgeries over one year. At study's end, periodontists recommended similar additional surgical treatment for both groups. In general practice, routine use of the CHX chip suggests that costs will be partially offset by reduced surgery over at least one year.

  8. Photonic network-on-chip design

    CERN Document Server

    Bergman, Keren; Biberman, Aleksandr; Chan, Johnnie; Hendry, Gilbert

    2013-01-01

    This book provides a comprehensive synthesis of the theory and practice of photonic devices for networks-on-chip. It outlines the issues in designing photonic network-on-chip architectures for future many-core high performance chip multiprocessors. The discussion is built from the bottom up: starting with the design and implementation of key photonic devices and building blocks, reviewing networking and network-on-chip theory and existing research, and finishing with describing various architectures, their characteristics, and the impact they will have on a computing system. After acquainting

  9. Solid state silicon based condenser microphone for hearing aid, has transducer chip and IC chip between intermediate chip and openings on both sides of intermediate chip, to allow sound towards diaphragm

    DEFF Research Database (Denmark)

    2000-01-01

    towards diaphragm. Surface of the chip (2) has electrical conductors (14) to connect chip with IC chip (3). USE - For use in miniature electroacoustic devices such as hearing aid. ADVANTAGE - Since sound inlet is covered by filter, dust, moisture and other impurities do not obstruct interior and sound...... inlet of microphone. External electrical connection can be made economically reliable and the thermal stress is avoided with the small size solid state silicon based condenser microphone....

  10. Experiment list: SRX214086 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available entiated || cell line=KH2 || chip antibody 1=none || chip antibody manufacturer 1=none || chip antibody 2=none || chip antibody manuf...acturer 2=none http://dbarchive.biosciencedbc.jp/kyushu-

  11. Optical lattice on an atom chip

    DEFF Research Database (Denmark)

    Gallego, D.; Hofferberth, S.; Schumm, Thorsten

    2009-01-01

    Optical dipole traps and atom chips are two very powerful tools for the quantum manipulation of neutral atoms. We demonstrate that both methods can be combined by creating an optical lattice potential on an atom chip. A red-detuned laser beam is retroreflected using the atom chip surface as a high......-quality mirror, generating a vertical array of purely optical oblate traps. We transfer thermal atoms from the chip into the lattice and observe cooling into the two-dimensional regime. Using a chip-generated Bose-Einstein condensate, we demonstrate coherent Bloch oscillations in the lattice....

  12. Experiment list: SRX214071 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available Undifferentiated || treatment=Overexpress Sox2-V5 tagged || cell line=KH2 || chip antibody 1=none || chip antibody manufacture...r 1=none || chip antibody 2=V5 || chip antibody manufacturer 2=

  13. Experiment list: SRX214075 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available age=Undifferentiated || treatment=Overexpress Sox17EK-V5 tagged || cell line=KH2 || chip antibody 1=none || chip antibody manufacture...r 1=none || chip antibody 2=V5 || chip antibody manufacture

  14. Experiment list: SRX214074 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available ge=Undifferentiated || treatment=Overexpress Sox17EK-V5 tagged || cell line=KH2 || chip antibody 1=none || chip antibody manufacture...r 1=none || chip antibody 2=V5 || chip antibody manufacture

  15. Experiment list: SRX214072 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available e=Undifferentiated || treatment=Overexpress Sox2KE-V5 tagged || cell line=KH2 || chip antibody 1=none || chip antibody manufacture...r 1=none || chip antibody 2=V5 || chip antibody manufacture

  16. Experiment list: SRX214067 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available fferentiated || cell line=F9 || chip antibody 1=Pou5f1/Oct4 || chip antibody manufacture...r 1=Santa Cruz || chip antibody 2=none || chip antibody manufacturer 2=none http://dbarchive.bioscien

  17. Wax-bonding 3D microfluidic chips

    KAUST Repository

    Gong, Xiuqing; Yi, Xin; Xiao, Kang; Li, Shunbo; Kodzius, Rimantas; Qin, Jianhua; Wen, Weijia

    2013-01-01

    We report a simple, low-cost and detachable microfluidic chip incorporating easily accessible paper, glass slides or other polymer films as the chip materials along with adhesive wax as the recycling bonding material. We use a laser to cut through the paper or film to form patterns and then sandwich the paper and film between glass sheets or polymer membranes . The hot-melt adhesive wax can realize bridge bonding between various materials, for example, paper, polymethylmethacrylate (PMMA) film, glass sheets, or metal plate. The bonding process is reversible and the wax is reusable through a melting and cooling process. With this process, a three-dimensional (3D) microfluidic chip is achievable by vacuating and venting the chip in a hot-water bath. To study the biocompatibility and applicability of the wax-based microfluidic chip, we tested the PCR compatibility with the chip materials first. Then we applied the wax-paper based microfluidic chip to HeLa cell electroporation (EP ). Subsequently, a prototype of a 5-layer 3D chip was fabricated by multilayer wax bonding. To check the sealing ability and the durability of the chip, green fluorescence protein (GFP) recombinant Escherichia coli (E. coli) bacteria were cultured, with which the chemotaxis of E. coli was studied in order to determine the influence of antibiotic ciprofloxacin concentration on the E. coli migration.

  18. Wax-bonding 3D microfluidic chips

    KAUST Repository

    Gong, Xiuqing

    2013-10-10

    We report a simple, low-cost and detachable microfluidic chip incorporating easily accessible paper, glass slides or other polymer films as the chip materials along with adhesive wax as the recycling bonding material. We use a laser to cut through the paper or film to form patterns and then sandwich the paper and film between glass sheets or polymer membranes . The hot-melt adhesive wax can realize bridge bonding between various materials, for example, paper, polymethylmethacrylate (PMMA) film, glass sheets, or metal plate. The bonding process is reversible and the wax is reusable through a melting and cooling process. With this process, a three-dimensional (3D) microfluidic chip is achievable by vacuating and venting the chip in a hot-water bath. To study the biocompatibility and applicability of the wax-based microfluidic chip, we tested the PCR compatibility with the chip materials first. Then we applied the wax-paper based microfluidic chip to HeLa cell electroporation (EP ). Subsequently, a prototype of a 5-layer 3D chip was fabricated by multilayer wax bonding. To check the sealing ability and the durability of the chip, green fluorescence protein (GFP) recombinant Escherichia coli (E. coli) bacteria were cultured, with which the chemotaxis of E. coli was studied in order to determine the influence of antibiotic ciprofloxacin concentration on the E. coli migration.

  19. Experiment list: SRX122523 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available ntibody=Irf2 || treatment=LPS || time=60 min || chip antibody manufacturer 1=Abcam || chip antibody catalog ...number 1=ab65048 || chip antibody manufacturer 2=Santa Cruz || chip antibody catalog number 2=sc-498 http://

  20. Experiment list: SRX122414 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available ntibody=Junb || treatment=LPS || time=30 min || chip antibody manufacturer 1=Abcam || chip antibody catalog ...number 1=ab28838 || chip antibody manufacturer 2=Santa Cruz || chip antibody catalog number 2=sc-46 http://d

  1. Experiment list: SRX214077 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available erentiated || treatment=Overexpress Sox17_V5 tagged || cell line=KH2 || chip antibody 1=Sox17 || chip antibody manufacture...r 1=R&D || chip antibody 2=V5 || chip antibody manufacturer 2=Invit

  2. Experiment list: SRX122485 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available antibody=Atf3 || treatment=LPS || time=120 min || chip antibody manufacturer 1=Santa Cruz || chip antibody ...catalog number 1=sc-188 || chip antibody manufacturer 2=Abcam || chip antibody catalog number 2=ab70005-100

  3. Experiment list: SRX122521 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available ntibody=Irf2 || treatment=LPS || time=30 min || chip antibody manufacturer 1=Abcam || chip antibody catalog ...number 1=ab65048 || chip antibody manufacturer 2=Santa Cruz || chip antibody catalog number 2=sc-498 http://

  4. Experiment list: SRX122417 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available ntibody=Junb || treatment=LPS || time=60 min || chip antibody manufacturer 1=Abcam || chip antibody catalog ...number 1=ab28838 || chip antibody manufacturer 2=Santa Cruz || chip antibody catalog number 2=sc-46 http://d

  5. Experiment list: SRX122520 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available ntibody=Irf2 || treatment=LPS || time=30 min || chip antibody manufacturer 1=Abcam || chip antibody catalog ...number 1=ab65048 || chip antibody manufacturer 2=Santa Cruz || chip antibody catalog number 2=sc-498 http://

  6. Experiment list: SRX122413 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available antibody=Junb || treatment=LPS || time=120 min || chip antibody manufacturer 1=Abcam || chip antibody catalo...g number 1=ab28838 || chip antibody manufacturer 2=Santa Cruz || chip antibody catalog number 2=sc-46 http:/

  7. Experiment list: SRX122412 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available antibody=Junb || treatment=LPS || time=120 min || chip antibody manufacturer 1=Abcam || chip antibody catalo...g number 1=ab28838 || chip antibody manufacturer 2=Santa Cruz || chip antibody catalog number 2=sc-46 http:/

  8. Experiment list: SRX122406 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available antibody=Irf1 || treatment=LPS || time=0 min || chip antibody manufacturer 1=Abcam || chip antibody catalog... number 1=ab52520 || chip antibody manufacturer 2=Santa Cruz || chip antibody catalog number 2=sc-640 http:/

  9. Experiment list: SRX122415 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available ntibody=Junb || treatment=LPS || time=30 min || chip antibody manufacturer 1=Abcam || chip antibody catalog ...number 1=ab28838 || chip antibody manufacturer 2=Santa Cruz || chip antibody catalog number 2=sc-46 http://d

  10. Experiment list: SRX122416 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available ntibody=Junb || treatment=LPS || time=60 min || chip antibody manufacturer 1=Abcam || chip antibody catalog ...number 1=ab28838 || chip antibody manufacturer 2=Santa Cruz || chip antibody catalog number 2=sc-46 http://d

  11. Experiment list: SRX122565 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available antibody=Stat2 || treatment=LPS || time=0 min || chip antibody manufacturer 1=Abcam || chip antibody catalog... number 1=ab53149 || chip antibody manufacturer 2=Santa Cruz || chip antibody catalog number 2=sc-839 http:/

  12. Experiment list: SRX122510 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available antibody=Egr1 || treatment=LPS || time=0 min || chip antibody manufacturer 1=Abcam || chip antibody catalog... number 1=ab54966-100 || chip antibody manufacturer 2=Santa Cruz || chip antibody catalog number 2=sc-110 ht

  13. Experiment list: SRX122519 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available antibody=Irf2 || treatment=LPS || time=120 min || chip antibody manufacturer 1=Abcam || chip antibody catalo...g number 1=ab65048 || chip antibody manufacturer 2=Santa Cruz || chip antibody catalog number 2=sc-498 http:

  14. Experiment list: SRX122472 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available antibody=Runx1 || treatment=LPS || time=0 min || chip antibody manufacturer 1=Abcam || chip antibody catalo...g number 1=ab61753 || chip antibody manufacturer 2=Santa Cruz || chip antibody catalog number 2=sc-8564 http

  15. Experiment list: SRX122473 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available ip antibody=Runx1 || treatment=LPS || time=120 min || chip antibody manufacturer 1=Abcam || chip antibody ca...talog number 1=ab61753 || chip antibody manufacturer 2=Santa Cruz || chip antibody catalog number 2=sc-8564

  16. Experiment list: SRX122497 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available antibody=Rel || treatment=LPS || time=30 min || chip antibody manufacturer 1=Santa Cruz || chip antibody cat...alog number 1=sc-71 || chip antibody manufacturer 2=Santa Cruz || chip antibody catalog number 2=sc-70 http:

  17. Experiment list: SRX122410 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available ntibody=Junb || treatment=LPS || time=0 min || chip antibody manufacturer 1=Abcam || chip antibody catalog n...umber 1=ab28838 || chip antibody manufacturer 2=Santa Cruz || chip antibody catalog number 2=sc-46 http://db

  18. Experiment list: SRX186172 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available 1=YY1 || chip antibody manufacturer 1=Abcam || chip antibody 2=YY1 || chip antibody manufacturer 2=Santa Cru...ip-Seq; Mus musculus; ChIP-Seq source_name=Rag1 -/- pro-B cells || chip antibody

  19. Experiment list: SRX122493 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available antibody=Atf4 || treatment=LPS || time=120 min || chip antibody manufacturer 1=Abcam || chip antibody catal...og number 1=ab28830-100 || chip antibody manufacturer 2=Santa Cruz || chip antibody catalog number 2=sc-200

  20. Experiment list: SRX122571 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available antibody=Stat2 || treatment=LPS || time=30 min || chip antibody manufacturer 1=Abcam || chip antibody catal...og number 1=ab53149 || chip antibody manufacturer 2=Santa Cruz || chip antibody catalog number 2=sc-839 http

  1. Experiment list: SRX122411 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available ntibody=Junb || treatment=LPS || time=0 min || chip antibody manufacturer 1=Abcam || chip antibody catalog n...umber 1=ab28838 || chip antibody manufacturer 2=Santa Cruz || chip antibody catalog number 2=sc-46 http://db

  2. Experiment list: SRX122498 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available antibody=Rel || treatment=LPS || time=60 min || chip antibody manufacturer 1=Santa Cruz || chip antibody cat...alog number 1=sc-71 || chip antibody manufacturer 2=Santa Cruz || chip antibody catalog number 2=sc-70 http:

  3. Experiment list: SRX122516 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available antibody=Irf2 || treatment=LPS || time=120 min || chip antibody manufacturer 1=Abcam || chip antibody catalo...g number 1=ab65048 || chip antibody manufacturer 2=Santa Cruz || chip antibody catalog number 2=sc-498 http:

  4. Experiment list: SRX122495 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available ntibody=Rel || treatment=LPS || time=0 min || chip antibody manufacturer 1=Santa Cruz || chip antibody catal...og number 1=sc-71 || chip antibody manufacturer 2=Santa Cruz || chip antibody catalog number 2=sc-70 http://

  5. Experiment list: SRX122563 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available antibody=Stat1 || treatment=LPS || time=60 min || chip antibody manufacturer 1=Santa Cruz || chip antibody ...catalog number 1=sc-346 || chip antibody manufacturer 2=Bethyl || chip antibody catalog number 2=A302-753A h

  6. Experiment list: SRX122564 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available antibody=Stat1 || treatment=LPS || time=60 min || chip antibody manufacturer 1=Santa Cruz || chip antibody ...catalog number 1=sc-346 || chip antibody manufacturer 2=Bethyl || chip antibody catalog number 2=A302-753A h

  7. Experiment list: SRX122488 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available antibody=Atf3 || treatment=LPS || time=120 min || chip antibody manufacturer 1=Santa Cruz || chip antibody c...atalog number 1=sc-188 || chip antibody manufacturer 2=Abcam || chip antibody catalog number 2=ab70005-100 h

  8. Experiment list: SRX122491 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available ntibody=Atf3 || treatment=LPS || time=60 min || chip antibody manufacturer 1=Santa Cruz || chip antibody cat...alog number 1=sc-188 || chip antibody manufacturer 2=Abcam || chip antibody catalog number 2=ab70005-100 htt

  9. Experiment list: SRX122548 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available ip antibody=Stat1 || treatment=LPS || time=0 min || chip antibody manufacturer 1=Santa Cruz || chip antibody... catalog number 1=sc-346 || chip antibody manufacturer 2=Bethyl || chip antibody catalog number 2=A302-753A

  10. Experiment list: SRX122468 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available antibody=Rela || treatment=LPS || time=0 min || chip antibody manufacturer 1=Bethyl || chip antibody catalo...g number 1=A301-824A || chip antibody manufacturer 2=Santa Cruz || chip antibody catalog number 2=sc-372 htt

  11. Experiment list: SRX122561 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available antibody=Stat1 || treatment=LPS || time=30 min || chip antibody manufacturer 1=Santa Cruz || chip antibody ...catalog number 1=sc-346 || chip antibody manufacturer 2=Bethyl || chip antibody catalog number 2=A302-753A h

  12. Experiment list: SRX122409 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available ip antibody=Irf1 || treatment=LPS || time=60 min || chip antibody manufacturer 1=Abcam || chip antibody cata...log number 1=ab52520 || chip antibody manufacturer 2=Santa Cruz || chip antibody catalog number 2=sc-640 htt

  13. Experiment list: SRX122487 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available antibody=Atf3 || treatment=LPS || time=120 min || chip antibody manufacturer 1=Santa Cruz || chip antibody c...atalog number 1=sc-188 || chip antibody manufacturer 2=Abcam || chip antibody catalog number 2=ab70005-100 h

  14. Experiment list: SRX122552 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available ip antibody=Stat1 || treatment=LPS || time=120 min || chip antibody manufacturer 1=Santa Cruz || chip antibo...dy catalog number 1=sc-346 || chip antibody manufacturer 2=Bethyl || chip antibody catalog number 2=A302-753

  15. Experiment list: SRX122408 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available p antibody=Irf1 || treatment=LPS || time=30 min || chip antibody manufacturer 1=Abcam || chip antibody catal...og number 1=ab52520 || chip antibody manufacturer 2=Santa Cruz || chip antibody catalog number 2=sc-640 http

  16. Experiment list: SRX122513 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available p antibody=Egr1 || treatment=LPS || time=60 min || chip antibody manufacturer 1=Abcam || chip antibody catal...og number 1=ab54966-100 || chip antibody manufacturer 2=Santa Cruz || chip antibody catalog number 2=sc-110

  17. Experiment list: SRX122567 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available p antibody=Stat2 || treatment=LPS || time=120 min || chip antibody manufacturer 1=Abcam || chip antibody cat...alog number 1=ab53149 || chip antibody manufacturer 2=Santa Cruz || chip antibody catalog number 2=sc-839 ht

  18. Experiment list: SRX122490 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available ntibody=Atf3 || treatment=LPS || time=30 min || chip antibody manufacturer 1=Santa Cruz || chip antibody cat...alog number 1=sc-188 || chip antibody manufacturer 2=Abcam || chip antibody catalog number 2=ab70005-100 htt

  19. Experiment list: SRX122558 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available hip antibody=Stat1 || treatment=LPS || time=120 min || chip antibody manufacturer 1=Santa Cruz || chip antib...ody catalog number 1=sc-346 || chip antibody manufacturer 2=Bethyl || chip antibody catalog number 2=A302-75

  20. Experiment list: SRX122494 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available hip antibody=Atf4 || treatment=LPS || time=120 min || chip antibody manufacturer 1=Abcam || chip antibody ca...talog number 1=ab28830-100 || chip antibody manufacturer 2=Santa Cruz || chip antibody catalog number 2=sc-2

  1. Experiment list: SRX122557 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available hip antibody=Stat1 || treatment=LPS || time=120 min || chip antibody manufacturer 1=Santa Cruz || chip antib...ody catalog number 1=sc-346 || chip antibody manufacturer 2=Bethyl || chip antibody catalog number 2=A302-75

  2. Experiment list: SRX122492 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available ntibody=Atf3 || treatment=LPS || time=60 min || chip antibody manufacturer 1=Santa Cruz || chip antibody cat...alog number 1=sc-188 || chip antibody manufacturer 2=Abcam || chip antibody catalog number 2=ab70005-100 htt

  3. Experiment list: SRX122549 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available ip antibody=Stat1 || treatment=LPS || time=0 min || chip antibody manufacturer 1=Santa Cruz || chip antibody... catalog number 1=sc-346 || chip antibody manufacturer 2=Bethyl || chip antibody catalog number 2=A302-753A

  4. Experiment list: SRX122484 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available ntibody=Atf3 || treatment=LPS || time=0 min || chip antibody manufacturer 1=Santa Cruz || chip antibody cata...log number 1=sc-188 || chip antibody manufacturer 2=Abcam || chip antibody catalog number 2=ab70005-100 http

  5. Experiment list: SRX122514 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available tibody=Irf2 || treatment=LPS || time=0 min || chip antibody manufacturer 1=Abcam || chip antibody catalog nu...mber 1=ab65048 || chip antibody manufacturer 2=Santa Cruz || chip antibody catalog number 2=sc-498 http://db

  6. Experiment list: SRX122570 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available p antibody=Stat2 || treatment=LPS || time=120 min || chip antibody manufacturer 1=Abcam || chip antibody cat...alog number 1=ab53149 || chip antibody manufacturer 2=Santa Cruz || chip antibody catalog number 2=sc-839 ht

  7. Experiment list: SRX122569 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available ip antibody=Stat2 || treatment=LPS || time=120 min || chip antibody manufacturer 1=Abcam || chip antibody ca...talog number 1=ab53149 || chip antibody manufacturer 2=Santa Cruz || chip antibody catalog number 2=sc-839 h

  8. Experiment list: SRX122511 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available ip antibody=Egr1 || treatment=LPS || time=120 min || chip antibody manufacturer 1=Abcam || chip antibody cat...alog number 1=ab54966-100 || chip antibody manufacturer 2=Santa Cruz || chip antibody catalog number 2=sc-11

  9. Experiment list: SRX122471 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available ip antibody=Rela || treatment=LPS || time=60 min || chip antibody manufacturer 1=Bethyl || chip antibody cat...alog number 1=A301-824A || chip antibody manufacturer 2=Santa Cruz || chip antibody catalog number 2=sc-372

  10. Experiment list: SRX122554 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available ip antibody=Stat1 || treatment=LPS || time=120 min || chip antibody manufacturer 1=Santa Cruz || chip antibo...dy catalog number 1=sc-346 || chip antibody manufacturer 2=Bethyl || chip antibody catalog number 2=A302-753

  11. Experiment list: SRX122551 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available antibody=Stat1 || treatment=LPS || time=0 min || chip antibody manufacturer 1=Santa Cruz || chip antibody ca...talog number 1=sc-346 || chip antibody manufacturer 2=Bethyl || chip antibody catalog number 2=A302-753A htt

  12. Experiment list: SRX122546 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available p antibody=Stat1 || treatment=LPS || time=0 min || chip antibody manufacturer 1=Santa Cruz || chip antibody ...catalog number 1=sc-346 || chip antibody manufacturer 2=Bethyl || chip antibody catalog number 2=A302-753A h

  13. Experiment list: SRX122547 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available antibody=Stat1 || treatment=LPS || time=0 min || chip antibody manufacturer 1=Santa Cruz || chip antibody c...atalog number 1=sc-346 || chip antibody manufacturer 2=Bethyl || chip antibody catalog number 2=A302-753A ht

  14. Experiment list: SRX214084 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available turer 1=Santa Cruz || chip antibody 2=V5 || chip antibody manufacture...ge=Undifferentiated || treatment=Overexpress Sox17-V5 tagged || cell line=KH2 || chip antibody 1=Pou5f1/Oct4 || chip antibody manufac

  15. Experiment list: SRX122544 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available antibody=Stat1 || treatment=LPS || time=0 min || chip antibody manufacturer 1=Santa Cruz || chip antibody c...atalog number 1=sc-346 || chip antibody manufacturer 2=Bethyl || chip antibody catalog number 2=A302-753A ht

  16. Experiment list: SRX214082 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available facturer 1=Santa Cruz || chip antibody 2=V5 || chip antibody manufacture...age=Undifferentiated || treatment=Overexpress Sox17EK-V5 tagged || cell line=KH2 || chip antibody 1=Pou5f1/Oct4 || chip antibody manu

  17. Experiment list: SRX122466 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available p antibody=Relb || treatment=LPS || time=30 min || chip antibody manufacturer 1=Bethyl || chip antibody cata...log number 1=A302-183A || chip antibody manufacturer 2=Santa Cruz || chip antibody catalog number 2=sc-226 h

  18. Experiment list: SRX122545 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available antibody=Stat1 || treatment=LPS || time=0 min || chip antibody manufacturer 1=Santa Cruz || chip antibody c...atalog number 1=sc-346 || chip antibody manufacturer 2=Bethyl || chip antibody catalog number 2=A302-753A ht

  19. Experiment list: SRX214080 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available cturer 1=Santa Cruz || chip antibody 2=V5 || chip antibody manufacture...ge=Undifferentiated || treatment=Overexpress Sox2KE-V5 tagged || cell line=KH2 || chip antibody 1=Pou5f1/Oct4 || chip antibody manufa

  20. Experiment list: SRX214081 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available cturer 1=Santa Cruz || chip antibody 2=V5 || chip antibody manufacture...ge=Undifferentiated || treatment=Overexpress Sox2KE-V5 tagged || cell line=KH2 || chip antibody 1=Pou5f1/Oct4 || chip antibody manufa

  1. Experiment list: SRX214068 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available inoic acid || cell line=F9 || chip antibody 1=Pou5f1/Oct4 || chip antibody manufacturer 1=Santa Cruz || chip... antibody 2=none || chip antibody manufacturer 2=none http://dbarchive.biosciencedbc.jp/kyushu-u/mm9/eachDat

  2. ALICE chip processor

    CERN Multimedia

    Maximilien Brice

    2003-01-01

    This tiny chip provides data processing for the time projection chamber on ALICE. Known as the ALICE TPC Read Out (ALTRO), this device was designed to minimize the size and power consumption of the TPC front end electronics. This single chip contains 16 low-power analogue-to-digital converters with six million transistors of digital processing and 8 kbits of data storage.

  3. Pelly Crossing wood chip boiler

    Energy Technology Data Exchange (ETDEWEB)

    1985-03-11

    The Pelly wood chip project has demonstrated that wood chips are a successful fuel for space and domestic water heating in a northern climate. Pelly Crossing was chosen as a demonstration site for the following reasons: its extreme temperatures, an abundant local supply of resource material, the high cost of fuel oil heating and a lack of local employment. The major obstacle to the smooth operation of the boiler system was the poor quality of the chip supply. The production of poor quality chips has been caused by inadequate operation and maintenance of the chipper. Dull knives and faulty anvil adjustments produced chips and splinters far in excess of the one centimetre size specified for the system's design. Unanticipated complications have caused costs of the system to be higher than expected by approximately $15,000. The actual cost of the project was approximately $165,000. The first year of the system's operation was expected to accrue $11,600 in heating cost savings. This estimate was impossible to confirm given the system's irregular operation and incremental costs. Consistent operation of the system for a period of at least one year plus the installation of monitoring devices will allow the cost effectiveness to be calculated. The wood chip system's impact on the environment was estimated to be minimal. Wood chip burning was considered cleaner and safer than cordwood burning. 9 refs., 6 figs., 6 tabs.

  4. Programming Cell Adhesion for On-Chip Sequential Boolean Logic Functions.

    Science.gov (United States)

    Qu, Xiangmeng; Wang, Shaopeng; Ge, Zhilei; Wang, Jianbang; Yao, Guangbao; Li, Jiang; Zuo, Xiaolei; Shi, Jiye; Song, Shiping; Wang, Lihua; Li, Li; Pei, Hao; Fan, Chunhai

    2017-08-02

    Programmable remodelling of cell surfaces enables high-precision regulation of cell behavior. In this work, we developed in vitro constructed DNA-based chemical reaction networks (CRNs) to program on-chip cell adhesion. We found that the RGD-functionalized DNA CRNs are entirely noninvasive when interfaced with the fluidic mosaic membrane of living cells. DNA toehold with different lengths could tunably alter the release kinetics of cells, which shows rapid release in minutes with the use of a 6-base toehold. We further demonstrated the realization of Boolean logic functions by using DNA strand displacement reactions, which include multi-input and sequential cell logic gates (AND, OR, XOR, and AND-OR). This study provides a highly generic tool for self-organization of biological systems.

  5. Introduction to programmable shader in real time 3D computer graphics

    International Nuclear Information System (INIS)

    Uemura, Syuhei; Kirii, Keisuke; Matsumura, Makoto; Matsumoto, Kenichiro

    2004-01-01

    Nevertheless the visualization of large-scale data had played the important role which influences informational usefulness in the basic field of science, the high-end graphics system or the exclusive system needed to be used. On the other hand, in recent years, the progress speed of the capability of the video game console or the graphics board for PC has a remarkable thing reflecting the expansion tendency of TV game market in and outside the country. Especially, the ''programmable shader'' technology in which the several graphics chip maker has started implementation is the innovative technology which can also be called change of generation of real-time 3D graphics, and the scope of the visual expression technique has spread greatly. However, it cannot say that the development/use environment of software which used programmable shader are fully generalized, and the present condition is that the grope of the applied technology to overly the ultra high-speed/quality visualization of large-scale data is not prograssing. We provide the outline of programmable shader technology and consider the possibility of the application to large-scale data visualization. (author)

  6. A Single-Chip CMOS Pulse Oximeter with On-Chip Lock-In Detection

    Directory of Open Access Journals (Sweden)

    Diwei He

    2015-07-01

    Full Text Available Pulse oximetry is a noninvasive and continuous method for monitoring the blood oxygen saturation level. This paper presents the design and testing of a single-chip pulse oximeter fabricated in a 0.35 µm CMOS process. The chip includes photodiode, transimpedance amplifier, analogue band-pass filters, analogue-to-digital converters, digital signal processor and LED timing control. The experimentally measured AC and DC characteristics of individual circuits including the DC output voltage of the transimpedance amplifier, transimpedance gain of the transimpedance amplifier, and the central frequency and bandwidth of the analogue band-pass filters, show a good match (within 1% with the circuit simulations. With modulated light source and integrated lock-in detection the sensor effectively suppresses the interference from ambient light and 1/f noise. In a breath hold and release experiment the single chip sensor demonstrates consistent and comparable performance to commercial pulse oximetry devices with a mean of 1.2% difference. The single-chip sensor enables a compact and robust design solution that offers a route towards wearable devices for health monitoring.

  7. A Single-Chip CMOS Pulse Oximeter with On-Chip Lock-In Detection.

    Science.gov (United States)

    He, Diwei; Morgan, Stephen P; Trachanis, Dimitrios; van Hese, Jan; Drogoudis, Dimitris; Fummi, Franco; Stefanni, Francesco; Guarnieri, Valerio; Hayes-Gill, Barrie R

    2015-07-14

    Pulse oximetry is a noninvasive and continuous method for monitoring the blood oxygen saturation level. This paper presents the design and testing of a single-chip pulse oximeter fabricated in a 0.35 µm CMOS process. The chip includes photodiode, transimpedance amplifier, analogue band-pass filters, analogue-to-digital converters, digital signal processor and LED timing control. The experimentally measured AC and DC characteristics of individual circuits including the DC output voltage of the transimpedance amplifier, transimpedance gain of the transimpedance amplifier, and the central frequency and bandwidth of the analogue band-pass filters, show a good match (within 1%) with the circuit simulations. With modulated light source and integrated lock-in detection the sensor effectively suppresses the interference from ambient light and 1/f noise. In a breath hold and release experiment the single chip sensor demonstrates consistent and comparable performance to commercial pulse oximetry devices with a mean of 1.2% difference. The single-chip sensor enables a compact and robust design solution that offers a route towards wearable devices for health monitoring.

  8. A Programmable Biopotential Aquisition Front-end with a Resistance-free Current-balancing Instrumentation Amplifier

    Directory of Open Access Journals (Sweden)

    FARAGO, P.

    2018-05-01

    Full Text Available The development of wearable biomedical equipment benefits from low-power and low-voltage circuit techniques for reduced battery size and battery, or even battery-less, operation. This paper proposes a fully-differential low-power resistance-free programmable instrumentation amplifier for the analog front-end of biopotential monitoring systems. The proposed instrumentation amplifier implements the current balancing technique. Low power consumption is achieved with subthreshold biasing. To reduce chip area and enable integration, passive resistances have been replaced with active equivalents. Accordingly, the instrumentation amplifier gain is expressed as the ratio of two transconductance values. The proposed instrumentation amplifier exhibits two degrees of freedom: one to set the desired range and the other for fine-tuning of the voltage gain. The proposed IA is employed in a programmable biopotential acquisition front-end. The programmable frequency-selective behavior is achieved by having the lower cutoff frequency of a Gm-C Tow-Thomas biquad varied in a constant-C tuning approach. The proposed solutions and the programmability of the operation parameters to the specifications of particular bio-medical signals are validated on a 350nm CMOS process.

  9. Cost calculation model concerning small-scale production of chips and split firewood

    International Nuclear Information System (INIS)

    Ryynaenen, S.; Naett, H.; Valkonen, J.

    1995-01-01

    The TTS-Institute's Forestry Department has developed a computer-based cost calculation model for the production of wood chips and split firewood. This development work was carried out in conjunction with the nation-wide BIOENERGY -research programme. The said calculation model eases and speeds up the calculation of unit costs and resource needs in harvesting systems for wood chips and split firewood. The model also enables the user to find out how changes in the productivity and costs bases of different harvesting chains influences the unit costs of the system as a whole. The undertaking was composed of the following parts: clarification and modification of productivity bases for application in the model as mathematical models, clarification of machine and device costs bases, designing of the structure and functions of the calculation model, construction and testing of the model's 0-version, model calculations concerning typical chains, review of calculation bases, and charting of development needs focusing on the model. The calculation model was developed to serve research needs, but with further development it could be useful as a tool in forestry and agricultural extension work, related schools and colleges, and in the hands of firewood producers. (author)

  10. All-Digital Time-Domain CMOS Smart Temperature Sensor with On-Chip Linearity Enhancement.

    Science.gov (United States)

    Chen, Chun-Chi; Chen, Chao-Lieh; Lin, Yi

    2016-01-30

    This paper proposes the first all-digital on-chip linearity enhancement technique for improving the accuracy of the time-domain complementary metal-oxide semiconductor (CMOS) smart temperature sensor. To facilitate on-chip application and intellectual property reuse, an all-digital time-domain smart temperature sensor was implemented using 90 nm Field Programmable Gate Arrays (FPGAs). Although the inverter-based temperature sensor has a smaller circuit area and lower complexity, two-point calibration must be used to achieve an acceptable inaccuracy. With the help of a calibration circuit, the influence of process variations was reduced greatly for one-point calibration support, reducing the test costs and time. However, the sensor response still exhibited a large curvature, which substantially affected the accuracy of the sensor. Thus, an on-chip linearity-enhanced circuit is proposed to linearize the curve and achieve a new linearity-enhanced output. The sensor was implemented on eight different Xilinx FPGA using 118 slices per sensor in each FPGA to demonstrate the benefits of the linearization. Compared with the unlinearized version, the maximal inaccuracy of the linearized version decreased from 5 °C to 2.5 °C after one-point calibration in a range of -20 °C to 100 °C. The sensor consumed 95 μW using 1 kSa/s. The proposed linearity enhancement technique significantly improves temperature sensing accuracy, avoiding costly curvature compensation while it is fully synthesizable for future Very Large Scale Integration (VLSI) system.

  11. Lab-on a-Chip

    Science.gov (United States)

    1999-01-01

    Labs on chips are manufactured in many shapes and sizes and can be used for numerous applications, from medical tests to water quality monitoring to detecting the signatures of life on other planets. The eight holes on this chip are actually ports that can be filled with fluids or chemicals. Tiny valves control the chemical processes by mixing fluids that move in the tiny channels that look like lines, connecting the ports. Scientists at NASA's Marshall Space Flight Center (MSFC) in Huntsville, Alabama designed this chip to grow biological crystals on the International Space Station (ISS). Through this research, they discovered that this technology is ideally suited for solving the challenges of the Vision for Space Exploration. For example, thousands of chips the size of dimes could be loaded on a Martian rover looking for biosignatures of past or present life. Other types of chips could be placed in handheld devices used to monitor microbes in water or to quickly conduct medical tests on astronauts. The portable, handheld Lab-on-a Chip Application Development Portable Test System (LOCAD-PTS) made its debut flight aboard Discovery during the STS-116 mission launched December 9, 2006. The system allowed crew members to monitor their environment for problematic contaminants such as yeast, mold, and even E.coli, and salmonella. Once LOCAD-PTS reached the ISS, the Marshall team continued to manage the experiment, monitoring the study from a console in the Payload Operations Center at MSFC. The results of these studies will help NASA researchers refine the technology for future Moon and Mars missions. (NASA/MSFC/D.Stoffer)

  12. A heterogeneous multi-core platform for low power signal processing in systems-on-chip

    DEFF Research Database (Denmark)

    Paker, Ozgun; Sparsø, Jens; Haandbæk, Niels

    2002-01-01

    is based on message passing. The mini-cores are designed as parameterized soft macros intended for a synthesis based design flow. A 520.000 transistor 0.25µm CMOS prototype chip containing 6 mini-cores has been fabricated and tested. Its power consumption is only 50% higher than a hardwired ASIC and more......This paper presents a low-power and programmable DSP architecture - a heterogeneous multiprocessor platform consisting of standard CPU/DSP cores, and a set of simple instruction set processors called mini-cores each optimized for a particular class of algorithm (FIR, IIR, LMS, etc.). Communication...

  13. A Memory-Based Programmable Logic Device Using Look-Up Table Cascade with Synchronous Static Random Access Memories

    Science.gov (United States)

    Nakamura, Kazuyuki; Sasao, Tsutomu; Matsuura, Munehiro; Tanaka, Katsumasa; Yoshizumi, Kenichi; Nakahara, Hiroki; Iguchi, Yukihiro

    2006-04-01

    A large-scale memory-technology-based programmable logic device (PLD) using a look-up table (LUT) cascade is developed in the 0.35-μm standard complementary metal oxide semiconductor (CMOS) logic process. Eight 64 K-bit synchronous SRAMs are connected to form an LUT cascade with a few additional circuits. The features of the LUT cascade include: 1) a flexible cascade connection structure, 2) multi phase pseudo asynchronous operations with synchronous static random access memory (SRAM) cores, and 3) LUT-bypass redundancy. This chip operates at 33 MHz in 8-LUT cascades at 122 mW. Benchmark results show that it achieves a comparable performance to field programmable gate array (FPGAs).

  14. A Spacecraft Housekeeping System-on-Chip in a Radiation Hardened Structured ASIC

    Science.gov (United States)

    Suarez, George; DuMonthier, Jeffrey J.; Sheikh, Salman S.; Powell, Wesley A.; King, Robyn L.

    2012-01-01

    Housekeeping systems are essential to health monitoring of spacecraft and instruments. Typically, sensors are distributed across various sub-systems and data is collected using components such as analog-to-digital converters, analog multiplexers and amplifiers. In most cases programmable devices are used to implement the data acquisition control and storage, and the interface to higher level systems. Such discrete implementations require additional size, weight, power and interconnect complexity versus an integrated circuit solution, as well as the qualification of multiple parts. Although commercial devices are readily available, they are not suitable for space applications due the radiation tolerance and qualification requirements. The Housekeeping System-o n-A-Chip (HKSOC) is a low power, radiation hardened integrated solution suitable for spacecraft and instrument control and data collection. A prototype has been designed and includes a wide variety of functions including a 16-channel analog front-end for driving and reading sensors, analog-to-digital and digital-to-analog converters, on-chip temperature sensor, power supply current sense circuits, general purpose comparators and amplifiers, a 32-bit processor, digital I/O, pulse-width modulation (PWM) generators, timers and I2C master and slave serial interfaces. In addition, the device can operate in a bypass mode where the processor is disabled and external logic is used to control the analog and mixed signal functions. The device is suitable for stand-alone or distributed systems where multiple chips can be deployed across different sub-systems as intelligent nodes with computing and processing capabilities.

  15. Compound soil-tyre chips modified by cement as a road construction material

    Directory of Open Access Journals (Sweden)

    Panu Promputthangkoon

    2013-10-01

    Full Text Available This research attempts to overcome the two problems of low-quality soil and a growing number of discarded tyres bymixing low-CBR soil with recycled tyre chips. The compound soil-tyre chips was then stabilised by Portland cement with theaim of using them as a new material in road construction in order to reduce the occurrence of shrinkage cracks. To achievethe purposes of this research three standard geotechnical testing programmes were employed: (1 modified compaction tests,(2 California Bearing Ratio tests (CBR, and (3 unconfined compression tests. The modified compaction test results provedthat for the mixtures having very low tyre chips and cement content, the behaviour is very complex. It was also observed thatthe greater the percentage of rubber added the lower the global density. However, this is predictable as the specific gravityof the rubber is much lower than that of the soil. For the relationship between the optimum moisture content (OMC and thecement content, it was observed that there is no clear pattern.For the specimens having no cement added, the CBR for unsoaked specimens was observed to be greater than that forsoaked specimens. However, when the cement was introduced the CBR test showed that the resistance to penetration for thesoaked specimens was significantly greater, indicating the effects of cement added on the strength. In addition, it was foundthat the CBR values for both soaked and unsoaked specimens gradually increased with the increase of cement content.Lastly, the unconfined compressive strength progressively increased with the increased percentage of cement.

  16. Bioenergy Research Programme, Yearbook 1995. Production of wood fuels; Bioenergian tutkimusohjelma, vuosikirja 1995. Puupolttoaineen tuotantotekniikka

    Energy Technology Data Exchange (ETDEWEB)

    Alakangas, E [ed.

    1997-12-31

    Bioenergy Research Programme is one of the energy technology research programmes of the Technology Development Center TEKES. The aim of the Bioenergy Research Programme is to increase, by using technical research and development, the economically profitable and environmentally sound utilisation of bioenergy, to improve the competitiveness of present peat and wood fuels, and to develop new competitive fuels and equipment related to bioenergy. The funding for 1995 was nearly 52 million FIM and the number of projects 66. The main goal of the wood fuels research area is to develop new production methods in order to decrease the production costs to the level of imported fuels. The total potential of the wood fuel use should be at least 1.0 million toe/a (5.5 million m{sup 3}). During the year 1995 There were over 30 projects concerning the production of wood derived fuels going on. Nearly half of them focused on integrated production of pulp wood and wood fuel. About ten projects was carried out to promote the wood fuel production from logging residues. Other topics were firewood production, production logistics and wood fuel resources. For production of fuel chips from logging residues, a new chipper truck, MOHA-SISU, was introduced. The new machine gives a new logistic solution resulting in high productivity and reasonable operating costs. In Mikkeli region three years of active work promoted the usage of wood fuel in a district power plant to the level of over 110 000 m{sup 3} of fuel chips. The production costs tend to be a little high in average, and the production chain still needs to be improved

  17. Bioenergy Research Programme, Yearbook 1995. Production of wood fuels; Bioenergian tutkimusohjelma, vuosikirja 1995. Puupolttoaineen tuotantotekniikka

    Energy Technology Data Exchange (ETDEWEB)

    Alakangas, E. [ed.

    1996-12-31

    Bioenergy Research Programme is one of the energy technology research programmes of the Technology Development Center TEKES. The aim of the Bioenergy Research Programme is to increase, by using technical research and development, the economically profitable and environmentally sound utilisation of bioenergy, to improve the competitiveness of present peat and wood fuels, and to develop new competitive fuels and equipment related to bioenergy. The funding for 1995 was nearly 52 million FIM and the number of projects 66. The main goal of the wood fuels research area is to develop new production methods in order to decrease the production costs to the level of imported fuels. The total potential of the wood fuel use should be at least 1.0 million toe/a (5.5 million m{sup 3}). During the year 1995 There were over 30 projects concerning the production of wood derived fuels going on. Nearly half of them focused on integrated production of pulp wood and wood fuel. About ten projects was carried out to promote the wood fuel production from logging residues. Other topics were firewood production, production logistics and wood fuel resources. For production of fuel chips from logging residues, a new chipper truck, MOHA-SISU, was introduced. The new machine gives a new logistic solution resulting in high productivity and reasonable operating costs. In Mikkeli region three years of active work promoted the usage of wood fuel in a district power plant to the level of over 110 000 m{sup 3} of fuel chips. The production costs tend to be a little high in average, and the production chain still needs to be improved

  18. Optimal selection of TLD chips

    International Nuclear Information System (INIS)

    Phung, P.; Nicoll, J.J.; Edmonds, P.; Paris, M.; Thompson, C.

    1996-01-01

    Large sets of TLD chips are often used to measure beam dose characteristics in radiotherapy. A sorting method is presented to allow optimal selection of chips from a chosen set. This method considers the variation

  19. Low Voltage Current-Reused Pseudo-Differential Programmable Gain Amplifier

    Science.gov (United States)

    Nguyen, Huy-Hieu; Lee, Jeong-Seon; Lee, Sang-Gug

    This paper reports a current-reused pseudo-differential (CRPD) programmable gain amplifier (PGA) that demonstrates small size, low power, wide band, low noise, and high linearity operation with 4 control bits. Implemented in 0.18um CMOS technology, the PGA shows the gain range from -9.9 to 8.3dB with gain error of less than ±0.38dB. The IIP3, P1dB, and smallest 3-dB bandwidth are 10.5 to 27dBm, -9 to 9.5dBm, and 250MHz, respectively. The PGA occupies the chip area of 0.04mm2 and consumes only 460 µA from a 1.2V supply.

  20. Experiment list: SRX110782 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available e3 (ab6002, abcam), Pol II (CTD4H8, Millipore) || chip antibody 1 manufacturer=ab...cam || chip antibody 2=Pol II (CTD4H8, Millipore) || chip antibody 2 manufacturer=Millipore http://dbarchive

  1. Avaliação da aceitação de "chips" de mandioca Acceptance evaluation of cassava chips

    Directory of Open Access Journals (Sweden)

    Regina Kitagawa Grizotto

    2003-12-01

    Full Text Available Pré-tratamentos como o cozimento, a fermentação natural e a secagem parcial foram aplicados em raízes de mandioca, visando a obtenção de "chips" comestíveis. A avaliação sensorial foi feita com base na aceitação e aparência dos "chips" das variedades IAC Mantiqueira e IAC 576.70. Trinta consumidores potenciais do produto foram selecionados em função da disponibilidade e interesse em participar dos testes. Foi utilizada escala hedônica de 7 pontos, onde os provadores avaliaram as amostras delineadas em blocos casualizados. Os resultados obtidos mostraram que os "chips" controle e pré-cozidos foram aceitos sensorialmente, apresentado médias de 5,1 (gostei ligeiramente para IAC Mantiqueira e 6,0 (gostei moderadamente para IAC 576.70. Os "chips" pré-fermentados de ambas variedades foram rejeitados. Os termos de agrado mais comentados pelos provadores foram "sabor de mandioca", "crocância" e "textura". Os termos de desagrado mais citados incluem "textura dura", "falta sabor de mandioca" e "gosto de óleo". Os provadores consideraram adequada a aparência dos "chips" de ambas variedades, sendo ligeiramente preferida a aparência dos "chips" da IAC 576.70, com exceção dos "chips" cozidos por 8 minutos e os fermentados, rejeitados pelos consumidores. A cor amarela da polpa pode ter influenciado a aceitação da variedade IAC 576.70. A composição centesimal e o teor de fibras na mandioca in natura e, o teor de lipídeos em "chips" de mandioca, também foram apresentados.Pre-treatments such as cooking, natural fermentation and partial drying were applied to cassava roots, aimed at obtaining edible cassava chips. The sensory evaluation was based on the acceptance and appearance of the chips, using the varieties IAC Mantiqueira and IAC 576.70. Thirty potential consumers of the product were selected based on their availability and interest. A 7-point hedonic scale was used, all the judges evaluating all the samples using a randomised

  2. Fully Automated On-Chip Imaging Flow Cytometry System with Disposable Contamination-Free Plastic Re-Cultivation Chip

    Directory of Open Access Journals (Sweden)

    Tomoyuki Kaneko

    2011-06-01

    Full Text Available We have developed a novel imaging cytometry system using a poly(methyl methacrylate (PMMA based microfluidic chip. The system was contamination-free, because sample suspensions contacted only with a flammable PMMA chip and no other component of the system. The transparency and low-fluorescence of PMMA was suitable for microscopic imaging of cells flowing through microchannels on the chip. Sample particles flowing through microchannels on the chip were discriminated by an image-recognition unit with a high-speed camera in real time at the rate of 200 event/s, e.g., microparticles 2.5 μm and 3.0 μm in diameter were differentiated with an error rate of less than 2%. Desired cells were separated automatically from other cells by electrophoretic or dielectrophoretic force one by one with a separation efficiency of 90%. Cells in suspension with fluorescent dye were separated using the same kind of microfluidic chip. Sample of 5 μL with 1 × 106 particle/mL was processed within 40 min. Separated cells could be cultured on the microfluidic chip without contamination. The whole operation of sample handling was automated using 3D micropipetting system. These results showed that the novel imaging flow cytometry system is practically applicable for biological research and clinical diagnostics.

  3. Chip-to-chip SnO2 nanowire network sensors for room temperature H2 detection

    Science.gov (United States)

    Köck, A.; Brunet, E.; Mutinati, G. C.; Maier, T.; Steinhauer, S.

    2012-06-01

    The employment of nanowires is a very powerful strategy to improve gas sensor performance. We demonstrate a gas sensor device, which is based on silicon chip-to-chip synthesis of ultralong tin oxide (SnO2) nanowires. The sensor device employs an interconnected SnO2 nanowire network configuration, which exhibits a huge surface-to-volume ratio and provides full access of the target gas to the nanowires. The chip-to-chip SnO2 nanowire device is able to detect a H2 concentration of only 20 ppm in synthetic air with ~ 60% relative humidity at room temperature. At an operating temperature of 300°C a concentration of 50 ppm H2 results in a sensitivity of 5%. At this elevated temperature the sensor shows a linear response in a concentration range between 10 ppm and 100 ppm H2. The SnO2-nanowire fabrication procedure based on spray pyrolysis and subsequent annealing is performed at atmospheric pressure, requires no vacuum and allows upscale of the substrate to a wafer size. 3D-integration with CMOS chips is proposed as viable way for practical realization of smart nanowire based gas sensor devices for the consumer market.

  4. ChIP on SNP-chip for genome-wide analysis of human histone H4 hyperacetylation

    Directory of Open Access Journals (Sweden)

    Porter Christopher J

    2007-09-01

    Full Text Available Abstract Background SNP microarrays are designed to genotype Single Nucleotide Polymorphisms (SNPs. These microarrays report hybridization of DNA fragments and therefore can be used for the purpose of detecting genomic fragments. Results Here, we demonstrate that a SNP microarray can be effectively used in this way to perform chromatin immunoprecipitation (ChIP on chip as an alternative to tiling microarrays. We illustrate this novel application by mapping whole genome histone H4 hyperacetylation in human myoblasts and myotubes. We detect clusters of hyperacetylated histone H4, often spanning across up to 300 kilobases of genomic sequence. Using complementary genome-wide analyses of gene expression by DNA microarray we demonstrate that these clusters of hyperacetylated histone H4 tend to be associated with expressed genes. Conclusion The use of a SNP array for a ChIP-on-chip application (ChIP on SNP-chip will be of great value to laboratories whose interest is the determination of general rules regarding the relationship of specific chromatin modifications to transcriptional status throughout the genome and to examine the asymmetric modification of chromatin at heterozygous loci.

  5. Simulating the Effect of Modulated Tool-Path Chip Breaking On Surface Texture and Chip Length

    Energy Technology Data Exchange (ETDEWEB)

    Smith, K.S.; McFarland, J.T.; Tursky, D. A.; Assaid, T. S.; Barkman, W. E.; Babelay, Jr., E. F.

    2010-04-30

    One method for creating broken chips in turning processes involves oscillating the cutting tool in the feed direction utilizing the CNC machine axes. The University of North Carolina at Charlotte and the Y-12 National Security Complex have developed and are refining a method to reliably control surface finish and chip length based on a particular machine's dynamic performance. Using computer simulations it is possible to combine the motion of the machine axes with the geometry of the cutting tool to predict the surface characteristics and map the surface texture for a wide range of oscillation parameters. These data allow the selection of oscillation parameters to simultaneously ensure broken chips and acceptable surface characteristics. This paper describes the machine dynamic testing and characterization activities as well as the computational method used for evaluating and predicting chip length and surface texture.

  6. Digitally programmable microfluidic automaton for multiscale combinatorial mixing and sample processing†

    Science.gov (United States)

    Jensen, Erik C.; Stockton, Amanda M.; Chiesl, Thomas N.; Kim, Jungkyu; Bera, Abhisek; Mathies, Richard A.

    2013-01-01

    A digitally programmable microfluidic Automaton consisting of a 2-dimensional array of pneumatically actuated microvalves is programmed to perform new multiscale mixing and sample processing operations. Large (µL-scale) volume processing operations are enabled by precise metering of multiple reagents within individual nL-scale valves followed by serial repetitive transfer to programmed locations in the array. A novel process exploiting new combining valve concepts is developed for continuous rapid and complete mixing of reagents in less than 800 ms. Mixing, transfer, storage, and rinsing operations are implemented combinatorially to achieve complex assay automation protocols. The practical utility of this technology is demonstrated by performing automated serial dilution for quantitative analysis as well as the first demonstration of on-chip fluorescent derivatization of biomarker targets (carboxylic acids) for microchip capillary electrophoresis on the Mars Organic Analyzer. A language is developed to describe how unit operations are combined to form a microfluidic program. Finally, this technology is used to develop a novel microfluidic 6-sample processor for combinatorial mixing of large sets (>26 unique combinations) of reagents. The digitally programmable microfluidic Automaton is a versatile programmable sample processor for a wide range of process volumes, for multiple samples, and for different types of analyses. PMID:23172232

  7. Power-aware transceiver design for half-duplex bidirectional chip-to-chip optical interconnects

    International Nuclear Information System (INIS)

    Sangirov Jamshid; Ukaegbu Ikechi Augustine; Lee Tae-Woo; Park Hyo-Hoon; Sangirov Gulomjon

    2013-01-01

    A power-aware transceiver for half-duplex bidirectional chip-to-chip optical interconnects has been designed and fabricated in a 0.13 μm complementary metal–oxide–semiconductor (CMOS) technology. The transceiver can detect the presence and absence of received signals and saves 55% power in Rx enabled mode and 45% in Tx enabled mode. The chip occupies an area of 1.034 mm 2 and achieves a 3-dB bandwidth of 6 GHz and 7 GHz in Tx and Rx modes, respectively. The disabled outputs for the Tx and Rx modes are isolated with 180 dB and 139 dB, respectively, from the enabled outputs. Clear eye diagrams are obtained at 4.25 Gbps for both the Tx and Rx modes. (semiconductor integrated circuits)

  8. Design of the ANTARES LCM-DAQ board test bench using a FPGA-based system-on-chip approach

    Energy Technology Data Exchange (ETDEWEB)

    Anvar, S. [CEA Saclay, DAPNIA/SEDI, 91191 Gif-sur-Yvette Cedex (France); Kestener, P. [CEA Saclay, DAPNIA/SEDI, 91191 Gif-sur-Yvette Cedex (France)]. E-mail: pierre.kestener@cea.fr; Le Provost, H. [CEA Saclay, DAPNIA/SEDI, 91191 Gif-sur-Yvette Cedex (France)

    2006-11-15

    The System-on-Chip (SoC) approach consists in using state-of-the-art FPGA devices with embedded RISC processor cores, high-speed differential LVDS links and ready-to-use multi-gigabit transceivers allowing development of compact systems with substantial number of IO channels. Required performances are obtained through a subtle separation of tasks between closely cooperating programmable hardware logic and user-friendly software environment. We report about our experience in using the SoC approach for designing the production test bench of the off-shore readout system for the ANTARES neutrino experiment.

  9. A Single-Chip CMOS Pulse Oximeter with On-Chip Lock-In Detection

    OpenAIRE

    Diwei He; Stephen P. Morgan; Dimitrios Trachanis; Jan van Hese; Dimitris Drogoudis; Franco Fummi; Francesco Stefanni; Valerio Guarnieri; Barrie R. Hayes-Gill

    2015-01-01

    Pulse oximetry is a noninvasive and continuous method for monitoring the blood oxygen saturation level. This paper presents the design and testing of a single-chip pulse oximeter fabricated in a 0.35 ?m CMOS process. The chip includes photodiode, transimpedance amplifier, analogue band-pass filters, analogue-to-digital converters, digital signal processor and LED timing control. The experimentally measured AC and DC characteristics of individual circuits including the DC output voltage of the...

  10. Experiment list: SRX485203 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available 346544: Rhino ChIP from control germline knock-down ovaries, replicate 2; Drosophila melanogaster; ChIP-Seq ...source_name=Rhino ChIP from control germline knock-down ovaries || developmental stage=4-6 days old adult ||... Sex=female || tissue=ovary || germline knock-down=control || chip antibody=custo

  11. Experiment list: SRX485202 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available 346543: Rhino ChIP from control germline knock-down ovaries, replicate 1; Drosophila melanogaster; ChIP-Seq ...source_name=Rhino ChIP from control germline knock-down ovaries || developmental stage=4-6 days old adult ||... Sex=female || tissue=ovary || germline knock-down=control || chip antibody=custo

  12. Experiment list: SRX485210 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available 6551: Deadlock ChIP from deadlock germline knock-down ovaries; Drosophila melanogaster; ChIP-Seq source_name...=Deadlock ChIP from deadlock germline knock-down ovaries || developmental stage=4-6 days old adult || Sex=fe...male || tissue=ovary || germline knock-down=deadlock || chip antibody=custom-made

  13. Experiment list: SRX485211 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available 346552: Cutoff ChIP from control germline knock-down ovaries; Drosophila melanogaster; ChIP-Seq source_name=...Cutoff ChIP from control germline knock-down ovaries || developmental stage=4-6 days old adult || Sex=female... || tissue=ovary || germline knock-down=control || chip antibody=custom-made rabb

  14. On-chip antenna: Practical design and characterization considerations

    KAUST Repository

    Shamim, Atif; Salama, Khaled N.; Sedky, S.; Soliman, E. A.

    2012-01-01

    This paper highlights the challenges of an emergent field, namely, on-chip antenna design. Consistent with the RF System-on-Chip (SoC) concept, co-design strategy for circuits and on-chip antennas is described. A number of design and layout issues, arising from the highly integrated nature of this kind of systems, are discussed. The characterization difficulties related to on-chip antennas radiation properties are also highlighted. Finally, a novel on-wafer test fixture is proposed to measure the gain and radiation pattern of the on-chip antennas in the anechoic chamber.

  15. On-chip antenna: Practical design and characterization considerations

    KAUST Repository

    Shamim, Atif

    2012-07-28

    This paper highlights the challenges of an emergent field, namely, on-chip antenna design. Consistent with the RF System-on-Chip (SoC) concept, co-design strategy for circuits and on-chip antennas is described. A number of design and layout issues, arising from the highly integrated nature of this kind of systems, are discussed. The characterization difficulties related to on-chip antennas radiation properties are also highlighted. Finally, a novel on-wafer test fixture is proposed to measure the gain and radiation pattern of the on-chip antennas in the anechoic chamber.

  16. Influence of passivation process on chip performance

    NARCIS (Netherlands)

    Lu, J.; Kovalgin, Alexeij Y.; Schmitz, Jurriaan

    2009-01-01

    In this work, we have studied the performance of CMOS chips before and after a low temperature post-processing step. In order to prevent damage to the IC chips by the post-processing steps, a first passivation layers is needed on top of the IC chips. Two different passivation layer deposition

  17. Experiment list: SRX485205 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available 46546: Rhino ChIP from deadlock germline knock-down ovaries; Drosophila melanogaster; ChIP-Seq source_name=R...hino ChIP from deadlock germline knock-down ovaries || developmental stage=4-6 days old adult || Sex=female ...|| tissue=ovary || germline knock-down=deadlock || chip antibody=custom-made rabb

  18. Experiment list: SRX485212 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available 346553: Cutoff ChIP from cutoff germline knock-down ovaries; Drosophila melanogaster; ChIP-Seq source_name=C...utoff ChIP from cutoff germline knock-down ovaries || developmental stage=4-6 days old adult || Sex=female |...| tissue=ovary || germline knock-down=cutoff || chip antibody=custom-made rabbit

  19. Experiment list: SRX485206 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available 346547: Rhino ChIP from cutoff germline knock-down ovaries; Drosophila melanogaster; ChIP-Seq source_name=Rh...ino ChIP from cutoff germline knock-down ovaries || developmental stage=4-6 days old adult || Sex=female || ...tissue=ovary || germline knock-down=cutoff || chip antibody=custom-made rabbit po

  20. Experiment list: SRX485209 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available 346550: Deadlock ChIP from control germline knock-down ovaries; Drosophila melanogaster; ChIP-Seq source_nam...e=Deadlock ChIP from control germline knock-down ovaries || developmental stage=4-6 days old adult || Sex=fe...male || tissue=ovary || germline knock-down=control || chip antibody=custom-made

  1. The use of forest chips in Finland

    International Nuclear Information System (INIS)

    Hakkila, P.

    2001-01-01

    International commitments require the industrial world to restrict their greenhouse gas emissions. In Finland, where the annual timber cut per capita is more than ten times the average cut in the other EU countries, the primary means to reduce CO 2 emissions is to replace fossil fuels with forest biomass. The annual consumption of wood-based energy corresponds to 6 million tonnes of oil equivalent (toe) or almost 20% of the total primary energy consumption. The goal is to rise the annual production of wood-based energy to 7.8 million toe by 2010. Substantial part of the targeted increase could be obtained by forest chips produced of unmerchantable small-diameter trees and logging residues. The goal for 2010 is to use 5 million solid m 3 of forest chips, which equals to 0.9 million toe. The use of forest chips is increasing. About 474 000 solid m 3 of forest chips were used as fuel in 1999. At the moment, the growth is rapid especially in cogeneration plants producing both heat and electricity. The growth is based primarily on chips obtained from logging residues. The price of forest chips decreased considerably during the 1990s but the price range remained wide. Chips made of logging residues are cheaper than those made of small trees. The average price of forest chips at the plant, VAT excluded, is about 53 FIM per MWh. In Sweden, the average price is more than 40% higher

  2. Experiment list: SRX485220 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available 53 GSM1346561: RNA Polymerase II ChIP from rhino germline knock-down ovaries; Drosophila melanogaster; ChIP-...Seq source_name=RNA Polymerase II ChIP from rhino germline knock-down ovaries || developmental stage=4-6 day...s old adult || Sex=female || tissue=ovary || germline knock-down=rhino || chip an

  3. Experiment list: SRX485204 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available 346545: Rhino ChIP from rhino germline knock-down ovaries; Drosophila melanogaster; ChIP-Seq source_name=Rhi...no ChIP from rhino germline knock-down ovaries || developmental stage=4-6 days old adult || Sex=female || ti...ssue=ovary || germline knock-down=rhino || chip antibody=custom-made rabbit polyc

  4. Experiment list: SRX485208 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available 346549: Rhino ChIP from piwi germline knock-down ovaries, replicate 2; Drosophila melanogaster; ChIP-Seq sou...rce_name=Rhino ChIP from piwi germline knock-down ovaries || developmental stage=4-6 days old adult || Sex=f...emale || tissue=ovary || germline knock-down=piwi || chip antibody=custom-made ra

  5. A programmable CCD driver circuit for multiphase CCD operation

    International Nuclear Information System (INIS)

    Ewin, A.J.; Reed, K.V.

    1989-01-01

    A programmable CCD driver circuit was designed to drive CCD's in multiphased modes. The purpose of the drive electronics was to operate developmental CCD imaging arrays for NASA's Moderate Resolution Imaging Spectrometer - Tiltable (MODIS-T). Five prototype arrays were designed. Valid's Graphics Editor (GED) was used to design the driver. With this driver design, any of the five arrays can be readout. Designing the driver with GED allowed functional simulation, timing verification, and certain packaging analyses to be done on the design before fabrication. The driver verified its function with the master clock running up to 10 MHz. This suggests a maximum rate of 400 Kpixels/sec. Timing and packaging parameters were verified. the design uses 54 TTL component chips

  6. METAL CHIP HEATING PROCESS INVESTIGATION (Part I

    Directory of Open Access Journals (Sweden)

    O. M. Dyakonov

    2007-01-01

    Full Text Available The main calculation methods for heat- and mass transfer in porous heterogeneous medium have been considered. The paper gives an evaluation of the possibility to apply them for calculation of metal chip heating process. It has been shown that a description of transfer processes in a chip has its own specific character that is attributed to difference between thermal and physical properties of chip material and lubricant-coolant components on chip surfaces. It has been determined that the known expressions for effective heat transfer coefficients can be used as basic ones while approaching mutually penetrating continuums. A mathematical description of heat- and mass transfer in chip medium can be considered as a basis of mathematical modeling, numerical solution and parameter optimization of the mentioned processes.

  7. A contact-lens-shaped IC chip technology

    International Nuclear Information System (INIS)

    Liu, Ching-Yu; Yang, Frank; Teng, Chih-Chiao; Fan, Long-Sheng

    2014-01-01

    We report on novel contact-lens-shaped silicon integrated circuit chip technology for applications such as forming a conforming retinal prosthesis. This is achieved by means of patterning thin films of high residual stress on top of a shaped thin silicon substrate. Several strategies are employed to achieve curvatures of various amounts. Firstly, high residual stress on a thin film makes a thin chip deform into a designed three-dimensional shape. Also, a series of patterned stress films and ‘petal-shaped’ chips were fabricated and analyzed. Large curvatures can also be formed and maintained by the packaging process of bonding the chips to constraining elements such as thin-film polymer ring structures. As a demonstration, a complementary metal oxide semiconductor transistor (CMOS) image-sensing retina chip is made into a contact-lens shape conforming to a human eyeball 12.5 mm in radius. This non-planar and flexible chip technology provides a desirable device surface interface to soft tissues or non-planar bio surfaces and opens up many other possibilities for biomedical applications. (paper)

  8. Wood chip delivery and research project at Mikkeli region

    International Nuclear Information System (INIS)

    Saksa, T.; Auvinen, P.

    1995-01-01

    In 1994, a large-scale energywood production chain was started as a co-operation project by the Mikkeli city forest office and local forestry societies. Over 60 000 m 3 (about 46 000 MWh of energy) of forest processed chips were delivered to Pursiala heat and power plant in Mikkeli. About 60 % of these chips was whole tree chips from improvement cuttings of young forest stands and the rest was logging waste chips from regeneration cutting areas. The average total delivery costs of forest processed chips after reduction of energywood and other subsidies were approximately 51 FIM/m 3 (68 FIM/MWh) for the whole tree chips and 40 FIM/m 3 (53 FIM/MWh) for logging waste chips. The delivery costs of wood chips could compete with those of fuel peat only in the most favourable cases. The resources of forest processed chips were studied on the basis of forestry plans. According to the study, there is enough raw material for permanent, large-scale delivery of forest processed chips (up to 250 000 m 3 /a) in the forests located at a distance of under 40 road kilometers from the Pursiala heat and power plant. The following project stages will involve further development of the wood chip delivery chain logistics, as well as improvement of logging and chipping equipment and methods in energywood and logging waste production. Also the effects of wood energy production on the economy and environment of the whole Mikkeli region will be studied. (author)

  9. Experiment list: SRX485222 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available 4me2 ChIP from control germline knock-down ovaries, replicate 2; Drosophila melanogaster; ChIP-Seq source_na...me=H3K4me2 ChIP from control germline knock-down ovaries || developmental stage=4-6 days old adult || Sex=fe...male || tissue=ovary || germline knock-down=control || chip antibody=Anti-dimethy

  10. Experiment list: SRX485221 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available K4me2 ChIP from control germline knock-down ovaries, replicate 1; Drosophila melanogaster; ChIP-Seq source_n...ame=H3K4me2 ChIP from control germline knock-down ovaries || developmental stage=4-6 days old adult || Sex=f...emale || tissue=ovary || germline knock-down=control || chip antibody=Anti-dimeth

  11. Rework of flip chip bonded radiation pixel detectors

    International Nuclear Information System (INIS)

    Vaehaenen, S.; Heikkinen, H.; Pohjonen, H.; Salonen, J.; Savolainen-Pulli, S.

    2008-01-01

    In this paper, some practical aspects of reworking flip chip hybridized pixel detectors are discussed. As flip chip technology has been advancing in terms of placement accuracy and reliability, large-area hybrid pixel detectors have been developed. The area requirements are usually fulfilled by placing several readout chips (ROCs) on single sensor chip. However, as the number of ROCs increases, the probability of failure in the hybridization process and the ROC operation also increases. Because high accuracy flip chip bonding takes time, a significant part of the price of a pixel detector comes from the flip chip assembly process itself. As large-area detector substrates are expensive, and many flip chip placements are required, the price of an assembled detector can become very high. In a typical case, there is just one bad ROC (out of several) on a faulty detector to be replaced. Considering the high price of pixel detectors and the fact that reworking faulty ROCs does not take much longer than the original placement, it is worthwhile to investigate the feasibility of a rework process

  12. Rework of flip chip bonded radiation pixel detectors

    Energy Technology Data Exchange (ETDEWEB)

    Vaehaenen, S. [VTT MEMS and Micropackaging, Espoo 02150 (Finland)], E-mail: sami.vahanen@vtt.fi; Heikkinen, H.; Pohjonen, H.; Salonen, J.; Savolainen-Pulli, S. [VTT MEMS and Micropackaging, Espoo 02150 (Finland)

    2008-06-11

    In this paper, some practical aspects of reworking flip chip hybridized pixel detectors are discussed. As flip chip technology has been advancing in terms of placement accuracy and reliability, large-area hybrid pixel detectors have been developed. The area requirements are usually fulfilled by placing several readout chips (ROCs) on single sensor chip. However, as the number of ROCs increases, the probability of failure in the hybridization process and the ROC operation also increases. Because high accuracy flip chip bonding takes time, a significant part of the price of a pixel detector comes from the flip chip assembly process itself. As large-area detector substrates are expensive, and many flip chip placements are required, the price of an assembled detector can become very high. In a typical case, there is just one bad ROC (out of several) on a faulty detector to be replaced. Considering the high price of pixel detectors and the fact that reworking faulty ROCs does not take much longer than the original placement, it is worthwhile to investigate the feasibility of a rework process.

  13. Multimedia-Based Chip Design Education.

    Science.gov (United States)

    Catalkaya, Tamer; Golze, Ulrich

    This paper focuses on multimedia computer-based training programs on chip design. Their development must be fast and economical, in order to be affordable by technical university institutions. The self-produced teaching program Illusion, which demonstrates a monitor controller as an example of a small but complete chip design, was implemented to…

  14. Experiment list: SRX485218 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available K9me3 ChIP from piwi germline knock-down ovaries, replicate 2; Drosophila melanogaster; ChIP-Seq source_name...=H3K9me3 ChIP from piwi germline knock-down ovaries || developmental stage=4-6 days old adult || Sex=female ...|| tissue=ovary || germline knock-down=piwi || chip antibody=Histone H3K9me3 anti

  15. Experiment list: SRX485213 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available K9me3 ChIP from control germline knock-down ovaries, replicate 1; Drosophila melanogaster; ChIP-Seq source_n...ame=H3K9me3 ChIP from control germline knock-down ovaries || developmental stage=4-6 days old adult || Sex=f...emale || tissue=ovary || germline knock-down=control || chip antibody=Histone H3K

  16. Experiment list: SRX485214 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available K9me3 ChIP from control germline knock-down ovaries, replicate 2; Drosophila melanogaster; ChIP-Seq source_n...ame=H3K9me3 ChIP from control germline knock-down ovaries || developmental stage=4-6 days old adult || Sex=f...emale || tissue=ovary || germline knock-down=control || chip antibody=Histone H3K

  17. 75 FR 16149 - Medicaid and CHIP Programs; Meeting of the CHIP Working Group-April 26, 2010

    Science.gov (United States)

    2010-03-31

    ... DEPARTMENT OF HEALTH AND HUMAN SERVICES Centers for Medicare & Medicaid Services [CMS-2312-N] DEPARTMENT OF LABOR Employee Benefits Security Administration Medicaid and CHIP Programs; Meeting of the CHIP Working Group-- April 26, 2010 AGENCIES: Centers for Medicare & Medicaid Services (CMS), Department of...

  18. Modelling, Synthesis, and Configuration of Networks-on-Chips

    DEFF Research Database (Denmark)

    Stuart, Matthias Bo

    This thesis presents three contributions in two different areas of network-on-chip and system-on-chip research: Application modelling and identifying and solving different optimization problems related to two specific network-on-chip architectures. The contribution related to application modelling...... is an analytical method for deriving the worst-case traffic pattern caused by an application and the cache-coherence protocol in a cache-coherent shared-memory system. The contributions related to network-on-chip optimization problems consist of two parts: The development and evaluation of six heuristics...... for solving the network synthesis problem in the MANGO network-on-chip, and the identification and formalization of the ReNoC configuration problem together with three heuristics for solving it....

  19. Research of Dielectric Breakdown Micro fluidic Sampling Chip

    International Nuclear Information System (INIS)

    Jiang, F.; Lei, Y.; Yu, J.

    2013-01-01

    Micro fluidic chip is mainly driven electrically by external electrode and array electrode, but there are certain disadvantages in both of ways, which affect the promotion and application of micro fluidic technology. This paper discusses a scheme that uses the conductive solution in a microchannel made by PDMS, replacing electrodes and the way of dielectric breakdown to achieve microfluidic chip driver. It could reduce the driving voltage and simplify the chip production process. To prove the feasibility of this method, we produced a micro fluidic chip used in PDMS material with the lithography technology and experimented it. The results showed that using the dielectric breakdown to achieve microfluidic chip driver is feasible, and it has certain application prospect.

  20. Experiment list: SRX485216 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available 3K9me3 ChIP from rhino germline knock-down ovaries, replicate 2; Drosophila melanogaster; ChIP-Seq source_na...me=H3K9me3 ChIP from rhino germline knock-down ovaries || developmental stage=4-6 days old adult || Sex=fema...le || tissue=ovary || germline knock-down=rhino || chip antibody=Histone H3K9me3

  1. Experiment list: SRX485215 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available K9me3 ChIP from rhino germline knock-down ovaries, replicate 1; Drosophila melanogaster; ChIP-Seq source_nam...e=H3K9me3 ChIP from rhino germline knock-down ovaries || developmental stage=4-6 days old adult || Sex=femal...e || tissue=ovary || germline knock-down=rhino || chip antibody=Histone H3K9me3 a

  2. Experiment list: SRX485217 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available 3K9me3 ChIP from piwi germline knock-down ovaries, replicate 1; Drosophila melanogaster; ChIP-Seq source_nam...e=H3K9me3 ChIP from piwi germline knock-down ovaries || developmental stage=4-6 days old adult || Sex=female... || tissue=ovary || germline knock-down=piwi || chip antibody=Histone H3K9me3 ant

  3. ReseqChip: Automated integration of multiple local context probe data from the MitoChip array in mitochondrial DNA sequence assembly

    Directory of Open Access Journals (Sweden)

    Spang Rainer

    2009-12-01

    Full Text Available Abstract Background The Affymetrix MitoChip v2.0 is an oligonucleotide tiling array for the resequencing of the human mitochondrial (mt genome. For each of 16,569 nucleotide positions of the mt genome it holds two sets of four 25-mer probes each that match the heavy and the light strand of a reference mt genome and vary only at their central position to interrogate all four possible alleles. In addition, the MitoChip v2.0 carries alternative local context probes to account for known mtDNA variants. These probes have been neglected in most studies due to the lack of software for their automated analysis. Results We provide ReseqChip, a free software that automates the process of resequencing mtDNA using multiple local context probes on the MitoChip v2.0. ReseqChip significantly improves base call rate and sequence accuracy. ReseqChip is available at http://code.open-bio.org/svnweb/index.cgi/bioperl/browse/bioperl-live/trunk/Bio/Microarray/Tools/. Conclusions ReseqChip allows for the automated consolidation of base calls from alternative local mt genome context probes. It thereby improves the accuracy of resequencing, while reducing the number of non-called bases.

  4. Thermal-Aware Scheduling for Future Chip Multiprocessors

    Directory of Open Access Journals (Sweden)

    Pedro Trancoso

    2007-04-01

    Full Text Available The increased complexity and operating frequency in current single chip microprocessors is resulting in a decrease in the performance improvements. Consequently, major manufacturers offer chip multiprocessor (CMP architectures in order to keep up with the expected performance gains. This architecture is successfully being introduced in many markets including that of the embedded systems. Nevertheless, the integration of several cores onto the same chip may lead to increased heat dissipation and consequently additional costs for cooling, higher power consumption, decrease of the reliability, and thermal-induced performance loss, among others. In this paper, we analyze the evolution of the thermal issues for the future chip multiprocessor architectures and show that as the number of on-chip cores increases, the thermal-induced problems will worsen. In addition, we present several scenarios that result in excessive thermal stress to the CMP chip or significant performance loss. In order to minimize or even eliminate these problems, we propose thermal-aware scheduler (TAS algorithms. When assigning processes to cores, TAS takes their temperature and cooling ability into account in order to avoid thermal stress and at the same time improve the performance. Experimental results have shown that a TAS algorithm that considers also the temperatures of neighboring cores is able to significantly reduce the temperature-induced performance loss while at the same time, decrease the chip's temperature across many different operation and configuration scenarios.

  5. 75 FR 30046 - Medicaid and CHIP Programs; Meeting of the CHIP Working Group-June 14, 2010

    Science.gov (United States)

    2010-05-28

    ..., Employee Benefits Security Administration, DOL at (202) 693-8335. News media representatives must contact... eligible for benefits under titles XIX or XXI of the Social Security Act (the Act) to enable them to enroll...] DEPARTMENT OF LABOR Employee Benefits Security Administration Medicaid and CHIP Programs; Meeting of the CHIP...

  6. Instrument for measuring moisture in wood chips

    Energy Technology Data Exchange (ETDEWEB)

    Werme, L

    1980-06-01

    A method to determine the moisture content in wood chips, in batch and on-line, has been investigated. The method can be used for frozen and non frozen chips. Samples of wood chips are thawn and dryed with microwaves. During the drying the sample is weighed continously and the rate of drying is measured. The sample is dried t 10 percent moisture content. The result is extrapolated to the drying rate zero. The acccuracy at the method is 1.6 to 1.7 percent for both frozen and non frozen chips. The accuracy of the method is considered acceptable, but sofisticated sampling equipment is necessary. This makes the method too complex to make the instrument marketable.

  7. On-chip power delivery and management

    CERN Document Server

    Vaisband, Inna P; Popovich, Mikhail; Mezhiba, Andrey V; Köse, Selçuk; Friedman, Eby G

    2016-01-01

    This book describes methods for distributing power in high speed, high complexity integrated circuits with power levels exceeding many tens of watts and power supplies below a volt. It provides a broad and cohesive treatment of power delivery and management systems and related design problems, including both circuit network models and design techniques for on-chip decoupling capacitors, providing insight and intuition into the behavior and design of on-chip power distribution systems. Organized into subareas to provide a more intuitive flow to the reader, this fourth edition adds more than a hundred pages of new content, including inductance models for interdigitated structures, design strategies for multi-layer power grids, advanced methods for efficient power grid design and analysis, and methodologies for simultaneously placing on-chip multiple power supplies and decoupling capacitors. The emphasis of this additional material is on managing the complexity of on-chip power distribution networks.

  8. Characterizing Rat PNS Electrophysiological Response to Electrical Stimulation Using in vitro Chip-Based Human Investigational Platform (iCHIP)

    Energy Technology Data Exchange (ETDEWEB)

    Khani, Joshua [Georgetown Univ., Washington, DC (United States); Prescod, Lindsay [Georgetown Univ., Washington, DC (United States); Enright, Heather [Georgetown Univ., Washington, DC (United States); Felix, Sarah [Lawrence Livermore National Lab. (LLNL), Livermore, CA (United States); Osburn, Joanne [Lawrence Livermore National Lab. (LLNL), Livermore, CA (United States); Wheeler, Elizabeth [Lawrence Livermore National Lab. (LLNL), Livermore, CA (United States); Kulp, Kris [Lawrence Livermore National Lab. (LLNL), Livermore, CA (United States)

    2015-08-18

    Ex vivo systems and organ-on-a-chip technology offer an unprecedented approach to modeling the inner workings of the human body. The ultimate goal of LLNL’s in vitro Chip-based Human Investigational Platform (iCHIP) is to integrate multiple organ tissue cultures using microfluidic channels, multi-electrode arrays (MEA), and other biosensors in order to effectively simulate and study the responses and interactions of the major organs to chemical and physical stimulation. In this study, we focused on the peripheral nervous system (PNS) component of the iCHIP system. Specifically we sought to expound on prior research investigating the electrophysiological response of rat dorsal root ganglion cells (rDRGs) to chemical exposures, such as capsaicin. Our aim was to establish a protocol for electrical stimulation using the iCHIP device that would reliably elicit a characteristic response in rDRGs. By varying the parameters for both the stimulation properties – amplitude, phase width, phase shape, and stimulation/ return configuration – and the culture conditions – day in vitro and neural cell types - we were able to make several key observations and uncover a potential convention with a minimal number of devices tested. Future work will seek to establish a standard protocol for human DRGs in the iCHIP which will afford a portable, rapid method for determining the effects of toxins and novel therapeutics on the PNS.

  9. Modified precision-husky progrind H-3045 for chipping biomass

    Science.gov (United States)

    Dana Mitchell; Fernando Seixas; John. Klepac

    2008-01-01

    A specific size of whole tree chip was needed to co-mill wood chips with coal. The specifications are stringent because chips must be mixed with coal, as opposed to a co-firing process. In co-firing, two raw products are conveyed separately to a boiler. In co-milling, such as at Alabama Power's Plant Gadsden, the chip and coal mix must pass through a series of...

  10. Neuron array with plastic synapses and programmable dendrites.

    Science.gov (United States)

    Ramakrishnan, Shubha; Wunderlich, Richard; Hasler, Jennifer; George, Suma

    2013-10-01

    We describe a novel neuromorphic chip architecture that models neurons for efficient computation. Traditional architectures of neuron array chips consist of large scale systems that are interfaced with AER for implementing intra- or inter-chip connectivity. We present a chip that uses AER for inter-chip communication but uses fast, reconfigurable FPGA-style routing with local memory for intra-chip connectivity. We model neurons with biologically realistic channel models, synapses and dendrites. This chip is suitable for small-scale network simulations and can also be used for sequence detection, utilizing directional selectivity properties of dendrites, ultimately for use in word recognition.

  11. Experiment list: SRX319558 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available | cell type=mouse embryonic stem cells || genotype/variation=expressing control BirA || chip beads=Dynabeads... MyOne Streptavidin T1 || chip beads vendor=Invitrogen http://dbarchive.bioscienc

  12. Experiment list: SRX319557 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available se embryonic stem cells || genotype/variation=expressing Flag-bio tagged Nanog || chip beads=Dynabeads MyOne... Streptavidin T1 || chip beads vendor=Invitrogen http://dbarchive.biosciencedbc.j

  13. A simple clockless Network-on-Chip for a commercial audio DSP chip

    DEFF Research Database (Denmark)

    Stensgaard, Mikkel Bystrup; Bjerregaard, Tobias; Sparsø, Jens

    2006-01-01

    We design a very small, packet-switched, clockless Network-on-Chip (NoC) as a replacement for the existing crossbar-based communication infrastructure in a commercial audio DSP chip. Both solutions are laid out in a 0.18 um process, and compared in terms of area, power consumption and routing...... to the existing crossbar, it allows all blocks to communicate. The total wire length is decreased by 22% which eases the layout process and makes the design less prone to routing congestion. Not least, the communicating blocks are decoupled by means of the NoC, providing a Globally-Asynchronous, Locally...

  14. Experiment list: SRX319556 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available ype=mouse embryonic stem cells || genotype/variation=expressing Flag-bio tagged Dax1 || chip beads=Dynabeads... MyOne Streptavidin T1 || chip beads vendor=Invitrogen http://dbarchive.bioscienc

  15. Experiment list: SRX319553 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available se embryonic stem cells || genotype/variation=expressing Flag-bio tagged Tip60 || chip beads=Dynabeads MyOne... Streptavidin T1 || chip beads vendor=Invitrogen http://dbarchive.biosciencedbc.j

  16. Experiment list: SRX319555 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available ype=mouse embryonic stem cells || genotype/variation=expressing Flag-bio tagged Dax1 || chip beads=Dynabeads... MyOne Streptavidin T1 || chip beads vendor=Invitrogen http://dbarchive.bioscienc

  17. Experiment list: SRX319551 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available use embryonic stem cells || genotype/variation=expressing Flag-bio tagged Dmap1 || chip beads=Dynabeads MyOn...e Streptavidin T1 || chip beads vendor=Invitrogen http://dbarchive.biosciencedbc.

  18. Space division multiplexing chip-to-chip quantum key distribution

    DEFF Research Database (Denmark)

    Bacco, Davide; Ding, Yunhong; Dalgaard, Kjeld

    2017-01-01

    nodes of the quantum keys to their respective destinations. In this paper we present an experimental demonstration of a photonic integrated silicon chip quantum key distribution protocols based on space division multiplexing (SDM), through multicore fiber technology. Parallel and independent quantum...

  19. Possibilities for mixed mode chip manufacturing in EUROPRACTICE

    Science.gov (United States)

    Das, C.

    1997-02-01

    EUROPRACTICE is an EC initiative under the ESPRIT programme which aims to stimulate the wider exploitation of state-of-the-art microelectronics technologies by European industry and to enhance European industrial competitiveness in the global market-place. Through EUROPRACTICE, the EC has created a range of Basic Services that offer users a cost-effective and flexible means of accessing three main microelectronics-based technologies: Application Specific Integrated Circuit (ASICs), Multi-Chip Modules (MCMs) and Microsystems. EUROPRACTICE Basic Services reduce the cost and risk for companies wishing to begin using these technologies. EUROPRACTICE offers a fully supported, low cost route for companies to design and fabricate ASICs for their individual applications. Low cost is achieved by consolidating designs from many users onto a single semiconductor wafer (MPW: Multi Project Wafer). The EUROPRACTICE IC Manufacturing Service (ICMS) offers a broad range of fabrication technologies including CMOS, BiCMOS and GaAs. The Service extends from enabling users to produce prototype ASICs for testing and evaluation, through to low-volume production runs.

  20. Wood harvesting as chunkwood chips and multi-stage chipping; Puun korjuu palahakkeena ja monivaiheinen lastuaminen

    Energy Technology Data Exchange (ETDEWEB)

    Kaipainen, H; Seppaenen, V

    1997-12-31

    The task for the year 1995 was to define the preliminary results of the previous years, to measure the productivity of a harvester, designed for production of chunkwood, and the properties of the chunks. The costs of the PALAPUU method from the felling site to pulpwood chips were to be examined on this basis. Because the prototype of the harvester was not yet available for field tests, the costs were partially calculated on the basis of previous measurements, completed by productivity data obtained from the time-consumption measurements of a multi-tree harvester, applied with minor alteration for this purpose. According to the calculations the PALAPUU method cannot compete with partial-tree or shortwood methods. The profitability of the method could be improved by adding the transportation density and the productivity of the harvester. It is also possible to procure timber to the mill as partial-trees and to chunk it while feeding it into the drum. Chipping tests were made using the steel-frame-chipper owned by VTT Construction Technology. The blade construction of the chipper was changed so, that it was possible to adjust the cutting thickness of the chips to 4 mm, while in the previous mill-tests it had been 6 mm. The chips were used for cooking tests in the Department of Chemistry of the University of Jyvaeskylae. The results showed that the thinner chips were cooked further under the same cooking conditions. By using the chunkwood method it is possible to harvest 10-70 more biomass for the mills, than it is possible in the pulpwood harvesting

  1. Wood harvesting as chunkwood chips and multi-stage chipping; Puun korjuu palahakkeena ja monivaiheinen lastuaminen

    Energy Technology Data Exchange (ETDEWEB)

    Kaipainen, H.; Seppaenen, V.

    1996-12-31

    The task for the year 1995 was to define the preliminary results of the previous years, to measure the productivity of a harvester, designed for production of chunkwood, and the properties of the chunks. The costs of the PALAPUU method from the felling site to pulpwood chips were to be examined on this basis. Because the prototype of the harvester was not yet available for field tests, the costs were partially calculated on the basis of previous measurements, completed by productivity data obtained from the time-consumption measurements of a multi-tree harvester, applied with minor alteration for this purpose. According to the calculations the PALAPUU method cannot compete with partial-tree or shortwood methods. The profitability of the method could be improved by adding the transportation density and the productivity of the harvester. It is also possible to procure timber to the mill as partial-trees and to chunk it while feeding it into the drum. Chipping tests were made using the steel-frame-chipper owned by VTT Construction Technology. The blade construction of the chipper was changed so, that it was possible to adjust the cutting thickness of the chips to 4 mm, while in the previous mill-tests it had been 6 mm. The chips were used for cooking tests in the Department of Chemistry of the University of Jyvaeskylae. The results showed that the thinner chips were cooked further under the same cooking conditions. By using the chunkwood method it is possible to harvest 10-70 more biomass for the mills, than it is possible in the pulpwood harvesting

  2. Comparison of a Ring On-Chip Network and a Code-Division Multiple-Access On-Chip Network

    Directory of Open Access Journals (Sweden)

    Xin Wang

    2007-01-01

    Full Text Available Two network-on-chip (NoC designs are examined and compared in this paper. One design applies a bidirectional ring connection scheme, while the other design applies a code-division multiple-access (CDMA connection scheme. Both of the designs apply globally asynchronous locally synchronous (GALS scheme in order to deal with the issue of transferring data in a multiple-clock-domain environment of an on-chip system. The two NoC designs are compared with each other by their network structures, data transfer principles, network node structures, and their asynchronous designs. Both the synchronous and the asynchronous designs of the two on-chip networks are realized using a hardware-description language (HDL in order to make the entire designs suit the commonly used synchronous design tools and flow. The performance estimation and comparison of the two NoC designs which are based on the HDL realizations are addressed. By comparing the two NoC designs, the advantages and disadvantages of applying direct connection and CDMA connection schemes in an on-chip communication network are discussed.

  3. Experiment list: SRX319550 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available e embryonic stem cells || genotype/variation=expressing Flag-bio tagged Myc || chip beads=Dynabeads MyOne Streptavidin T1 || chip bea...ds vendor=Invitrogen http://dbarchive.biosciencedbc.jp/k

  4. A fast template matching method for LED chip Localization

    Directory of Open Access Journals (Sweden)

    Zhong Fuqiang

    2015-01-01

    Full Text Available Efficiency determines the profits of the semiconductor producers. So the producers spare no effort to enhance the efficiency of every procedure. The purpose of the paper is to present a method to shorten the time to locate the LED chips on wafer. The method consists of 3 steps. Firstly, image segmentation and blob analyzation are used to predict the positions of potential chips. Then predict the orientations of potential chips based on their dominant orientations. Finally, according to the positions and orientations predicted above, locate the chips precisely based on gradient orientation features. Experiments show that the algorithm is faster than the traditional method we choose to locate the LED chips. Besides, even the orientations of the chips on wafer are of big deviation to the orientation of the template, the efficiency of this method won't be affected.

  5. Experiment list: SRX180159 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available sd || cell type=hemogenic endothelium || chip antibody=CEBPb || chip antibody vendor=santa cruz biotechnol...ogy http://dbarchive.biosciencedbc.jp/kyushu-u/mm9/eachData/bw/SRX180159.bw http://

  6. Experiment list: SRX112178 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available line=OS25 ES cells || chip antibody=8WG16 (MMS-126R, Covance) || chip antibody manufacturer=Covance || chromatin=Fixed || beads...=Magnetic beads http://dbarchive.biosciencedbc.jp/kyushu-u/mm

  7. Tunable on chip optofluidic laser

    DEFF Research Database (Denmark)

    Bakal, Avraham; Vannahme, Christoph; Kristensen, Anders

    2016-01-01

    On chip tunable laser is demonstrated by realizing a microfluidic droplet array. The periodicity is controlled by the pressure applied to two separate inlets, allowing to tune the lasing frequency over a broad spectral range.......On chip tunable laser is demonstrated by realizing a microfluidic droplet array. The periodicity is controlled by the pressure applied to two separate inlets, allowing to tune the lasing frequency over a broad spectral range....

  8. Experiment list: SRX185907 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available Homo sapiens; ChIP-Seq source_name=MCF-7 breast adenocarcinoma cells, control, FOXM1 ChIP || cell_line=MCF-...7 || cell_type=ER-positive breast adenocarcinoma cells || treatment=DMSO || chip_

  9. Experiment list: SRX319552 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available embryonic stem cells || genotype/variation=expressing Flag-bio tagged E2F4 || chip beads=Dynabeads MyOne Streptavidin T1 || chip bea...ds vendor=Invitrogen http://dbarchive.biosciencedbc.jp/k

  10. Experiment list: SRX112184 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available line=OS25 ES cells || chip antibody=CTD4H8 (MMS-128P, Covance) || chip antibody manufacturer=Covance || chromatin=Fixed || beads...=Sepharose beads http://dbarchive.biosciencedbc.jp/kyushu-u/m

  11. Experiment list: SRX367328 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available nology) || sirna transfection=siCTL http://dbarchive.bio...=HEK293T cell || cell line=Human Embryonic Kidney 293 cells || chip antibody=CDK9 || chip antibody details=2316S (Cell Signaling Tech

  12. Experiment list: SRX543048 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available nology http://dbarchive.biosciencedbc.jp/kyushu-u/mm9/ea...CID.adh murine thymic lymphoma || development stage=DN3 || chip antibody=rabbit anti-Miz-1 || chip antibody vendor=Santa Cruz Biotech

  13. Design of Networks-on-Chip for Real-Time Multi-Processor Systems-on-Chip

    DEFF Research Database (Denmark)

    Sparsø, Jens

    2012-01-01

    This paper addresses the design of networks-on-chips for use in multi-processor systems-on-chips - the hardware platforms used in embedded systems. These platforms typically have to guarantee real-time properties, and as the network is a shared resource, it has to provide service guarantees...... (bandwidth and/or latency) to different communication flows. The paper reviews some past work in this field and the lessons learned, and the paper discusses ongoing research conducted as part of the project "Time-predictable Multi-Core Architecture for Embedded Systems" (T-CREST), supported by the European...

  14. CMOS Image Sensors: Electronic Camera On A Chip

    Science.gov (United States)

    Fossum, E. R.

    1995-01-01

    Recent advancements in CMOS image sensor technology are reviewed, including both passive pixel sensors and active pixel sensors. On- chip analog to digital converters and on-chip timing and control circuits permit realization of an electronic camera-on-a-chip. Highly miniaturized imaging systems based on CMOS image sensor technology are emerging as a competitor to charge-coupled devices for low cost uses.

  15. Experiment list: SRX185915 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available mo sapiens; ChIP-Seq source_name=MCF-7 breast adenocarcinoma cells, control, FOXM1 ChIP || cell_line=MCF-7 |...| cell_type=ER-positive breast adenocarcinoma cells || treatment=DMSO || chip_tar

  16. Experiment list: SRX185909 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available omo sapiens; ChIP-Seq source_name=MCF-7 breast adenocarcinoma cells, control, FOXM1 ChIP || cell_line=MCF-7 ...|| cell_type=ER-positive breast adenocarcinoma cells || treatment=DMSO || chip_ta

  17. Experiment list: SRX185917 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available omo sapiens; ChIP-Seq source_name=MCF-7 breast adenocarcinoma cells, control, FOXM1 ChIP || cell_line=MCF-7 ...|| cell_type=ER-positive breast adenocarcinoma cells || treatment=DMSO || chip_ta

  18. Experiment list: SRX112179 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available =OS25 ES cells || chip antibody=H5 (MMS-129R, Covance) || chip antibody manufacturer=Covance || chromatin=Fixed || beads=Magnetic bea...ds http://dbarchive.biosciencedbc.jp/kyushu-u/mm9/eachDa

  19. Experiment list: SRX367330 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available nology) || sirna transfection=siBrd4 http://dbarchive.bi...=HEK293T cell || cell line=Human Embryonic Kidney 293 cells || chip antibody=CDK9 || chip antibody details=2316S (Cell Signaling Tech

  20. A primary battery-on-a-chip using monolayer graphene

    Science.gov (United States)

    Iost, Rodrigo M.; Crespilho, Frank N.; Kern, Klaus; Balasubramanian, Kannan

    2016-07-01

    We present here a bottom-up approach for realizing on-chip on-demand batteries starting out with chemical vapor deposition-grown graphene. Single graphene monolayers contacted by electrode lines on a silicon chip serve as electrodes. The anode and cathode are realized by electrodeposition of zinc and copper respectively onto graphene, leading to the realization of a miniature graphene-based Daniell cell on a chip. The electrolyte is housed partly in a gel and partly in liquid form in an on-chip enclosure molded using a 3d printer or made out of poly(dimethylsiloxane). The realized batteries provide a stable voltage (∼1.1 V) for many hours and exhibit capacities as high as 15 μAh, providing enough power to operate a pocket calculator. The realized batteries show promise for deployment as on-chip power sources for autonomous systems in lab-on-a-chip or biomedical applications.

  1. Variation Tolerant On-Chip Interconnects

    CERN Document Server

    Nigussie, Ethiopia Enideg

    2012-01-01

    This book presents design techniques, analysis and implementation of high performance and power efficient, variation tolerant on-chip interconnects.  Given the design paradigm shift to multi-core, interconnect-centric designs and the increase in sources of variability and their impact in sub-100nm technologies, this book will be an invaluable reference for anyone concerned with the design of next generation, high-performance electronics systems. Provides comprehensive, circuit-level explanation of high-performance, energy-efficient, variation-tolerant on-chip interconnect; Describes design techniques to mitigate problems caused by variation; Includes techniques for design and implementation of self-timed on-chip interconnect, delay variation insensitive communication protocols, high speed signaling techniques and circuits, bit-width independent completion detection and process, voltage and temperature variation tolerance.                          

  2. Microfluidic Organ-on-a-Chip Models of Human IntestineSummary

    Directory of Open Access Journals (Sweden)

    Amir Bein

    Full Text Available Microfluidic organ-on-a-chip models of human intestine have been developed and used to study intestinal physiology and pathophysiology. In this article, we review this field and describe how microfluidic Intestine Chips offer new capabilities not possible with conventional culture systems or organoid cultures, including the ability to analyze contributions of individual cellular, chemical, and physical control parameters one-at-a-time; to coculture human intestinal cells with commensal microbiome for extended times; and to create human-relevant disease models. We also discuss potential future applications of human Intestine Chips, including how they might be used for drug development and personalized medicine. Keywords: Organs-on-Chips, Gut-on-a-Chip, Intestine-on-a-Chip, Microfluidic

  3. Experiment list: SRX112176 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available e=OS25 ES cells || chip antibody=CTD4H8 (MMS-128P, Covance) || chip antibody manufacturer=Covance || chromatin=Fixed || beads...=Magnetic beads http://dbarchive.biosciencedbc.jp/kyushu-u/mm9/e

  4. Chipping operations and efficiency in different operational environments

    Energy Technology Data Exchange (ETDEWEB)

    Roeser, D.; Mola-Yudego, B.; Prinz, R.; Emer, B.; Sikanen, L., e-mail: dominik.roser@metla.fi

    2012-11-01

    This research analyses the productivity of energy wood chipping operations at several sites in Austria and Finland. The aim of the work is to examine the differences in productivity and the effects of the operational environment for the chipping of bioenergy at the roadside. Furthermore, the study quantifies the effects of different variables such as forest energy assortments, tree species, sieve size and machines on the overall productivity of chipping. The results revealed that there are significant differences in the chipping productivity in Austria and Finland which are largely based on the use of different sieve sizes. Furthermore, the different operational environments in both countries, as well as the characteristics of the raw material also seem to have an effect on productivity. In order to improve the chipping productivity, particularly in Central European conditions, all relevant stakeholders need to work jointly to find solutions that will allow a greater variation of chip size. Furthermore, in the future more consideration has to be given to the close interlinkage between the chipper, crane and grapple. As a result, investments costs can be optimized and operational costs and stress on the machines reduced. (orig.)

  5. Developing an Integrated Design Strategy for Chip Layout Optimization

    NARCIS (Netherlands)

    Wits, Wessel Willems; Jauregui Becker, Juan Manuel; van Vliet, Frank Edward; te Riele, G.J.

    2011-01-01

    This paper presents an integrated design strategy for chip layout optimization. The strategy couples both electric and thermal aspects during the conceptual design phase to improve chip performances; thermal management being one of the major topics. The layout of the chip circuitry is optimized

  6. Programmable lighting control: do-it-yourself energy savings

    Energy Technology Data Exchange (ETDEWEB)

    1982-04-01

    At C-E Power Systems, an operating group of Combustion Engineering, Inc., Windsor, CT, the lighting and HVAC in six of 24 buildings are now under microprocessor control, and the necessary equipment to convert two additional buildings before the year end has been ordered. The initial analysis of the economic benefits of a /100,000 investment for the first six buildings showed the system will pay for itself in electricity savings in 30 months or less. In the programmable lighting system, a microprocessor-based central controller is /left double quote/softwired/right double quote/ to a single-chip microcomputer-based local transceiver. The data line provides a high integrity communications channel carrying multiplex commands from the central controllers as well as status and switch override message from the remote transceivers. The controller has the capacity to direct as many as 500 transceivers controlling 8,000 relays.

  7. Opto-electronic DNA chip-based integrated card for clinical diagnostics.

    Science.gov (United States)

    Marchand, Gilles; Broyer, Patrick; Lanet, Véronique; Delattre, Cyril; Foucault, Frédéric; Menou, Lionel; Calvas, Bernard; Roller, Denis; Ginot, Frédéric; Campagnolo, Raymond; Mallard, Frédéric

    2008-02-01

    Clinical diagnostics is one of the most promising applications for microfluidic lab-on-a-chip or lab-on-card systems. DNA chips, which provide multiparametric data, are privileged tools for genomic analysis. However, automation of molecular biology protocol and use of these DNA chips in fully integrated systems remains a great challenge. Simplicity of chip and/or card/instrument interfaces is amongst the most critical issues to be addressed. Indeed, current detection systems for DNA chip reading are often complex, expensive, bulky and even limited in terms of sensitivity or accuracy. Furthermore, for liquid handling in the lab-on-cards, many devices use complex and bulky systems, either to directly manipulate fluids, or to ensure pneumatic or mechanical control of integrated valves. All these drawbacks prevent or limit the use of DNA-chip-based integrated systems, for point-of-care testing or as a routine diagnostics tool. We present here a DNA-chip-based protocol integration on a plastic card for clinical diagnostics applications including: (1) an opto-electronic DNA-chip, (2) fluid handling using electrically activated embedded pyrotechnic microvalves with closing/opening functions. We demonstrate both fluidic and electric packaging of the optoelectronic DNA chip without major alteration of its electronical and biological functionalities, and fluid control using novel electrically activable pyrotechnic microvalves. Finally, we suggest a complete design of a card dedicated to automation of a complex biological protocol with a fully electrical fluid handling and DNA chip reading.

  8. Integrated lasers for polymer Lab-on-a-Chip systems

    DEFF Research Database (Denmark)

    Mappes, Timo; Vannahme, Christoph; Grosmann, Tobias

    2012-01-01

    We develop optical Lab-on-a-Chips on different platforms for marker-based and label-free biophotonic sensor applications. Our chips are based on polymers and fabricated by mass production technologies to integrate microfluidic channels, optical waveguides and miniaturized lasers.......We develop optical Lab-on-a-Chips on different platforms for marker-based and label-free biophotonic sensor applications. Our chips are based on polymers and fabricated by mass production technologies to integrate microfluidic channels, optical waveguides and miniaturized lasers....

  9. Biostability of an implantable glucose sensor chip

    Science.gov (United States)

    Fröhlich, M.; Birkholz, M.; Ehwald, K. E.; Kulse, P.; Fursenko, O.; Katzer, J.

    2012-12-01

    Surface materials of an implantable microelectronic chip intended for medical applications were evaluated with respect to their long-term stability in bio-environments. The sensor chip shall apply in a glucose monitor by operating as a microviscosimeter according to the principle of affinity viscosimetry. A monolithic integration of a microelectromechanical system (MEMS) into the sensor chip was successfully performed in a combined 0.25 μm CMOS/BiCMOS technology. In order to study material durability and biostability of the surfaces, sensor chips were exposed to various in vitro and in vivo tests. Corrosional damage of SiON, SiO2 and TiN surfaces was investigated by optical microscopy, ellipsometry and AFM. The results served for optimizing the Back-end-of-Line (BEoL) stack, from which the MEMS was prepared. Corrosion of metal lines could significantly be reduced by improving the topmost passivation layer. The experiments revealed no visible damage of the actuator or other functionally important MEMS elements. Sensor chips were also exposed to human body fluid for three month by implantation into the abdomen of a volunteer. Only small effects were observed for layer thickness and Ra roughness after explantation. In particular, TiN as used for the actuator beam showed no degradation by biocorrosion. The highest degradation rate of about 50 nm per month was revealed for the SiON passivation layer. These results suggest that the sensor chip may safely operate in subcutaneous tissue for a period of several months.

  10. Biostability of an implantable glucose sensor chip

    International Nuclear Information System (INIS)

    Fröhlich, M; Ehwald, K E; Kulse, P; Fursenko, O; Katzer, J; Birkholz, M

    2012-01-01

    Surface materials of an implantable microelectronic chip intended for medical applications were evaluated with respect to their long-term stability in bio-environments. The sensor chip shall apply in a glucose monitor by operating as a microviscosimeter according to the principle of affinity viscosimetry. A monolithic integration of a microelectromechanical system (MEMS) into the sensor chip was successfully performed in a combined 0.25 μm CMOS/BiCMOS technology. In order to study material durability and biostability of the surfaces, sensor chips were exposed to various in vitro and in vivo tests. Corrosional damage of SiON, SiO 2 and TiN surfaces was investigated by optical microscopy, ellipsometry and AFM. The results served for optimizing the Back-end-of-Line (BEoL) stack, from which the MEMS was prepared. Corrosion of metal lines could significantly be reduced by improving the topmost passivation layer. The experiments revealed no visible damage of the actuator or other functionally important MEMS elements. Sensor chips were also exposed to human body fluid for three month by implantation into the abdomen of a volunteer. Only small effects were observed for layer thickness and R a roughness after explantation. In particular, TiN as used for the actuator beam showed no degradation by biocorrosion. The highest degradation rate of about 50 nm per month was revealed for the SiON passivation layer. These results suggest that the sensor chip may safely operate in subcutaneous tissue for a period of several months.

  11. Experiment list: SRX262781 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available _name=NIH3T3_SRF_15 || cell line=NIH3T3 fibroblasts || genotype=normal || chip antibody=SRF || chip antibody vendor=Santa Cruz Biotec...hnology http://dbarchive.biosciencedbc.jp/kyushu-u/mm9/e

  12. Experiment list: SRX262786 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available H3T3_MRTFA_15 || cell line=NIH3T3 fibroblasts || genotype=normal || chip antibody=MRTF-A || chip antibody vendor=Santa Cruz Biotechno...logy http://dbarchive.biosciencedbc.jp/kyushu-u/mm9/each

  13. Experiment list: SRX262791 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available IH3T3_MRTFB_LAT || cell line=NIH3T3 fibroblasts || genotype=normal || chip antibody=MRTF-B || chip antibody vendor=Santa Cruz Biotech...nology http://dbarchive.biosciencedbc.jp/kyushu-u/mm9/ea

  14. Experiment list: SRX262782 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available echnology http://dbarchive.biosciencedbc.jp/kyushu-u/mm9...ce_name=NIH3T3_SRF_15 || cell line=NIH3T3 fibroblasts || genotype=normal || chip antibody=SRF || chip antibody vendor=Santa Cruz Biot

  15. Experiment list: SRX262788 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available IH3T3_MRTFA_UO || cell line=NIH3T3 fibroblasts || genotype=normal || chip antibody=MRTF-A || chip antibody vendor=Santa Cruz Biotechn...ology http://dbarchive.biosciencedbc.jp/kyushu-u/mm9/eac

  16. Experiment list: SRX262787 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available IH3T3_MRTFA_LAT || cell line=NIH3T3 fibroblasts || genotype=normal || chip antibody=MRTF-A || chip antibody vendor=Santa Cruz Biotech...nology http://dbarchive.biosciencedbc.jp/kyushu-u/mm9/ea

  17. Experiment list: SRX262780 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available chnology http://dbarchive.biosciencedbc.jp/kyushu-u/mm9/...e_name=NIH3T3_SRF_03 || cell line=NIH3T3 fibroblasts || genotype=normal || chip antibody=SRF || chip antibody vendor=Santa Cruz Biote

  18. 3D Printing of Organs-On-Chips.

    Science.gov (United States)

    Yi, Hee-Gyeong; Lee, Hyungseok; Cho, Dong-Woo

    2017-01-25

    Organ-on-a-chip engineering aims to create artificial living organs that mimic the complex and physiological responses of real organs, in order to test drugs by precisely manipulating the cells and their microenvironments. To achieve this, the artificial organs should to be microfabricated with an extracellular matrix (ECM) and various types of cells, and should recapitulate morphogenesis, cell differentiation, and functions according to the native organ. A promising strategy is 3D printing, which precisely controls the spatial distribution and layer-by-layer assembly of cells, ECMs, and other biomaterials. Owing to this unique advantage, integration of 3D printing into organ-on-a-chip engineering can facilitate the creation of micro-organs with heterogeneity, a desired 3D cellular arrangement, tissue-specific functions, or even cyclic movement within a microfluidic device. Moreover, fully 3D-printed organs-on-chips more easily incorporate other mechanical and electrical components with the chips, and can be commercialized via automated massive production. Herein, we discuss the recent advances and the potential of 3D cell-printing technology in engineering organs-on-chips, and provides the future perspectives of this technology to establish the highly reliable and useful drug-screening platforms.

  19. Chip-based microtrap arrays for cold polar molecules

    Science.gov (United States)

    Hou, Shunyong; Wei, Bin; Deng, Lianzhong; Yin, Jianping

    2017-12-01

    Compared to the atomic chip, which has been a powerful platform to perform an astonishing range of applications from rapid Bose-Einstein condensate (BEC) production to the atomic clock, the molecular chip is only in its infant stages. Recently a one-dimensional electric lattice was demonstrated to trap polar molecules on a chip. This excellent work opens up the way to building a molecular chip laboratory. Here we propose a two-dimensional (2D) electric lattice on a chip with concise and robust structure, which is formed by arrays of squared gold wires. Arrays of microtraps that originate in the microsize electrodes offer a steep gradient and thus allow for confining both light and heavy polar molecules. Theoretical analysis and numerical calculations are performed using two types of sample molecules, N D3 and SrF, to justify the possibility of our proposal. The height of the minima of the potential wells is about 10 μm above the surface of the chip and can be easily adjusted in a wide range by changing the voltages applied on the electrodes. These microtraps offer intriguing perspectives for investigating cold molecules in periodic potentials, such as quantum computing science, low-dimensional physics, and some other possible applications amenable to magnetic or optical lattice. The 2D adjustable electric lattice is expected to act as a building block for a future gas-phase molecular chip laboratory.

  20. An Energy-Efficient Reconfigurable Circuit Switched Network-on-Chip

    NARCIS (Netherlands)

    Wolkotte, P.T.; Smit, Gerardus Johannes Maria; Rauwerda, G.K.; Smit, L.T.

    Network-on-Chip (NoC) is an energy-efficient on-chip communication architecture for multi-tile System-on-Chip (SoC) architectures. The SoC architecture, including its run-time software, can replace inflexible ASICs for future ambient systems. These ambient systems have to be flexible as well as

  1. Energy Model of Networks-on-Chip and a Bus

    NARCIS (Netherlands)

    Wolkotte, P.T.; Smit, Gerardus Johannes Maria; Kavaldjiev, N.K.; Becker, Jens E.; Becker, Jürgen; Nurmi, J.; Takala, J.; Hamalainen, T.D.

    2005-01-01

    A Network-on-Chip (NoC) is an energy-efficient onchip communication architecture for Multi-Processor Systemon-Chip (MPSoC) architectures. In earlier papers we proposed two Network-on-Chip architectures based on packet-switching and circuit-switching. In this paper we derive an energy model for both

  2. Reagent-loaded plastic microfluidic chips for detecting homocysteine

    International Nuclear Information System (INIS)

    Suk, Ji Won; Jang, Jae-Young; Cho, Jun-Hyeong

    2008-01-01

    This report describes the preliminary study on plastic microfluidic chips with pre-loaded reagents for detecting homocysteine (Hcy). All reagents needed in an Hcy immunoassay were included in a microfluidic chip to remove tedious assay steps. A simple and cost-effective bonding method was developed to realize reagent-loaded microfluidic chips. This technique uses an intermediate layer between two plastic substrates by selectively patterning polydimethylsiloxane (PDMS) on the embossed surface of microchannels and fixing the substrates under pressure. Using this bonding method, the competitive immunoassay for SAH, a converted form of Hcy, was performed without any damage to reagents in chips, and the results showed that the fluorescent signal from antibody antigen binding decreased as the SAH concentration increased. Based on the SAH immunoassay, whole immunoassay steps for Hcy detection were carried out in plastic microfluidic chips with all necessary reagents. These experiments demonstrated the feasibility of the Hcy immunoassay in microfluidic devices

  3. Development of stoker-burner wood chip combustion systems for the UK market

    Energy Technology Data Exchange (ETDEWEB)

    NONE

    2002-07-01

    The document makes a case for the development of a design of wood chip stoker-burner more suited to the UK than those currently imported from Sweden and Finland. The differences would centre on market conditions, performance and cost-effectiveness and the devices would be manufactured or part-manufactured in the UK. Econergy Limited was contracted by the DTI as part of its Sustainable Energy Programmes to design and construct an operational prototype stoker-burner rated at 120 kWth. A test rig was built to: (i) study modified burner heads and (ii) develop control hardware and a control strategy. Both (i) and (ii) are described. Tests brought about an increase in performance of the burner head and its wet wood performance. It was considered that further improvements are achievable and six areas for future study were suggested.

  4. Experiment list: SRX262797 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available 3T3_SAP1_03 || cell line=NIH3T3 fibroblasts || genotype=normal || chip antibody=SAP-1a || chip antibody vendor=Santa Cruz Biotechnolo...gy http://dbarchive.biosciencedbc.jp/kyushu-u/mm9/eachDa

  5. Experiment list: SRX262799 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available H3T3_SAP1_LAT || cell line=NIH3T3 fibroblasts || genotype=normal || chip antibody=SAP-1a || chip antibody vendor=Santa Cruz Biotechno...logy http://dbarchive.biosciencedbc.jp/kyushu-u/mm9/each

  6. Experiment list: SRX352046 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available SM1232564: CSB M CHIP; Homo sapiens; ChIP-Seq source_name=fibroblast_menadione_CSB-ChIP || cell type=fibroblast || treated with=menad...ione || chip antibody=Mouse monoclonal anti-CSB N Terminus (1B1) http://dbarchive.b

  7. Microneedle Array Interface to CE on Chip

    NARCIS (Netherlands)

    Lüttge, Regina; Gardeniers, Johannes G.E.; Vrouwe, E.X.; van den Berg, Albert; Northrup, M.A.; Jensen, K.F; Harrison, D.J.

    2003-01-01

    This paper presents a microneedle array sampler interfaced to a capillary electrophoresis (CE) glass chip with integrated conductivity detection electrodes. A solution of alkali ions was electrokinetically loaded through the microneedles onto the chip and separation was demonstrated compared to a

  8. Experiment list: SRX144526 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available stein-Barr Virus transformed 11803840,92.5,91.6,38 GSM922971: NRF2 ChIP vehicle treated rep2; Homo sapiens; ...ChIP-Seq source_name=NRF2 ChIP vehicle treated || biomaterial_provider=Coriell; h

  9. Experiment list: SRX151245 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available 0: CTCF ChIPSeq; Homo sapiens; ChIP-Seq source_name=BCBL1 pleural effusion lymphoma, CTCF ChIP || cell line=...BCBL1 || cell type=KSHV-infected pleural effusion lymphoma cells || chip antibody=rabbit anti-CTCF || antibo

  10. Synthesis of on-chip control circuits for mVLSI biochips

    DEFF Research Database (Denmark)

    Potluri, Seetal; Schneider, Alexander Rüdiger; Hørslev-Petersen, Martin

    2017-01-01

    them to laboratory environments. To address this issue, researchers have proposed methods to reduce the number of offchip pressure sources, through integration of on-chip pneumatic control logic circuits fabricated using three-layer monolithic membrane valve technology. Traditionally, mVLSI biochip......-chip control circuit design and (iii) the integration of on-chip control in the placement and routing design tasks. In this paper we present a design methodology for logic synthesis and physical synthesis of mVLSI biochips that use on-chip control. We show how the proposed methodology can be successfully...... applied to generate biochip layouts with integrated on-chip pneumatic control....

  11. Experiment list: SRX150568 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available is=Adenocarcinoma 59265240,72.4,16.4,4779 GSM935489: Harvard ChipSeq HeLa-S3 RPC155 std source_name=HeLa-S3 ...|| biomaterial_provider=ATCC || lab=Harvard || lab description=Struhl - Harvard University || datatype=ChipS

  12. Experiment list: SRX150661 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available is=Adenocarcinoma 59396606,71.7,11.1,1200 GSM935582: Harvard ChipSeq HeLa-S3 BRF1 std source_name=HeLa-S3 ||... biomaterial_provider=ATCC || lab=Harvard || lab description=Struhl - Harvard University || datatype=ChipSeq

  13. Experiment list: SRX150495 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available is=Adenocarcinoma 62508352,67.6,8.4,1556 GSM935416: Harvard ChipSeq HeLa-S3 ZZZ3 std source_name=HeLa-S3 || ...biomaterial_provider=ATCC || lab=Harvard || lab description=Struhl - Harvard University || datatype=ChipSeq

  14. Experiment list: SRX150565 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available =Adenocarcinoma 54953593,74.3,12.2,1703 GSM935486: Harvard ChipSeq HeLa-S3 BDP1 std source_name=HeLa-S3 || b...iomaterial_provider=ATCC || lab=Harvard || lab description=Struhl - Harvard University || datatype=ChipSeq |

  15. Performance evaluation of chip seals in Idaho.

    Science.gov (United States)

    2010-08-01

    The intent of this research project is to identify a wide variety of parameters that influence the performance of pavements treated via chip seals within the State of Idaho. Chip sealing is currently one of the most popular methods of maintenance for...

  16. Experiment list: SRX507380 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available + (wildtype) || age of animals=1-5 day old || tissue=Ovaries || chip antibody=anti-HP1 || chip antibody vend...1770: WT anti-HP1- replicate#2; Drosophila melanogaster; ChIP-Seq source_name=WT_WT_anti-HP1 || strain=piwi/

  17. Experiment list: SRX176054 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available nosis=Carcinoma 13338805,91.2,4.9,792 GSM984386: LNCAP AR vehicle; Homo sapiens; ChIP-Seq source_name=prosta...te cancer cells || cell line=LNCaP || chip antibody=AR || chip antibody manufacturer=Abcam || treatment=EtOH vehicle

  18. Experiment list: SRX144525 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available neage=mesoderm|Description=parental cell type to lymphoblastoid cell lines 14487710,85.8,82.8,188 GSM922970: NRF2 ChIP vehicle... treated rep1; Homo sapiens; ChIP-Seq source_name=NRF2 ChIP vehicle treated || biomaterial

  19. Experiment list: SRX144524 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available neage=mesoderm|Description=parental cell type to lymphoblastoid cell lines 4766716,6.2,89.4,0 GSM922969: NRF2 ChIP vehicle... treated pilot; Homo sapiens; ChIP-Seq source_name=NRF2 ChIP vehicle treated || biomaterial_pr

  20. Experiment list: SRX151246 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available 11: SMC1 ChIPSeq; Homo sapiens; ChIP-Seq source_name=BCBL1 pleural effusion lymphoma, SMC1 ChIP || cell line...=BCBL1 || cell type=KSHV-infected pleural effusion lymphoma cells || chip antibody=rabbit anti-SMC1 || antib

  1. New generation of single-chip microcomputers focused on cost performance

    Energy Technology Data Exchange (ETDEWEB)

    Akao, Y.; Iwashita, H. (Hitachi, Ltd., Tokyo (Japan))

    1993-06-01

    A single-chip microcomputer which incorporates a CPU (central processing unit), memory, and peripheral functions in one chip has been increasingly applied to various fields as the heart of electronic equipment in terms of its economy, compactness, lightness, and suitability for mass production. In response to a wide variety of needs, a lineup must have substantial breadth with regard to performance, on-chip memory capacity, on-chip peripheral functions, operating voltage, and packaging. In particular, low-voltage high-speed operation, high integration, expanded address space, and improved software productivity, which are required for mobile communication terminals, are the common needs for single-chip microcomputers. In accordance with these needs, Hitachi has been actively developing new products. The present paper introduces Hitachi's lineup of single-chip microcomputers. 10 figs., 1 tab.

  2. Experiment list: SRX150586 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available -Barr Virus 33195472,90.4,25.9,15633 GSM935507: Harvard ChipSeq GM12878 NF-YB IgG-mus source_name=GM12878 ||...?PgId=165&q=GM12878 || lab=Harvard || lab description=Struhl - Harvard University || datatype=ChipSeq || dat

  3. Experiment list: SRX150496 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available ein-Barr Virus 63040797,85.0,19.7,1435 GSM935417: Harvard ChipSeq GM12878 SPT20 std source_name=GM12878 || b...gId=165&q=GM12878 || lab=Harvard || lab description=Struhl - Harvard University || datatype=ChipSeq || datat

  4. Experiment list: SRX150585 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available -Barr Virus 32926476,94.0,12.0,2668 GSM935506: Harvard ChipSeq GM12878 NF-YA IgG-mus source_name=GM12878 || ...PgId=165&q=GM12878 || lab=Harvard || lab description=Struhl - Harvard University || datatype=ChipSeq || data

  5. A Chip for an Implantable Neural Stimulator

    DEFF Research Database (Denmark)

    Gudnason, Gunnar; Bruun, Erik; Haugland, Morten

    2000-01-01

    This paper describes a chip for a multichannel neural stimulator for functional electrical stimulation (FES). The purpose of FES is to restore muscular control in disabled patients. The chip performs all the signal processing required in an implanted neural stimulator. The power and digital data...

  6. Experiment list: SRX153146 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available -Seq source_name=Human breast adenocarcinoma cell-line MCF7 || cell-line=MCF7 || passage=5 || chip antibody=...n=Pleura|Tissue Diagnosis=Adenocarcinoma 60170246,98.4,5.7,16756 GSM946850: MCF7 H3K27ac; Homo sapiens; ChIP

  7. Experiment list: SRX176063 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available =Carcinoma 11279321,95.5,3.6,13985 GSM984395: LNCAP ACH3 vehicle; Homo sapiens; ChIP-Seq source_name=prostat...e cancer cells || cell line=LNCaP || chip antibody=AcH3 || chip antibody manufacturer=Millipore || treatment=EtOH vehicle

  8. Experiment list: SRX176057 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available nosis=Carcinoma 21582823,90.1,7.3,1074 GSM984389: 22RV1 AR vehicle; Homo sapiens; ChIP-Seq source_name=prost...ate cancer cells || cell line=22RV1 || chip antibody=AR || chip antibody manufacturer=Abcam || treatment=EtOH vehicle

  9. Experiment list: SRX144527 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available neage=mesoderm|Description=parental cell type to lymphoblastoid cell lines 8704444,92.1,92.5,9 GSM922972: NRF2 ChIP vehicle... treated rep3; Homo sapiens; ChIP-Seq source_name=NRF2 ChIP vehicle treated || biomaterial_pr

  10. Experiment list: SRX160914 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available M970829: IgG for KSHV LANA; Homo sapiens; ChIP-Seq source_name=BCBL1 pleural effusion lymphoma, IgG ChIP || ...cell line=BCBL1 || cell type=KSHV-infected pleural effusion lymphoma cells || chip antibody=Rabbit IgG [Sant

  11. Experiment list: SRX160915 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available M970828: IgG for CTCF SMC1; Homo sapiens; ChIP-Seq source_name=BCBL1 pleural effusion lymphoma, IgG ChIP || ...cell line=BCBL1 || cell type=KSHV-infected pleural effusion lymphoma cells || chip antibody=Mouse IgG [Santa

  12. Ion Chromatography-on-a-chip for Water Quality Analysis

    Science.gov (United States)

    Kidd, R. D.; Noell, A.; Kazarians, G.; Aubrey, A. D.; Scianmarello, N.; Tai, Y.-C.

    2015-01-01

    We report progress towards developing a Micro-Electro-Mechanical Systems (MEMS)- based ion chromatograph (IC) for crewed spacecraft water analysis. This IC-chip is an offshoot of a NASA-funded effort to produce a high performance liquid chromatograph (HPLC)-chip. This HPLC-chip system would require a desalting (i.e. ion chromatography) step. The complete HPLC instrument consists of the Jet Propulsion Labortory's (JPL's) quadrupole ion trap mass spectrometer integrated with a state-of-the-art MEMS liquid chromatograph (LC) system developed by the California Institute of Technology's (Caltech's) Micromachining Laboratory. The IC version of the chip consist of an electrolysis-based injector, a separation column, two electrolysis pumps for gradient generation, mixer, and a built-in conductivity detector. The HPLC version of the chip also includes a nanospray tip. The low instrument mass, coupled with its high analytical capabilities, makes the LC chip ideally suitable for wide range of applications such as trace contaminant, inorganic analytical science and, when coupled to a mass spectrometer, a macromolecular detection system for either crewed space exploration vehicles or robotic planetary missions.

  13. 3D Printing of Organs-On-Chips

    Science.gov (United States)

    Yi, Hee-Gyeong; Lee, Hyungseok; Cho, Dong-Woo

    2017-01-01

    Organ-on-a-chip engineering aims to create artificial living organs that mimic the complex and physiological responses of real organs, in order to test drugs by precisely manipulating the cells and their microenvironments. To achieve this, the artificial organs should to be microfabricated with an extracellular matrix (ECM) and various types of cells, and should recapitulate morphogenesis, cell differentiation, and functions according to the native organ. A promising strategy is 3D printing, which precisely controls the spatial distribution and layer-by-layer assembly of cells, ECMs, and other biomaterials. Owing to this unique advantage, integration of 3D printing into organ-on-a-chip engineering can facilitate the creation of micro-organs with heterogeneity, a desired 3D cellular arrangement, tissue-specific functions, or even cyclic movement within a microfluidic device. Moreover, fully 3D-printed organs-on-chips more easily incorporate other mechanical and electrical components with the chips, and can be commercialized via automated massive production. Herein, we discuss the recent advances and the potential of 3D cell-printing technology in engineering organs-on-chips, and provides the future perspectives of this technology to establish the highly reliable and useful drug-screening platforms. PMID:28952489

  14. Emission of organic substances from chip-boards

    Energy Technology Data Exchange (ETDEWEB)

    Deppe, H.J.

    1982-01-01

    A relatively small number of investigations on emissions of organic substances from chip-board is available up to now. The emissions known to date are caused by glues or other additives rather than by the wood itself. As concerns aminoplast glues (urea-formaldehyde or melamine-formaldehyde resins) the most important point of public interest has been the off-gassing of formaldehyde from chip-board. Chip-board with phenol-formaldehyde glues has been known in some cases to give off phenol. The formation of diamino diphenyl methane from isocyanate glues is still a matter of discussion. A further source for possible emissions are wood and fire protectives which are added during the manufacturing process. Finally, coating of chip-board may lead to emissions of organic substances. The lack of adequate detection methods has so far delayed the treatment of questions in relation to emissions from chip-board. Even now, there are numerous problems in this field especially when investigating isocyanate glues. Problems in relation to the origin of emissions due to the kind of glue used and the manufacturing process are discussed, and proposals are made how to solve some of these problems. The question of the health risk is dealt with from the view-point of the civil engineer and in an general economic context.

  15. 3D Printing of Organs-On-Chips

    Directory of Open Access Journals (Sweden)

    Hee-Gyeong Yi

    2017-01-01

    Full Text Available Organ-on-a-chip engineering aims to create artificial living organs that mimic the complex and physiological responses of real organs, in order to test drugs by precisely manipulating the cells and their microenvironments. To achieve this, the artificial organs should to be microfabricated with an extracellular matrix (ECM and various types of cells, and should recapitulate morphogenesis, cell differentiation, and functions according to the native organ. A promising strategy is 3D printing, which precisely controls the spatial distribution and layer-by-layer assembly of cells, ECMs, and other biomaterials. Owing to this unique advantage, integration of 3D printing into organ-on-a-chip engineering can facilitate the creation of micro-organs with heterogeneity, a desired 3D cellular arrangement, tissue-specific functions, or even cyclic movement within a microfluidic device. Moreover, fully 3D-printed organs-on-chips more easily incorporate other mechanical and electrical components with the chips, and can be commercialized via automated massive production. Herein, we discuss the recent advances and the potential of 3D cell-printing technology in engineering organs-on-chips, and provides the future perspectives of this technology to establish the highly reliable and useful drug-screening platforms.

  16. Chip-Level Electromigration Reliability for Cu Interconnects

    International Nuclear Information System (INIS)

    Gall, M.; Oh, C.; Grinshpon, A.; Zolotov, V.; Panda, R.; Demircan, E.; Mueller, J.; Justison, P.; Ramakrishna, K.; Thrasher, S.; Hernandez, R.; Herrick, M.; Fox, R.; Boeck, B.; Kawasaki, H.; Haznedar, H.; Ku, P.

    2004-01-01

    Even after the successful introduction of Cu-based metallization, the electromigration (EM) failure risk has remained one of the most important reliability concerns for most advanced process technologies. Ever increasing operating current densities and the introduction of low-k materials in the backend process scheme are some of the issues that threaten reliable, long-term operation at elevated temperatures. The traditional method of verifying EM reliability only through current density limit checks is proving to be inadequate in general, or quite expensive at the best. A Statistical EM Budgeting (SEB) methodology has been proposed to assess more realistic chip-level EM reliability from the complex statistical distribution of currents in a chip. To be valuable, this approach requires accurate estimation of currents for all interconnect segments in a chip. However, no efficient technique to manage the complexity of such a task for very large chip designs is known. We present an efficient method to estimate currents exhaustively for all interconnects in a chip. The proposed method uses pre-characterization of cells and macros, and steps to identify and filter out symmetrically bi-directional interconnects. We illustrate the strength of the proposed approach using a high-performance microprocessor design for embedded applications as a case study

  17. An integrated circuit with transmit beamforming flip-chip bonded to a 2-D CMUT array for 3-D ultrasound imaging.

    Science.gov (United States)

    Wygant, Ira O; Jamal, Nafis S; Lee, Hyunjoo J; Nikoozadeh, Amin; Oralkan, Omer; Karaman, Mustafa; Khuri-Yakub, Butrus T

    2009-10-01

    State-of-the-art 3-D medical ultrasound imaging requires transmitting and receiving ultrasound using a 2-D array of ultrasound transducers with hundreds or thousands of elements. A tight combination of the transducer array with integrated circuitry eliminates bulky cables connecting the elements of the transducer array to a separate system of electronics. Furthermore, preamplifiers located close to the array can lead to improved receive sensitivity. A combined IC and transducer array can lead to a portable, high-performance, and inexpensive 3-D ultrasound imaging system. This paper presents an IC flip-chip bonded to a 16 x 16-element capacitive micromachined ultrasonic transducer (CMUT) array for 3-D ultrasound imaging. The IC includes a transmit beamformer that generates 25-V unipolar pulses with programmable focusing delays to 224 of the 256 transducer elements. One-shot circuits allow adjustment of the pulse widths for different ultrasound transducer center frequencies. For receiving reflected ultrasound signals, the IC uses the 32-elements along the array diagonals. The IC provides each receiving element with a low-noise 25-MHz-bandwidth transimpedance amplifier. Using a field-programmable gate array (FPGA) clocked at 100 MHz to operate the IC, the IC generated properly timed transmit pulses with 5-ns accuracy. With the IC flip-chip bonded to a CMUT array, we show that the IC can produce steered and focused ultrasound beams. We present 2-D and 3-D images of a wire phantom and 2-D orthogonal cross-sectional images (Bscans) of a latex heart phantom.

  18. An automatic chip structure optical inspection system for electronic components

    Science.gov (United States)

    Song, Zhichao; Xue, Bindang; Liang, Jiyuan; Wang, Ke; Chen, Junzhang; Liu, Yunhe

    2018-01-01

    An automatic chip structure inspection system based on machine vision is presented to ensure the reliability of electronic components. It consists of four major modules, including a metallographic microscope, a Gigabit Ethernet high-resolution camera, a control system and a high performance computer. An auto-focusing technique is presented to solve the problem that the chip surface is not on the same focusing surface under the high magnification of the microscope. A panoramic high-resolution image stitching algorithm is adopted to deal with the contradiction between resolution and field of view, caused by different sizes of electronic components. In addition, we establish a database to storage and callback appropriate parameters to ensure the consistency of chip images of electronic components with the same model. We use image change detection technology to realize the detection of chip images of electronic components. The system can achieve high-resolution imaging for chips of electronic components with various sizes, and clearly imaging for the surface of chip with different horizontal and standardized imaging for ones with the same model, and can recognize chip defects.

  19. Experiment list: SRX153147 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available -Seq source_name=Human breast adenocarcinoma cell-line MCF7 || cell-line=MCF7 || passage=5 || chip antibody=...on=Pleura|Tissue Diagnosis=Adenocarcinoma 64054379,98.7,5.2,764 GSM946851: MCF7 H3K27me3; Homo sapiens; ChIP

  20. Experiment list: SRX153148 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available -Seq source_name=Human breast adenocarcinoma cell-line MCF7 || cell-line=MCF7 || passage=5 || chip antibody=...n=Pleura|Tissue Diagnosis=Adenocarcinoma 57306360,95.7,15.1,2666 GSM946852: MCF7 H3K9me3; Homo sapiens; ChIP

  1. On-chip integrated lasers for biophotonic applications

    DEFF Research Database (Denmark)

    Mappes, Timo; Wienhold, Tobias; Bog, Uwe

    Meeting the need of biomedical users, we develop disposable Lab-on-a-Chip systems based on commercially available polymers. We are combining passive microfluidics with active optical elements on-chip by integrating multiple solid-state and liquid-core lasers. While covering a wide range of laser ...

  2. Chip-olate’ and dry-film resists for efficient fabrication, singulation and sealing of microfluidic chips

    Science.gov (United States)

    Temiz, Yuksel; Delamarche, Emmanuel

    2014-09-01

    This paper describes a technique for high-throughput fabrication and efficient singulation of chips having closed microfluidic structures and takes advantage of dry-film resists (DFRs) for efficient sealing of capillary systems. The technique is illustrated using 4-inch Si/SiO2 wafers. Wafers carrying open microfluidic structures are partially diced to about half of their thickness. Treatments such as surface cleaning are done at wafer-level, then the structures are sealed using low-temperature (45 °C) lamination of a DFR that is pre-patterned using a craft cutter, and ready-to-use chips are finally separated manually like a chocolate bar by applying a small force (≤ 4 N). We further show that some DFRs have low auto-fluorescence at wavelengths typically used for common fluorescent dyes and that mechanical properties of some DFRs allow for the lamination of 200 μm wide microfluidic structures with negligible sagging (~1 μm). The hydrophilicity (advancing contact angle of ~60°) of the DFR supports autonomous capillary-driven flow without the need for additional surface treatment of the microfluidic chips. Flow rates from 1 to 5 µL min-1 are generated using different geometries of channels and capillary pumps. In addition, the ‘chip-olate’ technique is compatible with the patterning of capture antibodies on DFR for use in immunoassays. We believe this technique to be applicable to the fabrication of a wide range of microfluidic and lab-on-a-chip devices and to offer a viable alternative to many labor-intensive processes that are currently based on wafer bonding techniques or on the molding of poly(dimethylsiloxane) (PDMS) layers.

  3. Error Control for Network-on-Chip Links

    CERN Document Server

    Fu, Bo

    2012-01-01

    As technology scales into nanoscale regime, it is impossible to guarantee the perfect hardware design. Moreover, if the requirement of 100% correctness in hardware can be relaxed, the cost of manufacturing, verification, and testing will be significantly reduced. Many approaches have been proposed to address the reliability problem of on-chip communications. This book focuses on the use of error control codes (ECCs) to improve on-chip interconnect reliability. Coverage includes detailed description of key issues in NOC error control faced by circuit and system designers, as well as practical error control techniques to minimize the impact of these errors on system performance. Provides a detailed background on the state of error control methods for on-chip interconnects; Describes the use of more complex concatenated codes such as Hamming Product Codes with Type-II HARQ, while emphasizing integration techniques for on-chip interconnect links; Examines energy-efficient techniques for integrating multiple error...

  4. Chip cleaning and regeneration for electrochemical sensor arrays

    Energy Technology Data Exchange (ETDEWEB)

    Bhalla, Vijayender [Biochemistry Department ' G.Moruzzi' , University of Bologna, Via Irnerio 48, 40126 Bologna (Italy); Carrara, Sandro, E-mail: sandro.carrara@epfl.c [Biochemistry Department ' G.Moruzzi' , University of Bologna, Via Irnerio 48, 40126 Bologna (Italy); Stagni, Claudio [Department DEIS, University of Bologna, viale Risorgimento 2, 40136 Bologna (Italy); Samori, Bruno [Biochemistry Department ' G.Moruzzi' , University of Bologna, Via Irnerio 48, 40126 Bologna (Italy)

    2010-04-02

    Sensing systems based on electrochemical detection have generated great interest because electronic readout may replace conventional optical readout in microarray. Moreover, they offer the possibility to avoid labelling for target molecules. A typical electrochemical array consists of many sensing sites. An ideal micro-fabricated sensor-chip should have the same measured values for all the equivalent sensing sites (or spots). To achieve high reliability in electrochemical measurements, high quality in functionalization of the electrodes surface is essential. Molecular probes are often immobilized by using alkanethiols onto gold electrodes. Applying effective cleaning methods on the chip is a fundamental requirement for the formation of densely-packed and stable self-assembly monolayers. However, the available well-known techniques for chip cleaning may not be so reliable. Furthermore, it could be necessary to recycle the chip for reuse. Also in this case, an effective recycling technique is required to re-obtain well cleaned sensing surfaces on the chip. This paper presents experimental results on the efficacy and efficiency of the available techniques for initial cleaning and further recycling of micro-fabricated chips. Piranha, plasma, reductive and oxidative cleaning methods were applied and the obtained results were critically compared. Some interesting results were attained by using commonly considered cleaning methodologies. This study outlines oxidative electrochemical cleaning and recycling as the more efficient cleaning procedure for electrochemical based sensor arrays.

  5. FISH & CHIPS: Four Electrode Conductivity / Salinity Sensor on a Silicon Multi-sensor chip for Fisheries Research

    DEFF Research Database (Denmark)

    Hyldgård, Anders; Olafsdottir, Iris; Olesen, M.

    2005-01-01

    The design and fabrication of a single chip silicon salinity, temperature, pressure and light multisensor is presented. The behavior 2- and 4-electrode conductivity microsensors are described and methods for precise determination of water conductivity are given......The design and fabrication of a single chip silicon salinity, temperature, pressure and light multisensor is presented. The behavior 2- and 4-electrode conductivity microsensors are described and methods for precise determination of water conductivity are given...

  6. Teaching Quality Control with Chocolate Chip Cookies

    Science.gov (United States)

    Baker, Ardith

    2014-01-01

    Chocolate chip cookies are used to illustrate the importance and effectiveness of control charts in Statistical Process Control. By counting the number of chocolate chips, creating the spreadsheet, calculating the control limits and graphing the control charts, the student becomes actively engaged in the learning process. In addition, examining…

  7. Exploration within the Network-on-Chip Paradigm

    NARCIS (Netherlands)

    Wolkotte, P.T.

    2009-01-01

    A general purpose processor used to consist of a single processing core, which performed and controlled all tasks on the chip. Its functionality and maximum clock frequency grew steadily over the years. Due to the continuous increase of the number of transistors available on-chip and the operational

  8. Experiment list: SRX119679 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available 8,18360 GSM874985: ES.H3K27me3; Homo sapiens; ChIP-Seq source_name=H1 human Embryonic stem cells || cell line=H1 || treatment=diagnos...tic sample (pre-treatment) || chip antibody=H3K27me3 || chip antibody manufacturer=

  9. Experiment list: SRX119684 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available 2,13603 GSM874990: ES.H3K79me2; Homo sapiens; ChIP-Seq source_name=H1 human Embryonic stem cell || cell line=H1 || treatment=diagnost...ic sample (pre-treatment) || chip antibody=H3K79me2 || chip antibody manufacturer=A

  10. Self-powered integrated systems-on-chip (energy chip)

    KAUST Repository

    Hussain, Muhammad Mustafa

    2010-04-23

    In today\\'s world, consumer driven technology wants more portable electronic gadgets to be developed, and the next big thing in line is self-powered handheld devices. Therefore to reduce the power consumption as well as to supply sufficient power to run those devices, several critical technical challenges need to be overcome: a. Nanofabrication of macro/micro systems which incorporates the direct benefit of light weight (thus portability), low power consumption, faster response, higher sensitivity and batch production (low cost). b. Integration of advanced nano-materials to meet the performance/cost benefit trend. Nano-materials may offer new functionalities that were previously underutilized in the macro/micro dimension. c. Energy efficiency to reduce power consumption and to supply enough power to meet that low power demand. We present a pragmatic perspective on a self-powered integrated System on Chip (SoC). We envision the integrated device will have two objectives: low power consumption/dissipation and on-chip power generation for implementation into handheld or remote technologies for defense, space, harsh environments and medical applications. This paper provides insight on materials choices, intelligent circuit design, and CMOS compatible integration.

  11. Self-powered integrated systems-on-chip (energy chip)

    Science.gov (United States)

    Hussain, M. M.; Fahad, H.; Rojas, J.; Hasan, M.; Talukdar, A.; Oommen, J.; Mink, J.

    2010-04-01

    In today's world, consumer driven technology wants more portable electronic gadgets to be developed, and the next big thing in line is self-powered handheld devices. Therefore to reduce the power consumption as well as to supply sufficient power to run those devices, several critical technical challenges need to be overcome: a. Nanofabrication of macro/micro systems which incorporates the direct benefit of light weight (thus portability), low power consumption, faster response, higher sensitivity and batch production (low cost). b. Integration of advanced nano-materials to meet the performance/cost benefit trend. Nano-materials may offer new functionalities that were previously underutilized in the macro/micro dimension. c. Energy efficiency to reduce power consumption and to supply enough power to meet that low power demand. We present a pragmatic perspective on a self-powered integrated System on Chip (SoC). We envision the integrated device will have two objectives: low power consumption/dissipation and on-chip power generation for implementation into handheld or remote technologies for defense, space, harsh environments and medical applications. This paper provides insight on materials choices, intelligent circuit design, and CMOS compatible integration.

  12. A Neuron- and a Synapse Chip for Artificial Neural Networks

    DEFF Research Database (Denmark)

    Lansner, John; Lehmann, Torsten

    1992-01-01

    A cascadable, analog, CMOS chip set has been developed for hardware implementations of artificial neural networks (ANN's):I) a neuron chip containing an array of neurons with hyperbolic tangent activation functions and adjustable gains, and II) a synapse chip (or a matrix-vector multiplier) where...

  13. A polymer chip-integrable piezoelectric micropump with low backpressure dependence

    DEFF Research Database (Denmark)

    Conde, A. J.; Bianchetti, A.; Veiras, F. E.

    2015-01-01

    We describe a piezoelectric micropump constructed in polymers with conventional machining methods. The micropump is self-contained and can be built as an independent device or as an on-chip module within laminated microfluidic chips. We demonstrate on-chip integrability by the fabrication and tes...

  14. Silicon photonic integrated circuits with electrically programmable non-volatile memory functions.

    Science.gov (United States)

    Song, J-F; Lim, A E-J; Luo, X-S; Fang, Q; Li, C; Jia, L X; Tu, X-G; Huang, Y; Zhou, H-F; Liow, T-Y; Lo, G-Q

    2016-09-19

    Conventional silicon photonic integrated circuits do not normally possess memory functions, which require on-chip power in order to maintain circuit states in tuned or field-configured switching routes. In this context, we present an electrically programmable add/drop microring resonator with a wavelength shift of 426 pm between the ON/OFF states. Electrical pulses are used to control the choice of the state. Our experimental results show a wavelength shift of 2.8 pm/ms and a light intensity variation of ~0.12 dB/ms for a fixed wavelength in the OFF state. Theoretically, our device can accommodate up to 65 states of multi-level memory functions. Such memory functions can be integrated into wavelength division mutiplexing (WDM) filters and applied to optical routers and computing architectures fulfilling large data downloading demands.

  15. Determining wood chip size: image analysis and clustering methods

    Directory of Open Access Journals (Sweden)

    Paolo Febbi

    2013-09-01

    Full Text Available One of the standard methods for the determination of the size distribution of wood chips is the oscillating screen method (EN 15149- 1:2010. Recent literature demonstrated how image analysis could return highly accurate measure of the dimensions defined for each individual particle, and could promote a new method depending on the geometrical shape to determine the chip size in a more accurate way. A sample of wood chips (8 litres was sieved through horizontally oscillating sieves, using five different screen hole diameters (3.15, 8, 16, 45, 63 mm; the wood chips were sorted in decreasing size classes and the mass of all fractions was used to determine the size distribution of the particles. Since the chip shape and size influence the sieving results, Wang’s theory, which concerns the geometric forms, was considered. A cluster analysis on the shape descriptors (Fourier descriptors and size descriptors (area, perimeter, Feret diameters, eccentricity was applied to observe the chips distribution. The UPGMA algorithm was applied on Euclidean distance. The obtained dendrogram shows a group separation according with the original three sieving fractions. A comparison has been made between the traditional sieve and clustering results. This preliminary result shows how the image analysis-based method has a high potential for the characterization of wood chip size distribution and could be further investigated. Moreover, this method could be implemented in an online detection machine for chips size characterization. An improvement of the results is expected by using supervised multivariate methods that utilize known class memberships. The main objective of the future activities will be to shift the analysis from a 2-dimensional method to a 3- dimensional acquisition process.

  16. Least cost supply strategies for wood chips

    DEFF Research Database (Denmark)

    Möller, Bernd

    The abstract presents a study based on a geographical information system, which produce  cost-supply curves by location for forest woods chips in Denmark.......The abstract presents a study based on a geographical information system, which produce  cost-supply curves by location for forest woods chips in Denmark....

  17. Experiment list: SRX507384 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available + (wildtype) || age of animals=1-5 day old || tissue=Ovaries || chip antibody=Anti-H3K4me2 || chip antibody ... Anti-H3K4me2- replicate#2; Drosophila melanogaster; ChIP-Seq source_name=WT_WT_Anti-H3K4me2 || strain=piwi/

  18. Experiment list: SRX507382 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available + (wildtype) || age of animals=1-5 day old || tissue=Ovaries || chip antibody=Anti-H3K9me3 || chip antibody ... Anti-H3K9me3- replicate#2; Drosophila melanogaster; ChIP-Seq source_name=WT_WT_Anti-H3K9me3 || strain=piwi/

  19. Experiment list: SRX037432 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available s from PBMC, normal || gender=male || cell type=aTconv cells || chip antibody=H3K4me1 || chip antibody vendo...=peripheral blood mononuclear cells 14792460,17.0,2.9,5804 GSM648494: aTconv-H3K4me1 source_name=aTconv cell

  20. A random-access microarray for programmable droplet storage, retrieval and manipulation

    International Nuclear Information System (INIS)

    Tseng, Yi-Ming; Wang, Jhih-Jhe; Su, Yu-Chuan

    2012-01-01

    This article presents an integrated microfluidic system that is capable of programmably metering, entrapping, coalescing, addressably storing, retrieving and manipulating emulsion droplets. A multilayer, flexible PDMS chip with specially designed fluidic channels dynamically reconfigured by pneumatically actuated diaphragms is utilized to integrate a variety of droplet manipulation schemes. Once droplets are formed, their motions are coordinated by a 2D multiplexing scheme, which exploits the bidirectional movement of diaphragms to implement a random-access microarray. In the prototype demonstration, a PDMS molding and bonding process is used to fabricate the proposed microfluidic system. Emulsion droplets with desired volumes and compositions are produced, addressably stored, manipulated and retrieved from a 4 × 4 array, which employs just 4 (= 2 × log 2 4) control inputs for the operation. It has been demonstrated that (1) the integration of droplet manipulation and 2D multiplexing schemes can be achieved readily using bidirectional diaphragm valves, (2) multiplexing of an N × N array could be realized utilizing only 2 × log 2 N control inputs and (3) a multifunctional, random-access microarray can be accomplished employing a multilayer PDMS chip. As such, the demonstrated random-access microarray could potentially serve as a platform for continuous tracking and multistep processing of emulsion droplets, which is desired for various biological and chemical applications. (paper)

  1. Diffusion driven optofluidic dye lasers encapsulated into polymer chips

    DEFF Research Database (Denmark)

    Wienhold, Tobias; Breithaupt, Felix; Vannahme, Christoph

    2012-01-01

    Lab-on-a-chip systems made of polymers are promising for the integration of active optical elements, enabling e.g. on-chip excitation of fluorescent markers or spectroscopy. In this work we present diffusion operation of tunable optofluidic dye lasers in a polymer foil. We demonstrate that these ......Lab-on-a-chip systems made of polymers are promising for the integration of active optical elements, enabling e.g. on-chip excitation of fluorescent markers or spectroscopy. In this work we present diffusion operation of tunable optofluidic dye lasers in a polymer foil. We demonstrate...... that these first order distributed feedback lasers can be operated for more than 90 min at a pulse repetition rate of 2 Hz without fluidic pumping. Ultra-high output pulse energies of more than 10 μJ and laser thresholds of 2 μJ are achieved for resonator lengths of 3 mm. By introducing comparatively large on......-chip dye solution reservoirs, the required exchange of dye molecules is accomplished solely by diffusion. Polymer chips the size of a microscope cover slip (18 × 18 mm2) were fabricated in batches on a wafer using a commercially available polymer (TOPAS® Cyclic Olefin Copolymer). Thermal imprinting...

  2. Prototype detection unit for the CHIPS experiment

    Science.gov (United States)

    Pfützner, Maciej M.

    2017-09-01

    CHIPS (CHerenkov detectors In mine PitS) is an R&D project aiming to develop novel cost-effective neutrino detectors, focused on measuring the CP-violating neutrino mixing phase (δ CP). A single detector module, containing an enclosed volume of purified water, would be submerged in an existing lake, located in a neutrino beam. A staged approach is proposed with first detectors deployed in a flooded mine pit in Northern Minnesota, 7 mrad off-axis from the existing NuMI beam. A small proof-of-principle model (CHIPS-M) has already been tested and the first stage of a fully functional 10 kt module (CHIPS-10) is planned for 2018. One of the instruments submerged on board of CHIPS-M in autumn 2015 was a prototype detection unit, constructed at Nikhef. The unit contains hardware borrowed from the KM3NeT experiment, including 16 3 inch photomultiplier tubes and readout electronics. In addition to testing the mechanical design and data acquisition, the detector was used to record a large sample of cosmic ray muon events. The collected data is valuable for characterising the cosmic muon background and validating a Monte Carlo simulation used to optimise future designs. This paper introduces the CHIPS project, describes the design of the prototype unit, and presents the results of a preliminary data analysis.

  3. The DIALOG Chip in the Front-End Electronics of the LHCb Muon Detector

    CERN Document Server

    Cadeddu, S; Lai, A

    2004-01-01

    We present a custom integrated circuit, named DIALOG, which is a fundamental building block in the front-end architecture of the LHCb Muon detector. DIALOG is realized in IBM 0.25 um technology, using radiation hardening layout techniques. DIALOG integrates important tools for detector time alignment procedures and time alignment monitoring on the front- end system. In particular, it integrates 16 programmable delays, which can be regulated in steps of 1 ns. Many other features, necessary for the Muon trigger operation and for a safe front-end monitoring are integrated: DIALOG generates the information used by the trigger as a combination of its 16 inputs from the Amplifier-Shaper-Discriminator (ASD) chips, it generates the thresholds of the ASD, it monitors the rate of all its input channels. We describe the circuit architecture, its internal blocks and its main modes of operation.

  4. CHIP promotes thyroid cancer proliferation via activation of the MAPK and AKT pathways

    Energy Technology Data Exchange (ETDEWEB)

    Zhang, Li [Department of Pharmacy, Urumchi General Hospital of Lanzhou Military Region, Urumchi, Xinjiang 830000 (China); Liu, Lianyong [Medical College of Soochow University, Suzhou, Jiangsu 215123 (China); Department of Endocrinology, Shanghai Punan Hospital, Shanghai 200125 (China); He, Xiaohua; Shen, Yunling; Liu, Xuerong; Wei, Jing; Yu, Fang [Department of Endocrinology, Urumchi General Hospital of Lanzhou Military Region, Urumchi, Xinjiang 830000 (China); Tian, Jianqing, E-mail: jianqing0991@163.com [Department of Endocrinology, Urumchi General Hospital of Lanzhou Military Region, Urumchi, Xinjiang 830000 (China)

    2016-08-26

    The carboxyl terminus of Hsp70-interacting protein (CHIP) is a U box-type ubiquitin ligase that plays crucial roles in various biological processes, including tumor progression. To date, the functional mechanism of CHIP in thyroid cancer remains unknown. Here, we obtained evidence of upregulation of CHIP in thyroid cancer tissues and cell lines. CHIP overexpression markedly enhanced thyroid cancer cell viability and colony formation in vitro and accelerated tumor growth in vivo. Conversely, CHIP knockdown impaired cell proliferation and tumor growth. Notably, CHIP promoted cell growth through activation of MAPK and AKT pathways, subsequently decreasing p27 and increasing cyclin D1 and p-FOXO3a expression. Our findings collectively indicate that CHIP functions as an oncogene in thyroid cancer, and is therefore a potential therapeutic target for this disease. - Highlights: • CHIP is significantly upregulated in thyroid cancer cells. • Overexpression of CHIP facilitates proliferation and tumorigenesis of thyroid cancer cells. • Silencing of CHIP inhibits the proliferation and tumorigenesis of thyroid cancer cells. • CHIP promotes thyroid cancer cell proliferation via activating the MAPK and AKT pathways.

  5. Fabrication and characterization of SPR chips with the modified bovine serum albumin

    Science.gov (United States)

    Chen, Xing; Zhang, Lu-lu; Cui, Da-fu

    2016-03-01

    A facile surface plasmon resonance (SPR) chip is developed for small molecule determination and analysis. The SPR chip was prepared based on a self assembling principle, in which the modified bovine serum albumin (BSA) was directly self-assembled onto the bare gold surface. The surface morphology of the chip with the modified BSA was investigated by atomic force microscopy (AFM) and its optical properties were characterized. The surface binding capacity of the bare facile SPR chip with a uniform morphology is 8 times of that of the bare control SPR chip. Based on the experiments of immune reaction between cortisol antibody and cortisol derivative, the sensitivity of the facile SPR chip with the modified BSA is much higher than that of the control SPR chip with the un-modified BSA. The facile SPR chip has been successfully used to detect small molecules. The lowest detection limit is 5 ng/mL with a linear range of 5—100 ng/mL for cortisol analysis. The novel facile SPR chip can also be applied to detect other small molecules.

  6. Chip-olate’ and dry-film resists for efficient fabrication, singulation and sealing of microfluidic chips

    International Nuclear Information System (INIS)

    Temiz, Yuksel; Delamarche, Emmanuel

    2014-01-01

    This paper describes a technique for high-throughput fabrication and efficient singulation of chips having closed microfluidic structures and takes advantage of dry-film resists (DFRs) for efficient sealing of capillary systems. The technique is illustrated using 4-inch Si/SiO 2 wafers. Wafers carrying open microfluidic structures are partially diced to about half of their thickness. Treatments such as surface cleaning are done at wafer-level, then the structures are sealed using low-temperature (45 °C) lamination of a DFR that is pre-patterned using a craft cutter, and ready-to-use chips are finally separated manually like a chocolate bar by applying a small force (≤ 4 N). We further show that some DFRs have low auto-fluorescence at wavelengths typically used for common fluorescent dyes and that mechanical properties of some DFRs allow for the lamination of 200 μm wide microfluidic structures with negligible sagging (∼1 μm). The hydrophilicity (advancing contact angle of ∼60°) of the DFR supports autonomous capillary-driven flow without the need for additional surface treatment of the microfluidic chips. Flow rates from 1 to 5 µL min -1 are generated using different geometries of channels and capillary pumps. In addition, the ‘chip-olate’ technique is compatible with the patterning of capture antibodies on DFR for use in immunoassays. We believe this technique to be applicable to the fabrication of a wide range of microfluidic and lab-on-a-chip devices and to offer a viable alternative to many labor-intensive processes that are currently based on wafer bonding techniques or on the molding of poly(dimethylsiloxane) (PDMS) layers. (technical note)

  7. Experiment list: SRX176067 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available sis=Carcinoma 6619400,91.7,7.2,13648 GSM984399: LNCAP H3K4ME3 vehicle; Homo sapiens; ChIP-Seq source_name=pr...ostate cancer cells || cell line=LNCaP || chip antibody=H3K4Me3 || chip antibody manufacturer=Millipore || treatment=EtOH vehicle

  8. Experiment list: SRX485219 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available 56 GSM1346560: RNA Polymerase II ChIP from control germline knock-down ovaries; Drosophila melanogaster; ChI...P-Seq source_name=RNA Polymerase II ChIP from control germline knock-down ovaries || developmental stage=4-6... days old adult || Sex=female || tissue=ovary || germline knock-down=control || c

  9. Experiment list: SRX107410 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available Adenocarcinoma 37378122,96.3,56.7,376 GSM838388: h3k36me3 si23 ChIP-Seq; Homo sapiens; ChIP-Seq source_name=Hela cells knock...down Med23 || chip antibody=H3K36me3 || treatment=knockdown Med23 || cell line=HeLa || chip

  10. Chips in banknotes for a banknote electronic signature

    Science.gov (United States)

    Perron, Maurice; Grimal, Jean-Michel; Beauchet, Frederic; Dell'Ova, Francis

    2004-06-01

    A lot of information can be found in the media about the possibility of using micro-chips in banknotes. This mostly comes from chip manufacturers whose technology is becoming mature for this application. A lot of patents have been applied therefore but what must be noticed is that all these patents concern the processes to insert chips in banknotes and not a lot is said about the product itself and for what use. The Banque de France is a Central Bank involved in all tasks concerning banknotes from design, production, issue, recirculation and sorting, action against counterfeiting and finally destruction. These activities concern, of course, the banknotes in circulation in France (formerly the French francs notes, presently the Euro notes as Banque de France is part of the Eurosystem) and in other countries in the world. The Banque de France approach in looking to the future of chips in banknotes is at first a product approach. Banknotes are means of payment for which security of authentication is fundamental. They could carry chips to provide more security in the transactions but without altering their nature: the anonyminity and immediacy of the transactions.

  11. Simple photolithographic rapid prototyping of microfluidic chips

    DEFF Research Database (Denmark)

    Kunstmann-Olsen, Casper; Hoyland, James; Rubahn, Horst-Günter

    2012-01-01

    Vi præsenterer en simpel metode til at producere støbeforme til støbning af PDMS mikrofluide chips vha. fotolitografi, med 35mm fotonegativer som masker. Vi demonstrer metodens muligheder og begrænsninger. Vi har optimeret processen til at fremstille planare lab-on-a-chip strukturer med meget høj...

  12. Energy Harvesting Chip and the Chip Based Power Supply Development for a Wireless Sensor Network.

    Science.gov (United States)

    Lee, Dasheng

    2008-12-02

    In this study, an energy harvesting chip was developed to scavenge energy from artificial light to charge a wireless sensor node. The chip core is a miniature transformer with a nano-ferrofluid magnetic core. The chip embedded transformer can convert harvested energy from its solar cell to variable voltage output for driving multiple loads. This chip system yields a simple, small, and more importantly, a battery-less power supply solution. The sensor node is equipped with multiple sensors that can be enabled by the energy harvesting power supply to collect information about the human body comfort degree. Compared with lab instruments, the nodes with temperature, humidity and photosensors driven by harvested energy had variation coefficient measurement precision of less than 6% deviation under low environmental light of 240 lux. The thermal comfort was affected by the air speed. A flow sensor equipped on the sensor node was used to detect airflow speed. Due to its high power consumption, this sensor node provided 15% less accuracy than the instruments, but it still can meet the requirement of analysis for predicted mean votes (PMV) measurement. The energy harvesting wireless sensor network (WSN) was deployed in a 24-hour convenience store to detect thermal comfort degree from the air conditioning control. During one year operation, the sensor network powered by the energy harvesting chip retained normal functions to collect the PMV index of the store. According to the one month statistics of communication status, the packet loss rate (PLR) is 2.3%, which is as good as the presented results of those WSNs powered by battery. Referring to the electric power records, almost 54% energy can be saved by the feedback control of an energy harvesting sensor network. These results illustrate that, scavenging energy not only creates a reliable power source for electronic devices, such as wireless sensor nodes, but can also be an energy source by building an energy efficient

  13. Energy Harvesting Chip and the Chip Based Power Supply Development for a Wireless Sensor Network

    Science.gov (United States)

    Lee, Dasheng

    2008-01-01

    In this study, an energy harvesting chip was developed to scavenge energy from artificial light to charge a wireless sensor node. The chip core is a miniature transformer with a nano-ferrofluid magnetic core. The chip embedded transformer can convert harvested energy from its solar cell to variable voltage output for driving multiple loads. This chip system yields a simple, small, and more importantly, a battery-less power supply solution. The sensor node is equipped with multiple sensors that can be enabled by the energy harvesting power supply to collect information about the human body comfort degree. Compared with lab instruments, the nodes with temperature, humidity and photosensors driven by harvested energy had variation coefficient measurement precision of less than 6% deviation under low environmental light of 240 lux. The thermal comfort was affected by the air speed. A flow sensor equipped on the sensor node was used to detect airflow speed. Due to its high power consumption, this sensor node provided 15% less accuracy than the instruments, but it still can meet the requirement of analysis for predicted mean votes (PMV) measurement. The energy harvesting wireless sensor network (WSN) was deployed in a 24-hour convenience store to detect thermal comfort degree from the air conditioning control. During one year operation, the sensor network powered by the energy harvesting chip retained normal functions to collect the PMV index of the store. According to the one month statistics of communication status, the packet loss rate (PLR) is 2.3%, which is as good as the presented results of those WSNs powered by battery. Referring to the electric power records, almost 54% energy can be saved by the feedback control of an energy harvesting sensor network. These results illustrate that, scavenging energy not only creates a reliable power source for electronic devices, such as wireless sensor nodes, but can also be an energy source by building an energy efficient

  14. Energy Harvesting Chip and the Chip Based Power Supply Development for a Wireless Sensor Network

    Directory of Open Access Journals (Sweden)

    Dasheng Lee

    2008-12-01

    Full Text Available In this study, an energy harvesting chip was developed to scavenge energy from artificial light to charge a wireless sensor node. The chip core is a miniature transformer with a nano-ferrofluid magnetic core. The chip embedded transformer can convert harvested energy from its solar cell to variable voltage output for driving multiple loads. This chip system yields a simple, small, and more importantly, a battery-less power supply solution. The sensor node is equipped with multiple sensors that can be enabled by the energy harvesting power supply to collect information about the human body comfort degree. Compared with lab instruments, the nodes with temperature, humidity and photosensors driven by harvested energy had variation coefficient measurement precision of less than 6% deviation under low environmental light of 240 lux. The thermal comfort was affected by the air speed. A flow sensor equipped on the sensor node was used to detect airflow speed. Due to its high power consumption, this sensor node provided 15% less accuracy than the instruments, but it still can meet the requirement of analysis for predicted mean votes (PMV measurement. The energy harvesting wireless sensor network (WSN was deployed in a 24-hour convenience store to detect thermal comfort degree from the air conditioning control. During one year operation, the sensor network powered by the energy harvesting chip retained normal functions to collect the PMV index of the store. According to the one month statistics of communication status, the packet loss rate (PLR is 2.3%, which is as good as the presented results of those WSNs powered by battery. Referring to the electric power records, almost 54% energy can be saved by the feedback control of an energy harvesting sensor network. These results illustrate that, scavenging energy not only creates a reliable power source for electronic devices, such as wireless sensor nodes, but can also be an energy source by building an

  15. Microfluidic organ-on-chip technology for blood-brain barrier research.

    Science.gov (United States)

    van der Helm, Marinke W; van der Meer, Andries D; Eijkel, Jan C T; van den Berg, Albert; Segerink, Loes I

    2016-01-01

    Organs-on-chips are a new class of microengineered laboratory models that combine several of the advantages of current in vivo and in vitro models. In this review, we summarize the advances that have been made in the development of organ-on-chip models of the blood-brain barrier (BBBs-on-chips) and the challenges that are still ahead. The BBB is formed by specialized endothelial cells and separates blood from brain tissue. It protects the brain from harmful compounds from the blood and provides homeostasis for optimal neuronal function [corrected]. Studying BBB function and dysfunction is important for drug development and biomedical research. Microfluidic BBBs-on-chips enable real-time study of (human) cells in an engineered physiological microenvironment, for example incorporating small geometries and fluid flow as well as sensors. Examples of BBBs-on-chips in literature already show the potential of more realistic microenvironments and the study of organ-level functions. A key challenge in the field of BBB-on-chip development is the current lack of standardized quantification of parameters such as barrier permeability and shear stress. This limits the potential for direct comparison of the performance of different BBB-on-chip models to each other and existing models. We give recommendations for further standardization in model characterization and conclude that the rapidly emerging field of BBB-on-chip models holds great promise for further studies in BBB biology and drug development.

  16. The GenoChip: a new tool for genetic anthropology.

    Science.gov (United States)

    Elhaik, Eran; Greenspan, Elliott; Staats, Sean; Krahn, Thomas; Tyler-Smith, Chris; Xue, Yali; Tofanelli, Sergio; Francalacci, Paolo; Cucca, Francesco; Pagani, Luca; Jin, Li; Li, Hui; Schurr, Theodore G; Greenspan, Bennett; Spencer Wells, R

    2013-01-01

    The Genographic Project is an international effort aimed at charting human migratory history. The project is nonprofit and nonmedical, and, through its Legacy Fund, supports locally led efforts to preserve indigenous and traditional cultures. Although the first phase of the project was focused on uniparentally inherited markers on the Y-chromosome and mitochondrial DNA (mtDNA), the current phase focuses on markers from across the entire genome to obtain a more complete understanding of human genetic variation. Although many commercial arrays exist for genome-wide single-nucleotide polymorphism (SNP) genotyping, they were designed for medical genetic studies and contain medically related markers that are inappropriate for global population genetic studies. GenoChip, the Genographic Project's new genotyping array, was designed to resolve these issues and enable higher resolution research into outstanding questions in genetic anthropology. The GenoChip includes ancestry informative markers obtained for over 450 human populations, an ancient human (Saqqaq), and two archaic hominins (Neanderthal and Denisovan) and was designed to identify all known Y-chromosome and mtDNA haplogroups. The chip was carefully vetted to avoid inclusion of medically relevant markers. To demonstrate its capabilities, we compared the FST distributions of GenoChip SNPs to those of two commercial arrays. Although all arrays yielded similarly shaped (inverse J) FST distributions, the GenoChip autosomal and X-chromosomal distributions had the highest mean FST, attesting to its ability to discern subpopulations. The chip performances are illustrated in a principal component analysis for 14 worldwide populations. In summary, the GenoChip is a dedicated genotyping platform for genetic anthropology. With an unprecedented number of approximately 12,000 Y-chromosomal and approximately 3,300 mtDNA SNPs and over 130,000 autosomal and X-chromosomal SNPs without any known health, medical, or phenotypic

  17. The GenoChip: A New Tool for Genetic Anthropology

    Science.gov (United States)

    Elhaik, Eran; Greenspan, Elliott; Staats, Sean; Krahn, Thomas; Tyler-Smith, Chris; Xue, Yali; Tofanelli, Sergio; Francalacci, Paolo; Cucca, Francesco; Pagani, Luca; Jin, Li; Li, Hui; Schurr, Theodore G.; Greenspan, Bennett; Spencer Wells, R.

    2013-01-01

    The Genographic Project is an international effort aimed at charting human migratory history. The project is nonprofit and nonmedical, and, through its Legacy Fund, supports locally led efforts to preserve indigenous and traditional cultures. Although the first phase of the project was focused on uniparentally inherited markers on the Y-chromosome and mitochondrial DNA (mtDNA), the current phase focuses on markers from across the entire genome to obtain a more complete understanding of human genetic variation. Although many commercial arrays exist for genome-wide single-nucleotide polymorphism (SNP) genotyping, they were designed for medical genetic studies and contain medically related markers that are inappropriate for global population genetic studies. GenoChip, the Genographic Project’s new genotyping array, was designed to resolve these issues and enable higher resolution research into outstanding questions in genetic anthropology. The GenoChip includes ancestry informative markers obtained for over 450 human populations, an ancient human (Saqqaq), and two archaic hominins (Neanderthal and Denisovan) and was designed to identify all known Y-chromosome and mtDNA haplogroups. The chip was carefully vetted to avoid inclusion of medically relevant markers. To demonstrate its capabilities, we compared the FST distributions of GenoChip SNPs to those of two commercial arrays. Although all arrays yielded similarly shaped (inverse J) FST distributions, the GenoChip autosomal and X-chromosomal distributions had the highest mean FST, attesting to its ability to discern subpopulations. The chip performances are illustrated in a principal component analysis for 14 worldwide populations. In summary, the GenoChip is a dedicated genotyping platform for genetic anthropology. With an unprecedented number of approximately 12,000 Y-chromosomal and approximately 3,300 mtDNA SNPs and over 130,000 autosomal and X-chromosomal SNPs without any known health, medical, or phenotypic

  18. The impact of software and CAE tools on SEU in field programmable gate arrays

    International Nuclear Information System (INIS)

    Katz, R.; Wang, J.; McCollum, J.; Cronquist, B.

    1999-01-01

    Field programmable gate array (FPGA) devices, heavily used in spacecraft electronics, have grown substantially in size over the past few years, causing designers to work at a higher conceptual level, with computer aided engineering (CAE) tools synthesizing and optimizing the logic from a description. It is shown that the use of commercial-off-the-shelf (COTS) CAE tools can produce unreliable circuit designs when the device is used in a radiation environment and a flip-flop is upset. At a lower level, software can be used to improve the SEU performance of a flip-flop, exploiting the configurable nature of FPGA technology and on-chip delay, parasitic resistive, and capacitive circuit elements

  19. Microfluidic organ-on-chip technology for blood-brain barrier research

    NARCIS (Netherlands)

    van der Helm, Marieke Willemijn; van der Meer, Andries Dirk; Eijkel, Jan C.T.; van den Berg, Albert; Segerink, Loes Irene

    2016-01-01

    Organs-on-chips are a new class of microengineered laboratory models that combine several of the advantages of current in vivo and in vitro models. In this review, we summarize the advances that have been made in the development of organ-on-chip models of the blood-brain barrier (BBBs-on-chips) and

  20. Experiment list: SRX150629 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available sue Diagnosis=Fibrocystic Disease 27949151,89.1,5.9,589 GSM935550: Harvard ChipSeq MCF10A-Er-Src EtOH 0.01pc...t 12hr Input std source_name=MCF10A-Er-Src || biomaterial_provider=Struhl laboratory || lab=Harvard || lab description=Struhl - Harva...rd University || datatype=ChipSeq || datatype descriptio

  1. Experiment list: SRX150494 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available n-Barr Virus 44912180,85.6,7.7,1806 GSM935415: Harvard ChipSeq GM12878 GCN5 std source_name=GM12878 || bioma...ard || lab description=Struhl - Harvard University || datatype=ChipSeq || datatype ...terial_provider=Coriell; http://ccr.coriell.org/Sections/Search/Search.aspx?PgId=165&q=GM12878 || lab=Harv

  2. Experiment list: SRX150667 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available t|Tissue Diagnosis=Fibrocystic Disease 69172664,86.5,35.3,28780 GSM935588: Harvard ChipSeq MCF10A-Er-Src EtO...H 0.01pct Pol2 std source_name=MCF10A-Er-Src || biomaterial_provider=Struhl laboratory || lab=Harvard || lab description=Struhl - Har...vard University || datatype=ChipSeq || datatype descript

  3. Experiment list: SRX150535 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available t|Tissue Diagnosis=Fibrocystic Disease 69171580,86.8,43.7,20874 GSM935456: Harvard ChipSeq MCF10A-Er-Src 4OH...TAM 1uM 36hr Pol2 std source_name=MCF10A-Er-Src || biomaterial_provider=Struhl laboratory || lab=Harvard || ...lab description=Struhl - Harvard University || datatype=ChipSeq || datatype descr

  4. Experiment list: SRX150562 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available -Barr Virus 57294082,73.4,6.6,1909 GSM935483: Harvard ChipSeq GM12878 ZZZ3 std source_name=GM12878 || biomat...rd || lab description=Struhl - Harvard University || datatype=ChipSeq || datatype d...erial_provider=Coriell; http://ccr.coriell.org/Sections/Search/Search.aspx?PgId=165&q=GM12878 || lab=Harva

  5. Experiment list: SRX688848 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available d prostate cancer cell line || treatment=vehicle || chip antibody=rabbit anti-ASH... prostate cancer cells, vehicle, ASH2 ChIP || cell line=VCaP || cell type=vertebral metastatic lesion-derive...agnosis=Carcinoma 25750434,89.3,6.2,7152 GSM1489926: vcap ash2l veh; Homo sapiens; ChIP-Seq source_name=VCaP

  6. Forecasting forest chip energy production in Finland 2008-2014

    International Nuclear Information System (INIS)

    Linden, Mikael

    2011-01-01

    Energy policy measures aim to increase energy production from forest chips in Finland to 10 TWh by year 2010. However, on the regional level production differences are large, and the regional estimates of the potential base of raw materials for the production of forest chips are heterogeneous. In order to analyse the validity of the above target, two methods are proposed to derive forecasts for region-level energy production from forest chips in Finland in the years 2008-2014. The plant-level data from 2003-2007 gives a starting point for a detailed statistical analysis of present and future region-level forest chip production. Observed 2008 regional levels are above the estimated prediction 95% confidence intervals based on aggregation of plant-level time averages. A simple time trend model with fixed-region effects provides accurate forecasts for the years 2008-2014. Forest chip production forecast confidence intervals cover almost all regions for the 2008 levels and the estimates of potential production levels for 2014. The forecast confidence intervals are also derived with re-sampling methods, i.e. with bootstrap methods, to obtain more reliable results. Results confirm that a general materials shortfall is not expected in the near future for forest chip energy production in Finland.

  7. 60 GHz system-on-chip (SoC) with built-in memory and an on-chip antenna

    KAUST Repository

    Ghaffar, Farhan A.

    2014-04-01

    A novel 60 GHz transmitter SoC with an on-chip antenna and integrated memory in CMOS 65 nm technology is presented in this paper. This highly integrated transmitter design can support a data rate of 2 GBPS with a transmission range of 1 m. The transmitter consists of a fundamental frequency 60 GHz PLL which covers the complete ISM band. The modulator following the PLL can support both BPSK and OOK modulation schemes. Both stored data on the integrated memory or directly from an external source can be transmitted. A tapered slot on chip antenna is integrated with the power amplifier to complete the front end of the transmitter design. Size of the complete transmitter with on-chip antenna is only 1.96 mm × 1.96 mm. The core circuits consume less than 100 mW of power. The high data rate capability of the design makes it extremely suitable for bandwidth hungry applications such as unencrypted HD video streaming and transmission.

  8. 60 GHz system-on-chip (SoC) with built-in memory and an on-chip antenna

    KAUST Repository

    Ghaffar, Farhan A.; Arsalan, Muhammad; Cheema, Hammad; Salama, Khaled N.; Shamim, Atif

    2014-01-01

    A novel 60 GHz transmitter SoC with an on-chip antenna and integrated memory in CMOS 65 nm technology is presented in this paper. This highly integrated transmitter design can support a data rate of 2 GBPS with a transmission range of 1 m. The transmitter consists of a fundamental frequency 60 GHz PLL which covers the complete ISM band. The modulator following the PLL can support both BPSK and OOK modulation schemes. Both stored data on the integrated memory or directly from an external source can be transmitted. A tapered slot on chip antenna is integrated with the power amplifier to complete the front end of the transmitter design. Size of the complete transmitter with on-chip antenna is only 1.96 mm × 1.96 mm. The core circuits consume less than 100 mW of power. The high data rate capability of the design makes it extremely suitable for bandwidth hungry applications such as unencrypted HD video streaming and transmission.

  9. Firing with wood chips in heating and cogeneration plants

    International Nuclear Information System (INIS)

    Kofman, P.D.

    1992-01-01

    The document was produced for use as detailed teaching material aimed at spreading information on the use of wood chips as fuel for heating and cogeneration plants. It includes information and articles on wood fuels generally, combustion values, chopping machines, suppliers, occupational health hazards connected with the handling of wood chips, measuring amounts, the selection of types, prices, ash, environmental aspects and information on the establishment of a wood-chip fired district heating plant. (AB)

  10. Runtime adaptive multi-processor system-on-chip: RAMPSoC

    OpenAIRE

    Göhringer, D.; Hübner, M.; Schatz, V.; Becker, J.

    2008-01-01

    Current trends in high performance computing show, that the usage of multiprocessor systems on chip are one approach for the requirements of computing intensive applications. The multiprocessor system on chip (MPSoC) approaches often provide a static and homogeneous infrastructure of networked microprocessor on the chip die. A novel idea in this research area is to introduce the dynamic adaptivity of reconfigurable hardware in order to provide a flexible heterogeneous set of processing elemen...

  11. The Chip-Scale Atomic Clock - Recent Development Progress

    Science.gov (United States)

    2004-09-01

    35th Annual Precise Time and Time Interval (PTTI) Meeting 467 THE CHIP-SCALE ATOMIC CLOCK – RECENT DEVELOPMENT PROGRESS R. Lutwak ...1] R. Lutwak , et al., 2003, “The Chip-Scale Atomic Clock – Coherent Population Trapping vs. Conventional Interrogation,” in

  12. Flip-chip bonded optoelectronic integration based on ultrathin silicon (UTSi) CMOS

    Science.gov (United States)

    Hong, Sunkwang; Ho, Tawei; Zhang, Liping; Sawchuk, Alexander A.

    2003-06-01

    We describe the design and test of flip-chip bonded optoelectronic CMOS devices based on Peregrine Semiconductor's 0.5 micron Ultra-Thin Silicon on sapphire (UTSi) technology. The UTSi process eliminates the substrate leakage that typically results in crosstalk and reduces parasitic capacitance to the substrate, providing many benefits compared to bulk silicon CMOS. The low-loss synthetic sapphire substrate is optically transparent and has a coefficient of thermal expansion suitable for flip-chip bonding of vertical cavity surface emitting lasers (VCSELs) and detectors. We have designed two different UTSi CMOS chips. One contains a flip-chip bonded 1 x 4 photodiode array, a receiver array, a double edge triggered D-flip flop-based 2047-pattern pseudo random bit stream (PRBS) generator and a quadrature-phase LC-voltage controlled oscillator (VCO). The other chip contains a flip-chip bonded 1 x 4 VCSEL array, a driver array based on high-speed low-voltage differential signals (LVDS) and a full-balanced differential LC-VCO. Each VCSEL driver and receiver has individual input and bias voltage adjustments. Each UTSi chip is mounted on different printed circuit boards (PCBs) which have holes with about 1 mm radius for optical output and input paths through the sapphire substrate. We discuss preliminary testing of these chips.

  13. Estimate the thermomechanical fatigue life of two flip chip packages

    International Nuclear Information System (INIS)

    Pash, R.A.; Ullah, H.S.; Khan, M.Z.

    2005-01-01

    The continuing demand towards high density and low profile integrated circuit packaging has accelerated the development of flip chip structures as used in direct chip attach (DCA) technology, ball grid array (BOA) and chip scale package (CSP). In such structures the most widely used flip chip interconnects are solder joints. The reliability of flip chip structures largely depends on the reliability of solder joints. In this work solder joint fatigue life prediction for two chip scale packages is carried out. Elasto-plastic deformation behavior of the solder was simulated using ANSYS. Two dimensional plain strain finite element models were developed for each package to numerically compute the stress and total strain of the solder joints under temperature cycling. These stress and strain values are then used to predict the solder joint lifetime through modified Coffin Manson equation. The effect of solder joint's distance from edge of silicon die on life of the package is explored. The solder joint fatigue response is modeled for a typical temperature cycling of -60 to 140 degree C. (author)

  14. Quality wood chips - an alternative to pellets; Alternative zu Pellets. Qualischnitzel

    Energy Technology Data Exchange (ETDEWEB)

    Keel, A.

    2008-07-01

    This article takes a look at a new wood-chip product that features wood-chips that are dryer than traditional ones. The new 'quality chips' are also of a calibrated size and are supplied dust-free. Their low water content permits their use in the same areas as wood pellets, where, especially in summer, low water-content is important. The increasing use of pellets and the growing shortages of clean sawdust and shavings for their production is commented on, as is the use of forestry wastes in pellet production. The new wood-chip product is further discussed as being a direct alternative to pellets. The low 'grey energy' content for tree-felling, hacking, transport and the drying of the chips is quoted as being less than 5% of the energy in the chippings.

  15. 21 CFR 102.41 - Potato chips made from dried potatoes.

    Science.gov (United States)

    2010-04-01

    ... 21 Food and Drugs 2 2010-04-01 2010-04-01 false Potato chips made from dried potatoes. 102.41... Specific Nonstandardized Foods § 102.41 Potato chips made from dried potatoes. (a) The common or usual name of the food product that resembles and is of the same composition as potato chips, except that it is...

  16. Hardware implementation of on -chip learning using re configurable FPGAS

    International Nuclear Information System (INIS)

    Kelash, H.M.; Sorour, H.S; Mahmoud, I.I.; Zaki, M; Haggag, S.S.

    2009-01-01

    The multilayer perceptron (MLP) is a neural network model that is being widely applied in the solving of diverse problems. A supervised training is necessary before the use of the neural network.A highly popular learning algorithm called back-propagation is used to train this neural network model. Once trained, the MLP can be used to solve classification problems. An interesting method to increase the performance of the model is by using hardware implementations. The hardware can do the arithmetical operations much faster than software. In this paper, a design and implementation of the sequential mode (stochastic mode) of backpropagation algorithm with on-chip learning using field programmable gate arrays (FPGA) is presented, a pipelined adaptation of the on-line back propagation algorithm (BP) is shown.The hardware implementation of forward stage, backward stage and update weight of backpropagation algorithm is also presented. This implementation is based on a SIMD parallel architecture of the forward propagation the diagnosis of the multi-purpose research reactor of Egypt accidents is used to test the proposed system

  17. SNP typing on the NanoChip electronic microarray

    DEFF Research Database (Denmark)

    Børsting, Claus; Sanchez Sanchez, Juan Jose; Morling, Niels

    2005-01-01

    We describe a single nucleotide polymorphism (SNP) typing protocol developed for the NanoChip electronic microarray. The NanoChip array consists of 100 electrodes covered by a thin hydrogel layer containing streptavidin. An electric currency can be applied to one, several, or all electrodes...

  18. Hybridization of Environmental Microbial Community Nucleic Acids by GeoChip.

    Science.gov (United States)

    Van Nostrand, Joy D; Yin, Huaqin; Wu, Liyou; Yuan, Tong; Zhou, Jizhong

    2016-01-01

    Functional gene arrays, like the GeoChip, allow for the study of tens of thousands of genes in a single assay. The GeoChip array (5.0) contains probes for genes involved in geochemical cycling (N, C, S, and P), metal homeostasis, stress response, organic contaminant degradation, antibiotic resistance, secondary metabolism, and virulence factors as well as genes specific for fungi, protists, and viruses. Here, we briefly describe GeoChip design strategies (gene selection and probe design) and discuss minimum quantity and quality requirements for nucleic acids. We then provide detailed protocols for amplification, labeling, and hybridization of samples to the GeoChip.

  19. Biomass energy from wood chips: Diesel fuel dependence?

    International Nuclear Information System (INIS)

    Timmons, Dave; Mejia, Cesar Viteri

    2010-01-01

    Most renewable energy sources depend to some extent on use of other, non-renewable sources. In this study we explore use of diesel fuel in producing and transporting woody biomass in the state of New Hampshire, USA. We use two methods to estimate the diesel fuel used in woody biomass production: 1) a calculation based on case studies of diesel consumption in different parts of the wood chip supply chain, and 2) to support extrapolating those results to a regional system, an econometric study of the variation of wood-chip prices with respect to diesel fuel prices. The econometric study relies on an assumption of fixed demand, then assesses variables impacting supply, with a focus on how the price of diesel fuel affects price of biomass supplied. The two methods yield similar results. The econometric study, representing overall regional practices, suggests that a $1.00 per liter increase in diesel fuel price is associated with a $5.59 per Mg increase in the price of wood chips. On an energy basis, the diesel fuel used directly in wood chip production and transportation appears to account for less than 2% of the potential energy in the wood chips. Thus, the dependence of woody biomass energy production on diesel fuel does not appear to be extreme. (author)

  20. A system-level multiprocessor system-on-chip modeling framework

    DEFF Research Database (Denmark)

    Virk, Kashif Munir; Madsen, Jan

    2004-01-01

    We present a system-level modeling framework to model system-on-chips (SoC) consisting of heterogeneous multiprocessors and network-on-chip communication structures in order to enable the developers of today's SoC designs to take advantage of the flexibility and scalability of network-on-chip and...... SoC design. We show how a hand-held multimedia terminal, consisting of JPEG, MP3 and GSM applications, can be modeled as a multiprocessor SoC in our framework....

  1. Optically Programmable Field Programmable Gate Arrays (FPGA) Systems

    National Research Council Canada - National Science Library

    Mumbru, Jose

    2004-01-01

    ... holograms for these modules. The first chapter makes the case that a direct interface between an optical memory and a chip integrating detectors and logic circuitry can better utilize the high parallelism inherent in holographic modules...

  2. Highly Sensitive and Selective Sensor Chips with Graphene-Oxide Linking Layer

    DEFF Research Database (Denmark)

    Stebunov, Yury V.; Aftenieva, Olga A.; Arsenin, Aleksey V.

    2015-01-01

    sensor chip for SPR biosensors based on graphene-oxide linking layers. The biosensing assay model was based on a graphene oxide film containing streptavidin. The proposed sensor chip has three times higher sensitivity than the carboxymethylated dextran surface of a commercial sensor chip. Moreover...

  3. Medicaid CHIP ESPC Database

    Data.gov (United States)

    U.S. Department of Health & Human Services — The Environmental Scanning and Program Characteristic (ESPC) Database is in a Microsoft (MS) Access format and contains Medicaid and CHIP data, for the 50 states and...

  4. Programme

    OpenAIRE

    Hobday, E, fl. 1905, artist

    2003-01-01

    A photograph of an illustrated programme listing dances. The illustration shows a snake charmer playing to a snake while another man watches. Buildings and trees can be seen behind a wall in the distance. In the lower right-hand corner of the programme is the signature 'E. Hobday'. The programme is almost certainly related to the Punjab Ball, Lahore. It is placed next to the Punjab Ball Menu in the album and the Menu is also illustrated by 'E. Hobday'.

  5. Integration of microelectronic chips in microfluidic systems on printed circuit board

    International Nuclear Information System (INIS)

    Burdallo, I; Jimenez-Jorquera, C; Fernández-Sánchez, C; Baldi, A

    2012-01-01

    A new scheme for the integration of small semiconductor transducer chips with microfluidic structures on printed circuit board (PCB) is presented. The proposed approach is based on a packaging technique that yields a large and flat area with small and shallow (∼44 µm deep) openings over the chips. The photocurable encapsulant material used, based on a diacrylate bisphenol A polymer, enables irreversible bonding of polydimethylsiloxane microfluidic structures at moderate temperatures (80 °C). This integration scheme enables the insertion of transducer chips in microfluidic systems with a lower added volume than previous schemes. Leakage tests have shown that the bonded structures withstand more than 360 kPa of pressure. A prototype microfluidic system with two detection chips, including one inter-digitated electrode (IDE) chip for conductivity and one ion selective field effect transistor (ISFET) chip for pH, has been implemented and characterized. Good electrical insulation of the chip contacts and silicon edge surfaces from the solution in the microchannels has been achieved. This integration procedure opens the door to the low-cost fabrication of complex analytical microsystems that combine the extraordinary potential of both the microfluidics and silicon microtechnology fields. (paper)

  6. Integrated sample-to-detection chip for nucleic acid test assays.

    Science.gov (United States)

    Prakash, R; Pabbaraju, K; Wong, S; Tellier, R; Kaler, K V I S

    2016-06-01

    Nucleic acid based diagnostic techniques are routinely used for the detection of infectious agents. Most of these assays rely on nucleic acid extraction platforms for the extraction and purification of nucleic acids and a separate real-time PCR platform for quantitative nucleic acid amplification tests (NATs). Several microfluidic lab on chip (LOC) technologies have been developed, where mechanical and chemical methods are used for the extraction and purification of nucleic acids. Microfluidic technologies have also been effectively utilized for chip based real-time PCR assays. However, there are few examples of microfluidic systems which have successfully integrated these two key processes. In this study, we have implemented an electro-actuation based LOC micro-device that leverages multi-frequency actuation of samples and reagents droplets for chip based nucleic acid extraction and real-time, reverse transcription (RT) PCR (qRT-PCR) amplification from clinical samples. Our prototype micro-device combines chemical lysis with electric field assisted isolation of nucleic acid in a four channel parallel processing scheme. Furthermore, a four channel parallel qRT-PCR amplification and detection assay is integrated to deliver the sample-to-detection NAT chip. The NAT chip combines dielectrophoresis and electrostatic/electrowetting actuation methods with resistive micro-heaters and temperature sensors to perform chip based integrated NATs. The two chip modules have been validated using different panels of clinical samples and their performance compared with standard platforms. This study has established that our integrated NAT chip system has a sensitivity and specificity comparable to that of the standard platforms while providing up to 10 fold reduction in sample/reagent volumes.

  7. Power and Thermal Management of System-on-Chip

    DEFF Research Database (Denmark)

    Liu, Wei

    , are necessary at the chip design level. In this work, we investigate the power and thermal management of System-on- Chips (SoCs). Thermal analysis is performed in a SPICE simulation approach based on the electrical-thermal analogy. We investigate the impact of inter- connects on heat distribution...

  8. Microfluidic Platform for the Long-Term On-Chip Cultivation of Mammalian Cells for Lab-On-A-Chip Applications.

    Science.gov (United States)

    Bunge, Frank; Driesche, Sander van den; Vellekoop, Michael J

    2017-07-10

    Lab-on-a-Chip (LoC) applications for the long-term analysis of mammalian cells are still very rare due to the lack of convenient cell cultivation devices. The difficulties are the integration of suitable supply structures, the need of expensive equipment like an incubator and sophisticated pumps as well as the choice of material. The presented device is made out of hard, but non-cytotoxic materials (silicon and glass) and contains two vertical arranged membranes out of hydrogel. The porous membranes are used to separate the culture chamber from two supply channels for gases and nutrients. The cells are fed continuously by diffusion through the membranes without the need of an incubator and low requirements on the supply of medium to the assembly. The diffusion of oxygen is modelled in order to find the optimal dimensions of the chamber. The chip is connected via 3D-printed holders to the macroscopic world. The holders are coated with Parlyene C to ensure that only biocompatible materials are in contact with the culture medium. The experiments with MDCK-cells show the successful seeding inside the chip, culturing and passaging. Consequently, the presented platform is a step towards Lab-on-a-Chip applications that require long-term cultivation of mammalian cells.

  9. Industry trends in chip storage and handling

    Science.gov (United States)

    Tim McDonald; Alastair Twaddle

    2000-01-01

    A survey was conducted of US pulp and paper mills to characterize chip pile management trends. The survey was developed by members of the TAPPI Fiber Raw Material Supply Committee and mailed out in December of 1999. There were a total of 80 respondents to the survey. A typical mill was foudn to maintain one sofhvood and one hardwood chip pile, with maximum inventory of...

  10. Development of control system for multi-converter high voltage power supply using programmable SoC

    International Nuclear Information System (INIS)

    Dave, Rasesh; Singh, N.P.; Thakar, Aruna; Dhola, Hitesh; Gajjar, Sandip; Parmar, Darshan Kumar; Baruah, Ujjwal Kumar; Dharangutti, Jagruti; Zaveri, Tanish

    2015-01-01

    Multi-converter based High Voltage Power Supplies (HVPSs) find application in multi-megawatt accelerators, RF systems. Control system for HVPS must be a combination of superior parallel processing, real time performance, fast computation and versatile connectivity. The hardware platform is expected to be robust, easily scalable for future developments without any cost overhead. Typical HVPS control mechanism involves communication, generation of precise control signals/pulses for few hundred Nos of chopper and closed loop control in microsecond range for regulated output. Such kind of requirements can be met with Zynq All Programmable SoC, which is a combination of Dual core ARM Cortex A-9 Processing System (PS) and Xilinx 7 series FPGA based Programmable Logic (PL). Deterministic functions of power supply control system such as generation of control signals with precise inter-channel delay of nanosecond range and communication with individual chopper at 100kbps can be implemented on PL. PS should implement corrective tasks based on field feedback received from individual chopper, user interface and OS management that allows to take full advantage of system capabilities. PS and PL are connected with on-chip AXI-4 interface with low latency and higher bandwidth through 9 AXI ports. Typically PS boots first, this ensures secure booting and prevents external environment from tampering PL. This paper describes development of control system on Zynq All Programmable SoC for HVPS. (author)

  11. Decapsulation Method for Flip Chips with Ceramics in Microelectronic Packaging

    Science.gov (United States)

    Shih, T. I.; Duh, J. G.

    2008-06-01

    The decapsulation of flip chips bonded to ceramic substrates is a challenging task in the packaging industry owing to the vulnerability of the chip surface during the process. In conventional methods, such as manual grinding and polishing, the solder bumps are easily damaged during the removal of underfill, and the thin chip may even be crushed due to mechanical stress. An efficient and reliable decapsulation method consisting of thermal and chemical processes was developed in this study. The surface quality of chips after solder removal is satisfactory for the existing solder rework procedure as well as for die-level failure analysis. The innovative processes included heat-sink and ceramic substrate removal, solder bump separation, and solder residue cleaning from the chip surface. In the last stage, particular temperatures were selected for the removal of eutectic Pb-Sn, high-lead, and lead-free solders considering their respective melting points.

  12. Transportable GPU (General Processor Units) chip set technology for standard computer architectures

    Science.gov (United States)

    Fosdick, R. E.; Denison, H. C.

    1982-11-01

    The USAFR-developed GPU Chip Set has been utilized by Tracor to implement both USAF and Navy Standard 16-Bit Airborne Computer Architectures. Both configurations are currently being delivered into DOD full-scale development programs. Leadless Hermetic Chip Carrier packaging has facilitated implementation of both architectures on single 41/2 x 5 substrates. The CMOS and CMOS/SOS implementations of the GPU Chip Set have allowed both CPU implementations to use less than 3 watts of power each. Recent efforts by Tracor for USAF have included the definition of a next-generation GPU Chip Set that will retain the application-proven architecture of the current chip set while offering the added cost advantages of transportability across ISO-CMOS and CMOS/SOS processes and across numerous semiconductor manufacturers using a newly-defined set of common design rules. The Enhanced GPU Chip Set will increase speed by an approximate factor of 3 while significantly reducing chip counts and costs of standard CPU implementations.

  13. Optic nerve signals in a neuromorphic chip II: Testing and results.

    Science.gov (United States)

    Zaghloul, Kareem A; Boahen, Kwabena

    2004-04-01

    Seeking to match the brain's computational efficiency, we draw inspiration from its neural circuits. To model the four main output (ganglion) cell types found in the retina, we morphed outer and inner retina circuits into a 96 x 60-photoreceptor, 3.5 x 3.3 mm2, 0.35 microm-CMOS chip. Our retinomorphic chip produces spike trains for 3600 ganglion cells (GCs), and consumes 62.7 mW at 45 spikes/s/GC. This chip, which is the first silicon retina to successfully model inner retina circuitry, approaches the spatial density of the retina. We present experimental measurements showing that the chip's subthreshold current-mode circuits realize luminance adaptation, bandpass spatiotemporal filtering, temporal adaptation and contrast gain control. The four different GC outputs produced by our chip encode light onset or offset in a sustained or transient fashion, producing a quadrature-like representation. The retinomorphic chip's circuit design is described in a companion paper [Zaghloul and Boahen (2004)].

  14. Route to one-step microstructure mold fabrication for PDMS microfluidic chip

    Science.gov (United States)

    Lv, Xiaoqing; Geng, Zhaoxin; Fan, Zhiyuan; Wang, Shicai; Su, Yue; Fang, Weihao; Pei, Weihua; Chen, Hongda

    2018-04-01

    The microstructure mold fabrication for PDMS microfluidic chip remains complex and time-consuming process requiring special equipment and protocols: photolithography and etching. Thus, a rapid and cost-effective method is highly needed. Comparing with the traditional microfluidic chip fabricating process based on the micro-electromechanical system (MEMS), this method is simple and easy to implement, and the whole fabrication process only requires 1-2 h. Different size of microstructure from 100 to 1000 μm was fabricated, and used to culture four kinds of breast cancer cell lines. Cell viability and morphology was assessed when they were cultured in the micro straight channels, micro square holes and the bonding PDMS-glass microfluidic chip. The experimental results indicate that the microfluidic chip is good and meet the experimental requirements. This method can greatly reduce the process time and cost of the microfluidic chip, and provide a simple and effective way for the structure design and in the field of biological microfabrications and microfluidic chips.

  15. Chip-scale white flip-chip light-emitting diode containing indium phosphide/zinc selenide quantum dots

    Science.gov (United States)

    Fan, Bingfeng; Yan, Linchao; Lao, Yuqin; Ma, Yanfei; Chen, Zimin; Ma, Xuejin; Zhuo, Yi; Pei, Yanli; Wang, Gang

    2017-08-01

    A method for preparing a quantum dot (QD)-white light-emitting diode (WLED) is reported. Holes were etched in the SiO2 layer deposited on the sapphire substrate of the flip-chip LED by inductively coupled plasma, and these holes were then filled with QDs. An ultraviolet-curable resin was then spin-coated on top of the QD-containing SiO2 layer, and the resin was cured to act as a protecting layer. The reflective sidewall structure minimized sidelight leakage. The fabrication of the QD-WLED is simple in preparation and compatible with traditional LED processes, which was the minimum size of the WLED chip-scale integrated package. InP/ZnS core-shell QDs were used as the converter in the WLED. A blue light-emitting diode with a flip-chip structure was used as the excitation source. The QD-WLED exhibited color temperatures from 5900 to 6400 K and Commission Internationale De L'Elcairage color coordinates from (0.315, 0.325) to (0.325, 0.317), under drive currents from 100 to 400 mA. The QD-WLED exhibited stable optoelectronic properties.

  16. Crispv programme

    International Nuclear Information System (INIS)

    Marinkovicj, N.

    CRISPV (Criticality and Spectrum code) is a multigroup neutron spectrum code for homogeneous reactor cores and is actually a somewhat modified version of the original CRISP programme. It is a combination of DATAPREP-II and BIGG-II programmes. It is assumed that the reactor cell is a cylindrical fuel rod in the light or heavy water moderator. DATEPREP-II CODE forms the multigroup data for homogeneous reactor and prepares the input parameters for the BIGG-II code. It has its own nuclear data library on a separate tape in binary mode. BIGG-II code is a multigroup neutron spectrum and criticality code for a homogenized medium. It has as well its own separate data library. In the CRISPV programme the overlay structure enables automatic handling of data calculated in the DATAPREP-II programme and needed in the BIGG-II core. Both programmes are written in FORTRAN for CDC 3600. Using the programme is very efficient and simple

  17. Automating dChip: toward reproducible sharing of microarray data analysis

    Directory of Open Access Journals (Sweden)

    Li Cheng

    2008-05-01

    Full Text Available Abstract Background During the past decade, many software packages have been developed for analysis and visualization of various types of microarrays. We have developed and maintained the widely used dChip as a microarray analysis software package accessible to both biologist and data analysts. However, challenges arise when dChip users want to analyze large number of arrays automatically and share data analysis procedures and parameters. Improvement is also needed when the dChip user support team tries to identify the causes of reported analysis errors or bugs from users. Results We report here implementation and application of the dChip automation module. Through this module, dChip automation files can be created to include menu steps, parameters, and data viewpoints to run automatically. A data-packaging function allows convenient transfer from one user to another of the dChip software, microarray data, and analysis procedures, so that the second user can reproduce the entire analysis session of the first user. An analysis report file can also be generated during an automated run, including analysis logs, user comments, and viewpoint screenshots. Conclusion The dChip automation module is a step toward reproducible research, and it can prompt a more convenient and reproducible mechanism for sharing microarray software, data, and analysis procedures and results. Automation data packages can also be used as publication supplements. Similar automation mechanisms could be valuable to the research community if implemented in other genomics and bioinformatics software packages.

  18. National programme: Finland

    International Nuclear Information System (INIS)

    Forsten, J.

    1986-01-01

    Finland's programmes in the field of reactor pressure components are presented in this paper. The following information on each of these programmes is given: the brief description of the programme; the programme's schedule and duration; the name of the project manager

  19. Production of conjugated linoleic acid-rich potato chips.

    Science.gov (United States)

    Jain, Vishal P; Proctor, Andrew

    2007-01-01

    Conjugated linoleic acid (CLA) is found primarily in diary and beef products, but the health benefits of CLA can only be realized if they are consumed at much greater levels than a normal healthy dietary intake. We have recently shown that a CLA-rich soy oil can be produced by simple isomerization of linoleic acid in soy oil by photoirradiation. This oil may allow greatly increased dietary CLA without significantly elevating fat intake. The objective of this study was to prepare CLA-rich potato chips by frying in CLA-rich soy oil. Soy oil was photoisomerized in the presence of iodine catalyst with UV/visible light. The irradiated oil was clay processed to remove the residual iodine and this oil was then used to fry potato chips. Oil was extracted from fried chips and analyzed for its CLA content with gas chromatography. A 1-oz serving of CLA-rich potato chips contained approximately 2.4 g CLA as compared to 0.1 g CLA in 3-oz serving of steak fillet and 0.06 g CLA in 8-oz serving of whole milk. The peroxide value of the oil extracted from potato chips was found to be 1 meq/1000 g sample, which was within the acceptable commercial standards. This study may lead to the commercialization of CLA-rich food products.

  20. Photonics-on-a-chip: recent advances in integrated waveguides as enabling detection elements for real-world, lab-on-a-chip biosensing applications.

    Science.gov (United States)

    Washburn, Adam L; Bailey, Ryan C

    2011-01-21

    By leveraging advances in semiconductor microfabrication technologies, chip-integrated optical biosensors are poised to make an impact as scalable and multiplexable bioanalytical measurement tools for lab-on-a-chip applications. In particular, waveguide-based optical sensing technology appears to be exceptionally amenable to chip integration and miniaturization, and, as a result, the recent literature is replete with examples of chip-integrated waveguide sensing platforms developed to address a wide range of contemporary analytical challenges. As an overview of the most recent advances within this dynamic field, this review highlights work from the last 2-3 years in the areas of grating-coupled, interferometric, photonic crystal, and microresonator waveguide sensors. With a focus towards device integration, particular emphasis is placed on demonstrations of biosensing using these technologies within microfluidically controlled environments. In addition, examples of multiplexed detection and sensing within complex matrices--important features for real-world applicability--are given special attention.

  1. Solving wood chip transport problems with computer simulation.

    Science.gov (United States)

    Dennis P. Bradley; Sharon A. Winsauer

    1976-01-01

    Efficient chip transport operations are difficult to achieve due to frequent and often unpredictable changes in distance to market, chipping rate, time spent at the mill, and equipment costs. This paper describes a computer simulation model that allows a logger to design an efficient transport system in response to these changing factors.

  2. Progress on TSV technology for Medipix3RX chip

    Science.gov (United States)

    Sarajlić, M.; Pennicard, D.; Smoljanin, S.; Fritzsch, T.; Zoschke, K.; Graafsma, H.

    2017-12-01

    The progress of Through Silicon Via (TSV) technology for Medipix3RX chip done at DESY is presented here. The goal of this development is to replace the wire bonds in X-ray detectors with TSVs, in order to reduce the dead area between detectors. We obtained the first working chips assembled together with Si based sensors for X-ray detection. The 3D integration technology, including TSV, Re-distribution layer deposition, bump bonding to the Si sensor and bump bonding to the carrier PCB, was done by Fraunhofer Institute IZM in Berlin. After assembly, the module was successfully tested by recording background radiation and making X-ray images of small objects. The active area of the Medipix3RX chip is 14.1 mm×14.1 mm or 256×256 pixels. During TSV processing, the Medipix3RX chip was thinned from 775 μm original thickness, to 130 μm. The diameter of the vias is 40 μm, and the pitch between the vias is 120 μm. A liner filling approach was used to contact the TSV with the RDL on the backside of the Medipix3RX readout chip.

  3. Hardware support for CSP on a Java chip multiprocessor

    DEFF Research Database (Denmark)

    Gruian, Flavius; Schoeberl, Martin

    2013-01-01

    Due to memory bandwidth limitations, chip multiprocessors (CMPs) adopting the convenient shared memory model for their main memory architecture scale poorly. On-chip core-to-core communication is a solution to this problem, that can lead to further performance increase for a number of multithreaded...... applications. Programmatically, the Communicating Sequential Processes (CSPs) paradigm provides a sound computational model for such an architecture with message based communication. In this paper we explore hardware support for CSP in the context of an embedded Java CMP. The hardware support for CSP are on......-chip communication channels, implemented by a ring-based network-on-chip (NoC), to reduce the memory bandwidth pressure on the shared memory.The presented solution is scalable and also specific for our limited resources and real-time predictability requirements. CMP architectures of three to eight processors were...

  4. Programmable pulse sequence generator with multiple output lines

    Science.gov (United States)

    Drabczyk, Hubert

    2006-10-01

    This paper presents a novel concept of pulse sequence generator and its prototype as an electronic circuit testing laboratory tool. The generator has multiple output lines and is capable of using control data defining different pulse sequences to be given to the outputs. It is also possible to use different voltage levels in output signal and switch output lines for reading data from driven system. The pulse sequence generator can be used for runtime environment simulation, as hardware tester or auxiliary tool in new designs. Important design factors were to keep cost of the tool low and allow integration with other projects by using flexible architecture. The prototype was based on universal programmer with adjustable power supply, '51 microcontroller and Altera Cyclone chip. The generator communicates witch PC computer via RS232 port. Dedicated software was developed in the course of this project, to control the tool and data transmission. The prototype confirmed the possibility to create an inexpensive multipurpose laboratory tool for programming, testing and simulation of digital devices.

  5. Identifying Professional Competencies of the Flip-Chip Packaging Engineer in Taiwan

    Science.gov (United States)

    Guu, Y. H.; Lin, Kuen-Yi; Lee, Lung-Sheng

    2014-01-01

    This study employed a literature review, expert interviews, and a questionnaire survey to construct a set of two-tier competencies for a flip-chip packaging engineer. The fuzzy Delphi questionnaire was sent to 12 flip-chip engineering experts to identify professional competencies that a flip-chip packaging engineer must have. Four competencies,…

  6. MCMII and the TriP chip

    Energy Technology Data Exchange (ETDEWEB)

    Juan Estrada et al.

    2003-12-19

    We describe the development of the electronics that will be used to read out the Fiber Tracker and Preshower detectors in Run IIb. This electronics is needed for operation at 132ns bunch crossing, and may provide a measurement of the z coordinate of the Fiber Tracker hits when operating at 396ns bunch crossing. Specifically, we describe the design and preliminary tests of the Trip chip, MCM IIa, MCM IIb and MCM IIc. This document also serves as a user manual for the Trip chip and the MCM.

  7. Consumption study and identification of methyl salicylate in spicy cassava chips

    International Nuclear Information System (INIS)

    Nirjana, Marlene; Anggadiredja, Kusnandar; Damayanti, Sophi

    2015-01-01

    Spicy cassava chips is a popular snack. However, some news in electronic media reported addition of balsam which is a banned food additives in that product to give extra spicy flavor. This study aimed to determine ITB students’ pattern of consumption, health problems caused by spicy chips consumption, and knowledge about illicit use of food additives in that product, and identify the main content of balsam namely methyl salicylate in 10 samples of spicy cassava chips taken from inside and outside about ITB campus. A total of 300 questionnaires distributed to ITB students then data processing was performed. Spicy cassava chips sample macerated in 50 mL of methanol for 24 hours at room temperature, filtered and analyzed using gas chromatography capillary column with OV-1, nitrogen carrier gas and flame ionization detector. Based on questionnaires, 292 (97%) of 300 respondents had consumed spicy chips. A total of 247 (85%) from 292 respondents spicy chips consumed less than 3 times a week. A total of 195 respondents (67%) had experienced health problems after eating spicy chips. There were 137 (47%) of the 292 respondents who knew about the illicit addition of food additives into spicy chips; only 35 respondents (12%) who knew about balsam’s addition. There were 126 respondents (43%) who did not pay attention to their health because they will keep eating spicy chips despite the addition of banned food additives. Through the verification of the standard addition method in gas chromatography system with a hydrogen pressure of 1.5 bar, injector temperature 200 °C, detector temperature 230 °C, oven temperature 60 °C for 2 minutes and then increased to 230 °C with rate 6 °C/menit; linearity, limit of detection, limit of quantitation, accuracy, precision, and specificity parameters met the acceptance limits. From 10 spicy cassava chips samples which were analyzed, they did not reveal any content of methyl salicylate. Methyl salicylate contained in the positive

  8. Consumption study and identification of methyl salicylate in spicy cassava chips

    Energy Technology Data Exchange (ETDEWEB)

    Nirjana, Marlene, E-mail: marlenenirjana@gmail.com; Anggadiredja, Kusnandar; Damayanti, Sophi [School of Pharmacy, Institut Teknologi Bandung Jalan Ganesha 10, Bandung 40132 (Indonesia)

    2015-09-30

    Spicy cassava chips is a popular snack. However, some news in electronic media reported addition of balsam which is a banned food additives in that product to give extra spicy flavor. This study aimed to determine ITB students’ pattern of consumption, health problems caused by spicy chips consumption, and knowledge about illicit use of food additives in that product, and identify the main content of balsam namely methyl salicylate in 10 samples of spicy cassava chips taken from inside and outside about ITB campus. A total of 300 questionnaires distributed to ITB students then data processing was performed. Spicy cassava chips sample macerated in 50 mL of methanol for 24 hours at room temperature, filtered and analyzed using gas chromatography capillary column with OV-1, nitrogen carrier gas and flame ionization detector. Based on questionnaires, 292 (97%) of 300 respondents had consumed spicy chips. A total of 247 (85%) from 292 respondents spicy chips consumed less than 3 times a week. A total of 195 respondents (67%) had experienced health problems after eating spicy chips. There were 137 (47%) of the 292 respondents who knew about the illicit addition of food additives into spicy chips; only 35 respondents (12%) who knew about balsam’s addition. There were 126 respondents (43%) who did not pay attention to their health because they will keep eating spicy chips despite the addition of banned food additives. Through the verification of the standard addition method in gas chromatography system with a hydrogen pressure of 1.5 bar, injector temperature 200 °C, detector temperature 230 °C, oven temperature 60 °C for 2 minutes and then increased to 230 °C with rate 6 °C/menit; linearity, limit of detection, limit of quantitation, accuracy, precision, and specificity parameters met the acceptance limits. From 10 spicy cassava chips samples which were analyzed, they did not reveal any content of methyl salicylate. Methyl salicylate contained in the positive

  9. Organ-Tumor-on-a-Chip for Chemosensitivity Assay: A Critical Review

    Directory of Open Access Journals (Sweden)

    Navid Kashaninejad

    2016-07-01

    Full Text Available With a mortality rate over 580,000 per year, cancer is still one of the leading causes of death worldwide. However, the emerging field of microfluidics can potentially shed light on this puzzling disease. Unique characteristics of microfluidic chips (also known as micro-total analysis system make them excellent candidates for biological applications. The ex vivo approach of tumor-on-a-chip is becoming an indispensable part of personalized medicine and can replace in vivo animal testing as well as conventional in vitro methods. In tumor-on-a-chip, the complex three-dimensional (3D nature of malignant tumor is co-cultured on a microfluidic chip and high throughput screening tools to evaluate the efficacy of anticancer drugs are integrated on the same chip. In this article, we critically review the cutting edge advances in this field and mainly categorize each tumor-on-a-chip work based on its primary organ. Specifically, design, fabrication and characterization of tumor microenvironment; cell culture technique; transferring mechanism of cultured cells into the microchip; concentration gradient generators for drug delivery; in vitro screening assays of drug efficacy; and pros and cons of each microfluidic platform used in the recent literature will be discussed separately for the tumor of following organs: (1 Lung; (2 Bone marrow; (3 Brain; (4 Breast; (5 Urinary system (kidney, bladder and prostate; (6 Intestine; and (7 Liver. By comparing these microchips, we intend to demonstrate the unique design considerations of each tumor-on-a-chip based on primary organ, e.g., how microfluidic platform of lung-tumor-on-a-chip may differ from liver-tumor-on-a-chip. In addition, the importance of heart–liver–intestine co-culture with microvasculature in tumor-on-a-chip devices for in vitro chemosensitivity assay will be discussed. Such system would be able to completely evaluate the absorption, distribution, metabolism, excretion and toxicity (ADMET of

  10. Consumption study and identification of methyl salicylate in spicy cassava chips

    Science.gov (United States)

    Nirjana, Marlene; Anggadiredja, Kusnandar; Damayanti, Sophi

    2015-09-01

    Spicy cassava chips is a popular snack. However, some news in electronic media reported addition of balsam which is a banned food additives in that product to give extra spicy flavor. This study aimed to determine ITB students' pattern of consumption, health problems caused by spicy chips consumption, and knowledge about illicit use of food additives in that product, and identify the main content of balsam namely methyl salicylate in 10 samples of spicy cassava chips taken from inside and outside about ITB campus. A total of 300 questionnaires distributed to ITB students then data processing was performed. Spicy cassava chips sample macerated in 50 mL of methanol for 24 hours at room temperature, filtered and analyzed using gas chromatography capillary column with OV-1, nitrogen carrier gas and flame ionization detector. Based on questionnaires, 292 (97%) of 300 respondents had consumed spicy chips. A total of 247 (85%) from 292 respondents spicy chips consumed less than 3 times a week. A total of 195 respondents (67%) had experienced health problems after eating spicy chips. There were 137 (47%) of the 292 respondents who knew about the illicit addition of food additives into spicy chips; only 35 respondents (12%) who knew about balsam's addition. There were 126 respondents (43%) who did not pay attention to their health because they will keep eating spicy chips despite the addition of banned food additives. Through the verification of the standard addition method in gas chromatography system with a hydrogen pressure of 1.5 bar, injector temperature 200 °C, detector temperature 230 °C, oven temperature 60 °C for 2 minutes and then increased to 230 °C with rate 6 °C/menit; linearity, limit of detection, limit of quantitation, accuracy, precision, and specificity parameters met the acceptance limits. From 10 spicy cassava chips samples which were analyzed, they did not reveal any content of methyl salicylate. Methyl salicylate contained in the positive control

  11. MOISTURE HUMIDITY EQUILIBRIUM OF WOOD CHIPS FROM ENERGETIC CROPS

    Directory of Open Access Journals (Sweden)

    Jan Barwicki

    2008-09-01

    Full Text Available Processes occurring during storage of wood chips for energetic or furniture industry purposes were presented. As a result of carried out investigations, dependences of temperature and relative humidity changes of surrounding air were shown. Modified Henderson equation can be utilized for computer simulation of storing and drying processes concerning wood chips for energetic and furniture industry purposes. It reflects also obtained results from experiments carried out with above mentioned material. Using computer simulation program we can examine different wood chips storing conditions to avoid overheating and loss problems.

  12. Low-Cost Chemical-Responsive Adhesive Sensing Chips.

    Science.gov (United States)

    Tan, Weirui; Zhang, Liyuan; Shen, Wei

    2017-12-06

    Chemical-responsive adhesive sensing chip is a new low-cost analytical platform that uses adhesive tape loaded with indicator reagents to detect or quantify the target analytes by directly sticking the tape to the samples of interest. The chemical-responsive adhesive sensing chips can be used with paper to analyze aqueous samples; they can also be used to detect and quantify solid, particulate, and powder analytes. The colorimetric indicators become immediately visible as the contact between the functionalized adhesives and target samples is made. The chemical-responsive adhesive sensing chip expands the capability of paper-based analytical devices to analyze solid, particulate, or powder materials via one-step operation. It is also a simpler alternative way, to the covalent chemical modification of paper, to eliminate indicator leaching from the dipstick-style paper sensors. Chemical-responsive adhesive chips can display analytical results in the form of colorimetric dot patterns, symbols, and texts, enabling clear understanding of assay results by even nonprofessional users. In this work, we demonstrate the analyses of heavy metal salts in silica powder matrix, heavy metal ions in water, and bovine serum albumin in an aqueous solution. The detection is one-step, specific, sensitive, and easy-to-operate.

  13. Lab-on-a-Chip Based Protein Crystallization

    Science.gov (United States)

    vanderWoerd, Mark J.; Brasseur, Michael M.; Spearing, Scott F.; Whitaker, Ann F. (Technical Monitor)

    2001-01-01

    We are developing a novel technique with which we will grow protein crystals in very small volumes, utilizing chip-based, microfluidic ("LabChip") technology. This development, which is a collaborative effort between NASA's Marshall Space Flight Center and Caliper Technologies Corporation, promises a breakthrough in the field of protein crystal growth. Our initial results obtained from two model proteins, Lysozyme and Thaumatin, show that it is feasible to dispense and adequately mix protein and precipitant solutions on a nano-liter scale. The mixtures have shown crystal growth in volumes in the range of 10 nanoliters to 5 microliters. In addition, large diffraction quality crystals were obtained by this method. X-ray data from these crystals were shown to be of excellent quality. Our future efforts will include the further development of protein crystal growth with LabChip(trademark) technology for more complex systems. We will initially address the batch growth method, followed by the vapor diffusion method and the liquid-liquid diffusion method. The culmination of these chip developments is to lead to an on orbit protein crystallization facility on the International Space Station. Structural biologists will be invited to utilize the on orbit Iterative Biological Crystallization facility to grow high quality macromolecular crystals in microgravity.

  14. Atom chips: mesoscopic physics with cold atoms

    International Nuclear Information System (INIS)

    Krueger, P.; Wildermuth, S.; Hofferberth, S.; Haller, E.; GAllego Garcia, D.; Schmiedmayer, J.

    2005-01-01

    Full text: Cold neutral atoms can be controlled and manipulated in microscopic potentials near surfaces of atom chips. These integrated micro-devices combine the known techniques of atom optics with the capabilities of well established micro- and nanofabrication technology. In analogy to electronic microchips and integrated fiber optics, the concept of atom chips is suitable to explore the domain of mesoscopic physics with matter waves. We use current and charge carrying structures to form complex potentials with high spatial resolution only microns from the surface. In particular, atoms can be confined to an essentially one-dimensional motion. In this talk, we will give an overview of our experiments studying the manipulation of both thermal atoms and BECs on atom chips. First experiments in the quasi one-dimensional regime will be presented. These experiments profit from strongly reduced residual disorder potentials caused by imperfections of the chip fabrication with respect to previously published experiments. This is due to our purely lithographic fabrication technique that proves to be advantageous over electroplating. We have used one dimensionally confined BECs as an ultra-sensitive probe to characterize these potentials. These smooth potentials allow us to explore various aspects of the physics of degenerate quantum gases in low dimensions. (author)

  15. Chips with everything

    CERN Document Server

    CERN. Geneva

    2007-01-01

    In March 1972, Sir Robin Saxby gave a talk to the Royal Television Society called 'TV and Chips' about a 'state of the art' integrated circuit, containing 50 resistors and 50 transistors. Today's 'state of the art' chips contain up to a billion transistors. This enormous leap forward illustrates how dramatically the semiconductor industry has evolved in the past 34 years. The next 10 years are predicted to bring times of turbulent change for the industry, as more and more digital devices are used around the world. In this talk, Sir Robin will discuss the history of the Microchip Industry in parallel with ARM's history, demonstrating how a small European start-up can become a world player in the IT sector. He will also present his vision of important applications and developments in the next 20 years that are likely to become even more pervasive than the mobile phone is today, and will provide anecdotes and learning points from his own experience at ARM. About ARM: Sir Robin and a group of designers from Acorn...

  16. Chip shape and secondary fragmentation through TBM excavation

    International Nuclear Information System (INIS)

    Tsusaka, Kimikazu; Tanimoto, Chikaosa; Ueno, Takaaki; Koizumi, Yu; Nakane, Tatsuto

    2008-01-01

    The chips through TBM tunneling are well-known for one of useful indices to reflect the geological conditions. The flat and elongated chips whose width are equal to the spacing of cutter trace indicate the cutting face with less joints and good practice of TBM excavation with less secondary fragmentation rate. Through a case history in granitic rock, the authors proposed the new index, which is the ratio of length of major axis to thickness. Also the authors studied the relationship between the index and the excavation efficiencies. In conclusion, it was clarified that chips with the new index over 3.5 were generally observed when a TBM drove with less than 30% the secondary fragmentation rate. (author)

  17. CMOS foveal image sensor chip

    Science.gov (United States)

    Bandera, Cesar (Inventor); Scott, Peter (Inventor); Sridhar, Ramalingam (Inventor); Xia, Shu (Inventor)

    2002-01-01

    A foveal image sensor integrated circuit comprising a plurality of CMOS active pixel sensors arranged both within and about a central fovea region of the chip. The pixels in the central fovea region have a smaller size than the pixels arranged in peripheral rings about the central region. A new photocharge normalization scheme and associated circuitry normalizes the output signals from the different size pixels in the array. The pixels are assembled into a multi-resolution rectilinear foveal image sensor chip using a novel access scheme to reduce the number of analog RAM cells needed. Localized spatial resolution declines monotonically with offset from the imager's optical axis, analogous to biological foveal vision.

  18. Study of silicon chip soldering in high-power transistor housing

    Directory of Open Access Journals (Sweden)

    Vasily S. Anosov

    2017-09-01

    We experimentally assessed the effect of outer housing layer materials and back side chip metallization. For lead-silver soldering of silicon chips, the best housing is that with a nickel outer layer rather than with a gold-plated one, because the resultant thermal resistance is lower and the absence of gold makes the technology cheaper. We obtained a 0.6 K/W thermal resistance for a 24 mm2 chip area.

  19. Experiment list: SRX190193 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available rce_name=HL-60 || biomaterial_provider=ATCC || datatype=ChipSeq || datatype description=Chromatin IP Sequencing || antibody antibody...description=Mouse monoclonal to RNA polymerase II CTD repeat YSPTSPS antibody... (4H8) - ChIP Grade. Antibody Target: POL2 || antibody targetdescription=This gene encod...es the largest subunit of RNA polymerase II, the polymerase responsible for synthesizing messenger RNA in eukaryotes || antibody... vendorname=abcam || antibody vendorid=ab5408 || controlid=SL

  20. Experiment list: SRX100504 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available .1 source_name=U87 || biomaterial_provider=ATCC || datatype=ChipSeq || datatype description=Chromatin IP Sequencing || antibody antib...odydescription=Mouse monoclonal to RNA polymerase II CTD repeat YSPTSPS antibody... (4H8) - ChIP Grade. Antibody Target: POL2 || antibody targetdescription=This gene e...ncodes the largest subunit of RNA polymerase II, the polymerase responsible for synthesizing messenger RNA in eukaryotes || antibody... vendorname=abcam || antibody vendorid=ab5408 || controli

  1. Experiment list: SRX100529 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available aterial_provider=WiCell Research Institute || datatype=ChipSeq || datatype description=Chromatin IP Sequencing || antibody antibody...description=Mouse monoclonal to RNA polymerase II CTD repeat YSPTSPS antibody... (4H8) - ChIP Grade. Antibody Target: POL2 || antibody targetdescription=This gene encode...s the largest subunit of RNA polymerase II, the polymerase responsible for synthesizing messenger RNA in eukaryotes || antibody... vendorname=abcam || antibody vendorid=ab5408 || controlid=SL9

  2. The Chip-Scale Atomic Clock - Prototype Evaluation

    Science.gov (United States)

    2007-11-01

    39th Annual Precise Time and Time Interval (PTTI) Meeting THE CHIP-SCALE ATOMIC CLOCK – PROTOTYPE EVALUATION R. Lutwak *, A. Rashed...been supported by the Defense Advanced Research Projects Agency, Contract # NBCHC020050. REFERENCES [1] R. Lutwak , D. Emmons, W. Riley, and...D.C.), pp. 539-550. [2] R. Lutwak , D. Emmons, T. English, W. Riley, A. Duwel, M. Varghese, D. K. Serkland, and G. M. Peake, 2004, “The Chip-Scale

  3. On-chip dual comb source for spectroscopy

    OpenAIRE

    Dutt, Avik; Joshi, Chaitanya; Ji, Xingchen; Cardenas, Jaime; Okawachi, Yoshitomo; Luke, Kevin; Gaeta, Alexander L.; Lipson, Michal

    2016-01-01

    Dual-comb spectroscopy is a powerful technique for real-time, broadband optical sampling of molecular spectra which requires no moving components. Recent developments with microresonator-based platforms have enabled frequency combs at the chip scale. However, the need to precisely match the resonance wavelengths of distinct high-quality-factor microcavities has hindered the development of an on-chip dual comb source. Here, we report the first simultaneous generation of two microresonator comb...

  4. Machinery for Forest Chip Production in Finland in 2007 and in the Future

    Energy Technology Data Exchange (ETDEWEB)

    Kaerhae, Kalle (Metsaeteho Oy, P.O. Box 101, FI-00171 Helsinki (Finland))

    2008-10-15

    Metsaeteho Oy's study consisted of a survey of the production machinery for forest chips used by energy plants in 2007. The major forest chip suppliers in Finland were involved in the study. In addition, the machinery and equipment stocked by the manufacturers and vendors of energy wood harvester heads, stump lifting devices, and chippers were also surveyed. The study provided also an estimate of future machinery requirements for forest chip production in Finland. The study estimated that a total of 1,100 machine and truck units were employed in the production of forest chips for energy plants in 2007. A total of 770 machine and truck units were contracted for the major forest chip suppliers in 2007. Increasing forest chip consumption will considerable increase the demand for additional forest chip production resources in the future. If the consumption of forest chips by energy plants in 2015 reaches 15 TWh, i.e. about 7.5 mill. m3, then the forest machine and truck requirement will be over 1,700 units. The corresponding machinery requirement at an energy plant with a forest chip consumption of 25 TWh (approx. 12.5 mill. m3), will be close to 2,300 machine and truck units

  5. Routing algorithms in networks-on-chip

    CERN Document Server

    Daneshtalab, Masoud

    2014-01-01

    This book provides a single-source reference to routing algorithms for Networks-on-Chip (NoCs), as well as in-depth discussions of advanced solutions applied to current and next generation, many core NoC-based Systems-on-Chip (SoCs). After a basic introduction to the NoC design paradigm and architectures, routing algorithms for NoC architectures are presented and discussed at all abstraction levels, from the algorithmic level to actual implementation.  Coverage emphasizes the role played by the routing algorithm and is organized around key problems affecting current and next generation, many-core SoCs. A selection of routing algorithms is included, specifically designed to address key issues faced by designers in the ultra-deep sub-micron (UDSM) era, including performance improvement, power, energy, and thermal issues, fault tolerance and reliability.   ·         Provides a comprehensive overview of routing algorithms for Networks-on-Chip and NoC-based, manycore systems; ·         Describe...

  6. A single chip with multiple talents

    CERN Multimedia

    Francesco Poppi

    2010-01-01

    The Medipix chips developed at CERN are being used in a variety of fields: from medicine to education and back to high-tech engineering. The scene is set for a bright future for this versatile technology.   The Medipix chip. It didn’t take long for a brilliant team of physicists and engineers who were working on pixel detectors for the LHC to realize that the technology had great potential in medical imaging. This was the birth of the Medipix project. Fifteen years later, with the collaboration of 18 research institutes, the team has produced an advanced version of the initial ideas: Medipix3 is a device that can measure very accurately the position and energy of the photons (one by one) that hit the associated detector. Radiography and computed tomography (CT) use X-ray photons to study the human body. The different energies of the photons in the beam can be thought of as the colours of the X-ray spectrum. This is why the use of Medipix3 chips in such diagnostic techniques is referred...

  7. NEPP Evaluation of Automotive Grade Tantalum Chip Capacitors

    Science.gov (United States)

    Sampson, Mike; Brusse, Jay

    2018-01-01

    Automotive grade tantalum (Ta) chip capacitors are available at lower cost with smaller physical size and higher volumetric efficiency compared to military/space grade capacitors. Designers of high reliability aerospace and military systems would like to take advantage of these attributes while maintaining the high standards for long-term reliable operation they are accustomed to when selecting military-qualified established reliability tantalum chip capacitors (e.g., MIL-PRF-55365). The objective for this evaluation was to assess the long-term performance of off-the-shelf automotive grade Ta chip capacitors (i.e., manufacturer self-qualified per AEC Q-200). Two (2) lots of case size D manganese dioxide (MnO2) cathode Ta chip capacitors from 1 manufacturer were evaluated. The evaluation consisted of construction analysis, basic electrical parameter characterization, extended long-term (2000 hours) life testing and some accelerated stress testing. Tests and acceptance criteria were based upon manufacturer datasheets and the Automotive Electronics Council's AEC Q-200 qualification specification for passive electronic components. As-received a few capacitors were marginally above the specified tolerance for capacitance and ESR. X-ray inspection found that the anodes for some devices may not be properly aligned within the molded encapsulation leaving less than 1 mil thickness of the encapsulation. This evaluation found that the long-term life performance of automotive grade Ta chip capacitors is generally within specification limits suggesting these capacitors may be suitable for some space applications.

  8. The Impact Of Surface Shape Of Chip-Breaker On Machined Surface

    Science.gov (United States)

    Šajgalík, Michal; Czán, Andrej; Martinček, Juraj; Varga, Daniel; Hemžský, Pavel; Pitela, David

    2015-12-01

    Machined surface is one of the most used indicators of workpiece quality. But machined surface is influenced by several factors such as cutting parameters, cutting material, shape of cutting tool or cutting insert, micro-structure of machined material and other known as technological parameters. By improving of these parameters, we can improve machined surface. In the machining, there is important to identify the characteristics of main product of these processes - workpiece, but also the byproduct - the chip. Size and shape of chip has impact on lifetime of cutting tools and its inappropriate form can influence the machine functionality and lifetime, too. This article deals with elimination of long chip created when machining of shaft in automotive industry and with impact of shape of chip-breaker on shape of chip in various cutting conditions based on production requirements.

  9. Research Progress of Microfluidic Chips Preparation and its Optical Element

    Directory of Open Access Journals (Sweden)

    Feng WANG

    2014-03-01

    Full Text Available Microfluidic technology is the emerging technologies in researching fluid channel and related applications in the micro and nano-scale space. Microfluidic chip is a new miniaturized rapid analysis platform by microfluidic technology, it has many characteristics such as liquid flow control, minimal reagent consumption, rapid analysis, which is widely used in physics, chemistry, biology, and engineering science and other fields, it has strong interdisciplinary. This paper mainly discusses research progress of materials used for microfluidic chips and the devices based on microfluidic technology, including microfluidic chip, microfluidic optical devices, microfluidic laser preparation, microfluidic chip applications, focusing on the quasi-molecular laser processing technology and femtosecond laser processing technology in the microfluidic devices preparation, and make development prospects for it.

  10. The Cutting Process, Chips and Cutting Forces in Machining CFRP

    DEFF Research Database (Denmark)

    Koplev, A.; Lystrup, Aage; Vorm, T.

    1983-01-01

    The cutting of unidirectional CFRP, perpendicular as well as parallel to the fibre orientation, is examined. Shaping experiments, ‘quick-stop’ experiments, and a new chip preparation technique are used for the investigation. The formation of the chips, and the quality of the machined surface...... is discussed. The cutting forces parallel and perpendicular to the cutting direction are measured for various parameters, and the results correlated to the formation of chips and the wear of the tool....

  11. Single-Chip Computers With Microelectromechanical Systems-Based Magnetic Memory

    NARCIS (Netherlands)

    Carley, L. Richard; Bain, James A.; Fedder, Gary K.; Greve, David W.; Guillou, David F.; Lu, Michael S.C.; Mukherjee, Tamal; Santhanam, Suresh; Abelmann, Leon; Min, Seungook

    This article describes an approach for implementing a complete computer system (CPU, RAM, I/O, and nonvolatile mass memory) on a single integrated-circuit substrate (a chip)—hence, the name "single-chip computer." The approach presented combines advances in the field of microelectromechanical

  12. Wood chip production technology and costs for fuel in Namibia

    Energy Technology Data Exchange (ETDEWEB)

    Leinonen, A.

    2007-12-15

    This work has been done in the project where the main target is to evaluate the technology and economy to use bush biomass for power production in Namibia. The project has been financed by the Ministry for Foreign Affairs of Finland and the Ministry of Agriculture, Water and Forestry of the Republic of Namibia. The target of this study is to calculate the production costs of bush chips at the power plant using the current production technology and to look possibilities to develop production technology in order to mechanize production technology and to decrease the production costs. The wood production costs are used in feasibility studies, in which the technology and economy of utilization of wood chips for power generation in 5, 10 and 20 MW electric power plants and for power generation in Van Eck coal fired power plant in Windhoek are evaluated. Field tests were made at Cheetah Conservation Farm (CCF) in Otjiwarongo region. CCF is producing wood chips for briquette factory in Otjiwarongo. In the field tests it has been gathered information about this CCF semi-mechanized wood chip production technology. Also new machines for bush biomass chip production have been tested. A new mechanized production chain has been designed on the basis of this information. The production costs for the CCF semi-mechanized and the new production chain have been calculated. The target in the moisture content to produce wood chips for energy is 20 w-%. In the semi-mechanized wood chip production chain the work is done partly manually, and the supply chain is organized into crews of 4.8 men. The production chain consists of manual felling and compiling, drying, chipping with mobile chipper and manual feeding and road transport by a tractor with two trailers. The CCF production chain works well. The chipping and road transport productivity in the semimechanized production chain is low. New production machines, such as chainsaw, brush cutter, lawn mover type cutter, rotator saw in skid

  13. Ultrahigh-speed hybrid laser for silicon photonic integrated chips

    DEFF Research Database (Denmark)

    Chung, Il-Sug; Park, Gyeong Cheol; Ran, Qijiang

    2013-01-01

    Increasing power consumption for electrical interconnects between and inside chips is posing a real challenge to continue the performance scaling of processors/computers as predicted by D. Moore. In recent processors, energy consumption for electrical interconnects is half of power supplied...... and will be 80% in near future. This challenge strongly has motivated replacing electrical interconnects with optical ones even in chip level communications [1]. This chip-level optical interconnects need quite different performance of optoelectronic devices than required for conventional optical communications....... For a light source, the energy consumption per sending a bit is required to be

  14. A Low Cost Single Chip VDL Compatible Transceiver ASIC

    Science.gov (United States)

    Becker, Robert

    2004-01-01

    Recent trends in commercial communications system components have focussed almost exclusively on cellular telephone technology. As many of the traditional sources of receiver components have discontinued non-cellular telephone products, the designers of avionics and other low volume radio applications find themselves increasingly unable to find highly integrated components. This is particularly true for low power, low cost applications which cannot afford the lavish current consumption of the software defined radio approach increasingly taken by certified device manufacturers. In this paper, we describe a low power transceiver chip targeting applications from low VHF to low UHF frequencies typical of avionics systems. The chip encompasses a selectable single or double conversion design for the receiver and a low power IF upconversion transmitter. All local oscillators are synthesized and integrated into the chip. An on-chip I-Q modulator and demodulator provide baseband modulation and demodulation capability allowing the use of low power, fixed point signal processing components for signal demodulation. The goal of this program is to demonstrate a low cost VDL mode-3 transceiver using this chip to receive text weather information sent using 4-slot TDMA with no support for voice. The data will be sent from an experimental ground station. This work is funded by NASA Glenn Research Center.

  15. On-chip enucleation of an oocyte by untethered microrobots

    International Nuclear Information System (INIS)

    Ichikawa, Akihiko; Sakuma, Shinya; Sugita, Masakuni; Shoda, Tatsuro; Tamakoshi, Takahiro; Arai, Fumihito; Akagi, Satoshi

    2014-01-01

    We propose a novel on-chip enucleation of an oocyte with zona pellucida by using a combination of untethered microrobots. To achieve enucleation within the closed space of a microfluidic chip, two microrobots, a microknife and a microgripper were integrated into the microfluidic chip. These microrobots were actuated by an external magnetic force produced by permanent magnets placed on the robotic stage. The tip of the microknife was designed by considering the biological geometric feature of an oocyte, i.e. the oocyte has a polar body in maturation stage II. Moreover, the microknife was fabricated by using grayscale lithography, which allows fabrication of three-dimensional microstructures. The microgripper has a gripping function that is independent of the driving mechanism. On-chip enucleation was demonstrated, and the enucleated oocytes are spherical, indicating that the cell membrane of the oocytes remained intact. To confirm successful enucleation using this method, we investigated the viability of oocytes after enucleation. The results show that the production rate, i.e. the ratio between the number of oocytes that reach the blastocyst stage and the number of bovine oocytes after nucleus transfer, is 100%. The technique will contribute to complex cell manipulation such as cell surgery in lab-on-a-chip devices. (paper)

  16. Automated, Miniaturized and Integrated Quality Control-on-Chip (QC-on-a-Chip for Advanced Cell Therapy Applications

    Directory of Open Access Journals (Sweden)

    David eWartmann

    2015-09-01

    Full Text Available The combination of microfabrication-based technologies with cell biology has laid the foundation for the development of advanced in vitro diagnostic systems capable of evaluating cell cultures under defined, reproducible and standardizable measurement conditions. In the present review we describe recent lab-on-a-chip developments for cell analysis and how these methodologies could improve standard quality control in the field of manufacturing cell-based vaccines for clinical purposes. We highlight in particular the regulatory requirements for advanced cell therapy applications using as an example dendritic cell-based cancer vaccines to describe the tangible advantages of microfluidic devices that overcome most of the challenges associated with automation, miniaturization and integration of cell-based assays. As its main advantage lab-on-a-chip technology allows for precise regulation of culturing conditions, while simultaneously monitoring cell relevant parameters using embedded sensory systems. State-of-the-art lab-on-a-chip platforms for in vitro assessment of cell cultures and their potential future applications for cell therapies and cancer immunotherapy are discussed in the present review.

  17. Experiment list: SRX190275 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available dy antibodydescription=Mouse monoclonal to RNA polymeras...e II CTD repeat YSPTSPS antibody (4H8) - ChIP Grade. Antibody Target: POL2 || antibody targetdescription=Thi...er RNA in eukaryotes || antibody vendorname=abcam || antibody vendorid=ab5408 || ...controlid=SL2339 || labexpid=SL5610,SL2353 || softwareversion=MACS || cell sex=M || antibody=Pol2-4H8 || antibody antibody...description=Mouse monoclonal to RNA polymerase II CTD repeat YSPTSPS antibody (4H8) - ChIP Gra

  18. Experiment list: SRX190244 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available 1610.1 source_name=PANC-1 || biomaterial_provider=ATCC || datatype=ChipSeq || datatype description=Chromatin IP Sequencing || antibod...y antibodydescription=Mouse monoclonal to RNA polymerase... II CTD repeat YSPTSPS antibody (4H8) - ChIP Grade. Antibody Target: POL2 || antibody targetdescription=This...r RNA in eukaryotes || antibody vendorname=abcam || antibody vendorid=ab5408 || c...ontrolid=SL2340 || labexpid=SL2343,SL5609 || softwareversion=MACS || cell sex=M || antibody=Pol2-4H8 || antibody antibody

  19. A compact PE memory for vision chips

    Science.gov (United States)

    Cong, Shi; Zhe, Chen; Jie, Yang; Nanjian, Wu; Zhihua, Wang

    2014-09-01

    This paper presents a novel compact memory in the processing element (PE) for single-instruction multiple-data (SIMD) vision chips. The PE memory is constructed with 8 × 8 register cells, where one latch in the slave stage is shared by eight latches in the master stage. The memory supports simultaneous read and write on the same address in one clock cycle. Its compact area of 14.33 μm2/bit promises a higher integration level of the processor. A prototype chip with a 64 × 64 PE array is fabricated in a UMC 0.18 μm CMOS technology. Five types of the PE memory cell structure are designed and compared. The testing results demonstrate that the proposed PE memory architecture well satisfies the requirement of the vision chip in high-speed real-time vision applications, such as 1000 fps edge extraction.

  20. A compact PE memory for vision chips

    International Nuclear Information System (INIS)

    Shi Cong; Chen Zhe; Yang Jie; Wu Nanjian; Wang Zhihua

    2014-01-01

    This paper presents a novel compact memory in the processing element (PE) for single-instruction multiple-data (SIMD) vision chips. The PE memory is constructed with 8 × 8 register cells, where one latch in the slave stage is shared by eight latches in the master stage. The memory supports simultaneous read and write on the same address in one clock cycle. Its compact area of 14.33 μm 2 /bit promises a higher integration level of the processor. A prototype chip with a 64 × 64 PE array is fabricated in a UMC 0.18 μm CMOS technology. Five types of the PE memory cell structure are designed and compared. The testing results demonstrate that the proposed PE memory architecture well satisfies the requirement of the vision chip in high-speed real-time vision applications, such as 1000 fps edge extraction. (semiconductor integrated circuits)

  1. Aurora Kinase A Promotes AR Degradation via the E3 Ligase CHIP.

    Science.gov (United States)

    Sarkar, Sukumar; Brautigan, David L; Larner, James M

    2017-08-01

    Reducing the levels of the androgen receptor (AR) is one of the most viable approaches to combat castration-resistant prostate cancer. Previously, we observed that proteasomal-dependent degradation of AR in response to 2-methoxyestradiol (2-ME) depends primarily on the E3 ligase C-terminus of HSP70-interacting protein (STUB1/CHIP). Here, 2-ME stimulation activates CHIP by phosphorylation via Aurora kinase A (AURKA). Aurora A kinase inhibitors and RNAi knockdown of Aurora A transcript selectively blocked CHIP phosphorylation and AR degradation. Aurora A kinase is activated by 2-ME in the S-phase as well as during mitosis, and phosphorylates CHIP at S273. Prostate cancer cells expressing an S273A mutant of CHIP have attenuated AR degradation upon 2-ME treatment compared with cells expressing wild-type CHIP, supporting the idea that CHIP phosphorylation by Aurora A activates its E3 ligase activity for the AR. These results reveal a novel 2-ME→Aurora A→CHIP→AR pathway that promotes AR degradation via the proteasome that may offer novel therapeutic opportunities for prostate cancer. Mol Cancer Res; 15(8); 1063-72. ©2017 AACR . ©2017 American Association for Cancer Research.

  2. Pavement system with rubber tire chips in subgrade

    Energy Technology Data Exchange (ETDEWEB)

    Ashtakala, B.; Hoque, A.K.M.M. [Concordia Univ., Montreal, PQ (Canada). Dept. of Civil Engineering

    1995-12-31

    A pavement design method was developed in which shredded rubber tire chips mixed with sand were used as a material for pavement subgrade. Rubber tire chips are highly compressible and produce both elastic and plastic deformations under the application of loads. Sand was added to fill the void between the tire chips and make the mixture a strong material. The design method considered the vertical compressive strain produced by the design life traffic load 18k (80 KN) repetitions. The equivalent thicknesses of the layers above the subgrade corresponding to this vertical compressive strain were determined using contour charts. From this equivalent thickness, the thicknesses for asphalt pavement, base, and sub-base were determined by Odemark`s method. 3 refs., 1 tab., 3 figs.

  3. On-Chip Bondwire Magnetics with Ferrite-Epoxy Glob Coating for Power Systems on Chip

    Directory of Open Access Journals (Sweden)

    Jian Lu

    2008-01-01

    Full Text Available A novel concept of on-chip bondwire inductors and transformers with ferrite epoxy glob coating is proposed to offer a cost effective approach realizing power systems on chip (SOC. We have investigated the concept both experimentally and with finite element modeling. A Q factor of 30–40 is experimentally demonstrated for the bondwire inductors which represents an improvement by a factor of 3–30 over the state-of-the-art MEMS micromachined inductors. Transformer parameters including self- and mutual inductance and coupling factors are extracted from both modeled and measured S-parameters. More importantly, the bondwire magnetic components can be easily integrated into SOC manufacturing processes with minimal changes and open enormous possibilities for realizing cost-effective, high-current, high-efficiency power SOCs.

  4. On-chip particle trapping and manipulation

    Science.gov (United States)

    Leake, Kaelyn Danielle

    The ability to control and manipulate the world around us is human nature. Humans and our ancestors have used tools for millions of years. Only in recent years have we been able to control objects at such small levels. In order to understand the world around us it is frequently necessary to interact with the biological world. Optical trapping and manipulation offer a non-invasive way to move, sort and interact with particles and cells to see how they react to the world around them. Optical tweezers are ideal in their abilities but they require large, non-portable, and expensive setups limiting how and where we can use them. A cheap portable platform is required in order to have optical manipulation reach its full potential. On-chip technology offers a great solution to this challenge. We focused on the Liquid-Core Anti-Resonant Reflecting Optical Waveguide (liquid-core ARROW) for our work. The ARROW is an ideal platform, which has anti-resonant layers which allow light to be guided in liquids, allowing for particles to easily be manipulated. It is manufactured using standard silicon manufacturing techniques making it easy to produce. The planner design makes it easy to integrate with other technologies. Initially I worked to improve the ARROW chip by reducing the intersection losses and by reducing the fluorescence and background on the ARROW chip. The ARROW chip has already been used to trap and push particles along its channel but here I introduce several new methods of particle trapping and manipulation on the ARROW chip. Traditional two beam traps use two counter propagating beams. A trapping scheme that uses two orthogonal beams which counter to first instinct allow for trapping at their intersection is introduced. This scheme is thoroughly predicted and analyzed using realistic conditions. Simulations of this method were done using a program which looks at both the fluidics and optical sources to model complex situations. These simulations were also used to

  5. Global On-Chip Differential Interconnects with Optimally-Placed Twists

    NARCIS (Netherlands)

    Mensink, E.; Schinkel, Daniel; Klumperink, Eric A.M.; van Tuijl, Adrianus Johannes Maria; Nauta, Bram

    2005-01-01

    Global on-chip communication is receiving quite some attention as global interconnects are rapidly becoming a speed, power and reliability bottleneck for digital CMOS systems. Recently, we proposed a bus-transceiver test chip in 0.13 μm CMOS using 10 mm long uninterrupted differential interconnects

  6. An automatic system for elaboration of chip breaking diagrams

    DEFF Research Database (Denmark)

    Andreasen, Jan Lasson; De Chiffre, Leonardo

    1998-01-01

    A laboratory system for fully automatic elaboration of chip breaking diagrams has been developed and tested. The system is based on automatic chip breaking detection by frequency analysis of cutting forces in connection with programming of a CNC-lathe to scan different feeds, speeds and cutting...

  7. Wirebond crosstalk and cavity modes in large chip mounts for superconducting qubits

    Energy Technology Data Exchange (ETDEWEB)

    Wenner, J; Neeley, M; Bialczak, Radoslaw C; Lenander, M; Lucero, Erik; O' Connell, A D; Sank, D; Wang, H; Weides, M; Cleland, A N; Martinis, John M, E-mail: martinis@physics.ucsb.edu [Department of Physics, University of California, Santa Barbara, CA 93106 (United States)

    2011-06-15

    We analyze the performance of a microwave chip mount that uses wirebonds to connect the chip and mount grounds. A simple impedance ladder model predicts that transmission crosstalk between two feedlines falls off exponentially with distance at low frequencies, but rises to near unity above a resonance frequency set by the chip to ground capacitance. Using SPICE simulations and experimental measurements of a scale model, the basic predictions of the ladder model were verified. In particular, by decreasing the capacitance between the chip and box grounds, the resonance frequency increased and transmission decreased. This model then influenced the design of a new mount that improved the isolation to - 65 dB at 6 GHz, even though the chip dimensions were increased to 1 cm x 1 cm, three times as large as our previous devices. We measured a coplanar resonator in this mount as preparation for larger qubit chips, and were able to identify cavity, slotline, and resonator modes.

  8. Wirebond crosstalk and cavity modes in large chip mounts for superconducting qubits

    International Nuclear Information System (INIS)

    Wenner, J; Neeley, M; Bialczak, Radoslaw C; Lenander, M; Lucero, Erik; O'Connell, A D; Sank, D; Wang, H; Weides, M; Cleland, A N; Martinis, John M

    2011-01-01

    We analyze the performance of a microwave chip mount that uses wirebonds to connect the chip and mount grounds. A simple impedance ladder model predicts that transmission crosstalk between two feedlines falls off exponentially with distance at low frequencies, but rises to near unity above a resonance frequency set by the chip to ground capacitance. Using SPICE simulations and experimental measurements of a scale model, the basic predictions of the ladder model were verified. In particular, by decreasing the capacitance between the chip and box grounds, the resonance frequency increased and transmission decreased. This model then influenced the design of a new mount that improved the isolation to - 65 dB at 6 GHz, even though the chip dimensions were increased to 1 cm x 1 cm, three times as large as our previous devices. We measured a coplanar resonator in this mount as preparation for larger qubit chips, and were able to identify cavity, slotline, and resonator modes.

  9. Impact of high-pressure coolant supply on chip formation in milling

    Science.gov (United States)

    Klocke, F.; Döbbeler, B.; Lakner, T.

    2017-10-01

    Machining of titanium alloys is considered as difficult, because of their high temperature strength, low thermal conductivity and low E-modulus, which contributes to high mechanical loads and high temperatures in the contact zone between tool and workpiece. The generated heat in the cutting zone can be dissipated only in a low extent. When cutting steel materials, up to 75% of the process heat is transported away by the chips, contrary to only 25% when machining titanium alloys. As a result, the cutting tool heats up, which leads to high tool wear. Therefore, machining of titanium alloys is only possible with relatively low cutting speeds. This leads to low levels of productivity for milling processes with titanium alloys. One way to increase productivity is to use more cutting edges in tools with the same diameter. However, the limiting factor of adding more cutting edges to a milling tool is the minimum size of the chip spaces, which are sufficient for a stable chip evacuation. This paper presents experimental results on the chip formation and chip size influenced by high-pressure coolant supply, which can lead to smaller chips and to smaller sizes of the chip spaces, respectively. Both influences, the pressure of the supplied coolant and the volumetric flow rate were individually examined. Alpha-beta annealed titanium TiAl6V4 was examined in relation to the reference material quenched and tempered steel 42CrMo4+QT (AISI 4140+QT). The work shows that with proper chip control due to high-pressure coolant supply in milling, the number of cutting edges on the same diameter tool can be increased, which leads to improved productivity.

  10. Crosstalk in modern on-chip interconnects a FDTD approach

    CERN Document Server

    Kaushik, B K; Patnaik, Amalendu

    2016-01-01

    The book provides accurate FDTD models for on-chip interconnects, covering most recent advancements in materials and design. Furthermore, depending on the geometry and physical configurations, different electrical equivalent models for CNT and GNR based interconnects are presented. Based on the electrical equivalent models the performance comparison among the Cu, CNT and GNR-based interconnects are also discussed in the book. The proposed models are validated with the HSPICE simulations. The book introduces the current research scenario in the modeling of on-chip interconnects. It presents the structure, properties, and characteristics of graphene based on-chip interconnects and the FDTD modeling of Cu based on-chip interconnects. The model considers the non-linear effects of CMOS driver as well as the transmission line effects of interconnect line that includes coupling capacitance and mutual inductance effects. In a more realistic manner, the proposed model includes the effect of width-dependent MFP of the ...

  11. Origami chip-on-sensor design: progress and new developments

    International Nuclear Information System (INIS)

    Irmler, C; Bergauer, T; Frankenberger, A; Friedl, M; Gfall, I; Valentan, M; Ishikawa, A; Kato, E; Negishi, K; Kameswara, R; Mohanty, G; Onuki, Y; Shimizu, N; Tsuboyama, T

    2013-01-01

    The Belle II silicon vertex detector will consist of four layers of double-sided silicon strip detectors, arranged in ladders. Each sensor will be read out individually by utilizing the Origami chip-on-sensor concept, where the APV25 chips are placed on flexible circuits, glued on top of the sensors. Beside a best compromise between low material budget and sufficient SNR, this concept allows efficient CO 2 cooling of the readout chips by a single, thin cooling pipe per ladder. Recently, we assembled a module consisting of two consecutive 6'' double-sided silicon strip detectors, both read out by Origami flexes. Such a compound of Origami modules is required for the ladders of the outer Belle II SVD layers. Consequently, it is intended to verify the scalability of the assembly procedure, the performance of combined Origami flexes as well as the efficiency of the CO 2 cooling system for a higher number of APV25 chips.

  12. Chips 2020 a guide to the future of nanoelectronics

    CERN Document Server

    2012-01-01

    The chips in present-day cell phones already contain billions of sub-100-nanometer transistors. By 2020, however, we will see systems-on-chips with trillions of 10-nanometer transistors. But this will be the end of the miniaturization, because yet smaller transistors, containing just a few control atoms, are subject to statistical fluctuations and thus no longer useful. We also need to worry about a potential energy crisis, because in less than five years from now, with current chip technology, the internet alone would consume the total global electrical power! This book presents a new, sustainable roadmap towards ultra-low-energy (femto-Joule), high-performance electronics. The focus is on the energy-efficiency of the various chip functions: sensing, processing, and communication, in a top-down spirit involving new architectures such as silicon brains, ultra-low-voltage circuits, energy harvesting, and 3D silicon technologies. Recognized world leaders from industry and from the research community share thei...

  13. Optimal use of tandem biotin and V5 tags in ChIP assays

    Directory of Open Access Journals (Sweden)

    Krpic Sanja

    2009-02-01

    Full Text Available Abstract Background Chromatin immunoprecipitation (ChIP assays coupled to genome arrays (Chip-on-chip or massive parallel sequencing (ChIP-seq lead to the genome wide identification of binding sites of chromatin associated proteins. However, the highly variable quality of antibodies and the availability of epitopes in crosslinked chromatin can compromise genomic ChIP outcomes. Epitope tags have often been used as more reliable alternatives. In addition, we have employed protein in vivo biotinylation tagging as a very high affinity alternative to antibodies. In this paper we describe the optimization of biotinylation tagging for ChIP and its coupling to a known epitope tag in providing a reliable and efficient alternative to antibodies. Results Using the biotin tagged erythroid transcription factor GATA-1 as example, we describe several optimization steps for the application of the high affinity biotin streptavidin system in ChIP. We find that the omission of SDS during sonication, the use of fish skin gelatin as blocking agent and choice of streptavidin beads can lead to significantly improved ChIP enrichments and lower background compared to antibodies. We also show that the V5 epitope tag performs equally well under the conditions worked out for streptavidin ChIP and that it may suffer less from the effects of formaldehyde crosslinking. Conclusion The combined use of the very high affinity biotin tag with the less sensitive to crosslinking V5 tag provides for a flexible ChIP platform with potential implications in ChIP sequencing outcomes.

  14. Optimal use of tandem biotin and V5 tags in ChIP assays

    Science.gov (United States)

    Kolodziej, Katarzyna E; Pourfarzad, Farzin; de Boer, Ernie; Krpic, Sanja; Grosveld, Frank; Strouboulis, John

    2009-01-01

    Background Chromatin immunoprecipitation (ChIP) assays coupled to genome arrays (Chip-on-chip) or massive parallel sequencing (ChIP-seq) lead to the genome wide identification of binding sites of chromatin associated proteins. However, the highly variable quality of antibodies and the availability of epitopes in crosslinked chromatin can compromise genomic ChIP outcomes. Epitope tags have often been used as more reliable alternatives. In addition, we have employed protein in vivo biotinylation tagging as a very high affinity alternative to antibodies. In this paper we describe the optimization of biotinylation tagging for ChIP and its coupling to a known epitope tag in providing a reliable and efficient alternative to antibodies. Results Using the biotin tagged erythroid transcription factor GATA-1 as example, we describe several optimization steps for the application of the high affinity biotin streptavidin system in ChIP. We find that the omission of SDS during sonication, the use of fish skin gelatin as blocking agent and choice of streptavidin beads can lead to significantly improved ChIP enrichments and lower background compared to antibodies. We also show that the V5 epitope tag performs equally well under the conditions worked out for streptavidin ChIP and that it may suffer less from the effects of formaldehyde crosslinking. Conclusion The combined use of the very high affinity biotin tag with the less sensitive to crosslinking V5 tag provides for a flexible ChIP platform with potential implications in ChIP sequencing outcomes. PMID:19196479

  15. Applications and theory of electrokinetic enrichment in micro-nanofluidic chips.

    Science.gov (United States)

    Chen, Xueye; Zhang, Shuai; Zhang, Lei; Yao, Zhen; Chen, Xiaodong; Zheng, Yue; Liu, Yanlin

    2017-09-01

    This review reports the progress on the recent development of electrokinetic enrichment in micro-nanofluidic chips. The governing equations of electrokinetic enrichment in micro-nanofluidic chips are given. Various enrichment applications including protein analysis, DNA analysis, bacteria analysis, viruses analysis and cell analysis are illustrated and discussed. The advantages and difficulties of each enrichment method are expatiated. This paper will provide a particularly convenient and valuable reference to those who intend to research the electrokinetic enrichment based on micro-nanofluidic chips.

  16. Experimental verification of on-chip CMOS fractional-order capacitor emulators

    KAUST Repository

    Tsirimokou, G.

    2016-06-13

    The experimental results from a fabricated integrated circuit of fractional-order capacitor emulators are reported. The chip contains emulators of capacitors of orders 0.3, 0.4, 0.5, 0.6 and 0.7 with nano-Farad pseudo-capacitances that can be adjusted through a bias current. Two off-chip capacitors are used to set the bandwidth of each emulator independently. The chip was designed in Austria microsystems (AMS) 0.35μ CMOS. © 2016 The Institution of Engineering and Technology.

  17. Experimental verification of on-chip CMOS fractional-order capacitor emulators

    KAUST Repository

    Tsirimokou, G.; Psychalinos, C.; Salama, Khaled N.; Elwakil, A.S.

    2016-01-01

    The experimental results from a fabricated integrated circuit of fractional-order capacitor emulators are reported. The chip contains emulators of capacitors of orders 0.3, 0.4, 0.5, 0.6 and 0.7 with nano-Farad pseudo-capacitances that can be adjusted through a bias current. Two off-chip capacitors are used to set the bandwidth of each emulator independently. The chip was designed in Austria microsystems (AMS) 0.35μ CMOS. © 2016 The Institution of Engineering and Technology.

  18. Addressing On-Chip Power Converstion and Dissipation Issues in Many-Core System-on-a-Chip Based on Conventional Silicon and Emerging Nanotechnologies

    Science.gov (United States)

    Ashenafi, Emeshaw

    Integrated circuits (ICs) are moving towards system-on-a-chip (SOC) designs. SOC allows various small and large electronic systems to be implemented in a single chip. This approach enables the miniaturization of design blocks that leads to high density transistor integration, faster response time, and lower fabrication costs. To reap the benefits of SOC and uphold the miniaturization of transistors, innovative power delivery and power dissipation management schemes are paramount. This dissertation focuses on on-chip integration of power delivery systems and managing power dissipation to increase the lifetime of energy storage elements. We explore this problem from two different angels: On-chip voltage regulators and power gating techniques. On-chip voltage regulators reduce parasitic effects, and allow faster and efficient power delivery for microprocessors. Power gating techniques, on the other hand, reduce the power loss incurred by circuit blocks during standby mode. Power dissipation (Ptotal = Pstatic and Pdynamic) in a complementary metal-oxide semiconductor (CMOS) circuit comes from two sources: static and dynamic. A quadratic dependency on the dynamic switching power and a more than linear dependency on static power as a form of gate leakage (subthreshold current) exist. To reduce dynamic power loss, the supply power should be reduced. A significant reduction in power dissipation occurs when portions of a microprocessor operate at a lower voltage level. This reduction in supply voltage is achieved via voltage regulators or converters. Voltage regulators are used to provide a stable power supply to the microprocessor. The conventional off-chip switching voltage regulator contains a passive floating inductor, which is difficult to be implemented inside the chip due to excessive power dissipation and parasitic effects. Additionally, the inductor takes a very large chip area while hampering the scaling process. These limitations make passive inductor based on-chip

  19. Dr. Monaco Examines Lab-on a-Chip

    Science.gov (United States)

    2003-01-01

    Dr. Lisa Monaco, Marshall Space Flight Center's (MSFC's) project scientist for the Lab-on-a-Chip Applications Development (LOCAD) program, examines a lab on a chip. The small dots are actually ports where fluids and chemicals can be mixed or samples can be collected for testing. Tiny channels, only clearly visible under a microscope, form pathways between the ports. Many chemical and biological processes, previously conducted on large pieces of laboratory equipment, can now be performed on these small glass or plastic plates. Monaco and other researchers at MSFC in Huntsville, Alabama, are customizing the chips to be used for many space applications, such as monitoring microbes inside spacecraft and detecting life on other planets. The portable, handheld Lab-on-a Chip Application Development Portable Test System (LOCAD-PTS) made its debut flight aboard Discovery during the STS-116 mission launched December 9, 2006. The system allowed crew members to monitor their environment for problematic contaminants such as yeast, mold, and even E.coli, and salmonella. Once LOCAD-PTS reached the International Space Station (ISS), the Marshall team continued to manage the experiment, monitoring the study from a console in the Payload Operations Center at MSFC. The results of these studies will help NASA researchers refine the technology for future Moon and Mars missions. (NASA/MSFC/D.Stoffer)

  20. X-CHIP: an integrated platform for high-throughput protein crystallization and on-the-chip X-ray diffraction data collection

    International Nuclear Information System (INIS)

    Kisselman, Gera; Qiu, Wei; Romanov, Vladimir; Thompson, Christine M.; Lam, Robert; Battaile, Kevin P.; Pai, Emil F.; Chirgadze, Nickolay Y.

    2011-01-01

    The X-CHIP (X-ray Crystallography High-throughput Integrated Platform) is a novel microchip that has been developed to combine multiple steps of the crystallographic pipeline from crystallization to diffraction data collection on a single device to streamline the entire process. The X-CHIP (X-ray Crystallization High-throughput Integrated Platform) is a novel microchip that has been developed to combine multiple steps of the crystallographic pipeline from crystallization to diffraction data collection on a single device to streamline the entire process. The system has been designed for crystallization condition screening, visual crystal inspection, initial X-ray screening and data collection in a high-throughput fashion. X-ray diffraction data acquisition can be performed directly on-the-chip at room temperature using an in situ approach. The capabilities of the chip eliminate the necessity for manual crystal handling and cryoprotection of crystal samples, while allowing data collection from multiple crystals in the same drop. This technology would be especially beneficial for projects with large volumes of data, such as protein-complex studies and fragment-based screening. The platform employs hydrophilic and hydrophobic concentric ring surfaces on a miniature plate transparent to visible light and X-rays to create a well defined and stable microbatch crystallization environment. The results of crystallization and data-collection experiments demonstrate that high-quality well diffracting crystals can be grown and high-resolution diffraction data sets can be collected using this technology. Furthermore, the quality of a single-wavelength anomalous dispersion data set collected with the X-CHIP at room temperature was sufficient to generate interpretable electron-density maps. This technology is highly resource-efficient owing to the use of nanolitre-scale drop volumes. It does not require any modification for most in-house and synchrotron beamline systems and offers