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Sample records for programmable array logic

  1. Programmable Array Logic Design

    International Nuclear Information System (INIS)

    Demon Handoyo; Djen Djen Djainal

    2007-01-01

    Good digital circuit design that part of a complex system, often becoming a separate problem. To produce finishing design according to wanted performance is often given on to considerations which each other confuse, hence thereby analyse optimization become important in this case. To realization is made design logic program, the first are determined global diagram block, then are decided contents of these block diagram, and then determined its interconnection in the form of logic expression, continued with election of component. These steps are done to be obtained the design with low price, easy in its interconnection, minimal volume, low power and certainty god work. (author)

  2. All optical programmable logic array (PLA)

    Science.gov (United States)

    Hiluf, Dawit

    2018-03-01

    A programmable logic array (PLA) is an integrated circuit (IC) logic device that can be reconfigured to implement various kinds of combinational logic circuits. The device has a number of AND and OR gates which are linked together to give output or further combined with more gates or logic circuits. This work presents the realization of PLAs via the physics of a three level system interacting with light. A programmable logic array is designed such that a number of different logical functions can be combined as a sum-of-product or product-of-sum form. We present an all optical PLAs with the aid of laser light and observables of quantum systems, where encoded information can be considered as memory chip. The dynamics of the physical system is investigated using Lie algebra approach.

  3. Programmable logic controller performance enhancement by field programmable gate array based design.

    Science.gov (United States)

    Patel, Dhruv; Bhatt, Jignesh; Trivedi, Sanjay

    2015-01-01

    PLC, the core element of modern automation systems, due to serial execution, exhibits limitations like slow speed and poor scan time. Improved PLC design using FPGA has been proposed based on parallel execution mechanism for enhancement of performance and flexibility. Modelsim as simulation platform and VHDL used to translate, integrate and implement the logic circuit in FPGA. Xilinx's Spartan kit for implementation-testing and VB has been used for GUI development. Salient merits of the design include cost-effectiveness, miniaturization, user-friendliness, simplicity, along with lower power consumption, smaller scan time and higher speed. Various functionalities and applications like typical PLC and industrial alarm annunciator have been developed and successfully tested. Results of simulation, design and implementation have been reported. Copyright © 2014 ISA. Published by Elsevier Ltd. All rights reserved.

  4. Diagnosable structured logic array

    Science.gov (United States)

    Whitaker, Sterling (Inventor); Miles, Lowell (Inventor); Gambles, Jody (Inventor); Maki, Gary K. (Inventor)

    2009-01-01

    A diagnosable structured logic array and associated process is provided. A base cell structure is provided comprising a logic unit comprising a plurality of input nodes, a plurality of selection nodes, and an output node, a plurality of switches coupled to the selection nodes, where the switches comprises a plurality of input lines, a selection line and an output line, a memory cell coupled to the output node, and a test address bus and a program control bus coupled to the plurality of input lines and the selection line of the plurality of switches. A state on each of the plurality of input nodes is verifiably loaded and read from the memory cell. A trusted memory block is provided. The associated process is provided for testing and verifying a plurality of truth table inputs of the logic unit.

  5. Flexible programmable logic module

    Science.gov (United States)

    Robertson, Perry J.; Hutchinson, Robert L.; Pierson, Lyndon G.

    2001-01-01

    The circuit module of this invention is a VME board containing a plurality of programmable logic devices (PLDs), a controlled impedance clock tree, and interconnecting buses. The PLDs are arranged to permit systolic processing of a problem by offering wide data buses and a plurality of processing nodes. The board contains a clock reference and clock distribution tree that can drive each of the PLDs with two critically timed clock references. External clock references can be used to drive additional circuit modules all operating from the same synchronous clock reference.

  6. Reliability evaluation programmable logic devices

    International Nuclear Information System (INIS)

    Srivani, L.; Murali, N.; Thirugnana Murthy, D.; Satya Murty, S.A.V.

    2014-01-01

    Programmable Logic Devices (PLD) are widely used as basic building modules in high integrity systems, considering their robust features such as gate density, performance, speed etc. PLDs are used to implement digital design such as bus interface logic, control logic, sequencing logic, glue logic etc. Due to semiconductor evolution, new PLDs with state-of-the-art features are arriving to the market. Since these devices are reliable as per the manufacturer's specification, they were used in the design of safety systems. But due to their reduced market life, the availability of performance data is limited. So evaluating the PLD before deploying in a safety system is very important. This paper presents a survey on the use of PLDs in the nuclear domain and the steps involved in the evaluation of PLD using Quantitative Accelerated Life Testing. (author)

  7. Optical programmable Boolean logic unit.

    Science.gov (United States)

    Chattopadhyay, Tanay

    2011-11-10

    Logic units are the building blocks of many important computational operations likes arithmetic, multiplexer-demultiplexer, radix conversion, parity checker cum generator, etc. Multifunctional logic operation is very much essential in this respect. Here a programmable Boolean logic unit is proposed that can perform 16 Boolean logical operations from a single optical input according to the programming input without changing the circuit design. This circuit has two outputs. One output is complementary to the other. Hence no loss of data can occur. The circuit is basically designed by a 2×2 polarization independent optical cross bar switch. Performance of the proposed circuit has been achieved by doing numerical simulations. The binary logical states (0,1) are represented by the absence of light (null) and presence of light, respectively.

  8. Universal Programmable Logic Controller Software

    International Nuclear Information System (INIS)

    Mohd Arif Hamzah; Azhar Shamsudin; Fadil Ismail; Muhammad Nor Atan; Anwar Abdul Rahman

    2013-01-01

    Programmable Logic Controller (PLC) is an electronic hardware which is widely used in manufacturing or processing industries. It is also serve as the main control system hardware to run the production and manufacturing process. There are more than ten (10) well known company producing PLC hardware, with their own specialties, including the method of programming and language used. Malaysia Nuclear Agency have various plant and equipment, runs and control by PLC, such as Mintex Sinagama Plant, Alurtron Plant, and few laboratory equipment. Since all the equipment and plant are equipped with various brand or different manufacture of PLC, it creates difficulties to the supporting staff to master the control program. The same problems occur for new application of this hardware, since there no policies to purchase only one specific brand of PLC. (author)

  9. Enhancing Learning Effectiveness in Digital Design Courses through the Use of Programmable Logic Boards

    Science.gov (United States)

    Zhu, Yi; Weng, T.; Cheng, Chung-Kuan

    2009-01-01

    Incorporating programmable logic devices (PLD) in digital design courses has become increasingly popular. The advantages of using PLDs, such as complex programmable logic devices (CPLDs) and field programmable gate arrays (FPGA), have been discussed before. However, previous studies have focused on the experiences from the point of view of the…

  10. Optical reversible programmable Boolean logic unit.

    Science.gov (United States)

    Chattopadhyay, Tanay

    2012-07-20

    Computing with reversibility is the only way to avoid dissipation of energy associated with bit erase. So, a reversible microprocessor is required for future computing. In this paper, a design of a simple all-optical reversible programmable processor is proposed using a polarizing beam splitter, liquid crystal-phase spatial light modulators, a half-wave plate, and plane mirrors. This circuit can perform 16 logical operations according to three programming inputs. Also, inputs can be easily recovered from the outputs. It is named the "reversible programmable Boolean logic unit (RPBLU)." The logic unit is the basic building block of many complex computational operations. Hence the design is important in sense. Two orthogonally polarized lights are defined here as two logical states, respectively.

  11. Abductive Inference using Array-Based Logic

    DEFF Research Database (Denmark)

    Frisvad, Jeppe Revall; Falster, Peter; Møller, Gert L.

    The notion of abduction has found its usage within a wide variety of AI fields. Computing abductive solutions has, however, shown to be highly intractable in logic programming. To avoid this intractability we present a new approach to logicbased abduction; through the geometrical view of data...... employed in array-based logic we embrace abduction in a simple structural operation. We argue that a theory of abduction on this form allows for an implementation which, at runtime, can perform abductive inference quite efficiently on arbitrary rules of logic representing knowledge of finite domains....

  12. Universal programmable logic gate and routing method

    Science.gov (United States)

    Fijany, Amir (Inventor); Vatan, Farrokh (Inventor); Akarvardar, Kerem (Inventor); Blalock, Benjamin (Inventor); Chen, Suheng (Inventor); Cristoloveanu, Sorin (Inventor); Kolawa, Elzbieta (Inventor); Mojarradi, Mohammad M. (Inventor); Toomarian, Nikzad (Inventor)

    2009-01-01

    An universal and programmable logic gate based on G.sup.4-FET technology is disclosed, leading to the design of more efficient logic circuits. A new full adder design based on the G.sup.4-FET is also presented. The G.sup.4-FET can also function as a unique router device offering coplanar crossing of signal paths that are isolated and perpendicular to one another. This has the potential of overcoming major limitations in VLSI design where complex interconnection schemes have become increasingly problematic.

  13. Integrated plant automation using programmable logic controllers

    International Nuclear Information System (INIS)

    Qureshi, S.A.

    2002-01-01

    In the world of automation the Programmable Logic Controller (PLC) has became for control. It now not only replaces the earlier relay logic controls but also has taken over many additional control functions. Initially the PLC was used to replace relay logic, but is ever-increasing range of functions means that it is found in many and more complex applications. As the structure of the PLC is based on the same principles as those employed in computer architecture, it is capable of performance not only relay switching tasks, but also other applications such as counting, calculating, comparing and the processing of analogue signals. Due to the simplicity of entering and modifying the programmed instructions to suit the requirements of the process under control, the PLC is truly a versatile and flexible device that can be employed easily and efficiently to repeatedly control tasks that vary in nature and complexes. A photograph of the Siemens S-5 95U. To illustrate the advantage of using a PLC over a traditional relay logic system, consider a control system with 20 input/output points. This assembly could comprise 60-80 relays, some counter/timers and a great deal of wiring. This assembly would be cumbersome with a power consumption of 30-40VA. A considerable time would be required to design, test and commission the assembly and once it is in full working order any desired modification, even of minor nature, could require major hardware changes. (author)

  14. Field-Programmable Logic Devices with Optical Input Output

    Science.gov (United States)

    Szymanski, Ted H.; Saint-Laurent, Martin; Tyan, Victor; Au, Albert; Supmonchai, Boonchuay

    2000-02-01

    A field-programmable logic device (FPLD) with optical I O is described. FPLD s with optical I O can have their functionality specified in the field by means of downloading a control-bit stream and can be used in a wide range of applications, such as optical signal processing, optical image processing, and optical interconnects. Our device implements six state-of-the-art dynamically programmable logic arrays (PLA s) on a 2 mm 2 mm die. The devices were fabricated through the Lucent Technologies Advanced Research Projects Agency Consortium for Optical and Optoelectronic Technologies in Computing (Lucent ARPA COOP) workshop by use of 0.5- m complementary metal-oxide semiconductor self-electro-optic device technology and were delivered in 1998. All devices are fully functional: The electronic data paths have been verified at 200 MHz, and optical tests are pending. The device has been programmed to implement a two-stage optical switching network with six 4 4 crossbar switches, which can realize more than 190 10 6 unique programmable input output permutations. The same device scaled to a 2 cm 2 cm substrate could support as many as 4000 optical I O and 1 Tbit s of optical I O bandwidth and offer fully programmable digital functionality with approximately 110,000 programmable logic gates. The proposed optoelectronic FPLD is also ideally suited to realizing dense, statically reconfigurable crossbar switches. We describe an attractive application area for such devices: a rearrangeable three-stage optical switch for a wide-area-network backbone, switching 1000 traffic streams at the OC-48 data rate and supporting several terabits of traffic.

  15. Supervisory control system implemented in programmable logical controller web server

    OpenAIRE

    Milavec, Simon

    2012-01-01

    In this thesis, we study the feasibility of supervisory control and data acquisition (SCADA) system realisation in a web server of a programmable logic controller. With the introduction of Ethernet protocol to the area of process control, the more powerful programmable logic controllers obtained integrated web servers. The web server of a programmable logic controller, produced by Siemens, will also be described in this thesis. Firstly, the software and the hardware equipment used for real...

  16. Dependable Design Flow for Protection Systems using Programmable Logic Devices

    CERN Document Server

    Kwiatkowski, M

    2011-01-01

    Programmable Logic Devices (PLD) such as Field Programmable Gate Arrays (FPGA) are becoming more prevalent in protection and safety-related electronic systems. When employing such programmable logic devices, extra care and attention needs to be taken. The final synthesis result, used to generate the bit-stream to program the device, must be shown to meet the design’s requirements. This paper describes how to maximize confidence using techniques such as Formal Methods, exhaustive Hardware Description Language (HDL) code simulation and hardware testing. An example is given for one of the critical functions of the Safe Machine Parameters (SMP) system, used in the protection of the Large Hadron Collider (LHC) at CERN. CERN is also working towards an adaptation of the IEC- 61508 lifecycle designed for Machine Protection Systems (MPS), and the High Energy Physics environment, implementation of a protection function in FPGA code is only one small step of this lifecycle. The ultimate aim of this project is to cre...

  17. A new fast and programmable trigger logic

    International Nuclear Information System (INIS)

    Fucci, A.; Amendolia, S.R.; Bertolucci, E.; Bottigli, U.; Bradaschia, C.; Foa, L.; Giazotto, A.; Giorgi, M.; Givoletti, M.; Lucardesi, P.; Menzione, A.; Passuello, D.; Quaglia, M.; Ristori, L.; Rolandi, L.; Salvadori, P.; Scribano, A.; Stanga, R.; Stefanini, A.; Vincelli, M.L.

    1977-01-01

    The NA1 (FRAMM) experiment, under construction for the CERN-SPS North Area, deals with more than 1000 counter signals which have to be combined together in order to build sophisticated and highly selective triggers. These requirements have led to the development of a low cost, combinatorial, fast electronics which can replace, in an advantageous way the standard NIM electronics at the trigger level. The essential performances of the basic circuit are: 1) programmability of any desired logical expression; 2) trigger time independent of the chosen expression; 3) reduced cost and compactness due to the use of commercial RAMs, PROMs, and PLAs; 4) short delay, less than 20 ns, between input and output pulses. (Auth.)

  18. Applications of field-programmable gate arrays in scientific research

    CERN Document Server

    Sadrozinski, Hartmut F W

    2011-01-01

    Focusing on resource awareness in field-programmable gate array (FPGA) design, Applications of Field-Programmable Gate Arrays in Scientific Research covers the principle of FPGAs and their functionality. It explores a host of applications, ranging from small one-chip laboratory systems to large-scale applications in ""big science."" The book first describes various FPGA resources, including logic elements, RAM, multipliers, microprocessors, and content-addressable memory. It then presents principles and methods for controlling resources, such as process sequencing, location constraints, and in

  19. Programmable logic control applied to a coal preparation plant complex

    Energy Technology Data Exchange (ETDEWEB)

    Krahenbil, L W

    1979-02-01

    The programmable Logic Controller (PLC), at its present stage of evolution, is now considered as a mature control system. The PLC combines the solid-state reliability of hard-wired logic and computer control systems with the simplicity of a relay ladder logic. Relay symbolic programming through a function-oriented keyboard provides a means which plant personnel can easily become accoustomed to work with. In a large coal facility, it is shown that the control engineer can provide improved control flexibility with the advanced capabilities of the PLC.

  20. Programmable cellular arrays. Faults testing and correcting in cellular arrays

    International Nuclear Information System (INIS)

    Cercel, L.

    1978-03-01

    A review of some recent researches about programmable cellular arrays in computing and digital processing of information systems is presented, and includes both combinational and sequential arrays, with full arbitrary behaviour, or which can realize better implementations of specialized blocks as: arithmetic units, counters, comparators, control systems, memory blocks, etc. Also, the paper presents applications of cellular arrays in microprogramming, in implementing of a specialized computer for matrix operations, in modeling of universal computing systems. The last section deals with problems of fault testing and correcting in cellular arrays. (author)

  1. Programming Programmable Logic Controller. High-Technology Training Module.

    Science.gov (United States)

    Lipsky, Kevin

    This training module on programming programmable logic controllers (PLC) is part of the memory structure and programming unit used in a packaging systems equipment control course. In the course, students assemble, install, maintain, and repair industrial machinery used in industry. The module contains description, objectives, content outline,…

  2. Implementation of Adaptive Digital Controllers on Programmable Logic Devices

    Science.gov (United States)

    Gwaltney, David A.; King, Kenneth D.; Smith, Keary J.; Monenegro, Justino (Technical Monitor)

    2002-01-01

    Much has been made of the capabilities of FPGA's (Field Programmable Gate Arrays) in the hardware implementation of fast digital signal processing. Such capability also makes an FPGA a suitable platform for the digital implementation of closed loop controllers. Other researchers have implemented a variety of closed-loop digital controllers on FPGA's. Some of these controllers include the widely used proportional-integral-derivative (PID) controller, state space controllers, neural network and fuzzy logic based controllers. There are myriad advantages to utilizing an FPGA for discrete-time control functions which include the capability for reconfiguration when SRAM-based FPGA's are employed, fast parallel implementation of multiple control loops and implementations that can meet space level radiation tolerance requirements in a compact form-factor. Generally, a software implementation on a DSP (Digital Signal Processor) or microcontroller is used to implement digital controllers. At Marshall Space Flight Center, the Control Electronics Group has been studying adaptive discrete-time control of motor driven actuator systems using digital signal processor (DSP) devices. While small form factor, commercial DSP devices are now available with event capture, data conversion, pulse width modulated (PWM) outputs and communication peripherals, these devices are not currently available in designs and packages which meet space level radiation requirements. In general, very few DSP devices are produced that are designed to meet any level of radiation tolerance or hardness. The goal of this effort is to create a fully digital, flight ready controller design that utilizes an FPGA for implementation of signal conditioning for control feedback signals, generation of commands to the controlled system, and hardware insertion of adaptive control algorithm approaches. An alternative is required for compact implementation of such functionality to withstand the harsh environment

  3. Smart trigger logic for focal plane arrays

    Science.gov (United States)

    Levy, James E; Campbell, David V; Holmes, Michael L; Lovejoy, Robert; Wojciechowski, Kenneth; Kay, Randolph R; Cavanaugh, William S; Gurrieri, Thomas M

    2014-03-25

    An electronic device includes a memory configured to receive data representing light intensity values from pixels in a focal plane array and a processor that analyzes the received data to determine which light values correspond to triggered pixels, where the triggered pixels are those pixels that meet a predefined set of criteria, and determines, for each triggered pixel, a set of neighbor pixels for which light intensity values are to be stored. The electronic device also includes a buffer that temporarily stores light intensity values for at least one previously processed row of pixels, so that when a triggered pixel is identified in a current row, light intensity values for the neighbor pixels in the previously processed row and for the triggered pixel are persistently stored, as well as a data transmitter that transmits the persistently stored light intensity values for the triggered and neighbor pixels to a data receiver.

  4. Application of programmable logic controller in nuclear experiments

    International Nuclear Information System (INIS)

    Ponikvar, D.

    1991-09-01

    The applicability of programmable logic controller (PLC) in nuclear experiments was studied on an example that simulated the monitoring and control of an ion beam in an accelerator. Using infrared and laser light, a comparison was made between the complexity and suitability of PLC compared to a setup using a personal computer. The experiments are described in detail. The routines for registration of signals from appropriate sensors and for control of the stepper monitor were written in quick BASIC. (author). 5 figs

  5. Roles of programmable logic controllers in fuel reprocessing plants

    International Nuclear Information System (INIS)

    Mishra, Hrishikesh; Balakrishnan, V.P.; Pandya, G.J.

    1999-01-01

    Fuel charging facility is another application of Programmable Logic Controllers (PLC) in fuel reprocessing plants, that involves automatic operation of fuel cask dolly, charging motor, pneumatic doors, clutches, clamps, stepper motors and rod pushers in a pre-determined sequence. Block diagram of ACF system is given for underlining the scope of control and interlocks requirements involved for automation of the fuel charging system has been provided for the purpose at KARP Plant, Kalpakkam

  6. Implementing a Microcontroller Watchdog with a Field-Programmable Gate Array (FPGA)

    Science.gov (United States)

    Straka, Bartholomew

    2013-01-01

    Reliability is crucial to safety. Redundancy of important system components greatly enhances reliability and hence safety. Field-Programmable Gate Arrays (FPGAs) are useful for monitoring systems and handling the logic necessary to keep them running with minimal interruption when individual components fail. A complete microcontroller watchdog with logic for failure handling can be implemented in a hardware description language (HDL.). HDL-based designs are vendor-independent and can be used on many FPGAs with low overhead.

  7. Performance Testing Methodology for Safety-Critical Programmable Logic Controller

    International Nuclear Information System (INIS)

    Kim, Chang Ho; Oh, Do Young; Kim, Ji Hyeon; Kim, Sung Ho; Sohn, Se Do

    2009-01-01

    The Programmable Logic Controller (PLC) for use in Nuclear Power Plant safety-related applications is being developed and tested first time in Korea. This safety-related PLC is being developed with requirements of regulatory guideline and industry standards for safety system. To test that the quality of the developed PLC is sufficient to be used in safety critical system, document review and various product testings were performed over the development documents for S/W, H/W, and V/V. This paper provides the performance testing methodology and its effectiveness for PLC platform conducted by KOPEC

  8. A multi-channel scaler designed with programmable logic device

    International Nuclear Information System (INIS)

    Sun Yongjie; Li Cheng; Xing Tao; Zhang Junjie

    2004-01-01

    This scaler used programmable logic device is a design for the electronics of telescope system of the beam. The scaler can scale 30 ECL inputs at the same time. With the EPP (Enhanced Parallel Port) modes of the Parallel Port, the transmitted rate of data is 2 MB/s. This scaler can be used in the position system of MWPC (Multi-Wires Proportional Chamber). Tested with particles of 5 x 10 3 /s, the scaler gives a credible and stable result. (authors)

  9. Regulatory issues on using programmable logic device in nuclear power plants

    International Nuclear Information System (INIS)

    Park, G. Y.; Yu, Y. J.; Kim, H. T.; Kwon, Y. I.; Park, H. S.; Jeong, C. H.

    2012-01-01

    For replacing obsolete analog equipment in nuclear power plant, the Programmable Logic Devices (PLDs) using Hardware Description Language (HDL) have been widely adopted in digitalized Instrumentation and Control (I and C) systems because of its flexibility. For safety reviews on Nuclear Power Plants (NPPs,) qualifying digitalized safety I and C system using PLDs is an important issue. As an effort to provide regulatory position on using PLDs in safety I and C system, there is a research project to provide the regulatory positions against emerging issues involved with digitalisation of I and C system including using PLDs. Therefore, this paper addresses the important considerations for using PLDs in safety I and C systems such as diversity, independence and qualification, etc. In this point, this study focuses on technical reports for Field Programmable Gate Array (FPGA) from EPRI,. U.S. NRC, and relevant technical standards

  10. Regulatory issues on using programmable logic device in nuclear power plants

    Energy Technology Data Exchange (ETDEWEB)

    Park, G. Y.; Yu, Y. J.; Kim, H. T.; Kwon, Y. I.; Park, H. S.; Jeong, C. H. [Korea Institute of Nuclear Safety, Daejeon (Korea, Republic of)

    2012-10-15

    For replacing obsolete analog equipment in nuclear power plant, the Programmable Logic Devices (PLDs) using Hardware Description Language (HDL) have been widely adopted in digitalized Instrumentation and Control (I and C) systems because of its flexibility. For safety reviews on Nuclear Power Plants (NPPs,) qualifying digitalized safety I and C system using PLDs is an important issue. As an effort to provide regulatory position on using PLDs in safety I and C system, there is a research project to provide the regulatory positions against emerging issues involved with digitalisation of I and C system including using PLDs. Therefore, this paper addresses the important considerations for using PLDs in safety I and C systems such as diversity, independence and qualification, etc. In this point, this study focuses on technical reports for Field Programmable Gate Array (FPGA) from EPRI,. U.S. NRC, and relevant technical standards.

  11. Logical Qubit in a Linear Array of Semiconductor Quantum Dots

    Directory of Open Access Journals (Sweden)

    Cody Jones

    2018-06-01

    Full Text Available We design a logical qubit consisting of a linear array of quantum dots, we analyze error correction for this linear architecture, and we propose a sequence of experiments to demonstrate components of the logical qubit on near-term devices. To avoid the difficulty of fully controlling a two-dimensional array of dots, we adapt spin control and error correction to a one-dimensional line of silicon quantum dots. Control speed and efficiency are maintained via a scheme in which electron spin states are controlled globally using broadband microwave pulses for magnetic resonance, while two-qubit gates are provided by local electrical control of the exchange interaction between neighboring dots. Error correction with two-, three-, and four-qubit codes is adapted to a linear chain of qubits with nearest-neighbor gates. We estimate an error correction threshold of 10^{-4}. Furthermore, we describe a sequence of experiments to validate the methods on near-term devices starting from four coupled dots.

  12. Programmable logic controller based synchronous motor excitation system

    Directory of Open Access Journals (Sweden)

    Janda Žarko

    2011-01-01

    Full Text Available This paper presents a 3.5 MW synchronous motor excitation system reconstruction. In the proposed solution programmable logic controller is used to control motor, which drives the turbo compressor. Comparing to some other solutions that are used in similar situations, the proposed solution is superior due to its flexibility and usage of mass-production hardware. Moreover, the implementation of PLC enables easy integration of the excitation system with the other technological processes in the plant as well as in the voltage regulation of 'smart grid' system. Also, implementation of various optimization algorithms can be done comfortably and it does not require additional investment in hardware. Some experimental results that depict excitation current during motor start-up, as well as, measured static characteristics of the motor, were presented.

  13. Programmable logic controller (PLC) for safety systems of nuclear plants

    International Nuclear Information System (INIS)

    Sen, S.K.; Karmakar, G.; Joseph, Jose; Patil, R.K.

    2002-01-01

    Full text: A programmable logic controller (PLC) has been developed by RCnD, BARC for use in the safety critical systems in nuclear power plants. This PLC uses qualified hardware developed in RCnD for use in NPP. The programming software conforms to IEC-61131 part 3. The application programming is done on function block diagram (FBD) editor and the FBD is automatically converted into code in high level language (C / C++). This feature makes the application easily decipherable and therefore easily subjected to reviews and other validation techniques. The key to make quality software for use in nuclear systems is to enforce various standards in the design and development of the software, something, which is not possible to do with a commercially available PLC. This PLC with its software completely transparent lends itself to rigorous verification and validation easily

  14. Management of Industrial Processes with Programmable Logic Controller

    Directory of Open Access Journals (Sweden)

    Marius Tufoi

    2009-10-01

    Full Text Available In a modern economy, automation (the control is primarily to raise the competitiveness of a product, either directly through price or quality, or indirectly through the improvement of working conditions of staff productive. The control of industrial processes involves the management of dynamic systems that have continuous states. These systems are described by differential equations and, in general, analog inputs and outputs. Management of these systems is achieved, in general, with classical automation, by automation or with analog computers which contains modules with input / output analog performance. If states, inputs and outputs of a system can be modeled using binary variables, then these systems can be driven with Programmable Logic Controller.

  15. Development of Single-Event Upset hardened programmable logic devices in deep submicron CMOS

    International Nuclear Information System (INIS)

    Bonacini, S.

    2007-11-01

    The electronics associated to the particle detectors of the Large Hadron Collider (LHC), under construction at CERN, will operate in a very harsh radiation environment. Commercial Off-The-Shelf (COTS) components cannot be used in the vicinity of particle collision due to their poor radiation tolerance. This thesis is a contribution to the effort to cover the need for radiation-tolerant SEU-robust (Single Event Upset) programmable components for application in high energy physics experiments. Two components are under development: a Programmable Logic Device (PLD) and a Field-Programmable Gate Array (FPGA). The PLD is a fuse-based, 10-input, 8-I/O general architecture device in 0.25 μm CMOS technology. The FPGA under development is a 32*32 logic block array, equivalent to ∼ 25 k gates, in 0.13 μm CMOS. The irradiation test results obtained in the CMOS 0.25 μm technology demonstrate good robustness of the circuit up to an LET (Linear Energy Transfer) of 79.6 cm 2 *MeV/mg, which make it suitable for the target environment. The CMOS 0.13 μm circuit has showed robustness to an LET of 37.4 cm 2 *MeV/mg in the static test mode and has increased sensitivity in the dynamic test mode. This work focused also on the research for an SEU-robust register in both the mentioned technologies. The SEU-robust register is employed as a user data flip-flop in the FPGA and PLD designs and as a configuration cell as well in the FPGA design

  16. Field Programmable Gate Array-based I and C Safety System

    International Nuclear Information System (INIS)

    Kim, Hyun Jeong; Kim, Koh Eun; Kim, Young Geul; Kwon, Jong Soo

    2014-01-01

    Programmable Logic Controller (PLC)-based I and C safety system used in the operating nuclear power plants has the disadvantages of the Common Cause Failure (CCF), high maintenance costs and quick obsolescence, and then it is necessary to develop the other platform to replace the PLC. The Field Programmable Gate Array (FPGA)-based Instrument and Control (I and C) safety system is safer and more economical than Programmable Logic Controller (PLC)-based I and C safety system. Therefore, in the future, FPGA-based I and C safety system will be able to replace the PLC-based I and C safety system in the operating and the new nuclear power plants to get benefited from its safety and economic advantage. FPGA-based I and C safety system shall be implemented and verified by applying the related requirements to perform the safety function

  17. Field Programmable Gate Array-based I and C Safety System

    Energy Technology Data Exchange (ETDEWEB)

    Kim, Hyun Jeong; Kim, Koh Eun; Kim, Young Geul; Kwon, Jong Soo [KEPCO, Daejeon (Korea, Republic of)

    2014-08-15

    Programmable Logic Controller (PLC)-based I and C safety system used in the operating nuclear power plants has the disadvantages of the Common Cause Failure (CCF), high maintenance costs and quick obsolescence, and then it is necessary to develop the other platform to replace the PLC. The Field Programmable Gate Array (FPGA)-based Instrument and Control (I and C) safety system is safer and more economical than Programmable Logic Controller (PLC)-based I and C safety system. Therefore, in the future, FPGA-based I and C safety system will be able to replace the PLC-based I and C safety system in the operating and the new nuclear power plants to get benefited from its safety and economic advantage. FPGA-based I and C safety system shall be implemented and verified by applying the related requirements to perform the safety function.

  18. Optically Programmable Field Programmable Gate Arrays (FPGA) Systems

    National Research Council Canada - National Science Library

    Mumbru, Jose

    2004-01-01

    ... holograms for these modules. The first chapter makes the case that a direct interface between an optical memory and a chip integrating detectors and logic circuitry can better utilize the high parallelism inherent in holographic modules...

  19. Project-Based Learning in Programmable Logic Controller

    Science.gov (United States)

    Seke, F. R.; Sumilat, J. M.; Kembuan, D. R. E.; Kewas, J. C.; Muchtar, H.; Ibrahim, N.

    2018-02-01

    Project-based learning is a learning method that uses project activities as the core of learning and requires student creativity in completing the project. The aims of this study is to investigate the influence of project-based learning methods on students with a high level of creativity in learning the Programmable Logic Controller (PLC). This study used experimental methods with experimental class and control class consisting of 24 students, with 12 students of high creativity and 12 students of low creativity. The application of project-based learning methods into the PLC courses combined with the level of student creativity enables the students to be directly involved in the work of the PLC project which gives them experience in utilizing PLCs for the benefit of the industry. Therefore, it’s concluded that project-based learning method is one of the superior learning methods to apply on highly creative students to PLC courses. This method can be used as an effort to improve student learning outcomes and student creativity as well as to educate prospective teachers to become reliable educators in theory and practice which will be tasked to create qualified human resources candidates in order to meet future industry needs.

  20. Programmable logic controller optical fibre sensor interface module

    Science.gov (United States)

    Allwood, Gary; Wild, Graham; Hinckley, Steven

    2011-12-01

    Most automated industrial processes use Distributed Control Systems (DCSs) or Programmable Logic Controllers (PLCs) for automated control. PLCs tend to be more common as they have much of the functionality of DCSs, although they are generally cheaper to install and maintain. PLCs in conjunction with a human machine interface form the basis of Supervisory Control And Data Acquisition (SCADA) systems, combined with communication infrastructure and Remote Terminal Units (RTUs). RTU's basically convert different sensor measurands in to digital data that is sent back to the PLC or supervisory system. Optical fibre sensors are becoming more common in industrial processes because of their many advantageous properties. Being small, lightweight, highly sensitive, and immune to electromagnetic interference, means they are an ideal solution for a variety of diverse sensing applications. Here, we have developed a PLC Optical Fibre Sensor Interface Module (OFSIM), in which an optical fibre is connected directly to the OFSIM located next to the PLC. The embedded fibre Bragg grating sensors, are highly sensitive and can detect a number of different measurands such as temperature, pressure and strain without the need for a power supply.

  1. Analysis and Implementation of Cryptographic Hash Functions in Programmable Logic Devices

    Directory of Open Access Journals (Sweden)

    Tautvydas Brukštus

    2016-06-01

    Full Text Available In this day’s world, more and more focused on data pro-tection. For data protection using cryptographic science. It is also important for the safe storage of passwords for this uses a cryp-tographic hash function. In this article has been selected the SHA-256 cryptographic hash function to implement and explore, based on fact that it is now a popular and safe. SHA-256 cryp-tographic function did not find any theoretical gaps or conflict situations. Also SHA-256 cryptographic hash function used cryptographic currencies. Currently cryptographic currency is popular and their value is high. For the measurements have been chosen programmable logic integrated circuits as they less effi-ciency then ASIC. We chose Altera Corporation produced prog-rammable logic integrated circuits. Counting speed will be inves-tigated by three programmable logic integrated circuit. We will use programmable logic integrated circuits belong to the same family, but different generations. Each programmable logic integ-rated circuit made using different dimension technology. Choo-sing these programmable logic integrated circuits: EP3C16, EP4CE115 and 5CSEMA5F31. To compare calculations perfor-mances parameters are provided in the tables and graphs. Re-search show the calculation speed and stability of different prog-rammable logic circuits.

  2. A Memory-Based Programmable Logic Device Using Look-Up Table Cascade with Synchronous Static Random Access Memories

    Science.gov (United States)

    Nakamura, Kazuyuki; Sasao, Tsutomu; Matsuura, Munehiro; Tanaka, Katsumasa; Yoshizumi, Kenichi; Nakahara, Hiroki; Iguchi, Yukihiro

    2006-04-01

    A large-scale memory-technology-based programmable logic device (PLD) using a look-up table (LUT) cascade is developed in the 0.35-μm standard complementary metal oxide semiconductor (CMOS) logic process. Eight 64 K-bit synchronous SRAMs are connected to form an LUT cascade with a few additional circuits. The features of the LUT cascade include: 1) a flexible cascade connection structure, 2) multi phase pseudo asynchronous operations with synchronous static random access memory (SRAM) cores, and 3) LUT-bypass redundancy. This chip operates at 33 MHz in 8-LUT cascades at 122 mW. Benchmark results show that it achieves a comparable performance to field programmable gate array (FPGAs).

  3. Experimental demonstration of programmable multi-functional spin logic cell based on spin Hall effect

    Energy Technology Data Exchange (ETDEWEB)

    Zhang, X.; Wan, C.H., E-mail: wancaihua@iphy.ac.cn; Yuan, Z.H.; Fang, C.; Kong, W.J.; Wu, H.; Zhang, Q.T.; Tao, B.S.; Han, X.F., E-mail: xfhan@iphy.ac.cn

    2017-04-15

    Confronting with the gigantic volume of data produced every day, raising integration density by reducing the size of devices becomes harder and harder to meet the ever-increasing demand for high-performance computers. One feasible path is to actualize more logic functions in one cell. In this respect, we experimentally demonstrate a prototype spin-orbit torque based spin logic cell integrated with five frequently used logic functions (AND, OR, NOT, NAND and NOR). The cell can be easily programmed and reprogrammed to perform desired function. Furthermore, the information stored in cells is symmetry-protected, making it possible to expand into logic gate array where the cell can be manipulated one by one without changing the information of other undesired cells. This work provides a prospective example of multi-functional spin logic cell with reprogrammability and nonvolatility, which will advance the application of spin logic devices. - Highlights: • Experimental demonstration of spin logic cell based on spin Hall effect. • Five logic functions are realized in a single logic cell. • The logic cell is reprogrammable. • Information in the cell is symmetry-protected. • The logic cell can be easily expanded to logic gate array.

  4. Implementation of programmable logic controller for proposed new instrumentation and control system of RTP

    International Nuclear Information System (INIS)

    Mohd Khairulezwan Abdul Manan; Mohd Idris Taib; Mohd Dzul Aiman Aslan

    2010-01-01

    Reactor Monitoring System is one of very important part of Reactor Instrumentation and Control system. Current monitoring system is using analog system whereby all circuits are discrete circuit and all displays and indicators are not digitalized. The proposed new system will use using a Commercial Off-The-Shelf, state of the art, Supervisory Control and Data Acquisition system such as Programmable Logic Controller as well as Computer System. The implementations of Programmable Logic Controller are used for Data Acquisition System and as a sub-system for Computer System where all the activities involved are stored for operation record and report as well as use for research purposes. Programmable Logic Controller receives galvanised or optically isolated signal from Reactor Protection System. Programmable Logic Controller also receives signal from other parameters as a digital and analog input related to reactor system. (author)

  5. Programmable logic controllers in Heavy Water Project, Manuguru (Paper No. 3.4)

    International Nuclear Information System (INIS)

    Gupta, S.C.; Bhaskar, R.; Maiti, A.; Venkatesu, G.; Satish, P.; Goel, R.K.

    1992-01-01

    Enhancement to plant operational flexibility has been achieved in Heavy Water Project, Manuguru by installing programmable logic controllers for its control equipment. The earlier sulfide based Heavy Water Plant, Kota is using relay logic and diode based program-matrix for binary controls. Performance improvement and advantages of PLC and experience in its operation are described. (author). 3 refs

  6. Relay Protection and Automation Systems Based on Programmable Logic Integrated Circuits

    International Nuclear Information System (INIS)

    Lashin, A. V.; Kozyrev, A. V.

    2015-01-01

    One of the most promising forms of developing the apparatus part of relay protection and automation devices is considered. The advantages of choosing programmable logic integrated circuits to obtain adaptive technological algorithms in power system protection and control systems are pointed out. The technical difficulties in the problems which today stand in the way of using relay protection and automation systems are indicated and a new technology for solving these problems is presented. Particular attention is devoted to the possibility of reconfiguring the logic of these devices, using programmable logic integrated circuits

  7. Implementation of BES-III TOF trigger system in programmable logic devices

    International Nuclear Information System (INIS)

    Zheng Wei; Liu Shubin; Liu Xuzong; An Qi

    2009-01-01

    The TOF trigger sub-system on the upgrading Beijing Spectrometer is designed to receive 368 bits fast hit signals from the front end electronics module to yield 7 bits trigger information according to the physical requirement. It sends the processed real time trigger information to the Global-Trigger-Logic to generate the primal trigger signal L1, and sends processed 136 bits real time position information to the Track-Match-Logic to calculate the particle flight tracks. The sub-system also packages the valid events for the DAQ system to read out. Following the reconfigurable concept, a large number of programmable logic devices are employed to increase the flexibility and reliability of the system, and decrease the complexity and the space requirement of PCB layout. This paper describes the implementation of the kernel trigger logic in a programmable logic device. (authors)

  8. Configuration and debug of field programmable gate arrays using MATLAB[reg)/SIMULINK[reg

    International Nuclear Information System (INIS)

    Grout, I; Ryan, J; O'Shea, T

    2005-01-01

    Increasingly, the need to seamlessly link high-level behavioural descriptions of electronic hardware for modelling and simulation purposes to the final application hardware highlights the gap between the high-level behavioural descriptions of the required circuit functionality (considering here digital logic) in commonly used mathematical modelling tools, and the hardware description languages such as VHDL and Verilog-HDL. In this paper, the linking of a MATLAB[reg] model for digital algorithm for implementation on a programmable logic device for design synthesis from the MATLAB[reg] model into VHDL is discussed. This VHDL model is itself synthesised and downloaded to the target Field Programmable Gate Array, for normal operation and also for design debug purposes. To demonstrate this, a circuit architecture mapped from a SIMULINK[reg] model is presented. The rationale is for a seamless interface between the initial algorithm development and the target hardware, enabling the hardware to be debugged and compared to the simulated model from a single interface for use with by a non-expert in the programmable logic and hardware description language use

  9. Application of Field programmable Gate Array to Digital Signal ...

    African Journals Online (AJOL)

    Journal of Research in National Development ... This work shows how one parallel technology Field Programmable Gate Array (FPGA) can be applied to digital signal processing problem to increase computational speed. ... In this research work FPGA typically exploits parallelism because FPGA is a parallel device. With the ...

  10. Introduction to embedded system design using field programmable gate arrays

    CERN Document Server

    Dubey, Rahul

    2009-01-01

    Offers information on the use of field programmable gate arrays (FPGAs) in the design of embedded systems. This text considers a hypothetical robot controller as an embedded application and weaves around it related concepts of FPGA-based digital design. It is suitable for both students and designers who have worked with microprocessors.

  11. Field programmable gate array reliability analysis using the dynamic flow graph methodology

    Energy Technology Data Exchange (ETDEWEB)

    McNelles, Phillip; Lu, Lixuan [Faculty of Energy Systems and Nuclear Science, University of Ontario Institute of Technology (UOIT), Ontario (Canada)

    2016-10-15

    Field programmable gate array (FPGA)-based systems are thought to be a practical option to replace certain obsolete instrumentation and control systems in nuclear power plants. An FPGA is a type of integrated circuit, which is programmed after being manufactured. FPGAs have some advantages over other electronic technologies, such as analog circuits, microprocessors, and Programmable Logic Controllers (PLCs), for nuclear instrumentation and control, and safety system applications. However, safety-related issues for FPGA-based systems remain to be verified. Owing to this, modeling FPGA-based systems for safety assessment has now become an important point of research. One potential methodology is the dynamic flowgraph methodology (DFM). It has been used for modeling software/hardware interactions in modern control systems. In this paper, FPGA logic was analyzed using DFM. Four aspects of FPGAs are investigated: the 'IEEE 1164 standard', registers (D flip-flops), configurable logic blocks, and an FPGA-based signal compensator. The ModelSim simulations confirmed that DFM was able to accurately model those four FPGA properties, proving that DFM has the potential to be used in the modeling of FPGA-based systems. Furthermore, advantages of DFM over traditional reliability analysis methods and FPGA simulators are presented, along with a discussion of potential issues with using DFM for FPGA-based system modeling.

  12. Development of Single-Event Upset hardened programmable logic devices in deep submicron CMOS; Developpement de circuits logiques programmables resistants aux aleas logiques en technologie CMOS submicrometrique

    Energy Technology Data Exchange (ETDEWEB)

    Bonacini, S

    2007-11-15

    The electronics associated to the particle detectors of the Large Hadron Collider (LHC), under construction at CERN, will operate in a very harsh radiation environment. Commercial Off-The-Shelf (COTS) components cannot be used in the vicinity of particle collision due to their poor radiation tolerance. This thesis is a contribution to the effort to cover the need for radiation-tolerant SEU-robust (Single Event Upset) programmable components for application in high energy physics experiments. Two components are under development: a Programmable Logic Device (PLD) and a Field-Programmable Gate Array (FPGA). The PLD is a fuse-based, 10-input, 8-I/O general architecture device in 0.25 {mu}m CMOS technology. The FPGA under development is a 32*32 logic block array, equivalent to {approx} 25 k gates, in 0.13 {mu}m CMOS. The irradiation test results obtained in the CMOS 0.25 {mu}m technology demonstrate good robustness of the circuit up to an LET (Linear Energy Transfer) of 79.6 cm{sup 2}*MeV/mg, which make it suitable for the target environment. The CMOS 0.13 {mu}m circuit has showed robustness to an LET of 37.4 cm{sup 2}*MeV/mg in the static test mode and has increased sensitivity in the dynamic test mode. This work focused also on the research for an SEU-robust register in both the mentioned technologies. The SEU-robust register is employed as a user data flip-flop in the FPGA and PLD designs and as a configuration cell as well in the FPGA design.

  13. Stealth low-level manipulation of programmable logic controllers I/O by pin control exploitation

    NARCIS (Netherlands)

    Abbasi, A.; Hashemi, M.; Zambon, E.; Etalle, S.; Havarneanu, G.; Setola, R.; Nassopoulos, H.; Wolthusen, S.

    2016-01-01

    Input/OutputisthemechanismthroughwhichProgrammable Logic Controllers (PLCs) interact with and control the outside world. Particularly when employed in critical infrastructures, the I/O of PLCs has to be both reliable and secure. PLCs I/O like other embedded devices are controlled by a pin based

  14. Introducing Programmable Logic to Undergraduate Engineering Students in a Digital Electronics Course

    Science.gov (United States)

    Todorovich, E.; Marone, J. A.; Vazquez, M.

    2012-01-01

    Due to significant technological advances and industry requirements, many universities have introduced programmable logic and hardware description languages into undergraduate engineering curricula. This has led to a number of logistical and didactical challenges, in particular for computer science students. In this paper, the integration of some…

  15. A Project-Based Learning Approach to Programmable Logic Design and Computer Architecture

    Science.gov (United States)

    Kellett, C. M.

    2012-01-01

    This paper describes a course in programmable logic design and computer architecture as it is taught at the University of Newcastle, Australia. The course is designed around a major design project and has two supplemental assessment tasks that are also described. The context of the Computer Engineering degree program within which the course is…

  16. Fully digital routing logic for single-photon avalanche diode arrays in highly efficient time-resolved imaging

    Science.gov (United States)

    Cominelli, Alessandro; Acconcia, Giulia; Ghioni, Massimo; Rech, Ivan

    2018-03-01

    Time-correlated single-photon counting (TCSPC) is a powerful optical technique, which permits recording fast luminous signals with picosecond precision. Unfortunately, given its repetitive nature, TCSPC is recognized as a relatively slow technique, especially when a large time-resolved image has to be recorded. In recent years, there has been a fast trend toward the development of TCPSC imagers. Unfortunately, present systems still suffer from a trade-off between number of channels and performance. Even worse, the overall measurement speed is still limited well below the saturation of the transfer bandwidth toward the external processor. We present a routing algorithm that enables a smart connection between a 32×32 detector array and five shared high-performance converters able to provide an overall conversion rate up to 10 Gbit/s. The proposed solution exploits a fully digital logic circuit distributed in a tree structure to limit the number and length of interconnections, which is a major issue in densely integrated circuits. The behavior of the logic has been validated by means of a field-programmable gate array, while a fully integrated prototype has been designed in 180-nm technology and analyzed by means of postlayout simulations.

  17. Complex programmable logic device based alarm sequencer for nuclear power plants

    International Nuclear Information System (INIS)

    Khedkar, Ravindra; Solomon, J. Selva; KrishnaKumar, B.

    2001-01-01

    Complex Programmable Logic Device based Alarm Sequencer is an instrument, which detects alarms, memorizes them and displays the sequences of occurrence of alarms. It caters to sixteen alarm signals and distinguishes the sequence among any two alarms with a time resolution of 1 ms. The system described has been designed for continuous operation in process plants, nuclear power plants etc. The system has been tested and found to be working satisfactorily. (author)

  18. Programmable Logic Controllers for Systems of Automatic of the Level Crossing

    Directory of Open Access Journals (Sweden)

    Mieczyslaw Kornaszewski

    2006-01-01

    Full Text Available The railway crossings are vulnerable to incidence of high number of accidents often deadly. In order to face this problem, the modern systems of automatic of the level crossing have been introduced. These systems are based on Programmable Logic Controllers, which allow the designers to exploit self-control mechanisms, events acquiring, technical diagnostic which in turn enable remote control and acquisition of faults.

  19. Emergency Diesel: Safety-related instrumentation and control with programmable logic controllers

    International Nuclear Information System (INIS)

    Breidenich, G.; Luedtke, M.

    2004-01-01

    This report presents a new concept for the design of emergency diesel equipment protection circuits as a part of the safety related instrumentation in the nuclear power plant Biblis, units A and B. The concept was implemented with state of the art SIMATIC S7/316 programmable logic controllers (PLCs) and can be adapted to any system with high availability requirements (e.g. power plant turbines, aircraft engines, mining pumps etc). (orig.)

  20. Application of complex programmable logic devices in memory radiation effects test system

    International Nuclear Information System (INIS)

    Li Yonghong; He Chaohui; Yang Hailiang; He Baoping

    2005-01-01

    The application of the complex programmable logic device (CPLD) in electronics is emphatically discussed. The method of using software MAX + plus II and CPLD are introduced. A new test system for memory radiation effects is established by using CPLD devices-EPM7128C84-15. The old test system's function are realized and, moreover, a number of small scale integrated circuits are reduced and the test system's reliability is improved. (authors)

  1. Optical Doppler tomography based on a field programmable gate array

    DEFF Research Database (Denmark)

    Larsen, Henning Engelbrecht; Nilsson, Ronnie Thorup; Thrane, Lars

    2008-01-01

    We report the design of and results obtained by using a field programmable gate array (FPGA) to digitally process optical Doppler tomography signals. The processor fits into the analog signal path in an existing optical coherence tomography setup. We demonstrate both Doppler frequency and envelope...... extraction using the Hilbert transform, all in a single FPGA. An FPGA implementation has certain advantages over general purpose digital signal processor (DSP) due to the fact that the processing elements operate in parallel as opposed to the DSP. which is primarily a sequential processor....

  2. The impact of software and CAE tools on SEU in field programmable gate arrays

    International Nuclear Information System (INIS)

    Katz, R.; Wang, J.; McCollum, J.; Cronquist, B.

    1999-01-01

    Field programmable gate array (FPGA) devices, heavily used in spacecraft electronics, have grown substantially in size over the past few years, causing designers to work at a higher conceptual level, with computer aided engineering (CAE) tools synthesizing and optimizing the logic from a description. It is shown that the use of commercial-off-the-shelf (COTS) CAE tools can produce unreliable circuit designs when the device is used in a radiation environment and a flip-flop is upset. At a lower level, software can be used to improve the SEU performance of a flip-flop, exploiting the configurable nature of FPGA technology and on-chip delay, parasitic resistive, and capacitive circuit elements

  3. Final Report and Documentation for the PLD11 Multipurpose Programmable Logic VME Board Design

    International Nuclear Information System (INIS)

    Hutchinson, Robert L.; Pierson, Lyndon G.; Robertson, Perry J.; Tarman, Thomas D.; Witzke, Edward L.

    1999-01-01

    The PLD11 board is a 9U VME board containing 11 Altera 10K100 Programmable Logic Devices, controlled impedance clock tree, VME interface, programming inteface, 0C3 (155 Mbps) interface and serial port. The 11 Altera 10K100 Programmable Logic Devices arranged to provide four 96 bit wide buses for a total of 384 parallel digital data lines in and out of the board that can operate up to 100 Mhz for a aggrigate throughput of 38.4 Gpbs. The 14.44'' X 15.75'' board has over 1.1 million programmable gates that can be programmed through a serial interace. The board contains a clock reference and 50 ohm clock distribution tree that can drive each of the eleven 10K100 devices with two critically timed clock references. Five external clock references can be used to drive five additional PLD 11 boards for a total of six boards operating all from the same synchronous clock reference. A system of six boards provides just under 7 million programmable gates

  4. Life Cycle V and V Process for Hardware Description Language Programs of Programmable Logic Device-based Instrumentation and Control Systems

    International Nuclear Information System (INIS)

    Cha, K. H.; Lee, D. Y.

    2010-01-01

    Programmable Logic Device (PLD), especially Complex PLD (CPLD) or Field Programmable Logic Array (FPGA), has been growing in interest in nuclear Instrumentation and Control (I and C) applications. PLD has been applied to replace an obsolete analog device or old-fashioned microprocessor, or to develop digital controller, subsystem or overall system on hardware aspects. This is the main reason why the PLD-based I and C design provides higher flexibility than the analog-based one, and the PLD-based I and C systems shows better real-time performance than the processor-based I and C systems. Due to the development of the PLD-based I and C systems, their nuclear qualification has been issued in the nuclear industry. Verification and Validation (V and V) is one of necessary qualification activities when a Hardware Description Language (HDL) is used to implement functions of the PLD-based I and C systems. The life cycle V and V process, described in this paper, has been defined as satisfying the nuclear V and V requirements, and it has been applied to verify Correctness, Completeness, and Consistency (3C) among design outputs in a safety-grade programmable logic controller and a safety-critical data communication system. Especially, software engineering techniques such as the Fagan Inspection, formal verification, simulated verification and automated testing have been defined for the life cycle V and V tasks of behavioral, structural, and physical design in VHDL

  5. Multiple constant multiplication optimizations for field programmable gate arrays

    CERN Document Server

    Kumm, Martin

    2016-01-01

    This work covers field programmable gate array (FPGA)-specific optimizations of circuits computing the multiplication of a variable by several constants, commonly denoted as multiple constant multiplication (MCM). These optimizations focus on low resource usage but high performance. They comprise the use of fast carry-chains in adder-based constant multiplications including ternary (3-input) adders as well as the integration of look-up table-based constant multipliers and embedded multipliers to get the optimal mapping to modern FPGAs. The proposed methods can be used for the efficient implementation of digital filters, discrete transforms and many other circuits in the domain of digital signal processing, communication and image processing. Contents Heuristic and ILP-Based Optimal Solutions for the Pipelined Multiple Constant Multiplication Problem Methods to Integrate Embedded Multipliers, LUT-Based Constant Multipliers and Ternary (3-Input) Adders An Optimized Multiple Constant Multiplication Architecture ...

  6. Compact field programmable gate array-based pulse-sequencer and radio-frequency generator for experiments with trapped atoms

    Energy Technology Data Exchange (ETDEWEB)

    Pruttivarasin, Thaned, E-mail: thaned.pruttivarasin@riken.jp [Quantum Metrology Laboratory, RIKEN, Wako-shi, Saitama 351-0198 (Japan); Katori, Hidetoshi [Quantum Metrology Laboratory, RIKEN, Wako-shi, Saitama 351-0198 (Japan); Innovative Space-Time Project, ERATO, JST, Bunkyo-ku, Tokyo 113-8656 (Japan); Department of Applied Physics, Graduate School of Engineering, The University of Tokyo, Bunkyo-ku, Tokyo 113-8656 (Japan)

    2015-11-15

    We present a compact field-programmable gate array (FPGA) based pulse sequencer and radio-frequency (RF) generator suitable for experiments with cold trapped ions and atoms. The unit is capable of outputting a pulse sequence with at least 32 transistor-transistor logic (TTL) channels with a timing resolution of 40 ns and contains a built-in 100 MHz frequency counter for counting electrical pulses from a photo-multiplier tube. There are 16 independent direct-digital-synthesizers RF sources with fast (rise-time of ∼60 ns) amplitude switching and sub-mHz frequency tuning from 0 to 800 MHz.

  7. Programmable - logic equipment for ultrasound periodic inspections of reactor pressure vessels

    International Nuclear Information System (INIS)

    Haniger, L.

    1980-01-01

    Two alternatives are presented of programmable logic corresponding to the 2nd generation of the apparatus for performing periodic ultrasonic inspections of power reactor pressure vessels and a solution is outlined of inspecting the circumferential weld on the pressure vessel head. The apparatus will allow using any measuring head taken into consideration for operational inspection. Command words are taken from a punched type reader. Czechoslovak made RAM memories are used. The algorithm of instrument function is supposed to be controlled by a microprocessor as soon as necessary preconditions for this technology are created in Czechoslovakia

  8. A study on implementation of dynamic safety system in programmable logic controller for pressurized water reactor

    International Nuclear Information System (INIS)

    Kim, Ung Soo

    1997-02-01

    The dynamic safety system (DSS) is a computer based reactor protection system that has dynamic self-testing feature and fail-safe nature inherently. The inherent dynamic self-testing feature and fail-safe design provide a high level of reliability and low spurious trip rate. We can also reduce the time and human efforts to maintain the system by virtue of those features. Therefore, the application of the DSS to PWR has many advantages. The DSS has been applied only to advanced gas-cooled reactor (AGR) in the UK. In order to apply the DSS for PWR, the DSS has to be modified because there exist many differences between PWR and AGR for which the DSS was tested and installed. These differences are trip algorithms, monitored parameters, trip logics, and other conditions. In this study, the DSS algorithm is modified for PWR first. The modified DSS has several new features : 1) The modified DSS tests and processes time-dependent parameters, while the original DSS does not. 2) It has flexibility for handling several types of voting logic but the original DSS handles the only one type of voting - 2 out of 4 coincidence logic. Then, in this study, the modified DSS is implemented in programmable logic controller (PLC) using the ladder logic. Finally, the modified DSS is tested in two ways in this work : 1) The manual test is performed using direct input through the human computer interface (HCI) system. 2) The scenario based test is performed using input from the FISA-2/WS simulator. From the test results, it is shown that the modified DSS operates correctly in all conditions

  9. Control of Turing patterns and their usage as sensors, memory arrays, and logic gates

    Science.gov (United States)

    Muzika, František; Schreiber, Igor

    2013-10-01

    We study a model system of three diffusively coupled reaction cells arranged in a linear array that display Turing patterns with special focus on the case of equal coupling strength for all components. As a suitable model reaction we consider a two-variable core model of glycolysis. Using numerical continuation and bifurcation techniques we analyze the dependence of the system's steady states on varying rate coefficient of the recycling step while the coupling coefficients of the inhibitor and activator are fixed and set at the ratios 100:1, 1:1, and 4:5. We show that stable Turing patterns occur at all three ratios but, as expected, spontaneous transition from the spatially uniform steady state to the spatially nonuniform Turing patterns occurs only in the first case. The other two cases possess multiple Turing patterns, which are stabilized by secondary bifurcations and coexist with stable uniform periodic oscillations. For the 1:1 ratio we examine modular spatiotemporal perturbations, which allow for controllable switching between the uniform oscillations and various Turing patterns. Such modular perturbations are then used to construct chemical computing devices utilizing the multiple Turing patterns. By classifying various responses we propose: (a) a single-input resettable sensor capable of reading certain value of concentration, (b) two-input and three-input memory arrays capable of storing logic information, (c) three-input, three-output logic gates performing combinations of logical functions OR, XOR, AND, and NAND.

  10. Firmware-only implementation of Time-to-Digital Converter (TDC) in Field-Programmable Gate Array (FPGA)

    International Nuclear Information System (INIS)

    Jinyuan Wu; Zonghan Shi; Irena Y Wang

    2003-01-01

    A Time-to-Digital Converter (TDC) implemented in general purpose field-programmable gate array (FPGA) for the Fermilab CKM experiment will be presented. The TDC uses a delay chain and register array structure to produce lower bits in addition to higher bits from a clock counter. Lacking the direct controls custom chips, the FPGA implementation of the delay chain and register array structure had to address two major problems: (1) the logic elements used for the delay chain and register array structure must be placed and routed by the FPGA compiler in a predictable manner, to assure uniformity of the TDC binning and short-term stability. (2) The delay variation due to temperature and power supply voltage must be compensated for to assure long-term stability. They used the chain structures in the existing FPGAs that the venders designed for general purpose such as carry algorithm or logic expansion to solve the first problem. To compensate for delay variations, they studied several digital compensation strategies that can be implemented in the same FPGA device. Some bench-top test results will also be presented in this document

  11. The Programmable Logic Controller and its application in nuclear reactor systems

    Energy Technology Data Exchange (ETDEWEB)

    Palomar, J.; Wyman, R. [Lawrence Livermore National Lab., CA (United States)

    1993-09-01

    This document provides recommendations to guide reviewers in the application of Programmable Logic Controllers (PLCS) to the control, monitoring and protection of nuclear reactors. The first topics addressed are system-level design issues, specifically including safety. The document then discusses concerns about the PLC manufacturing organization and the protection system engineering organization. Supplementing this document are two appendices. Appendix A summarizes PLC characteristics. Specifically addressed are those characteristics that make the PLC more suitable for emergency shutdown systems than other electrical/electronic-based systems, as well as characteristics that improve reliability of a system. Also covered are PLC characteristics that may create an unsafe operating environment. Appendix B provides an overview of the use of programmable logic controllers in emergency shutdown systems. The intent is to familiarize the reader with the design, development, test, and maintenance phases of applying a PLC to an ESD system. Each phase is described in detail and information pertinent to the application of a PLC is pointed out.

  12. The Programmable Logic Controller and its application in nuclear reactor systems

    International Nuclear Information System (INIS)

    Palomar, J.; Wyman, R.

    1993-09-01

    This document provides recommendations to guide reviewers in the application of Programmable Logic Controllers (PLCS) to the control, monitoring and protection of nuclear reactors. The first topics addressed are system-level design issues, specifically including safety. The document then discusses concerns about the PLC manufacturing organization and the protection system engineering organization. Supplementing this document are two appendices. Appendix A summarizes PLC characteristics. Specifically addressed are those characteristics that make the PLC more suitable for emergency shutdown systems than other electrical/electronic-based systems, as well as characteristics that improve reliability of a system. Also covered are PLC characteristics that may create an unsafe operating environment. Appendix B provides an overview of the use of programmable logic controllers in emergency shutdown systems. The intent is to familiarize the reader with the design, development, test, and maintenance phases of applying a PLC to an ESD system. Each phase is described in detail and information pertinent to the application of a PLC is pointed out

  13. A flexible 32-channel time-to-digital converter implemented in a Xilinx Zynq-7000 field programmable gate array

    International Nuclear Information System (INIS)

    Wang, Yonggang; Kuang, Jie; Liu, Chong; Cao, Qiang; Li, Deng

    2017-01-01

    A high performance multi-channel time-to-digital converter (TDC) is implemented in a Xilinx Zynq-7000 field programmable gate array (FPGA). It can be flexibly configured as either 32 TDC channels with 9.9 ps time-interval RMS precision, 16 TDC channels with 6.9 ps RMS precision, or 8 TDC channels with 5.8 ps RMS precision. All TDCs have a 380 M Samples/second measurement throughput and a 2.63 ns measurement dead time. The performance consistency and temperature dependence of TDC channels are also evaluated. Because Zynq-7000 FPGA family integrates a feature-rich dual-core ARM based processing system and 28 nm Xilinx programmable logic in a single device, the realization of high performance TDCs on it will make the platform more widely used in time-measuring related applications.

  14. A flexible 32-channel time-to-digital converter implemented in a Xilinx Zynq-7000 field programmable gate array

    Energy Technology Data Exchange (ETDEWEB)

    Wang, Yonggang, E-mail: wangyg@ustc.edu.cn; Kuang, Jie; Liu, Chong; Cao, Qiang; Li, Deng

    2017-03-01

    A high performance multi-channel time-to-digital converter (TDC) is implemented in a Xilinx Zynq-7000 field programmable gate array (FPGA). It can be flexibly configured as either 32 TDC channels with 9.9 ps time-interval RMS precision, 16 TDC channels with 6.9 ps RMS precision, or 8 TDC channels with 5.8 ps RMS precision. All TDCs have a 380 M Samples/second measurement throughput and a 2.63 ns measurement dead time. The performance consistency and temperature dependence of TDC channels are also evaluated. Because Zynq-7000 FPGA family integrates a feature-rich dual-core ARM based processing system and 28 nm Xilinx programmable logic in a single device, the realization of high performance TDCs on it will make the platform more widely used in time-measuring related applications.

  15. Implementation of digital equality comparator circuit on memristive memory crossbar array using material implication logic

    Science.gov (United States)

    Haron, Adib; Mahdzair, Fazren; Luqman, Anas; Osman, Nazmie; Junid, Syed Abdul Mutalib Al

    2018-03-01

    One of the most significant constraints of Von Neumann architecture is the limited bandwidth between memory and processor. The cost to move data back and forth between memory and processor is considerably higher than the computation in the processor itself. This architecture significantly impacts the Big Data and data-intensive application such as DNA analysis comparison which spend most of the processing time to move data. Recently, the in-memory processing concept was proposed, which is based on the capability to perform the logic operation on the physical memory structure using a crossbar topology and non-volatile resistive-switching memristor technology. This paper proposes a scheme to map digital equality comparator circuit on memristive memory crossbar array. The 2-bit, 4-bit, 8-bit, 16-bit, 32-bit, and 64-bit of equality comparator circuit are mapped on memristive memory crossbar array by using material implication logic in a sequential and parallel method. The simulation results show that, for the 64-bit word size, the parallel mapping exhibits 2.8× better performance in total execution time than sequential mapping but has a trade-off in terms of energy consumption and area utilization. Meanwhile, the total crossbar area can be reduced by 1.2× for sequential mapping and 1.5× for parallel mapping both by using the overlapping technique.

  16. Experience with the use of programmable logic controllers in nuclear safety applications. Final report

    International Nuclear Information System (INIS)

    Brown, E.M.; Stofko, M.J.

    1995-03-01

    This report describes the implementation and experience with Programmable Logic Controllers (PLC) for nuclear safety applications. Two applications are described. The first is an Anticipated Transient Without Scram (ATWS) mitigation system provided as a Diverse Auxiliary Feedwater Actuation System (DAFAS). It was implemented at Arizona Public Service's Palo Verde Nuclear Generating Station and has been in commercial operation since early 1992. The second system described is an Emergency Diesel Generator Bus Load Sequencer installed at Florida Power and Light's Turkey Point Nuclear Power Plant. This system was installed as part of an upgrade to the emergency power system in 1988. The experience gained in the design, development, implementation and qualification of these systems will be beneficial to utilities that are considering the utilization of PLCs for their plant applications

  17. Saltwell PIC Skid Programmable Logic Controller (PLC) Software Configuration Management Plan

    International Nuclear Information System (INIS)

    KOCH, M.R.

    1999-01-01

    This document provides the procedures and guidelines necessary for computer software configuration management activities during the operation and maintenance phases of the Saltwell PIC Skids as required by LMH-PRO-309/Rev. 0, Computer Software Quality Assurance, Section 2.6, Software Configuration Management. The software configuration management plan (SCMP) integrates technical and administrative controls to establish and maintain technical consistency among requirements, physical configuration, and documentation for the Saltwell PIC Skid Programmable Logic Controller (PLC) software during the Hanford application, operations and maintenance. This SCMP establishes the Saltwell PIC Skid PLC Software Baseline, status changes to that baseline, and ensures that software meets design and operational requirements and is tested in accordance with their design basis

  18. PID Neural Network Based Speed Control of Asynchronous Motor Using Programmable Logic Controller

    Directory of Open Access Journals (Sweden)

    MARABA, V. A.

    2011-11-01

    Full Text Available This paper deals with the structure and characteristics of PID Neural Network controller for single input and single output systems. PID Neural Network is a new kind of controller that includes the advantages of artificial neural networks and classic PID controller. Functioning of this controller is based on the update of controller parameters according to the value extracted from system output pursuant to the rules of back propagation algorithm used in artificial neural networks. Parameters obtained from the application of PID Neural Network training algorithm on the speed model of the asynchronous motor exhibiting second order linear behavior were used in the real time speed control of the motor. Programmable logic controller (PLC was used as real time controller. The real time control results show that reference speed successfully maintained under various load conditions.

  19. Saltwell Leak Detector Station Programmable Logic Controller (PLC) Software Configuration Management Plan (SCMP)

    International Nuclear Information System (INIS)

    WHITE, K.A.

    2000-01-01

    This document provides the procedures and guidelines necessary for computer software configuration management activities during the operation and maintenance phases of the Saltwell Leak Detector Stations as required by HNF-PRO-309/Rev.1, Computer Software Quality Assurance, Section 2.4, Software Configuration Management. The software configuration management plan (SCMP) integrates technical and administrative controls to establish and maintain technical consistency among requirements, physical configuration, and documentation for the Saltwell Leak Detector Station Programmable Logic Controller (PLC) software during the Hanford application, operations and maintenance. This SCMP establishes the Saltwell Leak Detector Station PLC Software Baseline, status changes to that baseline, and ensures that software meets design and operational requirements and is tested in accordance with their design basis

  20. Local and Remote Laboratory User Experimentation Access using Digital Programmable Logic

    Directory of Open Access Journals (Sweden)

    Ian A Grout

    2005-06-01

    Full Text Available This paper will discuss the structure and operation of a programmable logic based experimentation arrangement that is suitable for both local and remote teaching and learning scenarios targeting electronic and microelectronic circuit design and test principles. With this experimentation arrangement, the ability to provide both local and Internet based “remote” access for the student and the teacher can provide a number of advantages where physical laboratory accessibility is limited and/or the learning experience must be undertaken with one or more of the parties remotely based. The paper concentrates on the design and example use of a system developed within the University of Limerick.

  1. Automated Software Acceleration in Programmable Logic for an Efficient NFFT Algorithm Implementation: A Case Study.

    Science.gov (United States)

    Rodríguez, Manuel; Magdaleno, Eduardo; Pérez, Fernando; García, Cristhian

    2017-03-28

    Non-equispaced Fast Fourier transform (NFFT) is a very important algorithm in several technological and scientific areas such as synthetic aperture radar, computational photography, medical imaging, telecommunications, seismic analysis and so on. However, its computation complexity is high. In this paper, we describe an efficient NFFT implementation with a hardware coprocessor using an All-Programmable System-on-Chip (APSoC). This is a hybrid device that employs an Advanced RISC Machine (ARM) as Processing System with Programmable Logic for high-performance digital signal processing through parallelism and pipeline techniques. The algorithm has been coded in C language with pragma directives to optimize the architecture of the system. We have used the very novel Software Develop System-on-Chip (SDSoC) evelopment tool that simplifies the interface and partitioning between hardware and software. This provides shorter development cycles and iterative improvements by exploring several architectures of the global system. The computational results shows that hardware acceleration significantly outperformed the software based implementation.

  2. Ghost in the PLC: stealth on-the-fly manipulation of programmable logic controllers’ I/O

    NARCIS (Netherlands)

    Abbasi, Ali

    2016-01-01

    Programmable Logic Controllers (PLCs) are a family of embedded devices used for physical process control. Similar to other embedded devices, PLCs are vulnerable to cyber attacks. Because they are used to control the physical processes of critical infrastructures, compromised PLCs constitute a

  3. Design techniques for a stable operation of cryogenic field-programmable gate arrays

    Science.gov (United States)

    Homulle, Harald; Visser, Stefan; Patra, Bishnu; Charbon, Edoardo

    2018-01-01

    In this paper, we show how a deep-submicron field-programmable gate array (FPGA) can be operated more stably at extremely low temperatures through special firmware design techniques. Stability at low temperatures is limited through long power supply wires and reduced performance of various printed circuit board components commonly employed at room temperature. Extensive characterization of these components shows that the majority of decoupling capacitor types and voltage regulators are not well behaved at cryogenic temperatures, asking for an ad hoc solution to stabilize the FPGA supply voltage, especially for sensitive applications. Therefore, we have designed a firmware that enforces a constant power consumption, so as to stabilize the supply voltage in the interior of the FPGA. The FPGA is powered with a supply at several meters distance, causing significant resistive voltage drop and thus fluctuations on the local supply voltage. To achieve the stabilization, the variation in digital logic speed, which directly corresponds to changes in supply voltage, is constantly measured and corrected for through a tunable oscillator farm, implemented on the FPGA. The impact of the stabilization technique is demonstrated together with a reconfigurable analog-to-digital converter (ADC), completely implemented in the FPGA fabric and operating at 15 K. The ADC performance can be improved by at most 1.5 bits (effective number of bits) thanks to the more stable supply voltage. The method is versatile and robust, enabling seamless porting to other FPGA families and configurations.

  4. Development of a protection system for research reactor based in Field Programmable Gate Array - FPGA

    International Nuclear Information System (INIS)

    Martins, Roque Hudson da Silva

    2016-01-01

    This study presents a implementation purpose of a protection system for research nuclear reactors by using a programed device FPGA (Field Programmable Gate Array). As well as logic protection method involved on an automatic shutdown (TRIP) of a reactor, that ensure the security on such systems. These new control and operation mechanics are developed to guarantee that the security limits of a power plant are not exceeded, these mechanics can work isolated or in groups to safe guard the security levels. For this implementation to be completed, there will be presented the main aspects and concepts referred to protection systems, mostly about research nuclear reactors, with some applications terms exposed. The system proposed at this paper was developed following the VHDL (Very High Speed Integrated Circuits) hardware describing language, and the Modelsim software from Altera Software to program the automatic turning off routines, and hypothetical simulations for such. The results show that for every software application for supporting nuclear reactors, like security devices, they have to meet the IEC 60880 criteria. This paper have great importance, seeing that nuclear reactor security systems, are a basic element for ensure the reactor security. (author)

  5. Design of a Tritium-in-air-monitor using field programmable gate arrays

    International Nuclear Information System (INIS)

    McNelles, Phillip; Lu, Lixuan

    2015-01-01

    Field Programmable Gate Arrays (FPGAs) have recently garnered significant interest for certain applications within the nuclear field. Some applications of these devices include Instrumentation and Control (I and C) systems, pulse measurement systems, particle detectors and health physics purposes. In CANada Deuterium Uranium (CANDU) nuclear power plants, the use of heavy water (D2O) as the moderator leads to the increased production of Tritium, which poses a health risk and must be monitored by Tritium-In-Air Monitors (TAMs). Traditional TAMs are mostly designed using microprocessors. More recent studies show that FPGAs could be a potential alternative to implement the electronic logic used in radiation detectors, such as the TAM, more effectively. In this paper, an FPGA-based TAM is designed and constructed in a laboratory setting using an FPGA-based cRIO system. New functionalities, such as the detection of Carbon-14 and the addition of noble gas compensation are incorporated into a new FPGA-based TAM. Additionally, all of the standard functions included in the original microprocessor-based TAM, such as tritium detection, gamma compensation, pump and air flow control, and background and thermal drift corrections were also implemented. The effectiveness of the new design is demonstrated through simulations as well as laboratory testing on the prototype system. (author)

  6. Field Programmable Gate Array Control of Power Systems in Graduate Student Laboratories

    National Research Council Canada - National Science Library

    O'Connor, Joseph E

    2008-01-01

    ...) continuously develops new design and education resources for students. One area of focus for students in the Power Electronics curriculum track is the development of a design center that explores Field Programmable Gate Array (FPGA...

  7. Special Technology Area Review on Field Programmable Gate Arrays (FPGAs) For Military Applications

    National Research Council Canada - National Science Library

    2005-01-01

    ...) on Field Programmable Gate Arrays (FPGAs) for Military Applications on August 3-4, 2004 at the Naval Postgraduate School in Monterey, California to address issues relevant to the use of this technology in military systems...

  8. PENGEMBANGAN PERANGKAT PEMBELAJARAN MEKATRONIKA BERBASIS KOMPUTER POKOK BAHASAN PROGRAMMABLE LOGIC CONTROLLER BERORIENTASI PADA PEMBELAJARAN LANGSUNG

    Directory of Open Access Journals (Sweden)

    Wahyu Dwi Kurniawan

    2015-02-01

    Program Logic Controller is subject that many complaints by students of Department of Mechanical Engineering FT-Unesa. This is due to the lack of learning devices are used so that learning becomes less favorable and become passive. This study aims to develop computer-based learning device mechatronics subject-oriented programmable logic controller directly on student learning Mechanical Engineering Department Unesa FT. This study was conducted in two phases. Phase I, the development of the learning refers to the design of the Model 4D Thiagarajan (1974, Phase II, trial learning in the classroom using a design of one group pretest-posttest design. The findings of the study: (1 an average score of 3.32 learning assessment tools (pretty good, (2 average scores on tests of learning implementation I of 3.59 (good and trials II of 3.70 (both , (3 student learning outcomes of cognitive and psychomotor aspects have achieved individually and classical mastery, (4 students showed a positive response to the stated learning tehadap interested, excited, and motivated to attend lectures mechatronics; activity of the most dominant college students are discussin /practices relevant to teaching and learning that is on trial I is 36.46% and trials II 38.19%. Based on the analysis of data, it can be concluded that the developed learning feasible for use in lectures mechatronics. Implementation of the computer-based learning mechatronics subjects PLC can improve the quality of teaching and learning, as students showed a positive response, implementation category learning and learning outcomes both cognitive and psychomotor aspects of students have achieved mastery individually and classical. Keywords: development, learning, mechatronics, computer, plc

  9. Control Systems of Rubber Dryer Machinery Components Using Programmable Logic Control (PLC)

    Science.gov (United States)

    Hendra; Yulianto, A. S.; Indriani, A.; Hernadewita; Hermiyetti

    2018-02-01

    Application of programmable logic control (PLC) is widely used on the control systems in the many field engineering such as automotive, aviation, food processing and other industries [1-2]. PLC is simply program to control many automatic activity, easy to use, flexible and others. PLC using the ladder program to solve and regulated the control system component. In previous research, PLC was used for control system of rotary dryer machine. In this paper PLC are used for control system of motion component in the rubber dryer machinery. Component of rubber dryer machine is motors, gearbox, sprocket, heater, drying chamber and bearing. Principle working of rubber dryer machinery is wet rubber moving into the drying chamber by sprocket. Sprocket is driven by motors that conducted by PLC to moving and set of wet rubber on the drying chamber. Drying system uses greenhouse effect by making hanger dryer design in the form of line path. In this paper focused on motion control system motors and sensors drying rubber using PLC. The results show that control system of rubber dryer machinery can work in accordance control input and the time required to dry the rubber.

  10. Methods of software V and V for a programmable logic controller in NPPs

    International Nuclear Information System (INIS)

    Kim, Jang Yeol; Lee, Young Jun; Cha, Kyung Ho; Cheon, Se Woo; Son, Han Seong; Lee, Jang Soo; Kwon, Kee Choon

    2004-01-01

    This paper addresses the Verification and Validation (V and V) process and methodology for embedded real time software of a safety-grade Programmable Logic Controller(PLC). This safety-grade PLC is being developed in the Korea Nuclear Instrumentation and Control System (KNICS) projects. KNICS projects are developing a Reactor Protection System(RPS) and an Engineered Safety Feature-Component Control System (ESF-CCS) as well as safety-grade PLC. Safety-grade PLC will be a major component that composes the RPS systems and ESF-CCS systems as nuclear instruments and control equipments. This paper describes the V and V guidelines and procedure, V and V environment, V and V process and methodology, and the V and V tools by the KNICS projects. Specially, it describes the real-time operating system V and V experience which corresponds to the requirement analysis phase of the software development life cycle. Main activities of the real-time operating system Software Requirement Specification(SRS) V and V of the PLC are the technical evaluation, licensing suitability evaluation, inspection and traceability analysis, formal verification, software safety analysis, and software configuration management. The proposed V and V methodology satisfies the Standard Review Plan(SRP)/Branch Technical Position(BTP)-14(MOST-KSRG 7/Appendix 15 in Korea will be issued soon) criteria for the safety software in nuclear power plants. The proposed V and V methodology is going to verify the upcoming software life cycle in the KNICS projects. (author)

  11. V and V methods of a safety-critical software for a programmable logic controller

    Energy Technology Data Exchange (ETDEWEB)

    Kim, Jang Yeol; Lee, Young Jun; Cha, Kyung Ho; Cheon, Se Woo; Lee, Jang Soo; Kwon, Kee Choon [Korea Atomic Energy Research Institute, Daejeon (Korea, Republic of); Kong, Seung Ju [Korea Hydro and Nuclear Power Co., Ltd, Daejeon (Korea, Republic of)

    2005-11-15

    This paper addresses the Verification an Validation(V and V) process and the methodology for an embedded real time software of a safety-grade Programmable Logic Controller(PLC). This safety-grade PLC is being developed as one of the Korean Nuclear Instrumentation and Control System(KNICS) project KNICS projects are developing a Reactor Protection System(RPS) and an Engineered Safety Feature-Component Control System(ESF-CCS) as well as a safety-grade PLC. The safety-grade PLC will be a major component that encomposes the RPS systems and the ESF-CCS systems as nuclear instruments and control equipment. This paper describes the V and V guidelines an procedures, V and V environment, V and V process and methodology, and the V and V tools in the KNICS projects. Specifically, it describes the real-time operating system V and V experience which corresponds to the requirement analysis phase, design phase and the implementation and testing phase of the software development life cycle. Main activities of the V and V for the PLC system software are a technical evaluation, licensing suitability evaluation, inspection and traceability analysis, formal verification, software safety analysis, and a software configuration management. The proposed V and V methodology satisfies the Standard Review Plan(SRP)/Branch Technical Position(BTP)-14 criteria for the safety software in nuclear power plants. The proposed V and V methodology is going to be used to verify the upcoming software life cycle in the KNICS projects.

  12. Software V and V methods for a safety - grade programmable logic controller

    International Nuclear Information System (INIS)

    Jang Yeol Kim; Young Jun Lee; Kyung Ho Cha; Se Woo Cheon; Jang Soo Lee; Kee Choon Kwon

    2006-01-01

    This paper addresses the Verification and Validation(V and V) process and the methodology for an embedded real time software of a safety-grade Programmable Logic Controller(PLC). This safety- grade PLC is being developed as one of the Korean Nuclear Instrumentation and Control System (KNICS) projects. KNICS projects are developing a Reactor Protection System(RPS) and an Engineered Safety Feature-Component Control System(ESF-CCS) as well as a safety-grade PLC. The safety-grade PLC will be a major component that encomposes the RPS systems and the ESF-CCS systems as nuclear instruments and control equipment. This paper describes the V and V guidelines and procedures, V and V environment, V and V process and methodology, and the V and V tools in the KNICS projects. Specifically, it describes the real-time operating system V and V experience which corresponds to the requirement analysis phase, design phase and the implementation and testing phase of the software development life cycle. Main activities of the V and V for the PLC system software are a technical evaluation, licensing suitability evaluation, inspection and traceability analysis, formal verification, software safety analysis, and a software configuration management. The proposed V and V methodology satisfies the Standard Review Plan(SRP)/Branch Technical Position(BTP)-14 criteria for the safety software in nuclear power plants. The proposed V and V methodology is going to be used to verify the upcoming software life cycle in the KNICS projects. (author)

  13. V and V methods of a safety-critical software for a programmable logic controller

    International Nuclear Information System (INIS)

    Kim, Jang Yeol; Lee, Young Jun; Cha, Kyung Ho; Cheon, Se Woo; Lee, Jang Soo; Kwon, Kee Choon; Kong, Seung Ju

    2005-01-01

    This paper addresses the Verification an Validation(V and V) process and the methodology for an embedded real time software of a safety-grade Programmable Logic Controller(PLC). This safety-grade PLC is being developed as one of the Korean Nuclear Instrumentation and Control System(KNICS) project KNICS projects are developing a Reactor Protection System(RPS) and an Engineered Safety Feature-Component Control System(ESF-CCS) as well as a safety-grade PLC. The safety-grade PLC will be a major component that encomposes the RPS systems and the ESF-CCS systems as nuclear instruments and control equipment. This paper describes the V and V guidelines an procedures, V and V environment, V and V process and methodology, and the V and V tools in the KNICS projects. Specifically, it describes the real-time operating system V and V experience which corresponds to the requirement analysis phase, design phase and the implementation and testing phase of the software development life cycle. Main activities of the V and V for the PLC system software are a technical evaluation, licensing suitability evaluation, inspection and traceability analysis, formal verification, software safety analysis, and a software configuration management. The proposed V and V methodology satisfies the Standard Review Plan(SRP)/Branch Technical Position(BTP)-14 criteria for the safety software in nuclear power plants. The proposed V and V methodology is going to be used to verify the upcoming software life cycle in the KNICS projects

  14. A Case Study on Cyber-security Program for the Programmable Logic Controller of Modern NPPs

    International Nuclear Information System (INIS)

    Song, S. H.; Lee, M. S.; Kim, T. H.; Park, C. H.; Park, S. P.; Kim, H. S.

    2014-01-01

    As instrumentation and control (I and C) systems for modern Nuclear Power Plants (NPPs) have been digitalized to cope with their growing complexity, the cyber-security has become an important issue. To protect the I and C systems adequately from cyber threats, such as Stuxnet that attacked Iran's nuclear facilities, regulations of many countries require a cyber-security program covering all the life cycle phases of the system development, from the concept to the retirement. This paper presents a case study of cyber-security program that has been performed during the development of the programmable logic controller (PLC) for modern NPPs of Korea. In the case study, a cyber-security plan, including technical, management, and operational controls, was established through a security risk assessment. Cyber-security activities, such as development of security functions and periodic inspections, were conducted according to the plan: the security functions were applied to the PLC as the technical controls, and periodic inspections and audits were held to check the security of the development environment, as the management and operational controls. A final penetration test was conducted to inspect all the security problems that had been issued during the development. The case study has shown that the systematic cyber-security program detected and removed the vulnerabilities of the target system, which could not be found otherwise, enhancing the cyber-security of the system

  15. A Case Study on Cyber-security Program for the Programmable Logic Controller of Modern NPPs

    Energy Technology Data Exchange (ETDEWEB)

    Song, S. H. [Korea University, Seoul (Korea, Republic of); Lee, M. S.; Kim, T. H. [Formal Work Inc., Seoul (Korea, Republic of); Park, C. H. [LINE Corp., Tokyo (Japan); Park, S. P. [Ahnlab Inc., Seoul (Korea, Republic of); Kim, H. S. [Sejong University, Seoul (Korea, Republic of)

    2014-08-15

    As instrumentation and control (I and C) systems for modern Nuclear Power Plants (NPPs) have been digitalized to cope with their growing complexity, the cyber-security has become an important issue. To protect the I and C systems adequately from cyber threats, such as Stuxnet that attacked Iran's nuclear facilities, regulations of many countries require a cyber-security program covering all the life cycle phases of the system development, from the concept to the retirement. This paper presents a case study of cyber-security program that has been performed during the development of the programmable logic controller (PLC) for modern NPPs of Korea. In the case study, a cyber-security plan, including technical, management, and operational controls, was established through a security risk assessment. Cyber-security activities, such as development of security functions and periodic inspections, were conducted according to the plan: the security functions were applied to the PLC as the technical controls, and periodic inspections and audits were held to check the security of the development environment, as the management and operational controls. A final penetration test was conducted to inspect all the security problems that had been issued during the development. The case study has shown that the systematic cyber-security program detected and removed the vulnerabilities of the target system, which could not be found otherwise, enhancing the cyber-security of the system.

  16. Design and Simulation of Automatic Ballast System on Catamaran Ship Based on Programmable Logic Control

    Directory of Open Access Journals (Sweden)

    Indra Ranu Kusuma

    2017-06-01

    Full Text Available Characteristics of catamaran ship which has deficiency to ship stability during maneuvering. to that end, this paper concerns about ballast system design in support of the safety and comfort of passengers on the catamaran boat. the discussion is done by creating a mathematical model of each component in the block diagram of the ballast system. then determine the pid value of the system and add the compensator for the system to run stable. further analyzed with the help of matlab software to get transient system response. with the automation system on the ballast system, it is expected that the motion of the ship can work automatically and provide a better response in the stability of the catamaran type ship. the ballast system begins to work against the tilt of the ship at 6.7 seconds at a certain angle, and will continue to work during the vessel maneuvering. judging from the 6.7 second system response time, the convenience of the passengers is not disturbed (the system response is not too fast. one way to reduce the rolling that occurs on the ship is to optimize the performance of the ballast system. performance optimization is done by using programmable logic controller (plc. plc used is omron cpm1a-30cdr-a-v1. the process is done by making the installation plant model of the ballast system as a control medium. followed by creating a control circuit consisting of wiring i / o, limit switch circuits, power supplies and programming languages associated with plcs. the result of the control is expected to regulate fluid flow in the ballast system automatically resulting in a rapid response to the stability of the ship.

  17. D0 General Support: The Use of Programmable Logic Controllers (PLCs) at D0

    International Nuclear Information System (INIS)

    Hance, R.

    2000-01-01

    With the exception of control of heating, ventilation, and air conditioning (HVAC) ventilation fans, and their shutdown in the case of smoke in the ducts, all implementations of Programmable Logic Controllers (PLCs) in Dzero have been made within the fundamental premise that no uncertified PLC apparatus shall be entrusted with the safety of equipment or personnel. Thus although PLCs are used to control and monitor all manner of intricate equipment, simple hardware interlocks and relief devices provide basic protection against component failure, control failure, or inappropriate control operation. Nevertheless, this report includes two observations as follows: (1) It may be prudent to reconfigure the link between the Pyrotronics system and the HVAC system such that the Pyrotronics system provides interlocks to the ventilation fans instead of control inputs to the uncertified HVAC PLCs. Although the Pyrotronics system is certified and maintained to life safety standards, the HVAC system is not. A hardware or software failure of the HVAC system probably should not be allowed to result in the situation where the ventilation fans in a smoke filled duct continue to operate. Dan Markley is investigating this matter. (2) It may also be prudent to examine the network security of those systems connected to the Fermilab WAN (HVAC, Cryo, and Solenoid Controls). Even though the impact of a successful hack might only be to operations, it might nevertheless be disruptive and could be expensive. The risks should perhaps be analyzed. One of the most attractive features of these systems, from a user's viewpoint, is their unlimited networking. The unlimited networking that makes the systems so convenient to legitimate access also makes them vulnerable to illegitimate access.

  18. A Soft Computing Approach to Crack Detection and Impact Source Identification with Field-Programmable Gate Array Implementation

    Directory of Open Access Journals (Sweden)

    Arati M. Dixit

    2013-01-01

    Full Text Available The real-time nondestructive testing (NDT for crack detection and impact source identification (CDISI has attracted the researchers from diverse areas. This is apparent from the current work in the literature. CDISI has usually been performed by visual assessment of waveforms generated by a standard data acquisition system. In this paper we suggest an automation of CDISI for metal armor plates using a soft computing approach by developing a fuzzy inference system to effectively deal with this problem. It is also advantageous to develop a chip that can contribute towards real time CDISI. The objective of this paper is to report on efforts to develop an automated CDISI procedure and to formulate a technique such that the proposed method can be easily implemented on a chip. The CDISI fuzzy inference system is developed using MATLAB’s fuzzy logic toolbox. A VLSI circuit for CDISI is developed on basis of fuzzy logic model using Verilog, a hardware description language (HDL. The Xilinx ISE WebPACK9.1i is used for design, synthesis, implementation, and verification. The CDISI field-programmable gate array (FPGA implementation is done using Xilinx’s Spartan 3 FPGA. SynaptiCAD’s Verilog Simulators—VeriLogger PRO and ModelSim—are used as the software simulation and debug environment.

  19. Neuron array with plastic synapses and programmable dendrites.

    Science.gov (United States)

    Ramakrishnan, Shubha; Wunderlich, Richard; Hasler, Jennifer; George, Suma

    2013-10-01

    We describe a novel neuromorphic chip architecture that models neurons for efficient computation. Traditional architectures of neuron array chips consist of large scale systems that are interfaced with AER for implementing intra- or inter-chip connectivity. We present a chip that uses AER for inter-chip communication but uses fast, reconfigurable FPGA-style routing with local memory for intra-chip connectivity. We model neurons with biologically realistic channel models, synapses and dendrites. This chip is suitable for small-scale network simulations and can also be used for sequence detection, utilizing directional selectivity properties of dendrites, ultimately for use in word recognition.

  20. DBPM signal processing with field programmable gate arrays

    International Nuclear Information System (INIS)

    Lai Longwei; Yi Xing; Zhang Ning; Yang Guisen; Wang Baopeng; Xiong Yun; Leng Yongbin; Yan Yingbing

    2011-01-01

    DBPM system performance is determined by the design and implementation of beam position signal processing algorithm. In order to develop the system, a beam position signal processing algorithm is implemented on FPGA. The hardware is a PMC board ICS-1554A-002 (GE Corp.) with FPGA chip XC5VSX95T. This paper adopts quadrature frequency mixing to down convert high frequency signal to base. Different from conventional method, the mixing is implemented by CORDIC algorithm. The algorithm theory and implementation details are discussed in this paper. As the board contains no front end gain controller, this paper introduces a published patent-pending technique that has been adopted to realize the function in digital logic. The whole design is implemented with VHDL language. An on-line evaluation has been carried on SSRF (Shanghai Synchrotron Radiation Facility)storage ring. Results indicate that the system turn-by-turn data can measure the real beam movement accurately,and system resolution is 1.1μm. (authors)

  1. Programmable combinational logic trigger system for high energy particle physics experiments

    International Nuclear Information System (INIS)

    Platner, E.D.

    1976-01-01

    A fast logic system designed to select predetermined combinations of three hits in three detectors is described. Central to this system is a random access memory IC that was especially designed for this application

  2. Biological applications of an LCoS-BASED PROGRAMMABLE ARRAY MICROSCOPE (PAM)

    NARCIS (Netherlands)

    Hagen, G.M.; Caarls, W.; Thomas, M.; Hill, A.; Lidke, K.A.; Rieger, B.; Fritsch, C.; Van Geest, B.; Jovin, T.M.; Arndt-Jovin, D.J.

    2007-01-01

    We report on a new generation, commercial prototype of a programmable array optical sectioning fluorescence microscope (PAM) for rapid, light efficient 3D imaging of living specimens. The stand-alone module, including light source(s) and detector(s), features an innovative optical design and a

  3. Use of advanced programmable logic controllers to monitor and control the Elmo Bumpy Torus-proof-of-principle device

    International Nuclear Information System (INIS)

    Boyd, B.A.

    1983-01-01

    The Elmo Bumpy Torus - Proof-of-Principle (EBT-P) device is designed with an instrumentation and control system based upon the use of an advanced Programmable Logic Controller (PLC). The modern PLC incorporates many advanced programming features not available in earlier PLC's intended for application to conventional relay logic replacement. The additional power and flexibility of these modern PLC's is especially applicable to an experimental device such as EBT-P which is made up of several complex interrelated subsystems whose operational characteristics will be evolving throughout the lifetime of the device. The rationale for the selection of advanced PLC's for EBT-P and the approach taken to design of the software developed to control EBT-P are the topics addressed in this paper

  4. System design specification for rotary mode core sample trucks No. 2, 3, and 4 programmable logic controller

    International Nuclear Information System (INIS)

    Dowell, J.L.; Akers, J.C.

    1995-01-01

    The system this document describes controls several functions of the Core Sample Truck(s) used to obtain nuclear waste samples from various underground storage tanks at Hanford. The system will monitor the sampling process and provide alarms and other feedback to insure the sampling process is performed within the prescribed operating envelope. The intended audience for this document is anyone associated with rotary or push mode core sampling. This document describes the Alarm and Control logic installed on Rotary Mode Core Sample Trucks (RMCST) number-sign 2, 3, and 4. It is intended to define the particular requirements of the RMCST alarm and control operation (not defined elsewhere) sufficiently for detailed design to implement on a Programmable Logic Controller (PLC)

  5. Implementation of data acquisition interface using on-board field-programmable gate array (FPGA) universal serial bus (USB) link

    International Nuclear Information System (INIS)

    Nolida Yussup; Maslina Mohd Ibrahim; Lojius Lombigit; Nur Aira Abdul Rahman; Muhammad Rawi Mohamed Zin

    2013-01-01

    Full-text: Typically a system consists of hardware as the controller and software which is installed in the personal computer (PC). In the effective nuclear detection, the hardware involves the detection setup and the electronics used, with the software consisting of analysis tools and graphical display on PC. A data acquisition interface is necessary to enable the communication between the controller hardware and PC. Nowadays, Universal Serial Bus (USB) has become a standard connection method for computer peripherals and has replaced many varieties of serial and parallel ports. However the implementation of USB is complex. This paper describes the implementation of data acquisition interface between a field-programmable gate array (FPGA) board and a PC by exploiting the USB link of the FPGA board. The USB link is based on an FTDI chip which allows direct access of input and output to the Joint Test Action Group (JTAG) signals from a USB host and a complex programmable logic device (CPLD) with a 24 MHz clock input to the USB link. The implementation and results of using the USB link of FPGA board as the data interfacing are discussed. (author)

  6. Implementation of data acquisition interface using on-board field-programmable gate array (FPGA) universal serial bus (USB) link

    International Nuclear Information System (INIS)

    Yussup, N.; Ibrahim, M. M.; Lombigit, L.; Rahman, N. A. A.; Zin, M. R. M.

    2014-01-01

    Typically a system consists of hardware as the controller and software which is installed in the personal computer (PC). In the effective nuclear detection, the hardware involves the detection setup and the electronics used, with the software consisting of analysis tools and graphical display on PC. A data acquisition interface is necessary to enable the communication between the controller hardware and PC. Nowadays, Universal Serial Bus (USB) has become a standard connection method for computer peripherals and has replaced many varieties of serial and parallel ports. However the implementation of USB is complex. This paper describes the implementation of data acquisition interface between a field-programmable gate array (FPGA) board and a PC by exploiting the USB link of the FPGA board. The USB link is based on an FTDI chip which allows direct access of input and output to the Joint Test Action Group (JTAG) signals from a USB host and a complex programmable logic device (CPLD) with a 24 MHz clock input to the USB link. The implementation and results of using the USB link of FPGA board as the data interfacing are discussed

  7. Operating experiences with programmable logic controller (PLC) system of Indian Pressurised Heavy Water Reactors (PHWR)

    International Nuclear Information System (INIS)

    Ughade, A.V.; Singh, Ranjeet; Bhattacharya, P.K.; Kulkarni, R.K.; Chandra, Umesh

    2005-01-01

    PLC system was introduced for the first time in Kaiga-1,2 and RAPS-3,4 Nuclear Power Plants (NPPs) for Station Logic Control of Non Safety Related (NSR) and Safety related (SR) systems. However, the safety system logics are still relay based. The experience on the deployment of PLC system, which is computer-based, has brought out various implementation issues. This paper give details of such experiences, the solutions emerged and applied for plants under operation/construction. (author)

  8. A test system and supervisory control and data acquisition application with programmable logic controller for thermoelectric generators

    International Nuclear Information System (INIS)

    Ahiska, Rasit; Mamur, Hayati

    2012-01-01

    Highlights: ► A new TEG test measurement system with the PLC has been carried out. ► A new SCADA program has been written and tested for the test measurement system. ► An operator panel has been used for monitoring to the instant TEG data. ► All of the measurement data of TEG have been aggregated in the system. - Abstract: In this study, a new test measurement system and supervisory control and data acquisition application with programmable logic controller has been carried out to be enable the collection of the data of thermoelectric generator for the usage of thermoelectric modules as thermoelectric generator. During the production of the electric energy from the thermoelectric generator, the temperatures of the surfaces of the thermoelectric generator, current–voltage values obtained from output of the thermoelectric generator, hot and cold flows have been measured by the newly established system instantly. All these data have been monitored continuously from the computer and recorded by a supervisory control and data acquisition program. At the same time, in environments where there was no computer, an operator panel with the ability to communicate with the programmable logic controller has been added for the monitoring of the instant thermoelectric generator data. All of the measurement data of the thermoelectric generator have been aggregated in the new test measurement and supervisory control and data acquisition system. The setup test measurement system has been implemented on the thermoelectric generator system with about 10 W. Thermoelectric generators, Altec-GM-1 brand-coded have been examined by the new proposed test measurement system and the values of maximum power and thermoelectric generator efficiency were calculated by the programmable logic controller. When the obtained results were compared with the datasheets, the relative error for the maximum power was around 4% and the value for efficiency was below 3%.

  9. Developing and Optimising the Use of Logic Models in Systematic Reviews: Exploring Practice and Good Practice in the Use of Programme Theory in Reviews.

    Science.gov (United States)

    Kneale, Dylan; Thomas, James; Harris, Katherine

    2015-01-01

    Logic models are becoming an increasingly common feature of systematic reviews, as is the use of programme theory more generally in systematic reviewing. Logic models offer a framework to help reviewers to 'think' conceptually at various points during the review, and can be a useful tool in defining study inclusion and exclusion criteria, guiding the search strategy, identifying relevant outcomes, identifying mediating and moderating factors, and communicating review findings. In this paper we critique the use of logic models in systematic reviews and protocols drawn from two databases representing reviews of health interventions and international development interventions. Programme theory featured only in a minority of the reviews and protocols included. Despite drawing from different disciplinary traditions, reviews and protocols from both sources shared several limitations in their use of logic models and theories of change, and these were used almost unanimously to solely depict pictorially the way in which the intervention worked. Logic models and theories of change were consequently rarely used to communicate the findings of the review. Logic models have the potential to be an aid integral throughout the systematic reviewing process. The absence of good practice around their use and development may be one reason for the apparent limited utility of logic models in many existing systematic reviews. These concerns are addressed in the second half of this paper, where we offer a set of principles in the use of logic models and an example of how we constructed a logic model for a review of school-based asthma interventions.

  10. Peptide Logic Circuits Based on Chemoenzymatic Ligation for Programmable Cell Apoptosis.

    Science.gov (United States)

    Li, Yong; Sun, Sujuan; Fan, Lin; Hu, Shanfang; Huang, Yan; Zhang, Ke; Nie, Zhou; Yao, Shouzhou

    2017-11-20

    A novel and versatile peptide-based bio-logic system capable of regulating cell function is developed using sortase A (SrtA), a peptide ligation enzyme, as a generic processor. By modular peptide design, we demonstrate that mammalian cells apoptosis can be programmed by peptide-based logic operations, including binary and combination gates (AND, INHIBIT, OR, and AND-INHIBIT), and a complex sequential logic circuit (multi-input keypad lock). Moreover, a proof-of-concept peptide regulatory circuit was developed to analyze the expression profile of cell-secreted protein biomarkers and trigger cancer-cell-specific apoptosis. © 2017 Wiley-VCH Verlag GmbH & Co. KGaA, Weinheim.

  11. Design of digital logic control for accelerator magnet power supply

    International Nuclear Information System (INIS)

    Long Fengli; Hu Wei; Cheng Jian

    2008-01-01

    For the accelerator magnet power supply, usually the Programmable Logic Controller (PLC) is used to server as the controller for logic protection and control. Along with the development of modern accelerator technology, it is a trend to use fully-digital control to the magnet power supply. It is possible to integrate the logic control part into the digital control component of the power supply, for example, the Field Programmable Gate Array (FPGA). The paper introduces to different methods which are designed for the logic protection and control for accelerator magnet power supplies with the FPGA as the control component. (authors)

  12. Development of a fast time-to-digital converter (TDC) using a programmable gate array

    International Nuclear Information System (INIS)

    Mine, Shun-ichi; Tokushuku, Katsuo; Yamada, Sakue.

    1994-09-01

    A fast time-to-digital converter with a 5 ns step was designed and tested by utilizing a user-programmable gate array. The stabilities against temperature and supply voltage variation were measured. A module was built with this TDC, and was successfully used in the first-level trigger system of the ZEUS detector to reject proton-beam induced background events. (author)

  13. NEPP Update of Independent Single Event Upset Field Programmable Gate Array Testing

    Science.gov (United States)

    Berg, Melanie; Label, Kenneth; Campola, Michael; Pellish, Jonathan

    2017-01-01

    This presentation provides a NASA Electronic Parts and Packaging (NEPP) Program update of independent Single Event Upset (SEU) Field Programmable Gate Array (FPGA) testing including FPGA test guidelines, Microsemi RTG4 heavy-ion results, Xilinx Kintex-UltraScale heavy-ion results, Xilinx UltraScale+ single event effect (SEE) test plans, development of a new methodology for characterizing SEU system response, and NEPP involvement with FPGA security and trust.

  14. Development of a protection system for research reactor based in Field Programmable Gate Array - FPGA; Desenvolvimento de sistema de protecao para reator nuclear de pesquisa baseado em Field Programmable Gate Array - FPGA

    Energy Technology Data Exchange (ETDEWEB)

    Martins, Roque Hudson da Silva

    2016-07-01

    This study presents a implementation purpose of a protection system for research nuclear reactors by using a programed device FPGA (Field Programmable Gate Array). As well as logic protection method involved on an automatic shutdown (TRIP) of a reactor, that ensure the security on such systems. These new control and operation mechanics are developed to guarantee that the security limits of a power plant are not exceeded, these mechanics can work isolated or in groups to safe guard the security levels. For this implementation to be completed, there will be presented the main aspects and concepts referred to protection systems, mostly about research nuclear reactors, with some applications terms exposed. The system proposed at this paper was developed following the VHDL (Very High Speed Integrated Circuits) hardware describing language, and the Modelsim software from Altera Software to program the automatic turning off routines, and hypothetical simulations for such. The results show that for every software application for supporting nuclear reactors, like security devices, they have to meet the IEC 60880 criteria. This paper have great importance, seeing that nuclear reactor security systems, are a basic element for ensure the reactor security. (author)

  15. Toward Automating Web Protocol Configuration for a Programmable Logic Controller Emulator

    Science.gov (United States)

    2014-06-19

    Security Risks for Industrial Control Systems ,” VDE 2004 Congress, Berlin, Germany, October 2004, pp. 1-7. [Cis12] Cisco, NetFlow Configuration Guide...Date 29 May 2014 Date AFIT-ENG-T-14-J-4 Abstract Industrial Control Systems (ICS) remain vulnerable through attack vectors that exist within programmable...5 2.2 Industrial Control Systems

  16. Modeling and Simulation of a Non-Coherent Frequency Shift Keying Transceiver Using a Field Programmable Gate Array (FPGA)

    National Research Council Canada - National Science Library

    Voskakis, Konstantinos

    2008-01-01

    ...) receiver-transmitter in a Field Programmable Gate Array (FPGA). After introducing the theory behind the Non- Coherent BFSK demodulation implemented at the receiver, the design of transmitter and receiver is illustrated...

  17. Three-channel phase meters based on the AD8302 and field programmable gate arrays for heterodyne millimeter wave interferometer

    Czech Academy of Sciences Publication Activity Database

    Varavin, A.V.; Ermak, G.P.; Vasiliev, A.S.; Fateev, A.V.; Varavin, Mykyta; Žáček, František; Zajac, Jaromír

    2016-01-01

    Roč. 75, č. 11 (2016), s. 1009-1025 ISSN 0040-2508 Institutional support: RVO:61389021 Keywords : AD8302 * Interferometer * Millimeter wave * Phase meter * Programmable gate array * Tokamak Subject RIV: BL - Plasma and Gas Discharge Physics

  18. Data acquisition and control system with a programmable logic controller (PLC) for a pulsed chemical oxygen-iodine laser

    Science.gov (United States)

    Yu, Haijun; Li, Guofu; Duo, Liping; Jin, Yuqi; Wang, Jian; Sang, Fengting; Kang, Yuanfu; Li, Liucheng; Wang, Yuanhu; Tang, Shukai; Yu, Hongliang

    2015-02-01

    A user-friendly data acquisition and control system (DACS) for a pulsed chemical oxygen -iodine laser (PCOIL) has been developed. It is implemented by an industrial control computer,a PLC, and a distributed input/output (I/O) module, as well as the valve and transmitter. The system is capable of handling 200 analogue/digital channels for performing various operations such as on-line acquisition, display, safety measures and control of various valves. These operations are controlled either by control switches configured on a PC while not running or by a pre-determined sequence or timings during the run. The system is capable of real-time acquisition and on-line estimation of important diagnostic parameters for optimization of a PCOIL. The DACS system has been programmed using software programmable logic controller (PLC). Using this DACS, more than 200 runs were given performed successfully.

  19. Multi Channels PWM Controller for Thermoelectric Cooler Using a Programmable Logic Device and Lab-Windows CVI

    Directory of Open Access Journals (Sweden)

    Eli FLAXER

    2008-09-01

    Full Text Available We present a complete design of a multi channels PID controller for Thermoelectric Cooler (TEC using a pulse width modulation (PWM technique implemented by a dedicated programmable logic device (PLD programmed by VHDL. The PID control loop is implemented by software written by National Instrument Lab-Windows CVI. Due to the fact that the implementation is by a VHDL and PLD the design is modular, as a result, the circuit is very compact in size and very low cost as compared to any commercial product. In addition, since the control loop is implemented by software running on a personal computer (PC using a C language, it is easy to adjust the controller to various environmental conditions and for a width range of sensors like: a thermo couple (TC, thermistor, resistance temperature detectors (RTD etc. We demonstrate the performance of this circuit as a controller for a small incubator using thermistor as the temperature sensor.

  20. Failure mode taxonomy for assessing the reliability of Field Programmable Gate Array based Instrumentation and Control systems

    International Nuclear Information System (INIS)

    McNelles, Phillip; Zeng, Zhao Chang; Renganathan, Guna; Chirila, Marius; Lu, Lixuan

    2017-01-01

    Highlights: • The use FPGAs in I&C systems in Nuclear Power Plants is an important issue (IAEA). • OECD-NEA published a failure mode taxonomy for software-based digital I&C systems. • This paper extends the OECD-NEA taxonomy to model FPGA-based systems. • FPGA failure modes, failure effects, uncovering methods are categorized/described. • Provides an example of modelling an FPGA-Based RTS/ESFAS using the FPGA taxonomy. - Abstract: Field Programmable Gate Arrays (FPGAs) are a form of programmable digital hardware configured to perform digital logic functions. This configuration (programming) is performed using Hardware Description Language (HDL), making FPGAs a form of HDL Programmed Device (HPD). In the nuclear field, FPGAs have seen use in upgrades and replacements of obsolete Instrumentation and Control (I&C) systems. This paper expands upon previous work that resulted in extensive FPGA failure mode data, to allow for the application of the OECD-NEA failure modes taxonomy. The OECD-NEA taxonomy presented a method to model digital (software-based) I&C systems, based on the hardware and software failure modes, failure uncovering effects and levels of abstraction, using a Reactor Trip System/Engineering Safety Feature Actuation System (RTS/ESFAS) as an example system. To create the FPGA taxonomy, this paper presents an additional “sub-component” level of abstraction, to demonstrate the effect of the FPGA failure modes and failure categories on an FPGA-based system. The proposed FPGA taxonomy is based on the FPGA failure modes, failure categories, failure effects and uncovering situations. The FPGA taxonomy is applied to the RTS/ESFAS test system, to demonstrate the effects of the anticipated FPGA failure modes on a digital I&C system, and to provide a modelling example for this proposed taxonomy.

  1. A Computed River Flow-Based Turbine Controller on a Programmable Logic Controller for Run-Off River Hydroelectric Systems

    Directory of Open Access Journals (Sweden)

    Razali Jidin

    2017-10-01

    Full Text Available The main feature of a run-off river hydroelectric system is a small size intake pond that overspills when river flow is more than turbines’ intake. As river flow fluctuates, a large proportion of the potential energy is wasted due to the spillages which can occur when turbines are operated manually. Manual operation is often adopted due to unreliability of water level-based controllers at many remote and unmanned run-off river hydropower plants. In order to overcome these issues, this paper proposes a novel method by developing a controller that derives turbine output set points from computed mass flow rate of rivers that feed the hydroelectric system. The computed flow is derived by summation of pond volume difference with numerical integration of both turbine discharge flows and spillages. This approach of estimating river flow allows the use of existing sensors rather than requiring the installation of new ones. All computations, including the numerical integration, have been realized as ladder logics on a programmable logic controller. The implemented controller manages the dynamic changes in the flow rate of the river better than the old point-level based controller, with the aid of a newly installed water level sensor. The computed mass flow rate of the river also allows the controller to straightforwardly determine the number of turbines to be in service with considerations of turbine efficiencies and auxiliary power conservation.

  2. Designing the Expanded Programme on Immunisation (EPI) as a service: Prioritising patients over administrative logic

    DEFF Research Database (Denmark)

    McKnight, J.; Holt, D. B.

    2014-01-01

    -the-ground problems that mothers face in trying to vaccinate their children, while instead prioritising administrative processes. Our ethnographic analysis of 83 mothers who had not vaccinated their children reveals key barriers to vaccination from a 'customer' perspective. While mothers value vaccination......Expanded Programme on Immunisation (EPI) vaccination rates remain well below herd immunity in regions of many countries despite huge international resources devoted to both financing and access. We draw upon service marketing theory, organisational sociology, development anthropology and cultural...... specific service problems from the mother's perspective and points towards simple service innovations that could improve vaccination rates in regions that have poor uptake....

  3. A control system based on field programmable gate array for papermaking sewage treatment

    International Nuclear Information System (INIS)

    Zhang, Zi Sheng; Xie, Chang; Xiong, Yan Qing; Liu, Zhi Qiang; Li, Qing

    2013-01-01

    A sewage treatment control system is designed to improve the efficiency of papermaking wastewater treatment system. The automation control system is based on Field Programmable Gate Array (FPGA), coded with Very-High-Speed Integrate Circuit Hardware Description Language (VHDL), compiled and simulated with Quartus. In order to ensure the stability of the data used in FPGA, the data is collected through temperature sensors, water level sensor and online PH measurement system. The automatic control system is more sensitive, and both the treatment efficiency and processing power are increased. This work provides a new method for sewage treatment control.

  4. Note: The design of thin gap chamber simulation signal source based on field programmable gate array

    International Nuclear Information System (INIS)

    Hu, Kun; Wang, Xu; Li, Feng; Jin, Ge; Lu, Houbing; Liang, Futian

    2015-01-01

    The Thin Gap Chamber (TGC) is an important part of ATLAS detector and LHC accelerator. Targeting the feature of the output signal of TGC detector, we have designed a simulation signal source. The core of the design is based on field programmable gate array, randomly outputting 256-channel simulation signals. The signal is generated by true random number generator. The source of randomness originates from the timing jitter in ring oscillators. The experimental results show that the random number is uniform in histogram, and the whole system has high reliability

  5. A software framework for pipelined arithmetic algorithms in field programmable gate arrays

    Science.gov (United States)

    Kim, J. B.; Won, E.

    2018-03-01

    Pipelined algorithms implemented in field programmable gate arrays are extensively used for hardware triggers in the modern experimental high energy physics field and the complexity of such algorithms increases rapidly. For development of such hardware triggers, algorithms are developed in C++, ported to hardware description language for synthesizing firmware, and then ported back to C++ for simulating the firmware response down to the single bit level. We present a C++ software framework which automatically simulates and generates hardware description language code for pipelined arithmetic algorithms.

  6. Field programmable gate array-assigned complex-valued computation and its limits

    Energy Technology Data Exchange (ETDEWEB)

    Bernard-Schwarz, Maria, E-mail: maria.bernardschwarz@ni.com [National Instruments, Ganghoferstrasse 70b, 80339 Munich (Germany); Institute of Applied Physics, TU Wien, Wiedner Hauptstrasse 8, 1040 Wien (Austria); Zwick, Wolfgang; Klier, Jochen [National Instruments, Ganghoferstrasse 70b, 80339 Munich (Germany); Wenzel, Lothar [National Instruments, 11500 N MOPac Expy, Austin, Texas 78759 (United States); Gröschl, Martin [Institute of Applied Physics, TU Wien, Wiedner Hauptstrasse 8, 1040 Wien (Austria)

    2014-09-15

    We discuss how leveraging Field Programmable Gate Array (FPGA) technology as part of a high performance computing platform reduces latency to meet the demanding real time constraints of a quantum optics simulation. Implementations of complex-valued operations using fixed point numeric on a Virtex-5 FPGA compare favorably to more conventional solutions on a central processing unit. Our investigation explores the performance of multiple fixed point options along with a traditional 64 bits floating point version. With this information, the lowest execution times can be estimated. Relative error is examined to ensure simulation accuracy is maintained.

  7. SIMULATION OF NEW SIMPLE FUZZY LOGIC MAXIMUM POWER POINT TRACKER FOR PHOTOVOLTAIC ARRAY

    Directory of Open Access Journals (Sweden)

    H. Serhoud

    2015-08-01

    Full Text Available A new simple fuzzy method used for tracking the maximum power point tracker (MPPT for photovoltaic systems is proposed. The input parameters   and duty cycle D are used to generate the optimal MPPT under different operating conditions, The photovoltaic system simulated and constructed by photovoltaic arrays, a DC/DC boost converter, a fuzzy MPPT control and a resistive load, The Fuzzy control law designed and the results in a simulation platform will be presented and compare to Perturbation and observation (P&O controller.

  8. Methods for the Application of Programmable Logic Devices in Electronic Protection Systems for High Energy Particle Accelerators

    CERN Document Server

    Kwiatkowski, Maciej; Todd, Benjamin

    The present thesis was realised within the framework of the Doctoral Student programme at the European Organisation for Nuclear Research CERN, which is situated near Geneva. The aim of this thesis was to develop a method for reliable firmware implementation and to use that method to implement a new firmware for the Safe Machine Parameters (SMP) system. That system relies heavily on the Field Programmable Gate Arrays (FPGA) and it is one of the key machine protection systems of the Large Hadron Collider (LHC). The conception of the SMP hardware originates from the fully tested Beam Interlock System (BIS) being a result of another PhD thesis. For that reason the reliable SMP hardware was preserved unchanged. The first version of the SMP was ready for the LHC startup in the year 2008. Nevertheless the quality of the SMP firmware was objectionable. There were new requirements and therefore the SMP specification was extended. On that occasion it was decided that the existing SMP firmware will not be continued and ...

  9. Methods for the application of programmable logic devices in electronic protection systems for high energy particle accelerators

    CERN Document Server

    Kwiatkowski, M

    2014-01-01

    The present thesis was realised within the framework of the Doctoral Student programme at the European Organisation for Nuclear Research CERN, which is situated near Geneva. The aim of this thesis was to develop a method for reliable rmware implementation and to use that method to implement a new rmware for the Safe Machine Parameters (SMP) system. That system relies heavily on the Field Programmable Gate Arrays (FPGA) and it is one of the key machine protection systems of the Large Hadron Collider (LHC). The conception of the SMP hardware originates from the fully tested Beam Interlock System (BIS) being a result of another PhD thesis [1]. For that reason the reliable SMP hardware was preserved unchanged. The rst version of the SMP was ready for the LHC startup in the year 2008. Nevertheless the quality of the SMP rmware was objectionable. There were new requirements and therefore the SMP speci cation was extended. On that occasion it was decided that the existing SMP rmware will not be continued and that it...

  10. Orientation of a 3D object: implementation with an artificial neural network using a programmable logic device

    International Nuclear Information System (INIS)

    Carnevale, Federico J.

    2010-01-01

    Complex information extraction from images is a key skill of intelligent machines, with wide application in automated systems, robotic manipulation and human-computer interaction. However, solving this problem with traditional, geometric or analytical, strategies is extremely difficult. Therefore, an approach based on learning from examples seems to be more appropriate. This thesis addresses the problem of 3D orientation, aiming to estimate the angular coordinates of a known object from an image shot from any direction. We describe a system based on artificial neural networks to solve this problem in real time. The implementation is performed using a programmable logic device. The digital system described in this paper has the ability to estimate two rotational coordinates of a 3D known object, in ranges from -80 0 to 80 0 . The operation speed allows a real time performance at video rate. The system accuracy can be successively increased by increasing the size of the artificial neural network and using a larger number of training examples [es

  11. Upgrading of Alum Preparation and Dosing Unit for Sharq Dijla Water Treatment Plant by Using Programmable Logic Controller System

    Directory of Open Access Journals (Sweden)

    Aumar Al-Nakeeb

    2018-02-01

    Full Text Available One of the important units in Sharq Dijla Water Treatment Plant (WTP first and second extensions are the alum solution preparation and dosing unit. The existing operation of this unit accomplished manually starting from unloading the powder alum in the preparation basin and ending by controlling the alum dosage addition through the dosing pumps to the flash mix chambers. Because of the modern trend of monitoring and control the automatic operation of WTPs due to the great benefits that could be gain from optimum equipment operation, reducing the operating costs and human errors. This study deals with how to transform the conventional operation to an automatic monitoring and controlling system depending on a Programmable Logic Controller (PLC and online sensors for alum preparation and dosing unit in Sharq Dijla WTP. PLC system will receive, analyze transmitting data, compare them with preset points then automatically orders the operational equipment (such as pumps, valves, and mixers in a way that guarantees the safe and appropriate operation of the unit. As a result of Process and Instrumentation Diagrams (PID that were prepared in this study, these units can be fully operating and manage by using Supervisory Control and Data Acquisition (SCADA system.

  12. Technologies for faults diagnosis of FPGA logic blocks

    Directory of Open Access Journals (Sweden)

    C. U. Ngene

    2012-08-01

    Full Text Available The critical issues of testing field programmable gate arrays (FPGA with a view to diagnosing faults are an important step that ensures the reliability of FPGA designs. Correct diagnosis of faulty logic blocks of FPGAs guarantees restoration of functionality through replacement of faulty block with replacement units. This process can be done autonomously or without the intervention of an engineer depending on application area. This paper considers two methods for analysing test results of FPGA logic blocks with the purpose of localising and distinguishing faults. The algebraic logic and vector-logical methods are proposed for diagnosing faulty logic blocks in FPGA fabric. It is found that the algebraic logic method is more useful for processing of sparse faults tables when the number of coordinates with 1s values with respect to zero values ​​is not more than 20%, whereas the vector-logical method facilitates the analysis of faults table with predominance of 1s values.

  13. Connecting programmable logic controllers (PLC) to control and data acquisition a comparison of the JET and Wendelstein 7-X approach

    International Nuclear Information System (INIS)

    Hennig, Christine; Kneupner, Klaus; Kinna, David

    2012-01-01

    Highlights: ► We describe 2 ways connecting PLCs to fusion control and data acquisition software. ► At W7-X standardization of the PLC type eases the maintenance of the software. ► At JET PLCs are interfaced with a daemon that hides the PLC specific part. ► There is potential to unify the approaches towards a common fusion PLC interface. - Abstract: The use of programmable logic controllers (PLC) for automation of electromechanical processes is an industrial control system technology. It is more and more in use within the fusion community. Traditionally PLC based systems are operated and maintained using proprietary SCADA systems (supervisory control and data acquisition). They are hardly ever integrated with the fusion control and data acquisition systems. An overview of the state of the art in fusion is given in the article. At JET an inhouse “black box protocol” approach has been developed to communicate with any external system via a dedicated http based protocol. However, a PLC usually cannot be modified to implement this special protocol. Hence, a software layer has been developed that interfaces a PLC by implementing the PLC specific communication part on one side and the black box protocol part on the other side. The software is completely data driven i.e. editing the data structure changes the logic accordingly. It can be tested using the web capability of the black box protocol. Multiple PLC types from different vendors are supported, thus multiple protocols to interface the PLC are in use. Depending on the PLC type and available tools it can be necessary to program the PLC accordingly. Wendelstein 7-X uses another approach. For every single PLC a dedicated communication from and to CoDaC is implemented. This communication is projected (programmed) in the PLC and configurable (data driven) on the CoDaC side. The protocol is UDP based and observed via timeout mechanisms. The use of PLCs for Wendelstein 7-X is standardized. Therefore a single

  14. Connecting programmable logic controllers (PLC) to control and data acquisition a comparison of the JET and Wendelstein 7-X approach

    Energy Technology Data Exchange (ETDEWEB)

    Hennig, Christine, E-mail: Christine.Hennig@ipp.mpg.de [Max-Planck-Institut fuer Plasmaphysik, Wendelsteinstrasse 1, 17491 Greifswald (Germany); Kneupner, Klaus; Kinna, David [JET-EFDA, Culham Science Centre, OX14 3DB Abingdon (United Kingdom)

    2012-12-15

    Highlights: Black-Right-Pointing-Pointer We describe 2 ways connecting PLCs to fusion control and data acquisition software. Black-Right-Pointing-Pointer At W7-X standardization of the PLC type eases the maintenance of the software. Black-Right-Pointing-Pointer At JET PLCs are interfaced with a daemon that hides the PLC specific part. Black-Right-Pointing-Pointer There is potential to unify the approaches towards a common fusion PLC interface. - Abstract: The use of programmable logic controllers (PLC) for automation of electromechanical processes is an industrial control system technology. It is more and more in use within the fusion community. Traditionally PLC based systems are operated and maintained using proprietary SCADA systems (supervisory control and data acquisition). They are hardly ever integrated with the fusion control and data acquisition systems. An overview of the state of the art in fusion is given in the article. At JET an inhouse 'black box protocol' approach has been developed to communicate with any external system via a dedicated http based protocol. However, a PLC usually cannot be modified to implement this special protocol. Hence, a software layer has been developed that interfaces a PLC by implementing the PLC specific communication part on one side and the black box protocol part on the other side. The software is completely data driven i.e. editing the data structure changes the logic accordingly. It can be tested using the web capability of the black box protocol. Multiple PLC types from different vendors are supported, thus multiple protocols to interface the PLC are in use. Depending on the PLC type and available tools it can be necessary to program the PLC accordingly. Wendelstein 7-X uses another approach. For every single PLC a dedicated communication from and to CoDaC is implemented. This communication is projected (programmed) in the PLC and configurable (data driven) on the CoDaC side. The protocol is UDP based and

  15. Segmented Routing for Speed-Performance and Routability in Field-Programmable Gate Arrays

    Directory of Open Access Journals (Sweden)

    Stephen Brown

    1996-01-01

    Full Text Available This paper addresses several issues involved for routing in Field-Programmable Gate Arrays (FPGAs that have both horizontal and vertical routing channels, with wire segments of various lengths. Routing is studied by using CAD routing tools to map a set of benchmark circuits into FPGAs, and measuring the effects that various parameters of the CAD tools have on the implementation of the circuits. A two-stage routing strategy of global followed by detailed routing is used, and the effects of both of these CAD stages are discussed, with emphasis on detailed routing. We present a new detailed routing algorithm designed specifically for the types of routing structures found in the most recent generation of FPGAs, and show that the new algorithm achieves significantly better results than previously published FPGA routers with respect to the speed-performance of implemented circuits.

  16. A digital optical phase-locked loop for diode lasers based on field programmable gate array

    Energy Technology Data Exchange (ETDEWEB)

    Xu Zhouxiang; Zhang Xian; Huang Kaikai; Lu Xuanhui [Physics Department, Zhejiang University, Hangzhou, 310027 (China)

    2012-09-15

    We have designed and implemented a highly digital optical phase-locked loop (OPLL) for diode lasers in atom interferometry. The three parts of controlling circuit in this OPLL, including phase and frequency detector (PFD), loop filter and proportional integral derivative (PID) controller, are implemented in a single field programmable gate array chip. A structure type compatible with the model MAX9382/MCH12140 is chosen for PFD and pipeline and parallelism technology have been adapted in PID controller. Especially, high speed clock and twisted ring counter have been integrated in the most crucial part, the loop filter. This OPLL has the narrow beat note line width below 1 Hz, residual mean-square phase error of 0.14 rad{sup 2} and transition time of 100 {mu}s under 10 MHz frequency step. A main innovation of this design is the completely digitalization of the whole controlling circuit in OPLL for diode lasers.

  17. Application of Field Programmable Gate Arrays in Instrumentation and Control Systems of Nuclear Power Plants

    International Nuclear Information System (INIS)

    2016-01-01

    Field programmable gate arrays (FPGAs) are gaining increased attention worldwide for application in nuclear power plant (NPP) instrumentation and control (I&C) systems, particularly for safety and safety related applications, but also for non-safety ones. NPP operators and equipment suppliers see potential advantages of FPGA based digital I&C systems as compared to microprocessor based applications. This is because FPGA based systems can be made simpler, more testable and less reliant on complex software (e.g. operating systems), and are easier to qualify for safety and safety related applications. This publication results from IAEA consultancy meetings covering the various aspects, including design, qualification, implementation, licensing, and operation, of FPGA based I&C systems in NPPs

  18. Field-Programmable Gate Array-based fluxgate magnetometer with digital integration

    Science.gov (United States)

    Butta, Mattia; Janosek, Michal; Ripka, Pavel

    2010-05-01

    In this paper, a digital magnetometer based on printed circuit board fluxgate is presented. The fluxgate is pulse excited and the signal is extracted by gate integration. We investigate the possibility to perform integration on very narrow gates (typically 500 ns) by using digital techniques. The magnetometer is based on field-programmable gate array (FPGA) card: we will show all the advantages and disadvantages, given by digitalization of fluxgate output voltage by means of analog-to-digital converter on FPGA card, as well as digitalization performed by external digitizer. Due to very narrow gate, it is shown that a magnetometer entirely based on a FPGA card is preferable, because it avoids noise due to trigger instability. Both open loop and feedback operative mode are described and achieved results are presented.

  19. Field Programmable Gate Array Failure Rate Estimation Guidelines for Launch Vehicle Fault Tree Models

    Science.gov (United States)

    Al Hassan, Mohammad; Novack, Steven D.; Hatfield, Glen S.; Britton, Paul

    2017-01-01

    Today's launch vehicles complex electronic and avionic systems heavily utilize the Field Programmable Gate Array (FPGA) integrated circuit (IC). FPGAs are prevalent ICs in communication protocols such as MIL-STD-1553B, and in control signal commands such as in solenoid/servo valves actuations. This paper will demonstrate guidelines to estimate FPGA failure rates for a launch vehicle, the guidelines will account for hardware, firmware, and radiation induced failures. The hardware contribution of the approach accounts for physical failures of the IC, FPGA memory and clock. The firmware portion will provide guidelines on the high level FPGA programming language and ways to account for software/code reliability growth. The radiation portion will provide guidelines on environment susceptibility as well as guidelines on tailoring other launch vehicle programs historical data to a specific launch vehicle.

  20. Field Programmable Gate Array Reliability Analysis Guidelines for Launch Vehicle Reliability Block Diagrams

    Science.gov (United States)

    Al Hassan, Mohammad; Britton, Paul; Hatfield, Glen Spencer; Novack, Steven D.

    2017-01-01

    Field Programmable Gate Arrays (FPGAs) integrated circuits (IC) are one of the key electronic components in today's sophisticated launch and space vehicle complex avionic systems, largely due to their superb reprogrammable and reconfigurable capabilities combined with relatively low non-recurring engineering costs (NRE) and short design cycle. Consequently, FPGAs are prevalent ICs in communication protocols and control signal commands. This paper will identify reliability concerns and high level guidelines to estimate FPGA total failure rates in a launch vehicle application. The paper will discuss hardware, hardware description language, and radiation induced failures. The hardware contribution of the approach accounts for physical failures of the IC. The hardware description language portion will discuss the high level FPGA programming languages and software/code reliability growth. The radiation portion will discuss FPGA susceptibility to space environment radiation.

  1. A digital optical phase-locked loop for diode lasers based on field programmable gate array

    Science.gov (United States)

    Xu, Zhouxiang; Zhang, Xian; Huang, Kaikai; Lu, Xuanhui

    2012-09-01

    We have designed and implemented a highly digital optical phase-locked loop (OPLL) for diode lasers in atom interferometry. The three parts of controlling circuit in this OPLL, including phase and frequency detector (PFD), loop filter and proportional integral derivative (PID) controller, are implemented in a single field programmable gate array chip. A structure type compatible with the model MAX9382/MCH12140 is chosen for PFD and pipeline and parallelism technology have been adapted in PID controller. Especially, high speed clock and twisted ring counter have been integrated in the most crucial part, the loop filter. This OPLL has the narrow beat note line width below 1 Hz, residual mean-square phase error of 0.14 rad2 and transition time of 100 μs under 10 MHz frequency step. A main innovation of this design is the completely digitalization of the whole controlling circuit in OPLL for diode lasers.

  2. Nucleic acid programmable protein array a just-in-time multiplexed protein expression and purification platform.

    Science.gov (United States)

    Qiu, Ji; LaBaer, Joshua

    2011-01-01

    Systematic study of proteins requires the availability of thousands of proteins in functional format. However, traditional recombinant protein expression and purification methods have many drawbacks for such study at the proteome level. We have developed an innovative in situ protein expression and capture system, namely NAPPA (nucleic acid programmable protein array), where C-terminal tagged proteins are expressed using an in vitro expression system and efficiently captured/purified by antitag antibodies coprinted at each spot. The NAPPA technology presented in this chapter enable researchers to produce and display fresh proteins just in time in a multiplexed high-throughput fashion and utilize them for various downstream biochemical researches of interest. This platform could revolutionize the field of functional proteomics with it ability to produce thousands of spatially separated proteins in high density with narrow dynamic rand of protein concentrations, reproducibly and functionally. Copyright © 2011 Elsevier Inc. All rights reserved.

  3. Nine-channel mid-power bipolar pulse generator based on a field programmable gate array

    Energy Technology Data Exchange (ETDEWEB)

    Haylock, Ben, E-mail: benjamin.haylock2@griffithuni.edu.au; Lenzini, Francesco; Kasture, Sachin; Fisher, Paul; Lobino, Mirko [Centre for Quantum Dynamics, Griffith University, Brisbane (Australia); Queensland Micro and Nanotechnology Centre, Griffith University, Brisbane (Australia); Streed, Erik W. [Centre for Quantum Dynamics, Griffith University, Brisbane (Australia); Institute for Glycomics, Griffith University, Gold Coast (Australia)

    2016-05-15

    Many channel arbitrary pulse sequence generation is required for the electro-optic reconfiguration of optical waveguide networks in Lithium Niobate. Here we describe a scalable solution to the requirement for mid-power bipolar parallel outputs, based on pulse patterns generated by an externally clocked field programmable gate array. Positive and negative pulses can be generated at repetition rates up to 80 MHz with pulse width adjustable in increments of 1.6 ns across nine independent outputs. Each channel can provide 1.5 W of RF power and can be synchronised with the operation of other components in an optical network such as light sources and detectors through an external clock with adjustable delay.

  4. Radiation-Hardened Circuitry Using Mask-Programmable Analog Arrays. Final Report

    Energy Technology Data Exchange (ETDEWEB)

    Britton, Jr., Charles L. [Oak Ridge National Lab. (ORNL), Oak Ridge, TN (United States); Ericson, Milton Nance [Oak Ridge National Lab. (ORNL), Oak Ridge, TN (United States); Bobrek, Miljko [Oak Ridge National Lab. (ORNL), Oak Ridge, TN (United States); Blalock, Benjamin [Univ. of Tennessee, Knoxville, TN (United States)

    2015-12-01

    As the recent accident at Fukushima Daiichi so vividly demonstrated, telerobotic technologies capable of withstanding high radiation environments need to be readily available to enable operations, repair, and recovery under severe accident scenarios where human entry is extremely dangerous or not possible. Telerobotic technologies that enable remote operation in high dose rate environments have undergone revolutionary improvement over the past few decades. However, much of this technology cannot be employed in nuclear power environments due the radiation sensitivity of the electronics and the organic insulator materials currently in use. This is the final report of the activities involving the NEET 2 project Radiation Hardened Circuitry Using Mask-Programmable Analog Arrays. We present a detailed functional block diagram of the proposed data acquisition system, the thought process leading to technical decisions, the implemented system, and the tested results from the systems. This system will be capable of monitoring at least three parameters of importance to nuclear reactor monitoring: temperature, radiation level, and pressure.

  5. Design of readout drivers for ATLAS pixel detectors using field programmable gate arrays

    CERN Document Server

    Sivasubramaniyan, Sriram

    Microstrip detectors are an integral patt of high energy physics research . Special protocols are used to transmit the data from these detectors . To readout the data from such detectors specialized instrumentation have to be designed . To achieve this task, creative and innovative high speed algorithms were designed simulated and implemented in Field Programmable gate arrays, using CAD/CAE tools. The simulation results indicated that these algorithms would be able to perform all the required tasks quickly and efficiently. This thesis describes the design of data acquisition system called the Readout Drivers (ROD) . It focuses on the ROD data path for ATLAS Pixel detectors. The data path will be an integrated part of Readout Drivers setup to decode the data from the silicon micro strip detectors and pixel detectors. This research also includes the design of Readout Driver controller. This Module is used to control the operation of the ROD. This module is responsible for the operation of the Pixel decoders bas...

  6. Design and Implementation of Video Shot Detection on Field Programmable Gate Arrays

    Directory of Open Access Journals (Sweden)

    Jharna Majumdar

    2012-09-01

    Full Text Available Video has become an interactive medium of communication in everyday life. The sheer volume of video makes it extremely difficult to browse through and find the required data. Hence extraction of key frames from the video which represents the abstract of the entire video becomes necessary. The aim of the video shot detection is to find the position of the shot boundaries, so that key frames can be selected from each shot for subsequent processing such as video summarization, indexing etc. For most of the surveillance applications like video summery, face recognition etc., the hardware (real time implementation of these algorithms becomes necessary. Here in this paper we present the architecture for simultaneous accessing of consecutive frames, which are then used for the implementation of various Video Shot Detection algorithms. We also present the real time implementation of three video shot detection algorithms using the above mentioned architecture on FPGA (Field Programmable Gate Arrays.

  7. Real-time field programmable gate array architecture for computer vision

    Science.gov (United States)

    Arias-Estrada, Miguel; Torres-Huitzil, Cesar

    2001-01-01

    This paper presents an architecture for real-time generic convolution of a mask and an image. The architecture is intended for fast low-level image processing. The field programmable gate array (FPGA)-based architecture takes advantage of the availability of registers in FPGAs to implement an efficient and compact module to process the convolutions. The architecture is designed to minimize the number of accesses to the image memory and it is based on parallel modules with internal pipeline operation in order to improve its performance. The architecture is prototyped in a FPGA, but it can be implemented on dedicated very- large-scale-integrated devices to reach higher clock frequencies. Complexity issues, FPGA resources utilization, FPGA limitations, and real-time performance are discussed. Some results are presented and discussed.

  8. Field-programmable lab-on-a-chip based on microelectrode dot array architecture.

    Science.gov (United States)

    Wang, Gary; Teng, Daniel; Lai, Yi-Tse; Lu, Yi-Wen; Ho, Yingchieh; Lee, Chen-Yi

    2014-09-01

    The fundamentals of electrowetting-on-dielectric (EWOD) digital microfluidics are very strong: advantageous capability in the manipulation of fluids, small test volumes, precise dynamic control and detection, and microscale systems. These advantages are very important for future biochip developments, but the development of EWOD microfluidics has been hindered by the absence of: integrated detector technology, standard commercial components, on-chip sample preparation, standard manufacturing technology and end-to-end system integration. A field-programmable lab-on-a-chip (FPLOC) system based on microelectrode dot array (MEDA) architecture is presented in this research. The MEDA architecture proposes a standard EWOD microfluidic component called 'microelectrode cell', which can be dynamically configured into microfluidic components to perform microfluidic operations of the biochip. A proof-of-concept prototype FPLOC, containing a 30 × 30 MEDA, was developed by using generic integrated circuits computer aided design tools, and it was manufactured with standard low-voltage complementary metal-oxide-semiconductor technology, which allows smooth on-chip integration of microfluidics and microelectronics. By integrating 900 droplet detection circuits into microelectrode cells, the FPLOC has achieved large-scale integration of microfluidics and microelectronics. Compared to the full-custom and bottom-up design methods, the FPLOC provides hierarchical top-down design approach, field-programmability and dynamic manipulations of droplets for advanced microfluidic operations.

  9. Design and analysis of a dual mode CMOS field programmable analog array

    International Nuclear Information System (INIS)

    Cheng Xiaoyan; Yang Haigang; Yin Tao; Wu Qisong; Zhang Hongfeng; Liu Fei

    2014-01-01

    This paper presents a novel field-programmable analog array (FPAA) architecture featuring a dual mode including discrete-time (DT) and continuous-time (CT) operation modes, along with a highly routable connection boxes (CBs) based interconnection lattice. The dual mode circuit for the FPAA is capable of achieving targeted optimal performance in different applications. The architecture utilizes routing switches in a CB not only for the signal interconnection purpose but also for control of the electrical charge transfer required in switched-capacitor circuits. This way, the performance of the circuit in either mode shall not be hampered with adding of programmability. The proposed FPAA is designed and implemented in a 0.18 μm standard CMOS process with a 3.3 V supply voltage. The result from post-layout simulation shows that a maximum bandwidth of 265 MHz through the interconnection network is achieved. The measured results from demonstrated examples show that the maximum signal bandwidth of up to 2 MHz in CT mode is obtained with the spurious free dynamic range of 54 dB, while the signal processing precision in DT mode reaches 96.4%. (semiconductor integrated circuits)

  10. Analysis and research on Maximum Power Point Tracking of Photovoltaic Array with Fuzzy Logic Control and Three-point Weight Comparison Method

    Institute of Scientific and Technical Information of China (English)

    LIN; Kuang-Jang; LIN; Chii-Ruey

    2010-01-01

    The Photovoltaic Array has a best optimal operating point where the array operating can obtain the maximum power.However, the optimal operating point can be compromised by the strength of solar radiation,angle,and by the change of environment and load.Due to the constant changes in these conditions,it has become very difficult to locate the optimal operating point by following a mathematical model.Therefore,this study will focus mostly on the application of Fuzzy Logic Control theory and Three-point Weight Comparison Method in effort to locate the optimal operating point of solar panel and achieve maximum efficiency in power generation. The Three-point Weight Comparison Method is the comparison between the characteristic curves of the voltage of photovoltaic array and output power;it is a rather simple way to track the maximum power.The Fuzzy Logic Control,on the other hand,can be used to solve problems that cannot be effectively dealt with by calculation rules,such as concepts,contemplation, deductive reasoning,and identification.Therefore,this paper uses these two kinds of methods to make simulation successively. The simulation results show that,the Three-point Comparison Method is more effective under the environment with more frequent change of solar radiation;however,the Fuzzy Logic Control has better tacking efficiency under the environment with violent change of solar radiation.

  11. Real-time object tracking system based on field-programmable gate array and convolution neural network

    Directory of Open Access Journals (Sweden)

    Congyi Lyu

    2016-12-01

    Full Text Available Vision-based object tracking has lots of applications in robotics, like surveillance, navigation, motion capturing, and so on. However, the existing object tracking systems still suffer from the challenging problem of high computation consumption in the image processing algorithms. The problem can prevent current systems from being used in many robotic applications which have limitations of payload and power, for example, micro air vehicles. In these applications, the central processing unit- or graphics processing unit-based computers are not good choices due to the high weight and power consumption. To address the problem, this article proposed a real-time object tracking system based on field-programmable gate array, convolution neural network, and visual servo technology. The time-consuming image processing algorithms, such as distortion correction, color space convertor, and Sobel edge, Harris corner features detector, and convolution neural network were redesigned using the programmable gates in field-programmable gate array. Based on the field-programmable gate array-based image processing, an image-based visual servo controller was designed to drive a two degree of freedom manipulator to track the target in real time. Finally, experiments on the proposed system were performed to illustrate the effectiveness of the real-time object tracking system.

  12. Design of acoustic logging signal source of imitation based on field programmable gate array

    International Nuclear Information System (INIS)

    Zhang, K; Ju, X D; Lu, J Q; Men, B Y

    2014-01-01

    An acoustic logging signal source of imitation is designed and realized, based on the Field Programmable Gate Array (FPGA), to improve the efficiency of examining and repairing acoustic logging tools during research and field application, and to inspect and verify acoustic receiving circuits and corresponding algorithms. The design of this signal source contains hardware design and software design,and the hardware design uses an FPGA as the control core. Four signals are made first by reading the Random Access Memory (RAM) data which are inside the FPGA, then dealing with the data by digital to analog conversion, amplification, smoothing and so on. Software design uses VHDL, a kind of hardware description language, to program the FPGA. Experiments illustrate that the ratio of signal to noise for the signal source is high, the waveforms are stable, and also its functions of amplitude adjustment, frequency adjustment and delay adjustment are in accord with the characteristics of real acoustic logging waveforms. These adjustments can be used to imitate influences on sonic logging received waveforms caused by many kinds of factors such as spacing and span of acoustic tools, sonic speeds of different layers and fluids, and acoustic attenuations of different cementation planes. (paper)

  13. Using field programmable gate array hardware for the performance improvement of ultrasonic wave propagation imaging system

    Energy Technology Data Exchange (ETDEWEB)

    Shan, Jaffry Syed [Hamdard University, Karachi (Pakistan); Abbas, Syed Haider; Lee, Jung Ryul [Dept. of Aerospace Engineering, Korea Advanced Institute of Science and Technology, Daejeon (Korea, Republic of); Kang, Dong Hoon [Advanced Materials Research Team, Korea Railroad Research Institute, Uiwang (Korea, Republic of)

    2015-12-15

    Recently, wave propagation imaging based on laser scanning-generated elastic waves has been intensively used for nondestructive inspection. However, the proficiency of the conventional software based system reduces when the scan area is large since the processing time increases significantly due to unavoidable processor multitasking, where computing resources are shared with multiple processes. Hence, the field programmable gate array (FPGA) was introduced for a wave propagation imaging method in order to obtain extreme processing time reduction. An FPGA board was used for the design, implementing post-processing ultrasonic wave propagation imaging (UWPI). The results were compared with the conventional system and considerable improvement was observed, with at least 78% (scanning of 100x100mm{sup 2} with 0.5 mm interval) to 87.5% (scanning of 200x200mm{sup 2} with 0.5 mm interval) less processing time, strengthening the claim for the research. This new concept to implement FPGA technology into the UPI system will act as a break-through technology for full-scale automatic inspection.

  14. Using field programmable gate array hardware for the performance improvement of ultrasonic wave propagation imaging system

    International Nuclear Information System (INIS)

    Shan, Jaffry Syed; Abbas, Syed Haider; Lee, Jung Ryul; Kang, Dong Hoon

    2015-01-01

    Recently, wave propagation imaging based on laser scanning-generated elastic waves has been intensively used for nondestructive inspection. However, the proficiency of the conventional software based system reduces when the scan area is large since the processing time increases significantly due to unavoidable processor multitasking, where computing resources are shared with multiple processes. Hence, the field programmable gate array (FPGA) was introduced for a wave propagation imaging method in order to obtain extreme processing time reduction. An FPGA board was used for the design, implementing post-processing ultrasonic wave propagation imaging (UWPI). The results were compared with the conventional system and considerable improvement was observed, with at least 78% (scanning of 100x100mm 2 with 0.5 mm interval) to 87.5% (scanning of 200x200mm 2 with 0.5 mm interval) less processing time, strengthening the claim for the research. This new concept to implement FPGA technology into the UPI system will act as a break-through technology for full-scale automatic inspection

  15. Development of field programmable gate array-based reactor trip functions using systems engineering approach

    Energy Technology Data Exchange (ETDEWEB)

    Jung, Jae Cheon; Ahmed, Ibrahim [Nuclear Power Plant Engineering, KEPCO International Nuclear Graduate School, Ulsan (Korea, Republic of)

    2016-08-15

    Design engineering process for field programmable gate array (FPGA)-based reactor trip functions are developed in this work. The process discussed in this work is based on the systems engineering approach. The overall design process is effectively implemented by combining with design and implementation processes. It transforms its overall development process from traditional V-model to Y-model. This approach gives the benefit of concurrent engineering of design work with software implementation. As a result, it reduces development time and effort. The design engineering process consisted of five activities, which are performed and discussed: needs/systems analysis; requirement analysis; functional analysis; design synthesis; and design verification and validation. Those activities are used to develop FPGA-based reactor bistable trip functions that trigger reactor trip when the process input value exceeds the setpoint. To implement design synthesis effectively, a model-based design technique is implied. The finite-state machine with data path structural modeling technique together with very high speed integrated circuit hardware description language and the Aldec Active-HDL tool are used to design, model, and verify the reactor bistable trip functions for nuclear power plants.

  16. Development and simulation of soft morphological operators for a field programmable gate array

    Science.gov (United States)

    Tickle, Andrew J.; Harvey, Paul K.; Smith, Jeremy S.; Wu, Q. Henry

    2013-04-01

    In image processing applications, soft mathematical morphology (MM) can be employed for both binary and grayscale systems and is derived from set theory. Soft MM techniques have improved behavior over standard morphological operations in noisy environments, as they can preserve small details within an image. This makes them suitable for use in image processing applications on portable field programmable gate arrays for tasks such as robotics and security. We explain how the systems were developed using Altera's DSP Builder in order to provide optimized code for the many different devices currently on the market. Also included is how the circuits can be inserted and combined with previously developed work in order to increase their functionality. The testing procedures involved loading different images into these systems and analyzing the outputs against MATLAB-generated validation images. A set of soft morphological operations are described, which can then be applied to various tasks and easily modified in size via altering the line buffer settings inside the system to accommodate a range of image attributes ranging from image sizes such as 320×240 pixels for basic webcam imagery up to high quality 4000×4000 pixel images for military applications.

  17. Design of acoustic logging signal source of imitation based on field programmable gate array

    Science.gov (United States)

    Zhang, K.; Ju, X. D.; Lu, J. Q.; Men, B. Y.

    2014-08-01

    An acoustic logging signal source of imitation is designed and realized, based on the Field Programmable Gate Array (FPGA), to improve the efficiency of examining and repairing acoustic logging tools during research and field application, and to inspect and verify acoustic receiving circuits and corresponding algorithms. The design of this signal source contains hardware design and software design,and the hardware design uses an FPGA as the control core. Four signals are made first by reading the Random Access Memory (RAM) data which are inside the FPGA, then dealing with the data by digital to analog conversion, amplification, smoothing and so on. Software design uses VHDL, a kind of hardware description language, to program the FPGA. Experiments illustrate that the ratio of signal to noise for the signal source is high, the waveforms are stable, and also its functions of amplitude adjustment, frequency adjustment and delay adjustment are in accord with the characteristics of real acoustic logging waveforms. These adjustments can be used to imitate influences on sonic logging received waveforms caused by many kinds of factors such as spacing and span of acoustic tools, sonic speeds of different layers and fluids, and acoustic attenuations of different cementation planes.

  18. Field programmable gate array based reconfigurable scanning probe/optical microscope.

    Science.gov (United States)

    Nowak, Derek B; Lawrence, A J; Dzegede, Zechariah K; Hiester, Justin C; Kim, Cliff; Sánchez, Erik J

    2011-10-01

    The increasing popularity of nanometrology and nanospectroscopy has pushed researchers to develop complex new analytical systems. This paper describes the development of a platform on which to build a microscopy tool that will allow for flexibility of customization to suit research needs. The novelty of the described system lies in its versatility of capabilities. So far, one version of this microscope has allowed for successful near-field and far-field fluorescence imaging with single molecule detection sensitivity. This system is easily adapted for reflection, polarization (Kerr magneto-optical (MO)), Raman, super-resolution techniques, and other novel scanning probe imaging and spectroscopic designs. While collecting a variety of forms of optical images, the system can simultaneously monitor topographic information of a sample with an integrated tuning fork based shear force system. The instrument has the ability to image at room temperature and atmospheric pressure or under liquid. The core of the design is a field programmable gate array (FPGA) data acquisition card and a single, low cost computer to control the microscope with analog control circuitry using off-the-shelf available components. A detailed description of electronics, mechanical requirements, and software algorithms as well as examples of some different forms of the microscope developed so far are discussed.

  19. Single event upset susceptibilities of latchup immune CMOS process programmable gate arrays

    Science.gov (United States)

    Koga, R.; Crain, W. R.; Crawford, K. B.; Hansel, S. J.; Lau, D. D.; Tsubota, T. K.

    Single event upsets (SEU) and latchup susceptibilities of complementary metal oxide semiconductor programmable gate arrays (CMOS PPGA's) were measured at the Lawrence Berkeley Laboratory 88-in. cyclotron facility with Xe (603 MeV), Cu (290 MeV), and Ar (180 MeV) ion beams. The PPGA devices tested were those which may be used in space. Most of the SEU measurements were taken with a newly constructed tester called the Bus Access Storage and Comparison System (BASACS) operating via a Macintosh II computer. When BASACS finds that an output does not match a prerecorded pattern, the state of all outputs, position in the test cycle, and other necessary information is transmitted and stored in the Macintosh. The upset rate was kept between 1 and 3 per second. After a sufficient number of errors are stored, the test is stopped and the total fluence of particles and total errors are recorded. The device power supply current was closely monitored to check for occurrence of latchup. Results of the tests are presented, indicating that some of the PPGA's are good candidates for selected space applications.

  20. Full image-processing pipeline in field-programmable gate array for a small endoscopic camera

    Science.gov (United States)

    Mostafa, Sheikh Shanawaz; Sousa, L. Natércia; Ferreira, Nuno Fábio; Sousa, Ricardo M.; Santos, Joao; Wäny, Martin; Morgado-Dias, F.

    2017-01-01

    Endoscopy is an imaging procedure used for diagnosis as well as for some surgical purposes. The camera used for the endoscopy should be small and able to produce a good quality image or video, to reduce discomfort of the patients, and to increase the efficiency of the medical team. To achieve these fundamental goals, a small endoscopy camera with a footprint of 1 mm×1 mm×1.65 mm is used. Due to the physical properties of the sensors and human vision system limitations, different image-processing algorithms, such as noise reduction, demosaicking, and gamma correction, among others, are needed to faithfully reproduce the image or video. A full image-processing pipeline is implemented using a field-programmable gate array (FPGA) to accomplish a high frame rate of 60 fps with minimum processing delay. Along with this, a viewer has also been developed to display and control the image-processing pipeline. The control and data transfer are done by a USB 3.0 end point in the computer. The full developed system achieves real-time processing of the image and fits in a Xilinx Spartan-6LX150 FPGA.

  1. Design verification enhancement of field programmable gate array-based safety-critical I&C system of nuclear power plant

    Energy Technology Data Exchange (ETDEWEB)

    Ahmed, Ibrahim [Department of Nuclear Engineering, Kyung Hee University, 1732 Deogyeong-daero, Giheung-gu, Yongin-si, Gyeonggi-do 17104 (Korea, Republic of); Jung, Jaecheon, E-mail: jcjung@kings.ac.kr [Department of Nuclear Power Plant Engineering, KEPCO International Nuclear Graduate School, 658-91 Haemaji-ro, Seosang-myeon, Ulju-gun, Ulsan 45014 (Korea, Republic of); Heo, Gyunyoung [Department of Nuclear Engineering, Kyung Hee University, 1732 Deogyeong-daero, Giheung-gu, Yongin-si, Gyeonggi-do 17104 (Korea, Republic of)

    2017-06-15

    Highlights: • An enhanced, systematic and integrated design verification approach is proposed for V&V of FPGA-based I&C system of NPP. • RPS bistable fixed setpoint trip algorithm is designed, analyzed, verified and discussed using the proposed approaches. • The application of integrated verification approach simultaneously verified the entire design modules. • The applicability of the proposed V&V facilitated the design verification processes. - Abstract: Safety-critical instrumentation and control (I&C) system in nuclear power plant (NPP) implemented on programmable logic controllers (PLCs) plays a vital role in safe operation of the plant. The challenges such as fast obsolescence, the vulnerability to cyber-attack, and other related issues of software systems have currently led to the consideration of field programmable gate arrays (FPGAs) as an alternative to PLCs because of their advantages and hardware related benefits. However, safety analysis for FPGA-based I&C systems, and verification and validation (V&V) assessments still remain important issues to be resolved, which are now become a global research point of interests. In this work, we proposed a systematic design and verification strategies from start to ready-to-use in form of model-based approaches for FPGA-based reactor protection system (RPS) that can lead to the enhancement of the design verification and validation processes. The proposed methodology stages are requirement analysis, enhanced functional flow block diagram (EFFBD) models, finite state machine with data path (FSMD) models, hardware description language (HDL) code development, and design verifications. The design verification stage includes unit test – Very high speed integrated circuit Hardware Description Language (VHDL) test and modified condition decision coverage (MC/DC) test, module test – MATLAB/Simulink Co-simulation test, and integration test – FPGA hardware test beds. To prove the adequacy of the proposed

  2. Design verification enhancement of field programmable gate array-based safety-critical I&C system of nuclear power plant

    International Nuclear Information System (INIS)

    Ahmed, Ibrahim; Jung, Jaecheon; Heo, Gyunyoung

    2017-01-01

    Highlights: • An enhanced, systematic and integrated design verification approach is proposed for V&V of FPGA-based I&C system of NPP. • RPS bistable fixed setpoint trip algorithm is designed, analyzed, verified and discussed using the proposed approaches. • The application of integrated verification approach simultaneously verified the entire design modules. • The applicability of the proposed V&V facilitated the design verification processes. - Abstract: Safety-critical instrumentation and control (I&C) system in nuclear power plant (NPP) implemented on programmable logic controllers (PLCs) plays a vital role in safe operation of the plant. The challenges such as fast obsolescence, the vulnerability to cyber-attack, and other related issues of software systems have currently led to the consideration of field programmable gate arrays (FPGAs) as an alternative to PLCs because of their advantages and hardware related benefits. However, safety analysis for FPGA-based I&C systems, and verification and validation (V&V) assessments still remain important issues to be resolved, which are now become a global research point of interests. In this work, we proposed a systematic design and verification strategies from start to ready-to-use in form of model-based approaches for FPGA-based reactor protection system (RPS) that can lead to the enhancement of the design verification and validation processes. The proposed methodology stages are requirement analysis, enhanced functional flow block diagram (EFFBD) models, finite state machine with data path (FSMD) models, hardware description language (HDL) code development, and design verifications. The design verification stage includes unit test – Very high speed integrated circuit Hardware Description Language (VHDL) test and modified condition decision coverage (MC/DC) test, module test – MATLAB/Simulink Co-simulation test, and integration test – FPGA hardware test beds. To prove the adequacy of the proposed

  3. Biological applications of an LCoS-based programmable array microscope (PAM)

    Science.gov (United States)

    Hagen, Guy M.; Caarls, Wouter; Thomas, Martin; Hill, Andrew; Lidke, Keith A.; Rieger, Bernd; Fritsch, Cornelia; van Geest, Bert; Jovin, Thomas M.; Arndt-Jovin, Donna J.

    2007-02-01

    We report on a new generation, commercial prototype of a programmable array optical sectioning fluorescence microscope (PAM) for rapid, light efficient 3D imaging of living specimens. The stand-alone module, including light source(s) and detector(s), features an innovative optical design and a ferroelectric liquid-crystal-on-silicon (LCoS) spatial light modulator (SLM) instead of the DMD used in the original PAM design. The LCoS PAM (developed in collaboration with Cairn Research, Ltd.) can be attached to a port of a(ny) unmodified fluorescence microscope. The prototype system currently operated at the Max Planck Institute incorporates a 6-position high-intensity LED illuminator, modulated laser and lamp light sources, and an Andor iXon emCCD camera. The module is mounted on an Olympus IX71 inverted microscope with 60-150X objectives with a Prior Scientific x,y, and z high resolution scanning stages. Further enhancements recently include: (i) point- and line-wise spectral resolution and (ii) lifetime imaging (FLIM) in the frequency domain. Multiphoton operation and other nonlinear techniques should be feasible. The capabilities of the PAM are illustrated by several examples demonstrating single molecule as well as lifetime imaging in live cells, and the unique capability to perform photoconversion with arbitrary patterns and high spatial resolution. Using quantum dot coupled ligands we show real-time binding and subsequent trafficking of individual ligand-growth factor receptor complexes on and in live cells with a temporal resolution and sensitivity exceeding those of conventional CLSM systems. The combined use of a blue laser and parallel LED or visible laser sources permits photoactivation and rapid kinetic analysis of cellular processes probed by photoswitchable visible fluorescent proteins such as DRONPA.

  4. Use of Field Programmable Gate Array Technology in Future Space Avionics

    Science.gov (United States)

    Ferguson, Roscoe C.; Tate, Robert

    2005-01-01

    Fulfilling NASA's new vision for space exploration requires the development of sustainable, flexible and fault tolerant spacecraft control systems. The traditional development paradigm consists of the purchase or fabrication of hardware boards with fixed processor and/or Digital Signal Processing (DSP) components interconnected via a standardized bus system. This is followed by the purchase and/or development of software. This paradigm has several disadvantages for the development of systems to support NASA's new vision. Building a system to be fault tolerant increases the complexity and decreases the performance of included software. Standard bus design and conventional implementation produces natural bottlenecks. Configuring hardware components in systems containing common processors and DSPs is difficult initially and expensive or impossible to change later. The existence of Hardware Description Languages (HDLs), the recent increase in performance, density and radiation tolerance of Field Programmable Gate Arrays (FPGAs), and Intellectual Property (IP) Cores provides the technology for reprogrammable Systems on a Chip (SOC). This technology supports a paradigm better suited for NASA's vision. Hardware and software production are melded for more effective development; they can both evolve together over time. Designers incorporating this technology into future avionics can benefit from its flexibility. Systems can be designed with improved fault isolation and tolerance using hardware instead of software. Also, these designs can be protected from obsolescence problems where maintenance is compromised via component and vendor availability.To investigate the flexibility of this technology, the core of the Central Processing Unit and Input/Output Processor of the Space Shuttle AP101S Computer were prototyped in Verilog HDL and synthesized into an Altera Stratix FPGA.

  5. Programme

    OpenAIRE

    Hobday, E, fl. 1905, artist

    2003-01-01

    A photograph of an illustrated programme listing dances. The illustration shows a snake charmer playing to a snake while another man watches. Buildings and trees can be seen behind a wall in the distance. In the lower right-hand corner of the programme is the signature 'E. Hobday'. The programme is almost certainly related to the Punjab Ball, Lahore. It is placed next to the Punjab Ball Menu in the album and the Menu is also illustrated by 'E. Hobday'.

  6. Smart time-pulse coding photoconverters as basic components 2D-array logic devices for advanced neural networks and optical computers

    Science.gov (United States)

    Krasilenko, Vladimir G.; Nikolsky, Alexander I.; Lazarev, Alexander A.; Michalnichenko, Nikolay N.

    2004-04-01

    The article deals with a conception of building arithmetic-logic devices (ALD) with a 2D-structure and optical 2D-array inputs-outputs as advanced high-productivity parallel basic operational training modules for realization of basic operation of continuous, neuro-fuzzy, multilevel, threshold and others logics and vector-matrix, vector-tensor procedures in neural networks, that consists in use of time-pulse coding (TPC) architecture and 2D-array smart optoelectronic pulse-width (or pulse-phase) modulators (PWM or PPM) for transformation of input pictures. The input grayscale image is transformed into a group of corresponding short optical pulses or time positions of optical two-level signal swing. We consider optoelectronic implementations of universal (quasi-universal) picture element of two-valued ALD, multi-valued ALD, analog-to-digital converters, multilevel threshold discriminators and we show that 2D-array time-pulse photoconverters are the base elements for these devices. We show simulation results of the time-pulse photoconverters as base components. Considered devices have technical parameters: input optical signals power is 200nW_200μW (if photodiode responsivity is 0.5A/W), conversion time is from tens of microseconds to a millisecond, supply voltage is 1.5_15V, consumption power is from tens of microwatts to a milliwatt, conversion nonlinearity is less than 1%. One cell consists of 2-3 photodiodes and about ten CMOS transistors. This simplicity of the cells allows to carry out their integration in arrays of 32x32, 64x64 elements and more.

  7. Project W-058 monitor and control system logic

    International Nuclear Information System (INIS)

    ROBERTS, J.B.

    1999-01-01

    This supporting document contains the printout of the control logic for the Project W-058 Monitor and Control System, as developed by Programmable Control Services, Inc. The logic is arranged in five appendices, one for each programmable logic controller console

  8. Reliability concerns with logical constants in Xilinx FPGA designs

    Energy Technology Data Exchange (ETDEWEB)

    Quinn, Heather M [Los Alamos National Laboratory; Graham, Paul [Los Alamos National Laboratory; Morgan, Keith [Los Alamos National Laboratory; Ostler, Patrick [Los Alamos National Laboratory; Allen, Greg [JPL; Swift, Gary [XILINX; Tseng, Chen W [XILINX

    2009-01-01

    In Xilinx Field Programmable Gate Arrays logical constants, which ground unused inputs and provide constants for designs, are implemented in SEU-susceptible logic. In the past, these logical constants have been shown to cause the user circuit to output bad data and were not resetable through off-line rcconfiguration. In the more recent devices, logical constants are less problematic, though mitigation should still be considered for high reliability applications. In conclusion, we have presented a number of reliability concerns with logical constants in the Xilinx Virtex family. There are two main categories of logical constants: implicit and explicit logical constants. In all of the Virtex devices, the implicit logical constants are implemented using half latches, which in the most recent devices are several orders of magnitudes smaller than configuration bit cells. Explicit logical constants are implemented exclusively using constant LUTs in the Virtex-I and Virtex-II, and use a combination of constant LUTs and architectural posts to the ground plane in the Virtex-4. We have also presented mitigation methods and options for these devices. While SEUs in implicit and some types of explicit logical constants can cause data corrupt, the chance of failure from these components is now much smaller than it was in the Virtex-I device. Therefore, for many cases, mitigation might not be necessary, except under extremely high reliability situations.

  9. Radiation-Hardened Circuitry Using Mask-Programmable Analog Arrays. Report 3

    Energy Technology Data Exchange (ETDEWEB)

    Britton, Jr, Charles L. [Oak Ridge National Lab. (ORNL), Oak Ridge, TN (United States); Shelton, Jacob H. [Oak Ridge National Lab. (ORNL), Oak Ridge, TN (United States); Ericson, Milton Nance [Oak Ridge National Lab. (ORNL), Oak Ridge, TN (United States); Blalock, Benjamin [Univ. of Tennessee, Knoxville, TN (United States)

    2015-03-01

    As the recent accident at Fukushima Daiichi so vividly demonstrated, telerobotic technologies capable of withstanding high radiation environments need to be readily available to enable operations, repair, and recovery under severe accident scenarios when human entry is extremely dangerous or not possible. Telerobotic technologies that enable remote operation in high dose rate environments have undergone revolutionary improvement over the past few decades. However, much of this technology cannot be employed in nuclear power environments because of the radiation sensitivity of the electronics and the organic insulator materials currently in use. This is a report of the activities involving Task 3 of the Nuclear Energy Enabling Technologies (NEET) 2 project Radiation Hardened Circuitry Using Mask-Programmable Analog Arrays [1]. Evaluation of the performance of the system for both pre- and post-irradiation as well as operation at elevated temperature will be performed. Detailed performance of the system will be documented to ensure the design meets requirements prior to any extended evaluation. A suite of tests will be developed which will allow evaluation before and after irradiation and during temperature. Selection of the radiation exposure facilities will be determined in the early phase of the project. Radiation exposure will consist of total integrated dose (TID) up to 200 kRad or above with several intermediate doses during test. Dose rates will be in various ranges determined by the facility that will be used with a target of 30 kRad/hr. Many samples of the pre-commercial devices to be used will have been tested in previous projects to doses of at least 300 kRad and temperatures up to 125C. The complete systems will therefore be tested for performance at intermediate doses. Extended temperature testing will be performed up to the limit of the commercial sensors. The test suite performed at each test point will consist of operational testing of the three basic

  10. Modelling of critical functions of nuclear reactors using Fild Programmable Gate Array; Modelagem de funcoes criticas de reatores nucleares utilizando Fild Programmable Gate Array

    Energy Technology Data Exchange (ETDEWEB)

    Teixeira, Pamela Iara Nolasco

    2016-07-01

    This paper proposes the development of a method using FPGA for critical security functions of a nuclear reactor. It was implemented two critical safety functions in VHDL, which is a way to describe, through a program, the behavior of a circuit or digital component. Two critical security functions, FCS Core Cooling, responsible for cooling the reactor core in the charts of the plant and also in the event of accidents involving loss of coolant and FCS Heat Transfer, responsible for cooling the reactor core in the event an accident with loss of coolant were implemented. In this Dissertation it was chosen the use of FPGA, because - due to the effects of aging, obsolescence issues, environmental degradation and mechanical failures - nuclear power plants need to replace their older systems by new ones based on digital technology. The technologies obtained using a system described in hardware language can be implemented in a programmable device, having the advantage of changing the code at any time. (author)

  11. Fuzzy Logic Controller Design for Intelligent Robots

    Directory of Open Access Journals (Sweden)

    Ching-Han Chen

    2017-01-01

    Full Text Available This paper presents a fuzzy logic controller by which a robot can imitate biological behaviors such as avoiding obstacles or following walls. The proposed structure is implemented by integrating multiple ultrasonic sensors into a robot to collect data from a real-world environment. The decisions that govern the robot’s behavior and autopilot navigation are driven by a field programmable gate array- (FPGA- based fuzzy logic controller. The validity of the proposed controller was demonstrated by simulating three real-world scenarios to test the bionic behavior of a custom-built robot. The results revealed satisfactorily intelligent performance of the proposed fuzzy logic controller. The controller enabled the robot to demonstrate intelligent behaviors in complex environments. Furthermore, the robot’s bionic functions satisfied its design objectives.

  12. Gas Sensors Characterization and Multilayer Perceptron (MLP) Hardware Implementation for Gas Identification Using a Field Programmable Gate Array (FPGA)

    Science.gov (United States)

    Benrekia, Fayçal; Attari, Mokhtar; Bouhedda, Mounir

    2013-01-01

    This paper develops a primitive gas recognition system for discriminating between industrial gas species. The system under investigation consists of an array of eight micro-hotplate-based SnO2 thin film gas sensors with different selectivity patterns. The output signals are processed through a signal conditioning and analyzing system. These signals feed a decision-making classifier, which is obtained via a Field Programmable Gate Array (FPGA) with Very High-Speed Integrated Circuit Hardware Description Language. The classifier relies on a multilayer neural network based on a back propagation algorithm with one hidden layer of four neurons and eight neurons at the input and five neurons at the output. The neural network designed after implementation consists of twenty thousand gates. The achieved experimental results seem to show the effectiveness of the proposed classifier, which can discriminate between five industrial gases. PMID:23529119

  13. Development of measurement system for radiation effect on static random access memory based field programmable gate array

    International Nuclear Information System (INIS)

    Yao Zhibin; He Baoping; Zhang Fengqi; Guo Hongxia; Luo Yinhong; Wang Yuanming; Zhang Keying

    2009-01-01

    Based on the detailed investigation in field programmable gate array(FPGA) radiation effects theory, a measurement system for radiation effects on static random access memory(SRAM)-based FPGA was developed. The testing principle of internal memory, function and power current was introduced. The hardware and software implement means of system were presented. Some important parameters for radiation effects on SRAM-based FPGA, such as configuration RAM upset section, block RAM upset section, function fault section and single event latchup section can be gained with this system. The transmission distance of the system can be over 50 m and the maximum number of tested gates can reach one million. (authors)

  14. A Fastbus module for trigger applications based on a digital signal processor and on programmable gate arrays

    International Nuclear Information System (INIS)

    Battaiotto, P.; Colavita, A.; Fratnik, F.; Lanceri, L.; Udine Univ.

    1991-01-01

    The new generation of DSP microprocessors based on RISC and Harvard-like architectures can conveniently take the place of specially built processors in fast trigger circuits for high-energy physics experiments. Presently available programmable gate arrays are well matched to them in speed and contribute to simplify the design of trigger circuits. Using these components, we designed and constructed a Fastbus module. We describe an application for the total-energy trigger of DELPHI, performing the readout of digitized calorimeter trigger data and some simple computations in less than 3 μs. (orig.)

  15. An inpatient lifestyle-change programme improves heart rate recovery in overweight and obese children and adolescents (LOGIC Trial).

    Science.gov (United States)

    Wilks, Désirée C; Rank, Melanie; Christle, Jeff; Langhof, Helmut; Siegrist, Monika; Halle, Martin

    2014-07-01

    Impaired heart rate recovery (HRR) is a strong predictor of overall mortality and cardio-metabolic risk. This study aimed at investigating (1) the effect of participation in a lifestyle-change programme for weight loss on HRR in overweight and obese children and (2) potential associations between the changes in one minute HRR (HRR1) and fitness, weight loss and cardio-metabolic risk. The analysis included 429 individuals (169 boys) aged 13.9 ± 2.3 years who participated in an inpatient weight loss programme for four to six weeks. At baseline and the end of the programme clinical investigations were performed, including blood analyses, blood pressure, anthropometry and maximal cycle ergometer exercise testing with continuous heart rate (HR) monitoring. HRR was calculated as the difference between the highest exercising HR and HR at one, three and five minutes post-exercise. Average body weight decreased from 90.7 ± 22.5 kg to 81.9 ± 20.0 kg and peak exercise capacity increased from 1.66 ± 0.38 W/kg to 2.05 ± 0.45 W/kg (p exercise capacity (p inpatient weight loss programme in overweight and obese children. This was not associated with improvements in body weight and cardio-metabolic risk; hence HRR would be a valuable addition to cardiovascular risk assessment in this group. © The European Society of Cardiology 2012.

  16. Field-programmable gate array based controller for multi spot light-addressable potentiometric sensors with integrated signal correction mode

    Energy Technology Data Exchange (ETDEWEB)

    Werner, Carl Frederik; Schusser, Sebastian; Spelthahn, Heiko [Aachen University of Applied Sciences, Juelich Campus, Institute of Nano- and Biotechnologies, Heinrich-Mussmann-Strasse 1, 52428 Juelich (Germany); Institute of Bio- and Nanosystems (IBN-2), Research Centre Juelich GmbH, 52425 Juelich (Germany); Wagner, Torsten; Yoshinobu, Tatsuo [Tohoku University, Department of Electronic Engineering, 6-6-05 Aramaki Aza Aoba, Aoba-ku, Sendai, Miyagi 980-8579 (Japan); Schoening, Michael J., E-mail: schoening@fh-aachen.de [Aachen University of Applied Sciences, Juelich Campus, Institute of Nano- and Biotechnologies, Heinrich-Mussmann-Strasse 1, 52428 Juelich (Germany); Institute of Bio- and Nanosystems (IBN-2), Research Centre Juelich GmbH, 52425 Juelich (Germany)

    2011-11-01

    Highlights: > Flexible up-scalable design of a light-addressable potentiometric sensor set-up. > Utilisation of a field-programmable gate array to address LAPS measurement spots. > Measurements in amplitude-mode and phase-mode for different pH solutions. > Amplitude, phase and frequency behaviour of LAPS for single and multiple light stimulus. > Signal calibration method by brightness control to compensated systematic errors. - Abstract: A light-addressable potentiometric sensor (LAPS) can measure the concentration of one or several analytes at the sensor surface simultaneously in a spatially resolved manner. A modulated light pointer stimulates the semiconductor structure at the area of interest and a responding photocurrent can be read out. By simultaneous stimulation of several areas with light pointers of different modulation frequencies, the read out can be performed at the same time. With the new proposed controller electronic based on a field-programmable gate array (FPGA), it is possible to control the modulation frequencies, phase shifts, and light brightness of multiple light pointers independently and simultaneously. Thus, it is possible to investigate the frequency response of the sensor, and to examine the analyte concentration by the determination of the surface potential with the help of current/voltage curves and phase/voltage curves. Additionally, the ability to individually change the light intensities of each light pointer is used to perform signal correction.

  17. Data Logic

    DEFF Research Database (Denmark)

    Nilsson, Jørgen Fischer

    A Gentle introduction to logical languages, logical modeling, formal reasoning and computational logic for computer science and software engineering students......A Gentle introduction to logical languages, logical modeling, formal reasoning and computational logic for computer science and software engineering students...

  18. A Complementary Resistive Switch-based Crossbar Array Adder

    OpenAIRE

    Siemon, A.; Menzel, S.; Waser, R.; Linn, E.

    2014-01-01

    Redox-based resistive switching devices (ReRAM) are an emerging class of non-volatile storage elements suited for nanoscale memory applications. In terms of logic operations, ReRAM devices were suggested to be used as programmable interconnects, large-scale look-up tables or for sequential logic operations. However, without additional selector devices these approaches are not suited for use in large scale nanocrossbar memory arrays, which is the preferred architecture for ReRAM devices due to...

  19. Microlens array processor with programmable weight mask and direct optical input

    Science.gov (United States)

    Schmid, Volker R.; Lueder, Ernst H.; Bader, Gerhard; Maier, Gert; Siegordner, Jochen

    1999-03-01

    We present an optical feature extraction system with a microlens array processor. The system is suitable for online implementation of a variety of transforms such as the Walsh transform and DCT. Operating with incoherent light, our processor accepts direct optical input. Employing a sandwich- like architecture, we obtain a very compact design of the optical system. The key elements of the microlens array processor are a square array of 15 X 15 spherical microlenses on acrylic substrate and a spatial light modulator as transmissive mask. The light distribution behind the mask is imaged onto the pixels of a customized a-Si image sensor with adjustable gain. We obtain one output sample for each microlens image and its corresponding weight mask area as summation of the transmitted intensity within one sensor pixel. The resulting architecture is very compact and robust like a conventional camera lens while incorporating a high degree of parallelism. We successfully demonstrate a Walsh transform into the spatial frequency domain as well as the implementation of a discrete cosine transform with digitized gray values. We provide results showing the transformation performance for both synthetic image patterns and images of natural texture samples. The extracted frequency features are suitable for neural classification of the input image. Other transforms and correlations can be implemented in real-time allowing adaptive optical signal processing.

  20. A field programmable gate array unit for the diagnosis and control of neoclassical tearing modes on MAST

    Energy Technology Data Exchange (ETDEWEB)

    O' Gorman, T.; Gibson, K. J.; Snape, J. A. [York Plasma Institute, Department of Physics, University of York, York YO10 5DD (United Kingdom); Naylor, G.; Huang, B.; McArdle, G. J.; Scannell, R.; Shibaev, S.; Thomas-Davies, N. [EURATOM/CCFE Fusion Association, Culham Science Centre, Oxfordshire OX14 3DB (United Kingdom)

    2012-10-15

    A real-time system has been developed to trigger both the MAST Thomson scattering (TS) system and the plasma control system on the phase and amplitude of neoclassical tearing modes (NTMs), extending the capabilities of the original system. This triggering system determines the phase and amplitude of a given NTM using magnetic coils at different toroidal locations. Real-time processing of the raw magnetic data occurs on a low cost field programmable gate array (FPGA) based unit which permits triggering of the TS lasers on specific amplitudes and phases of NTM evolution. The MAST plasma control system can receive a separate trigger from the FPGA unit that initiates a vertical shift of the MAST magnetic axis. Such shifts have fully removed m/n= 2/1 NTMs instabilities on a number of MAST discharges.

  1. Field-programmable gate array implementation of an all-digital IEEE 802.15.4-compliant transceiver

    Science.gov (United States)

    Cornetta, Gianluca; Touhafi, Abdellah; Santos, David J.; Vázquez, José M.

    2010-12-01

    An architecture for a low-cost, low-complexity digital transceiver is presented in this article. The proposed architecture targets the IEEE 802.15.4 standard for short-range wireless personal area networks and has been implemented as a synthesisable VHDL register transfer level description. The system has been evaluated and tested using a Xilinx 90 nm Virtex-4 field-programmable gate array as the target technology. Bit error rate (BER) and error vector magnitude (EVM) have been used as the figures of merit for modem performance. Simulations show that the recommended minimum BER is achieved at E b/N 0 = 8.7 dB, whereas the EVM is 19.5%. The implemented device occupies 10% of the target FPGA and has a normalised maximum power consumption of 44 mW in transmit mode and 53 mW in receiver mode.

  2. [Hardware Implementation of Numerical Simulation Function of Hodgkin-Huxley Model Neurons Action Potential Based on Field Programmable Gate Array].

    Science.gov (United States)

    Wang, Jinlong; Lu, Mai; Hu, Yanwen; Chen, Xiaoqiang; Pan, Qiangqiang

    2015-12-01

    Neuron is the basic unit of the biological neural system. The Hodgkin-Huxley (HH) model is one of the most realistic neuron models on the electrophysiological characteristic description of neuron. Hardware implementation of neuron could provide new research ideas to clinical treatment of spinal cord injury, bionics and artificial intelligence. Based on the HH model neuron and the DSP Builder technology, in the present study, a single HH model neuron hardware implementation was completed in Field Programmable Gate Array (FPGA). The neuron implemented in FPGA was stimulated by different types of current, the action potential response characteristics were analyzed, and the correlation coefficient between numerical simulation result and hardware implementation result were calculated. The results showed that neuronal action potential response of FPGA was highly consistent with numerical simulation result. This work lays the foundation for hardware implementation of neural network.

  3. Evaluation of the Leon3 soft-core processor within a Xilinx radiation-hardened field-programmable gate array.

    Energy Technology Data Exchange (ETDEWEB)

    Learn, Mark Walter

    2012-01-01

    The purpose of this document is to summarize the work done to evaluate the performance of the Leon3 soft-core processor in a radiation environment while instantiated in a radiation-hardened static random-access memory based field-programmable gate array. This evaluation will look at the differences between two soft-core processors: the open-source Leon3 core and the fault-tolerant Leon3 core. Radiation testing of these two cores was conducted at the Texas A&M University Cyclotron facility and Lawrence Berkeley National Laboratory. The results of these tests are included within the report along with designs intended to improve the mitigation of the open-source Leon3. The test setup used for evaluating both versions of the Leon3 is also included within this document.

  4. A new data acquisition and imaging system for nuclear microscopy based on a Field Programmable Gate Array card

    International Nuclear Information System (INIS)

    Bettiol, A.A.; Udalagama, C.; Watt, F.

    2009-01-01

    The introduction of the new Field Programmable Gate Array (FPGA) cards by National Instruments has made it possible for the first time to develop reconfigurable custom data acquisition hardware easily with the LabVIEW programming environment. Data acquisition issues such as precise timing for scanning and operating system latencies can now be easily overcome using this new technology because the data acquisition software is embedded in the FPGA chip on the card. In this paper we present the first results of the new data acquisition system developed at the Centre for Ion Beam Applications (CIBA), National University of Singapore using the new National Instruments cards in conjunction with rack mountable Wilkinson type ADCs.

  5. Fuzzy Logic vs. Neutrosophic Logic: Operations Logic

    Directory of Open Access Journals (Sweden)

    Salah Bouzina

    2016-12-01

    Full Text Available The goal of this research is first to show how different, thorough, widespread and effective are the operations logic of the neutrosophic logic compared to the fuzzy logic’s operations logical. The second aim is to observe how a fully new logic, the neutrosophic logic, is established starting by changing the previous logical perspective fuzzy logic, and by changing that, we mean changing changing the truth values from the truth and falsity degrees membership in fuzzy logic, to the truth, falsity and indeterminacy degrees membership in neutrosophic logic; and thirdly, to observe that there is no limit to the logical discoveries - we only change the principle, then the system changes completely.

  6. A water pumping control system with a programmable logic controller (PLC) and industrial wireless modules for industrial plants--an experimental setup.

    Science.gov (United States)

    Bayindir, Ramazan; Cetinceviz, Yucel

    2011-04-01

    This paper describes a water pumping control system that is designed for production plants and implemented in an experimental setup in a laboratory. These plants contain harsh environments in which chemicals, vibrations or moving parts exist that could potentially damage the cabling or wires that are part of the control system. Furthermore, the data has to be transferred over paths that are accessible to the public. The control systems that it uses are a programmable logic controller (PLC) and industrial wireless local area network (IWLAN) technologies. It is implemented by a PLC, an communication processor (CP), two IWLAN modules, and a distributed input/output (I/O) module, as well as the water pump and sensors. Our system communication is based on an Industrial Ethernet and uses the standard Transport Control Protocol/Internet Protocol for parameterisation, configuration and diagnostics. The main function of the PLC is to send a digital signal to the water pump to turn it on or off, based on the tank level, using a pressure transmitter and inputs from limit switches that indicate the level of the water in the tank. This paper aims to provide a convenient solution in process plants where cabling is not possible. It also has lower installation and maintenance cost, provides reliable operation, and robust and flexible construction, suitable for industrial applications. Copyright © 2010 ISA. Published by Elsevier Ltd. All rights reserved.

  7. Modelling of critical functions of nuclear reactors using Fild Programmable Gate Array

    International Nuclear Information System (INIS)

    Teixeira, Pamela Iara Nolasco

    2016-01-01

    This paper proposes the development of a method using FPGA for critical security functions of a nuclear reactor. It was implemented two critical safety functions in VHDL, which is a way to describe, through a program, the behavior of a circuit or digital component. Two critical security functions, FCS Core Cooling, responsible for cooling the reactor core in the charts of the plant and also in the event of accidents involving loss of coolant and FCS Heat Transfer, responsible for cooling the reactor core in the event an accident with loss of coolant were implemented. In this Dissertation it was chosen the use of FPGA, because - due to the effects of aging, obsolescence issues, environmental degradation and mechanical failures - nuclear power plants need to replace their older systems by new ones based on digital technology. The technologies obtained using a system described in hardware language can be implemented in a programmable device, having the advantage of changing the code at any time. (author)

  8. Programmable level-1 trigger with 3D-Flow processor array

    International Nuclear Information System (INIS)

    Crosetto, D.

    1994-01-01

    The 3D-Flow parallel processing system is a new concept in processor architecture, system architecture, and assembly architecture. Compared to the electronics used in present systems, this approach reduces the cost and complexity of the hardware and allows easy assembly, disassembly, incremental upgrading, and maintenance of different interconnection topologies. The 3D-Flow parallel-processing system benefits high energy physics (HEP) by allowing: (1) common less costly hardware to be used in different experiments. (2) new uses of existing installations. (3) tuning of trigger based on the first analyzed data, and (4) selection of desired events directly from raw data. The goal of this parallel-processing architecture is to acquire multiple data in parallel (up to 100 million frames per second) and to process them at high speed, accomplishing digital filtering on the input data, pattern recognition (particle identification), data moving, and data formatting. The main features of the system are its programmability, scalability, high-speed communication, and low cost. The compactness of the 3D-Flow parallel-processing system in concert with the processor architecture allows processor interconnections to be mapped into the geometry of sensors (detectors in HEP) without large interconnection signal delay, enabling real-time pattern recognition. The overall 3D-Flow project has passed a major design review at Fermilab (Reviewers included experts in computers, triggering, system assembly, and electronics)

  9. A counting-weighted calibration method for a field-programmable-gate-array-based time-to-digital converter

    International Nuclear Information System (INIS)

    Chen, Yuan-Ho

    2017-01-01

    In this work, we propose a counting-weighted calibration method for field-programmable-gate-array (FPGA)-based time-to-digital converter (TDC) to provide non-linearity calibration for use in positron emission tomography (PET) scanners. To deal with the non-linearity in FPGA, we developed a counting-weighted delay line (CWD) to count the delay time of the delay cells in the TDC in order to reduce the differential non-linearity (DNL) values based on code density counts. The performance of the proposed CWD-TDC with regard to linearity far exceeds that of TDC with a traditional tapped delay line (TDL) architecture, without the need for nonlinearity calibration. When implemented in a Xilinx Vertix-5 FPGA device, the proposed CWD-TDC achieved time resolution of 60 ps with integral non-linearity (INL) and DNL of [−0.54, 0.24] and [−0.66, 0.65] least-significant-bit (LSB), respectively. This is a clear indication of the suitability of the proposed FPGA-based CWD-TDC for use in PET scanners.

  10. Field application of smart SHM using field programmable gate array technology to monitor an RC bridge in New Mexico

    International Nuclear Information System (INIS)

    Azarbayejani, M; Jalalpour, M; Reda Taha, M M; El-Osery, A I

    2011-01-01

    In this paper, an innovative field application of a structural health monitoring (SHM) system using field programmable gate array (FPGA) technology and wireless communication is presented. The new SHM system was installed to monitor a reinforced concrete (RC) bridge on Interstate 40 (I-40) in Tucumcari, New Mexico. This newly installed system allows continuous remote monitoring of this bridge using solar power. Details of the SHM component design and installation are discussed. The integration of FPGA and solar power technologies make it possible to remotely monitor infrastructure with limited access to power. Furthermore, the use of FPGA technology enables smart monitoring where data communication takes place on-need (when damage warning signs are met) and on-demand for periodic monitoring of the bridge. Such a system enables a significant cut in communication cost and power demands which are two challenges during SHM operation. Finally, a three-dimensional finite element (FE) model of the bridge was developed and calibrated using a static loading field test. This model is then used for simulating damage occurrence on the bridge. Using the proposed automation process for SHM will reduce human intervention significantly and can save millions of dollars currently spent on prescheduled inspection of critical infrastructure worldwide

  11. Field application of smart SHM using field programmable gate array technology to monitor an RC bridge in New Mexico

    Science.gov (United States)

    Azarbayejani, M.; Jalalpour, M.; El-Osery, A. I.; Reda Taha, M. M.

    2011-08-01

    In this paper, an innovative field application of a structural health monitoring (SHM) system using field programmable gate array (FPGA) technology and wireless communication is presented. The new SHM system was installed to monitor a reinforced concrete (RC) bridge on Interstate 40 (I-40) in Tucumcari, New Mexico. This newly installed system allows continuous remote monitoring of this bridge using solar power. Details of the SHM component design and installation are discussed. The integration of FPGA and solar power technologies make it possible to remotely monitor infrastructure with limited access to power. Furthermore, the use of FPGA technology enables smart monitoring where data communication takes place on-need (when damage warning signs are met) and on-demand for periodic monitoring of the bridge. Such a system enables a significant cut in communication cost and power demands which are two challenges during SHM operation. Finally, a three-dimensional finite element (FE) model of the bridge was developed and calibrated using a static loading field test. This model is then used for simulating damage occurrence on the bridge. Using the proposed automation process for SHM will reduce human intervention significantly and can save millions of dollars currently spent on prescheduled inspection of critical infrastructure worldwide.

  12. Case for a field-programmable gate array multicore hybrid machine for an image-processing application

    Science.gov (United States)

    Rakvic, Ryan N.; Ives, Robert W.; Lira, Javier; Molina, Carlos

    2011-01-01

    General purpose computer designers have recently begun adding cores to their processors in order to increase performance. For example, Intel has adopted a homogeneous quad-core processor as a base for general purpose computing. PlayStation3 (PS3) game consoles contain a multicore heterogeneous processor known as the Cell, which is designed to perform complex image processing algorithms at a high level. Can modern image-processing algorithms utilize these additional cores? On the other hand, modern advancements in configurable hardware, most notably field-programmable gate arrays (FPGAs) have created an interesting question for general purpose computer designers. Is there a reason to combine FPGAs with multicore processors to create an FPGA multicore hybrid general purpose computer? Iris matching, a repeatedly executed portion of a modern iris-recognition algorithm, is parallelized on an Intel-based homogeneous multicore Xeon system, a heterogeneous multicore Cell system, and an FPGA multicore hybrid system. Surprisingly, the cheaper PS3 slightly outperforms the Intel-based multicore on a core-for-core basis. However, both multicore systems are beaten by the FPGA multicore hybrid system by >50%.

  13. Design and implementation of a reconfigurable mixed-signal SoC based on field programmable analog arrays

    Science.gov (United States)

    Liu, Lintao; Gao, Yuhan; Deng, Jun

    2017-11-01

    This work presents a reconfigurable mixed-signal system-on-chip (SoC), which integrates switched-capacitor-based field programmable analog arrays (FPAA), analog-to-digital converter (ADC), digital-to-analog converter, digital down converter , digital up converter, 32-bit reduced instruction-set computer central processing unit (CPU) and other digital IPs on a single chip with 0.18 μm CMOS technology. The FPAA intellectual property could be reconfigured as different function circuits, such as gain amplifier, divider, sine generator, and so on. This single-chip integrated mixed-signal system is a complete modern signal processing system, occupying a die area of 7 × 8 mm 2 and consuming 719 mW with a clock frequency of 150 MHz for CPU and 200 MHz for ADC/DAC. This SoC chip can help customers to shorten design cycles, save board area, reduce the system power consumption and depress the system integration risk, which would afford a big prospect of application for wireless communication. Project supported by the National High Technology and Development Program of China (No. 2012AA012303).

  14. A counting-weighted calibration method for a field-programmable-gate-array-based time-to-digital converter

    Energy Technology Data Exchange (ETDEWEB)

    Chen, Yuan-Ho, E-mail: chenyh@mail.cgu.edu.tw [Department of Electronic Engineering, Chang Gung University, Tao-Yuan 333, Taiwan (China); Department of Radiation Oncology, Chang Gung Memorial Hospital, Tao-Yuan 333, Taiwan (China); Center for Reliability Sciences and Technologies, Chang Gung University, Tao-Yuan 333, Taiwan (China)

    2017-05-11

    In this work, we propose a counting-weighted calibration method for field-programmable-gate-array (FPGA)-based time-to-digital converter (TDC) to provide non-linearity calibration for use in positron emission tomography (PET) scanners. To deal with the non-linearity in FPGA, we developed a counting-weighted delay line (CWD) to count the delay time of the delay cells in the TDC in order to reduce the differential non-linearity (DNL) values based on code density counts. The performance of the proposed CWD-TDC with regard to linearity far exceeds that of TDC with a traditional tapped delay line (TDL) architecture, without the need for nonlinearity calibration. When implemented in a Xilinx Vertix-5 FPGA device, the proposed CWD-TDC achieved time resolution of 60 ps with integral non-linearity (INL) and DNL of [−0.54, 0.24] and [−0.66, 0.65] least-significant-bit (LSB), respectively. This is a clear indication of the suitability of the proposed FPGA-based CWD-TDC for use in PET scanners.

  15. A programmable systolic array correlator as a trigger processor for electron pairs in rich (ring image Cherenkov) counters

    Science.gov (United States)

    Männer, R.

    1989-12-01

    This paper describes a systolic array processor for a ring image Cherenkov counter which is capable of identifying pairs of electron circles with a known radius and a certain minimum distance within 15 μs. The processor is a very flexible and fast device. It consists of 128 x 128 processing elements (PEs), where one PE is assigned to each pixel of the image. All PEs run synchronously at 40 MHz. The identification of electron circles is done by correlating the detector image with the proper circle circumference. Circle centers are found by peak detection in the correlation result. A second correlation with a circle disc allows circles of closed electron pairs to be rejected. The trigger decision is generated if a pseudo adder detects at least two remaining circles. The device is controlled by a freely programmable sequencer. A VLSI chip containing 8 x 8 PEs is being developed using a VENUS design system and will be produced in 2μ CMOS technology.

  16. A programmable systolic array correlator as a trigger processor for electron pairs in RICH (ring image Cherenkov) counters

    International Nuclear Information System (INIS)

    Maenner, R.

    1989-01-01

    This paper describes a systolic array processor for a ring image Cherenkov counter which is capable of identifying pairs of electron circles with a known radius and a certain minimum distance within 15 μs. The processor is a very flexible and fast device. It consists of 128x128 processing elements (PEs), where one PE is assigned to each pixel of the image. All PEs run synchronously at 40 MHz. The identification of electron circles is done by correlating the detector image with the proper circle circumference. Circle centers are found by peak detection in the correlation result. A second correlation with a circle disc allows circles of closed electron pairs to be rejected. The trigger decision is generated if a pseudo adder detects at least two remaining circles. The device is controlled by a freely programmable sequencer. A VLSI chip containing 8x8 PEs is being developed using a VENUS design system and will be produced in 2μ CMOS technology. (orig.)

  17. Fringe pattern demodulation using the one-dimensional continuous wavelet transform: field-programmable gate array implementation.

    Science.gov (United States)

    Abid, Abdulbasit

    2013-03-01

    This paper presents a thorough discussion of the proposed field-programmable gate array (FPGA) implementation for fringe pattern demodulation using the one-dimensional continuous wavelet transform (1D-CWT) algorithm. This algorithm is also known as wavelet transform profilometry. Initially, the 1D-CWT is programmed using the C programming language and compiled into VHDL using the ImpulseC tool. This VHDL code is implemented on the Altera Cyclone IV GX EP4CGX150DF31C7 FPGA. A fringe pattern image with a size of 512×512 pixels is presented to the FPGA, which processes the image using the 1D-CWT algorithm. The FPGA requires approximately 100 ms to process the image and produce a wrapped phase map. For performance comparison purposes, the 1D-CWT algorithm is programmed using the C language. The C code is then compiled using the Intel compiler version 13.0. The compiled code is run on a Dell Precision state-of-the-art workstation. The time required to process the fringe pattern image is approximately 1 s. In order to further reduce the execution time, the 1D-CWT is reprogramed using Intel Integrated Primitive Performance (IPP) Library Version 7.1. The execution time was reduced to approximately 650 ms. This confirms that at least sixfold speedup was gained using FPGA implementation over a state-of-the-art workstation that executes heavily optimized implementation of the 1D-CWT algorithm.

  18. Theory and implementation of a very high throughput true random number generator in field programmable gate array

    Energy Technology Data Exchange (ETDEWEB)

    Wang, Yonggang, E-mail: wangyg@ustc.edu.cn; Hui, Cong; Liu, Chong; Xu, Chao [Department of Modern Physics, University of Science and Technology of China, Hefei 230026 (China)

    2016-04-15

    The contribution of this paper is proposing a new entropy extraction mechanism based on sampling phase jitter in ring oscillators to make a high throughput true random number generator in a field programmable gate array (FPGA) practical. Starting from experimental observation and analysis of the entropy source in FPGA, a multi-phase sampling method is exploited to harvest the clock jitter with a maximum entropy and fast sampling speed. This parametrized design is implemented in a Xilinx Artix-7 FPGA, where the carry chains in the FPGA are explored to realize the precise phase shifting. The generator circuit is simple and resource-saving, so that multiple generation channels can run in parallel to scale the output throughput for specific applications. The prototype integrates 64 circuit units in the FPGA to provide a total output throughput of 7.68 Gbps, which meets the requirement of current high-speed quantum key distribution systems. The randomness evaluation, as well as its robustness to ambient temperature, confirms that the new method in a purely digital fashion can provide high-speed high-quality random bit sequences for a variety of embedded applications.

  19. Field programmable gate array based hardware implementation of a gradient filter for edge detection in colour images with subpixel precision

    International Nuclear Information System (INIS)

    Schellhorn, M; Rosenberger, M; Correns, M; Blau, M; Goepfert, A; Rueckwardt, M; Linss, G

    2010-01-01

    Within the field of industrial image processing the use of colour cameras becomes ever more common. Increasingly the established black and white cameras are replaced by economical single-chip colour cameras with Bayer pattern. The use of the additional colour information is particularly important for recognition or inspection. Become interesting however also for the geometric metrology, if measuring tasks can be solved more robust or more exactly. However only few suitable algorithms are available, in order to detect edges with the necessary precision. All attempts require however additional computation expenditure. On the basis of a new filter for edge detection in colour images with subpixel precision, the implementation on a pre-processing hardware platform is presented. Hardware implemented filters offer the advantage that they can be used easily with existing measuring software, since after the filtering a single channel image is present, which unites the information of all colour channels. Advanced field programmable gate arrays represent an ideal platform for the parallel processing of multiple channels. The effective implementation presupposes however a high programming expenditure. On the example of the colour filter implementation, arising problems are analyzed and the chosen solution method is presented.

  20. Accelerating object detection via a visual-feature-directed search cascade: algorithm and field programmable gate array implementation

    Science.gov (United States)

    Kyrkou, Christos; Theocharides, Theocharis

    2016-07-01

    Object detection is a major step in several computer vision applications and a requirement for most smart camera systems. Recent advances in hardware acceleration for real-time object detection feature extensive use of reconfigurable hardware [field programmable gate arrays (FPGAs)], and relevant research has produced quite fascinating results, in both the accuracy of the detection algorithms as well as the performance in terms of frames per second (fps) for use in embedded smart camera systems. Detecting objects in images, however, is a daunting task and often involves hardware-inefficient steps, both in terms of the datapath design and in terms of input/output and memory access patterns. We present how a visual-feature-directed search cascade composed of motion detection, depth computation, and edge detection, can have a significant impact in reducing the data that needs to be examined by the classification engine for the presence of an object of interest. Experimental results on a Spartan 6 FPGA platform for face detection indicate data search reduction of up to 95%, which results in the system being able to process up to 50 1024×768 pixels images per second with a significantly reduced number of false positives.

  1. Embedding Logics into Product Logic

    Czech Academy of Sciences Publication Activity Database

    Baaz, M.; Hájek, Petr; Krajíček, Jan; Švejda, David

    1998-01-01

    Roč. 61, č. 1 (1998), s. 35-47 ISSN 0039-3215 R&D Projects: GA AV ČR IAA1030601 Grant - others:COST(XE) Action 15 Keywords : fuzzy logic * Lukasiewicz logic * Gödel logic * product logic * computational complexity * arithmetical hierarchy Subject RIV: BA - General Mathematics

  2. Greek, Indian and Arabic logic

    CERN Document Server

    Gabbay, Dov M

    2004-01-01

    Greek, Indian and Arabic Logic marks the initial appearance of the multi-volume Handbook of the History of Logic. Additional volumes will be published when ready, rather than in strict chronological order. Soon to appear are The Rise of Modern Logic: From Leibniz to Frege. Also in preparation are Logic From Russell to Gödel, Logic and the Modalities in the Twentieth Century, and The Many-Valued and Non-Monotonic Turn in Logic. Further volumes will follow, including Mediaeval and Renaissance Logic and Logic: A History of its Central. In designing the Handbook of the History of Logic, the Editors have taken the view that the history of logic holds more than an antiquarian interest, and that a knowledge of logic's rich and sophisticated development is, in various respects, relevant to the research programmes of the present day. Ancient logic is no exception. The present volume attests to the distant origins of some of modern logic's most important features, such as can be found in the claim by the authors of t...

  3. Logicism, intuitionism, and formalism

    CERN Document Server

    Symons, John

    2008-01-01

    Aims to review the programmes in the foundations of mathematics from the classical period and to assess their possible relevance for contemporary philosophy of mathematics. This work is suitable for researchers and graduate students of philosophy, logic, mathematics and theoretical computer science.

  4. Logical labyrinths

    CERN Document Server

    Smullyan, Raymond

    2008-01-01

    This book features a unique approach to the teaching of mathematical logic by putting it in the context of the puzzles and paradoxes of common language and rational thought. It serves as a bridge from the author's puzzle books to his technical writing in the fascinating field of mathematical logic. Using the logic of lying and truth-telling, the author introduces the readers to informal reasoning preparing them for the formal study of symbolic logic, from propositional logic to first-order logic, a subject that has many important applications to philosophy, mathematics, and computer science. T

  5. General purpose programmable accelerator board

    Science.gov (United States)

    Robertson, Perry J.; Witzke, Edward L.

    2001-01-01

    A general purpose accelerator board and acceleration method comprising use of: one or more programmable logic devices; a plurality of memory blocks; bus interface for communicating data between the memory blocks and devices external to the board; and dynamic programming capabilities for providing logic to the programmable logic device to be executed on data in the memory blocks.

  6. Mathematical logic

    CERN Document Server

    Kleene, Stephen Cole

    1967-01-01

    Undergraduate students with no prior instruction in mathematical logic will benefit from this multi-part text. Part I offers an elementary but thorough overview of mathematical logic of 1st order. Part II introduces some of the newer ideas and the more profound results of logical research in the 20th century. 1967 edition.

  7. BDI Logics

    NARCIS (Netherlands)

    Meyer, J.J.Ch.; Broersen, J.M.; Herzig, A.

    2015-01-01

    This paper presents an overview of so-called BDI logics, logics where the notion of Beliefs, Desires and Intentions play a central role. Starting out from the basic ideas about BDI by Bratman, we consider various formalizations in logic, such as the approach of Cohen and Levesque, slightly

  8. MANUAL LOGIC CONTROLLER (MLC)

    OpenAIRE

    Claude Ziad Bayeh

    2015-01-01

    The “Manual Logic Controller” also called MLC, is an electronic circuit invented and designed by the author in 2008, in order to replace the well known PLC (Programmable Logic Controller) in many applications for its advantages and its low cost of fabrication. The function of the MLC is somewhat similar to the well known PLC, but instead of doing it by inserting a written program into the PLC using a computer or specific software inside the PLC, it will be manually programmed in a manner to h...

  9. G(sup 4)FET Implementations of Some Logic Circuits

    Science.gov (United States)

    Mojarradi, Mohammad; Akarvardar, Kerem; Cristoleveanu, Sorin; Gentil, Paul; Blalock, Benjamin; Chen, Suhan

    2009-01-01

    Some logic circuits have been built and demonstrated to work substantially as intended, all as part of a continuing effort to exploit the high degrees of design flexibility and functionality of the electronic devices known as G(sup 4)FETs and described below. These logic circuits are intended to serve as prototypes of more complex advanced programmable-logicdevice-type integrated circuits, including field-programmable gate arrays (FPGAs). In comparison with prior FPGAs, these advanced FPGAs could be much more efficient because the functionality of G(sup 4)FETs is such that fewer discrete components are needed to perform a given logic function in G(sup 4)FET circuitry than are needed perform the same logic function in conventional transistor-based circuitry. The underlying concept of using G(sup 4)FETs as building blocks of programmable logic circuitry was also described, from a different perspective, in G(sup 4)FETs as Universal and Programmable Logic Gates (NPO-41698), NASA Tech Briefs, Vol. 31, No. 7 (July 2007), page 44. A G(sup 4)FET can be characterized as an accumulation-mode silicon-on-insulator (SOI) metal oxide/semiconductor field-effect transistor (MOSFET) featuring two junction field-effect transistor (JFET) gates. The structure of a G(sup 4)FET (see Figure 1) is the same as that of a p-channel inversion-mode SOI MOSFET with two body contacts on each side of the channel. The top gate (G1), the substrate emulating a back gate (G2), and the junction gates (JG1 and JG2) can be biased independently of each other and, hence, each can be used to independently control some aspects of the conduction characteristics of the transistor. The independence of the actions of the four gates is what affords the enhanced functionality and design flexibility of G(sup 4)FETs. The present G(sup 4)FET logic circuits include an adjustable-threshold inverter, a real-time-reconfigurable logic gate, and a dynamic random-access memory (DRAM) cell (see Figure 2). The configuration

  10. Dispositional logic

    Science.gov (United States)

    Le Balleur, J. C.

    1988-01-01

    The applicability of conventional mathematical analysis (based on the combination of two-valued logic and probability theory) to problems in which human judgment, perception, or emotions play significant roles is considered theoretically. It is shown that dispositional logic, a branch of fuzzy logic, has particular relevance to the common-sense reasoning typical of human decision-making. The concepts of dispositionality and usuality are defined analytically, and a dispositional conjunctive rule and dispositional modus ponens are derived.

  11. Development of RPS trip logic based on PLD technology

    International Nuclear Information System (INIS)

    Choi, Jong Gyun; Lee, Dong Young

    2012-01-01

    The majority of instrumentation and control (I and C) systems in today's nuclear power plants (NPPs) are based on analog technology. Thus, most existing I and C systems now face obsolescence problems. Existing NPPs have difficulty in repairing and replacing devices and boards during maintenance because manufacturers no longer produce the analog devices and boards used in the implemented I and C systems. Therefore, existing NPPs are replacing the obsolete analog I and C systems with advanced digital systems. New NPPs are also adopting digital I and C systems because the economic efficiencies and usability of the systems are higher than the analog I and C systems. Digital I and C systems are based on two technologies: a microprocessor based system in which software programs manage the required functions and a programmable logic device (PLD) based system in which programmable logic devices, such as field programmable gate arrays, manage the required functions. PLD based systems provide higher levels of performance compared with microprocessor based systems because PLD systems can process the data in parallel while microprocessor based systems process the data sequentially. In this research, a bistable trip logic in a reactor protection system (RPS) was developed using very high speed integrated circuits hardware description language (VHDL), which is a hardware description language used in electronic design to describe the behavior of the digital system. Functional verifications were also performed in order to verify that the bistable trip logic was designed correctly and satisfied the required specifications. For the functional verification, a random testing technique was adopted to generate test inputs for the bistable trip logic.

  12. Field programmable gate array-based real-time optical Doppler tomography system for in vivo imaging of cardiac dynamics in the chick embryo

    DEFF Research Database (Denmark)

    Thrane, Lars; Larsen, Henning Engelbrecht; Norozi, Kambiz

    2009-01-01

    efficient and compact implementation by combining the conversion to an analytic signal with a pulse shaping function without the need for extra resources as compared to the Hilbert transform method. The conversion of the analytic signal to amplitude and phase is done by use of the coordinate rotation......We demonstrate a field programmable gate-array-based real-time optical Doppler tomography system. A complex-valued bandpass filter is used for the first time in optical coherence tomography signal processing to create the analytic signal. This method simplifies the filter design, and allows...

  13. Logic synthesis for FPGA-based finite state machines

    CERN Document Server

    Barkalov, Alexander; Kolopienczyk, Malgorzata; Mielcarek, Kamil; Bazydlo, Grzegorz

    2016-01-01

    This book discusses control units represented by the model of a finite state machine (FSM). It contains various original methods and takes into account the peculiarities of field-programmable gate arrays (FPGA) chips and a FSM model. It shows that one of the peculiarities of FPGA chips is the existence of embedded memory blocks (EMB). The book is devoted to the solution of problems of logic synthesis and reduction of hardware amount in control units. The book will be interesting and useful for researchers and PhD students in the area of Electrical Engineering and Computer Science, as well as for designers of modern digital systems.

  14. Logic Meeting

    CERN Document Server

    Tugué, Tosiyuki; Slaman, Theodore

    1989-01-01

    These proceedings include the papers presented at the logic meeting held at the Research Institute for Mathematical Sciences, Kyoto University, in the summer of 1987. The meeting mainly covered the current research in various areas of mathematical logic and its applications in Japan. Several lectures were also presented by logicians from other countries, who visited Japan in the summer of 1987.

  15. A high precision time-to-digital converter based on multi-phase clock implemented within Field-Programmable-Gate-Array

    International Nuclear Information System (INIS)

    Chen Kai; Liu Shubin; An Qi

    2010-01-01

    In this paper, the design of a coarse-fine interpolation Time-to-Digital Converter (TDC) is implemented in an ALTERA's Cyclone FPGA. The carry-select chain performs as the tapped delay line. The Logic Array Block (LAB) having a propagation delay of 165 ps in the chain is synthesized as delay cell. Coarse counters triggered by the global clock count the more significant bits of the time data. This clock is also fed through the delay line, and LABs create the copies. The replicas are latched by the tested event signal, and the less significant bits are encoded from the latched binary bits. Single-shot resolution of the TDC can be 60 ps. The worst Differential Nonlinearity (DNL) is about 0.2 Least Significant Bit (LSB, 165 ps in this TDC module), and the Integral Nonlinearity (INL) is 0.6 LSB. In comparison with other architectures using the synchronous global clock to sample the taps, this architecture consumed less electric power and logic cells, and is more stable. (authors)

  16. Propositional Logics of Dependence

    NARCIS (Netherlands)

    Yang, F.; Väänänen, J.

    2016-01-01

    In this paper, we study logics of dependence on the propositional level. We prove that several interesting propositional logics of dependence, including propositional dependence logic, propositional intuitionistic dependence logic as well as propositional inquisitive logic, are expressively complete

  17. Design and FPGA-implementation of an improved adaptive fuzzy logic controller for DC motor speed control

    Directory of Open Access Journals (Sweden)

    E.A. Ramadan

    2014-09-01

    Full Text Available This paper presents an improved adaptive fuzzy logic speed controller for a DC motor, based on field programmable gate array (FPGA hardware implementation. The developed controller includes an adaptive fuzzy logic control (AFLC algorithm, which is designed and verified with a nonlinear model of DC motor. Then, it has been synthesised, functionally verified and implemented using Xilinx Integrated Software Environment (ISE and Spartan-3E FPGA. The performance of this controller has been successfully validated with good tracking results under different operating conditions.

  18. Intuitionistic hybrid logic

    DEFF Research Database (Denmark)

    Braüner, Torben

    2011-01-01

    Intuitionistic hybrid logic is hybrid modal logic over an intuitionistic logic basis instead of a classical logical basis. In this short paper we introduce intuitionistic hybrid logic and we give a survey of work in the area.......Intuitionistic hybrid logic is hybrid modal logic over an intuitionistic logic basis instead of a classical logical basis. In this short paper we introduce intuitionistic hybrid logic and we give a survey of work in the area....

  19. Designing for Reuse of Configurable Logic

    National Research Council Canada - National Science Library

    Elm, Joseph P

    2005-01-01

    Field-programmable gate arrays (FPGAs) offer electronic systems designers the opportunity to reduce development cost, reduce time-to-market, increase system performance, and improve system adaptability...

  20. A 45 ps time digitizer with a two-phase clock and dual-edge two-stage interpolation in a field programmable gate array device

    Science.gov (United States)

    Szplet, R.; Kalisz, J.; Jachna, Z.

    2009-02-01

    We present a time digitizer having 45 ps resolution, integrated in a field programmable gate array (FPGA) device. The time interval measurement is based on the two-stage interpolation method. A dual-edge two-phase interpolator is driven by the on-chip synthesized 250 MHz clock with precise phase adjustment. An improved dual-edge double synchronizer was developed to control the main counter. The nonlinearity of the digitizer's transfer characteristic is identified and utilized by the dedicated hardware code processor for the on-the-fly correction of the output data. Application of presented ideas has resulted in the measurement uncertainty of the digitizer below 70 ps RMS over the time interval ranging from 0 to 1 s. The use of the two-stage interpolation and a fast FIFO memory has allowed us to obtain the maximum measurement rate of five million measurements per second.

  1. A 45 ps time digitizer with a two-phase clock and dual-edge two-stage interpolation in a field programmable gate array device

    International Nuclear Information System (INIS)

    Szplet, R; Kalisz, J; Jachna, Z

    2009-01-01

    We present a time digitizer having 45 ps resolution, integrated in a field programmable gate array (FPGA) device. The time interval measurement is based on the two-stage interpolation method. A dual-edge two-phase interpolator is driven by the on-chip synthesized 250 MHz clock with precise phase adjustment. An improved dual-edge double synchronizer was developed to control the main counter. The nonlinearity of the digitizer's transfer characteristic is identified and utilized by the dedicated hardware code processor for the on-the-fly correction of the output data. Application of presented ideas has resulted in the measurement uncertainty of the digitizer below 70 ps RMS over the time interval ranging from 0 to 1 s. The use of the two-stage interpolation and a fast FIFO memory has allowed us to obtain the maximum measurement rate of five million measurements per second

  2. A Field Programmable Gate Array-Based Reconfigurable Smart-Sensor Network for Wireless Monitoring of New Generation Computer Numerically Controlled Machines

    Directory of Open Access Journals (Sweden)

    Ion Stiharu

    2010-08-01

    Full Text Available Computer numerically controlled (CNC machines have evolved to adapt to increasing technological and industrial requirements. To cover these needs, new generation machines have to perform monitoring strategies by incorporating multiple sensors. Since in most of applications the online Processing of the variables is essential, the use of smart sensors is necessary. The contribution of this work is the development of a wireless network platform of reconfigurable smart sensors for CNC machine applications complying with the measurement requirements of new generation CNC machines. Four different smart sensors are put under test in the network and their corresponding signal processing techniques are implemented in a Field Programmable Gate Array (FPGA-based sensor node.

  3. A Field Programmable Gate Array-Based Reconfigurable Smart-Sensor Network for Wireless Monitoring of New Generation Computer Numerically Controlled Machines

    Science.gov (United States)

    Moreno-Tapia, Sandra Veronica; Vera-Salas, Luis Alberto; Osornio-Rios, Roque Alfredo; Dominguez-Gonzalez, Aurelio; Stiharu, Ion; de Jesus Romero-Troncoso, Rene

    2010-01-01

    Computer numerically controlled (CNC) machines have evolved to adapt to increasing technological and industrial requirements. To cover these needs, new generation machines have to perform monitoring strategies by incorporating multiple sensors. Since in most of applications the online Processing of the variables is essential, the use of smart sensors is necessary. The contribution of this work is the development of a wireless network platform of reconfigurable smart sensors for CNC machine applications complying with the measurement requirements of new generation CNC machines. Four different smart sensors are put under test in the network and their corresponding signal processing techniques are implemented in a Field Programmable Gate Array (FPGA)-based sensor node. PMID:22163602

  4. Fuzzy logic

    CERN Document Server

    Smets, P

    1995-01-01

    We start by describing the nature of imperfect data, and giving an overview of the various models that have been proposed. Fuzzy sets theory is shown to be an extension of classical set theory, and as such has a proeminent role or modelling imperfect data. The mathematic of fuzzy sets theory is detailled, in particular the role of the triangular norms. The use of fuzzy sets theory in fuzzy logic and possibility theory,the nature of the generalized modus ponens and of the implication operator for approximate reasoning are analysed. The use of fuzzy logic is detailled for application oriented towards process control and database problems.

  5. Separation Logic

    DEFF Research Database (Denmark)

    Reynolds, John C.

    2002-01-01

    In joint work with Peter O'Hearn and others, based on early ideas of Burstall, we have developed an extension of Hoare logic that permits reasoning about low-level imperative programs that use shared mutable data structure. The simple imperative programming language is extended with commands (not...... with the inductive definition of predicates on abstract data structures, this extension permits the concise and flexible description of structures with controlled sharing. In this paper, we will survey the current development of this program logic, including extensions that permit unrestricted address arithmetic...

  6. Introduction to fuzzy logic using Matlab

    CERN Document Server

    Sivanandam, SN; Deepa, S N

    2006-01-01

    Fuzzy Logic, at present is a hot topic, among academicians as well various programmers. This book is provided to give a broad, in-depth overview of the field of Fuzzy Logic. The basic principles of Fuzzy Logic are discussed in detail with various solved examples. The different approaches and solutions to the problems given in the book are well balanced and pertinent to the Fuzzy Logic research projects. The applications of Fuzzy Logic are also dealt to make the readers understand the concept of Fuzzy Logic. The solutions to the problems are programmed using MATLAB 6.0 and the simulated results are given. The MATLAB Fuzzy Logic toolbox is provided for easy reference.

  7. Logic-programming language enriches design processes

    Energy Technology Data Exchange (ETDEWEB)

    Kitson, B.; Ow-Wing, K.

    1984-03-22

    With the emergence of a set of high-level CAD tools for programmable logic devices, designers can translate logic into functional custom devices simply and efficiently. The core of the package is a blockstructured hardware description language called PLPL, for ''programmable-logic programming language.'' The cheif advantage of PLPL lies in its multiple input formats, which permit different design approaches for a variety of design problems. The higher the level of the approach, the closer PLPL will come to directly specifying the desired function. Intermediate steps in the design process can be eliminated, along with the errors that might have been generated during those steps.

  8. Molecular implementation of simple logic programs.

    Science.gov (United States)

    Ran, Tom; Kaplan, Shai; Shapiro, Ehud

    2009-10-01

    Autonomous programmable computing devices made of biomolecules could interact with a biological environment and be used in future biological and medical applications. Biomolecular implementations of finite automata and logic gates have already been developed. Here, we report an autonomous programmable molecular system based on the manipulation of DNA strands that is capable of performing simple logical deductions. Using molecular representations of facts such as Man(Socrates) and rules such as Mortal(X) logical deductions and delivers the result. This prototype is the first simple programming language with a molecular-scale implementation.

  9. A programmable logic controller-based system for the recirculation of liquid C6F14 in the ALICE high momentum particle identification detector at the Large Hadron Collider

    International Nuclear Information System (INIS)

    Sgura, I.; Cataldo, G. de; Franco, A.; Pastore, C.; Volpe, G.

    2012-01-01

    The aim of this paper is to present the design and the implementation of the Control System (CS) for the recirculation of liquid Perfluorohexane (C 6 F 14 ) for the ALICE High Momentum Particle Identification detector (HMPID). The HMPID is a detector of the ALICE experiment at the CERN Large Hadron Collider (LHC). It uses liquid C 6 F 14 as Cherenkov radiator medium in twenty-one quartz vessels for the measurement of the charged particles velocity. The primary task of the Liquid Circulation System (LCS) is to ensure the highest transparency of C 6 F 14 to the ultraviolet light. In order to provide safe long term operation a Programmable Logic Controller-based CS has been implemented. CS provides both automatic and manual operating modes, remotely or locally. Its finite state machine design minimizes the possible operator errors and provides a hierarchical control structure allowing the operation and monitoring down to a single radiator vessel. LCS is protected against unsafe working conditions by both active and passive measures. The passive ones are intrinsically guaranteed whereas the active ones are ensured via the control software running in the PLC. The human interface and data archiving are provided via PVSS, the Supervisory Control And Data Acquisition (SCADA) framework which integrates the full detector control. LCS under CS control proved to meet all designed requirements thus enabling HMPID detector to successfully collect data since the very beginning of LHC operation. (authors)

  10. Choreographies, Logically

    DEFF Research Database (Denmark)

    Carbone, Marco; Montesi, Fabrizio; Schürmann, Carsten

    2014-01-01

    In Choreographic Programming, a distributed system is programmed by giving a choreography, a global description of its interactions, instead of separately specifying the behaviour of each of its processes. Process implementations in terms of a distributed language can then be automatically...... projected from a choreography. We present Linear Compositional Choreographies (LCC), a proof theory for reasoning about programs that modularly combine choreographies with processes. Using LCC, we logically reconstruct a semantics and a projection procedure for programs. For the first time, we also obtain...... a procedure for extracting choreographies from process terms....

  11. Optically controllable molecular logic circuits

    International Nuclear Information System (INIS)

    Nishimura, Takahiro; Fujii, Ryo; Ogura, Yusuke; Tanida, Jun

    2015-01-01

    Molecular logic circuits represent a promising technology for observation and manipulation of biological systems at the molecular level. However, the implementation of molecular logic circuits for temporal and programmable operation remains challenging. In this paper, we demonstrate an optically controllable logic circuit that uses fluorescence resonance energy transfer (FRET) for signaling. The FRET-based signaling process is modulated by both molecular and optical inputs. Based on the distance dependence of FRET, the FRET pathways required to execute molecular logic operations are formed on a DNA nanostructure as a circuit based on its molecular inputs. In addition, the FRET pathways on the DNA nanostructure are controlled optically, using photoswitching fluorescent molecules to instruct the execution of the desired operation and the related timings. The behavior of the circuit can thus be controlled using external optical signals. As an example, a molecular logic circuit capable of executing two different logic operations was studied. The circuit contains functional DNAs and a DNA scaffold to construct two FRET routes for executing Input 1 AND Input 2 and Input 1 AND NOT Input 3 operations on molecular inputs. The circuit produced the correct outputs with all possible combinations of the inputs by following the light signals. Moreover, the operation execution timings were controlled based on light irradiation and the circuit responded to time-dependent inputs. The experimental results demonstrate that the circuit changes the output for the required operations following the input of temporal light signals

  12. Triggering the GRANDE array

    International Nuclear Information System (INIS)

    Wilson, C.L.; Bratton, C.B.; Gurr, J.; Kropp, W.; Nelson, M.; Sobel, H.; Svoboda, R.; Yodh, G.; Burnett, T.; Chaloupka, V.; Wilkes, R.J.; Cherry, M.; Ellison, S.B.; Guzik, T.G.; Wefel, J.; Gaidos, J.; Loeffler, F.; Sembroski, G.; Goodman, J.; Haines, T.J.; Kielczewska, D.; Lane, C.; Steinberg, R.; Lieber, M.; Nagle, D.; Potter, M.; Tripp, R.

    1990-01-01

    A brief description of the Gamma Ray And Neutrino Detector Experiment (GRANDE) is presented. The detector elements and electronics are described. The trigger logic for the array is then examined. The triggers for the Gamma Ray and the Neutrino portions of the array are treated separately. (orig.)

  13. Using Pipelined XNOR Logic to Reduce SEU Risks in State Machines

    Science.gov (United States)

    Le, Martin; Zheng, Xin; Katanyoutant, Sunant

    2008-01-01

    Single-event upsets (SEUs) pose great threats to avionic systems state machine control logic, which are frequently used to control sequence of events and to qualify protocols. The risks of SEUs manifest in two ways: (a) the state machine s state information is changed, causing the state machine to unexpectedly transition to another state; (b) due to the asynchronous nature of SEU, the state machine's state registers become metastable, consequently causing any combinational logic associated with the metastable registers to malfunction temporarily. Effect (a) can be mitigated with methods such as triplemodular redundancy (TMR). However, effect (b) cannot be eliminated and can degrade the effectiveness of any mitigation method of effect (a). Although there is no way to completely eliminate the risk of SEU-induced errors, the risk can be made very small by use of a combination of very fast state-machine logic and error-detection logic. Therefore, one goal of two main elements of the present method is to design the fastest state-machine logic circuitry by basing it on the fastest generic state-machine design, which is that of a one-hot state machine. The other of the two main design elements is to design fast error-detection logic circuitry and to optimize it for implementation in a field-programmable gate array (FPGA) architecture: In the resulting design, the one-hot state machine is fitted with a multiple-input XNOR gate for detection of illegal states. The XNOR gate is implemented with lookup tables and with pipelines for high speed. In this method, the task of designing all the logic must be performed manually because no currently available logic synthesis software tool can produce optimal solutions of design problems of this type. However, some assistance is provided by a script, written for this purpose in the Python language (an object-oriented interpretive computer language) to automatically generate hardware description language (HDL) code from state

  14. Increasing feasibility of the field-programmable gate array implementation of an iterative image registration using a kernel-warping algorithm

    Science.gov (United States)

    Nguyen, An Hung; Guillemette, Thomas; Lambert, Andrew J.; Pickering, Mark R.; Garratt, Matthew A.

    2017-09-01

    Image registration is a fundamental image processing technique. It is used to spatially align two or more images that have been captured at different times, from different sensors, or from different viewpoints. There have been many algorithms proposed for this task. The most common of these being the well-known Lucas-Kanade (LK) and Horn-Schunck approaches. However, the main limitation of these approaches is the computational complexity required to implement the large number of iterations necessary for successful alignment of the images. Previously, a multi-pass image interpolation algorithm (MP-I2A) was developed to considerably reduce the number of iterations required for successful registration compared with the LK algorithm. This paper develops a kernel-warping algorithm (KWA), a modified version of the MP-I2A, which requires fewer iterations to successfully register two images and less memory space for the field-programmable gate array (FPGA) implementation than the MP-I2A. These reductions increase feasibility of the implementation of the proposed algorithm on FPGAs with very limited memory space and other hardware resources. A two-FPGA system rather than single FPGA system is successfully developed to implement the KWA in order to compensate insufficiency of hardware resources supported by one FPGA, and increase parallel processing ability and scalability of the system.

  15. Image processing with cellular nonlinear networks implemented on field-programmable gate arrays for real-time applications in nuclear fusion

    International Nuclear Information System (INIS)

    Palazzo, S.; Vagliasindi, G.; Arena, P.; Murari, A.; Mazon, D.; De Maack, A.

    2010-01-01

    In the past years cameras have become increasingly common tools in scientific applications. They are now quite systematically used in magnetic confinement fusion, to the point that infrared imaging is starting to be used systematically for real-time machine protection in major devices. However, in order to guarantee that the control system can always react rapidly in case of critical situations, the time required for the processing of the images must be as predictable as possible. The approach described in this paper combines the new computational paradigm of cellular nonlinear networks (CNNs) with field-programmable gate arrays and has been tested in an application for the detection of hot spots on the plasma facing components in JET. The developed system is able to perform real-time hot spot recognition, by processing the image stream captured by JET wide angle infrared camera, with the guarantee that computational time is constant and deterministic. The statistical results obtained from a quite extensive set of examples show that this solution approximates very well an ad hoc serial software algorithm, with no false or missed alarms and an almost perfect overlapping of alarm intervals. The computational time can be reduced to a millisecond time scale for 8 bit 496x560-sized images. Moreover, in our implementation, the computational time, besides being deterministic, is practically independent of the number of iterations performed by the CNN - unlike software CNN implementations.

  16. Quantum logic

    International Nuclear Information System (INIS)

    Mittelstaedt, P.

    1979-01-01

    The subspaces of Hilbert space constitute an orthocomplemented quasimodular lattice Lsub(q) for which neither a two-valued function nor generalized truth function exist. A generalisation of the dialogic method can be used as an interpretation of a lattice Lsub(qi), which may be considered as the intuitionistic part of Lsub(q). Some obvious modifications of the dialogic method are introduced which come from the possible incommensurability of propositions about quantum mechanical systems. With the aid of this generalized dialogic method a propositional calculus Qsub(eff) is derived which is similar to the calculus of effective (intuitionistic) logic, but contains a few restrictions which are based on the incommensurability of quantum mechanical propositions. It can be shown within the framework of the calculus Qsub(eff) that the value-definiteness of the elementary propositions which are proved by quantum mechanical propositions is inherited by all finite compund propositions. In this way one arrives at the calculus Q of full quantum logic which incorporates the principle of excluded middle for all propositions and which is a model for the lattice Lsub(q). (Auth.)

  17. Nanomagnetic Logic

    Science.gov (United States)

    Carlton, David Bryan

    The exponential improvements in speed, energy efficiency, and cost that the computer industry has relied on for growth during the last 50 years are in danger of ending within the decade. These improvements all have relied on scaling the size of the silicon-based transistor that is at the heart of every modern CPU down to smaller and smaller length scales. However, as the size of the transistor reaches scales that are measured in the number of atoms that make it up, it is clear that this scaling cannot continue forever. As a result of this, there has been a great deal of research effort directed at the search for the next device that will continue to power the growth of the computer industry. However, due to the billions of dollars of investment that conventional silicon transistors have received over the years, it is unlikely that a technology will emerge that will be able to beat it outright in every performance category. More likely, different devices will possess advantages over conventional transistors for certain applications and uses. One of these emerging computing platforms is nanomagnetic logic (NML). NML-based circuits process information by manipulating the magnetization states of single-domain nanomagnets coupled to their nearest neighbors through magnetic dipole interactions. The state variable is magnetization direction and computations can take place without passing an electric current. This makes them extremely attractive as a replacement for conventional transistor-based computing architectures for certain ultra-low power applications. In most work to date, nanomagnetic logic circuits have used an external magnetic clocking field to reset the system between computations. The clocking field is then subsequently removed very slowly relative to the magnetization dynamics, guiding the nanomagnetic logic circuit adiabatically into its magnetic ground state. In this dissertation, I will discuss the dynamics behind this process and show that it is greatly

  18. Advances in Modal Logic

    DEFF Research Database (Denmark)

    Modal logic is a subject with ancient roots in the western logical tradition. Up until the last few generations, it was pursued mainly as a branch of philosophy. But in recent years, the subject has taken new directions with connections to topics in computer science and mathematics. This volume...... is the proceedings of the conference of record in its fi eld, Advances in Modal Logic. Its contributions are state-of-the-art papers. The topics include decidability and complexity results for specifi c modal logics, proof theory of modal logic, logics for reasoning about time and space, provability logic, dynamic...... epistemic logic, and the logic of evidence....

  19. The PLC: a logical development

    OpenAIRE

    Walker, Mark; Bissell, Christopher; Monk, John

    2010-01-01

    Programmable Logic Controllers (PLCs) have been used to control industrial processes and equipment for over 40 years, having their first commercially recognised application in 1969. Since then there have been enormous changes in the design and application of PLCs, yet developments were evolutionary rather than radical. The flexibility of the PLC does not confine it to industrial use and it has been used for disparate non-industrial control applications . This article reviews the history, deve...

  20. Paraconsistent Computational Logic

    DEFF Research Database (Denmark)

    Jensen, Andreas Schmidt; Villadsen, Jørgen

    2012-01-01

    In classical logic everything follows from inconsistency and this makes classical logic problematic in areas of computer science where contradictions seem unavoidable. We describe a many-valued paraconsistent logic, discuss the truth tables and include a small case study....

  1. Microelectromechanical reprogrammable logic device

    KAUST Repository

    Hafiz, Md Abdullah Al; Kosuru, Lakshmoji; Younis, Mohammad I.

    2016-01-01

    on the electrothermal frequency modulation scheme of a single microelectromechanical resonator, capable of performing all the fundamental 2-bit logic functions as well as n-bit logic operations. Logic functions are performed by actively tuning the linear resonance

  2. Stochastic coalgebraic logic

    CERN Document Server

    Doberkat, Ernst-Erich

    2009-01-01

    Combining coalgebraic reasoning, stochastic systems and logic, this volume presents the principles of coalgebraic logic from a categorical perspective. Modal logics are also discussed, including probabilistic interpretations and an analysis of Kripke models.

  3. A versatile LabVIEW and field-programmable gate array-based scanning probe microscope for in operando electronic device characterization.

    Science.gov (United States)

    Berger, Andrew J; Page, Michael R; Jacob, Jan; Young, Justin R; Lewis, Jim; Wenzel, Lothar; Bhallamudi, Vidya P; Johnston-Halperin, Ezekiel; Pelekhov, Denis V; Hammel, P Chris

    2014-12-01

    Understanding the complex properties of electronic and spintronic devices at the micro- and nano-scale is a topic of intense current interest as it becomes increasingly important for scientific progress and technological applications. In operando characterization of such devices by scanning probe techniques is particularly well-suited for the microscopic study of these properties. We have developed a scanning probe microscope (SPM) which is capable of both standard force imaging (atomic, magnetic, electrostatic) and simultaneous electrical transport measurements. We utilize flexible and inexpensive FPGA (field-programmable gate array) hardware and a custom software framework developed in National Instrument's LabVIEW environment to perform the various aspects of microscope operation and device measurement. The FPGA-based approach enables sensitive, real-time cantilever frequency-shift detection. Using this system, we demonstrate electrostatic force microscopy of an electrically biased graphene field-effect transistor device. The combination of SPM and electrical transport also enables imaging of the transport response to a localized perturbation provided by the scanned cantilever tip. Facilitated by the broad presence of LabVIEW in the experimental sciences and the openness of our software solution, our system permits a wide variety of combined scanning and transport measurements by providing standardized interfaces and flexible access to all aspects of a measurement (input and output signals, and processed data). Our system also enables precise control of timing (synchronization of scanning and transport operations) and implementation of sophisticated feedback protocols, and thus should be broadly interesting and useful to practitioners in the field.

  4. A Spaceborne Synthetic Aperture Radar Partial Fixed-Point Imaging System Using a Field- Programmable Gate Array-Application-Specific Integrated Circuit Hybrid Heterogeneous Parallel Acceleration Technique.

    Science.gov (United States)

    Yang, Chen; Li, Bingyi; Chen, Liang; Wei, Chunpeng; Xie, Yizhuang; Chen, He; Yu, Wenyue

    2017-06-24

    With the development of satellite load technology and very large scale integrated (VLSI) circuit technology, onboard real-time synthetic aperture radar (SAR) imaging systems have become a solution for allowing rapid response to disasters. A key goal of the onboard SAR imaging system design is to achieve high real-time processing performance with severe size, weight, and power consumption constraints. In this paper, we analyse the computational burden of the commonly used chirp scaling (CS) SAR imaging algorithm. To reduce the system hardware cost, we propose a partial fixed-point processing scheme. The fast Fourier transform (FFT), which is the most computation-sensitive operation in the CS algorithm, is processed with fixed-point, while other operations are processed with single precision floating-point. With the proposed fixed-point processing error propagation model, the fixed-point processing word length is determined. The fidelity and accuracy relative to conventional ground-based software processors is verified by evaluating both the point target imaging quality and the actual scene imaging quality. As a proof of concept, a field- programmable gate array-application-specific integrated circuit (FPGA-ASIC) hybrid heterogeneous parallel accelerating architecture is designed and realized. The customized fixed-point FFT is implemented using the 130 nm complementary metal oxide semiconductor (CMOS) technology as a co-processor of the Xilinx xc6vlx760t FPGA. A single processing board requires 12 s and consumes 21 W to focus a 50-km swath width, 5-m resolution stripmap SAR raw data with a granularity of 16,384 × 16,384.

  5. Classical logic and logicism in human thought

    OpenAIRE

    Elqayam, Shira

    2012-01-01

    This chapter explores the role of classical logic as a theory of human reasoning. I distinguish between classical logic as a normative, computational and algorithmic system, and review its role is theories of human reasoning since the 1960s. The thesis I defend is that psychological theories have been moving further and further away from classical logic on all three levels. I examine some prominent example of logicist theories, which incorporate logic in their psychological account, includin...

  6. Logic programming extensions of Horn clause logic

    Directory of Open Access Journals (Sweden)

    Ron Sigal

    1988-11-01

    Full Text Available Logic programming is now firmly established as an alternative programming paradigm, distinct and arguably superior to the still dominant imperative style of, for instance, the Algol family of languages. The concept of a logic programming language is not precisely defined, but it is generally understood to be characterized buy: a declarative nature; foundation in some well understood logical system, e.g., first order logic.

  7. Firmware Modification Analysis in Programmable Logic Controllers

    Science.gov (United States)

    2014-03-27

    would prove useful in assisting the analyst if the architecture type is unknown. Sickendick [64] proposed that Kolter and Maloofs boosted decision tree...graphs for post-mortem program trace analysis”. Parallel Processing, 2005. ICPP 2005. International Conference on, 165–172. 2005. [33] Kolter , J Zico and

  8. Automatic Configuration of Programmable Logic Controller Emulators

    Science.gov (United States)

    2015-03-01

    download.php?articleid= sec v6 n12 2013 3 . [FGM+99] Roy Fielding, Jim Gettys, Jeffrey Mogul, Henrik Frystyk, Larry Masin- ter, Paul Leach, and Tim...2011 ACM SIGCOMM Conference on, IMC ’11, pages 397–412, New York, NY, USA, 2011. ACM. [LBZH13] Patrick LaRoche, Aimee Burrows , and A. Nur Zincir

  9. Three-valued logics in modal logic

    NARCIS (Netherlands)

    Kooi, Barteld; Tamminga, Allard

    2013-01-01

    Every truth-functional three-valued propositional logic can be conservatively translated into the modal logic S5. We prove this claim constructively in two steps. First, we define a Translation Manual that converts any propositional formula of any three-valued logic into a modal formula. Second, we

  10. Fuzzy logic type 1 and type 2 based on LabVIEW FPGA

    CERN Document Server

    Ponce-Cruz, Pedro; MacCleery, Brian

    2016-01-01

    This book is a comprehensive introduction to LabVIEW FPGA™, a package allowing the programming of intelligent digital controllers in field programmable gate arrays (FPGAs) using graphical code. It shows how both potential difficulties with understanding and programming in VHDL and the consequent difficulty and slowness of implementation can be sidestepped. The text includes a clear theoretical explanation of fuzzy logic (type 1 and type 2) with case studies that implement the theory and systematically demonstrate the implementation process. It goes on to describe basic and advanced levels of programming LabVIEW FPGA and show how implementation of fuzzy-logic control in FPGAs improves system responses. A complete toolkit for implementing fuzzy controllers in LabVIEW FPGA has been developed with the book so that readers can generate new fuzzy controllers and deploy them immediately. Problems and their solutions allow readers to practice the techniques and to absorb the theoretical ideas as they arise. Fuzzy L...

  11. A synchronous serial bus for multidimensional array acoustic logging tool

    Science.gov (United States)

    Men, Baiyong; Ju, Xiaodong; Lu, Junqiang; Qiao, Wenxiao

    2016-12-01

    In high-temperature and spatial borehole applications, a distributed structure is employed in a multidimensional array acoustic logging tool (MDALT) based on a phased array technique for electronic systems. However, new challenges, such as synchronous multichannel data acquisition, multinode real-time control and bulk data transmission in a limited interval, have emerged. To address these challenges, we developed a synchronous serial bus (SSB) in this study. SSB works in a half-duplex mode via a master-slave architecture. It also consists of a single master, several slaves, a differential clock line and a differential data line. The clock line is simplex, whereas the data line is half-duplex and synchronous to the clock line. A reliable communication between the master and the slaves with real-time adjustment of synchronisation is achieved by rationally designing the frame format and protocol of communication and by introducing a scramble code and a Hamming error-correcting code. The control logic of the master and the slaves is realized in field programmable gate array (FPGA) or complex programmable logic device (CPLD). The clock speed of SSB is 10 MHz, the effective data rate of the bulk data transmission is over 99%, and the synchronous errors amongst the slaves are less than 10 ns. Room-temperature test, high-temperature test (175 °C) and field test demonstrate that the proposed SSB is qualified for MDALT.

  12. An Undergraduate Survey Course on Asynchronous Sequential Logic, Ladder Logic, and Fuzzy Logic

    Science.gov (United States)

    Foster, D. L.

    2012-01-01

    For a basic foundation in computer engineering, universities traditionally teach synchronous sequential circuit design, using discrete gates or field programmable gate arrays, and a microcomputers course that includes basic I/O processing. These courses, though critical, expose students to only a small subset of tools. At co-op schools like…

  13. Quantifiers for quantum logic

    OpenAIRE

    Heunen, Chris

    2008-01-01

    We consider categorical logic on the category of Hilbert spaces. More generally, in fact, any pre-Hilbert category suffices. We characterise closed subobjects, and prove that they form orthomodular lattices. This shows that quantum logic is just an incarnation of categorical logic, enabling us to establish an existential quantifier for quantum logic, and conclude that there cannot be a universal quantifier.

  14. Orientation of a 3D object: implementation with an artificial neural network using a programmable logic device;Orientacion de un objeto 3D : implementacion de redes neuronales artificiales utilizando logica programable

    Energy Technology Data Exchange (ETDEWEB)

    Carnevale, Federico J [Universidad Nacional de Cuyo, Instituto Balseiro, Centro Atomico Bariloche (Argentina)

    2010-07-01

    Complex information extraction from images is a key skill of intelligent machines, with wide application in automated systems, robotic manipulation and human-computer interaction. However, solving this problem with traditional, geometric or analytical, strategies is extremely difficult. Therefore, an approach based on learning from examples seems to be more appropriate. This thesis addresses the problem of 3D orientation, aiming to estimate the angular coordinates of a known object from an image shot from any direction. We describe a system based on artificial neural networks to solve this problem in real time. The implementation is performed using a programmable logic device. The digital system described in this paper has the ability to estimate two rotational coordinates of a 3D known object, in ranges from -80{sup 0} to 80{sup 0}. The operation speed allows a real time performance at video rate. The system accuracy can be successively increased by increasing the size of the artificial neural network and using a larger number of training examples;La extraccion de informacion compleja a partir de imagenes es una habilidad clave en las maquinas inteligentes con vasta aplicacion en los sistemas automatizados, la manipulacion robotica y la interaccion humano-computadora. Sin embargo, resulta una tarea extremadamente dificil de resolver con estrategias clasicas, geometricas o analiticas. Por lo tanto, un enfoque basado en aprendizaje a partir de ejemplos parece mas adecuado. Esta tesis trata acerca del problema de orientacion 3D, cuyo objetivo consiste en estimar las coordenadas angulares de un objeto conocido, a partir de una imagen tomada desde cualquier direccion. Se describe un sistema, basado en redes neuronales artificiales, para resolver este problema en tiempo real. La implementacion, capaz de funcionar a frecuencia de video, se realiza utilizando un dispositivo de logica programable. El sistema digital final demuestra la capacidad de estimar dos coordenadas

  15. Metamathematics of fuzzy logic

    CERN Document Server

    Hájek, Petr

    1998-01-01

    This book presents a systematic treatment of deductive aspects and structures of fuzzy logic understood as many valued logic sui generis. Some important systems of real-valued propositional and predicate calculus are defined and investigated. The aim is to show that fuzzy logic as a logic of imprecise (vague) propositions does have well-developed formal foundations and that most things usually named `fuzzy inference' can be naturally understood as logical deduction.

  16. What are Institutional Logics

    OpenAIRE

    Berg Johansen, Christina; Bock Waldorff, Susanne

    2015-01-01

    This study presents new insights into the explanatory power of the institutional logics perspective. With outset in a discussion of seminal theory texts, we identify two fundamental topics that frame institutional logics: overarching institutional orders guided by institutional logics, as well as change and agency generated by friction between logics. We use these topics as basis for an analysis of selected empirical papers, with the aim of understanding how institutional logics contribute to...

  17. What Else Is Decidable about Integer Arrays?

    OpenAIRE

    Habermehl, Peter; Iosif, Radu; Vojnar, Tomáš

    2008-01-01

    International audience; We introduce a new decidable logic for reasoning about infinite arrays of integers. The logic is in the ∃ * ∀ * first-order fragment and allows (1) Presburger constraints on existentially quantified variables, (2) difference constraints as well as periodicity constraints on universally quantified indices, and (3) difference constraints on values. In particular, using our logic, one can express constraints on consecutive elements of arrays (e.g. ∀i. 0 ≤ i < n → a[i + 1]...

  18. Connections among quantum logics

    International Nuclear Information System (INIS)

    Lock, P.F.; Hardegree, G.M.

    1985-01-01

    In this paper, a theory of quantum logics is proposed which is general enough to enable us to reexamine a previous work on quantum logics in the context of this theory. It is then easy to assess the differences between the different systems studied. The quantum logical systems which are incorporated are divided into two groups which we call ''quantum propositional logics'' and ''quantum event logics''. The work of Kochen and Specker (partial Boolean algebras) is included and so is that of Greechie and Gudder (orthomodular partially ordered sets), Domotar (quantum mechanical systems), and Foulis and Randall (operational logics) in quantum propositional logics; and Abbott (semi-Boolean algebras) and Foulis and Randall (manuals) in quantum event logics, In this part of the paper, an axiom system for quantum propositional logics is developed and the above structures in the context of this system examined. (author)

  19. The application of computer logic design in the trigger system

    International Nuclear Information System (INIS)

    Zhao Dixin; Ding Huiliang; Gu Jianhui

    1996-01-01

    The programmable logic devices PLD and FPGA, which are developing steadily recently, can be configured by user. Designers define the logic functions of the circuit and revise these functions when necessary. The application of these devices in the trigger system and development system is introduced

  20. CAMAC modular programmable function generator

    Energy Technology Data Exchange (ETDEWEB)

    Turner, G.W.; Suehiro, S.; Hendricks, R.W.

    1980-12-01

    A CAMAC modular programmable function generator has been developed. The device contains a 1024 word by 12-bit memory, a 12-bit digital-to-analog converter with a 600 ns settling time, an 18-bit programmable frequency register, and two programmable trigger output registers. The trigger registers can produce programmed output logic transitions at various (binary) points in the output function curve, and are used to synchronize various other data acquisition devices with the function curve.

  1. CAMAC modular programmable function generator

    International Nuclear Information System (INIS)

    Turner, G.W.; Suehiro, S.; Hendricks, R.W.

    1980-12-01

    A CAMAC modular programmable function generator has been developed. The device contains a 1024 word by 12-bit memory, a 12-bit digital-to-analog converter with a 600 ns settling time, an 18-bit programmable frequency register, and two programmable trigger output registers. The trigger registers can produce programmed output logic transitions at various (binary) points in the output function curve, and are used to synchronize various other data acquisition devices with the function curve

  2. Structural Logical Relations

    DEFF Research Database (Denmark)

    Schürmann, Carsten; Sarnat, Jeffrey

    2008-01-01

    Tait's method (a.k.a. proof by logical relations) is a powerful proof technique frequently used for showing foundational properties of languages based on typed lambda-calculi. Historically, these proofs have been extremely difficult to formalize in proof assistants with weak meta-logics......, such as Twelf, and yet they are often straightforward in proof assistants with stronger meta-logics. In this paper, we propose structural logical relations as a technique for conducting these proofs in systems with limited meta-logical strength by explicitly representing and reasoning about an auxiliary logic...

  3. What are Institutional Logics

    DEFF Research Database (Denmark)

    Berg Johansen, Christina; Waldorff, Susanne Boch

    This study presents new insights into the explanatory power of the institutional logics perspective. With outset in a discussion of seminal theory texts, we identify two fundamental topics that frame institutional logics: overarching institutional orders guides by institutional logics, as well...... as change and agency generated by friction between logics. We use these topics as basis for an analysis of selected empirical papers, with the aim of understanding how institutional logics contribute to institutional theory at large, and which social matters institutional logics can and cannot explore...

  4. Indeterministic Temporal Logic

    Directory of Open Access Journals (Sweden)

    Trzęsicki Kazimierz

    2015-09-01

    Full Text Available The questions od determinism, causality, and freedom have been the main philosophical problems debated since the beginning of temporal logic. The issue of the logical value of sentences about the future was stated by Aristotle in the famous tomorrow sea-battle passage. The question has inspired Łukasiewicz’s idea of many-valued logics and was a motive of A. N. Prior’s considerations about the logic of tenses. In the scheme of temporal logic there are different solutions to the problem. In the paper we consider indeterministic temporal logic based on the idea of temporal worlds and the relation of accessibility between them.

  5. Quantum Logic as a Dynamic Logic

    NARCIS (Netherlands)

    Baltag, A.; Smets, S.

    We address the old question whether a logical understanding of Quantum Mechanics requires abandoning some of the principles of classical logic. Against Putnam and others (Among whom we may count or not E. W. Beth, depending on how we interpret some of his statements), our answer is a clear “no”.

  6. Quantum logic as a dynamic logic

    NARCIS (Netherlands)

    Baltag, Alexandru; Smets, Sonja

    We address the old question whether a logical understanding of Quantum Mechanics requires abandoning some of the principles of classical logic. Against Putnam and others (Among whom we may count or not E. W. Beth, depending on how we interpret some of his statements), our answer is a clear "no".

  7. Transforming equality logic to propositional logic

    NARCIS (Netherlands)

    Zantema, H.; Groote, J.F.

    2003-01-01

    Abstract We investigate and compare various ways of transforming equality formulas to propositional formulas, in order to be able to solve satisfiability in equality logic by means of satisfiability in propositional logic. We propose equality substitution as a new approach combining desirable

  8. Simultaneous G-Quadruplex DNA Logic.

    Science.gov (United States)

    Bader, Antoine; Cockroft, Scott L

    2018-04-03

    A fundamental principle of digital computer operation is Boolean logic, where inputs and outputs are described by binary integer voltages. Similarly, inputs and outputs may be processed on the molecular level as exemplified by synthetic circuits that exploit the programmability of DNA base-pairing. Unlike modern computers, which execute large numbers of logic gates in parallel, most implementations of molecular logic have been limited to single computing tasks, or sensing applications. This work reports three G-quadruplex-based logic gates that operate simultaneously in a single reaction vessel. The gates respond to unique Boolean DNA inputs by undergoing topological conversion from duplex to G-quadruplex states that were resolved using a thioflavin T dye and gel electrophoresis. The modular, addressable, and label-free approach could be incorporated into DNA-based sensors, or used for resolving and debugging parallel processes in DNA computing applications. © 2018 Wiley-VCH Verlag GmbH & Co. KGaA, Weinheim.

  9. Many-valued logics

    CERN Document Server

    Bolc, Leonard

    1992-01-01

    Many-valued logics were developed as an attempt to handle philosophical doubts about the "law of excluded middle" in classical logic. The first many-valued formal systems were developed by J. Lukasiewicz in Poland and E.Post in the U.S.A. in the 1920s, and since then the field has expanded dramatically as the applicability of the systems to other philosophical and semantic problems was recognized. Intuitionisticlogic, for example, arose from deep problems in the foundations of mathematics. Fuzzy logics, approximation logics, and probability logics all address questions that classical logic alone cannot answer. All these interpretations of many-valued calculi motivate specific formal systems thatallow detailed mathematical treatment. In this volume, the authors are concerned with finite-valued logics, and especially with three-valued logical calculi. Matrix constructions, axiomatizations of propositional and predicate calculi, syntax, semantic structures, and methodology are discussed. Separate chapters deal w...

  10. Against Logical Form

    Directory of Open Access Journals (Sweden)

    P N Johnson-Laird

    2010-10-01

    Full Text Available An old view in logic going back to Aristotle is that an inference is valid in virtue of its logical form. Many psychologists have adopted the same point of view about human reasoning: the first step is to recover the logical form of an inference, and the second step is to apply rules of inference that match these forms in order to prove that the conclusion follows from the premises. The present paper argues against this idea. The logical form of an inference transcends the grammatical forms of the sentences used to express it, because logical form also depends on context. Context is not readily expressed in additional premises. And the recovery of logical form leads ineluctably to the need for infinitely many axioms to capture the logical properties of relations. An alternative theory is that reasoning depends on mental models, and this theory obviates the need to recover logical form.

  11. Logic an introductory course

    CERN Document Server

    Newton-Smith, WH

    2003-01-01

    A complete introduction to logic for first-year university students with no background in logic, philosophy or mathematics. In easily understood steps it shows the mechanics of the formal analysis of arguments.

  12. Anticoincidence logic using PALs

    International Nuclear Information System (INIS)

    Bolanos, L.; Arista Romeu, E.

    1997-01-01

    This paper describes the functioning principle of an anticoincidence logic and a design of this based on programing logic. The circuit was included in a discriminator of an equipment for single-photon absorptiometry

  13. Connections among quantum logics

    International Nuclear Information System (INIS)

    Lock, P.F.; Hardegree, G.M.

    1985-01-01

    This paper gives a brief introduction to the major areas of work in quantum event logics: manuals (Foulis and Randall) and semi-Boolean algebras (Abbott). The two theories are compared, and the connection between quantum event logics and quantum propositional logics is made explicit. In addition, the work on manuals provides us with many examples of results stated in Part I. (author)

  14. Equational type logic

    NARCIS (Netherlands)

    Manca, V.; Salibra, A.; Scollo, Giuseppe

    1990-01-01

    Equational type logic is an extension of (conditional) equational logic, that enables one to deal in a single, unified framework with diverse phenomena such as partiality, type polymorphism and dependent types. In this logic, terms may denote types as well as elements, and atomic formulae are either

  15. Concurrent weighted logic

    DEFF Research Database (Denmark)

    Xue, Bingtian; Larsen, Kim Guldstrand; Mardare, Radu Iulian

    2015-01-01

    We introduce Concurrent Weighted Logic (CWL), a multimodal logic for concurrent labeled weighted transition systems (LWSs). The synchronization of LWSs is described using dedicated functions that, in various concurrency paradigms, allow us to encode the compositionality of LWSs. To reflect these......-completeness results for this logic. To complete these proofs we involve advanced topological techniques from Model Theory....

  16. Real Islamic Logic

    NARCIS (Netherlands)

    Bergstra, J.A.

    2011-01-01

    Four options for assigning a meaning to Islamic Logic are surveyed including a new proposal for an option named "Real Islamic Logic" (RIL). That approach to Islamic Logic should serve modern Islamic objectives in a way comparable to the functionality of Islamic Finance. The prospective role of RIL

  17. Abductive Logic Grammars

    DEFF Research Database (Denmark)

    Christiansen, Henning; Dahl, Veronica

    2009-01-01

    By extending logic grammars with constraint logic, we give them the ability to create knowledge bases that represent the meaning of an input string. Semantic information is thus defined through extra-grammatical means, and a sentence's meaning logically follows as a by-product of string rewriting....... We formalize these ideas, and exemplify them both within and outside first-order logic, and for both fixed and dynamic knowledge bases. Within the latter variety, we consider the usual left-to-right derivations that are traditional in logic grammars, but also -- in a significant departure from...

  18. Action Type Deontic Logic

    DEFF Research Database (Denmark)

    Bentzen, Martin Mose

    2014-01-01

    A new deontic logic, Action Type Deontic Logic, is presented. To motivate this logic, a number of benchmark cases are shown, representing inferences a deontic logic should validate. Some of the benchmark cases are singled out for further comments and some formal approaches to deontic reasoning...... are evaluated with respect to the benchmark cases. After that follows an informal introduction to the ideas behind the formal semantics, focussing on the distinction between action types and action tokens. Then the syntax and semantics of Action Type Deontic Logic is presented and it is shown to meet...

  19. Product Lukasiewicz Logic

    Czech Academy of Sciences Publication Activity Database

    Horčík, Rostislav; Cintula, Petr

    2004-01-01

    Roč. 43, - (2004), s. 477-503 ISSN 1432-0665 R&D Projects: GA AV ČR IAA1030004; GA ČR GA201/02/1540 Grant - others:GA CTU(CZ) project 0208613; net CEEPUS(SK) SK-042 Institutional research plan: CEZ:AV0Z1030915 Keywords : fuzzy logic * many-valued logic * Lukasiewicz logic * Lpi logic * Takeuti-Titani logic * MV-algebras * product MV-algebras Subject RIV: BA - General Mathematics Impact factor: 0.295, year: 2004

  20. Using Spare Logic Resources To Create Dynamic Test Points

    Science.gov (United States)

    Katz, Richard; Kleyner, Igor

    2011-01-01

    A technique has been devised to enable creation of a dynamic set of test points in an embedded digital electronic system. As a result, electronics contained in an application specific circuit [e.g., gate array, field programmable gate array (FPGA)] can be internally probed, even when contained in a closed housing during all phases of test. In the present technique, the test points are not fixed and limited to a small number; the number of test points can vastly exceed the number of buffers or pins, resulting in a compact footprint. Test points are selected by means of spare logic resources within the ASIC(s) and/or FPGA(s). A register is programmed with a command, which is used to select the signals that are sent off-chip and out of the housing for monitoring by test engineers and external test equipment. The register can be commanded by any suitable means: for example, it could be commanded through a command port that would normally be used in the operation of the system. In the original application of the technique, commanding of the register is performed via a MIL-STD-1553B communication subsystem.

  1. Telescope Array Control System Based on Wireless Touch Screen Platform

    Science.gov (United States)

    Fu, Xia-nan; Huang, Lei; Wei, Jian-yan

    2017-10-01

    Ground-based Wide Angle Cameras (GMAC) are the ground-based observational facility for the SVOM (Space Variable Object Monitor) astronomical satellite of Sino-French cooperation, and Mini-GWAC is the pathfinder and supplement of GWAC. In the context of the Mini-GWAC telescope array, this paper introduces the design and implementation of a kind of telescope array control system based on the wireless touch screen platform. We describe the development and implementation of the system in detail in terms of control system principle, system hardware structure, software design, experiment, and test etc. The system uses a touch-control PC which is based on the Windows CE system as the upper computer, while the wireless transceiver module and PLC (Programmable Logic Controller) are taken as the system kernel. It has the advantages of low cost, reliable data transmission, and simple operation. And the control system has been applied to the Mini-GWAC successfully.

  2. Henkin and Hybrid Logic

    DEFF Research Database (Denmark)

    Blackburn, Patrick Rowan; Huertas, Antonia; Manzano, Maria

    2014-01-01

    Leon Henkin was not a modal logician, but there is a branch of modal logic that has been deeply influenced by his work. That branch is hybrid logic, a family of logics that extend orthodox modal logic with special proposition symbols (called nominals) that name worlds. This paper explains why...... Henkin’s techniques are so important in hybrid logic. We do so by proving a completeness result for a hybrid type theory called HTT, probably the strongest hybrid logic that has yet been explored. Our completeness result builds on earlier work with a system called BHTT, or basic hybrid type theory...... is due to the first-order perspective, which lies at the heart of Henin’s best known work and hybrid logic....

  3. Logic and Ontology

    Directory of Open Access Journals (Sweden)

    Newton C. A. da Costa

    2002-12-01

    Full Text Available In view of the present state of development of non classical logic, especially of paraconsistent logic, a new stand regarding the relations between logic and ontology is defended In a parody of a dictum of Quine, my stand May be summarized as follows. To be is to be the value of a variable a specific language with a given underlying logic Yet my stand differs from Quine’s, because, among other reasons, I accept some first order heterodox logics as genuine alternatives to classical logic I also discuss some questions of non classical logic to substantiate my argument, and suggest that may position complements and extends some ideas advanced by L Apostel.

  4. Institutional Logics in Action

    DEFF Research Database (Denmark)

    Lounsbury, Michael; Boxenbaum, Eva

    2013-01-01

    This double volume presents state-of-the-art research and thinking on the dynamics of actors and institutional logics. In the introduction, we briefly sketch the roots and branches of institutional logics scholarship before turning to the new buds of research on the topic of how actors engage...... institutional logics in the course of their organizational practice. We introduce an exciting line of new works on the meta-theoretical foundations of logics, institutional logic processes, and institutional complexity and organizational responses. Collectively, the papers in this volume advance the very...... prolific stream of research on institutional logics by deepening our insight into the active use of institutional logics in organizational action and interaction, including the institutional effects of such (inter)actions....

  5. "Modeling" Youth Work: Logic Models, Neoliberalism, and Community Praxis

    Science.gov (United States)

    Carpenter, Sara

    2016-01-01

    This paper examines the use of logic models in the development of community initiatives within the AmeriCorps program. AmeriCorps is the civilian national service programme in the U.S., operating as a grants programme to local governments and not-for-profit organisations and providing low-cost labour to address pressing issues of social…

  6. Reprogrammable logic in memristive crossbar for in-memory computing

    Science.gov (United States)

    Cheng, Long; Zhang, Mei-Yun; Li, Yi; Zhou, Ya-Xiong; Wang, Zhuo-Rui; Hu, Si-Yu; Long, Shi-Bing; Liu, Ming; Miao, Xiang-Shui

    2017-12-01

    Memristive stateful logic has emerged as a promising next-generation in-memory computing paradigm to address escalating computing-performance pressures in traditional von Neumann architecture. Here, we present a nonvolatile reprogrammable logic method that can process data between different rows and columns in a memristive crossbar array based on material implication (IMP) logic. Arbitrary Boolean logic can be executed with a reprogrammable cell containing four memristors in a crossbar array. In the fabricated Ti/HfO2/W memristive array, some fundamental functions, such as universal NAND logic and data transfer, were experimentally implemented. Moreover, using eight memristors in a 2  ×  4 array, a one-bit full adder was theoretically designed and verified by simulation to exhibit the feasibility of our method to accomplish complex computing tasks. In addition, some critical logic-related performances were further discussed, such as the flexibility of data processing, cascading problem and bit error rate. Such a method could be a step forward in developing IMP-based memristive nonvolatile logic for large-scale in-memory computing architecture.

  7. Nonlinear dynamics based digital logic and circuits.

    Science.gov (United States)

    Kia, Behnam; Lindner, John F; Ditto, William L

    2015-01-01

    We discuss the role and importance of dynamics in the brain and biological neural networks and argue that dynamics is one of the main missing elements in conventional Boolean logic and circuits. We summarize a simple dynamics based computing method, and categorize different techniques that we have introduced to realize logic, functionality, and programmability. We discuss the role and importance of coupled dynamics in networks of biological excitable cells, and then review our simple coupled dynamics based method for computing. In this paper, for the first time, we show how dynamics can be used and programmed to implement computation in any given base, including but not limited to base two.

  8. A Modular Approach to Arithmetic and Logic Unit Design on a Reconfigurable Hardware Platform for Educational Purpose

    Science.gov (United States)

    Oztekin, Halit; Temurtas, Feyzullah; Gulbag, Ali

    The Arithmetic and Logic Unit (ALU) design is one of the important topics in Computer Architecture and Organization course in Computer and Electrical Engineering departments. There are ALU designs that have non-modular nature to be used as an educational tool. As the programmable logic technology has developed rapidly, it is feasible that ALU design based on Field Programmable Gate Array (FPGA) is implemented in this course. In this paper, we have adopted the modular approach to ALU design based on FPGA. All the modules in the ALU design are realized using schematic structure on Altera's Cyclone II Development board. Under this model, the ALU content is divided into four distinct modules. These are arithmetic unit except for multiplication and division operations, logic unit, multiplication unit and division unit. User can easily design any size of ALU unit since this approach has the modular nature. Then, this approach was applied to microcomputer architecture design named BZK.SAU.FPGA10.0 instead of the current ALU unit.

  9. Logic and structure

    CERN Document Server

    Dalen, Dirk

    1983-01-01

    A book which efficiently presents the basics of propositional and predicate logic, van Dalen’s popular textbook contains a complete treatment of elementary classical logic, using Gentzen’s Natural Deduction. Propositional and predicate logic are treated in separate chapters in a leisured but precise way. Chapter Three presents the basic facts of model theory, e.g. compactness, Skolem-Löwenheim, elementary equivalence, non-standard models, quantifier elimination, and Skolem functions. The discussion of classical logic is rounded off with a concise exposition of second-order logic. In view of the growing recognition of constructive methods and principles, one chapter is devoted to intuitionistic logic. Completeness is established for Kripke semantics. A number of specific constructive features, such as apartness and equality, the Gödel translation, the disjunction and existence property have been incorporated. The power and elegance of natural deduction is demonstrated best in the part of proof theory cal...

  10. The Football of Logic

    Directory of Open Access Journals (Sweden)

    Schang Fabien

    2017-03-01

    Full Text Available An analogy is made between two rather different domains, namely: logic, and football (or soccer. Starting from a comparative table between the two activities, an alternative explanation of logic is given in terms of players, ball, goal, and the like. Our main thesis is that, just as the task of logic is preserving truth from premises to the conclusion, footballers strive to keep the ball as far as possible until the opposite goal. Assuming this analogy may help think about logic in the same way as in dialogical logic, but it should also present truth-values in an alternative sense of speech-acts occurring in a dialogue. The relativity of truth-values is focused by this way, thereby leading to an additional way of logical pluralism.

  11. Logic of likelihood

    International Nuclear Information System (INIS)

    Wall, M.J.W.

    1992-01-01

    The notion of open-quotes probabilityclose quotes is generalized to that of open-quotes likelihood,close quotes and a natural logical structure is shown to exist for any physical theory which predicts likelihoods. Two physically based axioms are given for this logical structure to form an orthomodular poset, with an order-determining set of states. The results strengthen the basis of the quantum logic approach to axiomatic quantum theory. 25 refs

  12. Logical database design principles

    CERN Document Server

    Garmany, John; Clark, Terry

    2005-01-01

    INTRODUCTION TO LOGICAL DATABASE DESIGNUnderstanding a Database Database Architectures Relational Databases Creating the Database System Development Life Cycle (SDLC)Systems Planning: Assessment and Feasibility System Analysis: RequirementsSystem Analysis: Requirements Checklist Models Tracking and Schedules Design Modeling Functional Decomposition DiagramData Flow Diagrams Data Dictionary Logical Structures and Decision Trees System Design: LogicalSYSTEM DESIGN AND IMPLEMENTATION The ER ApproachEntities and Entity Types Attribute Domains AttributesSet-Valued AttributesWeak Entities Constraint

  13. Erotetic epistemic logic

    Czech Academy of Sciences Publication Activity Database

    Peliš, Michal

    2017-01-01

    Roč. 26, č. 3 (2017), s. 357-381 ISSN 1425-3305 R&D Projects: GA ČR(CZ) GC16-07954J Institutional support: RVO:67985955 Keywords : epistemic logic * erotetic implication * erotetic logic * logic of questions Subject RIV: AA - Philosophy ; Religion OBOR OECD: Philosophy, History and Philosophy of science and technology http://apcz.umk.pl/czasopisma/index.php/LLP/article/view/LLP.2017.007

  14. Logic for Physicists

    Science.gov (United States)

    Pereyra, Nicolas A.

    2018-06-01

    This book gives a rigorous yet 'physics-focused' introduction to mathematical logic that is geared towards natural science majors. We present the science major with a robust introduction to logic, focusing on the specific knowledge and skills that will unavoidably be needed in calculus topics and natural science topics in general (rather than taking a philosophical-math-fundamental oriented approach that is commonly found in mathematical logic textbooks).

  15. What is mathematical logic?

    CERN Document Server

    Crossley, J N; Brickhill, CJ; Stillwell, JC

    2010-01-01

    Although mathematical logic can be a formidably abstruse topic, even for mathematicians, this concise book presents the subject in a lively and approachable fashion. It deals with the very important ideas in modern mathematical logic without the detailed mathematical work required of those with a professional interest in logic.The book begins with a historical survey of the development of mathematical logic from two parallel streams: formal deduction, which originated with Aristotle, Euclid, and others; and mathematical analysis, which dates back to Archimedes in the same era. The streams beg

  16. Indexical Hybrid Tense Logic

    DEFF Research Database (Denmark)

    Blackburn, Patrick Rowan; Jørgensen, Klaus Frovin

    2012-01-01

    In this paper we explore the logic of now, yesterday, today and tomorrow by combining the semantic approach to indexicality pioneered by Hans Kamp [9] and refined by David Kaplan [10] with hybrid tense logic. We first introduce a special now nominal (our @now corresponds to Kamp’s original now...... operator N) and prove completeness results for both logical and contextual validity. We then add propositional constants to handle yesterday, today and tomorrow; our system correctly treats sentences like “Niels will die yesterday” as contextually unsatisfiable. Building on our completeness results for now......, we prove completeness for the richer language, again for both logical and contextual validity....

  17. A Logic for Choreographies

    DEFF Research Database (Denmark)

    Lopez, Hugo Andres; Carbone, Marco; Hildebrandt, Thomas

    2010-01-01

    We explore logical reasoning for the global calculus, a coordination model based on the notion of choreography, with the aim to provide a methodology for specification and verification of structured communications. Starting with an extension of Hennessy-Milner logic, we present the global logic (GL...... ), a modal logic describing possible interactions among participants in a choreography. We illustrate its use by giving examples of properties on service specifications. Finally, we show that, despite GL is undecidable, there is a significant decidable fragment which we provide with a sound and complete proof...

  18. Superconductor fluxoid logic

    International Nuclear Information System (INIS)

    Andronov, A.A.; Kurin, V.V.; Levichev, M.Yu.; Ryndyk, D.A.; Vostokov, V.I.

    1993-01-01

    In recent years there has been much interest in superconductor logical devices. Our paper is devoted to the analysis of some new possibilities in this field. The main problems here are: minimization of time of logical operations and reducing of device scale. Josephson systems are quite appropriate for this purpose because of small size, short characteristic time and also small energy losses. Two different types of Josephson logic have been investigated during last years. The first type is based on hysteretic V-A characteristic of a single Josephson junction. Superconducting and resistive (with nonzero voltage) states are considered as logical zero and logical unit. The second one - rapid single flux quantum logic, has been developed recently and is based on SQUID-like bistability. Different logical states are the states with different number of magnetic flux quanta inside closed superconducting contour. Information is represented by voltage pulses with fixed ''area'' (∫ V(t)/dt). This pulses are generated when logical state of SQUID-like elementary cell changes. The fundamental role of magnetic flux quantization in this type of logic leads to the necessity of large enough self-inductance of superconductor contour and thus to limitations on minimal device dimensions. (orig.)

  19. A Logic for Choreographies

    Directory of Open Access Journals (Sweden)

    Marco Carbone

    2011-10-01

    Full Text Available We explore logical reasoning for the global calculus, a coordination model based on the notion of choreography, with the aim to provide a methodology for specification and verification of structured communications. Starting with an extension of Hennessy-Milner logic, we present the global logic (GL, a modal logic describing possible interactions among participants in a choreography. We illustrate its use by giving examples of properties on service specifications. Finally, we show that, despite GL is undecidable, there is a significant decidable fragment which we provide with a sound and complete proof system for checking validity of formulae.

  20. Introduction to mathematical logic

    CERN Document Server

    Mendelson, Elliott

    2015-01-01

    The new edition of this classic textbook, Introduction to Mathematical Logic, Sixth Edition explores the principal topics of mathematical logic. It covers propositional logic, first-order logic, first-order number theory, axiomatic set theory, and the theory of computability. The text also discusses the major results of Gödel, Church, Kleene, Rosser, and Turing.The sixth edition incorporates recent work on Gödel's second incompleteness theorem as well as restoring an appendix on consistency proofs for first-order arithmetic. This appendix last appeared in the first edition. It is offered in th

  1. Optical programmable metamaterials

    Science.gov (United States)

    Gong, Cheng; Zhang, Nan; Dai, Zijie; Liu, Weiwei

    2018-02-01

    We suggest and demonstrate the concept of optical programmable metamaterials which can configure the device's electromagnetic parameters by the programmable optical stimuli. In such metamaterials, the optical stimuli produced by a FPGA controlled light emitting diode array can switch or combine the resonance modes which are coupled in. As an example, an optical programmable metamaterial terahertz absorber is proposed. Each cell of the absorber integrates four meta-rings (asymmetric 1/4 rings) with photo-resistors connecting the critical gaps. The principle and design of the metamaterials are illustrated and the simulation results demonstrate the functionalities for programming the metamaterial absorber to change its bandwidth and resonance frequency.

  2. Reversible arithmetic logic unit for quantum arithmetic

    DEFF Research Database (Denmark)

    Thomsen, Michael Kirkedal; Glück, Robert; Axelsen, Holger Bock

    2010-01-01

    This communication presents the complete design of a reversible arithmetic logic unit (ALU) that can be part of a programmable reversible computing device such as a quantum computer. The presented ALU is garbage free and uses reversible updates to combine the standard reversible arithmetic...... and logical operations in one unit. Combined with a suitable control unit, the ALU permits the construction of an r-Turing complete computing device. The garbage-free ALU developed in this communication requires only 6n elementary reversible gates for five basic arithmetic-logical operations on two n......-bit operands and does not use ancillae. This remarkable low resource consumption was achieved by generalizing the V-shape design first introduced for quantum ripple-carry adders and nesting multiple V-shapes in a novel integrated design. This communication shows that the realization of an efficient reversible...

  3. Understanding Social Media Logic

    Directory of Open Access Journals (Sweden)

    José van Dijck

    2013-08-01

    Full Text Available Over the past decade, social media platforms have penetrated deeply into the mech­anics of everyday life, affecting people's informal interactions, as well as institutional structures and professional routines. Far from being neutral platforms for everyone, social media have changed the conditions and rules of social interaction. In this article, we examine the intricate dynamic between social media platforms, mass media, users, and social institutions by calling attention to social media logic—the norms, strategies, mechanisms, and economies—underpin­ning its dynamics. This logic will be considered in light of what has been identified as mass me­dia logic, which has helped spread the media's powerful discourse outside its institutional boundaries. Theorizing social media logic, we identify four grounding principles—programmabil­ity, popularity, connectivity, and datafication—and argue that these principles become increas­ingly entangled with mass media logic. The logic of social media, rooted in these grounding principles and strategies, is gradually invading all areas of public life. Besides print news and broadcasting, it also affects law and order, social activism, politics, and so forth. Therefore, its sustaining logic and widespread dissemination deserve to be scrutinized in detail in order to better understand its impact in various domains. Concentrating on the tactics and strategies at work in social media logic, we reassess the constellation of power relationships in which social practices unfold, raising questions such as: How does social media logic modify or enhance ex­isting mass media logic? And how is this new media logic exported beyond the boundaries of (social or mass media proper? The underlying principles, tactics, and strategies may be relat­ively simple to identify, but it is much harder to map the complex connections between plat­forms that distribute this logic: users that employ them, technologies that

  4. Weakly Intuitionistic Quantum Logic

    NARCIS (Netherlands)

    Hermens, Ronnie

    2013-01-01

    In this article von Neumann's proposal that in quantum mechanics projections can be seen as propositions is followed. However, the quantum logic derived by Birkhoff and von Neumann is rejected due to the failure of the law of distributivity. The options for constructing a distributive logic while

  5. Modal Logics and Definability

    OpenAIRE

    Kuusisto, Antti

    2013-01-01

    In recent years, research into the mathematical foundations of modal logic has become increasingly popular. One of the main reasons for this is the fact that modal logic seems to adapt well to the requirements of a wide range of different fields of application. This paper is a summary of some of the author’s contributions to the understanding of modal definability theory.

  6. Modal logics are coalgebraic

    NARCIS (Netherlands)

    Cirstea, C.; Kurz, A.; Pattinson, D.; Schröder, L.; Venema, Y.

    2011-01-01

    Applications of modal logics are abundant in computer science, and a large number of structurally different modal logics have been successfully employed in a diverse spectrum of application contexts. Coalgebraic semantics, on the other hand, provides a uniform and encompassing view on the large

  7. Description logics of context

    CSIR Research Space (South Africa)

    Klarman, S

    2013-05-01

    Full Text Available We introduce Description Logics of Context (DLCs) - an extension of Description Logics (DLs) for context-based reasoning. Our approach descends from J. McCarthy's tradition of treating contexts as formal objects over which one can quantify...

  8. Criteria for logical formalization

    Czech Academy of Sciences Publication Activity Database

    Peregrin, Jaroslav; Svoboda, Vladimír

    2013-01-01

    Roč. 190, č. 14 (2013), s. 2897-2924 ISSN 0039-7857 R&D Projects: GA ČR(CZ) GAP401/10/1279 Institutional support: RVO:67985955 Keywords : logic * logical form * formalization * reflective equilibrium Subject RIV: AA - Philosophy ; Religion Impact factor: 0.637, year: 2013

  9. Automata, Logic, and XML

    OpenAIRE

    NEVEN, Frank

    2002-01-01

    We survey some recent developments in the broad area of automata and logic which are motivated by the advent of XML. In particular, we consider unranked tree automata, tree-walking automata, and automata over infinite alphabets. We focus on their connection with logic and on questions imposed by XML.

  10. One reason, several logics

    Directory of Open Access Journals (Sweden)

    Evandro Agazzi

    2011-06-01

    Full Text Available Humans have used arguments for defending or refuting statements long before the creation of logic as a specialized discipline. This can be interpreted as the fact that an intuitive notion of "logical consequence" or a psychic disposition to articulate reasoning according to this pattern is present in common sense, and logic simply aims at describing and codifying the features of this spontaneous capacity of human reason. It is well known, however, that several arguments easily accepted by common sense are actually "logical fallacies", and this indicates that logic is not just a descriptive, but also a prescriptive or normative enterprise, in which the notion of logical consequence is defined in a precise way and then certain rules are established in order to maintain the discourse in keeping with this notion. Yet in the justification of the correctness and adequacy of these rules commonsense reasoning must necessarily be used, and in such a way its foundational role is recognized. Moreover, it remains also true that several branches and forms of logic have been elaborated precisely in order to reflect the structural features of correct argument used in different fields of human reasoning and yet insufficiently mirrored by the most familiar logical formalisms.

  11. The logic of ACP

    NARCIS (Netherlands)

    A. Ponse (Alban); M.B. van der Zwaag

    2002-01-01

    textabstractWe distinguish two interpretations for the truth value `undefined' in Kleene's three-valued logic. Combining these two interpretations leads to a four-valued propositional logic that characterizes two particular ingredients of process algebra: ``choice' and ``inaction'. We study two

  12. Anselm's logic of agency

    NARCIS (Netherlands)

    Uckelman, S.L.

    2009-01-01

    The origins of treating agency as a modal concept go back at least to the 11th century when Anselm, Archbishop of Canterbury, provided a modal explication of the Latin facere ‘to do’, which can be formalized within the context of modern modal logic and neighborhood semantics. The agentive logic

  13. Temporalized Epistemic Default Logic

    NARCIS (Netherlands)

    van der Hoek, W.; Meyer, J.J.; Treur, J.; Gabbay, D.

    2001-01-01

    The nonmonotonic logic Epistemic Default Logic (EDL) [Meyer and van der Hoek, 1993] is based on the metaphore of a meta-level architecture. It has already been established [Meyer and van der Hoek, 1993] how upward reflection can be formalized by a nonmonotonic entailment based on epistemic states,

  14. Logic Programming: PROLOG.

    Science.gov (United States)

    Lopez, Antonio M., Jr.

    1989-01-01

    Provides background material on logic programing and presents PROLOG as a high-level artificial intelligence programing language that borrows its basic constructs from logic. Suggests the language is one which will help the educator to achieve various goals, particularly the promotion of problem solving ability. (MVL)

  15. Honesty in partial logic

    NARCIS (Netherlands)

    W. van der Hoek (Wiebe); J.O.M. Jaspars; E. Thijsse

    1995-01-01

    textabstractWe propose an epistemic logic in which knowledge is fully introspective and implies truth, although truth need not imply epistemic possibility. The logic is presented in sequential format and is interpreted in a natural class of partial models, called balloon models. We examine the

  16. Microelectromechanical reprogrammable logic device

    Science.gov (United States)

    Hafiz, M. A. A.; Kosuru, L.; Younis, M. I.

    2016-01-01

    In modern computing, the Boolean logic operations are set by interconnect schemes between the transistors. As the miniaturization in the component level to enhance the computational power is rapidly approaching physical limits, alternative computing methods are vigorously pursued. One of the desired aspects in the future computing approaches is the provision for hardware reconfigurability at run time to allow enhanced functionality. Here we demonstrate a reprogrammable logic device based on the electrothermal frequency modulation scheme of a single microelectromechanical resonator, capable of performing all the fundamental 2-bit logic functions as well as n-bit logic operations. Logic functions are performed by actively tuning the linear resonance frequency of the resonator operated at room temperature and under modest vacuum conditions, reprogrammable by the a.c.-driving frequency. The device is fabricated using complementary metal oxide semiconductor compatible mass fabrication process, suitable for on-chip integration, and promises an alternative electromechanical computing scheme. PMID:27021295

  17. Amplifying genetic logic gates.

    Science.gov (United States)

    Bonnet, Jerome; Yin, Peter; Ortiz, Monica E; Subsoontorn, Pakpoom; Endy, Drew

    2013-05-03

    Organisms must process information encoded via developmental and environmental signals to survive and reproduce. Researchers have also engineered synthetic genetic logic to realize simpler, independent control of biological processes. We developed a three-terminal device architecture, termed the transcriptor, that uses bacteriophage serine integrases to control the flow of RNA polymerase along DNA. Integrase-mediated inversion or deletion of DNA encoding transcription terminators or a promoter modulates transcription rates. We realized permanent amplifying AND, NAND, OR, XOR, NOR, and XNOR gates actuated across common control signal ranges and sequential logic supporting autonomous cell-cell communication of DNA encoding distinct logic-gate states. The single-layer digital logic architecture developed here enables engineering of amplifying logic gates to control transcription rates within and across diverse organisms.

  18. Heterogeneous logics of competition

    DEFF Research Database (Denmark)

    Mossin, Christiane

    2015-01-01

    of competition are only realized as particular forms of social organization by virtue of interplaying with other kinds of logics, like legal logics. (2) Competition logics enjoy a peculiar status in-between constructedness and givenness; although competition depends on laws and mechanisms of socialization, we...... still experience competition as an expression of spontaneous human activities. On the basis of these perspectives, a study of fundamental rights of EU law, springing from the principle of ‘free movement of people’, is conducted. The first part of the empirical analysis seeks to detect the presence...... of a presumed logic of competition within EU law, whereas the second part focuses on particular legal logics. In this respect, the so-called ‘real link criterion’ (determining the access to transnational social rights for certain groups of unemployed people) is given special attention. What is particularly...

  19. Microelectromechanical reprogrammable logic device

    KAUST Repository

    Hafiz, Md Abdullah Al

    2016-03-29

    In modern computing, the Boolean logic operations are set by interconnect schemes between the transistors. As the miniaturization in the component level to enhance the computational power is rapidly approaching physical limits, alternative computing methods are vigorously pursued. One of the desired aspects in the future computing approaches is the provision for hardware reconfigurability at run time to allow enhanced functionality. Here we demonstrate a reprogrammable logic device based on the electrothermal frequency modulation scheme of a single microelectromechanical resonator, capable of performing all the fundamental 2-bit logic functions as well as n-bit logic operations. Logic functions are performed by actively tuning the linear resonance frequency of the resonator operated at room temperature and under modest vacuum conditions, reprogrammable by the a.c.-driving frequency. The device is fabricated using complementary metal oxide semiconductor compatible mass fabrication process, suitable for on-chip integration, and promises an alternative electromechanical computing scheme.

  20. Rapid geodesic mapping of brain functional connectivity: implementation of a dedicated co-processor in a field-programmable gate array (FPGA) and application to resting state functional MRI.

    Science.gov (United States)

    Minati, Ludovico; Cercignani, Mara; Chan, Dennis

    2013-10-01

    Graph theory-based analyses of brain network topology can be used to model the spatiotemporal correlations in neural activity detected through fMRI, and such approaches have wide-ranging potential, from detection of alterations in preclinical Alzheimer's disease through to command identification in brain-machine interfaces. However, due to prohibitive computational costs, graph-based analyses to date have principally focused on measuring connection density rather than mapping the topological architecture in full by exhaustive shortest-path determination. This paper outlines a solution to this problem through parallel implementation of Dijkstra's algorithm in programmable logic. The processor design is optimized for large, sparse graphs and provided in full as synthesizable VHDL code. An acceleration factor between 15 and 18 is obtained on a representative resting-state fMRI dataset, and maps of Euclidean path length reveal the anticipated heterogeneous cortical involvement in long-range integrative processing. These results enable high-resolution geodesic connectivity mapping for resting-state fMRI in patient populations and real-time geodesic mapping to support identification of imagined actions for fMRI-based brain-machine interfaces. Copyright © 2013 IPEM. Published by Elsevier Ltd. All rights reserved.

  1. Programmable architecture for quantum computing

    NARCIS (Netherlands)

    Chen, J.; Wang, L.; Charbon, E.; Wang, B.

    2013-01-01

    A programmable architecture called “quantum FPGA (field-programmable gate array)” (QFPGA) is presented for quantum computing, which is a hybrid model combining the advantages of the qubus system and the measurement-based quantum computation. There are two kinds of buses in QFPGA, the local bus and

  2. Fuzzy Logic and Intelligent Technologies in Nuclear Science (FLINS)

    International Nuclear Information System (INIS)

    Da Ruan

    2000-01-01

    FLINS is the acronym for Fuzzy Logic and Intelligent Technologies in Nuclear Science. In 1994, SCK-CEN launched a programme on FLINS. The first FLINS project dealt with the specific prototyping of fuzzy logic control (FLC) of the BR-1 research reactor. This project focussed on controlling the power level of the BR1 reactor added value of FLC for both safety and economic aspects for a nuclear reactor control operation. Main achievements in 1999 are reported

  3. THRESHOLD LOGIC IN ARTIFICIAL INTELLIGENCE

    Science.gov (United States)

    COMPUTER LOGIC, ARTIFICIAL INTELLIGENCE , BIONICS, GEOMETRY, INPUT OUTPUT DEVICES, LINEAR PROGRAMMING, MATHEMATICAL LOGIC, MATHEMATICAL PREDICTION, NETWORKS, PATTERN RECOGNITION, PROBABILITY, SWITCHING CIRCUITS, SYNTHESIS

  4. Relativistic quantum logic

    International Nuclear Information System (INIS)

    Mittelstaedt, P.

    1983-01-01

    on the basis of the well-known quantum logic and quantum probability a formal language of relativistic quantum physics is developed. This language incorporates quantum logical as well as relativistic restrictions. It is shown that relativity imposes serious restrictions on the validity regions of propositions in space-time. By an additional postulate this relativistic quantum logic can be made consistent. The results of this paper are derived exclusively within the formal quantum language; they are, however, in accordance with well-known facts of relativistic quantum physics in Hilbert space. (author)

  5. Coherent quantum logic

    International Nuclear Information System (INIS)

    Finkelstein, D.

    1987-01-01

    The von Neumann quantum logic lacks two basic symmetries of classical logic, that between sets and classes, and that between lower and higher order predicates. Similarly, the structural parallel between the set algebra and linear algebra of Grassmann and Peano was left incomplete by them in two respects. In this work a linear algebra is constructed that completes this correspondence and is interpreted as a new quantum logic that restores these invariances, and as a quantum set theory. It applies to experiments with coherent quantum phase relations between the quantum and the apparatus. The quantum set theory is applied to model a Lorentz-invariant quantum time-space complex

  6. Logical inference and evaluation

    International Nuclear Information System (INIS)

    Perey, F.G.

    1981-01-01

    Most methodologies of evaluation currently used are based upon the theory of statistical inference. It is generally perceived that this theory is not capable of dealing satisfactorily with what are called systematic errors. Theories of logical inference should be capable of treating all of the information available, including that not involving frequency data. A theory of logical inference is presented as an extension of deductive logic via the concept of plausibility and the application of group theory. Some conclusions, based upon the application of this theory to evaluation of data, are also given

  7. Layered Fixed Point Logic

    DEFF Research Database (Denmark)

    Filipiuk, Piotr; Nielson, Flemming; Nielson, Hanne Riis

    2012-01-01

    We present a logic for the specification of static analysis problems that goes beyond the logics traditionally used. Its most prominent feature is the direct support for both inductive computations of behaviors as well as co-inductive specifications of properties. Two main theoretical contributions...... are a Moore Family result and a parametrized worst case time complexity result. We show that the logic and the associated solver can be used for rapid prototyping of analyses and illustrate a wide variety of applications within Static Analysis, Constraint Satisfaction Problems and Model Checking. In all cases...

  8. A multiplicity logic unit

    International Nuclear Information System (INIS)

    Bialkowski, J.; Moszynski, M.; Zagorski, A.

    1981-01-01

    The logic diagram principle of operation and some details of the design of the multiplicity logic unit are presented. This unit was specially designed to fulfil the requirements of a multidetector arrangement for gamma-ray multiplicity measurements. The unit is equipped with 16 inputs controlled by a common coincidence gate. It delivers a linear output pulse with the height proportional to the multiplicity of coincidences and logic pulses corresponding to 0, 1, ... up to >= 5-fold coincidences. These last outputs are used to steer the routing unit working with the multichannel analyser. (orig.)

  9. step by step process from logic model to case study method as an ...

    African Journals Online (AJOL)

    Global Journal

    Logic models and case study approach to programme evaluation have proven ... in qualitative methodology. There is ... Note: IEHPs= internationally educated health professionals, ... interviews with the programme managers. .... programme assessed to ensure that the IEHPs are ready to face the certification ..... Comparison.

  10. Optimized 4-bit Quantum Reversible Arithmetic Logic Unit

    Science.gov (United States)

    Ayyoub, Slimani; Achour, Benslama

    2017-08-01

    Reversible logic has received a great attention in the recent years due to its ability to reduce the power dissipation. The main purposes of designing reversible logic are to decrease quantum cost, depth of the circuits and the number of garbage outputs. The arithmetic logic unit (ALU) is an important part of central processing unit (CPU) as the execution unit. This paper presents a complete design of a new reversible arithmetic logic unit (ALU) that can be part of a programmable reversible computing device such as a quantum computer. The proposed ALU based on a reversible low power control unit and small performance parameters full adder named double Peres gates. The presented ALU can produce the largest number (28) of arithmetic and logic functions and have the smallest number of quantum cost and delay compared with existing designs.

  11. Advances in temporal logic

    CERN Document Server

    Fisher, Michael; Gabbay, Dov; Gough, Graham

    2000-01-01

    Time is a fascinating subject that has captured mankind's imagination from ancient times to the present. It has been, and continues to be studied across a wide range of disciplines, from the natural sciences to philosophy and logic. More than two decades ago, Pnueli in a seminal work showed the value of temporal logic in the specification and verification of computer programs. Today, a strong, vibrant international research community exists in the broad community of computer science and AI. This volume presents a number of articles from leading researchers containing state-of-the-art results in such areas as pure temporal/modal logic, specification and verification, temporal databases, temporal aspects in AI, tense and aspect in natural language, and temporal theorem proving. Earlier versions of some of the articles were given at the most recent International Conference on Temporal Logic, University of Manchester, UK. Readership: Any student of the area - postgraduate, postdoctoral or even research professor ...

  12. Logic and Learning

    DEFF Research Database (Denmark)

    Hendricks, Vincent Fella; Gierasimczuk, Nina; de Jong, Dick

    2014-01-01

    Learning and learnability have been long standing topics of interests within the linguistic, computational, and epistemological accounts of inductive in- ference. Johan van Benthem’s vision of the “dynamic turn” has not only brought renewed life to research agendas in logic as the study of inform......Learning and learnability have been long standing topics of interests within the linguistic, computational, and epistemological accounts of inductive in- ference. Johan van Benthem’s vision of the “dynamic turn” has not only brought renewed life to research agendas in logic as the study...... of information processing, but likewise helped bring logic and learning in close proximity. This proximity relation is examined with respect to learning and belief revision, updating and efficiency, and with respect to how learnability fits in the greater scheme of dynamic epistemic logic and scientific method....

  13. Magnonic logic circuits

    International Nuclear Information System (INIS)

    Khitun, Alexander; Bao Mingqiang; Wang, Kang L

    2010-01-01

    We describe and analyse possible approaches to magnonic logic circuits and basic elements required for circuit construction. A distinctive feature of the magnonic circuitry is that information is transmitted by spin waves propagating in the magnetic waveguides without the use of electric current. The latter makes it possible to exploit spin wave phenomena for more efficient data transfer and enhanced logic functionality. We describe possible schemes for general computing and special task data processing. The functional throughput of the magnonic logic gates is estimated and compared with the conventional transistor-based approach. Magnonic logic circuits allow scaling down to the deep submicrometre range and THz frequency operation. The scaling is in favour of the magnonic circuits offering a significant functional advantage over the traditional approach. The disadvantages and problems of the spin wave devices are also discussed.

  14. The need for theory evaluation in global citizenship programmes: The case of the GCSA programme.

    Science.gov (United States)

    Goodier, Sarah; Field, Carren; Goodman, Suki

    2018-02-01

    Many education programmes lack a documented programme theory. This is a problem for programme planners and evaluators as the ability to measure programme success is grounded in the plausibility of the programme's underlying causal logic. Where the programme theory has not been documented, conducting a theory evaluation offers a foundational evaluation step as it gives an indication of whether the theory behind a programme is sound. This paper presents a case of a theory evaluation of a Global Citizenship programme at a top-ranking university in South Africa, subsequently called the GCSA Programme. This evaluation highlights the need for documented programme theory in global citizenship-type programmes for future programme development. An articulated programme theory produced for the GCSA Programme, analysed against the available social science literature, indicated it is comparable to other such programmes in terms of its overarching framework. What the research found is that most other global citizenship programmes do not have an articulated programme theory. These programmes also do not explicitly link their specific activities to their intended outcomes, making demonstrating impact impossible. In conclusion, we argue that taking a theory-based approach can strengthen and enable outcome evaluations in global citizenship programmes. Copyright © 2017. Published by Elsevier Ltd.

  15. Characterization of quantum logics

    International Nuclear Information System (INIS)

    Lahti, P.J.

    1980-01-01

    The quantum logic approach to axiomatic quantum mechanics is used to analyze the conceptual foundations of the traditional quantum theory. The universal quantum of action h>0 is incorporated into the theory by introducing the uncertainty principle, the complementarity principle, and the superposition principle into the framework. A characterization of those quantum logics (L,S) which may provide quantum descriptions is then given. (author)

  16. A Conceptual Space Logic

    DEFF Research Database (Denmark)

    Nilsson, Jørgen Fischer

    1999-01-01

    Conceptual spaces have been proposed as topological or geometric means for establishing conceptual structures and models. This paper, after briey reviewing conceptual spaces, focusses on the relationship between conceptual spaces and logical concept languages with operations for combining concepts...... to form concepts. Speci cally is introduced an algebraic concept logic, for which conceptual spaces are installed as semantic domain as replacement for, or enrichment of, the traditional....

  17. A Single MEMS Resonator for Reconfigurable Multifunctional Logic Gates

    KAUST Repository

    Tella, Sherif Adekunle

    2018-04-30

    Despite recent efforts toward true electromechanical resonator-based computing, achieving complex logics functions through cascading micro resonators has been deterred by challenges involved in their interconnections and the large required array of resonators. In this work we present a single micro electromechanical resonator with two outputs that enables the realization of multifunctional logic gates as well as other complex logic operations. As examples, we demonstrate the realization of the fundamental 2-bit logic gates of OR, XOR, AND, NOR, and a half adder. The device is based on a compound resonator consisting of a clamped-guided electrostatically actuated arch beam that is attached to another resonant beam from the side, which serves as an additional actuation electrode for the arch. The structure is also provided with an additional electrothermal tuning capability. The logic operations are based on the linear frequency modulations of the arch resonator and side microbeam. The device is compatible with CMOS fabrication process and works at room temperature

  18. A Single MEMS Resonator for Reconfigurable Multifunctional Logic Gates

    KAUST Repository

    Tella, Sherif Adekunle; Alcheikh, Nouha; Younis, Mohammad I.

    2018-01-01

    Despite recent efforts toward true electromechanical resonator-based computing, achieving complex logics functions through cascading micro resonators has been deterred by challenges involved in their interconnections and the large required array of resonators. In this work we present a single micro electromechanical resonator with two outputs that enables the realization of multifunctional logic gates as well as other complex logic operations. As examples, we demonstrate the realization of the fundamental 2-bit logic gates of OR, XOR, AND, NOR, and a half adder. The device is based on a compound resonator consisting of a clamped-guided electrostatically actuated arch beam that is attached to another resonant beam from the side, which serves as an additional actuation electrode for the arch. The structure is also provided with an additional electrothermal tuning capability. The logic operations are based on the linear frequency modulations of the arch resonator and side microbeam. The device is compatible with CMOS fabrication process and works at room temperature

  19. Extending Value Logic Thinking to Value Logic Portfolios

    DEFF Research Database (Denmark)

    Andersen, Poul Houman; Ritter, Thomas

    2014-01-01

    Based on value creation logic theory (Stabell & Fjeldstad, 1998), this paper suggests an extension of the original Stabell & Fjeldstad model by an additional fourth value logic, the value system logic. Furthermore, instead of only allowing one dominant value creation logic for a given firm...... or transaction, an understanding of firms and transactions as a portfolio of value logics (i.e. an interconnected coexistence of different value creation logics) is proposed. These additions to the original value creation logic theory imply interesting avenues for both, strategic decision making in firms...

  20. Towards a Formal Occurrence Logic based on Predicate Logic

    DEFF Research Database (Denmark)

    Badie, Farshad; Götzsche, Hans

    2015-01-01

    In this discussion we will concentrate on the main characteristics of an alternative kind of logic invented by Hans Götzsche: Occurrence Logic, which is not based on truth functionality. Our approach is based on temporal logic developed and elaborated by A. N. Prior. We will focus on characterising...... argumentation based on formal Occurrence Logic concerning events and occurrences, and illustrate the relations between Predicate Logic and Occurrence Logic. The relationships (and dependencies) is conducive to an approach that can analyse the occurrences of ”logical statements based on different logical...... principles” in different moments. We will also conclude that the elaborated Götzsche’s Occurrence Logic could be able to direct us to a truth-functional independent computer-based logic for analysing argumentation based on events and occurrences....

  1. Modern logic and quantum mechanics

    International Nuclear Information System (INIS)

    Garden, R.W.

    1984-01-01

    The book applies the methods of modern logic and probabilities to ''interpreting'' quantum mechanics. The subject is described and discussed under the chapter headings: classical and quantum mechanics, modern logic, the propositional logic of mechanics, states and measurement in mechanics, the traditional analysis of probabilities, the probabilities of mechanics and the model logic of predictions. (U.K.)

  2. Semantic theory for logic programming

    Energy Technology Data Exchange (ETDEWEB)

    Brown, F M

    1981-01-01

    The author axiomatizes a number of meta theoretic concepts which have been used in logic programming, including: meaning, logical truth, nonentailment, assertion and erasure, thus showing that these concepts are logical in nature and need not be defined as they have previously been defined in terms of the operations of any particular interpreter for logic programs. 10 references.

  3. Relational Parametricity and Separation Logic

    DEFF Research Database (Denmark)

    Birkedal, Lars; Yang, Hongseok

    2008-01-01

    Separation logic is a recent extension of Hoare logic for reasoning about programs with references to shared mutable data structures. In this paper, we provide a new interpretation of the logic for a programming language with higher types. Our interpretation is based on Reynolds's relational...... parametricity, and it provides a formal connection between separation logic and data abstraction. Udgivelsesdato: 2008...

  4. Non-logic devices in logic processes

    CERN Document Server

    Ma, Yanjun

    2017-01-01

    This book shows readers how to design semiconductor devices using the most common and lowest cost logic CMOS processes.  Readers will benefit from the author’s extensive, industrial experience and the practical approach he describes for designing efficiently semiconductor devices that typically have to be implemented using specialized processes that are expensive, time-consuming, and low-yield. The author presents an integrated picture of semiconductor device physics and manufacturing techniques, as well as numerous practical examples of device designs that are tried and true.

  5. Design Methodology of an Equalizer for Unipolar Non Return to Zero Binary Signals in the Presence of Additive White Gaussian Noise Using a Time Delay Neural Network on a Field Programmable Gate Array

    Science.gov (United States)

    Pérez Suárez, Santiago T.; Travieso González, Carlos M.; Alonso Hernández, Jesús B.

    2013-01-01

    This article presents a design methodology for designing an artificial neural network as an equalizer for a binary signal. Firstly, the system is modelled in floating point format using Matlab. Afterward, the design is described for a Field Programmable Gate Array (FPGA) using fixed point format. The FPGA design is based on the System Generator from Xilinx, which is a design tool over Simulink of Matlab. System Generator allows one to design in a fast and flexible way. It uses low level details of the circuits and the functionality of the system can be fully tested. System Generator can be used to check the architecture and to analyse the effect of the number of bits on the system performance. Finally the System Generator design is compiled for the Xilinx Integrated System Environment (ISE) and the system is described using a hardware description language. In ISE the circuits are managed with high level details and physical performances are obtained. In the Conclusions section, some modifications are proposed to improve the methodology and to ensure portability across FPGA manufacturers.

  6. Design Methodology of an Equalizer for Unipolar Non Return to Zero Binary Signals in the Presence of Additive White Gaussian Noise Using a Time Delay Neural Network on a Field Programmable Gate Array

    Directory of Open Access Journals (Sweden)

    Santiago T. Pérez Suárez

    2013-12-01

    Full Text Available This article presents a design methodology for designing an artificial neural network as an equalizer for a binary signal. Firstly, the system is modelled in floating point format using Matlab. Afterward, the design is described for a Field Programmable Gate Array (FPGA using fixed point format. The FPGA design is based on the System Generator from Xilinx, which is a design tool over Simulink of Matlab. System Generator allows one to design in a fast and flexible way. It uses low level details of the circuits and the functionality of the system can be fully tested. System Generator can be used to check the architecture and to analyse the effect of the number of bits on the system performance. Finally the System Generator design is compiled for the Xilinx Integrated System Environment (ISE and the system is described using a hardware description language. In ISE the circuits are managed with high level details and physical performances are obtained. In the Conclusions section, some modifications are proposed to improve the methodology and to ensure portability across FPGA manufacturers.

  7. Fuzzy Logic-Based Perturb and Observe Algorithm with Variable Step of a Reference Voltage for Solar Permanent Magnet Synchronous Motor Drive System Fed by Direct-Connected Photovoltaic Array

    Directory of Open Access Journals (Sweden)

    Mohamed Redha Rezoug

    2018-02-01

    Full Text Available Photovoltaic pumping is considered to be the most used application amongst other photovoltaic energy applications in isolated sites. This technology is developing with a slow progression to allow the photovoltaic system to operate at its maximum power. This work introduces the modified algorithm which is a perturb and observe (P&O type to overcome the limitations of the conventional P&O algorithm and increase its global performance in abrupt weather condition changes. The most significant conventional P&O algorithm restriction is the difficulty faced when choosing the variable step of the reference voltage value, a good compromise between the swift dynamic response and the stability in the steady state. To adjust the step reference voltage according to the location of the operating point of the maximum power point (MPP, a fuzzy logic controller (FLC block adapted to the P&O algorithm is used. This allows the improvement of the tracking pace and the steady state oscillation elimination. The suggested method was evaluated by simulation using MATLAB/SimPowerSystems blocks and compared to the classical P&O under different irradiation levels. The results obtained show the effectiveness of the technique proposed and its capacity for the practical and efficient tracking of maximum power.

  8. Modal Logics with Counting

    Science.gov (United States)

    Areces, Carlos; Hoffmann, Guillaume; Denis, Alexandre

    We present a modal language that includes explicit operators to count the number of elements that a model might include in the extension of a formula, and we discuss how this logic has been previously investigated under different guises. We show that the language is related to graded modalities and to hybrid logics. We illustrate a possible application of the language to the treatment of plural objects and queries in natural language. We investigate the expressive power of this logic via bisimulations, discuss the complexity of its satisfiability problem, define a new reasoning task that retrieves the cardinality bound of the extension of a given input formula, and provide an algorithm to solve it.

  9. VHDL for logic synthesis

    CERN Document Server

    Rushton, Andrew

    2011-01-01

    Many engineers encountering VHDL (very high speed integrated circuits hardware description language) for the first time can feel overwhelmed by it. This book bridges the gap between the VHDL language and the hardware that results from logic synthesis with clear organisation, progressing from the basics of combinational logic, types, and operators; through special structures such as tristate buses, register banks and memories, to advanced themes such as developing your own packages, writing test benches and using the full range of synthesis types. This third edition has been substantially rewritten to include the new VHDL-2008 features that enable synthesis of fixed-point and floating-point hardware. Extensively updated throughout to reflect modern logic synthesis usage, it also contains a complete case study to demonstrate the updated features. Features to this edition include: * a common VHDL subset which will work across a range of different synthesis systems, targeting a very wide range of technologies...

  10. Fuzzy logic in management

    CERN Document Server

    Carlsson, Christer; Fullér, Robert

    2004-01-01

    Fuzzy Logic in Management demonstrates that difficult problems and changes in the management environment can be more easily handled by bringing fuzzy logic into the practice of management. This explicit theme is developed through the book as follows: Chapter 1, "Management and Intelligent Support Technologies", is a short survey of management leadership and what can be gained from support technologies. Chapter 2, "Fuzzy Sets and Fuzzy Logic", provides a short introduction to fuzzy sets, fuzzy relations, the extension principle, fuzzy implications and linguistic variables. Chapter 3, "Group Decision Support Systems", deals with group decision making, and discusses methods for supporting the consensus reaching processes. Chapter 4, "Fuzzy Real Options for Strategic Planning", summarizes research where the fuzzy real options theory was implemented as a series of models. These models were thoroughly tested on a number of real life investments, and validated in 2001. Chapter 5, "Soft Computing Methods for Reducing...

  11. Continuous Markovian Logics

    DEFF Research Database (Denmark)

    Mardare, Radu Iulian; Cardelli, Luca; Larsen, Kim Guldstrand

    2012-01-01

    Continuous Markovian Logic (CML) is a multimodal logic that expresses quantitative and qualitative properties of continuous-time labelled Markov processes with arbitrary (analytic) state-spaces, henceforth called continuous Markov processes (CMPs). The modalities of CML evaluate the rates...... of the exponentially distributed random variables that characterize the duration of the labeled transitions of a CMP. In this paper we present weak and strong complete axiomatizations for CML and prove a series of metaproperties, including the finite model property and the construction of canonical models. CML...... characterizes stochastic bisimilarity and it supports the definition of a quantified extension of the satisfiability relation that measures the "compatibility" between a model and a property. In this context, the metaproperties allows us to prove two robustness theorems for the logic stating that one can...

  12. A hybrid nanomemristor/transistor logic circuit capable of self-programming.

    Science.gov (United States)

    Borghetti, Julien; Li, Zhiyong; Straznicky, Joseph; Li, Xuema; Ohlberg, Douglas A A; Wu, Wei; Stewart, Duncan R; Williams, R Stanley

    2009-02-10

    Memristor crossbars were fabricated at 40 nm half-pitch, using nanoimprint lithography on the same substrate with Si metal-oxide-semiconductor field effect transistor (MOS FET) arrays to form fully integrated hybrid memory resistor (memristor)/transistor circuits. The digitally configured memristor crossbars were used to perform logic functions, to serve as a routing fabric for interconnecting the FETs and as the target for storing information. As an illustrative demonstration, the compound Boolean logic operation (A AND B) OR (C AND D) was performed with kilohertz frequency inputs, using resistor-based logic in a memristor crossbar with FET inverter/amplifier outputs. By routing the output signal of a logic operation back onto a target memristor inside the array, the crossbar was conditionally configured by setting the state of a nonvolatile switch. Such conditional programming illuminates the way for a variety of self-programmed logic arrays, and for electronic synaptic computing.

  13. A programmable systolic trigger processor for FERA bus data

    International Nuclear Information System (INIS)

    Appelquist, G.; Hovander, B.; Sellden, B.; Bohm, C.

    1992-09-01

    A generic CAMAC based trigger processor module for fast processing of large amounts of ADC data, has been designed. This module has been realised using complex programmable gate arrays (LCAs from XILINX). The gate arrays have been connected to memories and multipliers in such a way that different gate array configurations can cover a wide range of module applications. Using this module, it is possible to construct complex trigger processors. The module uses both the fast ECL FERA bus and the CAMAC bus for inputs and outputs. The latter, however, is primarily used for set-up and control but may also be used for data output. Large numbers of ADCs can be served by a hierarchical arrangement of trigger processor modules, processing ADC data with pipe-line arithmetics producing the final result at the apex of the pyramid. The trigger decision will be transmitted to the data acquisition system via a logic signal while numeric results may be extracted by the CAMAC controller. The trigger processor was originally developed for the proposed neutral particle search experiment at CERN, NUMASS. There it was designed to serve as a second level trigger processor. It was required to correct all ADC raw data for efficiency and pedestal, calculate the total calorimeter energy, obtain the optimal time of flight data and calculate the particle mass. A suitable mass cut would then deliver the trigger decision. More complex triggers were also considered. (au)

  14. Set theory and logic

    CERN Document Server

    Stoll, Robert R

    1979-01-01

    Set Theory and Logic is the result of a course of lectures for advanced undergraduates, developed at Oberlin College for the purpose of introducing students to the conceptual foundations of mathematics. Mathematics, specifically the real number system, is approached as a unity whose operations can be logically ordered through axioms. One of the most complex and essential of modern mathematical innovations, the theory of sets (crucial to quantum mechanics and other sciences), is introduced in a most careful concept manner, aiming for the maximum in clarity and stimulation for further study in

  15. Introduction to mathematical logic

    CERN Document Server

    Mendelson, Elliott

    2009-01-01

    The Propositional CalculusPropositional Connectives. Truth TablesTautologies Adequate Sets of Connectives An Axiom System for the Propositional Calculus Independence. Many-Valued LogicsOther AxiomatizationsFirst-Order Logic and Model TheoryQuantifiersFirst-Order Languages and Their Interpretations. Satisfiability and Truth. ModelsFirst-Order TheoriesProperties of First-Order Theories Additional Metatheorems and Derived Rules Rule C Completeness Theorems First-Order Theories with EqualityDefinitions of New Function Letters and Individual Constants Prenex Normal Forms Isomorphism of Interpretati

  16. The Logic of XACML

    DEFF Research Database (Denmark)

    Ramli, Carroline Dewi Puspa Kencana; Nielson, Hanne Riis; Nielson, Flemming

    2011-01-01

    We study the international standard XACML 3.0 for describing security access control policy in a compositional way. Our main contribution is to derive a logic that precisely captures the idea behind the standard and to formally define the semantics of the policy combining algorithms of XACML....... To guard against modelling artefacts we provide an alternative way of characterizing the policy combining algorithms and we formally prove the equivalence of these approaches. This allows us to pinpoint the shortcoming of previous approaches to formalization based either on Belnap logic or on D -algebra....

  17. Digital logic circuit test

    Energy Technology Data Exchange (ETDEWEB)

    Yun, Gil Jung; Yang, Hong Young

    2011-03-15

    This book is about digital logic circuit test, which lists the digital basic theory, basic gate like and, or And Not gate, NAND/NOR gate such as NAND gate, NOR gate, AND and OR, logic function, EX-OR gate, adder and subtractor, decoder and encoder, multiplexer, demultiplexer, flip-flop, counter such as up/down counter modulus N counter and Reset type counter, shift register, D/A and A/D converter and two supplements list of using components and TTL manual and CMOS manual.

  18. Electronic logic circuits

    CERN Document Server

    Gibson, J

    2013-01-01

    Most branches of organizing utilize digital electronic systems. This book introduces the design of such systems using basic logic elements as the components. The material is presented in a straightforward manner suitable for students of electronic engineering and computer science. The book is also of use to engineers in related disciplines who require a clear introduction to logic circuits. This third edition has been revised to encompass the most recent advances in technology as well as the latest trends in components and notation. It includes a wide coverage of application specific integrate

  19. Logic of the digital

    CERN Document Server

    Evens, Aden

    2015-01-01

    Building a foundational understanding of the digital, Logic of the Digital reveals a unique digital ontology. Beginning from formal and technical characteristics, especially the binary code at the core of all digital technologies, Aden Evens traces the pathways along which the digital domain of abstract logic encounters the material, human world. How does a code using only 0s and 1s give rise to the vast range of applications and information that constitutes a great and growing portion of our world? Evens' analysis shows how any encounter between the actual and the digital must cross an ontolo

  20. Integrated development environment for fuzzy logic applications

    Science.gov (United States)

    Pagni, Andrea; Poluzzi, Rinaldo; Rizzotto, GianGuido; Lo Presti, Matteo

    1993-12-01

    During the last five years, Fuzzy Logic has gained enormous popularity, both in the academic and industrial worlds, breaking up the traditional resistance against changes thanks to its innovative approach to problems formalization. The success of this new methodology is pushing the creation of a brand new class of devices, called Fuzzy Machines, to overcome the limitations of traditional computing systems when acting as Fuzzy Systems and adequate Software Tools to efficiently develop new applications. This paper aims to present a complete development environment for the definition of fuzzy logic based applications. The environment is also coupled with a sophisticated software tool for semiautomatic synthesis and optimization of the rules with stability verifications. Later it is presented the architecture of WARP, a dedicate VLSI programmable chip allowing to compute in real time a fuzzy control process. The article is completed with two application examples, which have been carried out exploiting the aforementioned tools and devices.

  1. Nanoeletromechanical switch and logic circuits formed therefrom

    Science.gov (United States)

    Nordquist, Christopher D [Albuquerque, NM; Czaplewski, David A [Albuquerque, NM

    2010-05-18

    A nanoelectromechanical (NEM) switch is formed on a substrate with a source electrode containing a suspended electrically-conductive beam which is anchored to the substrate at each end. This beam, which can be formed of ruthenium, bows laterally in response to a voltage applied between a pair of gate electrodes and the source electrode to form an electrical connection between the source electrode and a drain electrode located near a midpoint of the beam. Another pair of gate electrodes and another drain electrode can be located on an opposite side of the beam to allow for switching in an opposite direction. The NEM switch can be used to form digital logic circuits including NAND gates, NOR gates, programmable logic gates, and SRAM and DRAM memory cells which can be used in place of conventional CMOS circuits, or in combination therewith.

  2. A programmable artificial retina

    International Nuclear Information System (INIS)

    Bernard, T.M.; Zavidovique, B.Y.; Devos, F.J.

    1993-01-01

    An artificial retina is a device that intimately associates an imager with processing facilities on a monolithic circuit. Yet, except for simple environments and applications, analog hardware will not suffice to process and compact the raw image flow from the photosensitive array. To solve this output problem, an on-chip array of bare Boolean processors with halftoning facilities might be used, providing versatility from programmability. By setting the pixel memory size to 3 b, the authors have demonstrated both the technological practicality and the computational efficiency of this programmable Boolean retina concept. Using semi-static shifting structures together with some interaction circuitry, a minimal retina Boolean processor can be built with less than 30 transistors and controlled by as few as 6 global clock signals. The successful design, integration, and test of such a 65x76 Boolean retina on a 50-mm 2 CMOS 2-μm circuit are presented

  3. Quantum logics with existence property

    International Nuclear Information System (INIS)

    Schindler, C.

    1991-01-01

    A quantum logic (σ-orthocomplete orthomodular poset L with a convex, unital, and separating set Δ of states) is said to have the existence property if the expectation functionals on lin(Δ) associated with the bounded observables of L form a vector space. Classical quantum logics as well as the Hilbert space logics of traditional quantum mechanics have this property. The author shows that, if a quantum logic satisfies certain conditions in addition to having property E, then the number of its blocks (maximal classical subsystems) must either be one (classical logics) or uncountable (as in Hilbert space logics)

  4. GOAL Agents Instantiate Intention Logic

    OpenAIRE

    Hindriks, Koen; van der Hoek, Wiebe

    2008-01-01

    It is commonly believed there is a big gap between agent logics and computational agent frameworks. In this paper, we show that this gap is not as big as believed by showing that GOAL agents instantiate Intention Logic of Cohen and Levesque. That is, we show that GOAL agent programs can be formally related to Intention Logic.We do so by proving that the GOAL Verification Logic can be embedded into Intention Logic. It follows that (a fragment of) Intention Logic can be used t...

  5. Querying Natural Logic Knowledge Bases

    DEFF Research Database (Denmark)

    Andreasen, Troels; Bulskov, Henrik; Jensen, Per Anker

    2017-01-01

    This paper describes the principles of a system applying natural logic as a knowledge base language. Natural logics are regimented fragments of natural language employing high level inference rules. We advocate the use of natural logic for knowledge bases dealing with querying of classes...... in ontologies and class-relationships such as are common in life-science descriptions. The paper adopts a version of natural logic with recursive restrictive clauses such as relative clauses and adnominal prepositional phrases. It includes passive as well as active voice sentences. We outline a prototype...... for partial translation of natural language into natural logic, featuring further querying and conceptual path finding in natural logic knowledge bases....

  6. Some relationships between logic programming and multiple-valued logic

    International Nuclear Information System (INIS)

    Rine, D.C.

    1986-01-01

    There have been suggestions in the artificial intelligence literature that investigations into relationships between logic programming and multiple-valued logic may be helpful. This paper presents some of these relationships through equivalent algebraic evaluations

  7. The logic of XACML

    DEFF Research Database (Denmark)

    Ramli, Carroline Dewi Puspa Kencana; Nielson, Hanne Riis; Nielson, Flemming

    2014-01-01

    We study the international standard XACML 3.0 for describing security access control policies in a compositional way. Our main contributions are (i) to derive a logic that precisely captures the intentions of the standard, (ii) to formally define a semantics for the XACML 3.0 component evaluation...

  8. The Logic of XACML

    DEFF Research Database (Denmark)

    Ramli, Carroline Dewi Puspa Kencana; Nielson, Hanne Riis; Nielson, Flemming

    2011-01-01

    We study the international standard XACML 3.0 for describing security access control policy in a compositional way. Our main contribution is to derive a logic that precisely captures the idea behind the standard and to formally define the semantics of the policy combining algorithms of XACML...

  9. Categories and logical syntax

    NARCIS (Netherlands)

    Klev, Ansten Morch

    2014-01-01

    The notions of category and type are here studied through the lens of logical syntax: Aristotle's as well as Kant's categories through the traditional form of proposition `S is P', and modern doctrines of type through the Fregean form of proposition `F(a)', function applied to argument. Topics

  10. Structures for Epistemic Logic

    NARCIS (Netherlands)

    Bezhanishvili, N.; Hoek, W. van der

    2013-01-01

    Epistemic modal logic in a narrow sense studies and formalises reasoning about knowledge. In a wider sense, it gives a formal account of the informational attitude that agents may have, and covers notions like knowledge, belief, uncertainty, and hence incomplete or partial information. As is so

  11. Time and Logic

    DEFF Research Database (Denmark)

    Øhrstrøm, Peter

    2009-01-01

    's notion of branching time is analysed. It is argued that Prior can be criticized for identifying 'plain future'. Finally, Prior's four grades of tense-logical involvement are introduced and discussed. It is argued that the third grade is the most attractive form a philosophical point of view....

  12. Expressivist Perspective on Logicality

    Czech Academy of Sciences Publication Activity Database

    Arazim, Pavel

    2017-01-01

    Roč. 11, č. 4 (2017), s. 409-419 ISSN 1661-8297 R&D Projects: GA ČR(CZ) GA17-15645S Institutional support: RVO:67985955 Keywords : logical constant * expressivism * topic-neutrality * proof- theory * conservativity Subject RIV: AA - Philosophy ; Religion OBOR OECD: Philosophy, History and Philosophy of science and technology

  13. Fictional Separation Logic

    DEFF Research Database (Denmark)

    Jensen, Jonas Buhrkal; Birkedal, Lars

    2012-01-01

    , separation means physical separation. In this paper, we introduce \\emph{fictional separation logic}, which includes more general forms of fictional separating conjunctions P * Q, where "*" does not require physical separation, but may also be used in situations where the memory resources described by P and Q...

  14. Dedekind’s logicism

    Czech Academy of Sciences Publication Activity Database

    Klev, Ansten

    2017-01-01

    Roč. 25, č. 3 (2017), s. 341-368 ISSN 0031-8019 Institutional support: RVO:67985955 Keywords : Philosophy of mathematics * logicism * Richard Dedekind Subject RIV: AA - Philosophy ; Religion OBOR OECD: Philosophy, History and Philosophy of science and technology Impact factor: 0.419, year: 2016

  15. Modular Logic Metaprogramming

    DEFF Research Database (Denmark)

    Klose, Karl; Ostermann, Klaus

    2010-01-01

    In logic metaprogramming, programs are not stored as plain textfiles but rather derived from a deductive database. While the benefits of this approach for metaprogramming are obvious, its incompatibility with separate checking limits its applicability to large-scale projects. We analyze the probl...

  16. LOGICAL SEMANTICS OF MODULARIZATION

    NARCIS (Netherlands)

    DELAVALETTE, GRR

    1992-01-01

    An algebra of theories, signatures, renamings and the operations import and export is investigated. A normal form theorem for terms of this algebra is proved. Another algebraic approach and the relation with a fragment of second order logic are also considered.

  17. Duration Calculus: Logical Foundations

    DEFF Research Database (Denmark)

    Hansen, Michael Reichhardt; Chaochen, Zhou

    1997-01-01

    The Duration Calculus (abbreviated DC) represents a logical approach to formal design of real-time systems, where real numbers are used to model time and Boolean valued functions over time are used to model states and events of real-time systems. Since it introduction, DC has been applied to many...

  18. Foundations of mathematical logic

    CERN Document Server

    Curry, Haskell B

    2010-01-01

    Written by a pioneer of mathematical logic, this comprehensive graduate-level text explores the constructive theory of first-order predicate calculus. It covers formal methods, including algorithms and epitheory, and offers a brief treatment of Markov's approach to algorithms, explains elementary facts about lattices and similar algebraic systems, and more. 1963 edition.

  19. Logically Incorrect Arguments

    Czech Academy of Sciences Publication Activity Database

    Svoboda, Vladimír; Peregrin, Jaroslav

    2016-01-01

    Roč. 30, č. 3 (2016), s. 263-287 ISSN 0920-427X R&D Projects: GA ČR(CZ) GA13-21076S Institutional support: RVO:67985955 Keywords : argumentation * logical form * incorrect argument * correct arguments Subject RIV: AA - Philosophy ; Religion Impact factor: 0.689, year: 2016

  20. Short-circuit logic

    NARCIS (Netherlands)

    Bergstra, J.A.; Ponse, A.

    2010-01-01

    Short-circuit evaluation denotes the semantics of propositional connectives in which the second argument is only evaluated if the first argument does not suffice to determine the value of the expression. In programming, short-circuit evaluation is widely used. A short-circuit logic is a variant of

  1. Parametric Linear Dynamic Logic

    Directory of Open Access Journals (Sweden)

    Peter Faymonville

    2014-08-01

    Full Text Available We introduce Parametric Linear Dynamic Logic (PLDL, which extends Linear Dynamic Logic (LDL by temporal operators equipped with parameters that bound their scope. LDL was proposed as an extension of Linear Temporal Logic (LTL that is able to express all ω-regular specifications while still maintaining many of LTL's desirable properties like an intuitive syntax and a translation into non-deterministic Büchi automata of exponential size. But LDL lacks capabilities to express timing constraints. By adding parameterized operators to LDL, we obtain a logic that is able to express all ω-regular properties and that subsumes parameterized extensions of LTL like Parametric LTL and PROMPT-LTL. Our main technical contribution is a translation of PLDL formulas into non-deterministic Büchi word automata of exponential size via alternating automata. This yields a PSPACE model checking algorithm and a realizability algorithm with doubly-exponential running time. Furthermore, we give tight upper and lower bounds on optimal parameter values for both problems. These results show that PLDL model checking and realizability are not harder than LTL model checking and realizability.

  2. Temporal logic motion planning

    CSIR Research Space (South Africa)

    Seotsanyana, M

    2010-01-01

    Full Text Available In this paper, a critical review on temporal logic motion planning is presented. The review paper aims to address the following problems: (a) In a realistic situation, the motion planning problem is carried out in real-time, in a dynamic, uncertain...

  3. Logic Programming for Linguistics

    DEFF Research Database (Denmark)

    Christiansen, Henning

    2010-01-01

    This article gives a short introduction on how to get started with logic pro- gramming in Prolog that does not require any previous programming expe- rience. The presentation is aimed at students of linguistics, but it does not go deeper into linguistics than any student who has some ideas of what...

  4. Logic and Natural selection

    Czech Academy of Sciences Publication Activity Database

    Peregrin, Jaroslav

    2010-01-01

    Roč. 4, č. 2 (2010), s. 207-223 ISSN 1661-8297 R&D Projects: GA ČR(CZ) GAP401/10/1279 Institutional research plan: CEZ:AV0Z9009908 Keywords : logic * natural selection * modus potens * inferentialism Subject RIV: AA - Philosophy ; Religion

  5. Quantum probabilistic logic programming

    Science.gov (United States)

    Balu, Radhakrishnan

    2015-05-01

    We describe a quantum mechanics based logic programming language that supports Horn clauses, random variables, and covariance matrices to express and solve problems in probabilistic logic. The Horn clauses of the language wrap random variables, including infinite valued, to express probability distributions and statistical correlations, a powerful feature to capture relationship between distributions that are not independent. The expressive power of the language is based on a mechanism to implement statistical ensembles and to solve the underlying SAT instances using quantum mechanical machinery. We exploit the fact that classical random variables have quantum decompositions to build the Horn clauses. We establish the semantics of the language in a rigorous fashion by considering an existing probabilistic logic language called PRISM with classical probability measures defined on the Herbrand base and extending it to the quantum context. In the classical case H-interpretations form the sample space and probability measures defined on them lead to consistent definition of probabilities for well formed formulae. In the quantum counterpart, we define probability amplitudes on Hinterpretations facilitating the model generations and verifications via quantum mechanical superpositions and entanglements. We cast the well formed formulae of the language as quantum mechanical observables thus providing an elegant interpretation for their probabilities. We discuss several examples to combine statistical ensembles and predicates of first order logic to reason with situations involving uncertainty.

  6. Temporalizing Epistemic Default Logic

    NARCIS (Netherlands)

    van der Hoek, Wiebe; Meyer, John Jules; Treur, Jan

    1998-01-01

    We present an epistemic default logic, based on the metaphore of a meta-level architecture. Upward reflection is formalized by a nonmonotonic entailment relation, based on the objective facts that are either known or unknown at the object level. Then, the meta (monotonic) reasoning process generates

  7. Logic Programming with Requests

    NARCIS (Netherlands)

    De Schreye, Danny; Etalle, Sandro; van Raamsdonk, Femke

    1999-01-01

    We propose an extension of logic programming where the user can specify, together with the initial query, the information he is interested in by means of a request. This allows one to extract a result from an incomplete computation, such as the prefix of an infinite derivation. The classical

  8. Logical Characterisation of Ontology Construction using Fuzzy Description Logics

    DEFF Research Database (Denmark)

    Badie, Farshad; Götzsche, Hans

    had the extension of ontologies with Fuzzy Logic capabilities which plan to make proper backgrounds for ontology driven reasoning and argumentation on vague and imprecise domains. This presentation conceptualises learning from fuzzy classes using the Inductive Logic Programming framework. Then......, employs Description Logics in characterising and analysing fuzzy statements. And finally, provides a conceptual framework describing fuzzy concept learning in ontologies using the Inductive Logic Programming....

  9. Logical Reasoning in Middle Childhood: A Study of Piagetian Concrete Operations Stage.

    Science.gov (United States)

    Hooper, Frank H.; And Others

    This 4-year longitudinal study of logical reasoning found complex interrelationships among different cognitive processes of children ages 6 to 15. Piaget's stage theory is discussed in the introduction, with a focus on the concrete operational stage in middle childhood. In the study, a representative array of logical concept tasks and short-term…

  10. Radiation tolerant combinational logic cell

    Science.gov (United States)

    Maki, Gary R. (Inventor); Gambles, Jody W. (Inventor); Whitaker, Sterling (Inventor)

    2009-01-01

    A system has a reduced sensitivity to Single Event Upset and/or Single Event Transient(s) compared to traditional logic devices. In a particular embodiment, the system includes an input, a logic block, a bias stage, a state machine, and an output. The logic block is coupled to the input. The logic block is for implementing a logic function, receiving a data set via the input, and generating a result f by applying the data set to the logic function. The bias stage is coupled to the logic block. The bias stage is for receiving the result from the logic block and presenting it to the state machine. The state machine is coupled to the bias stage. The state machine is for receiving, via the bias stage, the result generated by the logic block. The state machine is configured to retain a state value for the system. The state value is typically based on the result generated by the logic block. The output is coupled to the state machine. The output is for providing the value stored by the state machine. Some embodiments of the invention produce dual rail outputs Q and Q'. The logic block typically contains combinational logic and is similar, in size and transistor configuration, to a conventional CMOS combinational logic design. However, only a very small portion of the circuits of these embodiments, is sensitive to Single Event Upset and/or Single Event Transients.

  11. Layout and cabling considerations for a large communications antenna array

    Science.gov (United States)

    Logan, R. T., Jr.

    1993-01-01

    Layout considerations for a large deep space communications antenna array are discussed. A fractal geometry for the antenna layout is described that provides optimal packing of antenna elements, efficient cable routing, and logical division of the array into identical sub-arrays.

  12. The REGENT-PLR-precompiler, execution logic

    International Nuclear Information System (INIS)

    Enderle, G.; Steil, A.

    1976-11-01

    The REGENT-PLR-Precompiler is part of the integrated CAD-system REGENT. The algorithms of REGENT-subsystems are contained in modular program units, modules. Beyond the possibilities of the base language PL/1 the programmer of the moduls can be use the REGENT-facilities; dynamic program linkage, dynamic data management and error message handling. For easy and safe use of these facilities they are realized as PL/1-extensions. The PLR-Precompiler is able to translate the extensions into PL/1. This report contains a description of the internal program logic of the REGENT-PLR-Precompiler. (orig.) [de

  13. The screening approach for review of accident management programmes

    International Nuclear Information System (INIS)

    Misak, J.

    1999-01-01

    In this lecture the screening approach for review of accident management programmes are presented. It contains objective trees for accident management: logic structure of the approach; objectives and safety functions for accident management; safety principles

  14. Quantum Logic and Quantum Reconstruction

    OpenAIRE

    Stairs, Allen

    2015-01-01

    Quantum logic understood as a reconstruction program had real successes and genuine limitations. This paper offers a synopsis of both and suggests a way of seeing quantum logic in a larger, still thriving context.

  15. First-Order Hybrid Logic

    DEFF Research Database (Denmark)

    Braüner, Torben

    2011-01-01

    Hybrid logic is an extension of modal logic which allows us to refer explicitly to points of the model in the syntax of formulas. It is easy to justify interest in hybrid logic on applied grounds, with the usefulness of the additional expressive power. For example, when reasoning about time one...... often wants to build up a series of assertions about what happens at a particular instant, and standard modal formalisms do not allow this. What is less obvious is that the route hybrid logic takes to overcome this problem often actually improves the behaviour of the underlying modal formalism....... For example, it becomes far simpler to formulate proof-systems for hybrid logic, and completeness results can be proved of a generality that is simply not available in modal logic. That is, hybridization is a systematic way of remedying a number of known deficiencies of modal logic. First-order hybrid logic...

  16. Logical analysis of biological systems

    DEFF Research Database (Denmark)

    Mardare, Radu Iulian

    2005-01-01

    R. Mardare, Logical analysis of biological systems. Fundamenta Informaticae, N 64:271-285, 2005.......R. Mardare, Logical analysis of biological systems. Fundamenta Informaticae, N 64:271-285, 2005....

  17. Probabilistic logics and probabilistic networks

    CERN Document Server

    Haenni, Rolf; Wheeler, Gregory; Williamson, Jon; Andrews, Jill

    2014-01-01

    Probabilistic Logic and Probabilistic Networks presents a groundbreaking framework within which various approaches to probabilistic logic naturally fit. Additionally, the text shows how to develop computationally feasible methods to mesh with this framework.

  18. Conference Trends in Logic XI

    CERN Document Server

    Wansing, Heinrich; Willkommen, Caroline; Recent Trends in Philosophical Logic

    2014-01-01

    This volume presents recent advances in philosophical logic with chapters focusing on non-classical logics, including paraconsistent logics, substructural logics, modal logics of agency and other modal logics. The authors cover themes such as the knowability paradox, tableaux and sequent calculi, natural deduction, definite descriptions, identity, truth, dialetheism, and possible worlds semantics.   The developments presented here focus on challenging problems in the specification of fundamental philosophical notions, as well as presenting new techniques and tools, thereby contributing to the development of the field. Each chapter contains a bibliography, to assist the reader in making connections in the specific areas covered. Thus this work provides both a starting point for further investigations into philosophical logic and an update on advances, techniques and applications in a dynamic field.   The chapters originate from papers presented during the Trends in Logic XI conference at the Ruhr University ...

  19. Preferential reasoning for modal logics

    CSIR Research Space (South Africa)

    Britz, K

    2011-11-01

    Full Text Available Modal logic is the foundation for a versatile and well-established class of knowledge representation formalisms in artificial intelligence. Enriching modal logics with non-monotonic reasoning capabilities such as preferential reasoning as developed...

  20. From Logical to Distributional Models

    Directory of Open Access Journals (Sweden)

    Anne Preller

    2014-12-01

    Full Text Available The paper relates two variants of semantic models for natural language, logical functional models and compositional distributional vector space models, by transferring the logic and reasoning from the logical to the distributional models. The geometrical operations of quantum logic are reformulated as algebraic operations on vectors. A map from functional models to vector space models makes it possible to compare the meaning of sentences word by word.

  1. Modal Logics for Cryptographic Processes

    DEFF Research Database (Denmark)

    Frendrup, U.; Huttel, Hans; Jensen, N. J.

    2002-01-01

    We present three modal logics for the spi-calculus and show that they capture strong versions of the environment sensitive bisimulation introduced by Boreale et al. Our logics differ from conventional modal logics for process calculi in that they allow us to describe the knowledge of an attacker ...

  2. Combining Paraconsistent Logic with Argumentation

    NARCIS (Netherlands)

    Grooters, Diana; Prakken, Hendrik

    2014-01-01

    One tradition in the logical study of argumentation is to allow for arguments that combine strict and defeasible inference rules, and to derive the strict inference rules from a logic at least as strong as classical logic. An unsolved problem in this tradition is how the trivialising effect of the

  3. Lectures on Logic and Computation

    DEFF Research Database (Denmark)

    The European Summer School in Logic, Language and Information (ESSLLI) is organized every year by the Association for Logic, Language and Information (FoLLI) in different sites around Europe. The main focus of ESSLLI is on the interface between linguistics, logic and computation. ESSLLI offers fo...

  4. Linear Logic on Petri Nets

    DEFF Research Database (Denmark)

    Engberg, Uffe Henrik; Winskel, Glynn

    This article shows how individual Petri nets form models of Girard's intuitionistic linear logic. It explores questions of expressiveness and completeness of linear logic with respect to this interpretation. An aim is to use Petri nets to give an understanding of linear logic and give some apprai...

  5. Strong Completeness for Markovian Logics

    DEFF Research Database (Denmark)

    Kozen, Dexter; Mardare, Radu Iulian; Panangaden, Prakash

    2013-01-01

    In this paper we present Hilbert-style axiomatizations for three logics for reasoning about continuous-space Markov processes (MPs): (i) a logic for MPs defined for probability distributions on measurable state spaces, (ii) a logic for MPs defined for sub-probability distributions and (iii) a log...

  6. Développement de circuits logiques programmables résistants aux alas logiques en technologie CMOS submicrométrique

    CERN Document Server

    Bonacini, Sandro; Kloukinas, Kostas

    2007-01-01

    The electronics associated to the particle detectors of the Large Hadron Collider (LHC), under construction at CERN, will operate in a very harsh radiation environment. Most of the microelectronics components developed for the first generation of LHC experiments have been designed with very precise experiment-specific goals and are hardly adaptable to other applications. Commercial Off-The-Shelf (COTS) components cannot be used in the vicinity of particle collision due to their poor radiation tolerance. This thesis is a contribution to the effort to cover the need for radiation-tolerant SEU-robust programmable components for application in High Energy Physics (HEP) experiments. Two components are under development: a Programmable Logic Device (PLD) and a Field-Programmable Gate Array (FPGA). The PLD is a fuse-based, 10-input, 8-I/O general architecture device in 0.25 micron CMOS technology. The FPGA under development is instead a 32x32 logic block array, equivalent to ~25k gates, in 0.13 micron CMOS. This wor...

  7. Four logics of governance

    DEFF Research Database (Denmark)

    Friche, Nanna; Normann Andersen, Vibeke

    unintended consequences. Theoretically, we draw on different management and governance theories, e.g. performance management. Empirically, the study is based on surveys to teachers and students at all Danish vocational colleges and interviews with school leaders, teachers and students at six colleges (cases...... and well-being of students enrolled in the VETs must be strengthened. We focus on target 1, 2 and 4. The reform is being implemented in a field of VET that can be characterized by four logics of governance. Firstly, a governance logic characterized by institutional independence of vocational colleges......For the last fifteen years completion rates in Danish vocational education and training (VET) has stayed on a rather low level. In 2014, only half of the students enrolled in a vocational program on upper secondary level, graduated from the program (Flarup et al 2016). In Denmark, like in other...

  8. Modern Logical Frameworks Design

    DEFF Research Database (Denmark)

    Murawska, Agata Anna

    2017-01-01

    lack support for reasoning about, or programming with, the mechanised systems. Our main motivation is to eventually make it possible to model and reason about complex concurrent systems and protocols. No matter the application, be it the development of a logic for multiparty session types...... or a cryptographic protocol used in a voting system, we need the ability to model and reason about both the building blocks of these systems and the intricate connections between them. To this end, this dissertation is an investigation into LF-based formalisms that might help address the aforementioned issues. We...... design and provide the meta-theory of two new frameworks, HyLF and Lincx. The former aims to extend the expressiveness of LF to include proof irrelevance and some user-defined behaviours, using ideas from hybrid logics. The latter is a showcase for an easier to implement framework, while also allowing...

  9. Competing Logics and Healthcare

    Science.gov (United States)

    Saks, Mike

    2018-01-01

    This paper offers a short commentary on the editorial by Mannion and Exworthy. The paper highlights the positive insights offered by their analysis into the tensions between the competing institutional logics of standardization and customization in healthcare, in part manifested in the conflict between managers and professionals, and endorses the plea of the authors for further research in this field. However, the editorial is criticized for its lack of a strong societal reference point, the comparative absence of focus on hybridization, and its failure to highlight structural factors impinging on the opposing logics in a broader neo-institutional framework. With reference to the Procrustean metaphor, it is argued that greater stress should be placed on the healthcare user in future health policy. Finally, the case of complementary and alternative medicine is set out which – while not explicitly mentioned in the editorial – most effectively concretizes the tensions at the heart of this analysis of healthcare. PMID:29626406

  10. Conventions and Institutional Logics

    DEFF Research Database (Denmark)

    Westenholz, Ann

    Two theoretical approaches – Conventions and Institutional Logics – are brought together and the similarities and differences between the two are explored. It is not the intention to combine the approaches, but I would like to open both ‘boxes’ and make them available to each other with the purpose...... of creating a space for dialog. Both approaches were developed in the mid-1980s as a reaction to rational-choice economic theory and collectivistic sociological theory. These two theories were oversimplifying social life as being founded either in actor-micro level analyses or in structure-macro level...... analyses. The theoretical quest of both Conventions and Institutional Logics has been to understand the increasing indeterminacy, uncertainty and ambiguity in people’s lives where a sense of reality, of value, of moral, of feelings is not fixed. Both approaches have created new theoretical insights...

  11. Formalizing Informal Logic

    Directory of Open Access Journals (Sweden)

    Douglas Walton

    2015-12-01

    Full Text Available This paper presents a formalization of informal logic using the Carneades Argumentation System (CAS, a formal, computational model of argument that consists of a formal model of argument graphs and audiences. Conflicts between pro and con arguments are resolved using proof standards, such as preponderance of the evidence. CAS also formalizes argumentation schemes. Schemes can be used to check whether a given argument instantiates the types of argument deemed normatively appropriate for the type of dialogue.

  12. Probabilistic Logical Characterization

    DEFF Research Database (Denmark)

    Hermanns, Holger; Parma, Augusto; Segala, Roberto

    2011-01-01

    Probabilistic automata exhibit both probabilistic and non-deterministic choice. They are therefore a powerful semantic foundation for modeling concurrent systems with random phenomena arising in many applications ranging from artificial intelligence, security, systems biology to performance...... modeling. Several variations of bisimulation and simulation relations have proved to be useful as means to abstract and compare different automata. This paper develops a taxonomy of logical characterizations of these relations on image-finite and image-infinite probabilistic automata....

  13. Bisimulations, games, and logic

    DEFF Research Database (Denmark)

    Nielsen, Mogens; Clausen, Christian

    1994-01-01

    In a recent paper by Joyal, Nielsen, and Winskel, bisimulation is defined in an abstract and uniform way across a wide range of different models for concurrency. In this paper, following a recent trend in theoretical computer science, we characterize their abstract definition game-theoretically a......-theoretically and logically in a non-interleaving model. Our characterizations appear as surprisingly simple extensions of corresponding characterizations of interleaving bisimulation....

  14. Stereotypical Reasoning: Logical Properties

    OpenAIRE

    Lehmann, Daniel

    2002-01-01

    Stereotypical reasoning assumes that the situation at hand is one of a kind and that it enjoys the properties generally associated with that kind of situation. It is one of the most basic forms of nonmonotonic reasoning. A formal model for stereotypical reasoning is proposed and the logical properties of this form of reasoning are studied. Stereotypical reasoning is shown to be cumulative under weak assumptions.

  15. RSFQ logic arithmetic

    International Nuclear Information System (INIS)

    Mukhanov, O.A.; Rylov, S.V.; Semenov, V.K.; Vyshenskii, S.V.

    1989-01-01

    Several ways of local timing of the Josephson-junction RSFQ (Rapid Single Flux Quantum) logic elements are proposed, and their peculiarities are discussed. Several examples of serial and parallel pipelined arithmetic blocks using various types of timing are suggested and their possible performance is discussed. Serial devices enable one to perform n-bit functions relatively slowly but using integrated circuits of a moderate integration scale, while parallel pipelined devices are more hardware-wasteful but promise extremely high productivity

  16. Logic Programming in LISP.

    Science.gov (United States)

    1981-01-01

    Rapport, Groupe Intelligence Pasero, R., Artificielle , Universite d’Aix-Marseille, Roussel, P. Luminy, France, 1973. [Kowalski 1974] Kowalski, R. A...THIS PAGZ(Whan Doee Es tMord) Item 20 (Cont’d) ------ work in the area of artificial intelligence and those used in general program development into a...logic programming with LISP for implementing intelligent data base query systems. Continued developments will allow for enhancements to be made to the

  17. Magnetoresistive logic and biochip

    International Nuclear Information System (INIS)

    Brueckl, Hubert; Brzeska, Monika; Brinkmann, Dirk; Schotter, J.Joerg; Reiss, Guenter; Schepper, Willi; Kamp, P.-B.; Becker, Anke

    2004-01-01

    While some magnetoresistive devices based on giant magnetoresistance or spin-dependent tunneling are already commercialized, a new branch of development is evolving towards magnetoresistive logic with magnetic tunnel junctions. Furthermore, the new magnetoelectronic effects show promising properties in magnetoresistive biochips, which are capable of detecting even single molecules (e.g. DNA) by functionalized magnetic markers. The unclear limits of this approach are discussed with two model systems

  18. A Paraconsistent Higher Order Logic

    DEFF Research Database (Denmark)

    Villadsen, Jørgen

    2004-01-01

    of paraconsistent logics in knowledge-based systems, logical semantics of natural language, etc. Higher order logics have the advantages of being expressive and with several automated theorem provers available. Also the type system can be helpful. We present a concise description of a paraconsistent higher order...... of the logic is examined by a case study in the domain of medicine. Thus we try to build a bridge between the HOL and MVL communities. A sequent calculus is proposed based on recent work by Muskens. Many non-classical logics are, at the propositional level, funny toys which work quite good, but when one wants...

  19. Universal file processing program for field programmable integrated circuits

    International Nuclear Information System (INIS)

    Freytag, D.R.; Nelson, D.J.

    1985-01-01

    A computer program is presented that translates logic equations into promburner files (or the reverse) for programmable logic devices of various kinds, namely PROMs FPLAs, FPLSs and PALs. The program achieves flexibility through the use of a database containing detailed information about the devices to be programmed. New devices can thus be accommodated through simple extensions of the database. When writing logic equations, the user can define logic combinations of signals as new logic variables for use in subsequent equations. This procedure yields compact and transparent expressions for logic operations, thus reducing the chances for error. A logic simulation program is also provided so that an independent check of the design can be performed at the software level

  20. Time-space modal logic for verification of bit-slice circuits

    Science.gov (United States)

    Hiraishi, Hiromi

    1996-03-01

    The major goal of this paper is to propose a new modal logic aiming at formal verification of bit-slice circuits. The new logic is called as time-space modal logic and its major feature is that it can handle two transition relations: one for time transition and the other for space transition. As for a verification algorithm, a symbolic model checking algorithm of the new logic is shown. This could be applicable to verification of bit-slice microprocessor of infinite bit width and 1D systolic array of infinite length. A simple benchmark result shows the effectiveness of the proposed approach.

  1. Logical inference techniques for loop parallelization

    KAUST Repository

    Oancea, Cosmin E.; Rauchwerger, Lawrence

    2012-01-01

    This paper presents a fully automatic approach to loop parallelization that integrates the use of static and run-time analysis and thus overcomes many known difficulties such as nonlinear and indirect array indexing and complex control flow. Our hybrid analysis framework validates the parallelization transformation by verifying the independence of the loop's memory references. To this end it represents array references using the USR (uniform set representation) language and expresses the independence condition as an equation, S = Ø, where S is a set expression representing array indexes. Using a language instead of an array-abstraction representation for S results in a smaller number of conservative approximations but exhibits a potentially-high runtime cost. To alleviate this cost we introduce a language translation F from the USR set-expression language to an equally rich language of predicates (F(S) ⇒ S = Ø). Loop parallelization is then validated using a novel logic inference algorithm that factorizes the obtained complex predicates (F(S)) into a sequence of sufficient-independence conditions that are evaluated first statically and, when needed, dynamically, in increasing order of their estimated complexities. We evaluate our automated solution on 26 benchmarks from PERFECTCLUB and SPEC suites and show that our approach is effective in parallelizing large, complex loops and obtains much better full program speedups than the Intel and IBM Fortran compilers. Copyright © 2012 ACM.

  2. Logical inference techniques for loop parallelization

    KAUST Repository

    Oancea, Cosmin E.

    2012-01-01

    This paper presents a fully automatic approach to loop parallelization that integrates the use of static and run-time analysis and thus overcomes many known difficulties such as nonlinear and indirect array indexing and complex control flow. Our hybrid analysis framework validates the parallelization transformation by verifying the independence of the loop\\'s memory references. To this end it represents array references using the USR (uniform set representation) language and expresses the independence condition as an equation, S = Ø, where S is a set expression representing array indexes. Using a language instead of an array-abstraction representation for S results in a smaller number of conservative approximations but exhibits a potentially-high runtime cost. To alleviate this cost we introduce a language translation F from the USR set-expression language to an equally rich language of predicates (F(S) ⇒ S = Ø). Loop parallelization is then validated using a novel logic inference algorithm that factorizes the obtained complex predicates (F(S)) into a sequence of sufficient-independence conditions that are evaluated first statically and, when needed, dynamically, in increasing order of their estimated complexities. We evaluate our automated solution on 26 benchmarks from PERFECTCLUB and SPEC suites and show that our approach is effective in parallelizing large, complex loops and obtains much better full program speedups than the Intel and IBM Fortran compilers. Copyright © 2012 ACM.

  3. Computability, complexity, logic

    CERN Document Server

    Börger, Egon

    1989-01-01

    The theme of this book is formed by a pair of concepts: the concept of formal language as carrier of the precise expression of meaning, facts and problems, and the concept of algorithm or calculus, i.e. a formally operating procedure for the solution of precisely described questions and problems. The book is a unified introduction to the modern theory of these concepts, to the way in which they developed first in mathematical logic and computability theory and later in automata theory, and to the theory of formal languages and complexity theory. Apart from considering the fundamental themes an

  4. Intuitionistic fuzzy logics

    CERN Document Server

    T Atanassov, Krassimir

    2017-01-01

    The book offers a comprehensive survey of intuitionistic fuzzy logics. By reporting on both the author’s research and others’ findings, it provides readers with a complete overview of the field and highlights key issues and open problems, thus suggesting new research directions. Starting with an introduction to the basic elements of intuitionistic fuzzy propositional calculus, it then provides a guide to the use of intuitionistic fuzzy operators and quantifiers, and lastly presents state-of-the-art applications of intuitionistic fuzzy sets. The book is a valuable reference resource for graduate students and researchers alike.

  5. Legume Logic & Green Manuring

    OpenAIRE

    Basavanagowda Nagabhushana, Nandeesh

    2014-01-01

    Brown plant hopper showed me the way into organic farming. In 2001, I started my practice with logic of legumes just to cut down the 45 percent expenses of my paddy on fertilizers, pesticides and herbicides. Later as I realized each and every plant carries it’s own nutrients, medicinal values and characters. Plants like millets, oil seeds, spices, di-cots, monocots and weeds all being used as a green manure. For all my agriculture problems and crop demands, I look for the answers only thro...

  6. A Concurrent Logical Relation

    DEFF Research Database (Denmark)

    Birkedal, Lars; Sieczkowski, Filip; Thamsborg, Jacob Junker

    2012-01-01

    We present a logical relation for showing the correctness of program transformations based on a new type-and-effect system for a concurrent extension of an ML-like language with higher-order functions, higher-order store and dynamic memory allocation. We show how to use our model to verify a number....... To the best of our knowledge, this is the first such result for a concurrent higher-order language with higher-order store and dynamic memory allocation....

  7. Description logic rules

    CERN Document Server

    Krötzsch, M

    2010-01-01

    Ontological modelling today is applied in many areas of science and technology,including the Semantic Web. The W3C standard OWL defines one of the most important ontology languages based on the semantics of description logics. An alternative is to use rule languages in knowledge modelling, as proposed in the W3C's RIF standard. So far, it has often been unclear how to combine both technologies without sacrificing essential computational properties. This book explains this problem and presents new solutions that have recently been proposed. Extensive introductory chapters provide the necessary

  8. Logical empiricists on race.

    Science.gov (United States)

    Bright, Liam Kofi

    2017-10-01

    The logical empiricists expressed a consistent attitude to racial categorisation in both the ethical and scientific spheres. Their attitude may be captured in the following slogan: human racial taxonomy is an empirically meaningful mode of classifying persons that we should refrain from deploying. I offer an interpretation of their position that would render coherent their remarks on race with positions they adopted on the scientific status of taxonomy in general, together with their potential moral or political motivations for adopting that position. Copyright © 2017 Elsevier Ltd. All rights reserved.

  9. Classical Mathematical Logic The Semantic Foundations of Logic

    CERN Document Server

    Epstein, Richard L

    2011-01-01

    In Classical Mathematical Logic, Richard L. Epstein relates the systems of mathematical logic to their original motivations to formalize reasoning in mathematics. The book also shows how mathematical logic can be used to formalize particular systems of mathematics. It sets out the formalization not only of arithmetic, but also of group theory, field theory, and linear orderings. These lead to the formalization of the real numbers and Euclidean plane geometry. The scope and limitations of modern logic are made clear in these formalizations. The book provides detailed explanations of all proo

  10. Reliability analysis of diverse safety logic systems of fast breeder reactor

    International Nuclear Information System (INIS)

    Ravi Kumar, Bh.; Apte, P.R.; Srivani, L.; Ilango Sambasivan, S.; Swaminathan, P.

    2006-01-01

    Safety Logic for Fast Breeder Reactor (FBR) is designed to initiate safety action against Design Basis Events. Based on the outputs of various processing circuits, Safety logic system drives the control rods of the shutdown system. So, Safety Logic system is classified as safety critical system. Therefore, reliability analysis has to be performed. This paper discusses the Reliability analysis of Diverse Safety logic systems of FBRs. For this literature survey on safety critical systems, system reliability approach and standards to be followed like IEC-61508 are discussed in detail. For Programmable Logic device based systems, Hardware Description Languages (HDL) are used. So this paper also discusses the Verification and Validation for HDLs. Finally a case study for the Reliability analysis of Safety logic is discussed. (author)

  11. Superconducting digital logic amplifier

    International Nuclear Information System (INIS)

    Przybysz, J.X.

    1989-01-01

    This paper describes a superconducting digital logic amplifier for interfacing between a Josephson junction logic circuit having output current and a higher voltage semiconductor circuit input. The amplifier comprising: an input terminal for connection to a; an output terminal for connection to a semiconductor circuit input; an input, lower critical current, Josephson junction having first and second terminals; a first series string of at least three lower critical current Josephson junctions. The first series string being connected to the first terminal of the input Josephson junction such that the first series string is in series with the input Josephson junction to provide a series combination. The input terminal being connected to the first terminal of the input Josephson junction, and with the critical current of the lower critical current Josephson junctions of the input Josephson junction and the first series Josephson junctions being less than the output current of the low voltage Josephson junction circuit; a second series string of at least four higher critical current Josephson junctions. The second string being connected in parallel with the series combination to provide parallel strings having an upper common connection and a lower common connection. The lower common connection being connected to the second terminal of the input Josephson junction and the upper common connection being connected to the output terminal; and a pulsed DC current source connected the parallel strings at the upper common connection. The DC current source having a current at least equal to the critical current of the higher critical current Josephson junctions

  12. Quantum logics and convex geometry

    International Nuclear Information System (INIS)

    Bunce, L.J.; Wright, J.D.M.

    1985-01-01

    The main result is a representation theorem which shows that, for a large class of quantum logics, a quantum logic, Q, is isomorphic to the lattice of projective faces in a suitable convex set K. As an application we extend our earlier results, which, subject to countability conditions, gave a geometric characterization of those quantum logics which are isomorphic to the projection lattice of a von Neumann algebra or a JBW-algebra. (orig.)

  13. Safety logic systems of PFBR

    International Nuclear Information System (INIS)

    Sambasivan, S. Ilango

    2004-01-01

    Full text : PFBR is provided with two independent, fast acting and diverse shutdown systems to detect any abnormalities and to initiate safety action. Each system consists of sensors, signal processing systems, logics, drive mechanisms and absorber rods. The absorber rods of the first system are Control and Safety Rods (CSR) and that of the second are called as Diverse Safety Rods (DSR). There are nine CSR and three DSR. While CSR are used for startup, control of reactor power, controlled shutdown and SCRAM, the DSR are used only for SCRAM. The respective drive mechanisms are called as CSRDM and DSRDM. Each of these two systems is capable of executing the shutdown satisfactorily with single failure criteria. Two independent safety logic systems based on diverse principles have been designed for the two shut down systems. The analog outputs of the sensors of Core Monitoring Systems comprising of reactor flux monitoring, core temperature monitoring, failed fuel detection and core flow monitoring systems are processed and converted into binary signals depending on their instantaneous values. Safety logic systems receive the binary signals from these core-monitoring systems and process them logically to protect the reactor against postulated initiating events. Neutronic and power to flow (P/Q) signals form the inputs to safety logic system-I and temperature signals are inputs to the safety logic system II. Failed fuel detection signals are processed by both the shut down systems. The two logic systems to actuate the safety rods are also based on two diverse designs and implemented with solid-state devices to meet all the requirements of safety systems. Safety logic system I that caters to neutronic and P/Q signals is designed around combinational logic and has an on-line test facility to detect struck at faults. The second logic system is based on dynamic logic and hence is inherently safe. This paper gives an overview of the two logic systems that have been

  14. PM 3655 PHILIPS Logic analyzer

    CERN Multimedia

    A logic analyzer is an electronic instrument that captures and displays multiple signals from a digital system or digital circuit. A logic analyzer may convert the captured data into timing diagrams, protocol decodes, state machine traces, assembly language, or may correlate assembly with source-level software. Logic Analyzers have advanced triggering capabilities, and are useful when a user needs to see the timing relationships between many signals in a digital system.

  15. Radio Frequency Based Programmable Logic Controller Anomaly Detection

    Science.gov (United States)

    2013-09-01

    105 viii List of Figures Figure Page 1.1 OSI Network Model...Information Technology . . . . . . . . . . . . . . . . . . 1 LAN Local Area Network . . . . . . . . . . . . . . . . . . . . 22 LFS Learning From...18 OS Operating System . . . . . . . . . . . . . . . . . . . . . 6 OSI Open Systems Interconnect

  16. Firmware Counterfeiting and Modification Attacks on Programmable Logic Controllers

    Science.gov (United States)

    2013-03-01

    employees to find and use, or the attackers may have breached physical security to deliver the worm [19]. Once introduced to a computer running Microsoft ...physical inputs and outputs. PLCs typically require proprietary software installed on a standard computer (usually running Microsoft Windows) to provide a...Hack in the Box Sec-Conference. Kuala Lumpur, Malaysia . 2010. [23] He↵ner, Craig. “Reverse Engineering Firmware: Linksys WAG120N”. DEV/TTYS0, May 29

  17. Towards Quantifying Programmable Logic Controller Resilience Against Intentional Exploits

    Science.gov (United States)

    2012-03-22

    may improve the SCADA system’s resilience against DoS and man-in-the-middle ( MITM ) attacks. DoS attacks may be mitigated by using the redundant...paths available on the network links. MITM attacks may be mitigated by the data integrity checks associated with the middleware. Figure 4 illustrates

  18. Programmable Logic Controller Modification Attacks for use in Detection Analysis

    Science.gov (United States)

    2014-03-27

    and J. Lowe, “The Myths and Facts Behind Cyber Security Risks for Industrial Control Systems ,” in Proceedings of the VDE Kongress, vol. 116, 2004. [13...Feb 2014 Date 20 Feb 2014 Date 20 Feb 2014 Date AFIT-ENG-14-M-66 Abstract Unprotected Supervisory Control and Data Acquisition (SCADA) systems offer...control and monitor physical industrial processes. Although attacks targeting SCADA systems have increased, there has been little work exploring the

  19. Multi Carrier Modulation Audio Power Amplifier with Programmable Logic

    DEFF Research Database (Denmark)

    Christiansen, Theis; Andersen, Toke Meyer; Knott, Arnold

    2009-01-01

    While switch-mode audio power amplifiers allow compact implementations and high output power levels due to their high power efficiency, they are very well known for creating electromagnetic interference (EMI) with other electronic equipment. To lower the EMI of switch-mode (class D) audio power a...

  20. Fuzz Testing of Industrial Network Protocols in Programmable Logic Controllers

    Science.gov (United States)

    2017-12-01

    efforts, Scapy [18], and existing Scapy- based fuzzing tools. Chapter II also presents an introduction to two AB/RA PLCs used in 4 this thesis...called ENIP Fuzz. ENIP Fuzz is an ICS fuzzing program that uses the Python -based packet manipulation tool, Scapy [18] to craft customized fuzzing...OpenRCE/sulley [31] S. Bansal and N. Bansal, “Scapy—A Python tool for security testing,” Journal of Computer Science & Systems Biology, March 31, 2015

  1. Popular lectures on mathematical logic

    CERN Document Server

    Wang, Hao

    2014-01-01

    A noted logician and philosopher addresses various forms of mathematical logic, discussing both theoretical underpinnings and practical applications. Author Hao Wang surveys the central concepts and theories of the discipline in a historical and developmental context, and then focuses on the four principal domains of contemporary mathematical logic: set theory, model theory, recursion theory and constructivism, and proof theory.Topics include the place of problems in the development of theories of logic and logic's relation to computer science. Specific attention is given to Gödel's incomplete

  2. Contextual logic for quantum systems

    International Nuclear Information System (INIS)

    Domenech, Graciela; Freytes, Hector

    2005-01-01

    In this work we build a quantum logic that allows us to refer to physical magnitudes pertaining to different contexts from a fixed one without the contradictions with quantum mechanics expressed in no-go theorems. This logic arises from considering a sheaf over a topological space associated with the Boolean sublattices of the ortholattice of closed subspaces of the Hilbert space of the physical system. Different from standard quantum logics, the contextual logic maintains a distributive lattice structure and a good definition of implication as a residue of the conjunction

  3. Tensor product of quantum logics

    Science.gov (United States)

    Pulmannová, Sylvia

    1985-01-01

    A quantum logic is the couple (L,M) where L is an orthomodular σ-lattice and M is a strong set of states on L. The Jauch-Piron property in the σ-form is also supposed for any state of M. A ``tensor product'' of quantum logics is defined. This definition is compared with the definition of a free orthodistributive product of orthomodular σ-lattices. The existence and uniqueness of the tensor product in special cases of Hilbert space quantum logics and one quantum and one classical logic are studied.

  4. Logic and Philosophy of Time

    DEFF Research Database (Denmark)

    A.N. Prior (1914-69) in the course of the 1950s and 1960s founded a new and revolutionary paradigm in philosophy and logic. Its most central feature is the preoccupation with time and the development of the logic of time. However, this was inseparably interwoven with fundamental questions about h...... human freedom, ethics, and existence. This remarkable integration of themes also embodies an original and in fact revolutionary conception of logic. The book series, Logic and Philosophy of Time, is dedicated to a deep investigation and also the further development of Prior’s paradigm. ...

  5. Optimization methods for logical inference

    CERN Document Server

    Chandru, Vijay

    2011-01-01

    Merging logic and mathematics in deductive inference-an innovative, cutting-edge approach. Optimization methods for logical inference? Absolutely, say Vijay Chandru and John Hooker, two major contributors to this rapidly expanding field. And even though ""solving logical inference problems with optimization methods may seem a bit like eating sauerkraut with chopsticks. . . it is the mathematical structure of a problem that determines whether an optimization model can help solve it, not the context in which the problem occurs."" Presenting powerful, proven optimization techniques for logic in

  6. Logic and Philosophy of Time

    DEFF Research Database (Denmark)

    By blending historical research with current research, this collection (loosely inspired by themes from the work of Arthur Prior) demonstrates the importance of Prior's writings and helps us to gain a deeper understanding of time, its logic(s), and its language(s).......By blending historical research with current research, this collection (loosely inspired by themes from the work of Arthur Prior) demonstrates the importance of Prior's writings and helps us to gain a deeper understanding of time, its logic(s), and its language(s)....

  7. Meta-Logical Reasoning in Higher-Order Logic

    DEFF Research Database (Denmark)

    Villadsen, Jørgen; Schlichtkrull, Anders; Hess, Andreas Viktor

    The semantics of first-order logic (FOL) can be described in the meta-language of higher-order logic (HOL). Using HOL one can prove key properties of FOL such as soundness and completeness. Furthermore, one can prove sentences in FOL valid using the formalized FOL semantics. To aid...

  8. Crispv programme

    International Nuclear Information System (INIS)

    Marinkovicj, N.

    CRISPV (Criticality and Spectrum code) is a multigroup neutron spectrum code for homogeneous reactor cores and is actually a somewhat modified version of the original CRISP programme. It is a combination of DATAPREP-II and BIGG-II programmes. It is assumed that the reactor cell is a cylindrical fuel rod in the light or heavy water moderator. DATEPREP-II CODE forms the multigroup data for homogeneous reactor and prepares the input parameters for the BIGG-II code. It has its own nuclear data library on a separate tape in binary mode. BIGG-II code is a multigroup neutron spectrum and criticality code for a homogenized medium. It has as well its own separate data library. In the CRISPV programme the overlay structure enables automatic handling of data calculated in the DATAPREP-II programme and needed in the BIGG-II core. Both programmes are written in FORTRAN for CDC 3600. Using the programme is very efficient and simple

  9. All-spin logic operations: Memory device and reconfigurable computing

    Science.gov (United States)

    Patra, Moumita; Maiti, Santanu K.

    2018-02-01

    Exploiting spin degree of freedom of electron a new proposal is given to characterize spin-based logical operations using a quantum interferometer that can be utilized as a programmable spin logic device (PSLD). The ON and OFF states of both inputs and outputs are described by spin state only, circumventing spin-to-charge conversion at every stage as often used in conventional devices with the inclusion of extra hardware that can eventually diminish the efficiency. All possible logic functions can be engineered from a single device without redesigning the circuit which certainly offers the opportunities of designing new generation spintronic devices. Moreover, we also discuss the utilization of the present model as a memory device and suitable computing operations with proposed experimental setups.

  10. Towards an arithmetical logic the arithmetical foundations of logic

    CERN Document Server

    Gauthier, Yvon

    2015-01-01

    This book offers an original contribution to the foundations of logic and mathematics, and focuses on the internal logic of mathematical theories, from arithmetic or number theory to algebraic geometry. Arithmetical logic is the term used to refer to the internal logic of classical arithmetic, here called Fermat-Kronecker arithmetic, and combines Fermat’s method of infinite descent with Kronecker’s general arithmetic of homogeneous polynomials. The book also includes a treatment of theories in physics and mathematical physics to underscore the role of arithmetic from a constructivist viewpoint. The scope of the work intertwines historical, mathematical, logical and philosophical dimensions in a unified critical perspective; as such, it will appeal to a broad readership from mathematicians to logicians, to philosophers interested in foundational questions. Researchers and graduate students in the fields of philosophy and mathematics will benefit from the author’s critical approach to the foundations of l...

  11. A Logical Process Calculus

    Science.gov (United States)

    Cleaveland, Rance; Luettgen, Gerald; Bushnell, Dennis M. (Technical Monitor)

    2002-01-01

    This paper presents the Logical Process Calculus (LPC), a formalism that supports heterogeneous system specifications containing both operational and declarative subspecifications. Syntactically, LPC extends Milner's Calculus of Communicating Systems with operators from the alternation-free linear-time mu-calculus (LT(mu)). Semantically, LPC is equipped with a behavioral preorder that generalizes Hennessy's and DeNicola's must-testing preorder as well as LT(mu's) satisfaction relation, while being compositional for all LPC operators. From a technical point of view, the new calculus is distinguished by the inclusion of: (1) both minimal and maximal fixed-point operators and (2) an unimple-mentability predicate on process terms, which tags inconsistent specifications. The utility of LPC is demonstrated by means of an example highlighting the benefits of heterogeneous system specification.

  12. A High-Voltage SOI CMOS Exciter Chip for a Programmable Fluidic Processor System.

    Science.gov (United States)

    Current, K W; Yuk, K; McConaghy, C; Gascoyne, P R C; Schwartz, J A; Vykoukal, J V; Andrews, C

    2007-06-01

    A high-voltage (HV) integrated circuit has been demonstrated to transport fluidic droplet samples on programmable paths across the array of driving electrodes on its hydrophobically coated surface. This exciter chip is the engine for dielectrophoresis (DEP)-based micro-fluidic lab-on-a-chip systems, creating field excitations that inject and move fluidic droplets onto and about the manipulation surface. The architecture of this chip is expandable to arrays of N X N identical HV electrode driver circuits and electrodes. The exciter chip is programmable in several senses. The routes of multiple droplets may be set arbitrarily within the bounds of the electrode array. The electrode excitation waveform voltage amplitude, phase, and frequency may be adjusted based on the system configuration and the signal required to manipulate a particular fluid droplet composition. The voltage amplitude of the electrode excitation waveform can be set from the minimum logic level up to the maximum limit of the breakdown voltage of the fabrication technology. The frequency of the electrode excitation waveform can also be set independently of its voltage, up to a maximum depending upon the type of droplets that must be driven. The exciter chip can be coated and its oxide surface used as the droplet manipulation surface or it can be used with a top-mounted, enclosed fluidic chamber consisting of a variety of materials. The HV capability of the exciter chip allows the generated DEP forces to penetrate into the enclosed chamber region and an adjustable voltage amplitude can accommodate a variety of chamber floor thicknesses. This demonstration exciter chip has a 32 x 32 array of nominally 100 V electrode drivers that are individually programmable at each time point in the procedure to either of two phases: 0deg and 180deg with respect to the reference clock. For this demonstration chip, while operating the electrodes with a 100-V peak-to-peak periodic waveform, the maximum HV electrode

  13. Fuzzy Logic and Arithmetical Hierarchy III

    Czech Academy of Sciences Publication Activity Database

    Hájek, Petr

    2001-01-01

    Roč. 68, č. 1 (2001), s. 129-142 ISSN 0039-3215 R&D Projects: GA AV ČR IAA1030004 Institutional research plan: AV0Z1030915 Keywords : fuzzy logic * basic fuzzy logic * Lukasiewicz logic * Godel logic * product logic * arithmetical hierarchy Subject RIV: BA - General Mathematics

  14. Logical entropy of quantum dynamical systems

    Directory of Open Access Journals (Sweden)

    Ebrahimzadeh Abolfazl

    2016-01-01

    Full Text Available This paper introduces the concepts of logical entropy and conditional logical entropy of hnite partitions on a quantum logic. Some of their ergodic properties are presented. Also logical entropy of a quantum dynamical system is dehned and ergodic properties of dynamical systems on a quantum logic are investigated. Finally, the version of Kolmogorov-Sinai theorem is proved.

  15. Questions and dependency in intuitionistic logic

    NARCIS (Netherlands)

    Ciardelli, Ivano; Iemhoff, Rosalie; Yang, Fan

    2017-01-01

    In recent years, the logic of questions and dependencies has been investigated in the closely related frameworks of inquisitive logic and dependence logic. These investigations have assumed classical logic as the background logic of statements, and added formulas expressing questions and

  16. Reversible logic gates on Physarum Polycephalum

    International Nuclear Information System (INIS)

    Schumann, Andrew

    2015-01-01

    In this paper, we consider possibilities how to implement asynchronous sequential logic gates and quantum-style reversible logic gates on Physarum polycephalum motions. We show that in asynchronous sequential logic gates we can erase information because of uncertainty in the direction of plasmodium propagation. Therefore quantum-style reversible logic gates are more preferable for designing logic circuits on Physarum polycephalum

  17. A beginner's guide to mathematical logic

    CERN Document Server

    Smullyan, Raymond M

    2014-01-01

    Combining stories of great philosophers, quotations, and riddles with the fundamentals of mathematical logic, this new textbook for first courses in mathematical logic was written by the subject's creative master. Raymond Smullyan offers clear, incremental presentations of difficult logic concepts with creative explanations and unique problems related to proofs, propositional logic and first-order logic, undecidability, recursion theory, and other topics.

  18. Structural Completeness in Fuzzy Logics

    Czech Academy of Sciences Publication Activity Database

    Cintula, Petr; Metcalfe, G.

    2009-01-01

    Roč. 50, č. 2 (2009), s. 153-183 ISSN 0029-4527 R&D Projects: GA MŠk(CZ) 1M0545 Institutional research plan: CEZ:AV0Z10300504 Keywords : structral logics * fuzzy logics * structural completeness * admissible rules * primitive variety * residuated lattices Subject RIV: BA - General Mathematics

  19. A tristate optical logic system

    Science.gov (United States)

    Basuray, A.; Mukhopadhyay, S.; Kumar Ghosh, Hirak; Datta, A. K.

    1991-09-01

    A method is described to represent data in a tristate logic system which are subsequently replaced by Modified Trinary Numbers (MTN). This system is advantagegeous in parallel processing as carry and borrow free operations in arithmatic computation is possible. The logical operations are also modified according to the three states available. A possible practical application of the same using polarized light is also suggested.

  20. Logic, reasoning, and verbal behavior

    OpenAIRE

    Terrell, Dudley J.; Johnston, J. M.

    1989-01-01

    This paper analyzes the traditional concepts of logic and reasoning from the perspective of radical behaviorism and in the terms of Skinner's treatment of verbal behavior. The topics covered in this analysis include the proposition, premises and conclusions, logicality and rules, and deductive and inductive reasoning.

  1. Flat Coalgebraic Fixed Point Logics

    Science.gov (United States)

    Schröder, Lutz; Venema, Yde

    Fixed point logics are widely used in computer science, in particular in artificial intelligence and concurrency. The most expressive logics of this type are the μ-calculus and its relatives. However, popular fixed point logics tend to trade expressivity for simplicity and readability, and in fact often live within the single variable fragment of the μ-calculus. The family of such flat fixed point logics includes, e.g., CTL, the *-nesting-free fragment of PDL, and the logic of common knowledge. Here, we extend this notion to the generic semantic framework of coalgebraic logic, thus covering a wide range of logics beyond the standard μ-calculus including, e.g., flat fragments of the graded μ-calculus and the alternating-time μ-calculus (such as ATL), as well as probabilistic and monotone fixed point logics. Our main results are completeness of the Kozen-Park axiomatization and a timed-out tableaux method that matches ExpTime upper bounds inherited from the coalgebraic μ-calculus but avoids using automata.

  2. Evidence logics with relational evidence

    DEFF Research Database (Denmark)

    Baltag, Alexandru; Occhipinti, Andrés

    2017-01-01

    We introduce a family of logics for reasoning about relational evidence: evidence that involves an ordering of states in terms of their relative plausibility. We provide sound and complete axiomatizations for the logics. We also present several evidential actions and prove soundness...

  3. Methods in Logic Based Control

    DEFF Research Database (Denmark)

    Christensen, Georg Kronborg

    1999-01-01

    Desing and theory of Logic Based Control systems.Boolean Algebra, Karnaugh Map, Quine McClusky's algorithm. Sequential control design. Logic Based Control Method, Cascade Control Method. Implementation techniques: relay, pneumatic, TTL/CMOS,PAL and PLC- and Soft_PLC implementation. PLC...

  4. Epistemic logics for sceptical agents

    Czech Academy of Sciences Publication Activity Database

    Bílková, M.; Majer, Ondrej; Peliš, Michal

    2016-01-01

    Roč. 26, č. 6 (2016), s. 1815-1841 ISSN 0955-792X R&D Projects: GA ČR(CZ) GA13-21076S Institutional support: RVO:67985955 Keywords : epistemic logic * substructural logic * frame semantics Subject RIV: AA - Philosophy ; Religion Impact factor: 0.909, year: 2016

  5. Binary logic is rich enough

    International Nuclear Information System (INIS)

    Zapatrin, R.R.

    1992-01-01

    Given a finite ortholattice L, the *-semigroup is explicitly built whose annihilator ortholattice is isomorphic to L. Thus, it is shown that any finite quantum logic is the additive part of a binary logic. Some areas of possible applications are outlined. 7 refs

  6. Logical independence and quantum randomness

    International Nuclear Information System (INIS)

    Paterek, T; Kofler, J; Aspelmeyer, M; Zeilinger, A; Brukner, C; Prevedel, R; Klimek, P

    2010-01-01

    We propose a link between logical independence and quantum physics. We demonstrate that quantum systems in the eigenstates of Pauli group operators are capable of encoding mathematical axioms and show that Pauli group quantum measurements are capable of revealing whether or not a given proposition is logically dependent on the axiomatic system. Whenever a mathematical proposition is logically independent of the axioms encoded in the measured state, the measurement associated with the proposition gives random outcomes. This allows for an experimental test of logical independence. Conversely, it also allows for an explanation of the probabilities of random outcomes observed in Pauli group measurements from logical independence without invoking quantum theory. The axiomatic systems we study can be completed and are therefore not subject to Goedel's incompleteness theorem.

  7. Generator of combined logical signals

    International Nuclear Information System (INIS)

    Laviron, Andre; Berard, Claude.

    1982-01-01

    The invention concerns a generator of combined logical signals to form combinations of two outputs at logical level 1 and N-2 outputs at logical level 0, among N generator outputs. This generator is characterized in that it includes a set of N means for storing combinations. Means enable the N storage means to be loaded with the logical levels corresponding to a pre-set starting combination, to control the operations for shifting the contents of the storage means and to control, by transfer facilities, the transfers of contents between these storage means. Controls enable the storage means to be actuated in order to obtain combinations of logical levels 1 and 0. The generation of combinations can be stopped after another pre-set combination. Application is for testing of safety circuits for nuclear power stations [fr

  8. Logical independence and quantum randomness

    Energy Technology Data Exchange (ETDEWEB)

    Paterek, T; Kofler, J; Aspelmeyer, M; Zeilinger, A; Brukner, C [Institute for Quantum Optics and Quantum Information, Austrian Academy of Sciences, Boltzmanngasse 3, A-1090 Vienna (Austria); Prevedel, R; Klimek, P [Faculty of Physics, University of Vienna, Boltzmanngasse 5, A-1090 Vienna (Austria)], E-mail: tomasz.paterek@univie.ac.at

    2010-01-15

    We propose a link between logical independence and quantum physics. We demonstrate that quantum systems in the eigenstates of Pauli group operators are capable of encoding mathematical axioms and show that Pauli group quantum measurements are capable of revealing whether or not a given proposition is logically dependent on the axiomatic system. Whenever a mathematical proposition is logically independent of the axioms encoded in the measured state, the measurement associated with the proposition gives random outcomes. This allows for an experimental test of logical independence. Conversely, it also allows for an explanation of the probabilities of random outcomes observed in Pauli group measurements from logical independence without invoking quantum theory. The axiomatic systems we study can be completed and are therefore not subject to Goedel's incompleteness theorem.

  9. Marketing Logics, Ambidexterity and Influence

    DEFF Research Database (Denmark)

    Tollin, Karin; Schmidt, Marcus

    2012-01-01

    in four CMOs have taken on this challenge, or adopted a marketing logic which could be referred to as ambidextrous. Furthermore, the study shows that this logic exerts a stronger impact on marketing's influence, compared to logics related to assuring brand consistency and measuring the performance...... of marketing processes. Three other ways to enact marketing management were also revealed, namely: an innovation; a communication; and a supporting marketing logic. This leads us to conclude that the influence of companies' marketing functions show up a heterogeneous picture within which the marketing logics......The duties of companies' chief marketing officers (CMOs) seem incompatible. They are expected to ensure that their company's market assets are properly exploited and recorded, while simultaneously enacting a proactive role in the company's business development. This study shows that about one...

  10. Flow Logic for Process Calculi

    DEFF Research Database (Denmark)

    Nielson, Hanne Riis; Nielson, Flemming; Pilegaard, Henrik

    2012-01-01

    Flow Logic is an approach to statically determining the behavior of programs and processes. It borrows methods and techniques from Abstract Interpretation, Data Flow Analysis and Constraint Based Analysis while presenting the analysis in a style more reminiscent of Type Systems. Traditionally...... developed for programming languages, this article provides a tutorial development of the approach of Flow Logic for process calculi based on a decade of research. We first develop a simple analysis for the π-calculus; this consists of the specification, semantic soundness (in the form of subject reduction......, and finally, we extend it to a relational analysis. A Flow Logic is a program logic---in the same sense that a Hoare’s logic is. We conclude with an executive summary presenting the highlights of the approach from this perspective including a discussion of theoretical properties as well as implementation...

  11. Array capabilities and future arrays

    International Nuclear Information System (INIS)

    Radford, D.

    1993-01-01

    Early results from the new third-generation instruments GAMMASPHERE and EUROGAM are confirming the expectation that such arrays will have a revolutionary effect on the field of high-spin nuclear structure. When completed, GAMMASHPERE will have a resolving power am order of magnitude greater that of the best second-generation arrays. When combined with other instruments such as particle-detector arrays and fragment mass analysers, the capabilites of the arrays for the study of more exotic nuclei will be further enhanced. In order to better understand the limitations of these instruments, and to design improved future detector systems, it is important to have some intelligible and reliable calculation for the relative resolving power of different instrument designs. The derivation of such a figure of merit will be briefly presented, and the relative sensitivities of arrays currently proposed or under construction presented. The design of TRIGAM, a new third-generation array proposed for Chalk River, will also be discussed. It is instructive to consider how far arrays of Compton-suppressed Ge detectors could be taken. For example, it will be shown that an idealised open-quote perfectclose quotes third-generation array of 1000 detectors has a sensitivity an order of magnitude higher again than that of GAMMASPHERE. Less conventional options for new arrays will also be explored

  12. The Logic of Practice in the Practice of Logics

    DEFF Research Database (Denmark)

    Raviola, Elena; Dubini, Paola

    2016-01-01

    of logics through a six months full-time ethnographic study at Il Sole-24 Ore, the largest Italian financial newspaper, between 2007 and 2008. An original conceptual framework is developed to analyse how the logic of journalism is enacted vis-à-vis that of advertising in a setting in which an old technology...... for news production – print newspaper – coexists with a new one – website – and thus encounters between new and old technological possibilities make workings of institutional logics particularly visible. The findings point out different mechanisms of institutional work dealing with actions that, made...

  13. Complex cellular logic computation using ribocomputing devices.

    Science.gov (United States)

    Green, Alexander A; Kim, Jongmin; Ma, Duo; Silver, Pamela A; Collins, James J; Yin, Peng

    2017-08-03

    Synthetic biology aims to develop engineering-driven approaches to the programming of cellular functions that could yield transformative technologies. Synthetic gene circuits that combine DNA, protein, and RNA components have demonstrated a range of functions such as bistability, oscillation, feedback, and logic capabilities. However, it remains challenging to scale up these circuits owing to the limited number of designable, orthogonal, high-performance parts, the empirical and often tedious composition rules, and the requirements for substantial resources for encoding and operation. Here, we report a strategy for constructing RNA-only nanodevices to evaluate complex logic in living cells. Our 'ribocomputing' systems are composed of de-novo-designed parts and operate through predictable and designable base-pairing rules, allowing the effective in silico design of computing devices with prescribed configurations and functions in complex cellular environments. These devices operate at the post-transcriptional level and use an extended RNA transcript to co-localize all circuit sensing, computation, signal transduction, and output elements in the same self-assembled molecular complex, which reduces diffusion-mediated signal losses, lowers metabolic cost, and improves circuit reliability. We demonstrate that ribocomputing devices in Escherichia coli can evaluate two-input logic with a dynamic range up to 900-fold and scale them to four-input AND, six-input OR, and a complex 12-input expression (A1 AND A2 AND NOT A1*) OR (B1 AND B2 AND NOT B2*) OR (C1 AND C2) OR (D1 AND D2) OR (E1 AND E2). Successful operation of ribocomputing devices based on programmable RNA interactions suggests that systems employing the same design principles could be implemented in other host organisms or in extracellular settings.

  14. Basic logic and quantum entanglement

    International Nuclear Information System (INIS)

    Zizzi, P A

    2007-01-01

    As it is well known, quantum entanglement is one of the most important features of quantum computing, as it leads to massive quantum parallelism, hence to exponential computational speed-up. In a sense, quantum entanglement is considered as an implicit property of quantum computation itself. But... can it be made explicit? In other words, is it possible to find the connective 'entanglement' in a logical sequent calculus for the machine language? And also, is it possible to 'teach' the quantum computer to 'mimic' the EPR 'paradox'? The answer is in the affirmative, if the logical sequent calculus is that of the weakest possible logic, namely Basic logic. - A weak logic has few structural rules. But in logic, a weak structure leaves more room for connectives (for example the connective 'entanglement'). Furthermore, the absence in Basic logic of the two structural rules of contraction and weakening corresponds to the validity of the no-cloning and no-erase theorems, respectively, in quantum computing

  15. Basic logic and quantum entanglement

    Energy Technology Data Exchange (ETDEWEB)

    Zizzi, P A [Dipartimento di Matematica Pura ed Applicata, Via Trieste 63, 35121 Padova (Italy)

    2007-05-15

    As it is well known, quantum entanglement is one of the most important features of quantum computing, as it leads to massive quantum parallelism, hence to exponential computational speed-up. In a sense, quantum entanglement is considered as an implicit property of quantum computation itself. But... can it be made explicit? In other words, is it possible to find the connective 'entanglement' in a logical sequent calculus for the machine language? And also, is it possible to 'teach' the quantum computer to 'mimic' the EPR 'paradox'? The answer is in the affirmative, if the logical sequent calculus is that of the weakest possible logic, namely Basic logic. - A weak logic has few structural rules. But in logic, a weak structure leaves more room for connectives (for example the connective 'entanglement'). Furthermore, the absence in Basic logic of the two structural rules of contraction and weakening corresponds to the validity of the no-cloning and no-erase theorems, respectively, in quantum computing.

  16. Logic regression and its extensions.

    Science.gov (United States)

    Schwender, Holger; Ruczinski, Ingo

    2010-01-01

    Logic regression is an adaptive classification and regression procedure, initially developed to reveal interacting single nucleotide polymorphisms (SNPs) in genetic association studies. In general, this approach can be used in any setting with binary predictors, when the interaction of these covariates is of primary interest. Logic regression searches for Boolean (logic) combinations of binary variables that best explain the variability in the outcome variable, and thus, reveals variables and interactions that are associated with the response and/or have predictive capabilities. The logic expressions are embedded in a generalized linear regression framework, and thus, logic regression can handle a variety of outcome types, such as binary responses in case-control studies, numeric responses, and time-to-event data. In this chapter, we provide an introduction to the logic regression methodology, list some applications in public health and medicine, and summarize some of the direct extensions and modifications of logic regression that have been proposed in the literature. Copyright © 2010 Elsevier Inc. All rights reserved.

  17. SNP Arrays

    Directory of Open Access Journals (Sweden)

    Jari Louhelainen

    2016-10-01

    Full Text Available The papers published in this Special Issue “SNP arrays” (Single Nucleotide Polymorphism Arrays focus on several perspectives associated with arrays of this type. The range of papers vary from a case report to reviews, thereby targeting wider audiences working in this field. The research focus of SNP arrays is often human cancers but this Issue expands that focus to include areas such as rare conditions, animal breeding and bioinformatics tools. Given the limited scope, the spectrum of papers is nothing short of remarkable and even from a technical point of view these papers will contribute to the field at a general level. Three of the papers published in this Special Issue focus on the use of various SNP array approaches in the analysis of three different cancer types. Two of the papers concentrate on two very different rare conditions, applying the SNP arrays slightly differently. Finally, two other papers evaluate the use of the SNP arrays in the context of genetic analysis of livestock. The findings reported in these papers help to close gaps in the current literature and also to give guidelines for future applications of SNP arrays.

  18. Suicide as social logic.

    Science.gov (United States)

    Kral, M J

    1994-01-01

    Although suicide is not viewed as a mental disorder per se, it is viewed by many if not most clinicians, researchers, and lay people as a real or natural symptom of depression. It is at least most typically seen as the unfortunate, severe, yet logical end result of a chain of negative self-appraisals, negative events, and hopelessness. Extending an approach articulated by the early French sociologist Gabriel Tarde, in this paper I argue that suicide is merely an idea, albeit a very bad one, having more in common with societal beliefs and norms regarding such things as divorce, abortion, sex, politics, consumer behavior, and fashion. I make a sharp contrast between perturbation and lethality, concepts central to Edwin S. Shneidman's theory of suicide. Evidence supportive of suicide as an idea is discussed based on what we are learning from the study of history and culture, and about contagion/cluster phenomena, media/communication, and choice of method. It is suggested that certain individuals are more vulnerable to incorporate the idea and act of suicide into their concepts of self, based on the same principles by which ideas are spread throughout society. Just as suicide impacts on society, so does society impact on suicide.

  19. Conference on Logical Methods

    CERN Document Server

    Remmel, Jeffrey; Shore, Richard; Sweedler, Moss; Progress in Computer Science and Applied Logic

    1993-01-01

    The twenty-six papers in this volume reflect the wide and still expanding range of Anil Nerode's work. A conference on Logical Methods was held in honor of Nerode's sixtieth birthday (4 June 1992) at the Mathematical Sciences Institute, Cornell University, 1-3 June 1992. Some of the conference papers are here, but others are from students, co-workers and other colleagues. The intention of the conference was to look forward, and to see the directions currently being pursued, in the development of work by, or with, Nerode. Here is a brief summary of the contents of this book. We give a retrospective view of Nerode's work. A number of specific areas are readily discerned: recursive equivalence types, recursive algebra and model theory, the theory of Turing degrees and r.e. sets, polynomial-time computability and computer science. Nerode began with automata theory and has also taken a keen interest in the history of mathematics. All these areas are represented. The one area missing is Nerode's applied mathematica...

  20. FPGA based Fuzzy Logic Controller for plasma position control in ADITYA Tokamak

    International Nuclear Information System (INIS)

    Suratia, Pooja; Patel, Jigneshkumar; Rajpal, Rachana; Kotia, Sorum; Govindarajan, J.

    2012-01-01

    Highlights: ► Evaluation and comparison of the working performance of FLC is done with that of PID Controller. ► FLC is designed using MATLAB Fuzzy Logic Toolbox, and validated on ADITYA RZIP model. ► FLC was implemented on a FPGA. The close-loop testing is done by interfacing FPGA to MATLAB/Simulink. ► Developed FLC controller is able to maintain the plasma column within required range of ±0.05 m and was found to give robust control against various disturbances and faster and smoother response compared to PID Controller. - Abstract: Tokamaks are the most promising devices for obtaining nuclear fusion energy from high-temperature, ionized gas termed as Plasma. The successful operation of tokamak depends on its ability to confine plasma at the geometric center of vacuum vessel with sufficient stability. The quality of plasma discharge in ADITYA Tokamak is strongly related to the radial position of the plasma column in the vacuum vessel. If the plasma column approaches too near to the wall of vacuum vessel, it leads to minor or complete disruption of plasma. Hence the control of plasma position throughout the entire plasma discharge duration is a fundamental requirement. This paper describes Fuzzy Logic Controller (FLC) which is designed for radial plasma position control. This controller is tested and evaluated on the ADITYA RZIP control model. The performance of this FLC was compared with that of Proportional–Integral–Derivative (PID) Controller and the response was found to be faster and smoother. FLC was implemented on a Field Programmable Gate Array (FPGA) chip with the use of a Very High-Speed Integrated-Circuits Hardware Description-Language (VHDL).

  1. Rethinking logic logic in relation to mathematics, evolution, and method

    CERN Document Server

    Cellucci, Carlo

    2014-01-01

    This book examines the limitations of mathematical logic and proposes a new approach intended to overcome them. Formulates new rules of discovery, such as induction, analogy, generalization, specialization, metaphor, metonymy, definition and diagrams.

  2. Monitoring programme

    International Nuclear Information System (INIS)

    1994-06-01

    Her Majesty's Inspectorate of Pollution's 1992 report on its programme of monitoring radioactive substances is presented. Site operators' returns are verified and the report provides independent data on the environmental impact of authorized disposal of radioactive wastes. Radiation doses which may have been received by members of the public, fall well below the International Commission for Radiological Protection's (ICRP) recommended annual doses. (UK)

  3. The conditional in quantum logic

    International Nuclear Information System (INIS)

    Hardegree, G.M.

    1976-01-01

    In this article it is argued that orthodox quantum logic, which is represented by the lattice of projections on Hilbert space, does in fact admit an operation which possesses the essential properties of a material conditional. It is proposed that this connective can be interpreted as a Stalnaker (counter factual) conditional, where the nearness ordering among 'worlds' (in this case, QM pure states) derives in a natural way from the Hilbert space inner-product metric. It is a characteristic of the quantum logic conditional that the law of modus ponens is equivalent to the orthomodular law of conventional quantum logic. (B.R.H.)

  4. Handling Pressures of Community Logic

    DEFF Research Database (Denmark)

    Minbaeva, Dana; Hotho, Jasper; Muratbekova-Touron, Maral

    2013-01-01

    The paper aims at investigating how in pluralistic societies, such as emerging economies and countries in transition, organizational decision-makers respond to pressures of community logics in non-community settings, such as the work place. We theorize that in non-community settings, social...... relations and interactions with community members can act as social cues that induce and expose individuals to community logics. We subsequently propose that properties of these relations – immediacy and relatedness - will affect individual response strategies towards community logics. We test these ideas...... with an experimental vignette study of the effects of clan and kinship ties on recruitment and selection decisions in Kazakhstan, followed by qualitative interviews....

  5. Miniaturization of Josephson logic circuits

    International Nuclear Information System (INIS)

    Ko, H.; Van Duzer, T.

    1985-01-01

    The performances of Current Injection Logic (CIL) and Resistor Coupled Josephson Logic (RCJL) have been evaluated for minimum features sizes ranging from 5 μm to 0.2 μm. The logic delay is limited to about 10 ps for both the CIL AND gate and the RCJL OR gate biased at 70% of maximum bias current. The maximum circuit count on an 6.35 x 6.35 chip is 13,000 for CIL gates and 20,000 for RCJL gates. Some suggestions are given for further improvements

  6. Nanoelectromechanical resonator for logic operations

    KAUST Repository

    Kazmi, Syed N. R.

    2017-08-29

    We report an electro-thermally tunable in-plane doubly-clamped nanoelectromechanical resonator capable of dynamically performing NOR, NOT, XNOR, XOR, and AND logic operations. Toward this, a silicon based resonator is fabricated using standard e-beam lithography and surface nanomachining of a highly conductive device layer of a silicon-on-insulator (SOI) wafer. The performance of this logic device is examined at elevated temperatures, ranging from 25 °C to 85 °C, demonstrating its resilience for most of the logic operations; thereby paving the way towards nano-elements-based mechanical computing.

  7. Formalized Epistemology, Logic, and Grammar

    Science.gov (United States)

    Bitbol, Michel

    The task of a formal epistemology is defined. It appears that a formal epistemology must be a generalization of "logic" in the sense of Wittgenstein's Tractatus. The generalization is required because, whereas logic presupposes a strict relation between activity and language, this relation may be broken in some domains of experimental enquiry (e.g., in microscopic physics). However, a formal epistemology should also retain a major feature of Wittgenstein's "logic": It must not be a discourse about scientific knowledge, but rather a way of making manifest the structures usually implicit in knowledge-gaining activity. This strategy is applied to the formalism of quantum mechanics.

  8. CMOS gate array characterization procedures

    Science.gov (United States)

    Spratt, James P.

    1993-09-01

    Present procedures are inadequate for characterizing the radiation hardness of gate array product lines prior to personalization because the selection of circuits to be used, from among all those available in the manufacturer's circuit library, is usually uncontrolled. (Some circuits are fundamentally more radiation resistant than others.) In such cases, differences in hardness can result between different designs of the same logic function. Hardness also varies because many gate arrays feature large custom-designed megacells (e.g., microprocessors and random access memories-MicroP's and RAM's). As a result, different product lines cannot be compared equally. A characterization strategy is needed, along with standardized test vehicle(s), methodology, and conditions, so that users can make informed judgments on which gate arrays are best suited for their needs. The program described developed preferred procedures for the radiation characterization of gate arrays, including a gate array evaluation test vehicle, featuring a canary circuit, designed to define the speed versus hardness envelope of the gate array. A multiplier was chosen for this role, and a baseline multiplier architecture is suggested that could be incorporated into an existing standard evaluation circuit chip.

  9. Logic qualification of FPGA-based safety-related I and C systems

    International Nuclear Information System (INIS)

    Hayashi, Toshifumi; Oda, Naotaka; Ito, Toshiaki; Miyazaki, Tadashi; Haren, Yasuhiko

    2009-01-01

    We established a logic qualification method for FPGA-Based I and C safety-related use in Nuclear Power Plants Systems. The FPGA is a programmable logic device and has advantages that the programming is rigorous, simple verifiable, and the technology is stable. However, logic qualification of FPGA had been an issue to be solved when it is used in the safety-related systems, because FPGA is relatively new technology for the nuclear power industry. We employed a software-life cycle approach, because its development process is similar to that of conventional computer-based systems. There are some differences between the FPGA-Based systems and the computer-based systems in the implementation and integration of logic. We examined the FPGA logic implementation and integration process to identify any FPGA-Based system specific hazards. The identified hazards are (1) small logic errors, (2) timing errors, (3) logic synthesis errors, (4) place and route errors, and (5) logic embedding errors. We took the appropriate countermeasures to mitigate these hazards, and employed this logic qualification method in the qualification of the Power Range Monitor System for BWR Power Plants. (author)

  10. electrode array

    African Journals Online (AJOL)

    PROF EKWUEME

    A geoelectric investigation employing vertical electrical soundings (VES) using the Ajayi - Makinde Two-Electrode array and the ... arrangements used in electrical D.C. resistivity survey. These include ..... Refraction Tomography to Study the.

  11. Decision logics in radiotherapy

    International Nuclear Information System (INIS)

    Gauwerky, F.

    1979-01-01

    Decisions in planning procedures can generally, at least for beam therapy to deep seated tumors, be based on a self-consistent system of criteria of optimization, namely: 1. The absorbed dose to the target volume must be applied as uniformly as possible. 2. Absorbed doses to organs (volumes) at risk must be as low as possible, at least below an accepted limit. 3. Radiation effects to outside volumes must be kept as low as possible. Whereas these criteria, as being reduced to the simplest possible requirements, have to be regarded as the stable elements, the radiotherapy parameters, such as geometric arrangements, special techniques, absorbed dose contributions to reference points or systems, have to be taken as the variables within decision processes. The properties of the criteria which have widely proved to be valuable in routine clinical practice, have been investigated in relation to the theoretical system of axioms as it is e.g. offered by Karl Popper's general logics of scientific research. An axiomatic system, as it is demanded (after Popper) must be a) free of discrepancies, i.e. self-consistent (not any sentence can be derived), b) independent, that is, one axiom cannot be derived from another one within the system, c) sufficient for deduction of statements needed, d) necessary, that is complete. All these requirements are fitting also to the offered system of radiotherapy optimization criteria. It has been demonstrated, that Popper's axiomatic system can be regarded as to be the general case for all scientific fields of application, the set of optimization criteria being a special system for radiation therapy, which would have been derivable from Popper's theory. Also practical use could be demonstrated. (orig./ORU) [de

  12. Quantum supports and modal logic

    International Nuclear Information System (INIS)

    Svetlichny, G.

    1986-01-01

    Recently Foulis, Piron, and Randall introduced a new interpretation of empirical and quantum logics which substitute for the notion of a probabilistic weight a combinatorial notion called a support. The informal use of the notion of ''possible outcomes of experiments'' suggests that this interpretation can be related to corresponding formal notions as treated by modal logic. The purpose of this paper is to prove that in fact supports are in one-to-one correspondence with the sets of possibly true elementary propositions in Kripke models of a set of modal formulas associated to the empirical or quantum logic. This hopefully provides a sufficiently detailed link between the two rather distinct logical systems to shed useful light on both

  13. Classical Limit and Quantum Logic

    Science.gov (United States)

    Losada, Marcelo; Fortin, Sebastian; Holik, Federico

    2018-02-01

    The analysis of the classical limit of quantum mechanics usually focuses on the state of the system. The general idea is to explain the disappearance of the interference terms of quantum states appealing to the decoherence process induced by the environment. However, in these approaches it is not explained how the structure of quantum properties becomes classical. In this paper, we consider the classical limit from a different perspective. We consider the set of properties of a quantum system and we study the quantum-to-classical transition of its logical structure. The aim is to open the door to a new study based on dynamical logics, that is, logics that change over time. In particular, we appeal to the notion of hybrid logics to describe semiclassical systems. Moreover, we consider systems with many characteristic decoherence times, whose sublattices of properties become distributive at different times.

  14. Logical Theories for Agent Introspection

    DEFF Research Database (Denmark)

    Bolander, Thomas

    2004-01-01

    Artificial intelligence systems (agents) generally have models of the environments they inhabit which they use for representing facts, for reasoning about these facts and for planning actions. Much intelligent behaviour seems to involve an ability to model not only one's external environment...... by self-reference. In the standard approach taken in artificial intelligence, the model that an agent has of its environment is represented as a set of beliefs. These beliefs are expressed as logical formulas within a formal, logical theory. When the logical theory is expressive enough to allow...... introspective reasoning, the presence of self-reference causes the theory to be prone to inconsistency. The challenge therefore becomes to construct logical theories supporting introspective reasoning while at the same time ensuring that consistency is retained. In the thesis, we meet this challenge by devising...

  15. Dependence logic theory and applications

    CERN Document Server

    Kontinen, Juha; Väänänen, Jouko; Vollmer, Heribert

    2016-01-01

    In this volume, different aspects of logics for dependence and independence are discussed, including both the logical and computational aspects of dependence logic, and also applications in a number of areas, such as statistics, social choice theory, databases, and computer security. The contributing authors represent leading experts in this relatively new field, each of whom was invited to write a chapter based on talks given at seminars held at the Schloss Dagstuhl Leibniz Center for Informatics in Wadern, Germany (in February 2013 and June 2015) and an Academy Colloquium at the Royal Netherlands Academy of Arts and Sciences (March 2014). Altogether, these chapters provide the most up-to-date look at this developing and highly interdisciplinary field and will be of interest to a broad group of logicians, mathematicians, statisticians, philosophers, and scientists. Topics covered include a comprehensive survey of many propositional, modal, and first-order variants of dependence logic; new results concerning ...

  16. Nanoelectromechanical resonator for logic operations

    KAUST Repository

    Kazmi, Syed N. R.; Hafiz, Md A. Al; Chappanda, Karumbaiah N.; Ilyas, Saad; Holguin, Jorge; Da Costa, Pedro M. F. J.; Younis, Mohammad I.

    2017-01-01

    We report an electro-thermally tunable in-plane doubly-clamped nanoelectromechanical resonator capable of dynamically performing NOR, NOT, XNOR, XOR, and AND logic operations. Toward this, a silicon based resonator is fabricated using standard e

  17. Block QCA Fault-Tolerant Logic Gates

    Science.gov (United States)

    Firjany, Amir; Toomarian, Nikzad; Modarres, Katayoon

    2003-01-01

    Suitably patterned arrays (blocks) of quantum-dot cellular automata (QCA) have been proposed as fault-tolerant universal logic gates. These block QCA gates could be used to realize the potential of QCA for further miniaturization, reduction of power consumption, increase in switching speed, and increased degree of integration of very-large-scale integrated (VLSI) electronic circuits. The limitations of conventional VLSI circuitry, the basic principle of operation of QCA, and the potential advantages of QCA-based VLSI circuitry were described in several NASA Tech Briefs articles, namely Implementing Permutation Matrices by Use of Quantum Dots (NPO-20801), Vol. 25, No. 10 (October 2001), page 42; Compact Interconnection Networks Based on Quantum Dots (NPO-20855) Vol. 27, No. 1 (January 2003), page 32; Bit-Serial Adder Based on Quantum Dots (NPO-20869), Vol. 27, No. 1 (January 2003), page 35; and Hybrid VLSI/QCA Architecture for Computing FFTs (NPO-20923), which follows this article. To recapitulate the principle of operation (greatly oversimplified because of the limitation on space available for this article): A quantum-dot cellular automata contains four quantum dots positioned at or between the corners of a square cell. The cell contains two extra mobile electrons that can tunnel (in the quantummechanical sense) between neighboring dots within the cell. The Coulomb repulsion between the two electrons tends to make them occupy antipodal dots in the cell. For an isolated cell, there are two energetically equivalent arrangements (denoted polarization states) of the extra electrons. The cell polarization is used to encode binary information. Because the polarization of a nonisolated cell depends on Coulomb-repulsion interactions with neighboring cells, universal logic gates and binary wires could be constructed, in principle, by arraying QCA of suitable design in suitable patterns. Heretofore, researchers have recognized two major obstacles to realization of QCA

  18. Empirical logic and quantum mechanics

    International Nuclear Information System (INIS)

    Foulis, D.J.; Randall, C.H.

    1976-01-01

    This article discusses some of the basic notions of quantum physics within the more general framework of operational statistics and empirical logic (as developed in Foulis and Randall, 1972, and Randall and Foulis, 1973). Empirical logic is a formal mathematical system in which the notion of an operation is primitive and undefined; all other concepts are rigorously defined in terms of such operations (which are presumed to correspond to actual physical procedures). (Auth.)

  19. Logical operations using phenyl ring

    Science.gov (United States)

    Patra, Moumita; Maiti, Santanu K.

    2018-02-01

    Exploiting the effects of quantum interference we put forward an idea of designing three primary logic gates, OR, AND and NOT, using a benzene molecule. Under a specific molecule-lead interface geometry, anti-resonant states appear which play the crucial role for AND and NOT operations, while for OR gate no such states are required. Our analysis leads to a possibility of designing logic gates using simple molecular structure which might be significant in the area of molecular electronics.

  20. Observation Predicates in Flow Logic

    DEFF Research Database (Denmark)

    Nielson, Flemming; Nielson, Hanne Riis; Sun, Hongyan

    2003-01-01

    in such a way that the hard constraints are satisfi ed exactly when the observation predicates report no violations. The development is carried out in a large fragment of a first order logic with negation and also takes care of the transformations necessary in order to adhere to the stratification restrictions...... inherent in Alternation-free Least Fixed Point Logic and similar formalisms such as Datalog....