Pixel detector readout chip

CERN Multimedia

1991-01-01

Close-up of a pixel detector readout chip. The photograph shows an aera of 1 mm x 2 mm containing 12 separate readout channels. The entire chip contains 1000 readout channels (around 80 000 transistors) covering a sensitive area of 8 mm x 5 mm. The chip has been mounted on a silicon detector to detect high energy particles.

Pixel readout ASIC for an APD based 2D X-ray hybrid pixel detector with sub-nanosecond resolution

Energy Technology Data Exchange (ETDEWEB)

Thil, Ch., E-mail: christophe.thil@ziti.uni-heidelberg.d [Heidelberg University, Institute of Computer Engineering, B6, 26, 68161 Mannheim (Germany); Baron, A.Q.R. [RIKEN SPring-8 Center, 1-1-1 Kouto, Sayo-cho, Sayo-gun, Hyogo 679-5148 (Japan); Fajardo, P. [ESRF, Polygone Scientifique Louis Neel, 6, rue Jules Horowitz, 38000 Grenoble (France); Fischer, P. [Heidelberg University, Institute of Computer Engineering, B6, 26, 68161 Mannheim (Germany); Graafsma, H. [DESY, Notkestrasse 85, 22607 Hamburg (Germany); Rueffer, R. [ESRF, Polygone Scientifique Louis Neel, 6, rue Jules Horowitz, 38000 Grenoble (France)

2011-02-01

The fast response and the short recovery time of avalanche photodiodes (APDs) in linear mode make those devices ideal for direct X-ray detection in applications requiring high time resolution or counting rate. In order to provide position sensitivity, the XNAP project aims at creating a hybrid pixel detector with nanosecond time resolution based on a monolithic APD sensor array with 32 x32 pixels covering about 1 cm{sup 2} active area. The readout is implemented in a pixelated front-end ASIC suited for the readout of such arrays, matched to pixels of 280{mu}mx280{mu}m size. Every single channel features a fast transimpedance amplifier, a discriminator with locally adjustable threshold and two counters with high dynamic range and counting speed able to accumulate X-ray hits with no readout dead time. Additionally, the detector can be operated in list mode by time-stamping every single event with sub-nanosecond resolution. In a first phase of the project, a 4x4 pixel test module is built to validate the conceptual design of the detector. The XNAP project is briefly presented and the performance of the readout ASIC is discussed.

Pixel readout ASIC for an APD based 2D X-ray hybrid pixel detector with sub-nanosecond resolution

International Nuclear Information System (INIS)

Thil, Ch.; Baron, A.Q.R.; Fajardo, P.; Fischer, P.; Graafsma, H.; Rueffer, R.

2011-01-01

The fast response and the short recovery time of avalanche photodiodes (APDs) in linear mode make those devices ideal for direct X-ray detection in applications requiring high time resolution or counting rate. In order to provide position sensitivity, the XNAP project aims at creating a hybrid pixel detector with nanosecond time resolution based on a monolithic APD sensor array with 32 x32 pixels covering about 1 cm 2 active area. The readout is implemented in a pixelated front-end ASIC suited for the readout of such arrays, matched to pixels of 280μmx280μm size. Every single channel features a fast transimpedance amplifier, a discriminator with locally adjustable threshold and two counters with high dynamic range and counting speed able to accumulate X-ray hits with no readout dead time. Additionally, the detector can be operated in list mode by time-stamping every single event with sub-nanosecond resolution. In a first phase of the project, a 4x4 pixel test module is built to validate the conceptual design of the detector. The XNAP project is briefly presented and the performance of the readout ASIC is discussed.

High accuracy injection circuit for the calibration of a large pixel sensor matrix

International Nuclear Information System (INIS)

Quartieri, E.; Comotti, D.; Manghisoni, M.

2013-01-01

Semiconductor pixel detectors, for particle tracking and vertexing in high energy physics experiments as well as for X-ray imaging, in particular for synchrotron light sources and XFELs, require a large area sensor matrix. This work will discuss the design and the characterization of a high-linearity, low dispersion injection circuit to be used for pixel-level calibration of detector readout electronics in a large pixel sensor matrix. The circuit provides a useful tool for the characterization of the readout electronics of the pixel cell unit for both monolithic active pixel sensors and hybrid pixel detectors. In the latter case, the circuit allows for precise analogue test of the readout channel already at the chip level, when no sensor is connected. Moreover, it provides a simple means for calibration of readout electronics once the detector has been connected to the chip. Two injection techniques can be provided by the circuit: one for a charge sensitive amplification and the other for a transresistance readout channel. The aim of the paper is to describe the architecture and the design guidelines of the calibration circuit, which has been implemented in a 130 nm CMOS technology. Moreover, experimental results of the proposed injection circuit will be presented in terms of linearity and dispersion

Digital column readout architectures for hybrid pixel detector readout chips

International Nuclear Information System (INIS)

Poikela, T; Plosila, J; Westerlund, T; Buytaert, J; Campbell, M; Gaspari, M De; Llopart, X; Wyllie, K; Gromov, V; Kluit, R; Beuzekom, M van; Zappon, F; Zivkovic, V; Brezina, C; Desch, K; Fu, Y; Kruth, A

2014-01-01

In this paper, two digital column architectures suitable for sparse readout of data from a pixel matrix in trigger-less applications are presented. Each architecture reads out a pixel matrix of 256 x 256 pixels with a pixel pitch of 55 μm. The first architecture has been implemented in the Timepix3 chip, and this is presented together with initial measurements. Simulation results and measured data are compared. The second architecture has been designed for Velopix, a readout chip planned for the LHCb VELO upgrade. Unlike Timepix3, this has to be tolerant to radiation-induced single-event effects. Results from post-layout simulations are shown with the circuit architectures

Advanced pixel architectures for scientific image sensors

CERN Document Server

Coath, R; Godbeer, A; Wilson, M; Turchetta, R

2009-01-01

We present recent developments from two projects targeting advanced pixel architectures for scientific applications. Results are reported from FORTIS, a sensor demonstrating variants on a 4T pixel architecture. The variants include differences in pixel and diode size, the in-pixel source follower transistor size and the capacitance of the readout node to optimise for low noise and sensitivity to small amounts of charge. Results are also reported from TPAC, a complex pixel architecture with ~160 transistors per pixel. Both sensors were manufactured in the 0.18μm INMAPS process, which includes a special deep p-well layer and fabrication on a high resistivity epitaxial layer for improved charge collection efficiency.

Development and simulation results of a sparsification and readout circuit for wide pixel matrices

International Nuclear Information System (INIS)

Gabrielli, A.; Giorgi, F.; Morsani, F.; Villa, M.

2011-01-01

In future collider experiments, the increasing luminosity and centre of mass energy are rising challenging problems in the design of new inner tracking systems. In this context we develop high-efficiency readout architectures for large binary pixel matrices that are meant to cope with the high-stressing conditions foreseen in the innermost layers of a tracker [The SuperB Conceptual Design Report, INFN/AE-07/02, SLAC-R-856, LAL 07-15, Available online at: (http://www.pi.infn.it/SuperB)]. We model and design digital readout circuits to be integrated on VLSI ASICs. These architectures can be realized with different technology processes and sensors: they can be implemented on the same silicon sensor substrate of a CMOS MAPS devices (Monolithic Active Pixel Sensor), on the CMOS tier of a hybrid pixel sensor or in a 3D chip where the digital layer is stacked on the sensor and the analog layers [V. Re et al., Nuc. Instr. and Meth. in Phys. Res. A, (doi:10.1016/j.nima.2010.05.039)]. In the presented work, we consider a data-push architecture designed for a sensor matrix of an area of about 1.3 cm 2 with a pitch of 50 microns. The readout circuit tries to take great advantage of the high density of in-pixel digital logic allowed by vertical integration. We aim at sustaining a rate density of 100 Mtrack . s -1 . cm -2 with a temporal resolution below 1 μs. We show how this architecture can cope with these stressing conditions presenting the results of Monte Carlo simulations.

Development and simulation results of a sparsification and readout circuit for wide pixel matrices

Energy Technology Data Exchange (ETDEWEB)

Gabrielli, A.; Giorgi, F. [University and INFN of Bologna (Italy); Morsani, F. [University and INFN of Pisa (Italy); Villa, M. [University and INFN of Bologna (Italy)

2011-06-15

In future collider experiments, the increasing luminosity and centre of mass energy are rising challenging problems in the design of new inner tracking systems. In this context we develop high-efficiency readout architectures for large binary pixel matrices that are meant to cope with the high-stressing conditions foreseen in the innermost layers of a tracker [The SuperB Conceptual Design Report, INFN/AE-07/02, SLAC-R-856, LAL 07-15, Available online at: (http://www.pi.infn.it/SuperB)]. We model and design digital readout circuits to be integrated on VLSI ASICs. These architectures can be realized with different technology processes and sensors: they can be implemented on the same silicon sensor substrate of a CMOS MAPS devices (Monolithic Active Pixel Sensor), on the CMOS tier of a hybrid pixel sensor or in a 3D chip where the digital layer is stacked on the sensor and the analog layers [V. Re et al., Nuc. Instr. and Meth. in Phys. Res. A, (doi:10.1016/j.nima.2010.05.039)]. In the presented work, we consider a data-push architecture designed for a sensor matrix of an area of about 1.3 cm{sup 2} with a pitch of 50 microns. The readout circuit tries to take great advantage of the high density of in-pixel digital logic allowed by vertical integration. We aim at sustaining a rate density of 100 Mtrack . s{sup -1} . cm{sup -2} with a temporal resolution below 1 {mu}s. We show how this architecture can cope with these stressing conditions presenting the results of Monte Carlo simulations.

CMOS Active-Pixel Image Sensor With Simple Floating Gates

Science.gov (United States)

Fossum, Eric R.; Nakamura, Junichi; Kemeny, Sabrina E.

1996-01-01

Experimental complementary metal-oxide/semiconductor (CMOS) active-pixel image sensor integrated circuit features simple floating-gate structure, with metal-oxide/semiconductor field-effect transistor (MOSFET) as active circuit element in each pixel. Provides flexibility of readout modes, no kTC noise, and relatively simple structure suitable for high-density arrays. Features desirable for "smart sensor" applications.

The FE-I4 pixel readout integrated circuit

Energy Technology Data Exchange (ETDEWEB)

Garcia-Sciveres, M., E-mail: mgarcia-sciveres@bl.gov [Lawrence Berkeley National Laboratory, Berkeley, CA (United States); Arutinov, D.; Barbero, M. [University of Bonn, Bonn (Germany); Beccherle, R. [Istituto Nazionale di Fisica Nucleare Sezione di Genova, Genova (Italy); Dube, S.; Elledge, D. [Lawrence Berkeley National Laboratory, Berkeley, CA (United States); Fleury, J. [Laboratoire de l' Accelerateur Lineaire, Orsay (France); Fougeron, D.; Gensolen, F. [Centre de Physique des Particules de Marseille, Marseille (France); Gnani, D. [Lawrence Berkeley National Laboratory, Berkeley, CA (United States); Gromov, V. [Nationaal Instituut voor Subatomaire Fysica, Amsterdam (Netherlands); Hemperek, T.; Karagounis, M. [University of Bonn, Bonn (Germany); Kluit, R. [Nationaal Instituut voor Subatomaire Fysica, Amsterdam (Netherlands); Kruth, A. [University of Bonn, Bonn (Germany); Mekkaoui, A. [Lawrence Berkeley National Laboratory, Berkeley, CA (United States); Menouni, M. [Centre de Physique des Particules de Marseille, Marseille (France); Schipper, J.-D. [Nationaal Instituut voor Subatomaire Fysica, Amsterdam (Netherlands)

2011-04-21

A new pixel readout integrated circuit denominated FE-I4 is being designed to meet the requirements of ATLAS experiment upgrades. It will be the largest readout IC produced to date for particle physics applications, filling the maximum allowed reticle area. This will significantly reduce the cost of future hybrid pixel detectors. In addition, FE-I4 will have smaller pixels and higher rate capability than the present generation of LHC pixel detectors. Design features are described along with simulation and test results, including low power and high rate readout architecture, mixed signal design strategy, and yield hardening.

Status and perspectives of pixel sensors based on 3D vertical integration

CERN Document Server

Re, V

2014-01-01

This paper reviews the most recent developments of 3D integration in the field of silicon pixel sensors and readout integrated circuits. This technology may address the needs of future high energy physics and photon science experiments by increasing the electronic functional density in small pixel readout cells and by stacking various device layers based on different technologies, each optimized for a different function. Current efforts are aimed at improving the performance of both hybrid pixel detectors and of CMOS sensors. The status of these activities is discussed here, taking into account experimental results on 3D devices developed in the frame of the 3D-IC consortium. The paper also provides an overview of the ideas that are being currently devised for novel 3D vertically integrated pixel sensors.

Status and perspectives of pixel sensors based on 3D vertical integration

Energy Technology Data Exchange (ETDEWEB)

Re, Valerio [Università di Bergamo, Dipartimento di Ingegneria, Viale Marconi, 5, 24044 Dalmine (Italy); INFN, Sezione di Pavia, Via Bassi, 6, 27100 Pavia (Italy)

2014-11-21

This paper reviews the most recent developments of 3D integration in the field of silicon pixel sensors and readout integrated circuits. This technology may address the needs of future high energy physics and photon science experiments by increasing the electronic functional density in small pixel readout cells and by stacking various device layers based on different technologies, each optimized for a different function. Current efforts are aimed at improving the performance of both hybrid pixel detectors and of CMOS sensors. The status of these activities is discussed here, taking into account experimental results on 3D devices developed in the frame of the 3D-IC consortium. The paper also provides an overview of the ideas that are being currently devised for novel 3D vertically integrated pixel sensors. - Highlights: • 3D integration is a promising technology for pixel sensors in high energy physics. • Experimental results on two-layer 3D CMOS pixel sensors are presented. • The outcome of the first run from the 3D-IC consortium is discussed. • The AIDA network is studying via-last 3D integration of heterogeneous layers. • New ideas based on 3D vertically integrated pixels are being developed for HEP.

Status and perspectives of pixel sensors based on 3D vertical integration

International Nuclear Information System (INIS)

Re, Valerio

2014-01-01

This paper reviews the most recent developments of 3D integration in the field of silicon pixel sensors and readout integrated circuits. This technology may address the needs of future high energy physics and photon science experiments by increasing the electronic functional density in small pixel readout cells and by stacking various device layers based on different technologies, each optimized for a different function. Current efforts are aimed at improving the performance of both hybrid pixel detectors and of CMOS sensors. The status of these activities is discussed here, taking into account experimental results on 3D devices developed in the frame of the 3D-IC consortium. The paper also provides an overview of the ideas that are being currently devised for novel 3D vertically integrated pixel sensors. - Highlights: • 3D integration is a promising technology for pixel sensors in high energy physics. • Experimental results on two-layer 3D CMOS pixel sensors are presented. • The outcome of the first run from the 3D-IC consortium is discussed. • The AIDA network is studying via-last 3D integration of heterogeneous layers. • New ideas based on 3D vertically integrated pixels are being developed for HEP

Design and Performance of the CMS Pixel Detector Readout Chip

CERN Document Server

Kästli, H C; Erdmann, W; Hörmann, C; Horisberger, R P; Kotlinski, D; Meier, B; Hoermann, Ch.

2006-01-01

The readout chip for the CMS pixel detector has to deal with an enormous data rate. On-chip zero suppression is inevitable and hit data must be buffered locally during the latency of the first level trigger. Dead-time must be kept at a minimum. It is dominated by contributions coming from the readout. To keep it low an analog readout scheme has been adopted where pixel addresses are analog coded. We present the architecture of the final CMS pixel detector readout chip with special emphasis on the analog readout chain. Measurements of its performance are discussed.

X-ray imaging characterization of active edge silicon pixel sensors

International Nuclear Information System (INIS)

Ponchut, C; Ruat, M; Kalliopuska, J

2014-01-01

The aim of this work was the experimental characterization of edge effects in active-edge silicon pixel sensors, in the frame of X-ray pixel detectors developments for synchrotron experiments. We produced a set of active edge pixel sensors with 300 to 500 μm thickness, edge widths ranging from 100 μm to 150 μm, and n or p pixel contact types. The sensors with 256 × 256 pixels and 55 × 55 μm 2 pixel pitch were then bump-bonded to Timepix readout chips for X-ray imaging measurements. The reduced edge widths makes the edge pixels more sensitive to the electrical field distribution at the sensor boundaries. We characterized this effect by mapping the spatial response of the sensor edges with a finely focused X-ray synchrotron beam. One of the samples showed a distortion-free response on all four edges, whereas others showed variable degrees of distortions extending at maximum to 300 micron from the sensor edge. An application of active edge pixel sensors to coherent diffraction imaging with synchrotron beams is described

New results on diamond pixel sensors using ATLAS frontend electronics

International Nuclear Information System (INIS)

Keil, M.; Adam, W.; Berdermann, E.; Bergonzo, P.; Boer, W. de; Bogani, F.; Borchi, E.; Brambilla, A.; Bruzzi, M.; Colledani, C.; Conway, J.; D'Angelo, P.; Dabrowski, W.; Delpierre, P.; Dulinski, W.; Doroshenko, J.; Doucet, M.; Eijk, B. van; Fallou, A.; Fischer, P.; Fizzotti, F.; Kania, D.; Gan, K.K.; Grigoriev, E.; Hallewell, G.; Han, S.; Hartjes, F.; Hrubec, J.; Husson, D.; Kagan, H.; Kaplon, J.; Kass, R.; Knoepfle, K.T.; Koeth, T.; Krammer, M.; Logiudice, A.; Mac Lynne, L.; Manfredotti, C.; Meier, D.; Menichelli, D.; Meuser, S.; Mishina, M.; Moroni, L.; Noomen, J.; Oh, A.; Pan, L.S.; Pernicka, M.; Perera, L.; Riester, J.L.; Roe, S.; Rudge, A.; Russ, J.; Sala, S.; Sampietro, M.; Schnetzer, S.; Sciortino, S.; Stelzer, H.; Stone, R.; Suter, B.; Trischuk, W.; Tromson, D.; Vittone, E.; Weilhammer, P.; Wermes, N.; Wetstein, M.; Zeuner, W.; Zoeller, M.

2003-01-01

Diamond is a promising sensor material for future collider experiments due to its radiation hardness. Diamond pixel sensors have been bump bonded to an ATLAS pixel readout chip using PbSn solder bumps. Single chip devices have been characterised by lab measurements and in a high-energy pion beam at CERN. Results on charge collection, spatial resolution, efficiency and the charge carrier lifetime are presented

New results on diamond pixel sensors using ATLAS frontend electronics

CERN Document Server

Keil, Markus; Berdermann, E; Bergonzo, P; de Boer, Wim; Bogani, F; Borchi, E; Brambilla, A; Bruzzi, Mara; Colledani, C; Conway, J; D'Angelo, P; Dabrowski, W; Delpierre, P A; Dulinski, W

2003-01-01

Diamond is a promising sensor material for future collider experiments due to its radiation hardness. Diamond pixel sensors have been bump bonded to an ATLAS pixel readout chip using PbSn solder bumps. Single chip devices have been characterised by lab measurements and in a high-energy pion beam at CERN. Results on charge collection, spatial resolution, efficiency and the charge carrier lifetime are presented.

New results on diamond pixel sensors using ATLAS frontend electronics

Energy Technology Data Exchange (ETDEWEB)

Keil, M. E-mail: markus.keil@cern.ch; Adam, W.; Berdermann, E.; Bergonzo, P.; Boer, W. de; Bogani, F.; Borchi, E.; Brambilla, A.; Bruzzi, M.; Colledani, C.; Conway, J.; D' Angelo, P.; Dabrowski, W.; Delpierre, P.; Dulinski, W.; Doroshenko, J.; Doucet, M.; Eijk, B. van; Fallou, A.; Fischer, P.; Fizzotti, F.; Kania, D.; Gan, K.K.; Grigoriev, E.; Hallewell, G.; Han, S.; Hartjes, F.; Hrubec, J.; Husson, D.; Kagan, H.; Kaplon, J.; Kass, R.; Knoepfle, K.T.; Koeth, T.; Krammer, M.; Logiudice, A.; Mac Lynne, L.; Manfredotti, C.; Meier, D.; Menichelli, D.; Meuser, S.; Mishina, M.; Moroni, L.; Noomen, J.; Oh, A.; Pan, L.S.; Pernicka, M.; Perera, L.; Riester, J.L.; Roe, S.; Rudge, A.; Russ, J.; Sala, S.; Sampietro, M.; Schnetzer, S.; Sciortino, S.; Stelzer, H.; Stone, R.; Suter, B.; Trischuk, W.; Tromson, D.; Vittone, E.; Weilhammer, P.; Wermes, N.; Wetstein, M.; Zeuner, W.; Zoeller, M

2003-03-21

Diamond is a promising sensor material for future collider experiments due to its radiation hardness. Diamond pixel sensors have been bump bonded to an ATLAS pixel readout chip using PbSn solder bumps. Single chip devices have been characterised by lab measurements and in a high-energy pion beam at CERN. Results on charge collection, spatial resolution, efficiency and the charge carrier lifetime are presented.

New results on diamond pixel sensors using ATLAS frontend electronics

Science.gov (United States)

Keil, M.; Adam, W.; Berdermann, E.; Bergonzo, P.; de Boer, W.; Bogani, F.; Borchi, E.; Brambilla, A.; Bruzzi, M.; Colledani, C.; Conway, J.; D'Angelo, P.; Dabrowski, W.; Delpierre, P.; Dulinski, W.; Doroshenko, J.; Doucet, M.; van Eijk, B.; Fallou, A.; Fischer, P.; Fizzotti, F.; Kania, D.; Gan, K. K.; Grigoriev, E.; Hallewell, G.; Han, S.; Hartjes, F.; Hrubec, J.; Husson, D.; Kagan, H.; Kaplon, J.; Kass, R.; Knöpfle, K. T.; Koeth, T.; Krammer, M.; Logiudice, A.; mac Lynne, L.; Manfredotti, C.; Meier, D.; Menichelli, D.; Meuser, S.; Mishina, M.; Moroni, L.; Noomen, J.; Oh, A.; Pan, L. S.; Pernicka, M.; Perera, L.; Riester, J. L.; Roe, S.; Rudge, A.; Russ, J.; Sala, S.; Sampietro, M.; Schnetzer, S.; Sciortino, S.; Stelzer, H.; Stone, R.; Suter, B.; Trischuk, W.; Tromson, D.; Vittone, E.; Weilhammer, P.; Wermes, N.; Wetstein, M.; Zeuner, W.; Zoeller, M.

2003-03-01

Diamond is a promising sensor material for future collider experiments due to its radiation hardness. Diamond pixel sensors have been bump bonded to an ATLAS pixel readout chip using PbSn solder bumps. Single chip devices have been characterised by lab measurements and in a high-energy pion beam at CERN. Results on charge collection, spatial resolution, efficiency and the charge carrier lifetime are presented.

Development of the Continuous Acquisition Pixel (CAP) sensor for high luminosity lepton colliders

International Nuclear Information System (INIS)

Varner, G.; Aihara, H.; Barbero, M.; Bozek, A.; Browder, T.; Hazumi, M.; Kennedy, J.; Martin, E.; Mueller, J.; Olsen, S.; Palka, H.; Rosen, M.; Ruckman, L.; Stanic, S.; Trabelsi, K.; Tsuboyama, T.; Uchida, K.; Yang, Q.; Yarema, R.

2006-01-01

A future higher luminosity B-factory detector and concept study detectors for the proposed International Linear Collider require precision vertex reconstruction while coping with high track densities and radiation exposures. Compared with current silicon strip and hybrid pixels, a significant reduction in the overall detector material thickness is needed to achieve the desired vertex resolution. Considerable progress in the development of thin CMOS-based Monolithic Active Pixel Sensors (MAPS) in recent years makes them a viable technology option and feasibility studies are being actively pursued. The most serious concerns are their radiation hardness and their readout speed. To address these, several prototypes denoted as the Continuous Acquisition Pixel (CAP) sensors have been developed and tested. The latest of the CAP sensor prototypes is CAP3, designed in the TSMC 0.25μm process with a 5-deep Correlated Double Sample (CDS) pair pipeline in each pixel. A setup with several CAP3 sensors is under evaluation to assess the performance of a full-scale pixel readout system running at realistic readout speed. Given the similarity in the occupancy numbers and hit throughput requirements, per unit area, between a Belle vertex detector upgradation and the requirements for a future ILC pixel detector, this effort can be considered a small-scale functioning prototype for such a future system. The results and plans for the next stages of R and D towards a full Belle Pixel Vertex Detector (PVD) are presented

Performance of active edge pixel sensors

Science.gov (United States)

Bomben, M.; Ducourthial, A.; Bagolini, A.; Boscardin, M.; Bosisio, L.; Calderini, G.; D'Eramo, L.; Giacomini, G.; Marchiori, G.; Zorzi, N.; Rummler, A.; Weingarten, J.

2017-05-01

To cope with the High Luminosity LHC harsh conditions, the ATLAS inner tracker has to be upgraded to meet requirements in terms of radiation hardness, pile up and geometrical acceptance. The active edge technology allows to reduce the insensitive area at the border of the sensor thanks to an ion etched trench which avoids the crystal damage produced by the standard mechanical dicing process. Thin planar n-on-p pixel sensors with active edge have been designed and produced by LPNHE and FBK foundry. Two detector module prototypes, consisting of pixel sensors connected to FE-I4B readout chips, have been tested with beams at CERN and DESY. In this paper the performance of these modules are reported. In particular the lateral extension of the detection volume, beyond the pixel region, is investigated and the results show high hit efficiency also at the detector edge, even in presence of guard rings.

CMOS monolithic active pixel sensors for high energy physics

Energy Technology Data Exchange (ETDEWEB)

Snoeys, W., E-mail: walter.snoeys@cern.ch

2014-11-21

Monolithic pixel detectors integrating sensor matrix and readout in one piece of silicon are only now starting to make their way into high energy physics. Two major requirements are radiation tolerance and low power consumption. For the most extreme radiation levels, signal charge has to be collected by drift from a depletion layer onto a designated collection electrode without losing the signal charge elsewhere in the in-pixel circuit. Low power consumption requires an optimization of Q/C, the ratio of the collected signal charge over the input capacitance [1]. Some solutions to combine sufficient Q/C and collection by drift require exotic fabrication steps. More conventional solutions up to now require a simple in-pixel readout circuit. Both high voltage CMOS technologies and Monolithic Active Pixel Sensors (MAPS) technologies with high resistivity epitaxial layers offer high voltage diodes. The choice between the two is not fundamental but more a question of how much depletion can be reached and also of availability and cost. This paper tries to give an overview.

Sensor Development for the CMS Pixel Detector

CERN Document Server

Rohe, T; Chiochia, V; Cremaldi, L M; Cucciarelli, S; Dorkhov, A; Konecki, M; Prokofiev, K; Regenfus, C; Sanders, D A; Son, S; Speer, T; Swartz, M

2003-01-01

This paper reports on a current R&D activity for the sensor part of the CMS pixel detector. Devices featuring several design and technology options have been irradiated up to a proton fluence of 1E15 (1MeV Neutron)/cm**2 at the CERN PS. Afterwards they have been bump bonded to unirradiated readout chips. The chip allows a non zero suppressed full analogue readout and therefore a good characterization of the sensors in terms of noise and charge collection properties. The samples have been tested using high energy pions in the H2 beam line of the CERN SPS in June and September 2003. The results of this test beam are presented and the differences between the sensor options are discussed.

CMOS Pixel Sensors for High Precision Beam Telescopes and Vertex Detectors

International Nuclear Information System (INIS)

Masi, R. de; Baudot, J.; Fontaine, J.-Ch.

2009-01-01

CMOS sensors of the MIMOSA (standing for Minimum Ionising particle MOS Active pixel sensor) series are developed at IPHC since a decade and have ended up with full scale devices used in beam telescopes and in demonstrators of future vertex detectors. The sensors deliver analogue, unfiltered, signals and are therefore limited to read-out frequencies of ∼ 1 kframe/s. Since a few years, a fast architecture is being developed in collaboration with IRFU, which aims to speed up the read-out by 1-2 orders of magnitude. The first full scale sensor based on this architecture was fabricated recently and is being tested. Made of 660,000 pixels (18 μm pitch) covering an active area of ∼ 2 cm 2 , it delivers zero-suppressed binary signals, which allow running at ∼ 10 kframes/s. It will equip the beam telescope of the E.U. project EUDET and serve as a forerunner of the sensor equipping the 2 layers of the PIXEL detector of the STAR experiment at RHIC. The contribution to the conference will overview the main features and test results of this pioneering sensor. It will next describe its evolution towards read-out frequencies approaching 100 kframes/s, as required for the vertex detectors of the CBM experiment at FAIR and at the ILC. Finally, the issue of radiation tolerance will be addressed, in the context of a newly available CMOS process using a depleted substrate. A prototype sensor was fabricated in a such CMOS process. The talk will summarise beam test results showing, for the first time, that fluences of 10 14 n eq /cm 2 may be tolerable for CMOS sensors. Overall, the talk provides an overview of the status and plans of CMOS pixel sensors at the frontier of their achievements and outreach. (author)

Characterization of active CMOS sensors for capacitively coupled pixel detectors

Energy Technology Data Exchange (ETDEWEB)

Hirono, Toko; Gonella, Laura; Janssen, Jens; Hemperek, Tomasz; Huegging, Fabian; Krueger, Hans; Wermes, Norbert [Institute of Physics, University of Bonn (Germany); Peric, Ivan [Institut fuer Prozessdatenverarbeitung und Elektronik, Karlsruher Institut fuer Technologie, Karlsruhe (Germany)

2015-07-01

Active CMOS pixel sensor is one of the most attractive candidates for detectors of upcoming particle physics experiments. In contrast to conventional sensors of hybrid detectors, signal processing circuit can be integrated in the active CMOS sensor. The characterization and optimization of the pixel circuit are indispensable to obtain a good performance from the sensors. The prototype chips of the active CMOS sensor were fabricated in the AMS 180nm and L-Foundry 150 nm CMOS processes, respectively a high voltage and high resistivity technology. Both chips have a charge sensitive amplifier and a comparator in each pixel. The chips are designed to be glued to the FEI4 pixel readout chip. The signals from 3 pixels of the prototype chips are capacitively coupled to the FEI4 input pads. We have performed lab tests and test beams to characterize the prototypes. In this presentation, the measurement results of the active CMOS prototype sensors are shown.

JPL CMOS Active Pixel Sensor Technology

Science.gov (United States)

Fossum, E. R.

1995-01-01

This paper will present the JPL-developed complementary metal- oxide-semiconductor (CMOS) active pixel sensor (APS) technology. The CMOS APS has achieved performance comparable to charge coupled devices, yet features ultra low power operation, random access readout, on-chip timing and control, and on-chip analog to digital conversion. Previously published open literature will be reviewed.

Fast readout logic interfacing a 256-pixel matrix of a dual-layer 3D device

International Nuclear Information System (INIS)

Gabrielli, A; Giorgi, F; Villa, M; Morsani, F

2010-01-01

A prototype of a 3D ASIC built up of a fast readout architecture, with sparsification capabilities, which interfaces with a matrix of a 256-pixel sensor, was recently submitted. The chosen technology is CMOS Chartered 130 nm as it is compatible with the Tezzaron facility to interconnect face-to-face two silicon wafers allowing for a vertical integration structure by means of through-silicon-vias. Particularly, the readout logic uses one layer that will be stacked on a sensor layer at the end of the fabrication process.

Fast readout logic interfacing a 256-pixel matrix of a dual-layer 3D device

Energy Technology Data Exchange (ETDEWEB)

Gabrielli, A; Giorgi, F; Villa, M [INFN-Bologna and Physics Department, University of Bologna, Viale Berti Pichat, 6/2, 40127, Bologna (Italy); Morsani, F, E-mail: alessandro.gabrielli@bo.infn.i [INFN-Pisa and University of Pisa, Largo B. Pontecorvo, 3, 56127, Pisa (Italy)

2010-07-15

A prototype of a 3D ASIC built up of a fast readout architecture, with sparsification capabilities, which interfaces with a matrix of a 256-pixel sensor, was recently submitted. The chosen technology is CMOS Chartered 130 nm as it is compatible with the Tezzaron facility to interconnect face-to-face two silicon wafers allowing for a vertical integration structure by means of through-silicon-vias. Particularly, the readout logic uses one layer that will be stacked on a sensor layer at the end of the fabrication process.

Planar sensors for the upgrade of the CMS pixel detector

International Nuclear Information System (INIS)

Rohe, T.; Bean, A.; Radicci, V.; Sibille, J.

2011-01-01

A replacement of the present CMS pixel detector with a better performing light weight four-layer system is foreseen in 2016. In the lifetime of this new system the LHC will reach and exceed its nominal luminosity of 10 34 cm -2 s -1 . Therefore the radiation hardness of all parts of the pixel system has to be reviewed. For the construction of the much larger four-layer pixel system, the replacement of the present double sided sensors by much cheaper single sided ones is considered. However, the construction of pixel modules with such sensors is challenging due to the small geometrical distance of the sensor high voltage and the ground of the readout electronics. This small distance limits the sensor bias to about 500 V in the tested samples.

A compact readout system for multi-pixel hybrid photodiodes

International Nuclear Information System (INIS)

Datema, C.P.; Meng, L.J.; Ramsden, D.

1999-01-01

Although the first Multi-pixel Hybrid Photodiode (M-HPD) was developed in the early 1990s by Delft Electronic Products, the main obstacle to its application has been the lack of availability of a compact read-out system. A fast, parallel readout system has been constructed for use with the earlier 25-pixel tube with High-energy Physics applications in mind. The excellent properties of the recently developed multi-pixel hybrid photodiodes (M-HPD) will be easier to exploit following the development of the new hybrid read-out circuits described in this paper. This system will enable all of the required read-out functions to be accommodate on a single board into which the M-HPD is plugged. The design and performance of a versatile system is described in which a trigger-signal, derived from the common-side of the silicon anode in the M-HPD, is used to trigger the readout of the 60-anode pixels in the M-HPD. The multi-channel amplifier section is based on the use of a new, commercial VLSI chip, whilst the read-out sequencer uses a chip of its own design. The common anode signal is processed by a fast amplifier and discriminator to provide a trigger signal when a single event is detected. In the prototype version, the serial analogue output data-stream is processed using a PC-mounted, high speed ADC. Results obtained using the new read-out system in a compact gamma-camera and with a small muon tracking-chamber demonstrate the low-noise performance of the system. The application of this read-out system in other position-sensitive or multi-anode photomultiplier tube applications are also described

Monolithic pixels on moderate resistivity substrate and sparsifying readout architecture

CERN Document Server

Giubilato, P; Snoeys, W; Bisello, D; Marchioro, A; Battaglia, M; Demaria, L; Mansuy, S C; Pantano, D; Rousset, J; Mattiazzo, S; Kloukinas, K; Potenza, A; Ikemoto, Y; Rivetti, A; Chalmet, P; Mugnier, H; Silvestrin, L

2013-01-01

The LePix projects aim realizing a new generation monolithic pixel detectors with improved performances at lesser cost with respect to both current state of the art monolithic and hybrid pixel sensors. The detector is built in a 90 nm CMOS process on a substrate of moderate resistivity. This allows charge collection by drift while maintaining the other advantages usually offered by MAPS, like having a single piece detector and using a standard CMOS production line. The collection by drift mechanism, coupled to the low capacitance design of the collecting node made possible by the monolithic approach, provides an excellent signal to noise ratio straight at the pixel cell together with a radiation tolerance far superior to conventional un-depleted MAPS. The excellent signal-to-noise performance is demonstrated by the device ability to separate the 6 keV Fe-55 double peak at room temperature. To achieve high granularity (10-20 mu m pitch pixels) over large detector areas maintaining high readout speed, a complet...

Planar pixel sensors in commercial CMOS technologies

Energy Technology Data Exchange (ETDEWEB)

Gonella, Laura; Hemperek, Tomasz; Huegging, Fabian; Krueger, Hans; Wermes, Norbert [Physikalisches Institut der Universitaet Bonn, Nussallee 12, 53115 Bonn (Germany); Macchiolo, Anna [Max-Planck-Institut fuer Physik, Foehringer Ring 6, 80805 Muenchen (Germany)

2015-07-01

For the upgrade of the ATLAS experiment at the high luminosity LHC, an all-silicon tracker is foreseen to cope with the increased rate and radiation levels. Pixel and strip detectors will have to cover an area of up to 200m2. To produce modules in high number at reduced costs, new sensor and bonding technologies have to be investigated. Commercial CMOS technologies on high resistive substrates can provide significant advantages in this direction. They offer cost effective, large volume sensor production. In addition to this, production is done on 8'' wafers allowing wafer-to-wafer bonding to the electronics, an interconnection technology substantially cheaper than the bump bonding process used for hybrid pixel detectors at the LHC. Both active and passive n-in-p pixel sensor prototypes have been submitted in a 150 nm CMOS technology on a 2kΩ cm substrate. The passive sensor design will be used to characterize sensor properties and to investigate wafer-to-wafer bonding technologies. This first prototype is made of a matrix of 36 x 16 pixels of size compatible with the FE-I4 readout chip (i.e. 50 μm x 250 μm). Results from lab characterization of this first submission are shown together with TCAD simulations. Work towards a full size FE-I4 sensor for wafer-to-wafer bonding is discussed.

Application-specific architectures of CMOS monolithic active pixel sensors

Energy Technology Data Exchange (ETDEWEB)

Szelezniak, Michal [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France)]. E-mail: michal.szelezniak@ires.in2p3.fr; Besson, Auguste [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); Claus, Gilles; Colledani, Claude; [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); Degerli, Yavuz [CEA Saclay, DAPNIA, Gif-sur-Yvette Cedex (France); Deptuch, Grzegorz [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); Deveaux, Michael [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); GSI, Planckstrasse 1, Darmstadt 64291 (Germany); Dorokhov, Andrei [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); Dulinski, Wojciech [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); Fourches, Nicolas [CEA Saclay, DAPNIA, Gif-sur-Yvette Cedex (France); Goffe, Mathieu [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); Grandjean, Damien; Guilloux, Fabrice [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); Heini, Sebastien [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France)]|[GSI, Planckstrasse 1, Darmstadt 64291 (Germany); Himmi, Abdelkader [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); Hu, Christine [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); Jaaskelainen, Kimmo; Li, Yan; Lutz, Pierre; Orsini, Fabienne [CEA Saclay, DAPNIA, Gif-sur-Yvette Cedex (France); Pellicioli, Michel; Shabetai, Alexandre; Valin, Isabelle; Winter, Marc [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France)

2006-11-30

Several development directions intended to adapt and optimize monolithic active pixel sensors for specific applications are presented in this work. The first example, compatible with the STAR microvertex upgrade, is based on a simple two-transistor pixel circuitry. It is suited for a long integration time, room-temperature operation and minimum power dissipation. In another approach for this application, a specific readout method is proposed, allowing optimization of the integration time independently of the full frame-readout time. The circuit consists of an in-pixel front-end voltage amplifier, with a gain on the order of five, followed by two analog memory cells. The extended version of this scheme, based on the implementation of more memory cells per pixel, is the solution considered for the outer layers of a microvertex detector at the international linear collider. For the two innermost layers, a circuit allowing fast frame scans together with on-line, on-chip data sparsification is proposed. The first results of this prototype demonstrate that the fixed pattern dispersion is reduced below a noise level of 15 e{sup -}, allowing the use of a single comparator or a low-resolution ADC per pixel column. A common element for most of the mentioned readout schemes is a low-noise, low power consumption, layout efficient in-pixel amplifier. A review of possible solutions for this element together with some experimental results is presented.

Development of pixel readout integrated circuits for extreme rate and radiation

CERN Multimedia

Liberali, V; Rizzi, A; Re, V; Minuti, M; Pangaud, P; Barbero, M B; Pacher, L; Kluit, R; Hinchliffe, I; Manghisoni, M; Giubilato, P; Faccio, F; Pernegger, H; Krueger, H; Gensolen, F D; Bilei, G M; Da rocha rolo, M D; Prydderch, M L; Fanucci, L; Grillo, A A; Bellazzini, R; Palomo pinto, F R; Michelis, S; Huegging, F G; Kishishita, T; Marchiori, G; Christian, D C; Kaestli, H C; Meier, B; Andreazza, A; Key-charriere, M; Linssen, L; Dannheim, D; Conti, E; Hemperek, T; Menouni, M; Fougeron, D; Genat, J; Bomben, M; Marzocca, C; Demaria, N; Mazza, G; Van bakel, N A; Palla, F; Grippo, M T; Magazzu, G; Ratti, L; Abbaneo, D; Crescioli, F; Deptuch, G W; Neue, G; De robertis, G; Passeri, D; Placidi, P; Gromov, V; Morsani, F; Paccagnella, A; Christiansen, J; Dho, E; Wermes, N; Rymaszewski, P; Rozanov, A; Wang, A; Lipton, R J; Havranek, M; Neviani, A; Marconi, S; Karagounis, M; Godiot, S; Calderini, G; Seidel, S C; Horisberger, R P; Garcia-sciveres, M A; Stabile, A; Beccherle, R; Bacchetta, N

The present hybrid pixel detectors in operation at the LHC represent a major achievement. They deployed a new technology on an unprecedented scale and their success firmly established pixel tracking as indispensable for future HEP experiments. However, extrapolation of hybrid pixel technology to the HL-LHC presents major challenges on several fronts. We propose a new RD collaboration specifically focused on the development of pixel readout Integrated Circuits (IC). The IC challenges include: smaller pixels to resolve tracks in boosted jets, much higher hit rates (1-2 GHz/cm$^{2}$), unprecedented radiation tolerance (10 MGy), much higher output bandwidth, and large IC format with low power consumption in order to instrument large areas while keeping the material budget low. We propose a collaboration to design the next generation of hybrid pixel readout chips to enable the ATLAS and CMS Phase 2 pixel upgrades. This does not imply that ATLAS and CMS must use the same exact pixel readout chip, as most of the dev...

Development of radiation hard CMOS active pixel sensors for HL-LHC

International Nuclear Information System (INIS)

Pernegger, Heinz

2016-01-01

New pixel detectors, based on commercial high voltage and/or high resistivity full CMOS processes, hold promise as next-generation active pixel sensors for inner and intermediate layers of the upgraded ATLAS tracker. The use of commercial CMOS processes allow cost-effective detector construction and simpler hybridisation techniques. The paper gives an overview of the results obtained on AMS-produced CMOS sensors coupled to the ATLAS Pixel FE-I4 readout chips. The SOI (silicon-on-insulator) produced sensors by XFAB hold great promise as radiation hard SOI-CMOS sensors due to their combination of partially depleted SOI transistors reducing back-gate effects. The test results include pre-/post-irradiation comparison, measurements of charge collection regions as well as test beam results.

Fully depleted CMOS pixel sensor development and potential applications

Energy Technology Data Exchange (ETDEWEB)

Baudot, J.; Kachel, M. [Universite de Strasbourg, IPHC, 23 rue du Loess 67037 Strasbourg (France); CNRS, UMR7178, 67037 Strasbourg (France)

2015-07-01

low noise figure. Especially, an energy resolution of about 400 eV for 5 keV X-rays was obtained for single pixels. The prototypes have then been exposed to gradually increased fluences of neutrons, from 10{sup 13} to 5x10{sup 14} neq/cm{sup 2}. Again laboratory tests allowed to evaluate the signal over noise persistence on the different pixels implemented. Currently our development mostly targets the detection of soft X-rays, with the ambition to develop a pixel sensor matching counting rates as affordable with hybrid pixel sensors, but with an extended sensitivity to low energy and finer pixel about 25 x 25 μm{sup 2}. The original readout architecture proposed relies on a two tiers chip. The first tier consists of a sensor with a modest dynamic in order to insure low noise performances required by sensitivity. The interconnected second tier chip enhances the read-out speed by introducing massive parallelization. Performances reachable with this strategy combining counting and integration will be detailed. (authors)

Vertically integrated pixel readout chip for high energy physics

International Nuclear Information System (INIS)

Deptuch, Grzegorz; Demarteau, Marcel; Hoff, James; Khalid, Farah; Lipton, Ronald; Shenai, Alpana; Trimpl, Marcel; Yarema, Raymond; Zimmerman, Tom

2011-01-01

We report on the development of the vertex detector pixel readout chips based on multi-tier vertically integrated electronics for the International Linear Collider. Some testing results of the VIP2a prototype are presented. The chip is the second iteration of the silicon implementation of the prototype, data-pushed concept of the readout developed at Fermilab. The device was fabricated in the 3D MIT-LL 0.15 (micro)m fully depleted SOI process. The prototype is a three-tier design, featuring 30 x 30 (micro)m 2 pixels, laid out in an array of 48 x 48 pixels.

Monolithic pixels on moderate resistivity substrate and sparsifying readout architecture

International Nuclear Information System (INIS)

Giubilato, P.; Battaglia, M.; Bisello, D.; Caselle, M.; Chalmet, P.; Demaria, L.; Ikemoto, Y.; Kloukinas, K.; Mansuy, S.C.; Mattiazzo, S.; Marchioro, A.; Mugnier, H.; Pantano, D.; Potenza, A.; Rivetti, A.; Rousset, J.; Silvestrin, L.; Snoeys, W.

2013-01-01

The LePix projects aim realizing a new generation monolithic pixel detectors with improved performances at lesser cost with respect to both current state of the art monolithic and hybrid pixel sensors. The detector is built in a 90 nm CMOS process on a substrate of moderate resistivity. This allows charge collection by drift while maintaining the other advantages usually offered by MAPS, like having a single piece detector and using a standard CMOS production line. The collection by drift mechanism, coupled to the low capacitance design of the collecting node made possible by the monolithic approach, provides an excellent signal to noise ratio straight at the pixel cell together with a radiation tolerance far superior to conventional un-depleted MAPS. The excellent signal-to-noise performance is demonstrated by the device ability to separate the 6 keV 55 Fe double peak at room temperature. To achieve high granularity (10–20 µm pitch pixels) over large detector areas maintaining high readout speed, a completely new compressing architecture has been devised. This architecture departs from the mainstream hybrid pixel sparsification approach, which uses in-pixel logic to reduce data, by using topological compression to minimize pixel area and power consumption

Monolithic active pixel sensors (MAPS) in a VLSI CMOS technology

CERN Document Server

Turchetta, R; Manolopoulos, S; Tyndel, M; Allport, P P; Bates, R; O'Shea, V; Hall, G; Raymond, M

2003-01-01

Monolithic Active Pixel Sensors (MAPS) designed in a standard VLSI CMOS technology have recently been proposed as a compact pixel detector for the detection of high-energy charged particle in vertex/tracking applications. MAPS, also named CMOS sensors, are already extensively used in visible light applications. With respect to other competing imaging technologies, CMOS sensors have several potential advantages in terms of low cost, low power, lower noise at higher speed, random access of pixels which allows windowing of region of interest, ability to integrate several functions on the same chip. This brings altogether to the concept of 'camera-on-a-chip'. In this paper, we review the use of CMOS sensors for particle physics and we analyse their performances in term of the efficiency (fill factor), signal generation, noise, readout speed and sensor area. In most of high-energy physics applications, data reduction is needed in the sensor at an early stage of the data processing before transfer of the data to ta...

Design and characterization of novel monolithic pixel sensors for the ALICE ITS upgrade

Science.gov (United States)

Cavicchioli, C.; Chalmet, P. L.; Giubilato, P.; Hillemanns, H.; Junique, A.; Kugathasan, T.; Mager, M.; Marin Tobon, C. A.; Martinengo, P.; Mattiazzo, S.; Mugnier, H.; Musa, L.; Pantano, D.; Rousset, J.; Reidt, F.; Riedler, P.; Snoeys, W.; Van Hoorne, J. W.; Yang, P.

2014-11-01

Within the R&D activities for the upgrade of the ALICE Inner Tracking System (ITS), Monolithic Active Pixel Sensors (MAPS) are being developed and studied, due to their lower material budget ( 0.3 %X0 in total for each inner layer) and higher granularity ( 20 μm × 20 μm pixels) with respect to the present pixel detector. This paper presents the design and characterization results of the Explorer0 chip, manufactured in the TowerJazz 180 nm CMOS Imaging Sensor process, based on a wafer with high-resistivity (ρ > 1 kΩ cm) and 18 μm thick epitaxial layer. The chip is organized in two sub-matrices with different pixel pitches (20 μm and 30 μm), each of them containing several pixel designs. The collection electrode size and shape, as well as the distance between the electrode and the surrounding electronics, are varied; the chip also offers the possibility to decouple the charge integration time from the readout time, and to change the sensor bias. The charge collection properties of the different pixel variants implemented in Explorer0 have been studied using a 55Fe X-ray source and 1-5 GeV/c electrons and positrons. The sensor capacitance has been estimated, and the effect of the sensor bias has also been examined in detail. A second version of the Explorer0 chip (called Explorer1) has been submitted for production in March 2013, together with a novel circuit with in-pixel discrimination and a sparsified readout. Results from these submissions are also presented.

Temporal Noise Analysis of Charge-Domain Sampling Readout Circuits for CMOS Image Sensors

Directory of Open Access Journals (Sweden)

Xiaoliang Ge

2018-02-01

Full Text Available This paper presents a temporal noise analysis of charge-domain sampling readout circuits for Complementary Metal-Oxide Semiconductor (CMOS image sensors. In order to address the trade-off between the low input-referred noise and high dynamic range, a Gm-cell-based pixel together with a charge-domain correlated-double sampling (CDS technique has been proposed to provide a way to efficiently embed a tunable conversion gain along the read-out path. Such readout topology, however, operates in a non-stationery large-signal behavior, and the statistical properties of its temporal noise are a function of time. Conventional noise analysis methods for CMOS image sensors are based on steady-state signal models, and therefore cannot be readily applied for Gm-cell-based pixels. In this paper, we develop analysis models for both thermal noise and flicker noise in Gm-cell-based pixels by employing the time-domain linear analysis approach and the non-stationary noise analysis theory, which help to quantitatively evaluate the temporal noise characteristic of Gm-cell-based pixels. Both models were numerically computed in MATLAB using design parameters of a prototype chip, and compared with both simulation and experimental results. The good agreement between the theoretical and measurement results verifies the effectiveness of the proposed noise analysis models.

Conceptual design of 3D integrated pixel sensors for the innermost layer of the ILC vertex detector

International Nuclear Information System (INIS)

Fu, Y; Hu-Guo, C; Dorokhov, A; Zhao, W; Hu, Y; Torheim, O

2011-01-01

The paper presents a design of CMOS Pixel Sensor (CPS) using the vertical integration technology (3DIT), expected to alleviate the most essential limitations of 2D-CPS. Our objective is to develop an intelligent architecture in order to meet the requirements of the innermost layer of the International Linear Collider (ILC) vertex detectors, which are particularly demanding in spatial resolution of less than 3 μm and associated frame readout time of 10 μs. The sensor, with a pixel pitch of 23 μm, will be composed of 3-tiers Integrated Circuits (IC) with different functionalities: detection with in pixel analogue processing, pixel-level 3-bit Analogue to Digital Conversion (ADC) and fast parallel sparse readout.

Development of Fast and High Precision CMOS Pixel Sensors for an ILC Vertex Detector

CERN Document Server

Hu-Guo, Christine

2010-01-01

The development of CMOS pixel sensors with column parallel read-out and integrated zero-suppression has resulted in a full size, nearly 1 Megapixel, prototype with ~100 \\mu s read-out time. Its performances are quite close to the ILD vertex detector specifications, showing that the sensor architecture can presumably be evolved to meet these specifications exactly. Starting from the existing architecture and achieved performances, the paper will expose the details of how the sensor will be evolved in the coming 2-3 years in perspective of the ILD Detector Baseline Document, to be delivered in 2012. Two different devices are foreseen for this objective, one being optimized for the inner layers and their fast read-out requirement, while the other exploits the dimmed background in the outer layers to reduce the power consumption. The sensor evolution relies on a high resistivity epitaxial layer, on the use of an advanced CMOS process and on the combination of column-level ADCs with a pixel array. The paper will p...

Position dependence of charge collection in prototype sensors for the CMS pixel detector

CERN Document Server

Rohe, Tilman; Chiochia, Vincenzo; Cremaldi, Lucien M; Cucciarelli, Susanna; Dorokhov, Andrei; Konecki, Marcin; Prokofiev, Kirill; Regenfus, Christian; Sanders, David A; Son Seung Hee; Speer, Thomas; Swartz, Morris

2004-01-01

This paper reports on the sensor R&D activity for the CMS pixel detector. Devices featuring several design and technology options have been irradiated up to a proton fluence1 of 1 multiplied by 10**1**5 n //e//q/cm**2 at the CERN PS. Afterward, they were bump bonded to unirradiated readout chips and tested using high energy pions in the H2 beam line of the CERN SPS. The readout chip allows a nonzero suppressed full analogue readout and therefore a good characterization of the sensors in terms of noise and charge collection properties. The position dependence of signal is presented and the differences between the two sensor options are discussed. 20 Refs.

Design and characterization of novel monolithic pixel sensors for the ALICE ITS upgrade

International Nuclear Information System (INIS)

Cavicchioli, C.; Chalmet, P.L.; Giubilato, P.; Hillemanns, H.; Junique, A.; Kugathasan, T.; Mager, M.; Marin Tobon, C.A.; Martinengo, P.; Mattiazzo, S.; Mugnier, H.; Musa, L.; Pantano, D.; Rousset, J.; Reidt, F.; Riedler, P.; Snoeys, W.; Van Hoorne, J.W.; Yang, P.

2014-01-01

Within the R and D activities for the upgrade of the ALICE Inner Tracking System (ITS), Monolithic Active Pixel Sensors (MAPS) are being developed and studied, due to their lower material budget (∼0.3%X 0 in total for each inner layer) and higher granularity (∼20μm×20μm pixels) with respect to the present pixel detector. This paper presents the design and characterization results of the Explorer0 chip, manufactured in the TowerJazz 180 nm CMOS Imaging Sensor process, based on a wafer with high-resistivity (ρ>1kΩcm) and 18 μm thick epitaxial layer. The chip is organized in two sub-matrices with different pixel pitches (20 μm and 30 μm), each of them containing several pixel designs. The collection electrode size and shape, as well as the distance between the electrode and the surrounding electronics, are varied; the chip also offers the possibility to decouple the charge integration time from the readout time, and to change the sensor bias. The charge collection properties of the different pixel variants implemented in Explorer0 have been studied using a 55 Fe X-ray source and 1–5 GeV/c electrons and positrons. The sensor capacitance has been estimated, and the effect of the sensor bias has also been examined in detail. A second version of the Explorer0 chip (called Explorer1) has been submitted for production in March 2013, together with a novel circuit with in-pixel discrimination and a sparsified readout. Results from these submissions are also presented

Design and characterization of novel monolithic pixel sensors for the ALICE ITS upgrade

Energy Technology Data Exchange (ETDEWEB)

Cavicchioli, C., E-mail: costanza.cavicchioli@cern.ch [CERN European Organization for Nuclear Research, CH-1211 Genève 23 (Switzerland); Chalmet, P.L. [MIND, Archamps Technopole, Saint-Julien-en-Genevois, Cedex 74166 (France); Giubilato, P. [Università and INFN, Padova (Italy); Hillemanns, H.; Junique, A.; Kugathasan, T.; Mager, M. [CERN European Organization for Nuclear Research, CH-1211 Genève 23 (Switzerland); Marin Tobon, C.A. [Valencia Polytechnic University, Valencia (Spain); Martinengo, P. [CERN European Organization for Nuclear Research, CH-1211 Genève 23 (Switzerland); Mattiazzo, S. [Università and INFN, Padova (Italy); Mugnier, H. [MIND, Archamps Technopole, Saint-Julien-en-Genevois, Cedex 74166 (France); Musa, L. [CERN European Organization for Nuclear Research, CH-1211 Genève 23 (Switzerland); Pantano, D. [Università and INFN, Padova (Italy); Rousset, J. [MIND, Archamps Technopole, Saint-Julien-en-Genevois, Cedex 74166 (France); Reidt, F. [CERN European Organization for Nuclear Research, CH-1211 Genève 23 (Switzerland); Physikalisches Institut, Ruprecht-Karls-Universitaet Heidelberg, Heidelberg (Germany); Riedler, P.; Snoeys, W. [CERN European Organization for Nuclear Research, CH-1211 Genève 23 (Switzerland); Van Hoorne, J.W. [CERN European Organization for Nuclear Research, CH-1211 Genève 23 (Switzerland); Technische Universitaet Wien, Vienna (Austria); Yang, P. [Central China Normal University CCNU, Wuhan (China)

2014-11-21

Within the R and D activities for the upgrade of the ALICE Inner Tracking System (ITS), Monolithic Active Pixel Sensors (MAPS) are being developed and studied, due to their lower material budget (∼0.3%X{sub 0} in total for each inner layer) and higher granularity (∼20μm×20μm pixels) with respect to the present pixel detector. This paper presents the design and characterization results of the Explorer0 chip, manufactured in the TowerJazz 180 nm CMOS Imaging Sensor process, based on a wafer with high-resistivity (ρ>1kΩcm) and 18 μm thick epitaxial layer. The chip is organized in two sub-matrices with different pixel pitches (20 μm and 30 μm), each of them containing several pixel designs. The collection electrode size and shape, as well as the distance between the electrode and the surrounding electronics, are varied; the chip also offers the possibility to decouple the charge integration time from the readout time, and to change the sensor bias. The charge collection properties of the different pixel variants implemented in Explorer0 have been studied using a {sup 55}Fe X-ray source and 1–5 GeV/c electrons and positrons. The sensor capacitance has been estimated, and the effect of the sensor bias has also been examined in detail. A second version of the Explorer0 chip (called Explorer1) has been submitted for production in March 2013, together with a novel circuit with in-pixel discrimination and a sparsified readout. Results from these submissions are also presented.

Development of a customized SSC pixel detector readout for vertex tracking

International Nuclear Information System (INIS)

Barkan, O.; Atlas, E.L.; Marking, W.L.; Worley, S.; Yacoub, G.Y.; Kramer, G.; Arens, J.F.; Jernigan, J.G.; Shapiro, S.L.; Nygren, D.; Spieler, H.; Wright, M.

1990-01-01

The authors describe the readout architecture and progress to date in the development of hybrid PIN diode arrays for use as vertex detectors in the SSC environment. The architecture supports a self-timed mechanism for time stamping hit pixels, storing their xy coordinates and later selectively reading out only those pixels containing interesting data along with their coordinates. The peripheral logic resolves ambiguous pixel ghost locations and controls pixel neighbor readout to achieve high spatial resolution. A test lot containing 64 x 32 pixel arrays has been processed and is currently being tested. Each pixel contains 23 transistors and six capacitors consuming an area of 50μm by 150μm and dissipating about 20μW of power

Optical readout in a multi-module system test for the ATLAS pixel detector

International Nuclear Information System (INIS)

Flick, Tobias; Becks, Karl-Heinz; Gerlach, Peter; Kersten, Susanne; Maettig, Peter; Nderitu Kirichu, Simon; Reeves, Kendall; Richter, Jennifer; Schultes, Joachim

2006-01-01

The innermost part of the ATLAS experiment at the LHC, CERN, will be a pixel detector, which is presently under construction. The command messages and the readout data of the detector are transmitted over an optical data path. The readout chain consists of many components which are produced at several locations around the world, and must work together in the pixel detector. To verify that these parts are working together as expected a system test has been built up. It consists of detector modules, optoboards, optical fibres, Back of Crate cards, Readout Drivers, and control computers. In this paper, the system test setup and the operation of the readout chain are described. Also, some results of tests using the final pixel detector readout chain are given

Hexagonal pixel detector with time encoded binary readout

International Nuclear Information System (INIS)

Hoedlmoser, H.; Varner, G.; Cooney, M.

2009-01-01

The University of Hawaii is developing continuous acquisition pixel (CAP) detectors for vertexing applications in lepton colliding experiments such as SuperBelle or ILC. In parallel to the investigation of different technology options such as MAPS or SOI, both analog and binary readout concepts have been tested. First results with a binary readout scheme in which the hit information is time encoded by means of a signal shifting mechanism have recently been published. This paper explains the hit reconstruction for such a binary detector with an emphasis on fake hit reconstruction probabilities in order to evaluate the rate capability in a high background environment such as the planned SuperB factory at KEK. The results show that the binary concept is at least comparable to any analog readout strategy if not better in terms of occupancy. Furthermore, we present a completely new binary readout strategy in which the pixel cells are arranged in a hexagonal grid allowing the use of three independent output directions to reduce reconstruction ambiguities. The new concept uses the same signal shifting mechanism for time encoding, however, in dedicated transfer lines on the periphery of the detector, which enables higher shifting frequencies. Detailed Monte Carlo simulations of full size pixel matrices including hit and BG generation, signal generation, and data reconstruction show that by means of multiple signal transfer lines on the periphery the pixel can be made smaller (higher resolution), the number of output channels and the data volume per triggered event can be reduced dramatically, fake hit reconstruction is lowered to a minimum and the resulting effective occupancies are less than 10 -4 . A prototype detector has been designed in the AMS 0.35μm Opto process and is currently under fabrication.

High-speed imaging at high x-ray energy: CdTe sensors coupled to charge-integrating pixel array detectors

Energy Technology Data Exchange (ETDEWEB)

Becker, Julian; Tate, Mark W.; Shanks, Katherine S.; Philipp, Hugh T.; Weiss, Joel T.; Purohit, Prafull [Laboratory of Atomic and Solid State Physics, Cornell University, Ithaca, NY 14853 (United States); Chamberlain, Darol [Cornell High Energy Synchrotron Source (CHESS), Cornell University, Ithaca, NY 14853 (United States); Gruner, Sol M., E-mail: smg26@cornell.edu [Laboratory of Atomic and Solid State Physics, Cornell University, Ithaca, NY 14853 (United States); Cornell High Energy Synchrotron Source (CHESS), Cornell University, Ithaca, NY 14853 (United States)

2016-07-27

Pixel Array Detectors (PADs) consist of an x-ray sensor layer bonded pixel-by-pixel to an underlying readout chip. This approach allows both the sensor and the custom pixel electronics to be tailored independently to best match the x-ray imaging requirements. Here we describe the hybridization of CdTe sensors to two different charge-integrating readout chips, the Keck PAD and the Mixed-Mode PAD (MM-PAD), both developed previously in our laboratory. The charge-integrating architecture of each of these PADs extends the instantaneous counting rate by many orders of magnitude beyond that obtainable with photon counting architectures. The Keck PAD chip consists of rapid, 8-frame, in-pixel storage elements with framing periods <150 ns. The second detector, the MM-PAD, has an extended dynamic range by utilizing an in-pixel overflow counter coupled with charge removal circuitry activated at each overflow. This allows the recording of signals from the single-photon level to tens of millions of x-rays/pixel/frame while framing at 1 kHz. Both detector chips consist of a 128×128 pixel array with (150 µm){sup 2} pixels.

Design of a current based readout chip and development of a DEPFET pixel prototype system for the ILC vertex detector

International Nuclear Information System (INIS)

Trimpl, M.

2005-12-01

The future TeV-scale linear collider ILC (International Linear Collider) offers a large variety of precision measurements complementary to the discovery potential of the LHC (Large Hadron Collider). To fully exploit its physics potential, a vertex detector with unprecedented performance is needed. One proposed technology for the ILC vertex detector is the DEPFET active pixel sensor. The DEPFET sensor offers particle detection with in-pixel amplification by incorporating a field effect transistor into a fully depleted high-ohmic silicon substrate. The device provides an excellent signal-to-noise ratio and a good spatial resolution at the same time. To establish a very fast readout of a DEPFET pixel matrix with row rates of 20 MHz and more, the 128 channel CURO II ASIC has been designed and fabricated. The architecture of the chip is completely based on current mode techniques (SI) perfectly adapted to the current signal of the sensor. For the ILC vertex detector a prototype system with a 64 x 128 DEPFET pixel matrix read out by the CURO II chip has been developed. The design issues and the standalone performance of the readout chip as well as first results with the prototype system will be presented. (orig.)

Design of a current based readout chip and development of a DEPFET pixel prototype system for the ILC vertex detector

Energy Technology Data Exchange (ETDEWEB)

Trimpl, M.

2005-12-15

The future TeV-scale linear collider ILC (International Linear Collider) offers a large variety of precision measurements complementary to the discovery potential of the LHC (Large Hadron Collider). To fully exploit its physics potential, a vertex detector with unprecedented performance is needed. One proposed technology for the ILC vertex detector is the DEPFET active pixel sensor. The DEPFET sensor offers particle detection with in-pixel amplification by incorporating a field effect transistor into a fully depleted high-ohmic silicon substrate. The device provides an excellent signal-to-noise ratio and a good spatial resolution at the same time. To establish a very fast readout of a DEPFET pixel matrix with row rates of 20 MHz and more, the 128 channel CURO II ASIC has been designed and fabricated. The architecture of the chip is completely based on current mode techniques (SI) perfectly adapted to the current signal of the sensor. For the ILC vertex detector a prototype system with a 64 x 128 DEPFET pixel matrix read out by the CURO II chip has been developed. The design issues and the standalone performance of the readout chip as well as first results with the prototype system will be presented. (orig.)

Design of fundamental building blocks for fast binary readout CMOS sensors used in high-energy physics experiments

Energy Technology Data Exchange (ETDEWEB)

Degerli, Yavuz [CEA Saclay, IRFU/SEDI, 91191 Gif-sur-Yvette Cedex (France)], E-mail: degerli@cea.fr

2009-04-21

In this paper, design details of key building blocks for fast binary readout CMOS monolithic active pixel sensors developed for charged particle detection are presented. Firstly, an all-NMOS pixel architecture with in-pixel amplification and reset noise suppression which allows fast readout is presented. This pixel achieves high charge-to-voltage conversion factors (CVF) using a few number of transistors inside the pixel. It uses a pre-amplifying stage close to the detector and a simple double sampling (DS) circuitry to store the reset level of the detector. The DS removes the offset mismatches of amplifiers and the reset noise of the detector. Offset mismatches of the source follower are also corrected by a second column-level DS stage. The second important building block of these sensors, a low-power auto-zeroed column-level discriminator, is also presented. These two blocks transform the charge of the impinging particle into binary data. Finally, some experimental results obtained on CMOS chips designed using these blocks are presented.

The ATLAS Planar Pixel Sensor R and D project

International Nuclear Information System (INIS)

Beimforde, M.

2011-01-01

Within the R and D project on Planar Pixel Sensor Technology for the ATLAS inner detector upgrade, the use of planar pixel sensors for highest fluences as well as large area silicon detectors is investigated. The main research goals are optimizing the signal size after irradiations, reducing the inactive sensor edges, adjusting the readout electronics to the radiation induced decrease of the signal sizes, and reducing the production costs. Planar n-in-p sensors have been irradiated with neutrons and protons up to fluences of 2x10 16 n eq /cm 2 and 1x10 16 n eq /cm 2 , respectively, to study the collected charge as a function of the irradiation dose received. Furthermore comparisons of irradiated standard 300μm and thin 140μm sensors will be presented showing an increase of signal sizes after irradiation in thin sensors. Tuning studies of the present ATLAS front end electronics show possibilities to decrease the discriminator threshold of the present FE-I3 read out chips to less than 1500 electrons. In the present pixel detector upgrade scenarios a flat stave design for the innermost layers requires reduced inactive areas at the sensor edges to ensure low geometric inefficiencies. Investigations towards achieving slim edges presented here show possibilities to reduce the width of the inactive area to less than 500μm. Furthermore, a brief overview of present simulation activities within the Planar Pixel R and D project is given.

Slim edge studies, design and quality control of planar ATLAS IBL pixel sensors

Energy Technology Data Exchange (ETDEWEB)

Wittig, Tobias

2013-05-08

One of the four large experiments at the LHC at CERN is the ATLAS detector, a multi purpose detector. Its pixel detector, composed of three layers, is the innermost part of the tracker. As it is closest to the interaction point, it represents a basic part of the track reconstruction. Besides the requested high resolution one main requirement is the radiation hardness. In the coming years the radiation damage will cause deteriorations of the detector performance. With the planned increase of the luminosity, especially after the upgrade to the High Luminosity LHC, this radiation damage will be even intensified. This circumstance necessitates a new pixel detector featuring improved radiation hard sensors and read-out chips. The present shutdown of the LHC is already utilized to insert an additional b-layer (IBL) into the existing ATLAS pixel detector. The current n-in-n pixel sensor design had to be adapted to the new read-out chip and the module specifications. The new stave geometry requests a reduction of the inactive sensor edge. In a prototype wafer production all modifications have been implemented. The sensor quality control was supervised which led to the decision of the final sensor thickness. In order to evaluate the performance of the sensor chip assemblies with an innovative slim edge design, they have been operated in test beam setups before and after irradiation. Furthermore, the quality control of the planar IBL sensor wafer production was supervised from the stage of wafer delivery to that before the flip chip process to ensure a sufficient amount of functional sensors for the module production.

Depleted fully monolithic CMOS pixel detectors using a column based readout architecture for the ATLAS Inner Tracker upgrade

Science.gov (United States)

Wang, T.; Barbero, M.; Berdalovic, I.; Bespin, C.; Bhat, S.; Breugnon, P.; Caicedo, I.; Cardella, R.; Chen, Z.; Degerli, Y.; Egidos, N.; Godiot, S.; Guilloux, F.; Hemperek, T.; Hirono, T.; Krüger, H.; Kugathasan, T.; Hügging, F.; Marin Tobon, C. A.; Moustakas, K.; Pangaud, P.; Schwemling, P.; Pernegger, H.; Pohl, D.-L.; Rozanov, A.; Rymaszewski, P.; Snoeys, W.; Wermes, N.

2018-03-01

Depleted monolithic active pixel sensors (DMAPS), which exploit high voltage and/or high resistivity add-ons of modern CMOS technologies to achieve substantial depletion in the sensing volume, have proven to have high radiation tolerance towards the requirements of ATLAS in the high-luminosity LHC era. DMAPS integrating fast readout architectures are currently being developed as promising candidates for the outer pixel layers of the future ATLAS Inner Tracker, which will be installed during the phase II upgrade of ATLAS around year 2025. In this work, two DMAPS prototype designs, named LF-Monopix and TJ-Monopix, are presented. LF-Monopix was fabricated in the LFoundry 150 nm CMOS technology, and TJ-Monopix has been designed in the TowerJazz 180 nm CMOS technology. Both chips employ the same readout architecture, i.e. the column drain architecture, whereas different sensor implementation concepts are pursued. The paper makes a joint description of the two prototypes, so that their technical differences and challenges can be addressed in direct comparison. First measurement results for LF-Monopix will also be shown, demonstrating for the first time a fully functional fast readout DMAPS prototype implemented in the LFoundry technology.

Characterization of active CMOS pixel sensors on high resistive substrate

Energy Technology Data Exchange (ETDEWEB)

Hirono, Toko; Hemperek, Tomasz; Huegging, Fabian; Krueger, Hans; Rymaszewski, Piotr; Wermes, Norbert [Physikalisches Institut, Universitaet Bonn, Bonn (Germany)

2016-07-01

Active CMOS pixel sensors are very attractive as radiation imaging pixel detector because they do not need cost-intensive fine pitch bump bonding. High radiation tolerance and time resolution are required to apply those sensors to upcoming particle physics experiments. To achieve these requirements, the active CMOS pixel sensors were developed on high resistive substrates. Signal charges are collected faster by drift in high resistive substrates than in standard low resistive substrates yielding also a higher radiation tolerance. A prototype of the active CMOS pixel sensor has been fabricated in the LFoundry 150 nm CMOS process on 2 kΩcm substrate. This prototype chip was thinned down to 300 μm and the backside has been processed and can contacted by an aluminum contact. The breakdown voltage is around -115 V, and the depletion width has been measured to be as large as 180 μm at a bias voltage of -110 V. Gain and noise of the readout circuitry agree with the designed values. Performance tests in the lab and test beam have been done before and after irradiation with X-rays and neutrons. In this presentation, the measurement results of the active CMOS prototype sensors are shown.

High-resolution photon spectroscopy with a microwave-multiplexed 4-pixel transition edge sensor array

Science.gov (United States)

Guss, Paul; Rabin, Michael; Croce, Mark; Hoteling, Nathan; Schwellenbach, David; Kruschwitz, Craig; Mocko, Veronika; Mukhopadhyay, Sanjoy

2017-09-01

We demonstrate very high-resolution photon spectroscopy with a microwave-multiplexed 4-pixel transition edge sensor (TES) array. The readout circuit consists of superconducting microwave resonators coupled to radio frequency superconducting-quantum-interference devices (RF-SQUIDs) and transduces changes in input current to changes in phase of a microwave signal. We used a flux-ramp modulation to linearize the response and avoid low-frequency noise. The result is a very high-resolution photon spectroscopy with a microwave-multiplexed 4-pixel transition edge sensor array. We performed and validated a small-scale demonstration and test of all the components of our concept system, which encompassed microcalorimetry, microwave multiplexing, RF-SQUIDs, and software-defined radio (SDR). We shall display data we acquired in the first simultaneous combination of all key innovations in a 4-pixel demonstration, including microcalorimetry, microwave multiplexing, RF-SQUIDs, and SDR. We present the energy spectrum of a gadolinium-153 (153Gd) source we measured using our 4-pixel TES array and the RF-SQUID multiplexer. For each pixel, one can observe the two 97.4 and 103.2 keV photopeaks. We measured the 153Gd photon source with an achieved energy resolution of 70 eV, full width half maximum (FWHM) at 100 keV, and an equivalent readout system noise of 90 pA/pHz at the TES. This demonstration establishes a path for the readout of cryogenic x-ray and gamma ray sensor arrays with more elements and spectral resolving powers. We believe this project has improved capabilities and substantively advanced the science useful for missions such as nuclear forensics, emergency response, and treaty verification through the explored TES developments.

Development of active edge pixel sensors and four-side buttable modules using vertical integration technologies

Energy Technology Data Exchange (ETDEWEB)

Macchiolo, A., E-mail: Anna.Macchiolo@mpp.mpg.de [Max-Planck-Institut for Physics, Föhringer Ring 6, D-80805 Munich (Germany); Andricek, L. [Semiconductor Laboratory of the Max-Planck-Society, Otto Hahn Ring 6, D-81739 Munich (Germany); Moser, H.-G.; Nisius, R. [Max-Planck-Institut for Physics, Föhringer Ring 6, D-80805 Munich (Germany); Richter, R.H. [Semiconductor Laboratory of the Max-Planck-Society, Otto Hahn Ring 6, D-81739 Munich (Germany); Terzo, S.; Weigell, P. [Max-Planck-Institut for Physics, Föhringer Ring 6, D-80805 Munich (Germany)

2014-11-21

We present an R and D activity focused on the development of novel modules for the upgrade of the ATLAS pixel system at the High Luminosity LHC (HL-LHC). The modules consist of n-in-p pixel sensors, 100 or 200 μm thick, produced at VTT (Finland) with an active edge technology, which considerably reduces the dead area at the periphery of the device. The sensors are interconnected with solder bump-bonding to the ATLAS FE-I3 and FE-I4 read-out chips, and characterised with radioactive sources and beam tests at the CERN-SPS and DESY. The results of these measurements will be discussed for devices before and after irradiation up to a fluence of 5×10{sub 15}n{sub eq}/cm{sup 2}. We will also report on the R and D activity to obtain Inter Chip Vias (ICVs) on the ATLAS read-out chip in collaboration with the Fraunhofer Institute EMFT. This step is meant to prove the feasibility of the signal transport to the newly created readout pads on the backside of the chips allowing for four side buttable devices without the presently used cantilever for wire bonding. The read-out chips with ICVs will be interconnected to thin pixel sensors, 75 μm and 150 μm thick, with the Solid Liquid Interdiffusion (SLID) technology, which is an alternative to the standard solder bump-bonding.

Readout chip for the CMS pixel detector upgrade

Energy Technology Data Exchange (ETDEWEB)

Rossini, Marco, E-mail: marco.rossini@phys.ethz.ch

2014-11-21

For the CMS experiment a new pixel detector is planned for installation during the extended shutdown in winter 2016/2017. Among the changes of the detector modified front end electronics will be used for higher efficiency at peak luminosity of the LHC and faster readout. The first prototype versions of the new readout chip have been designed and produced. The results of qualification and calibration for the new chip are presented in this paper.

Design and Optimization of Multi-Pixel Transition-Edge Sensors for X-Ray Astronomy Applications

Science.gov (United States)

Smith, Stephen J.; Adams, Joseph S.; Bandler, Simon R.; Chervenak, James A.; Datesman, Aaron Michael; Eckart, Megan E.; Ewin, Audrey J.; Finkbeiner, Fred M.; Kelley, Richard L.; Kilbourne, Caroline A.;

18k Channels single photon counting readout circuit for hybrid pixel detector

International Nuclear Information System (INIS)

Maj, P.; Grybos, P.; Szczygiel, R.; Zoladz, M.; Sakumura, T.; Tsuji, Y.

2013-01-01

We have performed measurements of an integrated circuit named PXD18k designed for hybrid pixel semiconductor detectors used in X-ray imaging applications. The PXD18k integrated circuit, fabricated in CMOS 180 nm technology, has dimensions of 9.64 mm×20 mm and contains approximately 26 million transistors. The core of the IC is a matrix of 96×192 pixels with 100 μm×100 μm pixel size. Each pixel works in a single photon counting mode. A single pixel contains two charge sensitive amplifiers with Krummenacher feedback scheme, two shapers, two discriminators (with independent thresholds A and B) and two 16-bit ripple counters. The data are read out via eight low voltage differential signaling (LVDS) outputs with 100 Mbps rate. The power consumption is dominated by analog blocks and it is about 23 μW/pixel. The effective peaking time at the discriminator input is 30 ns and is mainly determined by the time constants of the charge sensitive amplifier (CSA). The gain is equal to 42.5 μV/e − and the equivalent noise charge is 168 e − rms (with bump-bonded silicon pixel detector). Thanks to the use of trim DACs in each pixel, the effective threshold spread at the discriminator input is only 1.79 mV. The dead time of the front end electronics for a standard setting is 172 ns (paralyzable model). In the standard readout mode (when the data collection time is separated from the time necessary to readout data from the chip) the PXD18k IC works with two energy thresholds per pixel. The PXD18k can also be operated in the continuous readout mode (with a zero dead time) where one can select the number of bits readout from each pixel to optimize the PXD18k frame rate. For example, for reading out 16 bits/pixel the frame rate is 2.7 kHz and for 4 bits/pixel it rises to 7.1 kHz.

18k Channels single photon counting readout circuit for hybrid pixel detector

Energy Technology Data Exchange (ETDEWEB)

Maj, P., E-mail: piotr.maj@agh.edu.pl [AGH University of Science and Technology, Department of Measurements and Electronics, Al. Mickiewicza 30, 30-059 Krakow (Poland); Grybos, P.; Szczygiel, R.; Zoladz, M. [AGH University of Science and Technology, Department of Measurements and Electronics, Al. Mickiewicza 30, 30-059 Krakow (Poland); Sakumura, T.; Tsuji, Y. [X-ray Analysis Division, Rigaku Corporation, Matsubara, Akishima, Tokyo 196-8666 (Japan)

2013-01-01

We have performed measurements of an integrated circuit named PXD18k designed for hybrid pixel semiconductor detectors used in X-ray imaging applications. The PXD18k integrated circuit, fabricated in CMOS 180 nm technology, has dimensions of 9.64 mm Multiplication-Sign 20 mm and contains approximately 26 million transistors. The core of the IC is a matrix of 96 Multiplication-Sign 192 pixels with 100 {mu}m Multiplication-Sign 100 {mu}m pixel size. Each pixel works in a single photon counting mode. A single pixel contains two charge sensitive amplifiers with Krummenacher feedback scheme, two shapers, two discriminators (with independent thresholds A and B) and two 16-bit ripple counters. The data are read out via eight low voltage differential signaling (LVDS) outputs with 100 Mbps rate. The power consumption is dominated by analog blocks and it is about 23 {mu}W/pixel. The effective peaking time at the discriminator input is 30 ns and is mainly determined by the time constants of the charge sensitive amplifier (CSA). The gain is equal to 42.5 {mu}V/e{sup -} and the equivalent noise charge is 168 e{sup -} rms (with bump-bonded silicon pixel detector). Thanks to the use of trim DACs in each pixel, the effective threshold spread at the discriminator input is only 1.79 mV. The dead time of the front end electronics for a standard setting is 172 ns (paralyzable model). In the standard readout mode (when the data collection time is separated from the time necessary to readout data from the chip) the PXD18k IC works with two energy thresholds per pixel. The PXD18k can also be operated in the continuous readout mode (with a zero dead time) where one can select the number of bits readout from each pixel to optimize the PXD18k frame rate. For example, for reading out 16 bits/pixel the frame rate is 2.7 kHz and for 4 bits/pixel it rises to 7.1 kHz.

Results of FE65-P2 Pixel Readout Test Chip for High Luminosity LHC Upgrades

CERN Document Server

AUTHOR|(SzGeCERN)394193

2016-01-01

A pixel readout test chip called FE65-P2 has been fabricated on 65 nm CMOS technology. FE65-P2 contains a matrix of 64 x 64 pixels on 50 micron by 50 micron pitch, designed to read out a bump bonded sensor. The goals of FE65-P2 are to demonstrate excellent analog performance isolated from digital activity well enough to achieve 500 electron stable threshold, be radiation hard to at least 500 Mrad, and prove the novel concept of isolated analog front ends embedded in a flat digital design, dubbed “analog islands in a digital sea”. Experience from FE65-P2 and hybrid assemblies will be applied to the design for a large format readout chip, called RD53A, to be produced in a wafer run in early 2017 by the RD53 collaboration. We review the case for 65 nm technology and report on threshold stability test results for the FE65-P2.

CMOS VLSI Active-Pixel Sensor for Tracking

Science.gov (United States)

Pain, Bedabrata; Sun, Chao; Yang, Guang; Heynssens, Julie

2004-01-01

An architecture for a proposed active-pixel sensor (APS) and a design to implement the architecture in a complementary metal oxide semiconductor (CMOS) very-large-scale integrated (VLSI) circuit provide for some advanced features that are expected to be especially desirable for tracking pointlike features of stars. The architecture would also make this APS suitable for robotic- vision and general pointing and tracking applications. CMOS imagers in general are well suited for pointing and tracking because they can be configured for random access to selected pixels and to provide readout from windows of interest within their fields of view. However, until now, the architectures of CMOS imagers have not supported multiwindow operation or low-noise data collection. Moreover, smearing and motion artifacts in collected images have made prior CMOS imagers unsuitable for tracking applications. The proposed CMOS imager (see figure) would include an array of 1,024 by 1,024 pixels containing high-performance photodiode-based APS circuitry. The pixel pitch would be 9 m. The operations of the pixel circuits would be sequenced and otherwise controlled by an on-chip timing and control block, which would enable the collection of image data, during a single frame period, from either the full frame (that is, all 1,024 1,024 pixels) or from within as many as 8 different arbitrarily placed windows as large as 8 by 8 pixels each. A typical prior CMOS APS operates in a row-at-a-time ( grolling-shutter h) readout mode, which gives rise to exposure skew. In contrast, the proposed APS would operate in a sample-first/readlater mode, suppressing rolling-shutter effects. In this mode, the analog readout signals from the pixels corresponding to the windows of the interest (which windows, in the star-tracking application, would presumably contain guide stars) would be sampled rapidly by routing them through a programmable diagonal switch array to an on-chip parallel analog memory array. The

Development of pixel readout integrated circuits for extreme rate and radiation

CERN Document Server

Garcia-Sciveres, M; CERN. Geneva. The LHC experiments Committee; LHCC

2013-01-01

Letter of Intent for RD Collaboration Proposal focused on development of a next generation pixel readout integrated circuits needed for high luminosity LHC detector upgrades. Brings together ATLAS and CMS pixel chip design communities.

Development of a pixel sensor with fine space-time resolution based on SOI technology for the ILC vertex detector

Energy Technology Data Exchange (ETDEWEB)

Ono, Shun, E-mail: s-ono@champ.hep.sci.osaka-u.ac.jp [Osaka University, 1-1 Machikaneyama, Toyonaka (Japan); Togawa, Manabu; Tsuji, Ryoji; Mori, Teppei [Osaka University, 1-1 Machikaneyama, Toyonaka (Japan); Yamada, Miho; Arai, Yasuo; Tsuboyama, Toru; Hanagaki, Kazunori [Institute of Particle and Nuclear Studies, High Energy Accelerator Research Org. (KEK), 1-1 Oho, Tsukuba (Japan)

2017-02-11

We have been developing a new monolithic pixel sensor with silicon-on-insulator (SOI) technology for the International Linear Collider (ILC) vertex detector system. The SOI monolithic pixel detector is realized using standard CMOS circuits fabricated on a fully depleted sensor layer. The new SOI sensor SOFIST can store both the position and timing information of charged particles in each 20×20 μm{sup 2} pixel. The position resolution is further improved by the position weighted with the charges spread to multiple pixels. The pixel also records the hit timing with an embedded time-stamp circuit. The sensor chip has column-parallel analog-to-digital conversion (ADC) circuits and zero-suppression logic for high-speed data readout. We are designing and evaluating some prototype sensor chips for optimizing and minimizing the pixel circuit.

Characterisation of pixel sensor prototypes for the ALICE ITS upgrade

Energy Technology Data Exchange (ETDEWEB)

Reidt, Felix [CERN (Switzerland); Physikalisches Institut, Universitaet Heidelberg (Germany); Collaboration: ALICE-Collaboration

2014-07-01

ALICE is preparing a major upgrade of its experimental apparatus to be installed in the second long LHC shutdown (LS2) in the years 2018-2019. A key element of the upgrade is the replacement of the Inner Tracking System (ITS) deploying Monolithic Active Pixel Sensors (MAPS). The upgraded ITS will have a reduced material budget while increasing the pixel density and readout rate capabilities. The novel design leads to higher pointing and momentum resolution as well as a p{sub T} acceptance extended to lower values. The corresponding sensor prototypes were qualified in laboratory measurements and beam tests with respect to their radiation tolerance and detection efficiency. This talk summarises recent results on the characterisation of prototypes belonging to the ALPIDE family.

Bonding techniques for hybrid active pixel sensors (HAPS)

Energy Technology Data Exchange (ETDEWEB)

Bigas, M. [Centre Nacional de Microelectronica, CNM-IMB (CSIC), Campus Universitat Autonoma de Barcelona, 08193 Bellaterra, Barcelona (Spain)]. E-mail: Marc.Bigas@cnm.es; Cabruja, E. [Centre Nacional de Microelectronica, CNM-IMB (CSIC), Campus Universitat Autonoma de Barcelona, 08193 Bellaterra, Barcelona (Spain)]. E-mail: Enric.Cabruja@cnm.es; Lozano, M. [Centre Nacional de Microelectronica, CNM-IMB (CSIC), Campus Universitat Autonoma de Barcelona, 08193 Bellaterra, Barcelona (Spain)

2007-05-01

A hybrid active pixel sensor (HAPS) consists of an array of sensing elements which is connected to an electronic read-out unit. The most used way to connect these two different devices is bump bonding. This interconnection technique is very suitable for these systems because it allows a very fine pitch and a high number of I/Os. However, there are other interconnection techniques available such as direct bonding. This paper, as a continuation of a review [M. Lozano, E. Cabruja, A. Collado, J. Santander, M. Ullan, Nucl. Instr. and Meth. A 473 (1-2) (2001) 95-101] published in 2001, presents an update of the different advanced bonding techniques available for manufacturing a hybrid active pixel detector.

Development of N+ in P pixel sensors for a high-luminosity large hadron collider

Science.gov (United States)

Kamada, Shintaro; Yamamura, Kazuhisa; Unno, Yoshinobu; Ikegami, Yoichi

2014-11-01

Hamamatsu Photonics K. K. is developing an N+ in a p planar pixel sensor with high radiation tolerance for the high-luminosity large hadron collider (HL-LHC). The N+ in the p planar pixel sensor is a candidate for the HL-LHC and offers the advantages of high radiation tolerance at a reasonable price compared with the N+ in an n planar sensor, the three-dimensional sensor, and the diamond sensor. However, the N+ in the p planar pixel sensor still presents some problems that need to be solved, such as its slim edge and the danger of sparks between the sensor and readout integrated circuit. We are now attempting to solve these problems with wafer-level processes, which is important for mass production. To date, we have obtained a 250-μm edge with an applied bias voltage of 1000 V. To protect against high-voltage sparks from the edge, we suggest some possible designs for the N+ edge.

Readout of the upgraded ALICE-ITS

Science.gov (United States)

Szczepankiewicz, A.; ALICE Collaboration

2016-07-01

The ALICE experiment will undergo a major upgrade during the second long shutdown of the CERN LHC. As part of this program, the present Inner Tracking System (ITS), which employs different layers of hybrid pixels, silicon drift and strip detectors, will be replaced by a completely new tracker composed of seven layers of monolithic active pixel sensors. The upgraded ITS will have more than twelve billion pixels in total, producing 300 Gbit/s of data when tracking 50 kHz Pb-Pb events. Two families of pixel chips realized with the TowerJazz CMOS imaging process have been developed as candidate sensors: the ALPIDE, which uses a proprietary readout and sparsification mechanism and the MISTRAL-O, based on a proven rolling shutter architecture. Both chips can operate in continuous mode, with the ALPIDE also supporting triggered operations. As the communication IP blocks are shared among the two chip families, it has been possible to develop a common Readout Electronics. All the sensor components (analog stages, state machines, buffers, FIFOs, etc.) have been modelled in a system level simulation, which has been extensively used to optimize both the sensor and the whole readout chain design in an iterative process. This contribution covers the progress of the R&D efforts and the overall expected performance of the ALICE-ITS readout system.

Readout of the upgraded ALICE-ITS

International Nuclear Information System (INIS)

Szczepankiewicz, A.

2016-01-01

The ALICE experiment will undergo a major upgrade during the second long shutdown of the CERN LHC. As part of this program, the present Inner Tracking System (ITS), which employs different layers of hybrid pixels, silicon drift and strip detectors, will be replaced by a completely new tracker composed of seven layers of monolithic active pixel sensors. The upgraded ITS will have more than twelve billion pixels in total, producing 300 Gbit/s of data when tracking 50 kHz Pb–Pb events. Two families of pixel chips realized with the TowerJazz CMOS imaging process have been developed as candidate sensors: the ALPIDE, which uses a proprietary readout and sparsification mechanism and the MISTRAL-O, based on a proven rolling shutter architecture. Both chips can operate in continuous mode, with the ALPIDE also supporting triggered operations. As the communication IP blocks are shared among the two chip families, it has been possible to develop a common Readout Electronics. All the sensor components (analog stages, state machines, buffers, FIFOs, etc.) have been modelled in a system level simulation, which has been extensively used to optimize both the sensor and the whole readout chain design in an iterative process. This contribution covers the progress of the R&D efforts and the overall expected performance of the ALICE-ITS readout system.

Readout of the upgraded ALICE-ITS

Energy Technology Data Exchange (ETDEWEB)

Szczepankiewicz, A., E-mail: Adam.Szczepankiewicz@cern.ch [CERN, Geneva (Switzerland); Institute of Computer Science, Warsaw University of Technology, Warsaw (Poland)

2016-07-11

The ALICE experiment will undergo a major upgrade during the second long shutdown of the CERN LHC. As part of this program, the present Inner Tracking System (ITS), which employs different layers of hybrid pixels, silicon drift and strip detectors, will be replaced by a completely new tracker composed of seven layers of monolithic active pixel sensors. The upgraded ITS will have more than twelve billion pixels in total, producing 300 Gbit/s of data when tracking 50 kHz Pb–Pb events. Two families of pixel chips realized with the TowerJazz CMOS imaging process have been developed as candidate sensors: the ALPIDE, which uses a proprietary readout and sparsification mechanism and the MISTRAL-O, based on a proven rolling shutter architecture. Both chips can operate in continuous mode, with the ALPIDE also supporting triggered operations. As the communication IP blocks are shared among the two chip families, it has been possible to develop a common Readout Electronics. All the sensor components (analog stages, state machines, buffers, FIFOs, etc.) have been modelled in a system level simulation, which has been extensively used to optimize both the sensor and the whole readout chain design in an iterative process. This contribution covers the progress of the R&D efforts and the overall expected performance of the ALICE-ITS readout system.

Design of front end electronics and a full scale 4k pixel readout ASIC for the DSSC X-ray detector at the European XFEL

International Nuclear Information System (INIS)

Erdinger, Florian

2016-01-01

The goal of this thesis was to design a large scale readout ASIC for the 1-Mega pixel DEPFET Sensor with Signal Compression (DSSC) detector system which is being developed by an international collaboration for the European XFEL (EuXFEL). Requirements for the DSSC detector include single photon detection down to 0.5 keV combined with a large dynamic range of up to 10000 photons at frame rates of up to 4.5 MHz. The detector core concepts include full parallel readout, signal compression on the sensor or ASIC level, filtering, immediate digitization and local storage within the pixel. The DSSC is a hybrid pixel detector, each sensor pixel mates to a dedicated ASIC pixel, which includes the entire specified signal processing chain along with auxiliary circuits. One ASIC comprises 4096 pixels and a full periphery including biasing and digital control. This thesis presents the design of the ASIC, its components and integration are described in detail. Emphasis is put on the design of the analog front-end. The first full format ASIC (F1) has been fabricated within the scope of this thesis along with numerous test chips. Furthermore, the EuXFEL and the DSSC detector system are presented to create the context for the ASIC, which is the core topic of this thesis.

Design of front end electronics and a full scale 4k pixel readout ASIC for the DSSC X-ray detector at the European XFEL

Energy Technology Data Exchange (ETDEWEB)

Erdinger, Florian

2016-11-22

The goal of this thesis was to design a large scale readout ASIC for the 1-Mega pixel DEPFET Sensor with Signal Compression (DSSC) detector system which is being developed by an international collaboration for the European XFEL (EuXFEL). Requirements for the DSSC detector include single photon detection down to 0.5 keV combined with a large dynamic range of up to 10000 photons at frame rates of up to 4.5 MHz. The detector core concepts include full parallel readout, signal compression on the sensor or ASIC level, filtering, immediate digitization and local storage within the pixel. The DSSC is a hybrid pixel detector, each sensor pixel mates to a dedicated ASIC pixel, which includes the entire specified signal processing chain along with auxiliary circuits. One ASIC comprises 4096 pixels and a full periphery including biasing and digital control. This thesis presents the design of the ASIC, its components and integration are described in detail. Emphasis is put on the design of the analog front-end. The first full format ASIC (F1) has been fabricated within the scope of this thesis along with numerous test chips. Furthermore, the EuXFEL and the DSSC detector system are presented to create the context for the ASIC, which is the core topic of this thesis.

Sensor development for the CMS pixel detector

CERN Document Server

Bölla, G; Horisberger, R P; Kaufmann, R; Rohe, T; Roy, A

2002-01-01

The CMS experiment which is currently under construction at the Large Hadron Collider (LHC) at CERN (Geneva, Switzerland) will contain a pixel detector which provides in its final configuration three space points per track close to the interaction point of the colliding beams. Because of the harsh radiation environment of the LHC, the technical realization of the pixel detector is extremely challenging. The readout chip as the most damageable part of the system is believed to survive a particle fluence of 6x10 sup 1 sup 4 n sub e sub q /cm sup 2 (All fluences are normalized to 1 MeV neutrons and therefore all components of the hybrid pixel detector have to perform well up to at least this fluence. As this requires a partially depleted operation of the silicon sensors after irradiation-induced type inversion of the substrate, an ''n in n'' concept has been chosen. In order to perform IV-tests on wafer level and to hold accidentally unconnected pixels close to ground potential, a resistive path between the pixe...

Optical readout of a triple-GEM detector by means of a CMOS sensor

Energy Technology Data Exchange (ETDEWEB)

Marafini, M. [INFN Sezione di Roma (Italy); Museo Storico della Fisica e Centro Studi e Ricerche “E. Fermi”, Roma (Italy); Patera, V. [INFN Sezione di Roma (Italy); Museo Storico della Fisica e Centro Studi e Ricerche “E. Fermi”, Roma (Italy); Laboratori Nazionali di Frascati dell' INFN, Frascati (Italy); Pinci, D., E-mail: davide.pinci@roma1.infn.it [INFN Sezione di Roma (Italy); Sarti, A. [Laboratori Nazionali di Frascati dell' INFN, Frascati (Italy); Dipartimento di Scienze di Base e Applicate per Ingegneria, Sapienza Università di Roma (Italy); Sciubba, A. [INFN Sezione di Roma (Italy); Museo Storico della Fisica e Centro Studi e Ricerche “E. Fermi”, Roma (Italy); Dipartimento di Scienze di Base e Applicate per Ingegneria, Sapienza Università di Roma (Italy); Spiriti, E. [Laboratori Nazionali di Frascati dell' INFN, Frascati (Italy)

2016-07-11

In last years, the development of optical sensors has produced objects able to provide very interesting performance. Large granularity is offered along with a very high sensitivity. CMOS sensors with millions of pixels able to detect as few as two or three photons per pixel are commercially available and can be used to read-out the optical signals provided by tracking particle detectors. In this work the results obtained by optically reading-out a triple-GEM detector by a commercial CMOS sensor will be presented. A standard detector was assembled with a transparent window below the third GEM allowing the light to get out. The detector is supplied with an Ar/CF{sub 4} based gas mixture producing 650 nm wavelength photons matching the maximum quantum efficiency of the sensor.

Spectroscopic measurements with the ATLAS FE-I4 pixel readout chip

Energy Technology Data Exchange (ETDEWEB)

Pohl, David-Leon; Janssen, Jens; Hemperek, Tomasz; Huegging, Fabian; Wermes, Norbert [Physikalisches Institut der Univeristaet Bonn (Germany)

2015-07-01

The ATLAS FE-I4 pixel readout chip is a large (2 x 2 cm{sup 2}) state of the art ASIC used in high energy physics experiments as well as for research and development purposes. While the FE-I4 is optimized for high hit rates it provides very limited charge resolution. Therefore two methods were developed to obtain high resolution single pixel charge spectra with the ATLAS FE-I4. The first method relies on the ability to change the detection threshold in small steps while counting hits from a particle source and has a resolution limited by electronic noise only. The other method uses a FPGA based time-to-digital-converter to digitize the analog charge signal with high precision. The feasibility, performance and challenges of these methods are discussed. First results of sensor characterizations from radioactive sources and test beams with the ATLAS FE-I4 in view of the charge collection efficiency after irradiation are presented.

CMOS Active Pixel Sensors as energy-range detectors for proton Computed Tomography

International Nuclear Information System (INIS)

Esposito, M.; Waltham, C.; Allinson, N.M.; Anaxagoras, T.; Evans, P.M.; Poludniowski, G.; Green, S.; Parker, D.J.; Price, T.; Manolopoulos, S.; Nieto-Camero, J.

2015-01-01

Since the first proof of concept in the early 70s, a number of technologies has been proposed to perform proton CT (pCT), as a means of mapping tissue stopping power for accurate treatment planning in proton therapy. Previous prototypes of energy-range detectors for pCT have been mainly based on the use of scintillator-based calorimeters, to measure proton residual energy after passing through the patient. However, such an approach is limited by the need for only a single proton passing through the energy-range detector in a read-out cycle. A novel approach to this problem could be the use of pixelated detectors, where the independent read-out of each pixel allows to measure simultaneously the residual energy of a number of protons in the same read-out cycle, facilitating a faster and more efficient pCT scan. This paper investigates the suitability of CMOS Active Pixel Sensors (APSs) to track individual protons as they go through a number of CMOS layers, forming an energy-range telescope. Measurements performed at the iThemba Laboratories will be presented and analysed in terms of correlation, to confirm capability of proton tracking for CMOS APSs

CMOS Active Pixel Sensors as energy-range detectors for proton Computed Tomography.

Science.gov (United States)

Esposito, M; Anaxagoras, T; Evans, P M; Green, S; Manolopoulos, S; Nieto-Camero, J; Parker, D J; Poludniowski, G; Price, T; Waltham, C; Allinson, N M

2015-06-03

Since the first proof of concept in the early 70s, a number of technologies has been proposed to perform proton CT (pCT), as a means of mapping tissue stopping power for accurate treatment planning in proton therapy. Previous prototypes of energy-range detectors for pCT have been mainly based on the use of scintillator-based calorimeters, to measure proton residual energy after passing through the patient. However, such an approach is limited by the need for only a single proton passing through the energy-range detector in a read-out cycle. A novel approach to this problem could be the use of pixelated detectors, where the independent read-out of each pixel allows to measure simultaneously the residual energy of a number of protons in the same read-out cycle, facilitating a faster and more efficient pCT scan. This paper investigates the suitability of CMOS Active Pixel Sensors (APSs) to track individual protons as they go through a number of CMOS layers, forming an energy-range telescope. Measurements performed at the iThemba Laboratories will be presented and analysed in terms of correlation, to confirm capability of proton tracking for CMOS APSs.

Design of readout drivers for ATLAS pixel detectors using field programmable gate arrays

CERN Document Server

Sivasubramaniyan, Sriram

Microstrip detectors are an integral patt of high energy physics research . Special protocols are used to transmit the data from these detectors . To readout the data from such detectors specialized instrumentation have to be designed . To achieve this task, creative and innovative high speed algorithms were designed simulated and implemented in Field Programmable gate arrays, using CAD/CAE tools. The simulation results indicated that these algorithms would be able to perform all the required tasks quickly and efficiently. This thesis describes the design of data acquisition system called the Readout Drivers (ROD) . It focuses on the ROD data path for ATLAS Pixel detectors. The data path will be an integrated part of Readout Drivers setup to decode the data from the silicon micro strip detectors and pixel detectors. This research also includes the design of Readout Driver controller. This Module is used to control the operation of the ROD. This module is responsible for the operation of the Pixel decoders bas...

On Certain New Methodology for Reducing Sensor and Readout Electronics Circuitry Noise in Digital Domain

Science.gov (United States)

Kizhner, Semion; Miko, Joseph; Bradley, Damon; Heinzen, Katherine

2008-01-01

NASA Hubble Space Telescope (HST) and upcoming cosmology science missions carry instruments with multiple focal planes populated with many large sensor detector arrays. These sensors are passively cooled to low temperatures for low-level light (L3) and near-infrared (NIR) signal detection, and the sensor readout electronics circuitry must perform at extremely low noise levels to enable new required science measurements. Because we are at the technological edge of enhanced performance for sensors and readout electronics circuitry, as determined by thermal noise level at given temperature in analog domain, we must find new ways of further compensating for the noise in the signal digital domain. To facilitate this new approach, state-of-the-art sensors are augmented at their array hardware boundaries by non-illuminated reference pixels, which can be used to reduce noise attributed to sensors. There are a few proposed methodologies of processing in the digital domain the information carried by reference pixels, as employed by the Hubble Space Telescope and the James Webb Space Telescope Projects. These methods involve using spatial and temporal statistical parameters derived from boundary reference pixel information to enhance the active (non-reference) pixel signals. To make a step beyond this heritage methodology, we apply the NASA-developed technology known as the Hilbert- Huang Transform Data Processing System (HHT-DPS) for reference pixel information processing and its utilization in reconfigurable hardware on-board a spaceflight instrument or post-processing on the ground. The methodology examines signal processing for a 2-D domain, in which high-variance components of the thermal noise are carried by both active and reference pixels, similar to that in processing of low-voltage differential signals and subtraction of a single analog reference pixel from all active pixels on the sensor. Heritage methods using the aforementioned statistical parameters in the

Development of n+-in-p planar pixel quadsensor flip-chipped with FE-I4 readout ASICs

International Nuclear Information System (INIS)

Unno, Y.; Hanagaki, K.; Hori, R.; Ikegami, Y.; Nakamura, K.; Takubo, Y.; Kamada, S.; Yamamura, K.; Yamamoto, H.; Takashima, R.; Tojo, J.; Kono, T.; Nagai, R.; Saito, S.; Sugibayashi, K.; Hirose, M.; Jinnouchi, O.; Sato, S.; Sawai, H.; Hara, K.

2017-01-01

We have developed flip-chip modules applicable to the pixel detector for the HL-LHC. New radiation-tolerant n + -in-p planar pixel sensors of a size of four FE-I4 application-specific integrated circuits (ASICs) are laid out in a 6-in wafer. Variation in readout connection for the pixels at the boundary of ASICs is implemented in the design of quadsensors. Bump bonding technology is developed for four ASICs onto one quadsensor. Both sensors and ASICs are thinned to 150 μm before bump bonding, and are held flat with vacuum chucks. Using lead-free SnAg solder bumps, we encounter deficiency with large areas of disconnected bumps after thermal stress treatment, including irradiation. Surface oxidation of the solder bumps is identified as a critical source of this deficiency after bump bonding trials, using SnAg bumps with solder flux, indium bumps, and SnAg bumps with a newly-introduced hydrogen-reflow process. With hydrogen-reflow, we establish flux-less bump bonding technology with SnAg bumps, appropriate for mass production of the flip-chip modules with thin sensors and thin ASICs.

Radiation-hard Active Pixel Sensors for HL-LHC Detector Upgrades based on HV-CMOS Technology

International Nuclear Information System (INIS)

Miucci, A; Gonzalez-Sevilla, S; Ferrere, D; Iacobucci, G; Rosa, A La; Muenstermann, D; Gonella, L; Hemperek, T; Hügging, F; Krüger, H; Obermann, T; Wermes, N; Garcia-Sciveres, M; Backhaus, M; Capeans, M; Feigl, S; Nessi, M; Pernegger, H; Ristic, B; George, M

2014-01-01

Luminosity upgrades are discussed for the LHC (HL-LHC) which would make updates to the detectors necessary, requiring in particular new, even more radiation-hard and granular, sensors for the inner detector region. A proposal for the next generation of inner detectors is based on HV-CMOS: a new family of silicon sensors based on commercial high-voltage CMOS technology, which enables the fabrication of part of the pixel electronics inside the silicon substrate itself. The main advantages of this technology with respect to the standard silicon sensor technology are: low material budget, fast charge collection time, high radiation tolerance, low cost and operation at room temperature. A traditional readout chip is still needed to receive and organize the data from the active sensor and to handle high-level functionality such as trigger management. HV-CMOS has been designed to be compatible with both pixel and strip readout. In this paper an overview of HV2FEI4, a HV-CMOS prototype in 180 nm AMS technology, will be given. Preliminary results after neutron and X-ray irradiation are shown

Implementation of a Customisable Readout Sequence for the ALICE ITS Upgrade Explorer Family Chips

CERN Document Server

Gazzari, Matthias

2014-01-01

Within the ALICE ITS upgrade R&D programme the Explorer family chips are developed featuring 11700 pixels which are split into 18 different sectors with different properties. These pixels are read out sequentially leading to a time span of 2.34ms between the first and last pixel. Due to the long readout time, shot noise induced by the leakage currents in the in-pixel analogue memories makes the comparison of different sensor implementations located in distant sectors on the Explorer family chips difficult. In order to reduce this noise contribution a customisable readout sequence is developed to read parts instead of the whole chip which reduces the overall readout time. This readout sequence is integrated in the existing characterisation framework in order to choose the best performing sensor implementation through pixel-by-pixel comparison without readout-induced effects.

An induced charge readout scheme incorporating image charge splitting on discrete pixels

International Nuclear Information System (INIS)

Kataria, D.O.; Lapington, J.S.

2003-01-01

Top hat electrostatic analysers used in space plasma instruments typically use microchannel plates (MCPs) followed by discrete pixel anode readout for the angular definition of the incoming particles. Better angular definition requires more pixels/readout electronics channels but with stringent mass and power budgets common in space applications, the number of channels is restricted. We describe here a technique that improves the angular definition using induced charge and an interleaved anode pattern. The technique adopts the readout philosophy used on the CRRES and CLUSTER I instruments but has the advantages of the induced charge scheme and significantly reduced capacitance. Charge from the MCP collected by an anode pixel is inductively split onto discrete pixels whose geometry can be tailored to suit the scientific requirements of the instrument. For our application, the charge is induced over two pixels. One of them is used for a coarse angular definition but is read out by a single channel of electronics, allowing a higher rate handling. The other provides a finer angular definition but is interleaved and hence carries the expense of lower rate handling. Using the technique and adding four channels of electronics, a four-fold increase in the angular resolution is obtained. Details of the scheme and performance results are presented

Testbeam results of irradiated ams H18 HV-CMOS pixel sensor prototypes

Science.gov (United States)

Benoit, M.; Braccini, S.; Casse, G.; Chen, H.; Chen, K.; Di Bello, F. A.; Ferrere, D.; Golling, T.; Gonzalez-Sevilla, S.; Iacobucci, G.; Kiehn, M.; Lanni, F.; Liu, H.; Meng, L.; Merlassino, C.; Miucci, A.; Muenstermann, D.; Nessi, M.; Okawa, H.; Perić, I.; Rimoldi, M.; Ristić, B.; Barrero Pinto, M. Vicente; Vossebeld, J.; Weber, M.; Weston, T.; Wu, W.; Xu, L.; Zaffaroni, E.

2018-02-01

HV-CMOS pixel sensors are a promising option for the tracker upgrade of the ATLAS experiment at the LHC, as well as for other future tracking applications in which large areas are to be instrumented with radiation-tolerant silicon pixel sensors. We present results of testbeam characterisations of the 4th generation of Capacitively Coupled Pixel Detectors (CCPDv4) produced with the ams H18 HV-CMOS process that have been irradiated with different particles (reactor neutrons and 18 MeV protons) to fluences between 1× 1014 and 5× 1015 1-MeV- neq. The sensors were glued to ATLAS FE-I4 pixel readout chips and measured at the CERN SPS H8 beamline using the FE-I4 beam telescope. Results for all fluences are very encouraging with all hit efficiencies being better than 97% for bias voltages of 85 V. The sample irradiated to a fluence of 1× 1015 neq—a relevant value for a large volume of the upgraded tracker—exhibited 99.7% average hit efficiency. The results give strong evidence for the radiation tolerance of HV-CMOS sensors and their suitability as sensors for the experimental HL-LHC upgrades and future large-area silicon-based tracking detectors in high-radiation environments.

Characterization of proton irradiated 3D-DDTC pixel sensor prototypes fabricated at FBK

CERN Document Server

La Rosa, A; Cobal, M; Betta, G -F Dalla; Da Via, C; Darbo, G; Gallrapp, C; Gemme, C; Huegging, F; Janssen, J; Micelli, A; Pernegger, H; Povoli, M; Wermes, N; Zorzi, N

2012-01-01

In this paper we discuss results relevant to 3D Double-Side Double Type Column (3D-DDTC) pixel sensors fabricated at FBK (Trento, Italy) and oriented to the ATLAS upgrade. Some assemblies of these sensors featuring different columnar electrode configurations (2, 3, or 4 columns per pixel) and coupled to the ATLAS FEI3 read-out chip were irradiated up to large proton fluences and tested in laboratory with radioactive sources. In spite of the non optimized columnar electrode overlap, sensors exhibit reasonably good charge collection properties up to an irradiation fluence of 2 x 10**15 neq/cm2, while requiring bias voltages in the order of 100 V. Sensor operation is further investigated by means of TCAD simulations which can effectively explain the basic mechanisms responsible for charge loss after irradiation.

Silicon sensors for the upgrades of the CMS pixel detector

International Nuclear Information System (INIS)

Centis Vignali, Matteo

2015-12-01

The Compact Muon Solenoid (CMS) is a general purpose detector at the Large Hadron Collider (LHC). The LHC luminosity is constantly increased through upgrades of the accelerator and its injection chain. Two major upgrades will take place in the next years. The first upgrade involves the LHC injector chain and allows the collider to achieve a luminosity of about 2.10 34 cm -2 s -1 . A further upgrade of the LHC foreseen for 2025 will boost its luminosity to 5.10 34 cm -2 s -1 . As a consequence of the increased luminosity, the detectors need to be upgraded. In particular, the CMS pixel detector will undergo two upgrades in the next years. The first upgrade (phase I) consists in the substitution of the current pixel detector in winter 2016/2017. The upgraded pixel detector will implement new readout electronics that allow efficient data taking up to a luminosity of 2.10 34 cm -2 s -1 , twice as much as the LHC design luminosity. The modules that will constitute the upgraded detector are being produced at different institutes. Hamburg (University and DESY) is responsible for the production of 350 pixel modules. The second upgrade (phase II) of the pixel detector is foreseen for 2025. The innermost pixel layer of the upgraded detector will accumulate a radiation damage corresponding to an equivalent fluence of Φ eq =2.10 16 cm -2 and a dose of ∼10 MGy after an integrated luminosity of 3000 fb -1 . Several groups are investigating sensor designs and configurations able to withstand such high doses and fluences. This work is divided into two parts related to important aspects of the upgrades of the CMS pixel detector. For the phase I upgrade, a setup has been developed to provide an absolute energy calibration of the pixel modules that will constitute the detector. The calibration is obtained using monochromatic X-rays. The same setup is used to test the buffering capabilities of the modules' readout chip. The maximum rate experienced by the modules produced in

Readout electronics for low dark count pixel detectors based on Geiger mode avalanche photodiodes fabricated in conventional CMOS technologies for future linear colliders

International Nuclear Information System (INIS)

Vilella, E.; Arbat, A.; Comerma, A.; Trenado, J.; Alonso, O.; Gascon, D.; Vila, A.; Garrido, L.; Dieguez, A.

2011-01-01

High sensitivity and excellent timing accuracy of the Geiger mode avalanche photodiodes make them ideal sensors as pixel detectors for particle tracking in high energy physics experiments to be performed in future linear colliders. Nevertheless, it is well known that these sensors suffer from dark counts and afterpulsing noise, which induce false hits (indistinguishable from event detection) as well as an increase in the necessary area of the readout system. In this work, we present a comparison between APDs fabricated in a high voltage 0.35 μm and a high integration 0.13 μm commercially available CMOS technologies that has been performed to determine which of them best fits the particle collider requirements. In addition, a readout circuit that allows low noise operation is introduced. Experimental characterization of the proposed pixel is also presented in this work.

New generation of monolithic active pixel sensors for charged particle detection

International Nuclear Information System (INIS)

Deptuch, G.

2002-09-01

Vertex detectors are of great importance in particle physics experiments, as the knowledge of the event flavour is becoming an issue for the physics programme at Future Linear Colliders. Monolithic Active Pixel Sensors (MAPS) based on a novel detector structure have been proposed. Their fabrication is compatible with a standard CMOS process. The sensor is inseparable from the readout electronics, since both of them are integrated on the same, low-resistivity silicon wafer. The basic pixel configuration comprises only three MOS transistors and a diode collecting the charge through thermal diffusion. The charge is generated in the thin non-depleted epitaxial layer underneath the readout electronics. This approach provides, at low cost, a high resolution and thin device with the whole area sensitive to radiation. Device simulations using the ISE-TCAD package have been carried out to study the charge collection mechanism. In order to demonstrate the viability of the technique, four prototype chips have been fabricated using different submicrometer CMOS processes. The pixel gain has been calibrated using a 55 Fe source and the Poisson sequence method. The prototypes have been exposed to high-energy particle beams at CERN. The tests proved excellent detection performances expressed in a single-track spatial resolution of 1.5 μm and detection efficiency close to 100%, resulting from a SNR ratio of more than 30. Irradiation tests showed immunity of MAPS to a level of a few times 10 12 n/cm 2 and a few hundred kRad of ionising radiation. The ideas for future work, including on-pixel signal amplification, double sampling operation and current mode pixel design are present as well. (author)

Development of thin pixel sensors and a novel interconnection technology for the SLHC

International Nuclear Information System (INIS)

Macchiolo, A.; Andricek, L.; Beimforde, M.; Dubbert, J.; Ghodbane, N.; Kortner, O.; Kroha, H.; Moser, H.G.; Nisius, R.; Richter, R.H.

2008-01-01

We present an R and D activity aiming to develop a new detector concept in the framework of the ATLAS pixel detector upgrade in view of the Super-LHC. The new devices combine 75-150 μm thick pixels sensors with a vertical integration technology. A new production of thin pixel sensors on n- and p-type material is under way at the MPI Semiconductor Laboratory. These devices will be connected to the ATLAS read-out electronics with the new Solid-Liquid InterDiffusion technique as an alternative to the bump-bonding process. We also plan for the signals to be extracted from the back of the electronics wafer through Inter-Chip-Vias. The compatibility of the Solid-Liquid InterDiffusion process with the silicon sensor functionality has already been demonstrated by measurements on two wafers hosting diodes with an active thickness of 50 μm

Noise analysis of a novel hybrid active-passive pixel sensor for medical X-ray imaging

International Nuclear Information System (INIS)

Safavian, N.; Izadi, M.H.; Sultana, A.; Wu, D.; Karim, K.S.; Nathan, A.; Rowlands, J.A.

2009-01-01

Passive pixel sensor (PPS) is one of the most widely used architectures in large area amorphous silicon (a-Si) flat panel imagers. It consists of a detector and a thin film transistor (TFT) acting as a readout switch. While the PPS is advantageous in terms of providing a simple and small architecture suitable for high-resolution imaging, it directly exposes the signal to the noise of data line and external readout electronics, causing significant increase in the minimum readable sensor input signal. In this work we present the operation and noise performance of a hybrid 3-TFT current programmed, current output active pixel sensor (APS) suitable for real-time X-ray imaging. The pixel circuit extends the application of a-Si TFT from conventional switching element to on-pixel amplifier for enhanced signal-to-noise ratio and higher imager dynamic range. The capability of operation in both passive and active modes as well as being able to compensate for inherent instabilities of the TFTs makes the architecture a good candidate for X-ray imaging modalities with a wide range of incoming X-ray intensities. Measurement and theoretical calculations reveal a value for input refferd noise below the 1000 electron noise limit for real-time fluoroscopy. (copyright 2009 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim) (orig.)

A pixel design for X-ray imaging with CdTe sensors

Energy Technology Data Exchange (ETDEWEB)

Lambropoulos, C.P.; Zervakis, E.G. [Technological Educational Institute of Halkis, Psahna - Evia (Greece); Loukas, D. [Institute of Nuclear Physics, NCSR Demokritos, Agia Paraskevi - Attiki (Greece)

2008-07-01

A readout architecture appropriate for X-ray Imaging using charge integration has been designed. Each pixel consists of a capacitive transimpedance amplifier, a sample and hold circuit a comparator and an 8 bit DRAM. Pixel level A/D conversion and local storage of the digitized signal is performed. The target sensors are 100{mu}m x 100 {mu}m CdTe pixel detectors and integration time of 1ms or less can be achieved. Special measures have been taken to minimize the gain fixed pattern noise and the reset noise, while purely digital correlation double sampling can be performed. (copyright 2008 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim) (orig.)

A pixel design for X-ray imaging with CdTe sensors

International Nuclear Information System (INIS)

Lambropoulos, C.P.; Zervakis, E.G.; Loukas, D.

2008-01-01

A readout architecture appropriate for X-ray Imaging using charge integration has been designed. Each pixel consists of a capacitive transimpedance amplifier, a sample and hold circuit a comparator and an 8 bit DRAM. Pixel level A/D conversion and local storage of the digitized signal is performed. The target sensors are 100μm x 100 μm CdTe pixel detectors and integration time of 1ms or less can be achieved. Special measures have been taken to minimize the gain fixed pattern noise and the reset noise, while purely digital correlation double sampling can be performed. (copyright 2008 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim) (orig.)

Digital Power Consumption Estimations for CHIPIX65 Pixel Readout Chip

CERN Document Server

Marcotulli, Andrea

2016-01-01

New hybrid pixel detectors with improved resolution capable of dealing with hit rates up to 3 GHz/cm2 will be required for future High Energy Physics experiments in the Large Hadron Collider (LHC) at CERN. Given this, the RD53 collaboration works on the design of the next generation pixel readout chip needed for both the ATLAS and CMS detector phase 2 pixel upgrades. For the RD53 demonstrator chip in 65nm CMOS technology, different architectures are considered. In particular the purpose of this work is estimating the power consumption of the digital architecture of the readout ASIC developed by CHIPIX65 project of the INFN National Scientific Committee. This has been done with modern chip design tools integrated with the VEPIX53 simulation framework that has been developed within the RD53 collaboration in order to assess the performance of the system in very high rate, high energy physics experiments.

High-QE fast-readout wavefront sensor with analog phase reconstruction

Science.gov (United States)

Baker, Jeffrey T.; Loos, Gary C.; Restaino, Sergio R.; Percheron, Isabelle; Finkner, Lyle G.

1998-09-01

The contradiction inherent in high temporal bandwidth adaptive optics wavefront sensing at low-light-levels (LLL) has driven many researchers to consider the use of high bandwidth high quantum efficiency (QE) CCD cameras with the lowest possible readout noise levels. Unfortunately, the performance of these relatively expensive and low production volume devices in the photon counting regime is inevitably limited by readout noise, no matter how arbitrarily close to zero that specification may be reduced. Our alternative approach is to optically couple a new and relatively inexpensive Ultra Blue Gen III image intensifier to an also relatively inexpensive high bandwidth CCD camera with only moderate QE and high rad noise. The result is a high bandwidth broad spectral response image intensifier with a gain of 55,000 at 560 nm. Use of an appropriately selected lenslet array together with coupling optics generates 16 X 16 Shack-Hartmann type subapertures on the image intensifier photocathode, which is imaged onto the fast CCD camera. An integral A/D converter in the camera sends the image data pixel by pixel to a computer data acquisition system for analysis, storage and display. Timing signals are used to decode which pixel is being rad out and the wavefront is calculated in an analog fashion using a least square fit to both x and y tilt data for all wavefront sensor subapertures. Finally, we present system level performance comparisons of these new concept wavefront sensors versus the more standard low noise CCD camera based designs in the low-light-level limit.

A 2D 4×4 Channel Readout ASIC for Pixelated CdTe Detectors for Medical Imaging Applications.

Science.gov (United States)

Macias-Montero, Jose-Gabriel; Sarraj, Maher; Chmeissani, Mokhtar; Martínez, Ricardo; Puigdengoles, Carles

2015-10-01

We present a 16-channel readout integrated circuit (ROIC) with nanosecond-resolution time to digital converter (TDC) for pixelated Cadmium Telluride (CdTe) gamma-ray detectors. The 4 × 4 pixel array ROIC is the proof of concept of the 10 × 10 pixel array readout ASIC for positron-emission tomography (PET) scanner, positron-emission mammography (PEM) scanner, and Compton gamma camera. The electronics of each individual pixel integrates an analog front-end with switchable gain, an analog to digital converter (ADC), configuration registers, and a 4-state digital controller. For every detected photon, the pixel electronics provides the energy deposited in the detector with 10-bit resolution, and a fast trigger signal for time stamp. The ASIC contains the 16-pixel matrix electronics, a digital controller, five global voltage references, a TDC, a temperature sensor, and a band-gap based current reference. The ASIC has been fabricated with TSMC 0.25 μ m mixed-signal CMOS technology and occupies an area of 5.3 mm × 6.8 mm. The TDC shows a resolution of 95.5 ps, a precision of 600 ps at full width half maximum (FWHM), and a power consumption of 130 μ W. In acquisition mode, the total power consumption of every pixel is 200 μ W. An equivalent noise charge (ENC) of 160 e - RMS at maximum gain and negative polarity conditions has been measured at room temperature.

Development of CMOS pixel sensors for tracking and vertexing in high energy physics experiments

CERN Document Server

Senyukov, Serhiy; Besson, Auguste; Claus, Giles; Cousin, Loic; Dulinski, Wojciech; Goffe, Mathieu; Hippolyte, Boris; Maria, Robert; Molnar, Levente; Sanchez Castro, Xitzel; Winter, Marc

2014-01-01

CMOS pixel sensors (CPS) represent a novel technological approach to building charged particle detectors. CMOS processes allow to integrate a sensing volume and readout electronics in a single silicon die allowing to build sensors with a small pixel pitch ($\\sim 20 \\mu m$) and low material budget ($\\sim 0.2-0.3\\% X_0$) per layer. These characteristics make CPS an attractive option for vertexing and tracking systems of high energy physics experiments. Moreover, thanks to the mass production industrial CMOS processes used for the manufacturing of CPS the fabrication construction cost can be significantly reduced in comparison to more standard semiconductor technologies. However, the attainable performance level of the CPS in terms of radiation hardness and readout speed is mostly determined by the fabrication parameters of the CMOS processes available on the market rather than by the CPS intrinsic potential. The permanent evolution of commercial CMOS processes towards smaller feature sizes and high resistivity ...

Design and characterization of novel monolithic pixel sensors for the ALICE ITS upgrade

CERN Document Server

Cavicchioli, C; Giubilato, P; Hillemanns, H; Junique, A; Kugathasan, T; Mager, M; Marin Tobon, C A; Martinengo, P; Mattiazzo, S; Mugnier, H; Musa, L; Pantano, D; Rousset, J; Reidt, F; Riedler, P; Snoeys, W; Van Hoorne, J W; Yang, P

2014-01-01

Within the R&D activities for the upgrade of the ALICE Inner Tracking System (ITS), Monolithic Active Pixel Sensors (MAPS) are being developed and studied, due to their lower material budget (~0.3%X0~0.3%X0 in total for each inner layer) and higher granularity (View the MathML source~20μm×20μm pixels) with respect to the present pixel detector. This paper presents the design and characterization results of the Explorer0 chip, manufactured in the TowerJazz 180 nm CMOS Imaging Sensor process, based on a wafer with high-resistivity View the MathML source(ρ>1kΩcm) and 18 μm thick epitaxial layer. The chip is organized in two sub-matrices with different pixel pitches (20 μm and 30 μm), each of them containing several pixel designs. The collection electrode size and shape, as well as the distance between the electrode and the surrounding electronics, are varied; the chip also offers the possibility to decouple the charge integration time from the readout time, and to change the sensor bias. The charge c...

Characterization of proton irradiated 3D-DDTC pixel sensor prototypes fabricated at FBK

Energy Technology Data Exchange (ETDEWEB)

La Rosa, A., E-mail: alessandro.larosa@cern.ch [CERN, Geneva 23, CH-1211 (Switzerland); Boscardin, M. [Fondazione Bruno Kessler, FBK-CMM, Via Sommarive 18, I-38123 Trento (Italy); Cobal, M. [Universita degli Studi di Udine and INFN Trieste, Gruppo Collegato di Udine, Via delle Scienze 208, I-33100 Udine (Italy); Dalla Betta, G.-F. [DISI, Universita degli Studi di Trento and INFN Padova, Gruppo Collegato d Trento, Via Sommarive 14, I-38123 Trento (Italy); Da Via, C. [School of Physics and Astronomy, University of Manchester, Oxford Road, Manchester M13 9PL (United Kingdom); Darbo, G. [INFN Sezione di Genova, Via Dodecaneso 33, I-14146 Genova (Italy); Gallrapp, C. [CERN, Geneva 23, CH-1211 (Switzerland); Gemme, C. [INFN Sezione di Genova, Via Dodecaneso 33, I-14146 Genova (Italy); Huegging, F.; Janssen, J. [Physikalisches Institut, Universitaet Bonn, Nussallee 12, D-53115 Bonn (Germany); Micelli, A. [Universita degli Studi di Udine and INFN Trieste, Gruppo Collegato di Udine, Via delle Scienze 208, I-33100 Udine (Italy); Pernegger, H. [CERN, Geneva 23, CH-1211 (Switzerland); Povoli, M. [DISI, Universita degli Studi di Trento and INFN Padova, Gruppo Collegato d Trento, Via Sommarive 14, I-38123 Trento (Italy); Wermes, N. [Physikalisches Institut, Universitaet Bonn, Nussallee 12, D-53115 Bonn (Germany); Zorzi, N. [Fondazione Bruno Kessler, FBK-CMM, Via Sommarive 18, I-38123 Trento (Italy)

2012-07-21

In this paper we discuss results relevant to 3D Double-Side Double Type Column (3D-DDTC) pixel sensors fabricated at FBK (Trento, Italy) and oriented to the ATLAS upgrade. Some assemblies of these sensors featuring different columnar electrode configurations (2, 3, or 4 columns per pixel) and coupled to the ATLAS FEI3 read-out chip were irradiated up to large proton fluences and tested in laboratory with radioactive sources. In spite of the non-optimized columnar electrode overlap, sensors exhibit reasonably good charge collection properties up to an irradiation fluence of 2 Multiplication-Sign 10{sup 15}n{sub eq}cm{sup -2}, while requiring bias voltages in the order of 100 V. Sensor operation is further investigated by means of TCAD simulations which can effectively explain the basic mechanisms responsible for charge loss after irradiation.

Dead-time free pixel readout architecture for ATLAS front-end IC

CERN Document Server

Einsweiler, Kevin F; Kleinfelder, S A; Luo, L; Marchesini, R; Milgrome, O; Pengg, F X

1999-01-01

A low power sparse scan readout architecture has been developed for the ATLAS pixel front-end IC. The architecture supports a dual discriminator and extracts the time over threshold (TOT) information along with a 2-D spatial address $9 of the hits associating them with a unique 7-bit beam crossing number. The IC implements level-1 trigger filtering along with event building (grouping together all hits in a beam crossing) in the end of column (EOC) buffer. The $9 events are transmitted over a 40 MHz serial data link with the protocol supporting buffer overflow handling by appending error flags to events. This mixed-mode full custom IC is implemented in 0.8 mu HP process to meet the $9 requirements for the pixel readout in the ATLAS inner detector. The circuits have been tested and the IC provides dead-time-less ambiguity free readout at 40 MHz data rate.

Noise Reduction Effect of Multiple-Sampling-Based Signal-Readout Circuits for Ultra-Low Noise CMOS Image Sensors

Directory of Open Access Journals (Sweden)

Shoji Kawahito

2016-11-01

Full Text Available This paper discusses the noise reduction effect of multiple-sampling-based signal readout circuits for implementing ultra-low-noise image sensors. The correlated multiple sampling (CMS technique has recently become an important technology for high-gain column readout circuits in low-noise CMOS image sensors (CISs. This paper reveals how the column CMS circuits, together with a pixel having a high-conversion-gain charge detector and low-noise transistor, realizes deep sub-electron read noise levels based on the analysis of noise components in the signal readout chain from a pixel to the column analog-to-digital converter (ADC. The noise measurement results of experimental CISs are compared with the noise analysis and the effect of noise reduction to the sampling number is discussed at the deep sub-electron level. Images taken with three CMS gains of two, 16, and 128 show distinct advantage of image contrast for the gain of 128 (noise(median: 0.29 e−rms when compared with the CMS gain of two (2.4 e−rms, or 16 (1.1 e−rms.

Test beam analysis of ultra-thin hybrid pixel detector assemblies with Timepix readout ASICs

CERN Document Server

Alipour Tehrani, Niloufar; Dannheim, Dominik; Firu, Elena; Kulis, Szymon; Redford, Sophie; Sicking, Eva

2016-01-01

The requirements for the vertex detector at the proposed Compact Linear Collider imply a very small material budget: less than 0.2% of a radiation length per detection layer including services and mechanical supports. We present here a study using Timepix readout ASICs hybridised to pixel sensors of 50 − 500 μm thickness, including assemblies with 100 μm thick sensors bonded to thinned 100μm thick ASICs. Sensors from three producers (Advacam, Micron Semiconductor Ltd, Canberra) with different edge termination technologies (active edge, slim edge) were bonded to Timepix ASICs. These devices were characterised with the EUDET telescope at the DESY II test beam using 5.6 GeV electrons. Their performance for the detection and tracking of minimum ionising particles was evaluated in terms of charge sharing, detection efficiency, single-point resolution and energy deposition.

Results from a prototype MAPS sensor telescope and readout system with zero suppression for the heavy flavor tracker at STAR

International Nuclear Information System (INIS)

Greiner, L.; Matis, H.S.; Ritter, H.G.; Rose, A.; Stezelberger, T.; Sun, X.; Szelezniak, M.; Thomas, J.; Vu, C.; Wieman, H.

2008-01-01

We describe a three Mimostar-2 Monolithic Active Pixel Sensor (MAPS) sensor telescope prototype with an accompanying readout system incorporating on-the-fly data sparsification. The system has been characterized and we report on the measured performance of the sensor telescope and readout system in beam tests conducted both at the Advanced Light Source (ALS) at Lawrence Berkeley National Laboratory (LBNL) and in the STAR experiment at the Relativistic Heavy Ion Collider (RHIC). This effort is part of the development and prototyping work that will lead to a vertex detector for the STAR experiment

Study of Charge Diffusion in a Silicon Detector Using an Energy Sensitive Pixel Readout Chip

CERN Document Server

Schioppa, E. J.; van Beuzekom, M.; Visser, J.; Koffeman, E.; Heijne, E.; Engel, K. J.; Uher, J.

2015-01-01

A 300 μm thick thin p-on-n silicon sensor was connected to an energy sensitive pixel readout ASIC and exposed to a beam of highly energetic charged particles. By exploiting the spectral information and the fine segmentation of the detector, we were able to measure the evolution of the transverse profile of the charge carriers cloud in the sensor as a function of the drift distance from the point of generation. The result does not rely on model assumptions or electric field calculations. The data are also used to validate numerical simulations and to predict the detector spectral response to an X-ray fluorescence spectrum for applications in X-ray imaging.

Digital column readout architecture for the ATLAS pixel 025 mum front end IC

CERN Document Server

Mandelli, E; Blanquart, L; Comes, G; Denes, P; Einsweiler, Kevin F; Fischer, P; Marchesini, R; Meddeler, G; Peric, I

2002-01-01

A fast low noise, limited power, radiation-hard front-end chip was developed for reading out the Atlas Pixel Silicon Detector. As in the past prototypes, every chip is used to digitize and read out charge and time information from hits on each one of its 2880 inputs. The basic column readout architecture idea was adopted and modified to allow a safe transition to quarter micron technology. Each pixel cell, organized in a 160 multiplied by 18 matrix, can be independently enabled and configured in order to optimize the analog signal response and to prevent defective pixels from saturating the readout. The digital readout organizes hit data coming from each column, with respect to time, and output them on a low-level serial interface. A considerable effort was made to design state machines free of undefined states, where single-point defects and charge deposited by heavy ions in the silicon could have led to unpredicted forbidden states. 7 Refs.

RD Collaboration Proposal: Development of pixel readout integrated circuits for extreme rate and radiation

CERN Document Server

Chistiansen, J (CERN)

2013-01-01

This proposal describes a new RD collaboration to develop the next genrration of hybrid pixel readout chips for use in ATLAS and CMS PHase 2 upgrades. extrapolation of hybrid pixel technology to the HL-LHC presents major challenges on several fronts. Challenges include: smaller pixels to resolve tracks in boosted jets, much higher hit rates (1-2 GHz/cm2 ), unprecedented radiation tolerance (10 MGy), much higher output bandwidth, and large IC format with low power consumption in order to instrument large areas while keeping the material budget low. This collaboration is specifically focused on design of hybrid pixel readout chips, and not on more general chip design or on other aspects of hybrid pixel technology. Participants include 7 institutes on ATLAS and 7 on CMS, plus 2 on both experiments.

Evaluation of testing strategies for the radiation tolerant ATLAS n **+-in-n pixel sensor

CERN Document Server

Klaiber Lodewigs, Jonas M

2003-01-01

The development of particle tracker systems for high fluence environments in new high-energy physics experiments raises new challenges for the development, manufacturing and reliable testing of radiation tolerant components. The ATLAS pixel detector for use at the LHC, CERN, is designed to cover an active sensor area of 1.8 m**2 with 1.1 multiplied by 10 **8 read-out channels usable for a particle fluence up to 10 **1**5 cm**-**2 (1 MeV neutron equivalent) and an ionization dose up to 500 kGy of mainly charged hadron radiation. To cope with such a harsh environment the ATLAS Pixel Collaboration has developed a radiation hard n **+-in-n silicon pixel cell design with a standard cell size of 50 multiplied by 400 mum**2. Using this design on an oxygenated silicon substrate, sensor production has started in 2001. This contribution describes results gained during the development of testing procedures of the ATLAS pixel sensor and evaluates quality assurance procedures regarding their relevance for detector operati...

CVD diamond pixel detectors for LHC experiments

Energy Technology Data Exchange (ETDEWEB)

Wedenig, R.; Adam, W.; Bauer, C.; Berdermann, E.; Bergonzo, P.; Bogani, F.; Borchi, E.; Brambilla, A.; Bruzzi, M.; Colledani, C.; Conway, J.; Dabrowski, W.; Delpierre, P.; Deneuville, A.; Dulinski, W.; Eijk, B. van; Fallou, A.; Fizzotti, F.; Foulon, F.; Friedl, M.; Gan, K.K.; Gheeraert, E.; Grigoriev, E.; Hallewell, G.; Hall-Wilton, R.; Han, S.; Hartjes, F.; Hrubec, J.; Husson, D.; Kagan, H.; Kania, D.; Kaplon, J.; Karl, C.; Kass, R.; Knoepfle, K.T.; Krammer, M.; Logiudice, A.; Lu, R.; Manfredi, P.F.; Manfredotti, C.; Marshall, R.D.; Meier, D.; Mishina, M.; Oh, A.; Pan, L.S.; Palmieri, V.G.; Pernicka, M.; Peitz, A.; Pirollo, S.; Polesello, P.; Pretzl, K.; Procario, M.; Re, V.; Riester, J.L.; Roe, S.; Roff, D.; Rudge, A.; Runolfsson, O.; Russ, J.; Schnetzer, S.; Sciortino, S.; Speziali, V.; Stelzer, H.; Stone, R.; Suter, B.; Tapper, R.J.; Tesarek, R.; Trawick, M.; Trischuk, W.; Vittone, E.; Wagner, A.; Walsh, A.M.; Weilhammer, P.; White, C.; Zeuner, W.; Ziock, H.; Zoeller, M.; Blanquart, L.; Breugnion, P.; Charles, E.; Ciocio, A.; Clemens, J.C.; Dao, K.; Einsweiler, K.; Fasching, D.; Fischer, P.; Joshi, A.; Keil, M.; Klasen, V.; Kleinfelder, S.; Laugier, D.; Meuser, S.; Milgrome, O.; Mouthuy, T.; Richardson, J.; Sinervo, P.; Treis, J.; Wermes, N

1999-08-01

This paper reviews the development of CVD diamond pixel detectors. The preparation of the diamond pixel sensors for bump-bonding to the pixel readout electronics for the LHC and the results from beam tests carried out at CERN are described.

CVD diamond pixel detectors for LHC experiments

International Nuclear Information System (INIS)

Wedenig, R.; Adam, W.; Bauer, C.; Berdermann, E.; Bergonzo, P.; Bogani, F.; Borchi, E.; Brambilla, A.; Bruzzi, M.; Colledani, C.; Conway, J.; Dabrowski, W.; Delpierre, P.; Deneuville, A.; Dulinski, W.; Eijk, B. van; Fallou, A.; Fizzotti, F.; Foulon, F.; Friedl, M.; Gan, K.K.; Gheeraert, E.; Grigoriev, E.; Hallewell, G.; Hall-Wilton, R.; Han, S.; Hartjes, F.; Hrubec, J.; Husson, D.; Kagan, H.; Kania, D.; Kaplon, J.; Karl, C.; Kass, R.; Knoepfle, K.T.; Krammer, M.; Logiudice, A.; Lu, R.; Manfredi, P.F.; Manfredotti, C.; Marshall, R.D.; Meier, D.; Mishina, M.; Oh, A.; Pan, L.S.; Palmieri, V.G.; Pernicka, M.; Peitz, A.; Pirollo, S.; Polesello, P.; Pretzl, K.; Procario, M.; Re, V.; Riester, J.L.; Roe, S.; Roff, D.; Rudge, A.; Runolfsson, O.; Russ, J.; Schnetzer, S.; Sciortino, S.; Speziali, V.; Stelzer, H.; Stone, R.; Suter, B.; Tapper, R.J.; Tesarek, R.; Trawick, M.; Trischuk, W.; Vittone, E.; Wagner, A.; Walsh, A.M.; Weilhammer, P.; White, C.; Zeuner, W.; Ziock, H.; Zoeller, M.; Blanquart, L.; Breugnion, P.; Charles, E.; Ciocio, A.; Clemens, J.C.; Dao, K.; Einsweiler, K.; Fasching, D.; Fischer, P.; Joshi, A.; Keil, M.; Klasen, V.; Kleinfelder, S.; Laugier, D.; Meuser, S.; Milgrome, O.; Mouthuy, T.; Richardson, J.; Sinervo, P.; Treis, J.; Wermes, N.

1999-01-01

This paper reviews the development of CVD diamond pixel detectors. The preparation of the diamond pixel sensors for bump-bonding to the pixel readout electronics for the LHC and the results from beam tests carried out at CERN are described

An Over 90 dB Intra-Scene Single-Exposure Dynamic Range CMOS Image Sensor Using a 3.0 μm Triple-Gain Pixel Fabricated in a Standard BSI Process.

Science.gov (United States)

Takayanagi, Isao; Yoshimura, Norio; Mori, Kazuya; Matsuo, Shinichiro; Tanaka, Shunsuke; Abe, Hirofumi; Yasuda, Naoto; Ishikawa, Kenichiro; Okura, Shunsuke; Ohsawa, Shinji; Otaka, Toshinori

2018-01-12

To respond to the high demand for high dynamic range imaging suitable for moving objects with few artifacts, we have developed a single-exposure dynamic range image sensor by introducing a triple-gain pixel and a low noise dual-gain readout circuit. The developed 3 μm pixel is capable of having three conversion gains. Introducing a new split-pinned photodiode structure, linear full well reaches 40 ke - . Readout noise under the highest pixel gain condition is 1 e - with a low noise readout circuit. Merging two signals, one with high pixel gain and high analog gain, and the other with low pixel gain and low analog gain, a single exposure dynamic rage (SEHDR) signal is obtained. Using this technology, a 1/2.7", 2M-pixel CMOS image sensor has been developed and characterized. The image sensor also employs an on-chip linearization function, yielding a 16-bit linear signal at 60 fps, and an intra-scene dynamic range of higher than 90 dB was successfully demonstrated. This SEHDR approach inherently mitigates the artifacts from moving objects or time-varying light sources that can appear in the multiple exposure high dynamic range (MEHDR) approach.

A monolithic pixel sensor (TRAPPISTe-2) for particle physics instrumentation in OKI 0.2μm SOI technology

Science.gov (United States)

Soung Yee, L.; Alvarez, P.; Martin, E.; Cortina, E.; Ferrer, C.

2012-12-01

A monolithic active pixel sensor for charged particle tracking has been developed within the frame of a research and development project called TRAPPISTe (Tracking Particles for Physics Instrumentation in SOI Technology). TRAPPISTe aims to study the feasibility of developing a monolithic pixel sensor with SOI technology. TRAPPISTe-2 is the second prototype in this series and was fabricated with an OKI 0.20μm fully depleted (FD-SOI) CMOS process. This device contains test transistors and amplifiers, as well as two pixel matrices with integrated 3-transistor and amplifier readout electronics. The results presented are based on the first electrical measurements performed on the test structures and laser measurements on the pixel matrices.

The NA62 Gigatracker: Detector properties and pixel read-out architectures

International Nuclear Information System (INIS)

Fiorini, M.; Carassiti, V.; Ceccucci, A.; Cortina, E.; Cotta Ramusino, A.; Dellacasa, G.; Jarron, P.; Kaplon, J.; Kluge, A.; Marchetto, F.; Martin, E.; Martoiu, S.; Mazza, G.; Noy, M.; Petrucci, F.; Riedler, P.; Rivetti, A.; Tiuraniemi, S.

2010-01-01

The beam spectrometer of the NA62 experiment, named Gigatracker, has to perform single track reconstruction with unprecedented time resolution (150 ps rms) in a harsh radiation environment. To meet these requirements, and in order to reduce material budget to a minimum, three hybrid silicon pixel detector stations will be installed in vacuum. An adequate strategy to compensate for the discriminator time-walk must be implemented and R and D investigating two different options is ongoing. Two read-out chip prototypes have been designed in order to compare their performance: one approach is based on the use of a constant-fraction discriminator followed by an on-pixel TDC, while the other one is based on the use of a time-over-threshold circuit followed by a TDC shared by a group of pixels. This paper describes the Gigatracker system, presents the global architectures of both read-out ASICs and reviews the current status of the R and D project.

A high speed, low power consumption LVDS interface for CMOS pixel sensors

Energy Technology Data Exchange (ETDEWEB)

Shi, Zhan, E-mail: sz1134@163.com [Dalian University of Technology, No. 2 Linggong Road, 116024 Dalian (China); Tang, Zhenan, E-mail: tangza@dlut.edu.cn [Dalian University of Technology, No. 2 Linggong Road, 116024 Dalian (China); Tian, Yong [Dalian University of Technology, No. 2 Linggong Road, 116024 Dalian (China); Pham, Hung; Valin, Isabelle; Jaaskelainen, Kimmo [IPHC, 23 rue du Loess 67037 Strasbourg (France); CNRS, UMR7178, 67037 Strasbourg (France)

2015-01-01

The use of CMOS Pixel Sensors (CPSs) offers a promising approach to the design of vertex detectors in High Energy Physics (HEP) experiments. As the CPS equipping the upgraded Solenoidal Tracker at RHIC (STAR) pixel detector, ULTIMATE perfectly illustrates the potential of CPSs for HEP applications. However, further development of CPSs with respect to readout speed is required to fulfill the readout time requirement of the next generation HEP detectors, such as the upgrade of A Large Ion Collider Experiment (ALICE) Inner Tracking System (ITS), the International Linear Collider (ILC), and the Compressed Baryonic Matter (CBM) vertex detectors. One actual limitation of CPSs is related to the speed of the Low-Voltage Differential Signaling (LVDS) circuitry implementing the interface between the sensor and the Data Acquisition (DAQ) system. To improve the transmission rate while keeping the power consumption at a low level, a source termination technique and a special current comparator were adopted for the LVDS driver and receiver, respectively. Moreover, hardening techniques are used. The circuitry was designed and submitted for fabrication in a 0.18-µm CMOS Image Sensor (CIS) process at the end of 2011. The test results indicated that the LVDS driver and receiver can operate properly at the data rate of 1.2 Gb/s with power consumption of 19.6 mW.

A Full Parallel Event Driven Readout Technique for Area Array SPAD FLIM Image Sensors

Directory of Open Access Journals (Sweden)

Kaiming Nie

2016-01-01

Full Text Available This paper presents a full parallel event driven readout method which is implemented in an area array single-photon avalanche diode (SPAD image sensor for high-speed fluorescence lifetime imaging microscopy (FLIM. The sensor only records and reads out effective time and position information by adopting full parallel event driven readout method, aiming at reducing the amount of data. The image sensor includes four 8 × 8 pixel arrays. In each array, four time-to-digital converters (TDCs are used to quantize the time of photons’ arrival, and two address record modules are used to record the column and row information. In this work, Monte Carlo simulations were performed in Matlab in terms of the pile-up effect induced by the readout method. The sensor’s resolution is 16 × 16. The time resolution of TDCs is 97.6 ps and the quantization range is 100 ns. The readout frame rate is 10 Mfps, and the maximum imaging frame rate is 100 fps. The chip’s output bandwidth is 720 MHz with an average power of 15 mW. The lifetime resolvability range is 5–20 ns, and the average error of estimated fluorescence lifetimes is below 1% by employing CMM to estimate lifetimes.

CVD diamond pixel detectors for LHC experiments

CERN Document Server

Wedenig, R; Bauer, C; Berdermann, E; Bergonzo, P; Bogani, F; Borchi, E; Brambilla, A; Bruzzi, Mara; Colledani, C; Conway, J; Dabrowski, W; Delpierre, P A; Deneuville, A; Dulinski, W; van Eijk, B; Fallou, A; Fizzotti, F; Foulon, F; Friedl, M; Gan, K K; Gheeraert, E; Grigoriev, E; Hallewell, G D; Hall-Wilton, R; Han, S; Hartjes, F G; Hrubec, Josef; Husson, D; Kagan, H; Kania, D R; Kaplon, J; Karl, C; Kass, R; Knöpfle, K T; Krammer, Manfred; Lo Giudice, A; Lü, R; Manfredi, P F; Manfredotti, C; Marshall, R D; Meier, D; Mishina, M; Oh, A; Pan, L S; Palmieri, V G; Pernicka, Manfred; Peitz, A; Pirollo, S; Polesello, P; Pretzl, Klaus P; Procario, M; Re, V; Riester, J L; Roe, S; Roff, D G; Rudge, A; Runólfsson, O; Russ, J; Schnetzer, S R; Sciortino, S; Speziali, V; Stelzer, H; Stone, R; Suter, B; Tapper, R J; Tesarek, R J; Trawick, M L; Trischuk, W; Vittone, E; Wagner, A; Walsh, A M; Weilhammer, Peter; White, C; Zeuner, W; Ziock, H J; Zöller, M

1999-01-01

This paper reviews the development of CVD diamond pixel detectors. The preparation of the diamond pixel sensors for bump-bonding to the pixel readout electronics for the LHC and the results from beam tests carried out at CERN are described. (9 refs).

Recent progress in the development of a B-factory monolithic active pixel detector

International Nuclear Information System (INIS)

Stanic, S.; Aihara, H.; Barbero, M.; Bozek, A.; Browder, T.; Hazumi, M.; Kennedy, J.; Kent, N.; Olsen, S.; Palka, H.; Rosen, M.; Ruckman, L.; Trabelsi, K.; Tsuboyama, T.; Uchida, K.; Varner, G.; Yang, Q.

2006-01-01

Due to the need for precise vertexing at future higher luminosity B-factories with the expectedly increasing track densities and radiation exposures, upgrade of present silicon strip detectors with thin, radiation resistant pixel detectors is highly desired. Considerable progress in the technological development of thin CMOS based Monolithic Active Pixel Sensors (MAPS) in the last years makes them a realistic upgrade option and the feasibility studies of their application in Belle are actively pursued. The most serious concerns are their radiation hardness and their read-out speed. To address them, several prototypes denoted as Continuous Acquisition Pixel (CAP) sensors have been developed and tested. The latest of the CAP sensor prototypes is CAP3, designed in the TSMC 0.25μm process with a 5-deep sample pair pipeline in each pixel. A setup with several CAP3 sensors will be used to assess the performance of a full scale pixel read-out system running at realistic read-out speed. The results and plans for the next stages of R and D towards a full Pixel Vertex Detector (PVD) are presented

Thin n-in-p planar pixel sensors and active edge sensors for the ATLAS upgrade at HL-LHC

International Nuclear Information System (INIS)

Terzo, S; Macchiolo, A; Nisius, R; Paschen, B

2014-01-01

Silicon pixel modules employing n-in-p planar sensors with an active thickness of 200 μm, produced at CiS, and 100-200 μm thin active/slim edge sensor devices, produced at VTT in Finland have been interconnected to ATLAS FE-I3 and FE-I4 read-out chips. The thin sensors are designed for high energy physics collider experiments to ensure radiation hardness at high fluences. Moreover, the active edge technology of the VTT production maximizes the sensitive region of the assembly, allowing for a reduced overlap of the modules in the pixel layer close to the beam pipe. The CiS production includes also four chip sensors according to the module geometry planned for the outer layers of the upgraded ATLAS pixel detector to be operated at the HL-LHC. The modules have been characterized using radioactive sources in the laboratory and with high precision measurements at beam tests to investigate the hit efficiency and charge collection properties at different bias voltages and particle incidence angles. The performance of the different sensor thicknesses and edge designs are compared before and after irradiation up to a fluence of 1.4 × 10 16 n eq /cm 2

ALPIDE: the Monolithic Active Pixel Sensor for the ALICE ITS upgrade

International Nuclear Information System (INIS)

Šuljić, M.

2016-01-01

The upgrade of the ALICE vertex detector, the Inner Tracking System (ITS), is scheduled to be installed during the next long shutdown period (2019-2020) of the CERN Large Hadron Collider (LHC) . The current ITS will be replaced by seven concentric layers of Monolithic Active Pixel Sensors (MAPS) with total active surface of ∼10 m 2 , thus making ALICE the first LHC experiment implementing MAPS detector technology on a large scale. The ALPIDE chip, based on TowerJazz 180 nm CMOS Imaging Process, is being developed for this purpose. A particular process feature, the deep p-well, is exploited so the full CMOS logic can be implemented over the active sensor area without impinging on the deposited charge collection. ALPIDE is implemented on silicon wafers with a high resistivity epitaxial layer. A single chip measures 15 mm by 30 mm and contains half a million pixels distributed in 512 rows and 1024 columns. In-pixel circuitry features amplification, shaping, discrimination and multi-event buffering. The readout is hit driven i.e. only addresses of hit pixels are sent to the periphery. The upgrade of the ITS presents two different sets of requirements for sensors of the inner and of the outer layers due to the significantly different track density, radiation level and active detector surface. The ALPIDE chip fulfils the stringent requirements in both cases. The detection efficiency is higher than 99%, fake-hit probability is orders of magnitude lower than the required 10 −6 and spatial resolution within the required 5 μm. This performance is to be maintained even after a total ionising does (TID) of 2.7 Mrad and a non-ionising energy loss (NIEL) fluence of 1.7 × 10 13 1 MeV n eq /cm 2 , which is above what is expected during the detector lifetime. Readout rate of 100 kHz is provided and the power density of ALPIDE is less than 40 mW/cm 2 . This contribution will provide a summary of the ALPIDE features and main test results.

ALPIDE: the Monolithic Active Pixel Sensor for the ALICE ITS upgrade

Science.gov (United States)

Šuljić, M.

2016-11-01

The upgrade of the ALICE vertex detector, the Inner Tracking System (ITS), is scheduled to be installed during the next long shutdown period (2019-2020) of the CERN Large Hadron Collider (LHC) . The current ITS will be replaced by seven concentric layers of Monolithic Active Pixel Sensors (MAPS) with total active surface of ~10 m2, thus making ALICE the first LHC experiment implementing MAPS detector technology on a large scale. The ALPIDE chip, based on TowerJazz 180 nm CMOS Imaging Process, is being developed for this purpose. A particular process feature, the deep p-well, is exploited so the full CMOS logic can be implemented over the active sensor area without impinging on the deposited charge collection. ALPIDE is implemented on silicon wafers with a high resistivity epitaxial layer. A single chip measures 15 mm by 30 mm and contains half a million pixels distributed in 512 rows and 1024 columns. In-pixel circuitry features amplification, shaping, discrimination and multi-event buffering. The readout is hit driven i.e. only addresses of hit pixels are sent to the periphery. The upgrade of the ITS presents two different sets of requirements for sensors of the inner and of the outer layers due to the significantly different track density, radiation level and active detector surface. The ALPIDE chip fulfils the stringent requirements in both cases. The detection efficiency is higher than 99%, fake-hit probability is orders of magnitude lower than the required 10-6 and spatial resolution within the required 5 μm. This performance is to be maintained even after a total ionising does (TID) of 2.7 Mrad and a non-ionising energy loss (NIEL) fluence of 1.7 × 1013 1 MeV neq/cm2, which is above what is expected during the detector lifetime. Readout rate of 100 kHz is provided and the power density of ALPIDE is less than 40 mW/cm2. This contribution will provide a summary of the ALPIDE features and main test results.

The TDCpix readout ASIC: A 75 ps resolution timing front-end for the NA62 Gigatracker hybrid pixel detector

Energy Technology Data Exchange (ETDEWEB)

Kluge, A., E-mail: alexander.kluge@cern.ch; Aglieri Rinella, G.; Bonacini, S.; Jarron, P.; Kaplon, J.; Morel, M.; Noy, M.; Perktold, L.; Poltorak, K.

2013-12-21

The TDCpix is a novel pixel readout ASIC for the NA62 Gigatracker detector. NA62 is a new experiment being installed at the CERN Super Proton Synchrotron. Its Gigatracker detector shall provide on-beam tracking and time stamping of individual particles with a time resolution of 150 ps rms. It will consist of three tracking stations, each with one hybrid pixel sensor. The peak flow of particles crossing the detector modules reaches 1.27 MHz/mm{sup 2} for a total rate of about 0.75 GHz. Ten TDCpix chips will be bump-bonded to every silicon pixel sensor. Each chip shall perform time stamping of 100 M particle hits per second with a detection efficiency above 99% and a timing accuracy better than 200 ps rms for an overall three-station-setup time resolution of better than 150 ps. The TDCpix chip has been designed in a 130 nm CMOS technology. It will feature 45×40 square pixels of 300×300μm{sup 2} and a complex End of Column peripheral region including an array of TDCs based on DLLs, four high speed serializers, a low-jitter PLL, readout and control circuits. This contribution will describe the complete design of the final TDCpix ASIC. It will discuss design choices, the challenges faced and some of the lessons learned. Furthermore, experimental results from the testing of circuit prototypes will be presented. These demonstrate the achievement of key performance figures such as a time resolution of the processing chain of 75 ps rms with a laser sent to the center of the pixel and the capability of time stamping charged particles with an overall resolution below 200 ps rms. -- Highlights: • Feasibility demonstration of a silicon pixel detector with sub-ns time tagging capability. • Demonstrator detector assembly with a time resolution of 75 ps RMS with laser charge injection; 170 ps RMS with particle beam. • Design of trigger-less TDCpix ASIC with 1800 pixels, 720 TDC channels and 4 3.2 Gbit/s serializers.

Performance of irradiated thin n-in-p planar pixel sensors for the ATLAS Inner Tracker upgrade

Science.gov (United States)

Savić, N.; Beyer, J.; Hiti, B.; Kramberger, G.; La Rosa, A.; Macchiolo, A.; Mandić, I.; Nisius, R.; Petek, M.

2017-12-01

The ATLAS collaboration will replace its tracking detector with new all silicon pixel and strip systems. This will allow to cope with the higher radiation and occupancy levels expected after the 5-fold increase in the luminosity of the LHC accelerator complex (HL-LHC). In the new tracking detector (ITk) pixel modules with increased granularity will implement to maintain the occupancy with a higher track density. In addition, both sensors and read-out chips composing the hybrid modules will be produced employing more radiation hard technologies with respect to the present pixel detector. Due to their outstanding performance in terms of radiation hardness, thin n-in-p sensors are promising candidates to instrument a section of the new pixel system. Recently produced and developed sensors of new designs will be presented. To test the sensors before interconnection to chips, a punch-through biasing structure was implemented. Its design was optimized to decrease the possible tracking efficiency losses observed. After irradiation, they were caused by the punch-through biasing structure. A sensor compatible with the ATLAS FE-I4 chip with a pixel size of 50×250 μm2, subdivided into smaller pixel implants of 30×30 μm2 size was designed to investigate the performance of the 50×50 μm2 pixel cells foreseen for the HL-LHC. Results on sensor performance of 50×250 and 50×50 μm2 pixel cells in terms of efficiency, charge collection and electric field properties are obtained with beam tests and the Transient Current Technique.

Development of N+ in P pixel sensors for a high-luminosity large hadron collider

International Nuclear Information System (INIS)

Kamada, Shintaro; Yamamura, Kazuhisa; Unno, Yoshinobu; Ikegami, Yoichi

2014-01-01

Hamamatsu Photonics K. K. is developing an N+ in a p planar pixel sensor with high radiation tolerance for the high-luminosity large hadron collider (HL-LHC). The N+ in the p planar pixel sensor is a candidate for the HL-LHC and offers the advantages of high radiation tolerance at a reasonable price compared with the N+ in an n planar sensor, the three-dimensional sensor, and the diamond sensor. However, the N+ in the p planar pixel sensor still presents some problems that need to be solved, such as its slim edge and the danger of sparks between the sensor and readout integrated circuit. We are now attempting to solve these problems with wafer-level processes, which is important for mass production. To date, we have obtained a 250-μm edge with an applied bias voltage of 1000 V. To protect against high-voltage sparks from the edge, we suggest some possible designs for the N+ edge. - Highlights: • We achieved a tolerance of 1000 V with a 250-μm edge by Al2O3 side wall passivation. • Above is a wafer process and suitable for mass production. • For edge-spark protection, we suggest N+ edge with an isolation

An Over 90 dB Intra-Scene Single-Exposure Dynamic Range CMOS Image Sensor Using a 3.0 μm Triple-Gain Pixel Fabricated in a Standard BSI Process

Directory of Open Access Journals (Sweden)

Isao Takayanagi

2018-01-01

Full Text Available To respond to the high demand for high dynamic range imaging suitable for moving objects with few artifacts, we have developed a single-exposure dynamic range image sensor by introducing a triple-gain pixel and a low noise dual-gain readout circuit. The developed 3 μm pixel is capable of having three conversion gains. Introducing a new split-pinned photodiode structure, linear full well reaches 40 ke−. Readout noise under the highest pixel gain condition is 1 e− with a low noise readout circuit. Merging two signals, one with high pixel gain and high analog gain, and the other with low pixel gain and low analog gain, a single exposure dynamic rage (SEHDR signal is obtained. Using this technology, a 1/2.7”, 2M-pixel CMOS image sensor has been developed and characterized. The image sensor also employs an on-chip linearization function, yielding a 16-bit linear signal at 60 fps, and an intra-scene dynamic range of higher than 90 dB was successfully demonstrated. This SEHDR approach inherently mitigates the artifacts from moving objects or time-varying light sources that can appear in the multiple exposure high dynamic range (MEHDR approach.

The Phase-2 ATLAS ITk Pixel Upgrade

CERN Document Server

Macchiolo, Anna; The ATLAS collaboration

2018-01-01

The new ATLAS ITk pixel system will be installed during the LHC Phase-II shutdown, to better take advantage of the increased luminosity of the HL-LHC. The detector will consist of 5 layers of stave-like support structures in the most central region and ring-shaped supports in the endcap regions, covering up to |η| < 4. While the outer 3 layers of the Pixel Detector are designed to operate for the full HL-LHC data taking period, the innermost 2 layers of the detector will be replaced around half of the lifetime. The ITk pixel detector will be instrumented with new sensors and readout electronics to provide improved tracking performance and radiation hardness compared to the current detector. Sensors will be read out by new ASICs based on the chip developed by the RD53 Collaboration. The pixel off-detector readout electronics will be implemented in the framework of the general ATLAS trigger and DAQ system with a readout speed of up to 5 Gb/s per data link for the innermost layers. Results of extensive tests...

The ALICE Silicon Pixel Detector System (SPD)

CERN Document Server

Kluge, A; Antinori, Federico; Burns, M; Cali, I A; Campbell, M; Caselle, M; Ceresa, S; Dima, R; Elias, D; Fabris, D; Krivda, Marian; Librizzi, F; Manzari, Vito; Morel, M; Moretto, Sandra; Osmic, F; Pappalardo, G S; Pepato, Adriano; Pulvirenti, A; Riedler, P; Riggi, F; Santoro, R; Stefanini, G; Torcato De Matos, C; Turrisi, R; Tydesjo, H; Viesti, G; PH-EP

2007-01-01

The ALICE silicon pixel detector (SPD) comprises the two innermost layers of the ALICE inner tracker system. The SPD includes 120 detector modules (half-staves) each consisting of 10 ALICE pixel chips bump bonded to two silicon sensors and one multi-chip read-out module. Each pixel chip contains 8192 active cells, so that the total number of pixel cells in the SPD is ≈ 107. The on-detector read-out is based on a multi-chip-module containing 4 ASICs and an optical transceiver module. The constraints on material budget and detector module dimensions are very demanding.

First large DEPFET pixel modules for the Belle II Pixel Detector

Energy Technology Data Exchange (ETDEWEB)

Mueller, Felix; Avella, Paola; Kiesling, Christian; Koffmane, Christian; Moser, Hans-Guenther; Valentan, Manfred [Max-Planck-Institut fuer Physik, Muenchen (Germany); Andricek, Ladislav; Richter, Rainer [Halbleiterlabor der Max-Planck-Gesellschaft, Muenchen (Germany); Collaboration: Belle II-Collaboration

2016-07-01

DEPFET pixel detectors offer excellent signal to noise ratio, resolution and low power consumption with a low material budget. They will be used at Belle II and are a candidate for an ILC vertex detector. The pixels are integrated in a monolithic piece of silicon which also acts as PCB providing the signal and control routings for the ASICs on top. The first prototype DEPFET sensor modules for Belle II have been produced. The modules have 192000 pixels and are equipped with SMD components and three different kinds of ASICs to control and readout the pixels. The entire readout chain has to be studied; the metal layer interconnectivity and routings need to be verified. The modules are fully characterized, and the operation voltages and control sequences of the ASICs are investigated. An overview of the DEPFET concept and first characterization results is presented.

The TDCpix readout ASIC: A 75ps resolution timing front-end for the NA62 Gigatracker hybrid pixel detector

CERN Document Server

Kluge, A; Bonacini, S; Jarron, P; Kaplon, J; Morel, M; Noy, M; Perktold, L; Poltorak, K

2013-01-01

The TDCpix is a novel pixel readout ASIC for the NA62 Gigatracker detector. NA62 is a new experiment being installed at the CERN Super Proton Synchrotron. Its Gigatracker detector shall provide on-beam tracking and time stamping of individual particles with a time resolution of 150 ps rms. It will consist of three tracking stations, each with one hybrid pixel sensor. The peak fl ow of particles crossing the detector modules reaches 1.27 MHz/mm 2 for a total rate of about 0.75 GHz. Ten TDCpix chips will be bump-bonded to every silicon pixel sensor. Each chip shall perform time stamping of 100 M particle hits per second with a detection ef fi ciency above 99% and a timing accuracy better than 200 ps rms for an overall three-station-setup time resolution of better than 150 ps. The TDCpix chip has been designed in a 130 nm CMOS technology. It will feature 45 40 square pixels of 300 300 μ m 2 and a complex End of Column peripheral region including an array of TDCs based on DLLs, four high speed serializers, a low...

Zero suppression logic of the ALICE muon forward tracker pixel chip prototype PIXAM and associated readout electronics development

International Nuclear Information System (INIS)

Flouzat, C.; Değerli, Y.; Guilloux, F.; Orsini, F.; Venault, P.

2015-01-01

In the framework of the ALICE experiment upgrade at HL-LHC, a new forward tracking detector, the Muon Forward Tracker (MFT), is foreseen to overcome the intrinsic limitations of the present Muon Spectrometer and will perform new measurements of general interest for the whole ALICE physics. To fulfill the new detector requirements, CMOS Monolithic Active Pixel Sensors (MAPS) provide an attractive trade-off between readout speed, spatial resolution, radiation hardness, granularity, power consumption and material budget. This technology has been chosen to equip the Muon Forward Tracker and also the vertex detector: the Inner Tracking System (ITS). Since few years, an intensive R and D program has been performed on the design of MAPS in the 0.18 μ m CMOS Image Sensor (CIS) process. In order to avoid pile up effects in the experiment, the classical rolling shutter readout system of MAPS has been improved to overcome the readout speed limitation. A zero suppression algorithm, based on a 3 by 3 cluster finding (position and data), has been chosen for the MFT. This algorithm allows adequate data compression for the sensor. This paper presents the large size prototype PIXAM, which represents 1/3 of the final chip, and will focus specially on the zero suppression block architecture. This chip is designed and under fabrication in the 0.18 μ m CIS process. Finally, the readout electronics principle to send out the compressed data flow is also presented taking into account the cluster occupancy per MFT plane for a single central Pb-Pb collision

Zero suppression logic of the ALICE muon forward tracker pixel chip prototype PIXAM and associated readout electronics development

Science.gov (United States)

Flouzat, C.; Değerli, Y.; Guilloux, F.; Orsini, F.; Venault, P.

2015-05-01

In the framework of the ALICE experiment upgrade at HL-LHC, a new forward tracking detector, the Muon Forward Tracker (MFT), is foreseen to overcome the intrinsic limitations of the present Muon Spectrometer and will perform new measurements of general interest for the whole ALICE physics. To fulfill the new detector requirements, CMOS Monolithic Active Pixel Sensors (MAPS) provide an attractive trade-off between readout speed, spatial resolution, radiation hardness, granularity, power consumption and material budget. This technology has been chosen to equip the Muon Forward Tracker and also the vertex detector: the Inner Tracking System (ITS). Since few years, an intensive R&D program has been performed on the design of MAPS in the 0.18 μ m CMOS Image Sensor (CIS) process. In order to avoid pile up effects in the experiment, the classical rolling shutter readout system of MAPS has been improved to overcome the readout speed limitation. A zero suppression algorithm, based on a 3 by 3 cluster finding (position and data), has been chosen for the MFT. This algorithm allows adequate data compression for the sensor. This paper presents the large size prototype PIXAM, which represents 1/3 of the final chip, and will focus specially on the zero suppression block architecture. This chip is designed and under fabrication in the 0.18 μ m CIS process. Finally, the readout electronics principle to send out the compressed data flow is also presented taking into account the cluster occupancy per MFT plane for a single central Pb-Pb collision.

Active Pixel Sensors in ams H18/H35 HV-CMOS Technology for the ATLAS HL-LHC Upgrade

CERN Document Server

Ristic, Branislav

2016-09-21

Deep sub micron HV-CMOS processes offer the opportunity for sensors built by industry standard techniques while being HV tolerant, making them good candidates for drift-based, fast collecting, thus radiation-hard pixel detectors. For the upgrade of the ATLAS Pixel Detector towards the HL-LHC requirements, active pixel sensors in HV-CMOS technology were investigated. These implement amplifier and discriminator stages directly in insulating deep n-wells, which also act as collecting electrodes. The deep n-wells allow for bias voltages up to 150V leading to a depletion depth of several 10um. Prototype sensors in the ams H18 180nm and H35 350nm HV-CMOS processes have been manufactured, acting as a potential drop-in replacement for the current ATLAS Pixel sensors, thus leaving higher level processing such as trigger handling to dedicated read-out chips. Sensors were thoroughly tested in lab measurements as well as in testbeam experiments. Irradiation with X-rays and protons revealed a tolerance to ionizing doses o...

First operation of a hybrid photon detector prototype with electrostatic cross-focussing and integrated silicon pixel readout

International Nuclear Information System (INIS)

Alemi, M.; Campbell, M.; Gys, T.; Mikulec, B.; Piedigrossi, D.; Puertolas, D.; Rosso, E.; Schomaker, R.; Snoeys, W.; Wyllie, K.

2000-01-01

We report on the first operation of a hybrid photon detector prototype with integrated silicon pixel readout for the ring imaging Cherenkov detectors of the LHCb experiment. The photon detector is based on a cross-focussed image intensifier tube geometry where the image is de-magnified by a factor of 4. The anode consists of a silicon pixel array, bump-bonded to a binary readout chip with matching pixel electronics. The prototype has been characterized using a low-intensity light-emitting diode operated in pulsed mode. Its performance in terms of single-photoelectron detection efficiency and imaging properties is presented. A model of photoelectron detection is proposed, and is shown to be in good agreement with the experimental data. It includes an estimate of the charge signal generated in the silicon detector, and the combined effects of the comparator threshold spread of the pixel readout chip, charge sharing at the pixel boundaries and back-scattering of the photoelectrons at the silicon detector surface

First operation of a hybrid photon detector prototype with electrostatic cross-focussing and integrated silicon pixel readout

Energy Technology Data Exchange (ETDEWEB)

Alemi, M.; Campbell, M.; Gys, T. E-mail: thierry.gys@cern.ch; Mikulec, B.; Piedigrossi, D.; Puertolas, D.; Rosso, E.; Schomaker, R.; Snoeys, W.; Wyllie, K

2000-07-11

We report on the first operation of a hybrid photon detector prototype with integrated silicon pixel readout for the ring imaging Cherenkov detectors of the LHCb experiment. The photon detector is based on a cross-focussed image intensifier tube geometry where the image is de-magnified by a factor of 4. The anode consists of a silicon pixel array, bump-bonded to a binary readout chip with matching pixel electronics. The prototype has been characterized using a low-intensity light-emitting diode operated in pulsed mode. Its performance in terms of single-photoelectron detection efficiency and imaging properties is presented. A model of photoelectron detection is proposed, and is shown to be in good agreement with the experimental data. It includes an estimate of the charge signal generated in the silicon detector, and the combined effects of the comparator threshold spread of the pixel readout chip, charge sharing at the pixel boundaries and back-scattering of the photoelectrons at the silicon detector surface.

Development of readout system for FE-I4 pixel module using SiTCP

Energy Technology Data Exchange (ETDEWEB)

Teoh, J.J., E-mail: jjteoh@champ.hep.sci.osaka-u.ac.jp [Graduate School of Science, Osaka University, 1-1 Machikaneyama, Toyonaka, Osaka, 560-0043 (Japan); Hanagaki, K. [Graduate School of Science, Osaka University, 1-1 Machikaneyama, Toyonaka, Osaka, 560-0043 (Japan); Ikegami, Y.; Takubo, Y.; Terada, S.; Unno, Y. [Institute for Particle and Nuclear Studies, High Energy Accelerator Research Organization (KEK), 1-1 Oho, Tsukuba City, Ibaraki-ken 305-0801 (Japan)

2013-12-11

The ATLAS pixel detector will be replaced in the future High Luminosity-Large Hadron Collider (HL-LHC) upgrade to preserve or improve the detector performance at high luminosity environment. To meet the tight requirements of the upgrade, a new pixel Front-End (FE) Integrated Circuit (IC) called FE-I4 has been developed. We have then devised a readout system for the new FE IC. Our system incorporates Silicon Transmission Control Protocol (SiTCP) technology (Uchida, 2008 [1]) which utilizes the standard TCP/IP and UDP communication protocols. This technology allows direct data access and transfer between a readout hardware chain and PC via a high speed Ethernet. In addition, the communication protocols are small enough to be implemented in a single Field-Programable Gate Array (FPGA). Relying on this technology, we have been able to construct a very compact, versatile and fast readout system. We have developed a firmware and software together with the readout hardware chain. We also have established basic functionalities for reading out FE-I4.

Data acquisition at the front-end of the Mu3e pixel detector

Energy Technology Data Exchange (ETDEWEB)

Perrevoort, Ann-Kathrin [Physikalisches Institut, Universitaet Heidelberg (Germany); Collaboration: Mu3e-Collaboration

2016-07-01

The Mu3e experiment - searching for the lepton-flavour violating decay of the muon into three electrons at an unprecedented sensitivity of one in 10{sup 16} decays - is based on a pixel tracking detector. The sensors are High-Voltage Monolithic Active Pixel Sensors, a technology which allows for very fast and thin detectors, and thus is an ideal fit for Mu3e where the trajectories of low-momentum electrons at high rates are to be measured. The detector will consist of about 275 million pixels and will be operated at up to 10{sup 9} muon stops per second. Therefore, a fast and trigger-less data readout is required. The pixel sensors feature zero-suppressed data output via high-speed serial links. The data is then buffered and sorted by time on a FPGA on the front-end before being processed to the following readout stage. In this talk, the readout of the Mu3e pixel detector at the front-end is introduced. Furthermore, a first firmware implementation of this concept in a beam telescope consisting of the current pixel sensor prototype MuPix7 is presented.

Development of telescope readout system based on FELIX for testbeam experiments

CERN Document Server

Wu, Weihao; Chen, Hucheng; Chen, Kai; Lacobucci, Giuseppe; Lanni, Francessco; Liu, Hongbin; Barrero Pinto, Mateus Vicente; Xu, Lailin

2017-01-01

The High Voltage CMOS (HV-CMOS) sensors are extensively investigated by the ATLAS collaboration in the High-Luminosity LHC (HL-LHC) upgrade of the Inner Tracker (ITk) detector. A testbeam telescope, based on the ATLAS IBL (Insertable B-Layer) silicon pixel modules, has been built to characterize the HV-CMOS sensor prototypes. The Front-End LInk eXchange (FELIX) system is a new approach to function as the gateway between front-ends and the commodity switched network in the different detectors of the ATLAS upgrade. A FELIX based readout system has been developed for the readout of the testbeam telescope, which includes a Telescope Readout FMC Card as interface between the IBL DC (double-chip) modules and a Xilinx ZC706 evaluation board. The test results show that the FELIX based telescope readout system is capable of sensor calibration and readout of a high-density pixel detector in test beam experiments in an effective way.

Operation of a GEM-TPC with pixel readout

CERN Document Server

Brezina, C; Kaminski, J; Killenberg, M; Krautscheid, T

2012-01-01

A prototype time projection chamber with 26 cm drift length was operated with a short-spaced triple gas electron multiplier (GEM) stack in a setup triggering on cosmic muon tracks. A small part of the anode plane is read out with a CMOS pixel application-specified integrated circuit (ASIC) named Timepix, which provides ultimate readout granularity. Pixel clusters of charge depositions corresponding to single primary electrons are observed and analyzed to reconstruct charged particle tracks. A dataset of several weeks of cosmic ray data is analyzed. The number of clusters per track length is well described by simulation. The obtained single point resolution approaches 50 m at short drift distances and is well reproduced by a simple model of single-electron diffusion.

Module and Electronics Developments for the ATLAS ITK Pixel System

CERN Document Server

Rummler, Andr{e}; The ATLAS collaboration

2016-01-01

The entire tracking system of the ATLAS experiment will be replaced during the LHC Phase II shutdown around 2025 by an all-silicon detector (Inner Tracker, ITk). The pixel detector will be composed by the five innermost layers, instrumented with new sensor and readout electronics technologies to improve the tracking performance and cope with the severe HL-LHC environment in terms of occupancy and radiation. The total area of the new pixel system could measure up to 14 m^2, depending on the final layout choice that is expected to take place in early 2017. Different designs of planar, 3D, CMOS sensors are being investigated to identify the optimal technology for the different pixel layers. In parallel sensor-chip interconnection options are evaluated in collaboration with industrial partners to identify reliable technologies when employing 100-150 μm thin chips. While the new read-out chip is being developed by the RD53 Collaboration, the pixel off detector read-out electronics will be implemented in the frame...

A novel source–drain follower for monolithic active pixel sensors

Energy Technology Data Exchange (ETDEWEB)

Gao, C., E-mail: chaosong.gao@mails.ccnu.edu.cn [Central China Normal University, Wuhan (China); Aglieri, G.; Hillemanns, H. [CERN, Geneva (Switzerland); Huang, G., E-mail: gmhuang@phy.ccnu.edu.cn [Central China Normal University, Wuhan (China); Junique, A.; Keil, M. [CERN, Geneva (Switzerland); Kim, D. [Dongguk University, Seoul (Korea, Republic of); Yonsei University, Seoul (Korea, Republic of); Kofarago, M.; Kugathasan, T.; Mager, M.; Marin Tobon, C.A.; Martinengo, P. [CERN, Geneva (Switzerland); Mugnier, H. [Mind, Archamps (France); Musa, L. [CERN, Geneva (Switzerland); Lee, S. [Dongguk University, Seoul (Korea, Republic of); Yonsei University, Seoul (Korea, Republic of); Reidt, F. [CERN, Geneva (Switzerland); Ruprecht-Karls-Universitat Heidelberg, Heidelberg (Germany); Riedler, P. [CERN, Geneva (Switzerland); Rousset, J. [Mind, Archamps (France); Sielewicz, K.M. [CERN, Geneva (Switzerland); Warsaw University of Technology, Warsaw (Poland); Snoeys, W. [CERN, Geneva (Switzerland); and others

2016-09-21

Monolithic active pixel sensors (MAPS) receive interest in tracking applications in high energy physics as they integrate sensor and readout electronics in one silicon die with potential for lower material budget and cost, and better performance. Source followers (SFs) are widely used for MAPS readout: they increase charge conversion gain 1/C{sub eff} or decrease the effective sensing node capacitance C{sub eff} because the follower action compensates part of the input capacitance. Charge conversion gain is critical for analog power consumption and therefore for material budget in tracking applications, and also has direct system impact. This paper presents a novel source–drain follower (SDF), where both source and drain follow the gate potential improving charge conversion gain. For the inner tracking system (ITS) upgrade of the ALICE experiment at CERN, low material budget is a primary requirement. The SDF circuit was studied as part of the effort to optimize the effective capacitance of the sensing node. The collection electrode, input transistor and routing metal all contribute to C{sub eff}. Reverse sensor bias reduces the collection electrode capacitance. The novel SDF circuit eliminates the contribution of the input transistor to C{sub eff}, reduces the routing contribution if additional shielding is introduced, provides a way to estimate the capacitance of the sensor itself, and has a voltage gain closer to unity than the standard SF. The SDF circuit has a somewhat larger area with a somewhat smaller bandwidth, but this is acceptable in most cases. A test chip, manufactured in a 180 nm CMOS image sensor process, implements small prototype pixel matrices in different flavors to compare the standard SF to the novel SF and to the novel SF with additional shielding. The effective sensing node capacitance was measured using a {sup 55}Fe source. Increasing reverse substrate bias from −1 V to −6 V reduces C{sub eff} by 38% and the equivalent noise charge

A novel source–drain follower for monolithic active pixel sensors

International Nuclear Information System (INIS)

Gao, C.; Aglieri, G.; Hillemanns, H.; Huang, G.; Junique, A.; Keil, M.; Kim, D.; Kofarago, M.; Kugathasan, T.; Mager, M.; Marin Tobon, C.A.; Martinengo, P.; Mugnier, H.; Musa, L.; Lee, S.; Reidt, F.; Riedler, P.; Rousset, J.; Sielewicz, K.M.; Snoeys, W.

2016-01-01

Monolithic active pixel sensors (MAPS) receive interest in tracking applications in high energy physics as they integrate sensor and readout electronics in one silicon die with potential for lower material budget and cost, and better performance. Source followers (SFs) are widely used for MAPS readout: they increase charge conversion gain 1/C_e_f_f or decrease the effective sensing node capacitance C_e_f_f because the follower action compensates part of the input capacitance. Charge conversion gain is critical for analog power consumption and therefore for material budget in tracking applications, and also has direct system impact. This paper presents a novel source–drain follower (SDF), where both source and drain follow the gate potential improving charge conversion gain. For the inner tracking system (ITS) upgrade of the ALICE experiment at CERN, low material budget is a primary requirement. The SDF circuit was studied as part of the effort to optimize the effective capacitance of the sensing node. The collection electrode, input transistor and routing metal all contribute to C_e_f_f. Reverse sensor bias reduces the collection electrode capacitance. The novel SDF circuit eliminates the contribution of the input transistor to C_e_f_f, reduces the routing contribution if additional shielding is introduced, provides a way to estimate the capacitance of the sensor itself, and has a voltage gain closer to unity than the standard SF. The SDF circuit has a somewhat larger area with a somewhat smaller bandwidth, but this is acceptable in most cases. A test chip, manufactured in a 180 nm CMOS image sensor process, implements small prototype pixel matrices in different flavors to compare the standard SF to the novel SF and to the novel SF with additional shielding. The effective sensing node capacitance was measured using a "5"5Fe source. Increasing reverse substrate bias from −1 V to −6 V reduces C_e_f_f by 38% and the equivalent noise charge (ENC) by 22% for the

Development of a readout technique for the high data rate BTeV pixel detector at Fermilab

International Nuclear Information System (INIS)

Hall, Bradley K.

2001-01-01

The pixel detector for the BTeV experiment at Fermilab provides digitized data from approximately 22 million silicon pixel channels. Portions of the detector are six millimeters from the beam providing a substantial hit rate and high radiation dose. The pixel detector data will be employed by the lowest level trigger system for track reconstruction every beam crossing. These requirements impose a considerable constraint on the readout scheme. This paper presents a readout technique that provides the bandwidth that is adequate for high hit rates, minimizes the number of radiation hard components, and satisfies all other design constraints

Production and characterization of SLID interconnected n-in-p pixel modules with 75 micron thin silicon sensors

CERN Document Server

Andricek, L; Macchiolo, A; Moser, H.G; Nisius, R; Richter, R.H; Terzo, S; Weigell, P

2014-01-01

The performance of pixel modules built from 75 micrometer thin silicon sensors and ATLAS read-out chips employing the Solid Liquid InterDiffusion (SLID) interconnection technology is presented. This technology, developed by the Fraunhofer EMFT, is a possible alternative to the standard bump-bonding. It allows for stacking of different interconnected chip and sensor layers without destroying the already formed bonds. In combination with Inter-Chip-Vias (ICVs) this paves the way for vertical integration. Both technologies are combined in a pixel module concept which is the basis for the modules discussed in this paper. Mechanical and electrical parameters of pixel modules employing both SLID interconnections and sensors of 75 micrometer thickness are covered. The mechanical features discussed include the interconnection efficiency, alignment precision and mechanical strength. The electrical properties comprise the leakage currents, tuning characteristics, charge collection, cluster sizes and hit efficiencies. T...

Production and Characterisation of SLID Interconnected n-in-p Pixel Modules with 75 Micrometer Thin Silicon Sensors

CERN Document Server

Andricek, L; Macchiolo, A.; Moser, H.-G.; Nisius, R.; Richter, R.H.; Terzo, S.; Weigell, P.

2014-01-01

The performance of pixel modules built from 75 micrometer thin silicon sensors and ATLAS read-out chips employing the Solid Liquid InterDiffusion (SLID) interconnection technology is presented. This technology, developed by the Fraunhofer EMFT, is a possible alternative to the standard bump-bonding. It allows for stacking of different interconnected chip and sensor layers without destroying the already formed bonds. In combination with Inter-Chip-Vias (ICVs) this paves the way for vertical integration. Both technologies are combined in a pixel module concept which is the basis for the modules discussed in this paper. Mechanical and electrical parameters of pixel modules employing both SLID interconnections and sensors of 75 micrometer thickness are covered. The mechanical features discussed include the interconnection efficiency, alignment precision and mechanical strength. The electrical properties comprise the leakage currents, tunability, charge collection, cluster sizes and hit efficiencies. Targeting at ...

A silicon pixel detector with routing for external VLSI read-out

International Nuclear Information System (INIS)

Thomas, S.L.; Seller, P.

1988-07-01

A silicon pixel detector with an array of 32 by 16 hexagonal pixels has been designed and is being built on high resistivity silicon. The detector elements are reverse biased diodes consisting of p-implants in an n-type substrate and are fully depleted from the front to the back of the wafer. They are intended to measure high energy ionising particles traversing the detector. The detailed design of the pixels, their layout and method of read-out are discussed. A number of test structures have been incorporated onto the wafer to enable measurements to be made on individual pixels together with a variety of active devices. The results will give a better understanding of the operation of the pixel array, and will allow testing of computer simulations of more elaborate structures for the future. (author)

Development of active edge pixel sensors and four-side buttable modules using vertical integration technologies

CERN Document Server

INSPIRE-00219560; Moser, H.-G.; Nisius, R.; Richter, R.H.; Terzo, S.; Weigell, P.

2014-01-01

We present an R&D activity focused on the development of novel modules for the upgrade of the ATLAS pixel system at the High Luminosity LHC (HL-LHC). The modules consist of n-in-p pixel sensors, 100 or 200 $\\mu$m thick, produced at VTT (Finland) with an active edge technology, which considerably reduces the dead area at the periphery of the device. The sensors are interconnected with solder bump-bonding to the ATLAS FE-I3 and FE-I4 read-out chips, and characterized with radioactive sources and beam tests at the CERN-SPS and DESY. The results of these measurements will be discussed for devices before and after irradiation up to a fluence of $5\\times 10^{15}$ \

Performance of a novel wafer scale CMOS active pixel sensor for bio-medical imaging

International Nuclear Information System (INIS)

Esposito, M; Evans, P M; Wells, K; Anaxagoras, T; Konstantinidis, A C; Zheng, Y; Speller, R D; Allinson, N M

2014-01-01

Recently CMOS active pixels sensors (APSs) have become a valuable alternative to amorphous silicon and selenium flat panel imagers (FPIs) in bio-medical imaging applications. CMOS APSs can now be scaled up to the standard 20 cm diameter wafer size by means of a reticle stitching block process. However, despite wafer scale CMOS APS being monolithic, sources of non-uniformity of response and regional variations can persist representing a significant challenge for wafer scale sensor response. Non-uniformity of stitched sensors can arise from a number of factors related to the manufacturing process, including variation of amplification, variation between readout components, wafer defects and process variations across the wafer due to manufacturing processes. This paper reports on an investigation into the spatial non-uniformity and regional variations of a wafer scale stitched CMOS APS. For the first time a per-pixel analysis of the electro-optical performance of a wafer CMOS APS is presented, to address inhomogeneity issues arising from the stitching techniques used to manufacture wafer scale sensors. A complete model of the signal generation in the pixel array has been provided and proved capable of accounting for noise and gain variations across the pixel array. This novel analysis leads to readout noise and conversion gain being evaluated at pixel level, stitching block level and in regions of interest, resulting in a coefficient of variation ⩽1.9%. The uniformity of the image quality performance has been further investigated in a typical x-ray application, i.e. mammography, showing a uniformity in terms of CNR among the highest when compared with mammography detectors commonly used in clinical practice. Finally, in order to compare the detection capability of this novel APS with the technology currently used (i.e. FPIs), theoretical evaluation of the detection quantum efficiency (DQE) at zero-frequency has been performed, resulting in a higher DQE for this

Performance of a novel wafer scale CMOS active pixel sensor for bio-medical imaging.

Science.gov (United States)

Esposito, M; Anaxagoras, T; Konstantinidis, A C; Zheng, Y; Speller, R D; Evans, P M; Allinson, N M; Wells, K

2014-07-07

Recently CMOS active pixels sensors (APSs) have become a valuable alternative to amorphous silicon and selenium flat panel imagers (FPIs) in bio-medical imaging applications. CMOS APSs can now be scaled up to the standard 20 cm diameter wafer size by means of a reticle stitching block process. However, despite wafer scale CMOS APS being monolithic, sources of non-uniformity of response and regional variations can persist representing a significant challenge for wafer scale sensor response. Non-uniformity of stitched sensors can arise from a number of factors related to the manufacturing process, including variation of amplification, variation between readout components, wafer defects and process variations across the wafer due to manufacturing processes. This paper reports on an investigation into the spatial non-uniformity and regional variations of a wafer scale stitched CMOS APS. For the first time a per-pixel analysis of the electro-optical performance of a wafer CMOS APS is presented, to address inhomogeneity issues arising from the stitching techniques used to manufacture wafer scale sensors. A complete model of the signal generation in the pixel array has been provided and proved capable of accounting for noise and gain variations across the pixel array. This novel analysis leads to readout noise and conversion gain being evaluated at pixel level, stitching block level and in regions of interest, resulting in a coefficient of variation ⩽1.9%. The uniformity of the image quality performance has been further investigated in a typical x-ray application, i.e. mammography, showing a uniformity in terms of CNR among the highest when compared with mammography detectors commonly used in clinical practice. Finally, in order to compare the detection capability of this novel APS with the technology currently used (i.e. FPIs), theoretical evaluation of the detection quantum efficiency (DQE) at zero-frequency has been performed, resulting in a higher DQE for this

SPIDR, a general-purpose readout system for pixel ASICs

International Nuclear Information System (INIS)

Heijden, B. van der; Visser, J.; Beuzekom, M. van; Boterenbrood, H.; Munneke, B.; Schreuder, F.; Kulis, S.

2017-01-01

The SPIDR (Speedy PIxel Detector Readout) system is a flexible general-purpose readout platform that can be easily adapted to test and characterize new and existing detector readout ASICs. It is originally designed for the readout of pixel ASICs from the Medipix/Timepix family, but other types of ASICs or front-end circuits can be read out as well. The SPIDR system consists of an FPGA board with memory and various communication interfaces, FPGA firmware, CPU subsystem and an API library on the PC . The FPGA firmware can be adapted to read out other ASICs by re-using IP blocks. The available IP blocks include a UDP packet builder, 1 and 10 Gigabit Ethernet MAC's and a 'soft core' CPU . Currently the firmware is targeted at the Xilinx VC707 development board and at a custom board called Compact-SPIDR . The firmware can easily be ported to other Xilinx 7 series and ultra scale FPGAs. The gap between an ASIC and the data acquisition back-end is bridged by the SPIDR system. Using the high pin count VITA 57 FPGA Mezzanine Card (FMC) connector only a simple chip carrier PCB is required. A 1 and a 10 Gigabit Ethernet interface handle the connection to the back-end. These can be used simultaneously for high-speed data and configuration over separate channels. In addition to the FMC connector, configurable inputs and outputs are available for synchronization with other detectors. A high resolution (≈ 27 ps bin size) Time to Digital converter is provided for time stamping events in the detector. The SPIDR system is frequently used as readout for the Medipix3 and Timepix3 ASICs. Using the 10 Gigabit Ethernet interface it is possible to read out a single chip at full bandwidth or up to 12 chips at a reduced rate. Another recent application is the test-bed for the VeloPix ASIC, which is developed for the Vertex Detector of the LHCb experiment. In this case the SPIDR system processes the 20 Gbps scrambled data stream from the VeloPix and distributes it over four

From vertex detectors to inner trackers with CMOS pixel sensors

CERN Document Server

Besson, A.

2017-01-01

The use of CMOS Pixel Sensors (CPS) for high resolution and low material vertex detectors has been validated with the 2014 and 2015 physics runs of the STAR-PXL detector at RHIC/BNL. This opens the door to the use of CPS for inner tracking devices, with 10-100 times larger sensitive area, which require therefore a sensor design privileging power saving, response uniformity and robustness. The 350 nm CMOS technology used for the STAR-PXL sensors was considered as too poorly suited to upcoming applications like the upgraded ALICE Inner Tracking System (ITS), which requires sensors with one order of magnitude improvement on readout speed and improved radiation tolerance. This triggered the exploration of a deeper sub-micron CMOS technology, Tower-Jazz 180 nm, for the design of a CPS well adapted for the new ALICE-ITS running conditions. This paper reports the R&D results for the conception of a CPS well adapted for the ALICE-ITS.

Development and characterization of diamond and 3D-silicon pixel detectors with ATLAS-pixel readout electronics

International Nuclear Information System (INIS)

Mathes, Markus

2008-12-01

Hybrid pixel detectors are used for particle tracking in the innermost layers of current high energy experiments like ATLAS. After the proposed luminosity upgrade of the LHC, they will have to survive very high radiation fluences of up to 10 16 particles per cm 2 per life time. New sensor concepts and materials are required, which promise to be more radiation tolerant than the currently used planar silicon sensors. Most prominent candidates are so-called 3D-silicon and single crystal or poly-crystalline diamond sensors. Using the ATLAS pixel electronics different detector prototypes with a pixel geometry of 400 x 50 μm 2 have been built. In particular three devices have been studied in detail: a 3D-silicon and a single crystal diamond detector with an active area of about 1 cm 2 and a poly-crystalline diamond detector of the same size as a current ATLAS pixel detector module (2 x 6 cm 2 ). To characterize the devices regarding their particle detection efficiency and spatial resolution, the charge collection inside a pixel cell as well as the charge sharing between adjacent pixels was studied using a high energy particle beam. (orig.)

Research and Development of Monolithic Active Pixel Sensors for the Detection of the Elementary Particles

International Nuclear Information System (INIS)

Li, Y.

2007-09-01

In order to develop high spatial resolution and readout speed vertex detectors for the future International Linear Collider (ILC), fast CMOS Monolithic Active Pixel Sensors (MAPS) are studied on this work. Two prototypes of MAPS, MIMOSA 8 and MIMOSA 16, based on the same micro-electronic architecture were developed in CMOS processes with different thickness of epitaxial layer. The size of pixel matrix is 32 x 128: 8 columns of the pixel array are readout directly with analog outputs and the other 24 columns are connected to the column level auto-zero discriminators. The Correlated Double Sampling (CDS) structures are successfully implemented inside pixel and discriminator. The photo diode type pixels with different diode sizes are used in these prototypes. With a 55 Fe X-ray radioactive source, the important parameters, such as Temporal Noise, Fixed Pattern Noise (FPN), Signal-to-Noise Ratio (SNR), Charge-to-Voltage conversion Factor (CVF) and Charge Collection Efficiency (CCE), are studied as function of readout speed and diode size. For MIMOSA 8, the effect of fast neutrons irradiation is also. Two beam tests campaigns were made: at DESY with a 5 GeV electrons beam and at CERN with a 180 GeV pions beam. Detection Efficiency and Spatial Resolution are studied in function of the discriminator threshold. For these two parameters, the influences of diode size and SNR of the central pixel of a cluster are also discussed. In order to improve the spatial resolution of the digital outputs, a very compact (25 μm x 1 mm) and low consumption (300 μW) column level ADC is designed in AMS 0.35 μm OPTO process. Based on successive approximation architecture, the auto-offset cancellation structure is integrated. A new column level auto-zero discriminator using static latch is also designed. (author)

Development of a cylindrical tracking detector with multichannel scintillation fibers and pixelated photon detector readout

Energy Technology Data Exchange (ETDEWEB)

Akazawa, Y.; Miwa, K.; Honda, R.; Shiozaki, T.; Chiga, N.

2015-07-01

We are developing a cylindrical tracking detector for a Σp scattering experiment in J-PARC with scintillation fibers and the Pixelated Photon Detector (PPD) readout, which is called as cylindrical fiber tracker (CFT), in order to reconstruct trajectories of charged particles emitted inside CFT. CFT works not only as a tracking detector but also a particle identification detector from energy deposits. A prototype CFT consisting of two straight layers and one spiral layer was constructed. About 1100 scintillation fibers with a diameter of 0.75 mm (Kuraray SCSF-78 M) were used. Each fiber signal was read by Multi-Pixel Photon Counter (MPPC, HPK S10362-11-050P, 1×1 mm{sup 2}, 400 pixels) fiber by fiber. MPPCs were handled with Extended Analogue Silicon Photomultipliers Integrated ReadOut Chip (EASIROC) boards, which were developed for the readout of a large number of MPPCs. The energy resolution of one layer was 28% for a 70 MeV proton where the energy deposit in fibers was 0.7 MeV.

Investigation of CMOS pixel sensor with 0.18 μm CMOS technology for high-precision tracking detector

International Nuclear Information System (INIS)

Zhang, L.; Wang, M.; Fu, M.; Zhang, Y.; Yan, W.

2017-01-01

The Circular Electron Positron Collider (CEPC) proposed by the Chinese high energy physics community is aiming to measure Higgs particles and their interactions precisely. The tracking detector including Silicon Inner Tracker (SIT) and Forward Tracking Disks (FTD) has driven stringent requirements on sensor technologies in term of spatial resolution, power consumption and readout speed. CMOS Pixel Sensor (CPS) is a promising candidate to approach these requirements. This paper presents the preliminary studies on the sensor optimization for tracking detector to achieve high collection efficiency while keeping necessary spatial resolution. Detailed studies have been performed on the charge collection using a 0.18 μm CMOS image sensor process. This process allows high resistivity epitaxial layer, leading to a significant improvement on the charge collection and therefore improving the radiation tolerance. Together with the simulation results, the first exploratory prototype has bee designed and fabricated. The prototype includes 9 different pixel arrays, which vary in terms of pixel pitch, diode size and geometry. The total area of the prototype amounts to 2 × 7.88 mm 2 .

Recent achievements of the ATLAS upgrade Planar Pixel Sensors R and D Project

International Nuclear Information System (INIS)

George, M

2014-01-01

After the foreseen upgrade of the LHC towards the HL-LHC, coming along with higher beam energies and increased peak luminosities, the experiments have to upgrade their detector systems to cope with the expected higher occupancies and radiation damages. In case of the ATLAS experiment a new Inner Tracker will be installed in this context. The ATLAS Planar Pixel Sensor R and D Project (PPS) is investigating the possibilities to cope with these new requirements, using planar pixel silicon sensors, working in a collaboration of 17 institutions and more than 80 scientists. Since the new Inner Tracker is supposed to have an active area on the order of 8 m 2 on the one side and has to withstand extreme irradiation on the other side, the PPS community is working on several approaches to reduce production costs, while increasing the radiation tolerance of the sensors. Another challenge is to produce sensors in such large quantities. During the production of the Insertable b-Layer (IBL) modules, the PPS community has proven to be able to produce a large scale production of planar silicon sensors with a high yield. For cost reduction reasons, it is desirable to produce larger sensors. There the PPS community is working on so called quad- and hex-modules, which have a size of four, respectively six FE-I4 readout chips. To cope with smaller radii and strict material budget requirements for the new pixel layers, developments towards sensors with small inactive areas are in the focus of research. Different production techniques, which even allow the production of sensors with active edges, have been investigated and the designs were qualified using lab and testbeam measurements. The short distance between the new innermost pixel layers and the interaction point, combined with the increase in luminosity, requires designs which are more radiation tolerant. Since charge collection on the one hand decreases with irradiation and on the other hand is not uniform within the pixel cells

An asynchronous data-driven readout prototype for CEPC vertex detector

Science.gov (United States)

Yang, Ping; Sun, Xiangming; Huang, Guangming; Xiao, Le; Gao, Chaosong; Huang, Xing; Zhou, Wei; Ren, Weiping; Li, Yashu; Liu, Jianchao; You, Bihui; Zhang, Li

2017-12-01

The Circular Electron Positron Collider (CEPC) is proposed as a Higgs boson and/or Z boson factory for high-precision measurements on the Higgs boson. The precision of secondary vertex impact parameter plays an important role in such measurements which typically rely on flavor-tagging. Thus silicon CMOS Pixel Sensors (CPS) are the most promising technology candidate for a CEPC vertex detector, which can most likely feature a high position resolution, a low power consumption and a fast readout simultaneously. For the R&D of the CEPC vertex detector, we have developed a prototype MIC4 in the Towerjazz 180 nm CMOS Image Sensor (CIS) process. We have proposed and implemented a new architecture of asynchronous zero-suppression data-driven readout inside the matrix combined with a binary front-end inside the pixel. The matrix contains 128 rows and 64 columns with a small pixel pitch of 25 μm. The readout architecture has implemented the traditional OR-gate chain inside a super pixel combined with a priority arbiter tree between the super pixels, only reading out relevant pixels. The MIC4 architecture will be introduced in more detail in this paper. It will be taped out in May and will be characterized when the chip comes back.

Development of a thinned back-illuminated CMOS active pixel sensor for extreme ultraviolet spectroscopy and imaging in space science

International Nuclear Information System (INIS)

Waltham, N.R.; Prydderch, M.; Mapson-Menard, H.; Pool, P.; Harris, A.

2007-01-01

We describe our programme to develop a large-format, science-grade, monolithic CMOS active pixel sensor for future space science missions, and in particular an extreme ultraviolet (EUV) spectrograph for solar physics studies on ESA's Solar Orbiter. Our route to EUV sensitivity relies on adapting the back-thinning and rear-illumination techniques first developed for CCD sensors. Our first large-format sensor consists of 4kx3k 5 μm pixels fabricated on a 0.25 μm CMOS imager process. Wafer samples of these sensors have been thinned by e2v technologies with the aim of obtaining good sensitivity at EUV wavelengths. We present results from both front- and back-illuminated versions of this sensor. We also present our plans to develop a new sensor of 2kx2k 10 μm pixels, which will be fabricated on a 0.35 μm CMOS process. In progress towards this goal, we have designed a test-structure consisting of six arrays of 512x512 10 μm pixels. Each of the arrays has been given a different pixel design to allow verification of our models, and our progress towards optimizing a design for minimal system readout noise and maximum dynamic range. These sensors will also be back-thinned for characterization at EUV wavelengths

Characterization of Pixel Sensors

CERN Document Server

Oliveira, Felipe Ferraz

2017-01-01

It was commissioned at CERN ATLAS pixel group a fluorescence setup for characterization of pixel sensors. The idea is to measure the energies of different targets to calibrate your sensor. It was measured four matrices (80, 95, 98 and 106) of the Investigator1 sensor with different deep PW using copper, iron and titanium as target materials. The matrix 80 has a higher gain (0.065 ± 0.002) and matrix 106 has a better energy resolution (0.05 ± 0.04). The noise of the setup is around 3.6 mV .

A prototype pixel readout chip for asynchronous detection applications

International Nuclear Information System (INIS)

Raymond, D.M.; Hall, G.; Lewis, A.J.; Sharp, P.H.

1991-01-01

A two-dimensional array of amplifier cells has been fabricated as a prototype readout system for a matching array of silicon diode detectors. Each cell contains a preamplifier, shaping amplifier, comparator and analogue signal storage in an area of 300 μmx320 μm using 3 μm CMOS technology. Full size chips will be bump bonded to pixel detector arrays. Low noise and asynchronous operation are novel design features. With noise levels of less than 250 rms electrons for input capacitances up to 600 fF, pixel detectors will be suitable for autoradiography, synchrotron X-ray and high energy particle detection applications. The design of the prototype chip is presented and future developments and prospects for applications are discussed. (orig.)

Development and characterization of diamond and 3D-silicon pixel detectors with ATLAS-pixel readout electronics

Energy Technology Data Exchange (ETDEWEB)

Mathes, Markus

2008-12-15

Hybrid pixel detectors are used for particle tracking in the innermost layers of current high energy experiments like ATLAS. After the proposed luminosity upgrade of the LHC, they will have to survive very high radiation fluences of up to 10{sup 16} particles per cm{sup 2} per life time. New sensor concepts and materials are required, which promise to be more radiation tolerant than the currently used planar silicon sensors. Most prominent candidates are so-called 3D-silicon and single crystal or poly-crystalline diamond sensors. Using the ATLAS pixel electronics different detector prototypes with a pixel geometry of 400 x 50 {mu}m{sup 2} have been built. In particular three devices have been studied in detail: a 3D-silicon and a single crystal diamond detector with an active area of about 1 cm{sup 2} and a poly-crystalline diamond detector of the same size as a current ATLAS pixel detector module (2 x 6 cm{sup 2}). To characterize the devices regarding their particle detection efficiency and spatial resolution, the charge collection inside a pixel cell as well as the charge sharing between adjacent pixels was studied using a high energy particle beam. (orig.)

Development of CMOS Pixel Sensors fully adapted to the ILD Vertex Detector Requirements

CERN Document Server

Winter, Marc; Besson, Auguste; Claus, Gilles; Dorokhov, Andrei; Goffe, Mathieu; Hu-Guo, Christine; Morel, Frederic; Valin, Isabelle; Voutsinas, Georgios; Zhang, Liang

2012-01-01

CMOS Pixel Sensors are making steady progress towards the specifications of the ILD vertex detector. Recent developments are summarised, which show that these devices are close to comply with all major requirements, in particular the read-out speed needed to cope with the beam related background. This achievement is grounded on the double- sided ladder concept, which allows combining signals generated by a single particle in two different sensors, one devoted to spatial resolution and the other to time stamp, both assembled on the same mechanical support. The status of the development is overviewed as well as the plans to finalise it using an advanced CMOS process.

Quality control on planar n-in-n pixel sensors — Recent progress of ATLAS planar pixel sensors

International Nuclear Information System (INIS)

Klingenberg, R.

2013-01-01

To extend the physics reach of the Large Hadron Collider (LHC), upgrades to the accelerator are planned which will increase the peak luminosity by a factor 5–10. To cope with the increased occupancy and radiation damage, the ATLAS experiment plans to introduce an all-silicon inner tracker with the high luminosity upgrade (HL-LHC). To investigate the suitability of pixel sensors using the proven planar technology for the upgraded tracker, the ATLAS Upgrade Planar Pixel Sensor (PPS) R and D Project was established. Main areas of research are the performance of planar pixel sensors at highest fluences, the exploration of possibilities for cost reduction to enable the instrumentation of large areas, the achievement of slim or active edges to provide low geometric inefficiencies without the need for shingling of modules and the investigation of the operation of highly irradiated sensors at low thresholds to increase the efficiency. The Insertable b-layer (IBL) is the first upgrade project within the ATLAS experiment and will employ a new detector layer consisting of silicon pixel sensors, which were improved and prototyped in the framework of the planar pixel sensor R and D project. A special focus of this paper is the status of the development and testing of planar n-in-n pixel sensors including the quality control of the on-going series production and postprocessing of sensor wafers. A high yield of produced planar sensor wafers and FE-I4 double chip sensors after first steps of post-processing including under bump metallization and dicing is observed. -- Highlights: ► Prototypes of irradiated planar n-in-n sensors have been successfully tested under laboratory conditions. ► A quality assurance programme on the series production of planar sensors for the IBL has started. ► A high yield of double chip sensors during the series production is observed which are compatible to the specifications to this detector component.

Towards a new generation of pixel detector readout chips

CERN Document Server

Campbell, M; Ballabriga, R.; Frojdh, E.; Heijne, E.; Llopart, X.; Poikela, T.; Tlustos, L.; Valerio, P.; Wong, W.

2016-01-01

The Medipix3 Collaboration has broken new ground in spectroscopic X-ray imaging and in single particle detection and tracking. This paper will review briefly the performance and limitations of the present generation of pixel detector readout chips developed by the Collaboration. Through Silicon Via technology has the potential to provide a significant improvement in the tile- ability and more flexibility in the choice of readout architecture. This has been explored in the context of 3 projects with CEA-LETI using Medipix3 and Timepix3 wafers. The next generation of chips will aim to provide improved spectroscopic imaging performance at rates compatible with human CT. It will also aim to provide full spectroscopic images with unprecedented energy and spatial resolution. Some of the opportunities and challenges posed by moving to a more dense CMOS process will be discussed.

Development of a 750x750 pixels CMOS imager sensor for tracking applications

Science.gov (United States)

Larnaudie, Franck; Guardiola, Nicolas; Saint-Pé, Olivier; Vignon, Bruno; Tulet, Michel; Davancens, Robert; Magnan, Pierre; Corbière, Franck; Martin-Gonthier, Philippe; Estribeau, Magali

2017-11-01

Solid-state optical sensors are now commonly used in space applications (navigation cameras, astronomy imagers, tracking sensors...). Although the charge-coupled devices are still widely used, the CMOS image sensor (CIS), which performances are continuously improving, is a strong challenger for Guidance, Navigation and Control (GNC) systems. This paper describes a 750x750 pixels CMOS image sensor that has been specially designed and developed for star tracker and tracking sensor applications. Such detector, that is featuring smart architecture enabling very simple and powerful operations, is built using the AMIS 0.5μm CMOS technology. It contains 750x750 rectangular pixels with 20μm pitch. The geometry of the pixel sensitive zone is optimized for applications based on centroiding measurements. The main feature of this device is the on-chip control and timing function that makes the device operation easier by drastically reducing the number of clocks to be applied. This powerful function allows the user to operate the sensor with high flexibility: measurement of dark level from masked lines, direct access to the windows of interest… A temperature probe is also integrated within the CMOS chip allowing a very precise measurement through the video stream. A complete electro-optical characterization of the sensor has been performed. The major parameters have been evaluated: dark current and its uniformity, read-out noise, conversion gain, Fixed Pattern Noise, Photo Response Non Uniformity, quantum efficiency, Modulation Transfer Function, intra-pixel scanning. The characterization tests are detailed in the paper. Co60 and protons irradiation tests have been also carried out on the image sensor and the results are presented. The specific features of the 750x750 image sensor such as low power CMOS design (3.3V, power consumption<100mW), natural windowing (that allows efficient and robust tracking algorithms), simple proximity electronics (because of the on

The FE-I4 Pixel Readout Chip and the IBL Module

Energy Technology Data Exchange (ETDEWEB)

Barbero, Marlon; Arutinov, David; Backhaus, Malte; Fang, Xiao-Chao; Gonella, Laura; Hemperek, Tomasz; Karagounis, Michael; Hans, Kruger; Kruth, Andre; Wermes, Norbert; /Bonn U.; Breugnon, Patrick; Fougeron, Denis; Gensolen, Fabrice; Menouni, Mohsine; Rozanov, Alexander; /Marseille, CPPM; Beccherle, Roberto; Darbo, Giovanni; /INFN, Genoa; Caminada, Lea; Dube, Sourabh; Fleury, Julien; Gnani, Dario; /LBL, Berkeley /NIKHEF, Amsterdam /Gottingen U. /SLAC

2012-05-01

FE-I4 is the new ATLAS pixel readout chip for the upgraded ATLAS pixel detector. Designed in a CMOS 130 nm feature size process, the IC is able to withstand higher radiation levels compared to the present generation of ATLAS pixel Front-End FE-I3, and can also cope with higher hit rate. It is thus suitable for intermediate radii pixel detector layers in the High Luminosity LHC environment, but also for the inserted layer at 3.3 cm known as the 'Insertable B-Layer' project (IBL), at a shorter timescale. In this paper, an introduction to the FE-I4 will be given, focusing on test results from the first full size FE-I4A prototype which has been available since fall 2010. The IBL project will be introduced, with particular emphasis on the FE-I4-based module concept.

Performance of new radiation tolerant thin n-in-p Silicon pixel sensors for the CMS experiment at High Luminosity LHC

CERN Document Server

Dalla Betta, G.F; Darbo, G; Dinardo, Mauro; Giacomini, G; Menasce, Dario; Meschini, Marco; Messineo, Alberto; Moroni, Luigi; Rivera, Ryan Allen; Ronchin, S; Uplegger, Lorenzo; Viliani, Lorenzo; Zoi, Irene; Zuolo, Davide

2017-01-01

The High Luminosity upgrade of the CERN-LHC (HL-LHC) demands for a new high-radiation tolerant solid-state pixel sensor capable of surviving fluencies up to a few 10$^{16}$ particles/cm$^2$ at $\\sim$3 cm from the interaction point. To this extent the INFN ATLAS-CMS joint research activity in collaboration with Fondazione Bruno Kessler-FBK, is aiming at the development of thin n-in-p type pixel sensors for the HL-LHC. The R and D covers both planar and single-sided 3D columnar pixel devices made with the Si-Si Direct Wafer Bonding technique, which allows for the production of sensors with 100~$\\mu {\\rm m}$ and 130~$\\mu {\\rm m}$ active thickness for planars, and 130~$\\mu {\\rm m}$ for 3D sensors, the thinnest ones ever produced so far. First prototypes of hybrid modules bump-bonded to the present CMS readout chip have been tested in beam tests. Preliminary results on their performance before and after irradiation are presented.

SEU tolerant memory design for the ATLAS pixel readout chip

International Nuclear Information System (INIS)

Menouni, M; Barbero, M; Breugnon, P; Fougeron, D; Gensolen, F; Arutinov, D; Backhaus, M; Gonella, L; Hemperek, T; Karagounis, M; Beccherle, R; Darbo, G; Caminada, L; Dube, S; Fleury, J; Garcia-Sciveres, M; Gnani, D; Jensen, F; Gromov, V; Kluit, R

2013-01-01

The FE-I4 chip for the B-layer upgrade is designed in a 130 nm CMOS process. For this design, configuration memories are based on the DICE latches where layout considerations are followed to improve the tolerance to SEU. Tests have shown that DICE latches for which layout approaches are adopted are 30 times more tolerant to SEU than the standard DICE latches. To prepare for the new pixel readout chip planned for the future upgrades, a prototype chip containing 512 pixels has been designed in a 65 nm CMOS process and a new approach is adopted for SEU tolerant latches. Results in terms of SEU and TID tolerance are presented.

Development and Characterization of Diamond and 3D-Silicon Pixel Detectors with ATLAS-Pixel Readout Electronics

CERN Document Server

Mathes, Markus

2008-01-01

Hybrid pixel detectors are used for particle tracking in the innermost layers of current high energy experiments like ATLAS. After the proposed luminosity upgrade of the LHC, they will have to survive very high radiation fluences of up to 10^16 particles per cm^2 per life time. New sensor concepts and materials are required, which promise to be more radiation tolerant than the currently used planar silicon sensors. Most prominent candidates are so-called 3D-silicon and single crystal or poly-crystalline diamond sensors. Using the ATLAS pixel electronics different detector prototypes with a pixel geometry of 400 × 50 um^2 have been built. In particular three devices have been studied in detail: a 3D-silicon and a single crystal diamond detector with an active area of about 1 cm^2 and a poly-crystalline diamond detector of the same size as a current ATLAS pixel detector module (2 × 6 cm^2). To characterize the devices regarding their particle detection efficiency and spatial resolution, the charge collection ...

Assembly procedure of the module (half-stave) of the ALICE Silicon Pixel Detector

CERN Document Server

Caselle, M; Antinori, F; Burns, M; Campbell, M; Chochula, P; Dinapoli, R; Elia, D; Formenti, F; Fini, R A; Ghidini, B; Kluge, A; Lenti, V; Manzari, V; Meddi, F; Morel, M; Navach, F; Nilsson, P; Pepato, Adriano; Riedler, P; Santoro, R; Stefanini, G; Viesti, G; Wyllie, K

2004-01-01

The Silicon Pixel Detector (SPD) forms the two innermost layers of the ALICE Inner Tracking System (ITS). The detector includes 1200 readout ASICs, each containing 8192 pixel cells, bump-bonded to Si sensor elements. The thickness of the readout chip and the sensor element is 150mum and 200mum, respectively. Low-mass solutions are implemented for the bus and the mechanical support. In this contribution, we describe the basic module (half-stave) of the two SPD layers and we give an overview of its assembly procedure.

3D, Flash, Induced Current Readout for Silicon Sensors

Energy Technology Data Exchange (ETDEWEB)

Parker, Sherwood I. [Univ. of Hawaii, Honolulu, HI (United States)

2014-06-07

A new method for silicon microstrip and pixel detector readout using (1) 65 nm-technology current amplifers which can, for the first time with silicon microstrop and pixel detectors, have response times far shorter than the charge collection time (2) 3D trench electrodes large enough to subtend a reasonable solid angle at most track locations and so have adequate sensitivity over a substantial volume of pixel, (3) induced signals in addition to, or in place of, collected charge

Development of thin sensors and a novel interconnection technology for the upgrade of the ATLAS pixel system

Energy Technology Data Exchange (ETDEWEB)

Andricek, L. [Max-Planck-Institut Halbleiterlabor, Otto Hahn Ring 6, 81739 Muenchen (Germany); Beimforde, M., E-mail: mibei@mpp.mpg.de [Max-Planck-Institut fuer Physik, Foehringer Ring 6, 80805 Muenchen (Germany); Macchiolo, A. [Max-Planck-Institut fuer Physik, Foehringer Ring 6, 80805 Muenchen (Germany); Moser, H.-G. [Max-Planck-Institut Halbleiterlabor, Otto Hahn Ring 6, 81739 Muenchen (Germany); Nisius, R. [Max-Planck-Institut fuer Physik, Foehringer Ring 6, 80805 Muenchen (Germany); Richter, R.H. [Max-Planck-Institut Halbleiterlabor, Otto Hahn Ring 6, 81739 Muenchen (Germany)

2011-04-21

A new pixel module concept is presented utilizing thin sensors and a novel vertical integration technique for the ATLAS pixel detector in view of the foreseen LHC luminosity upgrades. A first set of pixel sensors with active thicknesses of 75 and 150{mu}m has been produced from wafers of standard thickness using a thinning process developed at the Max-Planck-Institut Halbleiterlabor (HLL) and the Max-Planck-Institut fuer Physik (MPP). Pre-irradiation characterizations of these sensors show a very good device yield and high break down voltage. First proton irradiations up to a fluence of 10{sup 15} n{sub eq} cm{sup -2} have been carried out and their impact on the electrical properties of thin sensors has been studied. The novel ICV-SLID vertical integration technology will allow for routing signals vertically to the back side of the readout chips. With this, four-side buttable detector devices with an increased active area fraction are made possible. A first production of SLID test structures was performed and showed a high connection efficiency for different pad sizes and a mild sensitivity to disturbances of the surface planarity.

Development of thin sensors and a novel interconnection technology for the upgrade of the ATLAS pixel system

International Nuclear Information System (INIS)

Andricek, L.; Beimforde, M.; Macchiolo, A.; Moser, H.-G.; Nisius, R.; Richter, R.H.

2011-01-01

A new pixel module concept is presented utilizing thin sensors and a novel vertical integration technique for the ATLAS pixel detector in view of the foreseen LHC luminosity upgrades. A first set of pixel sensors with active thicknesses of 75 and 150μm has been produced from wafers of standard thickness using a thinning process developed at the Max-Planck-Institut Halbleiterlabor (HLL) and the Max-Planck-Institut fuer Physik (MPP). Pre-irradiation characterizations of these sensors show a very good device yield and high break down voltage. First proton irradiations up to a fluence of 10 15 n eq cm -2 have been carried out and their impact on the electrical properties of thin sensors has been studied. The novel ICV-SLID vertical integration technology will allow for routing signals vertically to the back side of the readout chips. With this, four-side buttable detector devices with an increased active area fraction are made possible. A first production of SLID test structures was performed and showed a high connection efficiency for different pad sizes and a mild sensitivity to disturbances of the surface planarity.

Characterization of Ni/SnPb-TiW/Pt Flip Chip Interconnections in Silicon Pixel Detector Modules

CERN Document Server

Karadzhinova, Aneliya; Härkönen, Jaakko; Luukka, Panja-riina; Mäenpää, Teppo; Tuominen, Eija; Haeggstrom, Edward; Kalliopuska, Juha; Vahanen, Sami; Kassamakov, Ivan

2014-01-01

In contemporary high energy physics experiments, silicon detectors are essential for recording the trajectory of new particles generated by multiple simultaneous collisions. Modern particle tracking systems may feature 100 million channels, or pixels, which need to be individually connected to read-out chains. Silicon pixel detectors are typically connected to readout chips by flip-chip bonding using solder bumps. High-quality electro-mechanical flip-chip interconnects minimizes the number of dead read-out channels in the particle tracking system. Furthermore, the detector modules must endure handling during installation and withstand heat generation and cooling during operation. Silicon pixel detector modules were constructed by flip-chip bonding 16 readout chips to a single sensor. Eutectic SnPb solder bumps were deposited on the readout chips and the sensor chips were coated with TiW/Pt thin film UBM (under bump metallization). The modules were assembled at Advacam Ltd, Finland. We studied the uniformity o...

An EUDET/AIDA Pixel Beam Telescope for Detector Development

CERN Document Server

Perrey, Hanno

2013-01-01

A high resolution ($\\sigma 2 \\sim \\mu$) beam telescope based on monolithic active pixel sensors (MAPS) was developed within the EUDET collaboration. The telescope consists of six sensor planes using Mimosa26 MAPS with a pixel pitch of $18.4 \\mu$ and thinned down to $50 \\mu$. The excellent resolution, readout rate and DAQ integration capabilities made the telescope a primary test beam tool for many groups including several CERN based experiments. Within the new European detector infrastructure project AIDA the test beam telescope will be further extended in terms of cooling infrastructure, readout speed and precision. In order to provide a system optimized for the different requirements by the user community, a combination of various pixel technologies is foreseen. In this report the design of this even more flexible telescope with three different pixel technologies (TimePix, Mimosa, ATLAS FE-I4) will be presented. First test beam results with the HitOR signal provided by the FE-I4 integrated into the trigger...

Module and Electronics Developments for the ATLAS ITK Pixel System

CERN Document Server

Nellist, Clara; The ATLAS collaboration

2016-01-01

ATLAS is preparing for an extensive modification of its detector in the course of the planned HL-LHC accelerator upgrade around 2025 which includes a replacement of the entire tracking system by an all-silicon detector (Inner Tracker, ITk). The five innermost layers of ITk will comprise of a pixel detector built of new sensor and readout electronics technologies to improve the tracking performance and cope with the severe HL-LHC environment in terms of occupancy and radiation. The total area of the new pixel system could measure up to 14 m$^{2}$, depending on the final layout choice that is expected to take place in early 2017. An intense R\\&D activity is taking place in the field of planar, 3D, CMOS sensors to identify the optimal technology for the different pixel layers. In parallel various sensor-chip interconnection options are explored to identify reliable technologies when employing 100-150~$\\mu$m thin chips. While the new read-out chip is being developed by the RD53 Collaboration, the pixel off de...

Test Beam Results of Geometry Optimized Hybrid Pixel Detectors

CERN Document Server

Becks, K H; Grah, C; Mättig, P; Rohe, T

2006-01-01

The Multi-Chip-Module-Deposited (MCM-D) technique has been used to build hybrid pixel detector assemblies. This paper summarises the results of an analysis of data obtained in a test beam campaign at CERN. Here, single chip hybrids made of ATLAS pixel prototype read-out electronics and special sensor tiles were used. They were prepared by the Fraunhofer Institut fuer Zuverlaessigkeit und Mikrointegration, IZM, Berlin, Germany. The sensors feature an optimized sensor geometry called equal sized bricked. This design enhances the spatial resolution for double hits in the long direction of the sensor cells.

Development of n-in-p pixel modules for the ATLAS Upgrade at HL-LHC

CERN Document Server

Macchiolo, Anna; Savic, Natascha; Terzo, Stefano

2016-09-21

Thin planar pixel modules are promising candidates to instrument the inner layers of the new ATLAS pixel detector for HL-LHC, thanks to the reduced contribution to the material budget and their high charge collection efficiency after irradiation. 100-200 $\\mu$m thick sensors, interconnected to FE-I4 read-out chips, have been characterized with radioactive sources and beam tests at the CERN-SPS and DESY. The results of these measurements are reported for devices before and after irradiation up to a fluence of $14\\times10^{15}$ n$_{eq}$/cm$^2$. The charge collection and tracking efficiency of the different sensor thicknesses are compared. The outlook for future planar pixel sensor production is discussed, with a focus on sensor design with the pixel pitches (50x50 and 25x100 $\\mu$m$^2$) foreseen for the RD53 Collaboration read-out chip in 65 nm CMOS technology. An optimization of the biasing structures in the pixel cells is required to avoid the hit efficiency loss presently observed in the punch-through region...

Active pixel sensor pixel having a photodetector whose output is coupled to an output transistor gate

Science.gov (United States)

Fossum, Eric R. (Inventor); Nakamura, Junichi (Inventor); Kemeny, Sabrina E. (Inventor)

2005-01-01

An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node. There is also a readout circuit, part of which can be disposed at the bottom of each column of cells and be common to all the cells in the column. A Simple Floating Gate (SFG) pixel structure could also be employed in the imager to provide a non-destructive readout and smaller pixel sizes.

The ALPIDE pixel sensor chip for the upgrade of the ALICE Inner Tracking System

CERN Document Server

Aglieri Rinella, Gianluca

2017-01-01

The ALPIDE chip is a CMOS Monolithic Active Pixel Sensor being developed for the Upgrade of the ITS of the ALICE experiment at the CERN Large Hadron Collider. The ALPIDE chip is implemented with a 180 nm CMOS Imaging Process and fabricated on substrates with a high-resistivity epitaxial layer. It measures 15 mm×30 mm and contains a matrix of 512×1024 pixels with in-pixel amplification, shaping, discrimination and multi-event buffering. The readout of the sensitive matrix is hit driven. There is no signaling activity over the matrix if there are no hits to read out and power consumption is proportional to the occupancy. The sensor meets the experimental requirements of detection efficiency above 99%, fake-hit probability below 10−5 and a spatial resolution of 5 μm. The capability to read out Pb–Pb interactions at 100 kHz is provided. The power density of the ALPIDE chip is projected to be less than 35 mW/cm2 for the application in the Inner Barrel Layers and below 20 mW/cm2 for the Outer Barrel Layers, ...

Performance of thin pixel sensors irradiated up to a fluence of 1016neqcm-2 and development of a new interconnection technology for the upgrade of the ATLAS pixel system

International Nuclear Information System (INIS)

Macchiolo, A.; Andricek, L.; Beimforde, M.; Moser, H.-G.; Nisius, R.; Richter, R.H.; Weigell, P.

2011-01-01

A new pixel module concept is presented, where thin sensors and a novel vertical integration technique are combined. This R and D activity is carried out in view of the ATLAS pixel detector upgrades. A first set of n-in-p pixel sensors with active thicknesses of 75 and 150μm has been produced using a thinning technique developed at the Max-Planck-Institut Halbleiterlabor (HLL). Charge Collection Efficiency measurements have been performed, yielding a higher CCE than expected from the present radiation damage models. The interconnection of thin n-in-p pixels to the FE-I3 ATLAS electronics is under way, exploiting the Solid Liquid Interdiffusion (SLID) technique developed by the Fraunhofer Institut EMFT. In addition, preliminary studies aimed at Inter-Chip-Vias (ICV) etching into the FE-I3 electronics are reported. ICVs will be used to route the signals vertically through the read-out chip, to newly created pads on the backside. This should serve as a proof of principle for future four-side tileable pixel assemblies, avoiding the cantilever presently needed in the chip for the wire bonding.

Production and characterisation of SLID interconnected n-in-p pixel modules with 75 μm thin silicon sensors

Energy Technology Data Exchange (ETDEWEB)

Andricek, L. [Halbleiterlabor der Max-Planck-Gesellschaft, Otto Hahn Ring 6, D-81739 München (Germany); Beimforde, M.; Macchiolo, A.; Moser, H.-G. [Max-Planck-Institut für Physik (Werner-Heisenberg-Institut), Föhringer Ring 6, D-80805 München (Germany); Nisius, R., E-mail: Richard.Nisius@mpp.mpg.de [Max-Planck-Institut für Physik (Werner-Heisenberg-Institut), Föhringer Ring 6, D-80805 München (Germany); Richter, R.H. [Halbleiterlabor der Max-Planck-Gesellschaft, Otto Hahn Ring 6, D-81739 München (Germany); Terzo, S.; Weigell, P. [Max-Planck-Institut für Physik (Werner-Heisenberg-Institut), Föhringer Ring 6, D-80805 München (Germany)

2014-09-11

The performance of pixel modules built from 75 μm thin silicon sensors and ATLAS read-out chips employing the Solid Liquid InterDiffusion (SLID) interconnection technology is presented. This technology, developed by the Fraunhofer EMFT, is a possible alternative to the standard bump-bonding. It allows for stacking of different interconnected chip and sensor layers without destroying the already formed bonds. In combination with Inter-Chip-Vias (ICVs) this paves the way for vertical integration. Both technologies are combined in a pixel module concept which is the basis for the modules discussed in this paper. Mechanical and electrical parameters of pixel modules employing both SLID interconnections and sensors of 75 μm thickness are covered. The mechanical features discussed include the interconnection efficiency, alignment precision and mechanical strength. The electrical properties comprise the leakage currents, tuning characteristics, charge collection, cluster sizes and hit efficiencies. Targeting at a usage at the high luminosity upgrade of the LHC accelerator called HL-LHC, the results were obtained before and after irradiation up to fluences of 10{sup 16}n{sub eq}/cm{sup 2}.

Development of Micromegas-like gaseous detectors using a pixel readout chip as collecting anode

International Nuclear Information System (INIS)

Chefdeville, M.

2009-01-01

This thesis reports on the fabrication and test of a new gaseous detector with a very large number of readout channels. This detector is intended for measuring the tracks of charged particles with an unprecedented sensitivity to single electrons of almost 100 %. It combines a metal grid for signal amplification called the Micromegas with a pixel readout chip as signal collecting anode and is dubbed GridPix. GridPix is a potential candidate for a sub-detector at a future electron linear collider (ILC) foreseen to work in parallel with the LHC around 2020--2030. The tracking capability of GridPix is best exploited if the Micromegas is integrated on the pixel chip. This integrated grid is called InGrid and is precisely fabricated by wafer post-processing. The various steps of the fabrication process and the measurements of its gain, energy resolution and ion back-flow property are reported in this document. Studies of the response of the complete detector formed by an InGrid and a TimePix pixel chip to X-rays and cosmic particles are also presented. In particular, the efficiency for detecting single electrons and the point resolution in the pixel plane are measured. Implications for a GridPix detector at ILC are discussed. (author)

Electron imaging with Medipix2 hybrid pixel detector

CERN Document Server

McMullan, G; Chen, S; Henderson, R; Llopart, X; Summerfield, C; Tlustos, L; Faruqi, A R

2007-01-01

The electron imaging performance of Medipix2 is described. Medipix2 is a hybrid pixel detector composed of two layers. It has a sensor layer and a layer of readout electronics, in which each 55 μm×55 μm pixel has upper and lower energy discrimination and MHz rate counting. The sensor layer consists of a 300 μm slab of pixellated monolithic silicon and this is bonded to the readout chip. Experimental measurement of the detective quantum efficiency, DQE(0) at 120 keV shows that it can reach 85% independent of electron exposure, since the detector has zero noise, and the DQE(Nyquist) can reach 35% of that expected for a perfect detector (4/π2). Experimental measurement of the modulation transfer function (MTF) at Nyquist resolution for 120 keV electrons using a 60 keV lower energy threshold, yields a value that is 50% of that expected for a perfect detector (2/π). Finally, Monte Carlo simulations of electron tracks and energy deposited in adjacent pixels have been performed and used to calculate expected v...

Front-end electronics for the readout of CdZnTe sensors

CERN Document Server

Moraes, D; Rudge, A

2006-01-01

The CERN_DxCTA is a front-end ASIC optimized for the readout of CdZn Te sensors. The chip is implemented in 0.25 mum CMOS technology. The circuit consists of 128 channels equipped with a transimpedance amplifier followed by a gain-shaper stage with 20 ns peaking time and two discriminators, allowing two threshold settings. Each discriminator includes a 5-bit trim DAC and is followed by an 18-bit static ripple-counter. The channel architecture is optimized for the detector characteristics in order to achieve the best energy resolution at counting rates of up to 5 M counts/second. Complete evaluation of the circuit is presented using electronic pulses and Cd ZnTe pixel detectors.

Readout of a 176 pixel FDM system for SAFARI TES arrays

Science.gov (United States)

Hijmering, R. A.; den Hartog, R.; Ridder, M.; van der Linden, A. J.; van der Kuur, J.; Gao, J. R.; Jackson, B.

2016-07-01

In this paper we present the results of our 176-pixel prototype of the FDM readout system for SAFARI, a TES-based focal-plane instrument for the far-IR SPICA mission. We have implemented the knowledge obtained from the detailed study on electrical crosstalk reported previously. The effect of carrier leakage is reduced by a factor two, mutual impedance is reduced to below 1 nH and mutual inductance is removed. The pixels are connected in stages, one quarter of the array half of the array and the full array, to resolve intermediate technical issues. A semi-automated procedure was incorporated to find all optimal settings for all pixels. And as a final step the complete array has been connected and 132 pixels have been read out simultaneously within the frequency range of 1-3.8MHz with an average frequency separation of 16kHz. The noise was found to be detector limited and was not affected by reading out all pixels in a FDM mode. With this result the concept of using FDM for multiplexed bolometer read out for the SAFARI instrument has been demonstrated.

Investigation of properties of novel silicon pixel assemblies employing thin n-in-p sensors and 3D-integration

International Nuclear Information System (INIS)

Weigell, Philipp

2013-01-01

to higher charge collection efficiencies after irradiation. Devices with thicknesses between 75 μm and 150 μm are investigated before and after irradiation with different experimental approaches, namely radioactive sources, beam tests, and laser measurements. The obtained results are compared to those gathered for devices using the currently widely used thickness of 285 μm. By implanting the sides of the sensors, the distance between the last active pixel implant and the edge can be considerably reduced, allowing for a compact module concept. In this thesis several steps are discussed to reduce this distance from 1.1mm down to 50 μm. Subsequently, the performance of the different implementations is investigated. The SLID interconnections offer the possibility to stack sensors and several layers of read-out electronics as well as a reduced minimal pitch and eventually a lower cost. In combination with ICVs it paves the way to 3D-integrated pixel assemblies. These can be further optimised in terms of the active area, thanks to a reduced footprint of the read-out chip. Furthermore, it enables the use of specialised processes for the analogue and digital parts of the read-out chip in the different layers. First assemblies employing SLID interconnections were built and the properties of the interconnection are discussed. Finally, etching of ICVs was started and the present status is reviewed.

Investigation of properties of novel silicon pixel assemblies employing thin n-in-p sensors and 3D-integration

Energy Technology Data Exchange (ETDEWEB)

Weigell, Philipp

2013-01-15

within the tracking system and leads to higher charge collection efficiencies after irradiation. Devices with thicknesses between 75 {mu}m and 150 {mu}m are investigated before and after irradiation with different experimental approaches, namely radioactive sources, beam tests, and laser measurements. The obtained results are compared to those gathered for devices using the currently widely used thickness of 285 {mu}m. By implanting the sides of the sensors, the distance between the last active pixel implant and the edge can be considerably reduced, allowing for a compact module concept. In this thesis several steps are discussed to reduce this distance from 1.1mm down to 50 {mu}m. Subsequently, the performance of the different implementations is investigated. The SLID interconnections offer the possibility to stack sensors and several layers of read-out electronics as well as a reduced minimal pitch and eventually a lower cost. In combination with ICVs it paves the way to 3D-integrated pixel assemblies. These can be further optimised in terms of the active area, thanks to a reduced footprint of the read-out chip. Furthermore, it enables the use of specialised processes for the analogue and digital parts of the read-out chip in the different layers. First assemblies employing SLID interconnections were built and the properties of the interconnection are discussed. Finally, etching of ICVs was started and the present status is reviewed.

TID-dependent current measurements of IBL readout chips

Energy Technology Data Exchange (ETDEWEB)

Dette, Karola [TU Dortmund, Experimentelle Physik IV (Germany); CERN (Switzerland); Collaboration: ATLAS Pixel-Collaboration

2016-07-01

The ATLAS detector consists of several subsystems with a hybrid pixel detector as the innermost component of the tracking system. The pixel detector has been composed of three layers of silicon sensor assemblies during the first data taking run of the LHC and has been upgraded with a new 4th layer, the so-called Insertable B-Layer (IBL), in summer 2014. Each silicon sensor of the IBL is connected to a Front End readout chip (FE-I4) via bump bonds. During the first year of data taking an increase of the LV current produced by the readout chips was observed. This increase could be traced back to radiation damage inside the silicon. The dependence of the current on the Total Ionizing Dose (TID) and temperature has been tested with X-ray irradiations and will be presented in this talk.

GigaTracker, a Thin and Fast Silicon Pixels Tracker

CERN Document Server

Velghe, Bob; Bonacini, Sandro; Ceccucci, Augusto; Kaplon, Jan; Kluge, Alexander; Mapelli, Alessandro; Morel, Michel; Noël, Jérôme; Noy, Matthew; Perktold, Lukas; Petagna, Paolo; Poltorak, Karolina; Riedler, Petra; Romagnoli, Giulia; Chiozzi, Stefano; Cotta Ramusino, Angelo; Fiorini, Massimiliano; Gianoli, Alberto; Petrucci, Ferruccio; Wahl, Heinrich; Arcidiacono, Roberta; Jarron, Pierre; Marchetto, Flavio; Gil, Eduardo Cortina; Nuessle, Georg; Szilasi, Nicolas

2014-01-01

GigaTracker, the NA62’s upstream spectrometer, plays a key role in the kinematically constrained background suppression for the study of the K + ! p + n ̄ n decay. It is made of three independent stations, each of which is a six by three cm 2 hybrid silicon pixels detector. To meet the NA62 physics goals, GigaTracker has to address challenging requirements. The hit time resolution must be better than 200 ps while keeping the total thickness of the sensor to less than 0.5 mm silicon equivalent. The 200 μm thick sensor is divided into 18000 300 μm 300 μm pixels bump-bounded to ten independent read-out chips. The chips use an end-of-column architecture and rely on time-over- threshold discriminators. A station can handle a crossing rate of 750 MHz. Microchannel cooling technology will be used to cool the assembly. It allows us to keep the sensor close to 0 C with 130 μm of silicon in the beam area. The sensor and read-out chip performance were validated using a 45 pixel demonstrator with a laser test setu...

Edge pixel response studies of edgeless silicon sensor technology for pixellated imaging detectors

Science.gov (United States)

Maneuski, D.; Bates, R.; Blue, A.; Buttar, C.; Doonan, K.; Eklund, L.; Gimenez, E. N.; Hynds, D.; Kachkanov, S.; Kalliopuska, J.; McMullen, T.; O'Shea, V.; Tartoni, N.; Plackett, R.; Vahanen, S.; Wraight, K.

2015-03-01

Silicon sensor technologies with reduced dead area at the sensor's perimeter are under development at a number of institutes. Several fabrication methods for sensors which are sensitive close to the physical edge of the device are under investigation utilising techniques such as active-edges, passivated edges and current-terminating rings. Such technologies offer the goal of a seamlessly tiled detection surface with minimum dead space between the individual modules. In order to quantify the performance of different geometries and different bulk and implant types, characterisation of several sensors fabricated using active-edge technology were performed at the B16 beam line of the Diamond Light Source. The sensors were fabricated by VTT and bump-bonded to Timepix ROICs. They were 100 and 200 μ m thick sensors, with the last pixel-to-edge distance of either 50 or 100 μ m. The sensors were fabricated as either n-on-n or n-on-p type devices. Using 15 keV monochromatic X-rays with a beam spot of 2.5 μ m, the performance at the outer edge and corners pixels of the sensors was evaluated at three bias voltages. The results indicate a significant change in the charge collection properties between the edge and 5th (up to 275 μ m) from edge pixel for the 200 μ m thick n-on-n sensor. The edge pixel performance of the 100 μ m thick n-on-p sensors is affected only for the last two pixels (up to 110 μ m) subject to biasing conditions. Imaging characteristics of all sensor types investigated are stable over time and the non-uniformities can be minimised by flat-field corrections. The results from the synchrotron tests combined with lab measurements are presented along with an explanation of the observed effects.

Frequency-multiplexed bias and readout of a 16-pixel superconducting nanowire single-photon detector array

Science.gov (United States)

Doerner, S.; Kuzmin, A.; Wuensch, S.; Charaev, I.; Boes, F.; Zwick, T.; Siegel, M.

2017-07-01

We demonstrate a 16-pixel array of microwave-current driven superconducting nanowire single-photon detectors with an integrated and scalable frequency-division multiplexing architecture, which reduces the required number of bias and readout lines to a single microwave feed line. The electrical behavior of the photon-sensitive nanowires, embedded in a resonant circuit, as well as the optical performance and timing jitter of the single detectors is discussed. Besides the single pixel measurements, we also demonstrate the operation of a 16-pixel array with a temporal, spatial, and photon-number resolution.

The STAR Heavy Flavor Tracker PXL detector readout electronics

International Nuclear Information System (INIS)

Schambach, J.; Contin, G.; Greiner, L.; Stezelberger, T.; Vu, C.; Sun, X.; Szelezniak, M.

2016-01-01

The Heavy Flavor Tracker (HFT) is a recently installed micro-vertex detector upgrade to the STAR experiment at RHIC, consisting of three subsystems with various technologies of silicon sensors arranged in 4 concentric cylinders. The two innermost layers of the HFT close to the beam pipe, the Pixel ('PXL') subsystem, employ CMOS Monolithic Active Pixel Sensor (MAPS) technology that integrate the sensor, front-end electronics, and zero-suppression circuitry in one silicon die. This paper presents selected characteristics of the PXL detector part of the HFT and the hardware, firmware and software associated with the readout system for this detector

submitter Development of the readout for the IBL upgrade project of the ATLAS Pixel Detector

CERN Document Server

Krieger, Nina

The LHC luminosity is upgraded in several phases until 2022. The resulting higher occupancy degrades the detector performance of the current Pixel Detector. To provide a good performance during the LHC luminosity upgrade, a fourth pixel layer is inserted into the existing ATLAS Pixel Detector. A new FE-I4 readout chip and a new data acquisition chain are required to cope with the higher track rate and the resulting increased bandwidth. Among others, this includes a new readout board: the IBL ROD. One component of this board is the DSP which creates commands for the FE-I4 chip and has to be upgraded as well. In this thesis, the first tests of the IBL ROD prototype are presented. A correct communication of the DSP to its external memory is verified. Moreover, the implementations for an IBL DSP code are described and tested. This includes the first configuration of the FE-I4 with an IBL ROD. In addition, a working communication with the Histogrammer SDRAM and the Input FIFO on the IBL ROD are demonstrated.

The Layer 1 / Layer 2 readout upgrade for the ATLAS Pixel Detector

CERN Document Server

Mullier, Geoffrey; The ATLAS collaboration

2016-01-01

The Pixel Detector of the ATLAS experiment has shown excellent performance during the whole Run-1 of the Large Hadron Collider (LHC). The increase of instantaneous luminosity foreseen during the LHC Run 2, will lead to an increased detector occupancy that is expected to saturate the readout links of the outermost layers of the pixel detector: Layers 1 and 2. To ensure a smooth data taking under such conditions, the read out system of the recently installed fourth innermost pixel layer, the Insertable B-Layer, was modified to accomodate the needs of the older detector. The Layer 2 upgrade installation took place during the 2015 winter shutdown, with the Layer 1 installation scheduled for 2016. A report of the successful installation, together with the design of novel dedicated optical to electrical converters and the software and firmware updates will be presented.

Hot pixel generation in active pixel sensors: dosimetric and micro-dosimetric response

Science.gov (United States)

Scheick, Leif; Novak, Frank

2003-01-01

The dosimetric response of an active pixel sensor is analyzed. heavy ions are seen to damage the pixel in much the same way as gamma radiation. The probability of a hot pixel is seen to exhibit behavior that is not typical with other microdose effects.

Finite-element simulations of coupling capacitances in capacitively coupled pixel detectors

CERN Document Server

AUTHOR|(SzGeCERN)755510

2017-01-01

Capacitively coupled hybrid silicon pixel-detector assemblies are under study for the vertex detector at the proposed future CLIC linear electron-positron collider. The assemblies consist of active CCPDv3 sensors, with 25 μm pixel pitch implemented in a 180 nm High- Voltage CMOS process, which are glued to the CLICpix readout ASIC, with the same pixel pitch and processed in a commercial 65 nm CMOS technology. The signal created in the silicon bulk of the active sensors passes a two-stage amplifier, in each pixel, and gets transferred as a voltage pulse to metal pads facing the readout chip (ROC). The coupling of the signal to the metal pads on the ROC side proceeds through the capacitors formed between the two chips by a thin layer of epoxy glue. The coupling strength and the amount of unwanted cross coupling to neighbouring pixels depends critically on the uniformity of the glue layer, its thickness and on the alignment precision during the flip-chip assembly process. Finite-element calculations of the coup...

A pixel unit-cell targeting 16 ns resolution and radiation hardness in a column read-out particle vertex detector

International Nuclear Information System (INIS)

Wright, M.; Millaud, J.; Nygren, D.

1992-10-01

A pixel unit cell (PUC) circuit architecture, optimized for a column read out architecture, is reported. Each PUC contains an integrator, active filter, comparator, and optional analog store. The time-over-threshold (TOT) discriminator allows an all-digital interface to the array periphery readout while passing an analog measure of collected charge. Use of (existing) radiation hard processes, to build a detector bump-bonded to a pixel readout array, is targeted. Here, emphasis is on a qualitative explanation of how the unique circuit implementation benefits operation for Super Collider (SSC) detector application

A pixel unit-cell targeting 16ns resolution and radiation hardness in a column read-out particle vertex detector

International Nuclear Information System (INIS)

Wright, M.; Millaud, J.; Nygren, D.

1993-01-01

A pixel unit cell (PUC) circuit architecture, optimized for a column read out architecture, is reported. Each PUC contains an integrator, active filter, comparator, and optional analog store. The time-over-threshold (TOT) discriminator allows an all-digital interface to the array periphery readout while passing an analog measure of collected charge. Use of (existing) radiation hard processes, to build a detector bump-bonded to a pixel readout array, is targeted. Here emphasis is on a qualitative explanation of how the unique circuit implementation benefits operation for Super Collider (SSC) detector application. (orig.)

Radiation hardness of CMS pixel barrel modules

International Nuclear Information System (INIS)

Rohe, T.; Bean, A.; Erdmann, W.; Kaestli, H.-C.; Khalatyan, S.; Meier, B.; Radicci, V.; Sibille, J.

2010-01-01

Pixel detectors are used in the innermost part of the multi purpose experiments at the LHC and are therefore exposed to the highest fluences of ionising radiation, which in this part of the detectors consists mainly of charged pions. The radiation hardness of all detector components has been thoroughly tested up to the fluences expected at the LHC. In case of an LHC upgrade, the fluence will be much higher and it is not yet clear how long the present pixel modules will stay operative in such a harsh environment. The aim of this study was to establish such a limit as a benchmark for other possible detector concepts considered for the upgrade. As the sensors and the readout chip are the parts most sensitive to radiation damage, samples consisting of a small pixel sensor bump-bonded to a CMS-readout chip (PSI46V2.1) have been irradiated with positive 200 MeV pions at PSI up to 6x10 14 n eq /cm 2 and with 21 GeV protons at CERN up to 5x10 15 n eq /cm 2 . After irradiation the response of the system to beta particles from a 90 Sr source was measured to characterise the charge collection efficiency of the sensor. Radiation induced changes in the readout chip were also measured. The results show that the present pixel modules can be expected to be still operational after a fluence of 2.8x10 15 n eq /cm 2 . Samples irradiated up to 5x10 15 n eq /cm 2 still see the beta particles. However, further tests are needed to confirm whether a stable operation with high particle detection efficiency is possible after such a high fluence.

Prototype ATLAS IBL Modules using the FE-I4A Front-End Readout Chip

CERN Document Server

Albert, J; Alimonti, Gianluca; Allport, Phil; Altenheiner, Silke; Ancu, Lucian; Andreazza, Attilio; Arguin, Jean-Francois; Arutinov, David; Backhaus, Malte; Bagolini, Alvise; Ballansat, Jacques; Barbero, Marlon; Barbier, Gérard; Bates, Richard; Battistin, Michele; Baudin, Patrick; Beau, Tristan; Beccherle, Roberto; Beck, Hans Peter; Benoit, Mathieu; Bensinger, Jim; Bomben, Marco; Borri, Marcello; Boscardin, Maurizio; Botelho Direito, Jose Antonio; Bousson, Nicolas; Boyd, George Russell Jr; Breugnon, Patrick; Bruni, Graziano; Bruschi, Marco; Buchholz, Peter; Buttar, Craig; Cadoux, Franck; Calderini, Giovanni; Caminada, Leah; Capeans, Mar; Casse, Gianluigi; Catinaccio, Andrea; Cavalli-Sforza, Matteo; Chauveau, Jacques; Chu, Ming-Lee; Ciapetti, Marco; Cindro, Vladimir; Citterio, Mauro; Clark, Allan; Cobal, Marina; Coelli, Simone; Colijn, Auke-Pieter; Colin, Daly; Collot, Johann; Crespo-Lopez, Olivier; Dalla Betta, Gian-Franco; Darbo, Giovanni; DaVia, Cinzia; David, Pierre-Yves; Debieux, Stéphane; Delebecque, Pierre; Devetak, Erik; DeWilde, Burton; Di Girolamo, Beniamino; Dinu, Nicoleta; Dittus, Fridolin; Diyakov, Denis; Djama, Fares; Dobos, Daniel Adam; Doonan, Kate; Dopke, Jens; Dorholt, Ole; Dube, Sourabh; Dushkin, Andrey; Dzahini, Daniel; Egorov, Kirill; Ehrmann, Oswin; Elldge, David; Elles, Sabine; Elsing, Markus; Eraud, Ludovic; Ereditato, Antonio; Eyring, Andreas; Falchieri, Davide; Falou, Aboud; Fang, Xiaochao; Fausten, Camille; Favre, Yannick; Ferrere, Didier; Fleta, Celeste; Fleury, Julien; Flick, Tobias; Forshaw, Dean; Fougeron, Denis; Fritzsch, Thomas; Gabrielli, Alessandro; Gaglione, Renaud; Gallrapp, Christian; Gan, K; Garcia-Sciveres, Maurice; Gariano, Giuseppe; Gastaldi, Thibaut; Gemme, Claudia; Gensolen, Fabrice; George, Matthias; Ghislain, Patrick; Giacomini, Gabriele; Gibson, Stephen; Giordani, Mario Paolo; Giugni, Danilo; Gjersdal, Håvard; Glitza, Karl Walter; Gnani, Dario; Godlewski, Jan; Gonella, Laura; Gorelov, Igor; Gorišek, Andrej; Gössling, Claus; Grancagnolo, Sergio; Gray, Heather; Gregor, Ingrid-Maria; Grenier, Philippe; Grinstein, Sebastian; Gromov, Vladimir; Grondin, Denis; Grosse-Knetter, Jörn; Hansen, Thor-Erik; Hansson, Per; Harb, Ali; Hartman, Neal; Hasi, Jasmine; Hegner, Franziska; Heim, Timon; Heinemann, Beate; Hemperek, Tomasz; Hessey, Nigel; Hetmánek, Martin; Hoeferkamp, Martin; Hostachy, Jean-Yves; Hügging, Fabian; Husi, Coralie; Iacobucci, Giuseppe; Idarraga, John; Ikegami, Yoichi; Janoška, Zdenko; Jansen, Jens; Jansen, Luc; Jensen, Frank; Jentzsch, Jennifer; Joseph, John; Kagan, Harris; Karagounis, Michael; Kass, Richard; Kenney, Christopher J; Kersten, Susanne; Kind, Peter; Klingenberg, Reiner; Kluit, Ruud; Kocian, Martin; Koffeman, Els; Kok, Angela; Korchak, Oleksandr; Korolkov, Ilya; Kostyukhin, Vadim; Krieger, Nina; Krüger, Hans; Kruth, Andre; Kugel, Andreas; Kuykendall, William; La Rosa, Alessandro; Lai, Chung-Hang; Lantzsch, Kerstin; Laporte, Didier; Lapsien, Tobias; Lounis, abdenour; Lozano, Manuel; Lu, Yunpeng; Lubatti, Henry; Macchiolo, Anna; Mallik, Usha; Mandić, Igor; Marchand, Denis; Marchiori, Giovanni; Massol, Nicolas; Matthias, Wittgen; Mättig, Peter; Mekkaoui, Abderrazak; Menouni, Mohsine; Menu, Johann; Meroni, Chiara; Mesa, Javier; Micelli, Andrea; Michal, Sébastien; Miglioranzi, Silvia; Mikuž, Marko; Mitsui, Shingo; Monti, Mauro; Moore, J; Morettini, Paolo; Muenstermann, Daniel; Murray, Peyton; Nellist, Clara; Nelson, David J; Nessi, Marzio; Neumann, Manuel; Nisius, Richard; Nordberg, Markus; Nuiry, Francois-Xavier; Oppermann, Hermann; Oriunno, Marco; Padilla, Cristobal; Parker, Sherwood; Pellegrini, Giulio; Pelleriti, Gabriel; Pernegger, Heinz; Piacquadio, Nicola Giacinto; Picazio, Attilio; Pohl, David; Polini, Alessandro; Popule, Jiří; Portell Bueso, Xavier; Povoli, Marco; Puldon, David; Pylypchenko, Yuriy; Quadt, Arnulf; Quirion, David; Ragusa, Francesco; Rambure, Thibaut; Richards, Erik; Ristic, Branislav; Røhne, Ole; Rothermund, Mario; Rovani, Alessandro; Rozanov, Alexandre; Rubinskiy, Igor; Rudolph, Matthew Scott; Rummler, André; Ruscino, Ettore; Salek, David; Salzburger, Andreas; Sandaker, Heidi; Schipper, Jan-David; Schneider, Basil; Schorlemmer, Andre; Schroer, Nicolai; Schwemling, Philippe; Seidel, Sally; Seiden, Abraham; Šícho, Petr; Skubic, Patrick; Sloboda, Michal; Smith, D; Sood, Alex; Spencer, Edwin; Strang, Michael; Stugu, Bjarne; Stupak, John; Su, Dong; Takubo, Yosuke; Tassan, Jean; Teng, Ping-Kun; Terada, Susumu; Todorov, Theodore; Tomášek, Michal; Toms, Konstantin; Travaglini, Riccardo; Trischuk, William; Troncon, Clara; Troska, Georg; Tsiskaridze, Shota; Tsurin, Ilya; Tsybychev, Dmitri; Unno, Yoshinobu; Vacavant, Laurent; Verlaat, Bart; Vianello, Elisa; Vigeolas, Eric; von Kleist, Stephan; Vrba, Václav; Vuillermet, Raphaël; Wang, Rui; Watts, Stephen; Weber, Michele; Weber, Marteen; Weigell, Philipp; Weingarten, Jens; Welch, Steven David; Wenig, Siegfried; Wermes, Norbert; Wiese, Andreas; Wittig, Tobias; Yildizkaya, Tamer; Zeitnitz, Christian; Ziolkowski, Michal; Zivkovic, Vladimir; Zoccoli, Antonio; Zorzi, Nicola; Zwalinski, Lukasz

2012-01-01

The ATLAS Collaboration will upgrade its semiconductor pixel tracking detector with a new Insertable B-layer (IBL) between the existing pixel detector and the vacuum pipe of the Large Hadron Collider. The extreme operating conditions at this location have necessitated the development of new radiation hard pixel sensor technologies and a new front-end readout chip, called the FE-I4. Planar pixel sensors and 3D pixel sensors have been investigated to equip this new pixel layer, and prototype modules using the FE-I4A have been fabricated and characterized using 120 GeV pions at the CERN SPS and 4 GeV positrons at DESY, before and after module irradiation. Beam test results are presented, including charge collection efficiency, tracking efficiency and charge sharing.

Production chain of CMS pixel modules

CERN Multimedia

2006-01-01

The pictures show the production chain of pixel modules for the CMS detector. Fig.1: overview of the assembly procedure. Fig.2: bump bonding with ReadOut Chip (ROC) connected to the sensor. Fig.3: glueing a raw module onto the baseplate strips. Fig.4: glueing of the High Density Interconnect (HDI) onto a raw module. Fig.5: pull test after heat reflow. Fig.6: wafer sensor processing, Indium evaporation.

Development of n-in-p pixel modules for the ATLAS upgrade at HL-LHC

Science.gov (United States)

Macchiolo, A.; Nisius, R.; Savic, N.; Terzo, S.

2016-09-01

Thin planar pixel modules are promising candidates to instrument the inner layers of the new ATLAS pixel detector for HL-LHC, thanks to the reduced contribution to the material budget and their high charge collection efficiency after irradiation. 100-200 μm thick sensors, interconnected to FE-I4 read-out chips, have been characterized with radioactive sources and beam tests at the CERN-SPS and DESY. The results of these measurements are reported for devices before and after irradiation up to a fluence of 14 ×1015 neq /cm2 . The charge collection and tracking efficiency of the different sensor thicknesses are compared. The outlook for future planar pixel sensor production is discussed, with a focus on sensor design with the pixel pitches (50×50 and 25×100 μm2) foreseen for the RD53 Collaboration read-out chip in 65 nm CMOS technology. An optimization of the biasing structures in the pixel cells is required to avoid the hit efficiency loss presently observed in the punch-through region after irradiation. For this purpose the performance of different layouts have been compared in FE-I4 compatible sensors at various fluence levels by using beam test data. Highly segmented sensors will represent a challenge for the tracking in the forward region of the pixel system at HL-LHC. In order to reproduce the performance of 50×50 μm2 pixels at high pseudo-rapidity values, FE-I4 compatible planar pixel sensors have been studied before and after irradiation in beam tests at high incidence angle (80°) with respect to the short pixel direction. Results on cluster shapes, charge collection and hit efficiency will be shown.

Online calibrations and performance of the ATLAS Pixel Detector

CERN Document Server

Keil, M; The ATLAS collaboration

2010-01-01

The ATLAS Pixel Detector is the innermost detector of the ATLAS experiment at the Large Hadron Collider at CERN. It consists of 1744 silicon sensors equipped with approximately 80 M electronic channels, providing typically three measurement points with high resolution for particles emerging from the beam-interaction region, thus allowing measuring particle tracks and secondary vertices with very high precision. The readout system of the Pixel Detector is based on a bi-directional optical data transmission system between the detector and the data acquisition system with an individual link for each of the 1744 modules. Signal conversion components are located on both ends, approximately 80 m apart. The talk will give an overview of the calibration and performance of both the detector and its optical readout. The most basic parameter to be tuned and calibrated for the detector electronics is the readout threshold of the individual pixel channels. These need to be carefully tuned to optimise position resolution a...

Readout ASIC for ILC-FPCCD vertex detector

International Nuclear Information System (INIS)

Takubo, Yosuke; Miyamoto, Akiya; Ikeda, Hirokazu; Yamamoto, Hitoshi; Itagaki, Kennosuke; Nagamine, Tadashi; Sugimoto, Yasuhiro

2010-01-01

The concept of FPCCD (Fine Pixel CCD) whose pixel size is 5x5μm 2 has been proposed as vertex detector at ILC. Since FPCCD has 128 x20,000 pixels in one readout channel, its readout poses a considerable challenge. We have developed a prototype of readout ASIC to readout the large number of pixels during the inter-train gap of the ILC beam. In this paper, we report the design and performance of the readout ASIC.

Development of thin sensors and a novel interconnection technology for the upgrade of the ATLAS pixel system

Energy Technology Data Exchange (ETDEWEB)

Beimforde, Michael

2010-07-19

edge demonstrate that the active sensor area fraction can be increased to fulfill the requirements for the detector upgrades. A subset of sensors, irradiated up to the fluence expected at the sLHC demonstrated that thin sensors show a higher charge collection efficiency than expected from current radiation damage models. First thin diodes equipped with the SLID metallization and first test structures that were connected with SLID indicate that this novel interconnection as part of the ICV-SLID technology could be a suitable replacement for the present bump-bonding technology. Finally, a new calibration algorithm for the ATLAS pixel readout chips is presented which is used to lower the discriminator threshold from 4000 electrons to 2000 electrons, to account for the reduction of the signal size due to radiation damage and the reduced sensor thickness. (orig.)

Development of thin sensors and a novel interconnection technology for the upgrade of the ATLAS pixel system

International Nuclear Information System (INIS)

Beimforde, Michael

2010-01-01

sensor area fraction can be increased to fulfill the requirements for the detector upgrades. A subset of sensors, irradiated up to the fluence expected at the sLHC demonstrated that thin sensors show a higher charge collection efficiency than expected from current radiation damage models. First thin diodes equipped with the SLID metallization and first test structures that were connected with SLID indicate that this novel interconnection as part of the ICV-SLID technology could be a suitable replacement for the present bump-bonding technology. Finally, a new calibration algorithm for the ATLAS pixel readout chips is presented which is used to lower the discriminator threshold from 4000 electrons to 2000 electrons, to account for the reduction of the signal size due to radiation damage and the reduced sensor thickness. (orig.)

Radiation hardness of CMS pixel barrel modules

CERN Document Server

Rohe, T; Erdmann, W; Kästli, H C; Khalatyan, S; Meier, B; Radicci, V; Sibille, J

2010-01-01

Pixel detectors are used in the innermost part of the multi purpose experiments at LHC and are therefore exposed to the highest fluences of ionising radiation, which in this part of the detectors consists mainly of charged pions. The radiation hardness of all detector components has thoroughly been tested up to the fluences expected at the LHC. In case of an LHC upgrade, the fluence will be much higher and it is not yet clear how long the present pixel modules will stay operative in such a harsh environment. The aim of this study was to establish such a limit as a benchmark for other possible detector concepts considered for the upgrade. As the sensors and the readout chip are the parts most sensitive to radiation damage, samples consisting of a small pixel sensor bump-bonded to a CMS-readout chip (PSI46V2.1) have been irradiated with positive 200 MeV pions at PSI up to 6E14 Neq and with 21 GeV protons at CERN up to 5E15 Neq. After irradiation the response of the system to beta particles from a Sr-90 source w...

Pixel detector readout electronics with two-level discriminator scheme

International Nuclear Information System (INIS)

Pengg, F.

1998-01-01

In preparation for a silicon pixel detector with more than 3,000 readout channels per chip for operation at the future large hadron collider (LHC) at CERN the analog front end of the readout electronics has been designed and measured on several test-arrays with 16 by 4 cells. They are implemented in the HP 0.8 microm process but compatible with the design rules of the radiation hard Honeywell 0.8 microm bulk process. Each cell contains bump bonding pad, preamplifier, discriminator and control logic for masking and testing within a layout area of only 50 microm by 140 microm. A new two-level discriminator scheme has been implemented to cope with the problems of time-walk and interpixel cross-coupling. The measured gain of the preamplifier is 900 mV for a minimum ionizing particle (MIP, about 24,000 e - for a 300 microm thick Si-detector) with a return to baseline within 750 ns for a 1 MIP input signal. The full readout chain (without detector) shows an equivalent noise charge to 60e - r.m.s. The time-walk, a function of the separation between the two threshold levels, is measured to be 22 ns at a separation of 1,500 e - , which is adequate for the 40 MHz beam-crossing frequency at the LHC. The interpixel cross-coupling, measured with a 40fF coupling capacitance, is less than 3%. A single cell consumes 35 microW at 3.5 V supply voltage

Active pixel sensor with intra-pixel charge transfer

Science.gov (United States)

Fossum, Eric R. (Inventor); Mendis, Sunetra (Inventor); Kemeny, Sabrina E. (Inventor)

2004-01-01

An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node.

Development and characterization of a DEPFET pixel prototype system for the ILC vertex detector

Energy Technology Data Exchange (ETDEWEB)

Kohrs, Robert

2008-09-15

For the future TeV-scale linear collider ILC (International Linear Collider) a vertex detector of unprecedented performance is needed to fully exploit its physics potential. By incorporating a field effect transistor into a fully depleted sensor substrate the DEPFET (Depleted Field Effect Transistor) sensor combines radiation detection and in-pixel amplification. For the operation at a linear collider the excellent noise performance of DEPFET pixels allows building very thin detectors with a high spatial resolution and a low power consumption. With this thesis a prototype system consisting of a 64 x 128 pixels sensor, dedicated steering and readout ASICs and a data acquisition board has been developed and successfully operated in the laboratory and under realistic conditions in beam test environments at DESY and CERN. A DEPFET matrix has been successfully read out using the on-chip zero-suppression of the readout chip CURO 2. The results of the system characterization and beam test results are presented. (orig.)

Development and characterization of a DEPFET pixel prototype system for the ILC vertex detector

International Nuclear Information System (INIS)

Kohrs, Robert

2008-09-01

For the future TeV-scale linear collider ILC (International Linear Collider) a vertex detector of unprecedented performance is needed to fully exploit its physics potential. By incorporating a field effect transistor into a fully depleted sensor substrate the DEPFET (Depleted Field Effect Transistor) sensor combines radiation detection and in-pixel amplification. For the operation at a linear collider the excellent noise performance of DEPFET pixels allows building very thin detectors with a high spatial resolution and a low power consumption. With this thesis a prototype system consisting of a 64 x 128 pixels sensor, dedicated steering and readout ASICs and a data acquisition board has been developed and successfully operated in the laboratory and under realistic conditions in beam test environments at DESY and CERN. A DEPFET matrix has been successfully read out using the on-chip zero-suppression of the readout chip CURO 2. The results of the system characterization and beam test results are presented. (orig.)

Frequency-domain readout multiplexing of transition-edge sensor arrays

Energy Technology Data Exchange (ETDEWEB)

Lanting, T.M. [Physics Department, University of California, Berkeley, CA 94720 (United States)]. E-mail: tlanting@berkeley.edu; Arnold, K. [Physics Department, University of California, Berkeley, CA 94720 (United States); Cho, Hsiao-Mei [Physics Department, University of California, Berkeley, CA 94720 (United States); Clarke, John [Physics Department, University of California, Berkeley, CA 94720 (United States); Materials Sciences Division, Lawrence Berkeley National Laboratory, Berkeley, CA 94720 (United States); Dobbs, Matt [Physics Division, Lawrence Berkeley National Laboratory, Berkeley, CA 94720 (United States); Holzapfel, William [Physics Department, University of California, Berkeley, CA 94720 (United States); Lee, Adrian T. [Physics Department, University of California, Berkeley, CA 94720 (United States); Physics Division, Lawrence Berkeley National Laboratory, Berkeley, CA 94720 (United States); Lueker, M. [Physics Department, University of California, Berkeley, CA 94720 (United States); Richards, P.L. [Physics Department, University of California, Berkeley, CA 94720 (United States); Materials Sciences Division, Lawrence Berkeley National Laboratory, Berkeley, CA 94720 (United States); Space Sciences Laboratory, University of California, Berkeley, CA 94720 (United States); Smith, A.D. [Northrop-Grumman, Redondo Beach, CA 94278 (United States); Spieler, H.G. [Physics Division, Lawrence Berkeley National Laboratory, Berkeley, CA 94720 (United States)

2006-04-15

We have demonstrated frequency-domain readout multiplexing of eight channels for superconducting transition-edge sensor bolometer arrays. The multiplexed readout noise is 6.5 pA/{radical}Hz, well below the bolometer dark noise of 15-20 pA/{radical}Hz. We measure an upper limit on crosstalk of 0.004 between channels adjacent in frequency which meets our design requirement of 0.01. We have observed vibration insensitivity in our frequency-domain multiplexed transition-edge sensors, making this system very attractive for telescope and satellite observations. We also discuss extensions to our multiplexed readout. In particular, we are developing a SQUID flux-locked loop that is entirely cold and collaborating on digital multiplexer technology in order to scale up the number of multiplexed channels.

The 160 TES bolometer read-out using FDM for SAFARI

Science.gov (United States)

Hijmering, R. A.; den Hartog, R. H.; van der Linden, A. J.; Ridder, M.; Bruijn, M. P.; van der Kuur, J.; van Leeuwen, B. J.; van Winden, P.; Jackson, B.

2014-07-01

For the read out of the Transition Edge Sensors (TES) bolometer arrays of the SAFARI instrument on the Japanese background-limited far-IR SPICA mission SRON is developing a Frequency Domain Multiplexing (FDM) read-out system. The next step after the successful demonstration of the read out of 38 TES bolometers using FDM was to demonstrate the FDM readout of the required 160 TES bolometers. Of the 160 LC filter and TES bolometer chains 151 have been connected and after cooldown 148 of the resonances could be identified. Although initial operation and locking of the pixels went smoothly the experiment revealed several complications. In this paper we describe the 160 pixel FDM set-up, show the results and discuss the issues faced during operation of the 160 pixel FDM experiment.

Module and electronics developments for the ATLAS ITK pixel system

CERN Document Server

Munoz Sanchez, Francisca Javiela; The ATLAS collaboration

2017-01-01

ATLAS is preparing for an extensive modification of its detector in the course of the planned HL-LHC accelerator upgrade around 2025 which includes a replacement of the entire tracking system by an all-silicon detector (Inner Tracker, ITk). The five innermost layers of ITk will comprise of a pixel detector built of new sensor and readout electronics technologies to improve the tracking performance and cope with the severe HL-LHC environment in terms of occupancy and radiation. The total area of the new pixel system could measure up to 14 m2, depending on the final layout choice that is expected to take place in 2017. A new on-detector readout chip is designed in the context of the RD53 collaboration in 65 nm CMOS technology. This paper will present the on-going R&D within the ATLAS ITK project towards the new pixel modules and the off-detector electronics. Planar and 3D sensors are being re-designed with cell sizes of 50x50 or 25x100 μm2, compatible with the RD53 chip. A sensor thickness equal or less th...

Microwave multiplex readout for superconducting sensors

Energy Technology Data Exchange (ETDEWEB)

Ferri, E., E-mail: elena.ferri@mib.infn.it [Università Milano-Bicocca, Milan (Italy); INFN Sez. di Milano-Bicocca, Milan (Italy); Becker, D.; Bennett, D. [NIST, Boulder, CO (United States); Faverzani, M. [Università Milano-Bicocca, Milan (Italy); INFN Sez. di Milano-Bicocca, Milan (Italy); Fowler, J.; Gard, J. [NIST, Boulder, CO (United States); Giachero, A. [Università Milano-Bicocca, Milan (Italy); INFN Sez. di Milano-Bicocca, Milan (Italy); Hays-Wehle, J.; Hilton, G. [NIST, Boulder, CO (United States); Maino, M. [Università Milano-Bicocca, Milan (Italy); INFN Sez. di Milano-Bicocca, Milan (Italy); Mates, J. [NIST, Boulder, CO (United States); Puiu, A.; Nucciotti, A. [Università Milano-Bicocca, Milan (Italy); INFN Sez. di Milano-Bicocca, Milan (Italy); Reintsema, C.; Schmidt, D.; Swetz, D.; Ullom, J.; Vale, L. [NIST, Boulder, CO (United States)

2016-07-11

The absolute neutrino mass scale is still an outstanding challenge in both particle physics and cosmology. The calorimetric measurement of the energy released in a nuclear beta decay is a powerful tool to determine the effective electron-neutrino mass. In the last years, the progress on low temperature detector technologies has allowed to design large scale experiments aiming at pushing down the sensitivity on the neutrino mass below 1 eV. Even with outstanding performances in both energy (~ eV on keV) and time resolution (~ 1 μs) on the single channel, a large number of detectors working in parallel is required to reach a sub-eV sensitivity. Microwave frequency domain readout is the best available technique to readout large array of low temperature detectors, such as Transition Edge Sensors (TESs) or Microwave Kinetic Inductance Detectors (MKIDs). In this way a multiplex factor of the order of thousands can be reached, limited only by the bandwidth of the available commercial fast digitizers. This microwave multiplexing system will be used to readout the HOLMES detectors, an array of 1000 microcalorimeters based on TES sensors in which the {sup 163}Ho will be implanted. HOLMES is a new experiment for measuring the electron neutrino mass by means of the electron capture (EC) decay of {sup 163}Ho. We present here the microwave frequency multiplex which will be used in the HOLMES experiment and the microwave frequency multiplex used to readout the MKID detectors developed in Milan as well.

Studies and development of a readout ASIC for pixelated CdTe detectors for space applications

International Nuclear Information System (INIS)

Michalowska, A.

2013-01-01

The work presented in this thesis is part of a project where a new instrument is developed: a camera for hard X-rays imaging spectroscopy. It is dedicated to fundamental research for observations in astrophysics, at wavelengths which can only be observed using space-borne instruments. In this domain the spectroscopic accuracy as well as the imaging details are of high importance. This work has been realized at CEA/IRFU (Institut de Recherche sur les lois Fondamentales de l'Univers), which has a long-standing and successful experience in instruments for high energy physics and space physics instrumentation. The objective of this thesis is the design of the readout electronics for a pixelated CdTe detector, suitable for a stacked assembly. The principal parameters of this integrated circuit are a very low noise for reaching a good accuracy in X-ray energy measurement, very low power consumption, a critical parameter in space-borne applications, and a small dead area for the full system combining the detector and the readout electronics. In this work I have studied the limits of these three parameters in order to optimize the circuit. In terms of the spectral resolution, two categories of noise had to be distinguished to determine the final performance. The first is the Fano noise limit, related to detector interaction statistics, which cannot be eliminated. The second is the electronic noise, also unavoidable; however it can be minimized through optimization of the detection chain. Within the detector, establishing a small pixel pitch of 300 μm reduces the input capacitance and the dark current. This limits the effects of the electronic noise. Also in order to limit the input capacitance the future camera is designed as a stacked assembly of the detector with the readout ASIC. This allows to reach extremely good input parameters seen by the readout electronics: a capacitance in range of 0.3 pF-1 pF and a dark current below 5 pA. In the frame of this thesis I have

The first fully functional 3D CMOS chip with Deep N-well active pixel sensors for the ILC vertex detector

International Nuclear Information System (INIS)

Traversi, G.; Gaioni, L.; Manazza, A.; Manghisoni, M.; Ratti, L.; Re, V.

2013-01-01

This work presents the characterization of Deep N-well (DNW) active pixel sensors fabricated in a vertically integrated technology. The DNW approach takes advantage of the triple well structure to lay out a sensor with relatively large charge collecting area (as compared to standard three transistor MAPS), while the readout is performed by a classical signal processing chain for capacitive detectors. This new 3D design relies upon stacking two homogeneous tiers fabricated in a 130 nm CMOS process where the top tier is thinned down to about 12μm to expose through silicon vias (TSV), therefore making connection to the buried circuits possible. This technology has been used to design a fine pitch 3D CMOS sensor with sparsification capabilities, in view of vertexing applications to the International Linear Collider (ILC) experiments. Results from the characterization of different kind of test structures, including single pixels, 3×3 and 8×8 matrices, are presented

Performance of thin pixel sensors irradiated up to a fluence of 10{sup 16}n{sub eq}cm{sup -2} and development of a new interconnection technology for the upgrade of the ATLAS pixel system

Energy Technology Data Exchange (ETDEWEB)

Macchiolo, A., E-mail: Anna.Macchiolo@mpp.mpg.de [Max-Planck-Institut fuer Physik, Foehringer Ring 6, D-80805 Muenchen (Germany); Andricek, L. [Max-Planck-Institut fuer Physik, Foehringer Ring 6, D-80805 Muenchen (Germany); Max-Planck-Institut Halbleiterlabor, Otto Hahn Ring 6, D-81739 Muenchen (Germany); Beimforde, M. [Max-Planck-Institut fuer Physik, Foehringer Ring 6, D-80805 Muenchen (Germany); Moser, H.-G. [Max-Planck-Institut fuer Physik, Foehringer Ring 6, D-80805 Muenchen (Germany); Max-Planck-Institut Halbleiterlabor, Otto Hahn Ring 6, D-81739 Muenchen (Germany); Nisius, R. [Max-Planck-Institut fuer Physik, Foehringer Ring 6, D-80805 Muenchen (Germany); Richter, R.H. [Max-Planck-Institut fuer Physik, Foehringer Ring 6, D-80805 Muenchen (Germany); Max-Planck-Institut Halbleiterlabor, Otto Hahn Ring 6, D-81739 Muenchen (Germany); Weigell, P. [Max-Planck-Institut fuer Physik, Foehringer Ring 6, D-80805 Muenchen (Germany)

2011-09-11

A new pixel module concept is presented, where thin sensors and a novel vertical integration technique are combined. This R and D activity is carried out in view of the ATLAS pixel detector upgrades. A first set of n-in-p pixel sensors with active thicknesses of 75 and 150{mu}m has been produced using a thinning technique developed at the Max-Planck-Institut Halbleiterlabor (HLL). Charge Collection Efficiency measurements have been performed, yielding a higher CCE than expected from the present radiation damage models. The interconnection of thin n-in-p pixels to the FE-I3 ATLAS electronics is under way, exploiting the Solid Liquid Interdiffusion (SLID) technique developed by the Fraunhofer Institut EMFT. In addition, preliminary studies aimed at Inter-Chip-Vias (ICV) etching into the FE-I3 electronics are reported. ICVs will be used to route the signals vertically through the read-out chip, to newly created pads on the backside. This should serve as a proof of principle for future four-side tileable pixel assemblies, avoiding the cantilever presently needed in the chip for the wire bonding.

A Dynamic Range Enhanced Readout Technique with a Two-Step TDC for High Speed Linear CMOS Image Sensors

Directory of Open Access Journals (Sweden)

Zhiyuan Gao

2015-11-01

Full Text Available This paper presents a dynamic range (DR enhanced readout technique with a two-step time-to-digital converter (TDC for high speed linear CMOS image sensors. A multi-capacitor and self-regulated capacitive trans-impedance amplifier (CTIA structure is employed to extend the dynamic range. The gain of the CTIA is auto adjusted by switching different capacitors to the integration node asynchronously according to the output voltage. A column-parallel ADC based on a two-step TDC is utilized to improve the conversion rate. The conversion is divided into coarse phase and fine phase. An error calibration scheme is also proposed to correct quantization errors caused by propagation delay skew within −Tclk~+Tclk. A linear CMOS image sensor pixel array is designed in the 0.13 μm CMOS process to verify this DR-enhanced high speed readout technique. The post simulation results indicate that the dynamic range of readout circuit is 99.02 dB and the ADC achieves 60.22 dB SNDR and 9.71 bit ENOB at a conversion rate of 2 MS/s after calibration, with 14.04 dB and 2.4 bit improvement, compared with SNDR and ENOB of that without calibration.

A passive CMOS pixel sensor for the high luminosity LHC

Energy Technology Data Exchange (ETDEWEB)

Daas, Michael; Gonella, Laura; Hemperek, Tomasz; Huegging, Fabian; Janssen, Jens; Krueger, Hans; Pohl, David-Leon; Wermes, Norbert [Physikalisches Institut der Universitaet Bonn (Germany); Macchiolo, Anna [Max-Planck-Institut fuer Physik, Muenchen (Germany)

2016-07-01

The high luminosity upgrade for the Large Hadron Collider at CERN requires a new inner tracking detector for the ATLAS experiment. About 200 m{sup 2} of silicon detectors are needed demanding new, low cost hybridization- and sensor technologies. One promising approach is to use commercial CMOS technologies to produce the passive sensor for a hybrid pixel detector design. In this talk a fully functional prototype of a 300 μm thick, backside biased CMOS pixel sensor in 150 nm LFoundry technology is presented. The sensor is bump bonded to the ATLAS FE-I4 with AC and DC coupled pixels. Results like leakage current, noise performance, and charge collection efficiency are presented and compared to the actual ATLAS pixel sensor design.

Fabrication of a high-density MCM-D for a pixel detector system using a BCB/Cu technology

CERN Document Server

Topper, M; Engelmann, G; Fehlberg, S; Gerlach, P; Wolf, J; Ehrmann, O; Becks, K H; Reichl, H

1999-01-01

The MCM-D which is described here is a prototype for a pixel detector system for the planned Large Hadron Collider (LHC) at CERN, Geneva. The project is within the ATLAS experiment. The module consists of a sensor tile with an active area of 16.4 mm*60.4 mm, 16 readout chips, each serving 24*160 pixel unit cells, a module controller chip, an optical transceiver and the local signal interconnection and power distribution buses. The extremely high wiring density which is necessary to interconnect the readout chips was achieved using a thin film copper/photo-BCB process above the pixel array. The bumping of the readout chips was done by PbSn electroplating. All dice are then attached by flip-chip assembly to the sensor diodes and the local buses. The focus of this paper is a detailed description of the technologies for the fabrication of this advanced MCM-D. (10 refs).

Monolithic pixel development in TowerJazz 180 nm CMOS for the outer pixel layers in the ATLAS experiment

Science.gov (United States)

Berdalovic, I.; Bates, R.; Buttar, C.; Cardella, R.; Egidos Plaja, N.; Hemperek, T.; Hiti, B.; van Hoorne, J. W.; Kugathasan, T.; Mandic, I.; Maneuski, D.; Marin Tobon, C. A.; Moustakas, K.; Musa, L.; Pernegger, H.; Riedler, P.; Riegel, C.; Schaefer, D.; Schioppa, E. J.; Sharma, A.; Snoeys, W.; Solans Sanchez, C.; Wang, T.; Wermes, N.

2018-01-01

The upgrade of the ATLAS tracking detector (ITk) for the High-Luminosity Large Hadron Collider at CERN requires the development of novel radiation hard silicon sensor technologies. Latest developments in CMOS sensor processing offer the possibility of combining high-resistivity substrates with on-chip high-voltage biasing to achieve a large depleted active sensor volume. We have characterised depleted monolithic active pixel sensors (DMAPS), which were produced in a novel modified imaging process implemented in the TowerJazz 180 nm CMOS process in the framework of the monolithic sensor development for the ALICE experiment. Sensors fabricated in this modified process feature full depletion of the sensitive layer, a sensor capacitance of only a few fF and radiation tolerance up to 1015 neq/cm2. This paper summarises the measurements of charge collection properties in beam tests and in the laboratory using radioactive sources and edge TCT. The results of these measurements show significantly improved radiation hardness obtained for sensors manufactured using the modified process. This has opened the way to the design of two large scale demonstrators for the ATLAS ITk. To achieve a design compatible with the requirements of the outer pixel layers of the tracker, a charge sensitive front-end taking 500 nA from a 1.8 V supply is combined with a fast digital readout architecture. The low-power front-end with a 25 ns time resolution exploits the low sensor capacitance to reduce noise and analogue power, while the implemented readout architectures minimise power by reducing the digital activity.

Optical readout and control interface for the BTeV pixel vertex detector

CERN Document Server

Vergara-Limon, S; Sheaff, M; Vargas, M A

2002-01-01

Optical links will be used for sending data back and forth from the counting room to the detector in the data acquisition systems for future high energy physics experiments, including ATLAS and CMS in the LHC at CERN (Switzerland) and BTeV at Fermilab (USA). This is because they can be ultra-high speed and are relatively immune to electro-magnetic interference (EMI). The baseline design for the BTeV Pixel Vertex Detector includes two types of optical link, one to control and monitor and the other to read out the hit data from the multi-chip modules on each half-plane of the detector. The design and performance of the first prototype of the Optical Readout and Control Interface for the BTeV Pixel Vertex Detector is described.

Characterisation of capacitively coupled HV/HR-CMOS sensor chips for the CLIC vertex detector

Science.gov (United States)

Kremastiotis, I.

2017-12-01

The capacitive coupling between an active sensor and a readout ASIC has been considered in the framework of the CLIC vertex detector study. The CLICpix Capacitively Coupled Pixel Detector (C3PD) is a High-Voltage CMOS sensor chip produced in a commercial 180 nm HV-CMOS process for this purpose. The sensor was designed to be connected to the CLICpix2 readout chip. It therefore matches the dimensions of the readout chip, featuring a matrix of 128×128 square pixels with 25μm pitch. The sensor chip has been produced with the standard value for the substrate resistivity (~20 Ωcm) and it has been characterised in standalone testing mode, before receiving and testing capacitively coupled assemblies. The standalone measurement results show a rise time of ~20 ns for a power consumption of 5μW/pixel. Production of the C3PD HV-CMOS sensor chip with higher substrate resistivity wafers (~20, 80, 200 and 1000 Ωcm) is foreseen. The expected benefits of the higher substrate resistivity will be studied using future assemblies with the readout chip.

Fine pitch and low material readout bus in the Silicon Pixel Vertex Tracker for the PHENIX Vertex Tracker upgrade

International Nuclear Information System (INIS)

Fujiwara, Kohei

2010-01-01

The construction of the Silicon Pixel Detector is starting in spring 2009 as project of the RHIC-PHENIX Silicon Vertex Tracker (VTX) upgrade at the Brookhaven National Laboratory. For the construction, we have developed a fine pitch and low material readout bus as the backbone parts of the VTX. In this article, we report the development and production of the readout bus.

Gossipo-3 A prototype of a Front-End Pixel Chip for Read-Out of Micro-Pattern Gas Detectors

CERN Document Server

Brezina, Christpoh; van der Graaf, Haryy; Gromov, Vladimir; Kluit, Ruud; Kruth, Andre; Zappon, Francesco

2009-01-01

In a joint effort of Nikhef (Amsterdam) and the University of Bonn, the Gossipo-3 integrated circuit (IC) has been developed. This circuit is a prototype of a chip dedicated for read-out of various types of position sensitive Micro-Pattern Gas detectors (MPGD). The Gossipo-3 is defined as a set of building blocks to be used in a future highly granulated (60 μm) chip. The pixel circuit can operate in two modes. In Time mode every readout pixel measures the hit arrival time and the charge deposit. For this purpose it has been equipped with a high resolution TDC (1.7 ns) covering dynamic range up to 102 μs. Charge collected by the pixel will be measured using Time-over- Threshold method in the range from 400 e- to 28000 e- with accuracy of 200 e- (standard deviation). In Counting mode every pixel operates as a 24-bit counter, counting the number of incoming hits. The circuit is also optimized to operate at low power consumption (100 mW/cm2) that is required to avoid the need for massive power transport and coo...

Precision scans of the Pixel cell response of double sided 3D Pixel detectors to pion and X-ray beams

CERN Document Server

Mac Raighne, A; Crossley, M; Alianelli, L; Lozano, M; Dumps, R; Fleta, C; Collins, P; Rodrigues, E; Sawhney, K J S; Tlustos, L; Pennicard, D; Buytaert, J; Stewart, G; Parkes, C; Eklund, L; Campbell, M; Marchal, J; Akiba, K; Pellegrini, G; Llopart, X; Plackett, R; Maneuski, D; Gligorov, V V; Tartoni, N; Nicol, M; Bates, R; Gallas, A; Gimenez, E N; van Beuzekom, M; John, M

2011-01-01

Three-dimensional (3D) silicon sensors offer potential advantages over standard planar sensors for radiation hardness in future high energy physics experiments and reduced charge-sharing for X-ray applications, but may introduce inefficiencies due to the columnar electrodes. These inefficiencies are probed by studying variations in response across a unit pixel cell in a 55 m m pitch double-sided 3D pixel sensor bump bonded to TimePix and Medipix2 readout ASICs. Two complementary characterisation techniques are discussed: the first uses a custom built telescope and a 120GeV pion beam from the Super Proton Synchrotron (SPS) at CERN; the second employs a novel technique to illuminate the sensor with a micro-focused synchrotron X-ray beam at the Diamond Light Source, UK. For a pion beam incident perpendicular to the sensor plane an overall pixel efficiency of 93.0 +/- 0.5\\% is measured. After a 10 degrees rotation of the device the effect of the columnar region becomes negligible and the overall efficiency rises ...

A pixel read-out architecture implementing a two-stage token ring, zero suppression and compression

International Nuclear Information System (INIS)

Heuvelmans, S; Boerrigter, M

2011-01-01

Increasing luminosity in high energy physics experiments leads to new challenges in the design of data acquisition systems for pixel detectors. With the upgrade of the LHCb experiment, the data processing will be changed; hit data from every collision will be transported off the pixel chip, without any trigger selection. A read-out architecture is proposed which is able to obtain low hit data loss on limited silicon area by using the logic beneath the pixels as a data buffer. Zero suppression and redundancy reduction ensure that the data rate off chip is minimized. A C++ model has been created for simulation of functionality and data loss, and for system development. A VHDL implementation has been derived from this model.

A pixel read-out architecture implementing a two-stage token ring, zero suppression and compression

Energy Technology Data Exchange (ETDEWEB)

Heuvelmans, S; Boerrigter, M, E-mail: sander.heuvelmans@bruco.nl [Bruco integrated circuits BV, Oostermaat 2, 7623 CS (Netherlands)

2011-01-15

Increasing luminosity in high energy physics experiments leads to new challenges in the design of data acquisition systems for pixel detectors. With the upgrade of the LHCb experiment, the data processing will be changed; hit data from every collision will be transported off the pixel chip, without any trigger selection. A read-out architecture is proposed which is able to obtain low hit data loss on limited silicon area by using the logic beneath the pixels as a data buffer. Zero suppression and redundancy reduction ensure that the data rate off chip is minimized. A C++ model has been created for simulation of functionality and data loss, and for system development. A VHDL implementation has been derived from this model.

Active pixel sensor having intra-pixel charge transfer with analog-to-digital converter

Science.gov (United States)

Fossum, Eric R. (Inventor); Mendis, Sunetra K. (Inventor); Pain, Bedabrata (Inventor); Nixon, Robert H. (Inventor); Zhou, Zhimin (Inventor)

2003-01-01

An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node and an analog-to-digital converter formed in the substrate connected to the output of the readout circuit.

Evaluation of local radiation damage in silicon sensor via charge collection mapping with the Timepix read-out chip

International Nuclear Information System (INIS)

Platkevic, M; Jakubek, J; Jakubek, M; Pospisil, S; Zemlicka, J; Havranek, V; Semian, V

2013-01-01

Studies of radiation hardness of silicon sensors are standardly performed with single-pad detectors evaluating their global electrical properties. In this work we introduce a technique to visualize and determine the spatial distribution of radiation damage across the area of a semiconductor sensor. The sensor properties such as charge collection efficiency and charge diffusion were evaluated locally at many points of the sensor creating 2D maps. For this purpose we used a silicon sensor bump bonded to the pixelated Timepix read-out chip. This device, operated in Time-over-threshold (TOT) mode, allows for the direct energy measurement in each pixel. Selected regions of the sensor were intentionally damaged by defined doses (up to 10 12 particles/cm 2 ) of energetic protons (of 2.5 and 4 MeV). The extent of the damage was measured in terms of the detector response to the same ions. This procedure was performed either on-line during irradiation or off-line after it. The response of the detector to each single particle was analyzed determining the charge collection efficiency and lateral charge diffusion. We evaluated the changes of these parameters as a function of radiation dose. These features are related to the local properties such as the spatial homogeneity of the sensor. The effect of radiation damage was also independently investigated measuring local changes of signal response to γ, and X rays and alpha particles.

Pixel Read-Out Architectures for the NA62 GigaTracker

CERN Document Server

Dellacasa, G

2008-01-01

Beam particles in NA62 experiment are measured with a Si-pixel sensor having a size of 300 μm x 300 μm and a time resolution of 150 ps (rms). To meet the timing requirement an adequate strategy to compensate the discriminator time-walk must be implemented and an R&D effort investigating two different options is ongoing. In this presentation we describe the two different approaches. One is based on the use of a constant-fraction discriminator followed by an on-pixel TDC. The other one is based on the use of a Time-over-Threshold circuit followed by a TDC shared by a group of pixels. The global architectures of both the front-end ASIC will be discussed.

Amorphous silicon pixel radiation detectors and associated thin film transistor electronics readout

International Nuclear Information System (INIS)

Perez-Mendez, V.; Drewery, J.; Hong, W.S.; Jing, T.; Kaplan, S.N.; Lee, H.; Mireshghi, A.

1994-10-01

We describe the characteristics of thin (1 μm) and thick (>30 μm) hydrogenated amorphous silicon p-i-n diodes which are optimized for detecting and recording the spatial distribution of charged particles, x-rays and γ rays. For x-ray, γ ray, and charged particle detection we can use thin p-i-n photosensitive diode arrays coupled to evaporated layers of suitable scintillators. For direct detection of charged particles with high resistance to radiation damage, we use the thick p-i-n diode arrays. Deposition techniques using helium dilution, which produce samples with low stress are described. Pixel arrays for flux exposures can be readout by transistor, single diode or two diode switches. Polysilicon charge sensitive pixel amplifiers for single event detection are described. Various applications in nuclear, particle physics, x-ray medical imaging, neutron crystallography, and radionuclide chromatography are discussed

Module and electronics developments for the ATLAS ITK pixel system

CERN Document Server

Munoz Sanchez, Francisca Javiela; The ATLAS collaboration

2017-01-01

The ATLAS experiment is preparing for an extensive modification of its detectors in the course of the planned HL-LHC accelerator upgrade around 2025. The ATLAS upgrade includes the replacement of the entire tracking system by an all-silicon detector (Inner Tracker, ITk). The five innermost layers of ITk will be a pixel detector built of new sensor and readout electronics technologies to improve the tracking performance and cope with the severe HL-LHC environment in terms of occupancy and radiation. The total area of the new pixel system could measure up to 14 m2, depending on the final layout choice, which is expected to take place in 2017. In this paper an overview of the ongoing R\\&D activities on modules and electronics for the ATLAS ITk is given including the main developments and achievements in silicon planar and 3D sensor technologies, readout and power challenges.

Improvement to the signaling interface for CMOS pixel sensors

Energy Technology Data Exchange (ETDEWEB)

Shi, Zhan, E-mail: sz1134@163.com [Dalian University of Technology, No.2 Linggong Road, 116024 Dalian (China); Tang, Zhenan, E-mail: tangza@dlut.edu.cn [Dalian University of Technology, No.2 Linggong Road, 116024 Dalian (China); Feng, Chong [Dalian University of Technology, No.2 Linggong Road, 116024 Dalian (China); Dalian Minzu University, No.18 Liaohe West Road, 116600 Dalian (China); Cai, Hong [Dalian University of Technology, No.2 Linggong Road, 116024 Dalian (China)

2016-10-01

The development of the readout speed of CMOS pixel sensors (CPS) is motivated by the demanding requirements of future high energy physics (HEP) experiments. As the interface between CPS and the data acquisition (DAQ) system, which inputs clock from the DAQ system and outputs data from CPS, the signaling interface should also be improved in terms of data rates. Meanwhile, the power consumption of the signaling interface should be maintained as low as possible. Consequently, a reduced swing differential signaling (RSDS) driver was adopted instead of a low-voltage differential signaling (LVDS) driver to transmit data from CPS to the DAQ system. In order to increase the capability of data rates, a serial source termination technique was employed. A LVDS/RSDS receiver was employed for transmitting clock from the DAQ system to CPS. A new method of generating hysteresis and a special current comparator were used to achieve a higher speed with lower power consumption. The signaling interface was designed and submitted for fabrication in a 0.18 µm CMOS image sensor (CIS) process. Measurement results indicate that the RSDS driver and the LVDS receiver can operate correctly at a data rate of 2 Gb/s with a power consumption of 19.1 mW.

Electron imaging with Medipix2 hybrid pixel detector

International Nuclear Information System (INIS)

McMullan, G.; Cattermole, D.M.; Chen, S.; Henderson, R.; Llopart, X.; Summerfield, C.; Tlustos, L.; Faruqi, A.R.

2007-01-01

The electron imaging performance of Medipix2 is described. Medipix2 is a hybrid pixel detector composed of two layers. It has a sensor layer and a layer of readout electronics, in which each 55 μmx55 μm pixel has upper and lower energy discrimination and MHz rate counting. The sensor layer consists of a 300 μm slab of pixellated monolithic silicon and this is bonded to the readout chip. Experimental measurement of the detective quantum efficiency, DQE(0) at 120 keV shows that it can reach ∼85% independent of electron exposure, since the detector has zero noise, and the DQE(Nyquist) can reach ∼35% of that expected for a perfect detector (4/π 2 ). Experimental measurement of the modulation transfer function (MTF) at Nyquist resolution for 120 keV electrons using a 60 keV lower energy threshold, yields a value that is 50% of that expected for a perfect detector (2/π). Finally, Monte Carlo simulations of electron tracks and energy deposited in adjacent pixels have been performed and used to calculate expected values for the MTF and DQE as a function of the threshold energy. The good agreement between theory and experiment allows suggestions for further improvements to be made with confidence. The present detector is already very useful for experiments that require a high DQE at very low doses

Electron imaging with Medipix2 hybrid pixel detector.

Science.gov (United States)

McMullan, G; Cattermole, D M; Chen, S; Henderson, R; Llopart, X; Summerfield, C; Tlustos, L; Faruqi, A R

2007-01-01

The electron imaging performance of Medipix2 is described. Medipix2 is a hybrid pixel detector composed of two layers. It has a sensor layer and a layer of readout electronics, in which each 55 microm x 55 microm pixel has upper and lower energy discrimination and MHz rate counting. The sensor layer consists of a 300 microm slab of pixellated monolithic silicon and this is bonded to the readout chip. Experimental measurement of the detective quantum efficiency, DQE(0) at 120 keV shows that it can reach approximately 85% independent of electron exposure, since the detector has zero noise, and the DQE(Nyquist) can reach approximately 35% of that expected for a perfect detector (4/pi(2)). Experimental measurement of the modulation transfer function (MTF) at Nyquist resolution for 120 keV electrons using a 60 keV lower energy threshold, yields a value that is 50% of that expected for a perfect detector (2/pi). Finally, Monte Carlo simulations of electron tracks and energy deposited in adjacent pixels have been performed and used to calculate expected values for the MTF and DQE as a function of the threshold energy. The good agreement between theory and experiment allows suggestions for further improvements to be made with confidence. The present detector is already very useful for experiments that require a high DQE at very low doses.

The ALPIDE pixel sensor chip for the upgrade of the ALICE Inner Tracking System

Energy Technology Data Exchange (ETDEWEB)

Aglieri Rinella, Gianluca, E-mail: gianluca.aglieri.rinella@cern.ch

2017-02-11

The ALPIDE chip is a CMOS Monolithic Active Pixel Sensor being developed for the Upgrade of the ITS of the ALICE experiment at the CERN Large Hadron Collider. The ALPIDE chip is implemented with a 180 nm CMOS Imaging Process and fabricated on substrates with a high-resistivity epitaxial layer. It measures 15 mm×30 mm and contains a matrix of 512×1024 pixels with in-pixel amplification, shaping, discrimination and multi-event buffering. The readout of the sensitive matrix is hit driven. There is no signaling activity over the matrix if there are no hits to read out and power consumption is proportional to the occupancy. The sensor meets the experimental requirements of detection efficiency above 99%, fake-hit probability below 10{sup −5} and a spatial resolution of 5 μm. The capability to read out Pb–Pb interactions at 100 kHz is provided. The power density of the ALPIDE chip is projected to be less than 35 mW/cm{sup 2} for the application in the Inner Barrel Layers and below 20 mW/cm{sup 2} for the Outer Barrel Layers, where the occupancy is lower. This contribution describes the architecture and the main features of the final ALPIDE chip, planned for submission at the beginning of 2016. Early results from the experimental qualification of full scale prototype predecessors are also reported. - Highlights: • The ALPIDE chip, an innovative CMOS pixel particle detector is described. • It achieves excellent detection performance figures and very low power consumption. • The characterization of prototypes confirms the achievement of the specifications.

Performance of the CMS Phase 1 Pixel Detector

CERN Document Server

Akgun, Bora

2018-01-01

It is anticipated that the LHC accelerator will reach and exceed the luminosity of L = 2$\\times$10$^{34}$cm$^{-2}$s$^{-1}$ during the LHC Run 2 period until 2023. At this higher luminosity and increased hit occupancies the CMS phase-0 pixel detector would have been subjected to severe dead time and inefficiencies introduced by limited buffers in the analog read-out chip and effects of radiation damage in the sensors. Therefore a new pixel detector has been built and replaced the phase-0 detector in the 2016/17 LHC extended year-end technical stop. The CMS phase-1 pixel detector features four central barrel layers and three end-cap disks in forward and backward direction for robust tracking performance, and a significantly reduced overall material budget including new cooling and powering schemes. The design of the new front-end readout chip comprises larger data buffers, an increased transmission bandwidth, and low-threshold comparators. These improvements allow the new pixel detector to sustain and improve t...

Status of the CMS Phase 1 Pixel Upgrade

CERN Document Server

Mattig, Stefan

2014-01-01

The silicon pixel detector is the innermost component of the CMS tracking system, providing high precision space point measurements of charged particle trajectories. Before 2018 the instantaneous luminosity of the LHC is expected to reach 2\\,$\\times 10^{34}\\,{\\rm cm^{-2}s^{-1}}$, which will significantly increase the number of interactions per bunch crossing. The current pixel detector of CMS was not designed to work efficiently in such a high occupancy environment and will be degraded by substantial data-loss introduced by buffer filling in the analog Read-Out Chip (ROC) and effects of radiation damage in the sensors, built up over the operational period. To maintain a high tracking efficiency, CMS has planned to replace the current pixel system during ``Phase 1'' (2016/17) by a new lightweight detector, equipped with an additional 4th layer in the barrel, and one additional forward/backward disk. A new digital ROC has been designed, with increased buffers to minimize data-loss, and a digital read-out protoc...

A high sensitivity 20Mfps CMOS image sensor with readout speed of 1Tpixel/sec for visualization of ultra-high speed phenomena

Science.gov (United States)

Kuroda, R.; Sugawa, S.

2017-02-01

Ultra-high speed (UHS) CMOS image sensors with on-chop analog memories placed on the periphery of pixel array for the visualization of UHS phenomena are overviewed in this paper. The developed UHS CMOS image sensors consist of 400H×256V pixels and 128 memories/pixel, and the readout speed of 1Tpixel/sec is obtained, leading to 10 Mfps full resolution video capturing with consecutive 128 frames, and 20 Mfps half resolution video capturing with consecutive 256 frames. The first development model has been employed in the high speed video camera and put in practical use in 2012. By the development of dedicated process technologies, photosensitivity improvement and power consumption reduction were simultaneously achieved, and the performance improved version has been utilized in the commercialized high-speed video camera since 2015 that offers 10 Mfps with ISO16,000 photosensitivity. Due to the improved photosensitivity, clear images can be captured and analyzed even under low light condition, such as under a microscope as well as capturing of UHS light emission phenomena.

CMOS Active Pixel Sensor Star Tracker with Regional Electronic Shutter

Science.gov (United States)

Yadid-Pecht, Orly; Pain, Bedabrata; Staller, Craig; Clark, Christopher; Fossum, Eric

1996-01-01

The guidance system in a spacecraft determines spacecraft attitude by matching an observed star field to a star catalog....An APS(active pixel sensor)-based system can reduce mass and power consumption and radiation effects compared to a CCD(charge-coupled device)-based system...This paper reports an APS (active pixel sensor) with locally variable times, achieved through individual pixel reset (IPR).

The first bump-bonded pixel detectors on CVD diamond

International Nuclear Information System (INIS)

Adam, W.; Bauer, C.; Berdermann, E.; Bergonzo, P.; Bogani, F.; Borchi, E.; Brambilla, A.; Bruzzi, M.; Colledani, C.; Conway, J.; Dabrowski, W.; Delpierre, P.; Deneuville, A.; Dulinski, W.; Eijk, B. van; Fallou, A.; Fizzotti, F.; Foulon, F.; Friedl, M.; Gan, K.K.; Gheeraert, E.; Grigoriev, E.; Hallewell, G.; Hall-Wilton, R.; Han, S.; Hartjes, F.; Hrubec, J.; Husson, D.; Kagan, H.; Kania, D.; Kaplon, J.; Karl, C.; Kass, R.; Krammer, M.; Logiudice, A.; Lu, R.; Manfredi, P.F.; Manfredotti, C.; Marshall, R.D.; Meier, D.; Mishina, M.; Oh, A.; Palmieri, V.G.; Pan, L.S.; Peitz, A.; Pernicka, M.; Pirollo, S.; Polesello, P.; Pretzl, K.; Re, V.; Riester, J.L.; Roe, S.; Roff, D.; Rudge, A.; Schnetzer, S.; Sciortino, S.; Speziali, V.; Stelzer, H.; Steuerer, J.; Stone, R.; Tapper, R.J.; Tesarek, R.; Trawick, M.; Trischuk, W.; Turchetta, R.; Vittone, E.; Wagner, A.; Walsh, A.M.; Wedenig, R.; Weilhammer, P.; Zeuner, W.; Ziock, H.; Zoeller, M.; Charles, E.; Ciocio, A.; Dao, K.; Einsweiler, K.; Fasching, D.; Gilchriese, M.; Joshi, A.; Kleinfelder, S.; Milgrome, O.; Palaio, N.; Richardson, J.; Sinervo, P.; Zizka, G.

1999-01-01

Diamond is a nearly ideal material for detecting ionising radiation. Its outstanding radiation hardness, fast charge collection and low leakage current allow it to be used in high radiation environments. These characteristics make diamond sensors particularly appealing for use in the next generation of pixel detectors. Over the last year, the RD42 collaboration has worked with several groups that have developed pixel readout electronics in order to optimise diamond sensors for bump-bonding. This effort resulted in an operational diamond pixel sensor that was tested in a pion beam. We demonstrate that greater than 98% of the channels were successfully bump-bonded and functioning. The device shows good overall hit efficiency as well as clear spatial hit correlation to tracks measured in a silicon reference telescope. A position resolution of 14.8 μm was observed, consistent with expectations given the detector pitch

The first bump-bonded pixel detectors on CVD diamond

CERN Document Server

Adam, W; Berdermann, E; Bergonzo, P; Bogani, F; Borchi, E; Brambilla, A; Bruzzi, Mara; Colledani, C; Conway, J; Dabrowski, W; Delpierre, P A; Deneuville, A; Dulinski, W; van Eijk, B; Fallou, A; Fizzotti, F; Foulon, F; Fried, M; Gan, K K; Gheeraert, E; Grigoriev, E; Hallewell, G D; Hall-Wilton, R; Han, S; Hartjes, F G; Hrubec, Josef; Husson, D; Kagan, H; Kania, D R; Kaplon, J; Karl, C; Kass, R; Krammer, Manfred; Lo Giudice, A; Lü, R; Manfredi, P F; Manfredotti, C; Marshall, R D; Meier, D; Mishina, M; Oh, A; Palmieri, V G; Pan, L S; Peitz, A; Pernicka, Manfred; Pirollo, S; Polesello, P; Pretzl, Klaus P; Re, V; Riester, J L; Roe, S; Roff, D G; Rudge, A; Schnetzer, S R; Sciortino, S; Speziali, V; Stelzer, H; Steuerer, J; Stone, R; Tapper, R J; Tesarek, R J; Trawick, M L; Trischuk, W; Turchetta, R; Vittone, E; Wagner, A; Walsh, A M; Wedenig, R; Weilhammer, Peter; Zeuner, W; Ziock, H J; Zöller, M; Charles, E; Ciocio, A; Dao, K; Einsweiler, Kevin F; Fasching, D; Gilchriese, M G D; Joshi, A; Kleinfelder, S A; Milgrome, O; Palaio, N; Richardson, J; Sinervo, P K; Zizka, G

1999-01-01

Diamond is a nearly ideal material for detecting ionising radiation. Its outstanding radiation hardness, fast charge collection and low leakage current allow it to be used in high radiation environments. These characteristics make diamond sensors particularly appealing for use in the next generation of pixel detectors. Over the last year, the RD42 collaboration has worked with several groups that have developed pixel readout electronics in order to optimise diamond sensors for bump-bonding. This effort resulted in an operational diamond pixel sensor that was tested in a pion beam. We demonstrate that greater than 98565544f the channels were successfully bump-bonded and functioning. The device shows good overall hit efficiency as well as clear spatial hit correlation to tracks measured in a silicon reference telescope. A position resolution of 14.8 mu m was observed, consistent with expectations given the detector pitch. (13 refs).

The first bump-bonded pixel detectors on CVD diamond

Energy Technology Data Exchange (ETDEWEB)

Adam, W.; Bauer, C.; Berdermann, E.; Bergonzo, P.; Bogani, F.; Borchi, E.; Brambilla, A.; Bruzzi, M.; Colledani, C.; Conway, J.; Dabrowski, W.; Delpierre, P.; Deneuville, A.; Dulinski, W.; Eijk, B. van; Fallou, A.; Fizzotti, F.; Foulon, F.; Friedl, M.; Gan, K.K.; Gheeraert, E.; Grigoriev, E.; Hallewell, G.; Hall-Wilton, R.; Han, S.; Hartjes, F.; Hrubec, J.; Husson, D.; Kagan, H.; Kania, D.; Kaplon, J.; Karl, C.; Kass, R.; Krammer, M.; Logiudice, A.; Lu, R.; Manfredi, P.F.; Manfredotti, C.; Marshall, R.D.; Meier, D.; Mishina, M.; Oh, A.; Palmieri, V.G.; Pan, L.S.; Peitz, A.; Pernicka, M.; Pirollo, S.; Polesello, P.; Pretzl, K.; Re, V.; Riester, J.L.; Roe, S.; Roff, D.; Rudge, A.; Schnetzer, S.; Sciortino, S.; Speziali, V.; Stelzer, H.; Steuerer, J.; Stone, R.; Tapper, R.J.; Tesarek, R.; Trawick, M.; Trischuk, W. E-mail: william@physics.utoronto.ca; Turchetta, R.; Vittone, E.; Wagner, A.; Walsh, A.M.; Wedenig, R.; Weilhammer, P.; Zeuner, W.; Ziock, H.; Zoeller, M.; Charles, E.; Ciocio, A.; Dao, K.; Einsweiler, K.; Fasching, D.; Gilchriese, M.; Joshi, A.; Kleinfelder, S.; Milgrome, O.; Palaio, N.; Richardson, J.; Sinervo, P.; Zizka, G

1999-11-01

Diamond is a nearly ideal material for detecting ionising radiation. Its outstanding radiation hardness, fast charge collection and low leakage current allow it to be used in high radiation environments. These characteristics make diamond sensors particularly appealing for use in the next generation of pixel detectors. Over the last year, the RD42 collaboration has worked with several groups that have developed pixel readout electronics in order to optimise diamond sensors for bump-bonding. This effort resulted in an operational diamond pixel sensor that was tested in a pion beam. We demonstrate that greater than 98% of the channels were successfully bump-bonded and functioning. The device shows good overall hit efficiency as well as clear spatial hit correlation to tracks measured in a silicon reference telescope. A position resolution of 14.8 {mu}m was observed, consistent with expectations given the detector pitch.

A silicon pixel detector prototype for the CLIC vertex detector

CERN Multimedia

AUTHOR|(INSPIRE)INSPIRE-00714258

2017-01-01

A silicon pixel detector prototype for CLIC, currently under study for the innermost detector surrounding the collision point. The detector is made of a High-Voltage CMOS sensor (top) and a CLICpix2 readout chip (bottom) that are glued to each other. Both parts have a size of 3.3 x 4.0 $mm^2$ and consist of an array of 128 x 128 pixels of 25 x 25 $\\micro m^2$ size.

Characterization study of an intensified complementary metal-oxide-semiconductor active pixel sensor

Science.gov (United States)

Griffiths, J. A.; Chen, D.; Turchetta, R.; Royle, G. J.

2011-03-01

An intensified CMOS active pixel sensor (APS) has been constructed for operation in low-light-level applications: a high-gain, fast-light decay image intensifier has been coupled via a fiber optic stud to a prototype "VANILLA" APS, developed by the UK based MI3 consortium. The sensor is capable of high frame rates and sparse readout. This paper presents a study of the performance parameters of the intensified VANILLA APS system over a range of image intensifier gain levels when uniformly illuminated with 520 nm green light. Mean-variance analysis shows the APS saturating around 3050 Digital Units (DU), with the maximum variance increasing with increasing image intensifier gain. The system's quantum efficiency varies in an exponential manner from 260 at an intensifier gain of 7.45 × 103 to 1.6 at a gain of 3.93 × 101. The usable dynamic range of the system is 60 dB for intensifier gains below 1.8 × 103, dropping to around 40 dB at high gains. The conclusion is that the system shows suitability for the desired application.

Photodiode area effect on performance of X-ray CMOS active pixel sensors

Science.gov (United States)

Kim, M. S.; Kim, Y.; Kim, G.; Lim, K. T.; Cho, G.; Kim, D.

2018-02-01

Compared to conventional TFT-based X-ray imaging devices, CMOS-based X-ray imaging sensors are considered next generation because they can be manufactured in very small pixel pitches and can acquire high-speed images. In addition, CMOS-based sensors have the advantage of integration of various functional circuits within the sensor. The image quality can also be improved by the high fill-factor in large pixels. If the size of the subject is small, the size of the pixel must be reduced as a consequence. In addition, the fill factor must be reduced to aggregate various functional circuits within the pixel. In this study, 3T-APS (active pixel sensor) with photodiodes of four different sizes were fabricated and evaluated. It is well known that a larger photodiode leads to improved overall performance. Nonetheless, if the size of the photodiode is > 1000 μm2, the degree to which the sensor performance increases as the photodiode size increases, is reduced. As a result, considering the fill factor, pixel-pitch > 32 μm is not necessary to achieve high-efficiency image quality. In addition, poor image quality is to be expected unless special sensor-design techniques are included for sensors with a pixel pitch of 25 μm or less.

Diamond and silicon pixel detectors in high radiation environments

Energy Technology Data Exchange (ETDEWEB)

Tsung, Jieh-Wen

2012-10-15

Diamond pixel detector is a promising candidate for tracking of collider experiments because of the good radiation tolerance of diamond. The diamond pixel detector must withstand the radiation damage from 10{sup 16} particles per cm{sup 2}, which is the expected total fluence in High Luminosity Large Hadron Collider. The performance of diamond and silicon pixel detectors are evaluated in this research in terms of the signal-to-noise ratio (SNR). Single-crystal diamond pixel detectors with the most recent readout chip ATLAS FE-I4 are produced and characterized. Based on the results of the measurement, the SNR of diamond pixel detector is evaluated as a function of radiation fluence, and compared to that of planar-silicon ones. The deterioration of signal due to radiation damage is formulated using the mean free path of charge carriers in the sensor. The noise from the pixel readout circuit is simulated and calculated with leakage current and input capacitance to the amplifier as important parameters. The measured SNR shows good agreement with the calculated and simulated results, proving that the performance of diamond pixel detectors can exceed the silicon ones if the particle fluence is more than 10{sup 15} particles per cm{sup 2}.

Diamond and silicon pixel detectors in high radiation environments

International Nuclear Information System (INIS)

Tsung, Jieh-Wen

2012-10-01

Diamond pixel detector is a promising candidate for tracking of collider experiments because of the good radiation tolerance of diamond. The diamond pixel detector must withstand the radiation damage from 10 16 particles per cm 2 , which is the expected total fluence in High Luminosity Large Hadron Collider. The performance of diamond and silicon pixel detectors are evaluated in this research in terms of the signal-to-noise ratio (SNR). Single-crystal diamond pixel detectors with the most recent readout chip ATLAS FE-I4 are produced and characterized. Based on the results of the measurement, the SNR of diamond pixel detector is evaluated as a function of radiation fluence, and compared to that of planar-silicon ones. The deterioration of signal due to radiation damage is formulated using the mean free path of charge carriers in the sensor. The noise from the pixel readout circuit is simulated and calculated with leakage current and input capacitance to the amplifier as important parameters. The measured SNR shows good agreement with the calculated and simulated results, proving that the performance of diamond pixel detectors can exceed the silicon ones if the particle fluence is more than 10 15 particles per cm 2 .

FE-I2 a front-end readout chip designed in a commercial 025- mu m process for the ATLAS pixel detector at LHC

CERN Document Server

Blanquart, L; Einsweiler, Kevin F; Fischer, P; Mandelli, E; Meddeler, G; Peric, I

2004-01-01

A new front-end chip (FE-I2) has been developed for the ATLAS pixel detector at the future Large Hadron Collider (LHC) accelerator facility of the European Laboratory for Particle Physics (CERN). This chip has been submitted in a commercial 0.25- mu m CMOS process using special layout techniques for radiation tolerance. It comprises 2880 pixels arranged into 18 columns of 160 channels. Each pixel element of dimension 50 mu m * 400 mu m is composed of a charge- sensitive amplifier followed by a fast discriminator with a detection threshold adjustable within a range of 0-6000 electrons and slow control logic incorporating a wired-hit-Or, preamplifier-kill, readout mask, and automatic threshold tuning circuitry. There are two single-event- upset (SEU)-tolerant DACs for reducing threshold (7-b) and recovery- time (3-b) mismatches from pixel to pixel along with digital hit emulation and a differential readout circuit aimed at transporting time-stamped data from each pixel to buffers at the bottom of the chip. In c...

EXCALIBUR: a small-pixel photon counting area detector for coherent X-ray diffraction - Front-end design, fabrication and characterisation

Science.gov (United States)

Marchal, J.; Horswell, I.; Willis, B.; Plackett, R.; Gimenez, E. N.; Spiers, J.; Ballard, D.; Booker, P.; Thompson, J. A.; Gibbons, P.; Burge, S. R.; Nicholls, T.; Lipp, J.; Tartoni, N.

2013-03-01

Coherent X-ray diffraction experiments on synchrotron X-ray beamlines require detectors with high spatial resolution and large detection area. The read-out chip developed by the MEDIPIX3 collaboration offers a small pixel size of 55 microns resulting in a very high spatial resolution when coupled to a direct X-ray conversion segmented silicon sensor. MEDIPIX3 assemblies present also the advantages of hybrid pixel detectors working in single photon counting mode: noiseless imaging, large dynamic range, extremely high frame rate. The EXCALIBUR detector is under development for the X-ray Coherence and Imaging Beamline I13 of the Diamond Light Source. This new detector consists of three modules, each with 16 MEDIPIX3 chips which can be read-out at 100 frames per second in continuous mode or 1000 frames per second in burst mode. In each module, the sensor is a large single silicon die covering 2 rows of 8 individual MEDIPIX3 read-out chips and provides a continuous active detection region within a module. Each module includes 1 million solder bumps connecting the 55 microns pixels of the silicon sensor to the 55 microns pixels of the 16 MEDIPIX3 read-out chips. The detection area of the 3-module EXCALIBUR detector is 115 mm × 100 mm with a small 6.8 mm wide inactive region between modules. Each detector module is connected to 2 FPGA read-out boards via a flexi-rigid circuit to allow a fully parallel read-out of the 16 MEDIPIX3 chips. The 6 FPGA read-out boards used in the EXCALIBUR detector are interfaced to 6 computing nodes via 10Gbit/s fibre-optic links to maintain the very high frame-rate capability. The standard suite of EPICS control software is used to operate the detector and to integrate it with the Diamond Light Source beamline software environment. This article describes the design, fabrication and characterisation of the MEDIPIX3-based modules composing the EXCALIBUR detector.

EXCALIBUR: a small-pixel photon counting area detector for coherent X-ray diffraction - Front-end design, fabrication and characterisation

International Nuclear Information System (INIS)

Marchal, J; Horswell, I; Willis, B; Plackett, R; Gimenez, E N; Spiers, J; Thompson, J A; Gibbons, P; Tartoni, N; Ballard, D; Booker, P; Burge, S R; Nicholls, T; Lipp, J

2013-01-01

Coherent X-ray diffraction experiments on synchrotron X-ray beamlines require detectors with high spatial resolution and large detection area. The read-out chip developed by the MEDIPIX3 collaboration offers a small pixel size of 55 microns resulting in a very high spatial resolution when coupled to a direct X-ray conversion segmented silicon sensor. MEDIPIX3 assemblies present also the advantages of hybrid pixel detectors working in single photon counting mode: noiseless imaging, large dynamic range, extremely high frame rate. The EXCALIBUR detector is under development for the X-ray Coherence and Imaging Beamline I13 of the Diamond Light Source. This new detector consists of three modules, each with 16 MEDIPIX3 chips which can be read-out at 100 frames per second in continuous mode or 1000 frames per second in burst mode. In each module, the sensor is a large single silicon die covering 2 rows of 8 individual MEDIPIX3 read-out chips and provides a continuous active detection region within a module. Each module includes 1 million solder bumps connecting the 55 microns pixels of the silicon sensor to the 55 microns pixels of the 16 MEDIPIX3 read-out chips. The detection area of the 3-module EXCALIBUR detector is 115 mm × 100 mm with a small 6.8 mm wide inactive region between modules. Each detector module is connected to 2 FPGA read-out boards via a flexi-rigid circuit to allow a fully parallel read-out of the 16 MEDIPIX3 chips. The 6 FPGA read-out boards used in the EXCALIBUR detector are interfaced to 6 computing nodes via 10Gbit/s fibre-optic links to maintain the very high frame-rate capability. The standard suite of EPICS control software is used to operate the detector and to integrate it with the Diamond Light Source beamline software environment. This article describes the design, fabrication and characterisation of the MEDIPIX3-based modules composing the EXCALIBUR detector.

Charge collection and non-ionizing radiation tolerance of CMOS pixel sensors using a 0.18 μm CMOS process

Science.gov (United States)

Zhang, Ying; Zhu, Hongbo; Zhang, Liang; Fu, Min

2016-09-01

The proposed Circular Electron Positron Collider (CEPC) will be primarily aimed for precision measurements of the discovered Higgs boson. Its innermost vertex detector, which will play a critical role in heavy-flavor tagging, must be constructed with fine-pitched silicon pixel sensors with low power consumption and fast readout. CMOS pixel sensor (CPS), as one of the most promising candidate technologies, has already demonstrated its excellent performance in several high energy physics experiments. Therefore it has been considered for R&D for the CEPC vertex detector. In this paper, we present the preliminary studies to improve the collected signal charge over the equivalent input capacitance ratio (Q / C), which will be crucial to reduce the analog power consumption. We have performed detailed 3D device simulation and evaluated potential impacts from diode geometry, epitaxial layer properties and non-ionizing radiation damage. We have proposed a new approach to improve the treatment of the boundary conditions in simulation. Along with the TCAD simulation, we have designed the exploratory prototype utilizing the TowerJazz 0.18 μm CMOS imaging sensor process and we will verify the simulation results with future measurements.

Further applications for mosaic pixel FPA technology

Science.gov (United States)

Liddiard, Kevin C.

2011-06-01

In previous papers to this SPIE forum the development of novel technology for next generation PIR security sensors has been described. This technology combines the mosaic pixel FPA concept with low cost optics and purpose-designed readout electronics to provide a higher performance and affordable alternative to current PIR sensor technology, including an imaging capability. Progressive development has resulted in increased performance and transition from conventional microbolometer fabrication to manufacture on 8 or 12 inch CMOS/MEMS fabrication lines. A number of spin-off applications have been identified. In this paper two specific applications are highlighted: high performance imaging IRFPA design and forest fire detection. The former involves optional design for small pixel high performance imaging. The latter involves cheap expendable sensors which can detect approaching fire fronts and send alarms with positional data via mobile phone or satellite link. We also introduce to this SPIE forum the application of microbolometer IR sensor technology to IoT, the Internet of Things.

Pre- and post-irradiation performance of FBK 3D silicon pixel detectors for CMS

International Nuclear Information System (INIS)

Krzywda, A.; Alagoz, E.; Bubna, M.; Obertino, M.; Solano, A.; Arndt, K.; Uplegger, L.; Betta, G.F. Dalla; Boscardin, M.; Ngadiuba, J.; Rivera, R.; Menasce, D.; Moroni, L.; Terzo, S.; Bortoletto, D.; Prosser, A.; Adreson, J.; Kwan, S.; Osipenkov, I.; Bolla, G.

2014-01-01

In preparation for the tenfold luminosity upgrade of the Large Hadron Collider (the HL-LHC) around 2020, three-dimensional (3D) silicon pixel sensors are being developed as a radiation-hard candidate to replace the planar ones currently being used in the CMS pixel detector. This study examines an early batch of FBK sensors (named ATLAS08) of three 3D pixel geometries: 1E, 2E, and 4E, which respectively contain one, two, and four readout electrodes for each pixel, passing completely through the bulk. We present electrical characteristics and beam test performance results for each detector before and after irradiation. The maximum fluence applied is 3.5×10 15 n eq /cm 2

A microfabricated fringing field capacitive pH sensor with an integrated readout circuit

International Nuclear Information System (INIS)

Arefin, Md Shamsul; Redoute, Jean-Michel; Rasit Yuce, Mehmet; Bulut Coskun, M.; Alan, Tuncay; Neild, Adrian

2014-01-01

This work presents a microfabricated fringe-field capacitive pH sensor using interdigitated electrodes and an integrated modulation-based readout circuit. The changes in capacitance of the sensor result from the permittivity changes due to pH variations and are converted to frequency shifts using a crossed-coupled voltage controlled oscillator readout circuit. The shift in resonant frequency of the readout circuit is 30.96 MHz for a change in pH of 1.0–5.0. The sensor can be used for the measurement of low pH levels, such as gastric acid, and can be integrated with electronic pills. The measurement results show high repeatability, low noise, and a stable output.

A microfabricated fringing field capacitive pH sensor with an integrated readout circuit

Energy Technology Data Exchange (ETDEWEB)

Arefin, Md Shamsul, E-mail: md.arefin@monash.edu; Redoute, Jean-Michel; Rasit Yuce, Mehmet [Electrical and Computer Systems Engineering, Monash University, Melbourne (Australia); Bulut Coskun, M.; Alan, Tuncay; Neild, Adrian [Mechanical and Aerospace Engineering, Monash University, Melbourne (Australia)

2014-06-02

This work presents a microfabricated fringe-field capacitive pH sensor using interdigitated electrodes and an integrated modulation-based readout circuit. The changes in capacitance of the sensor result from the permittivity changes due to pH variations and are converted to frequency shifts using a crossed-coupled voltage controlled oscillator readout circuit. The shift in resonant frequency of the readout circuit is 30.96 MHz for a change in pH of 1.0–5.0. The sensor can be used for the measurement of low pH levels, such as gastric acid, and can be integrated with electronic pills. The measurement results show high repeatability, low noise, and a stable output.

Characterization of pixel sensor designed in 180 nm SOI CMOS technology

Science.gov (United States)

Benka, T.; Havranek, M.; Hejtmanek, M.; Jakovenko, J.; Janoska, Z.; Marcisovska, M.; Marcisovsky, M.; Neue, G.; Tomasek, L.; Vrba, V.

2018-01-01

A new type of X-ray imaging Monolithic Active Pixel Sensor (MAPS), X-CHIP-02, was developed using a 180 nm deep submicron Silicon On Insulator (SOI) CMOS commercial technology. Two pixel matrices were integrated into the prototype chip, which differ by the pixel pitch of 50 μm and 100 μm. The X-CHIP-02 contains several test structures, which are useful for characterization of individual blocks. The sensitive part of the pixel integrated in the handle wafer is one of the key structures designed for testing. The purpose of this structure is to determine the capacitance of the sensitive part (diode in the MAPS pixel). The measured capacitance is 2.9 fF for 50 μm pixel pitch and 4.8 fF for 100 μm pixel pitch at -100 V (default operational voltage). This structure was used to measure the IV characteristics of the sensitive diode. In this work, we report on a circuit designed for precise determination of sensor capacitance and IV characteristics of both pixel types with respect to X-ray irradiation. The motivation for measurement of the sensor capacitance was its importance for the design of front-end amplifier circuits. The design of pixel elements, as well as circuit simulation and laboratory measurement techniques are described. The experimental results are of great importance for further development of MAPS sensors in this technology.

New generation of monolithic active pixel sensors for charged particle detection; Developpement d'un capteur de nouvelle generation et son electronique integree pour les collisionneurs futurs

Energy Technology Data Exchange (ETDEWEB)

Deptuch, G

2002-09-01

Vertex detectors are of great importance in particle physics experiments, as the knowledge of the event flavour is becoming an issue for the physics programme at Future Linear Colliders. Monolithic Active Pixel Sensors (MAPS) based on a novel detector structure have been proposed. Their fabrication is compatible with a standard CMOS process. The sensor is inseparable from the readout electronics, since both of them are integrated on the same, low-resistivity silicon wafer. The basic pixel configuration comprises only three MOS transistors and a diode collecting the charge through thermal diffusion. The charge is generated in the thin non-depleted epitaxial layer underneath the readout electronics. This approach provides, at low cost, a high resolution and thin device with the whole area sensitive to radiation. Device simulations using the ISE-TCAD package have been carried out to study the charge collection mechanism. In order to demonstrate the viability of the technique, four prototype chips have been fabricated using different submicrometer CMOS processes. The pixel gain has been calibrated using a {sup 55}Fe source and the Poisson sequence method. The prototypes have been exposed to high-energy particle beams at CERN. The tests proved excellent detection performances expressed in a single-track spatial resolution of 1.5 {mu}m and detection efficiency close to 100%, resulting from a SNR ratio of more than 30. Irradiation tests showed immunity of MAPS to a level of a few times 10{sup 12} n/cm{sup 2} and a few hundred kRad of ionising radiation. The ideas for future work, including on-pixel signal amplification, double sampling operation and current mode pixel design are present as well. (author)

The ALICE silicon pixel detector front-end and read-out electronics

CERN Document Server

Kluge, A

2006-01-01

The ALICE silicon pixel detector (SPD) comprises the two innermost barrel layers of the ALICE inner tracker system. The SPD includes 120 half staves each of which consists of a linear array of 10 ALICE pixel chips bump bonded to two silicon sensors. Each pixel chip contains 8192 active cells, so the total number of pixel cells in the SPD is ≈107. The tight material budget and the limitation in physical dimensions required by the detector design introduce new challenges for the integration of the on-detector electronics. An essential part of the half stave is a low-mass multi-layer flex that carries power, ground, and signals to the pixel chips. Each half stave is read out using a multi-chip module (MCM). The MCM contains three radiation hard ASICs and an 800 Mbit/s custom developed optical link for the data transfer between the detector and the control room. The detector components are less than 3 mm thick. The production of the half-staves and MCMs is currently under way. Test results as well as on overvie...

arXiv Characterization and Verification Environment for the RD53A Pixel Readout Chip in 65 nm CMOS

CERN Document Server

Vogt, M.; Hemperek, T.; Janssen, J.; Pohl, D.L.; Daas, M.

2018-02-02

The RD53 collaboration is currently designing a large scale prototype pixel readout chip in 65 nm CMOS technology for the phase 2 upgrades at the HL-LHC. The RD53A chip will be available by the end of the year 2017 and will be extensively tested to confirm if the circuit and the architecture make a solid foundation for the final pixel readout chips for the experiments at the HL-LHC. A test and data acquisition system for the RD53A chip is currently under development to perform single-chip and multi-chip module measurements. In addition, the verification of the RD53A design is performed in a dedicated simulation environment. The concept and the implementation of the test and data acquisition system and the simulation environment, which are based on a modular data acquisition and system testing framework, are presented in this work.

Characterisation of capacitively coupled HV/HR-CMOS sensor chips for the CLIC vertex detector

CERN Document Server

AUTHOR|(SzGeCERN)756402

2017-01-01

The capacitive coupling between an active sensor and a readout ASIC has been considered in the framework of the CLIC vertex detector study. The CLICpix Capacitively Coupled Pixel Detector (C3PD) is a High-Voltage CMOS sensor chip produced in a commercial 180 nm HV-CMOS process for this purpose. The sensor was designed to be connected to the CLICpix2 readout chip. It therefore matches the dimensions of the readout chip, featuring a matrix of 128 × 128 square pixels with 25 μm pitch. The sensor chip has been produced with the standard value for the substrate resistivity (∼ 20 Ωcm) and it has been characterised in standalone testing mode, before receiving and testing capacitively coupled assemblies. The standalone measurement results show a rise time of ∼ 20 ns for a power consumption of 5 μW/pixel. Production of the C3PD HV-CMOS sensor chip with higher substrate resistivity wafers (∼ 20, 80, 200 and 1000 Ωcm) is foreseen. The expected benefits of the higher substrate resistivity will be studied using...

Development of CMOS pixel sensors for the upgrade of the ALICE Inner Tracking System

International Nuclear Information System (INIS)

Molnar, L.

2014-01-01

The ALICE Collaboration is preparing a major upgrade of the current detector, planned for installation during the second long LHC shutdown in the years 2018-19, in order to enhance its low-momentum vertexing and tracking capability, and exploit the planned increase of the LHC luminosity with Pb beams. One of the cornerstones of the ALICE upgrade strategy is to replace the current Inner Tracking System in its entirety with a new, high resolution, low-material ITS detector. The new ITS will consist of seven concentric layers equipped with Monolithic Active Pixel Sensors (MAPS) implemented using the 0.18 μm CMOS technology of TowerJazz. In this contribution, the main key features of the ITS upgrade will be illustrated with emphasis on the functionality of the pixel chip. The ongoing developments on the readout architectures, which have been implemented in several fabricated prototypes, will be discussed. The operational features of these prototypes as well as the results of the characterisation tests before and after irradiation will also be presented

Development of CMOS pixel sensors for the upgrade of the ALICE Inner Tracking System

Science.gov (United States)

Molnar, L.

2014-12-01

The ALICE Collaboration is preparing a major upgrade of the current detector, planned for installation during the second long LHC shutdown in the years 2018-19, in order to enhance its low-momentum vertexing and tracking capability, and exploit the planned increase of the LHC luminosity with Pb beams. One of the cornerstones of the ALICE upgrade strategy is to replace the current Inner Tracking System in its entirety with a new, high resolution, low-material ITS detector. The new ITS will consist of seven concentric layers equipped with Monolithic Active Pixel Sensors (MAPS) implemented using the 0.18 μm CMOS technology of TowerJazz. In this contribution, the main key features of the ITS upgrade will be illustrated with emphasis on the functionality of the pixel chip. The ongoing developments on the readout architectures, which have been implemented in several fabricated prototypes, will be discussed. The operational features of these prototypes as well as the results of the characterisation tests before and after irradiation will also be presented.

Silicon-on-insulator (SOI) active pixel sensors with the photosite implemented in the substrate

Science.gov (United States)

Zheng, Xinyu (Inventor); Pain, Bedabrata (Inventor)

2005-01-01

Active pixel sensors for a high quality imager are fabricated using a silicon-on-insulator (SOI) process by integrating the photodetectors on the SOI substrate and forming pixel readout transistors on the SOI thin-film. The technique can include forming silicon islands on a buried insulator layer disposed on a silicon substrate and selectively etching away the buried insulator layer over a region of the substrate to define a photodetector area. Dopants of a first conductivity type are implanted to form a signal node in the photodetector area and to form simultaneously drain/source regions for a first transistor in at least a first one of the silicon islands. Dopants of a second conductivity type are implanted to form drain/source regions for a second transistor in at least a second one of the silicon islands. Isolation rings around the photodetector also can be formed when dopants of the second conductivity type are implanted. Interconnections among the transistors and the photodetector are provided to allow signals sensed by the photodetector to be read out via the transistors formed on the silicon islands.

CMOS Active Pixel Sensor Technology and Reliability Characterization Methodology

Science.gov (United States)

Chen, Yuan; Guertin, Steven M.; Pain, Bedabrata; Kayaii, Sammy

2006-01-01

This paper describes the technology, design features and reliability characterization methodology of a CMOS Active Pixel Sensor. Both overall chip reliability and pixel reliability are projected for the imagers.

Bio-Inspired Asynchronous Pixel Event Tricolor Vision Sensor.

Science.gov (United States)

Lenero-Bardallo, Juan Antonio; Bryn, D H; Hafliger, Philipp

2014-06-01

This article investigates the potential of the first ever prototype of a vision sensor that combines tricolor stacked photo diodes with the bio-inspired asynchronous pixel event communication protocol known as Address Event Representation (AER). The stacked photo diodes are implemented in a 22 × 22 pixel array in a standard STM 90 nm CMOS process. Dynamic range is larger than 60 dB and pixels fill factor is 28%. The pixels employ either simple pulse frequency modulation (PFM) or a Time-to-First-Spike (TFS) mode. A heuristic linear combination of the chip's inherent pseudo colors serves to approximate RGB color representation. Furthermore, the sensor outputs can be processed to represent the radiation in the near infrared (NIR) band without employing external filters, and to color-encode direction of motion due to an asymmetry in the update rates of the different diode layers.

Preliminary Assessment of Microwave Readout Multiplexing Factor

Energy Technology Data Exchange (ETDEWEB)

Croce, Mark Philip [Los Alamos National Lab. (LANL), Los Alamos, NM (United States); Koehler, Katrina Elizabeth [Los Alamos National Lab. (LANL), Los Alamos, NM (United States); Rabin, Michael W. [Los Alamos National Lab. (LANL), Los Alamos, NM (United States); Bennett, D. A. [National Inst. of Standards and Technology (NIST), Boulder, CO (United States); Mates, J. A. B. [National Inst. of Standards and Technology (NIST), Boulder, CO (United States); Gard, J. D. [National Inst. of Standards and Technology (NIST), Boulder, CO (United States); Becker, D. [National Inst. of Standards and Technology (NIST), Boulder, CO (United States); Schmidt, D. R. [National Inst. of Standards and Technology (NIST), Boulder, CO (United States); Ullom, J. N. [National Inst. of Standards and Technology (NIST), Boulder, CO (United States)

2017-01-23

Ultra-high resolution microcalorimeter gamma spectroscopy is a new non-destructive assay technology for measurement of plutonium isotopic composition, with the potential to reduce total measurement uncertainty to a level competitive with destructive analysis methods [1-4]. Achieving this level of performance in practical applications requires not only the energy resolution now routinely achieved with transition-edge sensor microcalorimeter arrays (an order of magnitude better than for germanium detectors) but also high throughput. Microcalorimeter gamma spectrometers have not yet achieved detection efficiency and count rate capability that is comparable to germanium detectors, largely because of limits from existing readout technology. Microcalorimeter detectors must be operated at low temperature to achieve their exceptional energy resolution. Although the typical 100 mK operating temperatures can be achieved with reliable, cryogen-free systems, the cryogenic complexity and heat load from individual readout channels for large sensor arrays is prohibitive. Multiplexing is required for practical systems. The most mature multiplexing technology at present is time-division multiplexing (TDM) [3, 5-6]. In TDM, the sensor outputs are switched by applying bias current to one SQUID amplifier at a time. Transition-edge sensor (TES) microcalorimeter arrays as large as 256 pixels have been developed for X-ray and gamma-ray spectroscopy using TDM technology. Due to bandwidth limits and noise scaling, TDM is limited to a maximum multiplexing factor of approximately 32-40 sensors on one readout line [8]. Increasing the size of microcalorimeter arrays above the kilopixel scale, required to match the throughput of germanium detectors, requires the development of a new readout technology with a much higher multiplexing factor.

A micromachined surface stress sensor with electronic readout

NARCIS (Netherlands)

Carlen, Edwin; Weinberg, M.S.; Zapata, A.M.; Borenstein, J.T.

2008-01-01

A micromachined surface stress sensor has been fabricated and integrated off chip with a low-noise, differential capacitance, electronic readout circuit. The differential capacitance signal is modulated with a high frequency carrier signal, and the output signal is synchronously demodulated and

Planar slim-edge pixel sensors for the ATLAS upgrades

International Nuclear Information System (INIS)

Altenheiner, S; Goessling, C; Jentzsch, J; Klingenberg, R; Lapsien, T; Rummler, A; Troska, G; Wittig, T; Muenstermann, D

2012-01-01

The ATLAS detector at CERN is a general-purpose experiment at the Large Hadron Collider (LHC). The ATLAS Pixel Detector is the innermost tracking detector of ATLAS and requires a sufficient level of hermeticity to achieve superb track reconstruction performance. The current planar n-type pixel sensors feature a pixel matrix of n + -implantations which is (on the opposite p-side) surrounded by so-called guard rings to reduce the high voltage stepwise towards the cutting edge and an additional safety margin. Because of the inactive region around the active area, the sensor modules have been shingled on top of each other's edge which limits the thermal performance and adds complexity in the present detector. The first upgrade phase of the ATLAS pixel detector will consist of the insertable b-layer (IBL), an additional b-layer which will be inserted into the present detector in 2013. Several changes in the sensor design with respect to the existing detector had to be applied to comply with the IBL's specifications and are described in detail. A key issue for the ATLAS upgrades is a flat arrangement of the sensors. To maintain the required level of hermeticity in the detector, the inactive sensor edges have to be reduced to minimize the dead space between the adjacent detector modules. Unirradiated and irradiated sensors with the IBL design have been operated in test beams to study the efficiency performance in the sensor edge region and it was found that the inactive edge width could be reduced from 1100 μm to less than 250 μm.

An inverter-based capacitive trans-impedance amplifier readout with offset cancellation and temporal noise reduction for IR focal plane array

Science.gov (United States)

Chen, Hsin-Han; Hsieh, Chih-Cheng

2013-09-01

This paper presents a readout integrated circuit (ROIC) with inverter-based capacitive trans-impedance amplifier (CTIA) and pseudo-multiple sampling technique for infrared focal plane array (IRFPA). The proposed inverter-based CTIA with a coupling capacitor [1], executing auto-zeroing technique to cancel out the varied offset voltage from process variation, is used to substitute differential amplifier in conventional CTIA. The tunable detector bias is applied from a global external bias before exposure. This scheme not only retains stable detector bias voltage and signal injection efficiency, but also reduces the pixel area as well. Pseudo-multiple sampling technique [2] is adopted to reduce the temporal noise of readout circuit. The noise reduction performance is comparable to the conventional multiple sampling operation without need of longer readout time proportional to the number of samples. A CMOS image sensor chip with 55×65 pixel array has been fabricated in 0.18um CMOS technology. It achieves a 12um×12um pixel size, a frame rate of 72 fps, a power-per-pixel of 0.66uW/pixel, and a readout temporal noise of 1.06mVrms (16 times of pseudo-multiple sampling), respectively.

Subpixel mapping and test beam studies with a HV2FEI4v2 CMOS-Sensor-Hybrid Module for the ATLAS inner detector upgrade

Science.gov (United States)

Bisanz, T.; Große-Knetter, J.; Quadt, A.; Rieger, J.; Weingarten, J.

2017-08-01

The upgrade to the High Luminosity Large Hadron Collider will increase the instantaneous luminosity by more than a factor of 5, thus creating significant challenges to the tracking systems of all experiments. Recent advancement of active pixel detectors designed in CMOS processes provide attractive alternatives to the well-established hybrid design using passive sensors since they allow for smaller pixel sizes and cost effective production. This article presents studies of a high-voltage CMOS active pixel sensor designed for the ATLAS tracker upgrade. The sensor is glued to the read-out chip of the Insertable B-Layer, forming a capacitively coupled pixel detector. The pixel pitch of the device under test is 33× 125 μm2, while the pixels of the read-out chip have a pitch of 50× 250 μm2. Three pixels of the CMOS device are connected to one read-out pixel, the information of which of these subpixels is hit is encoded in the amplitude of the output signal (subpixel encoding). Test beam measurements are presented that demonstrate the usability of this subpixel encoding scheme.

Performance of capacitively coupled active pixel sensors in 180 nm HV-CMOS technology after irradiation to HL-LHC fluences

International Nuclear Information System (INIS)

Feigl, S

2014-01-01

In this ATLAS upgrade R and D project, we explore the concept of using a deep-submicron HV-CMOS process to produce a drop-in replacement for traditional radiation-hard silicon sensors. Such active sensors contain simple circuits, e.g. amplifiers and discriminators, but still require a traditional (pixel or strip) readout chip. This approach yields most advantages of MAPS (improved resolution, reduced cost and material budget, etc.), without the complication of full integration on a single chip. After outlining the basic design of the HV2FEI4 test ASIC, results after irradiation with X-rays to 862 Mrad and neutrons up to 10 16 (1 MeV n eq )/cm 2 will be presented. Finally, a brief outlook on further development plans is given

Fast Imaging Detector Readout Circuits with In-Pixel ADCs for Fourier Transform Imaging Spectrometers

Science.gov (United States)

Rider, D.; Blavier, J-F.; Cunningham, T.; Hancock, B.; Key, R.; Pannell, Z.; Sander, S.; Seshadri, S.; Sun, C.; Wrigley, C.

2011-01-01

Focal plane arrays (FPAs) with high frame rates and many pixels benefit several upcoming Earth science missions including GEO-CAPE, GACM, and ACE by enabling broader spatial coverage and higher spectral resolution. FPAs for the PanFTS, a high spatial resolution Fourier transform spectrometer and a candidate instrument for the GEO-CAPE mission are the focus of the developments reported here, but this FPA technology has the potential to enable a variety of future measurements and instruments. The ESTO ACT Program funded the developed of a fast readout integrated circuit (ROIC) based on an innovative in-pixel analog-to-digital converter (ADC). The 128 X 128 pixel ROIC features 60 ?m pixels, a 14-bit ADC in each pixel and operates at a continuous frame rate of 14 kHz consuming only 1.1 W of power. The ROIC outputs digitized data completely eliminating the bulky, power consuming signal chains needed by conventional FPAs. The 128 X 128 pixel ROIC has been fabricated in CMOS and tested at the Jet Propulsion Laboratory. The current version is designed to be hybridized with PIN photodiode arrays via indium bump bonding for light detection in the visible and ultraviolet spectral regions. However, the ROIC design incorporates a small photodiode in each cell to permit detailed characterization of the ROICperformance without the need for hybridization. We will describe the essential features of the ROIC design and present results of ROIC performance measurements.

New generation of monolithic active pixel sensors for charged particle detection; Developpement d'un capteur de nouvelle generation et son electronique integree pour les collisionneurs futurs

Energy Technology Data Exchange (ETDEWEB)

Deptuch, G

2002-09-01

Vertex detectors are of great importance in particle physics experiments, as the knowledge of the event flavour is becoming an issue for the physics programme at Future Linear Colliders. Monolithic Active Pixel Sensors (MAPS) based on a novel detector structure have been proposed. Their fabrication is compatible with a standard CMOS process. The sensor is inseparable from the readout electronics, since both of them are integrated on the same, low-resistivity silicon wafer. The basic pixel configuration comprises only three MOS transistors and a diode collecting the charge through thermal diffusion. The charge is generated in the thin non-depleted epitaxial layer underneath the readout electronics. This approach provides, at low cost, a high resolution and thin device with the whole area sensitive to radiation. Device simulations using the ISE-TCAD package have been carried out to study the charge collection mechanism. In order to demonstrate the viability of the technique, four prototype chips have been fabricated using different submicrometer CMOS processes. The pixel gain has been calibrated using a {sup 55}Fe source and the Poisson sequence method. The prototypes have been exposed to high-energy particle beams at CERN. The tests proved excellent detection performances expressed in a single-track spatial resolution of 1.5 {mu}m and detection efficiency close to 100%, resulting from a SNR ratio of more than 30. Irradiation tests showed immunity of MAPS to a level of a few times 10{sup 12} n/cm{sup 2} and a few hundred kRad of ionising radiation. The ideas for future work, including on-pixel signal amplification, double sampling operation and current mode pixel design are present as well. (author)

E-Beam Effects on CMOS Active Pixel Sensors

International Nuclear Information System (INIS)

Kang, Dong Ook; Jo, Gyu Seong; Kim, Hyeon Daek; Kim, Hyunk Taek; Kim, Jong Yeol; Kim, Chan Kyu

2011-01-01

Three different CMOS active pixel structures manufactured in a deep submicron process have been evaluated with electron beam. The devices were exposed to 1 MeV electron beam up to 5kGy. Dark current increased after E-beam irradiation differently at each pixel structure. Dark current change is dependent on CMOS pixel structures. CMOS image sensors are now good candidates in demanding applications such as medical image sensor, particle detection and space remote sensing. In these situations, CISs are exposed to high doses of radiation. In fact radiation is known to generate trapped charge in CMOS oxides. It can lead to threshold voltage shifts and current leakages in MOSFETs and dark current increase in photodiodes. We studied ionizing effects in three types of CMOS APSs fabricated by 0.25 CMOS process. The devices were irradiated by a Co 60 source up to 50kGy. All irradiation took place at room temperature. The dark current in the three different pixels exhibits increase with electron beam exposure. From the above figure, the change of dark current is dependent on the pixel structure. Double junction structure has shown relatively small increase of dark current after electron beam irradiation. The dark current in the three different pixels exhibits increase with electron beam exposure. The contribution of the total ionizing dose to the dark current increase is small here, since the devices were left unbiased during the electron beam irradiation. Radiation hardness in dependent on the pixel structures. Pixel2 is relatively vulnerable to radiation exposure. Pixel3 has radiation hardened structure

Tests of UFXC32k chip with CdTe pixel detector

Science.gov (United States)

Maj, P.; Taguchi, T.; Nakaye, Y.

2018-02-01

The paper presents the performance of the UFXC32K—a hybrid pixel detector readout chip working with CdTe detectors. The UFXC32K has a pixel pitch of 75 μm and can cope with both input signal polarities. This functionality allows operating with widely used silicon sensors collecting holes and CdTe sensors collecting electrons. This article describes the chip focusing on solving the issues connected to high-Z sensor material, namely high leakage currents, slow charge collection time and thick material resulting in increased charge-sharring effects. The measurements were conducted with higher X-ray energies including 17.4 keV from molybdenum. Conclusions drawn inside the paper show the UFXC32K's usability for CdTe sensors in high X-ray energy applications.

Study of multi-pixel Geiger-mode avalanche photodiodes as a read-out for PET

CERN Document Server

Musienko, Yuri; Lecoq, Paul; Reucroft, Stephen; Swain, John; Trummer, Julia

2007-01-01

We have studied the performance of two multi-pixel Geiger-mode APDs (recently developed by the Centre of Perspective Technologies and Apparatus (CPTA) in Moscow) with 1×1 mm2 and 3×3 mm2 sensitive area as a readout for LSO and LYSO scintillator crystals. Energy and timing spectra were measured using a 22Na γ-source. The results of this study allow us to conclude that this photodetector is a very promising candidate for PET applications.

Design and development of the IBL-BOC firmware for the ATLAS Pixel IBL optical datalink system

CERN Document Server

AUTHOR|(INSPIRE)INSPIRE-00356268

The Insertable $b$-Layer (IBL) is the first upgrade of the ATLAS Pixel detector at the LHC. It will be installed in the Pixel detector in 2013. The IBL will use a new sensor and readout technology, therefore the readout components of the current Pixel detector are redesigned for the readout of the IBL. In this diploma thesis the design and development of the firmware for the new IBL Back-of-Crate card (IBL-BOC) are described. The IBL-BOC is located on the off-detector side of the readout and performs the optical-electrical conversion and vice versa for the optical connection to and from the detector. To process the data transmitted to and received from the detector, the IBL-BOC uses multiple Field Programmable Gate Arrays (FPGA). The transmitted signal is a 40~Mb/s BiPhase Mark (BPM) encoded data stream, providing the timing, trigger and control to the detector. The received signal is a 160~Mb/s 8b10b encoded data stream, containing data from the detector. The IBL-BOC encodes and decodes these data streams. T...

Monolithic pixel detectors in a 0.13μm CMOS technology with sensor level continuous time charge amplification and shaping

International Nuclear Information System (INIS)

Ratti, L.; Manghisoni, M.; Re, V.; Speziali, V.; Traversi, G.; Bettarini, S.; Calderini, G.; Cenci, R.; Giorgi, M.; Forti, F.; Morsani, F.; Rizzo, G.

2006-01-01

This work studies the feasibility of a new implementation of CMOS monolithic active pixel sensors (MAPS) for applications to charged particle tracking. As compared to standard three MOSFET MAPS, where the charge signal is readout by a source follower, the proposed front-end scheme relies upon a charge sensitive amplifier (CSA), embedded in the elementary pixel cell, to perform charge-to-voltage conversion. The area required for the integration of the front-end electronics is mostly provided by the collecting electrode, which consists of a deep n-type diffusion, available as a shielding frame for n-channel devices in deep submicron, triple well CMOS technologies. Based on the above concept, a chip, which includes several test structures differing in the sensitive element area, has been fabricated in a 0.13μm CMOS process. In this paper, the criteria underlying the design of the pixel level analog processor will be presented, together with some preliminary experimental results demonstrating the feasibility of the proposed approach

Neural network based cluster creation in the ATLAS silicon pixel detector

CERN Document Server

Selbach, K E; The ATLAS collaboration

2012-01-01

The read-out from individual pixels on planar semi-conductor sensors are grouped into clusters to reconstruct the location where a charged particle passed through the sensor. The resolution given by individual pixel sizes is significantly improved by using the information from the charge sharing between pixels. Such analog cluster creation techniques have been used by the ATLAS experiment for many years to obtain an excellent performance. However, in dense environments, such as those inside high-energy jets, clusters have an increased probability of merging the charge deposited by multiple particles. Recently, a neural network based algorithm which estimates both the cluster position and whether a cluster should be split has been developed for the ATLAS pixel detector. The algorithm significantly reduces ambiguities in the assignment of pixel detector measurement to tracks within jets and improves the position accuracy with respect to standard interpolation techniques by taking into account the 2-dimensional ...

Neural network based cluster creation in the ATLAS silicon Pixel Detector

CERN Document Server

Andreazza, A; The ATLAS collaboration

2013-01-01

The read-out from individual pixels on planar semi-conductor sensors are grouped into clusters to reconstruct the location where a charged particle passed through the sensor. The resolution given by individual pixel sizes is significantly improved by using the information from the charge sharing between pixels. Such analog cluster creation techniques have been used by the ATLAS experiment for many years to obtain an excellent performance. However, in dense environments, such as those inside high-energy jets, clusters have an increased probability of merging the charge deposited by multiple particles. Recently, a neural network based algorithm which estimates both the cluster position and whether a cluster should be split has been developed for the ATLAS Pixel Detector. The algorithm significantly reduces ambiguities in the assignment of pixel detector measurement to tracks within jets and improves the position accuracy with respect to standard interpolation techniques by taking into account the 2-dimensional ...

Electrical and functional characterisation with single chips and module prototypes of the 1.2 Gb/s serial data link of the monolithic active pixel sensor for the upgrade of the ALICE Inner Tracking System

CERN Document Server

Bonora, Matthias; Aglieri Rinella, Gianluca; Hillemanns, Hartmut; Kim, Daehyeok; Kugathasan, Thanushan; Lattuca, Alessandra; Mazza, Giovanni; Sielewicz, Krzysztof Marek; Snoeys, Walter

2017-01-01

The upgrade of the ALICE Inner Tracking System uses a newly developed monolithic active pixel sensor (ALPIDE) which will populate seven tracking layers surrounding the interaction point. Chips communicate with the readout electronics using a 1.2 Gb/s data link and a 40 Mb/s bidirectional control link. Event data are transmitted to the readout electronics over microstrips on a Flexible Printed Circuit and a 6 m long twinaxial cable. This paper outlines the characterisation effort for assessing the Data Transmission Unit performance of single sensors and prototypes of the detector modules. It describes the different prototypes used, the test system and procedures, and results of laboratory and irradiation tests.

The RD53 Collaboration's SystemVerilog-UVM Simulation Framework and its General Applicability to Design of Advanced Pixel Readout Chips

CERN Document Server

Marconi, S.; Placidi, P.; Christiansen, J.; Hemperek, T.

2014-01-01

The foreseen Phase 2 pixel upgrades at the LHC have very challenging requirements for the design of hybrid pixel readout chips. A versatile pixel simulation platform is as an essential development tool for the design, verification and optimization of both the system architecture and the pixel chip building blocks (Intellectual Properties, IPs). This work is focused on the implemented simulation and verification environment named VEPIX53, built using the SystemVerilog language and the Universal Verification Methodology (UVM) class library in the framework of the RD53 Collaboration. The environment supports pixel chips at different levels of description: its reusable components feature the generation of different classes of parameterized input hits to the pixel matrix, monitoring of pixel chip inputs and outputs, conformity checks between predicted and actual outputs and collection of statistics on system performance. The environment has been tested performing a study of shared architectures of the trigger late...

What's A Pixel Particle Sensor Chip?

CERN Multimedia

2008-01-01

ATLAS particle physics experiment aided with collaboration ON Semiconductor was recently honored by the European Council for Nuclear Research (CERN), with an Industrial Award recognizing the company's contribution in supplying complex "Pixel Particle Sensor" chips for use in CERN's ATLAS particle physics experiment.

A novel CMOS sensor with in-pixel auto-zeroed discrimination for charged particle tracking

International Nuclear Information System (INIS)

Degerli, Y; Guilloux, F; Orsini, F

2014-01-01

With the aim of developing fast and granular Monolithic Active Pixels Sensors (MAPS) as new charged particle tracking detectors for high energy physics experiments, a new rolling shutter binary pixel architecture concept (RSBPix) with in-pixel correlated double sampling, amplification and discrimination is presented. The discriminator features auto-zeroing in order to compensate process-related transistor mismatches. In order to validate the pixel, a first monolithic CMOS sensor prototype, including a pixel array of 96 × 64 pixels, has been designed and fabricated in the Tower-Jazz 0.18 μm CMOS Image Sensor (CIS) process. Results of laboratory tests are presented

ALPIDE, the Monolithic Active Pixel Sensor for the ALICE ITS upgrade

Science.gov (United States)

Mager, M.; ALICE Collaboration

2016-07-01

A new 10 m2 inner tracking system based on seven concentric layers of Monolithic Active Pixel Sensors will be installed in the ALICE experiment during the second long shutdown of LHC in 2019-2020. The monolithic pixel sensors will be fabricated in the 180 nm CMOS Imaging Sensor process of TowerJazz. The ALPIDE design takes full advantage of a particular process feature, the deep p-well, which allows for full CMOS circuitry within the pixel matrix, while at the same time retaining the full charge collection efficiency. Together with the small feature size and the availability of six metal layers, this allowed a continuously active low-power front-end to be placed into each pixel and an in-matrix sparsification circuit to be used that sends only the addresses of hit pixels to the periphery. This approach led to a power consumption of less than 40 mWcm-2, a spatial resolution of around 5 μm, a peaking time of around 2 μs, while being radiation hard to some 1013 1 MeVneq /cm2, fulfilling or exceeding the ALICE requirements. Over the last years of R & D, several prototype circuits have been used to verify radiation hardness, and to optimize pixel geometry and in-pixel front-end circuitry. The positive results led to a submission of full-scale (3 cm×1.5 cm) sensor prototypes in 2014. They are being characterized in a comprehensive campaign that also involves several irradiation and beam tests. A summary of the results obtained and prospects towards the final sensor to instrument the ALICE Inner Tracking System are given.

Evaluation of mixed-signal noise effects in photon-counting X-ray image sensor readout circuits

International Nuclear Information System (INIS)

Lundgren, Jan; Abdalla, Suliman; O'Nils, Mattias; Oelmann, Bengt

2006-01-01

In readout electronics for photon-counting pixel detectors, the tight integration between analog and digital blocks causes the readout electronics to be sensitive to on-chip noise coupling. This noise coupling can result in faulty luminance values in grayscale X-ray images, or as color distortions in a color X-ray imaging system. An exploration of simulating noise coupling in readout circuits is presented which enables the discovery of sensitive blocks at as early a stage as possible, in order to avoid costly design iterations. The photon-counting readout system has been simulated for noise coupling in order to highlight the existing problems of noise coupling in X-ray imaging systems. The simulation results suggest that on-chip noise coupling should be considered and simulated in future readout electronics systems for X-ray detectors

Large area CMOS image sensors

International Nuclear Information System (INIS)

Turchetta, R; Guerrini, N; Sedgwick, I

2011-01-01

CMOS image sensors, also known as CMOS Active Pixel Sensors (APS) or Monolithic Active Pixel Sensors (MAPS), are today the dominant imaging devices. They are omnipresent in our daily life, as image sensors in cellular phones, web cams, digital cameras, ... In these applications, the pixels can be very small, in the micron range, and the sensors themselves tend to be limited in size. However, many scientific applications, like particle or X-ray detection, require large format, often with large pixels, as well as other specific performance, like low noise, radiation hardness or very fast readout. The sensors are also required to be sensitive to a broad spectrum of radiation: photons from the silicon cut-off in the IR down to UV and X- and gamma-rays through the visible spectrum as well as charged particles. This requirement calls for modifications to the substrate to be introduced to provide optimized sensitivity. This paper will review existing CMOS image sensors, whose size can be as large as a single CMOS wafer, and analyse the technical requirements and specific challenges of large format CMOS image sensors.

IV and CV curves for irradiated prototype BTeV silicon pixel sensors

International Nuclear Information System (INIS)

Coluccia, Maria R.

2002-01-01

The authors present IV and CV curves for irradiated prototype n + /n/p + silicon pixel sensors, intended for use in the BTeV experiment at Fermilab. They tested pixel sensors from various vendors and with two pixel isolation layouts: p-stop and p-spray. Results are based on exposure with 200 MeV protons up to 6 x 10 14 protons/cm 2

Small pitch pixel sensors for the CMS Phase II upgrade

CERN Document Server

AUTHOR|(CDS)2069790

2016-01-01

The CMS collaboration has undertaken two sensor R\\&D programs on thin n-in-p planar and 3D silicon sensor technologies. To cope with the increase in instantaneous luminosity, the pixel area has to be reduced to approximately 2500 $\\mu$m$^{2}$ to keep the occupancy at the percent level. Suggested pixel cell geometries to match this requirement are {50$\\times$50 }$\\mu$...

The PASTA chip - A free-running readout ASIC for silicon strip sensors in PANDA

Energy Technology Data Exchange (ETDEWEB)

Goerres, Andre; Stockmanns, Tobias; Ritman, James [Institut fuer Kernphysik, Forschungszentrum Juelich, Juelich (Germany); Rivetti, Angelo [INFN Sezione di Torino, Torino (Italy); Collaboration: PANDA-Collaboration

2014-07-01

The PANDA experiment is a multi purpose detector, investigating hadron physics in the charm quark mass regime. It is one of the main experiments at the future FAIR accelerator facility, using pp annihilations from a 1.5-15 GeV/c anti-proton beam. Because of the broad physics spectrum and the similarity of event and background signals, PANDA does not rely on a hardware-level trigger decision. The innermost of PANDA's sub-systems is the Micro Vertex Detector (MVD), consisting of silicon pixel and strip sensors. The latter will be read out by a specialized, free-running readout front-end called PANDA Strip ASIC (PASTA). It has to face a high event rate of up to 40 kHz/ch in an radiation-intense environment. To fulfill the MVD's requirements, it has to give accurate timing information to incoming events (<10 ns) and determine the collected charge with an 8-bit precision. The design has to meet cooling and placing restrictions, leading to a very low power consumption (<4 mW/ch) and limited dimensions. Therefore, a simple, time-based readout approach is chosen. In this talk, the conceptual design of the front-end is presented.

Photon small-field measurements with a CMOS active pixel sensor.

Science.gov (United States)

Spang, F Jiménez; Rosenberg, I; Hedin, E; Royle, G

2015-06-07

In this work the dosimetric performance of CMOS active pixel sensors for the measurement of small photon beams is presented. The detector used consisted of an array of 520  × 520 pixels on a 25 µm pitch. Dosimetric parameters measured with this sensor were compared with data collected with an ionization chamber, a film detector and GEANT4 Monte Carlo simulations. The sensor performance for beam profiles measurements was evaluated for field sizes of 0.5  × 0.5 cm(2). The high spatial resolution achieved with this sensor allowed the accurate measurement of profiles, beam penumbrae and field size under lateral electronic disequilibrium. Field size and penumbrae agreed within 5.4% and 2.2% respectively with film measurements. Agreements with ionization chambers better than 1.0% were obtained when measuring tissue-phantom ratios. Output factor measurements were in good agreement with ionization chamber and Monte Carlo simulation. The data obtained from this imaging sensor can be easily analyzed to extract dosimetric information. The results presented in this work are promising for the development and implementation of CMOS active pixel sensors for dosimetry applications.

Measurement of the two track separation capability of hybrid pixel sensors

Energy Technology Data Exchange (ETDEWEB)

Muñoz, F.J., E-mail: Francisca.MunozSanchez@manchester.ac.uk [University of Manchester (United Kingdom); Battaglia, M. [University of California, Santa Cruz, United States of America (United States); CERN, The European Organization for Nuclear Research (Switzerland); Da Vià, C. [University of Manchester (United Kingdom); La Rosa, A. [University of California, Santa Cruz, United States of America (United States); Dann, N. [University of Manchester (United Kingdom)

2017-02-11

Large Hadron Collider experiments face new challenges in Run-2 conditions due to the increased beam energy, the interest for searches of new physics signals with higher jet pT and the consequent longer decay length of heavy hadrons. In this new scenario, the capability of the innermost pixel sensors to distinguish tracks in very dense environment becomes crucial for efficient tracking and flavour tagging performance. In this work, we discuss the measurement in a test beam of the two track separation capability of hybrid pixel sensors using the interaction particles out of the collision of high energy pions on a thin copper target. With this method we are able to evaluate the effect of merged hits in the sensors under test due to tracks closer than the sensor spatial granularity in terms of collected charge, multiplicity and reconstruction efficiency. - Highlights: • Measurement of the two-track separation capability of hybrid pixel sensors. • Emulating track dense environment with a cooper target in a test beam. • Cooper target in between telescope arms to create vertices. • Validation of simulation and reconstruction algorithm for future vertex detectors. • New qualification method for pixel modules in track dense environments.

3D track reconstruction capability of a silicon hybrid active pixel detector

Energy Technology Data Exchange (ETDEWEB)

Bergmann, Benedikt; Pichotka, Martin; Pospisil, Stanislav; Vycpalek, Jiri [Czech Technical University in Prague, Institute of Experimental and Applied Physics, Praha (Czech Republic); Burian, Petr; Broulim, Pavel [Czech Technical University in Prague, Institute of Experimental and Applied Physics, Praha (Czech Republic); University of West Bohemia, Faculty of Electrical Engineering, Pilsen (Czech Republic); Jakubek, Jan [Advacam s.r.o., Praha (Czech Republic)

2017-06-15

Timepix3 detectors are the latest generation of hybrid active pixel detectors of the Medipix/Timepix family. Such detectors consist of an active sensor layer which is connected to the readout ASIC (application specific integrated circuit), segmenting the detector into a square matrix of 256 x 256 pixels (pixel pitch 55 μm). Particles interacting in the active sensor material create charge carriers, which drift towards the pixelated electrode, where they are collected. In each pixel, the time of the interaction (time resolution 1.56 ns) and the amount of created charge carriers are measured. Such a device was employed in an experiment in a 120 GeV/c pion beam. It is demonstrated, how the drift time information can be used for ''4D'' particle tracking, with the three spatial dimensions and the energy losses along the particle trajectory (dE/dx). Since the coordinates in the detector plane are given by the pixelation (x,y), the x- and y-resolution is determined by the pixel pitch (55 μm). A z-resolution of 50.4 μm could be achieved (for a 500 μm thick silicon sensor at 130 V bias), whereby the drift time model independent z-resolution was found to be 28.5 μm. (orig.)

3D track reconstruction capability of a silicon hybrid active pixel detector

Science.gov (United States)

Bergmann, Benedikt; Pichotka, Martin; Pospisil, Stanislav; Vycpalek, Jiri; Burian, Petr; Broulim, Pavel; Jakubek, Jan

2017-06-01

Timepix3 detectors are the latest generation of hybrid active pixel detectors of the Medipix/Timepix family. Such detectors consist of an active sensor layer which is connected to the readout ASIC (application specific integrated circuit), segmenting the detector into a square matrix of 256 × 256 pixels (pixel pitch 55 μm). Particles interacting in the active sensor material create charge carriers, which drift towards the pixelated electrode, where they are collected. In each pixel, the time of the interaction (time resolution 1.56 ns) and the amount of created charge carriers are measured. Such a device was employed in an experiment in a 120 GeV/c pion beam. It is demonstrated, how the drift time information can be used for "4D" particle tracking, with the three spatial dimensions and the energy losses along the particle trajectory (dE/dx). Since the coordinates in the detector plane are given by the pixelation ( x, y), the x- and y-resolution is determined by the pixel pitch (55 μm). A z-resolution of 50.4 μm could be achieved (for a 500 μm thick silicon sensor at 130 V bias), whereby the drift time model independent z-resolution was found to be 28.5 μm.

A review of advances in pixel detectors for experiments with high rate and radiation

Science.gov (United States)

Garcia-Sciveres, Maurice; Wermes, Norbert

2018-06-01

The large Hadron collider (LHC) experiments ATLAS and CMS have established hybrid pixel detectors as the instrument of choice for particle tracking and vertexing in high rate and radiation environments, as they operate close to the LHC interaction points. With the high luminosity-LHC upgrade now in sight, for which the tracking detectors will be completely replaced, new generations of pixel detectors are being devised. They have to address enormous challenges in terms of data throughput and radiation levels, ionizing and non-ionizing, that harm the sensing and readout parts of pixel detectors alike. Advances in microelectronics and microprocessing technologies now enable large scale detector designs with unprecedented performance in measurement precision (space and time), radiation hard sensors and readout chips, hybridization techniques, lightweight supports, and fully monolithic approaches to meet these challenges. This paper reviews the world-wide effort on these developments.

A time-resolved image sensor for tubeless streak cameras

Science.gov (United States)

Yasutomi, Keita; Han, SangMan; Seo, Min-Woong; Takasawa, Taishi; Kagawa, Keiichiro; Kawahito, Shoji

2014-03-01

This paper presents a time-resolved CMOS image sensor with draining-only modulation (DOM) pixels for tube-less streak cameras. Although the conventional streak camera has high time resolution, the device requires high voltage and bulky system due to the structure with a vacuum tube. The proposed time-resolved imager with a simple optics realize a streak camera without any vacuum tubes. The proposed image sensor has DOM pixels, a delay-based pulse generator, and a readout circuitry. The delay-based pulse generator in combination with an in-pixel logic allows us to create and to provide a short gating clock to the pixel array. A prototype time-resolved CMOS image sensor with the proposed pixel is designed and implemented using 0.11um CMOS image sensor technology. The image array has 30(Vertical) x 128(Memory length) pixels with the pixel pitch of 22.4um. .

Si and gaas pixel detectors for medical imaging applications

International Nuclear Information System (INIS)

Bisogni, M. G.

2001-01-01

As the use of digital radiographic equipment in the morphological imaging field is becoming the more and more diffuse, the research of new and more performing devices from public institutions and industrial companies is in constant progress. Most of these devices are based on solid-state detectors as X-ray sensors. Semiconductor pixel detectors, originally developed in the high energy physics environment, have been then proposed as digital detector for medical imaging applications. In this paper a digital single photon counting device, based on silicon and GaAs pixel detector, is presented. The detector is a thin slab of semiconductor crystal where an array of 64 by 64 square pixels, 170- m side, has been built on one side. The data read-out is performed by a VLSI integrated circuit named Photon Counting Chip (PCC), developed within the MEDIPIX collaboration. Each chip cell geometrically matches the sensor pixel. It contains a charge preamplifier, a threshold comparator and a 15 bits pseudo-random counter and it is coupled to the detector by means of bump bonding. Most important advantages of such system, with respect to a traditional X-rays film/screen device, are the wider linear dynamic range (3x104) and the higher performance in terms of MTF and DQE. Besides the single photon counting architecture allows to detect image contrasts lower than 3%. Electronics read-out performance as well as imaging capabilities of the digital device will be presented. Images of mammographic phantoms acquired with a standard Mammographic tube will be compared with radiographs obtained with traditional film/screen systems

Performance of the Pixel Luminosity Telescope for Luminosity Measurement at CMS during Run2

CERN Document Server

Lujan, Paul Joseph

2017-01-01

The Pixel Luminosity Telescope (PLT) is a dedicated system for luminosity measurement at the CMS experiment using silicon pixel sensors arranged into telescopes, each consisting of three sensor planes. It was installed in CMS at the beginning of 2015 and has been providing online and offline luminosity measurements throughout Run 2 of the LHC. The online bunch-by-bunch luminosity measurement employs the fast-or capability of the pixel readout chip to identify events where a hit is registered in all three sensors in a telescope, corresponding primarily to tracks originating from the interaction point. In addition, the full pixel information is read out at a lower rate, allowing for the calculation of corrections to the online luminosity from effects such as the miscounting of tracks not originating from the interaction point and detector efficiency. This paper presents results from the 2016 running of the PLT, including commissioning and operational history, luminosity calibration using Van der Meer scans, and...

Research and Development of Monolithic Active Pixel Sensors for the Detection of the Elementary Particles; Recherche et developpement de capteurs actifs monolithiques CMOS pour la detection de particules elementaires

Energy Technology Data Exchange (ETDEWEB)

Li, Y

2007-09-15

In order to develop high spatial resolution and readout speed vertex detectors for the future International Linear Collider (ILC), fast CMOS Monolithic Active Pixel Sensors (MAPS) are studied on this work. Two prototypes of MAPS, MIMOSA 8 and MIMOSA 16, based on the same micro-electronic architecture were developed in CMOS processes with different thickness of epitaxial layer. The size of pixel matrix is 32 x 128: 8 columns of the pixel array are readout directly with analog outputs and the other 24 columns are connected to the column level auto-zero discriminators. The Correlated Double Sampling (CDS) structures are successfully implemented inside pixel and discriminator. The photo diode type pixels with different diode sizes are used in these prototypes. With a {sup 55}Fe X-ray radioactive source, the important parameters, such as Temporal Noise, Fixed Pattern Noise (FPN), Signal-to-Noise Ratio (SNR), Charge-to-Voltage conversion Factor (CVF) and Charge Collection Efficiency (CCE), are studied as function of readout speed and diode size. For MIMOSA 8, the effect of fast neutrons irradiation is also. Two beam tests campaigns were made: at DESY with a 5 GeV electrons beam and at CERN with a 180 GeV pions beam. Detection Efficiency and Spatial Resolution are studied in function of the discriminator threshold. For these two parameters, the influences of diode size and SNR of the central pixel of a cluster are also discussed. In order to improve the spatial resolution of the digital outputs, a very compact (25 {mu}m x 1 mm) and low consumption (300 {mu}W) column level ADC is designed in AMS 0.35 {mu}m OPTO process. Based on successive approximation architecture, the auto-offset cancellation structure is integrated. A new column level auto-zero discriminator using static latch is also designed. (author)

Toward VIP-PIX: A Low Noise Readout ASIC for Pixelated CdTe Gamma-Ray Detectors for Use in the Next Generation of PET Scanners.

Science.gov (United States)

Macias-Montero, Jose-Gabriel; Sarraj, Maher; Chmeissani, Mokhtar; Puigdengoles, Carles; Lorenzo, Gianluca De; Martínez, Ricardo

2013-08-01

VIP-PIX will be a low noise and low power pixel readout electronics with digital output for pixelated Cadmium Telluride (CdTe) detectors. The proposed pixel will be part of a 2D pixel-array detector for various types of nuclear medicine imaging devices such as positron-emission tomography (PET) scanners, Compton gamma cameras, and positron-emission mammography (PEM) scanners. Each pixel will include a SAR ADC that provides the energy deposited with 10-bit resolution. Simultaneously, the self-triggered pixel which will be connected to a global time-to-digital converter (TDC) with 1 ns resolution will provide the event's time stamp. The analog part of the readout chain and the ADC have been fabricated with TSMC 0.25 μ m mixed-signal CMOS technology and characterized with an external test pulse. The power consumption of these parts is 200 μ W from a 2.5 V supply. It offers 4 switchable gains from ±10 mV/fC to ±40 mV/fC and an input charge dynamic range of up to ±70 fC for the minimum gain for both polarities. Based on noise measurements, the expected equivalent noise charge (ENC) is 65 e - RMS at room temperature.

A radiation-hardened two transistor memory cell for monolithic active pixel sensors in STAR experiment

International Nuclear Information System (INIS)

Wei, X; Dorokhov, A; Hu, Y; Gao, D

2011-01-01

Radiation tolerance of Monolithic Active Pixel Sensors (MAPS) is dramatically decreased when intellectual property (IP) memories are integrated for fast readout application. This paper presents a new solution to improve radiation hardness and avoid latch-up for memory cell design. The tradeoffs among radiation tolerance, area and speed are significantly considered and analyzed. The cell designed in 0.35 μm process satisfies the radiation tolerance requirements of STAR experiment. The cell size is 4.55 x 5.45 μm 2 . This cell is smaller than the IP memory cell based on the same process and is only 26% of a radiation tolerant 6T SRAM cell used in previous contribution. The write access time of the cell is less than 2 ns, while the read access time is 80 ns.

Common Bias Readout for TES Array on Scanning Transmission Electron Microscope

Science.gov (United States)

Yamamoto, R.; Sakai, K.; Maehisa, K.; Nagayoshi, K.; Hayashi, T.; Muramatsu, H.; Nakashima, Y.; Mitsuda, K.; Yamasaki, N. Y.; Takei, Y.; Hidaka, M.; Nagasawa, S.; Maehata, K.; Hara, T.

2016-07-01

A transition edge sensor (TES) microcalorimeter array as an X-ray sensor for a scanning transmission electron microscope system is being developed. The technical challenge of this system is a high count rate of ˜ 5000 counts/second/array. We adopted a 64 pixel array with a parallel readout. Common SQUID bias, and common TES bias are planned to reduce the number of wires and the resources of a room temperature circuit. The reduction rate of wires is 44 % when a 64 pixel array is read out by a common bias of 8 channels. The possible degradation of the energy resolution has been investigated by simulations and experiments. The bias fluctuation effects of a series connection are less than those of a parallel connection. Simple calculations expect that the fluctuations of the common SQUID bias and common TES bias in a series connection are 10^{-7} and 10^{-3}, respectively. We constructed 8 SQUIDs which are connected to 8 TES outputs and a room temperature circuit for common bias readout and evaluated experimentally. Our simulation of crosstalk indicates that at an X-ray event rate of 500 cps/pixel, crosstalk will broaden a monochromatic line by about 0.01 %, or about 1.5 eV at 15 keV. Thus, our design goal of 10 eV energy resolution across the 0.5-15 keV band should be achievable.

MEMS capacitive pressure sensor monolithically integrated with CMOS readout circuit by using post CMOS processes

Science.gov (United States)

Jang, Munseon; Yun, Kwang-Seok

2017-12-01

In this paper, we presents a MEMS pressure sensor integrated with a readout circuit on a chip for an on-chip signal processing. The capacitive pressure sensor is formed on a CMOS chip by using a post-CMOS MEMS processes. The proposed device consists of a sensing capacitor that is square in shape, a reference capacitor and a readout circuitry based on a switched-capacitor scheme to detect capacitance change at various environmental pressures. The readout circuit was implemented by using a commercial 0.35 μm CMOS process with 2 polysilicon and 4 metal layers. Then, the pressure sensor was formed by wet etching of metal 2 layer through via hole structures. Experimental results show that the MEMS pressure sensor has a sensitivity of 11 mV/100 kPa at the pressure range of 100-400 kPa.

Module and electronics developments for the ATLAS ITK pixel system

CERN Document Server

Nellist, Clara; The ATLAS collaboration

2016-01-01

Summary ATLAS is preparing for an extensive modification of its detector in the course of the planned HL‐ LHC accelerator upgrade around 2025 which includes a replacement of the entire tracking system by an all‐silicon detector (Inner Tracker, ITk). A revised trigger and data taking system is foreseen with triggers expected at lowest level at an average rate of 1 MHz. The five innermost layers of ITk will comprise of a pixel detector built of new sensor and readout electronics technologies to improve the tracking performance and cope with the severe HL‐LHC environment in terms of occupancy and radiation. The total area of the new pixel system could measure up to 14 m2, depending on the final layout choice that is expected to take place in early 2017. A new on‐detector readout chip is designed in the context of the RD53 collaboration in 65 nm CMOS technology. This paper will present the on‐going R&D within the ATLAS ITK project towards the new pixel modules and the off‐detector electronics. Pla...

A Reconfigurable Readout Integrated Circuit for Heterogeneous Display-Based Multi-Sensor Systems

Directory of Open Access Journals (Sweden)

Kyeonghwan Park

2017-04-01

Full Text Available This paper presents a reconfigurable multi-sensor interface and its readout integrated circuit (ROIC for display-based multi-sensor systems, which builds up multi-sensor functions by utilizing touch screen panels. In addition to inherent touch detection, physiological and environmental sensor interfaces are incorporated. The reconfigurable feature is effectively implemented by proposing two basis readout topologies of amplifier-based and oscillator-based circuits. For noise-immune design against various noises from inherent human-touch operations, an alternate-sampling error-correction scheme is proposed and integrated inside the ROIC, achieving a 12-bit resolution of successive approximation register (SAR of analog-to-digital conversion without additional calibrations. A ROIC prototype that includes the whole proposed functions and data converters was fabricated in a 0.18 μm complementary metal oxide semiconductor (CMOS process, and its feasibility was experimentally verified to support multiple heterogeneous sensing functions of touch, electrocardiogram, body impedance, and environmental sensors.

Innovative multi-cantilever array sensor system with MOEMS read-out

Science.gov (United States)

Ivaldi, F.; Bieniek, T.; Janus, P.; Grabiec, P.; Majstrzyk, W.; Kopiec, D.; Gotszalk, T.

2016-11-01

Cantilever based sensor system are a well-established sensor family exploited in several every-day life applications as well as in high-end research areas. The very high sensitivity of such systems and the possibility to design and functionalize the cantilevers to create purpose built and highly selective sensors have increased the interest of the scientific community and the industry in further exploiting this promising sensors type. Optical deflection detection systems for cantilever sensors provide a reliable, flexible method for reading information from cantilevers with the highest sensitivity. However the need of using multi-cantilever arrays in several fields of application such as medicine, biology or safety related areas, make the optical method less suitable due to its structural complexity. Working in the frame of a the Joint Undertaking project Lab4MEMS II our group proposes a novel and innovative approach to solve this issue, by integrating a Micro-Opto-Electro-Mechanical-System (MOEMS) with dedicated optics, electronics and software with a MOEMS micro-mirror, ultimately developed in the frame of Lab4MEMSII. In this way we are able to present a closely packed, lightweight solution combining the advantages of standard optical read-out systems with the possibility of recording multiple read-outs from large cantilever arrays quasi simultaneously.

Radiation hardness and timing studies of a monolithic TowerJazz pixel design for the new ATLAS Inner Tracker

Science.gov (United States)

Riegel, C.; Backhaus, M.; Van Hoorne, J. W.; Kugathasan, T.; Musa, L.; Pernegger, H.; Riedler, P.; Schaefer, D.; Snoeys, W.; Wagner, W.

2017-01-01

A part of the upcoming HL-LHC upgrade of the ATLAS Detector is the construction of a new Inner Tracker. This upgrade opens new possibilities, but also presents challenges in terms of occupancy and radiation tolerance. For the pixel detector inside the inner tracker, hybrid modules containing passive silicon sensors and connected readout chips are presently used, but require expensive assembly techniques like fine-pitch bump bonding. Silicon devices fabricated in standard commercial CMOS technologies, which include part or all of the readout chain, are also investigated offering a reduced cost as they are cheaper per unit area than traditional silicon detectors. If they contain the full readout chain, as for a fully monolithic approach, there is no need for the expensive flip-chip assembly, resulting in a further cost reduction and material savings. In the outer pixel layers of the ATLAS Inner Tracker, the pixel sensors must withstand non-ionising energy losses of up to 1015 n/cm2 and offer a timing resolution of 25 ns or less. This paper presents test results obtained on a monolithic test chip, the TowerJazz 180nm Investigator, towards these specifications. The presented program of radiation hardness and timing studies has been launched to investigate this technology's potential for the new ATLAS Inner Tracker.

Research of high speed data readout and pre-processing system based on xTCA for silicon pixel detector

International Nuclear Information System (INIS)

Zhao Jingzhou; Lin Haichuan; Guo Fang; Liu Zhen'an; Xu Hao; Gong Wenxuan; Liu Zhao

2012-01-01

As the development of the detector, Silicon pixel detectors have been widely used in high energy physics experiments. It needs data processing system with high speed, high bandwidth and high availability to read data from silicon pixel detectors which generate more large data. The same question occurs on Belle II Pixel Detector which is a new style silicon pixel detector used in SuperKEKB accelerator with high luminance. The paper describes the research of High speed data readout and pre-processing system based on xTCA for silicon pixel detector. The system consists of High Performance Computer Node (HPCN) based on xTCA and ATCA frame. The HPCN consists of 4XFPs based on AMC, 1 AMC Carrier ATCA Board (ACAB) and 1 Rear Transmission Module. It characterized by 5 high performance FPGAs, 16 fiber links based on RocketIO, 5 Gbit Ethernet ports and DDR2 with capacity up to 18GB. In a ATCA frame, 14 HPCNs make up a system using the high speed backplane to achieve the function of data pre-processing and trigger. This system will be used on the trigger and data acquisition system of Belle II Pixel detector. (authors)

RAPS: an innovative active pixel for particle detection integrated in CMOS technology

International Nuclear Information System (INIS)

Passeri, Daniele; Placidi, Pisana; Verducci, Leonardo; Ciampolini, Paolo; Matrella, Guido; Marras, Alessandro; Bilei, G.M.

2004-01-01

In this paper we discuss some design, implementation and test issues, with respect to the development of the RAPS01 chip in the framework of the Radiation Active Pixel Sensors (RAPS) INFN project. The project aimed at verifying feasibility of smart, high-resolution pixel arrays with a fully standard, submicron CMOS technology for particle detection purposes. Layout optimization of the pixel, including sensitive element and local read and amplification circuits has been carried out. Different basic pixel schemes and read-out options have been proposed and devised. Chip fabrication has been completed and test phase is now under way: to this purpose a suitable test environment has been devised and test strategies have been planned

Thin hybrid pixel assembly fabrication development with backside compensation layer

Energy Technology Data Exchange (ETDEWEB)

Bates, R., E-mail: richard.bates@glasgow.ac.uk [Experimental Particle Physics Group, SUPA School of Physics and Astronomy, The University of Glasgow, Glasgow G12 8QQ (United Kingdom); Buttar, C.; McMullen, T.; Cunningham, L.; Ashby, J.; Doherty, F. [Experimental Particle Physics Group, SUPA School of Physics and Astronomy, The University of Glasgow, Glasgow G12 8QQ (United Kingdom); Pares, G.; Vignoud, L.; Kholti, B. [CEA Leti, MINATEC, 17 rue des Martyrs, F38054, Grenoble (France); Vahanen, S. [Advacam Oy, Tietotie 3, 02150 Espoo (Finland)

2017-02-11

The ATLAS and CMS experiments will both replace their entire tracking systems for operation at the HL-LHC in 2026. This will include a significantly larger pixel systems, for example, for ATLAS approximately 15 m{sup 2}. To keep the tracker material budget low it is crucial to minimize the mass of the pixel modules via thinning both the sensor and readout chip to about 150 μm each. The bump yield of thin module assemblies using solder based bump bonding can be problematic due to wafer bowing during solder reflow at high temperature. A new bump-bonding process using backside compensation on the readout chip to address the issue of low yield will be presented. The objective is to compensate dynamically the stress of the front side stack by adding a compensating layer to the backside of the wafer. A SiN and Al:Si stack has been chosen for the backside layer. The bow reducing effect of applying a backside compensation layer will be demonstrated using the FE-I4 wafer. The world's first results from assemblies produced from readout wafers thinned to 100 μm with a stress compensation layer are presented with bond yields close to 100% measured using the FE-I4 readout chip.

Test-beam measurements and simulation studies of thin pixel sensors for the CLIC vertex detector

CERN Document Server

AUTHOR|(INSPIRE)INSPIRE-00574329; Dannheim, Dominik

The multi-$TeV$ $e^{+}e^{-}$ Compact Linear Collider (CLIC) is one of the options for a future high-energy collider for the post-LHC era. It would allow for searches of new physics and simultaneously offer the possibility for precision measurements of standard model processes. The physics goals and experimental conditions at CLIC set high precision requirements on the vertex detector made of pixel detectors: a high pointing resolution of 3 $\\mu m$, very low mass of 0.2% $X_{0}$ per layer, 10 ns time stamping capability and low power dissipation of 50 mW/$cm^{2}$ compatible with air-flow cooling. In this thesis, hybrid assemblies with thin active-edge planar sensors are characterised through calibrations, laboratory and test-beam measurements. Prototypes containing 50 $\\mu m$ to 150 $\\mu m$ thin planar silicon sensors bump-bonded to Timepix3 readout ASICs with 55 $\\mu m$ pitch are characterised in test beams at the CERN SPS in view of their detection efficiency and single-point resolution. A digitiser for AllP...

Amorphous silicon pixel radiation detectors and associated thin film transistor electronics readout

International Nuclear Information System (INIS)

Perez-Mendez, V.; Cho, G.; Drewery, J.; Jing, T.; Kaplan, S.N.; Mireshghi, A.; Wildermuth, D.; Goodman, C.; Fujieda, I.

1992-07-01

We describe the characteristics of thin (1 μm) and thick (> 30 μm) hydrogenated amorphous silicon p-i-n diodes which are optimized for detecting and recording the spatial distribution of charged particles, x-ray, γ rays and thermal neutrons. For x-ray, γ ray, and charged particle detection we can use thin p-i-n photosensitive diode arrays coupled to evaporated layers of suitable scintillators. For thermal neutron detection we use thin (2∼5 μm) gadolinium converters on 30 μm thick a-Si:H diodes. For direct detection of minimum ionizing particles and others with high resistance to radiation damage, we use the thick p-i-n diode arrays. Diode and amorphous silicon readouts as well as polysilicon pixel amplifiers are described

Operational experience of ATLAS SCT and Pixel Detector

CERN Document Server

Kocian, Martin; The ATLAS collaboration

2017-01-01

The ATLAS Inner Detector based on silicon sensors is consisting of a strip detector (SCT) and a pixel detector. It is the crucial component for vertexing and tracking in the ATLAS experiment. With the excellent performance of the LHC well beyond the original specification the silicon tracking detectors are facing substantial challenges in terms of data acquisition, radiation damage to the sensors, and SEUs in the readout ASICs. The approaches on how the detector systems cope with the demands of high luminosity operation while maintaining excellent performance through hardware upgrades, software and firmware algorithms, and operational settings, are presented.

A low-power and high-precision miniaturized digital sun sensor

NARCIS (Netherlands)

Boer, B.M. de; Durkut, M.

2013-01-01

A prototype miniaturized digital sun sensor (miniDSS) was developed by TNO. It is expected to be launched on QuadSat for in-orbit demonstration. The single-chip sun sensor comprises an application specific integrated circuit (ASIC) on which an active pixel sensor (APS), read-out and processing

The color of X-rays: Spectral X-ray computed tomography using energy sensitive pixel detectors

NARCIS (Netherlands)

Schioppa, E.J.

2014-01-01

Energy sensitive X-ray imaging detectors are produced by connecting a semiconductor sensor to a spectroscopic pixel readout chip. In this thesis, the applicability of such detectors to X-ray Computed Tomography (CT) is studied. A prototype Medipix based silicon detector is calibrated using X-ray

Three-dimensional cross point readout detector design for including depth information

Science.gov (United States)

Lee, Seung-Jae; Baek, Cheol-Ha

2018-04-01

We designed a depth-encoding positron emission tomography (PET) detector using a cross point readout method with wavelength-shifting (WLS) fibers. To evaluate the characteristics of the novel detector module and the PET system, we used the DETECT2000 to perform optical photon transport in the crystal array. The GATE was also used. The detector module is made up of four layers of scintillator arrays, the five layers of WLS fiber arrays, and two sensor arrays. The WLS fiber arrays in each layer cross each other to transport light to each sensor array. The two sensor arrays are coupled to the forward and left sides of the WLS fiber array, respectively. The identification of three-dimensional pixels was determined using a digital positioning algorithm. All pixels were well decoded, with the system resolution ranging from 2.11 mm to 2.29 mm at full width at half maximum (FWHM).

Capacitively coupled hybrid pixel assemblies for the CLIC vertex detector

CERN Document Server

AUTHOR|(SzGeCERN)734627; Benoit, Mathieu; Dannheim, Dominik; Dette, Karola; Hynds, Daniel; Kulis, Szymon; Peric, Ivan; Petric, Marko; Redford, Sophie; Sicking, Eva; Valerio, Pierpaolo

2016-01-01

The vertex detector at the proposed CLIC multi-TeV linear e+e- collider must have minimal material content and high spatial resolution, combined with accurate time-stamping to cope with the expected high rate of beam-induced backgrounds. One of the options being considered is the use of active sensors implemented in a commercial high-voltage CMOS process, capacitively coupled to hybrid pixel ASICs. A prototype of such an assembly, using two custom designed chips (CCPDv3 as active sensor glued to a CLICpix readout chip), has been characterised both in the lab and in beam tests at the CERN SPS using 120 GeV/c positively charged hadrons. Results of these characterisation studies are presented both for single and dual amplification stages in the active sensor. Pixel cross-coupling results are also presented, showing the sensitivity to placement precision and planarity of the glue layer.

Transfer Function and Fluorescence Measurements on New CMOS Pixel Sensor for ATLAS

CERN Document Server

Kaemingk, Michael

2017-01-01

A new generation of pixel sensors is being designed for the phase II upgrade of the ATLAS Inner Tracker (ITk). These pixel sensors are being tested to ensure that they meet the demands of the ATLAS detector. As a summer student, I was involved in some of the measurements taken for this purpose.

First Results from Cherwell, a Monolithic Active Pixel Sensor for Particle Physics

CERN Document Server

Nooney, Tamsin; Borri, Marcello; Crooks, Jamie; Headspith, Jon; Inguglia, Gianluca; Kolya, Scott; Lazarus, Ian; Lemmon, Roy; Mylroie-Smith, James; Turchetta, Renato; Velthuis, Jaap; Wilson, Fergus

2014-01-01

Cherwell is a CMOS Monolithic Active Pixel Sensor (MAPS) developed for digital calorimetry and charged particle tracking applications. Here, we outline the initial tests carried out to charac- terise the performance of Cherwell, give details of the test beam carried out at CERN and include the first results from this analysis. Three variations of the chip were tested; Type A, a high re- sistivity, low noise sensor, Type B, a standard resisivity, low noise sensor and Type C, a standard resistivity, standard noise sensor. The sensors yield an average RMS noise value per pixel of 9.6 e

A beam monitor using silicon pixel sensors for hadron therapy

Energy Technology Data Exchange (ETDEWEB)

Wang, Zhen, E-mail: zwang@mails.ccnu.edu.cn; Zou, Shuguang; Fan, Yan; Liu, Jun; Sun, Xiangming, E-mail: sphy2007@126.com; Wang, Dong; Kang, Huili; Sun, Daming; Yang, Ping; Pei, Hua; Huang, Guangming; Xu, Nu; Gao, Chaosong; Xiao, Le

2017-03-21

We report the design and test results of a beam monitor developed for online monitoring in hadron therapy. The beam monitor uses eight silicon pixel sensors, Topmetal-II{sup -}, as the anode array. Topmetal-II{sup -} is a charge sensor designed in a CMOS 0.35 µm technology. Each Topmetal-II{sup -} sensor has 72×72 pixels and the pixel size is 83×83 µm{sup 2}. In our design, the beam passes through the beam monitor without hitting the electrodes, making the beam monitor especially suitable for monitoring heavy ion beams. This design also reduces radiation damage to the beam monitor itself. The beam monitor is tested with a carbon ion beam at the Heavy Ion Research Facility in Lanzhou (HIRFL). Results indicate that the beam monitor can measure position, incidence angle and intensity of the beam with a position resolution better than 20 µm, angular resolution about 0.5° and intensity statistical accuracy better than 2%.

Performance of n-in-p pixel detectors irradiated at fluences up to $5x10^{15} n_{eq}/cm^{2}$ for the future ATLAS upgrades

CERN Document Server

INSPIRE-00219560; La Rosa, A.; Nisius, R.; Pernegger, H.; Richter, R.H.; Weigell, P.

We present the results of the characterization of novel n-in-p planar pixel detectors, designed for the future upgrades of the ATLAS pixel system. N-in-p silicon devices are a promising candidate to replace the n-in-n sensors thanks to their radiation hardness and cost effectiveness, that allow for enlarging the area instrumented with pixel detectors. The n-in-p modules presented here are composed of pixel sensors produced by CiS connected by bump-bonding to the ATLAS readout chip FE-I3. The characterization of these devices has been performed with the ATLAS pixel read-out systems, TurboDAQ and USBPIX, before and after irradiation with 25 MeV protons and neutrons up to a fluence of 5x10**15 neq /cm2. The charge collection measurements carried out with radioactive sources have proven the feasibility of employing this kind of detectors up to these particle fluences. The collected charge has been measured to be for any fluence in excess of twice the value of the FE-I3 threshold, tuned to 3200 e. The first result...

Active Pixel Sensors: Are CCD's Dinosaurs?

Science.gov (United States)

Fossum, Eric R.

1993-01-01

Charge-coupled devices (CCD's) are presently the technology of choice for most imaging applications. In the 23 years since their invention in 1970, they have evolved to a sophisticated level of performance. However, as with all technologies, we can be certain that they will be supplanted someday. In this paper, the Active Pixel Sensor (APS) technology is explored as a possible successor to the CCD. An active pixel is defined as a detector array technology that has at least one active transistor within the pixel unit cell. The APS eliminates the need for nearly perfect charge transfer -- the Achilles' heel of CCDs. This perfect charge transfer makes CCD's radiation 'soft,' difficult to use under low light conditions, difficult to manufacture in large array sizes, difficult to integrate with on-chip electronics, difficult to use at low temperatures, difficult to use at high frame rates, and difficult to manufacture in non-silicon materials that extend wavelength response.

Thin and edgeless sensors for ATLAS pixel detector upgrade

Science.gov (United States)

Ducourthial, A.; Bomben, M.; Calderini, G.; Marchiori, G.; D'Eramo, L.; Luise, I.; Bagolini, A.; Boscardin, M.; Bosisio, L.; Darbo, G.; Dalla Betta, G.-F.; Giacomini, G.; Meschini, M.; Messineo, A.; Ronchin, S.; Zorzi, N.

2017-12-01

To cope with the harsh environment foreseen at the high luminosity conditions of HL-LHC, the ATLAS pixel detector has to be upgraded to be fully efficient with a good granularity, a maximized geometrical acceptance and an high read out rate. LPNHE, FBK and INFN are involved in the development of thin and edgeless planar pixel sensors in which the insensitive area at the border of the sensor is minimized thanks to the active edge technology. In this paper we report on two productions, a first one consisting of 200 μm thick n-on-p sensors with active edge, a second one composed of 100 and 130 μm thick n-on-p sensors. Those sensors have been tested on beam, both at CERN-SPS and at DESY. In terms of hit-efficiency, the first production reaches 99 % before irradiation and the second one reaches 96.3% after a fluence in excess of 1× 1016neq/cm2. The performances of those two productions before and after irradiation will be presented in details.

The upgraded Pixel Detector of the ATLAS Experiment for Run-II at the Large Hadron Collider

CERN Document Server

AUTHOR|(INSPIRE)INSPIRE-00407702

2016-01-01

The Pixel Detector of the ATLAS experiment has shown excellent performance during the whole Run-1 of the LHC. Taking advantage of the detector development period 2013 – 2014, the detector was extracted from the experiment and brought to surface to equip it with new service panels and to repair modules furthermore this helped with the installation of the Insertable B-Layer (IBL), fourth layer of pixel, installed in between the existing Pixel Detector and a new beam-pipe at a radius of 3.3 cm. To cope with the high radiation and increased pixel occupancy due to the proximity to the interaction point, two different silicon sensor technologies (planar and 3D) have been used. A new readout chip has been designed with CMOS 130nm technology with larger area, smaller pixel size and faster readout capability. Dedicated design features in combination with a new composite material were considered and used in order to reduce the material budget of the support structure while keeping the optimal thermo-mechanical perfor...

Online Calibration and Performance of the ATLAS Pixel Detector

CERN Document Server

Keil, M

2011-01-01

The ATLAS Pixel Detector is the innermost detector of the ATLAS experiment at the Large Hadron Collider at CERN. It consists of 1744 silicon sensors equipped with approximately 80 million electronic channels, providing typically three measurement points with high resolution for particles emerging from the beam-interaction region, thus allowing measuring particle tracks and secondary vertices with very high precision. The readout system of the Pixel Detector is based on a bi-directional optical data transmission system between the detector and the data acquisition system with an individual link for each of the 1744 modules. Signal conversion components are located on both ends, approximately 80 m apart. This paper describes the tuning and calibration of the optical links and the detector modules, including measurements of threshold, noise, charge measurement, timing performance and the sensor leakage current.

Optimization of thin n-in-p planar pixel modules for the ATLAS upgrade at HL-LHC

International Nuclear Information System (INIS)

Macchiolo, A.; Beyer, J.; Rosa, A. La; Nisius, R.; Savic, N.

2017-01-01

The ATLAS experiment will undergo around the year 2025 a replacement of the tracker system in view of the high luminosity phase of the LHC (HL-LHC) with a new 5-layer pixel system. Thin planar pixel sensors are promising candidates to instrument the innermost region of the new pixel system, thanks to the reduced contribution to the material budget and their high charge collection efficiency after irradiation. The sensors of 50-150 μm thickness, interconnected to FE-I4 read-out chips, have been characterized with radioactive sources and beam tests. In particular active edge sensors have been investigated. The performance of two different versions of edge designs are compared: the first with a bias ring, and the second one where only a floating guard ring has been implemented. The hit efficiency at the edge has also been studied after irradiation at a fluence of 10 15  n eq /cm 2 . Highly segmented sensors will represent a challenge for the tracking in the forward region of the pixel system at HL-LHC. In order to reproduce the performance of 50x50 μm 2 pixels at high pseudo-rapidity values, FE-I4 compatible planar pixel sensors have been studied before and after irradiation in beam tests at high incidence angles with respect to the short pixel direction. Results on the hit efficiency in this configuration are discussed for different sensor thicknesses.

TCAD simulations of High-Voltage-CMOS Pixel structures for the CLIC vertex detector

CERN Document Server

Buckland, Matthew Daniel

2016-01-01

The requirements for precision physics and the experimental conditions at CLIC result in stringent constraints for the vertex detector. Capacitively coupled active pixel sensors with 25 μm pitch implemented in a commercial 180 nm High-Voltage CMOS (HV-CMOS) process are currently under study as a candidate technology for the CLIC vertex detector. Laboratory calibration measurements and beam tests with prototypes are complemented by detailed TCAD and electronic circuit simulations, aiming for a comprehensive understanding of the signal formation in the HV-CMOS sensors and subsequent readout stages. In this note 2D and 3D TCAD simulation results of the prototype sensor, the Capacitively Coupled Pixel Detector version three (CCPDv3), will be presented. These include the electric field distribution, leakage current, well capacitance, transient response to minimum ionising particles and charge-collection.

Digital radiography using amorphous selenium: photoconductively activated switch (PAS) readout system.

Science.gov (United States)

Reznik, Nikita; Komljenovic, Philip T; Germann, Stephen; Rowlands, John A

2008-03-01

A new amorphous selenium (a-Se) digital radiography detector is introduced. The proposed detector generates a charge image in the a-Se layer in a conventional manner, which is stored on electrode pixels at the surface of the a-Se layer. A novel method, called photoconductively activated switch (PAS), is used to read out the latent x-ray charge image. The PAS readout method uses lateral photoconduction at the a-Se surface which is a revolutionary modification of the bulk photoinduced discharge (PID) methods. The PAS method addresses and eliminates the fundamental weaknesses of the PID methods--long readout times and high readout noise--while maintaining the structural simplicity and high resolution for which PID optical readout systems are noted. The photoconduction properties of the a-Se surface were investigated and the geometrical design for the electrode pixels for a PAS radiography system was determined. This design was implemented in a single pixel PAS evaluation system. The results show that the PAS x-ray induced output charge signal was reproducible and depended linearly on the x-ray exposure in the diagnostic exposure range. Furthermore, the readout was reasonably rapid (10 ms for pixel discharge). The proposed detector allows readout of half a pixel row at a time (odd pixels followed by even pixels), thus permitting the readout of a complete image in 30 s for a 40 cm x 40 cm detector with the potential of reducing that time by using greater readout light intensity. This demonstrates that a-Se based x-ray detectors using photoconductively activated switches could form a basis for a practical integrated digital radiography system.

Microwave Readout Techniques for Very Large Arrays of Nuclear Sensors

Energy Technology Data Exchange (ETDEWEB)

Ullom, Joel [Univ. of Colorado, Boulder, CO (United States). Dept. of Physics

2017-05-17

During this project, we transformed the use of microwave readout techniques for nuclear sensors from a speculative idea to reality. The core of the project consisted of the development of a set of microwave electronics able to generate and process large numbers of microwave tones. The tones can be used to probe a circuit containing a series of electrical resonances whose frequency locations and widths depend on the state of a network of sensors, with one sensor per resonance. The amplitude and phase of the tones emerging from the circuit are processed by the same electronics and are reduced to the sensor signals after two demodulation steps. This approach allows a large number of sensors to be interrogated using a single pair of coaxial cables. We successfully developed hardware, firmware, and software to complete a scalable implementation of these microwave control electronics and demonstrated their use in two areas. First, we showed that the electronics can be used at room temperature to read out a network of diverse sensor types relevant to safeguards or process monitoring. Second, we showed that the electronics can be used to measure large numbers of ultrasensitive cryogenic sensors such as gamma-ray microcalorimeters. In particular, we demonstrated the undegraded readout of up to 128 channels and established a path to even higher multiplexing factors. These results have transformed the prospects for gamma-ray spectrometers based on cryogenic microcalorimeter arrays by enabling spectrometers whose collecting areas and count rates can be competitive with high purity germanium but with 10x better spectral resolution.

Comparison of three resistor network division circuits for the readout of 4×4 pixel SiPM arrays

International Nuclear Information System (INIS)

Stratos, David; Maria, Georgiou; Eleftherios, Fysikopoulos; George, Loudos

2013-01-01

The purpose of this study is to investigate the behavior of a flexible SensL's silicon photomultiplier array (SPMArray4) photodetector for possible applications in PET imaging. We have designed and evaluated three different resistor network division circuits to read out the signal outputs of a 4×4 pixel SiPM array. We have applied firstly (i) a symmetric resistive voltage division circuit, secondly (ii) a symmetric resistive charge division circuit and thirdly (iii) a charge division multiplexing resistor network reducing the 16 pixel outputs to 4 position signals. In the first circuit the SensL SPMArray4-A0 preamplification electronics and a SPMArray4-A1 evaluation board providing the 16 pixels voltage outputs were used, before the symmetric resistive voltage network. We reduced the 16 voltage signals firstly to 4X and 4Y coordinate signals. Then those signals were further reduced to 2X and 2Y position signals connected via a resistor network. In the second readout circuit we have used the same technique but without the preamplification stage. The third circuit is based on a discretized positioning circuit, which multiplexes the 16 signals from the SiPM array to 4 position signals. The 4 position signals (Xa, Xb, Yc and Yd) were digitized using a free running sampling technique. An FPGA (Spartan 6 LX16) was used for triggering and signal processing of the pulses. We acquired raw images and energy histograms of a BGO and a CsI:Na pixilated scintillator under 22 Na excitation. A clear visualization of the discrete 2×2×5 mm 3 pixilated BGO scintillator elements as well as the 1×1×5 mm 3 pixilated CsI:Na crystal array was achieved with all applied readout circuits. The symmetric resistive charge division circuit provides higher peak to valley ratio than the other readout circuits. Τhe sensitivity and the energy resolution remained almost constant for the three circuits

Thin n-in-p planar pixel modules for the ATLAS upgrade at HL-LHC

International Nuclear Information System (INIS)

Savic, N.; Bergbreiter, L.; Breuer, J.; La Rosa, A.; Macchiolo, A.; Nisius, R.; Terzo, S.

2017-01-01

The ATLAS experiment will undergo a major upgrade of the tracker system in view of the high luminosity phase of the LHC (HL-LHC) foreseen to start around 2025. Thin planar pixel modules are promising candidates to instrument the new pixel system, thanks to the reduced contribution to the material budget and their high charge collection efficiency after irradiation. New designs of the pixel cells, with an optimized biasing structure, have been implemented in n-in-p planar pixel productions with sensor thicknesses of 270 μm. Using beam tests, the gain in hit efficiency is investigated as a function of the received irradiation fluence. The outlook for future thin planar pixel sensor productions will be discussed, with a focus on thin sensors with a thickness of 100 and 150 μm and a novel design with the optimized biasing structure and small pixel cells (50×50 and 25×100 μm"2). These dimensions are foreseen for the new ATLAS read-out chip in 65 nm CMOS technology and the fine segmentation will represent a challenge for the tracking in the forward region of the pixel system at HL-LHC. To predict the performance of 50×50 μm"2 pixels at high η, FE-I4 compatible planar pixel sensors have been studied before and after irradiation in beam tests at high incidence angle with respect to the short pixel direction. Results on cluster shapes, charge collection- and hit efficiency will be shown.

Thin n-in-p planar pixel modules for the ATLAS upgrade at HL-LHC

Energy Technology Data Exchange (ETDEWEB)

Savic, N., E-mail: natascha.savic@mpp.mpg.de; Bergbreiter, L.; Breuer, J.; La Rosa, A.; Macchiolo, A.; Nisius, R.; Terzo, S.

2017-02-11

The ATLAS experiment will undergo a major upgrade of the tracker system in view of the high luminosity phase of the LHC (HL-LHC) foreseen to start around 2025. Thin planar pixel modules are promising candidates to instrument the new pixel system, thanks to the reduced contribution to the material budget and their high charge collection efficiency after irradiation. New designs of the pixel cells, with an optimized biasing structure, have been implemented in n-in-p planar pixel productions with sensor thicknesses of 270 μm. Using beam tests, the gain in hit efficiency is investigated as a function of the received irradiation fluence. The outlook for future thin planar pixel sensor productions will be discussed, with a focus on thin sensors with a thickness of 100 and 150 μm and a novel design with the optimized biasing structure and small pixel cells (50×50 and 25×100 μm{sup 2}). These dimensions are foreseen for the new ATLAS read-out chip in 65 nm CMOS technology and the fine segmentation will represent a challenge for the tracking in the forward region of the pixel system at HL-LHC. To predict the performance of 50×50 μm{sup 2} pixels at high η, FE-I4 compatible planar pixel sensors have been studied before and after irradiation in beam tests at high incidence angle with respect to the short pixel direction. Results on cluster shapes, charge collection- and hit efficiency will be shown.

Simulation of digital pixel readout chip architectures with the RD53 SystemVerilog-UVM verification environment using Monte Carlo physics data

International Nuclear Information System (INIS)

Conti, E.; Marconi, S.; Christiansen, J.; Placidi, P.; Hemperek, T.

2016-01-01

The simulation and verification framework developed by the RD53 collaboration is a powerful tool for global architecture optimization and design verification of next generation hybrid pixel readout chips. In this paper the framework is used for studying digital pixel chip architectures at behavioral level. This is carried out by simulating a dedicated, highly parameterized pixel chip description, which makes it possible to investigate different grouping strategies between pixels and different latency buffering and arbitration schemes. The pixel hit information used as simulation input can be either generated internally in the framework or imported from external Monte Carlo detector simulation data. The latter have been provided by both the CMS and ATLAS experiments, featuring HL-LHC operating conditions and the specifications related to the Phase 2 upgrade. Pixel regions and double columns were simulated using such Monte Carlo data as inputs: the performance of different latency buffering architectures was compared and the compliance of different link speeds with the expected column data rate was verified

MiniDSS: a low-power and high-precision miniaturized digital sun sensor

NARCIS (Netherlands)

Boer, B.M. de; Durkut, M.; Laan, E.; Hakkesteegt, H.; Theuwissen, A.; Xie, N.; Leijtens, J.L.; Urquijo, E.; Bruins, P.

2012-01-01

A high-precision and low-power miniaturized digital sun sensor has been developed at TNO. The single-chip sun sensor comprises an application specific integrated circuit (ASIC) on which an active pixel sensor (APS), read-out and processing circuitry as well as communication circuitry are combined.

Vertex measurement at a hadron collider. The ATLAS pixel detector

International Nuclear Information System (INIS)

Grosse-Knetter, J.

2008-03-01

The ATLAS Pixel Detector is the innermost layer of the ATLAS tracking system and will contribute significantly to the ATLAS track and vertex reconstruction. The detector consists of identical sensor-chip-hybrid modules, arranged in three barrels in the centre and three disks on either side for the forward region. The position of the Pixel Detector near the interaction point requires excellent radiation hardness, fast read-out, mechanical and thermal robustness, good long-term stability, all combined with a low material budget. The new design concepts used to meet the challenging requirements are discussed with their realisation in the Pixel Detector, followed by a description of a refined and extensive set of measurements to assess the detector performance during and after its construction. (orig.)

Photon counting arrays for AO wavefront sensors

CERN Document Server

Vallerga, J; McPhate, J; Mikulec, Bettina; Clark, Allan G; Siegmund, O; CERN. Geneva

2005-01-01

Future wavefront sensors for AO on large telescopes will require a large number of pixels and must operate at high frame rates. Unfortunately for CCDs, there is a readout noise penalty for operating faster, and this noise can add up rather quickly when considering the number of pixels required for the extended shape of a sodium laser guide star observed with a large telescope. Imaging photon counting detectors have zero readout noise and many pixels, but have suffered in the past with low QE at the longer wavelengths (>500 nm). Recent developments in GaAs photocathode technology, CMOS ASIC readouts and FPGA processing electronics have resulted in noiseless WFS detector designs that are competitive with silicon array detectors, though at ~40% the QE of CCDs. We review noiseless array detectors and compare their centroiding performance with CCDs using the best available characteristics of each. We show that for sub-aperture binning of 6x6 and greater that noiseless detectors have a smaller centroid error at flu...

The INFN R\\&D: new pixel detector for the High Luminosity Upgrade of the LHC

CERN Document Server

Dinardo, Mauro

2017-01-01

The High Luminosity upgrade of the CERN-LHC (HL-LHC) demands for a new high-radiation tolerant solid-state pixel sensor capable of surviving fluencies up to a few $10^{16}$~ particles/cm$^2$ at $\\sim$3~cm from the interaction point. To this extent the INFN ATLAS-CMS joint research activity, in collaboration with Fondazione Bruno Kessler-FBK, is aiming at the development of thin n-in-p type pixel sensors for the HL-LHC. The R\\&D covers both planar and single-sided 3D columnar pixel devices made with the Si-Si Direct Wafer Bonding technique, which allows for the production of sensors with 100~$\\mu {\\rm m}$ and 130~$\\mu {\\rm m}$ active thickness for planar sensors, and 130~$\\mu {\\rm m}$ for 3D sensors, the thinnest ones ever produced so far. First prototypes of hybrid modules bump-bonded to the present CMS and ATLAS readout chips have been tested in beam tests. Preliminary results on their performance before and after irradiation are presented.

Experimental characterization of the 192 channel Clear-PEM frontend ASIC coupled to a multi-pixel APD readout of LYSO:Ce crystals

International Nuclear Information System (INIS)

Albuquerque, Edgar; Bexiga, Vasco; Bugalho, Ricardo; Carrico, Bruno; Ferreira, Claudia S.; Ferreira, Miguel; Godinho, Joaquim; Goncalves, Fernando; Leong, Carlos; Lousa, Pedro; Machado, Pedro; Moura, Rui; Neves, Pedro; Ortigao, Catarina; Piedade, Fernando; Pinheiro, Joao F.; Rego, Joel; Rivetti, Angelo; Rodrigues, Pedro; Silva, Jose C.

2009-01-01

In the framework of the Clear-PEM project for the construction of a high-resolution scanner for breast cancer imaging, a very compact and dense frontend electronics system has been developed for readout of multi-pixel S8550 Hamamatsu APDs. The frontend electronics are instrumented with a mixed-signal Application-Specific Integrated Circuit (ASIC), which incorporates 192 low-noise charge pre-amplifiers, shapers, analog memory cells and digital control blocks. Pulses are continuously stored in memory cells at clock frequency. Channels above a common threshold voltage are readout for digitization by off-chip free-sampling ADCs. The ASIC has a size of 7.3x9.8mm 2 and was implemented in a AMS 0.35μm CMOS technology. In this paper the experimental characterization of the Clear-PEM frontend ASIC, reading out multi-pixel APDs coupled to LYSO:Ce crystal matrices, is presented. The chips were mounted on a custom test board connected to six APD arrays and to the data acquisition system. Six 32-pixel LYSO:Ce crystal matrices coupled on both sides to APD arrays were readout by two test boards. All 384 channels were operational. The chip power consumption is 660 mW (3.4 mW per channel). A very stable behavior of the chip was observed, with an estimated ENC of 1200-1300e - at APD gain 100. The inter-channel noise dispersion and mean baseline variation is less than 8% and 0.5%, respectively. The spread in the gain between different channels is found to be 1.5%. Energy resolution of 16.5% at 511 keV and 12.8% at 662 keV has been measured. Timing measurements between the two APDs that readout the same crystal is extracted and compared with detailed Monte Carlo simulations. At 511 keV the measured single photon time RMS resolution is 1.30 ns, in very good agreement with the expected value of 1.34 ns.

Integrated optical readout for miniaturization of cantilever-based sensor system

DEFF Research Database (Denmark)

Nordström, Maria; Zauner, Dan; Calleja, Montserrat

2007-01-01

The authors present the fabrication and characterization of an integrated optical readout scheme based on single-mode waveguides for cantilever-based sensors. The cantilever bending is read out by monitoring changes in the optical intensity of light transmitted through the cantilever that also acts...

CMS Pixel Detector Upgrade

CERN Document Server

INSPIRE-00038772

2011-01-01

The present Compact Muon Solenoid silicon pixel tracking system has been designed for a peak luminosity of 1034cm-2s-1 and total dose corresponding to two years of the Large Hadron Collider (LHC) operation. With the steady increase of the luminosity expected at the LHC, a new pixel detector with four barrel layers and three endcap disks is being designed. We will present the key points of the design: the new geometry, which minimizes the material budget and increases the tracking points, and the development of a fast digital readout architecture, which ensures readout efficiency even at high rate. The expected performances for tracking and vertexing of the new pixel detector are also addressed.

High-speed X-ray imaging pixel array detector for synchrotron bunch isolation.

Science.gov (United States)

Philipp, Hugh T; Tate, Mark W; Purohit, Prafull; Shanks, Katherine S; Weiss, Joel T; Gruner, Sol M

2016-03-01

A wide-dynamic-range imaging X-ray detector designed for recording successive frames at rates up to 10 MHz is described. X-ray imaging with frame rates of up to 6.5 MHz have been experimentally verified. The pixel design allows for up to 8-12 frames to be stored internally at high speed before readout, which occurs at a 1 kHz frame rate. An additional mode of operation allows the integration capacitors to be re-addressed repeatedly before readout which can enhance the signal-to-noise ratio of cyclical processes. This detector, along with modern storage ring sources which provide short (10-100 ps) and intense X-ray pulses at megahertz rates, opens new avenues for the study of rapid structural changes in materials. The detector consists of hybridized modules, each of which is comprised of a 500 µm-thick silicon X-ray sensor solder bump-bonded, pixel by pixel, to an application-specific integrated circuit. The format of each module is 128 × 128 pixels with a pixel pitch of 150 µm. In the prototype detector described here, the three-side buttable modules are tiled in a 3 × 2 array with a full format of 256 × 384 pixels. The characteristics, operation, testing and application of the detector are detailed.

Design optimization of pixel sensors using device simulations for the phase-II CMS tracker upgrade

Science.gov (United States)

Jain, G.; Bhardwaj, A.; Dalal, R.; Eber, R.; Eichorn, T.; Fernandez, M.; Lalwani, K.; Messineo, A.; Palomo, F. R.; Peltola, T.; Printz, M.; Ranjan, K.; Villa, I.; Hidalgo, S.; CMS Collaboration

2016-07-01

In order to address the problems caused by the harsh radiation environment during the high luminosity phase of the LHC (HL-LHC), all silicon tracking detectors (pixels and strips) in the CMS experiment will undergo an upgrade. And so to develop radiation hard pixel sensors, simulations have been performed using the 2D TCAD device simulator, SILVACO, to obtain design parameters. The effect of various design parameters like pixel size, pixel depth, implant width, metal overhang, p-stop concentration, p-stop depth and bulk doping density on the leakage current and critical electric field are studied for both non-irradiated as well as irradiated pixel sensors. These 2D simulation results of planar pixels are useful for providing insight into the behaviour of non-irradiated and irradiated silicon pixel sensors and further work on 3D simulation is underway.

Design optimization of pixel sensors using device simulations for the phase-II CMS tracker upgrade

International Nuclear Information System (INIS)

Jain, G.; Bhardwaj, A.; Dalal, R.; Eber, R.; Eichorn, T.; Fernandez, M.; Lalwani, K.; Messineo, A.; Palomo, F.R.; Peltola, T.; Printz, M.; Ranjan, K.; Villa, I.; Hidalgo, S.

2016-01-01

In order to address the problems caused by the harsh radiation environment during the high luminosity phase of the LHC (HL-LHC), all silicon tracking detectors (pixels and strips) in the CMS experiment will undergo an upgrade. And so to develop radiation hard pixel sensors, simulations have been performed using the 2D TCAD device simulator, SILVACO, to obtain design parameters. The effect of various design parameters like pixel size, pixel depth, implant width, metal overhang, p-stop concentration, p-stop depth and bulk doping density on the leakage current and critical electric field are studied for both non-irradiated as well as irradiated pixel sensors. These 2D simulation results of planar pixels are useful for providing insight into the behaviour of non-irradiated and irradiated silicon pixel sensors and further work on 3D simulation is underway.

Design optimization of pixel sensors using device simulations for the phase-II CMS tracker upgrade

Energy Technology Data Exchange (ETDEWEB)

Jain, G., E-mail: geetikajain.hep@gmail.com [CDRST, Department of Physics & Astrophysics, University of Delhi, Delhi (India); Bhardwaj, A.; Dalal, R. [CDRST, Department of Physics & Astrophysics, University of Delhi, Delhi (India); Eber, R. [Institute fur Experimentelle Kernphysik (Germany); Eichorn, T. [Deutsches Elektronen Synchrotron (Germany); Fernandez, M. [Instituto de Fisica de Cantabria (Spain); Lalwani, K. [CDRST, Department of Physics & Astrophysics, University of Delhi, Delhi (India); Messineo, A. [Universita di Pisa & INFN sez. di Pisa (Italy); Palomo, F.R. [Escuela Superior de Ingenieros, Universidad de Sevilla (Spain); Peltola, T. [Helsinki Institute of Physics (Finland); Printz, M. [Institute fur Experimentelle Kernphysik (Germany); Ranjan, K. [CDRST, Department of Physics & Astrophysics, University of Delhi, Delhi (India); Villa, I. [Instituto de Fisica de Cantabria (Spain); Hidalgo, S. [Instituto de Microelectronica de Barcelona, Centro Nacional de Microelectronica (Spain)

2016-07-11

In order to address the problems caused by the harsh radiation environment during the high luminosity phase of the LHC (HL-LHC), all silicon tracking detectors (pixels and strips) in the CMS experiment will undergo an upgrade. And so to develop radiation hard pixel sensors, simulations have been performed using the 2D TCAD device simulator, SILVACO, to obtain design parameters. The effect of various design parameters like pixel size, pixel depth, implant width, metal overhang, p-stop concentration, p-stop depth and bulk doping density on the leakage current and critical electric field are studied for both non-irradiated as well as irradiated pixel sensors. These 2D simulation results of planar pixels are useful for providing insight into the behaviour of non-irradiated and irradiated silicon pixel sensors and further work on 3D simulation is underway.

First study of small-cell 3D Silicon Pixel Detectors for the High Luminosity LHC

CERN Document Server

E. Currás (1), J. Duarte-Campderrós (1), M. Fernández (1), A. García (1), G. Gómez (1), J. González (1), R. Jaramillo (1), D. Moya (1), I. Vila (1), S. Hidalgo (2), M. Manna (2), G. Pellegrini (2), D. Quirion (2), D. Pitzl (3), A. Ebrahimi (4), T. Rohe (5), S. Wiederkehr (5); ((1) Instituto de Física de Cantabria, (2) Instituto de Microelectrónica de Barcelona - Centro Nacional de Microelectrónica, (3) Deutsches Elektronen Synchrotron, (4) University of Hamburg, (5) Paul Scherrer Institut)

2018-01-01

A study of 3D pixel sensors of cell size 50 {\\mu}m x 50 {\\mu}m fabricated at IMB-CNM using double-sided n-on-p 3D technology is presented. Sensors were bump-bonded to the ROC4SENS readout chip. For the first time in such a small-pitch hybrid assembly, the sensor response to ionizing radiation in a test beam of 5.6 GeV electrons was studied. Results for non-irradiated sensors are presented, including efficiency, charge sharing, signal-to-noise, and resolution for different incidence angles.

Radiation hardness and timing studies of a monolithic TowerJazz pixel design for the new ATLAS Inner Tracker

International Nuclear Information System (INIS)

Riegel, C.; Backhaus, M.; Hoorne, J.W. Van; Kugathasan, T.; Musa, L.; Pernegger, H.; Riedler, P.; Schaefer, D.; Snoeys, W.; Wagner, W.

2017-01-01

A part of the upcoming HL-LHC upgrade of the ATLAS Detector is the construction of a new Inner Tracker. This upgrade opens new possibilities, but also presents challenges in terms of occupancy and radiation tolerance. For the pixel detector inside the inner tracker, hybrid modules containing passive silicon sensors and connected readout chips are presently used, but require expensive assembly techniques like fine-pitch bump bonding. Silicon devices fabricated in standard commercial CMOS technologies, which include part or all of the readout chain, are also investigated offering a reduced cost as they are cheaper per unit area than traditional silicon detectors. If they contain the full readout chain, as for a fully monolithic approach, there is no need for the expensive flip-chip assembly, resulting in a further cost reduction and material savings. In the outer pixel layers of the ATLAS Inner Tracker, the pixel sensors must withstand non-ionising energy losses of up to 10 15 n/cm 2 and offer a timing resolution of 25 ns or less. This paper presents test results obtained on a monolithic test chip, the TowerJazz 180nm Investigator, towards these specifications. The presented program of radiation hardness and timing studies has been launched to investigate this technology's potential for the new ATLAS Inner Tracker.

Semiconductor micropattern pixel detectors: a review of the beginnings

International Nuclear Information System (INIS)

Heijne, E.H.M.

2001-01-01

The innovation in monolithic and hybrid semiconductor 'micropattern' or 'reactive' pixel detectors for tracking in particle physics was actually to fit logic and pulse processing electronics with μW power on a pixel area of less than 0.04 mm 2 , retaining the characteristics of a traditional nuclear amplifier chain. The ns timing precision in conjunction with local memory and logic operations allowed event selection at >10 MHz rates with unambiguous track reconstruction even at particle multiplicities >10 cm -2 . The noise in a channel was ∼100e - rms and enabled binary operation with random noise 'hits' at a level -8 . Rectangular pixels from 75 μmx500 μm down to 34 μmx125 μm have been used by different teams. In binary mode a tracking precision from 6 to 14 μm was obtained, and using analog interpolation one came close to 1 μm. Earlier work, still based on charge integrating imaging circuits, provided a starting point. Two systems each with more than 1 million sensor + readout channels have been built, for WA97-NA57 and for the Delphi very forward tracker. The use of 0.5 μm and 0.25 μm CMOS and enclosed geometry for the transistors in the pixel readout chips resulted in radiation hardness of ∼2 Mrad, respectively, >30 Mrad

Performance of hybrid photon detector prototypes with encapsulated silicon pixel detector and readout for the RICH counters of LHCb

International Nuclear Information System (INIS)

Campbell, M.; George, K.A.; Girone, M.; Gys, T.; Jolly, S.; Piedigrossi, D.; Riedler, P.; Rozema, P.; Snoeys, W.; Wyllie, K.

2003-01-01

These proceedings report on the performance of the latest prototype pixel hybrid photon detector in preparation for the LHCb Ring Imaging Cherenkov detectors. The prototype encapsulates a silicon pixel detector bump-bonded to a binary read-out chip with short (25 ns) peaking time and low ( - ) detection threshold. A brief description of the prototype is given, followed by the preliminary results of the characterisation of the prototype behaviour when tested using a low intensity pulsed light emitting diode. The results obtained are in good agreement with those obtained using previous prototypes. The proceedings conclude with a summary of the current status and future plans

A Differential Electrochemical Readout ASIC With Heterogeneous Integration of Bio-Nano Sensors for Amperometric Sensing.

Science.gov (United States)

Ghoreishizadeh, Sara S; Taurino, Irene; De Micheli, Giovanni; Carrara, Sandro; Georgiou, Pantelis

2017-10-01

A monolithic biosensing platform is presented for miniaturized amperometric electrochemical sensing in CMOS. The system consists of a fully integrated current readout circuit for differential current measurement as well as on-die sensors developed by growing platinum nanostructures (Pt-nanoS) on top of electrodes implemented with the top metal layer. The circuit is based on the switch-capacitor technique and includes pseudodifferential integrators for concurrent sampling of the differential sensor currents. The circuit further includes a differential to single converter and a programmable gain amplifier prior to an ADC. The system is fabricated in [Formula: see text] technology and measures current within [Formula: see text] with minimum input-referred noise of [Formula: see text] and consumes [Formula: see text] from a [Formula: see text] supply. Differential sensing for nanostructured sensors is proposed to build highly sensitive and offset-free sensors for metabolite detection. This is successfully tested for bio-nano-sensors for the measurement of glucose in submilli molar concentrations with the proposed readout IC. The on-die electrodes are nanostructured and cyclic voltammetry run successfully through the readout IC to demonstrate detection of [Formula: see text].

DEPFET active pixel detectors for a future linear $e^+e^-$ collider

CERN Document Server

Alonso, O; Dieguez, A; Dingfelder, J; Hemperek, T; Kishishita, T; Kleinohl, T; Koch, M; Krueger, H; Lemarenko, M; Luetticke, F; Marinas, C; Schnell, M; Wermes, N; Campbell, A; Ferber, T; Kleinwort, C; Niebuhr, C; Soloviev, Y; Steder, M; Volkenborn, R; Yaschenko, S; Fischer, P; Kreidl, C; Peric, I; Knopf, J; Ritzert, M; Curras, E; Lopez-Virto, A; Moya, D; Vila, I; Boronat, M; Esperante, D; Fuster, J; Garcia Garcia, I; Lacasta, C; Oyanguren, A; Ruiz, P; Timon, G; Vos, M; Gessler, T; Kuehn, W; Lange, S; Muenchow, D; Spruck, B; Frey, A; Geisler, C; Schwenker, B; Wilk, F; Barvich, T; Heck, M; Heindl, S; Lutz, O; Mueller, Th; Pulvermacher, C; Simonis, H.J; Weiler, T; Krausser, T; Lipsky, O; Rummel, S; Schieck, J; Schlueter, T; Ackermann, K; Andricek, L; Chekelian, V; Chobanova, V; Dalseno, J; Kiesling, C; Koffmane, C; Gioi, L.Li; Moll, A; Moser, H.G; Mueller, F; Nedelkovska, E; Ninkovic, J; Petrovics, S; Prothmann, K; Richter, R; Ritter, A; Ritter, M; Simon, F; Vanhoefer, P; Wassatsch, A; Dolezal, Z; Drasal, Z; Kodys, P; Kvasnicka, P; Scheirich, J

2013-01-01

The DEPFET collaboration develops highly granular, ultra-transparent active pixel detectors for high-performance vertex reconstruction at future collider experiments. The characterization of detector prototypes has proven that the key principle, the integration of a first amplification stage in a detector-grade sensor material, can provide a comfortable signal to noise ratio of over 40 for a sensor thickness of 50-75 $\\mathrm{\\mathbf{\\mu m}}$. ASICs have been designed and produced to operate a DEPFET pixel detector with the required read-out speed. A complete detector concept is being developed, including solutions for mechanical support, cooling and services. In this paper the status of DEPFET R & D project is reviewed in the light of the requirements of the vertex detector at a future linear $\\mathbf{e^+ e^-}$ collider.

The effect of split pixel HDR image sensor technology on MTF measurements

Science.gov (United States)

Deegan, Brian M.

2014-03-01

Split-pixel HDR sensor technology is particularly advantageous in automotive applications, because the images are captured simultaneously rather than sequentially, thereby reducing motion blur. However, split pixel technology introduces artifacts in MTF measurement. To achieve a HDR image, raw images are captured from both large and small sub-pixels, and combined to make the HDR output. In some cases, a large sub-pixel is used for long exposure captures, and a small sub-pixel for short exposures, to extend the dynamic range. The relative size of the photosensitive area of the pixel (fill factor) plays a very significant role in the output MTF measurement. Given an identical scene, the MTF will be significantly different, depending on whether you use the large or small sub-pixels i.e. a smaller fill factor (e.g. in the short exposure sub-pixel) will result in higher MTF scores, but significantly greater aliasing. Simulations of split-pixel sensors revealed that, when raw images from both sub-pixels are combined, there is a significant difference in rising edge (i.e. black-to-white transition) and falling edge (white-to-black) reproduction. Experimental results showed a difference of ~50% in measured MTF50 between the falling and rising edges of a slanted edge test chart.

Silicon Sensors for the Upgrades of the CMS Pixel Detector

CERN Document Server

Centis Vignali, Matteo; Schleper, Peter

2015-01-01

The Compact Muon Solenoid (CMS) is a general purpose detector at the Large Hadron Collider (LHC). The LHC luminosity is constantly increased through upgrades of the accel- erator and its injection chain. Two major upgrades will take place in the next years. The rst upgrade involves the LHC injector chain and allows the collider to achieve a luminosity of about 2 10 34 cm-2 s-1 A further upgrade of the LHC foreseen for 2025 will boost its luminosity to 5 10 34 cm-2 s1. As a consequence of the increased luminosity, the detectors need to be upgraded. In particular, the CMS pixel detector will undergo two upgrades in the next years. The rst upgrade (phase I) consists in the substitution of the current pixel detector in winter 2016/2017. The upgraded pixel detector will implement new readout elec- tronics that allow ecient data taking up to a luminosity of 2 10 34 cm-2s-1,twice as much as the LHC design luminosity. The modules that will constitute the upgraded detector are being produced at dierent institutes. Ham...

Signal height in silicon pixel detectors irradiated with pions and protons

International Nuclear Information System (INIS)

Rohe, T.; Acosta, J.; Bean, A.; Dambach, S.; Erdmann, W.; Langenegger, U.; Martin, C.; Meier, B.; Radicci, V.; Sibille, J.; Trueb, P.

2010-01-01

Pixel detectors are used in the innermost part of multi-purpose experiments at the Large Hadron Collider (LHC) and are therefore exposed to the highest fluences of ionising radiation, which in this part of the detectors consists mainly of charged pions. The radiation hardness of the detectors has been tested thoroughly up to the fluences expected at the LHC. In case of an LHC upgrade the fluence will be much higher and it is not yet clear up to which radii the present pixel technology can be used. To establish such a limit, pixel sensors of the size of one CMS pixel readout chip (PSI46V2.1) have been bump bonded and irradiated with positive pions up to 6x10 14 n eq /cm 2 at PSI and with protons up to 5x10 15 n eq /cm 2 . The sensors were taken from production wafers of the CMS barrel pixel detector. They use n-type DOFZ material with a resistance of about 3.7kΩcm and an n-side read out. As the performance of silicon sensors is limited by trapping, the response to a Sr-90 source was investigated. The highly energetic beta-particles represent a good approximation to minimum ionising particles. The bias dependence of the signal for a wide range of fluences will be presented.

Amorphous In-Ga-Zn-O thin-film transistor active pixel sensor x-ray imager for digital breast tomosynthesis.

Science.gov (United States)

Zhao, Chumin; Kanicki, Jerzy

2014-09-01

The breast cancer detection rate for digital breast tomosynthesis (DBT) is limited by the x-ray image quality. The limiting Nyquist frequency for current DBT systems is around 5 lp/mm, while the fine image details contained in the high spatial frequency region (>5 lp/mm) are lost. Also today the tomosynthesis patient dose is high (0.67-3.52 mGy). To address current issues, in this paper, for the first time, a high-resolution low-dose organic photodetector/amorphous In-Ga-Zn-O thin-film transistor (a-IGZO TFT) active pixel sensor (APS) x-ray imager is proposed for next generation DBT systems. The indirect x-ray detector is based on a combination of a novel low-cost organic photodiode (OPD) and a cesium iodide-based (CsI:Tl) scintillator. The proposed APS x-ray imager overcomes the difficulty of weak signal detection, when small pixel size and low exposure conditions are used, by an on-pixel signal amplification with a significant charge gain. The electrical performance of a-IGZO TFT APS pixel circuit is investigated by SPICE simulation using modified Rensselaer Polytechnic Institute amorphous silicon (a-Si:H) TFT model. Finally, the noise, detective quantum efficiency (DQE), and resolvability of the complete system are modeled using the cascaded system formalism. The result demonstrates that a large charge gain of 31-122 is achieved for the proposed high-mobility (5-20 cm2/V s) amorphous metal-oxide TFT APS. The charge gain is sufficient to eliminate the TFT thermal noise, flicker noise as well as the external readout circuit noise. Moreover, the low TFT (sensor imager under 1 mR, indicating good image quality under low dose. A threefold reduction of current tomosynthesis dose is expected if proposed technology is combined with an advanced DBT image reconstruction method. The proposed a-IGZO APS x-ray imager with a pixel pitch6.67 lp/mm) and a low dose (<0.4 mGy) in next generation DBT systems.

Environmental sensors based on micromachined cantilevers with integrated read-out

DEFF Research Database (Denmark)

Boisen, Anja; Thaysen, Jacob; Jensenius, Henriette

2000-01-01

-out facilitates measurements in liquid. The probe has been successfully implemented in gaseous as well as in liquid experiments. For example, the probe has been used as an accurate and minute thermal sensor and as a humidity sensor. In liquid, the probe has been used to detect the presence of alcohol in water. (C......An AFM probe with integrated piezoresistive read-out has been developed and applied as a cantilever-based environmental sensor. The probe has a built-in reference cantilever, which makes it possible to subtract background drift directly in the measurement. Moreover, the integrated read...

Performance of the Pixel Luminosity Telescope for Luminosity Measurement at CMS during Run 2

CERN Document Server

CMS Collaboration

2017-01-01

The Pixel Luminosity Telescope (PLT) is a dedicated system for luminosity measurement at the CMS experiment using silicon pixel sensors arranged into "telescopes", each consisting of three planes. It was installed during LS1 at the beginning of 2015 and has been providing online and offline luminosity measurements throughout Run 2. The online bunch-by-bunch luminosity measurement employs the "fast-or" capability of the pixel readout chip (PSI46) to identify events where a hit is registered in all three sensors in a telescope corresponding primarily to tracks originating from the interaction point. In addition, the full pixel information is read out at a lower rate, allowing for the calculation of corrections to the online luminosity from effects such as the miscounting of tracks not originating from the interaction point and detector efficiency. In this talk, we will present results from 2016 running and preliminary 2017 results, including commissioning and operational history, luminosity calibration using Va...

Hybrid active pixel sensors in infrared astronomy

International Nuclear Information System (INIS)

Finger, Gert; Dorn, Reinhold J.; Meyer, Manfred; Mehrgan, Leander; Stegmeier, Joerg; Moorwood, Alan

2005-01-01

Infrared astronomy is currently benefiting from three main technologies providing high-performance hybrid active pixel sensors. In the near infrared from 1 to 5 μm two technologies, both aiming for buttable 2Kx2K mosaics, are competing, namely InSb and HgCdTe grown by LPE or MBE on Al 2 O 3 , Si or CdZnTe substrates. Blocked impurity band Si:As arrays cover the mid infrared spectral range from 8 to 28 μm. Adaptive optics combined with multiple integral field units feeding high-resolution spectrographs drive the requirements for the array format of infrared sensors used at ground-based infrared observatories. The pixel performance is now approaching fundamental limits. In view of this development, a detection limit for the photon flux of the ideal detector will be derived, depending only on the temperature and the impedance of the detector. It will be shown that this limit is approximated by state of the art infrared arrays for long on-chip integrations. Different detector materials are compared and strategies to populate large focal planes are discussed. The need for the development of small-format low noise sensors for adaptive optics and interferometry will be pointed out

An EUDET/AIDA Pixel Beam Telescope for Detector Development

CERN Document Server

Rubinskiy, I

2015-01-01

Ahigh resolution(σ< 2 μm) beam telescope based on monolithic active pixel sensors (MAPS) was developed within the EUDET collaboration. EUDET was a coordinated detector R&D programme for the future International Linear Collider providing test beam infrastructure to detector R&D groups. The telescope consists of six sensor planes with a pixel pitch of either 18.4 μm or 10 μmand canbe operated insidea solenoidal magnetic fieldofupto1.2T.Ageneral purpose cooling, positioning, data acquisition (DAQ) and offine data analysis tools are available for the users. The excellent resolution, readout rate andDAQintegration capabilities made the telescopea primary beam tests tool also for several CERN based experiments. In this report the performance of the final telescope is presented. The plans for an even more flexible telescope with three differentpixel technologies(ATLASPixel, Mimosa,Timepix) withinthenew European detector infrastructure project AIDA are presented.

High-speed imaging using CMOS image sensor with quasi pixel-wise exposure

Science.gov (United States)

Sonoda, T.; Nagahara, H.; Endo, K.; Sugiyama, Y.; Taniguchi, R.

2017-02-01

Several recent studies in compressive video sensing have realized scene capture beyond the fundamental trade-off limit between spatial resolution and temporal resolution using random space-time sampling. However, most of these studies showed results for higher frame rate video that were produced by simulation experiments or using an optically simulated random sampling camera, because there are currently no commercially available image sensors with random exposure or sampling capabilities. We fabricated a prototype complementary metal oxide semiconductor (CMOS) image sensor with quasi pixel-wise exposure timing that can realize nonuniform space-time sampling. The prototype sensor can reset exposures independently by columns and fix these amount of exposure by rows for each 8x8 pixel block. This CMOS sensor is not fully controllable via the pixels, and has line-dependent controls, but it offers flexibility when compared with regular CMOS or charge-coupled device sensors with global or rolling shutters. We propose a method to realize pseudo-random sampling for high-speed video acquisition that uses the flexibility of the CMOS sensor. We reconstruct the high-speed video sequence from the images produced by pseudo-random sampling using an over-complete dictionary.

Design studies on sensors for the ATLAS Pixel Detector

CERN Document Server

Hügging, F G

2002-01-01

For the ATLAS Pixel Detector, prototype sensors have been successfully developed. For the sensors design, attention was given to survivability of the harsh LHC radiation environment leading to the need to operate them at several hundreds of volts, while maintaining a good charge collection efficiency, small cell size and minimal multiple scattering. For a cost effective mass production, a bias grid is implemented to test the sensors before assembly under full bias. (6 refs).

Beam test results for the RAPS03 non-epitaxial CMOS active pixel sensor

International Nuclear Information System (INIS)

Biagetti, Daniele; Marras, Alessandro; Meroli, Stefano; Passeri, Daniele; Placidi, Pisana; Servoli, Leonello; Tucceri, Paola

2011-01-01

Recently our group has been investigating the possibility of using a standard CMOS technology - featuring no epitaxial layer - to fabricate a sensor for charged particle detection. In this work we present the results obtained exposing sensors with 256x256 pixels (10x10μm pixel size, two different pixel layouts) to 180 GeV protons and positrons at the SuperProtoSynchrotron facility (CERN). We have investigated the different response of the two architectural options in terms of S/N, cluster width, intrinsic spatial resolution, efficiency. The results show a good Landau response, S/N about 22 with an average cluster size of 4.5 pixels, and an intrinsic spatial resolution of 1.5μm (order of 1/7th of the pixel size).