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Sample records for pixel readout messungen

  1. Pixel detector readout chip

    CERN Multimedia

    1991-01-01

    Close-up of a pixel detector readout chip. The photograph shows an aera of 1 mm x 2 mm containing 12 separate readout channels. The entire chip contains 1000 readout channels (around 80 000 transistors) covering a sensitive area of 8 mm x 5 mm. The chip has been mounted on a silicon detector to detect high energy particles.

  2. Readout Architecture for Hybrid Pixel Readout Chips

    CERN Document Server

    AUTHOR|(SzGeCERN)694170; Westerlund, Tomi; Wyllie, Ken

    The original contribution of this thesis to knowledge are novel digital readout architectures for hybrid pixel readout chips. The thesis presents asynchronous bus-based architecture, a data-node based column architecture and a network-based pixel matrix architecture for data transportation. It is shown that the data-node architecture achieves readout efficiency 99 % with half the output rate as a bus-based system. The network-based solution avoids ``broken'' columns due to some manufacturing errors, and it distributes internal data traffic more evenly across the pixel matrix than column-based architectures. An improvement of $>$ 10 % to the efficiency is achieved with uniform and non-uniform hit occupancies. Architectural design has been done using transaction level modeling ($TLM$) and sequential high-level design techniques for reducing the design and simulation time. It has been possible to simulate tens of column and full chip architectures using the high-level techniques. A decrease of $>$ 10 in run-time...

  3. Digital column readout architectures for hybrid pixel detector readout chips

    CERN Document Server

    Poikela, T; Westerlund, T; Buytaert, J; Campbell, M; De Gaspari, M; Llopart, X; Wyllie, K; Gromov, V; Kluit, R; van Beuzekom, M; Zappon, F; Zivkovic, V; Brezina, C; Desch, K; Fu, Y; Kruth, A

    2014-01-01

    In this paper, two digital column architectures suitable for sparse readout of data from a pixel matrix in trigger-less applications are presented. Each architecture reads out a pixel matrix of 256 x 256 pixels with a pixel pitch of 55 µm. The first architecture has been implemented in the Timepix3 chip, and this is presented together with initial measurements. Simulation results and measured data are compared. The second architecture has been designed for Velopix, a readout chip planned for the LHCb VELO upgrade. Unlike Timepix3, this has to be tolerant to radiation-induced single-event effects. Results from post-layout simulations are shown with the circuit architectures.

  4. Architectural modeling of pixel readout chips Velopix and Timepix3

    NARCIS (Netherlands)

    Poikela, T.; Plosila, J.; Westerlund, T.; Buytaert, J.; Campbell, M.; Llopart, X.; Plackett, R.; Wyllie, K.; van Beuzekom, M.; Gromov, V.; Kluit, R.; Zappon, F.; Zivkovic, V.; Brezina, C.; Desch, K.; Fang, X.; Kruth, A.

    2012-01-01

    We examine two digital architectures for front end pixel readout chips, Velopix and Timepix3. These readout chips are developed for tracking detectors in future high energy physics experiments. They must incorporate local intelligence in pixels for time-over-threshold measurement and sparse readout.

  5. Towards third generation pixel readout chips

    Energy Technology Data Exchange (ETDEWEB)

    Garcia-Sciveres, M., E-mail: mgarcia-sciveres@lbl.gov; Mekkaoui, A.; Ganani, D.

    2013-12-11

    We present concepts and prototyping results towards a third generation pixel readout chip. We consider the 130 nm feature size FE-I4 chip, in production for the ATLAS IBL upgrade, to be a second generation chip. A third generation chip would have to go significantly further. A possible direction is to make the IC design generic so that different experiments can configure it to meet significantly different requirements, without the need for everybody to develop their own ASIC from the ground up. In terms of target technology, a demonstrator 500-pixel matrix containing analog front ends only (no complex functionality), was designed and fabricated in 65 nm CMOS and irradiated with protons in December 2011 and May 2012.

  6. Data encoding efficiency in pixel detector readout with charge information

    CERN Document Server

    Garcia-Sciveres, Maurice

    2016-01-01

    The minimum number of bits needed for lossless readout of a pixel detector is calculated, in the regime of interest for particle physics where only a small fraction of pixels have a non-zero value per frame. This permits a systematic comparison of the readout efficiency of different encoding implementations. The calculation is compared to the bits used for by the FE-I4 pixel readout chip of the ATLAS experiment.

  7. Data encoding efficiency in pixel detector readout with charge information

    Energy Technology Data Exchange (ETDEWEB)

    Garcia-Sciveres, Maurice, E-mail: mgs@lbl.gov [Lawrence Berkeley National Laboratory, Berkeley, CA (United States); Wang, Xinkang [University of Chicago, Chicago, IL (United States)

    2016-04-11

    The average minimum number of bits needed for lossless readout of a pixel detector is calculated, in the regime of interest for particle physics where only a small fraction of pixels have a non-zero value per frame. This permits a systematic comparison of the readout efficiency of different encoding implementations. The calculation is compared to the number of bits used by the FE-I4 pixel readout chip of the ATLAS experiment.

  8. The FE-I4 pixel readout integrated circuit

    Energy Technology Data Exchange (ETDEWEB)

    Garcia-Sciveres, M., E-mail: mgarcia-sciveres@bl.gov [Lawrence Berkeley National Laboratory, Berkeley, CA (United States); Arutinov, D.; Barbero, M. [University of Bonn, Bonn (Germany); Beccherle, R. [Istituto Nazionale di Fisica Nucleare Sezione di Genova, Genova (Italy); Dube, S.; Elledge, D. [Lawrence Berkeley National Laboratory, Berkeley, CA (United States); Fleury, J. [Laboratoire de l' Accelerateur Lineaire, Orsay (France); Fougeron, D.; Gensolen, F. [Centre de Physique des Particules de Marseille, Marseille (France); Gnani, D. [Lawrence Berkeley National Laboratory, Berkeley, CA (United States); Gromov, V. [Nationaal Instituut voor Subatomaire Fysica, Amsterdam (Netherlands); Hemperek, T.; Karagounis, M. [University of Bonn, Bonn (Germany); Kluit, R. [Nationaal Instituut voor Subatomaire Fysica, Amsterdam (Netherlands); Kruth, A. [University of Bonn, Bonn (Germany); Mekkaoui, A. [Lawrence Berkeley National Laboratory, Berkeley, CA (United States); Menouni, M. [Centre de Physique des Particules de Marseille, Marseille (France); Schipper, J.-D. [Nationaal Instituut voor Subatomaire Fysica, Amsterdam (Netherlands)

    2011-04-21

    A new pixel readout integrated circuit denominated FE-I4 is being designed to meet the requirements of ATLAS experiment upgrades. It will be the largest readout IC produced to date for particle physics applications, filling the maximum allowed reticle area. This will significantly reduce the cost of future hybrid pixel detectors. In addition, FE-I4 will have smaller pixels and higher rate capability than the present generation of LHC pixel detectors. Design features are described along with simulation and test results, including low power and high rate readout architecture, mixed signal design strategy, and yield hardening.

  9. FPIX2, the BTeV pixel readout chip

    CERN Document Server

    Christian, D C; Chiodini, G; Hoff, J; Kwan, S; Mekkaoui, A; Yarema, R; 10.1016/j.nima.2005.04.046

    2005-01-01

    A radiation tolerant pixel readout chip, FPIX2, has been developed at Fermilab for use by BTeV. Some of the requirements of the BTeV pixel readout chip are reviewed and contrasted with requirements for similar devices in LHC experiments. A description of the FPIX2 is given, and results of initial tests of its performance are presented, as is a summary of measurements planned for the coming year.

  10. Dual readout 3D direct/induced-signals pixel systems

    CERN Document Server

    Parker, Sherwood; Deile, Mario; Hansen, Thor-Erik; Hasi, Jasmine; Kenney, Christopher; Kok, Angela; Watts, Stephen

    2008-01-01

    In this paper, 3D-electrode pixel detectors are described, in which the bias electrode systems have additional elements. Adding resistors between the bias supply line and each bias electrode together with a signal electrode readout that can measure pulse heights of both polarities could simultaneously provide lower capacitance and improved spatial resolution in both directions. A separate paper (“Dual-readout—strip/pixel systems”) covers an alternative—pixels with an added strip readout in one direction which could be used with either planar or 3D-electrodes, and could simultaneously provide a fast trigger and significantly increase the spatial resolution in both directions.

  11. Improvement of Event Synchronization in the ATLAS Pixel Readout Development

    Science.gov (United States)

    Adams, Logan; Atlas Collaboration

    2017-01-01

    As the LHC continues in Run2, the B-Layer still uses the Atlas-SiROD Pixel readout system initially developed for Run 1. The higher luminosity occurring during Run 2 results in higher occupancy causing increased desynchronization errors in the Pixel Readout. In order to ensure lasting operation of the B-Layer until it is replaced after Run 3, changes were made to the firmware and software to add debug capabilities to identify when the errors are crossing certain thresholds and change the internal control logic accordingly. These features also allow for better debugging of the Event Counter Reset addition to the firmware. This talk will focus on the features implemented and measurements to demonstrate the positive impact on the Pixel DAQ system. A Pixel front-end chip emulator which can be used for readout system development beyond Run 3 will also be discussed. Presenter is Logan Adams, University of Washington.

  12. Pixel readout chip for the ATLAS experiment

    CERN Document Server

    Ackers, M; Blanquart, L; Bonzom, V; Comes, G; Fischer, P; Keil, M; Kühl, T; Meuser, S; Delpierre, P A; Treis, J; Raith, B A; Wermes, N

    1999-01-01

    Pixel detectors with a high granularity and a very large number of sensitive elements (cells) are a very recent development used for high precision particle detection. At the Large Hadron Collider LHC at CERN (Geneva) a pixel detector with 1.4*10/sup 8/ individual pixel cells is developed for the ATLAS detector. The concept is a hybrid detector. Consisting of a pixel sensor connected to a pixel electronics chip by bump and flip chip technology in one-to-one cell correspondence. The development and prototype results of the pixel front end chip are presented together with the physical and technical requirements to be met at LHC. Lab measurements are reported. (6 refs).

  13. Readout of TPC Tracking Chambers with GEMs and Pixel Chip

    Energy Technology Data Exchange (ETDEWEB)

    Kadyk, John; Kim, T.; Freytsis, M.; Button-Shafer, J.; Kadyk, J.; Vahsen, S.E.; Wenzel, W.A.

    2007-12-21

    Two layers of GEMs and the ATLAS Pixel Chip, FEI3, have been combined and tested as a prototype for Time Projection Chamber (TPC) readout at the International Linear Collider (ILC). The double-layer GEM system amplifies charge with gain sufficient to detect all track ionization. The suitability of three gas mixtures for this application was investigated, and gain measurements are presented. A large sample of cosmic ray tracks was reconstructed in 3D by using the simultaneous timing and 2D spatial information from the pixel chip. The chip provides pixel charge measurement as well as timing. These results demonstrate that a double GEM and pixel combination, with a suitably modified pixel ASIC, could meet the stringent readout requirements of the ILC.

  14. Anode readout for pixellated CZT detectors

    Science.gov (United States)

    Narita, Tomohiko; Grindlay, Jonathan E.; Hong, Jaesub; Niestemski, Francis C.

    2004-02-01

    Determination of the photon interaction depth offers numerous advantages for an astronomical hard X-ray telescope. The interaction depth is typically derived from two signals: anode and cathode, or collecting and non-collecting electrodes. We present some preliminary results from our depth sensing detectors using only the anode pixel signals. By examining several anode pixel signals simultaneously, we find that we can estimate the interaction depth, and get sub-pixel 2-D position resolution. We discuss our findings and the requirements for future ASIC development.

  15. Readout chip for the CMS pixel detector upgrade

    Energy Technology Data Exchange (ETDEWEB)

    Rossini, Marco, E-mail: marco.rossini@phys.ethz.ch

    2014-11-21

    For the CMS experiment a new pixel detector is planned for installation during the extended shutdown in winter 2016/2017. Among the changes of the detector modified front end electronics will be used for higher efficiency at peak luminosity of the LHC and faster readout. The first prototype versions of the new readout chip have been designed and produced. The results of qualification and calibration for the new chip are presented in this paper.

  16. High frame rate measurements of semiconductor pixel detector readout IC

    Science.gov (United States)

    Szczygiel, R.; Grybos, P.; Maj, P.

    2012-07-01

    We report on high count rate and high frame rate measurements of a prototype IC named FPDR90, designed for readouts of hybrid pixel semiconductor detectors used for X-ray imaging applications. The FPDR90 is constructed in 90 nm CMOS technology and has dimensions of 4 mm×4 mm. Its main part is a matrix of 40×32 pixels with 100 μm×100 μm pixel size. The chip works in the single photon counting mode with two discriminators and two 16-bit ripple counters per pixel. The count rate per pixel depends on the effective CSA feedback resistance and can be set up to 6 Mcps. The FPDR90 can operate in the continuous readout mode, with zero dead time. Due to the architecture of digital blocks in pixel, one can select the number of bits read out from each counter from 1 to 16. Because in the FPDR90 prototype only one data output is available, the frame rate is 9 kfps and 72 kfps for 16 bits and 1 bit readout, respectively (with nominal clock frequency of 200 MHz).

  17. High frame rate measurements of semiconductor pixel detector readout IC

    Energy Technology Data Exchange (ETDEWEB)

    Szczygiel, R., E-mail: robert.szczygiel@agh.edu.pl [AGH University of Science and Technology, Department of Measurement and Instrumentation, Al. Mickiewicza 30, 30-059 Cracow (Poland); Grybos, P.; Maj, P. [AGH University of Science and Technology, Department of Measurement and Instrumentation, Al. Mickiewicza 30, 30-059 Cracow (Poland)

    2012-07-11

    We report on high count rate and high frame rate measurements of a prototype IC named FPDR90, designed for readouts of hybrid pixel semiconductor detectors used for X-ray imaging applications. The FPDR90 is constructed in 90 nm CMOS technology and has dimensions of 4 mm Multiplication-Sign 4 mm. Its main part is a matrix of 40 Multiplication-Sign 32 pixels with 100 {mu}m Multiplication-Sign 100 {mu}m pixel size. The chip works in the single photon counting mode with two discriminators and two 16-bit ripple counters per pixel. The count rate per pixel depends on the effective CSA feedback resistance and can be set up to 6 Mcps. The FPDR90 can operate in the continuous readout mode, with zero dead time. Due to the architecture of digital blocks in pixel, one can select the number of bits read out from each counter from 1 to 16. Because in the FPDR90 prototype only one data output is available, the frame rate is 9 kfps and 72 kfps for 16 bits and 1 bit readout, respectively (with nominal clock frequency of 200 MHz).

  18. Digital Power Consumption Estimations for CHIPIX65 Pixel Readout Chip

    CERN Document Server

    Marcotulli, Andrea

    2016-01-01

    New hybrid pixel detectors with improved resolution capable of dealing with hit rates up to 3 GHz/cm2 will be required for future High Energy Physics experiments in the Large Hadron Collider (LHC) at CERN. Given this, the RD53 collaboration works on the design of the next generation pixel readout chip needed for both the ATLAS and CMS detector phase 2 pixel upgrades. For the RD53 demonstrator chip in 65nm CMOS technology, different architectures are considered. In particular the purpose of this work is estimating the power consumption of the digital architecture of the readout ASIC developed by CHIPIX65 project of the INFN National Scientific Committee. This has been done with modern chip design tools integrated with the VEPIX53 simulation framework that has been developed within the RD53 collaboration in order to assess the performance of the system in very high rate, high energy physics experiments.

  19. Detector apparatus having a hybrid pixel-waveform readout system

    Science.gov (United States)

    Meng, Ling-Jian

    2014-10-21

    A gamma ray detector apparatus comprises a solid state detector that includes a plurality of anode pixels and at least one cathode. The solid state detector is configured for receiving gamma rays during an interaction and inducing a signal in an anode pixel and in a cathode. An anode pixel readout circuit is coupled to the plurality of anode pixels and is configured to read out and process the induced signal in the anode pixel and provide triggering and addressing information. A waveform sampling circuit is coupled to the at least one cathode and configured to read out and process the induced signal in the cathode and determine energy of the interaction, timing of the interaction, and depth of interaction.

  20. A generic readout environment for prototype pixel detectors

    Energy Technology Data Exchange (ETDEWEB)

    Turqueti, Marcos, E-mail: turqueti@fnal.go [Fermi National Accelerator Laboratory, Kirk and Wilson Road, 60510-500 (United States); Rivera, Ryan; Prosser, Alan; Kwan, Simon [Fermi National Accelerator Laboratory, Kirk and Wilson Road, 60510-500 (United States)

    2010-11-01

    Pixel detectors for experimental particle physics research have been implemented with a variety of readout formats and potentially generate massive amounts of data. Examples include the PSI46 device for the Compact Muon Solenoid (CMS) experiment which implements an analog readout, the Fermilab FPIX2.1 device with a digital readout, and the Fermilab Vertically Integrated Pixel device. The Electronic Systems Engineering Department of the Computing Division at the Fermi National Accelerator Laboratory has developed a data acquisition system flexible and powerful enough to meet the various needs of these devices to support laboratory test bench as well as test beam applications. The system is called CAPTAN (Compact And Programmable daTa Acquisition Node) and is characterized by its flexibility, versatility and scalability by virtue of several key architectural features. These include a vertical bus that permits the user to stack multiple boards, a gigabit Ethernet link that permits high speed communications to the system and a core group of boards that provide specific processing and readout capabilities for the system. System software based on distributed computing techniques supports an expandable network of CAPTANs. In this paper, we describe the system architecture and give an overview of its capabilities.

  1. Monolithic pixels on moderate resistivity substrate and sparsifying readout architecture

    Science.gov (United States)

    Giubilato, P.; Battaglia, M.; Bisello, D.; Caselle, M.; Chalmet, P.; Demaria, L.; Ikemoto, Y.; Kloukinas, K.; Mansuy, S. C.; Mattiazzo, S.; Marchioro, A.; Mugnier, H.; Pantano, D.; Potenza, A.; Rivetti, A.; Rousset, J.; Silvestrin, L.; Snoeys, W.

    2013-12-01

    The LePix projects aim realizing a new generation monolithic pixel detectors with improved performances at lesser cost with respect to both current state of the art monolithic and hybrid pixel sensors. The detector is built in a 90 nm CMOS process on a substrate of moderate resistivity. This allows charge collection by drift while maintaining the other advantages usually offered by MAPS, like having a single piece detector and using a standard CMOS production line. The collection by drift mechanism, coupled to the low capacitance design of the collecting node made possible by the monolithic approach, provides an excellent signal to noise ratio straight at the pixel cell together with a radiation tolerance far superior to conventional un-depleted MAPS. The excellent signal-to-noise performance is demonstrated by the device ability to separate the 6 keV 55Fe double peak at room temperature. To achieve high granularity (10-20 μm pitch pixels) over large detector areas maintaining high readout speed, a completely new compressing architecture has been devised. This architecture departs from the mainstream hybrid pixel sparsification approach, which uses in-pixel logic to reduce data, by using topological compression to minimize pixel area and power consumption.

  2. HEXITEC ASIC-a pixellated readout chip for CZT detectors

    Energy Technology Data Exchange (ETDEWEB)

    Jones, Lawrence [STFC Rutherford Appleton Laboratory, Didcot OX11 0QX (United Kingdom)], E-mail: l.l.jones@stfc.ac.uk; Seller, Paul; Wilson, Matthew; Hardie, Alec [STFC Rutherford Appleton Laboratory, Didcot OX11 0QX (United Kingdom)

    2009-06-01

    HEXITEC is a collaborative project with the aim of developing a new range of detectors for high-energy X-ray imaging. High-energy X-ray imaging has major advantages over current lower energy imaging for the life and physical sciences, including improved phase-contrast images on larger, higher density samples and with lower accumulated doses. However, at these energies conventional silicon-based devices cannot be used, hence, the requirement for a new range of high Z-detector materials. Underpinning the HEXITEC programme are the development of a pixellated Cadmium Zinc Telluride (CZT) detectors and a pixellated readout ASIC which will be bump-bonded to the detector. The HEXITEC ASIC is required to have low noise (20 electrons rms) and tolerate detector leakage currents. A prototype 20x20 pixel ASIC has been developed and manufactured on a standard 0.35 {mu}m CMOS process.

  3. HEXITEC ASIC—a pixellated readout chip for CZT detectors

    Science.gov (United States)

    Jones, Lawrence; Seller, Paul; Wilson, Matthew; Hardie, Alec

    2009-06-01

    HEXITEC is a collaborative project with the aim of developing a new range of detectors for high-energy X-ray imaging. High-energy X-ray imaging has major advantages over current lower energy imaging for the life and physical sciences, including improved phase-contrast images on larger, higher density samples and with lower accumulated doses. However, at these energies conventional silicon-based devices cannot be used, hence, the requirement for a new range of high Z-detector materials. Underpinning the HEXITEC programme are the development of a pixellated Cadmium Zinc Telluride (CZT) detectors and a pixellated readout ASIC which will be bump-bonded to the detector. The HEXITEC ASIC is required to have low noise (20 electrons rms) and tolerate detector leakage currents. A prototype 20×20 pixel ASIC has been developed and manufactured on a standard 0.35 μm CMOS process.

  4. Towards a new generation of pixel detector readout chips

    CERN Document Server

    Campbell, M; Ballabriga, R.; Frojdh, E.; Heijne, E.; Llopart, X.; Poikela, T.; Tlustos, L.; Valerio, P.; Wong, W.

    2016-01-01

    The Medipix3 Collaboration has broken new ground in spectroscopic X-ray imaging and in single particle detection and tracking. This paper will review briefly the performance and limitations of the present generation of pixel detector readout chips developed by the Collaboration. Through Silicon Via technology has the potential to provide a significant improvement in the tile- ability and more flexibility in the choice of readout architecture. This has been explored in the context of 3 projects with CEA-LETI using Medipix3 and Timepix3 wafers. The next generation of chips will aim to provide improved spectroscopic imaging performance at rates compatible with human CT. It will also aim to provide full spectroscopic images with unprecedented energy and spatial resolution. Some of the opportunities and challenges posed by moving to a more dense CMOS process will be discussed.

  5. Development of a novel pixel-level signal processing chain for fast readout 3D integrated CMOS pixel sensors

    Energy Technology Data Exchange (ETDEWEB)

    Fu, Y.; Torheim, O.; Hu-Guo, C. [Institut Pluridisciplinaire Hubert Curien (IPHC), 23 rue du loess, BP 28, 67037 Strasbourg (France); Degerli, Y. [CEA Saclay, IRFU/SEDI, 91191 Gif-sur-Yvette Cedex (France); Hu, Y., E-mail: yann.hu@iphc.cnrs.fr [Institut Pluridisciplinaire Hubert Curien (IPHC), 23 rue du loess, BP 28, 67037 Strasbourg (France)

    2013-03-11

    In order to resolve the inherent readout speed limitation of traditional 2D CMOS pixel sensors, operated in rolling shutter readout, a parallel readout architecture has been developed by taking advantage of 3D integration technologies. Since the rows of the pixel array are zero-suppressed simultaneously instead of sequentially, a frame readout time of a few microseconds is expected for coping with high hit rates foreseen in future collider experiments. In order to demonstrate the pixel readout functionality of such a pixel sensor, a 2D proof-of-concept chip including a novel pixel-level signal processing chain was designed and fabricated in a 0.13μm CMOS technology. The functionalities of this chip have been verified through experimental characterization.

  6. Small-Scale Readout Systems Prototype for the STAR PIXEL Detector

    Energy Technology Data Exchange (ETDEWEB)

    Szelezniak, Michal A.; Besson, Auguste; Colledani, Claude; Dorokhov, Andrei; Dulinski, Wojciech; Greiner, Leo C.; Himmi, Abdelkader; Hu, Christine; Matis, Howard S.; Ritter, Hans Georg; Rose, Andrew; Shabetai, Alexandre; Stezelberger, Thorsten; Sun, Xiangming; Thomas, Jim H.; Valin, Isabelle; Vu, Chinh Q.; Wieman, Howard H.; Winter, Marc

    2008-10-01

    A prototype readout system for the STAR PIXEL detector in the Heavy Flavor Tracker (HFT) vertex detector upgrade is presented. The PIXEL detector is a Monolithic Active Pixel Sensor (MAPS) based silicon pixel vertex detector fabricated in a commercial CMOS process that integrates the detector and front-end electronics layers in one silicon die. Two generations ofMAPS prototypes designed specifically for the PIXEL are discussed. We have constructed a prototype telescope system consisting of three small MAPS sensors arranged in three parallel and coaxial planes with a readout system based on the readout architecture for PIXEL. This proposed readout architecture is simple and scales to the size required to readout the final detector. The real-time hit finding algorithm necessary for data rate reduction in the 400 million pixel detector is described, and aspects of the PIXEL system integration into the existing STAR framework are addressed. The complete system has been recently tested and shown to be fully functional.

  7. The CMS pixel readout chip for the Phase 1 Upgrade

    CERN Document Server

    Hits, Dmitry

    2015-01-01

    The present CMS pixel Read Out Chip (ROC) was designed for operation at a bunch spacing of 25\\,ns and to be efficient up to the nominal instantaneous luminosity of 10$^{34} \\rm cm^{-2} \\rm s^{-1}$. Based on the excellent LHC performance to date and the upgrade plans for the accelerators, it is anticipated that the instantaneous luminosity could reach $2\\times10^{34} \\rm cm^{-2} \\rm s^{-1}$ before the Long Shutdown 2 (LS2) in 2018, and well above this by the LS3 in 2022. That is why a new ROC has been designed and why a completely new pixel detector will be built with a planned installation in CMS during an extended winter shutdown in 2016/17. The ROC for the upgraded pixel detector is an evolution of the present architecture. It will be manufactured in the same 250\\,nm CMOS process. The core of the architecture is maintained, with enhancement in performance in three main areas: readout protocol, reduced data loss and enhanced analog performance. The main features of the new CMS pixel ROC are presented togeth...

  8. The CMS Pixel Readout Chip for the Phase 1 Upgrade

    Science.gov (United States)

    Hits, D.; Starodumov, A.

    2015-05-01

    The present CMS pixel Read Out Chip (ROC) was designed for operation at a bunch spacing of 25 ns and to be efficient up to the nominal instantaneous luminosity of 1034 cm-2 s-1. Based on the excellent LHC performance to date and the upgrade plans for the accelerators, it is anticipated that the instantaneous luminosity could reach 2×1034 cm-2 s-1 before the Long Shutdown 2 (LS2) in 2018, and well above this by the LS3 in 2022. That is why a new ROC has been designed and why a completely new pixel detector will be built with a planned installation in CMS during an extended winter shutdown in 2016/17. The ROC for the upgraded pixel detector is an evolution of the present architecture. It will be manufactured in the same 250 nm CMOS process. The core of the architecture is maintained, with enhancement in performance in three main areas: readout protocol, reduced data loss and enhanced analog performance. The main features of the new CMS pixel ROC are presented together with measured performance of the chip.

  9. Monolithic pixels on moderate resistivity substrate and sparsifying readout architecture

    CERN Document Server

    Giubilato, P; Snoeys, W; Bisello, D; Marchioro, A; Battaglia, M; Demaria, L; Mansuy, S C; Pantano, D; Rousset, J; Mattiazzo, S; Kloukinas, K; Potenza, A; Ikemoto, Y; Rivetti, A; Chalmet, P; Mugnier, H; Silvestrin, L

    2013-01-01

    The LePix projects aim realizing a new generation monolithic pixel detectors with improved performances at lesser cost with respect to both current state of the art monolithic and hybrid pixel sensors. The detector is built in a 90 nm CMOS process on a substrate of moderate resistivity. This allows charge collection by drift while maintaining the other advantages usually offered by MAPS, like having a single piece detector and using a standard CMOS production line. The collection by drift mechanism, coupled to the low capacitance design of the collecting node made possible by the monolithic approach, provides an excellent signal to noise ratio straight at the pixel cell together with a radiation tolerance far superior to conventional un-depleted MAPS. The excellent signal-to-noise performance is demonstrated by the device ability to separate the 6 keV Fe-55 double peak at room temperature. To achieve high granularity (10-20 mu m pitch pixels) over large detector areas maintaining high readout speed, a complet...

  10. SPIDR, a general-purpose readout system for pixel ASICs

    Science.gov (United States)

    van der Heijden, B.; Visser, J.; van Beuzekom, M.; Boterenbrood, H.; Kulis, S.; Munneke, B.; Schreuder, F.

    2017-02-01

    The SPIDR (Speedy PIxel Detector Readout) system is a flexible general-purpose readout platform that can be easily adapted to test and characterize new and existing detector readout ASICs. It is originally designed for the readout of pixel ASICs from the Medipix/Timepix family, but other types of ASICs or front-end circuits can be read out as well. The SPIDR system consists of an FPGA board with memory and various communication interfaces, FPGA firmware, CPU subsystem and an API library on the PC . The FPGA firmware can be adapted to read out other ASICs by re-using IP blocks. The available IP blocks include a UDP packet builder, 1 and 10 Gigabit Ethernet MAC's and a "soft core" CPU . Currently the firmware is targeted at the Xilinx VC707 development board and at a custom board called Compact-SPIDR . The firmware can easily be ported to other Xilinx 7 series and ultra scale FPGAs. The gap between an ASIC and the data acquisition back-end is bridged by the SPIDR system. Using the high pin count VITA 57 FPGA Mezzanine Card (FMC) connector only a simple chip carrier PCB is required. A 1 and a 10 Gigabit Ethernet interface handle the connection to the back-end. These can be used simultaneously for high-speed data and configuration over separate channels. In addition to the FMC connector, configurable inputs and outputs are available for synchronization with other detectors. A high resolution (≈ 27 ps bin size) Time to Digital converter is provided for time stamping events in the detector. The SPIDR system is frequently used as readout for the Medipix3 and Timepix3 ASICs. Using the 10 Gigabit Ethernet interface it is possible to read out a single chip at full bandwidth or up to 12 chips at a reduced rate. Another recent application is the test-bed for the VeloPix ASIC, which is developed for the Vertex Detector of the LHCb experiment. In this case the SPIDR system processes the 20 Gbps scrambled data stream from the VeloPix and distributes it over four 10 Gigabit

  11. Development of pixel readout integrated circuits for extreme rate and radiation

    CERN Document Server

    Garcia-Sciveres, M; CERN. Geneva. The LHC experiments Committee; LHCC

    2013-01-01

    Letter of Intent for RD Collaboration Proposal focused on development of a next generation pixel readout integrated circuits needed for high luminosity LHC detector upgrades. Brings together ATLAS and CMS pixel chip design communities.

  12. Optical Readout in a Multi-Module System Test for the ATLAS Pixel Detector

    CERN Document Server

    Flick, T; Gerlach, P; Kersten, S; Mättig, P; Kirichu, S N; Reeves, K; Richter, J; Schultes, J; Flick, Tobias; Becks, Karl-Heinz; Gerlach, Peter; Kersten, Susanne; Maettig, Peter; Kirichu, Simon Nderitu; Reeves, Kendall; Richter, Jennifer; Schultes, Joachim

    2006-01-01

    The innermost part of the ATLAS experiment at the LHC, CERN, will be a pixel detector. The command messages and the readout data of the detector are transmitted over an optical data path. The readout chain consists of many components which are produced at several locations around the world, and must work together in the pixel detector. To verify that these parts are working together as expected a system test has been built up. In this paper the system test setup and the operation of the readout chain is described. Also, some results of tests using the final pixel detector readout chain are given.

  13. ASICs in nanometer and 3D technologies for readout of hybrid pixel detectors

    Science.gov (United States)

    Maj, Piotr; Grybos, Pawel; Kmon, Piotr; Szczygiel, Robert

    2013-07-01

    Hybrid pixel detectors working in a single photon counting mode are very attractive solutions for material science and medical X-ray imaging applications. Readout electronics of these detectors has to match the geometry of pixel detectors with an area of readout channel of 100 μm × 100 μm (or even less) and very small power consumption (a few tens of μW). New solutions of readout ASICs are going into directions of better spatial resolutions, higher data throughput and more advanced functionality. We report on the design and measurement results of two pixel prototype ASICs in nanometer technology and 3D technology which offer fast signal processing, low noise performance and advanced functionality per single readout pixel cell.

  14. A near-infrared 64-pixel superconducting nanowire single photon detector array with integrated multiplexed readout

    Energy Technology Data Exchange (ETDEWEB)

    Allman, M. S., E-mail: shane.allman@boulder.nist.gov; Verma, V. B.; Stevens, M.; Gerrits, T.; Horansky, R. D.; Lita, A. E.; Mirin, R.; Nam, S. W. [National Institute of Standards and Technology, 325 Broadway, Boulder, Colorado 80305-3328 (United States); Marsili, F.; Beyer, A.; Shaw, M. D. [Jet Propulsion Laboratory, 4800 Oak Grove Dr., Pasadena, California 91109 (United States); Kumor, D. [Purdue University, 610 Purdue Mall, West Lafayette, Indiana 47907 (United States)

    2015-05-11

    We demonstrate a 64-pixel free-space-coupled array of superconducting nanowire single photon detectors optimized for high detection efficiency in the near-infrared range. An integrated, readily scalable, multiplexed readout scheme is employed to reduce the number of readout lines to 16. The cryogenic, optical, and electronic packaging to read out the array as well as characterization measurements are discussed.

  15. A Near-Infrared 64-pixel Superconducting Nanowire Single Photon Detector Array with Integrated Multiplexed Readout

    CERN Document Server

    Allman, M S; Stevens, M; Gerrits, T; Horansky, R D; Lita, A E; Marsili, F; Beyer, A; Shaw, M D; Kumor, D; Mirin, R; Nam, S W

    2015-01-01

    We demonstrate a 64-pixel free-space-coupled array of superconducting nanowire single photon detectors optimized for high detection efficiency in the near-infrared range. An integrated, readily scalable, multiplexed readout scheme is employed to reduce the number of readout lines to 16. The cryogenic, optical, and electronic packaging to read out the array, as well as characterization measurements are discussed.

  16. Development of hybrid photon detectors with integrated silicon pixel readout for the RICH counters of LHCb

    CERN Document Server

    Alemi, M; Formenti, F; Gys, Thierry; Piedigrossi, D; Puertolas, D; Rosso, E; Snoeys, W; Wyllie, Ken H

    1999-01-01

    We report on the ongoing work towards a hybrid photon detector with integrated silicon pixel readout for the ring imaging Cherenkov detectors of the LHCb experiment at the Large Hadron Collider at CERN. The photon detector is based $9 on a cross-focussed image intensifier tube geometry where the image is de-magnified by a factor of 4. The anode consists of a silicon pixel array, bump-bonded to a fast, binary readout chip with matching pixel electronics. The $9 performance of a half-scale prototype is presented, together with the developments and tests of a full-scale tube with large active area. Specific requirements for pixel front-end and readout electronics in LHCb are outlined, and $9 recent results obtained from pixel chips applicable to hybrid photon detector design are summarized.

  17. Readout electronics and test bench for the CMS Phase I pixel detector

    CERN Document Server

    Del Burgo, Riccardo

    2016-01-01

    The present CMS pixel detector will be replaced with an upgraded pixel system during the LHC extended technical stop in winter 2016/2017. The CMS Phase 1 pixel upgrade combines a new pixel readout chip, which minimizes detection inefficiencies, with several other design improvements to maintain the excellent tracking performance of CMS at the higher luminosity conditions foreseen for the coming years. The upgraded detector features new readout electronics which require detailed evaluation. For this purpose a test stand has been setup, including a slice of the CMS pixel DAQ system, all components of the upgraded readout chain together with a number of detector modules. The test stand allows for detailed evaluation and verification of all detector components, and is also crucial to develop tests and procedures to be used during the detector assembly and the commissioning and calibration of the detector. In this talk the system test and its functionalities will be described with a focus on the tests performed fo...

  18. Pixel readout ASIC for an APD based 2D X-ray hybrid pixel detector with sub-nanosecond resolution

    Energy Technology Data Exchange (ETDEWEB)

    Thil, Ch., E-mail: christophe.thil@ziti.uni-heidelberg.d [Heidelberg University, Institute of Computer Engineering, B6, 26, 68161 Mannheim (Germany); Baron, A.Q.R. [RIKEN SPring-8 Center, 1-1-1 Kouto, Sayo-cho, Sayo-gun, Hyogo 679-5148 (Japan); Fajardo, P. [ESRF, Polygone Scientifique Louis Neel, 6, rue Jules Horowitz, 38000 Grenoble (France); Fischer, P. [Heidelberg University, Institute of Computer Engineering, B6, 26, 68161 Mannheim (Germany); Graafsma, H. [DESY, Notkestrasse 85, 22607 Hamburg (Germany); Rueffer, R. [ESRF, Polygone Scientifique Louis Neel, 6, rue Jules Horowitz, 38000 Grenoble (France)

    2011-02-01

    The fast response and the short recovery time of avalanche photodiodes (APDs) in linear mode make those devices ideal for direct X-ray detection in applications requiring high time resolution or counting rate. In order to provide position sensitivity, the XNAP project aims at creating a hybrid pixel detector with nanosecond time resolution based on a monolithic APD sensor array with 32 x32 pixels covering about 1 cm{sup 2} active area. The readout is implemented in a pixelated front-end ASIC suited for the readout of such arrays, matched to pixels of 280{mu}mx280{mu}m size. Every single channel features a fast transimpedance amplifier, a discriminator with locally adjustable threshold and two counters with high dynamic range and counting speed able to accumulate X-ray hits with no readout dead time. Additionally, the detector can be operated in list mode by time-stamping every single event with sub-nanosecond resolution. In a first phase of the project, a 4x4 pixel test module is built to validate the conceptual design of the detector. The XNAP project is briefly presented and the performance of the readout ASIC is discussed.

  19. RD Collaboration Proposal: Development of pixel readout integrated circuits for extreme rate and radiation

    CERN Document Server

    Chistiansen, J (CERN)

    2013-01-01

    This proposal describes a new RD collaboration to develop the next genrration of hybrid pixel readout chips for use in ATLAS and CMS PHase 2 upgrades. extrapolation of hybrid pixel technology to the HL-LHC presents major challenges on several fronts. Challenges include: smaller pixels to resolve tracks in boosted jets, much higher hit rates (1-2 GHz/cm2 ), unprecedented radiation tolerance (10 MGy), much higher output bandwidth, and large IC format with low power consumption in order to instrument large areas while keeping the material budget low. This collaboration is specifically focused on design of hybrid pixel readout chips, and not on more general chip design or on other aspects of hybrid pixel technology. Participants include 7 institutes on ATLAS and 7 on CMS, plus 2 on both experiments.

  20. Development of pixel readout integrated circuits for extreme rate and radiation

    CERN Multimedia

    Tomasek, L; Loddo, F; Liberali, V; Rizzi, A; Re, V; Minuti, M; Pangaud, P; Barbero, M B; Pacher, L; Kluit, R; Hinchliffe, I; Giubilato, P; Faccio, F; Pernegger, H; Krueger, H; Gensolen, F D; Prydderch, M L; Bilei, G M; Da rocha rolo, M D; Fanucci, L; Grillo, A A; Bellazzini, R; Manghisoni, M; Palomo pinto, F R; Michelis, S; Huegging, F G; Kishishita, T; Marchiori, G; Christian, D C; Kaestli, H C; Meier, B; Key-charriere, M; Andreazza, A; Traversi, G; De canio, F; Linssen, L; Dannheim, D; Conti, E; Hemperek, T; Menouni, M; Fougeron, D; Genat, J; Bomben, M; Marzocca, C; Demaria, N; Mazza, G; Van bakel, N A; Palla, F; Grippo, M T; Magazzu, G; Ratti, L; Abbaneo, D; Crescioli, F; Deptuch, G W; Neue, G; De robertis, G; Passeri, D; Placidi, P; Gromov, V; Morsani, F; Bisello, D; Paccagnella, A; Christiansen, J; Dho, E; Wermes, N; Rymaszewski, P; Rozanov, A; Wang, A; Lipton, R J; Havranek, M; Neviani, A; Karagounis, M; Godiot, S; Calderini, G; Seidel, S C; Horisberger, R P; Garcia-sciveres, M A; Stabile, A; Beccherle, R; Bacchetta, N

    The present hybrid pixel detectors in operation at the LHC represent a major achievement. They deployed a new technology on an unprecedented scale and their success firmly established pixel tracking as indispensable for future HEP experiments. However, extrapolation of hybrid pixel technology to the HL-LHC presents major challenges on several fronts. We propose a new RD collaboration specifically focused on the development of pixel readout Integrated Circuits (IC). The IC challenges include: smaller pixels to resolve tracks in boosted jets, much higher hit rates (1-2 GHz/cm$^{2}$), unprecedented radiation tolerance (10 MGy), much higher output bandwidth, and large IC format with low power consumption in order to instrument large areas while keeping the material budget low. We propose a collaboration to design the next generation of hybrid pixel readout chips to enable the ATLAS and CMS Phase 2 pixel upgrades. This does not imply that ATLAS and CMS must use the same exact pixel readout chip, as most of the dev...

  1. Digital column readout architecture for the ATLAS pixel 025 mum front end IC

    CERN Document Server

    Mandelli, E; Blanquart, L; Comes, G; Denes, P; Einsweiler, Kevin F; Fischer, P; Marchesini, R; Meddeler, G; Peric, I

    2002-01-01

    A fast low noise, limited power, radiation-hard front-end chip was developed for reading out the Atlas Pixel Silicon Detector. As in the past prototypes, every chip is used to digitize and read out charge and time information from hits on each one of its 2880 inputs. The basic column readout architecture idea was adopted and modified to allow a safe transition to quarter micron technology. Each pixel cell, organized in a 160 multiplied by 18 matrix, can be independently enabled and configured in order to optimize the analog signal response and to prevent defective pixels from saturating the readout. The digital readout organizes hit data coming from each column, with respect to time, and output them on a low-level serial interface. A considerable effort was made to design state machines free of undefined states, where single-point defects and charge deposited by heavy ions in the silicon could have led to unpredicted forbidden states. 7 Refs.

  2. A Triple-GEM Detector with Pixel Readout for High-Rate Beam Tracking in COMPASS

    CERN Document Server

    Nagel, T; Haas, F; Ketzer, B; Konorov, I; Krämer, M; Mann, A; Paul, S

    2008-01-01

    For its physics program with a high-intensity hadron beam of $2 · 10^{7}$ particles/s, the COMPASS experiment at CERN requires tracking of charged particles scattered by very small angles with respect to the incident beam direction. While good resolution in time and space is mandatory, the challenge is imposed by the high beam intensity, requiring radiation-hard detectors which add very little material to the beam path in order to minimise secondary interactions. To this end, a set of triple-GEM detectors with pixel readout in the beam region and 2-D strip readout in the periphery is currently being built. The pixel size has been chosen to be 1×1 mm2, which constitutes a compromise between the spatial resolution achievable and the number of readout channels. Surrounding the pixel area, a 2-D strip readout with a pitch of 400 μm has been realised on the same printed circuit foil. In total an active area of 10 × 10 cm2 is covered using 2048 readout channels. Analogue readout by the APV25 ASIC has been chose...

  3. Readout architecture for the Pixel-Strip module of the CMS Outer Tracker Phase-2 upgrade

    CERN Document Server

    Caratelli, Alessandro; Jan Kaplon; Kloukinas, Konstantinos; Simone Scarfi

    2016-01-01

    The Outer Tracker upgrade of the Compact Muon Solenoid (CMS) experiment at CERN introduces new challenges for the front-end readout electronics. In particular, the capability of identifying particles with high transverse momentum using modules with double sensor layers requires high speed real time interconnects between readout ASICs. The Pixel-Strip module combines a pixelated silicon layer with a silicon-strip layer. Consequently, it needs two different readout ASICs, namely the Short Strip ASIC (SSA) for the strip sensor and the Macro Pixel ASIC (MPA) for the pixelated sensor. The architecture proposed in this paper allows for a total data flow between readout ASICs of $\\sim$100\\,Gbps and reduces the output data flow from 1.3\\,Tbps to 30\\,Gbps per module while limiting the total power density to below 100\\,mW/cm$^2$. In addition a system-level simulation framework of all the front-end readout ASICs is developed in order to verify the data processing algorithm and the hardware implementation allowing mult...

  4. Readout board upgrade for the Pixel Detectors: reasons, status and results in ATLAS

    CERN Document Server

    Giangiacomi, Nico; The ATLAS collaboration

    2017-01-01

    The increase of luminosity in the LHC accelerator at CERN constitutes a challenge for the data readout since the rate of data to be transmitted depends on both pileup and trigger frequency. In the ATLAS experiment, the effect of the increased luminosity is most evident in the Pixel Detector, which is the detector closest to the beam pipe. In order to face the difficult experimental challenges, the readout system was upgraded during the last few years. The main purpose of the upgrade was to provide a higher bandwidth by exploiting more recent technologies. The new readout system is composed by two paired electronic boards named Back Of Crate (BOC) and ReadOut Driver (ROD). In this work the main readout limitation related to increased luminosity will be discussed as well as the strategy and the technological solutions adopted in order to cope with the future operational challenges. In addition the general progresses and achievements will be presented.

  5. Small-Scale Readout System Prototype for the STAR PIXEL Detector

    Energy Technology Data Exchange (ETDEWEB)

    Szelezniak, Michal; Anderssen, Eric; Greiner, Leo; Matis, Howard; Ritter, Hans Georg; Stezelberger, Thorsten; Sun, Xiangming; Thomas, James; Vu, Chinh; Wieman, Howard

    2008-10-10

    Development and prototyping efforts directed towards construction of a new vertex detector for the STAR experiment at the RHIC accelerator at BNL are presented. This new detector will extend the physics range of STAR by allowing for precision measurements of yields and spectra of particles containing heavy quarks. The innermost central part of the new detector is a high resolution pixel-type detector (PIXEL). PIXEL requirements are discussed as well as a conceptual mechanical design, a sensor development path, and a detector readout architecture. Selected progress with sensor prototypes dedicated to the PIXEL detector is summarized and the approach chosen for the readout system architecture validated in tests of hardware prototypes is discussed.

  6. 3D-FBK pixel sensors with CMS readout: First test results

    Energy Technology Data Exchange (ETDEWEB)

    Obertino, M., E-mail: margherita.obertino@cern.ch [Università del Piemonte Orientale, Novara, and INFN, Torino (Italy); Solano, A. [Università di Torino and INFN, Torino (Italy); Vilela Pereira, A. [INFN, Torino (Italy); Alagoz, E. [Physics Department, Purdue University, West Lafayette, IN (United States); Andresen, J. [Colorado University, Colorado (United States); Arndt, K.; Bolla, G.; Bortoletto, D. [Physics Department, Purdue University, West Lafayette, IN (United States); Boscardin, M. [Centro per i Materiali e i Microsistemi Fondazione Bruno Kessler (FBK), Povo di Trento (Italy); Brosius, R. [SUNY, Buffalo (United States); Bubna, M. [Physics Department, Purdue University, West Lafayette, IN (United States); Dalla Betta, G.-F. [INFN Padova (Gruppo Collegato di Trento) and Università di Trento, Povo di Trento (Italy); Jensen, F. [Colorado University, Colorado (United States); Krzywda, A. [Physics Department, Purdue University, West Lafayette, IN (United States); Kumar, A. [SUNY, Buffalo (United States); Kwan, S. [Università di Milano Bicocca and INFN, Milano (Italy); Lei, C.M. [Colorado University, Colorado (United States); Menasce, D.; Moroni, L. [INFN Milano Bicocca, Milano (Italy); Ngadiuba, J. [Università di Milano Bicocca and INFN, Milano (Italy); and others

    2013-08-01

    Silicon 3D detectors consist of an array of columnar electrodes of both doping types which penetrate entirely in the detector bulk, perpendicularly to the surface. They are emerging as one of the most promising technologies for innermost layers of tracking devices for the foreseen upgrades of the LHC. Until recently, properties of 3D sensors have been investigated mostly with ATLAS readout electronics. 3D pixel sensors compatible with the CMS readout were first fabricated at SINTEF (Oslo, Norway), and more recently at FBK (Trento, Italy) and CNM (Barcelona, Spain). Several sensors with different electrode configurations, bump-bonded with the CMS pixel PSI46 readout chip, were characterized in laboratory and tested at Fermilab with a proton beam of 120 GeV/c. Preliminary results of the data analysis are presented.

  7. 18k Channels single photon counting readout circuit for hybrid pixel detector

    Science.gov (United States)

    Maj, P.; Grybos, P.; Szczygiel, R.; Zoladz, M.; Sakumura, T.; Tsuji, Y.

    2013-01-01

    We have performed measurements of an integrated circuit named PXD18k designed for hybrid pixel semiconductor detectors used in X-ray imaging applications. The PXD18k integrated circuit, fabricated in CMOS 180 nm technology, has dimensions of 9.64 mm×20 mm and contains approximately 26 million transistors. The core of the IC is a matrix of 96×192 pixels with 100 μm×100 μm pixel size. Each pixel works in a single photon counting mode. A single pixel contains two charge sensitive amplifiers with Krummenacher feedback scheme, two shapers, two discriminators (with independent thresholds A and B) and two 16-bit ripple counters. The data are read out via eight low voltage differential signaling (LVDS) outputs with 100 Mbps rate. The power consumption is dominated by analog blocks and it is about 23 μW/pixel. The effective peaking time at the discriminator input is 30 ns and is mainly determined by the time constants of the charge sensitive amplifier (CSA). The gain is equal to 42.5 μV/e- and the equivalent noise charge is 168 e- rms (with bump-bonded silicon pixel detector). Thanks to the use of trim DACs in each pixel, the effective threshold spread at the discriminator input is only 1.79 mV. The dead time of the front end electronics for a standard setting is 172 ns (paralyzable model). In the standard readout mode (when the data collection time is separated from the time necessary to readout data from the chip) the PXD18k IC works with two energy thresholds per pixel. The PXD18k can also be operated in the continuous readout mode (with a zero dead time) where one can select the number of bits readout from each pixel to optimize the PXD18k frame rate. For example, for reading out 16 bits/pixel the frame rate is 2.7 kHz and for 4 bits/pixel it rises to 7.1 kHz.

  8. 18k Channels single photon counting readout circuit for hybrid pixel detector

    Energy Technology Data Exchange (ETDEWEB)

    Maj, P., E-mail: piotr.maj@agh.edu.pl [AGH University of Science and Technology, Department of Measurements and Electronics, Al. Mickiewicza 30, 30-059 Krakow (Poland); Grybos, P.; Szczygiel, R.; Zoladz, M. [AGH University of Science and Technology, Department of Measurements and Electronics, Al. Mickiewicza 30, 30-059 Krakow (Poland); Sakumura, T.; Tsuji, Y. [X-ray Analysis Division, Rigaku Corporation, Matsubara, Akishima, Tokyo 196-8666 (Japan)

    2013-01-01

    We have performed measurements of an integrated circuit named PXD18k designed for hybrid pixel semiconductor detectors used in X-ray imaging applications. The PXD18k integrated circuit, fabricated in CMOS 180 nm technology, has dimensions of 9.64 mm Multiplication-Sign 20 mm and contains approximately 26 million transistors. The core of the IC is a matrix of 96 Multiplication-Sign 192 pixels with 100 {mu}m Multiplication-Sign 100 {mu}m pixel size. Each pixel works in a single photon counting mode. A single pixel contains two charge sensitive amplifiers with Krummenacher feedback scheme, two shapers, two discriminators (with independent thresholds A and B) and two 16-bit ripple counters. The data are read out via eight low voltage differential signaling (LVDS) outputs with 100 Mbps rate. The power consumption is dominated by analog blocks and it is about 23 {mu}W/pixel. The effective peaking time at the discriminator input is 30 ns and is mainly determined by the time constants of the charge sensitive amplifier (CSA). The gain is equal to 42.5 {mu}V/e{sup -} and the equivalent noise charge is 168 e{sup -} rms (with bump-bonded silicon pixel detector). Thanks to the use of trim DACs in each pixel, the effective threshold spread at the discriminator input is only 1.79 mV. The dead time of the front end electronics for a standard setting is 172 ns (paralyzable model). In the standard readout mode (when the data collection time is separated from the time necessary to readout data from the chip) the PXD18k IC works with two energy thresholds per pixel. The PXD18k can also be operated in the continuous readout mode (with a zero dead time) where one can select the number of bits readout from each pixel to optimize the PXD18k frame rate. For example, for reading out 16 bits/pixel the frame rate is 2.7 kHz and for 4 bits/pixel it rises to 7.1 kHz.

  9. Design and realisation of integrated circuits for the readout of pixel sensors in high-energy physics and biomedical imaging

    Energy Technology Data Exchange (ETDEWEB)

    Peric, I.

    2004-08-01

    Radiation tolerant pixel-readout chip for the ATLAS pixel detector has been designed, implemented in a deep-submicron CMOS technology and successfully tested. The chip contains readout-channels with complex analog and digital circuits. Chip for steering of the DEPFET active-pixel matrix has been implemented in a high-voltage CMOS technology. The chip contains channels which generate fast sequences of high-voltage signals. Detector containing this chip has been successfully tested. Pixel-readout test chip for an X-ray imaging pixel sensor has been designed, implemented in a CMOS technology and tested. Pixel-readout channels are able to simultaneously count the signals generated by passage of individual photons and to sum the total charge generated during exposure time. (orig.)

  10. The FE-I4 Pixel Readout Chip and the IBL Module

    CERN Document Server

    Barbero, Marlon; Backhaus, Malte; Fang, Xiaochao; Gonella, Laura; Hemperek, Tomasz; Karagounis, Michael; Krueger, Hans; Kruth, Andre; Wermes, Norbert; Breugnon, Patrick; Fougeron, Denis; Gensolen, Fabrice; Menouni, Mohsine; Rozanov, Sasha; Caminada, Lea; Dube, Sourabh; Fleury, Julien; Gnani, Dario; Garcia-Sciveres, Maurice; Jensen, Frank; Lu, Yunpeng; Mekkaoui, Abderrezak; Gromov, Vladimir; Kluit, Ruud; Schipper, Jan David; Zivkovic, Vladimir; Grosse-Knetter, Joern; Weingarten; Kocian, Martin

    2011-01-01

    FE-I4 is the new ATLAS pixel readout chip for the upgraded ATLAS pixel detector. Designed in a CMOS 130 nm feature size process, the IC is able to withstand higher radiation levels compared to the present generation of ATLAS pixel Front-End FE-I3, and can also cope with higher hit rate. It is thus suitable for intermediate radii pixel detector layers in the High Luminosity LHC environment, but also for the inserted layer at 3.3 cm known as the “Insertable B-Layer” project (IBL), at a shorter timescale. In this paper, an introduction to the FE-I4 will be given, focusing on test results from the first full size FE-I4A prototype which has been available since fall 2010. The IBL project will be introduced, with particular emphasis on the FE-I4-based module concept.

  11. The FE-I4 Pixel Readout Chip and the IBL Module

    Energy Technology Data Exchange (ETDEWEB)

    Barbero, Marlon; Arutinov, David; Backhaus, Malte; Fang, Xiao-Chao; Gonella, Laura; Hemperek, Tomasz; Karagounis, Michael; Hans, Kruger; Kruth, Andre; Wermes, Norbert; /Bonn U.; Breugnon, Patrick; Fougeron, Denis; Gensolen, Fabrice; Menouni, Mohsine; Rozanov, Alexander; /Marseille, CPPM; Beccherle, Roberto; Darbo, Giovanni; /INFN, Genoa; Caminada, Lea; Dube, Sourabh; Fleury, Julien; Gnani, Dario; /LBL, Berkeley /NIKHEF, Amsterdam /Gottingen U. /SLAC

    2012-05-01

    FE-I4 is the new ATLAS pixel readout chip for the upgraded ATLAS pixel detector. Designed in a CMOS 130 nm feature size process, the IC is able to withstand higher radiation levels compared to the present generation of ATLAS pixel Front-End FE-I3, and can also cope with higher hit rate. It is thus suitable for intermediate radii pixel detector layers in the High Luminosity LHC environment, but also for the inserted layer at 3.3 cm known as the 'Insertable B-Layer' project (IBL), at a shorter timescale. In this paper, an introduction to the FE-I4 will be given, focusing on test results from the first full size FE-I4A prototype which has been available since fall 2010. The IBL project will be introduced, with particular emphasis on the FE-I4-based module concept.

  12. Simulation of an efficiency measurement of the CMS pixel Read-Out Chip at high rates.

    CERN Document Server

    Delcourt, Martin

    2014-01-01

    My summer student project investigates the effects on the efficiency of out-of-sync events during a beam test at Fermilab on pixel detectors for the phase 1 upgrade of the CMS. While the best results of this project came from direct lab measurements, most of my work was focused on the development of a wider simulation to have a better understanding of the behaviour of the read-out chips during the beam test.

  13. A VME MXI-II Based Setup for Testing ALICE Pixel Readout Prototypes

    CERN Document Server

    Chochula, P; CERN. Geneva

    2000-01-01

    Abstract One of the possible readout scenarios for ALICE ITS pixel layers counts on in- situ zero suppression, performed by Pilot control chip. Preprocessed event will be then serialized and sent out via about 50 m long copper cable for further processing. The VME prototypes of Pilot chip and link (called "SHORTLINK") were developed in the frames of Alice collaboration. Here we describe the VME test system, developed to test the modules.

  14. Irradiation Tests of the Pixel Front-End Readout Electronics for the ALICE Experiment at LHC

    CERN Document Server

    Riggi, F; Barbera, R; Palmeri, A; Pappalardo, G S; Di Liberto, S; Meddi, F; Cavagnoli, A; Morando, M; Scarlassara, F; Segato, G F; Soramel, F; Vannucci, Luigi

    2002-01-01

    The problem of radiation damage for the electronics of the pixel detectors in the Inner Tracking System of the ALICE experiment is discussed. Simulations allowed to estimate the cumulated doses andparticle fluences during a ten year operational period. Several irradiation tests have been carried out on the various prototypes of the readout chips. The results obtained so far point out that the recent prototypes will retain their functionality up to doses and neutron fluences well above those expected in ALICE.

  15. Development of readout system for FE-I4 pixel module using SiTCP

    Science.gov (United States)

    Teoh, J. J.; Hanagaki, K.; Ikegami, Y.; Takubo, Y.; Terada, S.; Unno, Y.

    2013-12-01

    The ATLAS pixel detector will be replaced in the future High Luminosity-Large Hadron Collider (HL-LHC) upgrade to preserve or improve the detector performance at high luminosity environment. To meet the tight requirements of the upgrade, a new pixel Front-End (FE) Integrated Circuit (IC) called FE-I4 has been developed. We have then devised a readout system for the new FE IC. Our system incorporates Silicon Transmission Control Protocol (SiTCP) technology (Uchida, 2008 [1]) which utilizes the standard TCP/IP and UDP communication protocols. This technology allows direct data access and transfer between a readout hardware chain and PC via a high speed Ethernet. In addition, the communication protocols are small enough to be implemented in a single Field-Programable Gate Array (FPGA). Relying on this technology, we have been able to construct a very compact, versatile and fast readout system. We have developed a firmware and software together with the readout hardware chain. We also have established basic functionalities for reading out FE-I4.

  16. Multiplexed Readout for 1000-pixel Arrays of Microwave Kinetic Inductance Detectors

    CERN Document Server

    van Rantwijk, Joris; van Loon, Dennis; Yates, Stephen; Baryshev, Andrey; Baselmans, Jochem

    2015-01-01

    Microwave Kinetic Inductance Detectors (MKIDs) are the most attractive radiation detectors for far-infrared and sub-mm astronomy: They combine ultimate sensitivity with the possibility to create very large detector arrays, in excess of 10 000 pixels. This is possible by reading-out the arrays using RF frequency division multiplexing, which allows multiplexing ratios in excess of 1000 pixels per readout line. We describe a novel readout system for large arrays of MKIDs, operating in a 2 GHz band in the 4-8 GHz range. The readout, which is a combination of a digital front- and back-end and an analog up- and down-converter system, can read out up to 4000 detectors simultaneously with 1 kHz datarate. The system achieves a readout noise power spectral density of -98 dBc/Hz while reading 1000 carriers simultaneously, which scales linear with the number of carriers. We demonstrate that 4000 state-of-the-art Aluminium-NbTiN MKIDs can be read out without deteriorating their intrinsic performance.

  17. Radiation tolerance of prototype BTeV pixel detector readout chips

    Energy Technology Data Exchange (ETDEWEB)

    Gabriele Chiodini et al.

    2002-07-12

    High energy and nuclear physics experiments need tracking devices with increasing spatial precision and readout speed in the face of ever-higher track densities and increased radiation environments. The new generation of hybrid pixel detectors (arrays of silicon diodes bump bonded to arrays of front-end electronic cells) is the state of the art technology able to meet these challenges. We report on irradiation studies performed on BTeV pixel readout chip prototypes exposed to a 200 MeV proton beam at Indiana University Cyclotron Facility. Prototype pixel readout chip preFPIX2 has been developed at Fermilab for collider experiments and implemented in standard 0.25 micron CMOS technology following radiation tolerant design rules. The tests confirmed the radiation tolerance of the chip design to proton total dose up to 87 MRad. In addition, non destructive radiation-induced single event upsets have been observed in on-chip static registers and the single bit upset cross section has been extensively measured.

  18. Medipix3: A 64 k pixel detector readout chip working in single photon counting mode with improved spectrometric performance

    CERN Document Server

    Ballabriga, R; Wong, W; Heijne, E; Campbell, M; Llopart, X

    2011-01-01

    Medipix3 is a 256 x 256 channel hybrid pixel detector readout chip working in a single photon counting mode with a new inter-pixel architecture, which aims to improve the energy resolution in pixelated detectors by mitigating the effects of charge sharing between channels. Charges are summed in all 2 x 2 pixel clusters on the chip and a given hit is allocated locally to the pixel summing circuit with the biggest total charge on an event-by-event basis. Each pixel contains also two 12-bit binary counters with programmable depth and overflow control. The chip is configurable such that either the dimensions of each detector pixel match those of one readout pixel or detector pixels are four times greater in area than the readout pixels. In the latter case, event-by-event summing is still possible between the larger pixels. Each pixel has around 1600 transistors and the analog static power consumption is below 15 mu W in the charge summing mode and 9 mu W in the single pixel mode. The chip has been built in an 8-m...

  19. Readout board upgrade for the Pixel Detectors: reasons, status and results in ATLAS

    CERN Document Server

    Giangiacomi, Nico; The ATLAS collaboration

    2017-01-01

    At LHC the design luminosity, 1034 cm -2 s -1 , has already been reached during Summer 2016. LHC is planning, in the short term future, to further enhance the luminosity, resulting in a higher trigger frequency and an increased pileup. These factors constitute a challenge for the data readout since the rate of data to be transmitted depends on both pileup and trigger frequency. In the ATLAS experiment, the effect of the increased luminosity is most evident in the Pixel Detector, which is the detector closest to the beam pipe. In order to face the difficult experimental challenges, the readout system was upgraded during the last few years. The main purpose of the upgrade was to provide a higher bandwidth by exploiting recent technologies. The new readout system is composed by two paired electronic boards, Back Of Crate (BOC) and ReadOut Driver (ROD). In this presentation the main readout limitation related to increased luminosity will be discussed as well as the strategy and the technological solutions adopted...

  20. A 2D 4×4 Channel Readout ASIC for Pixelated CdTe Detectors for Medical Imaging Applications

    OpenAIRE

    Macias-Montero, Jose-Gabriel; Sarraj, Maher; Chmeissani, Mokhtar; Martínez, Ricardo; Puigdengoles, Carles

    2015-01-01

    We present a 16-channel readout integrated circuit (ROIC) with nanosecond-resolution time to digital converter (TDC) for pixelated Cadmium Telluride (CdTe) gamma-ray detectors. The 4 × 4 pixel array ROIC is the proof of concept of the 10 × 10 pixel array readout ASIC for positron-emission tomography (PET) scanner, positron-emission mammography (PEM) scanner, and Compton gamma camera. The electronics of each individual pixel integrates an analog front-end with switchable gain, an analog to dig...

  1. The Layer 1 / Layer 2 readout upgrade for the ATLAS Pixel Detector

    CERN Document Server

    Mullier, Geoffrey; The ATLAS collaboration

    2016-01-01

    The Pixel Detector of the ATLAS experiment has shown excellent performance during the whole Run-1 of the Large Hadron Collider (LHC). The increase of instantaneous luminosity foreseen during the LHC Run 2, will lead to an increased detector occupancy that is expected to saturate the readout links of the outermost layers of the pixel detector: Layers 1 and 2. To ensure a smooth data taking under such conditions, the read out system of the recently installed fourth innermost pixel layer, the Insertable B-Layer, was modified to accomodate the needs of the older detector. The Layer 2 upgrade installation took place during the 2015 winter shutdown, with the Layer 1 installation scheduled for 2016. A report of the successful installation, together with the design of novel dedicated optical to electrical converters and the software and firmware updates will be presented.

  2. Fast Imaging Detector Readout Circuits with In-Pixel ADCs for Fourier Transform Imaging Spectrometers

    Science.gov (United States)

    Rider, D.; Blavier, J-F.; Cunningham, T.; Hancock, B.; Key, R.; Pannell, Z.; Sander, S.; Seshadri, S.; Sun, C.; Wrigley, C.

    2011-01-01

    Focal plane arrays (FPAs) with high frame rates and many pixels benefit several upcoming Earth science missions including GEO-CAPE, GACM, and ACE by enabling broader spatial coverage and higher spectral resolution. FPAs for the PanFTS, a high spatial resolution Fourier transform spectrometer and a candidate instrument for the GEO-CAPE mission are the focus of the developments reported here, but this FPA technology has the potential to enable a variety of future measurements and instruments. The ESTO ACT Program funded the developed of a fast readout integrated circuit (ROIC) based on an innovative in-pixel analog-to-digital converter (ADC). The 128 X 128 pixel ROIC features 60 ?m pixels, a 14-bit ADC in each pixel and operates at a continuous frame rate of 14 kHz consuming only 1.1 W of power. The ROIC outputs digitized data completely eliminating the bulky, power consuming signal chains needed by conventional FPAs. The 128 X 128 pixel ROIC has been fabricated in CMOS and tested at the Jet Propulsion Laboratory. The current version is designed to be hybridized with PIN photodiode arrays via indium bump bonding for light detection in the visible and ultraviolet spectral regions. However, the ROIC design incorporates a small photodiode in each cell to permit detailed characterization of the ROICperformance without the need for hybridization. We will describe the essential features of the ROIC design and present results of ROIC performance measurements.

  3. Fast Imaging Detector Readout Circuits with In-Pixel ADCs for Fourier Transform Imaging Spectrometers

    Science.gov (United States)

    Rider, D.; Blavier, J-F.; Cunningham, T.; Hancock, B.; Key, R.; Pannell, Z.; Sander, S.; Seshadri, S.; Sun, C.; Wrigley, C.

    2011-01-01

    Focal plane arrays (FPAs) with high frame rates and many pixels benefit several upcoming Earth science missions including GEO-CAPE, GACM, and ACE by enabling broader spatial coverage and higher spectral resolution. FPAs for the PanFTS, a high spatial resolution Fourier transform spectrometer and a candidate instrument for the GEO-CAPE mission are the focus of the developments reported here, but this FPA technology has the potential to enable a variety of future measurements and instruments. The ESTO ACT Program funded the developed of a fast readout integrated circuit (ROIC) based on an innovative in-pixel analog-to-digital converter (ADC). The 128 X 128 pixel ROIC features 60 ?m pixels, a 14-bit ADC in each pixel and operates at a continuous frame rate of 14 kHz consuming only 1.1 W of power. The ROIC outputs digitized data completely eliminating the bulky, power consuming signal chains needed by conventional FPAs. The 128 X 128 pixel ROIC has been fabricated in CMOS and tested at the Jet Propulsion Laboratory. The current version is designed to be hybridized with PIN photodiode arrays via indium bump bonding for light detection in the visible and ultraviolet spectral regions. However, the ROIC design incorporates a small photodiode in each cell to permit detailed characterization of the ROICperformance without the need for hybridization. We will describe the essential features of the ROIC design and present results of ROIC performance measurements.

  4. Detailed study of the column-based priority logic readout of Topmetal-II- CMOS pixel direct charge sensor

    CERN Document Server

    An, Mangmang; Gao, Chaosong; Han, Mikyung; Huang, Guangming; Ji, Rong; Li, Xiaoting; Mei, Yuan; Pei, Hua; Sun, Quan; Sun, Xiangming; Wang, Kai; Xiao, Le; Yang, Ping; Zhang, Wei; Zhou, Wei

    2016-01-01

    We present the detailed study of the digital readout of Topmetal-II- CMOS pixel direct charge sensor. Topmetal-II- is an integrated sensor with an array of 72X72 pixels each capable of directly collecting external charge through exposed metal electrodes in the topmost metal layer. In addition to the time-shared multiplexing readout of the analog output from Charge Sensitive Amplifiers in each pixel, hits are also generated through comparators with individually DAC settable thresholds in each pixel. The hits are read out via a column-based priority logic structure, retaining both hit location and time information. The in-array column-based priority logic is fully combinational hence there is no clock distributed in the pixel array. Sequential logic and clock are placed on the peripheral of the array. We studied the detailed working behavior and performance of this readout, and demonstrated its potential in imaging applications.

  5. Design and Realisation of Integrated Circuits for the Readout of Pixel Sensors in High Energy Physics and Biomedical Imaging

    CERN Document Server

    Peric, Ivan

    2004-01-01

    Several application specific microchips (ASICs) for the readout of pixel detectors have been designed, tested and described in this thesis. The first chapter gives the detailed description of the pixel-readout chip for the ATLAS pixel detector (FEI). The chip is now in operation as the innermost electronic component of the ATLAS detector. The chip for steering of DEPFET matrix (SWITCHER) is described in the second chapter. The chip is implemented in a high-voltage CMOS technology, it generates fast high voltage signals. Finally, a novel pixel readout chip for a hybrid x-ray pixel detector based on direct conversion is introduced. The chip (CIX) has joint photon counting and integrating capability.

  6. Development and simulation results of a sparsification and readout circuit for wide pixel matrices

    Energy Technology Data Exchange (ETDEWEB)

    Gabrielli, A.; Giorgi, F. [University and INFN of Bologna (Italy); Morsani, F. [University and INFN of Pisa (Italy); Villa, M. [University and INFN of Bologna (Italy)

    2011-06-15

    In future collider experiments, the increasing luminosity and centre of mass energy are rising challenging problems in the design of new inner tracking systems. In this context we develop high-efficiency readout architectures for large binary pixel matrices that are meant to cope with the high-stressing conditions foreseen in the innermost layers of a tracker [The SuperB Conceptual Design Report, INFN/AE-07/02, SLAC-R-856, LAL 07-15, Available online at: (http://www.pi.infn.it/SuperB)]. We model and design digital readout circuits to be integrated on VLSI ASICs. These architectures can be realized with different technology processes and sensors: they can be implemented on the same silicon sensor substrate of a CMOS MAPS devices (Monolithic Active Pixel Sensor), on the CMOS tier of a hybrid pixel sensor or in a 3D chip where the digital layer is stacked on the sensor and the analog layers [V. Re et al., Nuc. Instr. and Meth. in Phys. Res. A, (doi:10.1016/j.nima.2010.05.039)]. In the presented work, we consider a data-push architecture designed for a sensor matrix of an area of about 1.3 cm{sup 2} with a pitch of 50 microns. The readout circuit tries to take great advantage of the high density of in-pixel digital logic allowed by vertical integration. We aim at sustaining a rate density of 100 Mtrack . s{sup -1} . cm{sup -2} with a temporal resolution below 1 {mu}s. We show how this architecture can cope with these stressing conditions presenting the results of Monte Carlo simulations.

  7. Development and simulation results of a sparsification and readout circuit for wide pixel matrices

    Science.gov (United States)

    Gabrielli, A.; Giorgi, F.; Morsani, F.; Villa, M.

    2011-06-01

    In future collider experiments, the increasing luminosity and centre of mass energy are rising challenging problems in the design of new inner tracking systems. In this context we develop high-efficiency readout architectures for large binary pixel matrices that are meant to cope with the high-stressing conditions foreseen in the innermost layers of a tracker [The SuperB Conceptual Design Report, INFN/AE-07/02, SLAC-R-856, LAL 07-15, Available online at: http://www.pi.infn.it/SuperB]. We model and design digital readout circuits to be integrated on VLSI ASICs. These architectures can be realized with different technology processes and sensors: they can be implemented on the same silicon sensor substrate of a CMOS MAPS devices (Monolithic Active Pixel Sensor), on the CMOS tier of a hybrid pixel sensor or in a 3D chip where the digital layer is stacked on the sensor and the analog layers [V. Re et al., Nuc. Instr. and Meth. in Phys. Res. A, doi:10.1016/j.nima.2010.05.039]. In the presented work, we consider a data-push architecture designed for a sensor matrix of an area of about 1.3 cm 2 with a pitch of 50 microns. The readout circuit tries to take great advantage of the high density of in-pixel digital logic allowed by vertical integration. We aim at sustaining a rate density of 100 Mtrack ṡ s -1 ṡ cm -2 with a temporal resolution below 1 μs. We show how this architecture can cope with these stressing conditions presenting the results of Monte Carlo simulations.

  8. The NA62 Gigatracker: Detector properties and pixel read-out architectures

    Energy Technology Data Exchange (ETDEWEB)

    Fiorini, M., E-mail: Massimiliano.Fiorini@cern.c [CERN, CH-1211 Geneva 23 (Switzerland); Carassiti, V. [INFN Sezione di Ferrara, 44100 Ferrara (Italy); Ceccucci, A. [CERN, CH-1211 Geneva 23 (Switzerland); Cortina, E. [Universite Catholique de Louvain, 1348 Louvain-la-Neuve (Belgium); Cotta Ramusino, A. [INFN Sezione di Ferrara, 44100 Ferrara (Italy); Dellacasa, G. [INFN Sezione di Torino, 10125 Torino (Italy); Jarron, P.; Kaplon, J.; Kluge, A. [CERN, CH-1211 Geneva 23 (Switzerland); Marchetto, F. [INFN Sezione di Torino, 10125 Torino (Italy); Martin, E. [Universite Catholique de Louvain, 1348 Louvain-la-Neuve (Belgium); Martoiu, S.; Mazza, G. [INFN Sezione di Torino, 10125 Torino (Italy); Noy, M. [CERN, CH-1211 Geneva 23 (Switzerland); Petrucci, F. [INFN Sezione di Ferrara, 44100 Ferrara (Italy); Riedler, P. [CERN, CH-1211 Geneva 23 (Switzerland); Rivetti, A. [INFN Sezione di Torino, 10125 Torino (Italy); Tiuraniemi, S. [CERN, CH-1211 Geneva 23 (Switzerland)

    2010-12-11

    The beam spectrometer of the NA62 experiment, named Gigatracker, has to perform single track reconstruction with unprecedented time resolution (150 ps rms) in a harsh radiation environment. To meet these requirements, and in order to reduce material budget to a minimum, three hybrid silicon pixel detector stations will be installed in vacuum. An adequate strategy to compensate for the discriminator time-walk must be implemented and R and D investigating two different options is ongoing. Two read-out chip prototypes have been designed in order to compare their performance: one approach is based on the use of a constant-fraction discriminator followed by an on-pixel TDC, while the other one is based on the use of a time-over-threshold circuit followed by a TDC shared by a group of pixels. This paper describes the Gigatracker system, presents the global architectures of both read-out ASICs and reviews the current status of the R and D project.

  9. The detection of single electrons using a Microgas gas amplification and a MediPix2 CMOS pixel readout

    NARCIS (Netherlands)

    Forniani, A.; Campbell, M.; Chefdeville, M.A.; Colas, P.; Colijn, A.P.; Graaf, van der H.; Giomataris, Y.; Heijne, E.H.M.; Kluit, P.; Llopart, X.; Schmitz, J.; Timmermans, J.; Visschers, J.L.

    2005-01-01

    By placing a Micromegas gas gain grid on top of a CMOS pixel readout circuit (MediPix2), we developed a device which acts as a pixel-segmented direct anode in gas-filled detectors. With a He/Isobutane 80/20 mixture (capable of achieving gas gain factors up to 20×103) and employing a drift length of

  10. Readout of a 176 pixel FDM system for SAFARI TES arrays

    Science.gov (United States)

    Hijmering, R. A.; den Hartog, R.; Ridder, M.; van der Linden, A. J.; van der Kuur, J.; Gao, J. R.; Jackson, B.

    2016-07-01

    In this paper we present the results of our 176-pixel prototype of the FDM readout system for SAFARI, a TES-based focal-plane instrument for the far-IR SPICA mission. We have implemented the knowledge obtained from the detailed study on electrical crosstalk reported previously. The effect of carrier leakage is reduced by a factor two, mutual impedance is reduced to below 1 nH and mutual inductance is removed. The pixels are connected in stages, one quarter of the array half of the array and the full array, to resolve intermediate technical issues. A semi-automated procedure was incorporated to find all optimal settings for all pixels. And as a final step the complete array has been connected and 132 pixels have been read out simultaneously within the frequency range of 1-3.8MHz with an average frequency separation of 16kHz. The noise was found to be detector limited and was not affected by reading out all pixels in a FDM mode. With this result the concept of using FDM for multiplexed bolometer read out for the SAFARI instrument has been demonstrated.

  11. Characterization of edgeless pixel detectors coupled to Medipix2 readout chip

    Science.gov (United States)

    Kalliopuska, Juha; Tlustos, Lukas; Eränen, Simo; Virolainen, Tuula

    2011-08-01

    VTT has developed a straightforward and fast process to fabricate four-side buttable (edgeless) microstrip and pixel detectors on 6 in. (150 mm) wafers. The process relies on advanced ion implantation to activate the edges of the detector instead of using polysilicon. The article characterizes 150 μm thick n-on-n edgeless pixel detector prototypes with a dead layer at the edge below 1 μm. Electrical and radiation response characterization of 1.4×1.4 cm2 n-on-n edgeless detectors has been done by coupling them to the Medipix2 readout chips. The distance of the detector's physical edge from the pixels was either 20 or 50 μm. The leakage current of flip-chip bonded edgeless Medipix2 detector assembles were measured to be ˜90 nA/cm2 and no breakdown was observed below 110 V. Radiation response characterization includes X-ray tube and radiation source responses. The characterization results show that the detector's response at the pixels close to the physical edge of the detector depend dramatically on the pixel-to-edge distance.

  12. Simple parallel stream to serial stream converter for Active Pixel Sensor readout

    CERN Document Server

    Kushpil, V; Szelezniak, M

    2009-01-01

    This paper describes a new electronics module for converting a parallel data flow to a serial stream in the USB 2.0 High Speed protocol. The system provides a connection between a PC USB port and a parallel interface of the DAQ board, which is used for investigation of performance of Active Pixel Sensors (APS) prototypes. The DAQ readout software supports Win XX OS and Linux OS. GUI examples have been prepared in the Lab Windows and Lab View environments. The module that was designed using virtual peripheral concept can be easily adapted for many similar tasks.

  13. Amorphous silicon pixel radiation detectors and associated thin film transistor electronics readout

    Energy Technology Data Exchange (ETDEWEB)

    Perez-Mendez, V.; Drewery, J.; Hong, W.S.; Jing, T.; Kaplan, S.N.; Lee, H.; Mireshghi, A.

    1994-10-01

    We describe the characteristics of thin (1 {mu}m) and thick (>30 {mu}m) hydrogenated amorphous silicon p-i-n diodes which are optimized for detecting and recording the spatial distribution of charged particles, x-rays and {gamma} rays. For x-ray, {gamma} ray, and charged particle detection we can use thin p-i-n photosensitive diode arrays coupled to evaporated layers of suitable scintillators. For direct detection of charged particles with high resistance to radiation damage, we use the thick p-i-n diode arrays. Deposition techniques using helium dilution, which produce samples with low stress are described. Pixel arrays for flux exposures can be readout by transistor, single diode or two diode switches. Polysilicon charge sensitive pixel amplifiers for single event detection are described. Various applications in nuclear, particle physics, x-ray medical imaging, neutron crystallography, and radionuclide chromatography are discussed.

  14. Development of radiation tolerant monolithic active pixel sensors with fast column parallel read-out

    Science.gov (United States)

    Koziel, M.; Dorokhov, A.; Fontaine, J.-C.; De Masi, R.; Winter, M.

    2010-12-01

    Monolithic active pixel sensors (MAPS) [1] (Turchetta et al., 2001) are being developed at IPHC—Strasbourg to equip the EUDET telescope [2] (Haas, 2006) and vertex detectors for future high energy physics experiments, including the STAR upgrade at RHIC [3] (T.S. Collaboration, 2005) and the CBM experiment at FAIR/GSI [4] (Heuser, 2006). High granularity, low material budget and high read-out speed are systematically required for most applications, complemented, for some of them, with high radiation tolerance. A specific column-parallel architecture, implemented in the MIMOSA-22 sensor, was developed to achieve fast read-out MAPS. Previous studies of the front-end architecture integrated in this sensor, which includes in-pixel amplification, have shown that the fixed pattern noise increase consecutive to ionizing radiation can be controlled by means of a negative feedback [5] (Hu-Guo et al., 2008). However, an unexpected rise of the temporal noise was observed. A second version of this chip (MIMOSA-22bis) was produced in order to search for possible improvements of the radiation tolerance, regarding this type of noise. In this prototype, the feedback transistor was tuned in order to mitigate the sensitivity of the pixel to ionizing radiation. The performances of the pixels after irradiation were investigated for two types of feedback transistors: enclosed layout transistor (ELT) [6] (Snoeys et al., 2000) and "standard" transistor with either large or small transconductance. The noise performance of all test structures was studied in various conditions (expected in future experiments) regarding temperature, integration time and ionizing radiation dose. Test results are presented in this paper. Based on these observations, ideas for further improvement of the radiation tolerance of column parallel MAPS are derived.

  15. Results of FE65-P2 Pixel Readout Test Chip for High Luminosity LHC Upgrades

    CERN Document Server

    AUTHOR|(SzGeCERN)394193

    2016-01-01

    A pixel readout test chip called FE65-P2 has been fabricated on 65 nm CMOS technology. FE65-P2 contains a matrix of 64 x 64 pixels on 50 micron by 50 micron pitch, designed to read out a bump bonded sensor. The goals of FE65-P2 are to demonstrate excellent analog performance isolated from digital activity well enough to achieve 500 electron stable threshold, be radiation hard to at least 500 Mrad, and prove the novel concept of isolated analog front ends embedded in a flat digital design, dubbed “analog islands in a digital sea”. Experience from FE65-P2 and hybrid assemblies will be applied to the design for a large format readout chip, called RD53A, to be produced in a wafer run in early 2017 by the RD53 collaboration. We review the case for 65 nm technology and report on threshold stability test results for the FE65-P2.

  16. A vertically integrated pixel readout device for the Vertex Detector at the International Linear Collider

    Energy Technology Data Exchange (ETDEWEB)

    Deptuch, Grzegorz; Christian, David; Hoff, James; Lipton, Ronald; Shenai, Alpana; Trimpl, Marcel; Yarema, Raymond; Zimmerman, Tom; /Fermilab

    2008-12-01

    3D-Integrated Circuit technology enables higher densities of electronic circuitry per unit area without the use of nanoscale processes. It is advantageous for mixed mode design with precise analog circuitry because processes with conservative feature sizes typically present lower process dispersions and tolerate higher power supply voltages, resulting in larger separation of a signal from the noise floor. Heterogeneous wafers (different foundries or different process families) may be combined with some 3D integration methods, leading to the optimization of each tier in the 3D stack. Tracking and vertexing in future High-Energy Physics (HEP) experiments involves construction of detectors composed of up to a few billions of channels. Readout electronics must record the position and time of each measurement with the highest achievable precision. This paper reviews a prototype of the first 3D readout chip for HEP, designed for a vertex detector at the International Linear Collider. The prototype features 20 x 20 {micro}m{sup 2} pixels, laid out in an array of 64 x 64 elements and was fabricated in a 3-tier 0.18 {micro}m Fully Depleted SOI CMOS process at MIT-Lincoln Laboratory. The tests showed correct functional operation of the structure. The chip performs a zero-suppressed readout. Successive submissions are planned in a commercial 3D bulk 0.13 {micro}m CMOS process to overcome some of the disadvantages of an FDSOI process.

  17. AC Read-Out Circuits for Single Pixel Characterization of TES Microcalorimeters and Bolometers

    Science.gov (United States)

    Gottardi, L.; van de Kuur, J.; Bandler, S.; Bruijn, M.; de Korte, P.; Gao, J. R.; den Hartog, R.; Hijmering, R. A.; Hoevers, H.; Koshropanah, P.; Kilbourne, C.; Lindemann, M. A.; Parra Borderias, M.; Ridder, M.

    2011-01-01

    SRON is developing Frequency Domain Multiplexing (FDM) for the read-out of transition edge sensor (TES) soft x-ray microcalorimeters for the XMS instrument of the International X-ray Observatory and far-infrared bolometers for the SAFARI instrument on the Japanese mission SPICA. In FDM the TESs are AC voltage biased at frequencies from 0.5 to 6 MHz in a superconducting LC resonant circuit and the signal is read-out by low noise and high dynamic range SQUIDs amplifiers. The TES works as an amplitude modulator. We report on several AC bias experiments performed on different detectors. In particular, we discuss the results on the characterization of Goddard Space Flight Center x-ray pixels and SRON bolometers. The paper focuses on the analysis of different read-out configurations developed to optimize the noise and the impedance matching between the detectors and the SQUID amplifier. A novel feedback network electronics has been developed to keep the SQUID in flux locked loop, when coupled to superconducting high Q circuits, and to optimally tune the resonant bias circuit. The achieved detector performances are discussed in view of the instrument requirement for the two space missions.

  18. Design of the low area monotonic trim DAC in 40 nm CMOS technology for pixel readout chips

    Science.gov (United States)

    Drozd, A.; Szczygiel, R.; Maj, P.; Satlawa, T.; Grybos, P.

    2014-12-01

    The recent research in hybrid pixel detectors working in single photon counting mode focuses on nanometer or 3D technologies which allow making pixels smaller and implementing more complex solutions in each of the pixels. Usually single pixel in readout electronics for X-ray detection comprises of charge amplifier, shaper and discriminator that allow classification of events occurring at the detector as true or false hits by comparing amplitude of the signal obtained with threshold voltage, which minimizes the influence of noise effects. However, making the pixel size smaller often causes problems with pixel to pixel uniformity and additional effects like charge sharing become more visible. To improve channel-to-channel uniformity or implement an algorithm for charge sharing effect minimization, small area trimming DACs working in each pixel independently are necessary. However, meeting the requirement of small area often results in poor linearity and even non-monotonicity. In this paper we present a novel low-area thermometer coded 6-bit DAC implemented in 40 nm CMOS technology. Monte Carlo simulations were performed on the described design proving that under all conditions designed DAC is inherently monotonic. Presented DAC was implemented in the prototype readout chip with 432 pixels working in single photon counting mode, with two trimming DACs in each pixel. Each DAC occupies the area of 8 μm × 18.5 μm. Measurements and chips' tests were performed to obtain reliable statistical results.

  19. Gated Geiger mode avalanche photodiode pixels with integrated readout electronics for low noise photon detection

    Science.gov (United States)

    Vilella, E.; Comerma, A.; Alonso, O.; Gascon, D.; Diéguez, A.

    2012-12-01

    Avalanche photodiodes operated in the Geiger mode offer a high intrinsic gain as well as an excellent timing accuracy. These qualities make the sensor specially suitable for those applications where detectors with high sensitivity and low timing uncertainty are required. Moreover, they are compatible with standard CMOS technologies, allowing sensor and front-end electronics integration within the pixel cell. However, the sensor suffers from high levels of intrinsic noise, which may lead to erroneous results and limit the range of detectable signals. They also increase the amount of data that has to be stored. In this work, we present a pixel based on a Geiger-mode avalanche photodiode operated in the gated mode to reduce the probability to detect noise counts interfering with photon arrival events. The readout circuit is based on a two grounds scheme to enable low reverse bias overvoltages and consequently lessen the dark count rate. Experimental characterization of the fabricated pixel with the HV-AMS 0.35 μm standard technology is also presented in this article.

  20. Gated Geiger mode avalanche photodiode pixels with integrated readout electronics for low noise photon detection

    Energy Technology Data Exchange (ETDEWEB)

    Vilella, E., E-mail: evilella@el.ub.es [Department of Electronics, University of Barcelona (UB) Marti i Franques 1, 08028 Barcelona (Spain); Comerma, A. [Department of Structure and Constituents of Matter, University of Barcelona (UB) Marti i Franques 1, 08028 Barcelona (Spain); Alonso, O. [Department of Electronics, University of Barcelona (UB) Marti i Franques 1, 08028 Barcelona (Spain); Gascon, D. [Department of Structure and Constituents of Matter, University of Barcelona (UB) Marti i Franques 1, 08028 Barcelona (Spain); Dieguez, A. [Department of Electronics, University of Barcelona (UB) Marti i Franques 1, 08028 Barcelona (Spain)

    2012-12-11

    Avalanche photodiodes operated in the Geiger mode offer a high intrinsic gain as well as an excellent timing accuracy. These qualities make the sensor specially suitable for those applications where detectors with high sensitivity and low timing uncertainty are required. Moreover, they are compatible with standard CMOS technologies, allowing sensor and front-end electronics integration within the pixel cell. However, the sensor suffers from high levels of intrinsic noise, which may lead to erroneous results and limit the range of detectable signals. They also increase the amount of data that has to be stored. In this work, we present a pixel based on a Geiger-mode avalanche photodiode operated in the gated mode to reduce the probability to detect noise counts interfering with photon arrival events. The readout circuit is based on a two grounds scheme to enable low reverse bias overvoltages and consequently lessen the dark count rate. Experimental characterization of the fabricated pixel with the HV-AMS 0.35 {mu}m standard technology is also presented in this article.

  1. Characterization of the column-based priority logic readout of Topmetal-II‑ CMOS pixel direct charge sensor

    Science.gov (United States)

    An, M.; Zhang, W.; Xiao, L.; Gao, C.; Chen, C.; Han, M.; Huang, G.; Ji, R.; Li, X.; Liu, J.; Mei, Y.; Pei, H.; Sun, Q.; Sun, X.; Wang, K.; Yang, P.; Zhou, W.

    2017-03-01

    We present the detailed study of the digital readout of Topmetal-II- CMOS pixel direct charge sensor. Topmetal-II- is an integrated sensor with an array of 72×72 pixels each capable of directly collecting external charge through exposed metal electrodes in the topmost metal layer. In addition to the time-shared multiplexing readout of the analog output from Charge Sensitive Amplifiers in each pixel, hits are also generated through comparators in each pixel with individually adjustable thresholds. The hits are read out via a column-based priority logic structure, retaining both hit location and time information. The in-array column-based priority logic features with a full clock-less circuitry hence there is no continuously running clock distributed in the pixel and matrix logic. These characteristics enable its use as the charge readout device in future Time Projection Chambers without gaseous gain mechanism, which has unique advantages in low background and low rate-density experiments. We studied the detailed working behavior and performance of this readout, and demonstrated its functional validity and potential in imaging applications.

  2. Test beam analysis of ultra-thin hybrid pixel detector assemblies with Timepix readout ASICs

    CERN Document Server

    Alipour Tehrani, Niloufar; Dannheim, Dominik; Firu, Elena; Kulis, Szymon; Redford, Sophie; Sicking, Eva

    2016-01-01

    The requirements for the vertex detector at the proposed Compact Linear Collider imply a very small material budget: less than 0.2% of a radiation length per detection layer including services and mechanical supports. We present here a study using Timepix readout ASICs hybridised to pixel sensors of 50 − 500 μm thickness, including assemblies with 100 μm thick sensors bonded to thinned 100μm thick ASICs. Sensors from three producers (Advacam, Micron Semiconductor Ltd, Canberra) with different edge termination technologies (active edge, slim edge) were bonded to Timepix ASICs. These devices were characterised with the EUDET telescope at the DESY II test beam using 5.6 GeV electrons. Their performance for the detection and tracking of minimum ionising particles was evaluated in terms of charge sharing, detection efficiency, single-point resolution and energy deposition.

  3. Study of Charge Diffusion in a Silicon Detector Using an Energy Sensitive Pixel Readout Chip

    CERN Document Server

    Schioppa, E. J.; van Beuzekom, M.; Visser, J.; Koffeman, E.; Heijne, E.; Engel, K. J.; Uher, J.

    2015-01-01

    A 300 μm thick thin p-on-n silicon sensor was connected to an energy sensitive pixel readout ASIC and exposed to a beam of highly energetic charged particles. By exploiting the spectral information and the fine segmentation of the detector, we were able to measure the evolution of the transverse profile of the charge carriers cloud in the sensor as a function of the drift distance from the point of generation. The result does not rely on model assumptions or electric field calculations. The data are also used to validate numerical simulations and to predict the detector spectral response to an X-ray fluorescence spectrum for applications in X-ray imaging.

  4. Spectroscopic measurements with the ATLAS FE-I4 pixel readout chip

    Energy Technology Data Exchange (ETDEWEB)

    Pohl, David-Leon; Janssen, Jens; Hemperek, Tomasz; Huegging, Fabian; Wermes, Norbert [Physikalisches Institut der Univeristaet Bonn (Germany)

    2015-07-01

    The ATLAS FE-I4 pixel readout chip is a large (2 x 2 cm{sup 2}) state of the art ASIC used in high energy physics experiments as well as for research and development purposes. While the FE-I4 is optimized for high hit rates it provides very limited charge resolution. Therefore two methods were developed to obtain high resolution single pixel charge spectra with the ATLAS FE-I4. The first method relies on the ability to change the detection threshold in small steps while counting hits from a particle source and has a resolution limited by electronic noise only. The other method uses a FPGA based time-to-digital-converter to digitize the analog charge signal with high precision. The feasibility, performance and challenges of these methods are discussed. First results of sensor characterizations from radioactive sources and test beams with the ATLAS FE-I4 in view of the charge collection efficiency after irradiation are presented.

  5. First operation of a hybrid photon detector prototype with electrostatic cross-focussing and integrated silicon pixel readout

    CERN Document Server

    Alemi, M; Gys, Thierry; Mikulec, B; Piedigrossi, D; Puertolas, D; Rosso, E; Schomaker, R; Snoeys, W; Wyllie, Ken H

    2000-01-01

    We report on the first operation of a hybrid photon detector prototype with integrated silicon pixel readout for the ring imaging Cherenkov detectors of the LHCb experiment. The photon detector is based on a cross-focussed image intensifier tube geometry where the image is de-magnified by a factor of 4. The anode consists of a silicon pixel array, bump-bonded to a binary readout chip with matching pixel electronics. The prototype has been characterized using a low-intensity light-emitting diode operated in pulsed mode. Its performance in terms of single-photoelectron detection efficiency and imaging properties is presented. A model of photoelectron detection is proposed, and is shown to be in good agreement with the experimental data. It includes an estimate of the charge signal generated in the silicon detector, and the combined effects of the comparator threshold spread of the pixel readout chip, charge sharing at the pixel boundaries and back-scattering of the photoelectrons at the silicon detector surface...

  6. Low-power priority Address-Encoder and Reset-Decoder data-driven readout for Monolithic Active Pixel Sensors for tracker system

    Energy Technology Data Exchange (ETDEWEB)

    Yang, P., E-mail: yangping0710@126.com [Central China Normal University, Wuhan (China); Aglieri, G.; Cavicchioli, C. [CERN, 1210 Geneva 23 (Switzerland); Chalmet, P.L. [MIND, Archamps (France); Chanlek, N. [Suranaree University of Technology, Nakhon Ratchasima (Thailand); Collu, A. [University of Cagliari, Cagliari (Italy); INFN (Italy); Gao, C. [Central China Normal University, Wuhan (China); Hillemanns, H.; Junique, A. [CERN, 1210 Geneva 23 (Switzerland); Kofarago, M. [CERN, 1210 Geneva 23 (Switzerland); University of Utrecht, Utrecht (Netherlands); Keil, M.; Kugathasan, T. [CERN, 1210 Geneva 23 (Switzerland); Kim, D. [Dongguk and Yonsei University, Seoul (Korea, Republic of); Kim, J. [Pusan National University, Busan (Korea, Republic of); Lattuca, A. [University of Torino, Torino (Italy); INFN (Italy); Marin Tobon, C.A. [CERN, 1210 Geneva 23 (Switzerland); Marras, D. [University of Cagliari, Cagliari (Italy); INFN (Italy); Mager, M.; Martinengo, P. [CERN, 1210 Geneva 23 (Switzerland); Mazza, G. [University of Torino, Torino (Italy); INFN (Italy); and others

    2015-06-11

    Active Pixel Sensors used in High Energy Particle Physics require low power consumption to reduce the detector material budget, low integration time to reduce the possibilities of pile-up and fast readout to improve the detector data capability. To satisfy these requirements, a novel Address-Encoder and Reset-Decoder (AERD) asynchronous circuit for a fast readout of a pixel matrix has been developed. The AERD data-driven readout architecture operates the address encoding and reset decoding based on an arbitration tree, and allows us to readout only the hit pixels. Compared to the traditional readout structure of the rolling shutter scheme in Monolithic Active Pixel Sensors (MAPS), AERD can achieve a low readout time and a low power consumption especially for low hit occupancies. The readout is controlled at the chip periphery with a signal synchronous with the clock, allows a good digital and analogue signal separation in the matrix and a reduction of the power consumption. The AERD circuit has been implemented in the TowerJazz 180 nm CMOS Imaging Sensor (CIS) process with full complementary CMOS logic in the pixel. It works at 10 MHz with a matrix height of 15 mm. The energy consumed to read out one pixel is around 72 pJ. A scheme to boost the readout speed to 40 MHz is also discussed. The sensor chip equipped with AERD has been produced and characterised. Test results including electrical beam measurement are presented.

  7. A 4k-Pixel CTIA Readout for Far IR Photodetector Arrays Project

    Data.gov (United States)

    National Aeronautics and Space Administration — We propose to design a low noise, two-side buttable, 64x64 readout multiplexer with the following key design features: 1- By far the largest readout array developed...

  8. M.i.p. detection performances of a 100 us read-out CMOS pixel sensor with digitised outputs

    CERN Document Server

    Winter, Marc; Besson, Auguste; Colledani, Claude; Degerli, Yavuz; De Masi, Rita; Dorokhov, Andrei; Doziere, Guy; Dulinski, Wojciech; Gelin, Marie; Guilloux, Fabrice; Himmi, Abdelkader; Hu-Guo, Christine; Morel, Frederic; Orsini, Fabienne; Valin, Isabelle; Voutsinas, Georgios

    2009-01-01

    Swift, high resolution CMOS pixel sensors are being developed for the ILC vertex detector, aiming to allow approaching the interaction point very closely. A major issue is the time resolution of the sensors needed to deal with the high occupancy generated by the beam related background. A 128x576 pixel sensor providing digitised outputs at a read-out time of 92.5 us, was fabricated in 2008 within the EU project EUDET, and tested with charged particles at the CERN-SPS. Its prominent performances in terms of noise, detection efficiency versus fake hit rate, spatial resolution and radiation tolerance are overviewed. They validate the sensor architecture.

  9. Study of multi-pixel Geiger-mode avalanche photodiodes as a read-out for PET

    CERN Document Server

    Musienko, Yuri; Lecoq, Paul; Reucroft, Stephen; Swain, John; Trummer, Julia

    2007-01-01

    We have studied the performance of two multi-pixel Geiger-mode APDs (recently developed by the Centre of Perspective Technologies and Apparatus (CPTA) in Moscow) with 1×1 mm2 and 3×3 mm2 sensitive area as a readout for LSO and LYSO scintillator crystals. Energy and timing spectra were measured using a 22Na γ-source. The results of this study allow us to conclude that this photodetector is a very promising candidate for PET applications.

  10. Development of a low noise integrated readout electronic for pixel detectors in CMOS technology for a Compton camera

    OpenAIRE

    Hausmann, Joachim

    2006-01-01

    Semiconductor detectors are very popular, particularly for their good energy resolution and their easy handling. Combined with a two dimensional spatial resolution such a detector is predestined to realise an active collimation in a Compton camera for medical applications. To measure the deposited energy in each channel (pixel), a self-triggering integrated electronic has been developed, which is directly bonded on top of the detector. The design of the low noise readout ele...

  11. A low power cryogenic 512 × 512-pixel infrared readout integrated circuit with modified MOS device model

    Science.gov (United States)

    Zhao, Hongliang; Liu, Xinghui; Xu, Chao

    2013-11-01

    A low power cryogenic readout integrated circuit (ROIC) for 512 × 512-pixel infrared focal plane array (IRFPA) image system, is presented. In order to improve the precision of the circuit simulation at cryogenic temperatures, a modified MOS device model is proposed. The model is based on BSIM3 model, and uses correction parameters to describe carrier freeze-out effect at low temperatures to improve the fitting accuracy for low temperature MOS device simulation. A capacitive trans-impedance amplifier (CTIA) with inherent correlated double sampling (CDS) configuration is employed to realize a high performance readout interfacing circuit in a pixel area of 30 × 30 μm2. Optimized column readout timing and structure are applied to reduce the power consumption. The experimental chip fabricated by a standard 0.35 μm 2P4M CMOS process shows more than 10 MHz readout rate with less than 70 mW power consumption under 3.3 V supply voltage at 77-150 K operated temperatures. And it occupies an area of 18 × 17 mm2.

  12. Development and characterization of diamond and 3D-silicon pixel detectors with ATLAS-pixel readout electronics

    Energy Technology Data Exchange (ETDEWEB)

    Mathes, Markus

    2008-12-15

    Hybrid pixel detectors are used for particle tracking in the innermost layers of current high energy experiments like ATLAS. After the proposed luminosity upgrade of the LHC, they will have to survive very high radiation fluences of up to 10{sup 16} particles per cm{sup 2} per life time. New sensor concepts and materials are required, which promise to be more radiation tolerant than the currently used planar silicon sensors. Most prominent candidates are so-called 3D-silicon and single crystal or poly-crystalline diamond sensors. Using the ATLAS pixel electronics different detector prototypes with a pixel geometry of 400 x 50 {mu}m{sup 2} have been built. In particular three devices have been studied in detail: a 3D-silicon and a single crystal diamond detector with an active area of about 1 cm{sup 2} and a poly-crystalline diamond detector of the same size as a current ATLAS pixel detector module (2 x 6 cm{sup 2}). To characterize the devices regarding their particle detection efficiency and spatial resolution, the charge collection inside a pixel cell as well as the charge sharing between adjacent pixels was studied using a high energy particle beam. (orig.)

  13. Background and muon counting rates in underground muon measurements with a plastic scintillator counter based on a wavelength shifting fibre and a multi-pixel avalanche photodiode readout

    National Research Council Canada - National Science Library

    Volchenko, Vladimir I; Akhrameev, Evgeniy V; Bezrukov, Leonid B; Dzaparova, Irina M; Davitashvili, Irakliy Sh; Enqvist, Timo; Fynbo, Hans; Guliev, Zhamal Sh; Inzhechik, Lev V; Izmaylov, Alexander O; Joutsenvaara, Jari; Khabibullin, Marat M; Khotjantsev, Alexey N; Kudenko, Yuri G; Kuusiniemi, Pasi; Lubsandorzhiev, Bayarto K; Lubsandorzhiev, Nima B; Mineev, Oleg V; Olanterä, Lauri; Petkov, Valeriy B; Poleshuk, Roman V; Räihä, Tomi; Shaibonov, Bator A. M; Sarkamo, Juho; Shaykhiev, Alexey T; Trzaska, Wladyslaw; Volchenko, Galina V; Yanin, Alexey F; Yershov, Nikolay V

    2010-01-01

    ...×3.0 cm3 size scintillator counter with a wavelength shifting fibre and a multi-pixel Geiger mode avalanche photodiode readout in the Baksan underground laboratory at a depth of 200 metres of water equivalent...

  14. Design of a current based readout chip and development of a DEPFET pixel prototype system for the ILC vertex detector

    Energy Technology Data Exchange (ETDEWEB)

    Trimpl, M.

    2005-12-15

    The future TeV-scale linear collider ILC (International Linear Collider) offers a large variety of precision measurements complementary to the discovery potential of the LHC (Large Hadron Collider). To fully exploit its physics potential, a vertex detector with unprecedented performance is needed. One proposed technology for the ILC vertex detector is the DEPFET active pixel sensor. The DEPFET sensor offers particle detection with in-pixel amplification by incorporating a field effect transistor into a fully depleted high-ohmic silicon substrate. The device provides an excellent signal-to-noise ratio and a good spatial resolution at the same time. To establish a very fast readout of a DEPFET pixel matrix with row rates of 20 MHz and more, the 128 channel CURO II ASIC has been designed and fabricated. The architecture of the chip is completely based on current mode techniques (SI) perfectly adapted to the current signal of the sensor. For the ILC vertex detector a prototype system with a 64 x 128 DEPFET pixel matrix read out by the CURO II chip has been developed. The design issues and the standalone performance of the readout chip as well as first results with the prototype system will be presented. (orig.)

  15. A pixel read-out architecture implementing a two-stage token ring, zero suppression and compression

    Energy Technology Data Exchange (ETDEWEB)

    Heuvelmans, S; Boerrigter, M, E-mail: sander.heuvelmans@bruco.nl [Bruco integrated circuits BV, Oostermaat 2, 7623 CS (Netherlands)

    2011-01-15

    Increasing luminosity in high energy physics experiments leads to new challenges in the design of data acquisition systems for pixel detectors. With the upgrade of the LHCb experiment, the data processing will be changed; hit data from every collision will be transported off the pixel chip, without any trigger selection. A read-out architecture is proposed which is able to obtain low hit data loss on limited silicon area by using the logic beneath the pixels as a data buffer. Zero suppression and redundancy reduction ensure that the data rate off chip is minimized. A C++ model has been created for simulation of functionality and data loss, and for system development. A VHDL implementation has been derived from this model.

  16. A prototype of a new generation readout ASIC in 65nm CMOS for pixel detectors at HL-LHC

    Science.gov (United States)

    Monteil, E.; Pacher, L.; Paternò, A.; Loddo, F.; Demaria, N.; Gaioni, L.; De Canio, F.; Traversi, G.; Re, V.; Ratti, L.; Rivetti, A.; Da Rocha Rolo, M.; Dellacasa, G.; Mazza, G.; Marzocca, C.; Licciulli, F.; Ciciriello, F.; Marconi, S.; Placidi, P.; Magazzù, G.; Stabile, A.; Mattiazzo, S.; Veri, C.

    2016-12-01

    This paper describes a readout ASIC prototype designed by CHIPIX65 project, part of RD53, for a pixel detector at HL-LHC . A 64 × 64 matrix of 50 × 50 μ m2 pixels is realised. A digital architecture has been developed, with particle efficiency above 99.9% at 3 GHz/cm2 pixel rate, 1 MHz trigger rate with 12.5 μ s latency. Two analog front end designs, one synchronous and one asynchronous, are implemented. Charge is measured with 5-bit precision and the analog dead-time is below 1%. IP-blocks (DAC, ADC, BandGap, SER, sLVS-TX/RX) and very front ends are silicon proven, irradiated to 600-800Mrad.

  17. A prototype of pixel readout ASIC in 65 nm CMOS technology for extreme hit rate detectors at HL-LHC

    Science.gov (United States)

    Paternò, A.; Pacher, L.; Monteil, E.; Loddo, F.; Demaria, N.; Gaioni, L.; De Canio, F.; Traversi, G.; Re, V.; Ratti, L.; Rivetti, A.; Da Rocha Rolo, M.; Dellacasa, G.; Mazza, G.; Marzocca, C.; Licciulli, F.; Ciciriello, F.; Marconi, S.; Placidi, P.; Magazzù, G.; Stabile, A.; Mattiazzo, S.; Veri, C.

    2017-02-01

    This paper describes a readout ASIC prototype designed by the CHIPIX65 project, part of RD53, for a pixel detector at HL-LHC . A 64×64 matrix of 50×50μm2 pixels is realised. A digital architecture has been developed, with particle efficiency above 99.5% at 3 GHz/cm2 pixel rate, trigger frequency of 1 MHz and 12.5μsec latency. Two analog front end designs, one synchronous and one asynchronous, are implemented. Charge is measured with 5-bit precision, analog dead-time below 1%. The chip integrates for the first time many of the components developed by the collaboration in the past, including the Digital-to-Analog converters, Bandgap reference, Serializer, sLVS drivers, and analog Front Ends. Irradiation tests on these components proved their reliability up to 600 Mrad.

  18. First functionality tests of a 64 × 64 pixel DSSC sensor module connected to the complete ladder readout

    Science.gov (United States)

    Donato, M.; Hansen, K.; Kalavakuru, P.; Kirchgessner, M.; Kuster, M.; Porro, M.; Reckleben, C.; Turcato, M.

    2017-03-01

    The European X-ray Free Electron Laser (XFEL.EU) will provide every 0.1 s a train of 2700 spatially coherent ultrashort X-ray pulses at 4.5 MHz repetition rate. The Small Quantum Systems (SQS) instrument and the Spectroscopy and Coherent Scattering instrument (SCS) operate with soft X-rays between 0.5 keV-6 keV. The DEPFET Sensor with Signal Compression (DSSC) detector is being developed to meet the requirements set by these two XFEL.EU instruments. The DSSC imager is a 1 mega-pixel camera able to store up to 800 single-pulse images per train. The so-called ladder is the basic unit of the DSSC detector. It is the single unit out of sixteen identical-units composing the DSSC-megapixel camera, containing all representative electronic components of the full-size system and allows testing the full electronic chain. Each DSSC ladder has a focal plane sensor with 128× 512 pixels. The read-out ASIC provides full-parallel readout of the sensor pixels. Every read-out channel contains an amplifier and an analog filter, an up-to 9 bit ADC and the digital memory. The ASIC amplifier have a double front-end to allow one to use either DEPFET sensors or Mini-SDD sensors. In the first case, the signal compression is a characteristic intrinsic of the sensor; in the second case, the compression is implemented at the first amplification stage. The goal of signal compression is to meet the requirement of single-photon detection capability and wide dynamic range. We present the first results of measurements obtained using a 64× 64 pixel DEPFET sensor attached to the full final electronic and data-acquisition chain.

  19. IRRADIATION MEASUREMENTS ON THE 0.25 micro m CMOS PIXEL READOUT TEST CHIP BY A 14 MEV NEUTRON FACILITY

    CERN Document Server

    Barbera, R; CERN. Geneva; Palmeri, A; Pappalardo, G S; Riggi, F; Di Liberto, S; Meddi, F; Sestito, S; Loi, D; Angelone, M; Badalà, A; Pillon, M

    2000-01-01

    ALICE-ITS-2000-24   Abstract   A test facility station with 14 MeV neutrons was arranged at the FNG-ENEA Laboratory in Frascati (Italy) for the characterization with respect to radiation tolerance of the prototype pixel readout chips in 0.25 m m IBM technology done in edgeless design. This facility could allow to test both the readout chips and the pilot chips for the pixel readout system. In fact, both ASICs will have to survive at the same radiation level foreseen for the innermost layer (r = 4 cm) of the Inner Tracker System (ITS) in the LHC-ALICE experiment. Two test chips were exposed to an overall flux of 1.3 x 1012 14 MeV neutrons/cm2, which is larger than the expected neutron flux in ALICE during 10 years data taking. No variation in the parameters defining the chip functionality (analog and digital currents, linearity, shapes of the signal, efficiency) was observed.

  20. Performance and description of the upgraded readout with the new back-end electronics for the ATLAS Pixel detector

    CERN Document Server

    Yajima, Kazuki; The ATLAS collaboration

    2017-01-01

    LHC increased drastically its performance during the RUN2 data taking, starting from a peak instantaneous luminosity of up to $5\\times10^{33} \\mathrm{cm}^{-2} \\mathrm{s}^{-1}$ in 2015 to conclude with the record value of $1.4\\times10^{34} \\mathrm{cm}^{-2} \\mathrm{s}^{-1}$ in November 2016. The concurrent increase of the trigger rate and event size forced the ATLAS experiment to exploit its sub-detectors to the maximum, approaching and possibly overcoming the design parameters. The ATLAS Pixel data acquisition system was upgraded to avoid possible bandwidth limitations. Two upgrades of the read-out electronics have been done. The first one during 2015/16 YETS, when the outermost pixel layer (Layer-2) was upgraded and its bandwidth was doubled. This upgrade partly contributed to maintain the data taking efficiency of the Pixel detector at a relatively high level ($\\sim$99%) during the 2016 run. A similar upgrade of the read-out system for the middle layer (Layer-1) is ongoing during 2016/17 EYETS. The details o...

  1. A compact 64-pixel CsI(T1)/Si PIN photodiode imaging module with IC readout

    Energy Technology Data Exchange (ETDEWEB)

    Gruber, Gregory J.; Choong, Woon-Seng; Moses, William W.; Derenzo, Stephen E.; Holland, Stephen E.; Pedrali-Noy, Marzio; Krieger, Brad; Mandelli, Emanuele; Meddeler, Gerrit; Wang, Nadine W.

    2001-08-09

    We characterize the performance of a complete 64-pixel compact gamma camera imaging module consisting of optically isolated 3 mm 3 mm 5 mm CsI(Tl) crystals coupled to a custom array of low-noise Si PIN photodiodes read out by a custom IC. At 50 V bias the custom 64-pixel photodiode arrays demonstrate an average leakage current of 28 pA per 3 mm 3 mm pixel, a 98.5 percent yield of pixels with <100 pA leakage, and a quantum efficiency of about 80 percent for 540 nm CsI(Tl) scintillation photons. The custom 64-channel readout IC uses low-noise preamplifiers, shaper amplifiers, and a winner-take-all (WTA) multiplexer. The IC demonstrates maximum gain of 120 mV / 1000 e-, the ability to select the largest input signal in less than 150 ns, and low electronic noise at 8 ms peaking time ranging from 25 e- rms (unloaded) to an estimated 180 e- rms (photodiode load of 3 pF, 50 pA). At room temperature a complete 64-pixel detector module employing a custom photodiode array and readout IC demonstrates an average energy resolution of 23.4 percent fwhm and an intrinsic spatial resolution of 3.3 mm fwhm for the 140 keV emissions of 99mTc. Construction of an array of such imaging modules is straightforward, hence this technology shows strong potential for numerous compact gamma camera applications, including scintimammography.

  2. Development and characterization of high-resolution neutron pixel detectors based on Timepix read-out chips

    Science.gov (United States)

    Krejci, F.; Zemlicka, J.; Jakubek, J.; Dudak, J.; Vavrik, D.; Köster, U.; Atkins, D.; Kaestner, A.; Soltes, J.; Viererbl, L.; Vacik, J.; Tomandl, I.

    2016-12-01

    Using a suitable isotope such as 6Li and 10B semiconductor hybrid pixel detectors can be successfully adapted for position sensitive detection of thermal and cold neutrons via conversion into energetic light ions. The adapted devices then typically provides spatial resolution at the level comparable to the pixel pitch (55 μm) and sensitive area of about few cm2. In this contribution, we describe further progress in neutron imaging performance based on the development of a large-area hybrid pixel detector providing practically continuous neutron sensitive area of 71 × 57 mm2. The measurements characterising the detector performance at the cold neutron imaging instrument ICON at PSI and high-flux imaging beam-line Neutrograph at ILL are presented. At both facilities, high-resolution high-contrast neutron radiography with the newly developed detector has been successfully applied for objects which imaging were previously difficult with hybrid pixel technology (such as various composite materials, objects of cultural heritage etc.). Further, a significant improvement in the spatial resolution of neutron radiography with hybrid semiconductor pixel detector based on the fast read-out Timepix-based detector is presented. The system is equipped with a thin planar 6LiF convertor operated effectively in the event-by-event mode enabling position sensitive detection with spatial resolution better than 10 μm.

  3. A 4k-Pixel CTIA Readout for Far IR Photodetector Arrays Project

    Data.gov (United States)

    National Aeronautics and Space Administration — We propose to investigate the feasibility of developing a low noise, two-side buttable, 64x64 readout multiplexer with the following key design features: 1- By far...

  4. Toward VIP-PIX: A Low Noise Readout ASIC for Pixelated CdTe Gamma-Ray Detectors for Use in the Next Generation of PET Scanners

    OpenAIRE

    Macias-Montero, Jose-Gabriel; Sarraj, Maher; Chmeissani, Mokhtar; Puigdengoles, Carles; Lorenzo, Gianluca De; Martínez, Ricardo

    2013-01-01

    VIP-PIX will be a low noise and low power pixel readout electronics with digital output for pixelated Cadmium Telluride (CdTe) detectors. The proposed pixel will be part of a 2D pixel-array detector for various types of nuclear medicine imaging devices such as positron-emission tomography (PET) scanners, Compton gamma cameras, and positron-emission mammography (PEM) scanners. Each pixel will include a SAR ADC that provides the energy deposited with 10-bit resolution. Simultaneously, the self-...

  5. The ToPiX v4 prototype for the triggerless readout of the PANDA silicon pixel detector

    Science.gov (United States)

    Mazza, G.; Calvo, D.; De Remigis, P.; Mignone, M.; Olave, J.; Rivetti, A.; Wheadon, R.; Zotti, L.

    2015-01-01

    ToPiX v4 is the prototype for the readout of the silicon pixel sensors for the Micro Vertex Detector of the PANDA experiment. ToPiX provides position, time and energy measurement of the incoming particles and is designed for the triggerless environment foreseen in PANDA. The prototype includes 640 pixels with a size of 100 × 100 μm2, a 160 MHz time stamp distribution circuit to measure both particle arrival time and released energy (via ToT technique) and the full control logic. The ASIC is designed in a 0.13 μm CMOS technology with SEU protection techniques for the digital parts.

  6. The TDCpix readout ASIC: A 75 ps resolution timing front-end for the NA62 Gigatracker hybrid pixel detector

    Energy Technology Data Exchange (ETDEWEB)

    Kluge, A., E-mail: alexander.kluge@cern.ch; Aglieri Rinella, G.; Bonacini, S.; Jarron, P.; Kaplon, J.; Morel, M.; Noy, M.; Perktold, L.; Poltorak, K.

    2013-12-21

    The TDCpix is a novel pixel readout ASIC for the NA62 Gigatracker detector. NA62 is a new experiment being installed at the CERN Super Proton Synchrotron. Its Gigatracker detector shall provide on-beam tracking and time stamping of individual particles with a time resolution of 150 ps rms. It will consist of three tracking stations, each with one hybrid pixel sensor. The peak flow of particles crossing the detector modules reaches 1.27 MHz/mm{sup 2} for a total rate of about 0.75 GHz. Ten TDCpix chips will be bump-bonded to every silicon pixel sensor. Each chip shall perform time stamping of 100 M particle hits per second with a detection efficiency above 99% and a timing accuracy better than 200 ps rms for an overall three-station-setup time resolution of better than 150 ps. The TDCpix chip has been designed in a 130 nm CMOS technology. It will feature 45×40 square pixels of 300×300μm{sup 2} and a complex End of Column peripheral region including an array of TDCs based on DLLs, four high speed serializers, a low-jitter PLL, readout and control circuits. This contribution will describe the complete design of the final TDCpix ASIC. It will discuss design choices, the challenges faced and some of the lessons learned. Furthermore, experimental results from the testing of circuit prototypes will be presented. These demonstrate the achievement of key performance figures such as a time resolution of the processing chain of 75 ps rms with a laser sent to the center of the pixel and the capability of time stamping charged particles with an overall resolution below 200 ps rms. -- Highlights: • Feasibility demonstration of a silicon pixel detector with sub-ns time tagging capability. • Demonstrator detector assembly with a time resolution of 75 ps RMS with laser charge injection; 170 ps RMS with particle beam. • Design of trigger-less TDCpix ASIC with 1800 pixels, 720 TDC channels and 4 3.2 Gbit/s serializers.

  7. The TDCpix readout ASIC: A 75ps resolution timing front-end for the NA62 Gigatracker hybrid pixel detector

    CERN Document Server

    Kluge, A; Bonacini, S; Jarron, P; Kaplon, J; Morel, M; Noy, M; Perktold, L; Poltorak, K

    2013-01-01

    The TDCpix is a novel pixel readout ASIC for the NA62 Gigatracker detector. NA62 is a new experiment being installed at the CERN Super Proton Synchrotron. Its Gigatracker detector shall provide on-beam tracking and time stamping of individual particles with a time resolution of 150 ps rms. It will consist of three tracking stations, each with one hybrid pixel sensor. The peak fl ow of particles crossing the detector modules reaches 1.27 MHz/mm 2 for a total rate of about 0.75 GHz. Ten TDCpix chips will be bump-bonded to every silicon pixel sensor. Each chip shall perform time stamping of 100 M particle hits per second with a detection ef fi ciency above 99% and a timing accuracy better than 200 ps rms for an overall three-station-setup time resolution of better than 150 ps. The TDCpix chip has been designed in a 130 nm CMOS technology. It will feature 45 40 square pixels of 300 300 μ m 2 and a complex End of Column peripheral region including an array of TDCs based on DLLs, four high speed serializers, a low...

  8. CMS pixel module readout optimization and study of the Β⁰ lifetime in the semileptonic decay mode

    CERN Document Server

    Dambach, Sarah; Langenegger, Urs; Horisberger, Roland

    2009-01-01

    After more than twenty years of development, the CERN Large Hadron Collider will start continuously operating in mid 2009. An enormous amount of high energy collisions will take place inside the CMS experiment. The innermost detector of this experiment is the barrel pixel detector, with its main goals of track and vertex reconstruction. To do this reconstruction with a high precision, the charge produced inside the silicon sensor is read out as an analog signal. In the first part of this work, the analog readout chain is optimized by setting digital-to-analog converters on the readout chip. Procedures are developed to apply this optimization on more than 10’000 readout chips for the entire detector. The optimization is verified by comparing all optimized chips and with a simulation studying the hit resolution inside the detector. In the second part of this work the lifetime measurement of the B0 meson is studied in the semileptonic decay mode using a new reconstruction method for the undetected neutrino app...

  9. The charge pump PLL clock generator designed for the 1.56 ns bin size time-to-digital converter pixel array of the Timepix3 readout ASIC

    CERN Document Server

    Fu, Y et al.

    2014-01-01

    Timepix3 is a newly developed pixel readout chip which is expected to be operated in a wide range of gaseous and silicon detectors. It is made of 256×256 pixels organized in a square pixel-array with 55 µm pitch. Oscillators running at 640 MHz are distributed across the pixel-array and allow for a highly accurate measurement of the arrival time of a hit. This paper concentrates on a low-jitter phase locked loop (PLL) that is located in the chip periphery. This PLL provides a control voltage which regulates the actual frequency of the individual oscillators, allowing for compensation of process, voltage, and temperature variations.

  10. The RD53 Collaboration's SystemVerilog-UVM Simulation Framework and its General Applicability to Design of Advanced Pixel Readout Chips

    CERN Document Server

    Marconi, S; Placidi, Pisana; Christiansen, Jorgen; Hemperek, Tomasz

    2014-01-01

    The foreseen Phase 2 pixel upgrades at the LHC have very challenging requirements for the design of hybrid pixel readout chips. A versatile pixel simulation platform is as an essential development tool for the design, verification and optimization of both the system architecture and the pixel chip building blocks (Intellectual Properties, IPs). This work is focused on the implemented simulation and verification environment named VEPIX53, built using the SystemVerilog language and the Universal Verification Methodology (UVM) class library in the framework of the RD53 Collaboration. The environment supports pixel chips at different levels of description: its reusable components feature the generation of different classes of parameterized input hits to the pixel matrix, monitoring of pixel chip inputs and outputs, conformity checks between predicted and actual outputs and collection of statistics on system performance. The environment has been tested performing a study of shared architectures of the trigger late...

  11. A 65 nm pixel readout ASIC with quick transverse momentum discrimination capabilities for the CMS Tracker at HL-LHC

    Science.gov (United States)

    Ceresa, D.; Kaplon, J.; Francisco, R.; Caratelli, A.; Kloukinas, K.; Marchioro, A.

    2016-01-01

    A readout ASIC for the hybrid pixel detector with the capability of performing quick recognition of particles with high transverse momentum has been designed for the requirements of the CMS Outer Tracker at the High Luminosity LHC . The particle momentum dicrimination capability represents the main challenge for this design together with the low power requirement: the constraint of low mass for the new tracker dictates a total power budget of less than 100 mW/cm2. The choice of a 65 nm CMOS technology has made it possible to satisfy this power requirement despite the fairly large amount of logic necessary to perform the momentum discrimination and the continuous operation at 40 MHz. Several techniques for low power have been used to implement this logic that performs cluster reduction, position offset correction and coordinate encoding. A prototype chip including a large part of the final functionality and the full front-end has been realized and comprises a matrix of 16 by 3 rectangular pixels of 100 μm × 1446 μm, providing 7.65 mm2 of segmented active area. Measurements of the analog front-end characteristics closely match the simulations and confirm the consumption of < 30 μA per pixel. Front-end characterization and irradiation results up to 150 MRad are also reported.

  12. Comparison of three resistor network division circuits for the readout of 4×4 pixel SiPM arrays

    Energy Technology Data Exchange (ETDEWEB)

    Stratos, David [Department of Medical Instruments Technology, Technological Educational Institute of Athens (Greece); Maria, Georgiou [Department of Medical Instruments Technology, Technological Educational Institute of Athens (Greece); Department of Nuclear Medicine, Medical School, University of Thessaly (Greece); Eleftherios, Fysikopoulos [Department of Medical Instruments Technology, Technological Educational Institute of Athens (Greece); School of Electrical and Computer Engineering, National Technical University of Athens, Athens (Greece); George, Loudos, E-mail: gloudos@teiath.gr [Department of Medical Instruments Technology, Technological Educational Institute of Athens (Greece)

    2013-02-21

    The purpose of this study is to investigate the behavior of a flexible SensL's silicon photomultiplier array (SPMArray4) photodetector for possible applications in PET imaging. We have designed and evaluated three different resistor network division circuits to read out the signal outputs of a 4×4 pixel SiPM array. We have applied firstly (i) a symmetric resistive voltage division circuit, secondly (ii) a symmetric resistive charge division circuit and thirdly (iii) a charge division multiplexing resistor network reducing the 16 pixel outputs to 4 position signals. In the first circuit the SensL SPMArray4-A0 preamplification electronics and a SPMArray4-A1 evaluation board providing the 16 pixels voltage outputs were used, before the symmetric resistive voltage network. We reduced the 16 voltage signals firstly to 4X and 4Y coordinate signals. Then those signals were further reduced to 2X and 2Y position signals connected via a resistor network. In the second readout circuit we have used the same technique but without the preamplification stage. The third circuit is based on a discretized positioning circuit, which multiplexes the 16 signals from the SiPM array to 4 position signals. The 4 position signals (Xa, Xb, Yc and Yd) were digitized using a free running sampling technique. An FPGA (Spartan 6 LX16) was used for triggering and signal processing of the pulses. We acquired raw images and energy histograms of a BGO and a CsI:Na pixilated scintillator under {sup 22}Na excitation. A clear visualization of the discrete 2×2×5 mm{sup 3} pixilated BGO scintillator elements as well as the 1×1×5 mm{sup 3} pixilated CsI:Na crystal array was achieved with all applied readout circuits. The symmetric resistive charge division circuit provides higher peak to valley ratio than the other readout circuits. Τhe sensitivity and the energy resolution remained almost constant for the three circuits.

  13. Pixel Read-Out Architectures for the NA62 GigaTracker

    CERN Document Server

    Dellacasa, G

    2008-01-01

    Beam particles in NA62 experiment are measured with a Si-pixel sensor having a size of 300 μm x 300 μm and a time resolution of 150 ps (rms). To meet the timing requirement an adequate strategy to compensate the discriminator time-walk must be implemented and an R&D effort investigating two different options is ongoing. In this presentation we describe the two different approaches. One is based on the use of a constant-fraction discriminator followed by an on-pixel TDC. The other one is based on the use of a Time-over-Threshold circuit followed by a TDC shared by a group of pixels. The global architectures of both the front-end ASIC will be discussed.

  14. Scintillator counters with multi-pixel avalanche photodiode readout for the ND280 detector of the T2K experiment

    Energy Technology Data Exchange (ETDEWEB)

    Mineev, O. [Institute for Nuclear Research of RAS, INR RAS, 60th October Revolution Pr. 7a, 117312 Moscow (Russian Federation)]. E-mail: oleg@inr.ru; Afanasjev, A. [Institute for Nuclear Research of RAS, INR RAS, 60th October Revolution Pr. 7a, 117312 Moscow (Russian Federation); Bondarenko, G.; Golovin, V. [Center of Perspective Technology and Apparatus, 107076 Moscow (Russian Federation); Gushchin, E.; Izmailov, A.; Khabibullin, M.; Khotjantsev, A. [Institute for Nuclear Research of RAS, INR RAS, 60th October Revolution Pr. 7a, 117312 Moscow (Russian Federation); Kudenko, Yu. [Institute for Nuclear Research of RAS, INR RAS, 60th October Revolution Pr. 7a, 117312 Moscow (Russian Federation); Kurimoto, Y. [Department of Physics, Kyoto University, Kyoto 606-8502 (Japan); Kutter, T. [Department of Physics and Astronomy, Louisiana State University, Baton Rouge, Louisiana 70803-4001 (United States); Lubsandorzhiev, B. [Institute for Nuclear Research of RAS, INR RAS, 60th October Revolution Pr. 7a, 117312 Moscow (Russian Federation); Mayatski, V. [AO Uniplast, 600016 Vladimir (Russian Federation); Musienko, Yu. [Institute for Nuclear Research of RAS, INR RAS, 60th October Revolution Pr. 7a, 117312 Moscow (Russian Federation); Nakaya, T.; Nobuhara, T. [Department of Physics, Kyoto University, Kyoto 606-8502 (Japan); Shaibonov, B.A.J.; Shaikhiev, A. [Institute for Nuclear Research of RAS, INR RAS, 60th October Revolution Pr. 7a, 117312 Moscow (Russian Federation); Taguchi, M. [Department of Physics, Kyoto University, Kyoto 606-8502 (Japan); Yershov, N. [Institute for Nuclear Research of RAS, INR RAS, 60th October Revolution Pr. 7a, 117312 Moscow (Russian Federation); Yokoyama, M. [Department of Physics, Kyoto University, Kyoto 606-8502 (Japan)

    2007-07-11

    The Tokai-to-Kamioka (T2K) experiment is a second generation long baseline neutrino oscillation experiment which aims at a sensitive search for {nu}{sub e} appearance. The main design features of the T2K near neutrino detectors located at 280m from the target are presented, and the scintillator counters are described. The counters are readout via WLS fibers embedded into S-shaped grooves in the scintillator from both ends by multi-pixel avalanche photodiodes operating in a limited Geiger mode. Operating principles and results of tests of photosensors with a sensitive area of 1mm{sup 2} are presented. A time resolution of 1.75ns, a spatial resolution of 9.9-12.4cm, and a detection efficiency for minimum ionizing particles of more than 99% were obtained for scintillator detectors in a beam test.

  15. The FE-I4 pixel readout system-on-chip resubmission for the insertable B-Layer project

    CERN Document Server

    Zivkovic, V; Garcia-Sciveres, M; Mekkaoui, A; Barbero, M; Darbo, G; Gnani, D; Hemperek, T; Menouni, M; Fougeron, D; Gensolen, F; Jensen, F; Caminada, L; Gromov, V; Kluit, R; Fleury, J; Krüger, H; Backhaus, M; Fang, X; Gonella, L; Rozanove, A; Arutinov, D

    2012-01-01

    The FE-I4 is a new pixel readout integrated circuit designed to meet the requirements of ATLAS experiment upgrades. The first samples of the FE-I4 engineering run (called FE-I4A) delivered promising results in terms of the requested performances. The FE-I4 team envisaged a number of modifications and fine-tuning before the actual exploitation, planned within the Insertable B-Layer (IBL) of ATLAS. As the IBL schedule was pushed significantly forward, a quick and efficient plan had to be devised for the FE-I4 redesign. This article will present the main objectives of the resubmission, together with the major changes that were a driving factor for this redesign. In addition, the top-level verification and test efforts of the FE-I4 will also be addressed.

  16. Front-end electronics in a 65 nm CMOS process for high density readout of pixel sensors

    Science.gov (United States)

    Gaioni, Luigi; Manghisoni, Massimo; Ratti, Lodovico; Re, Valerio; Traversi, Gianluca

    2011-09-01

    In future high energy physics experiments (HEP), readout integrated circuits for vertexing and tracking applications will be implemented by means of CMOS devices belonging to processes with minimum feature size in the 100 nm span. In these nanoscale technologies the impact of new dielectric materials and processing techniques on the analog behavior of MOSFETs has to be carefully evaluated. This paper is concerned with the study of the analog properties, in particular in terms of noise performance and radiation hardness, of MOSFET devices belonging to a 65 nm CMOS low power technology. The behavior of the 1/ f and white noise terms is studied as a function of the main device parameters before and after exposure to 10 keV X-rays and 60Co γ-rays. A prototype chip designed in a 65 nm CMOS process including deep n-well MAPS structures and a fast front-end conceived for the readout of high-resistivity pixel sensors will be introduced.

  17. Gated Geiger mode avalanche photodiode pixels with integrated readout electronics for low noise photon detection

    OpenAIRE

    Vilella Figueras, Eva; Comerma Montells, Albert; Alonso Casanovas, Oscar; Gascón Fora, David; Diéguez Barrientos, Àngel

    2011-01-01

    Avalanche photodiodes operated in the Geiger mode offer a high intrinsic gain as well as an excellent timing accuracy. These qualities make the sensor specially suitable for those applications where detectors with high sensitivity and low timing uncertainty are required. Moreover, they are compatible with standard CMOS technologies, allowing sensor and front-end electronics integration within the pixel cell. However, the sensor suffers from high levels of intrinsic noise, which may lead to er...

  18. A 65 nm pixel readout ASIC with quick transverse momentum discrimination capabilities for the CMS Tracker at HL-LHC

    CERN Document Server

    AUTHOR|(CDS)2084503; Kaplon, J; Francisco, R; Caratelli, Alessandro; Kloukinas, Konstantinos; Marchioro, Alessandro

    2016-01-01

    A readout ASIC for the hybrid pixel detector with the capability of performing quick recognition of particles with high transverse momentum has been designed for the requirements of the CMS Outer Tracker at the High Luminosity LHC. The particle momentum dicrimination capability represents the main challenge for this design together with the low power requirement: the constraint of low mass for the new tracker dictates a total power budget of less than 100\\,mW/cm$^2$. The choice of a 65\\,nm CMOS technology has made it possible to satisfy this power requirement despite the fairly large amount of logic necessary to perform the momentum discrimination and the continuous operation at 40\\,MHz. Several techniques for low power have been used to implement this logic that performs cluster reduction, position offset correction and coordinate encoding. A prototype chip including a large part of the final functionality and the full front-end has been realized and comprises a matrix of 16 by 3 rectangular pixels of 100\\,$...

  19. Multi-pixel Geiger-mode avalanche photodiode and wavelength shifting fibre readout of plastic scintillator counters of the EMMA underground experiment

    OpenAIRE

    Akhrameev, E. V.; Bezrukov, L. B.; Dzaparov, I. M.; Davitashvili, I. Sh.; Enqvist, T.; Fynbo, H.; Guliev, Zh. Sh.; Inzhechik, L. V.; Izmaylov, A. O.; Joutsenvaara, J.; Khabibullin, M. M.; KHOTJANTSEV, A.N; Kudenko, Yu. G.; Kuusiniemi, P.; Lubsandorzhiev, B. K.

    2009-01-01

    The results of a development of a scintillator counter with wavelength shifting (WLS) fibre and a multi-pixel Geiger-mode avalanche photodiode readout are presented. The photodiode has a metal-resistor-semiconductor layered structure and operates in the limited Geiger mode. The scintillator counter has been developed for the EMMA underground cosmic ray experiment.

  20. A silicon pixel readout ASIC with 100 ps time resolution for the NA62 experiment

    Energy Technology Data Exchange (ETDEWEB)

    Dellacasa, G; Garbolino, S; Marchetto, F; Martoiu, S; Mazza, G; Rivetti, A; Wheadon, R, E-mail: mazza@to.infn.it [INFN sez. di Torino, Via P. Giuria 1, 10125 Torino (Italy)

    2011-01-15

    The silicon tracker of the NA62 experiment requires the measurement of the particles arrival time with a resolution better than 200 ps rms and a spatial resolution of 300 {mu}m. A time measurement technique based on a Time to Amplitude Converter has been implemented in an ASIC in order to prove the possibility to integrate a TDC with resolution better than 200 ps in a pixel cell. Time-walk problem has been addressed with the use of the Constant Fraction Discriminator technique. The ASIC has been designed in a CMOS 0.13 {mu}m technology with single event upset protection of the digital logic.

  1. Development of high data readout rate pixel module and detector hybridization at Fermilab

    Energy Technology Data Exchange (ETDEWEB)

    Sergio Zimmermann et al.

    2001-03-20

    This paper describes the baseline design and a variation of the pixel module to handle the data rate required for the BTeV experiment at Fermilab. The present prototype has shown good electrical performance characteristics. Indium bump bonding is proven to be capable of successful fabrication at 50 micron pitch on real detectors. For solder bumps at 50 micron pitch, much better results have been obtained with the fluxless PADS processed detectors. The results are adequate for our needs and our tests have validated it as a viable technology.

  2. Pixelized M-pi-n CdTe detector coupled to Medipix2 readout chip

    CERN Document Server

    Kalliopuska, J; Penttila, R; Andersson, H; Nenonen, S; Gadda, A; Pohjonen, H; Vanttajac, I; Laaksoc, P; Likonen, J

    2011-01-01

    We have realized a simple method for patterning an M-pi-n CdTe diode with a deeply diffused pn-junction, such as indium anode on CdTe. The method relies on removing the semiconductor material on the anode-side of the diode until the physical junction has been reached. The pixelization of the p-type CdTe diode with an indium anode has been demonstrated by patterning perpendicular trenches with a high precision diamond blade and pulsed laser. Pixelization or microstrip pattering can be done on both sides of the diode, also on the cathode-side to realize double sided detector configuration. The article compares the patterning quality of the diamond blade process, pulsed pico-second and femto-second lasers processes. Leakage currents and inter-strip resistance have been measured and are used as the basis of the comparison. Secondary ion mass spectrometry (SIMS) characterization has been done for a diode to define the pn-junction depth and to see the effect of the thermal loads of the flip-chip bonding process. Th...

  3. Beam-test results of 4k pixel CMOS MAPS and high resistivity striplet detectors equipped with digital sparsified readout in the Slim5 low mass silicon demonstrator

    Energy Technology Data Exchange (ETDEWEB)

    Villa, M., E-mail: villa@bo.infn.i [Universita degli Studi di Bologna and INFN-Bologna (Italy); Bruschi, M.; Di Sipio, R.; Fabbri, L.; Giacobbe, B.; Gabrielli, A.; Giorgi, F.; Pellegrini, G.; Sbarra, C.; Semprini, N.; Spighi, R.; Valentinetti, S.; Zoccoli, A. [Universita degli Studi di Bologna and INFN-Bologna (Italy); Avanzini, C.; Batignani, G.; Bettarini, S.; Bosi, F.; Calderini, G.; Ceccanti, M.; Cenci, R. [Universita degli Studi di Pisa and INFN-Pisa (Italy)

    2010-05-21

    The results obtained by the Slim5 collaboration on a low material budget tracking silicon demonstrator put on a 12 GeV/c proton test beam at CERN are reported. Inside a reference telescope, two different and innovative detectors were placed for careful tests. The first was a 4k-Pixel Matrix of Deep N Well MAPS, developed in a 130 nm CMOS Technology, square pixels 50{mu}m wide, thinned down to 100{mu}m and equipped with a digital sparsified readout running up to 50 MHz. The other was a high resistivity double sided silicon detector, 200{mu}m thick, with short strips with 50{mu}m pitch at 45{sup 0} angle to the detector's edge. The detectors were equipped with dedicated fast readout architectures performing on-chip data sparsification and providing the timing information for the hits. The criteria followed in the design of the pixel sensor and of the pixel readout architecture will be reviewed. Preliminary measurements of the pixel charge collection, track detection efficiencies and resolutions of pixel and strip sensors are discussed. The data driven architecture of the readout chips has been fully exploited in the test beam by a data acquisition system able to collect on electronic board up to 2.5 Million events per second before triggering. By using a dedicated Associative Memory board, we were able to perform a level 1 trigger system, with minimal latency, identifying cleanly tracks traversing the detectors. System architecture and main performances are shown.

  4. Tests of gases in a mini-TPC with pixel chip readout

    Energy Technology Data Exchange (ETDEWEB)

    Vahsen, S. [University of Hawaii, 2505 Correa Road, Honolulu, HI 96822 (United States); Oliver-Mallory, K.; Lopez-Thibodeaux, M. [Lawrence Berkeley National Laboratory, 1 Cyclotron Road, Berkeley, CA 94720 (United States); Kadyk, J., E-mail: jakadyk@lbl.gov [Lawrence Berkeley National Laboratory, 1 Cyclotron Road, Berkeley, CA 94720 (United States); Garcia-Sciveres, M. [Lawrence Berkeley National Laboratory, 1 Cyclotron Road, Berkeley, CA 94720 (United States)

    2014-02-21

    Gases for potential use as targets for directional dark matter detection were tested in a prototype detector using two sequential Gas Electron Multipliers, or GEMs. The sensitive volume consists of a mini-TPC of 12 cm length and 7.5 cm diameter. An FEI3 pixel chip, developed for the ATLAS experiment, was used to produce spatial measurements with high resolution. An Fe55 source produced photoelectrons by X-ray conversions in the sensitive volume, and images of these were recorded by the chip. Spatial resolution plots are shown for the gases, which include the practical electron range of the photoelectrons and the effects of diffusion in the mini-TPC. Avalanche gain and gain resolution measurements were made for the four gases tested, at atmospheric and sub-atmospheric pressures: Ar(70)/CO{sub 2}(30), CF{sub 4}, He(80)/CF{sub 4}(20) and He(80)/isobutane(20)

  5. Toward VIP-PIX: A Low Noise Readout ASIC for Pixelated CdTe Gamma-Ray Detectors for Use in the Next Generation of PET Scanners.

    Science.gov (United States)

    Macias-Montero, Jose-Gabriel; Sarraj, Maher; Chmeissani, Mokhtar; Puigdengoles, Carles; Lorenzo, Gianluca De; Martínez, Ricardo

    2013-08-01

    VIP-PIX will be a low noise and low power pixel readout electronics with digital output for pixelated Cadmium Telluride (CdTe) detectors. The proposed pixel will be part of a 2D pixel-array detector for various types of nuclear medicine imaging devices such as positron-emission tomography (PET) scanners, Compton gamma cameras, and positron-emission mammography (PEM) scanners. Each pixel will include a SAR ADC that provides the energy deposited with 10-bit resolution. Simultaneously, the self-triggered pixel which will be connected to a global time-to-digital converter (TDC) with 1 ns resolution will provide the event's time stamp. The analog part of the readout chain and the ADC have been fabricated with TSMC 0.25 μm mixed-signal CMOS technology and characterized with an external test pulse. The power consumption of these parts is 200 μW from a 2.5 V supply. It offers 4 switchable gains from ±10 mV/fC to ±40 mV/fC and an input charge dynamic range of up to ±70 fC for the minimum gain for both polarities. Based on noise measurements, the expected equivalent noise charge (ENC) is 65 e(-) RMS at room temperature.

  6. A Pixel Readout Chip in 40 nm CMOS Process for High Count Rate Imaging Systems with Minimization of Charge Sharing Effects

    Energy Technology Data Exchange (ETDEWEB)

    Maj, Piotr; Grybos, P.; Szczgiel, R.; Kmon, P.; Drozd, A.; Deptuch, G.

    2013-11-07

    We present a prototype chip in 40 nm CMOS technology for readout of hybrid pixel detector. The prototype chip has a matrix of 18x24 pixels with a pixel pitch of 100 m. It can operate both in single photon counting (SPC) mode and in C8P1 mode. In SPC the measured ENC is 84 e rms (for the peaking time of 48 ns), while the effective offset spread is below 2 mV rms. In the C8P1 mode the chip reconstructs full charge deposited in the detector, even in the case of charge sharing, and it identifies a pixel with the largest charge deposition. The chip architecture and preliminary measurements are reported.

  7. Submillisecond X-ray photon correlation spectroscopy from a pixel array detector with fast dual gating and no readout dead-time.

    Science.gov (United States)

    Zhang, Qingteng; Dufresne, Eric M; Grybos, Pawel; Kmon, Piotr; Maj, Piotr; Narayanan, Suresh; Deptuch, Grzegorz W; Szczygiel, Robert; Sandy, Alec

    2016-05-01

    Small-angle scattering X-ray photon correlation spectroscopy (XPCS) studies were performed using a novel photon-counting pixel array detector with dual counters for each pixel. Each counter can be read out independently from the other to ensure there is no readout dead-time between the neighboring frames. A maximum frame rate of 11.8 kHz was achieved. Results on test samples show good agreement with simple diffusion. The potential of extending the time resolution of XPCS beyond the limit set by the detector frame rate using dual counters is also discussed.

  8. Submillisecond X-ray photon correlation spectroscopy from a pixel array detector with fast dual gating and no readout dead-time

    Energy Technology Data Exchange (ETDEWEB)

    Zhang, Qingteng; Dufresne, Eric M.; Grybos, Pawel; Kmon, Piotr; Maj, Piotr; Narayanan, Suresh; Deptuch, Grzegorz W.; Szczygiel, Robert; Sandy, Alec

    2016-04-19

    Small-angle scattering X-ray photon correlation spectroscopy (XPCS) studies were performed using a novel photon-counting pixel array detector with dual counters for each pixel. Each counter can be read out independently from the other to ensure there is no readout dead-time between the neighboring frames. A maximum frame rate of 11.8 kHz was achieved. Results on test samples show good agreement with simple diffusion. The potential of extending the time resolution of XPCS beyond the limit set by the detector frame rate using dual counters is also discussed.

  9. Performance of a hybrid photon detector prototype with electrostatic cross-focussing and integrated silicon Pixel readout for Cherenkov ring detection

    CERN Document Server

    Alemi, M; Bibby, J H; Campbell, M; Duane, A; Easo, S; Gys, Thierry; Halley, A W; Piedigrossi, D; Puertolas, D; Rosso, E; Simmons, B; Snoeys, W; Websdale, David M; Wotton, S A; Wyllie, Ken H

    1999-01-01

    We report on the first test beam performance of a hybrid photon detector prototype, using binary readout electronics, intended for use in the ring imaging Cherenkov detectors of the LHCb experiment at the CERN Large Hadron Collider. The photon detector is based on a cross-focussed image intensifier tube geometry. The anode consists of a silicon pixel array bump-bonded to a binary readout chip with matching pixel electronics. The detector has been installed in a quarter-scale prototype vessel of the LHCb ring imaging Cherenkov system. Focussed ring images produced by 120 GeV/c negative pions traversing an air radiator have been recorded. The observed light yield and Cherenkov angle resolution are discussed.

  10. Performance of a hybrid photon detector prototype with electrostatic cross-focussing and integrated silicon pixel readout for Cherenkov ring detection

    Energy Technology Data Exchange (ETDEWEB)

    Alemi, M.; Barber, G.; Bibby, J.; Campbell, M.; Duane, A.; Easo, S.; Gys, T.; Halley, A.; Piedigrossi, D.; Puertolas, D.; Rosso, E.; Simmons, B.; Snoeys, W.; Websdale, D.; Wotton, S.; Wyllie, K

    1999-08-01

    We report on the first test beam performance of a hybrid photon detector prototype, using binary readout electronics, intended for use in the ring imaging Cherenkov detectors of the LHCb experiment at the CERN Large Hadron Collider. The photon detector is based on a cross-focussed image intensifier tube geometry. The anode consists of a silicon pixel array bump-bonded to a binary readout chip with matching pixel electronics. The detector has been installed in a quarter-scale prototype vessel of the LHCb ring imaging Cherenkov system. Focussed ring images produced by 120 GeV/c negative pions traversing an air radiator have been recorded. The observed light yield and Cherenkov angle resolution are discussed.

  11. Readout electronics for low dark count pixel detectors based on Geiger mode avalanche photodiodes fabricated in conventional CMOS technologies for future linear colliders

    Energy Technology Data Exchange (ETDEWEB)

    Vilella, E., E-mail: evilella@el.ub.es [Department of Electronics, University of Barcelona (UB), Marti i Franques 1, 08028 Barcelona (Spain); Arbat, A. [Department of Electronics, University of Barcelona (UB), Marti i Franques 1, 08028 Barcelona (Spain); Comerma, A.; Trenado, J. [Department of Structure and Constituents of Matter, University of Barcelona (UB), Marti i Franques 1, 08028 Barcelona (Spain); Alonso, O. [Department of Electronics, University of Barcelona (UB), Marti i Franques 1, 08028 Barcelona (Spain); Gascon, D. [Department of Structure and Constituents of Matter, University of Barcelona (UB), Marti i Franques 1, 08028 Barcelona (Spain); Vila, A. [Department of Electronics, University of Barcelona (UB), Marti i Franques 1, 08028 Barcelona (Spain); Garrido, L. [Department of Structure and Constituents of Matter, University of Barcelona (UB), Marti i Franques 1, 08028 Barcelona (Spain); Dieguez, A. [Department of Electronics, University of Barcelona (UB), Marti i Franques 1, 08028 Barcelona (Spain)

    2011-09-11

    High sensitivity and excellent timing accuracy of the Geiger mode avalanche photodiodes make them ideal sensors as pixel detectors for particle tracking in high energy physics experiments to be performed in future linear colliders. Nevertheless, it is well known that these sensors suffer from dark counts and afterpulsing noise, which induce false hits (indistinguishable from event detection) as well as an increase in the necessary area of the readout system. In this work, we present a comparison between APDs fabricated in a high voltage 0.35 {mu}m and a high integration 0.13 {mu}m commercially available CMOS technologies that has been performed to determine which of them best fits the particle collider requirements. In addition, a readout circuit that allows low noise operation is introduced. Experimental characterization of the proposed pixel is also presented in this work.

  12. Evaluation of 320x240 pixel LEC GaAs Schottky barrier X-ray imaging arrays, hybridized to CMOS readout circuit based on charge integration

    CERN Document Server

    Irsigler, R; Alverbro, J; Borglind, J; Froejdh, C; Helander, P; Manolopoulos, S; O'Shea, V; Smith, K

    1999-01-01

    320x240 pixels GaAs Schottky barrier detector arrays were fabricated, hybridized to silicon readout circuits, and subsequently evaluated. The detector chip was based on semi-insulating LEC GaAs material. The square shaped pixel detector elements were of the Schottky barrier type and had a pitch of 38 mu m. The GaAs wafers were thinned down prior to the fabrication of the ohmic back contact. After dicing, the chips were indium bump, flip-chip bonded to CMOS readout circuits based on charge integration, and finally evaluated. A bias voltage between 50 and 100 V was sufficient to operate the detector. Results on I-V characteristics, noise behaviour and response to X-ray radiation are presented. Images of various objects and slit patterns were acquired by using a standard dental imaging X-ray source. The work done was a part of the XIMAGE project financed by the European Community (Brite-Euram). (author)

  13. Gossipo-3 A prototype of a Front-End Pixel Chip for Read-Out of Micro-Pattern Gas Detectors

    CERN Document Server

    Brezina, Christpoh; van der Graaf, Haryy; Gromov, Vladimir; Kluit, Ruud; Kruth, Andre; Zappon, Francesco

    2009-01-01

    In a joint effort of Nikhef (Amsterdam) and the University of Bonn, the Gossipo-3 integrated circuit (IC) has been developed. This circuit is a prototype of a chip dedicated for read-out of various types of position sensitive Micro-Pattern Gas detectors (MPGD). The Gossipo-3 is defined as a set of building blocks to be used in a future highly granulated (60 μm) chip. The pixel circuit can operate in two modes. In Time mode every readout pixel measures the hit arrival time and the charge deposit. For this purpose it has been equipped with a high resolution TDC (1.7 ns) covering dynamic range up to 102 μs. Charge collected by the pixel will be measured using Time-over- Threshold method in the range from 400 e- to 28000 e- with accuracy of 200 e- (standard deviation). In Counting mode every pixel operates as a 24-bit counter, counting the number of incoming hits. The circuit is also optimized to operate at low power consumption (100 mW/cm2) that is required to avoid the need for massive power transport and coo...

  14. Noiseless, kilohertz-frame-rate, imaging detector based on micro-channel plates readout with the Medipix2 CMOS pixel chip

    CERN Document Server

    McPhate, J; Tremsin, A; Siegmund, O; Mikulec, Bettina; Clark, Allan G; CERN. Geneva

    2005-01-01

    A new hybrid imaging detector is described that is being developed for the next generation adaptive optics (AO) wavefront sensors. The detector consists of proximity focused microchannel plates (MCPs) read out by pixelated CMOS application specific integrated circuit (ASIC) chips developed at CERN ("Medipix2"). Each Medipix2 pixel has an amplifier, lower and upper charge discriminators, and a 14-bit chounter. The 256x256 array can be read out noiselessly (photon counting) in 286 us. The Medipix2 is buttable on 3 sides to produce 512x(n*256) pixel devices. The readout can be electronically shuttered down to a terporal window of a few microseconds with an accuracy of 10 ns. Good quantum efficiencies can be achieved from the x-ray (open faced with opaque photocathodes) to the optical (sealed tube with multialkali or GaAs photocathode).

  15. Performance of the Insertable B-Layer for the ATLAS Pixel Detector during Quality Assurance and a Novel Pixel Detector Readout Concept based on PCIe

    CERN Document Server

    AUTHOR|(INSPIRE)INSPIRE-00356268; Pernegger, Heinz

    2016-07-27

    During the first long shutdown of the LHC the Pixel detector has been upgraded with a new 4th innermost layer, the Insertable B-Layer (IBL). The IBL will increase the tracking performance and help with higher than nominal luminosity the LHC will produce. The IBL is made up of 14 staves and in total 20 staves have been produced for the IBL. This thesis presents the results of the final quality tests performed on these staves in an detector-like environment, in order to select the 14 best of the 20 staves for integration onto the detector. The test setup as well as the testing procedure is introduced and typical results of each testing stage are shown and discussed. The overall performance of all staves is presented in regards to: tuning performance, radioactive source measurements, and number of failing pixels. Other measurement, which did not directly impact the selection of staves, but will be important for the operation of the detector or production of a future detector, are included. Based on the experienc...

  16. Recent progress of RD53 Collaboration towards next generation Pixel Read-Out Chip for HL-LHC

    Science.gov (United States)

    Demaria, N.; Barbero, M. B.; Fougeron, D.; Gensolen, F.; Godiot, S.; Menouni, M.; Pangaud, P.; Rozanov, A.; Wang, A.; Bomben, M.; Calderini, G.; Crescioli, F.; Le Dortz, O.; Marchiori, G.; Dzahini, D.; Rarbi, F. E.; Gaglione, R.; Gonella, L.; Hemperek, T.; Huegging, F.; Karagounis, M.; Kishishita, T.; Krueger, H.; Rymaszewski, P.; Wermes, N.; Ciciriello, F.; Corsi, F.; Marzocca, C.; De Robertis, G.; Loddo, F.; Licciulli, F.; Andreazza, A.; Liberali, V.; Shojaii, S.; Stabile, A.; Bagatin, M.; Bisello, D.; Mattiazzo, S.; Ding, L.; Gerardin, S.; Giubilato, P.; Neviani, A.; Paccagnella, A.; Vogrig, D.; Wyss, J.; Bacchetta, N.; De Canio, F.; Gaioni, L.; Nodari, B.; Manghisoni, M.; Re, V.; Traversi, G.; Comotti, D.; Ratti, L.; Vacchi, C.; Beccherle, R.; Bellazzini, R.; Magazzu, G.; Minuti, M.; Morsani, F.; Palla, F.; Poulios, S.; Fanucci, L.; Rizzi, A.; Saponara, S.; Androsov, K.; Bilei, G. M.; Menichelli, M.; Conti, E.; Marconi, S.; Passeri, D.; Placidi, P.; Della Casa, G.; Mazza, G.; Rivetti, A.; Da Rocha Rolo, M. D.; Monteil, E.; Pacher, L.; Gajanana, D.; Gromov, V.; Hessey, N.; Kluit, R.; Zivkovic, V.; Havranek, M.; Janoska, Z.; Marcisovsky, M.; Neue, G.; Tomasek, L.; Kafka, V.; Sicho, P.; Vrba, V.; Vila, I.; Lopez-Morillo, E.; Aguirre, M. A.; Palomo, F. R.; Muñoz, F.; Abbaneo, D.; Christiansen, J.; Dannheim, D.; Dobos, D.; Linssen, L.; Pernegger, H.; Valerio, P.; Alipour Tehrani, N.; Bell, S.; Prydderch, M. L.; Thomas, S.; Christian, D. C.; Fahim, F.; Hoff, J.; Lipton, R.; Liu, T.; Zimmerman, T.; Garcia-Sciveres, M.; Gnani, D.; Mekkaoui, A.; Gorelov, I.; Hoeferkamp, M.; Seidel, S.; Toms, K.; De Witt, J. N.; Grillo, A.; Paternò, A.

    2016-12-01

    This paper is a review of recent progress of RD53 Collaboration. Results obtained on the study of the radiation effects on 65 nm CMOS have matured enough to define first strategies to adopt in the design of analog and digital circuits. Critical building blocks and analog very front end chains have been designed, tested before and after 5-800 Mrad. Small prototypes of 64×64 pixels with complex digital architectures have been produced, and point to address the main issues of dealing with extremely high pixel rates, while operating at very small in-time thresholds in the analog front end. The collaboration is now proceeding at full speed towards the design of a large scale prototype, called RD53A, in 65 nm CMOS technology.

  17. Application Of A 1024X1024 Pixel Digital Image Store, With Pulsed Progressive Readout Camera, For Gastro-Intestinal Radiology

    Science.gov (United States)

    Edmonds, E. W.; Rowlands, J. A.; Hynes, D. M.; Toth, B. D.; Porter, A. J.

    1986-06-01

    We discuss the applicability of intensified x-ray television systems for general digital radiography and the requirements necessary for physician acceptance. Television systems for videofluorography when limited to conventional fluoroscopic exposure rates (25uR/s to x-ray intensifier), with particular application to the gastro-intestinal system, all suffer from three problems which tend to degrade the image: (a) lack of resolution, (b) noise, and (c) patient movement. The system to be described in this paper addresses each of these problems. Resolution is that provided by the use of a 1024 x 1024 pixel frame store combined with a 1024 line video camera and a 10"/6" x-ray image intensifier. Problems of noise and sensitivity to patient movement are overcome by using a short but intense burst of radiation to produce the latent image, which is then read off the video camera in a progressive fashion and placed in the digital store. Hard copy is produced from a high resolution multiformat camera, or a high resolution digital laser camera. It is intended that this PPR system will replace the 100mm spot film camera in present use, and will provide information in digital form for further processing and eventual digital archiving.

  18. Pixel Vertex Detectors

    OpenAIRE

    Wermes, Norbert

    2006-01-01

    Pixel vertex detectors are THE instrument of choice for the tracking of charged particles close to the interaction point at the LHC. Hybrid pixel detectors, in which sensor and read-out IC are separate entities, constitute the present state of the art in detector technology. Three of the LHC detectors use vertex detectors based on this technology. A development period of almost 10 years has resulted in pixel detector modules which can stand the extreme rate and timing requirements as well as ...

  19. Characterization of the FE-I4B pixel readout chip production run for the ATLAS Insertable B-layer upgrade

    CERN Document Server

    Backhaus, M

    2013-01-01

    The Insertable B-layer (IBL) is a fourth pixel layer that will be added inside the existing ATLAS pixel detector during the long LHC shutdown of 2013 and 2014. The new four layer pixel system will ensure excellent tracking, vertexing and b-tagging performance in the high luminosity pile-up conditions projected for the next LHC run. The peak luminosity is expected to reach 3• 10^34 cm^−2 s ^−1with an integrated luminosity over the IBL lifetime of 300 fb^−1 corresponding to a design lifetime fluence of 5 • 10^15 n_eqcm^−2 and ionizing dose of 250 Mrad including safety factors. The production front-end electronics FE-I4B for the IBL has been fabricated at the end of 2011 and has been extensively characterized on diced ICs as well as at the wafer level. The production tests at the wafer level were performed during 2012. Selected results of the diced IC characterization are presented, including measurements of the on-chip voltage regulators. The IBL powering scheme, which was chosen based on these resu...

  20. Advanced power analysis methodology targeted to the optimization of a digital pixel readout chip design and its critical serial powering system

    Science.gov (United States)

    Marconi, S.; Orfanelli, S.; Karagounis, M.; Hemperek, T.; Christiansen, J.; Placidi, P.

    2017-02-01

    A dedicated power analysis methodology, based on modern digital design tools and integrated with the VEPIX53 simulation framework developed within RD53 collaboration, is being used to guide vital choices for the design and optimization of the next generation ATLAS and CMS pixel chips and their critical serial powering circuit (shunt-LDO). Power consumption is studied at different stages of the design flow under different operating conditions. Significant effort is put into extensive investigations of dynamic power variations in relation with the decoupling seen by the powering network. Shunt-LDO simulations are also reported to prove the reliability at the system level.

  1. First detective quantum efficiency measurement of 500 {mu}m silicon hybrid pixel sensor with photon counting readout for X-ray medical imaging

    Energy Technology Data Exchange (ETDEWEB)

    Surre, Benjamin [Laboratoire de Biophysique medicale, University of Auvergne, Clermont-Ferrand (France)]. E-mail: Benjamin.surre@u-clermontl.fr; Caria, Mario [Laboratoire de Biophysique medicale, University of Auvergne, Clermont-Ferrand (France); Chaput, Julien [Laboratoire de Biophysique medicale, University of Auvergne, Clermont-Ferrand (France); Hassoun, Thierry [Laboratoire de Biophysique medicale, University of Auvergne, Clermont-Ferrand (France); Laverroux, Fabien [Laboratoire de Biophysique medicale, University of Auvergne, Clermont-Ferrand (France); Sarry, Laurent [Equipe de Recherche en Signal et Imagerie Medicale, EA3295, Clermont-Ferrand (France)

    2005-07-01

    We report the performances of a 500 {mu}m pixellated silicon sensor bonded to the photon counting chip Medipix2 [1]. In order to perform an absolute characterization of our detector, we measured both the pre-sampling MTF and NPS with respect to the International standard IEC-62220-1. From those data we have been able to extract the Detective Quantum Efficiency (DQE) and hence to assess the suitability of our detector for X-ray medical imaging purpose. Due to poor absorption of the Si at 70 kV the DQE peaked at 0.06 for null frequency. Nevertheless, these results are very promising since thicker Si or more absorbing material such as GaAs will soon be available.

  2. High-flux ptychographic imaging using the new 55 µm-pixel detector ‘Lambda’ based on the Medipix3 readout chip

    Energy Technology Data Exchange (ETDEWEB)

    Wilke, R. N., E-mail: rwilke@gwdg.de; Wallentin, J.; Osterhoff, M. [University of Göttingen, Institute for X-ray Physics, Friedrich-Hund-Platz 1, 37077 Göttingen (Germany); Pennicard, D.; Zozulya, A.; Sprung, M. [Deutsches Elektronen-Synchrotron DESY, Notkestrasse 85, 22607 Hamburg (Germany); Salditt, T. [University of Göttingen, Institute for X-ray Physics, Friedrich-Hund-Platz 1, 37077 Göttingen (Germany)

    2014-11-01

    The Large Area Medipix-Based Detector Array (Lambda) has been used in a ptychographic imaging experiment on solar-cell nanowires. By using a semi-transparent central stop, the high flux density provided by nano-focusing Kirkpatrick–Baez mirrors can be fully exploited for high-resolution phase reconstructions. Suitable detection systems that are capable of recording high photon count rates with single-photon detection are instrumental for coherent X-ray imaging. The new single-photon-counting pixel detector ‘Lambda’ has been tested in a ptychographic imaging experiment on solar-cell nanowires using Kirkpatrick–Baez-focused 13.8 keV X-rays. Taking advantage of the high count rate of the Lambda and dynamic range expansion by the semi-transparent central stop, a high-dynamic-range diffraction signal covering more than seven orders of magnitude has been recorded, which corresponds to a photon flux density of about 10{sup 5} photons nm{sup −2} s{sup −1} or a flux of ∼10{sup 10} photons s{sup −1} on the sample. By comparison with data taken without the semi-transparent central stop, an increase in resolution by a factor of 3–4 is determined: from about 125 nm to about 38 nm for the nanowire and from about 83 nm to about 21 nm for the illuminating wavefield.

  3. CVD diamond pixel detectors for LHC experiments

    Energy Technology Data Exchange (ETDEWEB)

    Wedenig, R.; Adam, W.; Bauer, C.; Berdermann, E.; Bergonzo, P.; Bogani, F.; Borchi, E.; Brambilla, A.; Bruzzi, M.; Colledani, C.; Conway, J.; Dabrowski, W.; Delpierre, P.; Deneuville, A.; Dulinski, W.; Eijk, B. van; Fallou, A.; Fizzotti, F.; Foulon, F.; Friedl, M.; Gan, K.K.; Gheeraert, E.; Grigoriev, E.; Hallewell, G.; Hall-Wilton, R.; Han, S.; Hartjes, F.; Hrubec, J.; Husson, D.; Kagan, H.; Kania, D.; Kaplon, J.; Karl, C.; Kass, R.; Knoepfle, K.T.; Krammer, M.; Logiudice, A.; Lu, R.; Manfredi, P.F.; Manfredotti, C.; Marshall, R.D.; Meier, D.; Mishina, M.; Oh, A.; Pan, L.S.; Palmieri, V.G.; Pernicka, M.; Peitz, A.; Pirollo, S.; Polesello, P.; Pretzl, K.; Procario, M.; Re, V.; Riester, J.L.; Roe, S.; Roff, D.; Rudge, A.; Runolfsson, O.; Russ, J.; Schnetzer, S.; Sciortino, S.; Speziali, V.; Stelzer, H.; Stone, R.; Suter, B.; Tapper, R.J.; Tesarek, R.; Trawick, M.; Trischuk, W.; Vittone, E.; Wagner, A.; Walsh, A.M.; Weilhammer, P.; White, C.; Zeuner, W.; Ziock, H.; Zoeller, M.; Blanquart, L.; Breugnion, P.; Charles, E.; Ciocio, A.; Clemens, J.C.; Dao, K.; Einsweiler, K.; Fasching, D.; Fischer, P.; Joshi, A.; Keil, M.; Klasen, V.; Kleinfelder, S.; Laugier, D.; Meuser, S.; Milgrome, O.; Mouthuy, T.; Richardson, J.; Sinervo, P.; Treis, J.; Wermes, N

    1999-08-01

    This paper reviews the development of CVD diamond pixel detectors. The preparation of the diamond pixel sensors for bump-bonding to the pixel readout electronics for the LHC and the results from beam tests carried out at CERN are described.

  4. Operational Experience with the ATLAS Pixel Detector

    CERN Document Server

    Lantzsch, Kerstin; The ATLAS collaboration

    2016-01-01

    Run 2 of the LHC is providing new challenges to track and vertex reconstruction with higher energies, denser jets and higher rates. Therefore the ATLAS experiment has constructed the first 4-layer Pixel detector in HEP, installing a new Pixel layer, also called Insertable B-Layer (IBL). In addition the Pixel detector was refurbished with new service quarter panels to recover about 3% of defective modules lost during run 1 and a new optical readout system to readout the data at higher speed while reducing the occupancy when running with increased luminosity. The commissioning, operation and performance of the 4-layer Pixel Detector will be presented.

  5. Status of the ATLAS pixel detector

    CERN Document Server

    Saavedra Aldo, F

    2005-01-01

    The ATLAS pixel detector is currently being constructed and will be installed in 2006 to be ready for commissioning at the Large Hadron Collider. The complete pixel detector is composed of three concentric barrels and six disks that are populated by 1744 ATLAS Pixel modules. The main components of the pixel module are the readout electronics and the silicon sensor whose active region is instrumented with rectangular pixels. The module has been designed to be able to survive 10 years of operation within the ATLAS detector. A brief description of the pixel detector will be presented with results and problems encountered during the production stage.

  6. DAQ hardware and software development for the ATLAS Pixel Detector

    CERN Document Server

    Stramaglia, Maria Elena; The ATLAS collaboration

    2015-01-01

    In 2014, the Pixel Detector of the ATLAS experiment has been extended by about 12 million pixels thanks to the installation of the Insertable B-Layer (IBL). Data-taking and tuning procedures have been implemented along with newly designed read-out hardware to support high bandwidth for data readout and calibration. The hardware is supported by an embedded software stack running on the read-out boards. The same boards will be used to upgrade the read-out bandwidth for the two outermost layers of the ATLAS Pixel Barrel (54 million pixels). We present the IBL read-out hardware and the supporting software architecture used to calibrate and operate the 4-layer ATLAS Pixel detector. We discuss the technical implementations and status for data taking, validation of the DAQ system in recent cosmic ray data taking, in-situ calibrations, and results from additional tests in preparation for Run 2 at the LHC.

  7. Bump bonding of pixel systems

    Energy Technology Data Exchange (ETDEWEB)

    Lozano, M. E-mail: manuel.lozano@cnm.es; Cabruja, E.; Collado, A.; Santander, J.; Ullan, M

    2001-11-01

    A pixel detector consists of an array of radiation sensing elements which is connected to an electronic read-out unit. Many different ways of making this connection between these two different devices are currently being used or considered to be used in the next future. Bonding techniques such as flip chip technology can present real advantages because they allow very fine pitch and a high number of I/Os. This paper presents a review of the different flip chip technologies available and their suitability for manufacturing pixel detectors. The particular problems concerning testing of pixel detectors and thermal issues related to them are pointed out.

  8. Bump bonding of pixel systems

    CERN Document Server

    Lozano, M; Collado, A; Santander, J; Ullán, M

    2001-01-01

    A pixel detector consists of an array of radiation sensing elements which is connected to an electronic read-out unit. Many different ways of making this connection between these two different devices are currently being used or considered to be used in the next future. Bonding techniques such as flip chip technology can present real advantages because they allow very fine pitch and a high number of I/Os. This paper presents a review of the different flip chip technologies available and their suitability for manufacturing pixel detectors. The particular problems concerning testing of pixel detectors and thermal issues related to them are pointed out.

  9. Nanosecond monolithic CMOS readout cell

    Science.gov (United States)

    Souchkov, Vitali V.

    2004-08-24

    A pulse shaper is implemented in monolithic CMOS with a delay unit formed of a unity gain buffer. The shaper is formed of a difference amplifier having one input connected directly to an input signal and a second input connected to a delayed input signal through the buffer. An elementary cell is based on the pulse shaper and a timing circuit which gates the output of an integrator connected to the pulse shaper output. A detector readout system is formed of a plurality of elementary cells, each connected to a pixel of a pixel array, or to a microstrip of a plurality of microstrips, or to a detector segment.

  10. Measurements at autotransformer system Prenzlau-Stralsund; Messungen am Mehrspannungssystem Prenzlau-Stralsund

    Energy Technology Data Exchange (ETDEWEB)

    Levermann-Vollmer, D. [DB Energie GmbH, Frankfurt a.M. (Germany); Thiede, J. [Balfour Beatty Rail GmbH, Power Systems, Offenbach am Main (Germany)

    2002-10-01

    After conversion of Prenzlau-Stralsund line in 2002 to autotransformer supply measurements have shown advantages of this system by lower impedances and interference voltages compared to the conventional system and delivered decision criterias for future projects. (orig.) [German] Die Strecke Prenzlau-Stralsund wurde im Jahr 2002 auf Speisung mit Autotransformern umgestellt. Messungen haben die Vorteile dieses Systems in Form niedrigerer Impedanzen und Beeinflussungsspannungen gegenueber der herkoemmlichen Speisung bestaetigt und Entscheidungshilfen fuer kuenftige Projekte geliefert. (orig.)

  11. Development of radiation hardened pixel sensors for charged particle detection

    CERN Document Server

    Koziel, Michal

    2014-01-01

    CMOS Pixel Sensors are being developed since a few years to equip vertex detectors for future high-energy physics experiments with the crucial advantages of a low material budget and low production costs. The features simultaneously required are a short readout time, high granularity and high tolerance to radiation. This thesis mainly focuses on the radiation tolerance studies. To achieve the targeted readout time (tens of microseconds), the sensor pixel readout was organized in parallel columns restricting in addition the readout to pixels that had collected the signal charge. The pixels became then more complex, and consequently more sensitive to radiation. Different in-pixel architectures were studied and it was concluded that the tolerance to ionizing radiation was limited to 300 krad with the 0.35- m fabrication process currently used, while the targeted value was several Mrad. Improving this situation calls for implementation of the sensors in processes with a smaller feature size which naturally imp...

  12. DAQ Hardware and software development for the ATLAS Pixel Detector

    CERN Document Server

    Stramaglia, Maria Elena; The ATLAS collaboration

    2015-01-01

    In 2014, the Pixel Detector of the ATLAS experiment was extended by about 12 million pixels with the installation of the Insertable B-Layer (IBL). Data-taking and tuning procedures have been implemented by employing newly designed read-out hardware, which supports the full detector bandwidth even for calibration. The hardware is supported by an embedded software stack running on the read-out boards. The same boards will be used to upgrade the read-out bandwidth for the two outermost layers of the ATLAS Pixel Barrel (54 million pixels). We present the IBL read-out hardware and the supporting software architecture used to calibrate and operate the 4-layer ATLAS Pixel detector. We discuss the technical implementations and status for data taking, validation of the DAQ system in recent cosmic ray data taking, in-situ calibrations, and results from additional tests in preparation for Run 2 at the LHC.

  13. Pixel Experiments

    DEFF Research Database (Denmark)

    Petersen, Kjell Yngve; Søndergaard, Karin; Augustesen, Christina

    2015-01-01

    Pixel Experiments The term pixel is traditionally defined as any of the minute elements that together constitute a larger context or image. A pixel has its own form and is the smallest unit seen within a larger structure. In working with the potentials of LED technology in architectural lighting...... design it became relevant to investigate the use of LEDs as the physical equivalent of a pixel as a design approach. In this book our interest has been in identifying how the qualities of LEDs can be used in lighting applications. With experiences in the planning and implementation of architectural...... elucidate and exemplify already well-known problems in relation to the experience of vertical and horizontal lighting. Pixel Experiments exist as a synergy between speculative test setups and lighting design in practice. This book is one of four books that is published in connection with the research...

  14. Readout of the upgraded ALICE-ITS

    Science.gov (United States)

    Szczepankiewicz, A.

    2016-07-01

    The ALICE experiment will undergo a major upgrade during the second long shutdown of the CERN LHC. As part of this program, the present Inner Tracking System (ITS), which employs different layers of hybrid pixels, silicon drift and strip detectors, will be replaced by a completely new tracker composed of seven layers of monolithic active pixel sensors. The upgraded ITS will have more than twelve billion pixels in total, producing 300 Gbit/s of data when tracking 50 kHz Pb-Pb events. Two families of pixel chips realized with the TowerJazz CMOS imaging process have been developed as candidate sensors: the ALPIDE, which uses a proprietary readout and sparsification mechanism and the MISTRAL-O, based on a proven rolling shutter architecture. Both chips can operate in continuous mode, with the ALPIDE also supporting triggered operations. As the communication IP blocks are shared among the two chip families, it has been possible to develop a common Readout Electronics. All the sensor components (analog stages, state machines, buffers, FIFOs, etc.) have been modelled in a system level simulation, which has been extensively used to optimize both the sensor and the whole readout chain design in an iterative process. This contribution covers the progress of the R&D efforts and the overall expected performance of the ALICE-ITS readout system.

  15. Pixelated neutron image plates

    Science.gov (United States)

    Schlapp, M.; Conrad, H.; von Seggern, H.

    2004-09-01

    Neutron image plates (NIPs) have found widespread application as neutron detectors for single-crystal and powder diffraction, small-angle scattering and tomography. After neutron exposure, the image plate can be read out by scanning with a laser. Commercially available NIPs consist of a powder mixture of BaFBr : Eu2+ and Gd2O3 dispersed in a polymer matrix and supported by a flexible polymer sheet. Since BaFBr : Eu2+ is an excellent x-ray storage phosphor, these NIPs are particularly sensitive to ggr-radiation, which is always present as a background radiation in neutron experiments. In this work we present results on NIPs consisting of KCl : Eu2+ and LiF that were fabricated into ceramic image plates in which the alkali halides act as a self-supporting matrix without the necessity for using a polymeric binder. An advantage of this type of NIP is the significantly reduced ggr-sensitivity. However, the much lower neutron absorption cross section of LiF compared with Gd2O3 demands a thicker image plate for obtaining comparable neutron absorption. The greater thickness of the NIP inevitably leads to a loss in spatial resolution of the image plate. However, this reduction in resolution can be restricted by a novel image plate concept in which a ceramic structure with square cells (referred to as a 'honeycomb') is embedded in the NIP, resulting in a pixelated image plate. In such a NIP the read-out light is confined to the particular illuminated pixel, decoupling the spatial resolution from the optical properties of the image plate material and morphology. In this work, a comparison of experimentally determined and simulated spatial resolutions of pixelated and unstructured image plates for a fixed read-out laser intensity is presented, as well as simulations of the properties of these NIPs at higher laser powers.

  16. Pixel Detectors

    OpenAIRE

    Wermes, Norbert

    2005-01-01

    Pixel detectors for precise particle tracking in high energy physics have been developed to a level of maturity during the past decade. Three of the LHC detectors will use vertex detectors close to the interaction point based on the hybrid pixel technology which can be considered the state of the art in this field of instrumentation. A development period of almost 10 years has resulted in pixel detector modules which can stand the extreme rate and timing requirements as well as the very harsh...

  17. The ATLAS Silicon Pixel Sensors

    CERN Document Server

    Alam, M S; Einsweiler, K F; Emes, J; Gilchriese, M G D; Joshi, A; Kleinfelder, S A; Marchesini, R; McCormack, F; Milgrome, O; Palaio, N; Pengg, F; Richardson, J; Zizka, G; Ackers, M; Andreazza, A; Comes, G; Fischer, P; Keil, M; Klasen, V; Kühl, T; Meuser, S; Ockenfels, W; Raith, B; Treis, J; Wermes, N; Gössling, C; Hügging, F G; Wüstenfeld, J; Wunstorf, R; Barberis, D; Beccherle, R; Darbo, G; Gagliardi, G; Gemme, C; Morettini, P; Musico, P; Osculati, B; Parodi, F; Rossi, L; Blanquart, L; Breugnon, P; Calvet, D; Clemens, J-C; Delpierre, P A; Hallewell, G D; Laugier, D; Mouthuy, T; Rozanov, A; Valin, I; Aleppo, M; Caccia, M; Ragusa, F; Troncon, C; Lutz, Gerhard; Richter, R H; Rohe, T; Brandl, A; Gorfine, G; Hoeferkamp, M; Seidel, SC; Boyd, GR; Skubic, P L; Sícho, P; Tomasek, L; Vrba, V; Holder, M; Ziolkowski, M; D'Auria, S; del Papa, C; Charles, E; Fasching, D; Becks, K H; Lenzen, G; Linder, C

    2001-01-01

    Prototype sensors for the ATLAS silicon pixel detector have been developed. The design of the sensors is guided by the need to operate them in the severe LHC radiation environment at up to several hundred volts while maintaining a good signal-to-noise ratio, small cell size, and minimal multiple scattering. The ability to be operated under full bias for electrical characterization prior to the attachment of the readout integrated circuit electronics is also desired.

  18. Prototype readout electronics for the upgraded ALICE Inner Tracking System

    Science.gov (United States)

    Sielewicz, K. M.; Aglieri Rinella, G.; Bonora, M.; Ferencei, J.; Giubilato, P.; Rossewij, M. J.; Schambach, J.; Vanat, T.

    2017-01-01

    The ALICE Collaboration is preparing a major upgrade to the experimental apparatus. A key element of the upgrade is the construction of a new silicon-based Inner Tracking System containing 12 Gpixels in an area of 10 m2. Its readout system consists of 192 readout units that control the pixel sensors and the power units, and deliver the sensor data to the counting room. A prototype readout board has been designed to test: the interface between the sensor modules and the readout electronics, the signal integrity and reliability of data transfer, the interface to the ALICE DAQ and trigger, and the susceptibility of the system to the expected radiation level.

  19. 3D, Flash, Induced Current Readout for Silicon Sensors

    Energy Technology Data Exchange (ETDEWEB)

    Parker, Sherwood I. [Univ. of Hawaii, Honolulu, HI (United States)

    2014-06-07

    A new method for silicon microstrip and pixel detector readout using (1) 65 nm-technology current amplifers which can, for the first time with silicon microstrop and pixel detectors, have response times far shorter than the charge collection time (2) 3D trench electrodes large enough to subtend a reasonable solid angle at most track locations and so have adequate sensitivity over a substantial volume of pixel, (3) induced signals in addition to, or in place of, collected charge

  20. Advanced pixel architectures for scientific image sensors

    CERN Document Server

    Coath, R; Godbeer, A; Wilson, M; Turchetta, R

    2009-01-01

    We present recent developments from two projects targeting advanced pixel architectures for scientific applications. Results are reported from FORTIS, a sensor demonstrating variants on a 4T pixel architecture. The variants include differences in pixel and diode size, the in-pixel source follower transistor size and the capacitance of the readout node to optimise for low noise and sensitivity to small amounts of charge. Results are also reported from TPAC, a complex pixel architecture with ~160 transistors per pixel. Both sensors were manufactured in the 0.18μm INMAPS process, which includes a special deep p-well layer and fabrication on a high resistivity epitaxial layer for improved charge collection efficiency.

  1. XAMPS Detectors Readout ASIC for LCLS

    Energy Technology Data Exchange (ETDEWEB)

    Dragone, A; /SLAC; Pratte, J.F.; Rehak, P.; /Brookhaven; Carini, G.A.; /BNL, NSLS; Herbst, R.; /SLAC; O' Connor, P.; /Brookhaven; Siddons, D.P.; /BNL, NSLS

    2008-12-18

    An ASIC for the readout of signals from X-ray Active Matrix Pixel Sensor (XAMPS) detectors to be used at the Linac Coherent Light Source (LCLS) is presented. The X-ray Pump Probe (XPP) instrument, for which the ASIC has been designed, requires a large input dynamic range on the order of 104 photons at 8 keV with a resolution of half a photon FWHM. Due to the size of the pixel and the length of the readout line, large input capacitance is expected, leading to stringent requirement on the noise optimization. Furthermore, the large number of pixels needed for a good position resolution and the fixed LCLS beam period impose limitations on the time available for the single pixel readout. Considering the periodic nature of the LCLS beam, the ASIC developed for this application is a time-variant system providing low-noise charge integration, filtering and correlated double sampling. In order to cope with the large input dynamic range a charge pump scheme implementing a zero-balance measurement method has been introduced. It provides an on chip 3-bit coarse digital conversion of the integrated charge. The residual charge is sampled using correlated double sampling into analog memory and measured with the required resolution. The first 64 channel prototype of the ASIC has been fabricated in TSMC CMOS 0.25 {micro}m technology. In this paper, the ASIC architecture and performances are presented.

  2. Blower door measurements - extended measuring methods; Blower Door-Messungen - erweiterte Messmethoden

    Energy Technology Data Exchange (ETDEWEB)

    Geissler, A.; Bolender, T.; Hauser, G. [Kassel Univ. (Germany). Fachgebiet Bauphysik

    1997-05-01

    To determine the air tightness of the external envelope, blower door measurements are normally carried out. The thus determined integral figure for the complete structure is an insufficient basis for carrying out specific insulation procedures in existing buildings. Within the scope of the air tightness measurements with the blower door, additional measuring methods permit the determination of additional information on the leakage distribution and the leakage routes. The expanded measuring methods that are known from the bibliography `opening a door` and `adding a hole` as well as the new method of `adding a hole plus` are explained, compared by means of exemplary measurements, and are considered for their suitability during field trials. (orig.) [Deutsch] Zur Bestimmung der Luftdichtheit der Gebaeudehuelle werden im allgemeinen Blower Door-Messungen durchgefuehrt. Der hierbei bestimmte integrale Wert fuer das gesamte Gebaeude stellt fuer das Ergreifen von gezielten Abdichtungsmassnahmen im Gebaeudebestand eine zu geringe Basis dar. Weiterfuehrende Messmethoden erlauben, im Rahmen von Luftdichtheitsmessungen mit der Blower Door zusaetzliche Informationen ueber die Leckageverteilung und ueber Leckagewege zu bestimmen. Die aus der Literatur bekannten erweiterten Messmethoden `Opening A Door` und `Adding A Hole` sowie die neue Methode `Adding A Hole Plus` werden erlaeutert, anhand von exemplarischen Messungen verglichen und im Feldeinsatz auf ihre Anwendbarkeit hin betrachtet. (orig.)

  3. A 2D imager for X-ray FELs with a 65 nm CMOS readout based on per-pixel signal compression and 10 bit A/D conversion

    Science.gov (United States)

    Ratti, L.; Comotti, D.; Fabris, L.; Grassi, M.; Lodola, L.; Malcovati, P.; Manghisoni, M.; Re, V.; Traversi, G.; Vacchi, C.; Rizzo, G.; Batignani, G.; Bettarini, S.; Casarosa, G.; Forti, F.; Giorgi, M.; Morsani, F.; Paladino, A.; Paoloni, E.; Pancheri, L.; Dalla Betta, G.-F.; Mendicino, R.; Verzellesi, G.; Xu, H.; Benkechkache, M. A.

    2016-09-01

    A readout channel for applications to X-ray diffraction imaging at free electron lasers has been developed in a 65 nm CMOS technology. The analog front-end circuit can achieve an input dynamic range of 100 dB by leveraging a novel signal compression technique based on the non-linear features of MOS capacitors. Trapezoidal shaping is accomplished through a transconductor and a switched capacitor circuit, performing gated integration and correlated double sampling. A small area, low power 10 bit successive approximation register (SAR) ADC, operated in a time-interleaved fashion, is used for numerical conversion of the amplitude measurement. Operation at 5 MHz of the analog channel including the shaper was demonstrated. Also, the channel was found to be compliant with single 1 keV photon resolution at 1.25 MHz. The ADC provides a signal-to-noise ratio (SNR) of 56 dB, corresponding to an equivalent number of bits (ENOB) of 9 bits, and a differential non linearity DNL rate slightly larger than 1.8 MHz.

  4. Simulation of the D{sub s} semileptonic decay with the PANDA detector and experimental verification of the Micro-Vertex-Detector pixel readout ASIC with proton test beam

    Energy Technology Data Exchange (ETDEWEB)

    Cao, Lu

    2016-07-14

    The PANDA experiment will study a wide range of physics topics with beams of antiprotons incident on fixed proton or complex nuclear targets. One issue is the D{sub s} semileptonic decay, which is governed by the weak and strong forces. The interaction can be parameterized by a transition form factor. The performance of PANDA to measure the decay form factor of D{sup +}{sub s}→ηe{sup +}ν{sub e} is evaluated via Monte Carlo simulation. This thesis concentrates on describing the software development and the evaluation of the expected precision. A preliminary estimate of the expected count rate is obtained. In this measurement, it is essential to reconstruct the D{sub s} semileptonic decay with high efficiency and purity in order to overcome the many orders of magnitude higher background. The Micro-Vertex-Detector plays an import role in the whole tracking system. The rate capability and tracking performance of the recent ASIC prototype for the readout of the MVD is tested using a beam of high-energy protons.

  5. Pixel detectors

    CERN Document Server

    Passmore, M S

    2001-01-01

    positions on the detector. The loss of secondary electrons follows the profile of the detector and increases with higher energy ions. studies of the spatial resolution predict a value of 5.3 lp/mm. The image noise in photon counting systems is investigated theoretically and experimentally and is shown to be given by Poisson statistics. The rate capability of the LAD1 was measured to be 250 kHz per pixel. Theoretical and experimental studies of the difference in contrast for ideal charge integrating and photon counting imaging systems were carried out. It is shown that the contrast differs and that for the conventional definition (contrast = (background - signal)/background) the photon counting device will, in some cases, always give a better contrast than the integrating system. Simulations in MEDICI are combined with analytical calculations to investigate charge collection efficiencies (CCE) in semiconductor detectors. Different pixel sizes and biasing conditions are considered. The results show charge shari...

  6. Proceedings of PIXEL98 -- International pixel detector workshop

    Energy Technology Data Exchange (ETDEWEB)

    Anderson, D.F.; Kwan, S. [eds.

    1998-08-01

    Experiments around the globe face new challenges of more precision in the face of higher interaction rates, greater track densities, and higher radiation doses, as they look for rarer and rarer processes, leading many to incorporate pixelated solid-state detectors into their plans. The highest-readout rate devices require new technologies for implementation. This workshop reviewed recent, significant progress in meeting these technical challenges. Participants presented many new results; many of them from the weeks--even days--just before the workshop. Brand new at this workshop were results on cryogenic operation of radiation-damaged silicon detectors (dubbed the Lazarus effect). Other new work included a diamond sensor with 280-micron collection distance; new results on breakdown in p-type silicon detectors; testing of the latest versions of read-out chip and interconnection designs; and the radiation hardness of deep-submicron processes.

  7. The NA60 experiment readout architecture

    CERN Document Server

    Floris, M; Usai, G L; David, A; Rosinsky, P; Ohnishi, H

    2004-01-01

    The NA60 experiment was designed to identify signatures of a new state of matter, the Quark Gluon Plasma, in heavy-ion collisions at the CERN Super Proton Synchroton. The apparatus is composed of four main detectors: a muon spectrometer (MS), a zero degree calorimeter (ZDC), a silicon vertex telescope (VT), and a silicon microstrip beam tracker (BT). The readout of the whole experiment is based on a PCI architecture. The basic unit is a general purpose PCI card, interfaced to the different subdetectors via custom mezzanine cards. This allowed us to successfully implement several completely different readout protocols (from the VME like protocol of the MS to the custom protocol of the pixel telescope). The system was fully tested with proton and ion beams, and several million events were collected in 2002 and 2003. This paper presents the readout architecture of NA60, with particular emphasis on the PCI layer common to all the subdetectors. (16 refs).

  8. The pin pixel detector--neutron imaging

    CERN Document Server

    Bateman, J E; Derbyshire, G E; Duxbury, D M; Marsh, A S; Rhodes, N J; Schooneveld, E M; Simmons, J E; Stephenson, R

    2002-01-01

    The development and testing of a neutron gas pixel detector intended for application in neutron diffraction studies is reported. Using standard electrical connector pins as point anodes, the detector is based on a commercial 100 pin connector block. A prototype detector of aperture 25.4 mmx25.4 mm has been fabricated, giving a pixel size of 2.54 mm which matches well to the spatial resolution typically required in a neutron diffractometer. A 2-Dimensional resistive divide readout system has been adapted to permit the imaging properties of the detector to be explored in advance of true pixel readout electronics. The timing properties of the device match well to the requirements of the ISIS-pulsed neutron source.

  9. Serial Pixel Analog-to-Digital Converter

    Energy Technology Data Exchange (ETDEWEB)

    Larson, E D

    2010-02-01

    This method reduces the data path from the counter to the pixel register of the analog-to-digital converter (ADC) from as many as 10 bits to a single bit. The reduction in data path width is accomplished by using a coded serial data stream similar to a pseudo random number (PRN) generator. The resulting encoded pixel data is then decoded into a standard hexadecimal format before storage. The high-speed serial pixel ADC concept is based on the single-slope integrating pixel ADC architecture. Previous work has described a massively parallel pixel readout of a similar architecture. The serial ADC connection is similar to the state-of-the art method with the exception that the pixel ADC register is a shift register and the data path is a single bit. A state-of-the-art individual-pixel ADC uses a single-slope charge integration converter architecture with integral registers and “one-hot” counters. This implies that parallel data bits are routed among the counter and the individual on-chip pixel ADC registers. The data path bit-width to the pixel is therefore equivalent to the pixel ADC bit resolution.

  10. optical links for the atlas pixel detector

    CERN Document Server

    Stucci, Stefania Antonia; The ATLAS collaboration

    2015-01-01

    Optical links are necessary to satisfy the high speed readout over long distances for advanced silicon detector systems. We report on the optical readout used in the newly installed central pixel layer (IBL) in the ATLAS experiment. The off detector readout employs commercial optical to analog converters, which were extensively tested for this application. Performance measurements during installation and commissioning will be shown. With the increasing instantaneous luminosity in the next years, the next layers outwards of IBL of the ATLAS Pixel detector (Layer 1 and Layer 2) will reach their bandwidth limits. A plan to increase the bandwidth by upgrading the off detector readout chain is put in place. The plan also involves new optical readout components, in particular the optical receivers, for which commercial units cannot be used and a new design has been made. The latter allows for a wider operational range in term of data frequency and light input power to match the on-detector sending units on the pres...

  11. Optical links for the ATLAS Pixel detector

    CERN Document Server

    Stucci, Stefania Antonia; The ATLAS collaboration

    2015-01-01

    Optical links are necessary to satisfy the high speed readout over long distances for advanced silicon detector systems. We report on the optical readout used in the newly installed central pixel layer (IBL) in the ATLAS experiment. The off detector readout employs commercial optical to analog converters, which were extensively tested for this application. Performance measurements during installation and commissioning will be shown. With the increasing instantaneous luminosity in the next years, the next layers outwards of IBL of the ATLAS Pixel detector (Layer 1 and Layer 2) will reach their bandwidth limits. A plan to increase the bandwidth by upgrading the off detector readout chain is put in place. The plan also involves new optical readout components, in particular the optical receivers, for which commercial units cannot be used and a new design has been made. The latter allows for a wider operational range in term of data frequency and light input power to match the on-detector sending units on the pres...

  12. Design and optimization of the readout system for X-ray CCDs

    Institute of Scientific and Technical Information of China (English)

    LU Bo; HAN Da-Wei; LI Mao-Shun; YANG Yan-Ji; WANG Juan; CHEN Tian-Xiang; HU Wei; LI Cheng-Kui; LIU Xiao-Yan; CUI Wei-Wei; WANG Yu-Sa; ZHU Yue; ZHANG Yi; XU Yu-Peng; CHEN Yong; HUO Jia; LI Wei

    2012-01-01

    A readout system for X-ray CCDs based on an improved architecture is presented; by optimizing several critical circuit blocks along the analog signal chain,the conflict between the readout speed and readout noise is greatly alleviated.Using CCD47-10 as its target CCD,the readout system has achieved 8.6e- readout noise and 142 eV FWHM at 5.9 keV Mn Kα under a pixel rate of 80 kHz.Also its performance of imaging has been investigated.

  13. Pixel-level Analog-To-Digital Converters for Hybrid Pixel Detectors with energy sensitivity

    NARCIS (Netherlands)

    San Segundo Bello, David; Nauta, Bram; Visschers, Jan

    2000-01-01

    Single-photon counting hybrid pixel detectors have shown to be a valid alternative to other types of X-ray imaging devices due to their high sensitivity, low noise, linear behavior and wide dynamic range. One important advantage of these devices is the fact that detector and readout electronics are

  14. Design of pixel-level ADCs for energy-sensitive hybrid pixel detectors

    NARCIS (Netherlands)

    San Segundo Bello, David; Nauta, Bram; Visschers, Jan

    2000-01-01

    Single-photon counting hybrid pixel detectors have shown to be a valid alternative to other types of X-ray imaging devices due to their high sensitivity, low noise, linear behavior and wide dynamic range. One important advantage of these devices is the fact that detector and readout electronics are

  15. Status of the CMS Phase I pixel detector upgrade

    Energy Technology Data Exchange (ETDEWEB)

    Spannagel, S., E-mail: simon.spannagel@desy.de

    2016-09-21

    A new pixel detector for the CMS experiment is being built, owing to the instantaneous luminosities anticipated for the Phase I Upgrade of the LHC. The new CMS pixel detector provides four-hit tracking while featuring a significantly reduced material budget as well as new cooling and powering schemes. A new front-end readout chip mitigates buffering and bandwidth limitations, and comprises a low-threshold comparator. These improvements allow the new pixel detector to sustain and improve the efficiency of the current pixel tracker at the increased requirements imposed by high luminosities and pile-up. This contribution gives an overview of the design of the upgraded pixel detector and the status of the upgrade project, and presents test beam performance measurements of the production read-out chip.

  16. Status of the CMS Phase I Pixel Detector Upgrade

    CERN Document Server

    AUTHOR|(CDS)2083994

    2016-01-01

    A new pixel detector for the CMS experiment is being built, owing to the instantaneous luminosities anticipated for the Phase~I Upgrade of the LHC. The new CMS pixel detector provides four-hit tracking while featuring a significantly reduced material budget as well as new cooling and powering schemes. A new front-end readout chip mitigates buffering and bandwidth limitations, and comprises a low-threshold comparator. These improvements allow the new pixel detector to sustain and improve the efficiency of the current pixel tracker at the increased requirements imposed by high luminosities and pile-up. This contribution gives an overview of the design of the upgraded pixel detector and the status of the upgrade project, and presents test beam performance measurements of the production read-out chip.

  17. Fabrication and Test of Pixelated CZT Detectors with Different Pixel Pitches and Thicknesses

    CERN Document Server

    Li, Q; Dowkontt, P; Martín, J; Beilicke, M; Jung, I; Groza, M; Bürger, A; De Geronimo, G; Krawczynski, H

    2008-01-01

    The main methods grown Cadmium Zinc Telluride (CZT) crystals with high yield and excellent homogeneity are Modified Horizontal Bridgman (MHB) and High Pressure Bridgman (HPB) processes, respectively. In this contribution, the readout system based on two 32-channel NCI-ASICs for pixellated CZT detector arrays has been developed and tested. The CZT detectors supplied by Orbotech (MHB) and eV products (HPB) are tested by NCI-ASIC readout system. The CZT detectors have an array of 8x8 or 11x11 pixel anodes fabricated on the anode surface with the area up to 2 cm x2 cm and the thickness of CZT detectors ranges from 0.5 cm to 1 cm. Energy spectra resolution and electron mobility-lifetime products of 8x8 pixels CZT detector with different thicknesses have been investigated.

  18. Development of CMOS Pixel Sensors with digital pixel dedicated to future particle physics experiments

    Science.gov (United States)

    Zhao, W.; Wang, T.; Pham, H.; Hu-Guo, C.; Dorokhov, A.; Hu, Y.

    2014-02-01

    Two prototypes of CMOS pixel sensor with in-pixel analog to digital conversion have been developed in a 0.18 μm CIS process. The first design integrates a discriminator into each pixel within an area of 22 × 33 μm2 in order to meet the requirements of the ALICE inner tracking system (ALICE-ITS) upgrade. The second design features 3-bit charge encoding inside a 35 × 35 μm2 pixel which is motivated by the specifications of the outer layers of the ILD vertex detector (ILD-VXD). This work aims to validate the concept of in-pixel digitization which offers higher readout speed, lower power consumption and less dead zone compared with the column-level charge encoding.

  19. Online calibrations and performance of the ATLAS Pixel Detector

    CERN Document Server

    Keil, M; The ATLAS collaboration

    2010-01-01

    The ATLAS Pixel Detector is the innermost detector of the ATLAS experiment at the Large Hadron Collider at CERN. It consists of 1744 silicon sensors equipped with approximately 80 M electronic channels, providing typically three measurement points with high resolution for particles emerging from the beam-interaction region, thus allowing measuring particle tracks and secondary vertices with very high precision. The readout system of the Pixel Detector is based on a bi-directional optical data transmission system between the detector and the data acquisition system with an individual link for each of the 1744 modules. Signal conversion components are located on both ends, approximately 80 m apart. The talk will give an overview of the calibration and performance of both the detector and its optical readout. The most basic parameter to be tuned and calibrated for the detector electronics is the readout threshold of the individual pixel channels. These need to be carefully tuned to optimise position resolution a...

  20. Monolithic pixel detectors for high energy physics

    CERN Document Server

    Snoeys, W

    2013-01-01

    Monolithic pixel detectors integrating sensor matrix and readout in one piece of silicon have revolutionized imaging for consumer applications, but despite years of research they have not yet been widely adopted for high energy physics. Two major requirements for this application, radiation tolerance and low power consumption, require charge collection by drift for the most extreme radiation levels and an optimization of the collected signal charge over input capacitance ratio ( Q / C ). It is shown that monolithic detectors can achieve Q / C for low analog power consumption and even carryout the promise to practically eliminate analog power consumption, but combining suf fi cient Q / C , collection by drift, and integration of readout circuitry within the pixel remains a challenge. An overview is given of different approaches to address this challenge, with possible advantages and disadvantages.

  1. Hit efficiency study of CMS prototype forward pixel detectors

    Energy Technology Data Exchange (ETDEWEB)

    Kim, Dongwook; /Johns Hopkins U.

    2006-01-01

    In this paper the author describes the measurement of the hit efficiency of a prototype pixel device for the CMS forward pixel detector. These pixel detectors were FM type sensors with PSI46V1 chip readout. The data were taken with the 120 GeV proton beam at Fermilab during the period of December 2004 to February 2005. The detectors proved to be highly efficient (99.27 {+-} 0.02%). The inefficiency was primarily located near the corners of the individual pixels.

  2. Production chain of CMS pixel modules

    CERN Document Server

    2006-01-01

    The pictures show the production chain of pixel modules for the CMS detector. Fig.1: overview of the assembly procedure. Fig.2: bump bonding with ReadOut Chip (ROC) connected to the sensor. Fig.3: glueing a raw module onto the baseplate strips. Fig.4: glueing of the High Density Interconnect (HDI) onto a raw module. Fig.5: pull test after heat reflow. Fig.6: wafer sensor processing, Indium evaporation.

  3. The pin pixel detector--X-ray imaging

    CERN Document Server

    Bateman, J E; Derbyshire, G E; Duxbury, D M; Marsh, A S; Simmons, J E; Stephenson, R

    2002-01-01

    The development and testing of a soft X-ray gas pixel detector, which uses connector pins for the anodes is reported. Based on a commercial 100 pin connector block, a prototype detector of aperture 25.4 mm centre dot 25.4 mm can be economically fabricated. The individual pin anodes all show the expected characteristics of small gas detectors capable of counting rates reaching 1 MHz per pin. A 2-dimensional resistive divide readout system has been developed to permit the imaging properties of the detector to be explored in advance of true pixel readout electronics.

  4. CMS Forward Pixel Upgrade Electronics and System Testing

    CERN Document Server

    Weber, Hannsjorg Artur

    2016-01-01

    This note discusses results of electronics and system testing of the CMS forward pixel (FPIX) detector upgrade for Phase 1. The FPIX detector is comprised of four stand-alone half cylinders, each of which contains frontend readout electronic boards, power regulators, cables and fibers in addition to the pixel modules. All of the components undergo rigorous testing and quality assurance before assembly into the half cylinders. Afterwards, we perform full system tests on the completely assembled half cylinders, including calibrations at final operating temperatures, characterization of the realistic readout chain, and system grounding and noise studies. The results from all these tests are discussed.

  5. ATLAS Phase-II-Upgrade Pixel Data Transmission Development

    CERN Document Server

    Wensing, Marius; The ATLAS collaboration

    2016-01-01

    The ATLAS tracking system will be replaced by an all-silicon detector (ITk) in the course of the planned HL-LHC accelerator upgrade around 2025. The readout of the ITk pixel system will be most challenging in terms of data rate and readout speed. Simulation of the on-detector electronics based on the currently foreseen trigger rate of 1 MHz indicate that a readout speed of up to 5 Gbps per data link is necessary. Due to radiation levels, the first part of transmission has to be implemented electrically. System simulation and test results of cable candidates will be presented.

  6. ATLAS Phase-II Upgrade Pixel Data Transmission Development

    CERN Document Server

    Nielsen, Jason; The ATLAS collaboration

    2017-01-01

    The ATLAS tracking system will be replaced by an all-silicon detector (ITk) in the course of the planned HL-LHC accelerator upgrade around 2025. The readout of the ITk pixel system will be most challenging in terms of data rate and readout speed. Simulation of the on-detector electronics based on the currently foreseen trigger rate of 1 MHz indicate that a readout speed of up to 5 Gbps per data link is necessary. Due to radiation levels, the first part of transmission has to be implemented electrically. System simulation and test results of cable candidates will be presented.

  7. Fabrication and Test of Pixelated CZT Detectors with Different Pixel Pitches and Thicknesses

    OpenAIRE

    Li, Q.; Garson, A.; Dowkontt, P.; Martin, J.; Beilicke, M; Jung, I.; Groza, M.; A. Burger; De Geronimo, G.; Krawczynski, H.; .

    2008-01-01

    The main methods grown Cadmium Zinc Telluride (CZT) crystals with high yield and excellent homogeneity are Modified Horizontal Bridgman (MHB) and High Pressure Bridgman (HPB) processes, respectively. In this contribution, the readout system based on two 32-channel NCI-ASICs for pixellated CZT detector arrays has been developed and tested. The CZT detectors supplied by Orbotech (MHB) and eV products (HPB) are tested by NCI-ASIC readout system. The CZT detectors have an array of 8x8 or 11x11 pi...

  8. A germanium hybrid pixel detector with 55μm pixel size and 65,000 channels

    Science.gov (United States)

    Pennicard, D.; Struth, B.; Hirsemann, H.; Sarajlic, M.; Smoljanin, S.; Zuvic, M.; Lampert, M. O.; Fritzsch, T.; Rothermund, M.; Graafsma, H.

    2014-12-01

    Hybrid pixel semiconductor detectors provide high performance through a combination of direct detection, a relatively small pixel size, fast readout and sophisticated signal processing circuitry in each pixel. For X-ray detection above 20 keV, high-Z sensor layers rather than silicon are needed to achieve high quantum efficiency, but many high-Z materials such as GaAs and CdTe often suffer from poor material properties or nonuniformities. Germanium is available in large wafers of extremely high quality, making it an appealing option for high-performance hybrid pixel X-ray detectors, but suitable technologies for finely pixelating and bump-bonding germanium have not previously been available. A finely-pixelated germanium photodiode sensor with a 256 by 256 array of 55μm pixels has been produced. The sensor has an n-on-p structure, with 700μm thickness. Using a low-temperature indium bump process, this sensor has been bonded to the Medipix3RX photoncounting readout chip. Tests with the LAMBDA readout system have shown that the detector works successfully, with a high bond yield and higher image uniformity than comparable high-Z systems. During cooling, the system is functional around -80°C (with warmer temperatures resulting in excessive leakage current), with -100°C sufficient for good performance.

  9. Compact all-CMOS spatiotemporal compressive sensing video camera with pixel-wise coded exposure.

    Science.gov (United States)

    Zhang, Jie; Xiong, Tao; Tran, Trac; Chin, Sang; Etienne-Cummings, Ralph

    2016-04-18

    We present a low power all-CMOS implementation of temporal compressive sensing with pixel-wise coded exposure. This image sensor can increase video pixel resolution and frame rate simultaneously while reducing data readout speed. Compared to previous architectures, this system modulates pixel exposure at the individual photo-diode electronically without external optical components. Thus, the system provides reduction in size and power compare to previous optics based implementations. The prototype image sensor (127 × 90 pixels) can reconstruct 100 fps videos from coded images sampled at 5 fps. With 20× reduction in readout speed, our CMOS image sensor only consumes 14μW to provide 100 fps videos.

  10. Single-Readout High-Density Memristor Crossbar

    KAUST Repository

    Zidan, M. A.

    2016-01-07

    High-density memristor-crossbar architecture is a very promising technology for future computing systems. The simplicity of the gateless-crossbar structure is both its principal advantage and the source of undesired sneak-paths of current. This parasitic current could consume an enormous amount of energy and ruin the readout process. We introduce new adaptive-threshold readout techniques that utilize the locality and hierarchy properties of the computer-memory system to address the sneak-paths problem. The proposed methods require a single memory access per pixel for an array readout. Besides, the memristive crossbar consumes an order of magnitude less power than state-of-the-art readout techniques.

  11. Readout electronics for LGAD sensors

    Science.gov (United States)

    Alonso, O.; Franch, N.; Canals, J.; Palacio, F.; López, M.; Vilà, A.; Diéguez, A.; Carulla, M.; Flores, D.; Hidalgo, S.; Merlos, A.; Pellegrini, G.; Quirion, D.

    2017-02-01

    In this paper, an ASIC fabricated in 180 nm CMOS technology from AMS with the very front-end electronics used to readout LGAD sensors is presented as well as its experimental results. The front-end has the typical architecture for Si-strip readout, i.e., preamplification stage with a Charge Sensitive Amplifier (CSA) followed by a CR-RC shaper. Both amplifiers are based on a folded cascode structure with a PMOS input transistor and the shaper only uses passive elements for the feedback stage. The CSA has programmable gain and a configurable input stage in order to adapt to the different input capacitance of the LGAD sensors (pixelated, short and long strips) and to the different input signal (depending on the gain of the LGAD). The fabricated prototype has an area of 0.865 mm × 0.965 mm and includes the biasing circuit for the CSA and the shaper, 4 analog channels (CSA+shaper) and programmable charge injection circuits included for testing purposes. Noise and power analysis performed during simulation fixed the size of the input transistor to W/L = 860 μm/0.2 μm. The shaping time is fixed by design at 1 us and, in this ASIC version, the feedback elements of the shaper are passive, which means that the area of the shaper can be reduced using active elements in future versions. Finally, the different gains of the CSA have been selected to maintain an ENC below 400 electrons for a detector capacitor of 20 pF, with a power consumption of 150 μ W per channel.

  12. Design of analog-to-digital converters for energy sensitive hybrid pixel detectors

    NARCIS (Netherlands)

    San Segundo Bello, David; Nauta, Bram; Visschers, Jan

    2001-01-01

    An important feature of hybrid semiconductor pixel detectors is the fact that detector and readout electronics are manufactured separately, allowing the use of industrial state-of-the-art CMOS processes to manufacture the readout electronics. As the feature size of these processes decreases, faster

  13. Design Methodology: ASICs with complex in-pixel processing for Pixel Detectors

    Energy Technology Data Exchange (ETDEWEB)

    Fahim, Farah [Fermilab

    2014-10-31

    The development of Application Specific Integrated Circuits (ASIC) for pixel detectors with complex in-pixel processing using Computer Aided Design (CAD) tools that are, themselves, mainly developed for the design of conventional digital circuits requires a specialized approach. Mixed signal pixels often require parasitically aware detailed analog front-ends and extremely compact digital back-ends with more than 1000 transistors in small areas below 100μm x 100μm. These pixels are tiled to create large arrays, which have the same clock distribution and data readout speed constraints as in, for example, micro-processors. The methodology uses a modified mixed-mode on-top digital implementation flow to not only harness the tool efficiency for timing and floor-planning but also to maintain designer control over compact parasitically aware layout.

  14. 3D electronics for hybrid pixel detectors – TWEPP-09

    CERN Document Server

    Godiot, S; Chantepie, B; Clémens, J C; Fei, R; Fleury, J; Fougeron, D; Garcia-Sciveres, M; Hemperek, T; Karagounis, M; Krueger, H; Mekkaoui, A; Pangaud, P; Rozanov, A; Wermes, N

    2009-01-01

    Future hybrid pixel detectors are asking for smaller pixels in order to improve spatial resolution and to deal with an increasing counting rate. Facing these requirements is foreseen to be done by microelectronics technology shrinking. However, this straightforward approach presents some disadvantages in term of performances and cost. New 3D technologies offer an alternative way with the advantage of technology mixing. For the upgrade of ATLAS pixel detector, a 3D conception of the read-out chip appeared as an interesting solution. Splitting the pixel functionalities into two separate levels will reduce pixel size and open the opportunity to take benefit of technology's mixing. Based on a previous prototype of the read-out chip FE-I4 (IBM 130nm), this paper presents the design of a hybrid pixel read-out chip using threedimensional Tezzaron-Chartered technology. In order to disentangle effects due to Chartered 130nm technology from effects involved by 3D architecture, a first translation of FEI4 prototype had ...

  15. Towards spark-proof gaseous pixel detectors

    Science.gov (United States)

    Tsigaridas, S.; Beuzekom, M. v.; Chan, H. W.; Graaf, H. v. d.; Hartjes, F.; Heijhoff, K.; Hessey, N. P.; Prodanovic, V.

    2016-11-01

    The micro-pattern gaseous pixel detector, is a promising technology for imaging and particle tracking applications. It is a combination of a gas layer acting as detection medium and a CMOS pixelated readout-chip. As a prevention against discharges we deposit a protection layer on the chip and then integrate on top a micromegas-like amplification structure. With this technology we are able to reconstruct 3D track segments of particles passing through the gas thanks to the functionality of the chip. We have turned a Timepix3 chip into a gaseous pixel detector and tested it at the SPS at Cern. The preliminary results are promising and within the expectations. However, the spark protection layer needs further improvement to make reliable detectors. For this reason, we have created a setup for spark-testing. We present the first results obtained from the lab-measurements along with preliminary results from the testbeam.

  16. Performance of active edge pixel sensors

    Science.gov (United States)

    Bomben, M.; Ducourthial, A.; Bagolini, A.; Boscardin, M.; Bosisio, L.; Calderini, G.; D'Eramo, L.; Giacomini, G.; Marchiori, G.; Zorzi, N.; Rummler, A.; Weingarten, J.

    2017-05-01

    To cope with the High Luminosity LHC harsh conditions, the ATLAS inner tracker has to be upgraded to meet requirements in terms of radiation hardness, pile up and geometrical acceptance. The active edge technology allows to reduce the insensitive area at the border of the sensor thanks to an ion etched trench which avoids the crystal damage produced by the standard mechanical dicing process. Thin planar n-on-p pixel sensors with active edge have been designed and produced by LPNHE and FBK foundry. Two detector module prototypes, consisting of pixel sensors connected to FE-I4B readout chips, have been tested with beams at CERN and DESY. In this paper the performance of these modules are reported. In particular the lateral extension of the detection volume, beyond the pixel region, is investigated and the results show high hit efficiency also at the detector edge, even in presence of guard rings.

  17. X-ray imaging with photon counting hybrid semiconductor pixel detectors

    CERN Document Server

    Manolopoulos, S; Campbell, M; Snoeys, W; Heijne, Erik H M; Pernigotti, E; Raine, C; Smith, K; Watt, J; O'Shea, V; Ludwig, J; Schwarz, C

    1999-01-01

    Semiconductor pixel detectors, originally developed for particle physics experiments, have been studied as X-ray imaging devices. The performance of devices using the OMEGA 3 read-out chip bump-bonded to pixellated silicon semiconductor detectors is characterised in terms of their signal-to-noise ratio when exposed to 60 kVp X-rays. Although parts of the devices achieve values of this ratio compatible with the noise being photon statistics limited, this is not found to hold for the whole pixel matrix, resulting in the global signal-to-noise ratio being compromised. First results are presented of X-ray images taken with a gallium arsenide pixel detector bump-bonded to a new read-out chip, (MEDIPIX), which is a single photon counting read-out chip incorporating a 15-bit counter in every pixel. (author)

  18. X-ray imaging with photon counting hybrid semiconductor pixel detectors

    Energy Technology Data Exchange (ETDEWEB)

    Manolopoulos, S.; Bates, R.; Campbell, M.; Snoeys, W.; Heijne, E.; Pernigotti, E.; Raine, C.; Smith, K. E-mail: k.smith@physics.gla.ac.uk; Watt, J.; O' Shea, V.; Ludwig, J.; Schwarz, C

    1999-09-11

    Semiconductor pixel detectors, originally developed for particle physics experiments, have been studied as X-ray imaging devices. The performance of devices using the {omega}3 read-out chip bump-bonded to pixellated silicon semiconductor detectors is characterised in terms of their signal-to-noise ratio when exposed to 60 kVp X-rays. Although parts of the devices achieve values of this ratio compatible with the noise being photon statistics limited, this is not found to hold for the whole pixel matrix, resulting in the global signal-to-noise ratio being compromised. First results are presented of X-ray images taken with a gallium arsenide pixel detector bump-bonded to a new read-out chip, (MEDIPIX), which is a single photon counting read-out chip incorporating a 15-bit counter in every pixel. (author)

  19. Novel integrated CMOS pixel structures for vertex detectors

    Energy Technology Data Exchange (ETDEWEB)

    Kleinfelder, Stuart; Bieser, Fred; Chen, Yandong; Gareus, Robin; Matis, Howard S.; Oldenburg, Markus; Retiere, Fabrice; Ritter, Hans Georg; Wieman, Howard H.; Yamamoto, Eugene

    2003-10-29

    Novel CMOS active pixel structures for vertex detector applications have been designed and tested. The overriding goal of this work is to increase the signal to noise ratio of the sensors and readout circuits. A large-area native epitaxial silicon photogate was designed with the aim of increasing the charge collected per struck pixel and to reduce charge diffusion to neighboring pixels. The photogate then transfers the charge to a low capacitance readout node to maintain a high charge to voltage conversion gain. Two techniques for noise reduction are also presented. The first is a per-pixel kT/C noise reduction circuit that produces results similar to traditional correlated double sampling (CDS). It has the advantage of requiring only one read, as compared to two for CDS, and no external storage or subtraction is needed. The technique reduced input-referred temporal noise by a factor of 2.5, to 12.8 e{sup -}. Finally, a column-level active reset technique is explored that suppresses kT/C noise during pixel reset. In tests, noise was reduced by a factor of 7.6 times, to an estimated 5.1 e{sup -} input-referred noise. The technique also dramatically reduces fixed pattern (pedestal) noise, by up to a factor of 21 in our tests. The latter feature may possibly reduce pixel-by-pixel pedestal differences to levels low enough to permit sparse data scan without per-pixel offset corrections.

  20. Novel concept of TDI readout circuit for LWIR detector

    Science.gov (United States)

    Kim, Byunghyuck; Yoon, Nanyoung; Lee, Hee Chul; Kim, Choong-Ki

    2000-07-01

    Noise property is the prime consideration in readout circuit design. The output noise caused by the photon noise, which dominates total noise in BLIP detectors, is limited by the integration time that an element looks at a specific point in the scene. Large integration time leads to a low noise performance. Time-delay integration (TDI) is used to effectively increase the integration time and reduce the photon noise. However, it increases the number of dead pixels and requires large integration capacitors and low noise output stage of the readout circuit. In this paper, to solve these problems, we propose a new concept of readout circuit, which performs background suppression, cell-to-cell background current non-uniformity compensation, and dead pixel correction using memory, ADC, DAC, and current copier cell. In simulation results, comparing with the conventional TDI readout circuit, the integration capacitor size can be reduced to 1/5 and trans-impedance gain can be increased by five times. Therefore, the new TDI readout circuit does not require large area and low noise output stage. And the error of skimming current is less than 2%, and the fixed pattern noise induced by cell-to-cell background current variation is reduced to less than 1%.

  1. Pixel detector system development at Diamond Light Source

    Science.gov (United States)

    Marchal, J.; Horswell, I.; Gimenez, E. N.; Tartoni, N.

    2010-10-01

    Hybrid pixel detectors consisting of an array of silicon photodiodes bump-bonded to CMOS read-out chips provide high signal-to-noise ratio and high dynamic range compared to CCD-based detectors and Image Plates. These detector features are important for SAXS experiments where a wide range of intensities are present in the images. For time resolved SAXS experiments, high frame rates are compulsory. The latest CMOS read-out chip developed by the MEDIPIX collaboration provides high frame rate and continuous acquisition mode. A read-out system for an array of MEDIPIX3 sensors is under development at Diamond Light Source. This system will support a full resolution frame rate of 1 kHz at a pixel counter depth of 12-bit and a frame rate of 30 kHz at a counter depth of 1 bit. Details concerning system design and MEDIPIX sensors characterization are presented.

  2. Readout electronic for multichannel detectors

    CERN Document Server

    Kulibaba, V I; Naumov, S V

    2001-01-01

    Readout electronics based on the 128-channel chip 'Viking' (IDE AS inc., Norway) is considered. The chip 'Viking' integrates 128 low noise charge-sensitive preamplifiers with tunable CR-(RC) sup 2 shapers,analog memory and multiplexed readout to one output. All modules of readout electronics were designed and produced in KIPT taking into account the published recommendations of IDE AS inc.

  3. The ALICE pixel detector upgrade

    Science.gov (United States)

    Reidt, F.

    2016-12-01

    The ALICE experiment at the CERN LHC is designed to study the physics of strongly interacting matter, and in particular the properties of the Quark-Gluon Plasma, using proton-proton, proton-nucleus and nucleus-nucleus collisions. The ALICE collaboration is preparing a major upgrade of the experimental apparatus to be installed during the second long LHC shutdown in the years 2019-2020. A key element of the ALICE upgrade is the new, ultra-light, high-resolution Inner Tracking System. With respect to the current detector, the new Inner Tracking System will significantly enhance the pointing resolution, the tracking efficiency at low transverse momenta, and the read-out rate capabilities. This will be obtained by seven concentric detector layers based on a Monolithic Active Pixel Sensor with a pixel pitch of about 30×30 μm2. A key feature of the new Inner Tracking System, which is optimised for high tracking accuracy at low transverse momenta, is the very low mass of the three innermost layers, which feature a material budget of 0.3% X0 per layer. This contribution presents the design goals and layout of the upgraded ALICE Inner Tracking System, summarises the R&D activities focussing on the technical implementation of the main detector components, and the projected detector performance.

  4. Serial powering of pixel modules

    CERN Document Server

    Stockmanns, Tobias; Hügging, Fabian Georg; Peric, I; Runólfsson, O; Wermes, Norbert

    2003-01-01

    Modern pixel detectors for the next generation of high-energy collider experiments like LHC use readout electronics in deep sub- micron technology. Chips in this technology need a low supply voltage of 2-2.5 V alongside high current consumption to achieve the desired performance. The high supply current leads to significant voltage drops in the long and low mass supply cables so that voltage fluctuations at the chips are induced, when the supply current changes. This problem scales with the number of modules when connected in parallel to the power supplies. An alternative powering scheme connects several modules in series resulting in a higher supply voltage but a lower current consumption of the chain and therefore a much lower voltage drop in the cables. In addition the amount of cables needed to supply the detector is vastly reduced. The concept and features of serial powering are presented and studies of the implementation of this technology as an alternative for the ATLAS pixel detector are shown. In par...

  5. Beam test results of the BTeV silicon pixel detector

    CERN Document Server

    Appel, J A

    2001-01-01

    We report the results of the BTeV silicon pixel detector tests carried out in the MTest beam at Fermilab in 1999-2000. The pixel detector spatial resolution has been studied as a function of track inclination, sensor bias, and readout threshold.

  6. Diamond and silicon pixel detectors in high radiation environments

    Energy Technology Data Exchange (ETDEWEB)

    Tsung, Jieh-Wen

    2012-10-15

    Diamond pixel detector is a promising candidate for tracking of collider experiments because of the good radiation tolerance of diamond. The diamond pixel detector must withstand the radiation damage from 10{sup 16} particles per cm{sup 2}, which is the expected total fluence in High Luminosity Large Hadron Collider. The performance of diamond and silicon pixel detectors are evaluated in this research in terms of the signal-to-noise ratio (SNR). Single-crystal diamond pixel detectors with the most recent readout chip ATLAS FE-I4 are produced and characterized. Based on the results of the measurement, the SNR of diamond pixel detector is evaluated as a function of radiation fluence, and compared to that of planar-silicon ones. The deterioration of signal due to radiation damage is formulated using the mean free path of charge carriers in the sensor. The noise from the pixel readout circuit is simulated and calculated with leakage current and input capacitance to the amplifier as important parameters. The measured SNR shows good agreement with the calculated and simulated results, proving that the performance of diamond pixel detectors can exceed the silicon ones if the particle fluence is more than 10{sup 15} particles per cm{sup 2}.

  7. Preliminary Assessment of Microwave Readout Multiplexing Factor

    Energy Technology Data Exchange (ETDEWEB)

    Croce, Mark Philip [Los Alamos National Lab. (LANL), Los Alamos, NM (United States); Koehler, Katrina Elizabeth [Los Alamos National Lab. (LANL), Los Alamos, NM (United States); Rabin, Michael W. [Los Alamos National Lab. (LANL), Los Alamos, NM (United States); Bennett, D. A. [National Inst. of Standards and Technology (NIST), Boulder, CO (United States); Mates, J. A. B. [National Inst. of Standards and Technology (NIST), Boulder, CO (United States); Gard, J. D. [National Inst. of Standards and Technology (NIST), Boulder, CO (United States); Becker, D. [National Inst. of Standards and Technology (NIST), Boulder, CO (United States); Schmidt, D. R. [National Inst. of Standards and Technology (NIST), Boulder, CO (United States); Ullom, J. N. [National Inst. of Standards and Technology (NIST), Boulder, CO (United States)

    2017-01-23

    Ultra-high resolution microcalorimeter gamma spectroscopy is a new non-destructive assay technology for measurement of plutonium isotopic composition, with the potential to reduce total measurement uncertainty to a level competitive with destructive analysis methods [1-4]. Achieving this level of performance in practical applications requires not only the energy resolution now routinely achieved with transition-edge sensor microcalorimeter arrays (an order of magnitude better than for germanium detectors) but also high throughput. Microcalorimeter gamma spectrometers have not yet achieved detection efficiency and count rate capability that is comparable to germanium detectors, largely because of limits from existing readout technology. Microcalorimeter detectors must be operated at low temperature to achieve their exceptional energy resolution. Although the typical 100 mK operating temperatures can be achieved with reliable, cryogen-free systems, the cryogenic complexity and heat load from individual readout channels for large sensor arrays is prohibitive. Multiplexing is required for practical systems. The most mature multiplexing technology at present is time-division multiplexing (TDM) [3, 5-6]. In TDM, the sensor outputs are switched by applying bias current to one SQUID amplifier at a time. Transition-edge sensor (TES) microcalorimeter arrays as large as 256 pixels have been developed for X-ray and gamma-ray spectroscopy using TDM technology. Due to bandwidth limits and noise scaling, TDM is limited to a maximum multiplexing factor of approximately 32-40 sensors on one readout line [8]. Increasing the size of microcalorimeter arrays above the kilopixel scale, required to match the throughput of germanium detectors, requires the development of a new readout technology with a much higher multiplexing factor.

  8. Serial pixel analog-to-digital converter (ADC)

    Science.gov (United States)

    Larson, Eric D.

    2010-02-01

    This method reduces the data path from the counter to the pixel register of the analog-to-digital converter (ADC) from as many as 10 bits to a single bit. The reduction in data path width is accomplished by using a coded serial data stream similar to a pseudo random number (PRN) generator. The resulting encoded pixel data is then decoded into a standard hexadecimal format before storage. The high-speed serial pixel ADC concept is based on the single-slope integrating pixel ADC architecture. Previous work has described a massively parallel pixel readout of a similar architecture. The serial ADC connection is similar to the state-of-the art method with the exception that the pixel ADC register is a shift register and the data path is a single bit. A state-of-the-art individual-pixel ADC uses a single-slope charge integration converter architecture with integral registers and "one-hot" counters. This implies that parallel data bits are routed among the counter and the individual on-chip pixel ADC registers. The data path bit-width to the pixel is therefore equivalent to the pixel ADC bit resolution.

  9. Pixel architectures in a HV-CMOS process for the ATLAS inner detector upgrade

    Science.gov (United States)

    Degerli, Y.; Godiot, S.; Guilloux, F.; Hemperek, T.; Krüger, H.; Lachkar, M.; Liu, J.; Orsini, F.; Pangaud, P.; Rymaszewski, P.; Wang, T.

    2016-12-01

    In this paper, design details and simulation results of new pixel architectures designed in LFoundry 150 nm high voltage CMOS process in the framework of the ATLAS high luminosity inner detector upgrade are presented. These pixels can be connected to the FE-I4 readout chip via bump bonding or glue and some of them can also be tested without a readout chip. Negative high voltage is applied to the high resistivity (> 2 kΩ .cm) substrate in order to deplete the deep n-well charge collection diode, ensuring good charge collection and radiation tolerance. In these pixels, the front-end has been implemented inside the diode using both NMOS and PMOS transistors. The pixel pitch is 50 μm × 250 μm for all pixels. These pixels have been implemented in a demonstrator chip called LFCPIX.

  10. Development of Kilo-Pixel Arrays of Transition-Edge Sensors for X-Ray Spectroscopy

    Science.gov (United States)

    Adams, J. S.; Bandler, S. R.; Busch, S. E.; Chervenak, J. A.; Chiao, M. P.; Eckart, M. E.; Ewin, A. J.; Finkbeiner, F. M.; Kelley, R. L.; Kelly, D. P.; Kilbourne, C. A.; Leutenegger, M. A.; Porst, J.-P.; Porter, F. S.; Ray, C. A.; Sadleir, J. E.; Smith, S. J.; Wassell, E. J.; Doriese, W. B.; Fowler, J. W.; Hilton, G. C.; Irwin, K. D.; Reintsema, C. D.; Smith, D. R.; Swetz, D. S.

    2012-01-01

    We are developing kilo-pixel arrays of transition-edge sensor (TES) microcalorimeters for future X-ray astronomy observatories or for use in laboratory astrophysics applications. For example, Athena/XMS (currently under study by the european space agency) would require a close-packed 32x32 pixel array on a 250-micron pitch with pixel/second. We present characterization of 32x32 arrays. These detectors will be readout using state of the art SQUID based time-domain multiplexing (TDM). We will also present the latest results in integrating these detectors and the TDM readout technology into a 16 row x N column field-able instrument.

  11. Using a pulsed laser beam to investigate the feasibility of sub-pixel position resolution with time-correlated transient signals in 3D pixelated CdZnTe detectors

    Science.gov (United States)

    Giraldo, L. Ocampo; Bolotnikov, A. E.; Camarda, G. S.; Cheng, S.; De Geronimo, G.; McGilloway, A.; Fried, J.; Hodges, D.; Hossain, A.; Ünlü, K.; Petryk, M.; Vidal, V.; Vernon, E.; Yang, G.; James, R. B.

    2017-09-01

    We evaluated the X-Y position resolution achievable in 3D pixelated detectors by processing the signal waveforms readout from neighboring pixels. In these measurements we used a focused light beam, down to 10 μm, generated by a 1 mW pulsed laser (650 nm) to carry out raster scans over selected 3×3 pixel areas, while recording the charge signals from the 9 pixels and the cathode using two synchronized digital oscilloscopes.

  12. Characterization of Ni/SnPb-TiW/Pt Flip Chip Interconnections in Silicon Pixel Detector Modules

    CERN Document Server

    Karadzhinova, Aneliya; Härkönen, Jaakko; Luukka, Panja-riina; Mäenpää, Teppo; Tuominen, Eija; Haeggstrom, Edward; Kalliopuska, Juha; Vahanen, Sami; Kassamakov, Ivan

    2014-01-01

    In contemporary high energy physics experiments, silicon detectors are essential for recording the trajectory of new particles generated by multiple simultaneous collisions. Modern particle tracking systems may feature 100 million channels, or pixels, which need to be individually connected to read-out chains. Silicon pixel detectors are typically connected to readout chips by flip-chip bonding using solder bumps. High-quality electro-mechanical flip-chip interconnects minimizes the number of dead read-out channels in the particle tracking system. Furthermore, the detector modules must endure handling during installation and withstand heat generation and cooling during operation. Silicon pixel detector modules were constructed by flip-chip bonding 16 readout chips to a single sensor. Eutectic SnPb solder bumps were deposited on the readout chips and the sensor chips were coated with TiW/Pt thin film UBM (under bump metallization). The modules were assembled at Advacam Ltd, Finland. We studied the uniformity o...

  13. Dual-readout Calorimetry

    CERN Document Server

    Akchurin, N; Cardini, A.; Cascella, M.; Cei, F.; De Pedis, D.; Fracchia, S.; Franchino, S.; Fraternali, M.; Gaudio, G.; Genova, P.; Hauptman, J.; La Rotonda, L.; Lee, S.; Livan, M.; Meoni, E.; Moggi, A.; Pinci, D.; Policicchio, A.; Saraiva, J.G.; Sill, A.; Venturelli, T.; Wigmans, R.

    2013-01-01

    The RD52 Project at CERN is a pure instrumentation experiment whose goal is to un- derstand the fundamental limitations to hadronic energy resolution, and other aspects of energy measurement, in high energy calorimeters. We have found that dual-readout calorimetry provides heretofore unprecedented information event-by-event for energy resolution, linearity of response, ease and robustness of calibration, fidelity of data, and particle identification, including energy lost to binding energy in nuclear break-up. We believe that hadronic energy resolutions of {\\sigma}/E $\\approx$ 1 - 2% are within reach for dual-readout calorimeters, enabling for the first time comparable measurement preci- sions on electrons, photons, muons, and quarks (jets). We briefly describe our current progress and near-term future plans. Complete information on all aspects of our work is available at the RD52 website http://highenergy.phys.ttu.edu/dream/.

  14. Characterization of active CMOS sensors for capacitively coupled pixel detectors

    Energy Technology Data Exchange (ETDEWEB)

    Hirono, Toko; Gonella, Laura; Janssen, Jens; Hemperek, Tomasz; Huegging, Fabian; Krueger, Hans; Wermes, Norbert [Institute of Physics, University of Bonn (Germany); Peric, Ivan [Institut fuer Prozessdatenverarbeitung und Elektronik, Karlsruher Institut fuer Technologie, Karlsruhe (Germany)

    2015-07-01

    Active CMOS pixel sensor is one of the most attractive candidates for detectors of upcoming particle physics experiments. In contrast to conventional sensors of hybrid detectors, signal processing circuit can be integrated in the active CMOS sensor. The characterization and optimization of the pixel circuit are indispensable to obtain a good performance from the sensors. The prototype chips of the active CMOS sensor were fabricated in the AMS 180nm and L-Foundry 150 nm CMOS processes, respectively a high voltage and high resistivity technology. Both chips have a charge sensitive amplifier and a comparator in each pixel. The chips are designed to be glued to the FEI4 pixel readout chip. The signals from 3 pixels of the prototype chips are capacitively coupled to the FEI4 input pads. We have performed lab tests and test beams to characterize the prototypes. In this presentation, the measurement results of the active CMOS prototype sensors are shown.

  15. Neural network based cluster creation in the ATLAS Pixel Detector

    CERN Document Server

    Andreazza, A; The ATLAS collaboration

    2012-01-01

    The read-out from individual pixels on planar semi-conductor sensors are grouped into clusters to reconstruct the location where a charged particle passed through the sensor. The resolution given by individual pixel sizes is significantly improved by using the information from the charge sharing be- tween pixels. Such analog cluster creation techniques have been used by the ATLAS experiment for many years to obtain an excellent performance. How- ever, in dense environments, such as those inside high-energy jets, clusters have an increased probability of merging the charge deposited by multiple particles. Recently, a neural network based algorithm which estimates both the cluster position and whether a cluster should be split has been developed for the ATLAS Pixel Detector. The algorithm significantly reduces ambigui- ties in the assignment of pixel detector measurement to tracks and improves the position accuracy with respect to standard techniques by taking into account the 2-dimensional charge distribution.

  16. Multiport solid-state imager characterization at variable pixel rates

    Science.gov (United States)

    Yates, George J.; Albright, Kevin L.; Turko, Bojan T.

    1993-10-01

    The imaging performance of an 8-port Full Frame Transfer Charge Coupled Device (FFT CCD) as a function of several parameters including pixel clock rate is presented. The device, model CCD-13, manufactured by English Electric Valve (EEV), is a 512 X 512 pixel array designed with four individual programmable bidirectional serial registers and eight output amplifiers permitting simultaneous readout of eight segments (128 horizontal X 256 vertical pixels) of the array. The imager was evaluated in Los Alamos National Laboratory's High-Speed Solid-State Imager Test Station at true pixel rates as high as 50 MHz for effective imager pixel rates approaching 400 MHz from multiporting. Key response characteristics measured include absolute responsivity, Charge-Transfer-Efficiency (CTE), dynamic range, resolution, signal-to-noise ratio, and electronic and optical crosstalk among the eight video channels. Preliminary test results and data obtained from the CCD-13 are presented and the versatility/capabilities of the test station are reviewed.

  17. Near Future Upgrades for the CMS Pixel Detector

    CERN Document Server

    Kumar, Ashish

    2015-01-01

    The silicon pixel detector is the innermost component of the CMS tracking system, providing high precision space point measurements of charged particle trajectories. The current pixel detector is designed to operate at a maximum luminosity of $1\\times10^{34}cm^{-2}s^{-1}$. Before 2018 the instantaneous luminosity of the LHC is expected to reach $2\\times10^{34}cm^{-2}s^{-1}$, which will significantly increase the number of interactions per bunch crossing. The performance of the current pixel detector in such high occupancy environment will be degraded due to substantial data-loss and effects of radiation damage of sensors, built up over the operational period. In order to maintain or exceed its current performance, the CMS pixel detector will be replaced by a new lightweight system with additional detection layers, better acceptance and improved readout electronics. The upgraded pixel detector will provide improved track and vertex reconstruction, standalone tracking capabilities, as well as identification of ...

  18. Dual-readout Calorimetry

    OpenAIRE

    Akchurin, N.; Bedeschi, F.; Cardini, A.; Cascella, M.; Cei, F.; Pedis, D.; Fracchia, S.; Franchino, S.; Fraternali, M.; Gaudio, G.; P. Genova; Hauptman, J.; La Rotonda, L.; Lee, S.; Livan, M.(INFN Sezione di Pavia, Pavia, Italy)

    2013-01-01

    The RD52 Project at CERN is a pure instrumentation experiment whose goal is to understand the fundamental limitations to hadronic energy resolution, and other aspects of energy measurement, in high energy calorimeters. We have found that dual-readout calorimetry provides heretofore unprecedented information event-by-event for energy resolution, linearity of response, ease and robustness of calibration, fidelity of data, and particle identification, including energy lost to binding energy in n...

  19. The STAR Heavy Flavor Tracker PXL detector readout electronics

    Science.gov (United States)

    Schambach, J.; Contin, G.; Greiner, L.; Stezelberger, T.; Sun, X.; Szelezniak, M.; Vu, C.

    2016-01-01

    The Heavy Flavor Tracker (HFT) is a recently installed micro-vertex detector upgrade to the STAR experiment at RHIC, consisting of three subsystems with various technologies of silicon sensors arranged in 4 concentric cylinders. The two innermost layers of the HFT close to the beam pipe, the Pixel ("PXL") subsystem, employ CMOS Monolithic Active Pixel Sensor (MAPS) technology that integrate the sensor, front-end electronics, and zero-suppression circuitry in one silicon die. This paper presents selected characteristics of the PXL detector part of the HFT and the hardware, firmware and software associated with the readout system for this detector.

  20. TID-dependent current measurements of IBL readout chips

    Energy Technology Data Exchange (ETDEWEB)

    Dette, Karola [TU Dortmund, Experimentelle Physik IV (Germany); CERN (Switzerland); Collaboration: ATLAS Pixel-Collaboration

    2016-07-01

    The ATLAS detector consists of several subsystems with a hybrid pixel detector as the innermost component of the tracking system. The pixel detector has been composed of three layers of silicon sensor assemblies during the first data taking run of the LHC and has been upgraded with a new 4th layer, the so-called Insertable B-Layer (IBL), in summer 2014. Each silicon sensor of the IBL is connected to a Front End readout chip (FE-I4) via bump bonds. During the first year of data taking an increase of the LV current produced by the readout chips was observed. This increase could be traced back to radiation damage inside the silicon. The dependence of the current on the Total Ionizing Dose (TID) and temperature has been tested with X-ray irradiations and will be presented in this talk.

  1. Hybridization of detector array and integrated circuit for readout

    Science.gov (United States)

    Fossum, Eric R.; Grunthaner, Frank J.

    1992-04-01

    A process is explained for fabricating a detector array in a layer of semiconductor material on one substrate and an integrated readout circuit in a layer of semiconductor material on a separate substrate in order to select semiconductor material for optimum performance of each structure, such as GaAs for the detector array and Si for the integrated readout circuit. The detector array layer is lifted off its substrate, laminated on the metallized surface on the integrated surface, etched with reticulating channels to the surface of the integrated circuit, and provided with interconnections between the detector array pixels and the integrated readout circuit through the channels. The adhesive material for the lamination is selected to be chemically stable to provide electrical and thermal insulation and to provide stress release between the two structures fabricated in semiconductor materials that may have different coefficients of thermal expansion.

  2. ATLAS IBL Pixel Upgrade

    CERN Document Server

    La Rosa, A

    2011-01-01

    The upgrade for ATLAS detector will undergo different phase towards super-LHC. The first upgrade for the Pixel detector will consist of the construction of a new pixel layer which will be installed during the first shutdown of the LHC machine (LHC phase-I upgrade). The new detector, called Insertable B-Layer (IBL), will be inserted between the existing pixel detector and a new (smaller radius) beam-pipe at a radius of 3.3 cm. The IBL will require the development of several new technologies to cope with increase of radiation or pixel occupancy and also to improve the physics performance which will be achieved by reducing the pixel size and of the material budget. Three different promising sensor technologies (planar-Si, 3D-Si and diamond) are currently under investigation for the pixel detector. An overview of the project with particular emphasis on pixel module is presented in this paper

  3. Deep sub electron noise readout in CCD systems using digital filtering techniques

    CERN Document Server

    Cancelo, Gustavo; Moroni, Guillermo Fernandez; Treptow, Ken; Zmuda, Ted; Diehl, Tom

    2011-01-01

    Scientific CCDs designed in thick high resistivity silicon (Si) are excellent detectors for astronomy, high energy and nuclear physics, and instrumentation. Many applications can benefit from CCDs ultra low noise readout systems. The present work shows how sub electron noise CCD images can be achieved using digital signal processing techniques. These techniques allow readout bandwidths of up to 10 K pixels per second and keep the full CCD spatial resolution and signal dynamic range.

  4. Improved Signal Chains for Readout of CMOS Imagers

    Science.gov (United States)

    Pain, Bedabrata; Hancock, Bruce; Cunningham, Thomas

    2009-01-01

    An improved generic design has been devised for implementing signal chains involved in readout from complementary metal oxide/semiconductor (CMOS) image sensors and for other readout integrated circuits (ICs) that perform equivalent functions. The design applies to any such IC in which output signal charges from the pixels in a given row are transferred simultaneously into sampling capacitors at the bottoms of the columns, then voltages representing individual pixel charges are read out in sequence by sequentially turning on column-selecting field-effect transistors (FETs) in synchronism with source-follower- or operational-amplifier-based amplifier circuits. The improved design affords the best features of prior source-follower-and operational- amplifier-based designs while overcoming the major limitations of those designs. The limitations can be summarized as follows: a) For a source-follower-based signal chain, the ohmic voltage drop associated with DC bias current flowing through the column-selection FET causes unacceptable voltage offset, nonlinearity, and reduced small-signal gain. b) For an operational-amplifier-based signal chain, the required bias current and the output noise increase superlinearly with size of the pixel array because of a corresponding increase in the effective capacitance of the row bus used to couple the sampled column charges to the operational amplifier. The effect of the bus capacitance is to simultaneously slow down the readout circuit and increase noise through the Miller effect.

  5. New smart readout technique performing edge detection designed to control vision sensors dataflow

    Science.gov (United States)

    Amhaz, Hawraa; Sicard, Gilles

    2012-03-01

    In this paper, a new readout strategy for CMOS image sensors is presented. It aims to overcome the excessive output dataflow bottleneck; this challenge is becoming more and more crucial along with the technology miniaturization. This strategy is based on the spatial redundancies suppression. It leads the sensor to perform edge detection and eventually provide binary image. One of the main advantages of this readout technique compared to other techniques, existing in the literature, is that it does not affect the in-pixel circuitry. This means that all the analogue processing circuitry is implemented outside the pixel, which keeps the pixel area and Fill Factor unchanged. The main analogue block used in this technique is an event detector developed and designed in the CMOS 0.35μm technology from Austria Micro Systems. The simulation results of this block as well as the simulation results of a test bench composed of several pixels and column amplifiers using this readout mode show the capability of this readout mode to reduce dataflow by controlling the ADCs. We must mention that this readout strategy is applicable on sensors that use a linear operating pixel element as well as for those based on logarithmic operating pixels. This readout technique is emulated by a MATLAB model which gives an idea about the expected functionalities and dataflow reduction rates (DRR). Emulation results are shown lately by giving the pre and post processed images as well as the DRR. This last cited does not have a fix value since it depends on the spatial frequency of the filmed scenes and the chosen threshold value.

  6. Imaging by photon counting with 256 x 256 pixel matrix

    CERN Document Server

    Tlustos, Lukas; Heijne, Erik H M; Llopart-Cudie, Xavier

    2004-01-01

    Using 0.25 mum standard CMOS we have developed 2-D semiconductor matrix detectors with sophisticated functionality integrated inside each pixel of a hybrid sensor module. One of these sensor modules is a matrix of 256 multiplied by 256 square 55mum pixels intended for X- ray imaging. This device is called 'Medipix2' and features a fast amplifier and two-level discrimination for signals between 1000 and 100000 equivalent electrons, with overall signal noise similar to 150 e- rms. Signal polarity and comparator thresholds are programmable. A maximum count rate of nearly 1 MHz per pixel can be achieved, which corresponds to an average flux of 3 multiplied by 10exp10 photons per cm2. The selected signals can be accumulated in each pixel in a 13- bit register. The serial readout takes 5-10 ms. A parallel readout of similar to 300 mus could also be used. Housekeeping functions such as local dark current compensation, test pulse generation, silencing of noisy pixels and threshold tuning in each pixel contribute to t...

  7. Module and Electronics Developments for the ATLAS ITK Pixel System

    CERN Document Server

    Rummler, Andr{e}; The ATLAS collaboration

    2016-01-01

    The entire tracking system of the ATLAS experiment will be replaced during the LHC Phase II shutdown around 2025 by an all-silicon detector (Inner Tracker, ITk). The pixel detector will be composed by the five innermost layers, instrumented with new sensor and readout electronics technologies to improve the tracking performance and cope with the severe HL-LHC environment in terms of occupancy and radiation. The total area of the new pixel system could measure up to 14 m^2, depending on the final layout choice that is expected to take place in early 2017. Different designs of planar, 3D, CMOS sensors are being investigated to identify the optimal technology for the different pixel layers. In parallel sensor-chip interconnection options are evaluated in collaboration with industrial partners to identify reliable technologies when employing 100-150 μm thin chips. While the new read-out chip is being developed by the RD53 Collaboration, the pixel off detector read-out electronics will be implemented in the frame...

  8. Multi-Anode Photomultplier (MAPMT) readout for High Granularity Calorimeters

    CERN Document Server

    Mkrtchyan, Tigran; The ATLAS collaboration

    2017-01-01

    Hadron calorimeter high performance in jet sub-structure measurements can be achieved for objects with $p_{T}$ greater than 1 TeV if the readout geometry is finely segmented in $\\Delta\\eta \\times \\Delta\\phi$. A feasibility study to increase the readout granularity of TileCal, the central hadron calorimeter of the ATLAS detector, is presented. We show a preliminary study exploring the possibility to increase by a factor 4 the present readout granularity of the inner layer cells of TileCal (0.1->0.025 in $\\Delta\\eta$) and to split into two layers the intermediate section of TileCal. The proposed solution is designed to cope with mechanical and readout bandwidth and power constraints. Assuming that the mechanics of the Tile modules cannot be changed, Multi-Anode PMTs with same boundary geometry of the present single-anode PMTs are considered to readout WLS bers, ideally one per pixel, carrying the signals from the individual scintillating tiles of each detector cells. The discussed challenges of the design are: ...

  9. Hadron calorimeter with MAPD readout in the NA61/SHINE experiment

    CERN Document Server

    Ivashkin, A; Asfandiyarov, R; Bravar, A; Blondel, A; Dominik, W; Fodor, Z; Gazdzicki, M; Golubeva, M; Guber, F; Hasler, A; Korzenev, A; Kuleshov, S; Kurepin, A; Laszlo, A; Marin, V; Musienko, Yu; Petukhov, O; Röhrich, D; Sadovsky, A; Sadygov, Z; Tolyhi, T; Zerrouk, F

    2012-01-01

    The modular hadron calorimeter with micro-pixel avalanche photodiodes readout for the NA61/SHINE experiment at the CERN SPS is presented. The calorimeter consists of 44 independent modules with lead-scintillator sandwich structure. The light from the scintillator tiles is captured by and transported with WLS-fibers embedded in scintillator grooves. The construction provides a longitudinal segmentation of the module in 10 sections with independent MAPD readout. MAPDs with pixel density of $~10^{4}$/mm$^2$ ensure good linearity of calorimeter response in a wide dynamical range. The performance of the calorimeter prototype in a beam test is reported.

  10. ALICE inner tracking system readout electronics prototype testing with the CERN ``Giga Bit Transceiver''

    Science.gov (United States)

    Schambach, J.; Rossewij, M. J.; Sielewicz, K. M.; Aglieri Rinella, G.; Bonora, M.; Ferencei, J.; Giubilato, P.; Vanat, T.

    2016-12-01

    The ALICE Collaboration is preparing a major detector upgrade for the LHC Run 3, which includes the construction of a new silicon pixel based Inner Tracking System (ITS). The ITS readout system consists of 192 readout boards to control the sensors and their power system, receive triggers, and deliver sensor data to the DAQ. To prototype various aspects of this readout system, an FPGA based carrier board and an associated FMC daughter card containing the CERN Gigabit Transceiver (GBT) chipset have been developed. This contribution describes laboratory and radiation testing results with this prototype board set.

  11. Planar pixel sensors in commercial CMOS technologies

    Energy Technology Data Exchange (ETDEWEB)

    Gonella, Laura; Hemperek, Tomasz; Huegging, Fabian; Krueger, Hans; Wermes, Norbert [Physikalisches Institut der Universitaet Bonn, Nussallee 12, 53115 Bonn (Germany); Macchiolo, Anna [Max-Planck-Institut fuer Physik, Foehringer Ring 6, 80805 Muenchen (Germany)

    2015-07-01

    For the upgrade of the ATLAS experiment at the high luminosity LHC, an all-silicon tracker is foreseen to cope with the increased rate and radiation levels. Pixel and strip detectors will have to cover an area of up to 200m2. To produce modules in high number at reduced costs, new sensor and bonding technologies have to be investigated. Commercial CMOS technologies on high resistive substrates can provide significant advantages in this direction. They offer cost effective, large volume sensor production. In addition to this, production is done on 8'' wafers allowing wafer-to-wafer bonding to the electronics, an interconnection technology substantially cheaper than the bump bonding process used for hybrid pixel detectors at the LHC. Both active and passive n-in-p pixel sensor prototypes have been submitted in a 150 nm CMOS technology on a 2kΩ cm substrate. The passive sensor design will be used to characterize sensor properties and to investigate wafer-to-wafer bonding technologies. This first prototype is made of a matrix of 36 x 16 pixels of size compatible with the FE-I4 readout chip (i.e. 50 μm x 250 μm). Results from lab characterization of this first submission are shown together with TCAD simulations. Work towards a full size FE-I4 sensor for wafer-to-wafer bonding is discussed.

  12. Sensor development for the CMS pixel detector

    CERN Document Server

    Bölla, G; Horisberger, R P; Kaufmann, R; Rohe, T; Roy, A

    2002-01-01

    The CMS experiment which is currently under construction at the Large Hadron Collider (LHC) at CERN (Geneva, Switzerland) will contain a pixel detector which provides in its final configuration three space points per track close to the interaction point of the colliding beams. Because of the harsh radiation environment of the LHC, the technical realization of the pixel detector is extremely challenging. The readout chip as the most damageable part of the system is believed to survive a particle fluence of 6x10 sup 1 sup 4 n sub e sub q /cm sup 2 (All fluences are normalized to 1 MeV neutrons and therefore all components of the hybrid pixel detector have to perform well up to at least this fluence. As this requires a partially depleted operation of the silicon sensors after irradiation-induced type inversion of the substrate, an ''n in n'' concept has been chosen. In order to perform IV-tests on wafer level and to hold accidentally unconnected pixels close to ground potential, a resistive path between the pixe...

  13. Pixel hybrid photon detectors for the ring imaging Cherenkov detectors of LHCb

    CERN Document Server

    Somerville, L

    2005-01-01

    A Pixel Hybrid Photon Detector (pixel HPD) has been developed for the LHCb Ring Imaging Cherenkov (RICH) detectors. The pixel HPD is a vacuum tube with a multi-alkali photocathode, high-voltage cross- focused electron optics and an anode consisting of a silicon pixel detector bump-bonded to a CMOS readout chip; the readout chip is thus fully encapsulated in the device. The pixel HPD fulfils the stringent requirements for the RICH detectors of LHCb, combining single photon sensitivity, high signal-to-noise ratio and fast readout with an ~8cm diameter active area and an effective pixel size of 2.5mm 2.5mm at the photocathode. The performance and characteristics of two prototype pixel HPDs have been studied in laboratory measurements and in recent beam tests. The results of all measurements agree with expectations and fulfil the LHCb RICH requirements. In readiness for production of the ~500pixel HPDs for the RICH detectors, a test programme was designed and implemented to ensure component quality control at eac...

  14. Pixel detector modules performance for ATLAS IBL and future pixel detectors

    CERN Document Server

    AUTHOR|(INSPIRE)INSPIRE-00355104; Pernegger, Heinz

    2015-11-06

    The ATLAS Detector is one of the four big particle physics experiments at CERN’s LHC. Its innermost tracking system consisted of the 3-Layer silicon Pixel Detector (~80M readout channels) in the first run (2010-2012). Over the past two years it was refurbished and equipped with new services as well as a new beam monitor. The major upgrade, however, was the Insertable B-Layer (IBL). It adds ~12M readout channels for improved vertexing, tracking robustness and b-tagging performance for the upcoming runs, before the high luminosity upgrade of the LHC will take place. This thesis covers two main aspects of Pixel detector performance studies: The main work was the planning, commissioning and operation of a test bench that meets the requirements of current pixel detector components. Each newly built ATLAS IBL stave was thoroughly tested, following a specifically developed procedure, and initially calibrated in that setup. A variety of production accompanying measurements as well as preliminary results after integ...

  15. Silicon pixel R&D for CLIC

    CERN Document Server

    AUTHOR|(SzGeCERN)754303

    2016-01-01

    Challenging detector requirements are imposed by the physics goals at the future multi-TeV e+e- Compact Linear Collider (CLIC). A single point resolution of 3μm for the vertex detector and 7μm for the tracker is required. Moreover, the CLIC vertex detector and tracker need to be extremely light weighted with a material budget of 0.2 % X0 per layer in the ver- tex detector and 1-2%X0 in the tracker. A fast time slicing of 10ns is further required to suppress background from beam-beam interactions. A wide range of sensor and readout ASIC technologies are investigated within the CLIC silicon pixel R&D effort. Various hybrid planar sensor assemblies with a pixel size of 25x25μm2 and 55x55μm2 have been produced and characterised by laboratory measurements and during test-beam campaigns. Experimental and simulation results for thin (50μm-500μm) slim edge and active-edge planar, and High-Voltage CMOS sensors hybridised to various readout ASICs (Timepix, Timepix3, CLICpix) are presented.

  16. Silicon pixel R&D for CLIC

    Science.gov (United States)

    Munker, M.

    2017-01-01

    Challenging detector requirements are imposed by the physics goals at the future multi-TeV e+ e‑ Compact Linear Collider (CLIC). A single point resolution of 3 μm for the vertex detector and 7 μm for the tracker is required. Moreover, the CLIC vertex detector and tracker need to be extremely light weighted with a material budget of 0.2% X0 per layer in the vertex detector and 1–2% X0 in the tracker. A fast time slicing of 10 ns is further required to suppress background from beam-beam interactions. A wide range of sensor and readout ASIC technologies are investigated within the CLIC silicon pixel R&D effort. Various hybrid planar sensor assemblies with a pixel size of 25×25 μm2 and 55×55 μm2 have been produced and characterised by laboratory measurements and during test-beam campaigns. Experimental and simulation results for thin (50 μm–500 μm) slim edge and active-edge planar, and High-Voltage CMOS sensors hybridised to various readout ASICs (Timepix, Timepix3, CLICpix) are presented.

  17. Semiconductor detectors with proximity signal readout

    Energy Technology Data Exchange (ETDEWEB)

    Asztalos, Stephen J. [XIA, LLC, Hayward, CA (United States)

    2014-01-30

    Semiconductor-based radiation detectors are routinely used for the detection, imaging, and spectroscopy of x-rays, gamma rays, and charged particles for applications in the areas of nuclear and medical physics, astrophysics, environmental remediation, nuclear nonproliferation, and homeland security. Detectors used for imaging and particle tracking are more complex in that they typically must also measure the location of the radiation interaction in addition to the deposited energy. In such detectors, the position measurement is often achieved by dividing or segmenting the electrodes into many strips or pixels and then reading out the signals from all of the electrode segments. Fine electrode segmentation is problematic for many of the standard semiconductor detector technologies. Clearly there is a need for a semiconductor-based radiation detector technology that can achieve fine position resolution while maintaining the excellent energy resolution intrinsic to semiconductor detectors, can be fabricated through simple processes, does not require complex electrical interconnections to the detector, and can reduce the number of required channels of readout electronics. Proximity electrode signal readout (PESR), in which the electrodes are not in physical contact with the detector surface, satisfies this need.

  18. Hybrid Pixel Detectors for gamma/X-ray imaging

    Science.gov (United States)

    Hatzistratis, D.; Theodoratos, G.; Zografos, V.; Kazas, I.; Loukas, D.; Lambropoulos, C. P.

    2015-09-01

    Hybrid pixel detectors are made by direct converting high-Z semi-insulating single crystalline material coupled to complementary-metal-oxide semiconductor (CMOS) readout electronics. They are attractive because direct conversion exterminates all the problems of spatial localization related to light diffusion, energy resolution, is far superior from the combination of scintillation crystals and photomultipliers and lithography can be used to pattern electrodes with very fine pitch. We are developing 2-D pixel CMOS ASICs, connect them to pixilated CdTe crystals with the flip chip and bump bonding method and characterize the hybrids. We have designed a series of circuits, whose latest member consists of a 50×25 pixel array with 400um pitch and an embedded controller. In every pixel a full spectroscopic channel with time tagging information has been implemented. The detectors are targeting Compton scatter imaging and they can be used for coded aperture imaging too. Hybridization using CMOS can overcome the limit put on pixel circuit complexity by the use of thin film transistors (TFT) in large flat panels. Hybrid active pixel sensors are used in dental imaging and other applications (e.g. industrial CT etc.). Thus X-ray imaging can benefit from the work done on dynamic range enhancement methods developed initially for visible and infrared CMOS pixel sensors. A 2-D CMOS ASIC with 100um pixel pitch to demonstrate the feasibility of such methods in the context of X-ray imaging has been designed.

  19. Two-dimensional pixel array image sensor for protein crystallography

    Energy Technology Data Exchange (ETDEWEB)

    Beuville, E.; Beche, J.-F.; Cork, C. [and others

    1996-07-01

    A 2D pixel array image sensor module has been designed for time resolved Protein Crystallography. This smart pixels detector significantly enhances time resolved Laue Protein crystallography by two to three orders of magnitude compared to existing sensors like films or phosphor screens coupled to CCDs. The resolution in time and dynamic range of this type of detector will allow one to study the evolution of structural changes that occur within the protein as a function of time. This detector will also considerably accelerate data collection in static Laue or monochromatic crystallography and make better use of the intense beam delivered by synchrotron light sources. The event driven pixel array detectors, based on the column Architecture, can provide multiparameter information (energy discrimination, time), with sparse and frameless readout without significant dead time. The prototype module consists of a 16x16 pixel diode array bump-bonded to the integrated circuit. The detection area is 150x150 square microns.

  20. Determination of the thermal conductivity of sediment rock from measurements on cuttings; Ermittlung der Gesteinswaermeleitfaehigkeit von Sedimentgesteinen aus Messungen am Bohrklein

    Energy Technology Data Exchange (ETDEWEB)

    Troschke, B.; Burkhardt, H. [Technische Univ. Berlin (Germany). Fachgebiet Angewandte Goephysik

    1997-12-01

    Due to high costs core recovery in many wells is strongly restricted. To determine thermal conductivity in these cases measurements on cuttings are necessary, since in situ measurements are expensive and protracted, too. Therefore cores from three hydrogeothermal wells of the north-east part of the German sedimentary basin were grinded to compare the results of measurements on cuttings with known values of thermal conductivity from the original cores. By a suitable model of the two-phase-system cuttings-water it is possible to calculate the thermal conductivity of the rock-matrix. On the basis of this value and a suitable rock-model an average thermal conductivity for the water saturated rock can be estimated. Certainly all influences of the texture (anisotropy, grain bond) and of the characteristics of the porespace (porosity, internal surface, saturation, permeability) are lost with measurements on cuttings. Therefore for the different systems cuttings-water and rock-porefluid as well as for different rock types different models are necessary. (orig.) [Deutsch] In vielen Bohrungen werden aus Kostengruenden keine Kerne gezogen. Fuer die Ermittlung der Waermeleitfaehigkeit koennen deshalb nur in-situ-Messungen, die ebenfalls zeit- und kostenintensiv sind, oder Messungen am Bohrklein herangezogen werden. Es wurden daher Kerne aus drei Hydrogeothermalbohrungen des nordostdeutschen Beckens aufgemahlen, um so vergleichende Messungen am `Bohrklein` aus Kernen mit bekannter Waermeleitfaehigkeit durzhzufuehren. Durch eine geeignete Modellvorstellung des Zwei-Phasen-Systems Bohrklein/Wasser laesst sich die Waermeleitfaehigkeit der Gesteinsmatrix bestimmen und aus dieser durch ein Gesteinsmodell auch eine mittlere Waermeleitfaehigkeit des wassergesaettigten Festgesteins berechnen. Klar ist, dass bei Messungen am Bohrklein Einfluesse, die durch Gefuege (Anisotropie, Kornbindung) und Porenraumeigenschaften (Porositaet, Saettigung, Permeabilitaet) hervorgerufen werden

  1. Imaging by photon counting with 256x256 pixel matrix

    Science.gov (United States)

    Tlustos, Lukas; Campbell, Michael; Heijne, Erik H. M.; Llopart, Xavier

    2004-09-01

    Using 0.25µm standard CMOS we have developed 2-D semiconductor matrix detectors with sophisticated functionality integrated inside each pixel of a hybrid sensor module. One of these sensor modules is a matrix of 256x256 square 55µm pixels intended for X-ray imaging. This device is called 'Medipix2' and features a fast amplifier and two-level discrimination for signals between 1000 and 100000 equivalent electrons, with overall signal noise ~150 e- rms. Signal polarity and comparator thresholds are programmable. A maximum count rate of nearly 1 MHz per pixel can be achieved, which corresponds to an average flux of 3x10exp10 photons per cm2. The selected signals can be accumulated in each pixel in a 13-bit register. The serial readout takes 5-10 ms. A parallel readout of ~300 µs could also be used. Housekeeping functions such as local dark current compensation, test pulse generation, silencing of noisy pixels and threshold tuning in each pixel contribute to the homogeneous response over a large sensor area. The sensor material can be adapted to the energy of the X-rays. Best results have been obtained with high-resistivity silicon detectors, but also CdTe and GaAs detectors have been used. The lowest detectable X-ray energy was about 4 keV. Background measurements have been made, as well as measurements of the uniformity of imaging by photon counting. Very low photon count rates are feasible and noise-free at room temperature. The readout matrix can be used also with visible photons if an energy or charge intensifier structure is interposed such as a gaseous amplification layer or a microchannel plate or acceleration field in vacuum.

  2. ASIC Readout Circuit Architecture for Large Geiger Photodiode Arrays

    Science.gov (United States)

    Vasile, Stefan; Lipson, Jerold

    2012-01-01

    The objective of this work was to develop a new class of readout integrated circuit (ROIC) arrays to be operated with Geiger avalanche photodiode (GPD) arrays, by integrating multiple functions at the pixel level (smart-pixel or active pixel technology) in 250-nm CMOS (complementary metal oxide semiconductor) processes. In order to pack a maximum of functions within a minimum pixel size, the ROIC array is a full, custom application-specific integrated circuit (ASIC) design using a mixed-signal CMOS process with compact primitive layout cells. The ROIC array was processed to allow assembly in bump-bonding technology with photon-counting infrared detector arrays into 3-D imaging cameras (LADAR). The ROIC architecture was designed to work with either common- anode Si GPD arrays or common-cathode InGaAs GPD arrays. The current ROIC pixel design is hardwired prior to processing one of the two GPD array configurations, and it has the provision to allow soft reconfiguration to either array (to be implemented into the next ROIC array generation). The ROIC pixel architecture implements the Geiger avalanche quenching, bias, reset, and time to digital conversion (TDC) functions in full-digital design, and uses time domain over-sampling (vernier) to allow high temporal resolution at low clock rates, increased data yield, and improved utilization of the laser beam.

  3. Development of a high density pixel multichip module at Fermilab

    Energy Technology Data Exchange (ETDEWEB)

    Cardoso, G. [and others

    2001-03-08

    At Fermilab, both pixel detector multichip module and sensor hybridization are being developed for the BTeV experiment. The BTeV pixel detector is based on a design relying on a hybrid approach. With this approach, the readout chip and the sensor array are developed separately and the detector is constructed by flip-chip mating the two together. This method offers maximum flexibility in the development process, choice of fabrication technologies, and the choice of sensor material. This paper presents strategies to handle the required data rate and performance results of the first prototype and detector hybridization.

  4. Current progress on pixel level packaging for uncooled IRFPA

    Science.gov (United States)

    Dumont, G.; Rabaud, W.; Yon, J.-J.; Carle, L.; Goudon, V.; Vialle, C.; Becker, Sébastien; Hamelin, Antoine; Arnaud, A.

    2012-06-01

    Vacuum packaging is definitely a major cost driver for uncooled IRFPA and a technological breakthrough is still expected to comply with the very low cost infrared camera market. To address this key issue, CEA-LETI is developing a Pixel Level Packaging (PLP) technology which basically consists in capping each pixel under vacuum in the direct continuation of the wafer level bolometer process. Previous CEA-LETI works have yet shown the feasibility of PLP based microbolometers that exhibit the required thermal insulation and vacuum achievement. CEA-LETI is still pushing the technology which has been now applied for the first time on a CMOS readout circuit. The paper will report on the recent progress obtained on PLP technology with particular emphasis on the optical efficiency of the PLP arrangement compared to the traditional microbolometer packaging. Results including optical performances, aging studies and compatibility with CMOS readout circuit are extensively presented.

  5. Robustness of the ATLAS pixel clustering neural network algorithm

    CERN Document Server

    Sidebo, Per Edvin; The ATLAS collaboration

    2016-01-01

    Proton-proton collisions at the energy frontier puts strong constraints on track reconstruction algorithms. The algorithms depend heavily on accurate estimation of the position of particles as they traverse the inner detector elements. An artificial neural network algorithm is utilised to identify and split clusters of neighbouring read-out elements in the ATLAS pixel detector created by multiple charged particles. The method recovers otherwise lost tracks in dense environments where particles are separated by distances comparable to the size of the detector read-out elements. Such environments are highly relevant for LHC run 2, e.g. in searches for heavy resonances. Within the scope of run 2 track reconstruction performance and upgrades, the robustness of the neural network algorithm will be presented. The robustness has been studied by evaluating the stability of the algorithm’s performance under a range of variations in the pixel detector conditions.

  6. Module and electronics developments for the ATLAS ITK pixel system

    CERN Document Server

    Munoz Sanchez, Francisca Javiela; The ATLAS collaboration

    2017-01-01

    The ATLAS experiment is preparing for an extensive modification of its detectors in the course of the planned HL-LHC accelerator upgrade around 2025. The ATLAS upgrade includes the replacement of the entire tracking system by an all-silicon detector (Inner Tracker, ITk). The five innermost layers of ITk will be a pixel detector built of new sensor and readout electronics technologies to improve the tracking performance and cope with the severe HL-LHC environment in terms of occupancy and radiation. The total area of the new pixel system could measure up to 14 m2, depending on the final layout choice, which is expected to take place in 2017. In this paper an overview of the ongoing R\\&D activities on modules and electronics for the ATLAS ITk is given including the main developments and achievements in silicon planar and 3D sensor technologies, readout and power challenges.

  7. Study of the CMS Phase 1 Pixel Pilot Blade Reconstruction

    CERN Document Server

    CMS Collaboration

    2017-01-01

    The silicon pixel detector is the innermost component of the CMS tracking system. It was replaced in March 2017 with an upgraded one, called the Phase 1 upgrade detector. During Long Shutdown 1, a third disk was inserted into the present forward pixel detector with eight prototype blades constructed using a new digital read-out chip architecture and a prototype readout chain. Testing the performance of these pilot modules enabled us to gain experience with the Phase 1 upgrade modules. In this document, the data reconstruction with the pilot system is presented. The hit finding efficiency and residual of these new modules is also shown, and how these observables were used to adjust the timing of the pilot blades.

  8. Prototype ATLAS IBL Modules using the FE-I4A Front-End Readout Chip

    CERN Document Server

    Albert, J; Alimonti, Gianluca; Allport, Phil; Altenheiner, Silke; Ancu, Lucian; Andreazza, Attilio; Arguin, Jean-Francois; Arutinov, David; Backhaus, Malte; Bagolini, Alvise; Ballansat, Jacques; Barbero, Marlon; Barbier, Gérard; Bates, Richard; Battistin, Michele; Baudin, Patrick; Beau, Tristan; Beccherle, Roberto; Beck, Hans Peter; Benoit, Mathieu; Bensinger, Jim; Bomben, Marco; Borri, Marcello; Boscardin, Maurizio; Botelho Direito, Jose Antonio; Bousson, Nicolas; Boyd, George Russell Jr; Breugnon, Patrick; Bruni, Graziano; Bruschi, Marco; Buchholz, Peter; Buttar, Craig; Cadoux, Franck; Calderini, Giovanni; Caminada, Leah; Capeans, Mar; Casse, Gianluigi; Catinaccio, Andrea; Cavalli-Sforza, Matteo; Chauveau, Jacques; Chu, Ming-Lee; Ciapetti, Marco; Cindro, Vladimir; Citterio, Mauro; Clark, Allan; Cobal, Marina; Coelli, Simone; Colijn, Auke-Pieter; Colin, Daly; Collot, Johann; Crespo-Lopez, Olivier; Dalla Betta, Gian-Franco; Darbo, Giovanni; DaVia, Cinzia; David, Pierre-Yves; Debieux, Stéphane; Delebecque, Pierre; Devetak, Erik; DeWilde, Burton; Di Girolamo, Beniamino; Dinu, Nicoleta; Dittus, Fridolin; Diyakov, Denis; Djama, Fares; Dobos, Daniel Adam; Doonan, Kate; Dopke, Jens; Dorholt, Ole; Dube, Sourabh; Dushkin, Andrey; Dzahini, Daniel; Egorov, Kirill; Ehrmann, Oswin; Elldge, David; Elles, Sabine; Elsing, Markus; Eraud, Ludovic; Ereditato, Antonio; Eyring, Andreas; Falchieri, Davide; Falou, Aboud; Fang, Xiaochao; Fausten, Camille; Favre, Yannick; Ferrere, Didier; Fleta, Celeste; Fleury, Julien; Flick, Tobias; Forshaw, Dean; Fougeron, Denis; Fritzsch, Thomas; Gabrielli, Alessandro; Gaglione, Renaud; Gallrapp, Christian; Gan, K; Garcia-Sciveres, Maurice; Gariano, Giuseppe; Gastaldi, Thibaut; Gemme, Claudia; Gensolen, Fabrice; George, Matthias; Ghislain, Patrick; Giacomini, Gabriele; Gibson, Stephen; Giordani, Mario Paolo; Giugni, Danilo; Gjersdal, Håvard; Glitza, Karl Walter; Gnani, Dario; Godlewski, Jan; Gonella, Laura; Gorelov, Igor; Gorišek, Andrej; Gössling, Claus; Grancagnolo, Sergio; Gray, Heather; Gregor, Ingrid-Maria; Grenier, Philippe; Grinstein, Sebastian; Gromov, Vladimir; Grondin, Denis; Grosse-Knetter, Jörn; Hansen, Thor-Erik; Hansson, Per; Harb, Ali; Hartman, Neal; Hasi, Jasmine; Hegner, Franziska; Heim, Timon; Heinemann, Beate; Hemperek, Tomasz; Hessey, Nigel; Hetmánek, Martin; Hoeferkamp, Martin; Hostachy, Jean-Yves; Hügging, Fabian; Husi, Coralie; Iacobucci, Giuseppe; Idarraga, John; Ikegami, Yoichi; Janoška, Zdenko; Jansen, Jens; Jansen, Luc; Jensen, Frank; Jentzsch, Jennifer; Joseph, John; Kagan, Harris; Karagounis, Michael; Kass, Richard; Kenney, Christopher J; Kersten, Susanne; Kind, Peter; Klingenberg, Reiner; Kluit, Ruud; Kocian, Martin; Koffeman, Els; Kok, Angela; Korchak, Oleksandr; Korolkov, Ilya; Kostyukhin, Vadim; Krieger, Nina; Krüger, Hans; Kruth, Andre; Kugel, Andreas; Kuykendall, William; La Rosa, Alessandro; Lai, Chung-Hang; Lantzsch, Kerstin; Laporte, Didier; Lapsien, Tobias; Lounis, abdenour; Lozano, Manuel; Lu, Yunpeng; Lubatti, Henry; Macchiolo, Anna; Mallik, Usha; Mandić, Igor; Marchand, Denis; Marchiori, Giovanni; Massol, Nicolas; Matthias, Wittgen; Mättig, Peter; Mekkaoui, Abderrazak; Menouni, Mohsine; Menu, Johann; Meroni, Chiara; Mesa, Javier; Micelli, Andrea; Michal, Sébastien; Miglioranzi, Silvia; Mikuž, Marko; Mitsui, Shingo; Monti, Mauro; Moore, J; Morettini, Paolo; Muenstermann, Daniel; Murray, Peyton; Nellist, Clara; Nelson, David J; Nessi, Marzio; Neumann, Manuel; Nisius, Richard; Nordberg, Markus; Nuiry, Francois-Xavier; Oppermann, Hermann; Oriunno, Marco; Padilla, Cristobal; Parker, Sherwood; Pellegrini, Giulio; Pelleriti, Gabriel; Pernegger, Heinz; Piacquadio, Nicola Giacinto; Picazio, Attilio; Pohl, David; Polini, Alessandro; Popule, Jiří; Portell Bueso, Xavier; Povoli, Marco; Puldon, David; Pylypchenko, Yuriy; Quadt, Arnulf; Quirion, David; Ragusa, Francesco; Rambure, Thibaut; Richards, Erik; Ristic, Branislav; Røhne, Ole; Rothermund, Mario; Rovani, Alessandro; Rozanov, Alexandre; Rubinskiy, Igor; Rudolph, Matthew Scott; Rummler, André; Ruscino, Ettore; Salek, David; Salzburger, Andreas; Sandaker, Heidi; Schipper, Jan-David; Schneider, Basil; Schorlemmer, Andre; Schroer, Nicolai; Schwemling, Philippe; Seidel, Sally; Seiden, Abraham; Šícho, Petr; Skubic, Patrick; Sloboda, Michal; Smith, D; Sood, Alex; Spencer, Edwin; Strang, Michael; Stugu, Bjarne; Stupak, John; Su, Dong; Takubo, Yosuke; Tassan, Jean; Teng, Ping-Kun; Terada, Susumu; Todorov, Theodore; Tomášek, Michal; Toms, Konstantin; Travaglini, Riccardo; Trischuk, William; Troncon, Clara; Troska, Georg; Tsiskaridze, Shota; Tsurin, Ilya; Tsybychev, Dmitri; Unno, Yoshinobu; Vacavant, Laurent; Verlaat, Bart; Vianello, Elisa; Vigeolas, Eric; von Kleist, Stephan; Vrba, Václav; Vuillermet, Raphaël; Wang, Rui; Watts, Stephen; Weber, Michele; Weber, Marteen; Weigell, Philipp; Weingarten, Jens; Welch, Steven David; Wenig, Siegfried; Wermes, Norbert; Wiese, Andreas; Wittig, Tobias; Yildizkaya, Tamer; Zeitnitz, Christian; Ziolkowski, Michal; Zivkovic, Vladimir; Zoccoli, Antonio; Zorzi, Nicola; Zwalinski, Lukasz

    2012-01-01

    The ATLAS Collaboration will upgrade its semiconductor pixel tracking detector with a new Insertable B-layer (IBL) between the existing pixel detector and the vacuum pipe of the Large Hadron Collider. The extreme operating conditions at this location have necessitated the development of new radiation hard pixel sensor technologies and a new front-end readout chip, called the FE-I4. Planar pixel sensors and 3D pixel sensors have been investigated to equip this new pixel layer, and prototype modules using the FE-I4A have been fabricated and characterized using 120 GeV pions at the CERN SPS and 4 GeV positrons at DESY, before and after module irradiation. Beam test results are presented, including charge collection efficiency, tracking efficiency and charge sharing.

  9. Performance Studies of Pixel Hybrid Photon Detectors for the LHCb RICH Counters

    CERN Document Server

    Aglieri Rinella, G; Piedigrossi, D; Van Lysebetten, A

    2004-01-01

    The Pixel Hybrid Photon Detector is a vacuum tube with a multi-alkali photo cathode, high voltage cross-focused electron optics and an anode consisting of a silicon pixel detector bump-bonded to a readout CMOS electronic chip fully encapsulated in the device. The Pixel HPD fulfils the requirements of the Ring Imaging Cherenkov counters of the LHCb experiment at LHC. The performances of the Pixel HPD will be discussed with reference to laboratory measurements, Cherenkov light imaging in recent beam tests, image distortions due to a magnetic field.

  10. Performance studies of pixel hybrid photon detectors for the LHCb RICH counters

    CERN Document Server

    Aglieri-Rinella, G; Piedigrossi, D; Van Lysebetten, A

    2006-01-01

    The Pixel Hybrid Photon Detector is a vacuum tube with a multi-alkali photo cathode, high voltage cross-focused electron optics and an anode consisting of a silicon pixel detector bump-bonded to a readout CMOS electronic chip fully encapsulated in the device. The Pixel HPD fulfils the requirements of the Ring Imaging Cherenkov counters of the LHCb experiment at LHC. The performances of the Pixel HPD will be discussed with reference to laboratory measurements, Cherenkov light imaging in recent beam tests, image distortions due to a magnetic field.

  11. Thin hybrid pixel assembly fabrication development with backside compensation layer

    Science.gov (United States)

    Bates, R.; Buttar, C.; McMullen, T.; Cunningham, L.; Ashby, J.; Doherty, F.; Pares, G.; Vignoud, L.; Kholti, B.; Vahanen, S.

    2017-02-01

    The ATLAS and CMS experiments will both replace their entire tracking systems for operation at the HL-LHC in 2026. This will include a significantly larger pixel systems, for example, for ATLAS approximately 15 m2. To keep the tracker material budget low it is crucial to minimize the mass of the pixel modules via thinning both the sensor and readout chip to about 150 μm each. The bump yield of thin module assemblies using solder based bump bonding can be problematic due to wafer bowing during solder reflow at high temperature. A new bump-bonding process using backside compensation on the readout chip to address the issue of low yield will be presented. The objective is to compensate dynamically the stress of the front side stack by adding a compensating layer to the backside of the wafer. A SiN and Al:Si stack has been chosen for the backside layer. The bow reducing effect of applying a backside compensation layer will be demonstrated using the FE-I4 wafer. The world's first results from assemblies produced from readout wafers thinned to 100 μm with a stress compensation layer are presented with bond yields close to 100% measured using the FE-I4 readout chip.

  12. Timing and Readout Contorl in the LHCb Upgraded Readout System

    CERN Document Server

    Alessio, Federico

    2016-01-01

    In 2019, the LHCb experiment at CERN will undergo a major upgrade where its detectors electronics and entire readout system will be changed to read-out events at the full LHC rate of 40 MHz. In this paper, the new timing, trigger and readout control system for such upgrade is reviewed. Particular attention is given to the distribution of the clock, timing and synchronization information across the entire readout system using generic FTTH technology like Passive Optical Networks. Moreover the system will be responsible to generically control the Front-End electronics by transmitting configuration data and receiving monitoring data, offloading the software control system from the heavy task of manipulating complex protocols of thousands of Front-End electronics devices. The way in which this was implemented is here reviewed with a description of results from first implementations of the system, including usages in test-benches, implementation of techniques for timing distribution and latency control."

  13. The pixelated detector

    CERN Multimedia

    Sutton, C

    1990-01-01

    "Collecting data as patterns of light or subatomic particles is vitally important in all the sciences. The new generation of solid-state detectors called pixel devices could transform experimental research at all levels" (4 pages).

  14. Assembly procedure of the module (half-stave) of the ALICE Silicon Pixel Detector

    CERN Document Server

    Caselle, M; Antinori, F; Burns, M; Campbell, M; Chochula, P; Dinapoli, R; Elia, D; Formenti, F; Fini, R A; Ghidini, B; Kluge, A; Lenti, V; Manzari, V; Meddi, F; Morel, M; Navach, F; Nilsson, P; Pepato, Adriano; Riedler, P; Santoro, R; Stefanini, G; Viesti, G; Wyllie, K

    2004-01-01

    The Silicon Pixel Detector (SPD) forms the two innermost layers of the ALICE Inner Tracking System (ITS). The detector includes 1200 readout ASICs, each containing 8192 pixel cells, bump-bonded to Si sensor elements. The thickness of the readout chip and the sensor element is 150mum and 200mum, respectively. Low-mass solutions are implemented for the bus and the mechanical support. In this contribution, we describe the basic module (half-stave) of the two SPD layers and we give an overview of its assembly procedure.

  15. FE-I4 pixel chip characterization with USBpix3 test system

    Energy Technology Data Exchange (ETDEWEB)

    Filimonov, Viacheslav; Gonella, Laura; Hemperek, Tomasz; Huegging, Fabian; Janssen, Jens; Krueger, Hans; Pohl, David-Leon; Wermes, Norbert [University of Bonn, Bonn (Germany)

    2015-07-01

    The USBpix readout system is a small and light weighting test system for the ATLAS pixel readout chips. It is widely used to operate and characterize FE-I4 pixel modules in lab and test beam environments. For multi-chip modules the resources on the Multi-IO board, that is the central control unit of the readout system, are coming to their limits, which makes the simultaneous readout of more than one chip at a time challenging. Therefore an upgrade of the current USBpix system has been developed. The upgraded system is called USBpix3 - the main focus of the talk. Characterization of single chip FE-I4 modules was performed with USBpix3 prototype (digital, analog, threshold and source scans; tuning). PyBAR (Bonn ATLAS Readout in Python scripting language) was used as readout software. PyBAR consists of FEI4 DAQ and Data Analysis Libraries in Python. The presentation describes the USBpix3 system, results of FE-I4 modules characterization and preparation for the multi-chip module and multi-module readout with USBpix3.

  16. A two-dimensional position sensitive gas chamber with scanned charge transfer readout

    Science.gov (United States)

    Gómez, F.; Iglesias, A.; Lobato, R.; Mosquera, J.; Pardo, J.; Pena, J.; Pazos, A.; Pombar, M.; Rodríguez, A.

    2003-10-01

    We have constructed and tested a two-dimensional position sensitive parallel-plate gas ionization chamber with scanned charge transfer readout. The scan readout method described here is based on the development of a new position-dependent charge transfer technique. It has been implemented by using gate strips perpendicularly oriented to the collector strips. This solution reduces considerably the number of electronic readout channels needed to cover large detector areas. The use of a 25 μm thick kapton etched circuit allows high charge transfer efficiency with a low gating voltage, consequently needing a very simple commutating circuit. The present prototype covers 8×8 cm2 with a pixel size of 1.27×1.27 mm2. Depending on the intended use and beam characteristics a smaller effective pixel is feasible and larger active areas are possible. This detector can be used for X-ray or other continuous beam intensity profile monitoring.

  17. Processing and characterization of a MEDIPIX2-compatible silicon sensor with 220 {mu}m pixel size

    Energy Technology Data Exchange (ETDEWEB)

    Froejdh, Anna; Froejdh, Erik; Thungstroem, Goeran; Froejdh, Christer [Department of Information Technology and Media, Mid-Sweden University, SE-85170 Sundsvall (Sweden); Norlin, Boerje, E-mail: Borje.Norlin@miun.se [Department of Information Technology and Media, Mid-Sweden University, SE-85170 Sundsvall (Sweden)

    2011-05-15

    Pixellated silicon detectors with a pixel size of 220 {mu}m have been fabricated at Mid-Sweden University. The purpose was to make a detector compatible with the MEDIPIX2 readout chip with pixels large enough to avoid charge sharing to do spectral imaging. Two different guard ring structures have been tested to investigate leakage current and interpixel isolation in a sensor made on high resistivity silicon.

  18. New Subarray Readout Patterns for the ACS Wide Field Channel

    Science.gov (United States)

    Golimowski, D.; Anderson, J.; Arslanian, S.; Chiaberge, M.; Grogin, N.; Lim, Pey Lian; Lupie, O.; McMaster, M.; Reinhart, M.; Schiffer, F.; Serrano, B.; Van Marshall, M.; Welty, A.

    2017-04-01

    At the start of Cycle 24, the original CCD-readout timing patterns used to generate ACS Wide Field Channel (WFC) subarray images were replaced with new patterns adapted from the four-quadrant readout pattern used to generate full-frame WFC images. The primary motivation for this replacement was a substantial reduction of observatory and staff resources needed to support WFC subarray bias calibration, which became a new and challenging obligation after the installation of the ACS CCD Electronics Box Replacement during Servicing Mission 4. The new readout patterns also improve the overall efficiency of observing with WFC subarrays and enable the processing of subarray images through stages of the ACS data calibration pipeline (calacs) that were previously restricted to full-frame WFC images. The new readout patterns replace the original 512×512, 1024×1024, and 2048×2046-pixel subarrays with subarrays having 2048 columns and 512, 1024, and 2048 rows, respectively. Whereas the original square subarrays were limited to certain WFC quadrants, the new rectangular subarrays are available in all four quadrants. The underlying bias structure of the new subarrays now conforms with those of the corresponding regions of the full-frame image, which allows raw frames in all image formats to be calibrated using one contemporaneous full-frame "superbias" reference image. The original subarrays remain available for scientific use, but calibration of these image formats is no longer supported by STScI.

  19. Thermopile Area Array Readout Project

    Data.gov (United States)

    National Aeronautics and Space Administration — NASA/JPL thermopile detector linear arrays, wire bonded to Black Forest Engineering (BFE) CMOS readout integrated circuits (ROICs), have been utilized in NASA...

  20. A ten thousand frames per second readout MAPS for the EUDET beam telescope

    CERN Document Server

    Hu-Guo, C; Bertolone, G; Besson, A; Brogna, A S; Colledani, C; Claus, G; De Masi, R; Degerli, Y; Dorokhov, A; Doziere, G; Dulinski, W; Fang, X; Gelin, M; Goffea, M; Guillouxb, F; Himmi, A; Jaaskelainen, K; Koziel, M; Morel, F; Orsini, F; Santos, G; Specht, M; Sun, Q; Torheim, O; Valin, I; Voutsinas, Y; Wintera, M

    2009-01-01

    Designed and manufactured in a commercial CMOS 0.35 μm OPTO process for equipping the EUDET beam telescope, MIMOSA26 is the first reticule size pixel sensor with digital output and integrated zero suppression. It features a matrix of pixels with 576 rows and 1152 columns, covering an active area of ~224 mm2. A single point resolution of about 4 μm was obtained with a pixel pitch of 18.4 μm. Its architecture allows a fast readout frequency of ~10 k frames/s. The paper describes the chip design, test and major characterisation outcome.

  1. Performance study of new pixel hybrid photon detector prototypes for the LHCb RICH counters

    CERN Document Server

    Moritz, M; Allebone, L; Campbell, M; Gys, Thierry; Newby, C; Pickford, A; Piedigrossi, D; Wyllie, K

    2004-01-01

    A pixel Hybrid Photon Detector was developed according to the specific requirements of the LHCb ring imaging Cerenkov counters. This detector comprises a silicon pixel detector bump-bonded to a binary readout chip to achieve a 25 ns fast readout and a high signal-to-noise ratio. The detector performance was characterized by varying the pixel threshold, the tube high voltage, the silicon bias voltage and by the determination of the photoelectron detection efficiency. Furthermore accelerated aging and high pixel occupancy tests were performed to verify the long term stability. The results were obtained using Cerenkov light and a fast pulsed light emitting diode. All measurements results are within the expectations and fulfill the design goals. (8 refs).

  2. Module Production and Qualification for the Phase I Upgrade of the CMS Pixel Detector

    CERN Document Server

    AUTHOR|(CDS)2086689

    2015-01-01

    After consolidation of the LHC in 2013/14 its centre-of-mass energy will increase to 13TeV and the luminosity will reach $2 \\cdot 10^{34}\\, \\textnormal{cm}^{-2} \\textnormal{s}^{-1}$, which is twice the design luminosity. The latter will result in more simultaneous particle collisions, which would significantly increase the dead time of the current readout chip of the CMS pixel detector. Therefore the entire CMS pixel detector is replaced in 2016/17 and a new digital readout with larger buffers will be used to handle increasing pixel hit rates. An additional fourth barrel-layer provides more space points to improve track reconstruction. Half of the required modules for layer four is being produced at Karlsruhe Institute of Technology (KIT). This poster deals with the smallest discrete subunit of the pixel detector, the module and its assembly process. Moreover first production experience will be shown.

  3. Fast, High-Precision Readout Circuit for Detector Arrays

    Science.gov (United States)

    Rider, David M.; Hancock, Bruce R.; Key, Richard W.; Cunningham, Thomas J.; Wrigley, Chris J.; Seshadri, Suresh; Sander, Stanley P.; Blavier, Jean-Francois L.

    2013-01-01

    The GEO-CAPE mission described in NASA's Earth Science and Applications Decadal Survey requires high spatial, temporal, and spectral resolution measurements to monitor and characterize the rapidly changing chemistry of the troposphere over North and South Americas. High-frame-rate focal plane arrays (FPAs) with many pixels are needed to enable such measurements. A high-throughput digital detector readout integrated circuit (ROIC) that meets the GEO-CAPE FPA needs has been developed, fabricated, and tested. The ROIC is based on an innovative charge integrating, fast, high-precision analog-to-digital circuit that is built into each pixel. The 128×128-pixel ROIC digitizes all 16,384 pixels simultaneously at frame rates up to 16 kHz to provide a completely digital output on a single integrated circuit at an unprecedented rate of 262 million pixels per second. The approach eliminates the need for off focal plane electronics, greatly reducing volume, mass, and power compared to conventional FPA implementations. A focal plane based on this ROIC will require less than 2 W of power on a 1×1-cm integrated circuit. The ROIC is fabricated of silicon using CMOS technology. It is designed to be indium bump bonded to a variety of detector materials including silicon PIN diodes, indium antimonide (InSb), indium gallium arsenide (In- GaAs), and mercury cadmium telluride (HgCdTe) detector arrays to provide coverage over a broad spectral range in the infrared, visible, and ultraviolet spectral ranges.

  4. SLIM5 beam test results for thin striplet detector and fast readout beam telescope

    Energy Technology Data Exchange (ETDEWEB)

    Vitale, Lorenzo, E-mail: lorenzo.vitale@ts.infn.i [Universita degli Studi di Trieste and INFN-Trieste (Italy); Bruschi, M.; Di Sipio, R.; Fabbri, L.; Giacobbe, B.; Gabrielli, A.; Giorgi, F.; Pellegrini, G.; Sbarra, C.; Semprini, N.; Spighi, R.; Valentinetti, S.; Villa, M.; Zoccoli, A. [Universita degli Studi di Bologna and INFN-Bologna (Italy); Avanzini, C.; Batignani, G.; Bettarini, S.; Bosi, F.; Calderini, G.; Ceccanti, M. [Universita degli Studi di Pisa and INFN-Pisa (Italy)

    2010-05-21

    In September 2008 the SLIM5 collaboration submitted a low material budget silicon demonstrator to test with 12 GeV/c protons, at the PS-T9 test-beam at CERN. Two different detectors were placed as DUTs inside a high-resolution and fast-readout beam telescope. The first DUT was a high resistivity double sided silicon detector, with short strips ('striplets') and with reduced thickness, at 45{sup 0} angle to the detector's edge, readout by the data-driven FSSR2 chip. The other one was a 4k-Pixel Matrix of Deep N Well MAPS, developed in a 130 nm CMOS Technology, providing digital sparsified readout. In the following, I present the striplets and also the beam telescope characteristics, with some details about the frontend readout (based on the FSSR2 chip) and some preliminary results of the data-analysis.

  5. Readout of two-kilopixel transition-edge sensor arrays for Advanced ACTPol

    CERN Document Server

    Henderson, Shawn W; Amiri, Mandana; Austermann, Jason; Beall, James A; Chaudhuri, Saptarshi; Cho, Hsiao-Mei; Choi, Steve K; Cothard, Nicholas F; Crowley, Kevin T; Duff, Shannon M; Fitzgerald, Colin P; Gallardo, Patricio A; Halpern, Mark; Hasselfield, Matthew; Hilton, Gene; Ho, Shuay-Pwu Patty; Hubmayr, Johannes; Irwin, Kent D; Koopman, Brian J; Li, Dale; Li, Yaqiong; McMahon, Jeff; Nati, Federico; Niemack, Michael D; Reintsema, Carl D; Salatino, Maria; Schillaci, Alessandro; Schmitt, Benjamin L; Simon, Sara M; Staggs, Suzanne T; Vavagiakis, Eve M; Ward, Jonathan T

    2016-01-01

    Advanced ACTPol is an instrument upgrade for the six-meter Atacama Cosmology Telescope (ACT) designed to measure the cosmic microwave background (CMB) temperature and polarization with arcminute-scale angular resolution. To achieve its science goals, Advanced ACTPol utilizes a larger readout multiplexing factor than any previous CMB experiment to measure detector arrays with approximately two thousand transition-edge sensor (TES) bolometers in each 150 mm detector wafer. We present the implementation and testing of the Advanced ACTPol time-division multiplexing readout architecture with a 64-row multiplexing factor. This includes testing of individual multichroic detector pixels and superconducting quantum interference device (SQUID) multiplexing chips as well as testing and optimizing of the integrated readout electronics. In particular, we describe the new automated multiplexing SQUID tuning procedure developed to select and optimize the thousands of SQUID parameters required to readout each Advanced ACTPol...

  6. Cool Timepix – Electronic noise of the Timepix readout chip down to −125 °C

    Energy Technology Data Exchange (ETDEWEB)

    Schön, R., E-mail: rolfs@nikhef.nl; Alfonsi, M.; Bakel, N. van; Beuzekom, M. van; Koffeman, E.

    2015-01-21

    The Timepix readout chip with its 65k pixels on a sensitive area of 14 mm×14 mm provides a fine spatial resolution for particle tracking or medical imaging. We explore the operation of Timepix in a dual-phase xenon environment (around −110 °C). Used in dual-phase xenon time projection chambers, e.g. for dark matter search experiments, the readout must have a sufficiently low detection limit for small energy deposits. We measured the electronic pixel noise of three bare Timepix chips. For the first time Timepix readout chips were cooled to temperatures as low as −125 °C. In this work, we present the results of analysing noise transition curves recorded while applying a well-defined charge to the pixel's input. The electronic noise reduces to an average of 99e{sup −}, a reduction of 23% compared to operation at room temperature.

  7. Noise Reduction Effect of Multiple-Sampling-Based Signal-Readout Circuits for Ultra-Low Noise CMOS Image Sensors

    OpenAIRE

    Shoji Kawahito; Min-Woong Seo

    2016-01-01

    This paper discusses the noise reduction effect of multiple-sampling-based signal readout circuits for implementing ultra-low-noise image sensors. The correlated multiple sampling (CMS) technique has recently become an important technology for high-gain column readout circuits in low-noise CMOS image sensors (CISs). This paper reveals how the column CMS circuits, together with a pixel having a high-conversion-gain charge detector and low-noise transistor, realizes deep sub-electron read noise...

  8. Module and Electronics Developments for the ATLAS ITK Pixel System

    CERN Document Server

    Nellist, Clara; The ATLAS collaboration

    2016-01-01

    ATLAS is preparing for an extensive modification of its detector in the course of the planned HL-LHC accelerator upgrade around 2025 which includes a replacement of the entire tracking system by an all-silicon detector (Inner Tracker, ITk). The five innermost layers of ITk will comprise of a pixel detector built of new sensor and readout electronics technologies to improve the tracking performance and cope with the severe HL-LHC environment in terms of occupancy and radiation. The total area of the new pixel system could measure up to 14 m$^{2}$, depending on the final layout choice that is expected to take place in early 2017. An intense R\\&D activity is taking place in the field of planar, 3D, CMOS sensors to identify the optimal technology for the different pixel layers. In parallel various sensor-chip interconnection options are explored to identify reliable technologies when employing 100-150~$\\mu$m thin chips. While the new read-out chip is being developed by the RD53 Collaboration, the pixel off de...

  9. Phase 1 upgrade of the CMS Pixel Detector

    CERN Document Server

    Saha, Anirban

    2016-01-01

    The pixel tracker of the Compact Muon Solenoid (CMS) experiment is the innermost sub-detector, located close to the collision point, and is used for reconstruction of the tracks and vertices of charged particles. The present pixel detector was designed to work efficiently with the maximum instantaneous luminosity of $\\rm 1 \\times 10^{34}$ cm$^{-2}$ s$^{-1}$. In 2017 the Large Hadron Collider (LHC) is expected to deliver a peak luminosity reaching up to $\\rm 2\\times10^{34} cm^{-2}s^{-1}$, increasing the mean number of primary vertices to 50. Due to the radiation damage and significant data losses due to high occupancy in the readout chip of the pixel detector, the present system must be replaced by a new one in an extended end-of-year shutdown during winter 2016/2017 in order to maintain the excellent tracking and other physics performances. The main new features of the upgraded pixel detector are the a ultra-light mechanical design with four barrel layers and three end-cap disks, digital readout chip with hi...

  10. Phase 1 upgrade of the CMS pixel detector

    Science.gov (United States)

    Saha, Anirban

    2017-02-01

    The pixel tracker of the Compact Muon Solenoid (CMS) experiment is the innermost sub-detector, located close to the collision point, and is used for reconstruction of the tracks and vertices of charged particles. The present pixel detector was designed to work efficiently with the maximum instantaneous luminosity of 1 × 1034 cm‑2 s‑1. In 2017 the Large Hadron Collider (LHC) is expected to deliver a peak luminosity reaching up to 2 × 1034 cm‑2 s‑1, increasing the mean number of primary vertices to 50. Due to the radiation damage and significant data losses due to high occupancy in the readout chip of the pixel detector, the present system must be replaced by a new one in an extended end-of-year shutdown during winter 2016/2017 in order to maintain the excellent tracking and other physics performances. The main new features of the upgraded pixel detector are a ultra-light mechanical design with four barrel layers and three end-cap disks, digital readout chip with higher rate capability and a new cooling system. In this document, we discuss the motivations for the upgrade, the design, and technological choices made, the status of the construction of the new detector and the future plans for the installation and commissioning.

  11. An EUDET/AIDA Pixel Beam Telescope for Detector Development

    CERN Document Server

    Perrey, Hanno

    2013-01-01

    A high resolution ($\\sigma 2 \\sim \\mu$) beam telescope based on monolithic active pixel sensors (MAPS) was developed within the EUDET collaboration. The telescope consists of six sensor planes using Mimosa26 MAPS with a pixel pitch of $18.4 \\mu$ and thinned down to $50 \\mu$. The excellent resolution, readout rate and DAQ integration capabilities made the telescope a primary test beam tool for many groups including several CERN based experiments. Within the new European detector infrastructure project AIDA the test beam telescope will be further extended in terms of cooling infrastructure, readout speed and precision. In order to provide a system optimized for the different requirements by the user community, a combination of various pixel technologies is foreseen. In this report the design of this even more flexible telescope with three different pixel technologies (TimePix, Mimosa, ATLAS FE-I4) will be presented. First test beam results with the HitOR signal provided by the FE-I4 integrated into the trigger...

  12. An EUDET/AIDA Pixel Beam Telescope for Detector Development

    CERN Document Server

    Rubinskiy, I

    2015-01-01

    A high resolution (σ∼2μm) beam telescope based on monolithic active pixel sensors (MAPS) was developed within the EUDET collaboration. The telescope consists of six monolithic active pixel sensor planes (Mimosa26) with a pixel pitch of 18.4 \\mu m and thinned down to 50 \\mu m. The excellent resolution, readout rate and DAQ integration capabilities made the telescope a primary test beam tool for many groups including several CERN based experiments. Within the European detector infrastructure project AIDA the test beam telescope is being further extended in terms of cooling and powering infrastructure, read-out speed, area of acceptance, and precision. In order to provide a system optimized for the different requirements by the user community a combination of various state-of-the-art pixel technologies is foreseen. Furthermore, new central dead-time-free trigger logic unit (TLU) has been developed to provide LHC-speed response with one-trigger-per-particle operating mode and a synchronous clock for all conn...

  13. Electron imaging with Medipix2 hybrid pixel detector

    CERN Document Server

    McMullan, G; Chen, S; Henderson, R; Llopart, X; Summerfield, C; Tlustos, L; Faruqi, A R

    2007-01-01

    The electron imaging performance of Medipix2 is described. Medipix2 is a hybrid pixel detector composed of two layers. It has a sensor layer and a layer of readout electronics, in which each 55 μm×55 μm pixel has upper and lower energy discrimination and MHz rate counting. The sensor layer consists of a 300 μm slab of pixellated monolithic silicon and this is bonded to the readout chip. Experimental measurement of the detective quantum efficiency, DQE(0) at 120 keV shows that it can reach 85% independent of electron exposure, since the detector has zero noise, and the DQE(Nyquist) can reach 35% of that expected for a perfect detector (4/π2). Experimental measurement of the modulation transfer function (MTF) at Nyquist resolution for 120 keV electrons using a 60 keV lower energy threshold, yields a value that is 50% of that expected for a perfect detector (2/π). Finally, Monte Carlo simulations of electron tracks and energy deposited in adjacent pixels have been performed and used to calculate expected v...

  14. CMOS VLSI Active-Pixel Sensor for Tracking

    Science.gov (United States)

    Pain, Bedabrata; Sun, Chao; Yang, Guang; Heynssens, Julie

    2004-01-01

    An architecture for a proposed active-pixel sensor (APS) and a design to implement the architecture in a complementary metal oxide semiconductor (CMOS) very-large-scale integrated (VLSI) circuit provide for some advanced features that are expected to be especially desirable for tracking pointlike features of stars. The architecture would also make this APS suitable for robotic- vision and general pointing and tracking applications. CMOS imagers in general are well suited for pointing and tracking because they can be configured for random access to selected pixels and to provide readout from windows of interest within their fields of view. However, until now, the architectures of CMOS imagers have not supported multiwindow operation or low-noise data collection. Moreover, smearing and motion artifacts in collected images have made prior CMOS imagers unsuitable for tracking applications. The proposed CMOS imager (see figure) would include an array of 1,024 by 1,024 pixels containing high-performance photodiode-based APS circuitry. The pixel pitch would be 9 m. The operations of the pixel circuits would be sequenced and otherwise controlled by an on-chip timing and control block, which would enable the collection of image data, during a single frame period, from either the full frame (that is, all 1,024 1,024 pixels) or from within as many as 8 different arbitrarily placed windows as large as 8 by 8 pixels each. A typical prior CMOS APS operates in a row-at-a-time ( grolling-shutter h) readout mode, which gives rise to exposure skew. In contrast, the proposed APS would operate in a sample-first/readlater mode, suppressing rolling-shutter effects. In this mode, the analog readout signals from the pixels corresponding to the windows of the interest (which windows, in the star-tracking application, would presumably contain guide stars) would be sampled rapidly by routing them through a programmable diagonal switch array to an on-chip parallel analog memory array. The

  15. The Belle II DEPFET pixel detector

    Energy Technology Data Exchange (ETDEWEB)

    Moser, Hans-Günther, E-mail: moser@mpp.mpg.de

    2016-09-21

    The Belle II experiment at KEK (Tsukuba, Japan) will explore heavy flavour physics (B, charm and tau) at the starting of 2018 with unprecedented precision. Charged particles are tracked by a two-layer DEPFET pixel device (PXD), a four-layer silicon strip detector (SVD) and the central drift chamber (CDC). The PXD will consist of two layers at radii of 14 mm and 22 mm with 8 and 12 ladders, respectively. The pixel sizes will vary, between 50 μm×(55–60) μm in the first layer and between 50 μm×(70–85) μm in the second layer, to optimize the charge sharing efficiency. These innermost layers have to cope with high background occupancy, high radiation and must have minimal material to reduce multiple scattering. These challenges are met using the DEPFET technology. Each pixel is a FET integrated on a fully depleted silicon bulk. The signal charge collected in the ‘internal gate’ modulates the FET current resulting in a first stage amplification and therefore very low noise. This allows very thin sensors (75 μm) reducing the overall material budget of the detector (0.21% X{sub 0}). Four fold multiplexing of the column parallel readout allows read out a full frame of the pixel matrix in only 20 μs while keeping the power consumption low enough for air cooling. Only the active electronics outside the detector acceptance has to be cooled actively with a two phase CO{sub 2} system. Furthermore the DEPFET technology offers the unique feature of an electronic shutter which allows the detector to operate efficiently in the continuous injection mode of superKEKB.

  16. The Belle II DEPFET pixel detector

    Science.gov (United States)

    Moser, Hans-Günther

    2016-09-01

    The Belle II experiment at KEK (Tsukuba, Japan) will explore heavy flavour physics (B, charm and tau) at the starting of 2018 with unprecedented precision. Charged particles are tracked by a two-layer DEPFET pixel device (PXD), a four-layer silicon strip detector (SVD) and the central drift chamber (CDC). The PXD will consist of two layers at radii of 14 mm and 22 mm with 8 and 12 ladders, respectively. The pixel sizes will vary, between 50 μm×(55-60) μm in the first layer and between 50 μm×(70-85) μm in the second layer, to optimize the charge sharing efficiency. These innermost layers have to cope with high background occupancy, high radiation and must have minimal material to reduce multiple scattering. These challenges are met using the DEPFET technology. Each pixel is a FET integrated on a fully depleted silicon bulk. The signal charge collected in the 'internal gate' modulates the FET current resulting in a first stage amplification and therefore very low noise. This allows very thin sensors (75 μm) reducing the overall material budget of the detector (0.21% X0). Four fold multiplexing of the column parallel readout allows read out a full frame of the pixel matrix in only 20 μs while keeping the power consumption low enough for air cooling. Only the active electronics outside the detector acceptance has to be cooled actively with a two phase CO2 system. Furthermore the DEPFET technology offers the unique feature of an electronic shutter which allows the detector to operate efficiently in the continuous injection mode of superKEKB.

  17. Characterization of Pixel Sensors

    CERN Document Server

    Oliveira, Felipe Ferraz

    2017-01-01

    It was commissioned at CERN ATLAS pixel group a fluorescence setup for characterization of pixel sensors. The idea is to measure the energies of different targets to calibrate your sensor. It was measured four matrices (80, 95, 98 and 106) of the Investigator1 sensor with different deep PW using copper, iron and titanium as target materials. The matrix 80 has a higher gain (0.065 ± 0.002) and matrix 106 has a better energy resolution (0.05 ± 0.04). The noise of the setup is around 3.6 mV .

  18. Data acquisition at the front-end of the Mu3e pixel detector

    Energy Technology Data Exchange (ETDEWEB)

    Perrevoort, Ann-Kathrin [Physikalisches Institut, Universitaet Heidelberg (Germany); Collaboration: Mu3e-Collaboration

    2016-07-01

    The Mu3e experiment - searching for the lepton-flavour violating decay of the muon into three electrons at an unprecedented sensitivity of one in 10{sup 16} decays - is based on a pixel tracking detector. The sensors are High-Voltage Monolithic Active Pixel Sensors, a technology which allows for very fast and thin detectors, and thus is an ideal fit for Mu3e where the trajectories of low-momentum electrons at high rates are to be measured. The detector will consist of about 275 million pixels and will be operated at up to 10{sup 9} muon stops per second. Therefore, a fast and trigger-less data readout is required. The pixel sensors feature zero-suppressed data output via high-speed serial links. The data is then buffered and sorted by time on a FPGA on the front-end before being processed to the following readout stage. In this talk, the readout of the Mu3e pixel detector at the front-end is introduced. Furthermore, a first firmware implementation of this concept in a beam telescope consisting of the current pixel sensor prototype MuPix7 is presented.

  19. Tracking performance of a single-crystal and a polycrystalline diamond pixel-detector

    Energy Technology Data Exchange (ETDEWEB)

    Menasce, D.; et al.

    2013-06-01

    We present a comparative characterization of the performance of a single-crystal and a polycrystalline diamond pixel-detector employing the standard CMS pixel readout chips. Measurements were carried out at the Fermilab Test Beam Facility, FTBF, using protons of momentum 120 GeV/c tracked by a high-resolution pixel telescope. Particular attention was directed to the study of the charge-collection, the charge-sharing among adjacent pixels and the achievable position resolution. The performance of the single-crystal detector was excellent and comparable to the best available silicon pixel-detectors. The measured average detection-efficiency was near unity, ε = 0.99860±0.00006, and the position-resolution for shared hits was about 6 μm. On the other hand, the performance of the polycrystalline detector was hampered by its lower charge collection distance and the readout chip threshold. A new readout chip, capable of operating at much lower threshold (around 1 ke$-$), would be required to fully exploit the potential performance of the polycrystalline diamond pixel-detector.

  20. Planar Pixel Sensors for the ATLAS Upgrade: Beam Tests results

    CERN Document Server

    Weingarten, J; Beimforde, M; Benoit, M; Bomben, M; Calderini, G; Gallrapp, C; George, M; Gibson, S; Grinstein, S; Janoska, Z; Jentzsch, J; Jinnouchi, O; Kishida, T; La Rosa, A; Libov, V; Macchiolo, A; Marchiori, G; Münstermann, D; Nagai, R; Piacquadio, G; Ristic, B; Rubinskiy, I; Rummler, A; Takubo, Y; Troska, G; Tsiskaridtze, S; Tsurin, I; Unno, Y; Weigel, P; Wittig, T

    2012-01-01

    Results of beam tests with planar silicon pixel sensors aimed towards the ATLAS Insertable B-Layer and High Luminosity LHC (HL-LHC) upgrades are presented. Measurements include spatial resolution, charge collection performance and charge sharing between neighbouring cells as a function of track incidence angle for different bulk materials. Measurements of n-in-n pixel sensors are presented as a function of fluence for different irradiations. Furthermore p-type silicon sensors from several vendors with slightly differing layouts were tested. All tested sensors were connected by bump-bonding to the ATLAS Pixel read-out chip. We show that both n-type and p-type tested planar sensors are able to collect significant charge even after integrated fluences expected at HL-LHC.

  1. The first bump-bonded pixel detectors on CVD diamond

    Energy Technology Data Exchange (ETDEWEB)

    Adam, W.; Bauer, C.; Berdermann, E.; Bergonzo, P.; Bogani, F.; Borchi, E.; Brambilla, A.; Bruzzi, M.; Colledani, C.; Conway, J.; Dabrowski, W.; Delpierre, P.; Deneuville, A.; Dulinski, W.; Eijk, B. van; Fallou, A.; Fizzotti, F.; Foulon, F.; Friedl, M.; Gan, K.K.; Gheeraert, E.; Grigoriev, E.; Hallewell, G.; Hall-Wilton, R.; Han, S.; Hartjes, F.; Hrubec, J.; Husson, D.; Kagan, H.; Kania, D.; Kaplon, J.; Karl, C.; Kass, R.; Krammer, M.; Logiudice, A.; Lu, R.; Manfredi, P.F.; Manfredotti, C.; Marshall, R.D.; Meier, D.; Mishina, M.; Oh, A.; Palmieri, V.G.; Pan, L.S.; Peitz, A.; Pernicka, M.; Pirollo, S.; Polesello, P.; Pretzl, K.; Re, V.; Riester, J.L.; Roe, S.; Roff, D.; Rudge, A.; Schnetzer, S.; Sciortino, S.; Speziali, V.; Stelzer, H.; Steuerer, J.; Stone, R.; Tapper, R.J.; Tesarek, R.; Trawick, M.; Trischuk, W. E-mail: william@physics.utoronto.ca; Turchetta, R.; Vittone, E.; Wagner, A.; Walsh, A.M.; Wedenig, R.; Weilhammer, P.; Zeuner, W.; Ziock, H.; Zoeller, M.; Charles, E.; Ciocio, A.; Dao, K.; Einsweiler, K.; Fasching, D.; Gilchriese, M.; Joshi, A.; Kleinfelder, S.; Milgrome, O.; Palaio, N.; Richardson, J.; Sinervo, P.; Zizka, G

    1999-11-01

    Diamond is a nearly ideal material for detecting ionising radiation. Its outstanding radiation hardness, fast charge collection and low leakage current allow it to be used in high radiation environments. These characteristics make diamond sensors particularly appealing for use in the next generation of pixel detectors. Over the last year, the RD42 collaboration has worked with several groups that have developed pixel readout electronics in order to optimise diamond sensors for bump-bonding. This effort resulted in an operational diamond pixel sensor that was tested in a pion beam. We demonstrate that greater than 98% of the channels were successfully bump-bonded and functioning. The device shows good overall hit efficiency as well as clear spatial hit correlation to tracks measured in a silicon reference telescope. A position resolution of 14.8 {mu}m was observed, consistent with expectations given the detector pitch.

  2. The Phase-1 Upgrade of the CMS Pixel Detector

    CERN Document Server

    Klein, Katja

    2016-01-01

    The CMS experiment features a pixel detector with three barrel layers and two disks per side, corresponding to an active silicon area of 1\\,m$^2$. The detector delivered high-quality data during LHC Run~1. However, the CMS pixel detector was designed for the nominal instantaneous LHC luminosity of $1\\cdot 10^{34}\\,$cm$^{-2}$s$^{-1}$. It is expected that the instantaneous luminosity will increase and reach twice the design value before Long Shutdown 3, scheduled for 2023. Under such conditions, the present readout chip would suffer from data loss due to buffer overflow, leading to significant inefficiencies of up to~16\\,\\%. The CMS collaboration is presently constructing a new pixel detector to replace the present device during the winter shutdown 2016/2017. The design of this new detector will be outlined, the construction status summarized and the performance described.

  3. Silicon pixel detector prototyping in SOI CMOS technology

    Science.gov (United States)

    Dasgupta, Roma; Bugiel, Szymon; Idzik, Marek; Kapusta, Piotr; Kucewicz, Wojciech; Turala, Michal

    2016-12-01

    The Silicon-On-Insulator (SOI) CMOS is one of the most advanced and promising technology for monolithic pixel detectors design. The insulator layer that is implemented inside the silicon crystal allows to integrate sensors matrix and readout electronic on a single wafer. Moreover, the separation of electronic and substrate increases also the SOI circuits performance. The parasitic capacitances to substrate are significantly reduced, so the electronic systems are faster and consume much less power. The authors of this presentation are the members of international SOIPIX collaboration, that is developing SOI pixel detectors in 200 nm Lapis Fully-Depleted, Low-Leakage SOI CMOS. This work shows a set of advantages of SOI technology and presents possibilities for pixel detector design SOI CMOS. In particular, the preliminary results of a Cracow chip are presented.

  4. The Phase-1 upgrade of the CMS pixel detector

    Science.gov (United States)

    Klein, Katja

    2017-02-01

    The CMS experiment features a pixel detector with three barrel layers and two discs per side, corresponding to an active silicon area of 1 m2. The detector delivered high-quality data during LHC Run 1. However, the CMS pixel detector was designed for the nominal instantaneous LHC luminosity of 1 ·1034cm-2s-1 . It is expected that the instantaneous luminosity will increase and reach twice the design value before Long Shutdown 3, scheduled for 2023. Under such conditions, the present readout chip would suffer from data loss due to buffer overflow, leading to significant inefficiencies of up to 16%. The CMS collaboration is presently constructing a new pixel detector to replace the present device during the winter shutdown 2016/2017. The design of this new detector will be outlined, the construction status summarized and the performance described.

  5. The Phase-2 ATLAS ITk Pixel Upgrade

    CERN Document Server

    Benoit, Mathieu; The ATLAS collaboration

    2017-01-01

    The entire tracking system of the ATLAS experiment will be replaced during the LHC Phase II shutdown (foreseen to take place around 2025) by an all-silicon detector called the “ITk” (Inner Tracker). The innermost portion of the ITk will consist of a pixel detector with stave-like support structures in the most central region and ring-shaped supports in the endcap regions; there may also be novel inclined support structures in the barrel-endcap overlap regions. The new detector could have as much as 14 m2 of sensitive silicon. Support structures will be based on low mass, highly stable and highly thermally conductive carbon-based materials cooled by evaporative carbon dioxide. The ITk will be instrumented with new sensors and readout electronics to provide improved tracking performance compared to the current detector. All the module components must be performant enough and robust enough to cope with the expected high particle multiplicity and severe radiation background of the High-Luminosity LHC. Readout...

  6. Challenges of small-pixel infrared detectors: a review

    Science.gov (United States)

    Rogalski, A.; Martyniuk, P.; Kopytko, M.

    2016-04-01

    In the last two decades, several new concepts for improving the performance of infrared detectors have been proposed. These new concepts particularly address the drive towards the so-called high operating temperature focal plane arrays (FPAs), aiming to increase detector operating temperatures, and as a consequence reduce the cost of infrared systems. In imaging systems with the above megapixel formats, pixel dimension plays a crucial role in determining critical system attributes such as system size, weight and power consumption (SWaP). The advent of smaller pixels has also resulted in the superior spatial and temperature resolution of these systems. Optimum pixel dimensions are limited by diffraction effects from the aperture, and are in turn wavelength-dependent. In this paper, the key challenges in realizing optimum pixel dimensions in FPA design including dark current, pixel hybridization, pixel delineation, and unit cell readout capacity are outlined to achieve a sufficiently adequate modulation transfer function for the ultra-small pitches involved. Both photon and thermal detectors have been considered. Concerning infrared photon detectors, the trade-offs between two types of competing technology—HgCdTe material systems and III-V materials (mainly barrier detectors)—have been investigated.

  7. Pixel detector insertion

    CERN Multimedia

    CMS

    2015-01-01

    Insertion of the Pixel Tracker, the 66-million-channel device used to pinpoint the vertex of each colliding proton pair, located at the heart of the detector. The geometry of CMS is a cylinder lying on its side (22 meters long and 15 meters high in dia

  8. ALICE Silicon Pixel Detector

    CERN Multimedia

    Manzari, V

    2013-01-01

    The Silicon Pixel Detector (SPD) forms the innermost two layers of the 6-layer barrel Inner Tracking System (ITS). The SPD plays a key role in the determination of the position of the primary collision and in the reconstruction of the secondary vertices from particle decays.

  9. High-Resolution Mammography Detector Employing Optical Switching Readout

    Science.gov (United States)

    Irisawa, Kaku; Kaneko, Yasuhisa; Yamane, Katsutoshi; Sendai, Tomonari; Hosoi, Yuichi

    Conceiving a new detector structure, FUJIFILM Corporation has successfully put its invention of an X-ray detector employing "Optical Switching" into practical use. Since Optical Switching Technology allows an electrode structure to be easily designed, both high resolution of pixel pitch and low electrical noise readout have been achieved, which have consequently realized the world's smallest pixel size of 50×50 μm2 from a Direct-conversion FPD system as well as high DQE. The digital mammography system equipped with this detector enables to acquire high definition images while maintaining granularity. Its outstanding feature is to be able to acquire high-precision images of microcalcifications which is an important index in breast examination.

  10. A 4096-pixel MAPS device with on-chip data sparsification

    Energy Technology Data Exchange (ETDEWEB)

    Gabrielli, A. [Universita di Bologna and INFN-Bologna Viale Berti Pichat 6/2, 40127 Bologna (Italy)], E-mail: alessandro.gabrielli@bo.infn.it; Batignani, G.; Bettarini, S.; Bosi, F.; Calderini, G.; Cenci, R.; Dell' Orso, M.; Forti, F.; Giannetti, P.; Giorgi, M.A.; Lusiani, A.; Marchiori, G.; Morsani, F.; Neri, N.; Paoloni, E.; Rizzo, G.; Walsh, J. [Universita degli Studi di Pisa, INFN-Pisa and Scuola Normale Superiore (Italy); Andreoli, C.; Gaioni, L.; Pozzati, E. [Universita degli Studi di Pavia and INFN-Pavia (Italy)] (and others)

    2009-06-01

    A prototype of a mixed-mode ASIC composed of a fast readout architecture that interfaces with a matrix of 4096 Monolithic Active Pixel Sensor (MAPS) was fabricated via STM 130 nm CMOS technology. Groups of 4x4 pixels form a macro-pixel (MP). The readout architecture is parallel and could overcome the readout speed limit of big matrices. As the output port can only accept one-hit information at a time, an internal queuing system has been provided to face high hit-rate conditions. The ASIC can work in two different manners as it can be connected to an actual full-custom matrix of MAPS or to a digital matrix emulator composed of standard cells, for testing facilities. For both operating modes a slow-control phase is required to load the chip configuration. Previous versions of similar ASICs were designed and tested. The work is aimed at improving the design of MAPS detectors with an on-chip fast sparsification system, for particle tracking, to match the requirements of future high-energy physics experiments. The readout architecture implemented is data driven extending the flexibility of the system to be also used in first level triggers on tracks in vertex detectors. Preliminary simulations and tests indicate that the readout system can cope with an average hit-rate up to 100 MHz/cm{sup 2} if a master clock of 80 MHz is used, while maintaining an overall efficiency over 99%.

  11. Design and TCAD simulation of double-sided pixelated low gain avalanche detectors

    Energy Technology Data Exchange (ETDEWEB)

    Dalla Betta, Gian-Franco, E-mail: gianfranco.dallabetta@unitn.it [Dipartimento di Ingegneria Industriale, Università di Trento, Via Sommarive 9, 38123 Trento (Italy); TIFPA INFN, Via Sommarive 14, 38123 Trento (Italy); Pancheri, Lucio [Dipartimento di Ingegneria Industriale, Università di Trento, Via Sommarive 9, 38123 Trento (Italy); TIFPA INFN, Via Sommarive 14, 38123 Trento (Italy); Boscardin, Maurizio [Fondazione Bruno Kessler, Via Sommarive 18, 38123 Trento (Italy); TIFPA INFN, Via Sommarive 14, 38123 Trento (Italy); Paternoster, Giovanni [Fondazione Bruno Kessler, Via Sommarive 18, 38123 Trento (Italy); Piemonte, Claudio [Fondazione Bruno Kessler, Via Sommarive 18, 38123 Trento (Italy); TIFPA INFN, Via Sommarive 14, 38123 Trento (Italy); Cartiglia, Nicolo; Cenna, Francesca [INFN Sezione di Torino, Via P. Giuria 2, 10125 Torino (Italy); Bruzzi, Mara [Dipartimento di FIsica e Astronomia, Università di Firenze, and INFN Sezione di Firenze, Via Giovanni Sansone 1, 50019 Sesto Fiorentino (Italy)

    2015-10-01

    We introduce a double-sided variant of low gain avalanche detector, suitable for pixel arrays without dead-area in between the different read-out elements. TCAD simulations were used to validate the device concept and predict its performance. Different design options and selected simulation results are presented, along with the proposed fabrication process.

  12. Hybrid pixel-waveform CdTe/CZT detector for use in an ultrahigh resolution MRI compatible SPECT system

    Energy Technology Data Exchange (ETDEWEB)

    Cai, Liang, E-mail: cai7@illinois.edu [Department of Nuclear, Plasma, and Radiological Engineering, University of Illinois at Urbana Champaign, 216 Talbot Laboratory, 104 S Wrig, Urbana, Urbana, Illinois 61801 (United States); Meng, Ling-Jian [Department of Nuclear, Plasma, and Radiological Engineering, University of Illinois at Urbana Champaign, 216 Talbot Laboratory, 104 S Wrig, Urbana, Urbana, Illinois 61801 (United States)

    2013-02-21

    In this paper, we will present a new small pixel CdTe/CZT detector for sub-500 μm resolution SPECT imaging application inside MR scanner based on a recently developed hybrid pixel-waveform (HPWF) readout circuitry. The HPWF readout system consists of a 2-D multi-pixel circuitry attached to the anode pixels to provide the X–Y positions of interactions, and a high-speed digitizer to read out the pulse-waveform induced on the cathode. The digitized cathode waveform could provide energy deposition information, precise timing and depth-of-interaction information for gamma ray interactions. Several attractive features with this HPWF detector system will be discussed in this paper. To demonstrate the performance, we constructed several prototype HPWF detectors with pixelated CZT and CdTe detectors of 2–5 mm thicknesses, connected to a prototype readout system consisting of energy-resolved photon-counting ASIC for readout anode pixels and an Agilent high-speed digitizer for digitizing the cathode signals. The performances of these detectors based on HPWF are discussed in this paper.

  13. Hybrid pixel-waveform CdTe/CZT detector for use in an ultrahigh resolution MRI compatible SPECT system

    Science.gov (United States)

    Cai, Liang; Meng, Ling-Jian

    2013-02-01

    In this paper, we will present a new small pixel CdTe/CZT detector for sub-500 μm resolution SPECT imaging application inside MR scanner based on a recently developed hybrid pixel-waveform (HPWF) readout circuitry. The HPWF readout system consists of a 2-D multi-pixel circuitry attached to the anode pixels to provide the X-Y positions of interactions, and a high-speed digitizer to read out the pulse-waveform induced on the cathode. The digitized cathode waveform could provide energy deposition information, precise timing and depth-of-interaction information for gamma ray interactions. Several attractive features with this HPWF detector system will be discussed in this paper. To demonstrate the performance, we constructed several prototype HPWF detectors with pixelated CZT and CdTe detectors of 2-5 mm thicknesses, connected to a prototype readout system consisting of energy-resolved photon-counting ASIC for readout anode pixels and an Agilent high-speed digitizer for digitizing the cathode signals. The performances of these detectors based on HPWF are discussed in this paper.

  14. Thermopile detector radiation hard readout

    Science.gov (United States)

    Gaalema, Stephen; Van Duyne, Stephen; Gates, James L.; Foote, Marc C.

    2010-08-01

    The NASA Jupiter Europa Orbiter (JEO) conceptual payload contains a thermal instrument with six different spectral bands ranging from 8μm to 100μm. The thermal instrument is based on multiple linear arrays of thermopile detectors that are intrinsically radiation hard; however, the thermopile CMOS readout needs to be hardened to tolerate the radiation sources of the JEO mission. Black Forest Engineering is developing a thermopile readout to tolerate the JEO mission radiation sources. The thermal instrument and ROIC process/design techniques are described to meet the JEO mission requirements.

  15. Tests of CMS Phase 1 Pixel Upgrade Back-End Electronics

    Science.gov (United States)

    Kilpatrick, Matthew

    2016-03-01

    The CMS detector will be upgraded so that it can handle the higher instantaneous luminosity of the 13-14 TeV collisions. The Phase 1 Pixel detector will experience a higher density of particle interactions requiring new front-end and read-out electronics. A front-end pixel data emulator was developed to validate the back-end readout electronics prior to installation and operation. A FPGA-based design emulates 400 Mbps data patterns from the front-end read-out chips and will be used to confirm that each Front End Driver (FED) can correctly decode and process the expected data patterns and error conditions. A FED test bench using the emulator can produce LHC-like conditions for stress testing FED hardware, firmware and online software. The design of the emulator and initial test results will be reported.

  16. CMOS Pixel Spectroscopic Circuits for Cd(ZnTe Gamma Ray Imagers

    Directory of Open Access Journals (Sweden)

    Hatzistratis D.

    2016-01-01

    Full Text Available A family of 2-D pixel CMOS ASICs have been developed to be used as readout electronics of gamma ray imaging instruments based on hybrid pixel sensor arrays. One element of the sensor array consists of a pixilated single crystal of CdTe or CdZnTe semiconductor bump bonded to the CMOS electronic circuit. The first member of the family can process single photon signals which deliver up to 4fCb charge, while the two other can process signals up to 36fCb. A unique readout mode and the simultaneous extraction of energy and time tagging information of the converted photons differentiate the members of this family from other existing CMOS readout circuits.

  17. Development of planar pixel modules for the ATLAS high luminosity LHC tracker upgrade

    Energy Technology Data Exchange (ETDEWEB)

    Allport, P.P. [Department of Physics, University of Liverpool (United Kingdom); Ashby, J.; Bates, R.L.; Blue, A. [SUPA, School of Physics and Astronomy, University of Glasgow (United Kingdom); Burdin, S. [Department of Physics, University of Liverpool (United Kingdom); Buttar, C.M., E-mail: craig.buttar@glasgow.ac.uk [SUPA, School of Physics and Astronomy, University of Glasgow (United Kingdom); Casse, G.; Dervan, P. [Department of Physics, University of Liverpool (United Kingdom); Doonan, K. [SUPA, School of Physics and Astronomy, University of Glasgow (United Kingdom); Forshaw, D. [Department of Physics, University of Liverpool (United Kingdom); Lipp, J. [The Science and Technology Facilities Council, Rutherford Appleton Laboratory (United Kingdom); McMullen, T. [SUPA, School of Physics and Astronomy, University of Glasgow (United Kingdom); Pater, J. [School of Physics and Astronomy, University of Manchester (United Kingdom); Stewart, A. [SUPA, School of Physics and Astronomy, University of Glasgow (United Kingdom); Tsurin, I. [Department of Physics, University of Liverpool (United Kingdom)

    2014-11-21

    The high-luminosity LHC will present significant challenges for tracking systems. ATLAS is preparing to upgrade the entire tracking system, which will include a significantly larger pixel detector. This paper reports on the development of large area planar detectors for the outer pixel layers and the pixel endcaps. Large area sensors have been fabricated and mounted onto 4 FE-I4 readout ASICs, the so-called quad-modules, and their performance evaluated in the laboratory and testbeam. Results from characterisation of sensors prior to assembly, experience with module assembly, including bump-bonding and results from laboratory and testbeam studies are presented.

  18. Automated procedures for the assembly of the CMS Phase 1 upgrade pixel modules

    Science.gov (United States)

    Wade, Alex; CMS Collaboration

    2016-03-01

    The Phase 1 upgrade of the pixel tracker for the CMS experiment requires the assembly of approximately 1000 modules consisting of pixel sensors bump bonded to readout chips. The precision assembly of modules in this volume is made possible using several robotic processes for dispensing epoxy,positioning of sensor components, automatic wire-bonding and robotic deposition of elastomer for wire bond encapsulation. We will describe the these processes in detail, along with the measurements that quanitfy the quality of assembled modules, and describe the subsequent steps in which the sensor modules are used in the construction of the Phase 1 pixel tracker. With support from USCMS.

  19. Low-noise readout circuit for SWIR focal plane arrays

    Science.gov (United States)

    Altun, Oguz; Tasdemir, Ferhat; Nuzumlali, Omer Lutfi; Kepenek, Reha; Inceturkmen, Ercihan; Akyurek, Fatih; Tunca, Can; Akbulut, Mehmet

    2017-02-01

    This paper reports a 640x512 SWIR ROIC with 15um pixel pitch that is designed and fabricated using 0.18um CMOS process. Main challenge of SWIR ROIC design is related to input circuit due to pixel area and noise limitations. In this design, CTIA with single stage amplifier is utilized as input stage. The pixel design has three pixel gain options; High Gain (HG), Medium Gain (MG), and Low Gain (LG) with corresponding Full-Well-Capacities of 18.7ké, 190ké and 1.56Mé, respectively. According to extracted simulation results, 5.9é noise is achieved at HG mode and 200é is achieved at LG mode of operation. The ROIC can be programmed through an SPI interface. It supports 1, 2 and 4 output modes which enables the user to configure the detector to work at 30, 60 and 120fps frame rates. In the 4 output mode, the total power consumption of the ROIC is less than 120mW. The ROIC is powered from a 3.3V analog supply and allows for an output swing range in excess of 2V. Anti-blooming feature is added to prevent any unwanted blooming effect during readout.

  20. The Phase1 CMS Pixel detector upgrade

    CERN Document Server

    Tavolaro, Vittorio Raoul

    2016-01-01

    The pixel detector of the CMS experiment will be replaced in an extended end-of-year shutdown during winter 2016/2017 with an upgraded one able to cope with peak instantaneous luminosities beyond the nominal LHC instantaneous luminosity of $1 \\times 10^{34}$ cm$^{-2}$ s$^{-1}$. Under the conditions expected in the coming years, which will see an increase of a factor two in instantaneous luminosity, the present system would experience a dynamic inefficiency caused mainly by data losses due to buffer overflows. The Phase I upgrade of the CMS pixel detector, described in this paper, will operate at full efficiency at an instantaneous luminosity of $2 \\times 10^{34}$ cm$^{-2}$ s$^{-1}$, thanks to a new readout chip. The new detector will feature one additional tracking point both in the barrel and in the forward regions, while reducing the material budget as a result of a new CO$_{2}$ cooling system and optimised layout of the services. In this paper, the design and the technological choices of the Phase I detect...

  1. The Phase II ATLAS ITk Pixel Upgrade

    CERN Document Server

    Terzo, Stefano; The ATLAS collaboration

    2017-01-01

    The entire tracking system of the ATLAS experiment will be replaced during the LHC Phase II shutdown (foreseen to take place around 2025) by an all-silicon detector called the "ITk" (Inner Tracker). The innermost portion of ITk will consist of a pixel detector with five layers in the barrel region and and ring-shaped supports in the endcap regions. It will be instrumented with new sensor and readout electronics technologies to improve the tracking performance and cope with the HL-LHC environment, which will be severe in terms of occupancy and radiation. The total surface area of silicon in the new pixel system could measure up to 14 m$^2$ , depending on the final layout choice, which is expected to take place in early 2017. Several layout options are being investigated at the moment, including some with novel inclined support structures in the barrel-endcap overlap region and others with very long innermost barrel layers. Forward coverage could be as high as $|\\eta| < 4$. Supporting structures will be ...

  2. The Phase-2 ATLAS ITk Pixel Upgrade

    CERN Document Server

    Flick, Tobias; The ATLAS collaboration

    2016-01-01

    The entire tracking system of the ATLAS experiment will be replaced during the LHC Phase II shutdown (foreseen to take place around 2025) by an all-silicon detector called the “ITk” (Inner Tracker). The pixel detector will comprise the five innermost layers, and will be instrumented with new sensor and readout electronics technologies to improve the tracking performance and cope with the HL-LHC environment, which will be severe in terms of occupancy and radiation. The total surface area of silicon in the new pixel system could measure up to 14 m2, depending on the final layout choice, which is expected to take place in early 2017. Four layout options are being investigated at the moment, two with forward coverage to |eta| < 3.2 and two to |eta| < 4. For each coverage option, a layout with long barrel staves and a layout with novel inclined support structures in the barrel-endcap overlap region are considered. All potential layouts include modules mounted on ring-shaped supports in the endcap regions...

  3. Further applications for mosaic pixel FPA technology

    Science.gov (United States)

    Liddiard, Kevin C.

    2011-06-01

    In previous papers to this SPIE forum the development of novel technology for next generation PIR security sensors has been described. This technology combines the mosaic pixel FPA concept with low cost optics and purpose-designed readout electronics to provide a higher performance and affordable alternative to current PIR sensor technology, including an imaging capability. Progressive development has resulted in increased performance and transition from conventional microbolometer fabrication to manufacture on 8 or 12 inch CMOS/MEMS fabrication lines. A number of spin-off applications have been identified. In this paper two specific applications are highlighted: high performance imaging IRFPA design and forest fire detection. The former involves optional design for small pixel high performance imaging. The latter involves cheap expendable sensors which can detect approaching fire fronts and send alarms with positional data via mobile phone or satellite link. We also introduce to this SPIE forum the application of microbolometer IR sensor technology to IoT, the Internet of Things.

  4. Orthogonal sequencing multiplexer for superconducting nanowire single-photon detectors with RSFQ electronics readout circuit.

    Science.gov (United States)

    Hofherr, Matthias; Wetzstein, Olaf; Engert, Sonja; Ortlepp, Thomas; Berg, Benjamin; Ilin, Konstantin; Henrich, Dagmar; Stolz, Ronny; Toepfer, Hannes; Meyer, Hans-Georg; Siegel, Michael

    2012-12-17

    We propose an efficient multiplexing technique for superconducting nanowire single-photon detectors based on an orthogonal detector bias switching method enabling the extraction of the average count rate of a set of detectors by one readout line. We implemented a system prototype where the SNSPDs are connected to an integrated cryogenic readout and a pulse merger system based on rapid single flux quantum (RSFQ) electronics. We discuss the general scalability of this concept, analyze the environmental requirements which define the resolvability and the accuracy and demonstrate the feasibility of this approach with experimental results for a SNSPD array with four pixels.

  5. ATLAS ITk Pixel detector

    CERN Document Server

    Gemme, Claudia; The ATLAS collaboration

    2016-01-01

    The high luminosity upgrade of the LHC (HL-LHC) in 2026 will provide new challenge to the ATLAS tracker. The current inner detector will be replaced with a whole silicon tracker which will consist of a five barrel layer Pixel detector surrounded by a four barrel layer Strip detector. The expected high radiation level are requiring the development of upgraded silicon sensors as well as new a front-end chip. The dense tracking environment will require finer granularity detectors. The data rates will require new technologies for high bandwidth data transmission and handling. The current status of the HL-LHC ATLA Pixel detector developments as well as the various layout options will be reviewed.

  6. Alpine Pixel Detector Layout

    CERN Document Server

    Delebecque, P; The ATLAS collaboration; Geffroy, N; Massol, N; Rambure, T; Todorov, T

    2013-01-01

    A description of an optimized layout of pixel sensors based on a stave that combines both barrel and endcap module orientations. The mechanical stiffness of the structure is provided by carbon fiber shells spaced by carbon foam. The cooling of the modules is provided by two-phase $CO_{2}$ flowing in a thin titanium pipe glued inside the carbon fiber foam. The electrical services of all modules are provided by a single stave flex. This layout eliminates the need for separate barrel and endcap detector structures, and therefore the barrel services material in front of the endcap. The transition from barrel to endcap module orientation is optimized separately for each layer in order to minimize the active pixel area and the traversed material. The sparse module spacing in the endcap part of the stave allows for multiple fixation points, and for a stiff overall structure composed only of staves interconnected by stiff disks.

  7. Fabrication of a high-density MCM-D for a pixel detector system using a BCB/Cu technology

    CERN Document Server

    Topper, M; Engelmann, G; Fehlberg, S; Gerlach, P; Wolf, J; Ehrmann, O; Becks, K H; Reichl, H

    1999-01-01

    The MCM-D which is described here is a prototype for a pixel detector system for the planned Large Hadron Collider (LHC) at CERN, Geneva. The project is within the ATLAS experiment. The module consists of a sensor tile with an active area of 16.4 mm*60.4 mm, 16 readout chips, each serving 24*160 pixel unit cells, a module controller chip, an optical transceiver and the local signal interconnection and power distribution buses. The extremely high wiring density which is necessary to interconnect the readout chips was achieved using a thin film copper/photo-BCB process above the pixel array. The bumping of the readout chips was done by PbSn electroplating. All dice are then attached by flip-chip assembly to the sensor diodes and the local buses. The focus of this paper is a detailed description of the technologies for the fabrication of this advanced MCM-D. (10 refs).

  8. High-speed readout solution for single-photon counting ASICs

    Science.gov (United States)

    Kmon, P.; Szczygiel, R.; Maj, P.; Grybos, P.; Kleczek, R.

    2016-02-01

    We report on the analysis, simulations and measurements of both noise and high-count rate performance of a single photon counting integrated circuit called UFXC32k designed for hybrid pixel detectors for various applications in X-ray imaging. The dimensions of the UFCX32k designed in CMOS 130 nm technology are 9.63 mm × 20.15 mm. The integrated circuit core is a matrix of 128 × 256 squared readout pixels with a pitch of 75 μm. Each readout pixel contains a charge sensitive amplifier (CSA), a shaper, two discriminators and two 14-bit ripple counters. The UFXC32k was bump-bonded to a silicon pixel detector with the thickness of 320 μm and characterized with the X-ray radiation source. The CSA feedback based on the Krummenacher circuit determines both the count rate performance and the noise of the readout front-end electronics. For the default setting of the CSA feedback, the measured front-end electronics dead time is 232 ns (paralyzable model) and the equivalent noise charge (ENC) is equal to 123 el. rms. For the high count rate setting of the CSA feedback, the dead time is only 101 ns and the ENC is equal to 163 el. rms.

  9. CCD Readout Electronics for the Subaru Prime Focus Spectrograph

    CERN Document Server

    Hope, Stephen C; Loomis, Craig P; Fitzgerald, Roger E; Peacock, Grant O

    2014-01-01

    We present details of the design for the CCD readout electronics for the Subaru Telescope Prime Focus Spectrograph (PFS). The spectrograph is comprised of four identical spectrograph modules, each collecting roughly 600 spectra. The spectrograph modules provide simultaneous wavelength coverage over the entire band from 380 nm to 1260 nm through the use of three separate optical channels: blue, red, and near infrared (NIR). A camera in each channel images the multi-object spectra onto a 4k x 4k, 15 um pixel, detector format. The two visible cameras use a pair of Hamamatsu 2k x 4k CCDs with readout provided by custom electronics, while the NIR camera uses a single Teledyne HgCdTe 4k x 4k detector and ASIC Sidecar to read the device. The CCD readout system is a custom design comprised of three electrical subsystems: the Back End Electronics (BEE), the Front End Electronics (FEE), and a Pre-amplifier. The BEE is an off-the-shelf PC104 computer, with an auxiliary Xilinx FPGA module. The computer serves as the main...

  10. Demonstration of Time Domain Multiplexed Readout for Magnetically Coupled Calorimeters

    Science.gov (United States)

    Porst, J.-P.; Adams, J. S.; Balvin, M.; Bandler, S.; Beyer, J.; Busch, S. E.; Drung, D.; Seidel, G. M.; Smith, S. J.; Stevenson, T. R.

    2012-01-01

    Magnetically coupled calorimeters (MCC) have extremely high potential for x-ray applications due to the inherent high energy resolution capability and being non-dissipative. Although very high energy-resolution has been demonstrated, until now there has been no demonstration of multiplexed read-out. We report on the first realization of a time domain multiplexed (TDM) read-out. While this has many similarities with TDM of transition-edge-sensors (TES), for MGGs the energy resolution is limited by the SQUID read-out noise and requires the well established scheme to be altered in order to minimize degradation due to noise aliasing effects. In cur approach, each pixel is read out by a single first stage SQUID (SQ1) that is operated in open loop. The outputs of the SQ1 s are low-pass filtered with an array of low cross-talk inductors, then fed into a single-stage SQUID TD multiplexer. The multiplexer is addressed from room temperature and read out through a single amplifier channel. We present results achieved with a new detector platform. Noise performance is presented and compared to expectations. We have demonstrated multiplexed X-ray spectroscopy at 5.9keV with delta_FWHM=10eV. In an optimized setup, we show it is possible to multiplex 32 detectors without significantly degrading the Intrinsic detector resolution.

  11. Micropattern gas detectors The CMS MSGC project and gaseous pixel detector applications

    CERN Document Server

    Bellazzini, R; Gariano, G; Latronico, L; Lumb, N; Moggi, A; Reale, S; Spandre, G; Massai, M M; Spezziga, M A; Toropin, A N; Costa, E; Soffitta, P; Pacella, D

    2001-01-01

    We report recent results from the development and testing of two types of micropattern gas detectors-micro-strip gas chambers and GEM- based devices with two types of pixel read-out. Thirty-two micro- strip gas chambers were tested in a high intensity hadron beam as a milestone for CERN's Compact Muon Solenoid (CMS) experiment. The detectors were operated with voltage settings corresponding to 98% hit detection efficiency at CMS for a total high intensity exposure period of 493 h. All of the requirements expected by the milestone- gain stability, number of lost strips, spark rate, etc.-were met, with wide margins. In a separate investigation, we have coupled PCB pixel read-out planes to GEM foils. In one case, 2 mm*2 mm pixels were fanned out to individual discriminators and scalers to provide very fast (2 MHz/pixel) read-out; this system has been used as an imaging device to provide diagnostic information in fusion experiments. The second type of device used smaller pixels (200 mu m squares) and a Flash-ADC ...

  12. A 2D smart pixel detector for time-resolved protein crystallography

    Energy Technology Data Exchange (ETDEWEB)

    Beuville, E.; Cork, C.; Earnest, T. [and others

    1995-10-01

    A smart pixel detector is being developed for Time Resolved Crystallography for biological and material science applications. Using the Pixel detector presented here, the Laue method will enable the study of the evolution of structural changes that occur within the protein as a function of time. The x-ray pixellated detector is assembled to the integrated circuit through a bump bonding process. Within a pixel size of 150 x 150 {mu}m{sup 2}, a low noise preamplifier-shaper, a discriminator, a 3 bit counter and the readout logic are integrated. The readout, based on the Column Architecture principle, will accept hit rates above 5x10{sup 8}/cm{sup 2}/s with a maximum hit rate per pixel of 1 MHz. This detector will allow time resolved Laue crystallography to be performed in a frameless operation mode, without dead time. Target specifications, architecture, and preliminary results on the 8 x 8 front-end prototype and column readout are presented.

  13. GigaTracker, a Thin and Fast Silicon Pixels Tracker

    CERN Document Server

    Velghe, Bob; Bonacini, Sandro; Ceccucci, Augusto; Kaplon, Jan; Kluge, Alexander; Mapelli, Alessandro; Morel, Michel; Noël, Jérôme; Noy, Matthew; Perktold, Lukas; Petagna, Paolo; Poltorak, Karolina; Riedler, Petra; Romagnoli, Giulia; Chiozzi, Stefano; Cotta Ramusino, Angelo; Fiorini, Massimiliano; Gianoli, Alberto; Petrucci, Ferruccio; Wahl, Heinrich; Arcidiacono, Roberta; Jarron, Pierre; Marchetto, Flavio; Gil, Eduardo Cortina; Nuessle, Georg; Szilasi, Nicolas

    2014-01-01

    GigaTracker, the NA62’s upstream spectrometer, plays a key role in the kinematically constrained background suppression for the study of the K + ! p + n ̄ n decay. It is made of three independent stations, each of which is a six by three cm 2 hybrid silicon pixels detector. To meet the NA62 physics goals, GigaTracker has to address challenging requirements. The hit time resolution must be better than 200 ps while keeping the total thickness of the sensor to less than 0.5 mm silicon equivalent. The 200 μm thick sensor is divided into 18000 300 μm 300 μm pixels bump-bounded to ten independent read-out chips. The chips use an end-of-column architecture and rely on time-over- threshold discriminators. A station can handle a crossing rate of 750 MHz. Microchannel cooling technology will be used to cool the assembly. It allows us to keep the sensor close to 0 C with 130 μm of silicon in the beam area. The sensor and read-out chip performance were validated using a 45 pixel demonstrator with a laser test setu...

  14. Simulation of charge transport in pixelated CdTe

    Science.gov (United States)

    Kolstein, M.; Ariño, G.; Chmeissani, M.; De Lorenzo, G.

    2014-12-01

    The Voxel Imaging PET (VIP) Pathfinder project intends to show the advantages of using pixelated semiconductor technology for nuclear medicine applications to achieve an improved image reconstruction without efficiency loss. It proposes designs for Positron Emission Tomography (PET), Positron Emission Mammography (PEM) and Compton gamma camera detectors with a large number of signal channels (of the order of 106). The design is based on the use of a pixelated CdTe Schottky detector to have optimal energy and spatial resolution. An individual read-out channel is dedicated for each detector voxel of size 1 × 1 × 2 mm3 using an application-specific integrated circuit (ASIC) which the VIP project has designed, developed and is currently evaluating experimentally. The behaviour of the signal charge carriers in CdTe should be well understood because it has an impact on the performance of the readout channels. For this purpose the Finite Element Method (FEM) Multiphysics COMSOL software package has been used to simulate the behaviour of signal charge carriers in CdTe and extract values for the expected charge sharing depending on the impact point and bias voltage. The results on charge sharing obtained with COMSOL are combined with GAMOS, a Geant based particle tracking Monte Carlo software package, to get a full evaluation of the amount of charge sharing in pixelated CdTe for different gamma impact points.

  15. Module and electronics developments for the ATLAS ITK pixel system

    CERN Document Server

    Nellist, Clara; The ATLAS collaboration

    2016-01-01

    Summary ATLAS is preparing for an extensive modification of its detector in the course of the planned HL‐ LHC accelerator upgrade around 2025 which includes a replacement of the entire tracking system by an all‐silicon detector (Inner Tracker, ITk). A revised trigger and data taking system is foreseen with triggers expected at lowest level at an average rate of 1 MHz. The five innermost layers of ITk will comprise of a pixel detector built of new sensor and readout electronics technologies to improve the tracking performance and cope with the severe HL‐LHC environment in terms of occupancy and radiation. The total area of the new pixel system could measure up to 14 m2, depending on the final layout choice that is expected to take place in early 2017. A new on‐detector readout chip is designed in the context of the RD53 collaboration in 65 nm CMOS technology. This paper will present the on‐going R&D within the ATLAS ITK project towards the new pixel modules and the off‐detector electronics. Pla...

  16. Module and electronics developments for the ATLAS ITK pixel system

    CERN Document Server

    Munoz Sanchez, Francisca Javiela; The ATLAS collaboration

    2017-01-01

    ATLAS is preparing for an extensive modification of its detector in the course of the planned HL-LHC accelerator upgrade around 2025 which includes a replacement of the entire tracking system by an all-silicon detector (Inner Tracker, ITk). The five innermost layers of ITk will comprise of a pixel detector built of new sensor and readout electronics technologies to improve the tracking performance and cope with the severe HL-LHC environment in terms of occupancy and radiation. The total area of the new pixel system could measure up to 14 m2, depending on the final layout choice that is expected to take place in 2017. A new on-detector readout chip is designed in the context of the RD53 collaboration in 65 nm CMOS technology. This paper will present the on-going R&D within the ATLAS ITK project towards the new pixel modules and the off-detector electronics. Planar and 3D sensors are being re-designed with cell sizes of 50x50 or 25x100 μm2, compatible with the RD53 chip. A sensor thickness equal or less th...

  17. The pixel hybrid photon detectors for the LHCb-RICH project

    CERN Document Server

    Gys, Thierry

    2001-01-01

    This paper describes a hybrid photon detector with integrated silicon pixel readout to be used in the ring imaging Cherenkov detectors of the LHCb experiment. The photon detector is based on a cross-focussed image intensifier tube geometry where the image is de-magnified by a factor of 5. The anode consists of a silicon pixel array, bump-bonded to a binary readout chip with matching pixel electronics. The paper starts with the general specification of the baseline option. Followed by a summary of the main results achieved so far during the R&D phase. It concludes with a description of the remaining work towards the final photon detector. (17 refs).

  18. Development and characterization of a DEPFET pixel prototype system for the ILC vertex detector

    Energy Technology Data Exchange (ETDEWEB)

    Kohrs, Robert

    2008-09-15

    For the future TeV-scale linear collider ILC (International Linear Collider) a vertex detector of unprecedented performance is needed to fully exploit its physics potential. By incorporating a field effect transistor into a fully depleted sensor substrate the DEPFET (Depleted Field Effect Transistor) sensor combines radiation detection and in-pixel amplification. For the operation at a linear collider the excellent noise performance of DEPFET pixels allows building very thin detectors with a high spatial resolution and a low power consumption. With this thesis a prototype system consisting of a 64 x 128 pixels sensor, dedicated steering and readout ASICs and a data acquisition board has been developed and successfully operated in the laboratory and under realistic conditions in beam test environments at DESY and CERN. A DEPFET matrix has been successfully read out using the on-chip zero-suppression of the readout chip CURO 2. The results of the system characterization and beam test results are presented. (orig.)

  19. Multiport solid-state imager characterization at variable pixel rates

    Energy Technology Data Exchange (ETDEWEB)

    Yates, G.J.; Albright, K.A. [Los Alamos National Lab., NM (United States); Turko, B.T. [Lawrence Berkeley Lab., CA (United States)

    1993-08-01

    The imaging performance of an 8-port Full Frame Transfer Charge Coupled Device (FFT CCD) as a function of several parameters including pixel clock rate is presented. The device, model CCD- 13, manufactured by English Electric Valve (EEV) is a 512 {times} 512 pixel array designed with four individual programmable bidirectional serial registers and eight output amplifiers permitting simultaneous readout of eight segments (128 horizontal {times} 256 vertical pixels) of the array. The imager was evaluated in Los Alamos National Laboratory`s High-Speed Solid-State Imager Test Station at true pixel rates as high as 50 MHz for effective imager pixel rates approaching 400 MHz from multiporting. Key response characteristics measured include absolute responsivity, Charge-Transfer-Efficiency (CTE), dynamic range, resolution, signal-to-noise ratio, and electronic and optical crosstalk among the eight video channels. Preliminary test results and data obtained from the CCD-13 will be presented and the versatility/capabilities of the test station will be reviewed.

  20. Requirements on air pollution measurements for studies in environmental medicine.; Anforderungen an lufthygienische Messungen fuer umweltmedizinische Untersuchungen

    Energy Technology Data Exchange (ETDEWEB)

    Jakobi, G. [Muenchen Univ., Freising (Germany). Lehrstuhl fuer Bioklimatologie und Immissionsforschung

    1999-07-01

    Untersuchungsziele konzipiert wurden. Besonders problematisch ist dabei die Trennung der lufthygienischen Messungen vom Expositionsort der Probanden, da die raeumliche Homogenitaet der luftchemischen Groessen nicht vorausgesetzt werden kann. Die Konzentration der gemessenen Luftschadstoffe an einem Standort wird sehr wesentlich durch topografische, orografische und meteorologische Faktoren, der Luftprobenahmehoehe, aber auch durch die spezifische Struktur der Umgebung und der Entfernung zu Emissionsquellen, z.B. dem Verkehr, beeinflusst. Neben der Repraesentativitaet des Messstandortes fuer die Expositionsbedindungen der zu untersuchenden Probanden muss fuer eine verbesserte Abschaetzung der Schadstoffdosis aber auch die Tatsache beruecksichtigt werden, dass sich der Mensch die ueberwiegende Zeit des Tages in Innenraeumen aufhaelt. Diese koennen sowohl andere Konzentrationsverhaeltnisse als auch andere Schadstoffspektren aufweisen. Als weiterer Einflussfaktor muss die zeitliche Aufloesung der Messwerte beruecksichtigt werden. Waehrend zur Expositionsabschaetzung gegenueber chronischen Wirkungen Tages- oder Monatsmittelwerte bereits ausreichend sein koennen, sind fuer die Untersuchung akuter Wirkungen zeitlich hoeher aufgeloeste Messwerte notwendig. (orig.)

  1. Blower door measurement: in spite of standardization a lot of uncertainties; Blower Door-Messungen: Trotz Normen noch vieles Unklar

    Energy Technology Data Exchange (ETDEWEB)

    Tanner, C.; Muehlebach, H. [Eidgenoessische Materialpruefungs- und Forschungsanstalt (EMPA), Abt. Bauphysik, Duebendorf (Switzerland)

    2004-06-01

    Gebaeudepraeparation. So besteht z. B. Spielraum beim Festlegen der Messzone und es entstehen - je nach Abdichtungsort bei der Lueftungsanlage - grosse Unterschiede im Ergebnis. Wesentlichen Einfluss hat auch der Messzeitpunkt: Eine Messung mit Leckagenortung in der Bauphase ist sinnvoll und erwuenscht, gilt aber nicht als Abnahme, da das Gebaeude durch die Fertigstellung noch veraendert wird. Das hinterlaesst Fragen ueber den Stellenwert von Luftdurchlaessigkeits-Messungen. Bei der Beurteilung von Niedrigenergiebauten kommt hinzu, dass die z. T. extrem niedrigen Grenzwerte nur aus energetischen Gruenden gefordert werden, obwohl bekanntermassen zwischen der Luftwechselzahl n{sub 50} und den energetisch relevanten Lueftungswaermeverlusten (durch Infiltration/Exfiltration) nur ein indirekter Zusammenhang besteht. Loesungsvorschlaege fuer eine einheitliche Gebaeudepraeparierung und Datenauswertung werden z. Zt. diskutiert. Ziel ist es, fuer die wesentlichen Probleme der komplexen Messmethode einfache, pragmatische Loesungen zu finden und die Moeglichkeiten und Grenzen der Messmethode besser bekannt zu machen. (orig.)

  2. Neural network based cluster creation in the ATLAS silicon Pixel Detector

    CERN Document Server

    Andreazza, A; The ATLAS collaboration

    2013-01-01

    The read-out from individual pixels on planar semi-conductor sensors are grouped into clusters to reconstruct the location where a charged particle passed through the sensor. The resolution given by individual pixel sizes is significantly improved by using the information from the charge sharing between pixels. Such analog cluster creation techniques have been used by the ATLAS experiment for many years to obtain an excellent performance. However, in dense environments, such as those inside high-energy jets, clusters have an increased probability of merging the charge deposited by multiple particles. Recently, a neural network based algorithm which estimates both the cluster position and whether a cluster should be split has been developed for the ATLAS Pixel Detector. The algorithm significantly reduces ambiguities in the assignment of pixel detector measurement to tracks within jets and improves the position accuracy with respect to standard interpolation techniques by taking into account the 2-dimensional ...

  3. Commissioning of the upgraded ATLAS Pixel Detector for Run2 at LHC

    CERN Document Server

    AUTHOR|(INSPIRE)INSPIRE-00016406

    2016-01-01

    The Pixel Detector of the ATLAS experiment has shown excellent performance during the whole Run-1 of LHC. Taking advantage of the long showdown, the detector was extracted from the experiment and brought to surface, to equip it with new service quarter panels, to repair modules and to ease installation of the Insertable B-Layer (IBL), a fourth layer of pixel detectors, installed in May 2014 between the existing Pixel Detector and a new smaller radius beam-pipe at a radius of 3.3 cm. To cope with the high radiation and pixel occupancy due to the proximity to the interaction point, a new read-out chip and two different silicon sensor technologies (planar and 3D) have been developed. An overview of the refurbishing of the Pixel Detector and of the IBL project as well as early performance tests using cosmic rays and beam data will be presented.

  4. Commissioning of the upgraded ATLAS Pixel Detector for Run2 at LHC

    Energy Technology Data Exchange (ETDEWEB)

    Dobos, Daniel, E-mail: daniel.dobos@cern.ch

    2016-07-11

    The Pixel Detector of the ATLAS experiment has shown excellent performance during the whole Run-1 of LHC. Taking advantage of the long showdown, the detector was extracted from the experiment and brought to the surface, to equip it with new service quarter panels, to repair modules and to ease installation of the Insertable B-Layer, a fourth layer of pixel detectors, installed in May 2014 between the existing Pixel Detector and a new smaller radius beam-pipe at a radius of 3.3 cm. To cope with the high radiation and pixel occupancy due to the proximity to the interaction point, a new read-out chip and two different silicon sensor technologies (planar and 3D) have been developed. An overview of the refurbishing of the Pixel Detector and of the IBL project as well as early performance tests using cosmic rays and beam data will be presented.

  5. MONOLITHIC ACTIVE PIXEL MATRIX WITH BINARY COUNTERS IN AN SOI PROCESS.

    Energy Technology Data Exchange (ETDEWEB)

    DUPTUCH,G.; YAREMA, R.

    2007-06-07

    The design of a Prototype monolithic active pixel matrix, designed in a 0.15 {micro}m CMOS SOI Process, is presented. The process allowed connection between the electronics and the silicon volume under the layer of buried oxide (BOX). The small size vias traversing through the BOX and implantation of small p-type islands in the n-type bulk result in a monolithic imager. During the acquisition time, all pixels register individual radiation events incrementing the counters. The counting rate is up to 1 MHz per pixel. The contents of counters are shifted out during the readout phase. The designed prototype is an array of 64 x 64 pixels and the pixel size is 26 x 26 {micro}m{sup 2}.

  6. Characterisation of the NA62 GigaTracker end of column readout ASIC

    CERN Document Server

    Noy, M; Perktold, L; Rinella, G A; Riedler, P; Morel, M; Kluge, A; Kaplon, J; Martin, E; Jarron, P

    2011-01-01

    The architecture and characterisation of the End Of Column demonstrator readout ASIC for the NA62 GigaTracker hybrid pixel detector is presented. This ASIC serves as a proof of principle for a pixel chip with 1800 pixels which must perform time stamping to better than 200 ps (RMS), provide 300 mu m pitch position information and operate with a dead-time of 1\\% or less for 800 MHz-1 GHz beam rate. The demonstrator ASIC comprises a full test column with 45 pixels alongside other test structures. The timewalk correction mechanism employed is measurement of the time-over-threshold, coupled with an off-detector look-up table. The time to digital converter is a delay locked loop with 32 contributing delay cells fed with a 320 MHz to yield a nominal bin size of 97 ps. Recently, P-in-N sensors have been bump-bonded to the ASIC and characterisation of these assemblies has begun.

  7. The Kepler Pixel Response Function

    CERN Document Server

    Bryson, Stephen T; Jenkins, Jon M; Chandrasekaran, Hema; Klaus, Todd; Caldwell, Douglas A; Gilliland, Ronald L; Haas, Michael R; Dotson, Jessie L; Koch, David G; Borucki, William J

    2010-01-01

    Kepler seeks to detect sequences of transits of Earth-size exoplanets orbiting Solar-like stars. Such transit signals are on the order of 100 ppm. The high photometric precision demanded by Kepler requires detailed knowledge of how the Kepler pixels respond to starlight during a nominal observation. This information is provided by the Kepler pixel response function (PRF), defined as the composite of Kepler's optical point spread function, integrated spacecraft pointing jitter during a nominal cadence and other systematic effects. To provide sub-pixel resolution, the PRF is represented as a piecewise-continuous polynomial on a sub-pixel mesh. This continuous representation allows the prediction of a star's flux value on any pixel given the star's pixel position. The advantages and difficulties of this polynomial representation are discussed, including characterization of spatial variation in the PRF and the smoothing of discontinuities between sub-pixel polynomial patches. On-orbit super-resolution measurement...

  8. ATLAS-IBL Pixel Upgrade

    CERN Document Server

    LaRosa, A; The ATLAS collaboration

    2010-01-01

    The upgrade for the ATLAS detector will undergo different phase towards Super-LHC. The first upgrade for the Pixel Detector will consist in the construction of a new pixel layer which will be installed during the first shutdown of the LHC machine (SLHC Phase I). The new detector, called Insertable B-Layer (IBL), will be inserted between the existing pixel detector and a new (smaller radius) beam-pipe at a radius of 3.2 cm. The IBL will require the development of several new technologies to cope with increase of radiation or pixel occupancy and also to improve the physics performance which will be achieved by reduction of the pixel size and of the material budget. Three different promising sensor technologies (Planar-Si, 3D-Si and Diamond) are currently under investigation for the pixel detector. An overview of the project with particular emphasis on pixel module studies, irradiation and beam test plans will be presented.

  9. Smart pixel imaging with computational-imaging arrays

    Science.gov (United States)

    Fernandez-Cull, Christy; Tyrrell, Brian M.; D'Onofrio, Richard; Bolstad, Andrew; Lin, Joseph; Little, Jeffrey W.; Blackwell, Megan; Renzi, Matthew; Kelly, Mike

    2014-07-01

    Smart pixel imaging with computational-imaging arrays (SPICA) transfers image plane coding typically realized in the optical architecture to the digital domain of the focal plane array, thereby minimizing signal-to-noise losses associated with static filters or apertures and inherent diffraction concerns. MIT Lincoln Laboratory has been developing digitalpixel focal plane array (DFPA) devices for many years. In this work, we leverage legacy designs modified with new features to realize a computational imaging array (CIA) with advanced pixel-processing capabilities. We briefly review the use of DFPAs for on-chip background removal and image plane filtering. We focus on two digital readout integrated circuits (DROICS) as CIAs for two-dimensional (2D) transient target tracking and three-dimensional (3D) transient target estimation using per-pixel coded-apertures or flutter shutters. This paper describes two DROICs - a SWIR pixelprocessing imager (SWIR-PPI) and a Visible CIA (VISCIA). SWIR-PPI is a DROIC with a 1 kHz global frame rate with a maximum per-pixel shuttering rate of 100 MHz, such that each pixel can be modulated by a time-varying, pseudorandom, and duo-binary signal (+1,-1,0). Combining per-pixel time-domain coding and processing enables 3D (x,y,t) target estimation with limited loss of spatial resolution. We evaluate structured and pseudo-random encoding strategies and employ linear inversion and non-linear inversion using total-variation minimization to estimate a 3D data cube from a single 2D temporally-encoded measurement. The VISCIA DROIC, while low-resolution, has a 6 kHz global frame rate and simultaneously encodes eight periodic or aperiodic transient target signatures at a maximum rate of 50 MHz using eight 8-bit counters. By transferring pixel-based image plane coding to the DROIC and utilizing sophisticated processing, our CIAs enable on-chip temporal super-resolution.

  10. Thin hybrid pixel assembly with backside compensation layer on ROIC

    Science.gov (United States)

    Bates, R.; Buttar, C.; McMullen, T.; Cunningham, L.; Ashby, J.; Doherty, F.; Gray, C.; Pares, G.; Vignoud, L.; Kholti, B.; Vahanen, S.

    2017-01-01

    The entire ATLAS inner tracking system will be replaced for operation at the HL-LHC . This will include a significantly larger pixel detector of approximately 15 m2. For this project, it is critical to reduce the mass of the hybrid pixel modules and this requires thinning both the sensor and readout chips to about 150 micrometres each. The thinning of the silicon chips leads to low bump yield for SnAg bumps due to bad co-planarity of the two chips at the solder reflow stage creating dead zones within the pixel array. In the case of the ATLAS FEI4 pixel readout chip thinned to 100 micrometres, the chip is concave, with the front side in compression, with a bow of +100 micrometres at room temperature which varies to a bow of -175 micrometres at the SnAg solder reflow temperature, caused by the CTE mismatch between the materials in the CMOS stack and the silicon substrate. A new wafer level process to address the issue of low bump yield be controlling the chip bow has been developed. A back-side dielectric and metal stack of SiN and Al:Si has been deposited on the readout chip wafer to dynamically compensate the stress of the front side stack. In keeping with a 3D process the materials used are compatible with Through Silicon Via (TSV) technology with a TSV last approach which is under development for this chip. It is demonstrated that the amplitude of the correction can be manipulated by the deposition conditions and thickness of the SiN/Al:Si stack. The bow magnitude over the temperature range for the best sample to date is reduced by almost a factor of 4 and the sign of the bow (shape of the die) remains constant. Further development of the backside deposition conditions is on-going with the target of close to zero bow at the solder reflow temperature and a minimal bow magnitude throughout the temperature range. Assemblies produced from FEI4 readout wafers thinned to 100 micrometres with the backside compensation layer have been made for the first time and

  11. Robustness of the ATLAS pixel clustering neural network algorithm

    CERN Document Server

    AUTHOR|(INSPIRE)INSPIRE-00407780; The ATLAS collaboration

    2016-01-01

    Proton-proton collisions at the energy frontier puts strong constraints on track reconstruction algorithms. In the ATLAS track reconstruction algorithm, an artificial neural network is utilised to identify and split clusters of neighbouring read-out elements in the ATLAS pixel detector created by multiple charged particles. The robustness of the neural network algorithm is presented, probing its sensitivity to uncertainties in the detector conditions. The robustness is studied by evaluating the stability of the algorithm's performance under a range of variations in the inputs to the neural networks. Within reasonable variation magnitudes, the neural networks prove to be robust to most variation types.

  12. The Phase-II ATLAS ITk pixel upgrade

    Science.gov (United States)

    Terzo, S.

    2017-07-01

    The entire tracking system of the ATLAS experiment will be replaced during the LHC Phase-II shutdown (foreseen to take place around 2025) by an all-silicon detector called the ``ITk'' (Inner Tracker). The innermost portion of ITk will consist of a pixel detector with five layers in the barrel region and ring-shaped supports in the end-cap regions. It will be instrumented with new sensor and readout electronics technologies to improve the tracking performance and cope with the HL-LHC environment, which will be severe in terms of occupancy and radiation levels. The new pixel system could include up to 14 m2 of silicon, depending on the final layout, which is expected to be decided in 2017. Several layout options are being investigated at the moment, including some with novel inclined support structures in the barrel end-cap overlap region and others with very long innermost barrel layers. Forward coverage could be as high as |eta| carbon-based materials cooled by evaporative carbon dioxide circulated in thin-walled titanium pipes embedded in the structures. Planar, 3D, and CMOS sensors are being investigated to identify the optimal technology, which may be different for the various layers. The RD53 Collaboration is developing the new readout chip. The pixel off-detector readout electronics will be implemented in the framework of the general ATLAS trigger and DAQ system. A readout speed of up to 5 Gb/s per data link will be needed in the innermost layers going down to 640 Mb/s for the outermost. Because of the very high radiation level inside the detector, the first part of the transmission has to be implemented electrically, with signals converted for optical transmission at larger radii. Extensive tests are being carried out to prove the feasibility of implementing serial powering, which has been chosen as the baseline for the ITk pixel system due to the reduced material in the servicing cables foreseen for this option.

  13. Operational experience of ATLAS SCT and Pixel Detector

    CERN Document Server

    Kocian, Martin; The ATLAS collaboration

    2017-01-01

    The ATLAS Inner Detector based on silicon sensors is consisting of a strip detector (SCT) and a pixel detector. It is the crucial component for vertexing and tracking in the ATLAS experiment. With the excellent performance of the LHC well beyond the original specification the silicon tracking detectors are facing substantial challenges in terms of data acquisition, radiation damage to the sensors, and SEUs in the readout ASICs. The approaches on how the detector systems cope with the demands of high luminosity operation while maintaining excellent performance through hardware upgrades, software and firmware algorithms, and operational settings, are presented.

  14. Modelling semiconductor pixel detectors

    CERN Document Server

    Mathieson, K

    2001-01-01

    expected after 200 ps in most cases. The effect of reducing the charge carrier lifetime and examining the charge collection efficiency has been utilised to explore how these detectors would respond in a harsh radiation environment. It is predicted that over critical carrier lifetimes (10 ps to 0.1 ns) an improvement of 40 % over conventional detectors can be expected. This also has positive implications for fabricating detectors, in this geometry, from materials which might otherwise be considered substandard. An analysis of charge transport in CdZnTe pixel detectors has been performed. The analysis starts with simulation studies into the formation of contacts and their influence on the internal electric field of planar detectors. The models include a number of well known defect states and these are balanced to give an agreement with a typical experimental I-V curve. The charge transport study extends to the development of a method for studying the effect of charge sharing in highly pixellated detectors. The ...

  15. Design and Optimization of Multi-Pixel Transition-Edge Sensors for X-Ray Astronomy Applications

    Science.gov (United States)

    Smith, Stephen J.; Adams, Joseph S.; Bandler, Simon R.; Chervenak, James A.; Datesman, Aaron Michael; Eckart, Megan E.; Ewin, Audrey J.; Finkbeiner, Fred M.; Kelley, Richard L.; Kilbourne, Caroline A.; hide

    2017-01-01

    Multi-pixel transition-edge sensors (TESs), commonly referred to as 'hydras', are a type of position sensitive micro-calorimeter that enables very large format arrays to be designed without commensurate increase in the number of readout channels and associated wiring. In the hydra design, a single TES is coupled to discrete absorbers via varied thermal links. The links act as low pass thermal filters that are tuned to give a different characteristic pulse shape for x-ray photons absorbed in each of the hydra sub pixels. In this contribution we report on the experimental results from hydras consisting of up to 20 pixels per TES. We discuss the design trade-offs between energy resolution, position discrimination and number of pixels and investigate future design optimizations specifically targeted at meeting the readout technology considered for Lynx.

  16. A Telescope Using CMS PSI46 Pixels and the CAPTAN for Acquisition and Control over Gigabit Ethernet

    Energy Technology Data Exchange (ETDEWEB)

    Rivera, Ryan A.; Turqueti, Marcos; Uplegger, Lorenzo; /Fermilab

    2009-01-01

    The Electronic Systems Engineering department of the Computing Division at the Fermi National Accelerator Laboratory has assembled a pixel test beam telescope for high energy physics detector research and development. The telescope features CMS PSI46 readout chips and a data acquisition and control system known as the Compact And Programmable daTa Acquisition Node or CAPTAN. The CAPTAN is a flexible and powerful system that meets the readout and control demands of a variety of pixel and strip detectors for high energy physics applications. The CAPTAN functions in a gigabit Ethernet network, which facilitates the coordination of the multiple pixel planes of the telescope. Through the use of the CAPTAN hardware, a unified telescope system is attained encompassing both the CMS PSI46 pixel components and adevice under test. This paper discusses results from the telescope project including mechanical design, alignment procedure, and attainble precision.

  17. Spectral response of a silicon detector with 220 {mu}m pixel size bonded to MEDIPIX2

    Energy Technology Data Exchange (ETDEWEB)

    Froejdh, Erik, E-mail: erik.frojdh@miun.se [Department of Information Technology and Media, Mid-Sweden University, SE-85170 Sundsvall (Sweden); Froejdh, Anna; Norlin, Boerje; Froejdh, Christer [Department of Information Technology and Media, Mid-Sweden University, SE-85170 Sundsvall (Sweden)

    2011-05-15

    Pixellated radiation detectors with single photon processing can be used for spectral X-ray imaging. A problem using such detectors with small pixels is that the spectral information is distorted by charge sharing. In order to get images with good spectral resolution a number of silicon sensors with a pixel size of 220 {mu}m were fabricated and bonded to a MEDIPIX2 readout chip using only a limited number of pixels on the readout chip. The device was then used in an X-ray microscopy setup to obtain good spatial resolution as well. It is shown that spectral imaging can provide good contrast images of embedded structures by selecting an appropriate energy window.

  18. Readout circuit design of the retina-like CMOS image sensor

    Science.gov (United States)

    Cao, Fengmei; Song, Shengyu; Bai, Tingzhu; Cao, Nan

    2015-02-01

    Readout circuit is designed for a special retina-like CMOS image sensor. To realize the pixels timing drive and readout of the sensor, the Altera's Cyclone II FPGA is used as a control chip. The voltage of the sensor is supported by a voltage chip initialized by SPI with AVR MCU system. The analog image signal outputted by the sensor is converted to digital image data by 12-bits A/D converter ADS807 and the digital data is memorized in the SRAM. Using the Camera-link image grabber, the data stored in SRAM is transformed to image shown on PC. Experimental results show the circuit works well on retina-like CMOS timing drive and image readout and images can be displayed properly on the PC.

  19. Method for producing a hybridization of detector array and integrated circuit for readout

    Science.gov (United States)

    Fossum, Eric R.; Grunthaner, Frank J.

    1993-08-01

    A process is explained for fabricating a detector array in a layer of semiconductor material on one substrate and an integrated readout circuit in a layer of semiconductor material on a separate substrate in order to select semiconductor material for optimum performance of each structure, such as GaAs for the detector array and Si for the integrated readout circuit. The detector array layer is lifted off its substrate, laminated on the metallized surface on the integrated surface, etched with reticulating channels to the surface of the integrated circuit, and provided with interconnections between the detector array pixels and the integrated readout circuit through the channels. The adhesive material for the lamination is selected to be chemically stable to provide electrical and thermal insulation and to provide stress release between the two structures fabricated in semiconductor materials that may have different coefficients of thermal expansion.

  20. Development of active edge pixel sensors and four-side buttable modules using vertical integration technologies

    Science.gov (United States)

    Macchiolo, A.; Andricek, L.; Moser, H.-G.; Nisius, R.; Richter, R. H.; Terzo, S.; Weigell, P.

    2014-11-01

    We present an R&D activity focused on the development of novel modules for the upgrade of the ATLAS pixel system at the High Luminosity LHC (HL-LHC). The modules consist of n-in-p pixel sensors, 100 or 200 μm thick, produced at VTT (Finland) with an active edge technology, which considerably reduces the dead area at the periphery of the device. The sensors are interconnected with solder bump-bonding to the ATLAS FE-I3 and FE-I4 read-out chips, and characterised with radioactive sources and beam tests at the CERN-SPS and DESY. The results of these measurements will be discussed for devices before and after irradiation up to a fluence of 5 ×1015neq /cm2. We will also report on the R&D activity to obtain Inter Chip Vias (ICVs) on the ATLAS read-out chip in collaboration with the Fraunhofer Institute EMFT. This step is meant to prove the feasibility of the signal transport to the newly created readout pads on the backside of the chips allowing for four side buttable devices without the presently used cantilever for wire bonding. The read-out chips with ICVs will be interconnected to thin pixel sensors, 75 μm and 150 μm thick, with the Solid Liquid Interdiffusion (SLID) technology, which is an alternative to the standard solder bump-bonding.

  1. Characterisation of pixel sensor prototypes for the ALICE ITS upgrade

    Energy Technology Data Exchange (ETDEWEB)

    Reidt, Felix [CERN (Switzerland); Physikalisches Institut, Universitaet Heidelberg (Germany); Collaboration: ALICE-Collaboration

    2014-07-01

    ALICE is preparing a major upgrade of its experimental apparatus to be installed in the second long LHC shutdown (LS2) in the years 2018-2019. A key element of the upgrade is the replacement of the Inner Tracking System (ITS) deploying Monolithic Active Pixel Sensors (MAPS). The upgraded ITS will have a reduced material budget while increasing the pixel density and readout rate capabilities. The novel design leads to higher pointing and momentum resolution as well as a p{sub T} acceptance extended to lower values. The corresponding sensor prototypes were qualified in laboratory measurements and beam tests with respect to their radiation tolerance and detection efficiency. This talk summarises recent results on the characterisation of prototypes belonging to the ALPIDE family.

  2. Capacitively coupled hybrid pixel assemblies for the CLIC vertex detector

    CERN Document Server

    AUTHOR|(SzGeCERN)734627; Benoit, Mathieu; Dannheim, Dominik; Dette, Karola; Hynds, Daniel; Kulis, Szymon; Peric, Ivan; Petric, Marko; Redford, Sophie; Sicking, Eva; Valerio, Pierpaolo

    2016-01-01

    The vertex detector at the proposed CLIC multi-TeV linear e+e- collider must have minimal material content and high spatial resolution, combined with accurate time-stamping to cope with the expected high rate of beam-induced backgrounds. One of the options being considered is the use of active sensors implemented in a commercial high-voltage CMOS process, capacitively coupled to hybrid pixel ASICs. A prototype of such an assembly, using two custom designed chips (CCPDv3 as active sensor glued to a CLICpix readout chip), has been characterised both in the lab and in beam tests at the CERN SPS using 120 GeV/c positively charged hadrons. Results of these characterisation studies are presented both for single and dual amplification stages in the active sensor. Pixel cross-coupling results are also presented, showing the sensitivity to placement precision and planarity of the glue layer.

  3. 3D silicon pixel sensors: Recent test beam results

    CERN Document Server

    Hansson, P; Sandaker, H; Korolkov, I; Barrera, C; Wermes, N; Borri, M; Grinstein, S; Troyano, I; Grenier, P; Devetak, E; Fleta, C; Kenney, C; Tsybychev, D; Nellist, C; Chmeissan, M; Su, D; DeWilde, B; Silverstein, D; Dorholt, O; Tsung, J; Sjoebaek, K; Stupak, J; Slaviec, T; Micelli, A; Helle, K; Bolle, E; Huegging, F; Kocian, M; Fazio, S; Balbuena, J; Dalla Betta, G F; La Rosa, A; Rivero, F; Mastroberardino, A; Hasi, J; Darbo, G; Boscardin, M; Da Via, C; Nordahl, P; Giordani, M; Jackson, P; Rohne, O; Gemme, C; Young, C

    2011-01-01

    The 3D silicon sensors aimed for the ATLAS pixel detector upgrade have been tested with a high energy pion beam at the CERN SPS in 2009. Two types of sensor layouts were tested: full-3D assemblies fabricated in Stanford, where the electrodes penetrate the entire silicon wafer thickness, and modified-3D assemblies fabricated at FBK-irst with partially overlapping electrodes. In both cases three read-out electrodes are ganged together to form pixels of dimension 50 x 400 mu m(2). Data on the pulse height distribution, tracking efficiency and resolution were collected for various particle incident angles, with and without a 1.6 T magnetic field. Data from a planar sensor of the type presently used in the ATLAS detector were used at the same time to give comparison. Published by Elsevier B.V.

  4. 3D silicon pixel sensors: Recent test beam results

    Energy Technology Data Exchange (ETDEWEB)

    Hansson, P., E-mail: phansson@cern.c [University of Oslo (Norway); Balbuena, J.; Barrera, C. [CNM Barcelona (Spain); Bolle, E. [University of Oslo (Norway); Borri, M. [Torino University (Italy); Boscardin, M. [FBK Trento (Italy); Chmeissan, M. [IFAE Barcelona (Spain); Dalla Betta, G.-F. [Universita di Trento and INFN Trento (Italy); Darbo, G. [INFN Genova (Italy); Da Via, C. [University of Manchester (United Kingdom); Devetak, E.; DeWilde, B. [Stony Brook University (United States); Su, D. [SLAC (United States); Dorholt, O. [University of Oslo (Norway); Fazio, S. [Calabria University (Italy); Fleta, C. [CNM Barcelona (Spain); Gemme, C. [INFN Genova (Italy); Giordani, M. [University of Udine and INFN Udine (Italy); Gjersdal, H. [University of Oslo (Norway); Grenier, P. [SLAC (United States)

    2011-02-01

    The 3D silicon sensors aimed for the ATLAS pixel detector upgrade have been tested with a high energy pion beam at the CERN SPS in 2009. Two types of sensor layouts were tested: full-3D assemblies fabricated in Stanford, where the electrodes penetrate the entire silicon wafer thickness, and modified-3D assemblies fabricated at FBK-irst with partially overlapping electrodes. In both cases three read-out electrodes are ganged together to form pixels of dimension 50x400{mu}m{sup 2}. Data on the pulse height distribution, tracking efficiency and resolution were collected for various particle incident angles, with and without a 1.6 T magnetic field. Data from a planar sensor of the type presently used in the ATLAS detector were used at the same time to give comparison.

  5. An EUDET/AIDA Pixel Beam Telescope for Detector Development

    CERN Document Server

    Rubinskiy, I

    2015-01-01

    Ahigh resolution(σ< 2 μm) beam telescope based on monolithic active pixel sensors (MAPS) was developed within the EUDET collaboration. EUDET was a coordinated detector R&D programme for the future International Linear Collider providing test beam infrastructure to detector R&D groups. The telescope consists of six sensor planes with a pixel pitch of either 18.4 μm or 10 μmand canbe operated insidea solenoidal magnetic fieldofupto1.2T.Ageneral purpose cooling, positioning, data acquisition (DAQ) and offine data analysis tools are available for the users. The excellent resolution, readout rate andDAQintegration capabilities made the telescopea primary beam tests tool also for several CERN based experiments. In this report the performance of the final telescope is presented. The plans for an even more flexible telescope with three differentpixel technologies(ATLASPixel, Mimosa,Timepix) withinthenew European detector infrastructure project AIDA are presented.

  6. Online Calibration and Performance of the ATLAS Pixel Detector

    CERN Document Server

    Keil, M

    2011-01-01

    The ATLAS Pixel Detector is the innermost detector of the ATLAS experiment at the Large Hadron Collider at CERN. It consists of 1744 silicon sensors equipped with approximately 80 million electronic channels, providing typically three measurement points with high resolution for particles emerging from the beam-interaction region, thus allowing measuring particle tracks and secondary vertices with very high precision. The readout system of the Pixel Detector is based on a bi-directional optical data transmission system between the detector and the data acquisition system with an individual link for each of the 1744 modules. Signal conversion components are located on both ends, approximately 80 m apart. This paper describes the tuning and calibration of the optical links and the detector modules, including measurements of threshold, noise, charge measurement, timing performance and the sensor leakage current.

  7. Bonding techniques for hybrid active pixel sensors (HAPS)

    Science.gov (United States)

    Bigas, M.; Cabruja, E.; Lozano, M.

    2007-05-01

    A hybrid active pixel sensor (HAPS) consists of an array of sensing elements which is connected to an electronic read-out unit. The most used way to connect these two different devices is bump bonding. This interconnection technique is very suitable for these systems because it allows a very fine pitch and a high number of I/Os. However, there are other interconnection techniques available such as direct bonding. This paper, as a continuation of a review [M. Lozano, E. Cabruja, A. Collado, J. Santander, M. Ullan, Nucl. Instr. and Meth. A 473 (1-2) (2001) 95-101] published in 2001, presents an update of the different advanced bonding techniques available for manufacturing a hybrid active pixel detector.

  8. Signal variations in high granularity Si pixel detectors

    CERN Document Server

    Tlustos, L; Heijne, Erik H M; Llopart-Cudie, Xavier

    2004-01-01

    Fixed pattern noise is one of the limiting factors of image quality and degrades the achievable spatial resolution. In the case of silicon sensors non-uniformities due to doping inhomogeneities can be limited by operating the sensor in strong overdepletion. For high granularity photon counting pixel detectors an additional high frequency interpixel signal variation is an important factor for the achievable signal to noise ratio (SNR). It is common practice to apply flatfield corrections to increase the SNR of the detector system. For the case of direct conversion detectors it can be shown that the Poisson limit can be reached for floodfield irradiation. However when used for imaging with spectral X-ray sources flatfield corrections are less effective. This is partly a consequence of charge sharing between adjacent pixels, which gives rise to an effective energy spectrum seen by the readout, which is different from the spectral content of the incident beam. In this paper we present simulations and measurements...

  9. CMS Pixel Detector design for HL-LHC

    CERN Document Server

    Migliore, Ernesto

    2016-01-01

    The LHC machine is planning an upgrade program which will smoothly bring the luminosity to about 7.5$\\times$10$^{34}$cm$^{-2}$s$^{-1}$ in 2028, to possibly reach an integrated luminosity of 3000 fb$^{-1}$ by the end of 2037. This High Luminosity scenario, HL-LHC, will present new challenges in higher data rates and increased radiation.In order to maintain its physics reach the CMS Collaboration has undertaken a preparation program of the detector known as Phase-2 upgrade. The CMS Phase-2 Pixel upgrade will require a high bandwidth readout system and high radiation tolerance for sensors and on-detector ASICs. Several technologies for the upgrade sensors are being studied. Serial powering schemes are under consideration to accommodate significant constraints on the system. These prospective designs, as well as new layout geometries that include very forward pixel discs, will be presented together with performance estimations.

  10. GaAs Medipix2 hybrid pixel detector

    CERN Document Server

    Kostamo, P; Vähänen, S; Tlustos, L; Fröjdh, C; Campbell, M; Zhilyaev, Y; Lipsanen, H

    2008-01-01

    A GaAs Medipix2 hybrid pixel detector based on high purity epitaxial GaAs material was successfully fabricated. The mesa type GaAs sensor with 256×256 pixels and total area of 1.4×1.4 cm2 was made of a 140-μm-thick epitaxial p–i–n structure utilizing reactive ion etching. A final thickness of approximately 110 μm for the all-epitaxial sensor element is achieved by back-thinning procedure. The sensor element is bump bonded to a Medipix2 read-out ASIC. The detector is capable of room temperature spectroscopic operation and it demonstrates the potential of GaAs for high resolution X-ray imaging systems operating at room temperature. This work describes the manufacturing process and electrical properties of the GaAs Medipix2 hybrid detector.

  11. Validation studies of the ATLAS pixel detector control system

    Energy Technology Data Exchange (ETDEWEB)

    Schultes, Joachim [University of Wuppertal, Gaussstr. 20, 42097 Wuppertal (Germany)]. E-mail: schultes@physik.uni-wuppertal.de; Becks, Karl-Heinz [University of Wuppertal, Gaussstr. 20, 42097 Wuppertal (Germany); Flick, Tobias [University of Wuppertal, Gaussstr. 20, 42097 Wuppertal (Germany); Henss, Tobias [University of Wuppertal, Gaussstr. 20, 42097 Wuppertal (Germany); Imhaeuser, Martin [University of Wuppertal, Gaussstr. 20, 42097 Wuppertal (Germany); Kersten, Susanne [University of Wuppertal, Gaussstr. 20, 42097 Wuppertal (Germany); Kind, Peter [University of Wuppertal, Gaussstr. 20, 42097 Wuppertal (Germany); Lantzsch, Kerstin [University of Wuppertal, Gaussstr. 20, 42097 Wuppertal (Germany); Maettig, Peter [University of Wuppertal, Gaussstr. 20, 42097 Wuppertal (Germany); Reeves, Kendall [University of Wuppertal, Gaussstr. 20, 42097 Wuppertal (Germany); Weingarten, Jens [University of Bonn, Nussallee 12, 53115 Bonn (Germany)

    2006-09-01

    The ATLAS pixel detector consists of 1744 identical silicon pixel modules arranged in three barrel layers providing coverage for the central region, and three disk layers on either side of the primary interaction point providing coverage of the forward regions. Once deployed into the experiment, the detector will employ optical data transfer, with the requisite powering being provided by a complex system of commercial and custom-made power supplies. However, during normal performance and production tests in the laboratory, only single modules are operated and electrical readout is used. In addition, standard laboratory power supplies are used. In contrast to these normal tests, the data discussed here were obtained from a multi-module assembly which was powered and read out using production items: the optical data path, the final design power supply system using close to final services, and the Detector Control System (DCS)

  12. CMS Pixel Detector design for HL-LHC

    Science.gov (United States)

    Migliore, E.

    2016-12-01

    The LHC machine is planning an upgrade program which will smoothly bring the luminosity to about 7.5×1034cm-2s-1 in 2028, to possibly reach an integrated luminosity of 3000 fb-1 by the end of 2037. This High Luminosity scenario, HL-LHC, will present new challenges in higher data rates and increased radiation. In order to maintain its physics reach the CMS collaboration has undertaken a preparation program of the detector known as Phase-2 upgrade. The CMS Phase-2 Pixel upgrade will require a high bandwidth readout system and high radiation tolerance for sensors and on-detector ASICs. Several technologies for the upgrade sensors are being studied. Serial powering schemes are under consideration to accommodate significant constraints on the system. These prospective designs, as well as new layout geometries that include very forward pixel discs, will be presented together with performance estimation.

  13. First results on the NA60 pixel telescope in In-In collisions

    CERN Document Server

    Radermacher, E

    2003-01-01

    The NA60 experiment aims at studying the production of prompt dimuons and of open charm with proton and heavy ion beams at the CERN SPS. Downstream of the nuclear targets and inside a 2.5 T dipole magnet a pixel telescope measures all charged tracks, from which some are then matched to muons recorded in the muon spectrometer placed behind a hadron absorber. The high multiplicity of charged particles imposes the use of pixel detectors. The constructed pixel telescope is composed of 16 planes with 96 pixel assemblies in total, made from radiation tolerant ALICE1 LHCb pixel readout chips bonded to pixel sensors. The 8 planes nearest to the target contain 4 pixel assemblies and are followed by 8 planes with 8 assemblies. First successful tests of 3 pixel planes, exposed to Pb-Pb collisions, were performed in October 2002. This paper describes the design and assembly of the complete NA60 pixel telescope and gives an overview of the first results obtained in the first weeks of In-In collisions.

  14. Increased space-bandwidth product in pixel super-resolved lensfree on-chip microscopy

    Science.gov (United States)

    Greenbaum, Alon; Luo, Wei; Khademhosseinieh, Bahar; Su, Ting-Wei; Coskun, Ahmet F.; Ozcan, Aydogan

    2013-04-01

    Pixel-size limitation of lensfree on-chip microscopy can be circumvented by utilizing pixel-super-resolution techniques to synthesize a smaller effective pixel, improving the resolution. Here we report that by using the two-dimensional pixel-function of an image sensor-array as an input to lensfree image reconstruction, pixel-super-resolution can improve the numerical aperture of the reconstructed image by ~3 fold compared to a raw lensfree image. This improvement was confirmed using two different sensor-arrays that significantly vary in their pixel-sizes, circuit architectures and digital/optical readout mechanisms, empirically pointing to roughly the same space-bandwidth improvement factor regardless of the sensor-array employed in our set-up. Furthermore, such a pixel-count increase also renders our on-chip microscope into a Giga-pixel imager, where an effective pixel count of ~1.6-2.5 billion can be obtained with different sensors. Finally, using an ultra-violet light-emitting-diode, this platform resolves 225 nm grating lines and can be useful for wide-field on-chip imaging of nano-scale objects, e.g., multi-walled-carbon-nanotubes.

  15. Multiplexed readout of MMC detector arrays using non-hysteretic rf-SQUIDs

    OpenAIRE

    Kempf, S.; Wegner, M; Gastaldo, L.; Fleischmann, A.; Enss, C.

    2013-01-01

    Metallic magnetic calorimeters (MMCs) are widely used for various experiments in fields ranging from atomic and nuclear physics to x-ray spectroscopy, laboratory astrophysics or material science. Whereas in previous experiments single pixel detectors or small arrays have been used, for future applications large arrays are needed. Therefore, suitable multiplexing techniques for MMC arrays are currently under development. A promising approach for the readout of large arrays is the microwave SQU...

  16. A kilo-pixel imaging system for future space based far-infrared observatories using microwave kinetic inductance detectors

    Science.gov (United States)

    Baselmans, J. J. A.; Bueno, J.; Yates, S. J. C.; Yurduseven, O.; Llombart, N.; Karatsu, K.; Baryshev, A. M.; Ferrari, L.; Endo, A.; Thoen, D. J.; de Visser, P. J.; Janssen, R. M. J.; Murugesan, V.; Driessen, E. F. C.; Coiffard, G.; Martin-Pintado, J.; Hargrave, P.; Griffin, M.

    2017-05-01

    Aims: Future astrophysics and cosmic microwave background space missions operating in the far-infrared to millimetre part of the spectrum will require very large arrays of ultra-sensitive detectors in combination with high multiplexing factors and efficient low-noise and low-power readout systems. We have developed a demonstrator system suitable for such applications. Methods: The system combines a 961 pixel imaging array based upon Microwave Kinetic Inductance Detectors (MKIDs) with a readout system capable of reading out all pixels simultaneously with only one readout cable pair and a single cryogenic amplifier. We evaluate, in a representative environment, the system performance in terms of sensitivity, dynamic range, optical efficiency, cosmic ray rejection, pixel-pixel crosstalk and overall yield at an observation centre frequency of 850 GHz and 20% fractional bandwidth. Results: The overall system has an excellent sensitivity, with an average detector sensitivity =3×10-19 WHz measured using a thermal calibration source. At a loading power per pixel of 50 fW we demonstrate white, photon noise limited detector noise down to 300 mHz. The dynamic range would allow the detection of 1 Jy bright sources within the field of view without tuning the readout of the detectors. The expected dead time due to cosmic ray interactions, when operated in an L2 or a similar far-Earth orbit, is found to be <4%. Additionally, the achieved pixel yield is 83% and the crosstalk between the pixels is <-30 dB. Conclusions: This demonstrates that MKID technology can provide multiplexing ratios on the order of a 1000 with state-of-the-art single pixel performance, and that the technology is now mature enough to be considered for future space based observatories and experiments.

  17. The Upgraded Pixel Detector of the ATLAS Experiment for Run-2

    CERN Document Server

    Ferrere, Didier; The ATLAS collaboration

    2016-01-01

    Run-2 of the LHC is providing new challenges to track and vertex reconstruction with higher energies, denser jets and higher rates. Therefore the ATLAS experiment has constructed the first 4-layer Pixel detector in HEP, installing a new Pixel layer, also called Insertable B-Layer (IBL). IBL is a fourth layer of pixel detectors, and has been installed in May 2014 at a radius of 3.3 cm between the existing Pixel Detector and a new smaller radius beam-pipe. The new detector, built to cope with high radiation and expected occupancy, is the first large scale application of 3D detectors and CMOS 130nm technology. In addition the Pixel detector was refurbished with a new service quarter panel to recover about 3% of defective modules lost during run-1 and a new optical readout system to readout the data at higher speed while reducing the occupancy when running with increased luminosity. The commissioning and performance of the 4-layer Pixel Detector, in particular the IBL, will be presented, using collision data.

  18. The upgraded Pixel Detector of the ATLAS Experiment for Run2 at the Large Hadron Collider

    CERN Document Server

    Backhaus, Malte; The ATLAS collaboration

    2015-01-01

    Run-2 of the LHC will provide new challenges to track and vertex reconstruction with higher energies, denser jets and higher rates. Therefore the ATLAS experiment has constructed the first 4-layer Pixel detector in HEP, installing a new Pixel layer, also called Insertable B-Layer (IBL). IBL is a fourth layer of pixel detectors, and has been installed in May 2014 at a radius of 3.3 cm between the existing Pixel Detector and a new smaller radius beam-pipe. To cope with the high radiation and pixel occupancy due to the proximity to the interaction point, two different silicon sensor technologies (planar and 3D) have been developed as well as a new read-out chip within CMOS 130nm technology and with larger area, smaller pixel size and faster readout capability. The new detector is the first large scale application of of 3D detectors and CMOS 130nm technology. An overview of the lessons learned during the IBL project will be presented, focusing on the challenges and highlighting the issues met during the productio...

  19. The upgraded Pixel Detector of the ATLAS experiment for Run-2 at the Large Hadron Collider

    CERN Document Server

    Giordani, MarioPaolo; The ATLAS collaboration

    2016-01-01

    Run-2 of the LHC is providing new challenges to track and vertex reconstruction with higher energies, denser jets and higher rates. Therefore the ATLAS experiment has constructed the first 4-layer Pixel detector in HEP, installing a new Pixel layer, also called Insertable B-Layer (IBL). IBL is a fourth layer of pixel detectors, and has been installed in May 2014 at a radius of 3.3 cm between the existing Pixel Detector and a new smaller radius beam-pipe. The new detector, built to cope with high radiation and expected occupancy, is the first large scale application of 3D detectors and CMOS 130nm technology. In addition the Pixel detector was refurbished with a new service quarter panel to recover about 3% of defective modules lost during run-1 and a new optical readout system to readout the data at higher speed while reducing the occupancy when running with increased luminosity. The commissioning and performance of the 4-layer Pixel Detector, in particular the IBL, will be presented, using collision data.

  20. The Upgraded Pixel Detector of the ATLAS Experiment for Run-2 at the LHC

    CERN Document Server

    Giordani, MarioPaolo; The ATLAS collaboration

    2016-01-01

    Run-2 of the LHC is providing new challenges to track and vertex reconstruction with higher energies, denser jets and higher rates. Therefore the ATLAS experiment has constructed the first 4-layer Pixel detector in HEP, installing a new Pixel layer, also called Insertable B-Layer (IBL). IBL is a fourth layer of pixel detectors, and has been installed in May 2014 at a radius of 3.3 cm between the existing Pixel Detector and a new smaller radius beam-pipe. The new detector, built to cope with high radiation and expected occupancy, is the first large scale application of 3D detectors and CMOS 130 nm technology. In addition the Pixel detector was refurbished with a new service quarter panel to recover about 3% of defective modules lost during run-1 and a new optical readout system to readout the data at higher speed while reducing the occupancy when running with increased luminosity. The commissioning and performance of the 4-layer Pixel Detector, in particular the IBL, will be presented using collision data.

  1. Study of FPGA and GPU based pixel calibration for ATLAS IBL

    CERN Document Server

    Dopke, J; The ATLAS collaboration; Flick, T; Gabrielli, A; Grosse-Knetter, J; Krieger, N; Kugel, A; Polini, A; Schroer, N

    2010-01-01

    The insertable B-layer (IBL) is a new stage of the ATLAS pixel detector to be installed around 2014. 12 million pixel are attached to new FE-I4 readout ASICs, each controlling 26680 pixel. Compared to the existing FE-I3 based detector the new system features higher readout speed of 160Mbit/s per ASIC and simplified control. For calibration defined charges are applied to all pixels and the resulting time-over-threshold values are evaluated. In the present system multiple sets of two custom VME cards which employ a combination of FPGA and DSP technology are used for I/O interfacing, formatting and processing. The execution time of 51s to perform a threshold scan on a FE-I3 module of 46080 pixel is composed of 8s control, 29s transfer, 7.5s histogramming and 7s analysis. Extrapolating to FE-I4 the times per module of 53760 pixels are 12ms, 5.8s, 9.4s and 8.3s, a total of 23.5s. We present a proposal for a novel approach to the dominant tasks for FE-I4: histogramming and ananlysis. An FPGA-based histogramming uni...

  2. A discrete component low-noise preamplifier readout for a linear (1×16) SiC photodiode array

    Energy Technology Data Exchange (ETDEWEB)

    Kahle, Duncan [NASA, Goddard Space Flight Center, Detector Systems Branch, Greenbelt, MD 20771 (United States); Aslam, Shahid, E-mail: shahid.aslam-1@nasa.gov [NASA, Goddard Space Flight Center, Planetary Systems Laboratory, Greenbelt, MD 20771 (United States); Herrero, Federico A.; Waczynski, Augustyn [NASA, Goddard Space Flight Center, Detector Systems Branch, Greenbelt, MD 20771 (United States)

    2016-09-11

    A compact, low-noise and inexpensive preamplifier circuit has been designed and fabricated to optimally readout a common cathode (1×16) channel 4H-SiC Schottky photodiode array for use in ultraviolet experiments. The readout uses an operational amplifier with 10 pF capacitor in the feedback loop in parallel with a low leakage switch for each of the channels. This circuit configuration allows for reiterative sample, integrate and reset. A sampling technique is given to remove Johnson noise, enabling a femtoampere level readout noise performance. Commercial-off-the-shelf acquisition electronics are used to digitize the preamplifier analog signals. The data logging acquisition electronics has a different integration circuit, which allows the bandwidth and gain to be independently adjusted. Using this readout, photoresponse measurements across the array between spectral wavelengths 200 nm and 370 nm are made to establish the array pixels external quantum efficiency, current responsivity and noise equivalent power.

  3. The ALICE pixel detector

    CERN Document Server

    Mercado Perez, J

    2002-01-01

    The present document is a brief summary of the performed activities during the 2001 Summer Student Programme at CERN under the Scientific Summer at Foreign Laboratories Program organized by the Particles and Fields Division of the Mexican Physical Society (Sociedad Mexicana de Fisica). In this case, the activities were related with the ALICE Pixel Group of the EP-AIT Division, under the supervision of Jeroen van Hunen, research fellow in this group. First, I give an introduction and overview to the ALICE experiment; followed by a description of wafer probing. A brief summary of the test beam that we had from July 13th to July 25th is given as well. (3 refs).

  4. Pixelated gamma detector

    Energy Technology Data Exchange (ETDEWEB)

    Dolinsky, Sergei Ivanovich; Yanoff, Brian David; Guida, Renato; Ivan, Adrian

    2016-12-27

    A pixelated gamma detector includes a scintillator column assembly having scintillator crystals and optical transparent elements alternating along a longitudinal axis, a collimator assembly having longitudinal walls separated by collimator septum, the collimator septum spaced apart to form collimator channels, the scintillator column assembly positioned adjacent to the collimator assembly so that the respective ones of the scintillator crystal are positioned adjacent to respective ones of the collimator channels, the respective ones of the optical transparent element are positioned adjacent to respective ones of the collimator septum, and a first photosensor and a second photosensor, the first and the second photosensor each connected to an opposing end of the scintillator column assembly. A system and a method for inspecting and/or detecting defects in an interior of an object are also disclosed.

  5. X-ray Polarimetry with an Active-Matrix Pixel Proportional Counter

    Science.gov (United States)

    Black, J. K.; Deines-Jones, P.; Ready, S. E.; Street, R. A.

    2003-01-01

    We report the first results from an X-ray polarimeter with a micropattern gas proportional counter using an amorphous silicon active matrix readout. With 100% polarized X-rays at 4.5 keV, we obtain a modulation factor of 0.33+/- 0.03, confirming previous reports of the high polarization sensitivity of a finely segmented pixel proportional counter. The detector described here has a geometry suitable for the focal plane of an astronomical X-ray telescope. Amorphous silicon readout technology will enable additional extensions and improvements.

  6. Study of micro pixel photon counters for a high granularity scintillator-based hadron calorimeter

    Energy Technology Data Exchange (ETDEWEB)

    D' Ascenzo, N. [Hamburg Univ. (Germany)]|[Deutsches Elektronen-Synchrotron (DESY), Hamburg (Germany); Eggemann, A.; Garutti, E. [Deutsches Elektronen-Synchrotron (DESY), Hamburg (Germany)

    2007-11-15

    A new Geiger mode avalanche photodiode, the Micro Pixel Photon Counter (MPPC), was recently released by Hamamatsu. It has a high photo-detection efficiency in the 420 nm spectral region. This product can represent an elegant candidate for the design of a high granularity scintillator based hadron calorimeter for the International Linear Collider. In fact, the direct readout of the blue scintillation photons with a MPPC is a feasible techological solution. The readout of a plastic scintillator by a MPPC, both mediated by the traditional wavelength shifting fiber, and directly coupled, has been systematically studied. (orig.)

  7. 65 nm CMOS analog front-end for pixel detectors at the HL-LHC

    Science.gov (United States)

    Gaioni, L.; De Canio, F.; Manghisoni, M.; Ratti, L.; Re, V.; Traversi, G.

    2016-02-01

    This work is concerned with the design and the experimental characterization of analog front-end electronics conceived for experiments with unprecedented particle rates and radiation levels at future high-energy physics colliders. A prototype chip integrating different test structures has been submitted in the framework of the CHIPIX65 project. These structures are standalone channels for the readout of hybrid pixels, featuring a charge sensitive preamplifier as the first stage of the readout chain, a high-speed comparator and a circuit for fine threshold tuning. The paper thoroughly discusses the results, mainly focused on the charge sensitive amplifier, coming from the characterization of the submitted test structures.

  8. Beam Test Characterization of CMS Silicon Pixel Detectors for the Phase-1 Upgrade

    CERN Document Server

    Korol, Ievgen

    2015-01-01

    a reduced diameter beam pipe, as compared to the present three layer pixel detector in the central region. A new digital version of the front-end readout chip has been designed and tested; it has increased data buffering and readout link speed to maintain high efficiency at increasing occupancy. In addition, it offers lower charge thresholds that will improve the tracking efficiency and position resolution.\\\\ Single chip modules have been evaluated in the DESY electron test beam in terms of charge collection, noise, tracking effici...

  9. Module production for the Phase 1 upgrade of the CMS forward pixel detector

    Science.gov (United States)

    Siado Castaneda, Joaquin

    2017-01-01

    For Run 2 the Large Hadron Collider will run at a much higher instantaneous luminosity, which requires an upgrade of the CMS pixel detector. The detector consists of rectangular silicon sensors, segmented into 100 μm by 150 μm pixels, bonded to readout chips, with one sensor and a 8x2 array of readout chips forming a module. Due to its high granularity and good spatial resolution, about 10 μm for a single hit, the pixel detector is used for track reconstruction, pileup mitigation, and b-quark tagging in many physics analyses. Being the innermost sub-detector of CMS it receives the most radiation damage, and therefore needs to be replaced most often. For the phase 1 upgrade an additional disk in the forward region and increased buffer space in the readout chip will improve the pixel performance by increasing efficiency and reducing fake rates. The University of Nebraska-Lincoln is one of the two sites where modules are being assembled. This talk features the steps of the assembly process as well as challenges encountered and overcome during production of over 500 modules. The CMS Collaboration.

  10. Development of n-in-p pixel modules for the ATLAS upgrade at HL-LHC

    Science.gov (United States)

    Macchiolo, A.; Nisius, R.; Savic, N.; Terzo, S.

    2016-09-01

    Thin planar pixel modules are promising candidates to instrument the inner layers of the new ATLAS pixel detector for HL-LHC, thanks to the reduced contribution to the material budget and their high charge collection efficiency after irradiation. 100-200 μm thick sensors, interconnected to FE-I4 read-out chips, have been characterized with radioactive sources and beam tests at the CERN-SPS and DESY. The results of these measurements are reported for devices before and after irradiation up to a fluence of 14 ×1015 neq /cm2 . The charge collection and tracking efficiency of the different sensor thicknesses are compared. The outlook for future planar pixel sensor production is discussed, with a focus on sensor design with the pixel pitches (50×50 and 25×100 μm2) foreseen for the RD53 Collaboration read-out chip in 65 nm CMOS technology. An optimization of the biasing structures in the pixel cells is required to avoid the hit efficiency loss presently observed in the punch-through region after irradiation. For this purpose the performance of different layouts have been compared in FE-I4 compatible sensors at various fluence levels by using beam test data. Highly segmented sensors will represent a challenge for the tracking in the forward region of the pixel system at HL-LHC. In order to reproduce the performance of 50×50 μm2 pixels at high pseudo-rapidity values, FE-I4 compatible planar pixel sensors have been studied before and after irradiation in beam tests at high incidence angle (80°) with respect to the short pixel direction. Results on cluster shapes, charge collection and hit efficiency will be shown.

  11. Planar Pixelations and Image Recognition

    CERN Document Server

    Rowekamp, Brandon

    2011-01-01

    Any subset of the plane can be approximated by a set of square pixels. This transition from a shape to its pixelation is rather brutal since it destroys geometric and topological information about the shape. Using a technique inspired by Morse Theory, we algorithmically produce a PL approximation of the original shape using only information from its pixelation. This approximation converges to the original shape in a very strong sense: as the size of the pixels goes to zero we can recover important geometric and topological invariants of the original shape such as Betti numbers, area, perimeter and curvature measures.

  12. Development of a pixel sensor with fine space-time resolution based on SOI technology for the ILC vertex detector

    Science.gov (United States)

    Ono, Shun; Togawa, Manabu; Tsuji, Ryoji; Mori, Teppei; Yamada, Miho; Arai, Yasuo; Tsuboyama, Toru; Hanagaki, Kazunori

    2017-02-01

    We have been developing a new monolithic pixel sensor with silicon-on-insulator (SOI) technology for the International Linear Collider (ILC) vertex detector system. The SOI monolithic pixel detector is realized using standard CMOS circuits fabricated on a fully depleted sensor layer. The new SOI sensor SOFIST can store both the position and timing information of charged particles in each 20×20 μm2 pixel. The position resolution is further improved by the position weighted with the charges spread to multiple pixels. The pixel also records the hit timing with an embedded time-stamp circuit. The sensor chip has column-parallel analog-to-digital conversion (ADC) circuits and zero-suppression logic for high-speed data readout. We are designing and evaluating some prototype sensor chips for optimizing and minimizing the pixel circuit.

  13. Silicon Avalanche Pixel Sensor for High Precision Tracking

    CERN Document Server

    D'Ascenzo, N; Moon, C S; Morsani, F; Ratti, L; Saveliev, V; Navarro, A Savoy; Xie, Q

    2013-01-01

    The development of an innovative position sensitive pixelated sensor to detect and measure with high precision the coordinates of the ionizing particles is proposed. The silicon avalanche pixel sensors (APiX) is based on the vertical integration of avalanche pixels connected in pairs and operated in coincidence in fully digital mode and with the processing electronics embedded on the chip. The APiX sensor addresses the need to minimize the material budget and related multiple scattering effects in tracking systems requiring a high spatial resolution in the presence of a large occupancy. The expected operation of the new sensor features: low noise, low power consumption and suitable radiation tolerance. The APiX device provides on-chip digital information on the position of the coordinate of the impinging charged particle and can be seen as the building block of a modular system of pixelated arrays, implementing a sparsified readout. The technological challenges are the 3D integration of the device under CMOS ...

  14. Readout scheme of the upgraded ALICE TPC

    CERN Document Server

    Appelshaeuser, Harald; Ivanov, Marian; Lippmann, Christian; Wiechula, Jens

    2016-01-01

    In this document, we present the updated readout scheme for the ALICE TPC Upgrade. Two major design changes are implemented with respect to the concept that was presented in the TPC Upgrade Technical Design Report: – The SAMPA front-end ASIC will be used in direct readout mode. – The ADC sampling frequency will be reduced from 10 to 5 MHz. The main results from simulations and a description of the new readout scheme is outlined.

  15. A data readout approach for physics experiments

    Institute of Scientific and Technical Information of China (English)

    HUANG Xi-Ru; CAO Ping; GAO Li-Wei; ZHENG Jia-Jun

    2015-01-01

    With increasing physical event rates and the number of electronic channels,traditional readout schemes meet the challenge of improving readout speed caused by the limited bandwidth of the crate backplane.In this paper,a high-speed data readout method based on the Ethernet is presented to make each readout module capable of transmitting data to the DAQ.Features of exPlicitly parallel data transmitting and distributed network architecture give the readout system the advantage of adapting varying requirements of particle physics experiments.Furthermore,to guarantee the readout performance and flexibility,a standalone embedded CPU system is utilized for network protocol stack processing.To receive the customized data format and protocol from front-end electronics,a field programmable gate array (FPGA) is used for logic reconfiguration.To optimize the interface and to improve the data throughput between CPU and FPGA,a sophisticated method based on SRAM is presented in this paper.For the purpose of evaluating this high-speed readout method,a simplified readout module is designed and implemented.Test results show that this module can support up to 70 Mbps data throughput from the readout module to DAQ.

  16. A 128 pixel linear array for radiotherapy quality assurance

    Science.gov (United States)

    Franco, L.; Gómez, F.; Iglesias, A.; Lobato, R.; Marín, J.; Mosquera, J.; Pardo, J.; Pazos, A.; Pena, J.; Pombar, M.; Rodríguez, A.; Saavedra, D.; Sendón, J.; Yañez, A.

    2004-12-01

    New radiotherapy techniques require detectors able to verify and monitor the clinical beam with high spatial resolution and fast response. Room temperature organic liquid ionization detectors are becoming an alternative to standard air ionization chambers, due to their tissue equivalent behavior, their sensibility and small directional dependence. A liquid isooctane filled ionization linear array for radiotherapy quality assurance has been designed, built and tested. The detector consists of 128 pixels, each of them with an area of 1.7 mm×1.7 mm and a gap of 0.5 mm. The small pixel size makes the detector ideal for high gradient beam profiles like those present in Intensity Modulated Radiation Therapy. The gap and the polarization voltage have been chosen in order to guarantee a linear relationship between the dose rate and the readout signal at high dose rates. As readout electronics we use the X-ray Data Acquisition System with the Xchip developed by the CCLRC.In the first device tests we have confirmed linearity up to a 6.7 Gy/min dose rate with a deviation less than 1%. A profile with a signal-to-noise ratio around 500 can be obtained for a 4 Gy/min dose rate with a 10 ms integration time.

  17. A 128 pixel linear array for radiotherapy quality assurance

    Energy Technology Data Exchange (ETDEWEB)

    Franco, L. [Departmento de Fisica de Particulas, Facultade de Fisica, Universidade de Santiago, campus sur s/n, 15782 Santiago de Compostela (Spain); Gomez, F. [Departmento de Fisica de Particulas, Facultade de Fisica, Universidade de Santiago, campus sur s/n, 15782 Santiago de Compostela (Spain)]. E-mail: faustgr@usc.es; Iglesias, A. [Departmento de Fisica de Particulas, Facultade de Fisica, Universidade de Santiago, campus sur s/n, 15782 Santiago de Compostela (Spain); Lobato, R. [Hospital Clinico Universitario de Santiago, 15706 Santiago (Spain); Marin, J. [CIEMAT, Laboratorio de Electronica y Automatica, 28040 Madrid Spain (Spain); Mosquera, J. [Hospital Clinico Universitario de Santiago, 15706 Santiago (Spain); Pardo, J. [Departmento de Fisica de Particulas, Facultade de Fisica, Universidade de Santiago, campus sur s/n, 15782 Santiago de Compostela (Spain)]. E-mail: juanpm@usc.es; Pazos, A. [Departmento de Fisica de Particulas, Facultade de Fisica, Universidade de Santiago, campus sur s/n, 15782 Santiago de Compostela (Spain); Pena, J. [Departmento de Fisica de Particulas, Facultade de Fisica, Universidade de Santiago, campus sur s/n, 15782 Santiago de Compostela (Spain); Pombar, M. [Hospital Clinico Universitario de Santiago, 15706 Santiago (Spain); Rodriguez, A. [Departmento de Fisica de Particulas, Facultade de Fisica, Universidade de Santiago, campus sur s/n, 15782 Santiago de Compostela (Spain); Saavedra, D. [Universidade da Coruna, Dpto. de Enxeneria Industrial II, 15403 Ferrol Spain (Spain); Sendon, J. [Hospital Clinico Universitario de Santiago, 15706 Santiago (Spain); Yanez, A. [Universidade da Coruna, Dpto. de Enxeneria Industrial II, 15403 Ferrol Spain (Spain)

    2004-12-11

    New radiotherapy techniques require detectors able to verify and monitor the clinical beam with high spatial resolution and fast response. Room temperature organic liquid ionization detectors are becoming an alternative to standard air ionization chambers, due to their tissue equivalent behavior, their sensibility and small directional dependence. A liquid isooctane filled ionization linear array for radiotherapy quality assurance has been designed, built and tested. The detector consists of 128 pixels, each of them with an area of 1.7mmx1.7mm and a gap of 0.5mm. The small pixel size makes the detector ideal for high gradient beam profiles like those present in Intensity Modulated Radiation Therapy. The gap and the polarization voltage have been chosen in order to guarantee a linear relationship between the dose rate and the readout signal at high dose rates. As readout electronics we use the X-ray Data Acquisition System with the Xchip developed by the CCLRC.In the first device tests we have confirmed linearity up to a 6.7Gy/min dose rate with a deviation less than 1%. A profile with a signal-to-noise ratio around 500 can be obtained for a 4Gy/min dose rate with a 10 ms integration time.

  18. Pilot System for the Phase 1 Pixel Upgrade

    CERN Document Server

    AUTHOR|(CDS)2072269

    2015-01-01

    The CMS phase 1 pixel upgrade is planned for installation in 2016-2017, incorporating new front-end ASICs with digital 400 Mbps data links to handle a higher instantaneous luminosity of up to 2.5 $x$ 10$^{34}$ cm$^{-2}$ s$^{-1}$ and trigger rates of 100 kHz with bunch spacing scenarios of 25 or 50 ns. The new digital readout requires new back-end electronics incorporating faster optical receivers and firmware for decoding the new data format. Additionally the phase 1 upgrade is powered from DC-DC converters installed inside CMS close to the modules. To gain experience with this new readout chain and DC-DC converters under realistic operating conditions (trigger rates, backgrounds, high data occupancy, and possible single-event upsets) a pilot detector system comprising eight sensor modules, service electronics, optical links, and back-end electronics has been prepared using pre-production parts. The pilot system was installed with the present forward pixel detector in 2014 during long shutdown 1 (LS1). The pi...

  19. Pixel hybrid photon detector magnetic distortions characterization and compensation

    CERN Document Server

    Aglieri-Rinella, G; D'Ambrosio, Carmelo; Forty, Roger W; Gys, Thierry; Patel, Mitesh; Piedigrossi, Didier; Van Lysebetten, Ann

    2004-01-01

    The LHCb experiment requires positive kaon identification in the momentum range 2-100 GeV/c. This is provided by two ring imaging Cherenkov detectors. The stringent requirements on the photon detectors are fully satisfied by the novel pixel hybrid photon detector, HPD. The HPD is a vacuum tube with a quartz window, S20 photo-cathode, cross-focusing electron optics and a silicon anode encapsulated within the tube. The anode is a 32*256 pixels hybrid detector, with a silicon sensor bump-bonded onto a readout chip containing 8192 channels with analogue front-end and digital read-out circuitry. An external magnetic field influences the trajectory of the photoelectrons and could thereby degrade the inherent excellent space resolution of the HPD. The HPDs must be operational in the fringe magnetic field of the LHCb magnet. This paper reports on an extensive experimental characterization of the distortion effects. The characterization has allowed the development of parameterisations and of a compensation algorithm. ...

  20. Investigation of DEPFET as vertex detector at ILC. Intrinsic properties, radiation hardness and alternative readout schemes

    Energy Technology Data Exchange (ETDEWEB)

    Rummel, Stefan

    2009-07-20

    The International Linear Collider (ILC) is supposed to be the next generation lepton collider. The detectors at ILC are intended to be precision instruments improving the performance in impact parameter (IP), momentum and energy resolution significantly compared to previous detectors at lepton colliders. To achieve this goal it is necessary to develop new detector technologies or pushing existing technologies to their technological edges. Regarding the Vertex detector (VTX) this implies challenges in resolution, material budget, power consumption and readout speed. A promising technology for the Vertex detector is the Depleted Field Effect Transistor (DEPFET). The DEPFET is a semiconductor device with in-pixel ampli cation integrated on a fully depleted bulk. This allows building detectors with intrinsically high SNR due to the large sensitive volume and the small input capacitance at the rst ampli er. To reach the ambitious performance goals it is important to understand its various features: clear performance, internal amplification, noise and radiation hardness. The intrinsic noise is analyzed, showing that the contribution of the DEPFET is below 50 e{sup -} at the required speed. Moreover it is possible to show that the internal ampli cation could be further improved to more than 1nA/e{sup -} using the standard DEPFET technology. The clear performance is investigated on matrix level utilizing a dedicated setup for single pixel testing which allows direct insight into the DEPFET operation, without the complexity of the full readout system. It is possible to show that a full clear could be achieved with a voltage pulse of 10 V. Furthermore a novel clear concept - the capacitive coupled clear gate - is demonstrated. The radiation hardness is studied with respect to the system performance utilizing various irradiations with ionizing and non ionizing particles. The impact on the bulk as well as the interface damage is investigated. Up to now the readout is performed

  1. The color of X-rays: Spectral X-ray computed tomography using energy sensitive pixel detectors

    NARCIS (Netherlands)

    Schioppa, E.J.

    2014-01-01

    Energy sensitive X-ray imaging detectors are produced by connecting a semiconductor sensor to a spectroscopic pixel readout chip. In this thesis, the applicability of such detectors to X-ray Computed Tomography (CT) is studied. A prototype Medipix based silicon detector is calibrated using X-ray flu

  2. Diamond pixel modules

    CERN Document Server

    Gan, K K; Robichaud, A; Potenza, R; Kuleshov, S; Kagan, H; Kass, R; Wermes, N; Dulinski, W; Eremin, V; Smith, S; Sopko, B; Olivero, P; Gorisek, A; Chren, D; Kramberger, G; Schnetzer, S; Weilhammer, P; Martemyanov, A; Hugging, F; Pernegger, H; Lagomarsino, S; Manfredotti, C; Mishina, M; Trischuk, W; Dobos, D; Cindro, V; Belyaev, V; Duris, J; Claus, G; Wallny, R; Furgeri, A; Tuve, C; Goldstein, J; Sciortino, S; Sutera, C; Asner, D; Mikuz, M; Lo Giudice, A; Velthuis, J; Hits, D; Griesmayer, E; Oakham, G; Frais-Kolbl, H; Bellini, V; D'Alessandro, R; Cristinziani, M; Barbero, M; Schaffner, D; Costa, S; Goffe, M; La Rosa, A; Bruzzi, M; Schreiner, T; de Boer, W; Parrini, G; Roe, S; Randrianarivony, K; Dolenc, I; Moss, J; Brom, J M; Golubev, A; Mathes, M; Eusebi, R; Grigoriev, E; Tsung, J W; Mueller, S; Mandic, I; Stone, R; Menichelli, D

    2011-01-01

    With the commissioning of the LHC in 2010 and upgrades expected in 2015, ATLAS and CMS are planning to upgrade their innermost tracking layers with radiation hard technologies. Chemical Vapor Deposition diamond has been used extensively in beam conditions monitors as the innermost detectors in the highest radiation areas of BaBar, Belle, CDF and all LHC experiments. This material is now being considered as a sensor material for use very close to the interaction region where the most extreme radiation conditions exist Recently the RD42 collaboration constructed, irradiated and tested polycrystalline and single-crystal chemical vapor deposition diamond sensors to the highest fluences expected at the super-LHC. We present beam test results of chemical vapor deposition diamond up to fluences of 1.8 x 10(16) protons/cm(2) illustrating that both polycrystalline and single-crystal chemical vapor deposition diamonds follow a single damage curve. We also present beam test results of irradiated complete diamond pixel m...

  3. Fully depleted CMOS pixel sensor development and potential applications

    Energy Technology Data Exchange (ETDEWEB)

    Baudot, J.; Kachel, M. [Universite de Strasbourg, IPHC, 23 rue du Loess 67037 Strasbourg (France); CNRS, UMR7178, 67037 Strasbourg (France)

    2015-07-01

    low noise figure. Especially, an energy resolution of about 400 eV for 5 keV X-rays was obtained for single pixels. The prototypes have then been exposed to gradually increased fluences of neutrons, from 10{sup 13} to 5x10{sup 14} neq/cm{sup 2}. Again laboratory tests allowed to evaluate the signal over noise persistence on the different pixels implemented. Currently our development mostly targets the detection of soft X-rays, with the ambition to develop a pixel sensor matching counting rates as affordable with hybrid pixel sensors, but with an extended sensitivity to low energy and finer pixel about 25 x 25 μm{sup 2}. The original readout architecture proposed relies on a two tiers chip. The first tier consists of a sensor with a modest dynamic in order to insure low noise performances required by sensitivity. The interconnected second tier chip enhances the read-out speed by introducing massive parallelization. Performances reachable with this strategy combining counting and integration will be detailed. (authors)

  4. The DC-DC conversion power system of the CMS Phase-1 pixel upgrade

    Science.gov (United States)

    Feld, L.; Karpinski, W.; Klein, K.; Lipinski, M.; Preuten, M.; Rauch, M.; Schmitz, St.; Wlochal, M.

    2015-01-01

    The pixel detector of the CMS experiment will be exchanged during the year-end technical stop in 2016/2017, as part of the experiment's Phase-1 upgrade. The new device will feature approximately twice the number of readout channels, and consequently the power consumption will be doubled. By moving to a DC-DC conversion powering scheme, it is possible to power the new pixel detector with the existing power supplies and cable plant. The power system of the Phase-1 pixel detector is described and the performance of the new components, including DC-DC converters, DC-DC converter motherboards and various power distribution boards, is detailed. The outcome of system tests in terms of electrical behaviour, thermal management and pixel module performance is discussed.

  5. Pre- and post-irradiation performance of FBK 3D silicon pixel detectors for CMS

    Energy Technology Data Exchange (ETDEWEB)

    Krzywda, A., E-mail: akrzywda@purdue.edu [Purdue University, Department of Physics and Astronomy, West Lafayette, IN 47907-2036 (United States); Alagoz, E.; Bubna, M. [Purdue University, Department of Physics and Astronomy, West Lafayette, IN 47907-2036 (United States); Obertino, M. [Università del Piemonte Orientale, Novara (Italy); INFN, Sezione di Torino, Torino (Italy); Solano, A. [Università di Torino, Torino (Italy); INFN, Sezione di Torino, Torino (Italy); Arndt, K. [Purdue University, Department of Physics and Astronomy, West Lafayette, IN 47907-2036 (United States); Uplegger, L. [Fermi National Accelerator Laboratory, Batavia, IL 60510-5011 (United States); Betta, G.F. Dalla [TIFPA INFN and Dipartimento di Ingegneria Industriale, Università di Trento, Via Sommarive 9, I-38123 Povo di Trento, TN (Italy); Boscardin, M. [Centro per Materiali e i Microsistemi Fondazione Bruno Kessler (FBK), Trento, Via Sommarive 18, I-38123 Povo di Trento, TN (Italy); Ngadiuba, J. [Università di Milano-Bicocca, Milan (Italy); Rivera, R. [Fermi National Accelerator Laboratory, Batavia, IL 60510-5011 (United States); Menasce, D.; Moroni, L.; Terzo, S. [Università di Milano-Bicocca, Milan (Italy); Bortoletto, D. [Purdue University, Department of Physics and Astronomy, West Lafayette, IN 47907-2036 (United States); Prosser, A.; Adreson, J.; Kwan, S. [Fermi National Accelerator Laboratory, Batavia, IL 60510-5011 (United States); Osipenkov, I. [Texas A and M University, Department of Physics, College Station, TX 77843 (United States); Bolla, G. [Purdue University, Department of Physics and Astronomy, West Lafayette, IN 47907-2036 (United States); and others

    2014-11-01

    In preparation for the tenfold luminosity upgrade of the Large Hadron Collider (the HL-LHC) around 2020, three-dimensional (3D) silicon pixel sensors are being developed as a radiation-hard candidate to replace the planar ones currently being used in the CMS pixel detector. This study examines an early batch of FBK sensors (named ATLAS08) of three 3D pixel geometries: 1E, 2E, and 4E, which respectively contain one, two, and four readout electrodes for each pixel, passing completely through the bulk. We present electrical characteristics and beam test performance results for each detector before and after irradiation. The maximum fluence applied is 3.5×10{sup 15} n {sub eq}/cm{sup 2}.

  6. Performance of the Pixel Luminosity Telescope for Luminosity Measurement at CMS during Run 2

    CERN Document Server

    CMS Collaboration

    2017-01-01

    The Pixel Luminosity Telescope (PLT) is a dedicated system for luminosity measurement at the CMS experiment using silicon pixel sensors arranged into "telescopes", each consisting of three planes. It was installed during LS1 at the beginning of 2015 and has been providing online and offline luminosity measurements throughout Run 2. The online bunch-by-bunch luminosity measurement employs the "fast-or" capability of the pixel readout chip (PSI46) to identify events where a hit is registered in all three sensors in a telescope corresponding primarily to tracks originating from the interaction point. In addition, the full pixel information is read out at a lower rate, allowing for the calculation of corrections to the online luminosity from effects such as the miscounting of tracks not originating from the interaction point and detector efficiency. In this talk, we will present results from 2016 running and preliminary 2017 results, including commissioning and operational history, luminosity calibration using Va...

  7. A method for precise charge reconstruction with pixel detectors using binary hit information

    CERN Document Server

    Pohl, David-Leon; Hemperek, Tomasz; Hügging, Fabian; Wermes, Norbert

    2014-01-01

    A method is presented to precisely reconstruct charge spectra with pixel detectors using binary hit information of individual pixels. The method is independent of the charge information provided by the readout circuitry and has a resolution mainly limited by the electronic noise. It relies on the ability to change the detection threshold in small steps while counting hits from a particle source. The errors are addressed and the performance of the method is shown based on measurements with the ATLAS pixel chip FE-I4 bump bonded to a 230 {\\mu}m 3D-silicon sensor. Charge spectra from radioactive sources and from electron beams are presented serving as examples. It is demonstrated that a charge resolution ({\\sigma}<200 e) close to the electronic noise of the ATLAS FE-I4 pixel chip can be achieved.

  8. Production Performance of the ATLAS Semiconductor Tracker Readout System

    CERN Document Server

    Mitsou, V A

    2006-01-01

    The ATLAS Semiconductor Tracker (SCT) together with the pixel and the transition radiation detectors will form the tracking system of the ATLAS experiment at LHC. It will consist of 20000 single-sided silicon microstrip sensors assembled back-to-back into modules mounted on four concentric barrels and two end-cap detectors formed by nine disks each. The SCT module production and testing has finished while the macro-assembly is well under way. After an overview of the layout and the operating environment of the SCT, a description of the readout electronics design and operation requirements will be given. The quality control procedure and the DAQ software for assuring the electrical functionality of hybrids and modules will be discussed. The focus will be on the electrical performance results obtained during the assembly and testing of the end-cap SCT modules.

  9. Silicon pixel-detector R&D for CLIC

    Science.gov (United States)

    Nürnberg, A.

    2016-11-01

    The physics aims at the future CLIC high-energy linear e+e- collider set very high precision requirements on the performance of the vertex and tracking detectors. Moreover, these detectors have to be well adapted to the experimental conditions, such as the time structure of the collisions and the presence of beam-induced backgrounds. The principal challenges are: a point resolution of a few μm, ultra-low mass (~ 0.2%X0 per layer for the vertex region and ~ 1%X0 per layer for the outer tracker), very low power dissipation (compatible with air-flow cooling in the inner vertex region) and pulsed power operation, complemented with ~ 10 ns time stamping capabilities. A highly granular all-silicon vertex and tracking detector system is under development, following an integrated approach addressing simultaneously the physics requirements and engineering constraints. For the vertex-detector region, hybrid pixel detectors with small pitch (25 μm) and analog readout are explored. For the outer tracking region, both hybrid concepts and fully integrated CMOS sensors are under consideration. The feasibility of ultra-thin sensor layers is validated with Timepix3 readout ASICs bump bonded to active edge planar sensors with 50 μm to 150 μm thickness. Prototypes of CLICpix readout ASICs implemented in 6525 nm CMOS technology with 25 μm pixel pitch have been produced. Hybridisation concepts have been developed for interconnecting these chips either through capacitive coupling to active HV-CMOS sensors or through bump-bonding to planar sensors. Recent R&D achievements include results from beam tests with all types of hybrid assemblies. Simulations based on Geant4 and TCAD are used to validate the experimental results and to assess and optimise the performance of various detector designs.

  10. Hardware solutions for the 65k pixel X-ray camera module of 75 μm pixel size

    Science.gov (United States)

    Kasinski, K.; Maj, P.; Grybos, P.; Koziol, A.

    2016-02-01

    We present three hardware solutions designed for a detector module built with a 2 cm × 2 cm hybrid pixel detector built from a single 320 or 450 μ m thick silicon sensor designed and fabricated by Hamamatsu and two UFXC32k readout integrated circuits (128 × 256 pixels with 75μ m pitch, designed in CMOS 130 nm at AGH-UST). The chips work in a single photon counting mode and provide ultra-fast X-ray imaging. The presented hardware modules are designed according to requirements of various tests and applications: ṡDevice A: a fast and flexible system for tests with various radiation sources. ṡDevice B: a standalone, all-in-one imaging device providing three standard interfaces (USB 2.0, Ethernet, Camera Link) and up to 640 MB/s bandwidth. ṡDevice C: a prototype large-area imaging system. The paper shows the readout system structure for each case with highlighted circuit board designs with details on power distribution and cooling on both FR4 and LTCC (low temperature co-fired ceramic) based circuits.

  11. 4 pi direction sensitive gamma imager with RENA-3 readout ASIC

    Science.gov (United States)

    Du, Yanfeng; Li, Wen; Yanoff, Brian; Gordon, Jeffrey; Castleberry, Donald

    2007-09-01

    A 4π direction-sensitive gamma imager is presented, using a 1 cm 3 3D CZT detector from Yinnel Tech and the RENA-3 readout ASIC from NOVA R&D. The measured readout system electronic noise is around 4-5 keV FWHM for all anode channels. The measured timing resolution between two channels within a single ASIC is around 10 ns and the resolution is 30 ns between two separate ASIC chips. After 3D material non-uniformity and charge trapping corrections, the measured single-pixel-event energy resolution is around 1% for Cs-137 at 662 keV using a 1 cm 3 CZT detector from Yinnel Tech with an 8 x 8 anode pixel array at 1.15 mm pitch. The energy resolution for two pixel events is 2.9%. A 10 uCi Cs-137 point source was moved around the detector to test the image reconstruction algorithms and demonstrate the source direction detection capability. Accurate source locations were reconstructed with around 200 two-pixel events within a total energy window +/-10 keV around the 662 keV full energy peak. The angular resolution FWHM at four of the five positions tested was between 0.05-0.07 steradians.

  12. COLIBRI: partial camera readout and sliding trigger for the Cherenkov Telescope Array CTA

    Science.gov (United States)

    Naumann, C. L.; Tejedor, L. A.; Martínez, G.

    2013-06-01

    Plans for the future Cherenkov telescope array CTA include replacing the monolithic camera designs used in H.E.S.S. and MAGIC-I by one that is built up from a number of identical segments. These so-called clusters will be relatively autonomous, each containing its own triggering and readout hardware. While this choice was made for reasons of flexibility and ease of manufacture and maintenance, such a concept with semi-independent sub-units lends itself quite naturally to the possibility of new, and more flexible, readout modes. In all previously-used concepts, triggering and readout of the camera is centralised, with a single camera trigger per event that starts the readout of all pixels in the camera at the same time and within the same integration time window. The limitations of such a trigger system can reduce the performance of a large array such as CTA, due to the huge amount of useless data created by night-sky background if trigger thresholds are set low enough to achieve the desired 20 GeV energy threshold, and to image losses at high energies due to the rigid readout window. In this study, an alternative concept (``COLIBRI'' = Concept for an Optimised Local Image Building and Readout Infrastructure) is presented, where only those parts of the camera which are likely to actually contain image data (usually a small percentage of the total pixels) are read out. This leads to a significant reduction of the expected data rate and the dead-times incurred in the camera. Furthermore, the quasi-independence of the individual clusters can be used to read different parts of the camera at slightly different times, thus allowing the readout to follow the slow development of the shower image across the camera field of view. This concept of flexible, partial camera readout is presented in the following, together with a description of Monte-Carlo studies performed to evaluate its performance as well as a hardware implementation proposed for CTA.

  13. The readout system of the MAGIC-II Cherenkov Telescope

    CERN Document Server

    Tescaro, D; Barcelo, M; Bitossi, M; Cortina, J; Fras, M; Hadasch, D; Illa, J M; Martínez, M; Mazin, D; Paoletti, R; Pegna, R

    2009-01-01

    In this contribution we describe the hardware, firmware and software components of the readout system of the MAGIC-II Cherenkov telescope on the Canary island La Palma. The PMT analog signals are transmitted by means of optical fibers from the MAGIC-II camera to the 80 m away counting house where they are routed to the new high bandwidth and fully programmable receiver boards (MONSTER), which convert back the signals from optical to electrical ones. Then the signals are split, one half provide the input signals for the level ONE trigger system while the other half is sent to the digitizing units. The fast Cherenkov pulses are sampled by low-power Domino Ring Sampler chips (DRS2) and temporarily stored in an array of 1024 capacitors. Signals are sampled at the ultra-fast speed of 2 GSample/s, which allows a very precise measurement of the signal arrival times in all pixels. They are then digitized with 12-bit resolution by an external ADC readout at 40 MHz speed. The Domino samplers are integrated in the newly...

  14. Massively Parallel Atomic Force Microscope with Digital Holographic Readout

    Energy Technology Data Exchange (ETDEWEB)

    Sache, L [Laboratory of Robotic Systems, Ecole Polytechnique Federale de Lausanne, EPFLSRO1, Station 9, CH-1015 Lausanne (Switzerland); Kawakatsu, H [Institute of Industrial Science, University of Tokyo, Tokyo (Japan); Emery, Y [Lyncee Tec SA, PSE-A, CH-1015 Lausanne (Switzerland); Bleuler, H [Laboratory of Robotic Systems, Ecole Polytechnique Federale de Lausanne, EPFLSRO1, Station 9, CH-1015 Lausanne (Switzerland)

    2007-03-15

    Massively Parallel Scanning Probe Microscopy is an obvious path for data storage (E Grochowski, R F Hoyt, Future Trends in Hard disc Drives, IEEE Trans. Magn. 1996, 32, 1850- 1854; J L Griffin, S W Schlosser, G R Ganger and D F Nagle, Modeling and Performance of MEMS-Based Storage Devices, Proc. ACM SIGMETRICS, 2000). Current experimental systems still lay far behind Hard Disc Drive (HDD) or Digital Video Disk (DVD), be it in access speed, data throughput, storage density or cost per bit. This paper presents an entirely new approach with the promise to break several of these barriers. The key idea is readout of a Scanning Probes Microscope (SPM) array by Digital Holographic Microscopy (DHM). This technology directly gives phase information at each pixel of a CCD array. This means that no contact line to each individual SPM probes is needed. The data is directly available in parallel form. Moreover, the optical setup needs in principle no expensive components, optical (or, to a large extent, mechanical) imperfections being compensated in the signal processing, i.e. in electronics. This gives the system the potential for a low cost device with fast Terabit readout capability.

  15. From Pixels to Planets

    Science.gov (United States)

    Brownston, Lee; Jenkins, Jon M.

    2015-01-01

    The Kepler Mission was launched in 2009 as NASAs first mission capable of finding Earth-size planets in the habitable zone of Sun-like stars. Its telescope consists of a 1.5-m primary mirror and a 0.95-m aperture. The 42 charge-coupled devices in its focal plane are read out every half hour, compressed, and then downlinked monthly. After four years, the second of four reaction wheels failed, ending the original mission. Back on earth, the Science Operations Center developed the Science Pipeline to analyze about 200,000 target stars in Keplers field of view, looking for evidence of periodic dimming suggesting that one or more planets had crossed the face of its host star. The Pipeline comprises several steps, from pixel-level calibration, through noise and artifact removal, to detection of transit-like signals and the construction of a suite of diagnostic tests to guard against false positives. The Kepler Science Pipeline consists of a pipeline infrastructure written in the Java programming language, which marshals data input to and output from MATLAB applications that are executed as external processes. The pipeline modules, which underwent continuous development and refinement even after data started arriving, employ several analytic techniques, many developed for the Kepler Project. Because of the large number of targets, the large amount of data per target and the complexity of the pipeline algorithms, the processing demands are daunting. Some pipeline modules require days to weeks to process all of their targets, even when run on NASA's 128-node Pleiades supercomputer. The software developers are still seeking ways to increase the throughput. To date, the Kepler project has discovered more than 4000 planetary candidates, of which more than 1000 have been independently confirmed or validated to be exoplanets. Funding for this mission is provided by NASAs Science Mission Directorate.

  16. A Low-Noise CMOS Pixel Direct Charge Sensor, Topmetal-II-

    CERN Document Server

    An, Mangmang; Gao, Chaosong; Han, Mikyung; Ji, Rong; Li, Xiaoting; Mei, Yuan; Sun, Quan; Sun, Xiangming; Wang, Kai; Xiao, Le; Xu, Nu; Yang, Ping; Zhou, Wei

    2016-01-01

    We report the design and characterization of a CMOS pixel direct charge sensor, Topmetal-II-, fabricated in a standard 0.35um CMOS Integrated Circuit process. The sensor utilizes exposed metal patches on top of each pixel to directly collect charge. Each pixel contains a low-noise charge-sensitive preamplifier to establish the analog signal and a discriminator with tunable threshold to generate hits. The analog signal from each pixel is accessible through time-shared multiplexing over the entire array. Hits are read out digitally through a column-based priority logic structure. Tests show that the sensor achieved a <15e- analog noise and a 200e- minimum threshold for digital readout per pixel. The sensor is capable of detecting both electrons and ions drifting in gas. These characteristics enable its use as the charge readout device in future Time Projection Chambers without gaseous gain mechanism, which has unique advantages in low background and low rate-density experiments.

  17. The upgraded Pixel Detector of the ATLAS Experiment for Run2 at the Large Hadron Collider

    CERN Document Server

    Mullier, Geoffrey Andre; The ATLAS collaboration

    2015-01-01

    The Pixel Detector of the ATLAS experiment has shown excellent performance during the whole Run-1 of LHC. Taking advantage of the long showdown, the detector was extracted from the experiment and brought to surface, to equip it with new service quarter panels, to repair modules and to ease installation of the Insertable B-Layer (IBL), a fourth layer of pixel detectors, installed in May 2014 between the existing Pixel Detector and a new smaller radius beam-pipe at a radius of 3.3 cm. To cope with the high radiation and increased pixel occupancy due to the proximity to the interaction point, two different silicon sensor technologies (planar and 3D) have been developed. A new readout chip has been developed within CMOS 130nm technology with larger area, smaller pixel size and faster readout capability. Dedicated design features in combination with a new composite material were considered and used in order to reduce the material budget of the support structure while keeping the optimal thermo-mechanical performan...

  18. A low-noise CMOS pixel direct charge sensor, Topmetal-II-

    Science.gov (United States)

    An, Mangmang; Chen, Chufeng; Gao, Chaosong; Han, Mikyung; Ji, Rong; Li, Xiaoting; Mei, Yuan; Sun, Quan; Sun, Xiangming; Wang, Kai; Xiao, Le; Yang, Ping; Zhou, Wei

    2016-02-01

    We report the design and characterization of a CMOS pixel direct charge sensor, Topmetal-II-, fabricated in a standard 0.35 μm CMOS Integrated Circuit process. The sensor utilizes exposed metal patches on top of each pixel to directly collect charge. Each pixel contains a low-noise charge-sensitive preamplifier to establish the analog signal and a discriminator with tunable threshold to generate hits. The analog signal from each pixel is accessible through time-shared multiplexing over the entire array. Hits are read out digitally through a column-based priority logic structure. Tests show that the sensor achieved a analog noise and a 200e- minimum threshold for digital readout per pixel. The sensor is capable of detecting both electrons and ions drifting in gas. These characteristics enable its use as the charge readout device in future Time Projection Chambers without gaseous gain mechanism, which has unique advantages in low background and low rate-density experiments.

  19. Novel Silicon n-in-p Pixel Sensors for the future ATLAS Upgrades

    CERN Document Server

    La Rosa, A; Macchiolo, A; Nisius, R; Pernegger, H; Richter,R H; Weigell, P

    2013-01-01

    In view of the LHC upgrade phases towards HL-LHC the ATLAS experiment plans to upgrade the Inner Detector with an all silicon system. The n-in-p silicon technology is a promising candidate for the pixel upgrade thanks to its radiation hardness and cost eectiveness, that allow for enlarging the area instrumented with pixel detectors. We present the characterization and performance of novel n-in-p planar pixel sensors produced by CiS (Germany) connected by bump bonding to the ATLAS readout chip FE-I3. These results are obtained before and after irradiation up to a fluence of 1016 1-MeV $n_{eq}cm^{-2}$, and prove the operability of this kind of sensors in the harsh radiation environment foreseen for the pixel system at HL-LHC. We also present an overview of the new pixel production, which is on-going at CiS for sensors compatible with the new ATLAS readout chip FE-I4.

  20. Development of n-in-p pixel modules for the ATLAS Upgrade at HL-LHC

    CERN Document Server

    Macchiolo, Anna; Savic, Natascha; Terzo, Stefano

    2016-01-01

    Thin planar pixel modules are promising candidates to instrument the inner layers of the new ATLAS pixel detector for HL-LHC, thanks to the reduced contribution to the material budget and their high charge collection efficiency after irradiation. 100-200 $\\mu$m thick sensors, interconnected to FE-I4 read-out chips, have been characterized with radioactive sources and beam tests at the CERN-SPS and DESY. The results of these measurements are reported for devices before and after irradiation up to a fluence of $14\\times10^{15}$ n$_{eq}$/cm$^2$. The charge collection and tracking efficiency of the different sensor thicknesses are compared. The outlook for future planar pixel sensor production is discussed, with a focus on sensor design with the pixel pitches (50x50 and 25x100 $\\mu$m$^2$) foreseen for the RD53 Collaboration read-out chip in 65 nm CMOS technology. An optimization of the biasing structures in the pixel cells is required to avoid the hit efficiency loss presently observed in the punch-through region...

  1. Novel silicon n-in-p pixel sensors for the future ATLAS upgrades

    Energy Technology Data Exchange (ETDEWEB)

    La Rosa, A., E-mail: alessandro.larosa@cern.ch [Section de Physique (DPNC), Université de Genève, 24 quai Ernest Ansermet, Genève 4, CH-1211 (Switzerland); Gallrapp, C. [CERN, Geneva 23, CH-1211 (Switzerland); Macchiolo, A.; Nisius, R. [Max-Planck-Institut für Physik (Werner-Heisenberg-Institut) Föhringer Ring 6, D-80805 München (Germany); Pernegger, H. [CERN, Geneva 23, CH-1211 (Switzerland); Richter, R.H. [Max-Planck-Institut Halbleiterlabor, Otto Hahn Ring 6, D-81739 München (Germany); Weigell, P. [Max-Planck-Institut für Physik (Werner-Heisenberg-Institut) Föhringer Ring 6, D-80805 München (Germany)

    2013-08-01

    In view of the LHC upgrade phases towards HL-LHC the ATLAS experiment plans to upgrade the inner detector with an all silicon system. The n-in-p silicon technology is a promising candidate for the pixel upgrade thanks to its radiation hardness and cost effectiveness that allow for enlarging the area instrumented with pixel detectors. We present the characterization and performance of novel n-in-p planar pixel sensors produced by CiS (Germany) connected by bump bonding to the ATLAS readout chip FE-I3. These results are obtained before and after irradiation up to a fluence of 10{sup 16}1-MeV n{sub eq}cm{sup −2}, and prove the operability of this kind of sensors in the harsh radiation environment foreseen for the pixel system at HL-LHC. We also present an overview of the new pixel production, which is on-going at CiS for sensors compatible with the new ATLAS readout chip FE-I4.

  2. Finite-element simulations of coupling capacitances in capacitively coupled pixel detectors

    CERN Document Server

    AUTHOR|(SzGeCERN)755510

    2017-01-01

    Capacitively coupled hybrid silicon pixel-detector assemblies are under study for the vertex detector at the proposed future CLIC linear electron-positron collider. The assemblies consist of active CCPDv3 sensors, with 25 μm pixel pitch implemented in a 180 nm High- Voltage CMOS process, which are glued to the CLICpix readout ASIC, with the same pixel pitch and processed in a commercial 65 nm CMOS technology. The signal created in the silicon bulk of the active sensors passes a two-stage amplifier, in each pixel, and gets transferred as a voltage pulse to metal pads facing the readout chip (ROC). The coupling of the signal to the metal pads on the ROC side proceeds through the capacitors formed between the two chips by a thin layer of epoxy glue. The coupling strength and the amount of unwanted cross coupling to neighbouring pixels depends critically on the uniformity of the glue layer, its thickness and on the alignment precision during the flip-chip assembly process. Finite-element calculations of the coup...

  3. Beam test characterization of CMS silicon pixel detectors for the phase-1 upgrade

    Science.gov (United States)

    Korol, I.

    2015-10-01

    The Silicon Pixel Detector forms the innermost part of the CMS tracking system and is critical to track and vertex reconstruction. Being in close proximity to the beam interaction point, it is exposed to the highest radiation levels in the silicon tracker. In order to preserve the tracking performance with the LHC luminosity increase which is foreseen for the next years, the CMS collaboration has decided to build a new pixel detector with four barrel layers mounted around a reduced diameter beam pipe, as compared to the present three layer pixel detector in the central region. A new digital version of the front-end readout chip has been designed and tested; it has increased data buffering and readout link speed to maintain high efficiency at increasing occupancy. In addition, it offers lower charge thresholds that will improve the tracking efficiency and position resolution. Single chip modules have been evaluated in the DESY electron test beam in terms of charge collection, noise, tracking efficiency and position resolution before and after irradiation with 24 GeV protons from the CERN Proton Synchroton equivalent to the fluence expected after 500 fb-1 of integrated luminosity in the fourth layer of the pixel tracker. High efficiency and an excellent position resolution have been observed which are well maintained even after the proton irradiation. The results are well described by the CMS pixel detector simulation.

  4. MuPix7 - A fast monolithic HV-CMOS pixel chip for Mu3e

    CERN Document Server

    Augustin, H; Dittmeier, S; Hammerich, J; Hartenstein, U; Huang, Q; Huth, L; Immig, D; Kozlinskiy, A; Aeschbacher, F Meier; Perić, I; Perrevoort, A -K; Schöning, A; Shrestha, S; Sorokin, I; Tyukin, A; Bruch, D vom; Wauters, F; Wiedner, D; Zimmermann, M

    2016-01-01

    The MuPix7 chip is a monolithic HV-CMOS pixel chip, thinned down to 50 \\mu m. It provides continuous self-triggered, non-shuttered readout at rates up to 30 Mhits/chip of 3x3 mm^2 active area and a pixel size of 103x80 \\mu m^2. The hit efficiency depends on the chosen working point. Settings with a power consumption of 300 mW/cm^2 allow for a hit efficiency >99.5%. A time resolution of 14.2 ns (Gaussian sigma) is achieved. Latest results from 2016 test beam campaigns are shown.

  5. High-Sensitivity X-ray Polarimetry with Amorphous Silicon Active-Matrix Pixel Proportional Counters

    Science.gov (United States)

    Black, J. K.; Deines-Jones, P.; Jahoda, K.; Ready, S. E.; Street, R. A.

    2003-01-01

    Photoelectric X-ray polarimeters based on pixel micropattern gas detectors (MPGDs) offer order-of-magnitude improvement in sensitivity over more traditional techniques based on X-ray scattering. This new technique places some of the most interesting astronomical observations within reach of even a small, dedicated mission. The most sensitive instrument would be a photoelectric polarimeter at the focus of 2 a very large mirror, such as the planned XEUS. Our efforts are focused on a smaller pathfinder mission, which would achieve its greatest sensitivity with large-area, low-background, collimated polarimeters. We have recently demonstrated a MPGD polarimeter using amorphous silicon thin-film transistor (TFT) readout suitable for the focal plane of an X-ray telescope. All the technologies used in the demonstration polarimeter are scalable to the areas required for a high-sensitivity collimated polarimeter. Leywords: X-ray polarimetry, particle tracking, proportional counter, GEM, pixel readout

  6. New pixelized Micromegas detector with low discharge rate for the COMPASS experiment

    CERN Document Server

    Neyret, D.; Anfreville, M.; Bedfer, Y.; Burtin, E.; Coquelet, C.; d'Hose, N.; Desforge, D.; Giganon, A.; Jourde, D.; Kunne, F.; Magnon, A.; Makke, N.; Marchand, C.; Paul, B.; Platchkov, S.; Thibaud, F.; Usseglio, M.; Vandenbroucke, M.

    2012-01-01

    New Micromegas (Micro-mesh gaseous detectors) are being developed in view of the future physics projects planned by the COMPASS collaboration at CERN. Several major upgrades compared to present detectors are being studied: detectors standing five times higher luminosity with hadron beams, detection of beam particles (flux up to a few hundred of kHz/mm^{2}, 10 times larger than for the present Micromegas detectors) with pixelized read-out in the central part, light and integrated electronics, and improved robustness. Two solutions of reduction of discharge impact have been studied, with Micromegas detectors using resistive layers and using an additional GEM foil. Performance of such detectors has also been measured. A large size prototypes with nominal active area and pixelized read-out has been produced and installed at COMPASS in 2010. In 2011 prototypes featuring an additional GEM foil, as well as an resistive prototype, are installed at COMPASS and preliminary results from those detectors presented very go...

  7. Development of CMOS pixel sensors for tracking and vertexing in high energy physics experiments

    CERN Document Server

    AUTHOR|(CDS)2070112; Besson, Auguste; Claus, Giles; Cousin, Loic; Dulinski, Wojciech; Goffe, Mathieu; Hippolyte, Boris; Maria, Robert; Molnar, Levente; Sanchez Castro, Xitzel; Winter, Marc

    2014-01-01

    CMOS pixel sensors (CPS) represent a novel technological approach to building charged particle detectors. CMOS processes allow to integrate a sensing volume and readout electronics in a single silicon die allowing to build sensors with a small pixel pitch ($\\sim 20 \\mu m$) and low material budget ($\\sim 0.2-0.3\\% X_0$) per layer. These characteristics make CPS an attractive option for vertexing and tracking systems of high energy physics experiments. Moreover, thanks to the mass production industrial CMOS processes used for the manufacturing of CPS the fabrication construction cost can be significantly reduced in comparison to more standard semiconductor technologies. However, the attainable performance level of the CPS in terms of radiation hardness and readout speed is mostly determined by the fabrication parameters of the CMOS processes available on the market rather than by the CPS intrinsic potential. The permanent evolution of commercial CMOS processes towards smaller feature sizes and high resistivity ...

  8. Integration and testing of the DAQ system for the CMS phase 1 pixel upgrade

    CERN Document Server

    Akgun, Bora

    2016-01-01

    The CMS pixel detector phase 1 upgrade in 2017 requires an upgraded DAQ to accept higher data rates. A new DAQ system has been developed based on a combination of custom and standard microTCA parts. Custom mezzanines on FC7 AMCs provide a front-end driver for readout, and front-end controller for configuration, clock and trigger. The DAQ system is undergoing a series of integration tests including readout of the pilot pixel detector already installed in CMS, checkout of the phase 1 detector during its assembly, and testing with the CMS central DAQ. This paper describes the DAQ system, integration tests and results, and an outline of the activities up to commissioning the final system at CMS in 2017.

  9. CMS Barrel Pixel Detector Overview

    CERN Document Server

    Kästli, H C; Erdmann, W; Gabathuler, K; Hörmann, C; Horisberger, Roland Paul; König, S; Kotlinski, D; Meier, B; Robmann, P; Rohe, T; Streuli, S

    2007-01-01

    The pixel detector is the innermost tracking device of the CMS experiment at the LHC. It is built from two independent sub devices, the pixel barrel and the end disks. The barrel consists of three concentric layers around the beam pipe with mean radii of 4.4, 7.3 and 10.2 cm. There are two end disks on each side of the interaction point at 34.5 cm and 46.5 cm. This article gives an overview of the pixel barrel detector, its mechanical support structure, electronics components, services and its expected performance.

  10. A 130 nm ASIC prototype for the NA62 Gigatracker readout

    Energy Technology Data Exchange (ETDEWEB)

    Dellacasa, G., E-mail: gdellaca@to.infn.it [I.N.F.N. sez. Torino, via Giuria 1, 10125 Torino (Italy); Garbolino, S. [Universita degli Studi di Torino, Dip. Fisica Sperimentale, via Giuria 1, 10125 Torino (Italy); Marchetto, F. [I.N.F.N. sez. Torino, via Giuria 1, 10125 Torino (Italy); Martoiu, S. [I.N.F.N. sez. Torino, via Giuria 1, 10125 Torino (Italy); CERN CH-1211, Geneve 23 (Switzerland); Mazza, G.; Rivetti, A.; Wheadon, R. [I.N.F.N. sez. Torino, via Giuria 1, 10125 Torino (Italy)

    2011-09-11

    One of the most challenging detectors of the NA62 experiment is the silicon tracker, called Gigatracker. It consists of three hybrid silicon pixel stations, each one covering an area of 27 mmx60 mm. While the maximum pixel size is fairly large, 300{mu}mx300{mu}m the system has to sustain a very high particle rate, 1.5 MHz/mm{sup 2}, which corresponds to 800 MHz for each station. To obtain an efficient tracking with such a high rate the required track timing resolution is 150 ps (rms). Therefore the front-end ASIC should provide for each pixel a 200 ps time measurement capability, thus leading to the requirement of time walk compensation and very compact TDCs. Moreover, Single Event Upset protection has to be implemented in order to protect the digital circuitry. An ASIC prototype has been realized in CMOS 130 nm technology, containing three pixel columns. The chip performs the time walk compensation by a Constant Fraction Discriminator circuit, while the time measurement is performed by a Time to Amplitude Converter based TDC, both of them implemented on each pixel cell. The End of Column circuit containing only digital logic is responsible for the data readout from the pixel cell. The whole chip works with a system clock of 160 MHz and the digital logic is SEU protected by the use of Hamming codes. The detailed architecture of the ASIC prototype and test results are presented.

  11. Common Readout System in ALICE

    CERN Document Server

    Jubin, Mitra

    2016-01-01

    The ALICE experiment at the CERN Large Hadron Collider is going for a major physics upgrade in 2018. This upgrade is necessary for getting high statistics and high precision measurement for probing into rare physics channels needed to understand the dynamics of the condensed phase of QCD. The high interaction rate and the large event size in the upgraded detectors will result in an experimental data flow traffic of about 1 TB/s from the detectors to the on-line computing system. A dedicated Common Readout Unit (CRU) is proposed for data concentration, multiplexing, and trigger distribution. CRU, as common interface unit, handles timing, data and control signals between on-detector systems and online-offline computing system. An overview of the CRU architecture is presented in this manuscript.

  12. A support note for the use of pixel hybrid photon detectors in the RICH counters of LHCb

    CERN Document Server

    Gys, Thierry

    2001-01-01

    This document is a proposal for the use of a hybrid photon detector with integrated silicon pixel readout in the ring imaging Cherenkov detectors of the LHCb experiment. The photon detector is based on a cross-focussed image intensifier tube geometry where the image is de-magnified by a factor of 5. The anode consists of a silicon pixel array, bump-bonded to a binary readout chip with matching pixel electronics. The document starts with the general specification of the baseline option, followed by a summary of the main results achieved so far during the R&D phase. A future R&D programme and its related time table is also presented. The document concludes with the description of a photon detector production scheme and time schedule.

  13. System test and noise performance studies at the ATLAS pixel detector

    Energy Technology Data Exchange (ETDEWEB)

    Weingarten, J.

    2007-09-15

    The central component of the ATLAS Inner Tracker is the pixel detector. It consists of three barrel layers and three disk-layers in the end-caps in both forward directions. The innermost barrel layer is mounted at a distance of about 5 cm from the interaction region. With its very high granularity, truly two-dimensional hit information, and fast readout it is well suited to cope with the high densities of charged tracks, expected this close to the interaction region. The huge number of readout channels necessitates a very complex services infrastructure for powering, readout and safety. After a description of the pixel detector and its services infrastructure, key results from the system test at CERN are presented. Furthermore the noise performance of the pixel detector, crucial for high tracking and vertexing efficiencies, is studied. Measurements of the single-channel random noise are presented together with studies of common mode noise and measurements of the noise occupancy using a random trigger generator. (orig.)

  14. Characterization of Medipix3 with the MARS readout and software

    CERN Document Server

    Ronaldson, J P; van Leeuwen, D; Doesburg, R M N; Ballabriga, R; Butler, A P H; Donaldson, J; Walsh, M; Nik, S J; Clyne, M N

    2011-01-01

    The Medipix3 x-ray imaging detector has been characterized using the MARS camera. This x-ray camera comprises custom built readout electronics and software libraries designed for the Medipix family of detectors. The performance of the Medipix3 and MARS camera system is being studied prior to use in real-world applications such as the recently developed MARS-CT3 spectroscopic micro-CT scanner. We present the results of characterization measurements, describe methods for optimizing performance and give examples of spectroscopic images acquired with Medipix3 and the MARS camera system. A limited number of operating modes of the Medipix3 chip have been characterized and single-pixel mode has been found to give acceptable performance in terms of energy response, image quality and stability over time. Spectroscopic performance is significantly better in charge-summing mode than single-pixel mode however image quality and stability over time are compromised. There are more modes of operation to be tested and further...

  15. The upgraded Pixel Detector of the ATLAS Experiment for Run 2 at the Large Hadron Collider

    Energy Technology Data Exchange (ETDEWEB)

    Backhaus, M., E-mail: malte.backhaus@cern.ch

    2016-09-21

    During Run 1 of the Large Hadron Collider (LHC), the ATLAS Pixel Detector has shown excellent performance. The ATLAS collaboration took advantage of the first long shutdown of the LHC during 2013 and 2014 and extracted the ATLAS Pixel Detector from the experiment, brought it to surface and maintained the services. This included the installation of new service quarter panels, the repair of cables, and the installation of the new Diamond Beam Monitor (DBM). Additionally, a completely new innermost pixel detector layer, the Insertable B-Layer (IBL), was constructed and installed in May 2014 between a new smaller beam pipe and the existing Pixel Detector. With a radius of 3.3 cm the IBL is located extremely close to the interaction point. Therefore, a new readout chip and two new sensor technologies (planar and 3D) are used in the IBL. In order to achieve best possible physics performance the material budget was improved with respect to the existing Pixel Detector. This is realized using lightweight staves for mechanical support and a CO{sub 2} based cooling system. This paper describes the improvements achieved during the maintenance of the existing Pixel Detector as well as the performance of the IBL during the construction and commissioning phase. Additionally, first results obtained during the LHC Run 2 demonstrating the distinguished tracking performance of the new Four Layer ATLAS Pixel Detector are presented.

  16. 3D track reconstruction capability of a silicon hybrid active pixel detector

    Science.gov (United States)

    Bergmann, Benedikt; Pichotka, Martin; Pospisil, Stanislav; Vycpalek, Jiri; Burian, Petr; Broulim, Pavel; Jakubek, Jan

    2017-06-01

    Timepix3 detectors are the latest generation of hybrid active pixel detectors of the Medipix/Timepix family. Such detectors consist of an active sensor layer which is connected to the readout ASIC (application specific integrated circuit), segmenting the detector into a square matrix of 256 × 256 pixels (pixel pitch 55 μm). Particles interacting in the active sensor material create charge carriers, which drift towards the pixelated electrode, where they are collected. In each pixel, the time of the interaction (time resolution 1.56 ns) and the amount of created charge carriers are measured. Such a device was employed in an experiment in a 120 GeV/c pion beam. It is demonstrated, how the drift time information can be used for "4D" particle tracking, with the three spatial dimensions and the energy losses along the particle trajectory (dE/dx). Since the coordinates in the detector plane are given by the pixelation ( x, y), the x- and y-resolution is determined by the pixel pitch (55 μm). A z-resolution of 50.4 μm could be achieved (for a 500 μm thick silicon sensor at 130 V bias), whereby the drift time model independent z-resolution was found to be 28.5 μm.

  17. Silicon Sensors for the Upgrades of the CMS Pixel Detector

    CERN Document Server

    Centis Vignali, Matteo; Schleper, Peter

    2015-01-01

    The Compact Muon Solenoid (CMS) is a general purpose detector at the Large Hadron Collider (LHC). The LHC luminosity is constantly increased through upgrades of the accel- erator and its injection chain. Two major upgrades will take place in the next years. The rst upgrade involves the LHC injector chain and allows the collider to achieve a luminosity of about 2 10 34 cm-2 s-1 A further upgrade of the LHC foreseen for 2025 will boost its luminosity to 5 10 34 cm-2 s1. As a consequence of the increased luminosity, the detectors need to be upgraded. In particular, the CMS pixel detector will undergo two upgrades in the next years. The rst upgrade (phase I) consists in the substitution of the current pixel detector in winter 2016/2017. The upgraded pixel detector will implement new readout elec- tronics that allow ecient data taking up to a luminosity of 2 10 34 cm-2s-1,twice as much as the LHC design luminosity. The modules that will constitute the upgraded detector are being produced at dierent institutes. Ham...

  18. Construction of the Phase I Forward Pixel Detector

    Science.gov (United States)

    Neylon, Ashton; Bartek, Rachel

    2017-01-01

    The silicon pixel detector is the innermost component of the CMS tracking system, providing high precision space point measurements of charged particle trajectories. The original CMS detector was designed for the nominal instantaneous LHC luminosity of 1 x 1034 cm-2s-1 . The LHC has already started to exceed this luminosity causing the CMS pixel detector to see a dynamic inefficiency caused by data losses due to buffer overflows. For this reason the CMS Collaboration has been building an upgraded pixel detector which is scheduled for installation during an extended year end technical stop during winter 2016/2017. The phase 1 upgrade includes four barrel layers and three forward disks, providing robust tracking and vertexing for LHC luminosities up to 2 x 1034 cm-2s-1 . The upgrade incorporates new readout chips, front-end electronics, DC-DC powering, and dual-phase CO2 cooling to achieve performance exceeding that of the present detector with a lower material budget. This contribution will review the design and technology choices of the Phase I detector and discuss the status of the detector. The challenges and difficulties encountered during the construction will also be presented, as well as the lessons learned for future upgrades. National Science Foundation.

  19. Pixel diamond detectors for excimer laser beam diagnostics

    Science.gov (United States)

    Girolami, M.; Allegrini, P.; Conte, G.; Salvatori, S.

    2011-05-01

    Laser beam profiling technology in the UV spectrum of light is evolving with the increase of excimer lasers and lamps applications, that span from lithography for VLSI circuits to eye surgery. The development of a beam-profiler, able to capture the excimer laser single pulse and process the acquired pixel current signals in the time period between each pulse, is mandatory for such applications. 1D and 2D array detectors have been realized on polycrystalline CVD diamond specimens. The fast diamond photoresponse, in the ns time regime, suggests the suitability of such devices for fine tuning feedback of high-power pulsed-laser cavities, whereas solar-blindness guarantees high performance in UV beam diagnostics, also under high intensity background illumination. Offering unique properties in terms of thermal conductivity and visible-light transparency, diamond represents one of the most suitable candidate for the detection of high-power UV laser emission. The relatively high resistivity of diamond in the dark has allowed the fabrication of photoconductive vertical pixel-detectors. A semitransparent light-receiving back-side contact has been used for detector biasing. Each pixel signal has been conditioned by a multi-channel read-out electronics made up of a high-sensitive integrator and a Σ-Δ A/D converter. The 500 μs conversion time has allowed a data acquisition rate up to 2 kSPS (Sample Per Second).

  20. Testbeam and laboratory characterization of 3D CMS pixel sensors

    Science.gov (United States)

    Bubna, Mayur; Krzwyda, Alex; Alagoz, Enver; Bortoletto, Daniela

    2013-04-01

    Future generations of colliders, like High Luminosity Large Hadron Collider (HL-LHC) at CERN will deliver much higher radiation doses to the particle detectors, specifically those closer to the beam line. Inner tracker detectors will be the most affected part, causing increased occupancy and radiation damage to Silicon detectors. Planar Silicon sensors have not shown enough radiation hardness for the innermost layers where the radiation doses can reach values around 10^16 neq/cm^2. As a possible replacement of planar pixel sensors, 3D Silicon technology is under consideration as they show higher radiation hardness, and efficiencies comparable to planar sensors. Several 3D CMS pixel designs were fabricated at FBK, CNM, and SINTEF. They were bump bonded to the CMS pixel readout chip and characterized in the laboratory using radioactive source (Sr90), and at Fermilab MTEST beam test facility. Sensors were also irradiated with 800 MeV protons at Los Alamos National Lab to study post-irradiation behavior. In addition, several diodes and test structures from FBK were studied before and after irradiation. We report the laboratory and testbeam measurement results for the irradiated 3D devices.

  1. A Smart Pixel Camera for future Cherenkov Telescopes

    CERN Document Server

    Hermann, G; Glück, B; Hauser, D; Hermann, German; Carrigan, Svenja; Gl\\"uck, Bernhard; Hauser, Dominik

    2005-01-01

    The Smart Pixel Camera is a new camera for imaging atmospheric Cherenkov telescopes, suited for a next generation of large multi-telescope ground based gamma-ray observatories. The design of the camera foresees all electronics needed to process the images to be located inside the camera body at the focal plane. The camera has a modular design and is scalable in the number of pixels. The camera electronics provides the performance needed for the next generation instruments, like short signal integration time, topological trigger and short trigger gate, and at the same time the design is optimized to minimize the cost per channel. In addition new features are implemented, like the measurement of the arrival time of light pulses in the pixels on the few hundred psec timescale. The buffered readout system of the camera allows to take images at sustained rates of O(10 kHz) with a dead-time of only about 0.8 % per kHz.

  2. The Pixels find their way to the heart of ATLAS

    CERN Multimedia

    Kevin Einsweiler

    Since the last e-news article on the Pixel Detector in December 2006, there has been much progress. At that time, we were just about to receive the Beryllium beampipe, and to integrate the innermost layer of the Pixel Detector around it. This innermost layer is referred to as the B-layer because of the powerful role it plays in finding the secondary vertices that are the key signature for the presence of b-quarks, and with somewhat greater difficulty, c-quarks and tau leptons. The integration of the central 7m long beampipe into the Pixel Detector was completed in December, and the B-layer was successfully integrated around it. In January this year, we had largely completed the central 1.5m long detector, including the three barrel layers and the three disk layers on each end of the barrel. Although this region contains all of the 80 million readout channels, it cannot be integrated into the Inner Detector without additional services and infrastructure. Therefore, the next step was to add the Service Panels...

  3. A two-dimensional position sensitive gas chamber with scanned charge transfer readout

    Energy Technology Data Exchange (ETDEWEB)

    Gomez, F. E-mail: faustgr@usc.es; Iglesias, A.; Lobato, R.; Mosquera, J.; Pardo, J.; Pena, J.; Pazos, A.; Pombar, M.; Rodriguez, A

    2003-10-21

    We have constructed and tested a two-dimensional position sensitive parallel-plate gas ionization chamber with scanned charge transfer readout. The scan readout method described here is based on the development of a new position-dependent charge transfer technique. It has been implemented by using gate strips perpendicularly oriented to the collector strips. This solution reduces considerably the number of electronic readout channels needed to cover large detector areas. The use of a 25 {mu}m thick kapton etched circuit allows high charge transfer efficiency with a low gating voltage, consequently needing a very simple commutating circuit. The present prototype covers 8x8 cm{sup 2} with a pixel size of 1.27x1.27 mm{sup 2}. Depending on the intended use and beam characteristics a smaller effective pixel is feasible and larger active areas are possible. This detector can be used for X-ray or other continuous beam intensity profile monitoring.

  4. Characterization of CdTe sensors with Schottky contacts coupled to charge-integrating pixel array detectors for X-ray science

    Science.gov (United States)

    Becker, J.; Tate, M. W.; Shanks, K. S.; Philipp, H. T.; Weiss, J. T.; Purohit, P.; Chamberlain, D.; Ruff, J. P. C.; Gruner, S. M.

    2016-12-01

    Pixel Array Detectors (PADs) consist of an x-ray sensor layer bonded pixel-by-pixel to an underlying readout chip. This approach allows both the sensor and the custom pixel electronics to be tailored independently to best match the x-ray imaging requirements. Here we present characterizations of CdTe sensors hybridized with two different charge-integrating readout chips, the Keck PAD and the Mixed-Mode PAD (MM-PAD), both developed previously in our laboratory. The charge-integrating architecture of each of these PADs extends the instantaneous counting rate by many orders of magnitude beyond that obtainable with photon counting architectures. The Keck PAD chip consists of rapid, 8-frame, in-pixel storage elements with framing periods detector, the MM-PAD, has an extended dynamic range by utilizing an in-pixel overflow counter coupled with charge removal circuitry activated at each overflow. This allows the recording of signals from the single-photon level to tens of millions of x-rays/pixel/frame while framing at 1 kHz. Both detector chips consist of a 128 × 128 pixel array with (150 μm)2 pixels.

  5. High-speed imaging at high x-ray energy: CdTe sensors coupled to charge-integrating pixel array detectors

    Energy Technology Data Exchange (ETDEWEB)

    Becker, Julian; Tate, Mark W.; Shanks, Katherine S.; Philipp, Hugh T.; Weiss, Joel T.; Purohit, Prafull [Laboratory of Atomic and Solid State Physics, Cornell University, Ithaca, NY 14853 (United States); Chamberlain, Darol [Cornell High Energy Synchrotron Source (CHESS), Cornell University, Ithaca, NY 14853 (United States); Gruner, Sol M., E-mail: smg26@cornell.edu [Laboratory of Atomic and Solid State Physics, Cornell University, Ithaca, NY 14853 (United States); Cornell High Energy Synchrotron Source (CHESS), Cornell University, Ithaca, NY 14853 (United States)

    2016-07-27

    Pixel Array Detectors (PADs) consist of an x-ray sensor layer bonded pixel-by-pixel to an underlying readout chip. This approach allows both the sensor and the custom pixel electronics to be tailored independently to best match the x-ray imaging requirements. Here we describe the hybridization of CdTe sensors to two different charge-integrating readout chips, the Keck PAD and the Mixed-Mode PAD (MM-PAD), both developed previously in our laboratory. The charge-integrating architecture of each of these PADs extends the instantaneous counting rate by many orders of magnitude beyond that obtainable with photon counting architectures. The Keck PAD chip consists of rapid, 8-frame, in-pixel storage elements with framing periods <150 ns. The second detector, the MM-PAD, has an extended dynamic range by utilizing an in-pixel overflow counter coupled with charge removal circuitry activated at each overflow. This allows the recording of signals from the single-photon level to tens of millions of x-rays/pixel/frame while framing at 1 kHz. Both detector chips consist of a 128×128 pixel array with (150 µm){sup 2} pixels.

  6. The readout system for the ArTeMis camera

    Science.gov (United States)

    Doumayrou, E.; Lortholary, M.; Dumaye, L.; Hamon, G.

    2014-07-01

    During ArTeMiS observations at the APEX telescope (Chajnantor, Chile), 5760 bolometric pixels from 20 arrays at 300mK, corresponding to 3 submillimeter focal planes at 450μm, 350μm and 200μm, have to be read out simultaneously at 40Hz. The read out system, made of electronics and software, is the full chain from the cryostat to the telescope. The readout electronics consists of cryogenic buffers at 4K (NABU), based on CMOS technology, and of warm electronic acquisition systems called BOLERO. The bolometric signal given by each pixel has to be amplified, sampled, converted, time stamped and formatted in data packets by the BOLERO electronics. The time stamping is obtained by the decoding of an IRIG-B signal given by APEX and is key to ensure the synchronization of the data with the telescope. Specifically developed for ArTeMiS, BOLERO is an assembly of analogue and digital FPGA boards connected directly on the top of the cryostat. Two detectors arrays (18*16 pixels), one NABU and one BOLERO interconnected by ribbon cables constitute the unit of the electronic architecture of ArTeMiS. In total, the 20 detectors for the tree focal planes are read by 10 BOLEROs. The software is working on a Linux operating system, it runs on 2 back-end computers (called BEAR) which are small and robust PCs with solid state disks. They gather the 10 BOLEROs data fluxes, and reconstruct the focal planes images. When the telescope scans the sky, the acquisitions are triggered thanks to a specific network protocol. This interface with APEX enables to synchronize the acquisition with the observations on sky: the time stamped data packets are sent during the scans to the APEX software that builds the observation FITS files. A graphical user interface enables the setting of the camera and the real time display of the focal plane images, which is essential in laboratory and commissioning phases. The software is a set of C++, Labview and Python, the qualities of which are respectively used

  7. Design and characterization of novel monolithic pixel sensors for the ALICE ITS upgrade

    Science.gov (United States)

    Cavicchioli, C.; Chalmet, P. L.; Giubilato, P.; Hillemanns, H.; Junique, A.; Kugathasan, T.; Mager, M.; Marin Tobon, C. A.; Martinengo, P.; Mattiazzo, S.; Mugnier, H.; Musa, L.; Pantano, D.; Rousset, J.; Reidt, F.; Riedler, P.; Snoeys, W.; Van Hoorne, J. W.; Yang, P.

    2014-11-01

    Within the R&D activities for the upgrade of the ALICE Inner Tracking System (ITS), Monolithic Active Pixel Sensors (MAPS) are being developed and studied, due to their lower material budget ( 0.3 %X0 in total for each inner layer) and higher granularity ( 20 μm × 20 μm pixels) with respect to the present pixel detector. This paper presents the design and characterization results of the Explorer0 chip, manufactured in the TowerJazz 180 nm CMOS Imaging Sensor process, based on a wafer with high-resistivity (ρ > 1 kΩ cm) and 18 μm thick epitaxial layer. The chip is organized in two sub-matrices with different pixel pitches (20 μm and 30 μm), each of them containing several pixel designs. The collection electrode size and shape, as well as the distance between the electrode and the surrounding electronics, are varied; the chip also offers the possibility to decouple the charge integration time from the readout time, and to change the sensor bias. The charge collection properties of the different pixel variants implemented in Explorer0 have been studied using a 55Fe X-ray source and 1-5 GeV/c electrons and positrons. The sensor capacitance has been estimated, and the effect of the sensor bias has also been examined in detail. A second version of the Explorer0 chip (called Explorer1) has been submitted for production in March 2013, together with a novel circuit with in-pixel discrimination and a sparsified readout. Results from these submissions are also presented.

  8. High-speed X-ray imaging pixel array detector for synchrotron bunch isolation

    Energy Technology Data Exchange (ETDEWEB)

    Philipp, Hugh T., E-mail: htp2@cornell.edu; Tate, Mark W.; Purohit, Prafull; Shanks, Katherine S.; Weiss, Joel T. [Cornell University, Ithaca, NY 14853 (United States); Gruner, Sol M. [Cornell University, Ithaca, NY 14853 (United States); Cornell University, Ithaca, NY 14853 (United States)

    2016-01-28

    A high-speed pixel array detector for time-resolved X-ray imaging at synchrotrons has been developed. The ability to isolate single synchrotron bunches makes it ideal for time-resolved dynamical studies. A wide-dynamic-range imaging X-ray detector designed for recording successive frames at rates up to 10 MHz is described. X-ray imaging with frame rates of up to 6.5 MHz have been experimentally verified. The pixel design allows for up to 8–12 frames to be stored internally at high speed before readout, which occurs at a 1 kHz frame rate. An additional mode of operation allows the integration capacitors to be re-addressed repeatedly before readout which can enhance the signal-to-noise ratio of cyclical processes. This detector, along with modern storage ring sources which provide short (10–100 ps) and intense X-ray pulses at megahertz rates, opens new avenues for the study of rapid structural changes in materials. The detector consists of hybridized modules, each of which is comprised of a 500 µm-thick silicon X-ray sensor solder bump-bonded, pixel by pixel, to an application-specific integrated circuit. The format of each module is 128 × 128 pixels with a pixel pitch of 150 µm. In the prototype detector described here, the three-side buttable modules are tiled in a 3 × 2 array with a full format of 256 × 384 pixels. The characteristics, operation, testing and application of the detector are detailed.

  9. Development of the digital read-out system for the CERN Alice pixel detector

    CERN Document Server

    Grassi, Tullio

    In order to gain new experimental insight at the TeV energy scale, CERN (Geneva) will build the Large Hadron Collider (LHC), a new collider machine operating at a maximum center-of-mass energy of 14 TeV (in the p+/p+ interactions). The accelerator can operate in a heavy ion collision mode achieving a center-of-mass energy of ~5.5 TeV. The experimental environment at LHC is characterized by a high crossing rate of the particle bunches (one every 25 ns for p+/p+) and high levels of radiation. Therefore stringent requirements are imposed on the performance of detectors at LHC. Such a particle physics environment calls for dedicated hardware/software solutions with specific constraints, such as radiation tolerance, limited amount of material and limited power dissipation. One of the particle physics experiments carried out in LHC is ALICE (A Large Ion Collider Experiment). The ALICE detector will face a very high density of tracks of particles (a multiplicity of 8000 charged particles per unit of rapidity, that i...

  10. Thin n-in-p planar pixel modules for the ATLAS upgrade at HL-LHC

    Science.gov (United States)

    Savic, N.; Bergbreiter, L.; Breuer, J.; La Rosa, A.; Macchiolo, A.; Nisius, R.; Terzo, S.

    2017-02-01

    The ATLAS experiment will undergo a major upgrade of the tracker system in view of the high luminosity phase of the LHC (HL-LHC) foreseen to start around 2025. Thin planar pixel modules are promising candidates to instrument the new pixel system, thanks to the reduced contribution to the material budget and their high charge collection efficiency after irradiation. New designs of the pixel cells, with an optimized biasing structure, have been implemented in n-in-p planar pixel productions with sensor thicknesses of 270 μm. Using beam tests, the gain in hit efficiency is investigated as a function of the received irradiation fluence. The outlook for future thin planar pixel sensor productions will be discussed, with a focus on thin sensors with a thickness of 100 and 150 μm and a novel design with the optimized biasing structure and small pixel cells (50×50 and 25×100 μm2). These dimensions are foreseen for the new ATLAS read-out chip in 65 nm CMOS technology and the fine segmentation will represent a challenge for the tracking in the forward region of the pixel system at HL-LHC. To predict the performance of 50×50 μm2 pixels at high η, FE-I4 compatible planar pixel sensors have been studied before and after irradiation in beam tests at high incidence angle with respect to the short pixel direction. Results on cluster shapes, charge collection- and hit efficiency will be shown.

  11. Design and development of the IBL-BOC firmware for the ATLAS Pixel IBL optical datalink system

    CERN Document Server

    AUTHOR|(INSPIRE)INSPIRE-00356268

    The Insertable $b$-Layer (IBL) is the first upgrade of the ATLAS Pixel detector at the LHC. It will be installed in the Pixel detector in 2013. The IBL will use a new sensor and readout technology, therefore the readout components of the current Pixel detector are redesigned for the readout of the IBL. In this diploma thesis the design and development of the firmware for the new IBL Back-of-Crate card (IBL-BOC) are described. The IBL-BOC is located on the off-detector side of the readout and performs the optical-electrical conversion and vice versa for the optical connection to and from the detector. To process the data transmitted to and received from the detector, the IBL-BOC uses multiple Field Programmable Gate Arrays (FPGA). The transmitted signal is a 40~Mb/s BiPhase Mark (BPM) encoded data stream, providing the timing, trigger and control to the detector. The received signal is a 160~Mb/s 8b10b encoded data stream, containing data from the detector. The IBL-BOC encodes and decodes these data streams. T...

  12. Improvement of Spectroscopic Performance using a Charge-sensitive Amplifier Circuit for an X-Ray Astronomical SOI Pixel Detector

    CERN Document Server

    Takeda, Ayaki; Tanaka, Takaaki; Uchida, Hiroyuki; Matsumura, Hideaki; Arai, Yasuo; Mori, Koji; Nishioka, Yusuke; Takenaka, Ryota; Kohmura, Takayoshi; Nakashima, Shinya; Kawahito, Shoji; Kagawa, Keiichiro; Yasutomi, Keita; Kamehama, Hiroki; Shrestha, Sumeet

    2016-01-01

    We have been developing monolithic active pixel sensors series, named "XRPIX," based on the silicon-on-insulator (SOI) pixel technology, for future X-ray astronomical satellites. The XRPIX series offers high coincidence time resolution ({\\rm \\sim}1 {\\rm \\mu}s), superior readout time ({\\rm \\sim}10 {\\rm \\mu}s), and a wide energy range (0.5--40 keV). In the previous study, we successfully demonstrated X-ray detection by event-driven readout of XRPIX2b. We here report recent improvements in spectroscopic performance. We successfully increased the gain and reduced the readout noise in XRPIX2b by decreasing the parasitic capacitance of the sense-node originated in the buried p-well (BPW). On the other hand, we found significant tail structures in the spectral response due to the loss of the charge collection efficiency when a small BPW is employed. Thus, we increased the gain in XRPIX3b by introducing in-pixel charge sensitive amplifiers instead of having even smaller BPW. We finally achieved the readout noise of 3...

  13. Improvement of spectroscopic performance using a charge-sensitive amplifier circuit for an X-ray astronomical SOI pixel detector

    Science.gov (United States)

    Takeda, A.; Tsuru, T. G.; Tanaka, T.; Uchida, H.; Matsumura, H.; Arai, Y.; Mori, K.; Nishioka, Y.; Takenaka, R.; Kohmura, T.; Nakashima, S.; Kawahito, S.; Kagawa, K.; Yasutomi, K.; Kamehama, H.; Shrestha, S.

    2015-06-01

    We have been developing monolithic active pixel sensors series, named ``XRPIX'', based on the silicon-on-insulator (SOI) pixel technology, for future X-ray astronomical satellites. The XRPIX series offers high coincidence time resolution (~ 1 μs), superior readout time (~ 10 μs), and a wide energy range (0.5-40 keV) . In the previous study, we successfully demonstrated X-ray detection by event-driven readout of XRPIX2b. We here report recent improvements in spectroscopic performance. We successfully increased the gain and reduced the readout noise in XRPIX2b by decreasing the parasitic capacitance of the sense-node originated in the buried p-well (BPW) . On the other hand, we found significant tail structures in the spectral response due to the loss of the charge collection efficiency when a small BPW is employed. Thus, we increased the gain in XRPIX3b by introducing in-pixel charge sensitive amplifiers instead of having even smaller BPW . We finally achieved the readout noise of 35 e- (rms) and the energy resolution of 320 eV (FWHM) at 6 keV without significant loss of the charge collection efficiency.

  14. A Full Parallel Event Driven Readout Technique for Area Array SPAD FLIM Image Sensors

    Directory of Open Access Journals (Sweden)

    Kaiming Nie

    2016-01-01

    Full Text Available This paper presents a full parallel event driven readout method which is implemented in an area array single-photon avalanche diode (SPAD image sensor for high-speed fluorescence lifetime imaging microscopy (FLIM. The sensor only records and reads out effective time and position information by adopting full parallel event driven readout method, aiming at reducing the amount of data. The image sensor includes four 8 × 8 pixel arrays. In each array, four time-to-digital converters (TDCs are used to quantize the time of photons’ arrival, and two address record modules are used to record the column and row information. In this work, Monte Carlo simulations were performed in Matlab in terms of the pile-up effect induced by the readout method. The sensor’s resolution is 16 × 16. The time resolution of TDCs is 97.6 ps and the quantization range is 100 ns. The readout frame rate is 10 Mfps, and the maximum imaging frame rate is 100 fps. The chip’s output bandwidth is 720 MHz with an average power of 15 mW. The lifetime resolvability range is 5–20 ns, and the average error of estimated fluorescence lifetimes is below 1% by employing CMM to estimate lifetimes.

  15. Readout Driver Firmware Development for the ATLAS Insertable B-Layer

    CERN Document Server

    Chen, Shaw-Pin; Hsu, Shih-Chieh

    During the Large Hadron Collider shutdown from 2013 to 2014 a fourth silicon layer, called the Insertable-B Layer (IBL), was inserted inside the existing ATLAS Pixel Detector. The IBL uses the state-of-the-art FE-I4 front-end readout ASICs for enhanced detector readout efficiency during upcoming LHC runs at higher energy and luminosity. The control and data acquisition (DAQ) of the IBL requires the commissioning of new off-detector readout electronics, mainly consisting of Field-Programmable Gate Array (FPGA)-based Readout Driver (ROD) and Back-of-Crate (BOC) Cards. This thesis focuses on the architecture, implementation, simulation, and hardware test results of the new IBL ROD datapath firmware. Characterization of the IBL detector front-end and an overview of ATLAS Trigger DAQ (TDAQ) system are provided in the first chapters of the thesis. IBL ROD datapath firmware was designed and simulated in a ModelSim testbench with a realistic HDL FE-I4 model as source of data. The hardware tests using both real and em...

  16. Code-division-multiplexed readout of large arrays of TES microcalorimeters

    Science.gov (United States)

    Morgan, K. M.; Alpert, B. K.; Bennett, D. A.; Denison, E. V.; Doriese, W. B.; Fowler, J. W.; Gard, J. D.; Hilton, G. C.; Irwin, K. D.; Joe, Y. I.; O'Neil, G. C.; Reintsema, C. D.; Schmidt, D. R.; Ullom, J. N.; Swetz, D. S.

    2016-09-01

    Code-division multiplexing (CDM) offers a path to reading out large arrays of transition edge sensor (TES) X-ray microcalorimeters with excellent energy and timing resolution. We demonstrate the readout of X-ray TESs with a 32-channel flux-summed code-division multiplexing circuit based on superconducting quantum interference device (SQUID) amplifiers. The best detector has energy resolution of 2.28 ± 0.12 eV FWHM at 5.9 keV and the array has mean energy resolution of 2.77 ± 0.02 eV over 30 working sensors. The readout channels are sampled sequentially at 160 ns/row, for an effective sampling rate of 5.12 μs/channel. The SQUID amplifiers have a measured flux noise of 0.17 μΦ0/√Hz (non-multiplexed, referred to the first stage SQUID). The multiplexed noise level and signal slew rate are sufficient to allow readout of more than 40 pixels per column, making CDM compatible with requirements outlined for future space missions. Additionally, because the modulated data from the 32 SQUID readout channels provide information on each X-ray event at the row rate, our CDM architecture allows determination of the arrival time of an X-ray event to within 275 ns FWHM with potential benefits in experiments that require detection of near-coincident events.

  17. BESIII ETOF upgrade readout electronics commissioning

    Science.gov (United States)

    Wang, Xiao-Zhuang; Dai, Hong-Liang; Wu, Zhi; Heng, Yue-Kun; Zhang, Jie; Cao, Ping; Ji, Xiao-Lu; Li, Cheng; Sun, Wei-Jia; Wang, Si-Yu; Wang, Yun

    2017-01-01

    It is proposed to upgrade the endcap time-of-flight (ETOF) of the Beijing Spectrometer III (BESIII) with a multi-gap resistive plate chamber (MRPC), aiming at an overall time resolution of about 80 ps. After completing the entire readout electronics system, some experiments, such as heat radiation, radiation hardness and large-current beam tests, have been carried out to confirm the reliability and stability of the readout electronics. An on-detector test of the readout electronics has also been performed with the beam at the BEPCII E3 line. The test results indicate that the readout electronics system fulfills its design requirements. Supported by Chinese Academy of Sciences (1G201331231172010)

  18. Very forward calorimeters readout and machine interface

    Indian Academy of Sciences (India)

    Wojciech Wierba; on behalf of the FCAL Collaboration

    2007-12-01

    The paper describes the requirements for the readout electronics and DAQ for the instrumentation of the forward region of the future detector at the international linear collider. The preliminary design is discussed.

  19. Back-Side Readout Silicon Photomultiplier

    Science.gov (United States)

    Choong, Woon-Seng; Holland, Stephen E.

    2012-01-01

    We present a novel structure for the back-side readout silicon photomultipler (SiPM). Current SiPMs are front-illuminated structures with front-side readout, which have relatively small geometric fill factor leading to degradation in their photon detection efficiency (PDE). Back-side readout devices will provide an advantageous solution to achieve high PDE. We designed and investigated a novel structure that would allow back-side readout while creating a region of high electric field optimized for avalanche breakdown. In addition, this structure has relatively high fill factor and also allow direct coupling of individual micro-cell of the SiPM to application-specific integrated circuits. We will discuss the performance that can be attained with this structure through device simulation and the process flow that can be used to fabricate this structure through process simulation. PMID:23564969

  20. The high performance readout chain for the DSSC 1Megapixel detector, designed for high throughput during pulsed operation mode

    Science.gov (United States)

    Kirchgessner, M.; Soldat, J.; Kugel, A.; Donato, M.; Porro, M.; Fischer, P.

    2015-01-01

    The readout chain of the DSSC 1M pixel detector currently built at DESY, Hamburg for the European X-Ray Free Electron Laser is described. The system operates in pulsed operation mode comparable to the new ILC. Each 0.1 seconds 800 images of 1M pixels are produced and readout by the DSSC DAQ electronics. The total data production rate of the system is about 134 Gbit/s. In order to deal with the high data rates, latest technology components like the Xilinx Kintex 7 FPGA are used to implement fast DDR3-1600 image buffers, high speed serial FPGA to FPGA communication and 10 GB Ethernet links concentrated in one 40 Gbit/s QSFP+ transceiver.

  1. Measurements and simulation of the interaction of turbulence and premixed flames; Messungen und Simulationen zur Wechselwirkung zwischen Turbulenz und vorgemischten Flammen

    Energy Technology Data Exchange (ETDEWEB)

    Durst, B.

    2000-11-01

    The interaction between turbulence and hydrogen-flames was investigated in an explosion tube. The flow velocity around single flow obstacles was measured with a laser-Doppler system and compared to the flame velocity which was recorded using photodiodes. The highest turbulence intensity (up to 10 m/s) and correspondingly the highest flame acceleration was measured in the shear layer downstream of the obstacle with the highest blockage ratio. A closure model based on probability density functions (PDF) was developed for the time averaged chemical reaction rate for the purpose of simulating turbulent combustion processes. Comparisons of the results gained from simulations using the PDF combustion modell showed good agreement with the measurements performed. [German] Die Wechselwirkung zwischen Turbulenz und Wasserstoff-Flammen wurde in einem Explosionsrohr untersucht. Die Stroemungsgeschwindigkeit wurde mit einem Laser-Doppler System an Einzelhindernissen gemessen und mit der Flammengeschwindigkeit, die mittels Photodioden erfasst wurde, verglichen. In der Scherschicht hinter dem Hindernis mit der hoechsten Blockierrate wurde die hoechste Turbulenzintensitaet (bis 10 m/s) und damit die hoechste Flammenbeschleunigung gemessen. Fuer numerische Simulationen der turbulenten Verbrennung wurde ein Schliessungsansatz fuer die zeitgemittelte chemische Reaktionsrate entwickelt, der auf Wahrscheinlichkeitsdichtefunktionen (englisch: PDF) basiert. Vergleichsrechnungen mit dem PDF-Verbrennungsmodell zeigten gute Uebereinstimmung mit den durchgefuehrten Messungen.

  2. Measurements and simulation of the interaction of turbulence and premixed flames; Messungen und Simulationen zur Wechselwirkung zwischen Turbulenz und vorgemischten Flammen

    Energy Technology Data Exchange (ETDEWEB)

    Durst, B.

    2000-11-01

    The interaction between turbulence and hydrogen-flames was investigated in an explosion tube. The flow velocity around single flow obstacles was measured with a laser-Doppler system and compared to the flame velocity which was recorded using photodiodes. The highest turbulence intensity (up to 10 m/s) and correspondingly the highest flame acceleration was measured in the shear layer downstream of the obstacle with the highest blockage ratio. A closure model based on probability density functions (PDF) was developed for the time averaged chemical reaction rate for the purpose of simulating turbulent combustion processes. Comparisons of the results gained from simulations using the PDF combustion modell showed good agreement with the measurements performed. [German] Die Wechselwirkung zwischen Turbulenz und Wasserstoff-Flammen wurde in einem Explosionsrohr untersucht. Die Stroemungsgeschwindigkeit wurde mit einem Laser-Doppler System an Einzelhindernissen gemessen und mit der Flammengeschwindigkeit, die mittels Photodioden erfasst wurde, verglichen. In der Scherschicht hinter dem Hindernis mit der hoechsten Blockierrate wurde die hoechste Turbulenzintensitaet (bis 10 m/s) und damit die hoechste Flammenbeschleunigung gemessen. Fuer numerische Simulationen der turbulenten Verbrennung wurde ein Schliessungsansatz fuer die zeitgemittelte chemische Reaktionsrate entwickelt, der auf Wahrscheinlichkeitsdichtefunktionen (englisch: PDF) basiert. Vergleichsrechnungen mit dem PDF-Verbrennungsmodell zeigten gute Uebereinstimmung mit den durchgefuehrten Messungen.

  3. R&D on a novel spectro-imaging polarimeter with Micromegas detectors and a Caliste readout system

    Energy Technology Data Exchange (ETDEWEB)

    Attié, D., E-mail: david.attie@cea.fr [DSM-IRFU, CEA Saclay, Centre de Saclay, F-91191 Gif-sur-Yvette (France); Blondel, C. [AIM, CEA/DSM-CNRS-Université Paris Diderot, IRFU/Service d’Astrophysique (France); Boilevin-Kayl, L.; Desforges, D.; Ferrer-Ribas, E.; Giomataris, I.; Gevin, O.; Jeanneau, F. [DSM-IRFU, CEA Saclay, Centre de Saclay, F-91191 Gif-sur-Yvette (France); Limousin, O.; Meuris, A. [AIM, CEA/DSM-CNRS-Université Paris Diderot, IRFU/Service d’Astrophysique (France); Papaevangelou, T.; Peyaud, A. [DSM-IRFU, CEA Saclay, Centre de Saclay, F-91191 Gif-sur-Yvette (France)

    2015-07-01

    Micromegas detectors, part of the Micro-Pattern Gaseous Detectors (MPGD) family, are used in a very wide range of applications in the High Energy Physics community but also in astroparticle and neutrino physics. In most of the Micromegas applications the design of the detector vessel and the readout plane is extremely coupled. A way of dissociating these two components would be by separating the amplification structure and the detector volume from the readout plane and electronics. This is achieved with the so called piggyback Micromegas detectors. They open up new possibilities of applications in terms of adaptability to new electronics. In particular piggyback resistive Micromegas can be easily coupled to modern pixel array electronic ASICs. First tests have been carried out with a Medipix chip where the protection of the resistive layer has been proved. The results of very recent tests coupling piggyback Micromegas with the readout module of Caliste are presented. Caliste is a high performance spectro-imager with event time-tagging capability, able to detect photons between 2 keV and 250 keV in the context of a spatial micro spectro-imaging polarimetrer. In the current application, with the Piggyback Micromegas, we use the readout module only as the sensitive detector. We benefit of the good spatial resolution thanks to the high density readout pixels (~600 μm pixel pitch), to the low noise, to the low power and to the radiation hard integrated front-end IDEF-X electronics. The advantage of such a device is to have a high gain, low noise, low threshold, and robust detector operating at room temperature. This would be very attractive for spatial applications, for instance X-ray polarisation.

  4. Development of a Detector Control System for the ATLAS Pixel detector in the HL-LHC

    Science.gov (United States)

    Lehmann, N.; Karagounis, M.; Kersten, S.; Zeitnitz, C.

    2016-11-01

    The upgrade of the LHC to the HL-LHC requires a new ITk detector. The innermost part of this new tracker is a pixel detector. The University of Wuppertal is developing a new DCS to monitor and control this new pixel detector. The current concept envisions three parallel paths of the DCS. The first path, called security path, is hardwired and provides an interlock system to guarantee the safety of the detector and human beings. The second path is a control path. This path is used to supervise the entire detector. The control path has its own communication lines independent from the regular data readout for reliable operation. The third path is for diagnostics and provides information on demand. It is merged with the regular data readout and provides the highest granularity and most detailed information. To reduce the material budget, a serial power scheme is the baseline for the pixel modules. A new ASIC used in the control path is in development at Wuppertal for this serial power chain. A prototype exists already and a proof of principle was demonstrated. Development and research is ongoing to guarantee the correct operation of the new ASIC in the harsh environment of the HL-LHC. The concept for the new DCS will be presented in this paper. A focus will be made on the development of the DCS chip, used for monitoring and control of pixel modules in a serial power chain.

  5. The Pixel Detector of the ATLAS experiment for the Run2 at the Large Hadron Collider -- Plot Approval (Pixel, IBL) : This is a submission of plot approval request for Pixel+IBL, facing on a talk at ICHEP 2014 conference

    CERN Document Server

    Mandelli, B; The ATLAS collaboration

    2014-01-01

    The Pixel Detector of the ATLAS experiment has shown excellent performance during the whole Run-1 of LHC. Taking advantage of the long showdown, the detector was extracted from the experiment and brought to surface, to equip it with new service quarter panels, to repair modules and to ease installation of the Insertable B-Layer (IBL). IBL is a fourth layer of pixel detectors, and will be installed in May 2014 between the existing Pixel Detector and a new smaller radius beam-pipe at a radius of 3.3 cm. To cope with the high radiation and pixel occupancy due to the proximity to the interaction point, a new read-out chip and two different silicon sensor technologies (planar and 3D) have been developed. Furthermore, the physics performance will be improved through the reduction of pixel size while, targeting for a low material budget, a new mechanical support using lightweight staves and a CO2 based cooling system have been adopted. IBL construction is now completed. An overview of the IBL project as well as the ...

  6. Characterization of the PANDA MVD trapezoidal silicon strip sensors and the development of their readout system

    Energy Technology Data Exchange (ETDEWEB)

    Deermann, Dariusch; Stockmanns, Tobias; Ritman, James [Forschungszentrum Juelich GmbH (Germany); Collaboration: PANDA-Collaboration

    2014-07-01

    The anti PANDA-experiment will be one of the main experiments inside the upcoming Facility for Antiproton and Ion Research (FAIR) at the GSI in Darmstadt. The fixed target experiment will explore bar pp annihilation in the charm mass region with intense, phase space cooled beams with momenta between 1.5 and 15 GeV/c. The innermost subdetector of anti PANDA will be the Micro Vertex Detector (MVD) and consists of silicon strip and pixel detectors. In order to operate and test the first trapezoidal strip sensor prototypes of the MVD, they are characterized with a probestation as well as with a dedicated testboard. Furthermore, the existing Juelich Digital Readout System has to be modified for the trapezoidal sensors. In this poster the adaption of the Juelich Digital Readout System for the trapezoidal silicon strip sensors as well as their characterization are presented.

  7. Radiopurity assessment of the tracking readout for the NEXT double beta decay experiment

    CERN Document Server

    Álvarez, V; Barrado, A I; Bettini, A; Borges, F I G M; Camargo, M; Cárcel, S; Cebrián, S; Cervera, A; Conde, C A N; Conde, E; Dafni, T; Díaz, J; Esteve, R; Fernandes, L M P; Fernández, M; Ferrario, P; Ferreira, A L; Freitas, E D C; Gehman, V M; Goldschmidt, A; Gómez, H; Gómez-Cadenas, J J; González-Díaz, D; Gutiérrez, R M; Hauptman, J; Morata, J A Hernando; Herrera, D C; Iguaz, F J; Irastorza, I G; Labarga, L; Laing, A; Liubarsky, I; Lorca, D; Losada, M; Luzón, G; Marí, A; Martín-Albo, J; Martínez, A; Martínez-Lema, G; Miller, T; Monrabal, F; Monserrate, M; Monteiro, C M B; Mora, F J; Moutinho, L M; Vidal, J Muñoz; Nebot-Guinot, M; Nygren, D; Oliveira, C A B; de Solórzano, A Ortiz; Pérez, J; Aparicio, J L Pérez; Renner, J; Ripoll, L; Rodríguez, A; Rodríguez, J; Santos, F P; Santos, J M F dos; Segui, L; Serra, L; Shuman, D; Simón, A; Sofka, C; Sorel, M; Toledo, J F; Torrent, J; Tsamalaidze, Z; Veloso, J F C A; Villar, J A; Webb, R C; White, J T; Yahlali, N

    2014-01-01

    The 'Neutrino Experiment with a Xenon Time-Projection Chamber' (NEXT) is intended to investigate the neutrinoless double beta decay of 136Xe, which requires a severe suppression of potential backgrounds; therefore, an extensive screening and selection process is underway to control the radiopurity levels of the materials to be used in the experimental set-up of NEXT. The detector design combines the measurement of the topological signature of the event for background discrimination with the energy resolution optimization. Separate energy and tracking readout planes are based on different sensors: photomultiplier tubes for calorimetry and silicon multi-pixel photon counters for tracking. The design of a radiopure tracking plane, in direct contact with the gas detector medium, was a challenge since the needed components have typically activities too large for experiments requiring ultra-low background conditions. Here, the radiopurity assessment of tracking readout components based on gamma-ray spectroscopy usi...

  8. ERICA: an energy resolving photon counting readout ASIC for X-ray in-line cameras

    Science.gov (United States)

    Macias-Montero, J.-G.; Sarraj, M.; Chmeissani, M.; Moore, T.; Casanova, R.; Martinez, R.; Puigdengoles, C.; Prats, X.; Kolstein, M.

    2016-12-01

    We present ERICA (Energy Resolving Inline X-ray Camera) a photon-counting readout ASIC, with 6 energy bins. The ASIC is composed of a matrix of 8 × 20 pixels controlled by a global digital controller and biased with 7 independent digital to analog converters (DACs) and a band-gap current reference. The pixel analog front-end includes a charge sensitive amplifier with 16 mV/ke- gain and dynamic range of 45 ke-. ERICA has programmable pulse width, an adjustable constant current feedback resistor, a linear test pulse generator, and six discriminators with 6-bit local threshold adjustment. The pixel digital back-end includes the digital controller, 8 counters of 8-bit depth, half-full buffer flag for any of the 8 counters, a 74-bit shadow/shift register, a 74-bit configuration latch, and charge sharing compensation processing to perform the energy classification and counting operations of every detected photon in 1 μ s. The pixel size is 330 μm × 330 μm and its average consumption is 150 μW. Implemented in TSMC 0.25 μm CMOS process, the ASIC pixel's equivalent noise charge (ENC) is 90 e- RMS connected to a 1 mm thickness matching CdTe detector biased at -300 V with a total leakage current of 20 nA.

  9. Beam Test Studies of 3D Pixel Sensors Irradiated Non-Uniformly for the ATLAS Forward Physics Detector

    Science.gov (United States)

    2013-02-21

    configuration consists of two n-type readout electrodes connected at the wafer surface along the 250 µm long pixel di- rection, surrounded by six p-type...passivation step uses dielectric material that depends on the bulk type of the silicon. For p-type wafers used in this study, a dielectric with negative...region by applying the SCP technology, from the original 1 mm to 50 − 100µm. The devices were returned to Barcelona to be bump -bonded to FE-I3 readout

  10. A kilo-pixel imaging system for future space based far-infrared observatories using microwave kinetic inductance detectors

    CERN Document Server

    Baselmans, J J A; Yates, S J C; Yurduseven, O; Llombart, N; Karatsu, K; Baryshev, A M; Ferrari, L; Endo, A; Thoen, D J; de Visser, P J; Janssen, R M J; Murugesan, V; Driessen, E F C; Coiffard, G; Martin-Pintado, J; Hargrave, P; Griffin, M

    2016-01-01

    Future astrophysics and cosmic microwave background space missions operating in the far-infrared to millimetre part of the spectrum will require very large arrays of ultra-sensitive detectors in combination with high multiplexing factors and efficient low- noise and low-power readout systems. We have developed a demonstrator system suitable for such applications. The system combines a 961 pixel imaging array based upon Microwave Kinetic Inductance Detectors (MKIDs) with a readout system capable of reading out all pixels simultaneously with only one readout cable pair and a single cryogenic amplifier. We evaluate, in a representative environment, the system performance in terms of sensitivity, dynamic range, optical efficiency, cosmic ray rejection, pixel-pixel crosstalk and overall yield at an observation frequency of 850 GHz. The overall system has an excellent sensitivity, with an average detector sensitivity NEP=2.8 +- 0.8 x 10^-19 W/rt(Hz) measured using a thermal calibration source. The dynamic range wou...

  11. Realization and application of a 111 million pixel backside-illuminated detector and camera

    CERN Document Server

    Zacharias, Norbert; Bredthauer, Richard; Boggs, Kasey; Bredthauer, Greg; Lesser, Mike

    2007-01-01

    A full-wafer, 10,580 $\\times$ 10,560 pixel (95 $\\times$ 95 mm) CCD was designed and tested at Semiconductor Technology Associates (STA) with 9 um square pixels and 16 outputs. The chip was successfully fabricated in 2006 at DALSA and some performance results are presented here. This program was funded by the Office of Naval Research through a Small Business Innovation in Research (SBIR) program requested by the U.S. Naval Observatory for its next generation astrometric sky survey programs. Using Leach electronics, low read-noise output of the 111 million pixels requires 16 seconds at 0.9 MHz. Alternative electronics developed at STA allow readout at 20 MHz. Some modifications of the design to include anti-blooming features, a larger number of outputs, and use of p-channel material for space applications are discussed.

  12. Development of radiation hard CMOS active pixel sensors for HL-LHC

    Energy Technology Data Exchange (ETDEWEB)

    Pernegger, Heinz, E-mail: heinz.pernegger@cern.ch

    2016-07-11

    New pixel detectors, based on commercial high voltage and/or high resistivity full CMOS processes, hold promise as next-generation active pixel sensors for inner and intermediate layers of the upgraded ATLAS tracker. The use of commercial CMOS processes allow cost-effective detector construction and simpler hybridisation techniques. The paper gives an overview of the results obtained on AMS-produced CMOS sensors coupled to the ATLAS Pixel FE-I4 readout chips. The SOI (silicon-on-insulator) produced sensors by XFAB hold great promise as radiation hard SOI-CMOS sensors due to their combination of partially depleted SOI transistors reducing back-gate effects. The test results include pre-/post-irradiation comparison, measurements of charge collection regions as well as test beam results.

  13. Test beam results of 3D silicon pixel sensors for the ATLAS upgrade

    Energy Technology Data Exchange (ETDEWEB)

    Grenier, P., E-mail: grenier@slac.stanford.ed [SLAC National Accelerator Laboratory (United States); Alimonti, G. [INFN Sezione di Milano (Italy); Barbero, M. [Bonn University (Germany); Bates, R. [Glasgow University (United Kingdom); Bolle, E. [Oslo University (Norway); Borri, M. [University of Manchester (United Kingdom); Boscardin, M. [FBK-irst, Trento (Italy); Buttar, C. [Glasgow University (United Kingdom); Capua, M. [INFN Gruppo Collegato di Cosenza and Universita della Calabria (Italy); Cavalli-Sforza, M. [IFAE Barcelona (Spain); Cobal, M.; Cristofoli, A. [INFN Gruppo Collegato di Udine and Universita di Udine (Italy); Dalla Betta, G.-F. [INFN Gruppo Collegato di Trento and DISI Universita di Trento (Italy); Darbo, G. [INFN Sezione di Genova (Italy); Da Via, C. [University of Manchester (United Kingdom); Devetak, E.; DeWilde, B. [Stony Brook University (United States); Di Girolamo, B.; Dobos, D. [CERN (Switzerland); Einsweiler, K. [Lawrence Berkeley National Laboratory (United States)

    2011-05-11

    Results on beam tests of 3D silicon pixel sensors aimed at the ATLAS Insertable B-Layer and High Luminosity LHC (HL-LHC) upgrades are presented. Measurements include charge collection, tracking efficiency and charge sharing between pixel cells, as a function of track incident angle, and were performed with and without a 1.6 T magnetic field oriented as the ATLAS inner detector solenoid field. Sensors were bump-bonded to the front-end chip currently used in the ATLAS pixel detector. Full 3D sensors, with electrodes penetrating through the entire wafer thickness and active edge, and double-sided 3D sensors with partially overlapping bias and read-out electrodes were tested and showed comparable performance.

  14. Electron Pattern Recognition using trigger mode SOI pixel sensor for Advanced Compton Imaging

    Science.gov (United States)

    Shimazoe, K.; Yoshihara, Y.; Fairuz, A.; Koyama, A.; Takahashi, H.; Takeda, A.; Tsuru, T.; Arai, Y.

    2016-02-01

    Compton imaging is a useful method for localizing sub MeV to a few MeV gamma-rays and widely used for environmental and medical applications. The direction of recoiled electrons in Compton scattering process provides the additional information to limit the Compton cones and increases the sensitivity in the system. The capability of recoiled electron tracking using trigger-mode Silicon-On-Insulator (SOI) sensor is investigated with various radiation sources. The trigger-mode SOI sensor consists of 144 by 144 active pixels with 30 μm cells and the thickness of sensor is 500 μm. The sensor generates the digital output when it is hit by gamma-rays and 25 by 25 pixel pattern of surrounding the triggered pixel is readout to extract the recoiled electron track. The electron track is successfully observed for 60Co and 137Cs sources, which provides useful information for future electron tracking Compton camera.

  15. Test Beam Results of 3D Silicon Pixel Sensors for the ATLAS upgrade

    CERN Document Server

    Grenier, P; Barbero, M; Bates, R; Bolle, E; Borri, M; Boscardin, M; Buttar, C; Capua, M; Cavalli-Sforza, M; Cobal, M; Cristofoli, A; Dalla Betta, G F; Darbo, G; Da Via, C; Devetak, E; DeWilde, B; Di Girolamo, B; Dobos, D; Einsweiler, K; Esseni, D; Fazio, S; Fleta, C; Freestone, J; Gallrapp, C; Garcia-Sciveres, M; Gariano, G; Gemme, C; Giordani, M P; Gjersdal, H; Grinstein, S; Hansen, T; Hansen, T E; Hansson, P; Hasi, J; Helle, K; Hoeferkamp, M; Hugging, F; Jackson, P; Jakobs, K; Kalliopuska, J; Karagounis, M; Kenney, C; Köhler, M; Kocian, M; Kok, A; Kolya, S; Korokolov, I; Kostyukhin, V; Krüger, H; La Rosa, A; Lai, C H; Lietaer, N; Lozano, M; Mastroberardino, A; Micelli, A; Nellist, C; Oja, A; Oshea, V; Padilla, C; Palestri, P; Parker, S; Parzefall, U; Pater, J; Pellegrini, G; Pernegger, H; Piemonte, C; Pospisil, S; Povoli, M; Roe, S; Rohne, O; Ronchin, S; Rovani, A; Ruscino, E; Sandaker, H; Seidel, S; Selmi, L; Silverstein, D; Sjøbaek, K; Slavicek, T; Stapnes, S; Stugu, B; Stupak, J; Su, D; Susinno, G; Thompson, R; Tsung, J W; Tsybychev, D; Watts, S J; Wermes, N; Young, C; Zorzi, N

    2011-01-01

    Results on beam tests of 3D silicon pixel sensors aimed at the ATLAS Insertable-B-Layer and High Luminosity LHC (HL-LHC)) upgrades are presented. Measurements include charge collection, tracking efficiency and charge sharing between pixel cells, as a function of track incident angle, and were performed with and without a 1.6 T magnetic field oriented as the ATLAS Inner Detector solenoid field. Sensors were bump bonded to the front-end chip currently used in the ATLAS pixel detector. Full 3D sensors, with electrodes penetrating through the entire wafer thickness and active edge, and double-sided 3D sensors with partially overlapping bias and read-out electrodes were tested and showed comparable performance.

  16. The LHCb Vertex Locator (VELO) Pixel Detector Upgrade

    CERN Document Server

    Buchanan, Emma

    2017-01-01

    The LHCb experiment is designed to perform high-precision measurements of CP violation and the decays of beauty and charm hadrons at the Large Hadron Collider (LHC) at CERN. There is a planned upgrade during Long Shutdown 2 (LS2), expected in 2019, which will allow the detector to run at higher luminosities by transforming the entire readout to a trigger-less system. This will include a substantial upgrade of the Vertex Locator (VELO), the silicon tracker that surrounds the LHCb interaction region. The VELO is moving from silicon strip technology to hybrid pixel sensors, where silicon sensors are bonded to VeloPix ASICs. Sensor prototypes have undergone rigorous testing using the Timepix3 Telescope at the SPS, CERN. The main components of the upgrade are summarised and testbeam results presented.

  17. Signal modeling of charge sharing effect in simple pixelated CdZnTe detector

    Science.gov (United States)

    Kim, Jae Cheon; Kaye, William R.; He, Zhong

    2014-05-01

    In order to study the energy resolution degradation in 3D position-sensitive pixelated CdZnTe (CZT) detectors, a detailed detector system modeling package has been developed and used to analyze the detector performance. A 20 × 20 × 15 mm3 CZT crystal with an 11 × 11 simple-pixel anode array and a 1.72 mm pixel pitch was modeled. The VAS UM/TAT4 Application Specific Integrated Circuitry (ASIC) was used for signal read-out. Components of the simulation package include gamma-ray interactions with the CZT crystal, charge induction, electronic noise, pulse shaping, and ASIC triggering procedures. The charge induction model considers charge drift, trapping, diffusion, and sharing between pixels. This system model is used to determine the effects of electron cloud sharing, weighting potential non-uniformity, and weighting potential cross-talk which produce non-uniform signal responses for different gamma-ray interaction positions and ultimately degrade energy resolution. The effect of the decreased weighting potential underneath the gap between pixels on the total pulse amplitude of events has been studied. The transient signals induced by electron clouds collected near the gap between pixels may generate false signals, and the measured amplitude can be even greater than the photopeak. As the number of pixels that collect charge increases, the probability of side-neighbor events due to charge sharing significantly increases. If side-neighbor events are not corrected appropriately, the energy resolution of pixelated CZT detectors in multiple-pixel events degrades rapidly.

  18. Signal modeling of charge sharing effect in simple pixelated CdZnTe detector

    Energy Technology Data Exchange (ETDEWEB)

    Kim, Jae C.; Kaye, William R.; He, Zhong [University of Michigan, Ann Arbor, MI (United States)

    2014-05-15

    In order to study the energy resolution degradation in 3D position-sensitive pixelated CdZnTe (CZT) detectors, a detailed detector system modeling package has been developed and used to analyze the detector performance. A 20 x 20 x 15 mm{sup 3} CZT crystal with an 11 x 11 simple-pixel anode array and a 1.72 mm pixel pitch was modeled. The VAS UM/TAT4 Application Specific Integrated Circuitry (ASIC) was used for signal read-out. Components of the simulation package include gamma-ray interactions with the CZT crystal, charge induction, electronic noise, pulse shaping, and ASIC triggering procedures. The charge induction model considers charge drift, trapping, diffusion, and sharing between pixels. This system model is used to determine the effects of electron cloud sharing, weighting potential non-uniformity, and weighting potential cross-talk which produce non-uniform signal responses for different gamma-ray interaction positions and ultimately degrade energy resolution. The effect of the decreased weighting potential underneath the gap between pixels on the total pulse amplitude of events has been studied. The transient signals induced by electron clouds collected near the gap between pixels may generate false signals, and the measured amplitude can be even greater than the photopeak. As the number of pixels that collect charge increases, the probability of side-neighbor events due to charge sharing significantly increases. If side-neighbor events are not corrected appropriately, the energy resolution of pixelated CZT detectors in multiple-pixel events degrades rapidly.

  19. Micro Pixel Chamber with resistive electrodes for spark reduction

    CERN Document Server

    Ochi, Atsuhiko; Homma, Yasuhiro; Komai, Hidetoshi; Yamaguchi, Takahiro

    2013-01-01

    The Micro Pixel Chamber (mu-PIC) using resistive electrodes has been developed and tested. The surface cathodes are made from resistive material, by which the electrical field is reduced when large current is flowed. Two-dimensional readouts are achieved by anodes and pickup electrodes, on which signals are induced. High gas gain (> 60000) was measured using 55Fe (5.9 keV) source, and very intensive spark reduction was attained under fast neutron. The spark rate of resistive mu-PIC was only 10^-4 times less than that of conventional mu-PIC at the gain of 10^4. With these developments, a new MPGD with no floating structure is achieved, with enough properties of both high gain and good stability to detect MIP particles. In addition, mu-PIC can be operated with no HV applied on anodes by using resistive cathodes. Neither AC coupling capacitors nor HV pull up resisters are needed for any anode electrode. Signal readout is drastically simplified by that configuration.

  20. All-passive pixel super-resolution of time-stretch imaging

    Science.gov (United States)

    Chan, Antony C. S.; Ng, Ho-Cheung; Bogaraju, Sharat C. V.; So, Hayden K. H.; Lam, Edmund Y.; Tsia, Kevin K.

    2017-03-01

    Based on image encoding in a serial-temporal format, optical time-stretch imaging entails a stringent requirement of state-of-the-art fast data acquisition unit in order to preserve high image resolution at an ultrahigh frame rate — hampering the widespread utilities of such technology. Here, we propose a pixel super-resolution (pixel-SR) technique tailored for time-stretch imaging that preserves pixel resolution at a relaxed sampling rate. It harnesses the subpixel shifts between image frames inherently introduced by asynchronous digital sampling of the continuous time-stretch imaging process. Precise pixel registration is thus accomplished without any active opto-mechanical subpixel-shift control or other additional hardware. Here, we present the experimental pixel-SR image reconstruction pipeline that restores high-resolution time-stretch images of microparticles and biological cells (phytoplankton) at a relaxed sampling rate (≈2-5 GSa/s)—more than four times lower than the originally required readout rate (20 GSa/s) — is thus effective for high-throughput label-free, morphology-based cellular classification down to single-cell precision. Upon integration with the high-throughput image processing technology, this pixel-SR time-stretch imaging technique represents a cost-effective and practical solution for large scale cell-based phenotypic screening in biomedical diagnosis and machine vision for quality control in manufacturing.

  1. A DC-DC conversion powering scheme for the CMS Phase-1 pixel upgrade

    Science.gov (United States)

    Feld, L.; Fleck, M.; Friedrichs, M.; Hensch, R.; Karpinski, W.; Klein, K.; Sammet, J.; Wlochal, M.

    2013-02-01

    The CMS pixel detector was designed for a nominal instantaneous LHC luminosity of 1ṡ1034 cm-2s-1. During Phase-1 of the LHC upgrade, the instantaneous luminosity will be increased to about twice this value. To preserve the excellent performance of the pixel detector despite the increase in particle rates and track densities, the CMS Collaboration foresees the exchange of its pixel detector in the shutdown 2016/2017. The new pixel detector will be improved in many respects, and will comprise twice the number of readout channels. A powering scheme based on DC-DC conversion will be adopted, which will enable the provision of the required power with the present cable plant. The powering scheme of the CMS pixel detector will be described, and the performance of prototype DC-DC buck converters will be presented, including power efficiency, system tests with DC-DC converters and pixel modules, thermal management, reliability at low temperature, and studies of potential frequency locking between DC-DC converters.

  2. Thin n-in-p planar pixel modules for the ATLAS upgrade at HL-LHC

    CERN Document Server

    INSPIRE-00517212; Breuer, J.; La Rosa, A.; Macchiolo, A.; Nisius, R.; Terzo, S.

    2016-01-01

    The ATLAS experiment will undergo a major upgrade of the tracker system in view of the high luminosity phase of the LHC (HL-LHC) foreseen to start around 2025. Thin planar pixel modules are promising candidates to instrument the new pixel system, thanks to the reduced contribution to the material budget and their high charge collection efficiency after irradiation. New designs of the pixel cells, with an optimized biasing structure, have been implemented in n-in-p planar pixel productions with sensor thicknesses of 270 um. Using beam tests, the gain in hit efficiency is investigated as a function of the received irradiation fluence. The outlook for future thin planar pixel sensor productions will be discussed, with a focus on thin sensors with a thickness of 100 and 150 um and a novel design with the optimized biasing structure and small pixel cells (50 um x 50 um and 25 um x 100 um). These dimensions are foreseen for the new ATLAS read-out chip in 65 nm CMOS technology and the fine segmentation will represen...

  3. The high dynamic range pixel array detector (HDR-PAD): Concept and design

    Energy Technology Data Exchange (ETDEWEB)

    Shanks, Katherine S.; Philipp, Hugh T.; Weiss, Joel T.; Becker, Julian; Tate, Mark W. [Laboratory of Atomic and Solid State Physics, Cornell University, Ithaca, NY 14853 (United States); Gruner, Sol M., E-mail: smg26@cornell.edu [Laboratory of Atomic and Solid State Physics, Cornell University, Ithaca, NY 14853 (United States); Cornell High Energy Synchrotron Source (CHESS), Cornell University, Ithaca, NY 14853 (United States)

    2016-07-27

    Experiments at storage ring light sources as well as at next-generation light sources increasingly require detectors capable of high dynamic range operation, combining low-noise detection of single photons with large pixel well depth. XFEL sources in particular provide pulse intensities sufficiently high that a purely photon-counting approach is impractical. The High Dynamic Range Pixel Array Detector (HDR-PAD) project aims to provide a dynamic range extending from single-photon sensitivity to 10{sup 6} photons/pixel in a single XFEL pulse while maintaining the ability to tolerate a sustained flux of 10{sup 11} ph/s/pixel at a storage ring source. Achieving these goals involves the development of fast pixel front-end electronics as well as, in the XFEL case, leveraging the delayed charge collection due to plasma effects in the sensor. A first prototype of essential electronic components of the HDR-PAD readout ASIC, exploring different options for the pixel front-end, has been fabricated. Here, the HDR-PAD concept and preliminary design will be described.

  4. The Pixel Detector of the ATLAS experiment for the Run2 at the Large Hadron Collider

    CERN Document Server

    INSPIRE-00237659

    2015-01-01

    The Pixel Detector of the ATLAS experiment has shown excellent performance during the whole Run-1 of LHC. Taking advantage of the long showdown, the detector was extracted from the experiment and brought to surface, to equip it with new service quarter panels, to repair modules and to ease installation of the Insertable B-Layer (IBL). IBL is a fourth layer of pixel detectors, and has been installed in May 2014 between the existing Pixel Detector and a new smaller radius beam-pipe at a radius of 3.3 cm. To cope with the high radiation and pixel occupancy due to the proximity to the interaction point, a new read-out chip and two different silicon sensor technologies (planar and 3D) have been developed. Furthermore, the physics performance will be improved through the reduction of pixel size while, targeting for a low material budget, a new mechanical support using lightweight staves and a CO2 based cooling system have been adopted. An overview of the refurbishing of the Pixel Detect or and of the IBL project as...

  5. The Pixel Detector of the ATLAS Experiment for LHC Run-2

    CERN Document Server

    Pernegger, H; The ATLAS collaboration

    2014-01-01

    The Pixel Detector of the ATLAS experiment has shown excellent performance during the whole Run-1 of LHC. Taking advantage of the long showdown, the detector was extracted from the experiment and brought to surface, to equip it with new service quarter panels, to repair modules and to ease installation of the Insertable B-Layer (IBL). IBL is a fourth layer of pixel detectors, and has been installed in May 2014 between the existing Pixel Detector and a new smaller radius beam-pipe at a radius of 3.3 cm. To cope with the high radiation and pixel occupancy due to the proximity to the interaction point, a new read-out chip and two different silicon sensor technologies (planar and 3D) have been developed. Furthermore, the physics performance will be improved through the reduction of pixel size while, targeting for a low material budget, a new mechanical support using lightweight staves and a CO2 based cooling system have been adopted. An overview of the refurbishing of the Pixel Detector and of the IBL project as ...

  6. Commissioning of the upgraded ATLAS Pixel Detector for Run2 at LHC

    CERN Document Server

    ATLAS Pixel Collaboration; The ATLAS collaboration

    2015-01-01

    The Pixel Detector of the ATLAS experiment has shown excellent performance during the whole Run-1 of LHC. Taking advantage of the long showdown, the detector was extracted from the experiment and brought to surface, to equip it with new service quarter panels, to repair modules and to ease installation of the Insertable B-Layer (IBL). IBL is a fourth layer of pixel detectors, and has been installed in May 2014 between the existing Pixel Detector and a new smaller radius beam-pipe at a radius of 3.3 cm. To cope with the high radiation and pixel occupancy due to the proximity to the interaction point, a new read-out chip and two different silicon sensor technologies (planar and 3D) have been developed. Furthermore, the physics performance will be improved through the reduction of pixel size while, targeting for a low material budget, a new mechanical support using lightweight staves and a CO2 based cooling system have been adopted. An overview of the refurbishing of the Pixel Detector and of the IBL project as ...

  7. The ATLAS Pixel Detector for Run II at the Large Hadron Collider

    CERN Document Server

    Marx, Marilyn; The ATLAS collaboration

    2014-01-01

    The Pixel Detector of the ATLAS experiment has shown excellent performance during the whole Run-1 of LHC. Taking advantage of the long showdown, the detector was extracted from the experiment and brought to surface, to equip it with new service quarter panels, to repair modules and to ease installation of the Insertable B-Layer (IBL). IBL is a fourth layer of pixel detectors, and has been installed in May 2014 between the existing Pixel Detector and a new smaller radius beam-pipe at a radius of 3.3 cm. To cope with the high radiation and pixel occupancy due to the proximity to the interaction point, a new read-out chip and two different silicon sensor technologies (planar and 3D) have been developed. Furthermore, the physics performance will be improved through the reduction of pixel size while, targeting for a low material budget, a new mechanical support using lightweight staves and a CO2 based cooling system have been adopted. An overview of the refurbishing of the Pixel Detector and of the IBL project as ...

  8. X-ray Characterization of a Multichannel Smart-Pixel Array Detector

    Energy Technology Data Exchange (ETDEWEB)

    Ross, Steve; Haji-Sheikh, Michael; Huntington, Andrew; Kline, David; Lee, Adam; Li, Yuelin; Rhee, Jehyuk; Tarpley, Mary; Walko, Donald A.; Westberg, Gregg; Williams, George; Zou, Haifeng; Landahl, Eric

    2016-01-01

    The Voxtel VX-798 is a prototype X-ray pixel array detector (PAD) featuring a silicon sensor photodiode array of 48 x 48 pixels, each 130 mu m x 130 mu m x 520 mu m thick, coupled to a CMOS readout application specific integrated circuit (ASIC). The first synchrotron X-ray characterization of this detector is presented, and its ability to selectively count individual X-rays within two independent arrival time windows, a programmable energy range, and localized to a single pixel is demonstrated. During our first trial run at Argonne National Laboratory's Advance Photon Source, the detector achieved a 60 ns gating time and 700 eV full width at half-maximum energy resolution in agreement with design parameters. Each pixel of the PAD holds two independent digital counters, and the discriminator for X-ray energy features both an upper and lower threshold to window the energy of interest discarding unwanted background. This smart-pixel technology allows energy and time resolution to be set and optimized in software. It is found that the detector linearity follows an isolated dead-time model, implying that megahertz count rates should be possible in each pixel. Measurement of the line and point spread functions showed negligible spatial blurring. When combined with the timing structure of the synchrotron storage ring, it is demonstrated that the area detector can perform both picosecond time-resolved X-ray diffraction and fluorescence spectroscopy measurements.

  9. WFC3 Pixel Area Maps

    Science.gov (United States)

    Kalirai, J. S.; Cox, C.; Dressel, L.; Fruchter, A.; Hack, W.; Kozhurina-Platais, V.; Mack, J.

    2010-04-01

    We present the pixel area maps (PAMs) for the WFC3/UVIS and WFC3/IR detectors, and discuss the normalization of these images. HST processed flt images suffer from geometric distortion and therefore have pixel areas that vary on the sky. The counts (electrons) measured for a source on these images depends on the position of the source on the detector, an effect that is implicitly corrected when these images are multidrizzled into drz files. The flt images can be multiplied by the PAMs to yield correct and uniform counts for a given source irrespective of its location on the image. To ensure consistency between the count rate measured for sources in drz images and near the center of flt images, we set the normalization of the PAMs to unity at a reference pixel near the center of the UVIS mosaic and IR detector, and set the SCALE in the IDCTAB equal to the square root of the area of this reference pixel. The implications of this choice for photometric measurements are discussed.

  10. VNR CMS Pixel detector replacement

    CERN Document Server

    2017-01-01

    Joel Butler, spokesperson of the CMS collaboration explains how a team from many different partner institutes installed a new detector in CMS. This detector is the silicon pixel detector and they’ve been working on it for about five years, to replace one of our existing detectors. This detectors measures particles closer to the beam than any of the other components of this huge detector behind me. It gives us the most precise picture of tracks as they come out of the collisions and expand and travel through the detector. This particular device has twice as many pixels, 120 million, as opposed to about 68 million in the old detector and it can take data faster and pump it out to the analysis more quickly. 00’53’’ Images of the descent, insertion and installation of first piece of the Pixel detector on Tue Feb 28. Images of the descent, insertion and installation of second piece of the Pixel and the two cylinders being joined.

  11. Optical readout uncooled infrared imaging detector using knife-edge filter operation

    Institute of Scientific and Technical Information of China (English)

    ZHANG Q; MIAO Z; GUO Z; DONG F; XIONG Z; WU X; CHEN D; LI C; JIAO B

    2007-01-01

    An optical readout uncooled infrared (IR) imaging detector of bimaterial cantilever array using knife-edge filter operation(KEFO) is demonstrated. The angle change of each cantilever in a focal plane array (FPA) can be simultaneously detected with a resolution of 10-5 degree. A deformation magnifying substrate-free micro-cantilever unit with multi-fold interval metallized legs is specially designed and modeled. A FPA with 160× 160 pixels is fabricated and thermal images with noise equivalent temperature difference (NETD) of 400 mK are obtained by this imaging detector.

  12. Area-Efficient Low Power CMOS Image Sensor Readout Circuit with Fixed Pattern Noise Cancellation

    Institute of Scientific and Technical Information of China (English)

    赵士彬; 姚素英; 聂凯明; 徐江涛

    2010-01-01

    A low cost of die area and power consumption CMOS image sensor readout circuit with fixed pattern noise(FPN) cancellation is proposed.By using only one coupling capacitor and switch in the double FPN cancelling correlative double sampling(CDS),pixel FPN is cancelled and column FPN is stored and eliminated by the sampleand-hold operation of digitally programmable gain amplifier(DPGA).The bandwidth balance technology based on operational amplifier(op-amp) sharing is also introduced to decrease the power dissi...

  13. LHCb: Fast Readout Control for the upgraded readout architecture of the LHCb experiment at CERN

    CERN Multimedia

    Alessio, F

    2013-01-01

    The LHCb experiment at CERN has proposed an upgrade towards a full 40 MHz readout system in order to run between five and ten times its initial design luminosity with an upgraded LHCb detector. As a consequence, the various LHCb sub-systems in the readout architecture will be upgraded to cope with higher sub-detector occupancies, higher rate, and higher readout load. The new architecture, new functionalities, and the first hardware implementation of a new LHCb Readout Control system (commonly referred to as S-TFC) for the upgraded LHCb experiment is here presented. Our attention is focused in describing solutions for the distribution of clock and timing information to control the entire upgraded readout architecture by profiting of a bidirectional optical network and powerful FPGAs, including a real-time mechanism to synchronize the entire system. Solutions and implementations are presented, together with first results on the simulation and the validation of the system.

  14. Merlin: a fast versatile readout system for Medipix3

    Science.gov (United States)

    Plackett, R.; Horswell, I.; Gimenez, E. N.; Marchal, J.; Omar, D.; Tartoni, N.

    2013-01-01

    This contribution reports on the development of a new high rate readout system for the Medipix3 hybrid pixel ASIC developed by the Detector Group at Diamond Light Source. It details the current functionality of the system and initial results from tests on Diamond's B16 beamline. The Merlin system is based on a National Instruments PXI/FlexRIO system running a Xilinx Virtex5 FPGA. It is capable of recording Medipix3 256 by 256 by 12 bit data frames at over 1 kHz in bursts of 1200 frames and running at over 100 Hz continuously to disk or over a TCP/IP link. It is compatible with the standard Medipix3 single chipboards developed at CERN and is capable of driving them over cable lengths of up to 10 m depending on the data rate required. In addition to a standalone graphical interface, a system of remote TCP/IP control and data transfer has been developed to allow easy integration with third party control systems and scripting languages. Two Merlin systems are being deployed on the B16 and I16 beamlines at Diamond and the system has been integrated with the EPICS/GDA control systems used. Results from trigger synchronisation, fast burst and high rate tests made on B16 in March are reported and demonstrate an encouraging reliability and timing accuracy. In addition to normal high resolution imaging applications of Medipix3, the results indicate the system could profitably be used in `pump and probe' style experiments, where a very accurate, high frame rate is especially beneficial. In addition to these two systems, Merlin is being used by the Detector Group to test the Excalibur 16 chip hybrid modules, and by the LHCb VELO Pixel Upgrade group in their forthcoming testbeams. Additionally the contribution looks forward to further developments and improvements in the system, including full rate quad chip readout capability, multi-FPGA support, long distance optical communication and further functionality enhancements built on the capabilities of the Medipix3 chips.

  15. HEPS-BPIX, a single photon counting pixel detector with a high frame rate for the HEPS project

    Science.gov (United States)

    Wei, Wei; Zhang, Jie; Ning, Zhe; Lu, Yunpeng; Fan, Lei; Li, Huaishen; Jiang, Xiaoshan; Lan, Allan K.; Ouyang, Qun; Wang, Zheng; Zhu, Kejun; Chen, Yuanbo; Liu, Peng

    2016-11-01

    China's next generation light source, named the High Energy Photon Source (HEPS), is currently under construction. HEPS-BPIX (HEPS-Beijing PIXel) is a dedicated pixel readout chip that operates in single photon counting mode for X-ray applications in HEPS. Designed using CMOS 0.13 μm technology, the chip contains a matrix of 104×72 pixels. Each pixel measures 150 μm×150 μm and has a counting depth of 20 bits. A bump-bonded prototyping detector module with a 300-μm thick silicon sensor was tested in the beamline of Beijing Synchrotron Radiation Facility. A fast stream of X-ray images was demonstrated, and a frame rate of 1.2 kHz was proven, with a negligible dead time. The test results showed an equivalent noise charge of 115 e- rms after bump bonding and a threshold dispersion of 55 e- rms after calibration.

  16. 10×10-pixel 606kS/s multi-point fluorescence correlation spectroscopy CMOS image sensor

    Science.gov (United States)

    Kagawa, Keiichiro; Takasawa, Taishi; Bo, Zhang; Seo, Min-Woong; Imai, Kaita; Yamamoto, Jotaro; Kinjo, Masataka; Terakawa, Susumu; Yasutomi, Keita; Kawahito, Shoji

    2014-03-01

    To observe molecular transport in a living cell, a high-speed CMOS image sensor for multi-point fluorescence correlation spectroscopy is developed. To achieve low-noise and high-speed simultaneously, a prototype CMOS image sensor is designed based on a complete pixel-parallel architecture and multi-channel pipelined pixel readout. The prototype chip with 10×10 effective pixels is fabricated in 0.18-μm CMOS image sensor technology. The pixel pitch and the photosensitive area are 56μm and 10μm in diameter without a microlens, respectively. In the experiment, the total sampling rate of 606kS/s is achieved. The measured average random noise is 24.9LSB, which is equivalent to about 2.5 electrons in average.

  17. Construction and commissioning of the Phase 1 upgrade of the CMS pixel detector

    CERN Document Server

    Bartek, Rachel

    2017-01-01

    The Phase 1 upgrade of the CMS pixel detector, installed by the CMS collaboration during the recent extended end-of-year technical stop, is built out of four barrel layers (BPIX) and three forward disks in each endcap (FPIX). It comprises a total of 124M pixel channels, in 1,856 modules and it is designed to withstand instantaneous luminosities of up to $2 \\rm{x} 10^{34} \\rm{cm}^{-2} \\rm{s}^{-1}$ with increased detector acceptance and additional redundancy for the tracking, while at the same time reducing the material budget. These goals are achieved using a new readout chip and modified powering and readout schemes, one additional tracking layer both in the barrel and in the disks, and new detector supports including a $\\rm{CO}_2$ based evaporative cooling system. Different parts of the detector have been assembled over the last year and later brought to CERN for installation inside the CMS tracker. At various stages during the assembly tests have been performed to ensure that the readout and power electro...

  18. Development and Performance of Kyoto's X-ray Astronomical SOI pixel (SOIPIX) sensor

    CERN Document Server

    Tsuru, Takeshi G; Takeda, Ayaki; Tanaka, Takaaki; Nakashima, Shinya; Arai, Yasuo; Mori, Koji; Takenaka, Ryota; Nishioka, Yusuke; Kohmura, Takayoshi; Hatsui, Takaki; Kameshima, Takashi; Ozaki, Kyosuke; Kohmura, Yoshiki; Wagai, Tatsuya; Takei, Dai; Kawahito, Shoji; Kagawa, Keiichiro; Yasutomi, Keita; Kamehama, Hiroki; Shrestha, Sumeet

    2014-01-01

    We have been developing monolithic active pixel sensors, known as Kyoto's X-ray SOIPIXs, based on the CMOS SOI (silicon-on-insulator) technology for next-generation X-ray astronomy satellites. The event trigger output function implemented in each pixel offers microsecond time resolution and enables reduction of the non-X-ray background that dominates the high X-ray energy band above 5--10 keV. A fully depleted SOI with a thick depletion layer and back illumination offers wide band coverage of 0.3--40 keV. Here, we report recent progress in the X-ray SOIPIX development. In this study, we achieved an energy resolution of 300~eV (FWHM) at 6~keV and a read-out noise of 33~e- (rms) in the frame readout mode, which allows us to clearly resolve Mn-K$\\alpha$ and K$\\beta$. Moreover, we produced a fully depleted layer with a thickness of $500~{\\rm \\mu m}$. The event-driven readout mode has already been successfully demonstrated.

  19. Development and performance of Kyoto's x-ray astronomical SOI pixel (SOIPIX) sensor

    Science.gov (United States)

    Tsuru, Takeshi G.; Matsumura, Hideaki; Takeda, Ayaki; Tanaka, Takaaki; Nakashima, Shinya; Arai, Yasuo; Mori, Koji; Takenaka, Ryota; Nishioka, Yusuke; Kohmura, Takayoshi; Hatsui, Takaki; Kameshima, Takashi; Ozaki, Kyosuke; Kohmura, Yoshiki; Wagai, Tatsuya; Takei, Dai; Kawahito, Shoji; Kagawa, Keiichiro; Yasutomi, Keita; Kamehama, Hiroki

    2014-08-01

    We have been developing monolithic active pixel sensors, known as Kyoto's X-ray SOIPIXs, based on the CMOS SOI (silicon-on-insulator) technology for next-generation X-ray astronomy satellites. The event trigger output function implemented in each pixel offers microsecond time resolution and enables reduction of the non-X-ray background that dominates the high X-ray energy band above 5-10 keV. A fully depleted SOI with a thick depletion layer and back illumination offers wide band coverage of 0.3-40 keV. Here, we report recent progress in the X-ray SOIPIX development. In this study, we achieved an energy resolution of 300 eV (FWHM) at 6 keV and a read-out noise of 33 e- (rms) in the frame readout mode, which allows us to clearly resolve Mn-Kα and Kβ. Moreover, we produced a fully depleted layer with a thickness of 500 μm. The event-driven readout mode has already been successfully demonstrated.

  20. Cost effective flip chip assembly and interconnection technologies for large area pixel sensor applications

    Energy Technology Data Exchange (ETDEWEB)

    Fritzsch, T., E-mail: thomas.fritzsch@izm.fraunhofer.de [Fraunhofer IZM, Gustav-Meyer-Allee 25, Berlin 13355 (Germany); Jordan, R.; Oppermann, H. [Fraunhofer IZM, Gustav-Meyer-Allee 25, Berlin 13355 (Germany); Ehrmann, O. [Berlin Institute of Technology (TUB), Berlin 10623 (Germany); Toepper, M.; Baumgartner, T.; Lang, K.-D. [Fraunhofer IZM, Gustav-Meyer-Allee 25, Berlin 13355 (Germany)

    2011-09-11

    Much of the cost of manufacturing pixel detectors is due to bumping and flip chip assembly of the readout chips onto sensor tiles, even if it is done on wafer level. To address this issue, Fraunhofer IZM investigated two new technological approaches, namely screen printing using dry film resist and chip-to-wafer assembly. In the first approach, solder bumps with diameters of 80 and 25 {mu}m in pitches of 110 and 60 {mu}m, respectively, were produced by screen-printing solder paste using a photo-structured dry film resist. Results indicated that the technology is a viable high yield and low cost bumping process. The second approach was developed to decrease the number of manual handling steps in pixel module manufacturing, which is critical for reducing processing time and cost. Here, chip designs on 200 mm readout chip (ROC) wafers and 150 mm sensor wafers were especially adapted for chip-to-wafer assembly and to ensure that the interconnection yield and reliability could be tested. After bumping and dicing of the readout chip wafer and UBM plating on the sensor wafer, individual dice were flip chip mounted on the pre-diced sensor wafer. This paper describes the technological steps, key processing parameters and first results for both technologies.

  1. Multiplexed readout of MMC detector arrays using non-hysteretic rf-SQUIDs

    CERN Document Server

    Kempf, S; Gastaldo, L; Fleischmann, A; Enss, C

    2013-01-01

    Metallic magnetic calorimeters (MMCs) are widely used for various experiments in fields ranging from atomic and nuclear physics to x-ray spectroscopy, laboratory astrophysics or material science. Whereas in previous experiments single pixel detectors or small arrays have been used, for future applications large arrays are needed. Therefore, suitable multiplexing techniques for MMC arrays are currently under development. A promising approach for the readout of large arrays is the microwave SQUID multiplexer that operates in the frequency domain and that employs non-hysteretic rf-SQUIDs to transduce the detector signals into a frequency shift of high $Q$ resonators which can be monitored by using standard microwave measurement techniques. In this paper we discuss the design and the expected performance of a recently developed and fabricated 64 pixel detector array with integrated microwave SQUID multiplexer. First experimental data were obtained characterizing dc-SQUIDs with virtually identical washer design.

  2. Optical readout of a triple-GEM detector by means of a CMOS sensor

    Energy Technology Data Exchange (ETDEWEB)

    Marafini, M. [INFN Sezione di Roma (Italy); Museo Storico della Fisica e Centro Studi e Ricerche “E. Fermi”, Roma (Italy); Patera, V. [INFN Sezione di Roma (Italy); Museo Storico della Fisica e Centro Studi e Ricerche “E. Fermi”, Roma (Italy); Laboratori Nazionali di Frascati dell' INFN, Frascati (Italy); Pinci, D., E-mail: davide.pinci@roma1.infn.it [INFN Sezione di Roma (Italy); Sarti, A. [Laboratori Nazionali di Frascati dell' INFN, Frascati (Italy); Dipartimento di Scienze di Base e Applicate per Ingegneria, Sapienza Università di Roma (Italy); Sciubba, A. [INFN Sezione di Roma (Italy); Museo Storico della Fisica e Centro Studi e Ricerche “E. Fermi”, Roma (Italy); Dipartimento di Scienze di Base e Applicate per Ingegneria, Sapienza Università di Roma (Italy); Spiriti, E. [Laboratori Nazionali di Frascati dell' INFN, Frascati (Italy)

    2016-07-11

    In last years, the development of optical sensors has produced objects able to provide very interesting performance. Large granularity is offered along with a very high sensitivity. CMOS sensors with millions of pixels able to detect as few as two or three photons per pixel are commercially available and can be used to read-out the optical signals provided by tracking particle detectors. In this work the results obtained by optically reading-out a triple-GEM detector by a commercial CMOS sensor will be presented. A standard detector was assembled with a transparent window below the third GEM allowing the light to get out. The detector is supplied with an Ar/CF{sub 4} based gas mixture producing 650 nm wavelength photons matching the maximum quantum efficiency of the sensor.

  3. CLEOPATRA 11.05 to 31.07.1992: Synopsis of measurements and results; CLEOPATRA 11.05 bis 31.07.1992: Synopse der Messungen und Ergebnisuebersicht

    Energy Technology Data Exchange (ETDEWEB)

    Meischner, P.

    1993-12-31

    The field program CLEOPATRA (Cloud Experiment Oberpfaffenhofen and Transports) was performed in Southern Germany 50 km north of the Alpine foothills, an area of known enhanced thunderstorm activity. The general goal was to quantify elements of the hydrological cycle on a regional scale in dependence upon precipitation events and the vegetation state. Embedded goals are to describe the mechanisms that force organizations of deep convective systems, to compare theories and observations of atmospheric depositions, and to test and compare observational methods from ground, aircraft, and space. The observational setup, including 10 research aircraft, four radar systems, and different ground-based networks, was operational from 11 May until 31 July 1992 to cover an essential period of the growing season. The results of measurements are compiled in this documentation including a calender of observations performed. (orig.). 72 figs., 6 tabs. [Deutsch] Das Feldexperiment CLEOPATRA (Cloud Experiment Oberpfaffenhofen and Transports) diente der Untersuchung von Austauschprozessen zwischen Boden, Vegetation und Atmosphaere, von Wolkensystemen und Niederschlagsentstehung, von Umwandlungsprozessen und Auswaschvorgaengen fuer Luftbeimengungen, der Weiterentwicklung und Validierung entsprechender Fernerkundungsmethoden, sowie der Quantifizierung des Einflusses von Wolken und Niederschlag auf Kommunikationsverbindungen Erde-Satellit. Aufgrund der wissenschaftlichen Zielsetzungen sind die Messkonzepte, Messungen am Boden und eine Reihe von Flugzeugmissionen festgelegt worden, die je nach Wetterlage und den zur Verfuegung stehenden Messsystemen vorgeplant waren. Innerhalb des gesamten Messzeitraumes vom 11. Mai bis 31. Juli 1992 gabe es zwei Intensivmessphasen, eine vom 18. Mai bis 06. Juni und eine vom 13. Juli bis 31. Juli. Dieser Band gibt einen Ueberblick ueber die tatsaechlich zum Einsatz gekommenen Messsysteme, die durchgefuehrten Missionen und die gewonnenen Daten. (orig.)

  4. Imaging achievements with the Vernier readout

    CERN Document Server

    Lapington, J S; Worth, L B C; Tandy, J A

    2002-01-01

    We describe the Vernier anode, a high resolution and charge division image readout for microchannel plate detectors. It comprises a planar structure of insulated electrodes deposited on an insulating substrate. The charge cloud from an event is divided amongst all nine electrodes and the charge ratio uniquely determines the two-dimensional position coordinate of the charge centroid. We discuss the design of the anode pattern and describe the advantages offered by this readout. The cyclic variation of the electrode structure allows the image resolution to exceed the charge measurement resolution and enables the entire active area of the readout to be utilized. In addition, fixed pattern noise is greatly reduced. We present results demonstrating the position resolution and image linearity. A position resolution of 10 mu m FWHM is demonstrated and the overall imaging performance is shown to be limited by the microchannel plate pore spacing. We present measurements of the image distortions and describe techniques...

  5. Effect of Pixel's Spatial Characteristics on Recognition of Isolated Pixelized Chinese Character.

    Science.gov (United States)

    Yang, Kun; Liu, Shuang; Wang, Hong; Liu, Wei; Wu, Yaowei

    2015-01-01

    The influence of pixel's spatial characteristics on recognition of isolated Chinese character was investigated using simulated prosthestic vision. The accuracy of Chinese character recognition with 4 kinds of pixel number (6*6, 8*8, 10*10, and 12*12 pixel array) and 3 kinds of pixel shape (Square, Dot and Gaussian) and different pixel spacing were tested through head-mounted display (HMD). A captured image of Chinese characters in font style of Hei were pixelized with Square, Dot and Gaussian pixel. Results showed that pixel number was the most important factor which could affect the recognition of isolated pixelized Chinese Chartars and the accuracy of recognition increased with the addition of pixel number. 10*10 pixel array could provide enough information for people to recognize an isolated Chinese character. At low resolution (6*6 and 8*8 pixel array), there were little difference of recognition accuracy between different pixel shape and different pixel spacing. While as for high resolution (10*10 and 12*12 pixel array), the fluctuation of pixel shape and pixel spacing could not affect the performance of recognition of isolated pixelized Chinese Character.

  6. Tests of the gated mode for Belle II pixel detector

    Energy Technology Data Exchange (ETDEWEB)

    Prinker, Eduard [Max-Planck-Institute for Physics, Munich (Germany); Collaboration: Belle II-Collaboration

    2015-07-01

    DEPFET pixel detectors offer intrinsic amplification and very high signal to noise ratio. They form an integral building block for the vertex detector system of the Belle II experiment, which will start data taking in the year 2017 at the SuperKEKB Collider in Japan. A special Test board (Hybrid4) is used, which contains a small version of the DEPFET sensor with a read-out (DCD) and a steering chip (Switcher) attached, both controlled by a field-programmable gate array (FPGA) as the central interface to the computer. In order to keep the luminosity of the collider constant over time, the particle bunch currents have to be topped off by injecting additional bunches at a rate of 50 Hz. The particles in the daughter bunches produce a high rate of background (noisy bunches) for a short period of time, saturating the occupancy of the sensor. Operating the DEPFET sensor in a Gated Mode allows preserving the signals from collisions of normal bunches while protecting the pixels from background signals of the passing noisy bunches. An overview of the Gated Mode and first results is presented.

  7. The Phase II ATLAS Pixel Upgrade: The Inner Tracker (ITk)

    CERN Document Server

    Flick, Tobias; The ATLAS collaboration

    2016-01-01

    The entire tracking system of the ATLAS experiment will be replaced during the LHC Phase II shutdown (foreseen to take place around 2025) by an all-silicon detector called the ITk (Inner Tracker). The pixel detector will comprise the five innermost layers, and will be instrumented with new sensor and readout electronics technologies to improve the tracking performance and cope with the HL-LHC environment, which will be severe in terms of occupancy and radiation. The total surface area of silicon in the new pixel system could measure up to 14 m^2, depending on the final layout choice, which is expected to take place in early 2017. Four layout options are being investigated at the moment, two with forward coverage to eta < 3.2 and two to eta < 4. For each coverage option, a layout with long barrel staves and a layout with novel inclined support structures in the barrel-endcap overlap region are considered. All potential layouts include modules mounted on ring-shaped supports in the endcap regions. Support...

  8. The Phase-II ATLAS ITk Pixel Upgrade

    CERN Document Server

    AUTHOR|(INSPIRE)INSPIRE-00349918; The ATLAS collaboration

    2017-01-01

    The entire tracking system of the ATLAS experiment will be replaced during the LHC Phase~2 shutdown (foreseen to take place around 2025) by an all-silicon detector called the ``ITk'' (Inner Tracker). The innermost portion of ITk will consist of a pixel detector with five layers in the barrel region and ring-shaped supports in the end-cap regions. It will be instrumented with new sensor and readout electronics technologies to improve the tracking performance and cope with the HL-LHC environment, which will be severe in terms of occupancy and radiation levels. The new pixel system could include up to 14 $\\mathrm{m^2}$ of silicon, depending on the final layout, which is expected to be decided in 2017. Several layout options are being investigated at the moment, including some with novel inclined support structures in the barrel end-cap overlap region and others with very long innermost barrel layers. Forward coverage could be as high as |eta| $<4$. Supporting structures will be based on low mass, highly stabl...

  9. A DEPFET pixel system for the ILC vertex detector

    CERN Document Server

    Trimpl, M; Kohrs, R; Krüger, H; Lodomez, P; Reuen, L; Sandow, C; Toerne, E; Velthuis, J J; Wermes, N; Andricek, L; Moser, H G; Richter, R H; Lutz, Gerhard; Giesen, F; Fischer, P; Peric, I

    2006-01-01

    We have developed a prototype system for the ILC vertex detector based on DEPFET pixels. The system operates a 128x64 pixel matrix and uses two dedicated microchips, the SWITCHER II chip for matrix steering and the CURO II chip for readout. The system development has been driven by the final ILC requirements which above all demand a detector thinned to 50 micron and a row wise read out with line rates of 20MHz and more. The targeted noise performance for the DEPFET technology is in the range of ENC=100e-. The functionality of the system has been demonstrated using different radioactive sources in an energy range from 6keV to 60keV. In recent test beam experiments using 6GeV electrons, a signal-to-noise ratio of S/N~120 has been achieved with present sensors being 450 micron thick. For improved DEPFET systems using 50 micron thin sensors in future, a signal-to-noise of 40 is expected.

  10. A CMOS Active Pixel Sensor for Charged Particle Detection

    Energy Technology Data Exchange (ETDEWEB)

    Matis, Howard S.; Bieser, Fred; Kleinfelder, Stuart; Rai, Gulshan; Retiere, Fabrice; Ritter, Hans George; Singh, Kunal; Wurzel, Samuel E.; Wieman, Howard; Yamamoto, Eugene

    2002-12-02

    Active Pixel Sensor (APS) technology has shown promise for next-generation vertex detectors. This paper discusses the design and testing of two generations of APS chips. Both are arrays of 128 by 128 pixels, each 20 by 20 {micro}m. Each array is divided into sub-arrays in which different sensor structures (4 in the first version and 16 in the second) and/or readout circuits are employed. Measurements of several of these structures under Fe{sup 55} exposure are reported. The sensors have also been irradiated by 55 MeV protons to test for radiation damage. The radiation increased the noise and reduced the signal. The noise can be explained by shot noise from the increased leakage current and the reduction in signal is due to charge being trapped in the epi layer. Nevertheless, the radiation effect is small for the expected exposures at RHIC and RHIC II. Finally, we describe our concept for mechanically supporting a thin silicon wafer in an actual detector.

  11. The CMS Silicon Pixel detector for HL-LHC

    CERN Document Server

    Steinbrueck, Georg

    2016-01-01

    The LHC is planning an upgrade program which will bring the luminosity to about 5~$\\times10^{34}$~cm$^{-2}$s$^{-1}$ in 2026, with the goal of an integrated luminosity of 3000 fb$^{-1}$ by the end of 2037. This High Luminosity scenario, HL-LHC, will present new challenges of higher data rates and increased radiation. To maintain its physics potential in this harsh environment, the CMS detector will undergo a major upgrade program known as the Phase II upgrade. The new Phase II pixel detector will require a high bandwidth readout system and highly radiation tolerant sensors and on-detector ASICs. Several technologies for the sensors are being studied. Serial powering schemes are under consideration to accommodate significant constraints on the system. These prospective designs, as well as new layout geometries that include very forward pixel discs with acceptance extended from $\\vert\\eta\\vert<2.4$ to $\\vert\\eta\\vert<4$, are presented together with performance estimates.

  12. Pixel Hybridization Technologies for the HL-LHC

    Science.gov (United States)

    Alimonti, G.; Biasotti, M.; Ceriale, V.; Darbo, G.; Gariano, G.; Gaudiello, A.; Gemme, C.; Rossi, L.; Rovani, A.; Ruscino, E.

    2016-12-01

    During the 2024-2025 shut-down, the Large Hadron Collider (LHC) will be upgraded to reach an instantaneous luminosity up to 7×1034 cm-2s-1. This upgrade of the collider is called High-Luminosity LHC (HL-LHC). ATLAS and CMS detectors will be upgraded to meet the new challenges of HL-LHC: an average of 200 pile-up events in every bunch crossing and an integrated luminosity of 3000 fb-1 over ten years. In particular, the current trackers will be completely replaced. In HL-LHC the trackers should operate under high fluences (up to 1.4 × 1016 neq cm-2), with a correlated high radiation damage. The pixel detectors, the innermost part of the trackers, needed a completely new design in the readout electronics, sensors and interconnections. A new 65 nm front-end (FE) electronics is being developed by the RD53 collaboration compatible with smaller pixel sizes than the actual ones to cope with the high track densities. Consequently the bump density will increase up to 4 ·104 bumps/cm2. Preliminary results of two hybridization technologies study are presented in this paper. In particular, the on-going bump-bonding qualification program at Leonardo-Finmeccanica is discussed, together with alternative hybridization techniques, as the capacitive coupling for HV-CMOS detectors.

  13. The upgraded Pixel Detector of the ATLAS Experiment for Run-II at the Large Hadron Collider

    CERN Document Server

    AUTHOR|(INSPIRE)INSPIRE-00407702

    2016-01-01

    The Pixel Detector of the ATLAS experiment has shown excellent performance during the whole Run-1 of the LHC. Taking advantage of the detector development period 2013 – 2014, the detector was extracted from the experiment and brought to surface to equip it with new service panels and to repair modules furthermore this helped with the installation of the Insertable B-Layer (IBL), fourth layer of pixel, installed in between the existing Pixel Detector and a new beam-pipe at a radius of 3.3 cm. To cope with the high radiation and increased pixel occupancy due to the proximity to the interaction point, two different silicon sensor technologies (planar and 3D) have been used. A new readout chip has been designed with CMOS 130nm technology with larger area, smaller pixel size and faster readout capability. Dedicated design features in combination with a new composite material were considered and used in order to reduce the material budget of the support structure while keeping the optimal thermo-mechanical perfor...

  14. A noiseless kilohertz frame rate imaging detector based on microchannel plates read out with the Medipix2 CMOS pixel chip

    CERN Document Server

    Mikulec, Bettina; Ferrère, Didier; La Marra, Daniel; McPhate, J B; Tremsin, A S; Siegmund, O H W; Vallerga, J V; Clement, J; Ponchut, C; Rigal, J M; CERN. Geneva

    2006-01-01

    A new hybrid optical imaging detector is described that is being developed for the next generation adaptive optics (AO) wavefront sensors (WFS) for ground-based telescopes. The detector consists of a photocathode and proximity focused microchannel plates (MCPs) read out by the Medipix2 CMOS pixel ASIC. Each pixel of the Medipix2 device measures 55x55 um2 and comprises pre-amplifier, a window discriminator and a 14-bit counter. The 256x256 Medipix2 array can be read out noiselessly in 287 us. The readout can be electronically shuttered down to a temporal window of a few us. The Medipix2 is buttable on 3 sides to produce 512x(n*256) pixel devices. Measurements with ultraviolet light yield a spatial resolution of the detector at the Nyquist limit. Sub-pixel resolution can be achieved using centroiding algorithms. For the AO application, very high continuous frame rates of the order of 1 kHz are required for a matrix of 512x512 pixels. The design concepts of a parallel readout board are presented that will allow ...

  15. Pixel front-end with synchronous discriminator and fast charge measurement for the upgrades of HL-LHC experiments

    Science.gov (United States)

    Monteil, E.; Demaria, N.; Pacher, L.; Rivetti, A.; Da Rocha Rolo, M.; Rotondo, F.; Leng, C.

    2016-03-01

    The upgrade of the silicon pixel sensors for the HL-LHC experiments requires the development of new readout integrated circuits due to unprecedented radiation levels, very high hit rates and increased pixel granularity. The design of a very compact, low power, low threshold analog very front-end in CMOS 65 nm technology is described. It contains a synchronous comparator which uses an offset compensation technique based on storing the offset in output. The latch can be turned into a local oscillator using an asynchronous logic feedback loop to implement a fast time-over-threshold counting. This design has been submitted and the measurement results are presented.

  16. Chip development in 65 nm CMOS technology for the high luminosity upgrade of the ATLAS pixel detector

    Energy Technology Data Exchange (ETDEWEB)

    Germic, Leonard; Hemperek, Tomasz; Kishishita, Tetsuichi; Krueger, Hans; Rymaszewski, Piotr; Wermes, Norbert [University of Bonn, Bonn (Germany)

    2016-07-01

    The LHC High Luminosity upgrade will result in a significant change of environment in which particle detectors are going to operate, especially for devices very close to the interaction point like pixel detector electronics. Challenges arising from the increased hit rate will have to be solved by designing faster and more complex readout electronics that will also have to withstand unprecedented radiation doses. Developing such integrated circuit requires a significant R and D effort and resources, therefore a joint development project between several institutes (including ours) was started. This collaboration, named RD53, aims to develop a pixel readout chip suitable for ATLAS' and CMS' upgrades using a 65nm CMOS technology. During this presentation motivations and benefits of using this very deep-submicron technology are discussed. Most of the talk is allocated to presenting some of the circuits designed by our group (focusing on developments connected to RD53 collaboration), along with their performance measurement results.

  17. SAR Image Complex Pixel Representations

    Energy Technology Data Exchange (ETDEWEB)

    Doerry, Armin W. [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States)

    2015-03-01

    Complex pixel values for Synthetic Aperture Radar (SAR) images of uniform distributed clutter can be represented as either real/imaginary (also known as I/Q) values, or as Magnitude/Phase values. Generally, these component values are integers with limited number of bits. For clutter energy well below full-scale, Magnitude/Phase offers lower quantization noise than I/Q representation. Further improvement can be had with companding of the Magnitude value.

  18. Data readout system utilizing photonic integrated circuit

    Energy Technology Data Exchange (ETDEWEB)

    Stopiński, S., E-mail: S.Stopinski@tue.nl [COBRA Research Institute, Eindhoven University of Technology (Netherlands); Institute of Microelectronics and Optoelectronics, Warsaw University of Technology (Poland); Malinowski, M.; Piramidowicz, R. [Institute of Microelectronics and Optoelectronics, Warsaw University of Technology (Poland); Smit, M.K.; Leijtens, X.J.M. [COBRA Research Institute, Eindhoven University of Technology (Netherlands)

    2013-10-11

    We describe a novel optical solution for data readout systems. The core of the system is an Indium-Phosphide photonic integrated circuit performing as a front-end readout unit. It functions as an optical serializer in which the serialization of the input signal is provided by means of on-chip optical delay lines. The circuit employs electro-optic phase shifters to build amplitude modulators, power splitters for signal distribution, semiconductor optical amplifiers for signal amplification as well as on-chip reflectors. We present the concept of the system, the design and first characterization results of the devices that were fabricated in a multi-project wafer run.

  19. Description of the TRT Readout Scheme

    CERN Document Server

    Luehring, F C

    2002-01-01

    This paper documents the TRT detector readout scheme. A description is provided of the data buffers used in the TRT readout chain: the single TRT channel output data format, the DTMROC output data buffer format, the TRT-ROD input FIFO data format, the TRT-ROD output buffer format, and the ROB output buffer data format. Also documented are the current designs for the TRT-ROD zero suppression and data compression schemes. A proposal is presented for ordering the data generated by individual TRT channels suitably for Level-2 triggering, Level-3 triggering and offline data processing.

  20. CMOS digital pixel sensors: technology and applications

    Science.gov (United States)

    Skorka, Orit; Joseph, Dileepan

    2014-04-01

    CMOS active pixel sensor technology, which is widely used these days for digital imaging, is based on analog pixels. Transition to digital pixel sensors can boost signal-to-noise ratios and enhance image quality, but can increase pixel area to dimensions that are impractical for the high-volume market of consumer electronic devices. There are two main approaches to digital pixel design. The first uses digitization methods that largely rely on photodetector properties and so are unique to imaging. The second is based on adaptation of a classical analog-to-digital converter (ADC) for in-pixel data conversion. Imaging systems for medical, industrial, and security applications are emerging lower-volume markets that can benefit from these in-pixel ADCs. With these applications, larger pixels are typically acceptable, and imaging may be done in invisible spectral bands.