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Sample records for pixel readout messungen

  1. Pixel detector readout chip

    CERN Multimedia

    1991-01-01

    Close-up of a pixel detector readout chip. The photograph shows an aera of 1 mm x 2 mm containing 12 separate readout channels. The entire chip contains 1000 readout channels (around 80 000 transistors) covering a sensitive area of 8 mm x 5 mm. The chip has been mounted on a silicon detector to detect high energy particles.

  2. Readout Architecture for Hybrid Pixel Readout Chips

    CERN Document Server

    AUTHOR|(SzGeCERN)694170; Westerlund, Tomi; Wyllie, Ken

    The original contribution of this thesis to knowledge are novel digital readout architectures for hybrid pixel readout chips. The thesis presents asynchronous bus-based architecture, a data-node based column architecture and a network-based pixel matrix architecture for data transportation. It is shown that the data-node architecture achieves readout efficiency 99 % with half the output rate as a bus-based system. The network-based solution avoids ``broken'' columns due to some manufacturing errors, and it distributes internal data traffic more evenly across the pixel matrix than column-based architectures. An improvement of $>$ 10 % to the efficiency is achieved with uniform and non-uniform hit occupancies. Architectural design has been done using transaction level modeling ($TLM$) and sequential high-level design techniques for reducing the design and simulation time. It has been possible to simulate tens of column and full chip architectures using the high-level techniques. A decrease of $>$ 10 in run-time...

  3. Digital column readout architectures for hybrid pixel detector readout chips

    International Nuclear Information System (INIS)

    Poikela, T; Plosila, J; Westerlund, T; Buytaert, J; Campbell, M; Gaspari, M De; Llopart, X; Wyllie, K; Gromov, V; Kluit, R; Beuzekom, M van; Zappon, F; Zivkovic, V; Brezina, C; Desch, K; Fu, Y; Kruth, A

    2014-01-01

    In this paper, two digital column architectures suitable for sparse readout of data from a pixel matrix in trigger-less applications are presented. Each architecture reads out a pixel matrix of 256 x 256 pixels with a pixel pitch of 55 μm. The first architecture has been implemented in the Timepix3 chip, and this is presented together with initial measurements. Simulation results and measured data are compared. The second architecture has been designed for Velopix, a readout chip planned for the LHCb VELO upgrade. Unlike Timepix3, this has to be tolerant to radiation-induced single-event effects. Results from post-layout simulations are shown with the circuit architectures

  4. Design and Performance of the CMS Pixel Detector Readout Chip

    CERN Document Server

    Kästli, H C; Erdmann, W; Hörmann, C; Horisberger, R P; Kotlinski, D; Meier, B; Hoermann, Ch.

    2006-01-01

    The readout chip for the CMS pixel detector has to deal with an enormous data rate. On-chip zero suppression is inevitable and hit data must be buffered locally during the latency of the first level trigger. Dead-time must be kept at a minimum. It is dominated by contributions coming from the readout. To keep it low an analog readout scheme has been adopted where pixel addresses are analog coded. We present the architecture of the final CMS pixel detector readout chip with special emphasis on the analog readout chain. Measurements of its performance are discussed.

  5. The FE-I4 pixel readout integrated circuit

    Energy Technology Data Exchange (ETDEWEB)

    Garcia-Sciveres, M., E-mail: mgarcia-sciveres@bl.gov [Lawrence Berkeley National Laboratory, Berkeley, CA (United States); Arutinov, D.; Barbero, M. [University of Bonn, Bonn (Germany); Beccherle, R. [Istituto Nazionale di Fisica Nucleare Sezione di Genova, Genova (Italy); Dube, S.; Elledge, D. [Lawrence Berkeley National Laboratory, Berkeley, CA (United States); Fleury, J. [Laboratoire de l' Accelerateur Lineaire, Orsay (France); Fougeron, D.; Gensolen, F. [Centre de Physique des Particules de Marseille, Marseille (France); Gnani, D. [Lawrence Berkeley National Laboratory, Berkeley, CA (United States); Gromov, V. [Nationaal Instituut voor Subatomaire Fysica, Amsterdam (Netherlands); Hemperek, T.; Karagounis, M. [University of Bonn, Bonn (Germany); Kluit, R. [Nationaal Instituut voor Subatomaire Fysica, Amsterdam (Netherlands); Kruth, A. [University of Bonn, Bonn (Germany); Mekkaoui, A. [Lawrence Berkeley National Laboratory, Berkeley, CA (United States); Menouni, M. [Centre de Physique des Particules de Marseille, Marseille (France); Schipper, J.-D. [Nationaal Instituut voor Subatomaire Fysica, Amsterdam (Netherlands)

    2011-04-21

    A new pixel readout integrated circuit denominated FE-I4 is being designed to meet the requirements of ATLAS experiment upgrades. It will be the largest readout IC produced to date for particle physics applications, filling the maximum allowed reticle area. This will significantly reduce the cost of future hybrid pixel detectors. In addition, FE-I4 will have smaller pixels and higher rate capability than the present generation of LHC pixel detectors. Design features are described along with simulation and test results, including low power and high rate readout architecture, mixed signal design strategy, and yield hardening.

  6. Vertically integrated pixel readout chip for high energy physics

    International Nuclear Information System (INIS)

    Deptuch, Grzegorz; Demarteau, Marcel; Hoff, James; Khalid, Farah; Lipton, Ronald; Shenai, Alpana; Trimpl, Marcel; Yarema, Raymond; Zimmerman, Tom

    2011-01-01

    We report on the development of the vertex detector pixel readout chips based on multi-tier vertically integrated electronics for the International Linear Collider. Some testing results of the VIP2a prototype are presented. The chip is the second iteration of the silicon implementation of the prototype, data-pushed concept of the readout developed at Fermilab. The device was fabricated in the 3D MIT-LL 0.15 (micro)m fully depleted SOI process. The prototype is a three-tier design, featuring 30 x 30 (micro)m 2 pixels, laid out in an array of 48 x 48 pixels.

  7. A compact readout system for multi-pixel hybrid photodiodes

    International Nuclear Information System (INIS)

    Datema, C.P.; Meng, L.J.; Ramsden, D.

    1999-01-01

    Although the first Multi-pixel Hybrid Photodiode (M-HPD) was developed in the early 1990s by Delft Electronic Products, the main obstacle to its application has been the lack of availability of a compact read-out system. A fast, parallel readout system has been constructed for use with the earlier 25-pixel tube with High-energy Physics applications in mind. The excellent properties of the recently developed multi-pixel hybrid photodiodes (M-HPD) will be easier to exploit following the development of the new hybrid read-out circuits described in this paper. This system will enable all of the required read-out functions to be accommodate on a single board into which the M-HPD is plugged. The design and performance of a versatile system is described in which a trigger-signal, derived from the common-side of the silicon anode in the M-HPD, is used to trigger the readout of the 60-anode pixels in the M-HPD. The multi-channel amplifier section is based on the use of a new, commercial VLSI chip, whilst the read-out sequencer uses a chip of its own design. The common anode signal is processed by a fast amplifier and discriminator to provide a trigger signal when a single event is detected. In the prototype version, the serial analogue output data-stream is processed using a PC-mounted, high speed ADC. Results obtained using the new read-out system in a compact gamma-camera and with a small muon tracking-chamber demonstrate the low-noise performance of the system. The application of this read-out system in other position-sensitive or multi-anode photomultiplier tube applications are also described

  8. Readout chip for the CMS pixel detector upgrade

    Energy Technology Data Exchange (ETDEWEB)

    Rossini, Marco, E-mail: marco.rossini@phys.ethz.ch

    2014-11-21

    For the CMS experiment a new pixel detector is planned for installation during the extended shutdown in winter 2016/2017. Among the changes of the detector modified front end electronics will be used for higher efficiency at peak luminosity of the LHC and faster readout. The first prototype versions of the new readout chip have been designed and produced. The results of qualification and calibration for the new chip are presented in this paper.

  9. Digital Power Consumption Estimations for CHIPIX65 Pixel Readout Chip

    CERN Document Server

    Marcotulli, Andrea

    2016-01-01

    New hybrid pixel detectors with improved resolution capable of dealing with hit rates up to 3 GHz/cm2 will be required for future High Energy Physics experiments in the Large Hadron Collider (LHC) at CERN. Given this, the RD53 collaboration works on the design of the next generation pixel readout chip needed for both the ATLAS and CMS detector phase 2 pixel upgrades. For the RD53 demonstrator chip in 65nm CMOS technology, different architectures are considered. In particular the purpose of this work is estimating the power consumption of the digital architecture of the readout ASIC developed by CHIPIX65 project of the INFN National Scientific Committee. This has been done with modern chip design tools integrated with the VEPIX53 simulation framework that has been developed within the RD53 collaboration in order to assess the performance of the system in very high rate, high energy physics experiments.

  10. Hexagonal pixel detector with time encoded binary readout

    International Nuclear Information System (INIS)

    Hoedlmoser, H.; Varner, G.; Cooney, M.

    2009-01-01

    The University of Hawaii is developing continuous acquisition pixel (CAP) detectors for vertexing applications in lepton colliding experiments such as SuperBelle or ILC. In parallel to the investigation of different technology options such as MAPS or SOI, both analog and binary readout concepts have been tested. First results with a binary readout scheme in which the hit information is time encoded by means of a signal shifting mechanism have recently been published. This paper explains the hit reconstruction for such a binary detector with an emphasis on fake hit reconstruction probabilities in order to evaluate the rate capability in a high background environment such as the planned SuperB factory at KEK. The results show that the binary concept is at least comparable to any analog readout strategy if not better in terms of occupancy. Furthermore, we present a completely new binary readout strategy in which the pixel cells are arranged in a hexagonal grid allowing the use of three independent output directions to reduce reconstruction ambiguities. The new concept uses the same signal shifting mechanism for time encoding, however, in dedicated transfer lines on the periphery of the detector, which enables higher shifting frequencies. Detailed Monte Carlo simulations of full size pixel matrices including hit and BG generation, signal generation, and data reconstruction show that by means of multiple signal transfer lines on the periphery the pixel can be made smaller (higher resolution), the number of output channels and the data volume per triggered event can be reduced dramatically, fake hit reconstruction is lowered to a minimum and the resulting effective occupancies are less than 10 -4 . A prototype detector has been designed in the AMS 0.35μm Opto process and is currently under fabrication.

  11. Monolithic pixels on moderate resistivity substrate and sparsifying readout architecture

    International Nuclear Information System (INIS)

    Giubilato, P.; Battaglia, M.; Bisello, D.; Caselle, M.; Chalmet, P.; Demaria, L.; Ikemoto, Y.; Kloukinas, K.; Mansuy, S.C.; Mattiazzo, S.; Marchioro, A.; Mugnier, H.; Pantano, D.; Potenza, A.; Rivetti, A.; Rousset, J.; Silvestrin, L.; Snoeys, W.

    2013-01-01

    The LePix projects aim realizing a new generation monolithic pixel detectors with improved performances at lesser cost with respect to both current state of the art monolithic and hybrid pixel sensors. The detector is built in a 90 nm CMOS process on a substrate of moderate resistivity. This allows charge collection by drift while maintaining the other advantages usually offered by MAPS, like having a single piece detector and using a standard CMOS production line. The collection by drift mechanism, coupled to the low capacitance design of the collecting node made possible by the monolithic approach, provides an excellent signal to noise ratio straight at the pixel cell together with a radiation tolerance far superior to conventional un-depleted MAPS. The excellent signal-to-noise performance is demonstrated by the device ability to separate the 6 keV 55 Fe double peak at room temperature. To achieve high granularity (10–20 µm pitch pixels) over large detector areas maintaining high readout speed, a completely new compressing architecture has been devised. This architecture departs from the mainstream hybrid pixel sparsification approach, which uses in-pixel logic to reduce data, by using topological compression to minimize pixel area and power consumption

  12. Towards a new generation of pixel detector readout chips

    CERN Document Server

    Campbell, M; Ballabriga, R.; Frojdh, E.; Heijne, E.; Llopart, X.; Poikela, T.; Tlustos, L.; Valerio, P.; Wong, W.

    2016-01-01

    The Medipix3 Collaboration has broken new ground in spectroscopic X-ray imaging and in single particle detection and tracking. This paper will review briefly the performance and limitations of the present generation of pixel detector readout chips developed by the Collaboration. Through Silicon Via technology has the potential to provide a significant improvement in the tile- ability and more flexibility in the choice of readout architecture. This has been explored in the context of 3 projects with CEA-LETI using Medipix3 and Timepix3 wafers. The next generation of chips will aim to provide improved spectroscopic imaging performance at rates compatible with human CT. It will also aim to provide full spectroscopic images with unprecedented energy and spatial resolution. Some of the opportunities and challenges posed by moving to a more dense CMOS process will be discussed.

  13. A prototype pixel readout chip for asynchronous detection applications

    International Nuclear Information System (INIS)

    Raymond, D.M.; Hall, G.; Lewis, A.J.; Sharp, P.H.

    1991-01-01

    A two-dimensional array of amplifier cells has been fabricated as a prototype readout system for a matching array of silicon diode detectors. Each cell contains a preamplifier, shaping amplifier, comparator and analogue signal storage in an area of 300 μmx320 μm using 3 μm CMOS technology. Full size chips will be bump bonded to pixel detector arrays. Low noise and asynchronous operation are novel design features. With noise levels of less than 250 rms electrons for input capacitances up to 600 fF, pixel detectors will be suitable for autoradiography, synchrotron X-ray and high energy particle detection applications. The design of the prototype chip is presented and future developments and prospects for applications are discussed. (orig.)

  14. SEU tolerant memory design for the ATLAS pixel readout chip

    International Nuclear Information System (INIS)

    Menouni, M; Barbero, M; Breugnon, P; Fougeron, D; Gensolen, F; Arutinov, D; Backhaus, M; Gonella, L; Hemperek, T; Karagounis, M; Beccherle, R; Darbo, G; Caminada, L; Dube, S; Fleury, J; Garcia-Sciveres, M; Gnani, D; Jensen, F; Gromov, V; Kluit, R

    2013-01-01

    The FE-I4 chip for the B-layer upgrade is designed in a 130 nm CMOS process. For this design, configuration memories are based on the DICE latches where layout considerations are followed to improve the tolerance to SEU. Tests have shown that DICE latches for which layout approaches are adopted are 30 times more tolerant to SEU than the standard DICE latches. To prepare for the new pixel readout chip planned for the future upgrades, a prototype chip containing 512 pixels has been designed in a 65 nm CMOS process and a new approach is adopted for SEU tolerant latches. Results in terms of SEU and TID tolerance are presented.

  15. Operation of a GEM-TPC with pixel readout

    CERN Document Server

    Brezina, C; Kaminski, J; Killenberg, M; Krautscheid, T

    2012-01-01

    A prototype time projection chamber with 26 cm drift length was operated with a short-spaced triple gas electron multiplier (GEM) stack in a setup triggering on cosmic muon tracks. A small part of the anode plane is read out with a CMOS pixel application-specified integrated circuit (ASIC) named Timepix, which provides ultimate readout granularity. Pixel clusters of charge depositions corresponding to single primary electrons are observed and analyzed to reconstruct charged particle tracks. A dataset of several weeks of cosmic ray data is analyzed. The number of clusters per track length is well described by simulation. The obtained single point resolution approaches 50 m at short drift distances and is well reproduced by a simple model of single-electron diffusion.

  16. Monolithic pixels on moderate resistivity substrate and sparsifying readout architecture

    CERN Document Server

    Giubilato, P; Snoeys, W; Bisello, D; Marchioro, A; Battaglia, M; Demaria, L; Mansuy, S C; Pantano, D; Rousset, J; Mattiazzo, S; Kloukinas, K; Potenza, A; Ikemoto, Y; Rivetti, A; Chalmet, P; Mugnier, H; Silvestrin, L

    2013-01-01

    The LePix projects aim realizing a new generation monolithic pixel detectors with improved performances at lesser cost with respect to both current state of the art monolithic and hybrid pixel sensors. The detector is built in a 90 nm CMOS process on a substrate of moderate resistivity. This allows charge collection by drift while maintaining the other advantages usually offered by MAPS, like having a single piece detector and using a standard CMOS production line. The collection by drift mechanism, coupled to the low capacitance design of the collecting node made possible by the monolithic approach, provides an excellent signal to noise ratio straight at the pixel cell together with a radiation tolerance far superior to conventional un-depleted MAPS. The excellent signal-to-noise performance is demonstrated by the device ability to separate the 6 keV Fe-55 double peak at room temperature. To achieve high granularity (10-20 mu m pitch pixels) over large detector areas maintaining high readout speed, a complet...

  17. SPIDR, a general-purpose readout system for pixel ASICs

    International Nuclear Information System (INIS)

    Heijden, B. van der; Visser, J.; Beuzekom, M. van; Boterenbrood, H.; Munneke, B.; Schreuder, F.; Kulis, S.

    2017-01-01

    The SPIDR (Speedy PIxel Detector Readout) system is a flexible general-purpose readout platform that can be easily adapted to test and characterize new and existing detector readout ASICs. It is originally designed for the readout of pixel ASICs from the Medipix/Timepix family, but other types of ASICs or front-end circuits can be read out as well. The SPIDR system consists of an FPGA board with memory and various communication interfaces, FPGA firmware, CPU subsystem and an API library on the PC . The FPGA firmware can be adapted to read out other ASICs by re-using IP blocks. The available IP blocks include a UDP packet builder, 1 and 10 Gigabit Ethernet MAC's and a 'soft core' CPU . Currently the firmware is targeted at the Xilinx VC707 development board and at a custom board called Compact-SPIDR . The firmware can easily be ported to other Xilinx 7 series and ultra scale FPGAs. The gap between an ASIC and the data acquisition back-end is bridged by the SPIDR system. Using the high pin count VITA 57 FPGA Mezzanine Card (FMC) connector only a simple chip carrier PCB is required. A 1 and a 10 Gigabit Ethernet interface handle the connection to the back-end. These can be used simultaneously for high-speed data and configuration over separate channels. In addition to the FMC connector, configurable inputs and outputs are available for synchronization with other detectors. A high resolution (≈ 27 ps bin size) Time to Digital converter is provided for time stamping events in the detector. The SPIDR system is frequently used as readout for the Medipix3 and Timepix3 ASICs. Using the 10 Gigabit Ethernet interface it is possible to read out a single chip at full bandwidth or up to 12 chips at a reduced rate. Another recent application is the test-bed for the VeloPix ASIC, which is developed for the Vertex Detector of the LHCb experiment. In this case the SPIDR system processes the 20 Gbps scrambled data stream from the VeloPix and distributes it over four

  18. Development of pixel readout integrated circuits for extreme rate and radiation

    CERN Document Server

    Garcia-Sciveres, M; CERN. Geneva. The LHC experiments Committee; LHCC

    2013-01-01

    Letter of Intent for RD Collaboration Proposal focused on development of a next generation pixel readout integrated circuits needed for high luminosity LHC detector upgrades. Brings together ATLAS and CMS pixel chip design communities.

  19. Pixel detector readout electronics with two-level discriminator scheme

    International Nuclear Information System (INIS)

    Pengg, F.

    1998-01-01

    In preparation for a silicon pixel detector with more than 3,000 readout channels per chip for operation at the future large hadron collider (LHC) at CERN the analog front end of the readout electronics has been designed and measured on several test-arrays with 16 by 4 cells. They are implemented in the HP 0.8 microm process but compatible with the design rules of the radiation hard Honeywell 0.8 microm bulk process. Each cell contains bump bonding pad, preamplifier, discriminator and control logic for masking and testing within a layout area of only 50 microm by 140 microm. A new two-level discriminator scheme has been implemented to cope with the problems of time-walk and interpixel cross-coupling. The measured gain of the preamplifier is 900 mV for a minimum ionizing particle (MIP, about 24,000 e - for a 300 microm thick Si-detector) with a return to baseline within 750 ns for a 1 MIP input signal. The full readout chain (without detector) shows an equivalent noise charge to 60e - r.m.s. The time-walk, a function of the separation between the two threshold levels, is measured to be 22 ns at a separation of 1,500 e - , which is adequate for the 40 MHz beam-crossing frequency at the LHC. The interpixel cross-coupling, measured with a 40fF coupling capacitance, is less than 3%. A single cell consumes 35 microW at 3.5 V supply voltage

  20. Optical readout in a multi-module system test for the ATLAS pixel detector

    International Nuclear Information System (INIS)

    Flick, Tobias; Becks, Karl-Heinz; Gerlach, Peter; Kersten, Susanne; Maettig, Peter; Nderitu Kirichu, Simon; Reeves, Kendall; Richter, Jennifer; Schultes, Joachim

    2006-01-01

    The innermost part of the ATLAS experiment at the LHC, CERN, will be a pixel detector, which is presently under construction. The command messages and the readout data of the detector are transmitted over an optical data path. The readout chain consists of many components which are produced at several locations around the world, and must work together in the pixel detector. To verify that these parts are working together as expected a system test has been built up. It consists of detector modules, optoboards, optical fibres, Back of Crate cards, Readout Drivers, and control computers. In this paper, the system test setup and the operation of the readout chain are described. Also, some results of tests using the final pixel detector readout chain are given

  1. CMOS Active-Pixel Image Sensor With Intensity-Driven Readout

    Science.gov (United States)

    Langenbacher, Harry T.; Fossum, Eric R.; Kemeny, Sabrina

    1996-01-01

    Proposed complementary metal oxide/semiconductor (CMOS) integrated-circuit image sensor automatically provides readouts from pixels in order of decreasing illumination intensity. Sensor operated in integration mode. Particularly useful in number of image-sensing tasks, including diffractive laser range-finding, three-dimensional imaging, event-driven readout of sparse sensor arrays, and star tracking.

  2. Pixel readout ASIC for an APD based 2D X-ray hybrid pixel detector with sub-nanosecond resolution

    Energy Technology Data Exchange (ETDEWEB)

    Thil, Ch., E-mail: christophe.thil@ziti.uni-heidelberg.d [Heidelberg University, Institute of Computer Engineering, B6, 26, 68161 Mannheim (Germany); Baron, A.Q.R. [RIKEN SPring-8 Center, 1-1-1 Kouto, Sayo-cho, Sayo-gun, Hyogo 679-5148 (Japan); Fajardo, P. [ESRF, Polygone Scientifique Louis Neel, 6, rue Jules Horowitz, 38000 Grenoble (France); Fischer, P. [Heidelberg University, Institute of Computer Engineering, B6, 26, 68161 Mannheim (Germany); Graafsma, H. [DESY, Notkestrasse 85, 22607 Hamburg (Germany); Rueffer, R. [ESRF, Polygone Scientifique Louis Neel, 6, rue Jules Horowitz, 38000 Grenoble (France)

    2011-02-01

    The fast response and the short recovery time of avalanche photodiodes (APDs) in linear mode make those devices ideal for direct X-ray detection in applications requiring high time resolution or counting rate. In order to provide position sensitivity, the XNAP project aims at creating a hybrid pixel detector with nanosecond time resolution based on a monolithic APD sensor array with 32 x32 pixels covering about 1 cm{sup 2} active area. The readout is implemented in a pixelated front-end ASIC suited for the readout of such arrays, matched to pixels of 280{mu}mx280{mu}m size. Every single channel features a fast transimpedance amplifier, a discriminator with locally adjustable threshold and two counters with high dynamic range and counting speed able to accumulate X-ray hits with no readout dead time. Additionally, the detector can be operated in list mode by time-stamping every single event with sub-nanosecond resolution. In a first phase of the project, a 4x4 pixel test module is built to validate the conceptual design of the detector. The XNAP project is briefly presented and the performance of the readout ASIC is discussed.

  3. Pixel readout ASIC for an APD based 2D X-ray hybrid pixel detector with sub-nanosecond resolution

    International Nuclear Information System (INIS)

    Thil, Ch.; Baron, A.Q.R.; Fajardo, P.; Fischer, P.; Graafsma, H.; Rueffer, R.

    2011-01-01

    The fast response and the short recovery time of avalanche photodiodes (APDs) in linear mode make those devices ideal for direct X-ray detection in applications requiring high time resolution or counting rate. In order to provide position sensitivity, the XNAP project aims at creating a hybrid pixel detector with nanosecond time resolution based on a monolithic APD sensor array with 32 x32 pixels covering about 1 cm 2 active area. The readout is implemented in a pixelated front-end ASIC suited for the readout of such arrays, matched to pixels of 280μmx280μm size. Every single channel features a fast transimpedance amplifier, a discriminator with locally adjustable threshold and two counters with high dynamic range and counting speed able to accumulate X-ray hits with no readout dead time. Additionally, the detector can be operated in list mode by time-stamping every single event with sub-nanosecond resolution. In a first phase of the project, a 4x4 pixel test module is built to validate the conceptual design of the detector. The XNAP project is briefly presented and the performance of the readout ASIC is discussed.

  4. Design of readout drivers for ATLAS pixel detectors using field programmable gate arrays

    CERN Document Server

    Sivasubramaniyan, Sriram

    Microstrip detectors are an integral patt of high energy physics research . Special protocols are used to transmit the data from these detectors . To readout the data from such detectors specialized instrumentation have to be designed . To achieve this task, creative and innovative high speed algorithms were designed simulated and implemented in Field Programmable gate arrays, using CAD/CAE tools. The simulation results indicated that these algorithms would be able to perform all the required tasks quickly and efficiently. This thesis describes the design of data acquisition system called the Readout Drivers (ROD) . It focuses on the ROD data path for ATLAS Pixel detectors. The data path will be an integrated part of Readout Drivers setup to decode the data from the silicon micro strip detectors and pixel detectors. This research also includes the design of Readout Driver controller. This Module is used to control the operation of the ROD. This module is responsible for the operation of the Pixel decoders bas...

  5. Development of a customized SSC pixel detector readout for vertex tracking

    International Nuclear Information System (INIS)

    Barkan, O.; Atlas, E.L.; Marking, W.L.; Worley, S.; Yacoub, G.Y.; Kramer, G.; Arens, J.F.; Jernigan, J.G.; Shapiro, S.L.; Nygren, D.; Spieler, H.; Wright, M.

    1990-01-01

    The authors describe the readout architecture and progress to date in the development of hybrid PIN diode arrays for use as vertex detectors in the SSC environment. The architecture supports a self-timed mechanism for time stamping hit pixels, storing their xy coordinates and later selectively reading out only those pixels containing interesting data along with their coordinates. The peripheral logic resolves ambiguous pixel ghost locations and controls pixel neighbor readout to achieve high spatial resolution. A test lot containing 64 x 32 pixel arrays has been processed and is currently being tested. Each pixel contains 23 transistors and six capacitors consuming an area of 50μm by 150μm and dissipating about 20μW of power

  6. RD Collaboration Proposal: Development of pixel readout integrated circuits for extreme rate and radiation

    CERN Document Server

    Chistiansen, J (CERN)

    2013-01-01

    This proposal describes a new RD collaboration to develop the next genrration of hybrid pixel readout chips for use in ATLAS and CMS PHase 2 upgrades. extrapolation of hybrid pixel technology to the HL-LHC presents major challenges on several fronts. Challenges include: smaller pixels to resolve tracks in boosted jets, much higher hit rates (1-2 GHz/cm2 ), unprecedented radiation tolerance (10 MGy), much higher output bandwidth, and large IC format with low power consumption in order to instrument large areas while keeping the material budget low. This collaboration is specifically focused on design of hybrid pixel readout chips, and not on more general chip design or on other aspects of hybrid pixel technology. Participants include 7 institutes on ATLAS and 7 on CMS, plus 2 on both experiments.

  7. Development of pixel readout integrated circuits for extreme rate and radiation

    CERN Multimedia

    Liberali, V; Rizzi, A; Re, V; Minuti, M; Pangaud, P; Barbero, M B; Pacher, L; Kluit, R; Hinchliffe, I; Manghisoni, M; Giubilato, P; Faccio, F; Pernegger, H; Krueger, H; Gensolen, F D; Bilei, G M; Da rocha rolo, M D; Prydderch, M L; Fanucci, L; Grillo, A A; Bellazzini, R; Palomo pinto, F R; Michelis, S; Huegging, F G; Kishishita, T; Marchiori, G; Christian, D C; Kaestli, H C; Meier, B; Andreazza, A; Key-charriere, M; Linssen, L; Dannheim, D; Conti, E; Hemperek, T; Menouni, M; Fougeron, D; Genat, J; Bomben, M; Marzocca, C; Demaria, N; Mazza, G; Van bakel, N A; Palla, F; Grippo, M T; Magazzu, G; Ratti, L; Abbaneo, D; Crescioli, F; Deptuch, G W; Neue, G; De robertis, G; Passeri, D; Placidi, P; Gromov, V; Morsani, F; Paccagnella, A; Christiansen, J; Dho, E; Wermes, N; Rymaszewski, P; Rozanov, A; Wang, A; Lipton, R J; Havranek, M; Neviani, A; Marconi, S; Karagounis, M; Godiot, S; Calderini, G; Seidel, S C; Horisberger, R P; Garcia-sciveres, M A; Stabile, A; Beccherle, R; Bacchetta, N

    The present hybrid pixel detectors in operation at the LHC represent a major achievement. They deployed a new technology on an unprecedented scale and their success firmly established pixel tracking as indispensable for future HEP experiments. However, extrapolation of hybrid pixel technology to the HL-LHC presents major challenges on several fronts. We propose a new RD collaboration specifically focused on the development of pixel readout Integrated Circuits (IC). The IC challenges include: smaller pixels to resolve tracks in boosted jets, much higher hit rates (1-2 GHz/cm$^{2}$), unprecedented radiation tolerance (10 MGy), much higher output bandwidth, and large IC format with low power consumption in order to instrument large areas while keeping the material budget low. We propose a collaboration to design the next generation of hybrid pixel readout chips to enable the ATLAS and CMS Phase 2 pixel upgrades. This does not imply that ATLAS and CMS must use the same exact pixel readout chip, as most of the dev...

  8. Digital column readout architecture for the ATLAS pixel 025 mum front end IC

    CERN Document Server

    Mandelli, E; Blanquart, L; Comes, G; Denes, P; Einsweiler, Kevin F; Fischer, P; Marchesini, R; Meddeler, G; Peric, I

    2002-01-01

    A fast low noise, limited power, radiation-hard front-end chip was developed for reading out the Atlas Pixel Silicon Detector. As in the past prototypes, every chip is used to digitize and read out charge and time information from hits on each one of its 2880 inputs. The basic column readout architecture idea was adopted and modified to allow a safe transition to quarter micron technology. Each pixel cell, organized in a 160 multiplied by 18 matrix, can be independently enabled and configured in order to optimize the analog signal response and to prevent defective pixels from saturating the readout. The digital readout organizes hit data coming from each column, with respect to time, and output them on a low-level serial interface. A considerable effort was made to design state machines free of undefined states, where single-point defects and charge deposited by heavy ions in the silicon could have led to unpredicted forbidden states. 7 Refs.

  9. Readout architecture for the Pixel-Strip module of the CMS Outer Tracker Phase-2 upgrade

    CERN Document Server

    Caratelli, Alessandro; Jan Kaplon; Kloukinas, Konstantinos; Simone Scarfi

    2017-01-01

    The Outer Tracker upgrade of the Compact Muon Solenoid (CMS) experiment at CERN introduces new challenges for the front-end readout electronics. In particular, the capability of identifying particles with high transverse momentum using modules with double sensor layers requires high speed real time interconnects between readout ASICs. The Pixel-Strip module combines a pixelated silicon layer with a silicon-strip layer. Consequently, it needs two different readout ASICs, namely the Short Strip ASIC (SSA) for the strip sensor and the Macro Pixel ASIC (MPA) for the pixelated sensor. The architecture proposed in this paper allows for a total data flow between readout ASICs of $\\sim$100\\,Gbps and reduces the output data flow from 1.3\\,Tbps to 30\\,Gbps per module while limiting the total power density to below 100\\,mW/cm$^2$. In addition a system-level simulation framework of all the front-end readout ASICs is developed in order to verify the data processing algorithm and the hardware implementation allowing mult...

  10. Small-Scale Readout System Prototype for the STAR PIXEL Detector

    International Nuclear Information System (INIS)

    Szelezniak, Michal; Anderssen, Eric; Greiner, Leo; Matis, Howard; Ritter, Hans Georg; Stezelberger, Thorsten; Sun, Xiangming; Thomas, James; Vu, Chinh; Wieman, Howard

    2008-01-01

    Development and prototyping efforts directed towards construction of a new vertex detector for the STAR experiment at the RHIC accelerator at BNL are presented. This new detector will extend the physics range of STAR by allowing for precision measurements of yields and spectra of particles containing heavy quarks. The innermost central part of the new detector is a high resolution pixel-type detector (PIXEL). PIXEL requirements are discussed as well as a conceptual mechanical design, a sensor development path, and a detector readout architecture. Selected progress with sensor prototypes dedicated to the PIXEL detector is summarized and the approach chosen for the readout system architecture validated in tests of hardware prototypes is discussed

  11. A high efficiency readout architecture for a large matrix of pixels

    International Nuclear Information System (INIS)

    Gabrielli, A; Giorgi, F; Villa, M

    2010-01-01

    In this work we present a fast readout architecture for silicon pixel matrix sensors that has been designed to sustain very high rates, above 1 MHz/mm 2 for matrices greater than 80k pixels. This logic can be implemented within MAPS (Monolithic Active Pixel Sensors), a kind of high resolution sensor that integrates on the same bulk the sensor matrix and the CMOS logic for readout, but it can be exploited also with other technologies. The proposed architecture is based on three main concepts. First of all, the readout of the hits is performed by activating one column at a time; all the fired pixels on the active column are read, sparsified and reset in parallel in one clock cycle. This implies the use of global signals across the sensor matrix. The consequent reduction of metal interconnections improves the active area while maintaining a high granularity (down to a pixel pitch of 40 μm). Secondly, the activation for readout takes place only for those columns overlapping with a certain fired area, thus reducing the sweeping time of the whole matrix and reducing the pixel dead-time. Third, the sparsification (x-y address labeling of the hits) is performed with a lower granularity with respect to single pixels, by addressing vertical zones of 8 pixels each. The fine-grain Y resolution is achieved by appending the zone pattern to the zone address of a hit. We show then the benefits of this technique in presence of clusters. We describe this architecture from a schematic point of view, then presenting the efficiency results obtained by VHDL simulations.

  12. A high efficiency readout architecture for a large matrix of pixels.

    Science.gov (United States)

    Gabrielli, A.; Giorgi, F.; Villa, M.

    2010-07-01

    In this work we present a fast readout architecture for silicon pixel matrix sensors that has been designed to sustain very high rates, above 1 MHz/mm2 for matrices greater than 80k pixels. This logic can be implemented within MAPS (Monolithic Active Pixel Sensors), a kind of high resolution sensor that integrates on the same bulk the sensor matrix and the CMOS logic for readout, but it can be exploited also with other technologies. The proposed architecture is based on three main concepts. First of all, the readout of the hits is performed by activating one column at a time; all the fired pixels on the active column are read, sparsified and reset in parallel in one clock cycle. This implies the use of global signals across the sensor matrix. The consequent reduction of metal interconnections improves the active area while maintaining a high granularity (down to a pixel pitch of 40 μm). Secondly, the activation for readout takes place only for those columns overlapping with a certain fired area, thus reducing the sweeping time of the whole matrix and reducing the pixel dead-time. Third, the sparsification (x-y address labeling of the hits) is performed with a lower granularity with respect to single pixels, by addressing vertical zones of 8 pixels each. The fine-grain Y resolution is achieved by appending the zone pattern to the zone address of a hit. We show then the benefits of this technique in presence of clusters. We describe this architecture from a schematic point of view, then presenting the efficiency results obtained by VHDL simulations.

  13. Dead-time free pixel readout architecture for ATLAS front-end IC

    CERN Document Server

    Einsweiler, Kevin F; Kleinfelder, S A; Luo, L; Marchesini, R; Milgrome, O; Pengg, F X

    1999-01-01

    A low power sparse scan readout architecture has been developed for the ATLAS pixel front-end IC. The architecture supports a dual discriminator and extracts the time over threshold (TOT) information along with a 2-D spatial address $9 of the hits associating them with a unique 7-bit beam crossing number. The IC implements level-1 trigger filtering along with event building (grouping together all hits in a beam crossing) in the end of column (EOC) buffer. The $9 events are transmitted over a 40 MHz serial data link with the protocol supporting buffer overflow handling by appending error flags to events. This mixed-mode full custom IC is implemented in 0.8 mu HP process to meet the $9 requirements for the pixel readout in the ATLAS inner detector. The circuits have been tested and the IC provides dead-time-less ambiguity free readout at 40 MHz data rate.

  14. 18k Channels single photon counting readout circuit for hybrid pixel detector

    International Nuclear Information System (INIS)

    Maj, P.; Grybos, P.; Szczygiel, R.; Zoladz, M.; Sakumura, T.; Tsuji, Y.

    2013-01-01

    We have performed measurements of an integrated circuit named PXD18k designed for hybrid pixel semiconductor detectors used in X-ray imaging applications. The PXD18k integrated circuit, fabricated in CMOS 180 nm technology, has dimensions of 9.64 mm×20 mm and contains approximately 26 million transistors. The core of the IC is a matrix of 96×192 pixels with 100 μm×100 μm pixel size. Each pixel works in a single photon counting mode. A single pixel contains two charge sensitive amplifiers with Krummenacher feedback scheme, two shapers, two discriminators (with independent thresholds A and B) and two 16-bit ripple counters. The data are read out via eight low voltage differential signaling (LVDS) outputs with 100 Mbps rate. The power consumption is dominated by analog blocks and it is about 23 μW/pixel. The effective peaking time at the discriminator input is 30 ns and is mainly determined by the time constants of the charge sensitive amplifier (CSA). The gain is equal to 42.5 μV/e − and the equivalent noise charge is 168 e − rms (with bump-bonded silicon pixel detector). Thanks to the use of trim DACs in each pixel, the effective threshold spread at the discriminator input is only 1.79 mV. The dead time of the front end electronics for a standard setting is 172 ns (paralyzable model). In the standard readout mode (when the data collection time is separated from the time necessary to readout data from the chip) the PXD18k IC works with two energy thresholds per pixel. The PXD18k can also be operated in the continuous readout mode (with a zero dead time) where one can select the number of bits readout from each pixel to optimize the PXD18k frame rate. For example, for reading out 16 bits/pixel the frame rate is 2.7 kHz and for 4 bits/pixel it rises to 7.1 kHz.

  15. 18k Channels single photon counting readout circuit for hybrid pixel detector

    Energy Technology Data Exchange (ETDEWEB)

    Maj, P., E-mail: piotr.maj@agh.edu.pl [AGH University of Science and Technology, Department of Measurements and Electronics, Al. Mickiewicza 30, 30-059 Krakow (Poland); Grybos, P.; Szczygiel, R.; Zoladz, M. [AGH University of Science and Technology, Department of Measurements and Electronics, Al. Mickiewicza 30, 30-059 Krakow (Poland); Sakumura, T.; Tsuji, Y. [X-ray Analysis Division, Rigaku Corporation, Matsubara, Akishima, Tokyo 196-8666 (Japan)

    2013-01-01

    We have performed measurements of an integrated circuit named PXD18k designed for hybrid pixel semiconductor detectors used in X-ray imaging applications. The PXD18k integrated circuit, fabricated in CMOS 180 nm technology, has dimensions of 9.64 mm Multiplication-Sign 20 mm and contains approximately 26 million transistors. The core of the IC is a matrix of 96 Multiplication-Sign 192 pixels with 100 {mu}m Multiplication-Sign 100 {mu}m pixel size. Each pixel works in a single photon counting mode. A single pixel contains two charge sensitive amplifiers with Krummenacher feedback scheme, two shapers, two discriminators (with independent thresholds A and B) and two 16-bit ripple counters. The data are read out via eight low voltage differential signaling (LVDS) outputs with 100 Mbps rate. The power consumption is dominated by analog blocks and it is about 23 {mu}W/pixel. The effective peaking time at the discriminator input is 30 ns and is mainly determined by the time constants of the charge sensitive amplifier (CSA). The gain is equal to 42.5 {mu}V/e{sup -} and the equivalent noise charge is 168 e{sup -} rms (with bump-bonded silicon pixel detector). Thanks to the use of trim DACs in each pixel, the effective threshold spread at the discriminator input is only 1.79 mV. The dead time of the front end electronics for a standard setting is 172 ns (paralyzable model). In the standard readout mode (when the data collection time is separated from the time necessary to readout data from the chip) the PXD18k IC works with two energy thresholds per pixel. The PXD18k can also be operated in the continuous readout mode (with a zero dead time) where one can select the number of bits readout from each pixel to optimize the PXD18k frame rate. For example, for reading out 16 bits/pixel the frame rate is 2.7 kHz and for 4 bits/pixel it rises to 7.1 kHz.

  16. An induced charge readout scheme incorporating image charge splitting on discrete pixels

    International Nuclear Information System (INIS)

    Kataria, D.O.; Lapington, J.S.

    2003-01-01

    Top hat electrostatic analysers used in space plasma instruments typically use microchannel plates (MCPs) followed by discrete pixel anode readout for the angular definition of the incoming particles. Better angular definition requires more pixels/readout electronics channels but with stringent mass and power budgets common in space applications, the number of channels is restricted. We describe here a technique that improves the angular definition using induced charge and an interleaved anode pattern. The technique adopts the readout philosophy used on the CRRES and CLUSTER I instruments but has the advantages of the induced charge scheme and significantly reduced capacitance. Charge from the MCP collected by an anode pixel is inductively split onto discrete pixels whose geometry can be tailored to suit the scientific requirements of the instrument. For our application, the charge is induced over two pixels. One of them is used for a coarse angular definition but is read out by a single channel of electronics, allowing a higher rate handling. The other provides a finer angular definition but is interleaved and hence carries the expense of lower rate handling. Using the technique and adding four channels of electronics, a four-fold increase in the angular resolution is obtained. Details of the scheme and performance results are presented

  17. A silicon pixel detector with routing for external VLSI read-out

    International Nuclear Information System (INIS)

    Thomas, S.L.; Seller, P.

    1988-07-01

    A silicon pixel detector with an array of 32 by 16 hexagonal pixels has been designed and is being built on high resistivity silicon. The detector elements are reverse biased diodes consisting of p-implants in an n-type substrate and are fully depleted from the front to the back of the wafer. They are intended to measure high energy ionising particles traversing the detector. The detailed design of the pixels, their layout and method of read-out are discussed. A number of test structures have been incorporated onto the wafer to enable measurements to be made on individual pixels together with a variety of active devices. The results will give a better understanding of the operation of the pixel array, and will allow testing of computer simulations of more elaborate structures for the future. (author)

  18. Design and realisation of integrated circuits for the readout of pixel sensors in high-energy physics and biomedical imaging

    Energy Technology Data Exchange (ETDEWEB)

    Peric, I.

    2004-08-01

    Radiation tolerant pixel-readout chip for the ATLAS pixel detector has been designed, implemented in a deep-submicron CMOS technology and successfully tested. The chip contains readout-channels with complex analog and digital circuits. Chip for steering of the DEPFET active-pixel matrix has been implemented in a high-voltage CMOS technology. The chip contains channels which generate fast sequences of high-voltage signals. Detector containing this chip has been successfully tested. Pixel-readout test chip for an X-ray imaging pixel sensor has been designed, implemented in a CMOS technology and tested. Pixel-readout channels are able to simultaneously count the signals generated by passage of individual photons and to sum the total charge generated during exposure time. (orig.)

  19. Performance of a Fast Binary Readout CMOS Active Pixel Sensor Chip Designed for Charged Particle Detection

    Science.gov (United States)

    Deerli, Yavuz; Besanon, Marc; Besson, Auguste; Claus, Gilles; Deptuch, Grzegorz; Dulinski, Wojciech; Fourches, Nicolas; Goffe, Mathieu; Himmi, Abdelkader; Li, Yan; Lutz, Pierre; Orsini, Fabienne; Szelezniak, Michal

    2006-12-01

    We report on the performance of the MIMOSA8 (HiMAPS1) chip. The chip is a 128times32 pixels array where 24 columns have discriminated binary outputs and eight columns analog test outputs. Offset correction techniques are used extensively in this chip to overcome process related mismatches. The array is divided in four blocks of pixels with different conversion factors and is controlled by a serially programmable sequencer. MIMOSA8 is a representative of the CMOS sensors development option considered as a promising candidate for the Vertex Detector of the future International Linear Collider (ILC). The readout technique, implemented on the chip, combines high spatial resolution capabilities with high processing readout speed. Data acquisition, providing control of the chip and signal buffering and linked to a VME system, was made on the eight analog outputs. Analog data, without and with a 55Fe X-ray source, were acquired and processed using off-line analysis software. From the reconstruction of pixel clusters, built around a central pixel, we deduce that the charge spread is limited to the closest 25 pixels and almost all the available charge is collected. The position of the total charge collection peak (and subsequently the charge-to-voltage conversion factor) stays unaffected when the clock frequency is increased even up to 150 MHz (13.6 mus readout time per frame). The discriminators, placed in the readout chain, have proved to be fully functional. Beam tests have been made with high energy electrons at DESY (Germany) to study detection efficiency. The results prove that MIMOSA8 is the first and fastest successful monolithic active pixel sensor with on-chip signal discrimination for detection of MIPs

  20. High-speed readout of high-Z pixel detectors with the LAMBDA detector

    International Nuclear Information System (INIS)

    Pennicard, D.; Smoljanin, S.; Sheviakov, I.; Xia, Q.; Rothkirch, A.; Yu, Y.; Struth, B.; Hirsemann, H.; Graafsma, H.

    2014-01-01

    High-frame-rate X-ray pixel detectors make it possible to perform time-resolved experiments at synchrotron beamlines, and to make better use of these sources by shortening experiment times. LAMBDA is a photon-counting hybrid pixel detector based on the Medipix3 chip, designed to combine a small pixel size of 55 μm, a large tileable module design, high speed, and compatibility with ''high-Z'' sensors for hard X-ray detection. This technical paper focuses on LAMBDA's high-speed-readout functionality, which allows a frame rate of 2000 frames per second with no deadtime between successive images. This takes advantage of the Medipix3 chip's ''continuous read-write'' function and highly parallelised readout. The readout electronics serialise this data and send it back to a server PC over two 10 Gigabit Ethernet links. The server PC controls the detector and receives, processes and stores the data using software designed for the Tango control system. As a demonstration of high-speed readout of a high-Z sensor, a GaAs LAMBDA detector was used to make a high-speed X-ray video of a computer fan

  1. Fast readout logic interfacing a 256-pixel matrix of a dual-layer 3D device

    International Nuclear Information System (INIS)

    Gabrielli, A; Giorgi, F; Villa, M; Morsani, F

    2010-01-01

    A prototype of a 3D ASIC built up of a fast readout architecture, with sparsification capabilities, which interfaces with a matrix of a 256-pixel sensor, was recently submitted. The chosen technology is CMOS Chartered 130 nm as it is compatible with the Tezzaron facility to interconnect face-to-face two silicon wafers allowing for a vertical integration structure by means of through-silicon-vias. Particularly, the readout logic uses one layer that will be stacked on a sensor layer at the end of the fabrication process.

  2. Fast readout logic interfacing a 256-pixel matrix of a dual-layer 3D device

    Energy Technology Data Exchange (ETDEWEB)

    Gabrielli, A; Giorgi, F; Villa, M [INFN-Bologna and Physics Department, University of Bologna, Viale Berti Pichat, 6/2, 40127, Bologna (Italy); Morsani, F, E-mail: alessandro.gabrielli@bo.infn.i [INFN-Pisa and University of Pisa, Largo B. Pontecorvo, 3, 56127, Pisa (Italy)

    2010-07-15

    A prototype of a 3D ASIC built up of a fast readout architecture, with sparsification capabilities, which interfaces with a matrix of a 256-pixel sensor, was recently submitted. The chosen technology is CMOS Chartered 130 nm as it is compatible with the Tezzaron facility to interconnect face-to-face two silicon wafers allowing for a vertical integration structure by means of through-silicon-vias. Particularly, the readout logic uses one layer that will be stacked on a sensor layer at the end of the fabrication process.

  3. The FE-I4 Pixel Readout Chip and the IBL Module

    Energy Technology Data Exchange (ETDEWEB)

    Barbero, Marlon; Arutinov, David; Backhaus, Malte; Fang, Xiao-Chao; Gonella, Laura; Hemperek, Tomasz; Karagounis, Michael; Hans, Kruger; Kruth, Andre; Wermes, Norbert; /Bonn U.; Breugnon, Patrick; Fougeron, Denis; Gensolen, Fabrice; Menouni, Mohsine; Rozanov, Alexander; /Marseille, CPPM; Beccherle, Roberto; Darbo, Giovanni; /INFN, Genoa; Caminada, Lea; Dube, Sourabh; Fleury, Julien; Gnani, Dario; /LBL, Berkeley /NIKHEF, Amsterdam /Gottingen U. /SLAC

    2012-05-01

    FE-I4 is the new ATLAS pixel readout chip for the upgraded ATLAS pixel detector. Designed in a CMOS 130 nm feature size process, the IC is able to withstand higher radiation levels compared to the present generation of ATLAS pixel Front-End FE-I3, and can also cope with higher hit rate. It is thus suitable for intermediate radii pixel detector layers in the High Luminosity LHC environment, but also for the inserted layer at 3.3 cm known as the 'Insertable B-Layer' project (IBL), at a shorter timescale. In this paper, an introduction to the FE-I4 will be given, focusing on test results from the first full size FE-I4A prototype which has been available since fall 2010. The IBL project will be introduced, with particular emphasis on the FE-I4-based module concept.

  4. Development of readout system for FE-I4 pixel module using SiTCP

    Energy Technology Data Exchange (ETDEWEB)

    Teoh, J.J., E-mail: jjteoh@champ.hep.sci.osaka-u.ac.jp [Graduate School of Science, Osaka University, 1-1 Machikaneyama, Toyonaka, Osaka, 560-0043 (Japan); Hanagaki, K. [Graduate School of Science, Osaka University, 1-1 Machikaneyama, Toyonaka, Osaka, 560-0043 (Japan); Ikegami, Y.; Takubo, Y.; Terada, S.; Unno, Y. [Institute for Particle and Nuclear Studies, High Energy Accelerator Research Organization (KEK), 1-1 Oho, Tsukuba City, Ibaraki-ken 305-0801 (Japan)

    2013-12-11

    The ATLAS pixel detector will be replaced in the future High Luminosity-Large Hadron Collider (HL-LHC) upgrade to preserve or improve the detector performance at high luminosity environment. To meet the tight requirements of the upgrade, a new pixel Front-End (FE) Integrated Circuit (IC) called FE-I4 has been developed. We have then devised a readout system for the new FE IC. Our system incorporates Silicon Transmission Control Protocol (SiTCP) technology (Uchida, 2008 [1]) which utilizes the standard TCP/IP and UDP communication protocols. This technology allows direct data access and transfer between a readout hardware chain and PC via a high speed Ethernet. In addition, the communication protocols are small enough to be implemented in a single Field-Programable Gate Array (FPGA). Relying on this technology, we have been able to construct a very compact, versatile and fast readout system. We have developed a firmware and software together with the readout hardware chain. We also have established basic functionalities for reading out FE-I4.

  5. Development of a cylindrical tracking detector with multichannel scintillation fibers and pixelated photon detector readout

    Energy Technology Data Exchange (ETDEWEB)

    Akazawa, Y.; Miwa, K.; Honda, R.; Shiozaki, T.; Chiga, N.

    2015-07-01

    We are developing a cylindrical tracking detector for a Σp scattering experiment in J-PARC with scintillation fibers and the Pixelated Photon Detector (PPD) readout, which is called as cylindrical fiber tracker (CFT), in order to reconstruct trajectories of charged particles emitted inside CFT. CFT works not only as a tracking detector but also a particle identification detector from energy deposits. A prototype CFT consisting of two straight layers and one spiral layer was constructed. About 1100 scintillation fibers with a diameter of 0.75 mm (Kuraray SCSF-78 M) were used. Each fiber signal was read by Multi-Pixel Photon Counter (MPPC, HPK S10362-11-050P, 1×1 mm{sup 2}, 400 pixels) fiber by fiber. MPPCs were handled with Extended Analogue Silicon Photomultipliers Integrated ReadOut Chip (EASIROC) boards, which were developed for the readout of a large number of MPPCs. The energy resolution of one layer was 28% for a 70 MeV proton where the energy deposit in fibers was 0.7 MeV.

  6. Low noise signal-to-noise ratio enhancing readout circuit for current-mediated active pixel sensors

    International Nuclear Information System (INIS)

    Ottaviani, Tony; Karim, Karim S.; Nathan, Arokia; Rowlands, John A.

    2006-01-01

    Diagnostic digital fluoroscopic applications continuously expose patients to low doses of x-ray radiation, posing a challenge to both the digital imaging pixel and readout electronics when amplifying small signal x-ray inputs. Traditional switch-based amorphous silicon imaging solutions, for instance, have produced poor signal-to-noise ratios (SNRs) at low exposure levels owing to noise sources from the pixel readout circuitry. Current-mediated amorphous silicon pixels are an improvement over conventional pixel amplifiers with an enhanced SNR across the same low-exposure range, but whose output also becomes nonlinear with increasing dosage. A low-noise SNR enhancing readout circuit has been developed that enhances the charge gain of the current-mediated active pixel sensor (C-APS). The solution takes advantage of the current-mediated approach, primarily integrating the signal input at the desired frequency necessary for large-area imaging, while adding minimal noise to the signal readout. Experimental data indicates that the readout circuit can detect pixel outputs over a large bandwidth suitable for real-time digital diagnostic x-ray fluoroscopy. Results from hardware testing indicate that the minimum achievable C-APS output current that can be discerned at the digital fluoroscopic output from the enhanced SNR readout circuit is 0.341 nA. The results serve to highlight the applicability of amorphous silicon current-mediated pixel amplifiers for large-area flat panel x-ray imagers

  7. Development of Micromegas-like gaseous detectors using a pixel readout chip as collecting anode

    International Nuclear Information System (INIS)

    Chefdeville, M.

    2009-01-01

    This thesis reports on the fabrication and test of a new gaseous detector with a very large number of readout channels. This detector is intended for measuring the tracks of charged particles with an unprecedented sensitivity to single electrons of almost 100 %. It combines a metal grid for signal amplification called the Micromegas with a pixel readout chip as signal collecting anode and is dubbed GridPix. GridPix is a potential candidate for a sub-detector at a future electron linear collider (ILC) foreseen to work in parallel with the LHC around 2020--2030. The tracking capability of GridPix is best exploited if the Micromegas is integrated on the pixel chip. This integrated grid is called InGrid and is precisely fabricated by wafer post-processing. The various steps of the fabrication process and the measurements of its gain, energy resolution and ion back-flow property are reported in this document. Studies of the response of the complete detector formed by an InGrid and a TimePix pixel chip to X-rays and cosmic particles are also presented. In particular, the efficiency for detecting single electrons and the point resolution in the pixel plane are measured. Implications for a GridPix detector at ILC are discussed. (author)

  8. The Layer 1 / Layer 2 readout upgrade for the ATLAS Pixel Detector

    CERN Document Server

    Mullier, Geoffrey; The ATLAS collaboration

    2016-01-01

    The Pixel Detector of the ATLAS experiment has shown excellent performance during the whole Run-1 of the Large Hadron Collider (LHC). The increase of instantaneous luminosity foreseen during the LHC Run 2, will lead to an increased detector occupancy that is expected to saturate the readout links of the outermost layers of the pixel detector: Layers 1 and 2. To ensure a smooth data taking under such conditions, the read out system of the recently installed fourth innermost pixel layer, the Insertable B-Layer, was modified to accomodate the needs of the older detector. The Layer 2 upgrade installation took place during the 2015 winter shutdown, with the Layer 1 installation scheduled for 2016. A report of the successful installation, together with the design of novel dedicated optical to electrical converters and the software and firmware updates will be presented.

  9. Fine pitch and low material readout bus in the Silicon Pixel Vertex Tracker for the PHENIX Vertex Tracker upgrade

    International Nuclear Information System (INIS)

    Fujiwara, Kohei

    2010-01-01

    The construction of the Silicon Pixel Detector is starting in spring 2009 as project of the RHIC-PHENIX Silicon Vertex Tracker (VTX) upgrade at the Brookhaven National Laboratory. For the construction, we have developed a fine pitch and low material readout bus as the backbone parts of the VTX. In this article, we report the development and production of the readout bus.

  10. Fast Imaging Detector Readout Circuits with In-Pixel ADCs for Fourier Transform Imaging Spectrometers

    Science.gov (United States)

    Rider, D.; Blavier, J-F.; Cunningham, T.; Hancock, B.; Key, R.; Pannell, Z.; Sander, S.; Seshadri, S.; Sun, C.; Wrigley, C.

    2011-01-01

    Focal plane arrays (FPAs) with high frame rates and many pixels benefit several upcoming Earth science missions including GEO-CAPE, GACM, and ACE by enabling broader spatial coverage and higher spectral resolution. FPAs for the PanFTS, a high spatial resolution Fourier transform spectrometer and a candidate instrument for the GEO-CAPE mission are the focus of the developments reported here, but this FPA technology has the potential to enable a variety of future measurements and instruments. The ESTO ACT Program funded the developed of a fast readout integrated circuit (ROIC) based on an innovative in-pixel analog-to-digital converter (ADC). The 128 X 128 pixel ROIC features 60 ?m pixels, a 14-bit ADC in each pixel and operates at a continuous frame rate of 14 kHz consuming only 1.1 W of power. The ROIC outputs digitized data completely eliminating the bulky, power consuming signal chains needed by conventional FPAs. The 128 X 128 pixel ROIC has been fabricated in CMOS and tested at the Jet Propulsion Laboratory. The current version is designed to be hybridized with PIN photodiode arrays via indium bump bonding for light detection in the visible and ultraviolet spectral regions. However, the ROIC design incorporates a small photodiode in each cell to permit detailed characterization of the ROICperformance without the need for hybridization. We will describe the essential features of the ROIC design and present results of ROIC performance measurements.

  11. Development of a versatile readout and test system and characterization of a capacitively coupled active pixel sensor

    Energy Technology Data Exchange (ETDEWEB)

    Janssen, Jens; Gonella, Laura; Hemperek, Tomasz; Hirono, Toko; Huegging, Fabian; Krueger, Hans; Wermes, Norbert [Institute of Physics, University of Bonn, Bonn (Germany); Peric, Ivan [Karlsruher Institut fuer Technologie, Karlsruhe (Germany); Collaboration: ATLAS-Collaboration

    2015-07-01

    With the availability of high voltage and high resistivity CMOS processes, active pixel sensors are becoming increasingly interesting for radiation detection in high energy physics experiments. Although the pixel signal-to-noise ratio and the sensor radiation tolerance were improved, active pixel sensors cannot yet compete with state-of-the-art hybrid pixel detector in a high radiation environment. Hence, active pixel sensors are possible candidates for the outer tracking detector in HEP experiments where production cost plays a role. The investigation of numerous prototyping steps and different technologies is still ongoing and requires a versatile test and readout system, which will be presented in this talk. A capacitively coupled active pixel sensor fabricated in AMS 180 nm high voltage CMOS process is investigated. The sensor is designed to be glued to existing front-end pixel readout chips. Results from the characterization are presented in this talk.

  12. Development and simulation results of a sparsification and readout circuit for wide pixel matrices

    International Nuclear Information System (INIS)

    Gabrielli, A.; Giorgi, F.; Morsani, F.; Villa, M.

    2011-01-01

    In future collider experiments, the increasing luminosity and centre of mass energy are rising challenging problems in the design of new inner tracking systems. In this context we develop high-efficiency readout architectures for large binary pixel matrices that are meant to cope with the high-stressing conditions foreseen in the innermost layers of a tracker [The SuperB Conceptual Design Report, INFN/AE-07/02, SLAC-R-856, LAL 07-15, Available online at: (http://www.pi.infn.it/SuperB)]. We model and design digital readout circuits to be integrated on VLSI ASICs. These architectures can be realized with different technology processes and sensors: they can be implemented on the same silicon sensor substrate of a CMOS MAPS devices (Monolithic Active Pixel Sensor), on the CMOS tier of a hybrid pixel sensor or in a 3D chip where the digital layer is stacked on the sensor and the analog layers [V. Re et al., Nuc. Instr. and Meth. in Phys. Res. A, (doi:10.1016/j.nima.2010.05.039)]. In the presented work, we consider a data-push architecture designed for a sensor matrix of an area of about 1.3 cm 2 with a pitch of 50 microns. The readout circuit tries to take great advantage of the high density of in-pixel digital logic allowed by vertical integration. We aim at sustaining a rate density of 100 Mtrack . s -1 . cm -2 with a temporal resolution below 1 μs. We show how this architecture can cope with these stressing conditions presenting the results of Monte Carlo simulations.

  13. Development and simulation results of a sparsification and readout circuit for wide pixel matrices

    Energy Technology Data Exchange (ETDEWEB)

    Gabrielli, A.; Giorgi, F. [University and INFN of Bologna (Italy); Morsani, F. [University and INFN of Pisa (Italy); Villa, M. [University and INFN of Bologna (Italy)

    2011-06-15

    In future collider experiments, the increasing luminosity and centre of mass energy are rising challenging problems in the design of new inner tracking systems. In this context we develop high-efficiency readout architectures for large binary pixel matrices that are meant to cope with the high-stressing conditions foreseen in the innermost layers of a tracker [The SuperB Conceptual Design Report, INFN/AE-07/02, SLAC-R-856, LAL 07-15, Available online at: (http://www.pi.infn.it/SuperB)]. We model and design digital readout circuits to be integrated on VLSI ASICs. These architectures can be realized with different technology processes and sensors: they can be implemented on the same silicon sensor substrate of a CMOS MAPS devices (Monolithic Active Pixel Sensor), on the CMOS tier of a hybrid pixel sensor or in a 3D chip where the digital layer is stacked on the sensor and the analog layers [V. Re et al., Nuc. Instr. and Meth. in Phys. Res. A, (doi:10.1016/j.nima.2010.05.039)]. In the presented work, we consider a data-push architecture designed for a sensor matrix of an area of about 1.3 cm{sup 2} with a pitch of 50 microns. The readout circuit tries to take great advantage of the high density of in-pixel digital logic allowed by vertical integration. We aim at sustaining a rate density of 100 Mtrack . s{sup -1} . cm{sup -2} with a temporal resolution below 1 {mu}s. We show how this architecture can cope with these stressing conditions presenting the results of Monte Carlo simulations.

  14. The NA62 Gigatracker: Detector properties and pixel read-out architectures

    International Nuclear Information System (INIS)

    Fiorini, M.; Carassiti, V.; Ceccucci, A.; Cortina, E.; Cotta Ramusino, A.; Dellacasa, G.; Jarron, P.; Kaplon, J.; Kluge, A.; Marchetto, F.; Martin, E.; Martoiu, S.; Mazza, G.; Noy, M.; Petrucci, F.; Riedler, P.; Rivetti, A.; Tiuraniemi, S.

    2010-01-01

    The beam spectrometer of the NA62 experiment, named Gigatracker, has to perform single track reconstruction with unprecedented time resolution (150 ps rms) in a harsh radiation environment. To meet these requirements, and in order to reduce material budget to a minimum, three hybrid silicon pixel detector stations will be installed in vacuum. An adequate strategy to compensate for the discriminator time-walk must be implemented and R and D investigating two different options is ongoing. Two read-out chip prototypes have been designed in order to compare their performance: one approach is based on the use of a constant-fraction discriminator followed by an on-pixel TDC, while the other one is based on the use of a time-over-threshold circuit followed by a TDC shared by a group of pixels. This paper describes the Gigatracker system, presents the global architectures of both read-out ASICs and reviews the current status of the R and D project.

  15. submitter Development of the readout for the IBL upgrade project of the ATLAS Pixel Detector

    CERN Document Server

    Krieger, Nina

    The LHC luminosity is upgraded in several phases until 2022. The resulting higher occupancy degrades the detector performance of the current Pixel Detector. To provide a good performance during the LHC luminosity upgrade, a fourth pixel layer is inserted into the existing ATLAS Pixel Detector. A new FE-I4 readout chip and a new data acquisition chain are required to cope with the higher track rate and the resulting increased bandwidth. Among others, this includes a new readout board: the IBL ROD. One component of this board is the DSP which creates commands for the FE-I4 chip and has to be upgraded as well. In this thesis, the first tests of the IBL ROD prototype are presented. A correct communication of the DSP to its external memory is verified. Moreover, the implementations for an IBL DSP code are described and tested. This includes the first configuration of the FE-I4 with an IBL ROD. In addition, a working communication with the Histogrammer SDRAM and the Input FIFO on the IBL ROD are demonstrated.

  16. Readout of a 176 pixel FDM system for SAFARI TES arrays

    Science.gov (United States)

    Hijmering, R. A.; den Hartog, R.; Ridder, M.; van der Linden, A. J.; van der Kuur, J.; Gao, J. R.; Jackson, B.

    2016-07-01

    In this paper we present the results of our 176-pixel prototype of the FDM readout system for SAFARI, a TES-based focal-plane instrument for the far-IR SPICA mission. We have implemented the knowledge obtained from the detailed study on electrical crosstalk reported previously. The effect of carrier leakage is reduced by a factor two, mutual impedance is reduced to below 1 nH and mutual inductance is removed. The pixels are connected in stages, one quarter of the array half of the array and the full array, to resolve intermediate technical issues. A semi-automated procedure was incorporated to find all optimal settings for all pixels. And as a final step the complete array has been connected and 132 pixels have been read out simultaneously within the frequency range of 1-3.8MHz with an average frequency separation of 16kHz. The noise was found to be detector limited and was not affected by reading out all pixels in a FDM mode. With this result the concept of using FDM for multiplexed bolometer read out for the SAFARI instrument has been demonstrated.

  17. Development of a readout technique for the high data rate BTeV pixel detector at Fermilab

    International Nuclear Information System (INIS)

    Hall, Bradley K.

    2001-01-01

    The pixel detector for the BTeV experiment at Fermilab provides digitized data from approximately 22 million silicon pixel channels. Portions of the detector are six millimeters from the beam providing a substantial hit rate and high radiation dose. The pixel detector data will be employed by the lowest level trigger system for track reconstruction every beam crossing. These requirements impose a considerable constraint on the readout scheme. This paper presents a readout technique that provides the bandwidth that is adequate for high hit rates, minimizes the number of radiation hard components, and satisfies all other design constraints

  18. Amorphous silicon pixel radiation detectors and associated thin film transistor electronics readout

    International Nuclear Information System (INIS)

    Perez-Mendez, V.; Drewery, J.; Hong, W.S.; Jing, T.; Kaplan, S.N.; Lee, H.; Mireshghi, A.

    1994-10-01

    We describe the characteristics of thin (1 μm) and thick (>30 μm) hydrogenated amorphous silicon p-i-n diodes which are optimized for detecting and recording the spatial distribution of charged particles, x-rays and γ rays. For x-ray, γ ray, and charged particle detection we can use thin p-i-n photosensitive diode arrays coupled to evaporated layers of suitable scintillators. For direct detection of charged particles with high resistance to radiation damage, we use the thick p-i-n diode arrays. Deposition techniques using helium dilution, which produce samples with low stress are described. Pixel arrays for flux exposures can be readout by transistor, single diode or two diode switches. Polysilicon charge sensitive pixel amplifiers for single event detection are described. Various applications in nuclear, particle physics, x-ray medical imaging, neutron crystallography, and radionuclide chromatography are discussed

  19. Optical readout and control interface for the BTeV pixel vertex detector

    CERN Document Server

    Vergara-Limon, S; Sheaff, M; Vargas, M A

    2002-01-01

    Optical links will be used for sending data back and forth from the counting room to the detector in the data acquisition systems for future high energy physics experiments, including ATLAS and CMS in the LHC at CERN (Switzerland) and BTeV at Fermilab (USA). This is because they can be ultra-high speed and are relatively immune to electro-magnetic interference (EMI). The baseline design for the BTeV Pixel Vertex Detector includes two types of optical link, one to control and monitor and the other to read out the hit data from the multi-chip modules on each half-plane of the detector. The design and performance of the first prototype of the Optical Readout and Control Interface for the BTeV Pixel Vertex Detector is described.

  20. Studies and development of a readout ASIC for pixelated CdTe detectors for space applications

    International Nuclear Information System (INIS)

    Michalowska, A.

    2013-01-01

    The work presented in this thesis is part of a project where a new instrument is developed: a camera for hard X-rays imaging spectroscopy. It is dedicated to fundamental research for observations in astrophysics, at wavelengths which can only be observed using space-borne instruments. In this domain the spectroscopic accuracy as well as the imaging details are of high importance. This work has been realized at CEA/IRFU (Institut de Recherche sur les lois Fondamentales de l'Univers), which has a long-standing and successful experience in instruments for high energy physics and space physics instrumentation. The objective of this thesis is the design of the readout electronics for a pixelated CdTe detector, suitable for a stacked assembly. The principal parameters of this integrated circuit are a very low noise for reaching a good accuracy in X-ray energy measurement, very low power consumption, a critical parameter in space-borne applications, and a small dead area for the full system combining the detector and the readout electronics. In this work I have studied the limits of these three parameters in order to optimize the circuit. In terms of the spectral resolution, two categories of noise had to be distinguished to determine the final performance. The first is the Fano noise limit, related to detector interaction statistics, which cannot be eliminated. The second is the electronic noise, also unavoidable; however it can be minimized through optimization of the detection chain. Within the detector, establishing a small pixel pitch of 300 μm reduces the input capacitance and the dark current. This limits the effects of the electronic noise. Also in order to limit the input capacitance the future camera is designed as a stacked assembly of the detector with the readout ASIC. This allows to reach extremely good input parameters seen by the readout electronics: a capacitance in range of 0.3 pF-1 pF and a dark current below 5 pA. In the frame of this thesis I have

  1. Results of FE65-P2 Pixel Readout Test Chip for High Luminosity LHC Upgrades

    CERN Document Server

    AUTHOR|(SzGeCERN)394193

    2016-01-01

    A pixel readout test chip called FE65-P2 has been fabricated on 65 nm CMOS technology. FE65-P2 contains a matrix of 64 x 64 pixels on 50 micron by 50 micron pitch, designed to read out a bump bonded sensor. The goals of FE65-P2 are to demonstrate excellent analog performance isolated from digital activity well enough to achieve 500 electron stable threshold, be radiation hard to at least 500 Mrad, and prove the novel concept of isolated analog front ends embedded in a flat digital design, dubbed “analog islands in a digital sea”. Experience from FE65-P2 and hybrid assemblies will be applied to the design for a large format readout chip, called RD53A, to be produced in a wafer run in early 2017 by the RD53 collaboration. We review the case for 65 nm technology and report on threshold stability test results for the FE65-P2.

  2. Characterization of the column-based priority logic readout of Topmetal-II− CMOS pixel direct charge sensor

    International Nuclear Information System (INIS)

    An, M.; Zhang, W.; Xiao, L.; Gao, C.; Chen, C.; Huang, G.; Ji, R.; Liu, J.; Pei, H.; Sun, X.; Wang, K.; Yang, P.; Zhou, W.; Han, M.; Mei, Y.; Li, X.; Sun, Q.

    2017-01-01

    We present the detailed study of the digital readout of Topmetal-II - CMOS pixel direct charge sensor. Topmetal-II - is an integrated sensor with an array of 72×72 pixels each capable of directly collecting external charge through exposed metal electrodes in the topmost metal layer. In addition to the time-shared multiplexing readout of the analog output from Charge Sensitive Amplifiers in each pixel, hits are also generated through comparators in each pixel with individually adjustable thresholds. The hits are read out via a column-based priority logic structure, retaining both hit location and time information. The in-array column-based priority logic features with a full clock-less circuitry hence there is no continuously running clock distributed in the pixel and matrix logic. These characteristics enable its use as the charge readout device in future Time Projection Chambers without gaseous gain mechanism, which has unique advantages in low background and low rate-density experiments. We studied the detailed working behavior and performance of this readout, and demonstrated its functional validity and potential in imaging applications.

  3. Amorphous silicon pixel radiation detectors and associated thin film transistor electronics readout

    International Nuclear Information System (INIS)

    Perez-Mendez, V.; Cho, G.; Drewery, J.; Jing, T.; Kaplan, S.N.; Mireshghi, A.; Wildermuth, D.; Goodman, C.; Fujieda, I.

    1992-07-01

    We describe the characteristics of thin (1 μm) and thick (> 30 μm) hydrogenated amorphous silicon p-i-n diodes which are optimized for detecting and recording the spatial distribution of charged particles, x-ray, γ rays and thermal neutrons. For x-ray, γ ray, and charged particle detection we can use thin p-i-n photosensitive diode arrays coupled to evaporated layers of suitable scintillators. For thermal neutron detection we use thin (2∼5 μm) gadolinium converters on 30 μm thick a-Si:H diodes. For direct detection of minimum ionizing particles and others with high resistance to radiation damage, we use the thick p-i-n diode arrays. Diode and amorphous silicon readouts as well as polysilicon pixel amplifiers are described

  4. Cryogenic readout for multiple VUV4 Multi-Pixel Photon Counters in liquid xenon

    Science.gov (United States)

    Arneodo, F.; Benabderrahmane, M. L.; Bruno, G.; Conicella, V.; Di Giovanni, A.; Fawwaz, O.; Messina, M.; Candela, A.; Franchi, G.

    2018-06-01

    We present the performances and characterization of an array made of S13370-3050CN (VUV4 generation) Multi-Pixel Photon Counters manufactured by Hamamatsu and equipped with a low power consumption preamplifier operating at liquid xenon temperature (∼ 175 K). The electronics is designed for the readout of a matrix of maximum dimension of 8 × 8 individual photosensors and it is based on a single operational amplifier. The detector prototype presented in this paper utilizes the Analog Devices AD8011 current feedback operational amplifier, but other models can be used depending on the application. A biasing correction circuit has been implemented for the gain equalization of photosensors operating at different voltages. The results show single photon detection capability making this device a promising choice for future generation of large scale dark matter detectors based on liquid xenon, such as DARWIN.

  5. Study of Charge Diffusion in a Silicon Detector Using an Energy Sensitive Pixel Readout Chip

    CERN Document Server

    Schioppa, E. J.; van Beuzekom, M.; Visser, J.; Koffeman, E.; Heijne, E.; Engel, K. J.; Uher, J.

    2015-01-01

    A 300 μm thick thin p-on-n silicon sensor was connected to an energy sensitive pixel readout ASIC and exposed to a beam of highly energetic charged particles. By exploiting the spectral information and the fine segmentation of the detector, we were able to measure the evolution of the transverse profile of the charge carriers cloud in the sensor as a function of the drift distance from the point of generation. The result does not rely on model assumptions or electric field calculations. The data are also used to validate numerical simulations and to predict the detector spectral response to an X-ray fluorescence spectrum for applications in X-ray imaging.

  6. Test beam analysis of ultra-thin hybrid pixel detector assemblies with Timepix readout ASICs

    CERN Document Server

    Alipour Tehrani, Niloufar; Dannheim, Dominik; Firu, Elena; Kulis, Szymon; Redford, Sophie; Sicking, Eva

    2016-01-01

    The requirements for the vertex detector at the proposed Compact Linear Collider imply a very small material budget: less than 0.2% of a radiation length per detection layer including services and mechanical supports. We present here a study using Timepix readout ASICs hybridised to pixel sensors of 50 − 500 μm thickness, including assemblies with 100 μm thick sensors bonded to thinned 100μm thick ASICs. Sensors from three producers (Advacam, Micron Semiconductor Ltd, Canberra) with different edge termination technologies (active edge, slim edge) were bonded to Timepix ASICs. These devices were characterised with the EUDET telescope at the DESY II test beam using 5.6 GeV electrons. Their performance for the detection and tracking of minimum ionising particles was evaluated in terms of charge sharing, detection efficiency, single-point resolution and energy deposition.

  7. A 10 MHz micropower CMOS front end for direct readout of pixel detectors

    International Nuclear Information System (INIS)

    Campbell, M.; Heijne, E.H.M.; Jarron, P.; Krummenacher, F.; Enz, C.C.; Declercq, M.; Vittoz, E.; Viertel, G.

    1990-01-01

    In the framework of the CERN-LAA project for detector R and D, a micropower circuit of 200 μmx200 μm with a current amplifier, a latched comparator and a digital memory element has been tested electrically and operated in connection with linear silicon detector arrays. The experimental direct-readout (DRO) chip comprises a matrix of 9x12 circuit cells and has been manufactured in a 3 μm CMOS technology. Particles and X-ray photons below 22 keV were detected, and thresholds can be set between 2000 and 20000 e - . The noise is less than 4 keV FWHM or 500 e - rms and the power dissipation per pixel element is 30 μW. The chip can be coupled to a detector matrix using bump bonding. (orig.)

  8. Spectroscopic measurements with the ATLAS FE-I4 pixel readout chip

    Energy Technology Data Exchange (ETDEWEB)

    Pohl, David-Leon; Janssen, Jens; Hemperek, Tomasz; Huegging, Fabian; Wermes, Norbert [Physikalisches Institut der Univeristaet Bonn (Germany)

    2015-07-01

    The ATLAS FE-I4 pixel readout chip is a large (2 x 2 cm{sup 2}) state of the art ASIC used in high energy physics experiments as well as for research and development purposes. While the FE-I4 is optimized for high hit rates it provides very limited charge resolution. Therefore two methods were developed to obtain high resolution single pixel charge spectra with the ATLAS FE-I4. The first method relies on the ability to change the detection threshold in small steps while counting hits from a particle source and has a resolution limited by electronic noise only. The other method uses a FPGA based time-to-digital-converter to digitize the analog charge signal with high precision. The feasibility, performance and challenges of these methods are discussed. First results of sensor characterizations from radioactive sources and test beams with the ATLAS FE-I4 in view of the charge collection efficiency after irradiation are presented.

  9. Frequency-multiplexed bias and readout of a 16-pixel superconducting nanowire single-photon detector array

    Science.gov (United States)

    Doerner, S.; Kuzmin, A.; Wuensch, S.; Charaev, I.; Boes, F.; Zwick, T.; Siegel, M.

    2017-07-01

    We demonstrate a 16-pixel array of microwave-current driven superconducting nanowire single-photon detectors with an integrated and scalable frequency-division multiplexing architecture, which reduces the required number of bias and readout lines to a single microwave feed line. The electrical behavior of the photon-sensitive nanowires, embedded in a resonant circuit, as well as the optical performance and timing jitter of the single detectors is discussed. Besides the single pixel measurements, we also demonstrate the operation of a 16-pixel array with a temporal, spatial, and photon-number resolution.

  10. A 2D 4×4 Channel Readout ASIC for Pixelated CdTe Detectors for Medical Imaging Applications.

    Science.gov (United States)

    Macias-Montero, Jose-Gabriel; Sarraj, Maher; Chmeissani, Mokhtar; Martínez, Ricardo; Puigdengoles, Carles

    2015-10-01

    We present a 16-channel readout integrated circuit (ROIC) with nanosecond-resolution time to digital converter (TDC) for pixelated Cadmium Telluride (CdTe) gamma-ray detectors. The 4 × 4 pixel array ROIC is the proof of concept of the 10 × 10 pixel array readout ASIC for positron-emission tomography (PET) scanner, positron-emission mammography (PEM) scanner, and Compton gamma camera. The electronics of each individual pixel integrates an analog front-end with switchable gain, an analog to digital converter (ADC), configuration registers, and a 4-state digital controller. For every detected photon, the pixel electronics provides the energy deposited in the detector with 10-bit resolution, and a fast trigger signal for time stamp. The ASIC contains the 16-pixel matrix electronics, a digital controller, five global voltage references, a TDC, a temperature sensor, and a band-gap based current reference. The ASIC has been fabricated with TSMC 0.25 μ m mixed-signal CMOS technology and occupies an area of 5.3 mm × 6.8 mm. The TDC shows a resolution of 95.5 ps, a precision of 600 ps at full width half maximum (FWHM), and a power consumption of 130 μ W. In acquisition mode, the total power consumption of every pixel is 200 μ W. An equivalent noise charge (ENC) of 160 e - RMS at maximum gain and negative polarity conditions has been measured at room temperature.

  11. First operation of a hybrid photon detector prototype with electrostatic cross-focussing and integrated silicon pixel readout

    International Nuclear Information System (INIS)

    Alemi, M.; Campbell, M.; Gys, T.; Mikulec, B.; Piedigrossi, D.; Puertolas, D.; Rosso, E.; Schomaker, R.; Snoeys, W.; Wyllie, K.

    2000-01-01

    We report on the first operation of a hybrid photon detector prototype with integrated silicon pixel readout for the ring imaging Cherenkov detectors of the LHCb experiment. The photon detector is based on a cross-focussed image intensifier tube geometry where the image is de-magnified by a factor of 4. The anode consists of a silicon pixel array, bump-bonded to a binary readout chip with matching pixel electronics. The prototype has been characterized using a low-intensity light-emitting diode operated in pulsed mode. Its performance in terms of single-photoelectron detection efficiency and imaging properties is presented. A model of photoelectron detection is proposed, and is shown to be in good agreement with the experimental data. It includes an estimate of the charge signal generated in the silicon detector, and the combined effects of the comparator threshold spread of the pixel readout chip, charge sharing at the pixel boundaries and back-scattering of the photoelectrons at the silicon detector surface

  12. First operation of a hybrid photon detector prototype with electrostatic cross-focussing and integrated silicon pixel readout

    Energy Technology Data Exchange (ETDEWEB)

    Alemi, M.; Campbell, M.; Gys, T. E-mail: thierry.gys@cern.ch; Mikulec, B.; Piedigrossi, D.; Puertolas, D.; Rosso, E.; Schomaker, R.; Snoeys, W.; Wyllie, K

    2000-07-11

    We report on the first operation of a hybrid photon detector prototype with integrated silicon pixel readout for the ring imaging Cherenkov detectors of the LHCb experiment. The photon detector is based on a cross-focussed image intensifier tube geometry where the image is de-magnified by a factor of 4. The anode consists of a silicon pixel array, bump-bonded to a binary readout chip with matching pixel electronics. The prototype has been characterized using a low-intensity light-emitting diode operated in pulsed mode. Its performance in terms of single-photoelectron detection efficiency and imaging properties is presented. A model of photoelectron detection is proposed, and is shown to be in good agreement with the experimental data. It includes an estimate of the charge signal generated in the silicon detector, and the combined effects of the comparator threshold spread of the pixel readout chip, charge sharing at the pixel boundaries and back-scattering of the photoelectrons at the silicon detector surface.

  13. Macro Pixel ASIC (MPA): The readout ASIC for the pixel-strip (PS) module of the CMS outer tracker at HL-LHC

    CERN Document Server

    Ceresa, Davide; Kloukinas, Konstantinos; Jan Kaplon; Bialas, Wojciech; Re, Valerio; Traversi, Gianluca; Gaioni, Luigi; Ratti, Lodovico

    2014-01-01

    The CMS tracker at HL-LHC is required to provide prompt information on particles with high transverse momentum to the central Level\\,1 trigger. For this purpose, the innermost part of the outer tracker is based on a combination of a pixelated sensor with a short strip sensor, the so-called Pixel-Strip module (PS). The readout of these sensors is carried out by distinct ASICs, the Strip Sensor ASIC (SSA), for the strip layer, and the Macro Pixel ASIC (MPA) for the pixel layer. The processing of the data directly on the front-end module represents a design challenge due to the large data volume (30720\\,pixels and 1920\\,strips per module) and the limited power budget. This is the reason why several studies have been carried out to find the best compromise between ASICs performance and power consumption. This paper describes the current status of the MPA ASIC development where the logic for generating prompt information on particles with high transverse momentum is implemented. An overview of the readout method i...

  14. Low-power priority Address-Encoder and Reset-Decoder data-driven readout for Monolithic Active Pixel Sensors for tracker system

    Science.gov (United States)

    Yang, P.; Aglieri, G.; Cavicchioli, C.; Chalmet, P. L.; Chanlek, N.; Collu, A.; Gao, C.; Hillemanns, H.; Junique, A.; Kofarago, M.; Keil, M.; Kugathasan, T.; Kim, D.; Kim, J.; Lattuca, A.; Marin Tobon, C. A.; Marras, D.; Mager, M.; Martinengo, P.; Mazza, G.; Mugnier, H.; Musa, L.; Puggioni, C.; Rousset, J.; Reidt, F.; Riedler, P.; Snoeys, W.; Siddhanta, S.; Usai, G.; van Hoorne, J. W.; Yi, J.

    2015-06-01

    Active Pixel Sensors used in High Energy Particle Physics require low power consumption to reduce the detector material budget, low integration time to reduce the possibilities of pile-up and fast readout to improve the detector data capability. To satisfy these requirements, a novel Address-Encoder and Reset-Decoder (AERD) asynchronous circuit for a fast readout of a pixel matrix has been developed. The AERD data-driven readout architecture operates the address encoding and reset decoding based on an arbitration tree, and allows us to readout only the hit pixels. Compared to the traditional readout structure of the rolling shutter scheme in Monolithic Active Pixel Sensors (MAPS), AERD can achieve a low readout time and a low power consumption especially for low hit occupancies. The readout is controlled at the chip periphery with a signal synchronous with the clock, allows a good digital and analogue signal separation in the matrix and a reduction of the power consumption. The AERD circuit has been implemented in the TowerJazz 180 nm CMOS Imaging Sensor (CIS) process with full complementary CMOS logic in the pixel. It works at 10 MHz with a matrix height of 15 mm. The energy consumed to read out one pixel is around 72 pJ. A scheme to boost the readout speed to 40 MHz is also discussed. The sensor chip equipped with AERD has been produced and characterised. Test results including electrical beam measurement are presented.

  15. Low-power priority Address-Encoder and Reset-Decoder data-driven readout for Monolithic Active Pixel Sensors for tracker system

    International Nuclear Information System (INIS)

    Yang, P.; Aglieri, G.; Cavicchioli, C.; Chalmet, P.L.; Chanlek, N.; Collu, A.; Gao, C.; Hillemanns, H.; Junique, A.; Kofarago, M.; Keil, M.; Kugathasan, T.; Kim, D.; Kim, J.; Lattuca, A.; Marin Tobon, C.A.; Marras, D.; Mager, M.; Martinengo, P.; Mazza, G.

    2015-01-01

    Active Pixel Sensors used in High Energy Particle Physics require low power consumption to reduce the detector material budget, low integration time to reduce the possibilities of pile-up and fast readout to improve the detector data capability. To satisfy these requirements, a novel Address-Encoder and Reset-Decoder (AERD) asynchronous circuit for a fast readout of a pixel matrix has been developed. The AERD data-driven readout architecture operates the address encoding and reset decoding based on an arbitration tree, and allows us to readout only the hit pixels. Compared to the traditional readout structure of the rolling shutter scheme in Monolithic Active Pixel Sensors (MAPS), AERD can achieve a low readout time and a low power consumption especially for low hit occupancies. The readout is controlled at the chip periphery with a signal synchronous with the clock, allows a good digital and analogue signal separation in the matrix and a reduction of the power consumption. The AERD circuit has been implemented in the TowerJazz 180 nm CMOS Imaging Sensor (CIS) process with full complementary CMOS logic in the pixel. It works at 10 MHz with a matrix height of 15 mm. The energy consumed to read out one pixel is around 72 pJ. A scheme to boost the readout speed to 40 MHz is also discussed. The sensor chip equipped with AERD has been produced and characterised. Test results including electrical beam measurement are presented

  16. Low-power priority Address-Encoder and Reset-Decoder data-driven readout for Monolithic Active Pixel Sensors for tracker system

    Energy Technology Data Exchange (ETDEWEB)

    Yang, P., E-mail: yangping0710@126.com [Central China Normal University, Wuhan (China); Aglieri, G.; Cavicchioli, C. [CERN, 1210 Geneva 23 (Switzerland); Chalmet, P.L. [MIND, Archamps (France); Chanlek, N. [Suranaree University of Technology, Nakhon Ratchasima (Thailand); Collu, A. [University of Cagliari, Cagliari (Italy); INFN (Italy); Gao, C. [Central China Normal University, Wuhan (China); Hillemanns, H.; Junique, A. [CERN, 1210 Geneva 23 (Switzerland); Kofarago, M. [CERN, 1210 Geneva 23 (Switzerland); University of Utrecht, Utrecht (Netherlands); Keil, M.; Kugathasan, T. [CERN, 1210 Geneva 23 (Switzerland); Kim, D. [Dongguk and Yonsei University, Seoul (Korea, Republic of); Kim, J. [Pusan National University, Busan (Korea, Republic of); Lattuca, A. [University of Torino, Torino (Italy); INFN (Italy); Marin Tobon, C.A. [CERN, 1210 Geneva 23 (Switzerland); Marras, D. [University of Cagliari, Cagliari (Italy); INFN (Italy); Mager, M.; Martinengo, P. [CERN, 1210 Geneva 23 (Switzerland); Mazza, G. [University of Torino, Torino (Italy); INFN (Italy); and others

    2015-06-11

    Active Pixel Sensors used in High Energy Particle Physics require low power consumption to reduce the detector material budget, low integration time to reduce the possibilities of pile-up and fast readout to improve the detector data capability. To satisfy these requirements, a novel Address-Encoder and Reset-Decoder (AERD) asynchronous circuit for a fast readout of a pixel matrix has been developed. The AERD data-driven readout architecture operates the address encoding and reset decoding based on an arbitration tree, and allows us to readout only the hit pixels. Compared to the traditional readout structure of the rolling shutter scheme in Monolithic Active Pixel Sensors (MAPS), AERD can achieve a low readout time and a low power consumption especially for low hit occupancies. The readout is controlled at the chip periphery with a signal synchronous with the clock, allows a good digital and analogue signal separation in the matrix and a reduction of the power consumption. The AERD circuit has been implemented in the TowerJazz 180 nm CMOS Imaging Sensor (CIS) process with full complementary CMOS logic in the pixel. It works at 10 MHz with a matrix height of 15 mm. The energy consumed to read out one pixel is around 72 pJ. A scheme to boost the readout speed to 40 MHz is also discussed. The sensor chip equipped with AERD has been produced and characterised. Test results including electrical beam measurement are presented.

  17. Performance of hybrid photon detector prototypes with encapsulated silicon pixel detector and readout for the RICH counters of LHCb

    International Nuclear Information System (INIS)

    Campbell, M.; George, K.A.; Girone, M.; Gys, T.; Jolly, S.; Piedigrossi, D.; Riedler, P.; Rozema, P.; Snoeys, W.; Wyllie, K.

    2003-01-01

    These proceedings report on the performance of the latest prototype pixel hybrid photon detector in preparation for the LHCb Ring Imaging Cherenkov detectors. The prototype encapsulates a silicon pixel detector bump-bonded to a binary read-out chip with short (25 ns) peaking time and low ( - ) detection threshold. A brief description of the prototype is given, followed by the preliminary results of the characterisation of the prototype behaviour when tested using a low intensity pulsed light emitting diode. The results obtained are in good agreement with those obtained using previous prototypes. The proceedings conclude with a summary of the current status and future plans

  18. arXiv Characterization and Verification Environment for the RD53A Pixel Readout Chip in 65 nm CMOS

    CERN Document Server

    Vogt, M.; Hemperek, T.; Janssen, J.; Pohl, D.L.; Daas, M.

    2018-02-02

    The RD53 collaboration is currently designing a large scale prototype pixel readout chip in 65 nm CMOS technology for the phase 2 upgrades at the HL-LHC. The RD53A chip will be available by the end of the year 2017 and will be extensively tested to confirm if the circuit and the architecture make a solid foundation for the final pixel readout chips for the experiments at the HL-LHC. A test and data acquisition system for the RD53A chip is currently under development to perform single-chip and multi-chip module measurements. In addition, the verification of the RD53A design is performed in a dedicated simulation environment. The concept and the implementation of the test and data acquisition system and the simulation environment, which are based on a modular data acquisition and system testing framework, are presented in this work.

  19. A High-Speed, Event-Driven, Active Pixel Sensor Readout for Photon-Counting Microchannel Plate Detectors

    Science.gov (United States)

    Kimble, Randy A.; Pain, Bedabrata; Norton, Timothy J.; Haas, J. Patrick; Oegerle, William R. (Technical Monitor)

    2002-01-01

    Silicon array readouts for microchannel plate intensifiers offer several attractive features. In this class of detector, the electron cloud output of the MCP intensifier is converted to visible light by a phosphor; that light is then fiber-optically coupled to the silicon array. In photon-counting mode, the resulting light splashes on the silicon array are recognized and centroided to fractional pixel accuracy by off-chip electronics. This process can result in very high (MCP-limited) spatial resolution while operating at a modest MCP gain (desirable for dynamic range and long term stability). The principal limitation of intensified CCD systems of this type is their severely limited local dynamic range, as accurate photon counting is achieved only if there are not overlapping event splashes within the frame time of the device. This problem can be ameliorated somewhat by processing events only in pre-selected windows of interest of by using an addressable charge injection device (CID) for the readout array. We are currently pursuing the development of an intriguing alternative readout concept based on using an event-driven CMOS Active Pixel Sensor. APS technology permits the incorporation of discriminator circuitry within each pixel. When coupled with suitable CMOS logic outside the array area, the discriminator circuitry can be used to trigger the readout of small sub-array windows only when and where an event splash has been detected, completely eliminating the local dynamic range problem, while achieving a high global count rate capability and maintaining high spatial resolution. We elaborate on this concept and present our progress toward implementing an event-driven APS readout.

  20. Study of multi-pixel Geiger-mode avalanche photodiodes as a read-out for PET

    CERN Document Server

    Musienko, Yuri; Lecoq, Paul; Reucroft, Stephen; Swain, John; Trummer, Julia

    2007-01-01

    We have studied the performance of two multi-pixel Geiger-mode APDs (recently developed by the Centre of Perspective Technologies and Apparatus (CPTA) in Moscow) with 1×1 mm2 and 3×3 mm2 sensitive area as a readout for LSO and LYSO scintillator crystals. Energy and timing spectra were measured using a 22Na γ-source. The results of this study allow us to conclude that this photodetector is a very promising candidate for PET applications.

  1. Development and characterization of diamond and 3D-silicon pixel detectors with ATLAS-pixel readout electronics

    Energy Technology Data Exchange (ETDEWEB)

    Mathes, Markus

    2008-12-15

    Hybrid pixel detectors are used for particle tracking in the innermost layers of current high energy experiments like ATLAS. After the proposed luminosity upgrade of the LHC, they will have to survive very high radiation fluences of up to 10{sup 16} particles per cm{sup 2} per life time. New sensor concepts and materials are required, which promise to be more radiation tolerant than the currently used planar silicon sensors. Most prominent candidates are so-called 3D-silicon and single crystal or poly-crystalline diamond sensors. Using the ATLAS pixel electronics different detector prototypes with a pixel geometry of 400 x 50 {mu}m{sup 2} have been built. In particular three devices have been studied in detail: a 3D-silicon and a single crystal diamond detector with an active area of about 1 cm{sup 2} and a poly-crystalline diamond detector of the same size as a current ATLAS pixel detector module (2 x 6 cm{sup 2}). To characterize the devices regarding their particle detection efficiency and spatial resolution, the charge collection inside a pixel cell as well as the charge sharing between adjacent pixels was studied using a high energy particle beam. (orig.)

  2. Development and characterization of diamond and 3D-silicon pixel detectors with ATLAS-pixel readout electronics

    International Nuclear Information System (INIS)

    Mathes, Markus

    2008-12-01

    Hybrid pixel detectors are used for particle tracking in the innermost layers of current high energy experiments like ATLAS. After the proposed luminosity upgrade of the LHC, they will have to survive very high radiation fluences of up to 10 16 particles per cm 2 per life time. New sensor concepts and materials are required, which promise to be more radiation tolerant than the currently used planar silicon sensors. Most prominent candidates are so-called 3D-silicon and single crystal or poly-crystalline diamond sensors. Using the ATLAS pixel electronics different detector prototypes with a pixel geometry of 400 x 50 μm 2 have been built. In particular three devices have been studied in detail: a 3D-silicon and a single crystal diamond detector with an active area of about 1 cm 2 and a poly-crystalline diamond detector of the same size as a current ATLAS pixel detector module (2 x 6 cm 2 ). To characterize the devices regarding their particle detection efficiency and spatial resolution, the charge collection inside a pixel cell as well as the charge sharing between adjacent pixels was studied using a high energy particle beam. (orig.)

  3. Design of a current based readout chip and development of a DEPFET pixel prototype system for the ILC vertex detector

    International Nuclear Information System (INIS)

    Trimpl, M.

    2005-12-01

    The future TeV-scale linear collider ILC (International Linear Collider) offers a large variety of precision measurements complementary to the discovery potential of the LHC (Large Hadron Collider). To fully exploit its physics potential, a vertex detector with unprecedented performance is needed. One proposed technology for the ILC vertex detector is the DEPFET active pixel sensor. The DEPFET sensor offers particle detection with in-pixel amplification by incorporating a field effect transistor into a fully depleted high-ohmic silicon substrate. The device provides an excellent signal-to-noise ratio and a good spatial resolution at the same time. To establish a very fast readout of a DEPFET pixel matrix with row rates of 20 MHz and more, the 128 channel CURO II ASIC has been designed and fabricated. The architecture of the chip is completely based on current mode techniques (SI) perfectly adapted to the current signal of the sensor. For the ILC vertex detector a prototype system with a 64 x 128 DEPFET pixel matrix read out by the CURO II chip has been developed. The design issues and the standalone performance of the readout chip as well as first results with the prototype system will be presented. (orig.)

  4. Design of a current based readout chip and development of a DEPFET pixel prototype system for the ILC vertex detector

    Energy Technology Data Exchange (ETDEWEB)

    Trimpl, M.

    2005-12-15

    The future TeV-scale linear collider ILC (International Linear Collider) offers a large variety of precision measurements complementary to the discovery potential of the LHC (Large Hadron Collider). To fully exploit its physics potential, a vertex detector with unprecedented performance is needed. One proposed technology for the ILC vertex detector is the DEPFET active pixel sensor. The DEPFET sensor offers particle detection with in-pixel amplification by incorporating a field effect transistor into a fully depleted high-ohmic silicon substrate. The device provides an excellent signal-to-noise ratio and a good spatial resolution at the same time. To establish a very fast readout of a DEPFET pixel matrix with row rates of 20 MHz and more, the 128 channel CURO II ASIC has been designed and fabricated. The architecture of the chip is completely based on current mode techniques (SI) perfectly adapted to the current signal of the sensor. For the ILC vertex detector a prototype system with a 64 x 128 DEPFET pixel matrix read out by the CURO II chip has been developed. The design issues and the standalone performance of the readout chip as well as first results with the prototype system will be presented. (orig.)

  5. A pixel read-out architecture implementing a two-stage token ring, zero suppression and compression

    International Nuclear Information System (INIS)

    Heuvelmans, S; Boerrigter, M

    2011-01-01

    Increasing luminosity in high energy physics experiments leads to new challenges in the design of data acquisition systems for pixel detectors. With the upgrade of the LHCb experiment, the data processing will be changed; hit data from every collision will be transported off the pixel chip, without any trigger selection. A read-out architecture is proposed which is able to obtain low hit data loss on limited silicon area by using the logic beneath the pixels as a data buffer. Zero suppression and redundancy reduction ensure that the data rate off chip is minimized. A C++ model has been created for simulation of functionality and data loss, and for system development. A VHDL implementation has been derived from this model.

  6. A pixel read-out architecture implementing a two-stage token ring, zero suppression and compression

    Energy Technology Data Exchange (ETDEWEB)

    Heuvelmans, S; Boerrigter, M, E-mail: sander.heuvelmans@bruco.nl [Bruco integrated circuits BV, Oostermaat 2, 7623 CS (Netherlands)

    2011-01-15

    Increasing luminosity in high energy physics experiments leads to new challenges in the design of data acquisition systems for pixel detectors. With the upgrade of the LHCb experiment, the data processing will be changed; hit data from every collision will be transported off the pixel chip, without any trigger selection. A read-out architecture is proposed which is able to obtain low hit data loss on limited silicon area by using the logic beneath the pixels as a data buffer. Zero suppression and redundancy reduction ensure that the data rate off chip is minimized. A C++ model has been created for simulation of functionality and data loss, and for system development. A VHDL implementation has been derived from this model.

  7. Research of high speed data readout and pre-processing system based on xTCA for silicon pixel detector

    International Nuclear Information System (INIS)

    Zhao Jingzhou; Lin Haichuan; Guo Fang; Liu Zhen'an; Xu Hao; Gong Wenxuan; Liu Zhao

    2012-01-01

    As the development of the detector, Silicon pixel detectors have been widely used in high energy physics experiments. It needs data processing system with high speed, high bandwidth and high availability to read data from silicon pixel detectors which generate more large data. The same question occurs on Belle II Pixel Detector which is a new style silicon pixel detector used in SuperKEKB accelerator with high luminance. The paper describes the research of High speed data readout and pre-processing system based on xTCA for silicon pixel detector. The system consists of High Performance Computer Node (HPCN) based on xTCA and ATCA frame. The HPCN consists of 4XFPs based on AMC, 1 AMC Carrier ATCA Board (ACAB) and 1 Rear Transmission Module. It characterized by 5 high performance FPGAs, 16 fiber links based on RocketIO, 5 Gbit Ethernet ports and DDR2 with capacity up to 18GB. In a ATCA frame, 14 HPCNs make up a system using the high speed backplane to achieve the function of data pre-processing and trigger. This system will be used on the trigger and data acquisition system of Belle II Pixel detector. (authors)

  8. First functionality tests of a 64 × 64 pixel DSSC sensor module connected to the complete ladder readout

    Science.gov (United States)

    Donato, M.; Hansen, K.; Kalavakuru, P.; Kirchgessner, M.; Kuster, M.; Porro, M.; Reckleben, C.; Turcato, M.

    2017-03-01

    The European X-ray Free Electron Laser (XFEL.EU) will provide every 0.1 s a train of 2700 spatially coherent ultrashort X-ray pulses at 4.5 MHz repetition rate. The Small Quantum Systems (SQS) instrument and the Spectroscopy and Coherent Scattering instrument (SCS) operate with soft X-rays between 0.5 keV-6 keV. The DEPFET Sensor with Signal Compression (DSSC) detector is being developed to meet the requirements set by these two XFEL.EU instruments. The DSSC imager is a 1 mega-pixel camera able to store up to 800 single-pulse images per train. The so-called ladder is the basic unit of the DSSC detector. It is the single unit out of sixteen identical-units composing the DSSC-megapixel camera, containing all representative electronic components of the full-size system and allows testing the full electronic chain. Each DSSC ladder has a focal plane sensor with 128× 512 pixels. The read-out ASIC provides full-parallel readout of the sensor pixels. Every read-out channel contains an amplifier and an analog filter, an up-to 9 bit ADC and the digital memory. The ASIC amplifier have a double front-end to allow one to use either DEPFET sensors or Mini-SDD sensors. In the first case, the signal compression is a characteristic intrinsic of the sensor; in the second case, the compression is implemented at the first amplification stage. The goal of signal compression is to meet the requirement of single-photon detection capability and wide dynamic range. We present the first results of measurements obtained using a 64× 64 pixel DEPFET sensor attached to the full final electronic and data-acquisition chain.

  9. Development and Characterization of Diamond and 3D-Silicon Pixel Detectors with ATLAS-Pixel Readout Electronics

    CERN Document Server

    Mathes, Markus

    2008-01-01

    Hybrid pixel detectors are used for particle tracking in the innermost layers of current high energy experiments like ATLAS. After the proposed luminosity upgrade of the LHC, they will have to survive very high radiation fluences of up to 10^16 particles per cm^2 per life time. New sensor concepts and materials are required, which promise to be more radiation tolerant than the currently used planar silicon sensors. Most prominent candidates are so-called 3D-silicon and single crystal or poly-crystalline diamond sensors. Using the ATLAS pixel electronics different detector prototypes with a pixel geometry of 400 × 50 um^2 have been built. In particular three devices have been studied in detail: a 3D-silicon and a single crystal diamond detector with an active area of about 1 cm^2 and a poly-crystalline diamond detector of the same size as a current ATLAS pixel detector module (2 × 6 cm^2). To characterize the devices regarding their particle detection efficiency and spatial resolution, the charge collection ...

  10. Depleted fully monolithic CMOS pixel detectors using a column based readout architecture for the ATLAS Inner Tracker upgrade

    Science.gov (United States)

    Wang, T.; Barbero, M.; Berdalovic, I.; Bespin, C.; Bhat, S.; Breugnon, P.; Caicedo, I.; Cardella, R.; Chen, Z.; Degerli, Y.; Egidos, N.; Godiot, S.; Guilloux, F.; Hemperek, T.; Hirono, T.; Krüger, H.; Kugathasan, T.; Hügging, F.; Marin Tobon, C. A.; Moustakas, K.; Pangaud, P.; Schwemling, P.; Pernegger, H.; Pohl, D.-L.; Rozanov, A.; Rymaszewski, P.; Snoeys, W.; Wermes, N.

    2018-03-01

    Depleted monolithic active pixel sensors (DMAPS), which exploit high voltage and/or high resistivity add-ons of modern CMOS technologies to achieve substantial depletion in the sensing volume, have proven to have high radiation tolerance towards the requirements of ATLAS in the high-luminosity LHC era. DMAPS integrating fast readout architectures are currently being developed as promising candidates for the outer pixel layers of the future ATLAS Inner Tracker, which will be installed during the phase II upgrade of ATLAS around year 2025. In this work, two DMAPS prototype designs, named LF-Monopix and TJ-Monopix, are presented. LF-Monopix was fabricated in the LFoundry 150 nm CMOS technology, and TJ-Monopix has been designed in the TowerJazz 180 nm CMOS technology. Both chips employ the same readout architecture, i.e. the column drain architecture, whereas different sensor implementation concepts are pursued. The paper makes a joint description of the two prototypes, so that their technical differences and challenges can be addressed in direct comparison. First measurement results for LF-Monopix will also be shown, demonstrating for the first time a fully functional fast readout DMAPS prototype implemented in the LFoundry technology.

  11. Readout and characterisation of new silicon pixel photodiode array for use in PET

    International Nuclear Information System (INIS)

    Hooper, P.; Ward, G.; Lerch, R.; Rozenfeld, A.

    2002-01-01

    Full text: Positron emission tomography (PET) is a functional imaging tool, which is able to quantify physiological, and biochemical processes in vivo using short-lived cyclotron-produced radiotracers. The main physical principle of PET is the simultaneous measurement of two 511 keV photons which are emitted in opposite directions following the annihilation of a positron in tissue. The accuracy of tracking these photons determines the accuracy of localising the radiotracer in the body, which is referred to as the spatial resolution of the system. Compared with conventional single photon imaging with gamma cameras, PET provides superior spatial resolution and sensitivity. However, compared with anatomical imaging techniques, the spatial resolution remains relatively poor at approximately 4-6 mm full width at half maximum (FWHM), compared with 1 mm FWHM for MRI. The Centre for Medical Radiation Physics at the University of Wollongong is developing a new Positron Emission Tomography (PET) detection sub-module that will significantly improve the spatial resolution of PET. The new sub-module design is simple and robust to minimise module assembly complications and is completely independent of photomultiplier tubes. The new sub-module has also been designed to maximise its flexibility for easy sub-module coupling so as to form a complete, customised, detection module to be used in PET scanners dedicated to human brain and breast, and small animal studies. A new computer controlled gantry allows the system to be used for PET and SPECT applications. Silicon 8x8 detector arrays have been developed by CMRP and will be optically coupled scintillation crystals and readout using the VIKING tM hybrid preamplifier chip to form the basis of the new module Characterisation of the pixel photodiode array has been performed to check the uniformity of the response of the array. This characterisation has been done using a pulsed, near infra-red laser diode system and alpha particles

  12. Comparison of three resistor network division circuits for the readout of 4×4 pixel SiPM arrays

    International Nuclear Information System (INIS)

    Stratos, David; Maria, Georgiou; Eleftherios, Fysikopoulos; George, Loudos

    2013-01-01

    The purpose of this study is to investigate the behavior of a flexible SensL's silicon photomultiplier array (SPMArray4) photodetector for possible applications in PET imaging. We have designed and evaluated three different resistor network division circuits to read out the signal outputs of a 4×4 pixel SiPM array. We have applied firstly (i) a symmetric resistive voltage division circuit, secondly (ii) a symmetric resistive charge division circuit and thirdly (iii) a charge division multiplexing resistor network reducing the 16 pixel outputs to 4 position signals. In the first circuit the SensL SPMArray4-A0 preamplification electronics and a SPMArray4-A1 evaluation board providing the 16 pixels voltage outputs were used, before the symmetric resistive voltage network. We reduced the 16 voltage signals firstly to 4X and 4Y coordinate signals. Then those signals were further reduced to 2X and 2Y position signals connected via a resistor network. In the second readout circuit we have used the same technique but without the preamplification stage. The third circuit is based on a discretized positioning circuit, which multiplexes the 16 signals from the SiPM array to 4 position signals. The 4 position signals (Xa, Xb, Yc and Yd) were digitized using a free running sampling technique. An FPGA (Spartan 6 LX16) was used for triggering and signal processing of the pulses. We acquired raw images and energy histograms of a BGO and a CsI:Na pixilated scintillator under 22 Na excitation. A clear visualization of the discrete 2×2×5 mm 3 pixilated BGO scintillator elements as well as the 1×1×5 mm 3 pixilated CsI:Na crystal array was achieved with all applied readout circuits. The symmetric resistive charge division circuit provides higher peak to valley ratio than the other readout circuits. Τhe sensitivity and the energy resolution remained almost constant for the three circuits

  13. The TDCpix readout ASIC: A 75 ps resolution timing front-end for the NA62 Gigatracker hybrid pixel detector

    Energy Technology Data Exchange (ETDEWEB)

    Kluge, A., E-mail: alexander.kluge@cern.ch; Aglieri Rinella, G.; Bonacini, S.; Jarron, P.; Kaplon, J.; Morel, M.; Noy, M.; Perktold, L.; Poltorak, K.

    2013-12-21

    The TDCpix is a novel pixel readout ASIC for the NA62 Gigatracker detector. NA62 is a new experiment being installed at the CERN Super Proton Synchrotron. Its Gigatracker detector shall provide on-beam tracking and time stamping of individual particles with a time resolution of 150 ps rms. It will consist of three tracking stations, each with one hybrid pixel sensor. The peak flow of particles crossing the detector modules reaches 1.27 MHz/mm{sup 2} for a total rate of about 0.75 GHz. Ten TDCpix chips will be bump-bonded to every silicon pixel sensor. Each chip shall perform time stamping of 100 M particle hits per second with a detection efficiency above 99% and a timing accuracy better than 200 ps rms for an overall three-station-setup time resolution of better than 150 ps. The TDCpix chip has been designed in a 130 nm CMOS technology. It will feature 45×40 square pixels of 300×300μm{sup 2} and a complex End of Column peripheral region including an array of TDCs based on DLLs, four high speed serializers, a low-jitter PLL, readout and control circuits. This contribution will describe the complete design of the final TDCpix ASIC. It will discuss design choices, the challenges faced and some of the lessons learned. Furthermore, experimental results from the testing of circuit prototypes will be presented. These demonstrate the achievement of key performance figures such as a time resolution of the processing chain of 75 ps rms with a laser sent to the center of the pixel and the capability of time stamping charged particles with an overall resolution below 200 ps rms. -- Highlights: • Feasibility demonstration of a silicon pixel detector with sub-ns time tagging capability. • Demonstrator detector assembly with a time resolution of 75 ps RMS with laser charge injection; 170 ps RMS with particle beam. • Design of trigger-less TDCpix ASIC with 1800 pixels, 720 TDC channels and 4 3.2 Gbit/s serializers.

  14. The TDCpix readout ASIC: A 75ps resolution timing front-end for the NA62 Gigatracker hybrid pixel detector

    CERN Document Server

    Kluge, A; Bonacini, S; Jarron, P; Kaplon, J; Morel, M; Noy, M; Perktold, L; Poltorak, K

    2013-01-01

    The TDCpix is a novel pixel readout ASIC for the NA62 Gigatracker detector. NA62 is a new experiment being installed at the CERN Super Proton Synchrotron. Its Gigatracker detector shall provide on-beam tracking and time stamping of individual particles with a time resolution of 150 ps rms. It will consist of three tracking stations, each with one hybrid pixel sensor. The peak fl ow of particles crossing the detector modules reaches 1.27 MHz/mm 2 for a total rate of about 0.75 GHz. Ten TDCpix chips will be bump-bonded to every silicon pixel sensor. Each chip shall perform time stamping of 100 M particle hits per second with a detection ef fi ciency above 99% and a timing accuracy better than 200 ps rms for an overall three-station-setup time resolution of better than 150 ps. The TDCpix chip has been designed in a 130 nm CMOS technology. It will feature 45 40 square pixels of 300 300 μ m 2 and a complex End of Column peripheral region including an array of TDCs based on DLLs, four high speed serializers, a low...

  15. A self-adjusting delay circuit for pixel read-out chips

    International Nuclear Information System (INIS)

    Raith, B.

    1997-01-01

    A simple concept for automatic adjustment of important VLSI-circuit properties was proposed in (Fischer and Joens, Nucl. Instr. and. Meth.). As an application, a self-adjusting monoflop is reviewed, and detailed measurements are discussed regarding a possible implementation in the LHC 1 read-out chip for the ATLAS experiment (ATLAS Internal Note, 1995). (orig.)

  16. Zero suppression logic of the ALICE muon forward tracker pixel chip prototype PIXAM and associated readout electronics development

    International Nuclear Information System (INIS)

    Flouzat, C.; Değerli, Y.; Guilloux, F.; Orsini, F.; Venault, P.

    2015-01-01

    In the framework of the ALICE experiment upgrade at HL-LHC, a new forward tracking detector, the Muon Forward Tracker (MFT), is foreseen to overcome the intrinsic limitations of the present Muon Spectrometer and will perform new measurements of general interest for the whole ALICE physics. To fulfill the new detector requirements, CMOS Monolithic Active Pixel Sensors (MAPS) provide an attractive trade-off between readout speed, spatial resolution, radiation hardness, granularity, power consumption and material budget. This technology has been chosen to equip the Muon Forward Tracker and also the vertex detector: the Inner Tracking System (ITS). Since few years, an intensive R and D program has been performed on the design of MAPS in the 0.18 μ m CMOS Image Sensor (CIS) process. In order to avoid pile up effects in the experiment, the classical rolling shutter readout system of MAPS has been improved to overcome the readout speed limitation. A zero suppression algorithm, based on a 3 by 3 cluster finding (position and data), has been chosen for the MFT. This algorithm allows adequate data compression for the sensor. This paper presents the large size prototype PIXAM, which represents 1/3 of the final chip, and will focus specially on the zero suppression block architecture. This chip is designed and under fabrication in the 0.18 μ m CIS process. Finally, the readout electronics principle to send out the compressed data flow is also presented taking into account the cluster occupancy per MFT plane for a single central Pb-Pb collision

  17. Zero suppression logic of the ALICE muon forward tracker pixel chip prototype PIXAM and associated readout electronics development

    Science.gov (United States)

    Flouzat, C.; Değerli, Y.; Guilloux, F.; Orsini, F.; Venault, P.

    2015-05-01

    In the framework of the ALICE experiment upgrade at HL-LHC, a new forward tracking detector, the Muon Forward Tracker (MFT), is foreseen to overcome the intrinsic limitations of the present Muon Spectrometer and will perform new measurements of general interest for the whole ALICE physics. To fulfill the new detector requirements, CMOS Monolithic Active Pixel Sensors (MAPS) provide an attractive trade-off between readout speed, spatial resolution, radiation hardness, granularity, power consumption and material budget. This technology has been chosen to equip the Muon Forward Tracker and also the vertex detector: the Inner Tracking System (ITS). Since few years, an intensive R&D program has been performed on the design of MAPS in the 0.18 μ m CMOS Image Sensor (CIS) process. In order to avoid pile up effects in the experiment, the classical rolling shutter readout system of MAPS has been improved to overcome the readout speed limitation. A zero suppression algorithm, based on a 3 by 3 cluster finding (position and data), has been chosen for the MFT. This algorithm allows adequate data compression for the sensor. This paper presents the large size prototype PIXAM, which represents 1/3 of the final chip, and will focus specially on the zero suppression block architecture. This chip is designed and under fabrication in the 0.18 μ m CIS process. Finally, the readout electronics principle to send out the compressed data flow is also presented taking into account the cluster occupancy per MFT plane for a single central Pb-Pb collision.

  18. The RD53 Collaboration's SystemVerilog-UVM Simulation Framework and its General Applicability to Design of Advanced Pixel Readout Chips

    CERN Document Server

    Marconi, S.; Placidi, P.; Christiansen, J.; Hemperek, T.

    2014-01-01

    The foreseen Phase 2 pixel upgrades at the LHC have very challenging requirements for the design of hybrid pixel readout chips. A versatile pixel simulation platform is as an essential development tool for the design, verification and optimization of both the system architecture and the pixel chip building blocks (Intellectual Properties, IPs). This work is focused on the implemented simulation and verification environment named VEPIX53, built using the SystemVerilog language and the Universal Verification Methodology (UVM) class library in the framework of the RD53 Collaboration. The environment supports pixel chips at different levels of description: its reusable components feature the generation of different classes of parameterized input hits to the pixel matrix, monitoring of pixel chip inputs and outputs, conformity checks between predicted and actual outputs and collection of statistics on system performance. The environment has been tested performing a study of shared architectures of the trigger late...

  19. Development of n+-in-p planar pixel quadsensor flip-chipped with FE-I4 readout ASICs

    International Nuclear Information System (INIS)

    Unno, Y.; Hanagaki, K.; Hori, R.; Ikegami, Y.; Nakamura, K.; Takubo, Y.; Kamada, S.; Yamamura, K.; Yamamoto, H.; Takashima, R.; Tojo, J.; Kono, T.; Nagai, R.; Saito, S.; Sugibayashi, K.; Hirose, M.; Jinnouchi, O.; Sato, S.; Sawai, H.; Hara, K.

    2017-01-01

    We have developed flip-chip modules applicable to the pixel detector for the HL-LHC. New radiation-tolerant n + -in-p planar pixel sensors of a size of four FE-I4 application-specific integrated circuits (ASICs) are laid out in a 6-in wafer. Variation in readout connection for the pixels at the boundary of ASICs is implemented in the design of quadsensors. Bump bonding technology is developed for four ASICs onto one quadsensor. Both sensors and ASICs are thinned to 150 μm before bump bonding, and are held flat with vacuum chucks. Using lead-free SnAg solder bumps, we encounter deficiency with large areas of disconnected bumps after thermal stress treatment, including irradiation. Surface oxidation of the solder bumps is identified as a critical source of this deficiency after bump bonding trials, using SnAg bumps with solder flux, indium bumps, and SnAg bumps with a newly-introduced hydrogen-reflow process. With hydrogen-reflow, we establish flux-less bump bonding technology with SnAg bumps, appropriate for mass production of the flip-chip modules with thin sensors and thin ASICs.

  20. The ALICE silicon pixel detector front-end and read-out electronics

    CERN Document Server

    Kluge, A

    2006-01-01

    The ALICE silicon pixel detector (SPD) comprises the two innermost barrel layers of the ALICE inner tracker system. The SPD includes 120 half staves each of which consists of a linear array of 10 ALICE pixel chips bump bonded to two silicon sensors. Each pixel chip contains 8192 active cells, so the total number of pixel cells in the SPD is ≈107. The tight material budget and the limitation in physical dimensions required by the detector design introduce new challenges for the integration of the on-detector electronics. An essential part of the half stave is a low-mass multi-layer flex that carries power, ground, and signals to the pixel chips. Each half stave is read out using a multi-chip module (MCM). The MCM contains three radiation hard ASICs and an 800 Mbit/s custom developed optical link for the data transfer between the detector and the control room. The detector components are less than 3 mm thick. The production of the half-staves and MCMs is currently under way. Test results as well as on overvie...

  1. A pixel unit-cell targeting 16ns resolution and radiation hardness in a column read-out particle vertex detector

    International Nuclear Information System (INIS)

    Wright, M.; Millaud, J.; Nygren, D.

    1993-01-01

    A pixel unit cell (PUC) circuit architecture, optimized for a column read out architecture, is reported. Each PUC contains an integrator, active filter, comparator, and optional analog store. The time-over-threshold (TOT) discriminator allows an all-digital interface to the array periphery readout while passing an analog measure of collected charge. Use of (existing) radiation hard processes, to build a detector bump-bonded to a pixel readout array, is targeted. Here emphasis is on a qualitative explanation of how the unique circuit implementation benefits operation for Super Collider (SSC) detector application. (orig.)

  2. A pixel unit-cell targeting 16 ns resolution and radiation hardness in a column read-out particle vertex detector

    International Nuclear Information System (INIS)

    Wright, M.; Millaud, J.; Nygren, D.

    1992-10-01

    A pixel unit cell (PUC) circuit architecture, optimized for a column read out architecture, is reported. Each PUC contains an integrator, active filter, comparator, and optional analog store. The time-over-threshold (TOT) discriminator allows an all-digital interface to the array periphery readout while passing an analog measure of collected charge. Use of (existing) radiation hard processes, to build a detector bump-bonded to a pixel readout array, is targeted. Here, emphasis is on a qualitative explanation of how the unique circuit implementation benefits operation for Super Collider (SSC) detector application

  3. Pixel Read-Out Architectures for the NA62 GigaTracker

    CERN Document Server

    Dellacasa, G

    2008-01-01

    Beam particles in NA62 experiment are measured with a Si-pixel sensor having a size of 300 μm x 300 μm and a time resolution of 150 ps (rms). To meet the timing requirement an adequate strategy to compensate the discriminator time-walk must be implemented and an R&D effort investigating two different options is ongoing. In this presentation we describe the two different approaches. One is based on the use of a constant-fraction discriminator followed by an on-pixel TDC. The other one is based on the use of a Time-over-Threshold circuit followed by a TDC shared by a group of pixels. The global architectures of both the front-end ASIC will be discussed.

  4. Scintillator counters with multi-pixel avalanche photodiode readout for the ND280 detector of the T2K experiment

    International Nuclear Information System (INIS)

    Mineev, O.; Afanasjev, A.; Bondarenko, G.; Golovin, V.; Gushchin, E.; Izmailov, A.; Khabibullin, M.; Khotjantsev, A.; Kudenko, Yu.; Kurimoto, Y.; Kutter, T.; Lubsandorzhiev, B.; Mayatski, V.; Musienko, Yu.; Nakaya, T.; Nobuhara, T.; Shaibonov, B.A.J.; Shaikhiev, A.; Taguchi, M.; Yershov, N.; Yokoyama, M.

    2007-01-01

    The Tokai-to-Kamioka (T2K) experiment is a second generation long baseline neutrino oscillation experiment which aims at a sensitive search for ν e appearance. The main design features of the T2K near neutrino detectors located at 280m from the target are presented, and the scintillator counters are described. The counters are readout via WLS fibers embedded into S-shaped grooves in the scintillator from both ends by multi-pixel avalanche photodiodes operating in a limited Geiger mode. Operating principles and results of tests of photosensors with a sensitive area of 1mm 2 are presented. A time resolution of 1.75ns, a spatial resolution of 9.9-12.4cm, and a detection efficiency for minimum ionizing particles of more than 99% were obtained for scintillator detectors in a beam test

  5. Layout techniques to enhance the radiation tolerance of standard CMOS technologies demonstrated on a pixel detector readout chip

    CERN Document Server

    Snoeys, W; Burns, M; Campbell, M; Cantatore, E; Carrer, N; Casagrande, L; Cavagnoli, A; Dachs, C; Di Liberto, S; Formenti, F; Giraldo, A; Heijne, Erik H M; Jarron, Pierre; Letheren, M F; Marchioro, A; Martinengo, P; Meddi, F; Mikulec, B; Morando, M; Morel, M; Noah, E; Paccagnella, A; Ropotar, I; Saladino, S; Sansen, Willy; Santopietro, F; Scarlassara, F; Segato, G F; Signe, P M; Soramel, F; Vannucci, Luigi; Vleugels, K

    2000-01-01

    A new pixel readout prototype has been developed at CERN for high- energy physics applications. This full mixed mode circuit has been implemented in a commercial 0.5 mu m CMOS technology. Its radiation tolerance has been enhanced by designing all NMOS transistors in enclosed geometry and introducing guardrings wherever necessary. The technique is explained and its effectiveness demonstrated on various irradiation measurements on individual transistors and on the prototype. Circuit performance started to degrade only after a total dose of 600 krad-1.7 Mrad depending on the type of radiation. 10 keV X-rays, /sup 60/Co gamma-rays, 6.5 MeV protons, and minimum ionizing particles were used. Implications of this layout approach on the circuit design and perspectives for even deeper submicron technologies are discussed. (20 refs).

  6. LHC1: a semiconductor pixel detector readout chip with internal, tunable delay providing a binary pattern of selected events

    International Nuclear Information System (INIS)

    Heijne, E.H.M.; Antinori, F.; Barberis, D.

    1996-01-01

    The Omega3/LHC1 pixel detector readout chip comprises a matrix of 128 x 16 readout cells of 50 μm x 500 μm and peripheral functions with 4 distinct modes of initialization and operation, together more than 800 000 transistors. Each cell contains a complete chain of amplifier, discriminator with adjustable threshold and fast-OR output, a globally adjustable delay with local fine-tuning, coincidence logic and memory. Every cell can be individually addressed for electrical test and masking. First results have been obtained from electrical tests of a chip without detector as well as from source measurements. The electronic noise without detector is ∼100 e - rms. The lowest threshold setting is close to 2000 e - and non-uniformity has been measured to be better than 450 e - rms at 5000 e - threshold. A timewalk of <10 ns and a precision of <6 ns rms on a delay of 2 μs have been measured. The results may be improved by further optimization. (orig.)

  7. Development of high data readout rate pixel module and detector hybridization at Fermilab

    International Nuclear Information System (INIS)

    Zimmermann, Sergio

    2001-01-01

    This paper describes the baseline design and a variation of the pixel module to handle the data rate required for the BTeV experiment at Fermilab. The present prototype has shown good electrical performance characteristics. Indium bump bonding is proven to be capable of successful fabrication at 50 micron pitch on real detectors. For solder bumps at 50 micron pitch, much better results have been obtained with the fluxless PADS processed detectors. The results are adequate for our needs and our tests have validated it as a viable technology

  8. Cryogenic readout for multiple VUV4 Multi-Pixel Photon Counters in liquid xenon

    Science.gov (United States)

    Di Giovanni, A.

    2018-03-01

    This work concerned the preliminary tests and characterization of a cryogenic preamplifier board for an array made of 16 S13370-3050CN (VUV4 family) Multi-Pixel Photon Counters manufactured by Hamamatsu and operated at liquid xenon temperature. The proposed prototype is based on the use of the Analog Devices AD8011 current feedback operational amplifier. The detector allows for single photon detection, making this device a promising choice for the future generation of neutrino and dark matter detectors based on liquid xenon targets.

  9. Pixelized M-pi-n CdTe detector coupled to Medipix2 readout chip

    CERN Document Server

    Kalliopuska, J; Penttila, R; Andersson, H; Nenonen, S; Gadda, A; Pohjonen, H; Vanttajac, I; Laaksoc, P; Likonen, J

    2011-01-01

    We have realized a simple method for patterning an M-pi-n CdTe diode with a deeply diffused pn-junction, such as indium anode on CdTe. The method relies on removing the semiconductor material on the anode-side of the diode until the physical junction has been reached. The pixelization of the p-type CdTe diode with an indium anode has been demonstrated by patterning perpendicular trenches with a high precision diamond blade and pulsed laser. Pixelization or microstrip pattering can be done on both sides of the diode, also on the cathode-side to realize double sided detector configuration. The article compares the patterning quality of the diamond blade process, pulsed pico-second and femto-second lasers processes. Leakage currents and inter-strip resistance have been measured and are used as the basis of the comparison. Secondary ion mass spectrometry (SIMS) characterization has been done for a diode to define the pn-junction depth and to see the effect of the thermal loads of the flip-chip bonding process. Th...

  10. Spectroscopy study of imaging devices based on silicon Pixel Array Detector coupled to VATAGP7 read-out chips

    International Nuclear Information System (INIS)

    Linhart, V; Lacasta, C; Llosa, G; Stankova, V; Burdette, D; Chessi, E; Cochran, E; Honscheid, K; Kagan, H; Weilhammer, P; Cindro, V; Grosicar, B; Mikuz, M; Studen, A; Zontar, D; Clinthorne, N H

    2011-01-01

    Spectroscopic and timing response studies have been conducted on a detector module consisting of a silicon Pixel Array Detector bonded on two VATAGP7 read-out chips manufactured by Gamma-Medica Ideas using laboratory gamma sources and the internal calibration facilities (the calibration system of the read-out chips). The performed tests have proven that the chips have (i) non-linear calibration curves which can be approximated by power functions, (ii) capability to measure the energy of photons with energy resolution better than 2 keV (exact range and resolution depend on experimental setup), (iii) the internal calibration facility which provides 6 out of 16 available internal calibration charges within our region of interest (spanning the Compton edge of 511 keV photons). The peaks induced by the internal calibration facility are suitable for a fit of the calibration curves. However, they are not suitable for measurements of equivalent noise charge because their full width at half maximum varies with their amplitude. These facts indicate that the VATAGP7 chips are useful and precise tools for a wide variety of spectroscopic devices. We have also explored time walk of the module and peaking time of the spectroscopy signals provided by the chips. We have observed that (iv) the time walk is caused partly by the peaking time of the signals provided by the fast shaper of the chips and partly by the timing uncertainty related to the varying position of the photon interaction, (v) the peaking time of the spectroscopy signals provided by the chips increases with increasing pulse height.

  11. Toward VIP-PIX: A Low Noise Readout ASIC for Pixelated CdTe Gamma-Ray Detectors for Use in the Next Generation of PET Scanners.

    Science.gov (United States)

    Macias-Montero, Jose-Gabriel; Sarraj, Maher; Chmeissani, Mokhtar; Puigdengoles, Carles; Lorenzo, Gianluca De; Martínez, Ricardo

    2013-08-01

    VIP-PIX will be a low noise and low power pixel readout electronics with digital output for pixelated Cadmium Telluride (CdTe) detectors. The proposed pixel will be part of a 2D pixel-array detector for various types of nuclear medicine imaging devices such as positron-emission tomography (PET) scanners, Compton gamma cameras, and positron-emission mammography (PEM) scanners. Each pixel will include a SAR ADC that provides the energy deposited with 10-bit resolution. Simultaneously, the self-triggered pixel which will be connected to a global time-to-digital converter (TDC) with 1 ns resolution will provide the event's time stamp. The analog part of the readout chain and the ADC have been fabricated with TSMC 0.25 μ m mixed-signal CMOS technology and characterized with an external test pulse. The power consumption of these parts is 200 μ W from a 2.5 V supply. It offers 4 switchable gains from ±10 mV/fC to ±40 mV/fC and an input charge dynamic range of up to ±70 fC for the minimum gain for both polarities. Based on noise measurements, the expected equivalent noise charge (ENC) is 65 e - RMS at room temperature.

  12. Design of front end electronics and a full scale 4k pixel readout ASIC for the DSSC X-ray detector at the European XFEL

    International Nuclear Information System (INIS)

    Erdinger, Florian

    2016-01-01

    The goal of this thesis was to design a large scale readout ASIC for the 1-Mega pixel DEPFET Sensor with Signal Compression (DSSC) detector system which is being developed by an international collaboration for the European XFEL (EuXFEL). Requirements for the DSSC detector include single photon detection down to 0.5 keV combined with a large dynamic range of up to 10000 photons at frame rates of up to 4.5 MHz. The detector core concepts include full parallel readout, signal compression on the sensor or ASIC level, filtering, immediate digitization and local storage within the pixel. The DSSC is a hybrid pixel detector, each sensor pixel mates to a dedicated ASIC pixel, which includes the entire specified signal processing chain along with auxiliary circuits. One ASIC comprises 4096 pixels and a full periphery including biasing and digital control. This thesis presents the design of the ASIC, its components and integration are described in detail. Emphasis is put on the design of the analog front-end. The first full format ASIC (F1) has been fabricated within the scope of this thesis along with numerous test chips. Furthermore, the EuXFEL and the DSSC detector system are presented to create the context for the ASIC, which is the core topic of this thesis.

  13. Design of front end electronics and a full scale 4k pixel readout ASIC for the DSSC X-ray detector at the European XFEL

    Energy Technology Data Exchange (ETDEWEB)

    Erdinger, Florian

    2016-11-22

    The goal of this thesis was to design a large scale readout ASIC for the 1-Mega pixel DEPFET Sensor with Signal Compression (DSSC) detector system which is being developed by an international collaboration for the European XFEL (EuXFEL). Requirements for the DSSC detector include single photon detection down to 0.5 keV combined with a large dynamic range of up to 10000 photons at frame rates of up to 4.5 MHz. The detector core concepts include full parallel readout, signal compression on the sensor or ASIC level, filtering, immediate digitization and local storage within the pixel. The DSSC is a hybrid pixel detector, each sensor pixel mates to a dedicated ASIC pixel, which includes the entire specified signal processing chain along with auxiliary circuits. One ASIC comprises 4096 pixels and a full periphery including biasing and digital control. This thesis presents the design of the ASIC, its components and integration are described in detail. Emphasis is put on the design of the analog front-end. The first full format ASIC (F1) has been fabricated within the scope of this thesis along with numerous test chips. Furthermore, the EuXFEL and the DSSC detector system are presented to create the context for the ASIC, which is the core topic of this thesis.

  14. FE-I2 a front-end readout chip designed in a commercial 025- mu m process for the ATLAS pixel detector at LHC

    CERN Document Server

    Blanquart, L; Einsweiler, Kevin F; Fischer, P; Mandelli, E; Meddeler, G; Peric, I

    2004-01-01

    A new front-end chip (FE-I2) has been developed for the ATLAS pixel detector at the future Large Hadron Collider (LHC) accelerator facility of the European Laboratory for Particle Physics (CERN). This chip has been submitted in a commercial 0.25- mu m CMOS process using special layout techniques for radiation tolerance. It comprises 2880 pixels arranged into 18 columns of 160 channels. Each pixel element of dimension 50 mu m * 400 mu m is composed of a charge- sensitive amplifier followed by a fast discriminator with a detection threshold adjustable within a range of 0-6000 electrons and slow control logic incorporating a wired-hit-Or, preamplifier-kill, readout mask, and automatic threshold tuning circuitry. There are two single-event- upset (SEU)-tolerant DACs for reducing threshold (7-b) and recovery- time (3-b) mismatches from pixel to pixel along with digital hit emulation and a differential readout circuit aimed at transporting time-stamped data from each pixel to buffers at the bottom of the chip. In c...

  15. The Read-Out Driver (ROD) card for the ATLAS experiment: commissioning for the IBL detector and upgrade studies for the Pixel Layers 1 and 2

    CERN Document Server

    Travaglini, R; The ATLAS collaboration; Bindi, M; Falchieri, D; Gabrielli, A; Lama, L; Chen, S P; Hsu, S C; Hauck, S; Kugel, A; Flick, T; Wensing, M

    2013-01-01

    The upgrade of the ATLAS experiment at LHC foresees the insertion of an innermost silicon layer, called Insertable B-layer (IBL). IBL read-out system will be equipped with new electronics. The Readout-Driver card (ROD) is a VME board devoted to data processing, configuration and control. A pre-production batch has been delivered in order to perform tests with instrumented slices of the overall acquisition chain, aiming to finalize strategies for system commissioning. In this contribution both setups and results will be described, as well as preliminary studies on changes in order to adopt the ROD for the ATLAS Pixel Layers 1 and 2.

  16. The RD53 collaboration's SystemVerilog-UVM simulation framework and its general applicability to design of advanced pixel readout chips

    International Nuclear Information System (INIS)

    Marconi, S; Christiansen, J; Conti, E; Placidi, P; Hemperek, T

    2014-01-01

    The foreseen Phase 2 pixel upgrades at the LHC have very challenging requirements for the design of hybrid pixel readout chips. A versatile pixel simulation platform is as an essential development tool for the design, verification and optimization of both the system architecture and the pixel chip building blocks (Intellectual Properties, IPs). This work is focused on the implemented simulation and verification environment named VEPIX53, built using the SystemVerilog language and the Universal Verification Methodology (UVM) class library in the framework of the RD53 Collaboration. The environment supports pixel chips at different levels of description: its reusable components feature the generation of different classes of parameterized input hits to the pixel matrix, monitoring of pixel chip inputs and outputs, conformity checks between predicted and actual outputs and collection of statistics on system performance. The environment has been tested performing a study of shared architectures of the trigger latency buffering section of pixel chips. A fully shared architecture and a distributed one have been described at behavioral level and simulated; the resulting memory occupancy statistics and hit loss rates have subsequently been compared

  17. Evaluation of 320x240 pixel LEC GaAs Schottky barrier X-ray imaging arrays, hybridized to CMOS readout circuit based on charge integration

    CERN Document Server

    Irsigler, R; Alverbro, J; Borglind, J; Froejdh, C; Helander, P; Manolopoulos, S; O'Shea, V; Smith, K

    1999-01-01

    320x240 pixels GaAs Schottky barrier detector arrays were fabricated, hybridized to silicon readout circuits, and subsequently evaluated. The detector chip was based on semi-insulating LEC GaAs material. The square shaped pixel detector elements were of the Schottky barrier type and had a pitch of 38 mu m. The GaAs wafers were thinned down prior to the fabrication of the ohmic back contact. After dicing, the chips were indium bump, flip-chip bonded to CMOS readout circuits based on charge integration, and finally evaluated. A bias voltage between 50 and 100 V was sufficient to operate the detector. Results on I-V characteristics, noise behaviour and response to X-ray radiation are presented. Images of various objects and slit patterns were acquired by using a standard dental imaging X-ray source. The work done was a part of the XIMAGE project financed by the European Community (Brite-Euram). (author)

  18. Readout electronics for low dark count pixel detectors based on Geiger mode avalanche photodiodes fabricated in conventional CMOS technologies for future linear colliders

    International Nuclear Information System (INIS)

    Vilella, E.; Arbat, A.; Comerma, A.; Trenado, J.; Alonso, O.; Gascon, D.; Vila, A.; Garrido, L.; Dieguez, A.

    2011-01-01

    High sensitivity and excellent timing accuracy of the Geiger mode avalanche photodiodes make them ideal sensors as pixel detectors for particle tracking in high energy physics experiments to be performed in future linear colliders. Nevertheless, it is well known that these sensors suffer from dark counts and afterpulsing noise, which induce false hits (indistinguishable from event detection) as well as an increase in the necessary area of the readout system. In this work, we present a comparison between APDs fabricated in a high voltage 0.35 μm and a high integration 0.13 μm commercially available CMOS technologies that has been performed to determine which of them best fits the particle collider requirements. In addition, a readout circuit that allows low noise operation is introduced. Experimental characterization of the proposed pixel is also presented in this work.

  19. Gossipo-3 A prototype of a Front-End Pixel Chip for Read-Out of Micro-Pattern Gas Detectors

    CERN Document Server

    Brezina, Christpoh; van der Graaf, Haryy; Gromov, Vladimir; Kluit, Ruud; Kruth, Andre; Zappon, Francesco

    2009-01-01

    In a joint effort of Nikhef (Amsterdam) and the University of Bonn, the Gossipo-3 integrated circuit (IC) has been developed. This circuit is a prototype of a chip dedicated for read-out of various types of position sensitive Micro-Pattern Gas detectors (MPGD). The Gossipo-3 is defined as a set of building blocks to be used in a future highly granulated (60 μm) chip. The pixel circuit can operate in two modes. In Time mode every readout pixel measures the hit arrival time and the charge deposit. For this purpose it has been equipped with a high resolution TDC (1.7 ns) covering dynamic range up to 102 μs. Charge collected by the pixel will be measured using Time-over- Threshold method in the range from 400 e- to 28000 e- with accuracy of 200 e- (standard deviation). In Counting mode every pixel operates as a 24-bit counter, counting the number of incoming hits. The circuit is also optimized to operate at low power consumption (100 mW/cm2) that is required to avoid the need for massive power transport and coo...

  20. Simulation of digital pixel readout chip architectures with the RD53 SystemVerilog-UVM verification environment using Monte Carlo physics data

    International Nuclear Information System (INIS)

    Conti, E.; Marconi, S.; Christiansen, J.; Placidi, P.; Hemperek, T.

    2016-01-01

    The simulation and verification framework developed by the RD53 collaboration is a powerful tool for global architecture optimization and design verification of next generation hybrid pixel readout chips. In this paper the framework is used for studying digital pixel chip architectures at behavioral level. This is carried out by simulating a dedicated, highly parameterized pixel chip description, which makes it possible to investigate different grouping strategies between pixels and different latency buffering and arbitration schemes. The pixel hit information used as simulation input can be either generated internally in the framework or imported from external Monte Carlo detector simulation data. The latter have been provided by both the CMS and ATLAS experiments, featuring HL-LHC operating conditions and the specifications related to the Phase 2 upgrade. Pixel regions and double columns were simulated using such Monte Carlo data as inputs: the performance of different latency buffering architectures was compared and the compliance of different link speeds with the expected column data rate was verified

  1. Fabrication and characterization of n-on-n silicon pixel detectors compatible with the Medipix2 readout chip

    Energy Technology Data Exchange (ETDEWEB)

    Zorzi, N. [ITC-irst, Divisione Microsistemi, Via Sommarive 18, I-38050 Povo (Trento) (Italy)]. E-mail: zorzi@itc.it; Bisogni, M.G. [Dipartimento di Fisica, Universita di Pisa and Sezione INFN, Via Buonarroti 2, I-56127 Pisa (Italy); Boscardin, M. [ITC-irst, Divisione Microsistemi, Via Sommarive 18, I-38050 Povo (Trento) (Italy); Dalla Betta, G.-F. [Dipartimento di Informatica e Telecomunicazioni, Universita di Trento, Via Sommarive 14, I-38050 Povo (Trento) (Italy); Gregori, P. [ITC-irst, Divisione Microsistemi, Via Sommarive 18, I-38050 Povo (Trento) (Italy); Novelli, M. [Dipartimento di Fisica, Universita di Pisa and Sezione INFN, Via Buonarroti 2, I-56127 Pisa (Italy); Piemonte, C. [ITC-irst, Divisione Microsistemi, Via Sommarive 18, I-38050 Povo (Trento) (Italy); Quattrocchi, M. [Dipartimento di Fisica, Universita di Pisa and Sezione INFN, Via Buonarroti 2, I-56127 Pisa (Italy); Ronchin, S. [ITC-irst, Divisione Microsistemi, Via Sommarive 18, I-38050 Povo (Trento) (Italy); Rosso, V. [Dipartimento di Fisica, Universita di Pisa and Sezione INFN, Via Buonarroti 2, I-56127 Pisa (Italy)

    2005-07-01

    Pixel detectors for mammographic applications have been fabricated at ITC-irst on 800 {mu}m thick silicon wafers adopting a double side n{sup +}-on-n fabrication technology. The activity aims at increasing the X-ray detection efficiency in the energy range of interest minimizing the risk of electrical discharges in hybrid systems operating at high voltages. The detectors, having a layout compatible with the Medipix2 photon counting chip, feature two different design solutions for the p-isolation between neighboring n{sup +}-pixels. We report on the characterization of the fabrication process and on preliminary results of electrical measurements on full detectors and pixel test structures. In particular, we found that the detectors can be reliably operated above the full depletion voltage regardless of the isolation design, that however, impacts the performances in terms of current-voltage characteristics, single pixel currents, inter-pixel resistances and inter-pixel capacitances.

  2. Fabrication and characterization of n-on-n silicon pixel detectors compatible with the Medipix2 readout chip

    International Nuclear Information System (INIS)

    Zorzi, N.; Bisogni, M.G.; Boscardin, M.; Dalla Betta, G.-F.; Gregori, P.; Novelli, M.; Piemonte, C.; Quattrocchi, M.; Ronchin, S.; Rosso, V.

    2005-01-01

    Pixel detectors for mammographic applications have been fabricated at ITC-irst on 800 μm thick silicon wafers adopting a double side n + -on-n fabrication technology. The activity aims at increasing the X-ray detection efficiency in the energy range of interest minimizing the risk of electrical discharges in hybrid systems operating at high voltages. The detectors, having a layout compatible with the Medipix2 photon counting chip, feature two different design solutions for the p-isolation between neighboring n + -pixels. We report on the characterization of the fabrication process and on preliminary results of electrical measurements on full detectors and pixel test structures. In particular, we found that the detectors can be reliably operated above the full depletion voltage regardless of the isolation design, that however, impacts the performances in terms of current-voltage characteristics, single pixel currents, inter-pixel resistances and inter-pixel capacitances

  3. Experimental characterization of the 192 channel Clear-PEM frontend ASIC coupled to a multi-pixel APD readout of LYSO:Ce crystals

    International Nuclear Information System (INIS)

    Albuquerque, Edgar; Bexiga, Vasco; Bugalho, Ricardo; Carrico, Bruno; Ferreira, Claudia S.; Ferreira, Miguel; Godinho, Joaquim; Goncalves, Fernando; Leong, Carlos; Lousa, Pedro; Machado, Pedro; Moura, Rui; Neves, Pedro; Ortigao, Catarina; Piedade, Fernando; Pinheiro, Joao F.; Rego, Joel; Rivetti, Angelo; Rodrigues, Pedro; Silva, Jose C.

    2009-01-01

    In the framework of the Clear-PEM project for the construction of a high-resolution scanner for breast cancer imaging, a very compact and dense frontend electronics system has been developed for readout of multi-pixel S8550 Hamamatsu APDs. The frontend electronics are instrumented with a mixed-signal Application-Specific Integrated Circuit (ASIC), which incorporates 192 low-noise charge pre-amplifiers, shapers, analog memory cells and digital control blocks. Pulses are continuously stored in memory cells at clock frequency. Channels above a common threshold voltage are readout for digitization by off-chip free-sampling ADCs. The ASIC has a size of 7.3x9.8mm 2 and was implemented in a AMS 0.35μm CMOS technology. In this paper the experimental characterization of the Clear-PEM frontend ASIC, reading out multi-pixel APDs coupled to LYSO:Ce crystal matrices, is presented. The chips were mounted on a custom test board connected to six APD arrays and to the data acquisition system. Six 32-pixel LYSO:Ce crystal matrices coupled on both sides to APD arrays were readout by two test boards. All 384 channels were operational. The chip power consumption is 660 mW (3.4 mW per channel). A very stable behavior of the chip was observed, with an estimated ENC of 1200-1300e - at APD gain 100. The inter-channel noise dispersion and mean baseline variation is less than 8% and 0.5%, respectively. The spread in the gain between different channels is found to be 1.5%. Energy resolution of 16.5% at 511 keV and 12.8% at 662 keV has been measured. Timing measurements between the two APDs that readout the same crystal is extracted and compared with detailed Monte Carlo simulations. At 511 keV the measured single photon time RMS resolution is 1.30 ns, in very good agreement with the expected value of 1.34 ns.

  4. A Prototype of a New Generation Readout ASIC in 65 nm CMOS for Pixel Detectors at HL-LHC

    CERN Document Server

    Pacher, L.; Paternò, A; Panati, S; Demaria, L; Rivetti, A; Da Rocha Rolo, M; Dellacasa, G; Mazza, G; Rotondo, F; Wheadon, R; Loddo, F; Licciulli, F; Ciciriello, F; Marzocca, C; Gaioni, L; Traversi, G; Re, V; De Canio, F; Ratti, L; Marconi, S; Placidi, P; Magazzù, G; Stabile, A; Mattiazzo, S

    2018-01-01

    The prototype is composed of a matrix of 64×64 pixels with 50 μm × 50 μm cells featuring a compact design, low-noise and low-power performance. The pixel array integrates two diffe- rent analogue front-end architectures working in parallel, one with asynchronous and one with synchronous hit discriminators. Common characteristics are a compact layout able to fit int...

  5. Results from CHIPIX-FE0, a Small-Scale Prototype of a New Generation Pixel Readout ASIC in 65 nm CMOS for HL-LHC

    CERN Document Server

    Pacher, L.; Demaria, N.; Rivetti, A.; Da Rocha Rolo, M.; Dellacasa, G.; Mazza, G.; Rotondo, F.; Wheadon, R.; Paternò, A.; Panati, S.; Loddo, F.; Licciulli, F.; Ciciriello, F.; Marzocca, C.; Gaioni, L.; Traversi, G.; Re, V.; De Canio, F.; Ratti, L.; Marconi, S.; Placidi, P.; Magazzù, G.; Stabile, A.; Mattiazzo, S.

    2018-01-01

    A prototype of a new-generation readout ASIC targeting High-Luminosity (HL) LHC pixel detector upgrades has been designed and fabricated as part of the Italian INFN CHIPIX65 project using a commercial 65 nm CMOS technology. This demonstrator, hereinafter referred to as CHIPIX-FE0, is composed of a matrix of 64 × 64 pixels with 50 μm × 50 μm pixel size embedding two different architectures of analog front-ends working in parallel. The final layout of the chip was submitted and accepted for fabrication on July 2016. Chips were received back from the foundry on October 2016 and successfully characterized before irradiation. Several irra- diation campaigns with X-rays have been accomplished during 2017 at Padova INFN and CERN EP/ESE facilities under different uniformity and temperature conditions up to 630 Mrad Total Ionizing Dose (TID). These studies corfirmed negligible degradation of analog front-ends per- formance after irradiation. First sample chips have been also bump-bonded to 50 μm × 50 μm and sin...

  6. Performance of the Insertable B-Layer for the ATLAS Pixel Detector during Quality Assurance and a Novel Pixel Detector Readout Concept based on PCIe

    CERN Document Server

    AUTHOR|(INSPIRE)INSPIRE-00356268; Pernegger, Heinz

    2016-07-27

    During the first long shutdown of the LHC the Pixel detector has been upgraded with a new 4th innermost layer, the Insertable B-Layer (IBL). The IBL will increase the tracking performance and help with higher than nominal luminosity the LHC will produce. The IBL is made up of 14 staves and in total 20 staves have been produced for the IBL. This thesis presents the results of the final quality tests performed on these staves in an detector-like environment, in order to select the 14 best of the 20 staves for integration onto the detector. The test setup as well as the testing procedure is introduced and typical results of each testing stage are shown and discussed. The overall performance of all staves is presented in regards to: tuning performance, radioactive source measurements, and number of failing pixels. Other measurement, which did not directly impact the selection of staves, but will be important for the operation of the detector or production of a future detector, are included. Based on the experienc...

  7. Pixel readout chips in deep submicron CMOS for ALICE and LHCb tolerant to 10 Mrad and beyond

    International Nuclear Information System (INIS)

    Snoeys, W.; Burns, M.; Campbell, M.; Cantatore, E.; Cencelli, V.; Dinapoli, R.; Heijne, E.; Jarron, P.; Lamanna, P.; Minervini, D.; Morel, M.; O'Shea, V.; Quiquempoix, V.; Bello, D.S.S.D.San Segundo; Van Koningsveld, B.; Wyllie, K.

    2001-01-01

    The ALICE1LHCB chip is a mixed-mode integrated circuit designed to read out silicon pixel detectors for two different applications: particle tracking in the ALICE Silicon Pixel Detector and particle identification in the LHCb Ring Imaging Cherenkov detector. To satisfy the different needs for these two experiments, the chip can be operated in two different modes. In tracking mode all the 50 μmx425 μm pixel cells in the 256x32 array are read out individually, whilst in particle identification mode they are combined in groups of 8 to form a 32x32 array of 400 μmx425 μm cells. Radiation tolerance was enhanced through special circuit layout. Sensitivity to coupling of digital signals into the analog front end was minimized. System issues such as testability and uniformity further constrained the design. The circuit is currently being manufactured in a commercial 0.25 μm CMOS technology

  8. Development of the ATLAS FE-I4 pixel readout IC for b-layer Upgrade and Super-LHC

    CERN Document Server

    Karagounis, M

    2008-01-01

    Motivated by the upcoming upgrade of the ATLAS hybrid pixel detector, a new Front-End (FE) IC is being developed in a 130nm technology to face the tightened requirements of the upgraded pixel system. The main design goals are the reduction of material and a decrease in power consumption combined with the capability to handle the higher hit rates that will result from the upgraded machine. New technology features like the higher integration density for digital circuits, better radiation tolerance and Triple-Well transistors are used for optimization and the implementation of new concepts. A description of the ongoing design work is given, focusing more on the analog part and peripheral design blocks.

  9. GOSSIP: A vertex detector combining a thin gas layer as signal generator with a CMOS readout pixel array

    Energy Technology Data Exchange (ETDEWEB)

    Campbell, M. [CERN/MediPix Consortium, Geneva (Switzerland); Heijne, E.H.M. [CERN/MediPix Consortium, Geneva (Switzerland); Llopart, X. [CERN/MediPix Consortium, Geneva (Switzerland); Colas, P. [DAPNIA, CEA Saclay, 91191 Gif sur Yvette Cedex (France); Giganon, A. [DAPNIA, CEA Saclay, 91191 Gif sur Yvette Cedex (France); Giomataris, Y. [DAPNIA, CEA Saclay, 91191 Gif sur Yvette Cedex (France); Chefdeville, M. [NIKHEF, Amsterdam (Netherlands); Colijn, A.P. [NIKHEF, Amsterdam (Netherlands); Fornaini, A. [NIKHEF, Amsterdam (Netherlands); Graaf, H. van der [NIKHEF, Amsterdam (Netherlands)]. E-mail: vdgraaf@nikhef.nl; Kluit, P. [NIKHEF, Amsterdam (Netherlands); Timmermans, J. [NIKHEF, Amsterdam (Netherlands); Visschers, J.L. [NIKHEF, Amsterdam (Netherlands); Schmitz, J. [University of Twente/MESA (Netherlands)

    2006-05-01

    A small TPC has been read out by means of a Medipix2 chip as direct anode. A Micromegas foil was placed 50{mu}m above the chip, and electron multiplication occurred in the gap. With a He/isobutane 80/20 mixture, gas multiplication factors up to tens of thousands were achieved, resulting in an efficiency for detecting single electrons of better than 90%. With this new readout technology for gas-filled detectors we recorded many image frames containing 2D images with tracks from cosmic muons. Along these tracks, electron clusters were observed, as well as {delta}-rays. With a gas layer thickness of only 1mm, the device could be applied as vertex detector, outperforming all Si-based detectors.

  10. GOSSIP: A vertex detector combining a thin gas layer as signal generator with a CMOS readout pixel array

    International Nuclear Information System (INIS)

    Campbell, M.; Heijne, E.H.M.; Llopart, X.; Colas, P.; Giganon, A.; Giomataris, Y.; Chefdeville, M.; Colijn, A.P.; Fornaini, A.; Graaf, H. van der; Kluit, P.; Timmermans, J.; Visschers, J.L.; Schmitz, J.

    2006-01-01

    A small TPC has been read out by means of a Medipix2 chip as direct anode. A Micromegas foil was placed 50μm above the chip, and electron multiplication occurred in the gap. With a He/isobutane 80/20 mixture, gas multiplication factors up to tens of thousands were achieved, resulting in an efficiency for detecting single electrons of better than 90%. With this new readout technology for gas-filled detectors we recorded many image frames containing 2D images with tracks from cosmic muons. Along these tracks, electron clusters were observed, as well as δ-rays. With a gas layer thickness of only 1mm, the device could be applied as vertex detector, outperforming all Si-based detectors

  11. GOSSIP: A vertex detector combining a thin gas layer as signal generator with a CMOS readout pixel array

    Science.gov (United States)

    Campbell, M.; Heijne, E. H. M.; Llopart, X.; Colas, P.; Giganon, A.; Giomataris, Y.; Chefdeville, M.; Colijn, A. P.; Fornaini, A.; van der Graaf, H.; Kluit, P.; Timmermans, J.; Visschers, J. L.; Schmitz, J.

    2006-05-01

    A small TPC has been read out by means of a Medipix2 chip as direct anode. A Micromegas foil was placed 50 μm above the chip, and electron multiplication occurred in the gap. With a He/isobutane 80/20 mixture, gas multiplication factors up to tens of thousands were achieved, resulting in an efficiency for detecting single electrons of better than 90%. With this new readout technology for gas-filled detectors we recorded many image frames containing 2D images with tracks from cosmic muons. Along these tracks, electron clusters were observed, as well as δ-rays. With a gas layer thickness of only 1 mm, the device could be applied as vertex detector, outperforming all Si-based detectors.

  12. Design and Verification of Digital Architecture of 65K Pixel Readout Chip for High-Energy Physics

    CERN Document Server

    Poikela, Tuomas; Paakkulainen, J

    2010-01-01

    The feasibility to design and implement a front-end ASIC for the upgrade of the VELO detector of LHCb experiment at CERN using IBM’s 130nm standard CMOS process and a standard cell library is studied in this thesis. The proposed architecture is a design to cope with high data rates and continuous data taking. The architecture is designed to operate without any external trigger to record every hit signal the ASIC receives from a sensor chip, and then to transmit the information to the next level of electronics, for example to FPGAs. This thesis focuses on design, implementation and functional verification of the digital electronics of the active pixel area. The area requirements are dictated by the geometry of pixels (55$mu$m x 55$mu$m), power requirements (20W/module) by restricted cooling capabilities of the module consisting of 10 chips and output bandwidth requirements by data rate (< 10 Gbit/s) produced by a particle flux passing through the chip. The design work was carried out using transaction...

  13. Readout ASIC for ILC-FPCCD vertex detector

    International Nuclear Information System (INIS)

    Takubo, Yosuke; Miyamoto, Akiya; Ikeda, Hirokazu; Yamamoto, Hitoshi; Itagaki, Kennosuke; Nagamine, Tadashi; Sugimoto, Yasuhiro

    2010-01-01

    The concept of FPCCD (Fine Pixel CCD) whose pixel size is 5x5μm 2 has been proposed as vertex detector at ILC. Since FPCCD has 128 x20,000 pixels in one readout channel, its readout poses a considerable challenge. We have developed a prototype of readout ASIC to readout the large number of pixels during the inter-train gap of the ILC beam. In this paper, we report the design and performance of the readout ASIC.

  14. The IBL Readout System

    CERN Document Server

    Dopke, J; The ATLAS collaboration; Flick, T; Gabrielli, A; Kugel, A; Maettig, P; Morettini, P; Polini, A; Schroer, N

    2010-01-01

    The first upgrade for the ATLAS pixel detector will be an additional layer, which is called IBL (Insertable B-Layer). To readout this new layer having new electronics assembled an update of the readout electronics is necessary. The aim is to develop a system which is capable to read out at a higher bandwidth and also compatible with the existing system to be integrated into it. The talk will describe the necessary development to reach a new readout system, concentrating on the requirements of a newly designed Back of Crate card as the optical interface in the counting room.

  15. The IBL Readout System

    CERN Document Server

    Dopke, J; Flick, T; Gabrielli, A; Kugel, A; Maettig, P; Morettini, P; Polini, A; Schroer, N

    2011-01-01

    The first upgrade for the ATLAS Pixel Detector will be an additional layer, which is called IBL (Insertable B-Layer). To readout this new layer, having new electronics, an update of the readout electronics is necessary. The aim is to develop a system which is capable to read out at a higher bandwidth, but also compatible with the existing system to be integrated into it. This paper will describe the necessary development to reach a new readout system, concentrating on the requirements of a newly designed Back of Crate card as the optical interface in the counting room.

  16. CMS Pixel Detector Upgrade

    CERN Document Server

    INSPIRE-00038772

    2011-01-01

    The present Compact Muon Solenoid silicon pixel tracking system has been designed for a peak luminosity of 1034cm-2s-1 and total dose corresponding to two years of the Large Hadron Collider (LHC) operation. With the steady increase of the luminosity expected at the LHC, a new pixel detector with four barrel layers and three endcap disks is being designed. We will present the key points of the design: the new geometry, which minimizes the material budget and increases the tracking points, and the development of a fast digital readout architecture, which ensures readout efficiency even at high rate. The expected performances for tracking and vertexing of the new pixel detector are also addressed.

  17. CVD diamond pixel detectors for LHC experiments

    CERN Document Server

    Wedenig, R; Bauer, C; Berdermann, E; Bergonzo, P; Bogani, F; Borchi, E; Brambilla, A; Bruzzi, Mara; Colledani, C; Conway, J; Dabrowski, W; Delpierre, P A; Deneuville, A; Dulinski, W; van Eijk, B; Fallou, A; Fizzotti, F; Foulon, F; Friedl, M; Gan, K K; Gheeraert, E; Grigoriev, E; Hallewell, G D; Hall-Wilton, R; Han, S; Hartjes, F G; Hrubec, Josef; Husson, D; Kagan, H; Kania, D R; Kaplon, J; Karl, C; Kass, R; Knöpfle, K T; Krammer, Manfred; Lo Giudice, A; Lü, R; Manfredi, P F; Manfredotti, C; Marshall, R D; Meier, D; Mishina, M; Oh, A; Pan, L S; Palmieri, V G; Pernicka, Manfred; Peitz, A; Pirollo, S; Polesello, P; Pretzl, Klaus P; Procario, M; Re, V; Riester, J L; Roe, S; Roff, D G; Rudge, A; Runólfsson, O; Russ, J; Schnetzer, S R; Sciortino, S; Speziali, V; Stelzer, H; Stone, R; Suter, B; Tapper, R J; Tesarek, R J; Trawick, M L; Trischuk, W; Vittone, E; Wagner, A; Walsh, A M; Weilhammer, Peter; White, C; Zeuner, W; Ziock, H J; Zöller, M

    1999-01-01

    This paper reviews the development of CVD diamond pixel detectors. The preparation of the diamond pixel sensors for bump-bonding to the pixel readout electronics for the LHC and the results from beam tests carried out at CERN are described. (9 refs).

  18. CVD diamond pixel detectors for LHC experiments

    Energy Technology Data Exchange (ETDEWEB)

    Wedenig, R.; Adam, W.; Bauer, C.; Berdermann, E.; Bergonzo, P.; Bogani, F.; Borchi, E.; Brambilla, A.; Bruzzi, M.; Colledani, C.; Conway, J.; Dabrowski, W.; Delpierre, P.; Deneuville, A.; Dulinski, W.; Eijk, B. van; Fallou, A.; Fizzotti, F.; Foulon, F.; Friedl, M.; Gan, K.K.; Gheeraert, E.; Grigoriev, E.; Hallewell, G.; Hall-Wilton, R.; Han, S.; Hartjes, F.; Hrubec, J.; Husson, D.; Kagan, H.; Kania, D.; Kaplon, J.; Karl, C.; Kass, R.; Knoepfle, K.T.; Krammer, M.; Logiudice, A.; Lu, R.; Manfredi, P.F.; Manfredotti, C.; Marshall, R.D.; Meier, D.; Mishina, M.; Oh, A.; Pan, L.S.; Palmieri, V.G.; Pernicka, M.; Peitz, A.; Pirollo, S.; Polesello, P.; Pretzl, K.; Procario, M.; Re, V.; Riester, J.L.; Roe, S.; Roff, D.; Rudge, A.; Runolfsson, O.; Russ, J.; Schnetzer, S.; Sciortino, S.; Speziali, V.; Stelzer, H.; Stone, R.; Suter, B.; Tapper, R.J.; Tesarek, R.; Trawick, M.; Trischuk, W.; Vittone, E.; Wagner, A.; Walsh, A.M.; Weilhammer, P.; White, C.; Zeuner, W.; Ziock, H.; Zoeller, M.; Blanquart, L.; Breugnion, P.; Charles, E.; Ciocio, A.; Clemens, J.C.; Dao, K.; Einsweiler, K.; Fasching, D.; Fischer, P.; Joshi, A.; Keil, M.; Klasen, V.; Kleinfelder, S.; Laugier, D.; Meuser, S.; Milgrome, O.; Mouthuy, T.; Richardson, J.; Sinervo, P.; Treis, J.; Wermes, N

    1999-08-01

    This paper reviews the development of CVD diamond pixel detectors. The preparation of the diamond pixel sensors for bump-bonding to the pixel readout electronics for the LHC and the results from beam tests carried out at CERN are described.

  19. CVD diamond pixel detectors for LHC experiments

    International Nuclear Information System (INIS)

    Wedenig, R.; Adam, W.; Bauer, C.; Berdermann, E.; Bergonzo, P.; Bogani, F.; Borchi, E.; Brambilla, A.; Bruzzi, M.; Colledani, C.; Conway, J.; Dabrowski, W.; Delpierre, P.; Deneuville, A.; Dulinski, W.; Eijk, B. van; Fallou, A.; Fizzotti, F.; Foulon, F.; Friedl, M.; Gan, K.K.; Gheeraert, E.; Grigoriev, E.; Hallewell, G.; Hall-Wilton, R.; Han, S.; Hartjes, F.; Hrubec, J.; Husson, D.; Kagan, H.; Kania, D.; Kaplon, J.; Karl, C.; Kass, R.; Knoepfle, K.T.; Krammer, M.; Logiudice, A.; Lu, R.; Manfredi, P.F.; Manfredotti, C.; Marshall, R.D.; Meier, D.; Mishina, M.; Oh, A.; Pan, L.S.; Palmieri, V.G.; Pernicka, M.; Peitz, A.; Pirollo, S.; Polesello, P.; Pretzl, K.; Procario, M.; Re, V.; Riester, J.L.; Roe, S.; Roff, D.; Rudge, A.; Runolfsson, O.; Russ, J.; Schnetzer, S.; Sciortino, S.; Speziali, V.; Stelzer, H.; Stone, R.; Suter, B.; Tapper, R.J.; Tesarek, R.; Trawick, M.; Trischuk, W.; Vittone, E.; Wagner, A.; Walsh, A.M.; Weilhammer, P.; White, C.; Zeuner, W.; Ziock, H.; Zoeller, M.; Blanquart, L.; Breugnion, P.; Charles, E.; Ciocio, A.; Clemens, J.C.; Dao, K.; Einsweiler, K.; Fasching, D.; Fischer, P.; Joshi, A.; Keil, M.; Klasen, V.; Kleinfelder, S.; Laugier, D.; Meuser, S.; Milgrome, O.; Mouthuy, T.; Richardson, J.; Sinervo, P.; Treis, J.; Wermes, N.

    1999-01-01

    This paper reviews the development of CVD diamond pixel detectors. The preparation of the diamond pixel sensors for bump-bonding to the pixel readout electronics for the LHC and the results from beam tests carried out at CERN are described

  20. The ALICE Silicon Pixel Detector System (SPD)

    CERN Document Server

    Kluge, A; Antinori, Federico; Burns, M; Cali, I A; Campbell, M; Caselle, M; Ceresa, S; Dima, R; Elias, D; Fabris, D; Krivda, Marian; Librizzi, F; Manzari, Vito; Morel, M; Moretto, Sandra; Osmic, F; Pappalardo, G S; Pepato, Adriano; Pulvirenti, A; Riedler, P; Riggi, F; Santoro, R; Stefanini, G; Torcato De Matos, C; Turrisi, R; Tydesjo, H; Viesti, G; PH-EP

    2007-01-01

    The ALICE silicon pixel detector (SPD) comprises the two innermost layers of the ALICE inner tracker system. The SPD includes 120 detector modules (half-staves) each consisting of 10 ALICE pixel chips bump bonded to two silicon sensors and one multi-chip read-out module. Each pixel chip contains 8192 active cells, so that the total number of pixel cells in the SPD is ≈ 107. The on-detector read-out is based on a multi-chip-module containing 4 ASICs and an optical transceiver module. The constraints on material budget and detector module dimensions are very demanding.

  1. Operational Experience with the ATLAS Pixel Detector

    CERN Document Server

    Lantzsch, Kerstin; The ATLAS collaboration

    2016-01-01

    Run 2 of the LHC is providing new challenges to track and vertex reconstruction with higher energies, denser jets and higher rates. Therefore the ATLAS experiment has constructed the first 4-layer Pixel detector in HEP, installing a new Pixel layer, also called Insertable B-Layer (IBL). In addition the Pixel detector was refurbished with new service quarter panels to recover about 3% of defective modules lost during run 1 and a new optical readout system to readout the data at higher speed while reducing the occupancy when running with increased luminosity. The commissioning, operation and performance of the 4-layer Pixel Detector will be presented.

  2. Gas pixel detectors

    International Nuclear Information System (INIS)

    Bellazzini, R.; Baldini, L.; Brez, A.; Cavalca, F.; Latronico, L.; Massai, M.M.; Minuti, M.; Omodei, N.; Pesce-Rollins, M.; Sgro, C.; Spandre, G.; Costa, E.; Soffitta, P.

    2007-01-01

    With the Gas Pixel Detector (GPD), the class of micro-pattern gas detectors has reached a complete integration between the gas amplification structure and the read-out electronics. To obtain this goal, three generations of application-specific integrated circuit of increased complexity and improved functionality has been designed and fabricated in deep sub-micron CMOS technology. This implementation has allowed manufacturing a monolithic device, which realizes, at the same time, the pixelized charge-collecting electrode and the amplifying, shaping and charge measuring front-end electronics of a GPD. A big step forward in terms of size and performances has been obtained in the last version of the 0.18 μm CMOS analog chip, where over a large active area of 15x15 mm 2 a very high channel density (470 pixels/mm 2 ) has been reached. On the top metal layer of the chip, 105,600 hexagonal pixels at 50 μm pitch have been patterned. The chip has customable self-trigger capability and includes a signal pre-processing function for the automatic localization of the event coordinates. In this way, by limiting the output signal to only those pixels belonging to the region of interest, it is possible to reduce significantly the read-out time and data volume. In-depth tests performed on a GPD built up by coupling this device to a fine pitch (50 μm) gas electron multiplier are reported. Matching of the gas amplification and read-out pitch has let to obtain optimal results. A possible application of this detector for X-ray polarimetry of astronomical sources is discussed

  3. Gossip: Gaseous pixels

    Science.gov (United States)

    Koffeman, E. N.

    2007-12-01

    Several years ago a revolutionary miniature TPC was developed using a pixel chip with a Micromegas foil spanned over it. To overcome the mechanical stability problems and improve the positioning accuracy while spanning a foil on top of a small readout chip a process has been developed in which a Micromegas-like grid is applied on a CMOS wafer in a post-processing step. This aluminum grid is supported on insulating pillars that are created by etching after the grid has been made. The energy resolution (measured on the absorption of the X-rays from a 55Fe source) was remarkably good. Several geometries have since been tested and we now believe that a Gas On Slimmed Silicon Pixel chip' (Gossip) may be realized. The drift region of such a gaseous pixel detector would be reduced to a millimeter. Such a detector is potentially very radiation hard (SLHC vertexing) but aging and sparking must be eliminated.

  4. Gossip: Gaseous pixels

    Energy Technology Data Exchange (ETDEWEB)

    Koffeman, E.N. [Nikhef, Kruislaan 409, 1098 SJ Amsterdam (Netherlands)], E-mail: d77@nikhef.nl

    2007-12-01

    Several years ago a revolutionary miniature TPC was developed using a pixel chip with a Micromegas foil spanned over it. To overcome the mechanical stability problems and improve the positioning accuracy while spanning a foil on top of a small readout chip a process has been developed in which a Micromegas-like grid is applied on a CMOS wafer in a post-processing step. This aluminum grid is supported on insulating pillars that are created by etching after the grid has been made. The energy resolution (measured on the absorption of the X-rays from a {sup 55}Fe source) was remarkably good. Several geometries have since been tested and we now believe that a Gas On Slimmed Silicon Pixel chip' (Gossip) may be realized. The drift region of such a gaseous pixel detector would be reduced to a millimeter. Such a detector is potentially very radiation hard (SLHC vertexing) but aging and sparking must be eliminated.

  5. Gossip: Gaseous pixels

    International Nuclear Information System (INIS)

    Koffeman, E.N.

    2007-01-01

    Several years ago a revolutionary miniature TPC was developed using a pixel chip with a Micromegas foil spanned over it. To overcome the mechanical stability problems and improve the positioning accuracy while spanning a foil on top of a small readout chip a process has been developed in which a Micromegas-like grid is applied on a CMOS wafer in a post-processing step. This aluminum grid is supported on insulating pillars that are created by etching after the grid has been made. The energy resolution (measured on the absorption of the X-rays from a 55 Fe source) was remarkably good. Several geometries have since been tested and we now believe that a Gas On Slimmed Silicon Pixel chip' (Gossip) may be realized. The drift region of such a gaseous pixel detector would be reduced to a millimeter. Such a detector is potentially very radiation hard (SLHC vertexing) but aging and sparking must be eliminated

  6. Technological aspects of gaseous pixel detectors fabrication

    NARCIS (Netherlands)

    Blanco Carballo, V.M.; Salm, Cora; Smits, Sander M.; Schmitz, Jurriaan; Melai, J.; Chefdeville, M.A.; van der Graaf, H.

    2007-01-01

    Integrated gaseous pixel detectors consisting of a metal punctured foil suspended in the order of 50μm over a pixel readout chip by means by SU-8 insulating pillars have been fabricated. SU-8 is used as sacrificial layer but metallization over uncrosslinked SU-8 presents adhesion and stress

  7. Development of radiation hardened pixel sensors for charged particle detection

    CERN Document Server

    Koziel, Michal

    2014-01-01

    CMOS Pixel Sensors are being developed since a few years to equip vertex detectors for future high-energy physics experiments with the crucial advantages of a low material budget and low production costs. The features simultaneously required are a short readout time, high granularity and high tolerance to radiation. This thesis mainly focuses on the radiation tolerance studies. To achieve the targeted readout time (tens of microseconds), the sensor pixel readout was organized in parallel columns restricting in addition the readout to pixels that had collected the signal charge. The pixels became then more complex, and consequently more sensitive to radiation. Different in-pixel architectures were studied and it was concluded that the tolerance to ionizing radiation was limited to 300 krad with the 0.35- m fabrication process currently used, while the targeted value was several Mrad. Improving this situation calls for implementation of the sensors in processes with a smaller feature size which naturally imp...

  8. Implementation of a Customisable Readout Sequence for the ALICE ITS Upgrade Explorer Family Chips

    CERN Document Server

    Gazzari, Matthias

    2014-01-01

    Within the ALICE ITS upgrade R&D programme the Explorer family chips are developed featuring 11700 pixels which are split into 18 different sectors with different properties. These pixels are read out sequentially leading to a time span of 2.34ms between the first and last pixel. Due to the long readout time, shot noise induced by the leakage currents in the in-pixel analogue memories makes the comparison of different sensor implementations located in distant sectors on the Explorer family chips difficult. In order to reduce this noise contribution a customisable readout sequence is developed to read parts instead of the whole chip which reduces the overall readout time. This readout sequence is integrated in the existing characterisation framework in order to choose the best performing sensor implementation through pixel-by-pixel comparison without readout-induced effects.

  9. Readout of the upgraded ALICE-ITS

    Science.gov (United States)

    Szczepankiewicz, A.; ALICE Collaboration

    2016-07-01

    The ALICE experiment will undergo a major upgrade during the second long shutdown of the CERN LHC. As part of this program, the present Inner Tracking System (ITS), which employs different layers of hybrid pixels, silicon drift and strip detectors, will be replaced by a completely new tracker composed of seven layers of monolithic active pixel sensors. The upgraded ITS will have more than twelve billion pixels in total, producing 300 Gbit/s of data when tracking 50 kHz Pb-Pb events. Two families of pixel chips realized with the TowerJazz CMOS imaging process have been developed as candidate sensors: the ALPIDE, which uses a proprietary readout and sparsification mechanism and the MISTRAL-O, based on a proven rolling shutter architecture. Both chips can operate in continuous mode, with the ALPIDE also supporting triggered operations. As the communication IP blocks are shared among the two chip families, it has been possible to develop a common Readout Electronics. All the sensor components (analog stages, state machines, buffers, FIFOs, etc.) have been modelled in a system level simulation, which has been extensively used to optimize both the sensor and the whole readout chain design in an iterative process. This contribution covers the progress of the R&D efforts and the overall expected performance of the ALICE-ITS readout system.

  10. Readout of the upgraded ALICE-ITS

    International Nuclear Information System (INIS)

    Szczepankiewicz, A.

    2016-01-01

    The ALICE experiment will undergo a major upgrade during the second long shutdown of the CERN LHC. As part of this program, the present Inner Tracking System (ITS), which employs different layers of hybrid pixels, silicon drift and strip detectors, will be replaced by a completely new tracker composed of seven layers of monolithic active pixel sensors. The upgraded ITS will have more than twelve billion pixels in total, producing 300 Gbit/s of data when tracking 50 kHz Pb–Pb events. Two families of pixel chips realized with the TowerJazz CMOS imaging process have been developed as candidate sensors: the ALPIDE, which uses a proprietary readout and sparsification mechanism and the MISTRAL-O, based on a proven rolling shutter architecture. Both chips can operate in continuous mode, with the ALPIDE also supporting triggered operations. As the communication IP blocks are shared among the two chip families, it has been possible to develop a common Readout Electronics. All the sensor components (analog stages, state machines, buffers, FIFOs, etc.) have been modelled in a system level simulation, which has been extensively used to optimize both the sensor and the whole readout chain design in an iterative process. This contribution covers the progress of the R&D efforts and the overall expected performance of the ALICE-ITS readout system.

  11. Readout of the upgraded ALICE-ITS

    Energy Technology Data Exchange (ETDEWEB)

    Szczepankiewicz, A., E-mail: Adam.Szczepankiewicz@cern.ch [CERN, Geneva (Switzerland); Institute of Computer Science, Warsaw University of Technology, Warsaw (Poland)

    2016-07-11

    The ALICE experiment will undergo a major upgrade during the second long shutdown of the CERN LHC. As part of this program, the present Inner Tracking System (ITS), which employs different layers of hybrid pixels, silicon drift and strip detectors, will be replaced by a completely new tracker composed of seven layers of monolithic active pixel sensors. The upgraded ITS will have more than twelve billion pixels in total, producing 300 Gbit/s of data when tracking 50 kHz Pb–Pb events. Two families of pixel chips realized with the TowerJazz CMOS imaging process have been developed as candidate sensors: the ALPIDE, which uses a proprietary readout and sparsification mechanism and the MISTRAL-O, based on a proven rolling shutter architecture. Both chips can operate in continuous mode, with the ALPIDE also supporting triggered operations. As the communication IP blocks are shared among the two chip families, it has been possible to develop a common Readout Electronics. All the sensor components (analog stages, state machines, buffers, FIFOs, etc.) have been modelled in a system level simulation, which has been extensively used to optimize both the sensor and the whole readout chain design in an iterative process. This contribution covers the progress of the R&D efforts and the overall expected performance of the ALICE-ITS readout system.

  12. Pixel Experiments

    DEFF Research Database (Denmark)

    Petersen, Kjell Yngve; Søndergaard, Karin; Augustesen, Christina

    2015-01-01

    Pixel Experiments The term pixel is traditionally defined as any of the minute elements that together constitute a larger context or image. A pixel has its own form and is the smallest unit seen within a larger structure. In working with the potentials of LED technology in architectural lighting...... for using LED lighting in lighting design practice. The speculative experiments that have been set-up have aimed to clarify the variables that can be used as parameters in the design of lighting applications; including, for example, the structuring and software control of light. The experiments also...... elucidate and exemplify already well-known problems in relation to the experience of vertical and horizontal lighting. Pixel Experiments exist as a synergy between speculative test setups and lighting design in practice. This book is one of four books that is published in connection with the research...

  13. Development of a Timepix3 readout system based on the Merlin readout system

    International Nuclear Information System (INIS)

    Crevatin, G.; Carrato, S.; Horswell, I.; Omar, D.; Tartoni, N.; Cautero, G.

    2015-01-01

    Timepix3 chip is a new ASIC specifically designed to readout hybrid pixel detectors. The main purpose of Timepix3 is to measure the time of arrival of events. This characteristic can be exploited very effectively to develop detectors for time resolved experiments at synchrotron radiation facilities. In order to investigate how the ASIC can be applied to synchrotron experiments the Merlin readout system, developed at Diamond for the Medipix3 ASIC, has been adapted to readout the Timepix3 ASIC. The first tests of the ASIC with pulse injection and with alpha particles show that its behaviour is consistent with its nominal characteristics

  14. Pixel Experiments

    DEFF Research Database (Denmark)

    Petersen, Kjell Yngve; Søndergaard, Karin; Augustesen, Christina

    2015-01-01

    Pixel Experiments The term pixel is traditionally defined as any of the minute elements that together constitute a larger context or image. A pixel has its own form and is the smallest unit seen within a larger structure. In working with the potentials of LED technology in architectural lighting...... lighting design in practice, one quickly experiences and realises that there are untapped potentials in the attributes of LED technology. In this research, speculative studies have been made working with the attributes of LEDs in architectural contexts, with the ambition to ascertain new strategies...... for using LED lighting in lighting design practice. The speculative experiments that have been set-up have aimed to clarify the variables that can be used as parameters in the design of lighting applications; including, for example, the structuring and software control of light. The experiments also...

  15. Advanced pixel architectures for scientific image sensors

    CERN Document Server

    Coath, R; Godbeer, A; Wilson, M; Turchetta, R

    2009-01-01

    We present recent developments from two projects targeting advanced pixel architectures for scientific applications. Results are reported from FORTIS, a sensor demonstrating variants on a 4T pixel architecture. The variants include differences in pixel and diode size, the in-pixel source follower transistor size and the capacitance of the readout node to optimise for low noise and sensitivity to small amounts of charge. Results are also reported from TPAC, a complex pixel architecture with ~160 transistors per pixel. Both sensors were manufactured in the 0.18μm INMAPS process, which includes a special deep p-well layer and fabrication on a high resistivity epitaxial layer for improved charge collection efficiency.

  16. 3D, Flash, Induced Current Readout for Silicon Sensors

    Energy Technology Data Exchange (ETDEWEB)

    Parker, Sherwood I. [Univ. of Hawaii, Honolulu, HI (United States)

    2014-06-07

    A new method for silicon microstrip and pixel detector readout using (1) 65 nm-technology current amplifers which can, for the first time with silicon microstrop and pixel detectors, have response times far shorter than the charge collection time (2) 3D trench electrodes large enough to subtend a reasonable solid angle at most track locations and so have adequate sensitivity over a substantial volume of pixel, (3) induced signals in addition to, or in place of, collected charge

  17. JPL CMOS Active Pixel Sensor Technology

    Science.gov (United States)

    Fossum, E. R.

    1995-01-01

    This paper will present the JPL-developed complementary metal- oxide-semiconductor (CMOS) active pixel sensor (APS) technology. The CMOS APS has achieved performance comparable to charge coupled devices, yet features ultra low power operation, random access readout, on-chip timing and control, and on-chip analog to digital conversion. Previously published open literature will be reviewed.

  18. Simulation of the D{sub s} semileptonic decay with the PANDA detector and experimental verification of the Micro-Vertex-Detector pixel readout ASIC with proton test beam

    Energy Technology Data Exchange (ETDEWEB)

    Cao, Lu

    2016-07-14

    The PANDA experiment will study a wide range of physics topics with beams of antiprotons incident on fixed proton or complex nuclear targets. One issue is the D{sub s} semileptonic decay, which is governed by the weak and strong forces. The interaction can be parameterized by a transition form factor. The performance of PANDA to measure the decay form factor of D{sup +}{sub s}→ηe{sup +}ν{sub e} is evaluated via Monte Carlo simulation. This thesis concentrates on describing the software development and the evaluation of the expected precision. A preliminary estimate of the expected count rate is obtained. In this measurement, it is essential to reconstruct the D{sub s} semileptonic decay with high efficiency and purity in order to overcome the many orders of magnitude higher background. The Micro-Vertex-Detector plays an import role in the whole tracking system. The rate capability and tracking performance of the recent ASIC prototype for the readout of the MVD is tested using a beam of high-energy protons.

  19. The Young-Feynman two-slits experiment with single electrons: Build-up of the interference pattern and arrival-time distribution using a fast-readout pixel detector

    Energy Technology Data Exchange (ETDEWEB)

    Frabboni, Stefano [Department of Physics, University of Modena and Reggio Emilia, Via G. Campi 213/a, 41125 Modena (Italy); CNR-Institute of Nanoscience-S3, Via G. Campi 213/a, 41125 Modena (Italy); Gabrielli, Alessandro [Department of Physics, University of Bologna, Viale B. Pichat 6/2, 40127 Bologna (Italy); INFN, Viale B. Pichat 6/2, 40127 Bologna (Italy); Carlo Gazzadi, Gian [CNR-Institute of Nanoscience-S3, Via G. Campi 213/a, 41125 Modena (Italy); Giorgi, Filippo [Department of Physics, University of Bologna, Viale B. Pichat 6/2, 40127 Bologna (Italy); INFN, Viale B. Pichat 6/2, 40127 Bologna (Italy); Matteucci, Giorgio [Department of Physics, University of Bologna, Viale B. Pichat 6/2, 40127 Bologna (Italy); Pozzi, Giulio, E-mail: giulio.pozzi@unibo.it [Department of Physics, University of Bologna, Viale B. Pichat 6/2, 40127 Bologna (Italy); Cesari, Nicola Semprini; Villa, Mauro; Zoccoli, Antonio [Department of Physics, University of Bologna, Viale B. Pichat 6/2, 40127 Bologna (Italy); INFN, Viale B. Pichat 6/2, 40127 Bologna (Italy)

    2012-05-15

    The two-slits experiment for single electrons has been carried out by inserting in a conventional transmission electron microscope a thick sample with two nano-slits fabricated by Focused Ion Beam technique and a fast recording system able to measure the electron arrival-time. The detector, designed for experiments in future colliders, is based on a custom CMOS chip equipped with a fast readout chain able to manage up to 10{sup 6} frames per second. In this way, high statistic samples of single electron events can be collected within a time interval short enough to measure the distribution of the electron arrival-times and to observe the build-up of the interference pattern. -- Highlights: Black-Right-Pointing-Pointer We present the first results obtained regarding the two-slits Young-Feynman experiment with single electrons. Black-Right-Pointing-Pointer We use two nano-slits fabricated by Focused Ion Beam technique. Black-Right-Pointing-Pointer We insert in the transmission electron microscope a detector, designed for experiments in future colliders. Black-Right-Pointing-Pointer We record the build-up of high statistic single electron interference patterns. Black-Right-Pointing-Pointer We measure the time distribution of electron arrivals.

  20. Precision tracking with a single gaseous pixel detector

    NARCIS (Netherlands)

    Tsigaridas, S.; van Bakel, N.; Bilevych, Y.; Gromov, V.; Hartjes, F.; Hessey, N.P.; de Jong, P.; Kluit, R.

    2015-01-01

    The importance of micro-pattern gaseous detectors has grown over the past few years after successful usage in a large number of applications in physics experiments and medicine. We develop gaseous pixel detectors using micromegas-based amplification structures on top of CMOS pixel readout chips.

  1. CMOS Active-Pixel Image Sensor With Simple Floating Gates

    Science.gov (United States)

    Fossum, Eric R.; Nakamura, Junichi; Kemeny, Sabrina E.

    1996-01-01

    Experimental complementary metal-oxide/semiconductor (CMOS) active-pixel image sensor integrated circuit features simple floating-gate structure, with metal-oxide/semiconductor field-effect transistor (MOSFET) as active circuit element in each pixel. Provides flexibility of readout modes, no kTC noise, and relatively simple structure suitable for high-density arrays. Features desirable for "smart sensor" applications.

  2. First large DEPFET pixel modules for the Belle II Pixel Detector

    Energy Technology Data Exchange (ETDEWEB)

    Mueller, Felix; Avella, Paola; Kiesling, Christian; Koffmane, Christian; Moser, Hans-Guenther; Valentan, Manfred [Max-Planck-Institut fuer Physik, Muenchen (Germany); Andricek, Ladislav; Richter, Rainer [Halbleiterlabor der Max-Planck-Gesellschaft, Muenchen (Germany); Collaboration: Belle II-Collaboration

    2016-07-01

    DEPFET pixel detectors offer excellent signal to noise ratio, resolution and low power consumption with a low material budget. They will be used at Belle II and are a candidate for an ILC vertex detector. The pixels are integrated in a monolithic piece of silicon which also acts as PCB providing the signal and control routings for the ASICs on top. The first prototype DEPFET sensor modules for Belle II have been produced. The modules have 192000 pixels and are equipped with SMD components and three different kinds of ASICs to control and readout the pixels. The entire readout chain has to be studied; the metal layer interconnectivity and routings need to be verified. The modules are fully characterized, and the operation voltages and control sequences of the ASICs are investigated. An overview of the DEPFET concept and first characterization results is presented.

  3. Development of the ASICs for the NA62 pixel Gigatracker

    CERN Document Server

    Jarron, P

    2008-01-01

    We present the ASIC development for the readout electronics of the Gigatracker pixel detector of NA62. Specifications of this detector are challenging in terms of timing precision with a hit time stamp accuracy of 100 ps and a peak hit rate of 50 Mhits/cm2/s. A timing precision and hit rate are more than one order of magnitude faster than pixel LHC readout ASIC. The research for pixel cell design and the readout architectures are following two approaches, which are presented and discussed in this paper. Presently demonstrator prototypes are under development and SPICE simulation results of the frontend, the readout strategy and and the pixelcolumn are also presented and discussed.

  4. The pin pixel detector--neutron imaging

    CERN Document Server

    Bateman, J E; Derbyshire, G E; Duxbury, D M; Marsh, A S; Rhodes, N J; Schooneveld, E M; Simmons, J E; Stephenson, R

    2002-01-01

    The development and testing of a neutron gas pixel detector intended for application in neutron diffraction studies is reported. Using standard electrical connector pins as point anodes, the detector is based on a commercial 100 pin connector block. A prototype detector of aperture 25.4 mmx25.4 mm has been fabricated, giving a pixel size of 2.54 mm which matches well to the spatial resolution typically required in a neutron diffractometer. A 2-Dimensional resistive divide readout system has been adapted to permit the imaging properties of the detector to be explored in advance of true pixel readout electronics. The timing properties of the device match well to the requirements of the ISIS-pulsed neutron source.

  5. Development of pixel detectors for SSC vertex tracking

    International Nuclear Information System (INIS)

    Kramer, G.; Shapiro, S.L.; Arens, J.F.; Jernigan, J.G.; Skubic, P.

    1991-04-01

    A description of hybrid PIN diode arrays and a readout architecture for their use as a vertex detector in the SSC environment is presented. Test results obtained with arrays having 256 x 256 pixels, each 30 μm square, are also presented. The development of a custom readout for the SSC will be discussed, which supports a mechanism for time stamping hit pixels, storing their xy coordinates, and storing the analog information within the pixel. The peripheral logic located on the array, permits the selection of those pixels containing interesting data and their coordinates to be selectively read out. This same logic also resolves ambiguous pixel ghost locations and controls the pixel neighbor read out necessary to achieve high spatial resolution. The thermal design of the vertex tracker and the proposed signal processing architecture will also be discussed. 5 refs., 13 figs., 3 tabs

  6. Operational Experience with the ATLAS Pixel Detector

    CERN Document Server

    Djama, Fares; The ATLAS collaboration

    2017-01-01

    Run-2 of the LHC is providing new challenges to track and vertex reconstruction imposed by the higher collision energy, pileup and luminosity that are being delivered. The ATLAS tracking performance relies critically on the Pixel Detector, therefore, in view of Run-2 of LHC, the ATLAS experiment has constructed the first 4-layer Pixel detector in HEP, installing a new Pixel layer, also called Insertable B-Layer (IBL). Pixel detector was refurbished with a new service quarter panel to recover about 3% of defective modules lost during run-1 and an additional optical link per module was added to overcome in some layers the readout bandwidth limitation when LHC will exceed the nominal peak luminosity by almost a factor of 3. The key features and challenges met during the IBL project will be presented, as well as its operational experience and Pixel Detector performance in LHC.

  7. High-voltage pixel sensors for ATLAS upgrade

    Energy Technology Data Exchange (ETDEWEB)

    Perić, I., E-mail: ivan.peric@ziti.uni-heidelberg.de [Heidelberg University, Institute of Computer Engineering, Mannheim (Germany); Kreidl, C.; Fischer, P. [Heidelberg University, Institute of Computer Engineering, Mannheim (Germany); Bompard, F.; Breugnon, P.; Clemens, J.-C.; Fougeron, D.; Liu, J.; Pangaud, P.; Rozanov, A.; Barbero, M. [CPPM, Marseille (France); Feigl, S.; Capeans, M.; Ferrere, D.; Pernegger, H.; Ristic, B. [CERN, Geneve (Switzerland); Muenstermann, D.; Gonzalez Sevilla, S.; La Rosa, A.; Miucci, A. [University of Geneve (Switzerland); and others

    2014-11-21

    The high-voltage (HV-) CMOS pixel sensors offer several good properties: a fast charge collection by drift, the possibility to implement relatively complex CMOS in-pixel electronics and the compatibility with commercial processes. The sensor element is a deep n-well diode in a p-type substrate. The n-well contains CMOS pixel electronics. The main charge collection mechanism is drift in a shallow, high field region, which leads to a fast charge collection and a high radiation tolerance. We are currently evaluating the use of the high-voltage detectors implemented in 180 nm HV-CMOS technology for the high-luminosity ATLAS upgrade. Our approach is replacing the existing pixel and strip sensors with the CMOS sensors while keeping the presently used readout ASICs. By intelligence we mean the ability of the sensor to recognize a particle hit and generate the address information. In this way we could benefit from the advantages of the HV sensor technology such as lower cost, lower mass, lower operating voltage, smaller pitch, smaller clusters at high incidence angles. Additionally we expect to achieve a radiation hardness necessary for ATLAS upgrade. In order to test the concept, we have designed two HV-CMOS prototypes that can be readout in two ways: using pixel and strip readout chips. In the case of the pixel readout, the connection between HV-CMOS sensor and the readout ASIC can be established capacitively.

  8. MKID digital readout tuning with deep learning

    Science.gov (United States)

    Dodkins, R.; Mahashabde, S.; O'Brien, K.; Thatte, N.; Fruitwala, N.; Walter, A. B.; Meeker, S. R.; Szypryt, P.; Mazin, B. A.

    2018-04-01

    Microwave Kinetic Inductance Detector (MKID) devices offer inherent spectral resolution, simultaneous read out of thousands of pixels, and photon-limited sensitivity at optical wavelengths. Before taking observations the readout power and frequency of each pixel must be individually tuned, and if the equilibrium state of the pixels change, then the readout must be retuned. This process has previously been performed through manual inspection, and typically takes one hour per 500 resonators (20 h for a ten-kilo-pixel array). We present an algorithm based on a deep convolution neural network (CNN) architecture to determine the optimal bias power for each resonator. The bias point classifications from this CNN model, and those from alternative automated methods, are compared to those from human decisions, and the accuracy of each method is assessed. On a test feed-line dataset, the CNN achieves an accuracy of 90% within 1 dB of the designated optimal value, which is equivalent accuracy to a randomly selected human operator, and superior to the highest scoring alternative automated method by 10%. On a full ten-kilopixel array, the CNN performs the characterization in a matter of minutes - paving the way for future mega-pixel MKID arrays.

  9. The NA60 experiment readout architecture

    CERN Document Server

    Floris, M; Usai, G L; David, A; Rosinsky, P; Ohnishi, H

    2004-01-01

    The NA60 experiment was designed to identify signatures of a new state of matter, the Quark Gluon Plasma, in heavy-ion collisions at the CERN Super Proton Synchroton. The apparatus is composed of four main detectors: a muon spectrometer (MS), a zero degree calorimeter (ZDC), a silicon vertex telescope (VT), and a silicon microstrip beam tracker (BT). The readout of the whole experiment is based on a PCI architecture. The basic unit is a general purpose PCI card, interfaced to the different subdetectors via custom mezzanine cards. This allowed us to successfully implement several completely different readout protocols (from the VME like protocol of the MS to the custom protocol of the pixel telescope). The system was fully tested with proton and ion beams, and several million events were collected in 2002 and 2003. This paper presents the readout architecture of NA60, with particular emphasis on the PCI layer common to all the subdetectors. (16 refs).

  10. A radiation-tolerant electronic readout system for portal imaging

    Science.gov (United States)

    Östling, J.; Brahme, A.; Danielsson, M.; Iacobaeus, C.; Peskov, V.

    2004-06-01

    A new electronic portal imaging device, EPID, is under development at the Karolinska Institutet and the Royal Institute of Technology. Due to considerable demands on radiation tolerance in the radiotherapy environment, a dedicated electronic readout system has been designed. The most interesting aspect of the readout system is that it allows to read out ˜1000 pixels in parallel, with all electronics placed outside the radiation beam—making the detector more radiation resistant. In this work we are presenting the function of a small prototype (6×100 pixels) of the electronic readout board that has been tested. Tests were made with continuous X-rays (10-60 keV) and with α particles. The results show that, without using an optimised gas mixture and with an early prototype only, the electronic readout system still works very well.

  11. The Phase-2 ATLAS ITk Pixel Upgrade

    CERN Document Server

    Macchiolo, Anna; The ATLAS collaboration

    2018-01-01

    The new ATLAS ITk pixel system will be installed during the LHC Phase-II shutdown, to better take advantage of the increased luminosity of the HL-LHC. The detector will consist of 5 layers of stave-like support structures in the most central region and ring-shaped supports in the endcap regions, covering up to |η| < 4. While the outer 3 layers of the Pixel Detector are designed to operate for the full HL-LHC data taking period, the innermost 2 layers of the detector will be replaced around half of the lifetime. The ITk pixel detector will be instrumented with new sensors and readout electronics to provide improved tracking performance and radiation hardness compared to the current detector. Sensors will be read out by new ASICs based on the chip developed by the RD53 Collaboration. The pixel off-detector readout electronics will be implemented in the framework of the general ATLAS trigger and DAQ system with a readout speed of up to 5 Gb/s per data link for the innermost layers. Results of extensive tests...

  12. Status of the CMS Phase I pixel detector upgrade

    Energy Technology Data Exchange (ETDEWEB)

    Spannagel, S., E-mail: simon.spannagel@desy.de

    2016-09-21

    A new pixel detector for the CMS experiment is being built, owing to the instantaneous luminosities anticipated for the Phase I Upgrade of the LHC. The new CMS pixel detector provides four-hit tracking while featuring a significantly reduced material budget as well as new cooling and powering schemes. A new front-end readout chip mitigates buffering and bandwidth limitations, and comprises a low-threshold comparator. These improvements allow the new pixel detector to sustain and improve the efficiency of the current pixel tracker at the increased requirements imposed by high luminosities and pile-up. This contribution gives an overview of the design of the upgraded pixel detector and the status of the upgrade project, and presents test beam performance measurements of the production read-out chip.

  13. Status of the CMS Phase I Pixel Detector Upgrade

    CERN Document Server

    Spannagel, Simon

    2016-09-21

    A new pixel detector for the CMS experiment is being built, owing to the instantaneous luminosities anticipated for the Phase~I Upgrade of the LHC. The new CMS pixel detector provides four-hit tracking while featuring a significantly reduced material budget as well as new cooling and powering schemes. A new front-end readout chip mitigates buffering and bandwidth limitations, and comprises a low-threshold comparator. These improvements allow the new pixel detector to sustain and improve the efficiency of the current pixel tracker at the increased requirements imposed by high luminosities and pile-up. This contribution gives an overview of the design of the upgraded pixel detector and the status of the upgrade project, and presents test beam performance measurements of the production read-out chip.

  14. Active pixel sensor pixel having a photodetector whose output is coupled to an output transistor gate

    Science.gov (United States)

    Fossum, Eric R. (Inventor); Nakamura, Junichi (Inventor); Kemeny, Sabrina E. (Inventor)

    2005-01-01

    An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node. There is also a readout circuit, part of which can be disposed at the bottom of each column of cells and be common to all the cells in the column. A Simple Floating Gate (SFG) pixel structure could also be employed in the imager to provide a non-destructive readout and smaller pixel sizes.

  15. Online calibrations and performance of the ATLAS Pixel Detector

    CERN Document Server

    Keil, M; The ATLAS collaboration

    2010-01-01

    The ATLAS Pixel Detector is the innermost detector of the ATLAS experiment at the Large Hadron Collider at CERN. It consists of 1744 silicon sensors equipped with approximately 80 M electronic channels, providing typically three measurement points with high resolution for particles emerging from the beam-interaction region, thus allowing measuring particle tracks and secondary vertices with very high precision. The readout system of the Pixel Detector is based on a bi-directional optical data transmission system between the detector and the data acquisition system with an individual link for each of the 1744 modules. Signal conversion components are located on both ends, approximately 80 m apart. The talk will give an overview of the calibration and performance of both the detector and its optical readout. The most basic parameter to be tuned and calibrated for the detector electronics is the readout threshold of the individual pixel channels. These need to be carefully tuned to optimise position resolution a...

  16. Qualification Procedures of the CMS Pixel Barrel Modules

    CERN Document Server

    Starodumov, A; Horisberger, R.; Kastli, H.Chr.; Kotlinski, D.; Langenegger, U.; Meier, B.; Rohe, T.; Trueb, P.

    2006-01-01

    The CMS pixel barrel system will consist of three layers built of about 800 modules. One module contains 66560 readout channels and the full pixel barrel system about 48 million channels. It is mandatory to test each channel for functionality, noise level, trimming mechanism, and bump bonding quality. Different methods to determine the bump bonding yield with electrical measurements have been developed. Measurements of several operational parameters are also included in the qualification procedure. Among them are pixel noise, gains and pedestals. Test and qualification procedures of the pixel barrel modules are described and some results are presented.

  17. Production chain of CMS pixel modules

    CERN Multimedia

    2006-01-01

    The pictures show the production chain of pixel modules for the CMS detector. Fig.1: overview of the assembly procedure. Fig.2: bump bonding with ReadOut Chip (ROC) connected to the sensor. Fig.3: glueing a raw module onto the baseplate strips. Fig.4: glueing of the High Density Interconnect (HDI) onto a raw module. Fig.5: pull test after heat reflow. Fig.6: wafer sensor processing, Indium evaporation.

  18. The pin pixel detector--X-ray imaging

    CERN Document Server

    Bateman, J E; Derbyshire, G E; Duxbury, D M; Marsh, A S; Simmons, J E; Stephenson, R

    2002-01-01

    The development and testing of a soft X-ray gas pixel detector, which uses connector pins for the anodes is reported. Based on a commercial 100 pin connector block, a prototype detector of aperture 25.4 mm centre dot 25.4 mm can be economically fabricated. The individual pin anodes all show the expected characteristics of small gas detectors capable of counting rates reaching 1 MHz per pin. A 2-dimensional resistive divide readout system has been developed to permit the imaging properties of the detector to be explored in advance of true pixel readout electronics.

  19. CMS Forward Pixel Upgrade Electronics and System Testing

    CERN Document Server

    Weber, Hannsjorg Artur

    2016-01-01

    This note discusses results of electronics and system testing of the CMS forward pixel (FPIX) detector upgrade for Phase 1. The FPIX detector is comprised of four stand-alone half cylinders, each of which contains frontend readout electronic boards, power regulators, cables and fibers in addition to the pixel modules. All of the components undergo rigorous testing and quality assurance before assembly into the half cylinders. Afterwards, we perform full system tests on the completely assembled half cylinders, including calibrations at final operating temperatures, characterization of the realistic readout chain, and system grounding and noise studies. The results from all these tests are discussed.

  20. Studies on the Optical Readout for the ATLAS Pixel Detector

    CERN Document Server

    Flick, Tobias

    The particle physics is concentrating on the research of the structure of the matter which is observable in our world. How is this world built. Which particles exist, which are necessary to build up the world? How is this matter kept together, what are the interactions between the known particles? The answers to these questions are obtained by observing the known particles, to study their properties, and to search new for particles. Models are developed to describe all the observations. Experiments are performed to proove the models. The best prooven model to describe many of the observations is the Standard Model. The Standard Model is elucidated in Chapter 1. It is tested very precisely by experimental measurements in the last years, but cannot explain all phenomena of nature. To discover the last not observed particle of the Standard Model, the Higgs boson, and to extend the model further experiments are needed. To study the elementary particles machines and instruments are necessary to produce and measur...

  1. Digital radiography using amorphous selenium: photoconductively activated switch (PAS) readout system.

    Science.gov (United States)

    Reznik, Nikita; Komljenovic, Philip T; Germann, Stephen; Rowlands, John A

    2008-03-01

    A new amorphous selenium (a-Se) digital radiography detector is introduced. The proposed detector generates a charge image in the a-Se layer in a conventional manner, which is stored on electrode pixels at the surface of the a-Se layer. A novel method, called photoconductively activated switch (PAS), is used to read out the latent x-ray charge image. The PAS readout method uses lateral photoconduction at the a-Se surface which is a revolutionary modification of the bulk photoinduced discharge (PID) methods. The PAS method addresses and eliminates the fundamental weaknesses of the PID methods--long readout times and high readout noise--while maintaining the structural simplicity and high resolution for which PID optical readout systems are noted. The photoconduction properties of the a-Se surface were investigated and the geometrical design for the electrode pixels for a PAS radiography system was determined. This design was implemented in a single pixel PAS evaluation system. The results show that the PAS x-ray induced output charge signal was reproducible and depended linearly on the x-ray exposure in the diagnostic exposure range. Furthermore, the readout was reasonably rapid (10 ms for pixel discharge). The proposed detector allows readout of half a pixel row at a time (odd pixels followed by even pixels), thus permitting the readout of a complete image in 30 s for a 40 cm x 40 cm detector with the potential of reducing that time by using greater readout light intensity. This demonstrates that a-Se based x-ray detectors using photoconductively activated switches could form a basis for a practical integrated digital radiography system.

  2. X-ray imaging using amorphous selenium: a photoinduced discharge readout method for digital mammography.

    Science.gov (United States)

    Rowlands, J A; Hunter, D M; Araj, N

    1991-01-01

    A new digital image readout method for electrostatic charge images on photoconductive plates is described. The method can be used to read out images on selenium plates similar to those used in xeromammography. The readout method, called the air-gap photoinduced discharge method (PID), discharges the latent image pixel by pixel and measures the charge. The PID readout method, like electrometer methods, is linear. However, the PID method permits much better resolution than scanning electrometers while maintaining quantum limited performance at high radiation exposure levels. Thus the air-gap PID method appears to be uniquely superior for high-resolution digital imaging tasks such as mammography.

  3. The Level 0 Pixel Trigger system for the ALICE experiment

    International Nuclear Information System (INIS)

    Rinella, G Aglieri; Kluge, A; Krivda, M

    2007-01-01

    The ALICE Silicon Pixel Detector contains 1200 readout chips. Fast-OR signals indicate the presence of at least one hit in the 8192 pixel matrix of each chip. The 1200 bits are transmitted every 100 ns on 120 data readout optical links using the G-Link protocol. The Pixel Trigger System extracts and processes them to deliver an input signal to the Level 0 trigger processor targeting a latency of 800 ns. The system is compact, modular and based on FPGA devices. The architecture allows the user to define and implement various trigger algorithms. The system uses advanced 12-channel parallel optical fiber modules operating at 1310 nm as optical receivers and 12 deserializer chips closely packed in small area receiver boards. Alternative solutions with multi-channel G-Link deserializers implemented directly in programmable hardware devices were investigated. The design of the system and the progress of the ALICE Pixel Trigger project are described in this paper

  4. Status of the digital pixel array detector for protein crystallography

    CERN Document Server

    Datte, P; Beuville, E; Endres, N; Druillole, F; Luo, L; Millaud, J E; Xuong, N H

    1999-01-01

    A two-dimensional photon counting digital pixel array detector is being designed for static and time resolved protein crystallography. The room temperature detector will significantly enhance monochromatic and polychromatic protein crystallographic through-put data rates by more than three orders of magnitude. The detector has an almost infinite photon counting dynamic range and exhibits superior spatial resolution when compared to present crystallographic phosphor imaging plates or phosphor coupled CCD detectors. The detector is a high resistivity N-type Si with a pixel pitch of 150x150 mu m, and a thickness of 300 mu m, and is bump bonded to an application specific integrated circuit. The event driven readout of the detector is based on the column architecture and allows an independent pixel hit rate above 1 million photons/s/pixel. The device provides energy discrimination and sparse data readout which yields minimal dead-time. This type of architecture allows a continuous (frameless) data acquisition, a f...

  5. Single-Readout High-Density Memristor Crossbar

    KAUST Repository

    Zidan, M. A.

    2016-01-07

    High-density memristor-crossbar architecture is a very promising technology for future computing systems. The simplicity of the gateless-crossbar structure is both its principal advantage and the source of undesired sneak-paths of current. This parasitic current could consume an enormous amount of energy and ruin the readout process. We introduce new adaptive-threshold readout techniques that utilize the locality and hierarchy properties of the computer-memory system to address the sneak-paths problem. The proposed methods require a single memory access per pixel for an array readout. Besides, the memristive crossbar consumes an order of magnitude less power than state-of-the-art readout techniques.

  6. Single-Readout High-Density Memristor Crossbar

    KAUST Repository

    Zidan, M. A.; Omran, Hesham; Naous, Rawan; Salem, Ahmed Sultan; Fahmy, H. A. H.; Lu, W. D.; Salama, Khaled N.

    2016-01-01

    High-density memristor-crossbar architecture is a very promising technology for future computing systems. The simplicity of the gateless-crossbar structure is both its principal advantage and the source of undesired sneak-paths of current. This parasitic current could consume an enormous amount of energy and ruin the readout process. We introduce new adaptive-threshold readout techniques that utilize the locality and hierarchy properties of the computer-memory system to address the sneak-paths problem. The proposed methods require a single memory access per pixel for an array readout. Besides, the memristive crossbar consumes an order of magnitude less power than state-of-the-art readout techniques.

  7. Active pixel sensor with intra-pixel charge transfer

    Science.gov (United States)

    Fossum, Eric R. (Inventor); Mendis, Sunetra (Inventor); Kemeny, Sabrina E. (Inventor)

    2004-01-01

    An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node.

  8. New results on diamond pixel sensors using ATLAS frontend electronics

    International Nuclear Information System (INIS)

    Keil, M.; Adam, W.; Berdermann, E.; Bergonzo, P.; Boer, W. de; Bogani, F.; Borchi, E.; Brambilla, A.; Bruzzi, M.; Colledani, C.; Conway, J.; D'Angelo, P.; Dabrowski, W.; Delpierre, P.; Dulinski, W.; Doroshenko, J.; Doucet, M.; Eijk, B. van; Fallou, A.; Fischer, P.; Fizzotti, F.; Kania, D.; Gan, K.K.; Grigoriev, E.; Hallewell, G.; Han, S.; Hartjes, F.; Hrubec, J.; Husson, D.; Kagan, H.; Kaplon, J.; Kass, R.; Knoepfle, K.T.; Koeth, T.; Krammer, M.; Logiudice, A.; Mac Lynne, L.; Manfredotti, C.; Meier, D.; Menichelli, D.; Meuser, S.; Mishina, M.; Moroni, L.; Noomen, J.; Oh, A.; Pan, L.S.; Pernicka, M.; Perera, L.; Riester, J.L.; Roe, S.; Rudge, A.; Russ, J.; Sala, S.; Sampietro, M.; Schnetzer, S.; Sciortino, S.; Stelzer, H.; Stone, R.; Suter, B.; Trischuk, W.; Tromson, D.; Vittone, E.; Weilhammer, P.; Wermes, N.; Wetstein, M.; Zeuner, W.; Zoeller, M.

    2003-01-01

    Diamond is a promising sensor material for future collider experiments due to its radiation hardness. Diamond pixel sensors have been bump bonded to an ATLAS pixel readout chip using PbSn solder bumps. Single chip devices have been characterised by lab measurements and in a high-energy pion beam at CERN. Results on charge collection, spatial resolution, efficiency and the charge carrier lifetime are presented

  9. New results on diamond pixel sensors using ATLAS frontend electronics

    CERN Document Server

    Keil, Markus; Berdermann, E; Bergonzo, P; de Boer, Wim; Bogani, F; Borchi, E; Brambilla, A; Bruzzi, Mara; Colledani, C; Conway, J; D'Angelo, P; Dabrowski, W; Delpierre, P A; Dulinski, W

    2003-01-01

    Diamond is a promising sensor material for future collider experiments due to its radiation hardness. Diamond pixel sensors have been bump bonded to an ATLAS pixel readout chip using PbSn solder bumps. Single chip devices have been characterised by lab measurements and in a high-energy pion beam at CERN. Results on charge collection, spatial resolution, efficiency and the charge carrier lifetime are presented.

  10. New results on diamond pixel sensors using ATLAS frontend electronics

    Energy Technology Data Exchange (ETDEWEB)

    Keil, M. E-mail: markus.keil@cern.ch; Adam, W.; Berdermann, E.; Bergonzo, P.; Boer, W. de; Bogani, F.; Borchi, E.; Brambilla, A.; Bruzzi, M.; Colledani, C.; Conway, J.; D' Angelo, P.; Dabrowski, W.; Delpierre, P.; Dulinski, W.; Doroshenko, J.; Doucet, M.; Eijk, B. van; Fallou, A.; Fischer, P.; Fizzotti, F.; Kania, D.; Gan, K.K.; Grigoriev, E.; Hallewell, G.; Han, S.; Hartjes, F.; Hrubec, J.; Husson, D.; Kagan, H.; Kaplon, J.; Kass, R.; Knoepfle, K.T.; Koeth, T.; Krammer, M.; Logiudice, A.; Mac Lynne, L.; Manfredotti, C.; Meier, D.; Menichelli, D.; Meuser, S.; Mishina, M.; Moroni, L.; Noomen, J.; Oh, A.; Pan, L.S.; Pernicka, M.; Perera, L.; Riester, J.L.; Roe, S.; Rudge, A.; Russ, J.; Sala, S.; Sampietro, M.; Schnetzer, S.; Sciortino, S.; Stelzer, H.; Stone, R.; Suter, B.; Trischuk, W.; Tromson, D.; Vittone, E.; Weilhammer, P.; Wermes, N.; Wetstein, M.; Zeuner, W.; Zoeller, M

    2003-03-21

    Diamond is a promising sensor material for future collider experiments due to its radiation hardness. Diamond pixel sensors have been bump bonded to an ATLAS pixel readout chip using PbSn solder bumps. Single chip devices have been characterised by lab measurements and in a high-energy pion beam at CERN. Results on charge collection, spatial resolution, efficiency and the charge carrier lifetime are presented.

  11. New results on diamond pixel sensors using ATLAS frontend electronics

    Science.gov (United States)

    Keil, M.; Adam, W.; Berdermann, E.; Bergonzo, P.; de Boer, W.; Bogani, F.; Borchi, E.; Brambilla, A.; Bruzzi, M.; Colledani, C.; Conway, J.; D'Angelo, P.; Dabrowski, W.; Delpierre, P.; Dulinski, W.; Doroshenko, J.; Doucet, M.; van Eijk, B.; Fallou, A.; Fischer, P.; Fizzotti, F.; Kania, D.; Gan, K. K.; Grigoriev, E.; Hallewell, G.; Han, S.; Hartjes, F.; Hrubec, J.; Husson, D.; Kagan, H.; Kaplon, J.; Kass, R.; Knöpfle, K. T.; Koeth, T.; Krammer, M.; Logiudice, A.; mac Lynne, L.; Manfredotti, C.; Meier, D.; Menichelli, D.; Meuser, S.; Mishina, M.; Moroni, L.; Noomen, J.; Oh, A.; Pan, L. S.; Pernicka, M.; Perera, L.; Riester, J. L.; Roe, S.; Rudge, A.; Russ, J.; Sala, S.; Sampietro, M.; Schnetzer, S.; Sciortino, S.; Stelzer, H.; Stone, R.; Suter, B.; Trischuk, W.; Tromson, D.; Vittone, E.; Weilhammer, P.; Wermes, N.; Wetstein, M.; Zeuner, W.; Zoeller, M.

    2003-03-01

    Diamond is a promising sensor material for future collider experiments due to its radiation hardness. Diamond pixel sensors have been bump bonded to an ATLAS pixel readout chip using PbSn solder bumps. Single chip devices have been characterised by lab measurements and in a high-energy pion beam at CERN. Results on charge collection, spatial resolution, efficiency and the charge carrier lifetime are presented.

  12. A silicon pixel detector prototype for the CLIC vertex detector

    CERN Multimedia

    AUTHOR|(INSPIRE)INSPIRE-00714258

    2017-01-01

    A silicon pixel detector prototype for CLIC, currently under study for the innermost detector surrounding the collision point. The detector is made of a High-Voltage CMOS sensor (top) and a CLICpix2 readout chip (bottom) that are glued to each other. Both parts have a size of 3.3 x 4.0 $mm^2$ and consist of an array of 128 x 128 pixels of 25 x 25 $\\micro m^2$ size.

  13. Performance of active edge pixel sensors

    Science.gov (United States)

    Bomben, M.; Ducourthial, A.; Bagolini, A.; Boscardin, M.; Bosisio, L.; Calderini, G.; D'Eramo, L.; Giacomini, G.; Marchiori, G.; Zorzi, N.; Rummler, A.; Weingarten, J.

    2017-05-01

    To cope with the High Luminosity LHC harsh conditions, the ATLAS inner tracker has to be upgraded to meet requirements in terms of radiation hardness, pile up and geometrical acceptance. The active edge technology allows to reduce the insensitive area at the border of the sensor thanks to an ion etched trench which avoids the crystal damage produced by the standard mechanical dicing process. Thin planar n-on-p pixel sensors with active edge have been designed and produced by LPNHE and FBK foundry. Two detector module prototypes, consisting of pixel sensors connected to FE-I4B readout chips, have been tested with beams at CERN and DESY. In this paper the performance of these modules are reported. In particular the lateral extension of the detection volume, beyond the pixel region, is investigated and the results show high hit efficiency also at the detector edge, even in presence of guard rings.

  14. Application-specific architectures of CMOS monolithic active pixel sensors

    Energy Technology Data Exchange (ETDEWEB)

    Szelezniak, Michal [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France)]. E-mail: michal.szelezniak@ires.in2p3.fr; Besson, Auguste [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); Claus, Gilles; Colledani, Claude; [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); Degerli, Yavuz [CEA Saclay, DAPNIA, Gif-sur-Yvette Cedex (France); Deptuch, Grzegorz [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); Deveaux, Michael [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); GSI, Planckstrasse 1, Darmstadt 64291 (Germany); Dorokhov, Andrei [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); Dulinski, Wojciech [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); Fourches, Nicolas [CEA Saclay, DAPNIA, Gif-sur-Yvette Cedex (France); Goffe, Mathieu [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); Grandjean, Damien; Guilloux, Fabrice [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); Heini, Sebastien [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France)]|[GSI, Planckstrasse 1, Darmstadt 64291 (Germany); Himmi, Abdelkader [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); Hu, Christine [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); Jaaskelainen, Kimmo; Li, Yan; Lutz, Pierre; Orsini, Fabienne [CEA Saclay, DAPNIA, Gif-sur-Yvette Cedex (France); Pellicioli, Michel; Shabetai, Alexandre; Valin, Isabelle; Winter, Marc [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France)

    2006-11-30

    Several development directions intended to adapt and optimize monolithic active pixel sensors for specific applications are presented in this work. The first example, compatible with the STAR microvertex upgrade, is based on a simple two-transistor pixel circuitry. It is suited for a long integration time, room-temperature operation and minimum power dissipation. In another approach for this application, a specific readout method is proposed, allowing optimization of the integration time independently of the full frame-readout time. The circuit consists of an in-pixel front-end voltage amplifier, with a gain on the order of five, followed by two analog memory cells. The extended version of this scheme, based on the implementation of more memory cells per pixel, is the solution considered for the outer layers of a microvertex detector at the international linear collider. For the two innermost layers, a circuit allowing fast frame scans together with on-line, on-chip data sparsification is proposed. The first results of this prototype demonstrate that the fixed pattern dispersion is reduced below a noise level of 15 e{sup -}, allowing the use of a single comparator or a low-resolution ADC per pixel column. A common element for most of the mentioned readout schemes is a low-noise, low power consumption, layout efficient in-pixel amplifier. A review of possible solutions for this element together with some experimental results is presented.

  15. X-ray imaging with photon counting hybrid semiconductor pixel detectors

    CERN Document Server

    Manolopoulos, S; Campbell, M; Snoeys, W; Heijne, Erik H M; Pernigotti, E; Raine, C; Smith, K; Watt, J; O'Shea, V; Ludwig, J; Schwarz, C

    1999-01-01

    Semiconductor pixel detectors, originally developed for particle physics experiments, have been studied as X-ray imaging devices. The performance of devices using the OMEGA 3 read-out chip bump-bonded to pixellated silicon semiconductor detectors is characterised in terms of their signal-to-noise ratio when exposed to 60 kVp X-rays. Although parts of the devices achieve values of this ratio compatible with the noise being photon statistics limited, this is not found to hold for the whole pixel matrix, resulting in the global signal-to-noise ratio being compromised. First results are presented of X-ray images taken with a gallium arsenide pixel detector bump-bonded to a new read-out chip, (MEDIPIX), which is a single photon counting read-out chip incorporating a 15-bit counter in every pixel. (author)

  16. Radiation hardness of CMS pixel barrel modules

    International Nuclear Information System (INIS)

    Rohe, T.; Bean, A.; Erdmann, W.; Kaestli, H.-C.; Khalatyan, S.; Meier, B.; Radicci, V.; Sibille, J.

    2010-01-01

    Pixel detectors are used in the innermost part of the multi purpose experiments at the LHC and are therefore exposed to the highest fluences of ionising radiation, which in this part of the detectors consists mainly of charged pions. The radiation hardness of all detector components has been thoroughly tested up to the fluences expected at the LHC. In case of an LHC upgrade, the fluence will be much higher and it is not yet clear how long the present pixel modules will stay operative in such a harsh environment. The aim of this study was to establish such a limit as a benchmark for other possible detector concepts considered for the upgrade. As the sensors and the readout chip are the parts most sensitive to radiation damage, samples consisting of a small pixel sensor bump-bonded to a CMS-readout chip (PSI46V2.1) have been irradiated with positive 200 MeV pions at PSI up to 6x10 14 n eq /cm 2 and with 21 GeV protons at CERN up to 5x10 15 n eq /cm 2 . After irradiation the response of the system to beta particles from a 90 Sr source was measured to characterise the charge collection efficiency of the sensor. Radiation induced changes in the readout chip were also measured. The results show that the present pixel modules can be expected to be still operational after a fluence of 2.8x10 15 n eq /cm 2 . Samples irradiated up to 5x10 15 n eq /cm 2 still see the beta particles. However, further tests are needed to confirm whether a stable operation with high particle detection efficiency is possible after such a high fluence.

  17. Yarr: A PCIe based readout system for semiconductor tracking systems

    Energy Technology Data Exchange (ETDEWEB)

    Heim, Timon [Bergische Universitaet Wuppertal, Wuppertal (Germany); CERN, Geneva (Switzerland); Maettig, Peter [Bergische Universitaet Wuppertal, Wuppertal (Germany); Pernegger, Heinz [CERN, Geneva (Switzerland)

    2015-07-01

    The Yarr readout system is a novel DAQ concept, using an FPGA board connected via PCIe to a computer, to read out semiconductor tracking systems. The system uses the FPGA as a reconfigurable IO interface which, in conjunction with the very high speed of the PCIe bus, enables a focus of processing the data stream coming from the pixel detector in software. Modern computer system could potentially make the need of custom signal processing hardware in readout systems obsolete and the Yarr readout system showcases this for FE-I4 chips, which are state-of-the-art readout chips used in the ATLAS Pixel Insertable B-Layer and developed for tracking in high multiplicity environments. The underlying concept of the Yarr readout system tries to move intelligence from hardware into the software without the loss of performance, which is made possible by modern multi-core processors. The FPGA board firmware acts like a buffer and does no further processing of the data stream, enabling rapid integration of new hardware due to minimal firmware minimisation.

  18. Novel concept of TDI readout circuit for LWIR detector

    Science.gov (United States)

    Kim, Byunghyuck; Yoon, Nanyoung; Lee, Hee Chul; Kim, Choong-Ki

    2000-07-01

    Noise property is the prime consideration in readout circuit design. The output noise caused by the photon noise, which dominates total noise in BLIP detectors, is limited by the integration time that an element looks at a specific point in the scene. Large integration time leads to a low noise performance. Time-delay integration (TDI) is used to effectively increase the integration time and reduce the photon noise. However, it increases the number of dead pixels and requires large integration capacitors and low noise output stage of the readout circuit. In this paper, to solve these problems, we propose a new concept of readout circuit, which performs background suppression, cell-to-cell background current non-uniformity compensation, and dead pixel correction using memory, ADC, DAC, and current copier cell. In simulation results, comparing with the conventional TDI readout circuit, the integration capacitor size can be reduced to 1/5 and trans-impedance gain can be increased by five times. Therefore, the new TDI readout circuit does not require large area and low noise output stage. And the error of skimming current is less than 2%, and the fixed pattern noise induced by cell-to-cell background current variation is reduced to less than 1%.

  19. Operational Experience and Performance with the ATLAS Pixel detector

    CERN Document Server

    Yang, Hongtao; The ATLAS collaboration

    2018-01-01

    In this presentation, I will discuss the operation of ATLAS Pixel Detector during Run 2 proton-proton data-taking at √s=13 TeV in 2017. The topics to be covered include 1) the bandwidth issue and how it is mitigated through readout upgrade and threshold adjustment; 2) the auto-corrective actions; 3) monitoring of radiation effects.

  20. ATLAS Phase-II upgrade pixel data transmission development

    CERN Document Server

    AUTHOR|(INSPIRE)INSPIRE-00111400; The ATLAS collaboration

    2017-01-01

    The current tracking system of the ATLAS experiment will be replaced by an all-silicon detector (ITk) in the course of the planned HL-LHC accelerator upgrade around 2025. The readout of the ITk pixel system will be most challenging in terms of data rate and readout speed. Simulation of the on-detector electronics indicates that the planned trigger rate of 1 MHz will require readout speeds up to 5.12 Gb/s per data link. The high-radiation environment precludes optical data transmission, so the first part of the data transmission has to be implemented electrically, over a 6-m distance between the pixel modules and the optical transceivers. Several high-speed electrical data transmission solutions involving small-gauge wire cables or flexible circuits have been prototyped and characterized. A combination of carefully-selected physical layers and aggressive signal conditioning are required to achieve the proposed specifications.

  1. LHC-rate beam test of CMS pixel barrel modules

    International Nuclear Information System (INIS)

    Erdmann, W.; Hoermann, Ch.; Kotlinski, D.; Horisberger, R.; Kaestli, H. Chr.; Gabathuler, K.; Bertl, W.; Meier, B.; Langenegger, U.; Trueeb, P.; Rohe, T.

    2007-01-01

    Modules for the CMS pixel barrel detector have been operated in a high rate pion beam at PSI in order to verify under LHC-like conditions the final module design for the production. The test beam provided charged particle rates up to 10 8 cm -2 s -1 over the full module area. Bunch structure and randomized high trigger rates simulated realistic operation. A four layer telescope made of single pixel readout chip assemblies provided tracking needed for the determination of the modules hit reconstruction efficiency. The performance of the modules has been shown to be adequate for the CMS pixel barrel

  2. Serial powering of pixel modules

    International Nuclear Information System (INIS)

    Stockmanns, Tobias; Fischer, Peter; Huegging, Fabian; Peric, Ivan; Runolfsson, O.; Wermes, Norbert

    2003-01-01

    Modern pixel detectors for the next generation of high-energy collider experiments like LHC use readout electronics in deep sub-micron technology. Chips in this technology need a low supply voltage of 2-2.5 V alongside high current consumption to achieve the desired performance. The high supply current leads to significant voltage drops in the long and low mass supply cables so that voltage fluctuations at the chips are induced, when the supply current changes. This problem scales with the number of modules when connected in parallel to the power supplies. An alternative powering scheme connects several modules in series resulting in a higher supply voltage but a lower current consumption of the chain and therefore a much lower voltage drop in the cables. In addition the amount of cables needed to supply the detector is vastly reduced. The concept and features of serial powering are presented and studies of the implementation of this technology as an alternative for the ATLAS pixel detector are shown. In particular, it is shown that the potential risk of powering in series can be addressed and eliminated

  3. Serial powering of pixel modules

    CERN Document Server

    Stockmanns, Tobias; Hügging, Fabian Georg; Peric, I; Runólfsson, O; Wermes, Norbert

    2003-01-01

    Modern pixel detectors for the next generation of high-energy collider experiments like LHC use readout electronics in deep sub- micron technology. Chips in this technology need a low supply voltage of 2-2.5 V alongside high current consumption to achieve the desired performance. The high supply current leads to significant voltage drops in the long and low mass supply cables so that voltage fluctuations at the chips are induced, when the supply current changes. This problem scales with the number of modules when connected in parallel to the power supplies. An alternative powering scheme connects several modules in series resulting in a higher supply voltage but a lower current consumption of the chain and therefore a much lower voltage drop in the cables. In addition the amount of cables needed to supply the detector is vastly reduced. The concept and features of serial powering are presented and studies of the implementation of this technology as an alternative for the ATLAS pixel detector are shown. In par...

  4. Diamond and silicon pixel detectors in high radiation environments

    Energy Technology Data Exchange (ETDEWEB)

    Tsung, Jieh-Wen

    2012-10-15

    Diamond pixel detector is a promising candidate for tracking of collider experiments because of the good radiation tolerance of diamond. The diamond pixel detector must withstand the radiation damage from 10{sup 16} particles per cm{sup 2}, which is the expected total fluence in High Luminosity Large Hadron Collider. The performance of diamond and silicon pixel detectors are evaluated in this research in terms of the signal-to-noise ratio (SNR). Single-crystal diamond pixel detectors with the most recent readout chip ATLAS FE-I4 are produced and characterized. Based on the results of the measurement, the SNR of diamond pixel detector is evaluated as a function of radiation fluence, and compared to that of planar-silicon ones. The deterioration of signal due to radiation damage is formulated using the mean free path of charge carriers in the sensor. The noise from the pixel readout circuit is simulated and calculated with leakage current and input capacitance to the amplifier as important parameters. The measured SNR shows good agreement with the calculated and simulated results, proving that the performance of diamond pixel detectors can exceed the silicon ones if the particle fluence is more than 10{sup 15} particles per cm{sup 2}.

  5. Diamond and silicon pixel detectors in high radiation environments

    International Nuclear Information System (INIS)

    Tsung, Jieh-Wen

    2012-10-01

    Diamond pixel detector is a promising candidate for tracking of collider experiments because of the good radiation tolerance of diamond. The diamond pixel detector must withstand the radiation damage from 10 16 particles per cm 2 , which is the expected total fluence in High Luminosity Large Hadron Collider. The performance of diamond and silicon pixel detectors are evaluated in this research in terms of the signal-to-noise ratio (SNR). Single-crystal diamond pixel detectors with the most recent readout chip ATLAS FE-I4 are produced and characterized. Based on the results of the measurement, the SNR of diamond pixel detector is evaluated as a function of radiation fluence, and compared to that of planar-silicon ones. The deterioration of signal due to radiation damage is formulated using the mean free path of charge carriers in the sensor. The noise from the pixel readout circuit is simulated and calculated with leakage current and input capacitance to the amplifier as important parameters. The measured SNR shows good agreement with the calculated and simulated results, proving that the performance of diamond pixel detectors can exceed the silicon ones if the particle fluence is more than 10 15 particles per cm 2 .

  6. Diamond Pixel Detectors

    International Nuclear Information System (INIS)

    Adam, W.; Berdermann, E.; Bergonzo, P.; Bertuccio, G.; Bogani, F.; Borchi, E.; Brambilla, A.; Bruzzi, M.; Colledani, C.; Conway, J.; D'Angelo, P.; Dabrowski, W.; Delpierre, P.; Deneuville, A.; Doroshenko, J.; Dulinski, W.; Eijk, B. van; Fallou, A.; Fizzotti, F.; Foster, J.; Foulon, F.; Friedl, M.; Gan, K.K.; Gheeraert, E.; Gobbi, B.; Grim, G.P.; Hallewell, G.; Han, S.; Hartjes, F.; Hrubec, J.; Husson, D.; Kagan, H.; Kania, D.; Kaplon, J.; Kass, R.; Koeth, T.; Krammer, M.; Lander, R.; Logiudice, A.; Lu, R.; Lynne, L.M.; Manfredotti, C.; Meier, D.; Mishina, M.; Moroni, L.; Oh, A.; Pan, L.S.; Pernicka, M.; Perera, L.; Pirollo, S.; Plano, R.; Procario, M.; Riester, J.L.; Roe, S.; Rott, C.; Rousseau, L.; Rudge, A.; Russ, J.; Sala, S.; Sampietro, M.; Schnetzer, S.; Sciortino, S.; Stelzer, H.; Stone, R.; Suter, B.; Tapper, R.J.; Tesarek, R.; Trischuk, W.; Tromson, D.; Vittone, E.; Wedenig, R.; Weilhammer, P.; White, C.; Zeuner, W.; Zoeller, M.

    2001-01-01

    Diamond based pixel detectors are a promising radiation-hard technology for use at the LHC. We present first results on a CMS diamond pixel sensor. With a threshold setting of 2000 electrons, an average pixel efficiency of 78% was obtained for normally incident minimum ionizing particles

  7. Diamond Pixel Detectors

    Energy Technology Data Exchange (ETDEWEB)

    Adam, W.; Berdermann, E.; Bergonzo, P.; Bertuccio, G.; Bogani, F.; Borchi, E.; Brambilla, A.; Bruzzi, M.; Colledani, C.; Conway, J.; D' Angelo, P.; Dabrowski, W.; Delpierre, P.; Deneuville, A.; Doroshenko, J.; Dulinski, W.; Eijk, B. van; Fallou, A.; Fizzotti, F.; Foster, J.; Foulon, F.; Friedl, M.; Gan, K.K.; Gheeraert, E.; Gobbi, B.; Grim, G.P.; Hallewell, G.; Han, S.; Hartjes, F.; Hrubec, J.; Husson, D.; Kagan, H.; Kania, D.; Kaplon, J.; Kass, R.; Koeth, T.; Krammer, M.; Lander, R.; Logiudice, A.; Lu, R.; Lynne, L.M.; Manfredotti, C.; Meier, D.; Mishina, M.; Moroni, L.; Oh, A.; Pan, L.S.; Pernicka, M.; Perera, L. E-mail: perera@physics.rutgers.edu; Pirollo, S.; Plano, R.; Procario, M.; Riester, J.L.; Roe, S.; Rott, C.; Rousseau, L.; Rudge, A.; Russ, J.; Sala, S.; Sampietro, M.; Schnetzer, S.; Sciortino, S.; Stelzer, H.; Stone, R.; Suter, B.; Tapper, R.J.; Tesarek, R.; Trischuk, W.; Tromson, D.; Vittone, E.; Wedenig, R.; Weilhammer, P.; White, C.; Zeuner, W.; Zoeller, M

    2001-06-01

    Diamond based pixel detectors are a promising radiation-hard technology for use at the LHC. We present first results on a CMS diamond pixel sensor. With a threshold setting of 2000 electrons, an average pixel efficiency of 78% was obtained for normally incident minimum ionizing particles.

  8. Radiation hardness of CMS pixel barrel modules

    CERN Document Server

    Rohe, T; Erdmann, W; Kästli, H C; Khalatyan, S; Meier, B; Radicci, V; Sibille, J

    2010-01-01

    Pixel detectors are used in the innermost part of the multi purpose experiments at LHC and are therefore exposed to the highest fluences of ionising radiation, which in this part of the detectors consists mainly of charged pions. The radiation hardness of all detector components has thoroughly been tested up to the fluences expected at the LHC. In case of an LHC upgrade, the fluence will be much higher and it is not yet clear how long the present pixel modules will stay operative in such a harsh environment. The aim of this study was to establish such a limit as a benchmark for other possible detector concepts considered for the upgrade. As the sensors and the readout chip are the parts most sensitive to radiation damage, samples consisting of a small pixel sensor bump-bonded to a CMS-readout chip (PSI46V2.1) have been irradiated with positive 200 MeV pions at PSI up to 6E14 Neq and with 21 GeV protons at CERN up to 5E15 Neq. After irradiation the response of the system to beta particles from a Sr-90 source w...

  9. Readout electronic for multichannel detectors

    CERN Document Server

    Kulibaba, V I; Naumov, S V

    2001-01-01

    Readout electronics based on the 128-channel chip 'Viking' (IDE AS inc., Norway) is considered. The chip 'Viking' integrates 128 low noise charge-sensitive preamplifiers with tunable CR-(RC) sup 2 shapers,analog memory and multiplexed readout to one output. All modules of readout electronics were designed and produced in KIPT taking into account the published recommendations of IDE AS inc.

  10. Readout electronic for multichannel detectors

    International Nuclear Information System (INIS)

    Kulibaba, V.I.; Maslov, N.I.; Naumov, S.V.

    2001-01-01

    Readout electronics based on the 128-channel chip 'Viking' (IDE AS inc., Norway) is considered. The chip 'Viking' integrates 128 low noise charge-sensitive preamplifiers with tunable CR-(RC) 2 shapers,analog memory and multiplexed readout to one output. All modules of readout electronics were designed and produced in KIPT taking into account the published recommendations of IDE AS inc

  11. Sensor Development for the CMS Pixel Detector

    CERN Document Server

    Rohe, T; Chiochia, V; Cremaldi, L M; Cucciarelli, S; Dorkhov, A; Konecki, M; Prokofiev, K; Regenfus, C; Sanders, D A; Son, S; Speer, T; Swartz, M

    2003-01-01

    This paper reports on a current R&D activity for the sensor part of the CMS pixel detector. Devices featuring several design and technology options have been irradiated up to a proton fluence of 1E15 (1MeV Neutron)/cm**2 at the CERN PS. Afterwards they have been bump bonded to unirradiated readout chips. The chip allows a non zero suppressed full analogue readout and therefore a good characterization of the sensors in terms of noise and charge collection properties. The samples have been tested using high energy pions in the H2 beam line of the CERN SPS in June and September 2003. The results of this test beam are presented and the differences between the sensor options are discussed.

  12. Characterization of active CMOS sensors for capacitively coupled pixel detectors

    Energy Technology Data Exchange (ETDEWEB)

    Hirono, Toko; Gonella, Laura; Janssen, Jens; Hemperek, Tomasz; Huegging, Fabian; Krueger, Hans; Wermes, Norbert [Institute of Physics, University of Bonn (Germany); Peric, Ivan [Institut fuer Prozessdatenverarbeitung und Elektronik, Karlsruher Institut fuer Technologie, Karlsruhe (Germany)

    2015-07-01

    Active CMOS pixel sensor is one of the most attractive candidates for detectors of upcoming particle physics experiments. In contrast to conventional sensors of hybrid detectors, signal processing circuit can be integrated in the active CMOS sensor. The characterization and optimization of the pixel circuit are indispensable to obtain a good performance from the sensors. The prototype chips of the active CMOS sensor were fabricated in the AMS 180nm and L-Foundry 150 nm CMOS processes, respectively a high voltage and high resistivity technology. Both chips have a charge sensitive amplifier and a comparator in each pixel. The chips are designed to be glued to the FEI4 pixel readout chip. The signals from 3 pixels of the prototype chips are capacitively coupled to the FEI4 input pads. We have performed lab tests and test beams to characterize the prototypes. In this presentation, the measurement results of the active CMOS prototype sensors are shown.

  13. High accuracy injection circuit for the calibration of a large pixel sensor matrix

    International Nuclear Information System (INIS)

    Quartieri, E.; Comotti, D.; Manghisoni, M.

    2013-01-01

    Semiconductor pixel detectors, for particle tracking and vertexing in high energy physics experiments as well as for X-ray imaging, in particular for synchrotron light sources and XFELs, require a large area sensor matrix. This work will discuss the design and the characterization of a high-linearity, low dispersion injection circuit to be used for pixel-level calibration of detector readout electronics in a large pixel sensor matrix. The circuit provides a useful tool for the characterization of the readout electronics of the pixel cell unit for both monolithic active pixel sensors and hybrid pixel detectors. In the latter case, the circuit allows for precise analogue test of the readout channel already at the chip level, when no sensor is connected. Moreover, it provides a simple means for calibration of readout electronics once the detector has been connected to the chip. Two injection techniques can be provided by the circuit: one for a charge sensitive amplification and the other for a transresistance readout channel. The aim of the paper is to describe the architecture and the design guidelines of the calibration circuit, which has been implemented in a 130 nm CMOS technology. Moreover, experimental results of the proposed injection circuit will be presented in terms of linearity and dispersion

  14. PIXEL 2010 - A Resume

    International Nuclear Information System (INIS)

    Wermes, N.

    2011-01-01

    The Pixel 2010 conference focused on semiconductor pixel detectors for particle tracking/vertexing as well as for imaging, in particular for synchrotron light sources and XFELs. The big LHC hybrid pixel detectors have impressively started showing their capabilities. X-ray imaging detectors, also using the hybrid pixel technology, have greatly advanced the experimental possibilities for diffraction experiments. Monolithic or semi-monolithic devices like CMOS active pixels and DEPFET pixels have now reached a state such that complete vertex detectors for RHIC and superKEKB are being built with these technologies. Finally, new advances towards fully monolithic active pixel detectors, featuring full CMOS electronics merged with efficient signal charge collection, exploiting standard CMOS technologies, SOI and/or 3D integration, show the path for the future. This resume attempts to extract the main statements of the results and developments presented at this conference.

  15. Characterization of Ni/SnPb-TiW/Pt Flip Chip Interconnections in Silicon Pixel Detector Modules

    CERN Document Server

    Karadzhinova, Aneliya; Härkönen, Jaakko; Luukka, Panja-riina; Mäenpää, Teppo; Tuominen, Eija; Haeggstrom, Edward; Kalliopuska, Juha; Vahanen, Sami; Kassamakov, Ivan

    2014-01-01

    In contemporary high energy physics experiments, silicon detectors are essential for recording the trajectory of new particles generated by multiple simultaneous collisions. Modern particle tracking systems may feature 100 million channels, or pixels, which need to be individually connected to read-out chains. Silicon pixel detectors are typically connected to readout chips by flip-chip bonding using solder bumps. High-quality electro-mechanical flip-chip interconnects minimizes the number of dead read-out channels in the particle tracking system. Furthermore, the detector modules must endure handling during installation and withstand heat generation and cooling during operation. Silicon pixel detector modules were constructed by flip-chip bonding 16 readout chips to a single sensor. Eutectic SnPb solder bumps were deposited on the readout chips and the sensor chips were coated with TiW/Pt thin film UBM (under bump metallization). The modules were assembled at Advacam Ltd, Finland. We studied the uniformity o...

  16. Preliminary Assessment of Microwave Readout Multiplexing Factor

    Energy Technology Data Exchange (ETDEWEB)

    Croce, Mark Philip [Los Alamos National Lab. (LANL), Los Alamos, NM (United States); Koehler, Katrina Elizabeth [Los Alamos National Lab. (LANL), Los Alamos, NM (United States); Rabin, Michael W. [Los Alamos National Lab. (LANL), Los Alamos, NM (United States); Bennett, D. A. [National Inst. of Standards and Technology (NIST), Boulder, CO (United States); Mates, J. A. B. [National Inst. of Standards and Technology (NIST), Boulder, CO (United States); Gard, J. D. [National Inst. of Standards and Technology (NIST), Boulder, CO (United States); Becker, D. [National Inst. of Standards and Technology (NIST), Boulder, CO (United States); Schmidt, D. R. [National Inst. of Standards and Technology (NIST), Boulder, CO (United States); Ullom, J. N. [National Inst. of Standards and Technology (NIST), Boulder, CO (United States)

    2017-01-23

    Ultra-high resolution microcalorimeter gamma spectroscopy is a new non-destructive assay technology for measurement of plutonium isotopic composition, with the potential to reduce total measurement uncertainty to a level competitive with destructive analysis methods [1-4]. Achieving this level of performance in practical applications requires not only the energy resolution now routinely achieved with transition-edge sensor microcalorimeter arrays (an order of magnitude better than for germanium detectors) but also high throughput. Microcalorimeter gamma spectrometers have not yet achieved detection efficiency and count rate capability that is comparable to germanium detectors, largely because of limits from existing readout technology. Microcalorimeter detectors must be operated at low temperature to achieve their exceptional energy resolution. Although the typical 100 mK operating temperatures can be achieved with reliable, cryogen-free systems, the cryogenic complexity and heat load from individual readout channels for large sensor arrays is prohibitive. Multiplexing is required for practical systems. The most mature multiplexing technology at present is time-division multiplexing (TDM) [3, 5-6]. In TDM, the sensor outputs are switched by applying bias current to one SQUID amplifier at a time. Transition-edge sensor (TES) microcalorimeter arrays as large as 256 pixels have been developed for X-ray and gamma-ray spectroscopy using TDM technology. Due to bandwidth limits and noise scaling, TDM is limited to a maximum multiplexing factor of approximately 32-40 sensors on one readout line [8]. Increasing the size of microcalorimeter arrays above the kilopixel scale, required to match the throughput of germanium detectors, requires the development of a new readout technology with a much higher multiplexing factor.

  17. Progress on the design of a data push architecture for an array of optimized time tagging pixels

    International Nuclear Information System (INIS)

    Shapiro, S.; Cords, D.; Mani, S.; Holbrook, B.; Atlas, E.

    1993-06-01

    A pixel array has been proposed which features a completely data driven architecture. A pixel cell has been designed that has been optimized for this readout. It retains the features of preceding designs which allow low noise operation, time stamping, analog signal processing, XY address recording, ghost elimination and sparse data transmission. The pixel design eliminates a number of problems inherent in previous designs, by the use of sampled data techniques, destructive readout, and current mode output drivers. This architecture and pixel design is directed at applications such as a forward spectrometer at the SSC, an e + e - B factory at SLAC, and fixed target experiments at FNAL

  18. The STAR Heavy Flavor Tracker PXL detector readout electronics

    International Nuclear Information System (INIS)

    Schambach, J.; Contin, G.; Greiner, L.; Stezelberger, T.; Vu, C.; Sun, X.; Szelezniak, M.

    2016-01-01

    The Heavy Flavor Tracker (HFT) is a recently installed micro-vertex detector upgrade to the STAR experiment at RHIC, consisting of three subsystems with various technologies of silicon sensors arranged in 4 concentric cylinders. The two innermost layers of the HFT close to the beam pipe, the Pixel ('PXL') subsystem, employ CMOS Monolithic Active Pixel Sensor (MAPS) technology that integrate the sensor, front-end electronics, and zero-suppression circuitry in one silicon die. This paper presents selected characteristics of the PXL detector part of the HFT and the hardware, firmware and software associated with the readout system for this detector

  19. TID-dependent current measurements of IBL readout chips

    Energy Technology Data Exchange (ETDEWEB)

    Dette, Karola [TU Dortmund, Experimentelle Physik IV (Germany); CERN (Switzerland); Collaboration: ATLAS Pixel-Collaboration

    2016-07-01

    The ATLAS detector consists of several subsystems with a hybrid pixel detector as the innermost component of the tracking system. The pixel detector has been composed of three layers of silicon sensor assemblies during the first data taking run of the LHC and has been upgraded with a new 4th layer, the so-called Insertable B-Layer (IBL), in summer 2014. Each silicon sensor of the IBL is connected to a Front End readout chip (FE-I4) via bump bonds. During the first year of data taking an increase of the LV current produced by the readout chips was observed. This increase could be traced back to radiation damage inside the silicon. The dependence of the current on the Total Ionizing Dose (TID) and temperature has been tested with X-ray irradiations and will be presented in this talk.

  20. A Cherenkov camera with integrated electronics based on the 'Smart Pixel' concept

    International Nuclear Information System (INIS)

    Bulian, Norbert; Hirsch, Thomas; Hofmann, Werner; Kihm, Thomas; Kohnle, Antje; Panter, Michael; Stein, Michael

    2000-01-01

    An option for the cameras of the HESS telescopes, the concept of a modular camera based on 'Smart Pixels' was developed. A Smart Pixel contains the photomultiplier, the high voltage supply for the photomultiplier, a dual-gain sample-and-hold circuit with a 14 bit dynamic range, a time-to-voltage converter, a trigger discriminator, trigger logic to detect a coincidence of X=1...7 neighboring pixels, and an analog ratemeter. The Smart Pixels plug into a common backplane which provides power, communicates trigger signals between neighboring pixels, and holds a digital control bus as well as an analog bus for multiplexed readout of pixel signals. The performance of the Smart Pixels has been studied using a 19-pixel test camera

  1. Module and Electronics Developments for the ATLAS ITK Pixel System

    CERN Document Server

    Rummler, Andr{e}; The ATLAS collaboration

    2016-01-01

    The entire tracking system of the ATLAS experiment will be replaced during the LHC Phase II shutdown around 2025 by an all-silicon detector (Inner Tracker, ITk). The pixel detector will be composed by the five innermost layers, instrumented with new sensor and readout electronics technologies to improve the tracking performance and cope with the severe HL-LHC environment in terms of occupancy and radiation. The total area of the new pixel system could measure up to 14 m^2, depending on the final layout choice that is expected to take place in early 2017. Different designs of planar, 3D, CMOS sensors are being investigated to identify the optimal technology for the different pixel layers. In parallel sensor-chip interconnection options are evaluated in collaboration with industrial partners to identify reliable technologies when employing 100-150 μm thin chips. While the new read-out chip is being developed by the RD53 Collaboration, the pixel off detector read-out electronics will be implemented in the frame...

  2. Sensor development for the CMS pixel detector

    CERN Document Server

    Bölla, G; Horisberger, R P; Kaufmann, R; Rohe, T; Roy, A

    2002-01-01

    The CMS experiment which is currently under construction at the Large Hadron Collider (LHC) at CERN (Geneva, Switzerland) will contain a pixel detector which provides in its final configuration three space points per track close to the interaction point of the colliding beams. Because of the harsh radiation environment of the LHC, the technical realization of the pixel detector is extremely challenging. The readout chip as the most damageable part of the system is believed to survive a particle fluence of 6x10 sup 1 sup 4 n sub e sub q /cm sup 2 (All fluences are normalized to 1 MeV neutrons and therefore all components of the hybrid pixel detector have to perform well up to at least this fluence. As this requires a partially depleted operation of the silicon sensors after irradiation-induced type inversion of the substrate, an ''n in n'' concept has been chosen. In order to perform IV-tests on wafer level and to hold accidentally unconnected pixels close to ground potential, a resistive path between the pixe...

  3. Planar pixel sensors in commercial CMOS technologies

    Energy Technology Data Exchange (ETDEWEB)

    Gonella, Laura; Hemperek, Tomasz; Huegging, Fabian; Krueger, Hans; Wermes, Norbert [Physikalisches Institut der Universitaet Bonn, Nussallee 12, 53115 Bonn (Germany); Macchiolo, Anna [Max-Planck-Institut fuer Physik, Foehringer Ring 6, 80805 Muenchen (Germany)

    2015-07-01

    For the upgrade of the ATLAS experiment at the high luminosity LHC, an all-silicon tracker is foreseen to cope with the increased rate and radiation levels. Pixel and strip detectors will have to cover an area of up to 200m2. To produce modules in high number at reduced costs, new sensor and bonding technologies have to be investigated. Commercial CMOS technologies on high resistive substrates can provide significant advantages in this direction. They offer cost effective, large volume sensor production. In addition to this, production is done on 8'' wafers allowing wafer-to-wafer bonding to the electronics, an interconnection technology substantially cheaper than the bump bonding process used for hybrid pixel detectors at the LHC. Both active and passive n-in-p pixel sensor prototypes have been submitted in a 150 nm CMOS technology on a 2kΩ cm substrate. The passive sensor design will be used to characterize sensor properties and to investigate wafer-to-wafer bonding technologies. This first prototype is made of a matrix of 36 x 16 pixels of size compatible with the FE-I4 readout chip (i.e. 50 μm x 250 μm). Results from lab characterization of this first submission are shown together with TCAD simulations. Work towards a full size FE-I4 sensor for wafer-to-wafer bonding is discussed.

  4. A low-power CMOS readout IC design for bolometer applications

    Science.gov (United States)

    Galioglu, Arman; Abbasi, Shahbaz; Shafique, Atia; Ceylan, Ömer; Yazici, Melik; Kaynak, Mehmet; Durmaz, Emre C.; Arsoy, Elif Gul; Gurbuz, Yasar

    2017-02-01

    A prototype of a readout IC (ROIC) designed for use in high temperature coefficient of resistance (TCR) SiGe microbolometers is presented. The prototype ROIC architecture implemented is based on a bridge with active and blind bolometer pixels with a capacitive transimpedance amplifier (CTIA) input stage and column parallel integration with serial readout. The ROIC is designed for use in high (>= 4 %/K) TCR and high detector resistance Si/SiGe microbolometers with 17x17 μm2 pixel sizes in development. The prototype has been designed and fabricated in 0.25- μm SiGe:C BiCMOS process.

  5. Multi-Anode Photomultplier (MAPMT) readout for High Granularity Calorimeters

    CERN Document Server

    Mkrtchyan, Tigran; The ATLAS collaboration

    2017-01-01

    Hadron calorimeter high performance in jet sub-structure measurements can be achieved for objects with $p_{T}$ greater than 1 TeV if the readout geometry is finely segmented in $\\Delta\\eta \\times \\Delta\\phi$. A feasibility study to increase the readout granularity of TileCal, the central hadron calorimeter of the ATLAS detector, is presented. We show a preliminary study exploring the possibility to increase by a factor 4 the present readout granularity of the inner layer cells of TileCal (0.1->0.025 in $\\Delta\\eta$) and to split into two layers the intermediate section of TileCal. The proposed solution is designed to cope with mechanical and readout bandwidth and power constraints. Assuming that the mechanics of the Tile modules cannot be changed, Multi-Anode PMTs with same boundary geometry of the present single-anode PMTs are considered to readout WLS bers, ideally one per pixel, carrying the signals from the individual scintillating tiles of each detector cells. The discussed challenges of the design are: ...

  6. Development of an external readout electronics for a hybrid photon detector

    CERN Document Server

    Uyttenhove, Simon; Tichon, Jacques; Garcia, Salvador

    The pixel hybrid photon detectors currently installed in the LHCb Cherenkov system encapsulate readout electronics in the vacuum tube envelope. The LHCb upgrade and the new trigger system will require their replacement with new photon detectors. The baseline photon detector candidate is the multi-anode photomultiplier. A hybrid photon detector with external readout electronics has been proposed as a backup option. This master thesis covers a R & D phase to investigate this latter concept. Extensive studies of the initial electronics system underlined the noise contributions from the Beetle chip used as front-end readout ASIC and from the ceramic carrier of the photon detector. New front-end electronic boards have been developed and made fully compatible with the existing LHCb-RICH infrastructure. With this compact readout system, Cherenkov photons have been successfully detected in a real particle beam environment. The proof-of-concept of a hybrid photon detector with external readout electronics was val...

  7. Planar sensors for the upgrade of the CMS pixel detector

    International Nuclear Information System (INIS)

    Rohe, T.; Bean, A.; Radicci, V.; Sibille, J.

    2011-01-01

    A replacement of the present CMS pixel detector with a better performing light weight four-layer system is foreseen in 2016. In the lifetime of this new system the LHC will reach and exceed its nominal luminosity of 10 34 cm -2 s -1 . Therefore the radiation hardness of all parts of the pixel system has to be reviewed. For the construction of the much larger four-layer pixel system, the replacement of the present double sided sensors by much cheaper single sided ones is considered. However, the construction of pixel modules with such sensors is challenging due to the small geometrical distance of the sensor high voltage and the ground of the readout electronics. This small distance limits the sensor bias to about 500 V in the tested samples.

  8. Active pixel sensor having intra-pixel charge transfer with analog-to-digital converter

    Science.gov (United States)

    Fossum, Eric R. (Inventor); Mendis, Sunetra K. (Inventor); Pain, Bedabrata (Inventor); Nixon, Robert H. (Inventor); Zhou, Zhimin (Inventor)

    2003-01-01

    An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node and an analog-to-digital converter formed in the substrate connected to the output of the readout circuit.

  9. Semiconductor detectors with proximity signal readout

    International Nuclear Information System (INIS)

    Asztalos, Stephen J.

    2012-01-01

    Semiconductor-based radiation detectors are routinely used for the detection, imaging, and spectroscopy of x-rays, gamma rays, and charged particles for applications in the areas of nuclear and medical physics, astrophysics, environmental remediation, nuclear nonproliferation, and homeland security. Detectors used for imaging and particle tracking are more complex in that they typically must also measure the location of the radiation interaction in addition to the deposited energy. In such detectors, the position measurement is often achieved by dividing or segmenting the electrodes into many strips or pixels and then reading out the signals from all of the electrode segments. Fine electrode segmentation is problematic for many of the standard semiconductor detector technologies. Clearly there is a need for a semiconductor-based radiation detector technology that can achieve fine position resolution while maintaining the excellent energy resolution intrinsic to semiconductor detectors, can be fabricated through simple processes, does not require complex electrical interconnections to the detector, and can reduce the number of required channels of readout electronics. Proximity electrode signal readout (PESR), in which the electrodes are not in physical contact with the detector surface, satisfies this need

  10. MWPC with highly segmented cathode pad readout

    International Nuclear Information System (INIS)

    Debbe, R.; Fischer, J.; Lissauer, D.

    1989-01-01

    Experiments being conducted with high energy heavy ion beams at Brookhaven National Laboratory and at CERN have shown the importance of developing position sensitive detectors capable of handling events with high multiplicity in environments of high track density as will also be the case in future high luminosity colliders like SSC and RHIC. In addition, these detectors are required to have a dynamic range wide enough to detect minimum ionizing particles and heavy ions like oxygen or silicon. We present here a description of work being done on a prototype of such a detector at BNL. Results from a similar counter are also presented in this Conference. The ''pad chamber'' is a detector with a cathode area subdivided into a very large number of pixel-like elements such that a charged particle traversing the detector at normal incidence leaves an induced charge on a few localized pads. The pads are interconnected by a resistive strip, and readout amplifiers are connected to the resistive strip at appropriate, carefully determined spacings. The pattern of tracks in a multi-hit event is easily recognized, and a centroid-finding readout system allows position determination to a small fraction of the basic cell size. 5 refs., 9 figs

  11. Fully integrated CMOS pixel detector for high energy particles

    International Nuclear Information System (INIS)

    Vanstraelen, G.; Debusschere, I.; Claeys, C.; Declerck, G.

    1989-01-01

    A novel type of position and energy sensitive, monolithic pixel array with integrated readout electronics is proposed. Special features of the design are a reduction of the number of output channels and of the amount of output data, and the use of transistors on the high resistivity silicon. The number of output channels for the detector array is reduced by handling in parallel a number of pixels, chosen as a function of the time resolution required for the system, and by the use of an address decoder. A further reduction of data is achieved by reading out only those pixels which have been activated. The pixel detector circuit will be realized in a 3 μm p-well CMOS process, which is optimized for the full integration of readout electronics and detector diodes on high resistivity Si. A retrograde well is formed by means of a high energy implantation, followed by the appropriate temperature steps. The optimization of the well shape takes into account the high substrate bias applied during the detector operation. The design is largely based on the use of MOS transistors on the high resistivity silicon itself. These have proven to perform as well as transistors on standard doped substrate. The basic building elements as well as the design strategy of the integrated pixel detector are presented in detail. (orig.)

  12. Gas Pixel Detectors for low energy X-ray polarimetry

    International Nuclear Information System (INIS)

    Spandre, Gloria

    2007-01-01

    Gas Pixel Detectors are position-sensitive proportional counters in which a complete integration between the gas amplification structure and the read-out electronics has been reached. Various generation of Application-Specific Integrated Circuit (ASIC) have been designed in deep submicron CMOS technology to realize a monolithic device which is at the same time the charge collecting electrode and the analog amplifying and charge measuring front-end electronics. The experimental response of a detector with 22060 pixels at 80 μm pitch to polarized and un-polarized X-ray radiation is shown and the application of this device for Astronomical X-ray Polarimetry discussed

  13. Test Beam Results of Geometry Optimized Hybrid Pixel Detectors

    CERN Document Server

    Becks, K H; Grah, C; Mättig, P; Rohe, T

    2006-01-01

    The Multi-Chip-Module-Deposited (MCM-D) technique has been used to build hybrid pixel detector assemblies. This paper summarises the results of an analysis of data obtained in a test beam campaign at CERN. Here, single chip hybrids made of ATLAS pixel prototype read-out electronics and special sensor tiles were used. They were prepared by the Fraunhofer Institut fuer Zuverlaessigkeit und Mikrointegration, IZM, Berlin, Germany. The sensors feature an optimized sensor geometry called equal sized bricked. This design enhances the spatial resolution for double hits in the long direction of the sensor cells.

  14. The hardware of the ATLAS Pixel Detector Control System

    International Nuclear Information System (INIS)

    Henss, T; Andreani, A; Boek, J; Boyd, G; Citterio, M; Einsweiler, K; Kersten, S; Kind, P; Lantzsch, K; Latorre, S; Maettig, P; Meroni, C; Sabatini, F; Schultes, J

    2007-01-01

    The innermost part of the ATLAS (A Toroidal LHC ApparatuS) experiment, which is currently under construction at the LHC (Large Hadron Collider), will be a silicon pixel detector comprised of 1744 individual detector modules. To operate these modules, the readout electronics, and other detector components, a complex power supply and control system is necessary. The specific powering and control requirements, as well as the custom made components of our power supply and control systems, are described. These include remotely programmable regulator stations, the power supply system for the optical transceivers, several monitoring units, and the Interlock System. In total, this comprises the Pixel Detector Control System (DCS)

  15. ASIC Readout Circuit Architecture for Large Geiger Photodiode Arrays

    Science.gov (United States)

    Vasile, Stefan; Lipson, Jerold

    2012-01-01

    The objective of this work was to develop a new class of readout integrated circuit (ROIC) arrays to be operated with Geiger avalanche photodiode (GPD) arrays, by integrating multiple functions at the pixel level (smart-pixel or active pixel technology) in 250-nm CMOS (complementary metal oxide semiconductor) processes. In order to pack a maximum of functions within a minimum pixel size, the ROIC array is a full, custom application-specific integrated circuit (ASIC) design using a mixed-signal CMOS process with compact primitive layout cells. The ROIC array was processed to allow assembly in bump-bonding technology with photon-counting infrared detector arrays into 3-D imaging cameras (LADAR). The ROIC architecture was designed to work with either common- anode Si GPD arrays or common-cathode InGaAs GPD arrays. The current ROIC pixel design is hardwired prior to processing one of the two GPD array configurations, and it has the provision to allow soft reconfiguration to either array (to be implemented into the next ROIC array generation). The ROIC pixel architecture implements the Geiger avalanche quenching, bias, reset, and time to digital conversion (TDC) functions in full-digital design, and uses time domain over-sampling (vernier) to allow high temporal resolution at low clock rates, increased data yield, and improved utilization of the laser beam.

  16. Module and electronics developments for the ATLAS ITK pixel system

    CERN Document Server

    Munoz Sanchez, Francisca Javiela; The ATLAS collaboration

    2017-01-01

    The ATLAS experiment is preparing for an extensive modification of its detectors in the course of the planned HL-LHC accelerator upgrade around 2025. The ATLAS upgrade includes the replacement of the entire tracking system by an all-silicon detector (Inner Tracker, ITk). The five innermost layers of ITk will be a pixel detector built of new sensor and readout electronics technologies to improve the tracking performance and cope with the severe HL-LHC environment in terms of occupancy and radiation. The total area of the new pixel system could measure up to 14 m2, depending on the final layout choice, which is expected to take place in 2017. In this paper an overview of the ongoing R\\&D activities on modules and electronics for the ATLAS ITk is given including the main developments and achievements in silicon planar and 3D sensor technologies, readout and power challenges.

  17. Study of the CMS Phase-1 Pixel Pilot Blade Reconstruction

    CERN Document Server

    Vami, Tamas Almos

    2017-01-01

    The Compact Muon Solenoid (CMS) detector is one of two general-purpose detectors that measure the products of high energy particle interactions in the Large Hadron Collider (LHC) at CERN. The silicon pixel detector is the innermost component of the CMS tracking system. The detector which was in operation between 2009 and 2016 has now been replaced with an upgraded one in the beginning of 2017. During the previous shutdown period of the LHC, a prototype readout system and a third disk was inserted into the old forward pixel detector with eight prototype blades constructed using the new digital read-out chips. Testing the performance of these pilot modules enabled us to gain operational experience with the upgraded detector. In this paper, the reconstruction and analysis of the data taken with the new modules are presented including information on the calibration of the reconstruction software. The hit finding efficiency and track-hit residual distributions are also shown.

  18. Study of the CMS Phase 1 Pixel Pilot Blade Reconstruction

    CERN Document Server

    CMS Collaboration

    2017-01-01

    The silicon pixel detector is the innermost component of the CMS tracking system. It was replaced in March 2017 with an upgraded one, called the Phase 1 upgrade detector. During Long Shutdown 1, a third disk was inserted into the present forward pixel detector with eight prototype blades constructed using a new digital read-out chip architecture and a prototype readout chain. Testing the performance of these pilot modules enabled us to gain experience with the Phase 1 upgrade modules. In this document, the data reconstruction with the pilot system is presented. The hit finding efficiency and residual of these new modules is also shown, and how these observables were used to adjust the timing of the pilot blades.

  19. Robustness of the ATLAS pixel clustering neural network algorithm

    CERN Document Server

    AUTHOR|(INSPIRE)INSPIRE-00407780; The ATLAS collaboration

    2016-01-01

    Proton-proton collisions at the energy frontier puts strong constraints on track reconstruction algorithms. The algorithms depend heavily on accurate estimation of the position of particles as they traverse the inner detector elements. An artificial neural network algorithm is utilised to identify and split clusters of neighbouring read-out elements in the ATLAS pixel detector created by multiple charged particles. The method recovers otherwise lost tracks in dense environments where particles are separated by distances comparable to the size of the detector read-out elements. Such environments are highly relevant for LHC run 2, e.g. in searches for heavy resonances. Within the scope of run 2 track reconstruction performance and upgrades, the robustness of the neural network algorithm will be presented. The robustness has been studied by evaluating the stability of the algorithm’s performance under a range of variations in the pixel detector conditions.

  20. Performance Studies of Pixel Hybrid Photon Detectors for the LHCb RICH Counters

    CERN Document Server

    Aglieri Rinella, G; Piedigrossi, D; Van Lysebetten, A

    2004-01-01

    The Pixel Hybrid Photon Detector is a vacuum tube with a multi-alkali photo cathode, high voltage cross-focused electron optics and an anode consisting of a silicon pixel detector bump-bonded to a readout CMOS electronic chip fully encapsulated in the device. The Pixel HPD fulfils the requirements of the Ring Imaging Cherenkov counters of the LHCb experiment at LHC. The performances of the Pixel HPD will be discussed with reference to laboratory measurements, Cherenkov light imaging in recent beam tests, image distortions due to a magnetic field.

  1. Prototype ATLAS IBL Modules using the FE-I4A Front-End Readout Chip

    CERN Document Server

    Albert, J; Alimonti, Gianluca; Allport, Phil; Altenheiner, Silke; Ancu, Lucian; Andreazza, Attilio; Arguin, Jean-Francois; Arutinov, David; Backhaus, Malte; Bagolini, Alvise; Ballansat, Jacques; Barbero, Marlon; Barbier, Gérard; Bates, Richard; Battistin, Michele; Baudin, Patrick; Beau, Tristan; Beccherle, Roberto; Beck, Hans Peter; Benoit, Mathieu; Bensinger, Jim; Bomben, Marco; Borri, Marcello; Boscardin, Maurizio; Botelho Direito, Jose Antonio; Bousson, Nicolas; Boyd, George Russell Jr; Breugnon, Patrick; Bruni, Graziano; Bruschi, Marco; Buchholz, Peter; Buttar, Craig; Cadoux, Franck; Calderini, Giovanni; Caminada, Leah; Capeans, Mar; Casse, Gianluigi; Catinaccio, Andrea; Cavalli-Sforza, Matteo; Chauveau, Jacques; Chu, Ming-Lee; Ciapetti, Marco; Cindro, Vladimir; Citterio, Mauro; Clark, Allan; Cobal, Marina; Coelli, Simone; Colijn, Auke-Pieter; Colin, Daly; Collot, Johann; Crespo-Lopez, Olivier; Dalla Betta, Gian-Franco; Darbo, Giovanni; DaVia, Cinzia; David, Pierre-Yves; Debieux, Stéphane; Delebecque, Pierre; Devetak, Erik; DeWilde, Burton; Di Girolamo, Beniamino; Dinu, Nicoleta; Dittus, Fridolin; Diyakov, Denis; Djama, Fares; Dobos, Daniel Adam; Doonan, Kate; Dopke, Jens; Dorholt, Ole; Dube, Sourabh; Dushkin, Andrey; Dzahini, Daniel; Egorov, Kirill; Ehrmann, Oswin; Elldge, David; Elles, Sabine; Elsing, Markus; Eraud, Ludovic; Ereditato, Antonio; Eyring, Andreas; Falchieri, Davide; Falou, Aboud; Fang, Xiaochao; Fausten, Camille; Favre, Yannick; Ferrere, Didier; Fleta, Celeste; Fleury, Julien; Flick, Tobias; Forshaw, Dean; Fougeron, Denis; Fritzsch, Thomas; Gabrielli, Alessandro; Gaglione, Renaud; Gallrapp, Christian; Gan, K; Garcia-Sciveres, Maurice; Gariano, Giuseppe; Gastaldi, Thibaut; Gemme, Claudia; Gensolen, Fabrice; George, Matthias; Ghislain, Patrick; Giacomini, Gabriele; Gibson, Stephen; Giordani, Mario Paolo; Giugni, Danilo; Gjersdal, Håvard; Glitza, Karl Walter; Gnani, Dario; Godlewski, Jan; Gonella, Laura; Gorelov, Igor; Gorišek, Andrej; Gössling, Claus; Grancagnolo, Sergio; Gray, Heather; Gregor, Ingrid-Maria; Grenier, Philippe; Grinstein, Sebastian; Gromov, Vladimir; Grondin, Denis; Grosse-Knetter, Jörn; Hansen, Thor-Erik; Hansson, Per; Harb, Ali; Hartman, Neal; Hasi, Jasmine; Hegner, Franziska; Heim, Timon; Heinemann, Beate; Hemperek, Tomasz; Hessey, Nigel; Hetmánek, Martin; Hoeferkamp, Martin; Hostachy, Jean-Yves; Hügging, Fabian; Husi, Coralie; Iacobucci, Giuseppe; Idarraga, John; Ikegami, Yoichi; Janoška, Zdenko; Jansen, Jens; Jansen, Luc; Jensen, Frank; Jentzsch, Jennifer; Joseph, John; Kagan, Harris; Karagounis, Michael; Kass, Richard; Kenney, Christopher J; Kersten, Susanne; Kind, Peter; Klingenberg, Reiner; Kluit, Ruud; Kocian, Martin; Koffeman, Els; Kok, Angela; Korchak, Oleksandr; Korolkov, Ilya; Kostyukhin, Vadim; Krieger, Nina; Krüger, Hans; Kruth, Andre; Kugel, Andreas; Kuykendall, William; La Rosa, Alessandro; Lai, Chung-Hang; Lantzsch, Kerstin; Laporte, Didier; Lapsien, Tobias; Lounis, abdenour; Lozano, Manuel; Lu, Yunpeng; Lubatti, Henry; Macchiolo, Anna; Mallik, Usha; Mandić, Igor; Marchand, Denis; Marchiori, Giovanni; Massol, Nicolas; Matthias, Wittgen; Mättig, Peter; Mekkaoui, Abderrazak; Menouni, Mohsine; Menu, Johann; Meroni, Chiara; Mesa, Javier; Micelli, Andrea; Michal, Sébastien; Miglioranzi, Silvia; Mikuž, Marko; Mitsui, Shingo; Monti, Mauro; Moore, J; Morettini, Paolo; Muenstermann, Daniel; Murray, Peyton; Nellist, Clara; Nelson, David J; Nessi, Marzio; Neumann, Manuel; Nisius, Richard; Nordberg, Markus; Nuiry, Francois-Xavier; Oppermann, Hermann; Oriunno, Marco; Padilla, Cristobal; Parker, Sherwood; Pellegrini, Giulio; Pelleriti, Gabriel; Pernegger, Heinz; Piacquadio, Nicola Giacinto; Picazio, Attilio; Pohl, David; Polini, Alessandro; Popule, Jiří; Portell Bueso, Xavier; Povoli, Marco; Puldon, David; Pylypchenko, Yuriy; Quadt, Arnulf; Quirion, David; Ragusa, Francesco; Rambure, Thibaut; Richards, Erik; Ristic, Branislav; Røhne, Ole; Rothermund, Mario; Rovani, Alessandro; Rozanov, Alexandre; Rubinskiy, Igor; Rudolph, Matthew Scott; Rummler, André; Ruscino, Ettore; Salek, David; Salzburger, Andreas; Sandaker, Heidi; Schipper, Jan-David; Schneider, Basil; Schorlemmer, Andre; Schroer, Nicolai; Schwemling, Philippe; Seidel, Sally; Seiden, Abraham; Šícho, Petr; Skubic, Patrick; Sloboda, Michal; Smith, D; Sood, Alex; Spencer, Edwin; Strang, Michael; Stugu, Bjarne; Stupak, John; Su, Dong; Takubo, Yosuke; Tassan, Jean; Teng, Ping-Kun; Terada, Susumu; Todorov, Theodore; Tomášek, Michal; Toms, Konstantin; Travaglini, Riccardo; Trischuk, William; Troncon, Clara; Troska, Georg; Tsiskaridze, Shota; Tsurin, Ilya; Tsybychev, Dmitri; Unno, Yoshinobu; Vacavant, Laurent; Verlaat, Bart; Vianello, Elisa; Vigeolas, Eric; von Kleist, Stephan; Vrba, Václav; Vuillermet, Raphaël; Wang, Rui; Watts, Stephen; Weber, Michele; Weber, Marteen; Weigell, Philipp; Weingarten, Jens; Welch, Steven David; Wenig, Siegfried; Wermes, Norbert; Wiese, Andreas; Wittig, Tobias; Yildizkaya, Tamer; Zeitnitz, Christian; Ziolkowski, Michal; Zivkovic, Vladimir; Zoccoli, Antonio; Zorzi, Nicola; Zwalinski, Lukasz

    2012-01-01

    The ATLAS Collaboration will upgrade its semiconductor pixel tracking detector with a new Insertable B-layer (IBL) between the existing pixel detector and the vacuum pipe of the Large Hadron Collider. The extreme operating conditions at this location have necessitated the development of new radiation hard pixel sensor technologies and a new front-end readout chip, called the FE-I4. Planar pixel sensors and 3D pixel sensors have been investigated to equip this new pixel layer, and prototype modules using the FE-I4A have been fabricated and characterized using 120 GeV pions at the CERN SPS and 4 GeV positrons at DESY, before and after module irradiation. Beam test results are presented, including charge collection efficiency, tracking efficiency and charge sharing.

  2. An asynchronous data-driven readout prototype for CEPC vertex detector

    Science.gov (United States)

    Yang, Ping; Sun, Xiangming; Huang, Guangming; Xiao, Le; Gao, Chaosong; Huang, Xing; Zhou, Wei; Ren, Weiping; Li, Yashu; Liu, Jianchao; You, Bihui; Zhang, Li

    2017-12-01

    The Circular Electron Positron Collider (CEPC) is proposed as a Higgs boson and/or Z boson factory for high-precision measurements on the Higgs boson. The precision of secondary vertex impact parameter plays an important role in such measurements which typically rely on flavor-tagging. Thus silicon CMOS Pixel Sensors (CPS) are the most promising technology candidate for a CEPC vertex detector, which can most likely feature a high position resolution, a low power consumption and a fast readout simultaneously. For the R&D of the CEPC vertex detector, we have developed a prototype MIC4 in the Towerjazz 180 nm CMOS Image Sensor (CIS) process. We have proposed and implemented a new architecture of asynchronous zero-suppression data-driven readout inside the matrix combined with a binary front-end inside the pixel. The matrix contains 128 rows and 64 columns with a small pixel pitch of 25 μm. The readout architecture has implemented the traditional OR-gate chain inside a super pixel combined with a priority arbiter tree between the super pixels, only reading out relevant pixels. The MIC4 architecture will be introduced in more detail in this paper. It will be taped out in May and will be characterized when the chip comes back.

  3. Thin hybrid pixel assembly fabrication development with backside compensation layer

    Energy Technology Data Exchange (ETDEWEB)

    Bates, R., E-mail: richard.bates@glasgow.ac.uk [Experimental Particle Physics Group, SUPA School of Physics and Astronomy, The University of Glasgow, Glasgow G12 8QQ (United Kingdom); Buttar, C.; McMullen, T.; Cunningham, L.; Ashby, J.; Doherty, F. [Experimental Particle Physics Group, SUPA School of Physics and Astronomy, The University of Glasgow, Glasgow G12 8QQ (United Kingdom); Pares, G.; Vignoud, L.; Kholti, B. [CEA Leti, MINATEC, 17 rue des Martyrs, F38054, Grenoble (France); Vahanen, S. [Advacam Oy, Tietotie 3, 02150 Espoo (Finland)

    2017-02-11

    The ATLAS and CMS experiments will both replace their entire tracking systems for operation at the HL-LHC in 2026. This will include a significantly larger pixel systems, for example, for ATLAS approximately 15 m{sup 2}. To keep the tracker material budget low it is crucial to minimize the mass of the pixel modules via thinning both the sensor and readout chip to about 150 μm each. The bump yield of thin module assemblies using solder based bump bonding can be problematic due to wafer bowing during solder reflow at high temperature. A new bump-bonding process using backside compensation on the readout chip to address the issue of low yield will be presented. The objective is to compensate dynamically the stress of the front side stack by adding a compensating layer to the backside of the wafer. A SiN and Al:Si stack has been chosen for the backside layer. The bow reducing effect of applying a backside compensation layer will be demonstrated using the FE-I4 wafer. The world's first results from assemblies produced from readout wafers thinned to 100 μm with a stress compensation layer are presented with bond yields close to 100% measured using the FE-I4 readout chip.

  4. Development of the Continuous Acquisition Pixel (CAP) sensor for high luminosity lepton colliders

    International Nuclear Information System (INIS)

    Varner, G.; Aihara, H.; Barbero, M.; Bozek, A.; Browder, T.; Hazumi, M.; Kennedy, J.; Martin, E.; Mueller, J.; Olsen, S.; Palka, H.; Rosen, M.; Ruckman, L.; Stanic, S.; Trabelsi, K.; Tsuboyama, T.; Uchida, K.; Yang, Q.; Yarema, R.

    2006-01-01

    A future higher luminosity B-factory detector and concept study detectors for the proposed International Linear Collider require precision vertex reconstruction while coping with high track densities and radiation exposures. Compared with current silicon strip and hybrid pixels, a significant reduction in the overall detector material thickness is needed to achieve the desired vertex resolution. Considerable progress in the development of thin CMOS-based Monolithic Active Pixel Sensors (MAPS) in recent years makes them a viable technology option and feasibility studies are being actively pursued. The most serious concerns are their radiation hardness and their readout speed. To address these, several prototypes denoted as the Continuous Acquisition Pixel (CAP) sensors have been developed and tested. The latest of the CAP sensor prototypes is CAP3, designed in the TSMC 0.25μm process with a 5-deep Correlated Double Sample (CDS) pair pipeline in each pixel. A setup with several CAP3 sensors is under evaluation to assess the performance of a full-scale pixel readout system running at realistic readout speed. Given the similarity in the occupancy numbers and hit throughput requirements, per unit area, between a Belle vertex detector upgradation and the requirements for a future ILC pixel detector, this effort can be considered a small-scale functioning prototype for such a future system. The results and plans for the next stages of R and D towards a full Belle Pixel Vertex Detector (PVD) are presented

  5. Determination of the thermal conductivity of sediment rock from measurements on cuttings; Ermittlung der Gesteinswaermeleitfaehigkeit von Sedimentgesteinen aus Messungen am Bohrklein

    Energy Technology Data Exchange (ETDEWEB)

    Troschke, B; Burkhardt, H [Technische Univ. Berlin (Germany). Fachgebiet Angewandte Goephysik

    1997-12-01

    Due to high costs core recovery in many wells is strongly restricted. To determine thermal conductivity in these cases measurements on cuttings are necessary, since in situ measurements are expensive and protracted, too. Therefore cores from three hydrogeothermal wells of the north-east part of the German sedimentary basin were grinded to compare the results of measurements on cuttings with known values of thermal conductivity from the original cores. By a suitable model of the two-phase-system cuttings-water it is possible to calculate the thermal conductivity of the rock-matrix. On the basis of this value and a suitable rock-model an average thermal conductivity for the water saturated rock can be estimated. Certainly all influences of the texture (anisotropy, grain bond) and of the characteristics of the porespace (porosity, internal surface, saturation, permeability) are lost with measurements on cuttings. Therefore for the different systems cuttings-water and rock-porefluid as well as for different rock types different models are necessary. (orig.) [Deutsch] In vielen Bohrungen werden aus Kostengruenden keine Kerne gezogen. Fuer die Ermittlung der Waermeleitfaehigkeit koennen deshalb nur in-situ-Messungen, die ebenfalls zeit- und kostenintensiv sind, oder Messungen am Bohrklein herangezogen werden. Es wurden daher Kerne aus drei Hydrogeothermalbohrungen des nordostdeutschen Beckens aufgemahlen, um so vergleichende Messungen am `Bohrklein` aus Kernen mit bekannter Waermeleitfaehigkeit durzhzufuehren. Durch eine geeignete Modellvorstellung des Zwei-Phasen-Systems Bohrklein/Wasser laesst sich die Waermeleitfaehigkeit der Gesteinsmatrix bestimmen und aus dieser durch ein Gesteinsmodell auch eine mittlere Waermeleitfaehigkeit des wassergesaettigten Festgesteins berechnen. Klar ist, dass bei Messungen am Bohrklein Einfluesse, die durch Gefuege (Anisotropie, Kornbindung) und Porenraumeigenschaften (Porositaet, Saettigung, Permeabilitaet) hervorgerufen werden

  6. Assembly procedure of the module (half-stave) of the ALICE Silicon Pixel Detector

    CERN Document Server

    Caselle, M; Antinori, F; Burns, M; Campbell, M; Chochula, P; Dinapoli, R; Elia, D; Formenti, F; Fini, R A; Ghidini, B; Kluge, A; Lenti, V; Manzari, V; Meddi, F; Morel, M; Navach, F; Nilsson, P; Pepato, Adriano; Riedler, P; Santoro, R; Stefanini, G; Viesti, G; Wyllie, K

    2004-01-01

    The Silicon Pixel Detector (SPD) forms the two innermost layers of the ALICE Inner Tracking System (ITS). The detector includes 1200 readout ASICs, each containing 8192 pixel cells, bump-bonded to Si sensor elements. The thickness of the readout chip and the sensor element is 150mum and 200mum, respectively. Low-mass solutions are implemented for the bus and the mechanical support. In this contribution, we describe the basic module (half-stave) of the two SPD layers and we give an overview of its assembly procedure.

  7. Pixel electronics for the ATLAS experiment

    International Nuclear Information System (INIS)

    Fischer, P.

    2001-01-01

    The ATLAS experiment at LHC will use 3 barrel layers and 2x5 disks of silicon pixel detectors as the innermost elements of the semiconductor tracker. The basic building blocks are pixel modules with an active area of 16.4 mmx60.8 mm which include an n + on n-type silicon sensor and 16 VLSI front-end (FE) chips. Every FE chip contains a low power, high speed charge sensitive preamplifier, a fast discriminator, and a readout system which operates at the 40 MHz rate of LHC. The addresses of hit pixels (as well as a low resolution pulse height information) are stored on the FE chips until arrival of a level 1 trigger signal. Hits are then transferred to a module controller chip (MCC) which collects the data of all 16 FE chips, builds complete events and sends the data through two optical links to the data acquisition system. The MCC receives clock and data through an additional optical link and provides timing and configuration information for the FE chips. Two additional chips are used to amplify and decode the pin diode signal and to drive the VCSEL laser diodes of the optical links

  8. FE-I4 pixel chip characterization with USBpix3 test system

    Energy Technology Data Exchange (ETDEWEB)

    Filimonov, Viacheslav; Gonella, Laura; Hemperek, Tomasz; Huegging, Fabian; Janssen, Jens; Krueger, Hans; Pohl, David-Leon; Wermes, Norbert [University of Bonn, Bonn (Germany)

    2015-07-01

    The USBpix readout system is a small and light weighting test system for the ATLAS pixel readout chips. It is widely used to operate and characterize FE-I4 pixel modules in lab and test beam environments. For multi-chip modules the resources on the Multi-IO board, that is the central control unit of the readout system, are coming to their limits, which makes the simultaneous readout of more than one chip at a time challenging. Therefore an upgrade of the current USBpix system has been developed. The upgraded system is called USBpix3 - the main focus of the talk. Characterization of single chip FE-I4 modules was performed with USBpix3 prototype (digital, analog, threshold and source scans; tuning). PyBAR (Bonn ATLAS Readout in Python scripting language) was used as readout software. PyBAR consists of FEI4 DAQ and Data Analysis Libraries in Python. The presentation describes the USBpix3 system, results of FE-I4 modules characterization and preparation for the multi-chip module and multi-module readout with USBpix3.

  9. Timing and Readout Contorl in the LHCb Upgraded Readout System

    CERN Document Server

    Alessio, Federico

    2016-01-01

    In 2019, the LHCb experiment at CERN will undergo a major upgrade where its detectors electronics and entire readout system will be changed to read-out events at the full LHC rate of 40 MHz. In this paper, the new timing, trigger and readout control system for such upgrade is reviewed. Particular attention is given to the distribution of the clock, timing and synchronization information across the entire readout system using generic FTTH technology like Passive Optical Networks. Moreover the system will be responsible to generically control the Front-End electronics by transmitting configuration data and receiving monitoring data, offloading the software control system from the heavy task of manipulating complex protocols of thousands of Front-End electronics devices. The way in which this was implemented is here reviewed with a description of results from first implementations of the system, including usages in test-benches, implementation of techniques for timing distribution and latency control."

  10. First considerations for a readout system for the ILD TPC with the Timepix3

    Energy Technology Data Exchange (ETDEWEB)

    Schiffer, Tobias [Universitaet Bonn (Germany); Collaboration: LCTPC-Deutschland-Collaboration

    2016-07-01

    For the planned International Linear Collider (ILC) two detectors are proposed. One of them, the International Large Detector (ILD) uses a Time Projektion Chamber (TPC) as the main tracking device. As a readout system for this TPC, pixel chips are one of the considered options. An integrated Micromegas stage is foreseen as gas amplification stage, which is built directly on top of the chip. Since first tests of a Pixel-TPC with 160 Timepix ASICs showed promising results, one is interested in developing a detector using the Timepix3 ASIC. It has several advantages, first of all its feature to measure ToT and a ToA at the same time and its significantly increased readout rate. For this purpose a readout system needs to be developed which fulfils the requirements of the Timpix3 ASIC and also has a high scalability. The main challenges are the high speed readout with a clock of up to 640 MHz and the reliability of the system. Also, the data driven as well as the frame-based readout of the Timepix3 needs to be considered for the implementation. The main goal is to provide a fast and parallel readout of several million channels. An overview and the status of the planning is given. Also, the development challenges are discussed.

  11. Accounting for Dark Current Accumulated during Readout of Hubble's ACS/WFC Detectors

    Science.gov (United States)

    Ryon, Jenna E.; Grogin, Norman A.; Coe, Dan A.; ACS Team

    2018-06-01

    We investigate the properties of excess dark current accumulated during the 100-second full-frame readout of the Advanced Camera for Surveys (ACS) Wide Field Channel (WFC) detectors. This excess dark current, called "readout dark", gives rise to ambient background gradients and hot columns in each ACS/WFC image. While readout dark signal is removed from science images during the bias correction step in CALACS, the additional noise from the readout dark is currently not taken into account. We develop a method to estimate the readout dark noise properties in ACS/WFC observations. We update the error (ERR) extensions of superbias images to include the appropriate noise from the ambient readout dark gradient and stable hot columns. In recent data, this amounts to about 5 e-/pixel added variance in the rows farthest from the WFC serial registers, and about 7 to 30 e-/pixel added variance along the stable hot columns. We also flag unstable hot columns in the superbias data quality (DQ) extensions. The new reference file pipeline for ACS/WFC implements these updates to our superbias creation process.

  12. A two-dimensional position sensitive gas chamber with scanned charge transfer readout

    International Nuclear Information System (INIS)

    Gomez, F.; Iglesias, A.; Lobato, R.; Mosquera, J.; Pardo, J.; Pena, J.; Pazos, A.; Pombar, M.; Rodriguez, A.

    2003-01-01

    We have constructed and tested a two-dimensional position sensitive parallel-plate gas ionization chamber with scanned charge transfer readout. The scan readout method described here is based on the development of a new position-dependent charge transfer technique. It has been implemented by using gate strips perpendicularly oriented to the collector strips. This solution reduces considerably the number of electronic readout channels needed to cover large detector areas. The use of a 25 μm thick kapton etched circuit allows high charge transfer efficiency with a low gating voltage, consequently needing a very simple commutating circuit. The present prototype covers 8x8 cm 2 with a pixel size of 1.27x1.27 mm 2 . Depending on the intended use and beam characteristics a smaller effective pixel is feasible and larger active areas are possible. This detector can be used for X-ray or other continuous beam intensity profile monitoring

  13. Module Production and Qualification for the Phase I Upgrade of the CMS Pixel Detector

    CERN Document Server

    AUTHOR|(CDS)2086689

    2015-01-01

    After consolidation of the LHC in 2013/14 its centre-of-mass energy will increase to 13TeV and the luminosity will reach $2 \\cdot 10^{34}\\, \\textnormal{cm}^{-2} \\textnormal{s}^{-1}$, which is twice the design luminosity. The latter will result in more simultaneous particle collisions, which would significantly increase the dead time of the current readout chip of the CMS pixel detector. Therefore the entire CMS pixel detector is replaced in 2016/17 and a new digital readout with larger buffers will be used to handle increasing pixel hit rates. An additional fourth barrel-layer provides more space points to improve track reconstruction. Half of the required modules for layer four is being produced at Karlsruhe Institute of Technology (KIT). This poster deals with the smallest discrete subunit of the pixel detector, the module and its assembly process. Moreover first production experience will be shown.

  14. Status and perspectives of pixel sensors based on 3D vertical integration

    CERN Document Server

    Re, V

    2014-01-01

    This paper reviews the most recent developments of 3D integration in the field of silicon pixel sensors and readout integrated circuits. This technology may address the needs of future high energy physics and photon science experiments by increasing the electronic functional density in small pixel readout cells and by stacking various device layers based on different technologies, each optimized for a different function. Current efforts are aimed at improving the performance of both hybrid pixel detectors and of CMOS sensors. The status of these activities is discussed here, taking into account experimental results on 3D devices developed in the frame of the 3D-IC consortium. The paper also provides an overview of the ideas that are being currently devised for novel 3D vertically integrated pixel sensors.

  15. New Subarray Readout Patterns for the ACS Wide Field Channel

    Science.gov (United States)

    Golimowski, D.; Anderson, J.; Arslanian, S.; Chiaberge, M.; Grogin, N.; Lim, Pey Lian; Lupie, O.; McMaster, M.; Reinhart, M.; Schiffer, F.; Serrano, B.; Van Marshall, M.; Welty, A.

    2017-04-01

    At the start of Cycle 24, the original CCD-readout timing patterns used to generate ACS Wide Field Channel (WFC) subarray images were replaced with new patterns adapted from the four-quadrant readout pattern used to generate full-frame WFC images. The primary motivation for this replacement was a substantial reduction of observatory and staff resources needed to support WFC subarray bias calibration, which became a new and challenging obligation after the installation of the ACS CCD Electronics Box Replacement during Servicing Mission 4. The new readout patterns also improve the overall efficiency of observing with WFC subarrays and enable the processing of subarray images through stages of the ACS data calibration pipeline (calacs) that were previously restricted to full-frame WFC images. The new readout patterns replace the original 512×512, 1024×1024, and 2048×2046-pixel subarrays with subarrays having 2048 columns and 512, 1024, and 2048 rows, respectively. Whereas the original square subarrays were limited to certain WFC quadrants, the new rectangular subarrays are available in all four quadrants. The underlying bias structure of the new subarrays now conforms with those of the corresponding regions of the full-frame image, which allows raw frames in all image formats to be calibrated using one contemporaneous full-frame "superbias" reference image. The original subarrays remain available for scientific use, but calibration of these image formats is no longer supported by STScI.

  16. Module and Electronics Developments for the ATLAS ITK Pixel System

    CERN Document Server

    Nellist, Clara; The ATLAS collaboration

    2016-01-01

    ATLAS is preparing for an extensive modification of its detector in the course of the planned HL-LHC accelerator upgrade around 2025 which includes a replacement of the entire tracking system by an all-silicon detector (Inner Tracker, ITk). The five innermost layers of ITk will comprise of a pixel detector built of new sensor and readout electronics technologies to improve the tracking performance and cope with the severe HL-LHC environment in terms of occupancy and radiation. The total area of the new pixel system could measure up to 14 m$^{2}$, depending on the final layout choice that is expected to take place in early 2017. An intense R\\&D activity is taking place in the field of planar, 3D, CMOS sensors to identify the optimal technology for the different pixel layers. In parallel various sensor-chip interconnection options are explored to identify reliable technologies when employing 100-150~$\\mu$m thin chips. While the new read-out chip is being developed by the RD53 Collaboration, the pixel off de...

  17. Electron imaging with Medipix2 hybrid pixel detector

    CERN Document Server

    McMullan, G; Chen, S; Henderson, R; Llopart, X; Summerfield, C; Tlustos, L; Faruqi, A R

    2007-01-01

    The electron imaging performance of Medipix2 is described. Medipix2 is a hybrid pixel detector composed of two layers. It has a sensor layer and a layer of readout electronics, in which each 55 μm×55 μm pixel has upper and lower energy discrimination and MHz rate counting. The sensor layer consists of a 300 μm slab of pixellated monolithic silicon and this is bonded to the readout chip. Experimental measurement of the detective quantum efficiency, DQE(0) at 120 keV shows that it can reach 85% independent of electron exposure, since the detector has zero noise, and the DQE(Nyquist) can reach 35% of that expected for a perfect detector (4/π2). Experimental measurement of the modulation transfer function (MTF) at Nyquist resolution for 120 keV electrons using a 60 keV lower energy threshold, yields a value that is 50% of that expected for a perfect detector (2/π). Finally, Monte Carlo simulations of electron tracks and energy deposited in adjacent pixels have been performed and used to calculate expected v...

  18. Electron imaging with Medipix2 hybrid pixel detector

    International Nuclear Information System (INIS)

    McMullan, G.; Cattermole, D.M.; Chen, S.; Henderson, R.; Llopart, X.; Summerfield, C.; Tlustos, L.; Faruqi, A.R.

    2007-01-01

    The electron imaging performance of Medipix2 is described. Medipix2 is a hybrid pixel detector composed of two layers. It has a sensor layer and a layer of readout electronics, in which each 55 μmx55 μm pixel has upper and lower energy discrimination and MHz rate counting. The sensor layer consists of a 300 μm slab of pixellated monolithic silicon and this is bonded to the readout chip. Experimental measurement of the detective quantum efficiency, DQE(0) at 120 keV shows that it can reach ∼85% independent of electron exposure, since the detector has zero noise, and the DQE(Nyquist) can reach ∼35% of that expected for a perfect detector (4/π 2 ). Experimental measurement of the modulation transfer function (MTF) at Nyquist resolution for 120 keV electrons using a 60 keV lower energy threshold, yields a value that is 50% of that expected for a perfect detector (2/π). Finally, Monte Carlo simulations of electron tracks and energy deposited in adjacent pixels have been performed and used to calculate expected values for the MTF and DQE as a function of the threshold energy. The good agreement between theory and experiment allows suggestions for further improvements to be made with confidence. The present detector is already very useful for experiments that require a high DQE at very low doses

  19. An EUDET/AIDA Pixel Beam Telescope for Detector Development

    CERN Document Server

    Perrey, Hanno

    2013-01-01

    A high resolution ($\\sigma 2 \\sim \\mu$) beam telescope based on monolithic active pixel sensors (MAPS) was developed within the EUDET collaboration. The telescope consists of six sensor planes using Mimosa26 MAPS with a pixel pitch of $18.4 \\mu$ and thinned down to $50 \\mu$. The excellent resolution, readout rate and DAQ integration capabilities made the telescope a primary test beam tool for many groups including several CERN based experiments. Within the new European detector infrastructure project AIDA the test beam telescope will be further extended in terms of cooling infrastructure, readout speed and precision. In order to provide a system optimized for the different requirements by the user community, a combination of various pixel technologies is foreseen. In this report the design of this even more flexible telescope with three different pixel technologies (TimePix, Mimosa, ATLAS FE-I4) will be presented. First test beam results with the HitOR signal provided by the FE-I4 integrated into the trigger...

  20. Performance of the CMS Phase 1 Pixel Detector

    CERN Document Server

    Akgun, Bora

    2018-01-01

    It is anticipated that the LHC accelerator will reach and exceed the luminosity of L = 2$\\times$10$^{34}$cm$^{-2}$s$^{-1}$ during the LHC Run 2 period until 2023. At this higher luminosity and increased hit occupancies the CMS phase-0 pixel detector would have been subjected to severe dead time and inefficiencies introduced by limited buffers in the analog read-out chip and effects of radiation damage in the sensors. Therefore a new pixel detector has been built and replaced the phase-0 detector in the 2016/17 LHC extended year-end technical stop. The CMS phase-1 pixel detector features four central barrel layers and three end-cap disks in forward and backward direction for robust tracking performance, and a significantly reduced overall material budget including new cooling and powering schemes. The design of the new front-end readout chip comprises larger data buffers, an increased transmission bandwidth, and low-threshold comparators. These improvements allow the new pixel detector to sustain and improve t...

  1. Electron imaging with Medipix2 hybrid pixel detector.

    Science.gov (United States)

    McMullan, G; Cattermole, D M; Chen, S; Henderson, R; Llopart, X; Summerfield, C; Tlustos, L; Faruqi, A R

    2007-01-01

    The electron imaging performance of Medipix2 is described. Medipix2 is a hybrid pixel detector composed of two layers. It has a sensor layer and a layer of readout electronics, in which each 55 microm x 55 microm pixel has upper and lower energy discrimination and MHz rate counting. The sensor layer consists of a 300 microm slab of pixellated monolithic silicon and this is bonded to the readout chip. Experimental measurement of the detective quantum efficiency, DQE(0) at 120 keV shows that it can reach approximately 85% independent of electron exposure, since the detector has zero noise, and the DQE(Nyquist) can reach approximately 35% of that expected for a perfect detector (4/pi(2)). Experimental measurement of the modulation transfer function (MTF) at Nyquist resolution for 120 keV electrons using a 60 keV lower energy threshold, yields a value that is 50% of that expected for a perfect detector (2/pi). Finally, Monte Carlo simulations of electron tracks and energy deposited in adjacent pixels have been performed and used to calculate expected values for the MTF and DQE as a function of the threshold energy. The good agreement between theory and experiment allows suggestions for further improvements to be made with confidence. The present detector is already very useful for experiments that require a high DQE at very low doses.

  2. CMOS monolithic active pixel sensors for high energy physics

    Energy Technology Data Exchange (ETDEWEB)

    Snoeys, W., E-mail: walter.snoeys@cern.ch

    2014-11-21

    Monolithic pixel detectors integrating sensor matrix and readout in one piece of silicon are only now starting to make their way into high energy physics. Two major requirements are radiation tolerance and low power consumption. For the most extreme radiation levels, signal charge has to be collected by drift from a depletion layer onto a designated collection electrode without losing the signal charge elsewhere in the in-pixel circuit. Low power consumption requires an optimization of Q/C, the ratio of the collected signal charge over the input capacitance [1]. Some solutions to combine sufficient Q/C and collection by drift require exotic fabrication steps. More conventional solutions up to now require a simple in-pixel readout circuit. Both high voltage CMOS technologies and Monolithic Active Pixel Sensors (MAPS) technologies with high resistivity epitaxial layers offer high voltage diodes. The choice between the two is not fundamental but more a question of how much depletion can be reached and also of availability and cost. This paper tries to give an overview.

  3. Semiconductor micropattern pixel detectors: a review of the beginnings

    International Nuclear Information System (INIS)

    Heijne, E.H.M.

    2001-01-01

    The innovation in monolithic and hybrid semiconductor 'micropattern' or 'reactive' pixel detectors for tracking in particle physics was actually to fit logic and pulse processing electronics with μW power on a pixel area of less than 0.04 mm 2 , retaining the characteristics of a traditional nuclear amplifier chain. The ns timing precision in conjunction with local memory and logic operations allowed event selection at >10 MHz rates with unambiguous track reconstruction even at particle multiplicities >10 cm -2 . The noise in a channel was ∼100e - rms and enabled binary operation with random noise 'hits' at a level -8 . Rectangular pixels from 75 μmx500 μm down to 34 μmx125 μm have been used by different teams. In binary mode a tracking precision from 6 to 14 μm was obtained, and using analog interpolation one came close to 1 μm. Earlier work, still based on charge integrating imaging circuits, provided a starting point. Two systems each with more than 1 million sensor + readout channels have been built, for WA97-NA57 and for the Delphi very forward tracker. The use of 0.5 μm and 0.25 μm CMOS and enclosed geometry for the transistors in the pixel readout chips resulted in radiation hardness of ∼2 Mrad, respectively, >30 Mrad

  4. The PAUCam readout electronics system

    Science.gov (United States)

    Jiménez, Jorge; Illa, José M.; Cardiel-Sas, Laia; de Vicente, Juan; Castilla, Javier; Casas, Ricard

    2016-08-01

    The PAUCam is an optical camera with a wide field of view of 1 deg x 1 deg and up to 46 narrow and broad band filters. The camera is already installed on the William Herschel Telescope (WHT) in the Canary Islands, Spain and successfully commissioned during the first period of 2015. The paper presents the main results from the readout electronics commissioning tests and include an overview of the whole readout electronics system, its configuration and current performance.

  5. CMOS VLSI Active-Pixel Sensor for Tracking

    Science.gov (United States)

    Pain, Bedabrata; Sun, Chao; Yang, Guang; Heynssens, Julie

    2004-01-01

    An architecture for a proposed active-pixel sensor (APS) and a design to implement the architecture in a complementary metal oxide semiconductor (CMOS) very-large-scale integrated (VLSI) circuit provide for some advanced features that are expected to be especially desirable for tracking pointlike features of stars. The architecture would also make this APS suitable for robotic- vision and general pointing and tracking applications. CMOS imagers in general are well suited for pointing and tracking because they can be configured for random access to selected pixels and to provide readout from windows of interest within their fields of view. However, until now, the architectures of CMOS imagers have not supported multiwindow operation or low-noise data collection. Moreover, smearing and motion artifacts in collected images have made prior CMOS imagers unsuitable for tracking applications. The proposed CMOS imager (see figure) would include an array of 1,024 by 1,024 pixels containing high-performance photodiode-based APS circuitry. The pixel pitch would be 9 m. The operations of the pixel circuits would be sequenced and otherwise controlled by an on-chip timing and control block, which would enable the collection of image data, during a single frame period, from either the full frame (that is, all 1,024 1,024 pixels) or from within as many as 8 different arbitrarily placed windows as large as 8 by 8 pixels each. A typical prior CMOS APS operates in a row-at-a-time ( grolling-shutter h) readout mode, which gives rise to exposure skew. In contrast, the proposed APS would operate in a sample-first/readlater mode, suppressing rolling-shutter effects. In this mode, the analog readout signals from the pixels corresponding to the windows of the interest (which windows, in the star-tracking application, would presumably contain guide stars) would be sampled rapidly by routing them through a programmable diagonal switch array to an on-chip parallel analog memory array. The

  6. The ATLAS Pixel Detector

    CERN Document Server

    Huegging, Fabian

    2006-06-26

    The contruction of the ATLAS Pixel Detector which is the innermost layer of the ATLAS tracking system is prgressing well. Because the pixel detector will contribute significantly to the ATLAS track and vertex reconstruction. The detector consists of identical sensor-chip-hybrid modules, arranged in three barrels in the centre and three disks on either side for the forward region. The position of the detector near the interaction point requires excellent radiation hardness, mechanical and thermal robustness, good long-term stability for all parts, combined with a low material budget. The final detector layout, new results from production modules and the status of assembly are presented.

  7. Characterization of Pixel Sensors

    CERN Document Server

    Oliveira, Felipe Ferraz

    2017-01-01

    It was commissioned at CERN ATLAS pixel group a fluorescence setup for characterization of pixel sensors. The idea is to measure the energies of different targets to calibrate your sensor. It was measured four matrices (80, 95, 98 and 106) of the Investigator1 sensor with different deep PW using copper, iron and titanium as target materials. The matrix 80 has a higher gain (0.065 ± 0.002) and matrix 106 has a better energy resolution (0.05 ± 0.04). The noise of the setup is around 3.6 mV .

  8. The DELPHI pixels

    International Nuclear Information System (INIS)

    Becks, K.H.; Brunet, J.M.

    1997-01-01

    To improve tracking in the very forward direction for running at LEP200, the angular acceptance of the DELPHI Vertex detector has been extended from 45 to 11 with respect to the beam axis. Pixel detector crowns cover the region between 25 and 13 . Due to very tight space and material thickness constraints it was necessary to develop new techniques (integrated busses in the detector substrate, high density layout on Kapton, etc.). About 1000 cm 2 of pixels are already installed and working in DELPHI. Techniques, tests and production of these detectors will be described, as well as the main problems encountered during this work. (orig.)

  9. The Belle II DEPFET pixel detector

    Energy Technology Data Exchange (ETDEWEB)

    Moser, Hans-Günther, E-mail: moser@mpp.mpg.de

    2016-09-21

    The Belle II experiment at KEK (Tsukuba, Japan) will explore heavy flavour physics (B, charm and tau) at the starting of 2018 with unprecedented precision. Charged particles are tracked by a two-layer DEPFET pixel device (PXD), a four-layer silicon strip detector (SVD) and the central drift chamber (CDC). The PXD will consist of two layers at radii of 14 mm and 22 mm with 8 and 12 ladders, respectively. The pixel sizes will vary, between 50 μm×(55–60) μm in the first layer and between 50 μm×(70–85) μm in the second layer, to optimize the charge sharing efficiency. These innermost layers have to cope with high background occupancy, high radiation and must have minimal material to reduce multiple scattering. These challenges are met using the DEPFET technology. Each pixel is a FET integrated on a fully depleted silicon bulk. The signal charge collected in the ‘internal gate’ modulates the FET current resulting in a first stage amplification and therefore very low noise. This allows very thin sensors (75 μm) reducing the overall material budget of the detector (0.21% X{sub 0}). Four fold multiplexing of the column parallel readout allows read out a full frame of the pixel matrix in only 20 μs while keeping the power consumption low enough for air cooling. Only the active electronics outside the detector acceptance has to be cooled actively with a two phase CO{sub 2} system. Furthermore the DEPFET technology offers the unique feature of an electronic shutter which allows the detector to operate efficiently in the continuous injection mode of superKEKB.

  10. Vertex measurement at a hadron collider. The ATLAS pixel detector

    International Nuclear Information System (INIS)

    Grosse-Knetter, J.

    2008-03-01

    The ATLAS Pixel Detector is the innermost layer of the ATLAS tracking system and will contribute significantly to the ATLAS track and vertex reconstruction. The detector consists of identical sensor-chip-hybrid modules, arranged in three barrels in the centre and three disks on either side for the forward region. The position of the Pixel Detector near the interaction point requires excellent radiation hardness, fast read-out, mechanical and thermal robustness, good long-term stability, all combined with a low material budget. The new design concepts used to meet the challenging requirements are discussed with their realisation in the Pixel Detector, followed by a description of a refined and extensive set of measurements to assess the detector performance during and after its construction. (orig.)

  11. Studies of mono-crystalline CVD diamond pixel detectors

    CERN Document Server

    Bartz, E; Atramentov, O; Yang, Z; Hall-Wilton, R; Schnetzer, S; Patel, R; Bugg, W; Hebda, P; Halyo, V; Hunt, A; Marlow, D; Steininger, H; Ryjov, V; Hits, D; Spanier, S; Pernicka, M; Johns, W; Doroshenko, J; Hollingsworth, M; Harrop, B; Farrow, C; Stone, R

    2011-01-01

    The Pixel Luminosity Telescope (PLT) is a dedicated luminosity monitor, presently under construction, for the Compact Muon Solenoid (CMS) experiment at the Large Hadron Collider (LHC). It measures the particle flux in several three layered pixel diamond detectors that are aligned precisely with respect to each other and the beam direction. At a lower rate it also performs particle track position measurements. The PLTs mono-crystalline CVD diamonds are bump-bonded to the same readout chip used in the silicon pixel system in CMS. Mono-crystalline diamond detectors have many attributes that make them desirable for use in charged particle tracking in radiation hostile environments such as the LHC. In order to further characterize the applicability of diamond technology to charged particle tracking we performed several tests with particle beams that included a measurement of the intrinsic spatial resolution with a high resolution beam telescope. Published by Elsevier B.V.

  12. The first bump-bonded pixel detectors on CVD diamond

    International Nuclear Information System (INIS)

    Adam, W.; Bauer, C.; Berdermann, E.; Bergonzo, P.; Bogani, F.; Borchi, E.; Brambilla, A.; Bruzzi, M.; Colledani, C.; Conway, J.; Dabrowski, W.; Delpierre, P.; Deneuville, A.; Dulinski, W.; Eijk, B. van; Fallou, A.; Fizzotti, F.; Foulon, F.; Friedl, M.; Gan, K.K.; Gheeraert, E.; Grigoriev, E.; Hallewell, G.; Hall-Wilton, R.; Han, S.; Hartjes, F.; Hrubec, J.; Husson, D.; Kagan, H.; Kania, D.; Kaplon, J.; Karl, C.; Kass, R.; Krammer, M.; Logiudice, A.; Lu, R.; Manfredi, P.F.; Manfredotti, C.; Marshall, R.D.; Meier, D.; Mishina, M.; Oh, A.; Palmieri, V.G.; Pan, L.S.; Peitz, A.; Pernicka, M.; Pirollo, S.; Polesello, P.; Pretzl, K.; Re, V.; Riester, J.L.; Roe, S.; Roff, D.; Rudge, A.; Schnetzer, S.; Sciortino, S.; Speziali, V.; Stelzer, H.; Steuerer, J.; Stone, R.; Tapper, R.J.; Tesarek, R.; Trawick, M.; Trischuk, W.; Turchetta, R.; Vittone, E.; Wagner, A.; Walsh, A.M.; Wedenig, R.; Weilhammer, P.; Zeuner, W.; Ziock, H.; Zoeller, M.; Charles, E.; Ciocio, A.; Dao, K.; Einsweiler, K.; Fasching, D.; Gilchriese, M.; Joshi, A.; Kleinfelder, S.; Milgrome, O.; Palaio, N.; Richardson, J.; Sinervo, P.; Zizka, G.

    1999-01-01

    Diamond is a nearly ideal material for detecting ionising radiation. Its outstanding radiation hardness, fast charge collection and low leakage current allow it to be used in high radiation environments. These characteristics make diamond sensors particularly appealing for use in the next generation of pixel detectors. Over the last year, the RD42 collaboration has worked with several groups that have developed pixel readout electronics in order to optimise diamond sensors for bump-bonding. This effort resulted in an operational diamond pixel sensor that was tested in a pion beam. We demonstrate that greater than 98% of the channels were successfully bump-bonded and functioning. The device shows good overall hit efficiency as well as clear spatial hit correlation to tracks measured in a silicon reference telescope. A position resolution of 14.8 μm was observed, consistent with expectations given the detector pitch

  13. The first bump-bonded pixel detectors on CVD diamond

    CERN Document Server

    Adam, W; Berdermann, E; Bergonzo, P; Bogani, F; Borchi, E; Brambilla, A; Bruzzi, Mara; Colledani, C; Conway, J; Dabrowski, W; Delpierre, P A; Deneuville, A; Dulinski, W; van Eijk, B; Fallou, A; Fizzotti, F; Foulon, F; Fried, M; Gan, K K; Gheeraert, E; Grigoriev, E; Hallewell, G D; Hall-Wilton, R; Han, S; Hartjes, F G; Hrubec, Josef; Husson, D; Kagan, H; Kania, D R; Kaplon, J; Karl, C; Kass, R; Krammer, Manfred; Lo Giudice, A; Lü, R; Manfredi, P F; Manfredotti, C; Marshall, R D; Meier, D; Mishina, M; Oh, A; Palmieri, V G; Pan, L S; Peitz, A; Pernicka, Manfred; Pirollo, S; Polesello, P; Pretzl, Klaus P; Re, V; Riester, J L; Roe, S; Roff, D G; Rudge, A; Schnetzer, S R; Sciortino, S; Speziali, V; Stelzer, H; Steuerer, J; Stone, R; Tapper, R J; Tesarek, R J; Trawick, M L; Trischuk, W; Turchetta, R; Vittone, E; Wagner, A; Walsh, A M; Wedenig, R; Weilhammer, Peter; Zeuner, W; Ziock, H J; Zöller, M; Charles, E; Ciocio, A; Dao, K; Einsweiler, Kevin F; Fasching, D; Gilchriese, M G D; Joshi, A; Kleinfelder, S A; Milgrome, O; Palaio, N; Richardson, J; Sinervo, P K; Zizka, G

    1999-01-01

    Diamond is a nearly ideal material for detecting ionising radiation. Its outstanding radiation hardness, fast charge collection and low leakage current allow it to be used in high radiation environments. These characteristics make diamond sensors particularly appealing for use in the next generation of pixel detectors. Over the last year, the RD42 collaboration has worked with several groups that have developed pixel readout electronics in order to optimise diamond sensors for bump-bonding. This effort resulted in an operational diamond pixel sensor that was tested in a pion beam. We demonstrate that greater than 98565544f the channels were successfully bump-bonded and functioning. The device shows good overall hit efficiency as well as clear spatial hit correlation to tracks measured in a silicon reference telescope. A position resolution of 14.8 mu m was observed, consistent with expectations given the detector pitch. (13 refs).

  14. The first bump-bonded pixel detectors on CVD diamond

    Energy Technology Data Exchange (ETDEWEB)

    Adam, W.; Bauer, C.; Berdermann, E.; Bergonzo, P.; Bogani, F.; Borchi, E.; Brambilla, A.; Bruzzi, M.; Colledani, C.; Conway, J.; Dabrowski, W.; Delpierre, P.; Deneuville, A.; Dulinski, W.; Eijk, B. van; Fallou, A.; Fizzotti, F.; Foulon, F.; Friedl, M.; Gan, K.K.; Gheeraert, E.; Grigoriev, E.; Hallewell, G.; Hall-Wilton, R.; Han, S.; Hartjes, F.; Hrubec, J.; Husson, D.; Kagan, H.; Kania, D.; Kaplon, J.; Karl, C.; Kass, R.; Krammer, M.; Logiudice, A.; Lu, R.; Manfredi, P.F.; Manfredotti, C.; Marshall, R.D.; Meier, D.; Mishina, M.; Oh, A.; Palmieri, V.G.; Pan, L.S.; Peitz, A.; Pernicka, M.; Pirollo, S.; Polesello, P.; Pretzl, K.; Re, V.; Riester, J.L.; Roe, S.; Roff, D.; Rudge, A.; Schnetzer, S.; Sciortino, S.; Speziali, V.; Stelzer, H.; Steuerer, J.; Stone, R.; Tapper, R.J.; Tesarek, R.; Trawick, M.; Trischuk, W. E-mail: william@physics.utoronto.ca; Turchetta, R.; Vittone, E.; Wagner, A.; Walsh, A.M.; Wedenig, R.; Weilhammer, P.; Zeuner, W.; Ziock, H.; Zoeller, M.; Charles, E.; Ciocio, A.; Dao, K.; Einsweiler, K.; Fasching, D.; Gilchriese, M.; Joshi, A.; Kleinfelder, S.; Milgrome, O.; Palaio, N.; Richardson, J.; Sinervo, P.; Zizka, G

    1999-11-01

    Diamond is a nearly ideal material for detecting ionising radiation. Its outstanding radiation hardness, fast charge collection and low leakage current allow it to be used in high radiation environments. These characteristics make diamond sensors particularly appealing for use in the next generation of pixel detectors. Over the last year, the RD42 collaboration has worked with several groups that have developed pixel readout electronics in order to optimise diamond sensors for bump-bonding. This effort resulted in an operational diamond pixel sensor that was tested in a pion beam. We demonstrate that greater than 98% of the channels were successfully bump-bonded and functioning. The device shows good overall hit efficiency as well as clear spatial hit correlation to tracks measured in a silicon reference telescope. A position resolution of 14.8 {mu}m was observed, consistent with expectations given the detector pitch.

  15. New pixelized Micromegas detector for the COMPASS experiment

    International Nuclear Information System (INIS)

    Neyret, D; Anfreville, M; Bedfer, Y; Burtin, E; D'Hose, N; Giganon, A; Kunne, F; Magnon, A; Marchand, C; Paul, B; Platchkov, S; Vandenbroucke, M; Ketzer, B; Konorov, I

    2009-01-01

    New Micromegas (Micro-mesh gaseous detectors) are being developed in view of the future physics projects planned by the COMPASS collaboration at CERN. Several major upgrades compared to present detectors are being studied: detectors standing five times higher luminosity with hadron beams, detection of beam particles (flux up to a few hundred of kHz/mm 2 , 10 times larger than for the present detectors) with pixelized read-out in the central part, light and integrated electronics, and improved robustness. Studies were done with the present detectors moved in the beam, and two first pixelized prototypes are being tested with muon and hadron beams in real conditions at COMPASS. We present here this new project and report on two series of tests, with old detectors moved into the beam and with pixelized prototypes operated in real data taking condition with both muon and hadron beams.

  16. Integration of the CMS Phase 1 Pixel Detector

    CERN Document Server

    Kornmayer, Andreas

    2018-01-01

    During the extended year-end technical stop 2016/17 the CMS Pixel Detector has been replaced. The new Phase 1 Pixel Detector is designed for a luminosity that could exceed $\\text{L} = 2x10^{34} cm^{−2}s^{−1}$. With one additional layer in the barrel and the forward region of the new detector, combined with the higher hit rates as the LHC luminosity increases, these conditions called for an upgrade of the data acquisition system, which was realised based on the $\\mu$TCA standard. This contribution focuses on the experiences with integration of the new detector readout and control system and reports on the operational performance of the CMS Pixel detector.

  17. Studies of mono-crystalline CVD diamond pixel detectors

    Energy Technology Data Exchange (ETDEWEB)

    Bugg, W. [University of Tennessee, Knoxville (United States); Hollingsworth, M., E-mail: mhollin3@utk.edu [University of Tennessee, Knoxville (United States); Spanier, S.; Yang, Z. [University of Tennessee, Knoxville (United States); Bartz, E.; Doroshenko, J.; Hits, D.; Schnetzer, S.; Stone, R.; Atramentov, O.; Patel, R.; Barker, A. [Rutgers University, Piscataway (United States); Hall-Wilton, R.; Ryjov, V.; Farrow, C. [CERN, Geneva (Switzerland); Pernicka, M.; Steininger, H. [HEPHY, Vienna (Austria); Johns, W. [Vanderbilt University, Nashville (United States); Halyo, V.; Harrop, B. [Princeton University, Princeton (United States); and others

    2011-09-11

    The Pixel Luminosity Telescope (PLT) is a dedicated luminosity monitor, presently under construction, for the Compact Muon Solenoid (CMS) experiment at the Large Hadron Collider (LHC). It measures the particle flux in several three layered pixel diamond detectors that are aligned precisely with respect to each other and the beam direction. At a lower rate it also performs particle track position measurements. The PLT's mono-crystalline CVD diamonds are bump-bonded to the same readout chip used in the silicon pixel system in CMS. Mono-crystalline diamond detectors have many attributes that make them desirable for use in charged particle tracking in radiation hostile environments such as the LHC. In order to further characterize the applicability of diamond technology to charged particle tracking we performed several tests with particle beams that included a measurement of the intrinsic spatial resolution with a high resolution beam telescope.

  18. Tracking performance of a single-crystal and a polycrystalline diamond pixel-detector

    Energy Technology Data Exchange (ETDEWEB)

    Menasce, D.; et al.

    2013-06-01

    We present a comparative characterization of the performance of a single-crystal and a polycrystalline diamond pixel-detector employing the standard CMS pixel readout chips. Measurements were carried out at the Fermilab Test Beam Facility, FTBF, using protons of momentum 120 GeV/c tracked by a high-resolution pixel telescope. Particular attention was directed to the study of the charge-collection, the charge-sharing among adjacent pixels and the achievable position resolution. The performance of the single-crystal detector was excellent and comparable to the best available silicon pixel-detectors. The measured average detection-efficiency was near unity, ε = 0.99860±0.00006, and the position-resolution for shared hits was about 6 μm. On the other hand, the performance of the polycrystalline detector was hampered by its lower charge collection distance and the readout chip threshold. A new readout chip, capable of operating at much lower threshold (around 1 ke$-$), would be required to fully exploit the potential performance of the polycrystalline diamond pixel-detector.

  19. Recent progress in the development of a B-factory monolithic active pixel detector

    International Nuclear Information System (INIS)

    Stanic, S.; Aihara, H.; Barbero, M.; Bozek, A.; Browder, T.; Hazumi, M.; Kennedy, J.; Kent, N.; Olsen, S.; Palka, H.; Rosen, M.; Ruckman, L.; Trabelsi, K.; Tsuboyama, T.; Uchida, K.; Varner, G.; Yang, Q.

    2006-01-01

    Due to the need for precise vertexing at future higher luminosity B-factories with the expectedly increasing track densities and radiation exposures, upgrade of present silicon strip detectors with thin, radiation resistant pixel detectors is highly desired. Considerable progress in the technological development of thin CMOS based Monolithic Active Pixel Sensors (MAPS) in the last years makes them a realistic upgrade option and the feasibility studies of their application in Belle are actively pursued. The most serious concerns are their radiation hardness and their read-out speed. To address them, several prototypes denoted as Continuous Acquisition Pixel (CAP) sensors have been developed and tested. The latest of the CAP sensor prototypes is CAP3, designed in the TSMC 0.25μm process with a 5-deep sample pair pipeline in each pixel. A setup with several CAP3 sensors will be used to assess the performance of a full scale pixel read-out system running at realistic read-out speed. The results and plans for the next stages of R and D towards a full Pixel Vertex Detector (PVD) are presented

  20. Data acquisition at the front-end of the Mu3e pixel detector

    Energy Technology Data Exchange (ETDEWEB)

    Perrevoort, Ann-Kathrin [Physikalisches Institut, Universitaet Heidelberg (Germany); Collaboration: Mu3e-Collaboration

    2016-07-01

    The Mu3e experiment - searching for the lepton-flavour violating decay of the muon into three electrons at an unprecedented sensitivity of one in 10{sup 16} decays - is based on a pixel tracking detector. The sensors are High-Voltage Monolithic Active Pixel Sensors, a technology which allows for very fast and thin detectors, and thus is an ideal fit for Mu3e where the trajectories of low-momentum electrons at high rates are to be measured. The detector will consist of about 275 million pixels and will be operated at up to 10{sup 9} muon stops per second. Therefore, a fast and trigger-less data readout is required. The pixel sensors feature zero-suppressed data output via high-speed serial links. The data is then buffered and sorted by time on a FPGA on the front-end before being processed to the following readout stage. In this talk, the readout of the Mu3e pixel detector at the front-end is introduced. Furthermore, a first firmware implementation of this concept in a beam telescope consisting of the current pixel sensor prototype MuPix7 is presented.

  1. Review of results for the NA62 gigatracker read-out prototype

    Science.gov (United States)

    Martin, E.; Aglieri Rinella, G.; Carassiti, V.; Ceccucci, A.; Cortina Gil, E.; Cotta Ramusino, A.; Dellacasa, G.; Fiorini, M.; Garbolino, S.; Jarron, P.; Kaplon, J.; Kluge, A.; Marchetto, F.; Mapelli, A.; Mazza, G.; Morel, M.; Noy, M.; Nuessle, G.; Petagna, P.; Petrucci, F.; Perktold, L.; Riedler, P.; Rivetti, A.; Statera, M.; Velghe, B.

    2012-03-01

    The Gigatracker (GTK) is a hybrid silicon pixel detector developed for NA62, an experiment studying ultra-rare kaon decays at the CERN SPS. The main characteristics are a time-tagging resoluion of 150ps, with low material budget per station (0.5% X0) and a fluence comparable to the one expected for the inner trackers of LHC detectors in 10 years of operation. To compensate the time-walk, two read-out architectures have been designed and produced. The first architecture is based on a Constant Fraction Discriminator (CFD) followed by an on-pixel Time-to-Digital-Converter (TDC). The second architecture is based on a on-pixel group shared TDC. The GTK system developments are described: the integration steps (assembly and cooling) and the results obtained from the prototypes fabricated for the two read-out architectures.

  2. The 160 TES bolometer read-out using FDM for SAFARI

    Science.gov (United States)

    Hijmering, R. A.; den Hartog, R. H.; van der Linden, A. J.; Ridder, M.; Bruijn, M. P.; van der Kuur, J.; van Leeuwen, B. J.; van Winden, P.; Jackson, B.

    2014-07-01

    For the read out of the Transition Edge Sensors (TES) bolometer arrays of the SAFARI instrument on the Japanese background-limited far-IR SPICA mission SRON is developing a Frequency Domain Multiplexing (FDM) read-out system. The next step after the successful demonstration of the read out of 38 TES bolometers using FDM was to demonstrate the FDM readout of the required 160 TES bolometers. Of the 160 LC filter and TES bolometer chains 151 have been connected and after cooldown 148 of the resonances could be identified. Although initial operation and locking of the pixels went smoothly the experiment revealed several complications. In this paper we describe the 160 pixel FDM set-up, show the results and discuss the issues faced during operation of the 160 pixel FDM experiment.

  3. Challenges of small-pixel infrared detectors: a review.

    Science.gov (United States)

    Rogalski, A; Martyniuk, P; Kopytko, M

    2016-04-01

    In the last two decades, several new concepts for improving the performance of infrared detectors have been proposed. These new concepts particularly address the drive towards the so-called high operating temperature focal plane arrays (FPAs), aiming to increase detector operating temperatures, and as a consequence reduce the cost of infrared systems. In imaging systems with the above megapixel formats, pixel dimension plays a crucial role in determining critical system attributes such as system size, weight and power consumption (SWaP). The advent of smaller pixels has also resulted in the superior spatial and temperature resolution of these systems. Optimum pixel dimensions are limited by diffraction effects from the aperture, and are in turn wavelength-dependent. In this paper, the key challenges in realizing optimum pixel dimensions in FPA design including dark current, pixel hybridization, pixel delineation, and unit cell readout capacity are outlined to achieve a sufficiently adequate modulation transfer function for the ultra-small pitches involved. Both photon and thermal detectors have been considered. Concerning infrared photon detectors, the trade-offs between two types of competing technology-HgCdTe material systems and III-V materials (mainly barrier detectors)-have been investigated.

  4. Optimization of CMOS active pixels for high resolution digital radiography

    International Nuclear Information System (INIS)

    Kim, Young Soo

    2007-02-01

    CMOS image sensors have poorer performance compared to conventional charge coupled devices (CCDs). Since CMOS Active Pixel Sensors (APSs) in general have higher temporal noise, higher dark current, smaller full well charge capacitance, and lower spectral response, they cannot provide the same wide dynamic range and superior signal-to-noise ratio as CCDs. In view of electronic noise, the main source for the CMOS APS is the pixel, along with other signal processing blocks such as row and column decoder, analog signal processor (ASP), analog-to-digital converter (ADC), and timing and control logic circuitry. Therefore, it is important and necessary to characterize noise of the active pixels in CMOS APSs. We developed our theoretical noise model to account for the temporal noise in active pixels, and then found out the optimum design parameters such as fill actor, each size of the three transistors (source follower, row selection transistor, bias transistor) comprising active pixels, bias current, and load capacitance that can have the maximum signal-to-noise ratio. To develop the theoretical noise model in active pixels, we considered the integration noise of the photodiode and the readout noise of the transistors related to readout. During integration, the shot noise due to the dark current and photocurrent, during readout, the thermal and flicker noise were considered. The developed model can take the input variables such as photocurrent, capacitance of the photodiode, integration time, transconductance of the transistors, channel resistance of the transistors, gate-to-source capacitance of the follower, and load capacitance etc. To validate our noise model, two types of test structures have been realized. Firstly, four types of photodiodes (n_d_i_f_f_u_s_i_o_n/p_s_u_b_s_t_r_a_t_e, n_w_e_l_l/p_s_u_b_s_t_r_a_t_e, n_d_i_f_f_u_s_i_o_n/p_e_p_i_t_a_x_i_a_l/p_s_u_b_s_t_r_a_t_e, n_w_e_l_l/p_e_p_i_t_a_x_i_a_l/p_s_u_b_s_t_r_a_t_e) used in CMOS active pixels were fabricated

  5. ATLAS Pixel Detector Upgrade

    CERN Document Server

    Flick, T; The ATLAS collaboration

    2009-01-01

    The first upgrade for higher luminosity at LHC for the ATLAS pixel detector is the insertion of a forth layer, the IBL. The talk gives an overview about what the IBL is and how it will be set up, as well as to give a status of the research and develoment work.

  6. ALICE Silicon Pixel Detector

    CERN Multimedia

    Manzari, V

    2013-01-01

    The Silicon Pixel Detector (SPD) forms the innermost two layers of the 6-layer barrel Inner Tracking System (ITS). The SPD plays a key role in the determination of the position of the primary collision and in the reconstruction of the secondary vertices from particle decays.

  7. The Phase-2 ATLAS ITk Pixel Upgrade

    CERN Document Server

    Benoit, Mathieu; The ATLAS collaboration

    2017-01-01

    The entire tracking system of the ATLAS experiment will be replaced during the LHC Phase II shutdown (foreseen to take place around 2025) by an all-silicon detector called the “ITk” (Inner Tracker). The innermost portion of the ITk will consist of a pixel detector with stave-like support structures in the most central region and ring-shaped supports in the endcap regions; there may also be novel inclined support structures in the barrel-endcap overlap regions. The new detector could have as much as 14 m2 of sensitive silicon. Support structures will be based on low mass, highly stable and highly thermally conductive carbon-based materials cooled by evaporative carbon dioxide. The ITk will be instrumented with new sensors and readout electronics to provide improved tracking performance compared to the current detector. All the module components must be performant enough and robust enough to cope with the expected high particle multiplicity and severe radiation background of the High-Luminosity LHC. Readout...

  8. Evaluation of mixed-signal noise effects in photon-counting X-ray image sensor readout circuits

    International Nuclear Information System (INIS)

    Lundgren, Jan; Abdalla, Suliman; O'Nils, Mattias; Oelmann, Bengt

    2006-01-01

    In readout electronics for photon-counting pixel detectors, the tight integration between analog and digital blocks causes the readout electronics to be sensitive to on-chip noise coupling. This noise coupling can result in faulty luminance values in grayscale X-ray images, or as color distortions in a color X-ray imaging system. An exploration of simulating noise coupling in readout circuits is presented which enables the discovery of sensitive blocks at as early a stage as possible, in order to avoid costly design iterations. The photon-counting readout system has been simulated for noise coupling in order to highlight the existing problems of noise coupling in X-ray imaging systems. The simulation results suggest that on-chip noise coupling should be considered and simulated in future readout electronics systems for X-ray detectors

  9. An investigation on continuous depth-of-interaction detection using a monolithic scintillator with single-ended readout

    International Nuclear Information System (INIS)

    Zhang, H; Zhou, R; Yang, C

    2014-01-01

    PET detectors with depth-of-interaction (DOI) capability have been studied to improve imaging resolution widely over the world. Since discrete DOI and continuous DOI detection with dual-ended readout technology have their respective limitations, we in this work focus on the continuous DOI detection with single-ended readout using a monolithic LSO scintillator and a multi-pixel photodetector. Based on a non-linear least squares data fitting method and Geant4 simulation, we studied the relationship between the spatial resolution of gamma positioning and the pixel number of photodetector. The results show that for a pixel number larger than 6x6, the positioning spatial resolution does not become significantly better when increasing the pixel number moreover. Another aspect studied is the effect of crystal thickness on the spatial resolution. Increasing the thickness of crystal leads to higher detection efficiency but lower spatial resolution

  10. ATLAS ITk Pixel detector

    CERN Document Server

    Gemme, Claudia; The ATLAS collaboration

    2016-01-01

    The high luminosity upgrade of the LHC (HL-LHC) in 2026 will provide new challenge to the ATLAS tracker. The current inner detector will be replaced with a whole silicon tracker which will consist of a five barrel layer Pixel detector surrounded by a four barrel layer Strip detector. The expected high radiation level are requiring the development of upgraded silicon sensors as well as new a front-end chip. The dense tracking environment will require finer granularity detectors. The data rates will require new technologies for high bandwidth data transmission and handling. The current status of the HL-LHC ATLA Pixel detector developments as well as the various layout options will be reviewed.

  11. CMS pixel upgrade project

    CERN Document Server

    Kaestli, Hans-Christian

    2010-01-01

    The LHC machine at CERN finished its first year of pp collisions at a center of mass energy of 7~TeV. While the commissioning to exploit its full potential is still ongoing, there are plans to upgrade its components to reach instantaneous luminosities beyond the initial design value after 2016. A corresponding upgrade of the innermost part of the CMS detector, the pixel detector, is needed. A full replacement of the pixel detector is planned in 2016. It will not only address limitations of the present system at higher data rates, but will aggressively lower the amount of material inside the fiducial tracking volume which will lead to better tracking and b-tagging performance. This article gives an overview of the project and illuminates the motivations and expected improvements in the detector performance.

  12. CMS pixel upgrade project

    CERN Document Server

    INSPIRE-00575876

    2011-01-01

    The LHC machine at CERN finished its first year of pp collisions at a center of mass energy of 7 TeV. While the commissioning to exploit its full potential is still ongoing, there are plans to upgrade its components to reach instantaneous luminosities beyond the initial design value after 2016. A corresponding upgrade of the innermost part of the CMS detector, the pixel detector, is needed. A full replacement of the pixel detector is planned in 2016. It will not only address limitations of the present system at higher data rates, but will aggressively lower the amount of material inside the fiducial tracking volume which will lead to better tracking and b-tagging performance. This article gives an overview of the project and illuminates the motivations and expected improvements in the detector performance.

  13. The Phase II ATLAS ITk Pixel Upgrade

    CERN Document Server

    Terzo, Stefano; The ATLAS collaboration

    2017-01-01

    The entire tracking system of the ATLAS experiment will be replaced during the LHC Phase II shutdown (foreseen to take place around 2025) by an all-silicon detector called the "ITk" (Inner Tracker). The innermost portion of ITk will consist of a pixel detector with five layers in the barrel region and and ring-shaped supports in the endcap regions. It will be instrumented with new sensor and readout electronics technologies to improve the tracking performance and cope with the HL-LHC environment, which will be severe in terms of occupancy and radiation. The total surface area of silicon in the new pixel system could measure up to 14 m$^2$ , depending on the final layout choice, which is expected to take place in early 2017. Several layout options are being investigated at the moment, including some with novel inclined support structures in the barrel-endcap overlap region and others with very long innermost barrel layers. Forward coverage could be as high as $|\\eta| < 4$. Supporting structures will be ...

  14. The Phase-2 ATLAS ITk Pixel Upgrade

    CERN Document Server

    Flick, Tobias; The ATLAS collaboration

    2016-01-01

    The entire tracking system of the ATLAS experiment will be replaced during the LHC Phase II shutdown (foreseen to take place around 2025) by an all-silicon detector called the “ITk” (Inner Tracker). The pixel detector will comprise the five innermost layers, and will be instrumented with new sensor and readout electronics technologies to improve the tracking performance and cope with the HL-LHC environment, which will be severe in terms of occupancy and radiation. The total surface area of silicon in the new pixel system could measure up to 14 m2, depending on the final layout choice, which is expected to take place in early 2017. Four layout options are being investigated at the moment, two with forward coverage to |eta| < 3.2 and two to |eta| < 4. For each coverage option, a layout with long barrel staves and a layout with novel inclined support structures in the barrel-endcap overlap region are considered. All potential layouts include modules mounted on ring-shaped supports in the endcap regions...

  15. Further applications for mosaic pixel FPA technology

    Science.gov (United States)

    Liddiard, Kevin C.

    2011-06-01

    In previous papers to this SPIE forum the development of novel technology for next generation PIR security sensors has been described. This technology combines the mosaic pixel FPA concept with low cost optics and purpose-designed readout electronics to provide a higher performance and affordable alternative to current PIR sensor technology, including an imaging capability. Progressive development has resulted in increased performance and transition from conventional microbolometer fabrication to manufacture on 8 or 12 inch CMOS/MEMS fabrication lines. A number of spin-off applications have been identified. In this paper two specific applications are highlighted: high performance imaging IRFPA design and forest fire detection. The former involves optional design for small pixel high performance imaging. The latter involves cheap expendable sensors which can detect approaching fire fronts and send alarms with positional data via mobile phone or satellite link. We also introduce to this SPIE forum the application of microbolometer IR sensor technology to IoT, the Internet of Things.

  16. Development of telescope readout system based on FELIX for testbeam experiments

    CERN Document Server

    Wu, Weihao; Chen, Hucheng; Chen, Kai; Lacobucci, Giuseppe; Lanni, Francessco; Liu, Hongbin; Barrero Pinto, Mateus Vicente; Xu, Lailin

    2017-01-01

    The High Voltage CMOS (HV-CMOS) sensors are extensively investigated by the ATLAS collaboration in the High-Luminosity LHC (HL-LHC) upgrade of the Inner Tracker (ITk) detector. A testbeam telescope, based on the ATLAS IBL (Insertable B-Layer) silicon pixel modules, has been built to characterize the HV-CMOS sensor prototypes. The Front-End LInk eXchange (FELIX) system is a new approach to function as the gateway between front-ends and the commodity switched network in the different detectors of the ATLAS upgrade. A FELIX based readout system has been developed for the readout of the testbeam telescope, which includes a Telescope Readout FMC Card as interface between the IBL DC (double-chip) modules and a Xilinx ZC706 evaluation board. The test results show that the FELIX based telescope readout system is capable of sensor calibration and readout of a high-density pixel detector in test beam experiments in an effective way.

  17. Low-noise readout circuit for SWIR focal plane arrays

    Science.gov (United States)

    Altun, Oguz; Tasdemir, Ferhat; Nuzumlali, Omer Lutfi; Kepenek, Reha; Inceturkmen, Ercihan; Akyurek, Fatih; Tunca, Can; Akbulut, Mehmet

    2017-02-01

    This paper reports a 640x512 SWIR ROIC with 15um pixel pitch that is designed and fabricated using 0.18um CMOS process. Main challenge of SWIR ROIC design is related to input circuit due to pixel area and noise limitations. In this design, CTIA with single stage amplifier is utilized as input stage. The pixel design has three pixel gain options; High Gain (HG), Medium Gain (MG), and Low Gain (LG) with corresponding Full-Well-Capacities of 18.7ké, 190ké and 1.56Mé, respectively. According to extracted simulation results, 5.9é noise is achieved at HG mode and 200é is achieved at LG mode of operation. The ROIC can be programmed through an SPI interface. It supports 1, 2 and 4 output modes which enables the user to configure the detector to work at 30, 60 and 120fps frame rates. In the 4 output mode, the total power consumption of the ROIC is less than 120mW. The ROIC is powered from a 3.3V analog supply and allows for an output swing range in excess of 2V. Anti-blooming feature is added to prevent any unwanted blooming effect during readout.

  18. Fabrication of a high-density MCM-D for a pixel detector system using a BCB/Cu technology

    CERN Document Server

    Topper, M; Engelmann, G; Fehlberg, S; Gerlach, P; Wolf, J; Ehrmann, O; Becks, K H; Reichl, H

    1999-01-01

    The MCM-D which is described here is a prototype for a pixel detector system for the planned Large Hadron Collider (LHC) at CERN, Geneva. The project is within the ATLAS experiment. The module consists of a sensor tile with an active area of 16.4 mm*60.4 mm, 16 readout chips, each serving 24*160 pixel unit cells, a module controller chip, an optical transceiver and the local signal interconnection and power distribution buses. The extremely high wiring density which is necessary to interconnect the readout chips was achieved using a thin film copper/photo-BCB process above the pixel array. The bumping of the readout chips was done by PbSn electroplating. All dice are then attached by flip-chip assembly to the sensor diodes and the local buses. The focus of this paper is a detailed description of the technologies for the fabrication of this advanced MCM-D. (10 refs).

  19. Detector Performance and Upgrade Plans of the Pixel Luminosity Telescope for Online per-Bunch Luminosity Measurement at CMS

    CERN Document Server

    CMS Collaboration

    2017-01-01

    The Pixel Luminosity Telescope (PLT) is a dedicated system for luminosity measurement at the CMS experiment using silicon pixel sensors. It was installed during LS1 and has been providing luminosity measurements throughout Run 2. The online bunch-by-bunch luminosity measurement employs the "fast-or" capability of the pixel readout chip (PSI46) to quickly identify likely tracks at the full 40MHz interaction rate. In addition, the full pixel information is read out at a lower rate, allowing for more detailed offline analysis. In this talk, we will present details of the commissioning, performance and operational history of the currently installed hardware and upgrade plans for LS2.

  20. Status and perspectives of pixel sensors based on 3D vertical integration

    Energy Technology Data Exchange (ETDEWEB)

    Re, Valerio [Università di Bergamo, Dipartimento di Ingegneria, Viale Marconi, 5, 24044 Dalmine (Italy); INFN, Sezione di Pavia, Via Bassi, 6, 27100 Pavia (Italy)

    2014-11-21

    This paper reviews the most recent developments of 3D integration in the field of silicon pixel sensors and readout integrated circuits. This technology may address the needs of future high energy physics and photon science experiments by increasing the electronic functional density in small pixel readout cells and by stacking various device layers based on different technologies, each optimized for a different function. Current efforts are aimed at improving the performance of both hybrid pixel detectors and of CMOS sensors. The status of these activities is discussed here, taking into account experimental results on 3D devices developed in the frame of the 3D-IC consortium. The paper also provides an overview of the ideas that are being currently devised for novel 3D vertically integrated pixel sensors. - Highlights: • 3D integration is a promising technology for pixel sensors in high energy physics. • Experimental results on two-layer 3D CMOS pixel sensors are presented. • The outcome of the first run from the 3D-IC consortium is discussed. • The AIDA network is studying via-last 3D integration of heterogeneous layers. • New ideas based on 3D vertically integrated pixels are being developed for HEP.

  1. Status and perspectives of pixel sensors based on 3D vertical integration

    International Nuclear Information System (INIS)

    Re, Valerio

    2014-01-01

    This paper reviews the most recent developments of 3D integration in the field of silicon pixel sensors and readout integrated circuits. This technology may address the needs of future high energy physics and photon science experiments by increasing the electronic functional density in small pixel readout cells and by stacking various device layers based on different technologies, each optimized for a different function. Current efforts are aimed at improving the performance of both hybrid pixel detectors and of CMOS sensors. The status of these activities is discussed here, taking into account experimental results on 3D devices developed in the frame of the 3D-IC consortium. The paper also provides an overview of the ideas that are being currently devised for novel 3D vertically integrated pixel sensors. - Highlights: • 3D integration is a promising technology for pixel sensors in high energy physics. • Experimental results on two-layer 3D CMOS pixel sensors are presented. • The outcome of the first run from the 3D-IC consortium is discussed. • The AIDA network is studying via-last 3D integration of heterogeneous layers. • New ideas based on 3D vertically integrated pixels are being developed for HEP

  2. Temporal Noise Analysis of Charge-Domain Sampling Readout Circuits for CMOS Image Sensors

    Directory of Open Access Journals (Sweden)

    Xiaoliang Ge

    2018-02-01

    Full Text Available This paper presents a temporal noise analysis of charge-domain sampling readout circuits for Complementary Metal-Oxide Semiconductor (CMOS image sensors. In order to address the trade-off between the low input-referred noise and high dynamic range, a Gm-cell-based pixel together with a charge-domain correlated-double sampling (CDS technique has been proposed to provide a way to efficiently embed a tunable conversion gain along the read-out path. Such readout topology, however, operates in a non-stationery large-signal behavior, and the statistical properties of its temporal noise are a function of time. Conventional noise analysis methods for CMOS image sensors are based on steady-state signal models, and therefore cannot be readily applied for Gm-cell-based pixels. In this paper, we develop analysis models for both thermal noise and flicker noise in Gm-cell-based pixels by employing the time-domain linear analysis approach and the non-stationary noise analysis theory, which help to quantitatively evaluate the temporal noise characteristic of Gm-cell-based pixels. Both models were numerically computed in MATLAB using design parameters of a prototype chip, and compared with both simulation and experimental results. The good agreement between the theoretical and measurement results verifies the effectiveness of the proposed noise analysis models.

  3. GigaTracker, a Thin and Fast Silicon Pixels Tracker

    CERN Document Server

    Velghe, Bob; Bonacini, Sandro; Ceccucci, Augusto; Kaplon, Jan; Kluge, Alexander; Mapelli, Alessandro; Morel, Michel; Noël, Jérôme; Noy, Matthew; Perktold, Lukas; Petagna, Paolo; Poltorak, Karolina; Riedler, Petra; Romagnoli, Giulia; Chiozzi, Stefano; Cotta Ramusino, Angelo; Fiorini, Massimiliano; Gianoli, Alberto; Petrucci, Ferruccio; Wahl, Heinrich; Arcidiacono, Roberta; Jarron, Pierre; Marchetto, Flavio; Gil, Eduardo Cortina; Nuessle, Georg; Szilasi, Nicolas

    2014-01-01

    GigaTracker, the NA62’s upstream spectrometer, plays a key role in the kinematically constrained background suppression for the study of the K + ! p + n ̄ n decay. It is made of three independent stations, each of which is a six by three cm 2 hybrid silicon pixels detector. To meet the NA62 physics goals, GigaTracker has to address challenging requirements. The hit time resolution must be better than 200 ps while keeping the total thickness of the sensor to less than 0.5 mm silicon equivalent. The 200 μm thick sensor is divided into 18000 300 μm 300 μm pixels bump-bounded to ten independent read-out chips. The chips use an end-of-column architecture and rely on time-over- threshold discriminators. A station can handle a crossing rate of 750 MHz. Microchannel cooling technology will be used to cool the assembly. It allows us to keep the sensor close to 0 C with 130 μm of silicon in the beam area. The sensor and read-out chip performance were validated using a 45 pixel demonstrator with a laser test setu...

  4. Status of the CMS Phase 1 Pixel Upgrade

    CERN Document Server

    Mattig, Stefan

    2014-01-01

    The silicon pixel detector is the innermost component of the CMS tracking system, providing high precision space point measurements of charged particle trajectories. Before 2018 the instantaneous luminosity of the LHC is expected to reach 2\\,$\\times 10^{34}\\,{\\rm cm^{-2}s^{-1}}$, which will significantly increase the number of interactions per bunch crossing. The current pixel detector of CMS was not designed to work efficiently in such a high occupancy environment and will be degraded by substantial data-loss introduced by buffer filling in the analog Read-Out Chip (ROC) and effects of radiation damage in the sensors, built up over the operational period. To maintain a high tracking efficiency, CMS has planned to replace the current pixel system during ``Phase 1'' (2016/17) by a new lightweight detector, equipped with an additional 4th layer in the barrel, and one additional forward/backward disk. A new digital ROC has been designed, with increased buffers to minimize data-loss, and a digital read-out protoc...

  5. Module and electronics developments for the ATLAS ITK pixel system

    CERN Document Server

    Nellist, Clara; The ATLAS collaboration

    2016-01-01

    Summary ATLAS is preparing for an extensive modification of its detector in the course of the planned HL‐ LHC accelerator upgrade around 2025 which includes a replacement of the entire tracking system by an all‐silicon detector (Inner Tracker, ITk). A revised trigger and data taking system is foreseen with triggers expected at lowest level at an average rate of 1 MHz. The five innermost layers of ITk will comprise of a pixel detector built of new sensor and readout electronics technologies to improve the tracking performance and cope with the severe HL‐LHC environment in terms of occupancy and radiation. The total area of the new pixel system could measure up to 14 m2, depending on the final layout choice that is expected to take place in early 2017. A new on‐detector readout chip is designed in the context of the RD53 collaboration in 65 nm CMOS technology. This paper will present the on‐going R&D within the ATLAS ITK project towards the new pixel modules and the off‐detector electronics. Pla...

  6. Module and electronics developments for the ATLAS ITK pixel system

    CERN Document Server

    Munoz Sanchez, Francisca Javiela; The ATLAS collaboration

    2017-01-01

    ATLAS is preparing for an extensive modification of its detector in the course of the planned HL-LHC accelerator upgrade around 2025 which includes a replacement of the entire tracking system by an all-silicon detector (Inner Tracker, ITk). The five innermost layers of ITk will comprise of a pixel detector built of new sensor and readout electronics technologies to improve the tracking performance and cope with the severe HL-LHC environment in terms of occupancy and radiation. The total area of the new pixel system could measure up to 14 m2, depending on the final layout choice that is expected to take place in 2017. A new on-detector readout chip is designed in the context of the RD53 collaboration in 65 nm CMOS technology. This paper will present the on-going R&D within the ATLAS ITK project towards the new pixel modules and the off-detector electronics. Planar and 3D sensors are being re-designed with cell sizes of 50x50 or 25x100 μm2, compatible with the RD53 chip. A sensor thickness equal or less th...

  7. FED firmware interface testing with pixel phase 1 emulator

    CERN Document Server

    Kilpatrick, Matthew

    2017-01-01

    A hardware emulation of the CMS pixel detector phase 1 upgrade front-end electronics has been developed to test and validate the architecture of the back-end electronics (FED) firmware. The emulation is implemented on a Virtex 6 FPGA on the CERN GLIB uTCA platform, utilizing an 8-way SFP FPGA Mezzanine Card to drive compatible optical transmitters to the back-end electronics at 400 bps. The firmware emulates the complex functions of the phase 1 pixel readout chips (PSI46digv2 and PROC600) and token bit manager ASICs and allows for possible abnormalities that can occur in the output data stream. The emulation implements both fixed data patterns that are used as test vectors and realistic simulated data to drive the readout of the FED at the expected data and trigger rates. Testing software was developed to control the emulator and verify correct transmission of data and exception handling in the FED. An installation has been integrated into the pixel DAQ test system at CMS to be used for fast validation of F...

  8. FED firmware interface testing with pixel phase 1 emulator

    CERN Document Server

    Kilpatrick, Matthew

    2018-01-01

    A hardware emulation of the CMS pixel detector phase 1 upgrade front-end electronics has been developed to test and validate the architecture of the back-end electronics (FED) firmware. The emulation is implemented on a Virtex 6 FPGA on the CERN GLIB uTCA platform, utilizing an 8-way SFP FPGA Mezzanine Card to drive compatible optical transmitters to the back-end electronics at 400 bps. The firmware emulates the complex functions of the phase 1 pixel readout chips (PSI46digv2 and PROC600) and token bit manager ASICs and allows for possible abnormalities that can occur in the output data stream. The emulation implements both fixed data patterns that are used as test vectors and realistic simulated data to drive the readout of the FED at the expected data and trigger rates. Testing software was developed to control the emulator and verify correct transmission of data and exception handling in the FED. An installation has been integrated into the pixel DAQ test system at CMS to be used for fast validation of F...

  9. A camac based data acquisition system for flat-panel image array readout

    International Nuclear Information System (INIS)

    Morton, E.J.; Antonuk, L.E.; Berry, J.E.; Huang, W.; Mody, P.; Yorkston, J.; Longo, M.J.

    1993-01-01

    A readout system has been developed to facilitate the digitization and subsequent display of image data from two-dimensional, pixellated, flat-panel, amorphous silicon imaging arrays. These arrays have been designed specifically for medical x-ray imaging applications. The readout system is based on hardware and software developed for various experiments at CERN and Fermi National Accelerator Laboratory. Additional analog signal processing and digital control electronics were constructed specifically for this application. The authors report on the form of the resulting data acquisition system, discuss aspects of its performance, and consider the compromises which were involved in its design

  10. Leakage current measurements on pixelated CdZnTe detectors

    International Nuclear Information System (INIS)

    Dirks, B.P.F.; Blondel, C.; Daly, F.; Gevin, O.; Limousin, O.; Lugiez, F.

    2006-01-01

    In the field of the R and D of a new generation hard X-ray cameras for space applications we focus on the use of pixelated CdTe or CdZnTe semiconductor detectors. They are covered with 64 (0.9x0.9 mm 2 ) or 256 (0.5x0.5 mm 2 ) pixels, surrounded by a guard ring and operate in the energy ranging from several keV to 1 MeV, at temperatures between -20 and +20 o C. A critical parameter in the characterisation of these detectors is the leakage current per pixel under polarisation (∼50-500 V/mm). In operation mode each pixel will be read-out by an integrated spectroscopy channel of the multi-channel IDeF-X ASIC currently developed in our lab. The design and functionality of the ASIC depends directly on the direction and value of the current. A dedicated and highly insulating electronics circuit is designed to automatically measure the current in each individual pixel, which is in the order of tens of pico-amperes. Leakage current maps of different CdZnTe detectors of 2 and 6 mm thick and at various temperatures are presented and discussed. Defect density diagnostics have been performed by calculation of the activation energy of the material

  11. A review of advances in pixel detectors for experiments with high rate and radiation

    Science.gov (United States)

    Garcia-Sciveres, Maurice; Wermes, Norbert

    2018-06-01

    The large Hadron collider (LHC) experiments ATLAS and CMS have established hybrid pixel detectors as the instrument of choice for particle tracking and vertexing in high rate and radiation environments, as they operate close to the LHC interaction points. With the high luminosity-LHC upgrade now in sight, for which the tracking detectors will be completely replaced, new generations of pixel detectors are being devised. They have to address enormous challenges in terms of data throughput and radiation levels, ionizing and non-ionizing, that harm the sensing and readout parts of pixel detectors alike. Advances in microelectronics and microprocessing technologies now enable large scale detector designs with unprecedented performance in measurement precision (space and time), radiation hard sensors and readout chips, hybridization techniques, lightweight supports, and fully monolithic approaches to meet these challenges. This paper reviews the world-wide effort on these developments.

  12. Development and characterization of a DEPFET pixel prototype system for the ILC vertex detector

    Energy Technology Data Exchange (ETDEWEB)

    Kohrs, Robert

    2008-09-15

    For the future TeV-scale linear collider ILC (International Linear Collider) a vertex detector of unprecedented performance is needed to fully exploit its physics potential. By incorporating a field effect transistor into a fully depleted sensor substrate the DEPFET (Depleted Field Effect Transistor) sensor combines radiation detection and in-pixel amplification. For the operation at a linear collider the excellent noise performance of DEPFET pixels allows building very thin detectors with a high spatial resolution and a low power consumption. With this thesis a prototype system consisting of a 64 x 128 pixels sensor, dedicated steering and readout ASICs and a data acquisition board has been developed and successfully operated in the laboratory and under realistic conditions in beam test environments at DESY and CERN. A DEPFET matrix has been successfully read out using the on-chip zero-suppression of the readout chip CURO 2. The results of the system characterization and beam test results are presented. (orig.)

  13. Operating characteristics of radiation-hardened silicon pixel detectors for the CMS experiment

    CERN Document Server

    Hyosung, Cho

    2002-01-01

    The Compact Muon Solenoid (CMS) experiment at the CERN Large Hadron Collider (LHC) will have forward silicon pixel detectors as its innermost tracking device. The pixel devices will be exposed to the harsh radiation environment of the LHC. Prototype silicon pixel detectors have been designed to meet the specification of the CMS experiment. No guard ring is required on the n/sup +/ side, and guard rings on the p/sup +/ side are always kept active before and after type inversion. The whole n/sup +/ side is grounded and connected to readout chips, which greatly simplifies detector assembling and improves the stability of bump-bonded readout chips on the n/sup +/ side. Operating characteristics such as the leakage current, the full depletion voltage, and the potential distributions over guard rings were tested using standard techniques. The tests are discussed in this paper. (9 refs).

  14. Development and characterization of a DEPFET pixel prototype system for the ILC vertex detector

    International Nuclear Information System (INIS)

    Kohrs, Robert

    2008-09-01

    For the future TeV-scale linear collider ILC (International Linear Collider) a vertex detector of unprecedented performance is needed to fully exploit its physics potential. By incorporating a field effect transistor into a fully depleted sensor substrate the DEPFET (Depleted Field Effect Transistor) sensor combines radiation detection and in-pixel amplification. For the operation at a linear collider the excellent noise performance of DEPFET pixels allows building very thin detectors with a high spatial resolution and a low power consumption. With this thesis a prototype system consisting of a 64 x 128 pixels sensor, dedicated steering and readout ASICs and a data acquisition board has been developed and successfully operated in the laboratory and under realistic conditions in beam test environments at DESY and CERN. A DEPFET matrix has been successfully read out using the on-chip zero-suppression of the readout chip CURO 2. The results of the system characterization and beam test results are presented. (orig.)

  15. Development of a novel direct X-ray detector using photoinduced discharge (PID) readout for digital radiography

    Science.gov (United States)

    Heo, D.; Jeon, S.; Kim, J.-S.; Kim, R. K.; Cha, B. K.; Moon, B. J.; Yoon, J.

    2013-02-01

    We developed a novel direct X-ray detector using photoinduced discharge (PID) readout for digital radiography. The pixel resolution is 512 × 512 with 200 μm pixel and the overall active dimensions of the X-ray imaging panel is 10.24 cm × 10.24 cm. The detector consists of an X-ray absorption layer of amorphous selenium, a charge accumulation layer of metal, and a PID readout layer of amorphous silicon. In particular, the charge accumulation is pixelated because image charges generated by X-ray should be stored pixel by pixel. Here the image charges, or holes, are recombined with electrons generated by the PID method. We used a 405 nm laser diode and cylindrical lens to make a line beam source with a width of 50 μm for PID readout, which generates charges for each pixel lines during the scan. We obtained spatial frequencies of about 1.0 lp/mm for the X-direction (lateral direction) and 0.9 lp/mm for the Y-direction (scanning direction) at 50% modulation transfer function.

  16. SPAD array chips with full frame readout for crystal characterization

    Energy Technology Data Exchange (ETDEWEB)

    Fischer, Peter; Blanco, Roberto; Sacco, Ilaria; Ritzert, Michael [Heidelberg University (Germany); Weyers, Sascha [Fraunhofer Institute for Microelectronic Circuits and Systems (Germany)

    2015-05-18

    We present single photon sensitive 2D camera chips containing 88x88 avalanche photo diodes which can be read out in full frame mode with up to 400.000 frames per second. The sensors have an imaging area of ~5mm x 5mm covered by square pixels of ~56µm x 56µm with a ~55% fill factor in the latest chip generation. The chips contain a self triggering logic with selectable (column) multiplicities of up to >=4 hits within an adjustable coincidence time window. The photon accumulation time window is programmable as well. First prototypes have demonstrated low dark count rates of <50kHz/mm2 (SPAD area) at 10 degree C for 10% masked pixels. One chip version contains an automated readout of the photon cluster position. The readout of the detailed photon distribution for single events allows the characterization of light sharing, optical crosstalk etc., in crystals or crystal arrays as they are used in PET instrumentation. This knowledge could lead to improvements in spatial or temporal resolution.

  17. Pixel DAQ and trigger for HL-LHC

    International Nuclear Information System (INIS)

    Morettini, P.

    2017-01-01

    The read-out is one of the challenges in the design of a pixel detector for the High Luminosity upgrade of the Large Hadron Collider (HL-LHC), that is expected to operate from 2026 at a leveled luminosity of 5 × 10 34  cm −2  s −1 . This is especially true if tracking information is needed in a low latency trigger system. The difficulties of a fast read-out will be reviewed, and possible strategies explained. The solutions that are being evaluated by the ATLAS and CMS collaborations for the upgrade of their trackers will be outlined and ideas on possible development beyond HL-LHC will be presented.

  18. Demonstration of Time Domain Multiplexed Readout for Magnetically Coupled Calorimeters

    Science.gov (United States)

    Porst, J.-P.; Adams, J. S.; Balvin, M.; Bandler, S.; Beyer, J.; Busch, S. E.; Drung, D.; Seidel, G. M.; Smith, S. J.; Stevenson, T. R.

    2012-01-01

    Magnetically coupled calorimeters (MCC) have extremely high potential for x-ray applications due to the inherent high energy resolution capability and being non-dissipative. Although very high energy-resolution has been demonstrated, until now there has been no demonstration of multiplexed read-out. We report on the first realization of a time domain multiplexed (TDM) read-out. While this has many similarities with TDM of transition-edge-sensors (TES), for MGGs the energy resolution is limited by the SQUID read-out noise and requires the well established scheme to be altered in order to minimize degradation due to noise aliasing effects. In cur approach, each pixel is read out by a single first stage SQUID (SQ1) that is operated in open loop. The outputs of the SQ1 s are low-pass filtered with an array of low cross-talk inductors, then fed into a single-stage SQUID TD multiplexer. The multiplexer is addressed from room temperature and read out through a single amplifier channel. We present results achieved with a new detector platform. Noise performance is presented and compared to expectations. We have demonstrated multiplexed X-ray spectroscopy at 5.9keV with delta_FWHM=10eV. In an optimized setup, we show it is possible to multiplex 32 detectors without significantly degrading the Intrinsic detector resolution.

  19. Neural network based cluster creation in the ATLAS silicon Pixel Detector

    CERN Document Server

    Andreazza, A; The ATLAS collaboration

    2013-01-01

    The read-out from individual pixels on planar semi-conductor sensors are grouped into clusters to reconstruct the location where a charged particle passed through the sensor. The resolution given by individual pixel sizes is significantly improved by using the information from the charge sharing between pixels. Such analog cluster creation techniques have been used by the ATLAS experiment for many years to obtain an excellent performance. However, in dense environments, such as those inside high-energy jets, clusters have an increased probability of merging the charge deposited by multiple particles. Recently, a neural network based algorithm which estimates both the cluster position and whether a cluster should be split has been developed for the ATLAS Pixel Detector. The algorithm significantly reduces ambiguities in the assignment of pixel detector measurement to tracks within jets and improves the position accuracy with respect to standard interpolation techniques by taking into account the 2-dimensional ...

  20. Neural network based cluster creation in the ATLAS silicon pixel detector

    CERN Document Server

    Selbach, K E; The ATLAS collaboration

    2012-01-01

    The read-out from individual pixels on planar semi-conductor sensors are grouped into clusters to reconstruct the location where a charged particle passed through the sensor. The resolution given by individual pixel sizes is significantly improved by using the information from the charge sharing between pixels. Such analog cluster creation techniques have been used by the ATLAS experiment for many years to obtain an excellent performance. However, in dense environments, such as those inside high-energy jets, clusters have an increased probability of merging the charge deposited by multiple particles. Recently, a neural network based algorithm which estimates both the cluster position and whether a cluster should be split has been developed for the ATLAS pixel detector. The algorithm significantly reduces ambiguities in the assignment of pixel detector measurement to tracks within jets and improves the position accuracy with respect to standard interpolation techniques by taking into account the 2-dimensional ...

  1. The ALICE Pixel Detector

    International Nuclear Information System (INIS)

    Mercado-Perez, Jorge

    2002-01-01

    The present document is a brief summary of the performed activities during the 2001 Summer Student Programme at CERN under the Scientific Summer at Foreign Laboratories Program organized by the Particles and Fields Division of the Mexican Physical Society (Sociedad Mexicana de Fisica). In this case, the activities were related with the ALICE Pixel Group of the EP-AIT Division, under the supervision of Jeroen van Hunen, research fellow in this group. First, I give an introduction and overview to the ALICE experiment; followed by a description of wafer probing. A brief summary of the test beam that we had from July 13th to July 25th is given as well

  2. Operational experience of ATLAS SCT and Pixel Detector

    CERN Document Server

    Kocian, Martin; The ATLAS collaboration

    2017-01-01

    The ATLAS Inner Detector based on silicon sensors is consisting of a strip detector (SCT) and a pixel detector. It is the crucial component for vertexing and tracking in the ATLAS experiment. With the excellent performance of the LHC well beyond the original specification the silicon tracking detectors are facing substantial challenges in terms of data acquisition, radiation damage to the sensors, and SEUs in the readout ASICs. The approaches on how the detector systems cope with the demands of high luminosity operation while maintaining excellent performance through hardware upgrades, software and firmware algorithms, and operational settings, are presented.

  3. Robustness of the ATLAS pixel clustering neural network algorithm

    CERN Document Server

    AUTHOR|(INSPIRE)INSPIRE-00407780; The ATLAS collaboration

    2016-01-01

    Proton-proton collisions at the energy frontier puts strong constraints on track reconstruction algorithms. In the ATLAS track reconstruction algorithm, an artificial neural network is utilised to identify and split clusters of neighbouring read-out elements in the ATLAS pixel detector created by multiple charged particles. The robustness of the neural network algorithm is presented, probing its sensitivity to uncertainties in the detector conditions. The robustness is studied by evaluating the stability of the algorithm's performance under a range of variations in the inputs to the neural networks. Within reasonable variation magnitudes, the neural networks prove to be robust to most variation types.

  4. Design and Optimization of Multi-Pixel Transition-Edge Sensors for X-Ray Astronomy Applications

    Science.gov (United States)

    Smith, Stephen J.; Adams, Joseph S.; Bandler, Simon R.; Chervenak, James A.; Datesman, Aaron Michael; Eckart, Megan E.; Ewin, Audrey J.; Finkbeiner, Fred M.; Kelley, Richard L.; Kilbourne, Caroline A.; hide

    2017-01-01

    Multi-pixel transition-edge sensors (TESs), commonly referred to as 'hydras', are a type of position sensitive micro-calorimeter that enables very large format arrays to be designed without commensurate increase in the number of readout channels and associated wiring. In the hydra design, a single TES is coupled to discrete absorbers via varied thermal links. The links act as low pass thermal filters that are tuned to give a different characteristic pulse shape for x-ray photons absorbed in each of the hydra sub pixels. In this contribution we report on the experimental results from hydras consisting of up to 20 pixels per TES. We discuss the design trade-offs between energy resolution, position discrimination and number of pixels and investigate future design optimizations specifically targeted at meeting the readout technology considered for Lynx.

  5. Conceptual design of 3D integrated pixel sensors for the innermost layer of the ILC vertex detector

    International Nuclear Information System (INIS)

    Fu, Y; Hu-Guo, C; Dorokhov, A; Zhao, W; Hu, Y; Torheim, O

    2011-01-01

    The paper presents a design of CMOS Pixel Sensor (CPS) using the vertical integration technology (3DIT), expected to alleviate the most essential limitations of 2D-CPS. Our objective is to develop an intelligent architecture in order to meet the requirements of the innermost layer of the International Linear Collider (ILC) vertex detectors, which are particularly demanding in spatial resolution of less than 3 μm and associated frame readout time of 10 μs. The sensor, with a pixel pitch of 23 μm, will be composed of 3-tiers Integrated Circuits (IC) with different functionalities: detection with in pixel analogue processing, pixel-level 3-bit Analogue to Digital Conversion (ADC) and fast parallel sparse readout.

  6. Development of active edge pixel sensors and four-side buttable modules using vertical integration technologies

    Energy Technology Data Exchange (ETDEWEB)

    Macchiolo, A., E-mail: Anna.Macchiolo@mpp.mpg.de [Max-Planck-Institut for Physics, Föhringer Ring 6, D-80805 Munich (Germany); Andricek, L. [Semiconductor Laboratory of the Max-Planck-Society, Otto Hahn Ring 6, D-81739 Munich (Germany); Moser, H.-G.; Nisius, R. [Max-Planck-Institut for Physics, Föhringer Ring 6, D-80805 Munich (Germany); Richter, R.H. [Semiconductor Laboratory of the Max-Planck-Society, Otto Hahn Ring 6, D-81739 Munich (Germany); Terzo, S.; Weigell, P. [Max-Planck-Institut for Physics, Föhringer Ring 6, D-80805 Munich (Germany)

    2014-11-21

    We present an R and D activity focused on the development of novel modules for the upgrade of the ATLAS pixel system at the High Luminosity LHC (HL-LHC). The modules consist of n-in-p pixel sensors, 100 or 200 μm thick, produced at VTT (Finland) with an active edge technology, which considerably reduces the dead area at the periphery of the device. The sensors are interconnected with solder bump-bonding to the ATLAS FE-I3 and FE-I4 read-out chips, and characterised with radioactive sources and beam tests at the CERN-SPS and DESY. The results of these measurements will be discussed for devices before and after irradiation up to a fluence of 5×10{sub 15}n{sub eq}/cm{sup 2}. We will also report on the R and D activity to obtain Inter Chip Vias (ICVs) on the ATLAS read-out chip in collaboration with the Fraunhofer Institute EMFT. This step is meant to prove the feasibility of the signal transport to the newly created readout pads on the backside of the chips allowing for four side buttable devices without the presently used cantilever for wire bonding. The read-out chips with ICVs will be interconnected to thin pixel sensors, 75 μm and 150 μm thick, with the Solid Liquid Interdiffusion (SLID) technology, which is an alternative to the standard solder bump-bonding.

  7. Power distribution and substrate noise coupling investigations on the behavioral level for photon counting imaging readout circuits

    International Nuclear Information System (INIS)

    Lundgren, Jan; Abdalla, Suliman; O'Nils, Mattias; Oelmann, Bengt

    2007-01-01

    In modern mixed-signal system design, there are increasing problems associated with noise coupling caused by switching digital parts to sensitive analog parts. As a consequence, there is a growing necessity to understand these problems. In order to avoid costly design iterations, noise coupling simulations should be initiated as early as possible in the design chain. The problems associated with on-chip noise coupling have been discovered in photon counting pixel detector readout systems, where the level of integration of analog and digital circuits is very high on a very small area, and it would appear that these problems will continue to increase for future system designs in this field. This paper deals with the functionality of utilizing behavioral level models for simulating noise coupling in these readout systems. The methods and models are described and simulation results are shown for a photon counting pixel detector readout system

  8. Bonding techniques for hybrid active pixel sensors (HAPS)

    Energy Technology Data Exchange (ETDEWEB)

    Bigas, M. [Centre Nacional de Microelectronica, CNM-IMB (CSIC), Campus Universitat Autonoma de Barcelona, 08193 Bellaterra, Barcelona (Spain)]. E-mail: Marc.Bigas@cnm.es; Cabruja, E. [Centre Nacional de Microelectronica, CNM-IMB (CSIC), Campus Universitat Autonoma de Barcelona, 08193 Bellaterra, Barcelona (Spain)]. E-mail: Enric.Cabruja@cnm.es; Lozano, M. [Centre Nacional de Microelectronica, CNM-IMB (CSIC), Campus Universitat Autonoma de Barcelona, 08193 Bellaterra, Barcelona (Spain)

    2007-05-01

    A hybrid active pixel sensor (HAPS) consists of an array of sensing elements which is connected to an electronic read-out unit. The most used way to connect these two different devices is bump bonding. This interconnection technique is very suitable for these systems because it allows a very fine pitch and a high number of I/Os. However, there are other interconnection techniques available such as direct bonding. This paper, as a continuation of a review [M. Lozano, E. Cabruja, A. Collado, J. Santander, M. Ullan, Nucl. Instr. and Meth. A 473 (1-2) (2001) 95-101] published in 2001, presents an update of the different advanced bonding techniques available for manufacturing a hybrid active pixel detector.

  9. Results from the Commissioning of the ATLAS Pixel Detector

    CERN Document Server

    Strandberg, S

    2009-01-01

    The ATLAS pixel detector is a high resolution, silicon based, tracking detector with its innermost layer located only 5 cm away from the ATLAS interaction point. It is designed to provide good hit resolution and low noise, both important qualities for pattern recognition and for finding secondary vertices originating from decays of long-lived particles. The pixel detector has 80 million readout channels and is built up of three barrel layers and six disks, three on each side of the barrel. The detector was installed in the center of ATLAS in June 2007 and is currently being calibrated and commissioned. Details from the installation, commissioning and calibration are presented together with the current status.

  10. Capacitively coupled hybrid pixel assemblies for the CLIC vertex detector

    CERN Document Server

    AUTHOR|(SzGeCERN)734627; Benoit, Mathieu; Dannheim, Dominik; Dette, Karola; Hynds, Daniel; Kulis, Szymon; Peric, Ivan; Petric, Marko; Redford, Sophie; Sicking, Eva; Valerio, Pierpaolo

    2016-01-01

    The vertex detector at the proposed CLIC multi-TeV linear e+e- collider must have minimal material content and high spatial resolution, combined with accurate time-stamping to cope with the expected high rate of beam-induced backgrounds. One of the options being considered is the use of active sensors implemented in a commercial high-voltage CMOS process, capacitively coupled to hybrid pixel ASICs. A prototype of such an assembly, using two custom designed chips (CCPDv3 as active sensor glued to a CLICpix readout chip), has been characterised both in the lab and in beam tests at the CERN SPS using 120 GeV/c positively charged hadrons. Results of these characterisation studies are presented both for single and dual amplification stages in the active sensor. Pixel cross-coupling results are also presented, showing the sensitivity to placement precision and planarity of the glue layer.

  11. Online Calibration and Performance of the ATLAS Pixel Detector

    CERN Document Server

    Keil, M

    2011-01-01

    The ATLAS Pixel Detector is the innermost detector of the ATLAS experiment at the Large Hadron Collider at CERN. It consists of 1744 silicon sensors equipped with approximately 80 million electronic channels, providing typically three measurement points with high resolution for particles emerging from the beam-interaction region, thus allowing measuring particle tracks and secondary vertices with very high precision. The readout system of the Pixel Detector is based on a bi-directional optical data transmission system between the detector and the data acquisition system with an individual link for each of the 1744 modules. Signal conversion components are located on both ends, approximately 80 m apart. This paper describes the tuning and calibration of the optical links and the detector modules, including measurements of threshold, noise, charge measurement, timing performance and the sensor leakage current.

  12. Characterisation of pixel sensor prototypes for the ALICE ITS upgrade

    Energy Technology Data Exchange (ETDEWEB)

    Reidt, Felix [CERN (Switzerland); Physikalisches Institut, Universitaet Heidelberg (Germany); Collaboration: ALICE-Collaboration

    2014-07-01

    ALICE is preparing a major upgrade of its experimental apparatus to be installed in the second long LHC shutdown (LS2) in the years 2018-2019. A key element of the upgrade is the replacement of the Inner Tracking System (ITS) deploying Monolithic Active Pixel Sensors (MAPS). The upgraded ITS will have a reduced material budget while increasing the pixel density and readout rate capabilities. The novel design leads to higher pointing and momentum resolution as well as a p{sub T} acceptance extended to lower values. The corresponding sensor prototypes were qualified in laboratory measurements and beam tests with respect to their radiation tolerance and detection efficiency. This talk summarises recent results on the characterisation of prototypes belonging to the ALPIDE family.

  13. Test-beam results of a SOI pixel detector prototype

    CERN Document Server

    Bugiel, Roma; Dannheim, Dominik; Fiergolski, Adrian; Hynds, Daniel; Idzik, Marek; Kapusta, P; Kucewicz, Wojciech; Munker, Ruth Magdalena; Nurnberg, Andreas Matthias

    2018-01-01

    This paper presents the test-beam results of a monolithic pixel-detector prototype fabricated in 200 nm Silicon-On-Insulator (SOI) CMOS technology. The SOI detector was tested at the CERN SPS H6 beam line. The detector is fabricated on a 500 μm thick high-resistivity float- zone n-type (FZ-n) wafer. The pixel size is 30 μm × 30 μm and its readout uses a source- follower configuration. The test-beam data are analysed in order to compute the spatial resolution and detector efficiency. The analysis chain includes pedestal and noise calculation, cluster reconstruction, as well as alignment and η-correction for non-linear charge sharing. The results show a spatial resolution of about 4.3 μm.

  14. An EUDET/AIDA Pixel Beam Telescope for Detector Development

    CERN Document Server

    Rubinskiy, I

    2015-01-01

    Ahigh resolution(σ< 2 μm) beam telescope based on monolithic active pixel sensors (MAPS) was developed within the EUDET collaboration. EUDET was a coordinated detector R&D programme for the future International Linear Collider providing test beam infrastructure to detector R&D groups. The telescope consists of six sensor planes with a pixel pitch of either 18.4 μm or 10 μmand canbe operated insidea solenoidal magnetic fieldofupto1.2T.Ageneral purpose cooling, positioning, data acquisition (DAQ) and offine data analysis tools are available for the users. The excellent resolution, readout rate andDAQintegration capabilities made the telescopea primary beam tests tool also for several CERN based experiments. In this report the performance of the final telescope is presented. The plans for an even more flexible telescope with three differentpixel technologies(ATLASPixel, Mimosa,Timepix) withinthenew European detector infrastructure project AIDA are presented.

  15. High-speed X-ray imaging pixel array detector for synchrotron bunch isolation.

    Science.gov (United States)

    Philipp, Hugh T; Tate, Mark W; Purohit, Prafull; Shanks, Katherine S; Weiss, Joel T; Gruner, Sol M

    2016-03-01

    A wide-dynamic-range imaging X-ray detector designed for recording successive frames at rates up to 10 MHz is described. X-ray imaging with frame rates of up to 6.5 MHz have been experimentally verified. The pixel design allows for up to 8-12 frames to be stored internally at high speed before readout, which occurs at a 1 kHz frame rate. An additional mode of operation allows the integration capacitors to be re-addressed repeatedly before readout which can enhance the signal-to-noise ratio of cyclical processes. This detector, along with modern storage ring sources which provide short (10-100 ps) and intense X-ray pulses at megahertz rates, opens new avenues for the study of rapid structural changes in materials. The detector consists of hybridized modules, each of which is comprised of a 500 µm-thick silicon X-ray sensor solder bump-bonded, pixel by pixel, to an application-specific integrated circuit. The format of each module is 128 × 128 pixels with a pixel pitch of 150 µm. In the prototype detector described here, the three-side buttable modules are tiled in a 3 × 2 array with a full format of 256 × 384 pixels. The characteristics, operation, testing and application of the detector are detailed.

  16. Study of FPGA and GPU based pixel calibration for ATLAS IBL

    CERN Document Server

    Dopke, J; The ATLAS collaboration; Flick, T; Gabrielli, A; Grosse-Knetter, J; Krieger, N; Kugel, A; Polini, A; Schroer, N

    2010-01-01

    The insertable B-layer (IBL) is a new stage of the ATLAS pixel detector to be installed around 2014. 12 million pixel are attached to new FE-I4 readout ASICs, each controlling 26680 pixel. Compared to the existing FE-I3 based detector the new system features higher readout speed of 160Mbit/s per ASIC and simplified control. For calibration defined charges are applied to all pixels and the resulting time-over-threshold values are evaluated. In the present system multiple sets of two custom VME cards which employ a combination of FPGA and DSP technology are used for I/O interfacing, formatting and processing. The execution time of 51s to perform a threshold scan on a FE-I3 module of 46080 pixel is composed of 8s control, 29s transfer, 7.5s histogramming and 7s analysis. Extrapolating to FE-I4 the times per module of 53760 pixels are 12ms, 5.8s, 9.4s and 8.3s, a total of 23.5s. We present a proposal for a novel approach to the dominant tasks for FE-I4: histogramming and ananlysis. An FPGA-based histogramming uni...

  17. The Upgraded Pixel Detector of the ATLAS Experiment for Run-2 at the LHC

    CERN Document Server

    AUTHOR|(INSPIRE)INSPIRE-00084948; The ATLAS collaboration

    2016-01-01

    Run-2 of the LHC is providing new challenges to track and vertex reconstruction with higher energies, denser jets and higher rates. Therefore the ATLAS experiment has constructed the first 4-layer Pixel detector in HEP, installing a new Pixel layer, also called Insertable B-Layer (IBL). IBL is a fourth layer of pixel detectors, and has been installed in May 2014 at a radius of 3.3 cm between the existing Pixel Detector and a new smaller radius beam-pipe. The new detector, built to cope with high radiation and expected occupancy, is the first large scale application of 3D detectors and CMOS 130 nm technology. In addition the Pixel detector was refurbished with a new service quarter panel to recover about 3% of defective modules lost during run-1 and a new optical readout system to readout the data at higher speed while reducing the occupancy when running with increased luminosity. The commissioning and performance of the 4-layer Pixel Detector, in particular the IBL, will be presented using collision data.

  18. The Upgraded Pixel Detector of the ATLAS Experiment for Run-2

    CERN Document Server

    Ferrere, Didier; The ATLAS collaboration

    2016-01-01

    Run-2 of the LHC is providing new challenges to track and vertex reconstruction with higher energies, denser jets and higher rates. Therefore the ATLAS experiment has constructed the first 4-layer Pixel detector in HEP, installing a new Pixel layer, also called Insertable B-Layer (IBL). IBL is a fourth layer of pixel detectors, and has been installed in May 2014 at a radius of 3.3 cm between the existing Pixel Detector and a new smaller radius beam-pipe. The new detector, built to cope with high radiation and expected occupancy, is the first large scale application of 3D detectors and CMOS 130nm technology. In addition the Pixel detector was refurbished with a new service quarter panel to recover about 3% of defective modules lost during run-1 and a new optical readout system to readout the data at higher speed while reducing the occupancy when running with increased luminosity. The commissioning and performance of the 4-layer Pixel Detector, in particular the IBL, will be presented, using collision data.

  19. The upgraded Pixel Detector of the ATLAS experiment for Run-2 at the Large Hadron Collider

    CERN Document Server

    Giordani, MarioPaolo; The ATLAS collaboration

    2016-01-01

    Run-2 of the LHC is providing new challenges to track and vertex reconstruction with higher energies, denser jets and higher rates. Therefore the ATLAS experiment has constructed the first 4-layer Pixel detector in HEP, installing a new Pixel layer, also called Insertable B-Layer (IBL). IBL is a fourth layer of pixel detectors, and has been installed in May 2014 at a radius of 3.3 cm between the existing Pixel Detector and a new smaller radius beam-pipe. The new detector, built to cope with high radiation and expected occupancy, is the first large scale application of 3D detectors and CMOS 130nm technology. In addition the Pixel detector was refurbished with a new service quarter panel to recover about 3% of defective modules lost during run-1 and a new optical readout system to readout the data at higher speed while reducing the occupancy when running with increased luminosity. The commissioning and performance of the 4-layer Pixel Detector, in particular the IBL, will be presented, using collision data.

  20. Integration of the Omega-3 readout chip into a high energy physics experimental data acquisition system

    International Nuclear Information System (INIS)

    Beker, H.; Chesi, E.; Martinengo, P.

    1997-01-01

    The Omega-3 readout chip is presented in detail elsewhere in the same proceedings. We here describe the integration of the chip into present and future experiments describing both hardware and software aspects. We cover preliminary tests in the laboratory and on the beam. The WA97 experiment has already used a pixel telescope in the past and intends to upgrade to the Omega-3 chip. A newly proposed experiment at CERN studying strangeness production in heavy ion collisions also plans to use a similar telescope. Finally, we give an outlook on the ongoing developments in the pixel readout architecture in the context of ALICE, the heavy ion experiment at the LHC collider. (orig.)

  1. Pixel Interpolation Methods

    OpenAIRE

    Mintěl, Tomáš

    2009-01-01

    Tato diplomová práce se zabývá akcelerací interpolačních metod s využitím GPU a architektury NVIDIA (R) CUDA TM. Grafický výstup je reprezentován demonstrační aplikací pro transformaci obrazu nebo videa s použitím vybrané interpolace. Časově kritické části kódu jsou přesunuty na GPU a vykonány paralelně. Pro práci s obrazem a videem jsou použity vysoce optimalizované algoritmy z knihovny OpenCV, od firmy Intel. This master's thesis deals with acceleration of pixel interpolation methods usi...

  2. The ALICE pixel detector

    CERN Document Server

    Mercado Perez, J

    2002-01-01

    The present document is a brief summary of the performed activities during the 2001 Summer Student Programme at CERN under the Scientific Summer at Foreign Laboratories Program organized by the Particles and Fields Division of the Mexican Physical Society (Sociedad Mexicana de Fisica). In this case, the activities were related with the ALICE Pixel Group of the EP-AIT Division, under the supervision of Jeroen van Hunen, research fellow in this group. First, I give an introduction and overview to the ALICE experiment; followed by a description of wafer probing. A brief summary of the test beam that we had from July 13th to July 25th is given as well. (3 refs).

  3. Si and gaas pixel detectors for medical imaging applications

    International Nuclear Information System (INIS)

    Bisogni, M. G.

    2001-01-01

    As the use of digital radiographic equipment in the morphological imaging field is becoming the more and more diffuse, the research of new and more performing devices from public institutions and industrial companies is in constant progress. Most of these devices are based on solid-state detectors as X-ray sensors. Semiconductor pixel detectors, originally developed in the high energy physics environment, have been then proposed as digital detector for medical imaging applications. In this paper a digital single photon counting device, based on silicon and GaAs pixel detector, is presented. The detector is a thin slab of semiconductor crystal where an array of 64 by 64 square pixels, 170- m side, has been built on one side. The data read-out is performed by a VLSI integrated circuit named Photon Counting Chip (PCC), developed within the MEDIPIX collaboration. Each chip cell geometrically matches the sensor pixel. It contains a charge preamplifier, a threshold comparator and a 15 bits pseudo-random counter and it is coupled to the detector by means of bump bonding. Most important advantages of such system, with respect to a traditional X-rays film/screen device, are the wider linear dynamic range (3x104) and the higher performance in terms of MTF and DQE. Besides the single photon counting architecture allows to detect image contrasts lower than 3%. Electronics read-out performance as well as imaging capabilities of the digital device will be presented. Images of mammographic phantoms acquired with a standard Mammographic tube will be compared with radiographs obtained with traditional film/screen systems

  4. Development of a pixel sensor with fine space-time resolution based on SOI technology for the ILC vertex detector

    Energy Technology Data Exchange (ETDEWEB)

    Ono, Shun, E-mail: s-ono@champ.hep.sci.osaka-u.ac.jp [Osaka University, 1-1 Machikaneyama, Toyonaka (Japan); Togawa, Manabu; Tsuji, Ryoji; Mori, Teppei [Osaka University, 1-1 Machikaneyama, Toyonaka (Japan); Yamada, Miho; Arai, Yasuo; Tsuboyama, Toru; Hanagaki, Kazunori [Institute of Particle and Nuclear Studies, High Energy Accelerator Research Org. (KEK), 1-1 Oho, Tsukuba (Japan)

    2017-02-11

    We have been developing a new monolithic pixel sensor with silicon-on-insulator (SOI) technology for the International Linear Collider (ILC) vertex detector system. The SOI monolithic pixel detector is realized using standard CMOS circuits fabricated on a fully depleted sensor layer. The new SOI sensor SOFIST can store both the position and timing information of charged particles in each 20×20 μm{sup 2} pixel. The position resolution is further improved by the position weighted with the charges spread to multiple pixels. The pixel also records the hit timing with an embedded time-stamp circuit. The sensor chip has column-parallel analog-to-digital conversion (ADC) circuits and zero-suppression logic for high-speed data readout. We are designing and evaluating some prototype sensor chips for optimizing and minimizing the pixel circuit.

  5. Development of n-in-p pixel modules for the ATLAS upgrade at HL-LHC

    Science.gov (United States)

    Macchiolo, A.; Nisius, R.; Savic, N.; Terzo, S.

    2016-09-01

    Thin planar pixel modules are promising candidates to instrument the inner layers of the new ATLAS pixel detector for HL-LHC, thanks to the reduced contribution to the material budget and their high charge collection efficiency after irradiation. 100-200 μm thick sensors, interconnected to FE-I4 read-out chips, have been characterized with radioactive sources and beam tests at the CERN-SPS and DESY. The results of these measurements are reported for devices before and after irradiation up to a fluence of 14 ×1015 neq /cm2 . The charge collection and tracking efficiency of the different sensor thicknesses are compared. The outlook for future planar pixel sensor production is discussed, with a focus on sensor design with the pixel pitches (50×50 and 25×100 μm2) foreseen for the RD53 Collaboration read-out chip in 65 nm CMOS technology. An optimization of the biasing structures in the pixel cells is required to avoid the hit efficiency loss presently observed in the punch-through region after irradiation. For this purpose the performance of different layouts have been compared in FE-I4 compatible sensors at various fluence levels by using beam test data. Highly segmented sensors will represent a challenge for the tracking in the forward region of the pixel system at HL-LHC. In order to reproduce the performance of 50×50 μm2 pixels at high pseudo-rapidity values, FE-I4 compatible planar pixel sensors have been studied before and after irradiation in beam tests at high incidence angle (80°) with respect to the short pixel direction. Results on cluster shapes, charge collection and hit efficiency will be shown.

  6. Study of micro pixel photon counters for a high granularity scintillator-based hadron calorimeter

    International Nuclear Information System (INIS)

    D'Ascenzo, N.; Eggemann, A.; Garutti, E.

    2007-11-01

    A new Geiger mode avalanche photodiode, the Micro Pixel Photon Counter (MPPC), was recently released by Hamamatsu. It has a high photo-detection efficiency in the 420 nm spectral region. This product can represent an elegant candidate for the design of a high granularity scintillator based hadron calorimeter for the International Linear Collider. In fact, the direct readout of the blue scintillation photons with a MPPC is a feasible techological solution. The readout of a plastic scintillator by a MPPC, both mediated by the traditional wavelength shifting fiber, and directly coupled, has been systematically studied. (orig.)

  7. Rework of flip chip bonded radiation pixel detectors

    International Nuclear Information System (INIS)

    Vaehaenen, S.; Heikkinen, H.; Pohjonen, H.; Salonen, J.; Savolainen-Pulli, S.

    2008-01-01

    In this paper, some practical aspects of reworking flip chip hybridized pixel detectors are discussed. As flip chip technology has been advancing in terms of placement accuracy and reliability, large-area hybrid pixel detectors have been developed. The area requirements are usually fulfilled by placing several readout chips (ROCs) on single sensor chip. However, as the number of ROCs increases, the probability of failure in the hybridization process and the ROC operation also increases. Because high accuracy flip chip bonding takes time, a significant part of the price of a pixel detector comes from the flip chip assembly process itself. As large-area detector substrates are expensive, and many flip chip placements are required, the price of an assembled detector can become very high. In a typical case, there is just one bad ROC (out of several) on a faulty detector to be replaced. Considering the high price of pixel detectors and the fact that reworking faulty ROCs does not take much longer than the original placement, it is worthwhile to investigate the feasibility of a rework process

  8. Rework of flip chip bonded radiation pixel detectors

    Energy Technology Data Exchange (ETDEWEB)

    Vaehaenen, S. [VTT MEMS and Micropackaging, Espoo 02150 (Finland)], E-mail: sami.vahanen@vtt.fi; Heikkinen, H.; Pohjonen, H.; Salonen, J.; Savolainen-Pulli, S. [VTT MEMS and Micropackaging, Espoo 02150 (Finland)

    2008-06-11

    In this paper, some practical aspects of reworking flip chip hybridized pixel detectors are discussed. As flip chip technology has been advancing in terms of placement accuracy and reliability, large-area hybrid pixel detectors have been developed. The area requirements are usually fulfilled by placing several readout chips (ROCs) on single sensor chip. However, as the number of ROCs increases, the probability of failure in the hybridization process and the ROC operation also increases. Because high accuracy flip chip bonding takes time, a significant part of the price of a pixel detector comes from the flip chip assembly process itself. As large-area detector substrates are expensive, and many flip chip placements are required, the price of an assembled detector can become very high. In a typical case, there is just one bad ROC (out of several) on a faulty detector to be replaced. Considering the high price of pixel detectors and the fact that reworking faulty ROCs does not take much longer than the original placement, it is worthwhile to investigate the feasibility of a rework process.

  9. Characterization of active CMOS pixel sensors on high resistive substrate

    Energy Technology Data Exchange (ETDEWEB)

    Hirono, Toko; Hemperek, Tomasz; Huegging, Fabian; Krueger, Hans; Rymaszewski, Piotr; Wermes, Norbert [Physikalisches Institut, Universitaet Bonn, Bonn (Germany)

    2016-07-01

    Active CMOS pixel sensors are very attractive as radiation imaging pixel detector because they do not need cost-intensive fine pitch bump bonding. High radiation tolerance and time resolution are required to apply those sensors to upcoming particle physics experiments. To achieve these requirements, the active CMOS pixel sensors were developed on high resistive substrates. Signal charges are collected faster by drift in high resistive substrates than in standard low resistive substrates yielding also a higher radiation tolerance. A prototype of the active CMOS pixel sensor has been fabricated in the LFoundry 150 nm CMOS process on 2 kΩcm substrate. This prototype chip was thinned down to 300 μm and the backside has been processed and can contacted by an aluminum contact. The breakdown voltage is around -115 V, and the depletion width has been measured to be as large as 180 μm at a bias voltage of -110 V. Gain and noise of the readout circuitry agree with the designed values. Performance tests in the lab and test beam have been done before and after irradiation with X-rays and neutrons. In this presentation, the measurement results of the active CMOS prototype sensors are shown.

  10. The ATLAS Planar Pixel Sensor R and D project

    International Nuclear Information System (INIS)

    Beimforde, M.

    2011-01-01

    Within the R and D project on Planar Pixel Sensor Technology for the ATLAS inner detector upgrade, the use of planar pixel sensors for highest fluences as well as large area silicon detectors is investigated. The main research goals are optimizing the signal size after irradiations, reducing the inactive sensor edges, adjusting the readout electronics to the radiation induced decrease of the signal sizes, and reducing the production costs. Planar n-in-p sensors have been irradiated with neutrons and protons up to fluences of 2x10 16 n eq /cm 2 and 1x10 16 n eq /cm 2 , respectively, to study the collected charge as a function of the irradiation dose received. Furthermore comparisons of irradiated standard 300μm and thin 140μm sensors will be presented showing an increase of signal sizes after irradiation in thin sensors. Tuning studies of the present ATLAS front end electronics show possibilities to decrease the discriminator threshold of the present FE-I3 read out chips to less than 1500 electrons. In the present pixel detector upgrade scenarios a flat stave design for the innermost layers requires reduced inactive areas at the sensor edges to ensure low geometric inefficiencies. Investigations towards achieving slim edges presented here show possibilities to reduce the width of the inactive area to less than 500μm. Furthermore, a brief overview of present simulation activities within the Planar Pixel R and D project is given.

  11. A Discrete Component Low-Noise Preamplifier Readout for a Linear (1x16) SiC Photodiode Array

    Science.gov (United States)

    Kahle, Duncan; Aslam, Shahid; Herrero, Frederico A.; Waczynski, Augustyn

    2016-01-01

    A compact, low-noise and inexpensive preamplifier circuit has been designed and fabricated to optimally readout a common cathode (1x16) channel 4H-SiC Schottky photodiode array for use in ultraviolet experiments. The readout uses an operational amplifier with 10 pF capacitor in the feedback loop in parallel with a low leakage switch for each of the channels. This circuit configuration allows for reiterative sample, integrate and reset. A sampling technique is given to remove Johnson noise, enabling a femtoampere level readout noise performance. Commercial-off-the-shelf acquisition electronics are used to digitize the preamplifier analogue signals. The data logging acquisition electronics has a different integration circuit, which allows the bandwidth and gain to be independently adjusted. Using this readout, photoresponse measurements across the array between spectral wavelengths 200 nm and 370 nm are made to establish the array pixels external quantum efficiency, current responsivity and noise equivalent power.

  12. A discrete component low-noise preamplifier readout for a linear (1×16) SiC photodiode array

    Energy Technology Data Exchange (ETDEWEB)

    Kahle, Duncan [NASA, Goddard Space Flight Center, Detector Systems Branch, Greenbelt, MD 20771 (United States); Aslam, Shahid, E-mail: shahid.aslam-1@nasa.gov [NASA, Goddard Space Flight Center, Planetary Systems Laboratory, Greenbelt, MD 20771 (United States); Herrero, Federico A.; Waczynski, Augustyn [NASA, Goddard Space Flight Center, Detector Systems Branch, Greenbelt, MD 20771 (United States)

    2016-09-11

    A compact, low-noise and inexpensive preamplifier circuit has been designed and fabricated to optimally readout a common cathode (1×16) channel 4H-SiC Schottky photodiode array for use in ultraviolet experiments. The readout uses an operational amplifier with 10 pF capacitor in the feedback loop in parallel with a low leakage switch for each of the channels. This circuit configuration allows for reiterative sample, integrate and reset. A sampling technique is given to remove Johnson noise, enabling a femtoampere level readout noise performance. Commercial-off-the-shelf acquisition electronics are used to digitize the preamplifier analog signals. The data logging acquisition electronics has a different integration circuit, which allows the bandwidth and gain to be independently adjusted. Using this readout, photoresponse measurements across the array between spectral wavelengths 200 nm and 370 nm are made to establish the array pixels external quantum efficiency, current responsivity and noise equivalent power.

  13. THE KEPLER PIXEL RESPONSE FUNCTION

    International Nuclear Information System (INIS)

    Bryson, Stephen T.; Haas, Michael R.; Dotson, Jessie L.; Koch, David G.; Borucki, William J.; Tenenbaum, Peter; Jenkins, Jon M.; Chandrasekaran, Hema; Caldwell, Douglas A.; Klaus, Todd; Gilliland, Ronald L.

    2010-01-01

    Kepler seeks to detect sequences of transits of Earth-size exoplanets orbiting solar-like stars. Such transit signals are on the order of 100 ppm. The high photometric precision demanded by Kepler requires detailed knowledge of how the Kepler pixels respond to starlight during a nominal observation. This information is provided by the Kepler pixel response function (PRF), defined as the composite of Kepler's optical point-spread function, integrated spacecraft pointing jitter during a nominal cadence and other systematic effects. To provide sub-pixel resolution, the PRF is represented as a piecewise-continuous polynomial on a sub-pixel mesh. This continuous representation allows the prediction of a star's flux value on any pixel given the star's pixel position. The advantages and difficulties of this polynomial representation are discussed, including characterization of spatial variation in the PRF and the smoothing of discontinuities between sub-pixel polynomial patches. On-orbit super-resolution measurements of the PRF across the Kepler field of view are described. Two uses of the PRF are presented: the selection of pixels for each star that maximizes the photometric signal-to-noise ratio for that star, and PRF-fitted centroids which provide robust and accurate stellar positions on the CCD, primarily used for attitude and plate scale tracking. Good knowledge of the PRF has been a critical component for the successful collection of high-precision photometry by Kepler.

  14. A 128 pixel linear array for radiotherapy quality assurance

    Energy Technology Data Exchange (ETDEWEB)

    Franco, L. [Departmento de Fisica de Particulas, Facultade de Fisica, Universidade de Santiago, campus sur s/n, 15782 Santiago de Compostela (Spain); Gomez, F. [Departmento de Fisica de Particulas, Facultade de Fisica, Universidade de Santiago, campus sur s/n, 15782 Santiago de Compostela (Spain)]. E-mail: faustgr@usc.es; Iglesias, A. [Departmento de Fisica de Particulas, Facultade de Fisica, Universidade de Santiago, campus sur s/n, 15782 Santiago de Compostela (Spain); Lobato, R. [Hospital Clinico Universitario de Santiago, 15706 Santiago (Spain); Marin, J. [CIEMAT, Laboratorio de Electronica y Automatica, 28040 Madrid Spain (Spain); Mosquera, J. [Hospital Clinico Universitario de Santiago, 15706 Santiago (Spain); Pardo, J. [Departmento de Fisica de Particulas, Facultade de Fisica, Universidade de Santiago, campus sur s/n, 15782 Santiago de Compostela (Spain)]. E-mail: juanpm@usc.es; Pazos, A. [Departmento de Fisica de Particulas, Facultade de Fisica, Universidade de Santiago, campus sur s/n, 15782 Santiago de Compostela (Spain); Pena, J. [Departmento de Fisica de Particulas, Facultade de Fisica, Universidade de Santiago, campus sur s/n, 15782 Santiago de Compostela (Spain); Pombar, M. [Hospital Clinico Universitario de Santiago, 15706 Santiago (Spain); Rodriguez, A. [Departmento de Fisica de Particulas, Facultade de Fisica, Universidade de Santiago, campus sur s/n, 15782 Santiago de Compostela (Spain); Saavedra, D. [Universidade da Coruna, Dpto. de Enxeneria Industrial II, 15403 Ferrol Spain (Spain); Sendon, J. [Hospital Clinico Universitario de Santiago, 15706 Santiago (Spain); Yanez, A. [Universidade da Coruna, Dpto. de Enxeneria Industrial II, 15403 Ferrol Spain (Spain)

    2004-12-11

    New radiotherapy techniques require detectors able to verify and monitor the clinical beam with high spatial resolution and fast response. Room temperature organic liquid ionization detectors are becoming an alternative to standard air ionization chambers, due to their tissue equivalent behavior, their sensibility and small directional dependence. A liquid isooctane filled ionization linear array for radiotherapy quality assurance has been designed, built and tested. The detector consists of 128 pixels, each of them with an area of 1.7mmx1.7mm and a gap of 0.5mm. The small pixel size makes the detector ideal for high gradient beam profiles like those present in Intensity Modulated Radiation Therapy. The gap and the polarization voltage have been chosen in order to guarantee a linear relationship between the dose rate and the readout signal at high dose rates. As readout electronics we use the X-ray Data Acquisition System with the Xchip developed by the CCLRC.In the first device tests we have confirmed linearity up to a 6.7Gy/min dose rate with a deviation less than 1%. A profile with a signal-to-noise ratio around 500 can be obtained for a 4Gy/min dose rate with a 10 ms integration time.

  15. The Pixel-TPC. Demonstration of the concept and results

    Energy Technology Data Exchange (ETDEWEB)

    Lupberger, Michael [Universitaet Bonn (Germany); Collaboration: LCTPC-Deutschland-Collaboration

    2016-07-01

    A Time Projection Chamber (TPC) is foreseen as tracker for the ILD, one of the two detector concepts at the planned International Linear Collider (ILC). At the TPC endplates, Micromegas or GEMs will be used as gas amplification structure. Besides segmented anodes, also an active endplate with pixel chips, in our experiments the Timepix ASIC, is considered as a readout option. In a photolithographic process a grid has been produced on top of the chip to form a so called InGrid, which is a Micromegas-like gas amplification structure. Several thousand InGrids are necessary to equip a complete TPC endplate. For demonstration of the concept, three endplate modules have been built with a total of 160 InGrids covering an active area of about 300 cm{sup 2}. To read out the 10.5 million channels, the Timepix ASIC was implemented in a general readout system. A dedicated powering scheme, DAQ and online event display were developed by our group. The feasibility of the Pixel-TPC could be proven in a test beam campaign at DESY early 2015. The data has partly been analysed and shows the potential of this new type of detector. An overview of the developments necessary to build the detector is presented followed by impressions from the test beam and some of the results from the data analysis.

  16. A 128 pixel linear array for radiotherapy quality assurance

    International Nuclear Information System (INIS)

    Franco, L.; Gomez, F.; Iglesias, A.; Lobato, R.; Marin, J.; Mosquera, J.; Pardo, J.; Pazos, A.; Pena, J.; Pombar, M.; Rodriguez, A.; Saavedra, D.; Sendon, J.; Yanez, A.

    2004-01-01

    New radiotherapy techniques require detectors able to verify and monitor the clinical beam with high spatial resolution and fast response. Room temperature organic liquid ionization detectors are becoming an alternative to standard air ionization chambers, due to their tissue equivalent behavior, their sensibility and small directional dependence. A liquid isooctane filled ionization linear array for radiotherapy quality assurance has been designed, built and tested. The detector consists of 128 pixels, each of them with an area of 1.7mmx1.7mm and a gap of 0.5mm. The small pixel size makes the detector ideal for high gradient beam profiles like those present in Intensity Modulated Radiation Therapy. The gap and the polarization voltage have been chosen in order to guarantee a linear relationship between the dose rate and the readout signal at high dose rates. As readout electronics we use the X-ray Data Acquisition System with the Xchip developed by the CCLRC.In the first device tests we have confirmed linearity up to a 6.7Gy/min dose rate with a deviation less than 1%. A profile with a signal-to-noise ratio around 500 can be obtained for a 4Gy/min dose rate with a 10 ms integration time

  17. Realisation of serial powering of ATLAS pixel modules

    CERN Document Server

    Stockmanns, Tobias; Fischer, P; Hügging, Fabian Georg; Peric, Ivan; Runólfsson, Ogmundur; Wermes, Norbert

    2004-01-01

    Modern hybrid pixel detectors as they will be used for the next generation of high energy collider experiments like LHC avail deep sub micron technology for the readout electronics. To operate chips in this technology low supply voltages of 2.0 V to 2.5 V and high currents to achieve the desired performance are needed. Due to the long and low mass supply cables this high current leads to a significant voltage drop so that voltage fluctuations at the chip result, when the supply current changes. Therefore the parallel connection of the readout electronics with the power supplies imposes severe constraints on a detector with respect to voltage fluctuations and cable mass. To bypass this problem a new concept of serially connecting modules in a supply chain was developed. The basic idea of the concept, the potential risk and ways to minimize these risks are presented. In addition, studies of the implementation of this technology as an alternative for a possible upgrade of the ATLAS pixel detector are shown. In p...

  18. The Pixelated Revolution

    Directory of Open Access Journals (Sweden)

    Marko Stamenković

    2014-05-01

    Full Text Available The text foregrounds the relationship between three main elements: gaze, image and violence. Framed by the theoretical propositions in the selected texts by Marie-José Mondzain and Jean-Luc Nancy, this relationship is considered in the context of the current socio-political realities in the Middle East (Syria but also in the broader, global sense. I take contemporary visual practice as my starting point and consider “The Pixelated Revolution” (the project by the Lebanese artist Rabih Mroué as exemplary in this context in order to engage with the following phenomenon - recording one’s own death in the revolutionary and wartime conditions, at a level that connects several key elements of the debate: the visual character of mobile (phone technology, image-producing operations, the concept of self-sacrifice, and the mobilization of communities towards radical transformations. The purpose of this text is to encourage future reflections about the role images perform nowadays (in particular those created under the conditions of lethal threat and violence and about the implications of an external observer in this process, when looking at such images in the exhibition context from a ‘lateral’ (i.e., supposedly safe and neutral perspective.

  19. Diamond pixel modules

    International Nuclear Information System (INIS)

    Asner, D.; Barbero, M.; Bellini, V.; Belyaev, V.; Brom, J-M.; Bruzzi, M.; Chren, D.; Cindro, V.; Claus, G.; Cristinziani, M.; Costa, S.; D'Alessandro, R.; Boer, W. de; Dobos, D.; Dolenc, I.; Dulinski, W.; Duris, J.; Eremin, V.; Eusebi, R.; Frais-Koelbl, H.

    2011-01-01

    With the commissioning of the LHC in 2010 and upgrades expected in 2015, ATLAS and CMS are planning to upgrade their innermost tracking layers with radiation hard technologies. Chemical Vapor Deposition diamond has been used extensively in beam conditions monitors as the innermost detectors in the highest radiation areas of BaBar, Belle, CDF and all LHC experiments. This material is now being considered as a sensor material for use very close to the interaction region where the most extreme radiation conditions exist. Recently the RD42 collaboration constructed, irradiated and tested polycrystalline and single-crystal chemical vapor deposition diamond sensors to the highest fluences expected at the super-LHC. We present beam test results of chemical vapor deposition diamond up to fluences of 1.8x10 16 protons/cm 2 illustrating that both polycrystalline and single-crystal chemical vapor deposition diamonds follow a single damage curve. We also present beam test results of irradiated complete diamond pixel modules.

  20. Diamond pixel modules

    Energy Technology Data Exchange (ETDEWEB)

    Asner, D. [Carleton University, Ottawa (Canada); Barbero, M. [Universitaet Bonn (Germany); Bellini, V. [INFN/University of Catania (Italy); Belyaev, V. [MEPHI Institute, Moscow (Russian Federation); Brom, J-M. [IPHC, Strasbourg (France); Bruzzi, M. [INFN/University of Florence (Italy); Chren, D. [Czech Technical University, Prague (Czech Republic); Cindro, V. [Jozef Stefan Institute, Ljubljana (Slovenia); Claus, G. [IPHC, Strasbourg (France); Cristinziani, M. [Universitaet Bonn (Germany); Costa, S. [INFN/University of Catania (Italy); D' Alessandro, R. [Department of Energetics/INFN Florence (Italy); Boer, W. de [Universitaet Karlsruhe, Karlsruhe (Germany); Dobos, D. [CERN, Geneva (Switzerland); Dolenc, I. [Jozef Stefan Institute, Ljubljana (Slovenia); Dulinski, W. [IPHC, Strasbourg (France); Duris, J. [UCLA, Los Angeles, CA (United States); Eremin, V. [Ioffe Institute, St. Petersburg (Russian Federation); Eusebi, R. [FNAL, Batavia (United States); Frais-Koelbl, H. [Fachhochschule fuer Wirtschaft und Technik, Wiener Neustadt (Austria)

    2011-04-21

    With the commissioning of the LHC in 2010 and upgrades expected in 2015, ATLAS and CMS are planning to upgrade their innermost tracking layers with radiation hard technologies. Chemical Vapor Deposition diamond has been used extensively in beam conditions monitors as the innermost detectors in the highest radiation areas of BaBar, Belle, CDF and all LHC experiments. This material is now being considered as a sensor material for use very close to the interaction region where the most extreme radiation conditions exist. Recently the RD42 collaboration constructed, irradiated and tested polycrystalline and single-crystal chemical vapor deposition diamond sensors to the highest fluences expected at the super-LHC. We present beam test results of chemical vapor deposition diamond up to fluences of 1.8x10{sup 16} protons/cm{sup 2} illustrating that both polycrystalline and single-crystal chemical vapor deposition diamonds follow a single damage curve. We also present beam test results of irradiated complete diamond pixel modules.

  1. ATLAS Pixel Detector Operational Experience

    CERN Document Server

    Di Girolamo, B; The ATLAS collaboration

    2011-01-01

    The ATLAS Pixel Detector is the innermost detector of the ATLAS experiment at the Large Hadron Collider at CERN, providing high-resolution measurements of charged particle tracks in the high radiation environment close to the collision region. This capability is vital for the identification and measurement of proper decay times of long-lived particles such as b-hadrons, and thus vital for the ATLAS physics program. The detector provides hermetic coverage with three cylindrical layers and three layers of forward and backward pixel detectors. It consists of approximately 80 million pixels that are individually read out via chips bump-bonded to 1744 n-in-n silicon substrates. In this talk, results from the successful operation of the Pixel Detector at the LHC will be presented, including monitoring, calibration procedures, timing optimization and detector performance. The detector performance is excellent: 96.9% of the pixels are operational, noise occupancy and hit efficiency exceed the design specification, an...

  2. X-ray imaging characterization of active edge silicon pixel sensors

    International Nuclear Information System (INIS)

    Ponchut, C; Ruat, M; Kalliopuska, J

    2014-01-01

    The aim of this work was the experimental characterization of edge effects in active-edge silicon pixel sensors, in the frame of X-ray pixel detectors developments for synchrotron experiments. We produced a set of active edge pixel sensors with 300 to 500 μm thickness, edge widths ranging from 100 μm to 150 μm, and n or p pixel contact types. The sensors with 256 × 256 pixels and 55 × 55 μm 2 pixel pitch were then bump-bonded to Timepix readout chips for X-ray imaging measurements. The reduced edge widths makes the edge pixels more sensitive to the electrical field distribution at the sensor boundaries. We characterized this effect by mapping the spatial response of the sensor edges with a finely focused X-ray synchrotron beam. One of the samples showed a distortion-free response on all four edges, whereas others showed variable degrees of distortions extending at maximum to 300 micron from the sensor edge. An application of active edge pixel sensors to coherent diffraction imaging with synchrotron beams is described

  3. Fully depleted CMOS pixel sensor development and potential applications

    Energy Technology Data Exchange (ETDEWEB)

    Baudot, J.; Kachel, M. [Universite de Strasbourg, IPHC, 23 rue du Loess 67037 Strasbourg (France); CNRS, UMR7178, 67037 Strasbourg (France)

    2015-07-01

    low noise figure. Especially, an energy resolution of about 400 eV for 5 keV X-rays was obtained for single pixels. The prototypes have then been exposed to gradually increased fluences of neutrons, from 10{sup 13} to 5x10{sup 14} neq/cm{sup 2}. Again laboratory tests allowed to evaluate the signal over noise persistence on the different pixels implemented. Currently our development mostly targets the detection of soft X-rays, with the ambition to develop a pixel sensor matching counting rates as affordable with hybrid pixel sensors, but with an extended sensitivity to low energy and finer pixel about 25 x 25 μm{sup 2}. The original readout architecture proposed relies on a two tiers chip. The first tier consists of a sensor with a modest dynamic in order to insure low noise performances required by sensitivity. The interconnected second tier chip enhances the read-out speed by introducing massive parallelization. Performances reachable with this strategy combining counting and integration will be detailed. (authors)

  4. RAPS: an innovative active pixel for particle detection integrated in CMOS technology

    International Nuclear Information System (INIS)

    Passeri, Daniele; Placidi, Pisana; Verducci, Leonardo; Ciampolini, Paolo; Matrella, Guido; Marras, Alessandro; Bilei, G.M.

    2004-01-01

    In this paper we discuss some design, implementation and test issues, with respect to the development of the RAPS01 chip in the framework of the Radiation Active Pixel Sensors (RAPS) INFN project. The project aimed at verifying feasibility of smart, high-resolution pixel arrays with a fully standard, submicron CMOS technology for particle detection purposes. Layout optimization of the pixel, including sensitive element and local read and amplification circuits has been carried out. Different basic pixel schemes and read-out options have been proposed and devised. Chip fabrication has been completed and test phase is now under way: to this purpose a suitable test environment has been devised and test strategies have been planned

  5. Pre- and post-irradiation performance of FBK 3D silicon pixel detectors for CMS

    International Nuclear Information System (INIS)

    Krzywda, A.; Alagoz, E.; Bubna, M.; Obertino, M.; Solano, A.; Arndt, K.; Uplegger, L.; Betta, G.F. Dalla; Boscardin, M.; Ngadiuba, J.; Rivera, R.; Menasce, D.; Moroni, L.; Terzo, S.; Bortoletto, D.; Prosser, A.; Adreson, J.; Kwan, S.; Osipenkov, I.; Bolla, G.

    2014-01-01

    In preparation for the tenfold luminosity upgrade of the Large Hadron Collider (the HL-LHC) around 2020, three-dimensional (3D) silicon pixel sensors are being developed as a radiation-hard candidate to replace the planar ones currently being used in the CMS pixel detector. This study examines an early batch of FBK sensors (named ATLAS08) of three 3D pixel geometries: 1E, 2E, and 4E, which respectively contain one, two, and four readout electrodes for each pixel, passing completely through the bulk. We present electrical characteristics and beam test performance results for each detector before and after irradiation. The maximum fluence applied is 3.5×10 15 n eq /cm 2

  6. Performance of the Pixel Luminosity Telescope for Luminosity Measurement at CMS during Run 2

    CERN Document Server

    CMS Collaboration

    2017-01-01

    The Pixel Luminosity Telescope (PLT) is a dedicated system for luminosity measurement at the CMS experiment using silicon pixel sensors arranged into "telescopes", each consisting of three planes. It was installed during LS1 at the beginning of 2015 and has been providing online and offline luminosity measurements throughout Run 2. The online bunch-by-bunch luminosity measurement employs the "fast-or" capability of the pixel readout chip (PSI46) to identify events where a hit is registered in all three sensors in a telescope corresponding primarily to tracks originating from the interaction point. In addition, the full pixel information is read out at a lower rate, allowing for the calculation of corrections to the online luminosity from effects such as the miscounting of tracks not originating from the interaction point and detector efficiency. In this talk, we will present results from 2016 running and preliminary 2017 results, including commissioning and operational history, luminosity calibration using Va...

  7. Performance of the Pixel Luminosity Telescope for Luminosity Measurement at CMS during Run2

    CERN Document Server

    Lujan, Paul Joseph

    2017-01-01

    The Pixel Luminosity Telescope (PLT) is a dedicated system for luminosity measurement at the CMS experiment using silicon pixel sensors arranged into telescopes, each consisting of three sensor planes. It was installed in CMS at the beginning of 2015 and has been providing online and offline luminosity measurements throughout Run 2 of the LHC. The online bunch-by-bunch luminosity measurement employs the fast-or capability of the pixel readout chip to identify events where a hit is registered in all three sensors in a telescope, corresponding primarily to tracks originating from the interaction point. In addition, the full pixel information is read out at a lower rate, allowing for the calculation of corrections to the online luminosity from effects such as the miscounting of tracks not originating from the interaction point and detector efficiency. This paper presents results from the 2016 running of the PLT, including commissioning and operational history, luminosity calibration using Van der Meer scans, and...

  8. The color of X-rays: Spectral X-ray computed tomography using energy sensitive pixel detectors

    NARCIS (Netherlands)

    Schioppa, E.J.

    2014-01-01

    Energy sensitive X-ray imaging detectors are produced by connecting a semiconductor sensor to a spectroscopic pixel readout chip. In this thesis, the applicability of such detectors to X-ray Computed Tomography (CT) is studied. A prototype Medipix based silicon detector is calibrated using X-ray

  9. The ALICE silicon pixel detector system

    International Nuclear Information System (INIS)

    Kapusta, S.

    2009-01-01

    The Large Hadron Collider (LHC) is again reaching its startup phase at the European Organization for Particle Physics (CERN). The LHC started its operation on the 10 th of September, 2008 with huge success managing to sent the the first beam successfully around the entire ring in less than an hour after the first injection in one direction, and later that day in the opposite direction. Unfortunately, on the 19 th of September, an accident occurred during the 5.5 TeV magnet commissioning in Sector 34, which will significantly delay the operation of the LHC. The ALICE experiment will exploit the collisions of accelerated ions produced at the LHC to study strongly interacting matter at extreme densities and high temperatures. e ALICE Silicon Pixel Detector (SPD) represents the two innermost layers of the ALICE Inner Traing System (ITS) located at radii of 3.9 cm and 7.6 cm from the Interaction Point (IP). One of the main tasks of the SPD is to provide precise traing information. is information is fundamental for the study of weak decays of heavy flavor particles, since the corresponding signature is a secondary vertex separated from the primary vertex only by a few hundred micrometers. e tra density could be as high as 80 tracks per cm 2 in the innermost SPD layer as a consequence of a heavy ion collision. The SPD will provide a spatial resolution of around ≅12 μm in the rφ direction and ≅70 μm in the z direction. The expected occupancy of the SPD ranges from 0.4% to 1.5% which makes it an excellent charged particle multiplicity detector in the pseudorapidity region |η| < 2. Furthermore, by combining all possible hits in the SPD, one can get a rough estimate of the position of the primary interaction. One of the challenges is the tight material budget constraint (<1% radiation length per layer) in order to limit the scattering of the traversing particles. e silicon sensor and its readout chip have a total thickness of only 350 μm and the signal lines from the

  10. BATS, the readout control of UA1

    Energy Technology Data Exchange (ETDEWEB)

    Botlo, M.; Dorenbosch, J.; Jimack, M.; Szoncso, F.; Taurok, A.; Walzel, G. (European Organization for Nuclear Research, Geneva (Switzerland))

    1991-04-15

    A steadily rising luminosity and different readout architectures for the various detector systems of UA1 required a new data flow control to minimize the dead time. BATS, a finite state machine conceived around two microprocessors in a single VME crate, improved flexibility and reliability. Compatibility with BATS streamlined all readout branches. BATS also proved to be a valuable asset in spotting readout problems and previously undetected data flow bottlenecks. (orig.).

  11. Research and Development of Monolithic Active Pixel Sensors for the Detection of the Elementary Particles

    International Nuclear Information System (INIS)

    Li, Y.

    2007-09-01

    In order to develop high spatial resolution and readout speed vertex detectors for the future International Linear Collider (ILC), fast CMOS Monolithic Active Pixel Sensors (MAPS) are studied on this work. Two prototypes of MAPS, MIMOSA 8 and MIMOSA 16, based on the same micro-electronic architecture were developed in CMOS processes with different thickness of epitaxial layer. The size of pixel matrix is 32 x 128: 8 columns of the pixel array are readout directly with analog outputs and the other 24 columns are connected to the column level auto-zero discriminators. The Correlated Double Sampling (CDS) structures are successfully implemented inside pixel and discriminator. The photo diode type pixels with different diode sizes are used in these prototypes. With a 55 Fe X-ray radioactive source, the important parameters, such as Temporal Noise, Fixed Pattern Noise (FPN), Signal-to-Noise Ratio (SNR), Charge-to-Voltage conversion Factor (CVF) and Charge Collection Efficiency (CCE), are studied as function of readout speed and diode size. For MIMOSA 8, the effect of fast neutrons irradiation is also. Two beam tests campaigns were made: at DESY with a 5 GeV electrons beam and at CERN with a 180 GeV pions beam. Detection Efficiency and Spatial Resolution are studied in function of the discriminator threshold. For these two parameters, the influences of diode size and SNR of the central pixel of a cluster are also discussed. In order to improve the spatial resolution of the digital outputs, a very compact (25 μm x 1 mm) and low consumption (300 μW) column level ADC is designed in AMS 0.35 μm OPTO process. Based on successive approximation architecture, the auto-offset cancellation structure is integrated. A new column level auto-zero discriminator using static latch is also designed. (author)

  12. R and D of MPGD-readout TPC for the International Linear Collider experiment

    International Nuclear Information System (INIS)

    Yonamine, R

    2012-01-01

    A Time Projection Chamber (TPC) is chosen for the central tracker of the ILD detector, one of two detector concepts planned for the International Linear Collider (ILC). Physics goals at the ILC will require a TPC with a position resolution of 100 μm and superior track separation, which are not achievable with a conventional Multi-Wire Proportional Chamber (MWPC) readout. A MPGD readout offers improved position resolution and track separation due to measuring the signal at the anode and minimization of E × B effect. For several years, the LC TPC collaboration has been developing a MPGD readout using various small TPC prototypes and the Large Prototype TPC that is operated in a test beam at DESY. The MPGD technologies being tested are GEM and Micromegas with resistive charge broadening, with both traditional pad and CMOS pixel readout. Readout modules with both GEM and Micromegas gas amplification have achieved a position resolution on the order of 100 μm at B = 1 T. In this paper we report on the recent R and D toward the ILD TPC.

  13. Frequency multiplexing for readout of spin qubits

    Energy Technology Data Exchange (ETDEWEB)

    Hornibrook, J. M.; Colless, J. I.; Mahoney, A. C.; Croot, X. G.; Blanvillain, S.; Reilly, D. J., E-mail: david.reilly@sydney.edu.au [ARC Centre of Excellence for Engineered Quantum Systems, School of Physics, University of Sydney, Sydney, NSW 2006 (Australia); Lu, H.; Gossard, A. C. [Materials Department, University of California, Santa Barbara, California 93106 (United States)

    2014-03-10

    We demonstrate a low loss, chip-level frequency multiplexing scheme for readout of scaled-up spin qubit devices. By integrating separate bias tees and resonator circuits on-chip for each readout channel, we realise dispersive gate-sensing in combination with charge detection based on two radio frequency quantum point contacts. We apply this approach to perform multiplexed readout of a double quantum dot in the few-electron regime and further demonstrate operation of a 10-channel multiplexing device. Limitations for scaling spin qubit readout to large numbers of multiplexed channels are discussed.

  14. Investigation of DEPFET as vertex detector at ILC. Intrinsic properties, radiation hardness and alternative readout schemes

    International Nuclear Information System (INIS)

    Rummel, Stefan

    2009-01-01

    The International Linear Collider (ILC) is supposed to be the next generation lepton collider. The detectors at ILC are intended to be precision instruments improving the performance in impact parameter (IP), momentum and energy resolution significantly compared to previous detectors at lepton colliders. To achieve this goal it is necessary to develop new detector technologies or pushing existing technologies to their technological edges. Regarding the Vertex detector (VTX) this implies challenges in resolution, material budget, power consumption and readout speed. A promising technology for the Vertex detector is the Depleted Field Effect Transistor (DEPFET). The DEPFET is a semiconductor device with in-pixel ampli cation integrated on a fully depleted bulk. This allows building detectors with intrinsically high SNR due to the large sensitive volume and the small input capacitance at the rst ampli er. To reach the ambitious performance goals it is important to understand its various features: clear performance, internal amplification, noise and radiation hardness. The intrinsic noise is analyzed, showing that the contribution of the DEPFET is below 50 e - at the required speed. Moreover it is possible to show that the internal ampli cation could be further improved to more than 1nA/e - using the standard DEPFET technology. The clear performance is investigated on matrix level utilizing a dedicated setup for single pixel testing which allows direct insight into the DEPFET operation, without the complexity of the full readout system. It is possible to show that a full clear could be achieved with a voltage pulse of 10 V. Furthermore a novel clear concept - the capacitive coupled clear gate - is demonstrated. The radiation hardness is studied with respect to the system performance utilizing various irradiations with ionizing and non ionizing particles. The impact on the bulk as well as the interface damage is investigated. Up to now the readout is performed with

  15. Investigation of DEPFET as vertex detector at ILC. Intrinsic properties, radiation hardness and alternative readout schemes

    Energy Technology Data Exchange (ETDEWEB)

    Rummel, Stefan

    2009-07-20

    The International Linear Collider (ILC) is supposed to be the next generation lepton collider. The detectors at ILC are intended to be precision instruments improving the performance in impact parameter (IP), momentum and energy resolution significantly compared to previous detectors at lepton colliders. To achieve this goal it is necessary to develop new detector technologies or pushing existing technologies to their technological edges. Regarding the Vertex detector (VTX) this implies challenges in resolution, material budget, power consumption and readout speed. A promising technology for the Vertex detector is the Depleted Field Effect Transistor (DEPFET). The DEPFET is a semiconductor device with in-pixel ampli cation integrated on a fully depleted bulk. This allows building detectors with intrinsically high SNR due to the large sensitive volume and the small input capacitance at the rst ampli er. To reach the ambitious performance goals it is important to understand its various features: clear performance, internal amplification, noise and radiation hardness. The intrinsic noise is analyzed, showing that the contribution of the DEPFET is below 50 e{sup -} at the required speed. Moreover it is possible to show that the internal ampli cation could be further improved to more than 1nA/e{sup -} using the standard DEPFET technology. The clear performance is investigated on matrix level utilizing a dedicated setup for single pixel testing which allows direct insight into the DEPFET operation, without the complexity of the full readout system. It is possible to show that a full clear could be achieved with a voltage pulse of 10 V. Furthermore a novel clear concept - the capacitive coupled clear gate - is demonstrated. The radiation hardness is studied with respect to the system performance utilizing various irradiations with ionizing and non ionizing particles. The impact on the bulk as well as the interface damage is investigated. Up to now the readout is performed

  16. An inverter-based capacitive trans-impedance amplifier readout with offset cancellation and temporal noise reduction for IR focal plane array

    Science.gov (United States)

    Chen, Hsin-Han; Hsieh, Chih-Cheng

    2013-09-01

    This paper presents a readout integrated circuit (ROIC) with inverter-based capacitive trans-impedance amplifier (CTIA) and pseudo-multiple sampling technique for infrared focal plane array (IRFPA). The proposed inverter-based CTIA with a coupling capacitor [1], executing auto-zeroing technique to cancel out the varied offset voltage from process variation, is used to substitute differential amplifier in conventional CTIA. The tunable detector bias is applied from a global external bias before exposure. This scheme not only retains stable detector bias voltage and signal injection efficiency, but also reduces the pixel area as well. Pseudo-multiple sampling technique [2] is adopted to reduce the temporal noise of readout circuit. The noise reduction performance is comparable to the conventional multiple sampling operation without need of longer readout time proportional to the number of samples. A CMOS image sensor chip with 55×65 pixel array has been fabricated in 0.18um CMOS technology. It achieves a 12um×12um pixel size, a frame rate of 72 fps, a power-per-pixel of 0.66uW/pixel, and a readout temporal noise of 1.06mVrms (16 times of pseudo-multiple sampling), respectively.

  17. From Pixels to Planets

    Science.gov (United States)

    Brownston, Lee; Jenkins, Jon M.

    2015-01-01

    The Kepler Mission was launched in 2009 as NASAs first mission capable of finding Earth-size planets in the habitable zone of Sun-like stars. Its telescope consists of a 1.5-m primary mirror and a 0.95-m aperture. The 42 charge-coupled devices in its focal plane are read out every half hour, compressed, and then downlinked monthly. After four years, the second of four reaction wheels failed, ending the original mission. Back on earth, the Science Operations Center developed the Science Pipeline to analyze about 200,000 target stars in Keplers field of view, looking for evidence of periodic dimming suggesting that one or more planets had crossed the face of its host star. The Pipeline comprises several steps, from pixel-level calibration, through noise and artifact removal, to detection of transit-like signals and the construction of a suite of diagnostic tests to guard against false positives. The Kepler Science Pipeline consists of a pipeline infrastructure written in the Java programming language, which marshals data input to and output from MATLAB applications that are executed as external processes. The pipeline modules, which underwent continuous development and refinement even after data started arriving, employ several analytic techniques, many developed for the Kepler Project. Because of the large number of targets, the large amount of data per target and the complexity of the pipeline algorithms, the processing demands are daunting. Some pipeline modules require days to weeks to process all of their targets, even when run on NASA's 128-node Pleiades supercomputer. The software developers are still seeking ways to increase the throughput. To date, the Kepler project has discovered more than 4000 planetary candidates, of which more than 1000 have been independently confirmed or validated to be exoplanets. Funding for this mission is provided by NASAs Science Mission Directorate.

  18. Development of n-in-p pixel modules for the ATLAS Upgrade at HL-LHC

    CERN Document Server

    Macchiolo, Anna; Savic, Natascha; Terzo, Stefano

    2016-09-21

    Thin planar pixel modules are promising candidates to instrument the inner layers of the new ATLAS pixel detector for HL-LHC, thanks to the reduced contribution to the material budget and their high charge collection efficiency after irradiation. 100-200 $\\mu$m thick sensors, interconnected to FE-I4 read-out chips, have been characterized with radioactive sources and beam tests at the CERN-SPS and DESY. The results of these measurements are reported for devices before and after irradiation up to a fluence of $14\\times10^{15}$ n$_{eq}$/cm$^2$. The charge collection and tracking efficiency of the different sensor thicknesses are compared. The outlook for future planar pixel sensor production is discussed, with a focus on sensor design with the pixel pitches (50x50 and 25x100 $\\mu$m$^2$) foreseen for the RD53 Collaboration read-out chip in 65 nm CMOS technology. An optimization of the biasing structures in the pixel cells is required to avoid the hit efficiency loss presently observed in the punch-through region...

  19. Commissioning and first results from the CMS phase-1 upgrade pixel detector

    CERN Document Server

    Sonneveld, Jorine Mirjam

    2017-01-01

    The phase~1 upgrade of the CMS pixel detector has been designed to maintain the tracking performance at instantaneous luminosities of $2 \\times 10^{34} \\mathrm{~cm}^{-2} \\mathrm{~s}^{-1}$. Both barrel and endcap disk systems now feature one extra layer (4 barrel layers and 3 endcap disks), and a digital readout that provides a large enough bandwidth to read out its 124M pixel channels (87.7 percent more pixels compared to the previous system). The backend control and readout systems have been upgraded accordingly from VME-based to micro-TCA-based ones. The detector is now also fitted with a bi-phase CO$_2$ cooling system that reduces the material budget in the tracking region. The detector has been installed inside CMS at the start of 2017 and is now taking data. These proceedings discuss experiences in the commissioning and operation of the CMS phase~1 pixel detector. The first results from the CMS phase~1 pixel detector with this year's LHC proton-proton collision data are presented. ...

  20. Finite-element simulations of coupling capacitances in capacitively coupled pixel detectors

    CERN Document Server

    AUTHOR|(SzGeCERN)755510

    2017-01-01

    Capacitively coupled hybrid silicon pixel-detector assemblies are under study for the vertex detector at the proposed future CLIC linear electron-positron collider. The assemblies consist of active CCPDv3 sensors, with 25 μm pixel pitch implemented in a 180 nm High- Voltage CMOS process, which are glued to the CLICpix readout ASIC, with the same pixel pitch and processed in a commercial 65 nm CMOS technology. The signal created in the silicon bulk of the active sensors passes a two-stage amplifier, in each pixel, and gets transferred as a voltage pulse to metal pads facing the readout chip (ROC). The coupling of the signal to the metal pads on the ROC side proceeds through the capacitors formed between the two chips by a thin layer of epoxy glue. The coupling strength and the amount of unwanted cross coupling to neighbouring pixels depends critically on the uniformity of the glue layer, its thickness and on the alignment precision during the flip-chip assembly process. Finite-element calculations of the coup...

  1. Production Performance of the ATLAS Semiconductor Tracker Readout System

    CERN Document Server

    Mitsou, V A

    2006-01-01

    The ATLAS Semiconductor Tracker (SCT) together with the pixel and the transition radiation detectors will form the tracking system of the ATLAS experiment at LHC. It will consist of 20000 single-sided silicon microstrip sensors assembled back-to-back into modules mounted on four concentric barrels and two end-cap detectors formed by nine disks each. The SCT module production and testing has finished while the macro-assembly is well under way. After an overview of the layout and the operating environment of the SCT, a description of the readout electronics design and operation requirements will be given. The quality control procedure and the DAQ software for assuring the electrical functionality of hybrids and modules will be discussed. The focus will be on the electrical performance results obtained during the assembly and testing of the end-cap SCT modules.

  2. Development of CMOS pixel sensors for tracking and vertexing in high energy physics experiments

    CERN Document Server

    Senyukov, Serhiy; Besson, Auguste; Claus, Giles; Cousin, Loic; Dulinski, Wojciech; Goffe, Mathieu; Hippolyte, Boris; Maria, Robert; Molnar, Levente; Sanchez Castro, Xitzel; Winter, Marc

    2014-01-01

    CMOS pixel sensors (CPS) represent a novel technological approach to building charged particle detectors. CMOS processes allow to integrate a sensing volume and readout electronics in a single silicon die allowing to build sensors with a small pixel pitch ($\\sim 20 \\mu m$) and low material budget ($\\sim 0.2-0.3\\% X_0$) per layer. These characteristics make CPS an attractive option for vertexing and tracking systems of high energy physics experiments. Moreover, thanks to the mass production industrial CMOS processes used for the manufacturing of CPS the fabrication construction cost can be significantly reduced in comparison to more standard semiconductor technologies. However, the attainable performance level of the CPS in terms of radiation hardness and readout speed is mostly determined by the fabrication parameters of the CMOS processes available on the market rather than by the CPS intrinsic potential. The permanent evolution of commercial CMOS processes towards smaller feature sizes and high resistivity ...

  3. New pixelized Micromegas detector with low discharge rate for the COMPASS experiment

    CERN Document Server

    Neyret, D.; Anfreville, M.; Bedfer, Y.; Burtin, E.; Coquelet, C.; d'Hose, N.; Desforge, D.; Giganon, A.; Jourde, D.; Kunne, F.; Magnon, A.; Makke, N.; Marchand, C.; Paul, B.; Platchkov, S.; Thibaud, F.; Usseglio, M.; Vandenbroucke, M.

    2012-01-01

    New Micromegas (Micro-mesh gaseous detectors) are being developed in view of the future physics projects planned by the COMPASS collaboration at CERN. Several major upgrades compared to present detectors are being studied: detectors standing five times higher luminosity with hadron beams, detection of beam particles (flux up to a few hundred of kHz/mm^{2}, 10 times larger than for the present Micromegas detectors) with pixelized read-out in the central part, light and integrated electronics, and improved robustness. Two solutions of reduction of discharge impact have been studied, with Micromegas detectors using resistive layers and using an additional GEM foil. Performance of such detectors has also been measured. A large size prototypes with nominal active area and pixelized read-out has been produced and installed at COMPASS in 2010. In 2011 prototypes featuring an additional GEM foil, as well as an resistive prototype, are installed at COMPASS and preliminary results from those detectors presented very go...

  4. CMS Barrel Pixel Detector Overview

    CERN Document Server

    Kästli, H C; Erdmann, W; Gabathuler, K; Hörmann, C; Horisberger, Roland Paul; König, S; Kotlinski, D; Meier, B; Robmann, P; Rohe, T; Streuli, S

    2007-01-01

    The pixel detector is the innermost tracking device of the CMS experiment at the LHC. It is built from two independent sub devices, the pixel barrel and the end disks. The barrel consists of three concentric layers around the beam pipe with mean radii of 4.4, 7.3 and 10.2 cm. There are two end disks on each side of the interaction point at 34.5 cm and 46.5 cm. This article gives an overview of the pixel barrel detector, its mechanical support structure, electronics components, services and its expected performance.

  5. Characterization of a large-format, fine-pitch CdZnTe pixel detector for the HEFT balloon-Borne experiment

    OpenAIRE

    Chen, C. M. Hubert; Cook, Walter R.; Harrison, Fiona A.; Lin, Jiao Y. Y.

    2004-01-01

    We have developed a large-format CdZnTe pixel detector with custom, low-noise ASIC readout, for astrophysical applications. In particular, this detector is targeted for use in the High-Energy Focusing Telescope (HEFT), a balloon-borne experiment with focusing optics for 20-70 keV. The detector is a 24 X 44 pixel array of 498-µm pitch. As a focal plane detector, uniformity from pixel to pixel is very desirable. In this paper, we present the characterization of some detector properties for the ...

  6. Position dependence of charge collection in prototype sensors for the CMS pixel detector

    CERN Document Server

    Rohe, Tilman; Chiochia, Vincenzo; Cremaldi, Lucien M; Cucciarelli, Susanna; Dorokhov, Andrei; Konecki, Marcin; Prokofiev, Kirill; Regenfus, Christian; Sanders, David A; Son Seung Hee; Speer, Thomas; Swartz, Morris

    2004-01-01

    This paper reports on the sensor R&D activity for the CMS pixel detector. Devices featuring several design and technology options have been irradiated up to a proton fluence1 of 1 multiplied by 10**1**5 n //e//q/cm**2 at the CERN PS. Afterward, they were bump bonded to unirradiated readout chips and tested using high energy pions in the H2 beam line of the CERN SPS. The readout chip allows a nonzero suppressed full analogue readout and therefore a good characterization of the sensors in terms of noise and charge collection properties. The position dependence of signal is presented and the differences between the two sensor options are discussed. 20 Refs.

  7. Deployment of the CMS Tracker AMC as Backend for the CMS Pixel Detector

    CERN Document Server

    AUTHOR|(CDS)2079000

    2016-01-01

    The silicon pixel detector of the CMS experiment at CERN will be replaced with an upgraded version at the beginning of 2017 with the new detector featuring an additional barrel- and end-cap layer resulting in an increased number of fully digital read-out links running at 400Mb/s. New versions of the PSI46 Read-Out Chip and Token Bit Manager have been developed to operate at higher rates and reduce data loss. Front-End Controller and Front-End Driver boards, based on the {\\textmu}TCA compatible CMS Tracker AMC, a variant of the FC7 card, are being developed using different mezzanines to host the optical links for the digital read-out and control system. An overview of the system architecture is presented, with details on the implementation, and first results obtained from test systems.

  8. COLIBRI: partial camera readout and sliding trigger for the Cherenkov Telescope Array CTA

    International Nuclear Information System (INIS)

    Naumann, C L; Tejedor, L A; Martínez, G

    2013-01-01

    Plans for the future Cherenkov telescope array CTA include replacing the monolithic camera designs used in H.E.S.S. and MAGIC-I by one that is built up from a number of identical segments. These so-called clusters will be relatively autonomous, each containing its own triggering and readout hardware. While this choice was made for reasons of flexibility and ease of manufacture and maintenance, such a concept with semi-independent sub-units lends itself quite naturally to the possibility of new, and more flexible, readout modes. In all previously-used concepts, triggering and readout of the camera is centralised, with a single camera trigger per event that starts the readout of all pixels in the camera at the same time and within the same integration time window. The limitations of such a trigger system can reduce the performance of a large array such as CTA, due to the huge amount of useless data created by night-sky background if trigger thresholds are set low enough to achieve the desired 20 GeV energy threshold, and to image losses at high energies due to the rigid readout window. In this study, an alternative concept (''COLIBRI'' = Concept for an Optimised Local Image Building and Readout Infrastructure) is presented, where only those parts of the camera which are likely to actually contain image data (usually a small percentage of the total pixels) are read out. This leads to a significant reduction of the expected data rate and the dead-times incurred in the camera. Furthermore, the quasi-independence of the individual clusters can be used to read different parts of the camera at slightly different times, thus allowing the readout to follow the slow development of the shower image across the camera field of view. This concept of flexible, partial camera readout is presented in the following, together with a description of Monte-Carlo studies performed to evaluate its performance as well as a hardware implementation proposed for CTA.

  9. Parallel encoders for pixel detectors

    International Nuclear Information System (INIS)

    Nikityuk, N.M.

    1991-01-01

    A new method of fast encoding and determining the multiplicity and coordinates of fired pixels is described. A specific example construction of parallel encodes and MCC for n=49 and t=2 is given. 16 refs.; 6 figs.; 2 tabs

  10. A 130 nm ASIC prototype for the NA62 Gigatracker readout

    Energy Technology Data Exchange (ETDEWEB)

    Dellacasa, G., E-mail: gdellaca@to.infn.it [I.N.F.N. sez. Torino, via Giuria 1, 10125 Torino (Italy); Garbolino, S. [Universita degli Studi di Torino, Dip. Fisica Sperimentale, via Giuria 1, 10125 Torino (Italy); Marchetto, F. [I.N.F.N. sez. Torino, via Giuria 1, 10125 Torino (Italy); Martoiu, S. [I.N.F.N. sez. Torino, via Giuria 1, 10125 Torino (Italy); CERN CH-1211, Geneve 23 (Switzerland); Mazza, G.; Rivetti, A.; Wheadon, R. [I.N.F.N. sez. Torino, via Giuria 1, 10125 Torino (Italy)

    2011-09-11

    One of the most challenging detectors of the NA62 experiment is the silicon tracker, called Gigatracker. It consists of three hybrid silicon pixel stations, each one covering an area of 27 mmx60 mm. While the maximum pixel size is fairly large, 300{mu}mx300{mu}m the system has to sustain a very high particle rate, 1.5 MHz/mm{sup 2}, which corresponds to 800 MHz for each station. To obtain an efficient tracking with such a high rate the required track timing resolution is 150 ps (rms). Therefore the front-end ASIC should provide for each pixel a 200 ps time measurement capability, thus leading to the requirement of time walk compensation and very compact TDCs. Moreover, Single Event Upset protection has to be implemented in order to protect the digital circuitry. An ASIC prototype has been realized in CMOS 130 nm technology, containing three pixel columns. The chip performs the time walk compensation by a Constant Fraction Discriminator circuit, while the time measurement is performed by a Time to Amplitude Converter based TDC, both of them implemented on each pixel cell. The End of Column circuit containing only digital logic is responsible for the data readout from the pixel cell. The whole chip works with a system clock of 160 MHz and the digital logic is SEU protected by the use of Hamming codes. The detailed architecture of the ASIC prototype and test results are presented.

  11. On Certain New Methodology for Reducing Sensor and Readout Electronics Circuitry Noise in Digital Domain

    Science.gov (United States)

    Kizhner, Semion; Miko, Joseph; Bradley, Damon; Heinzen, Katherine

    2008-01-01

    NASA Hubble Space Telescope (HST) and upcoming cosmology science missions carry instruments with multiple focal planes populated with many large sensor detector arrays. These sensors are passively cooled to low temperatures for low-level light (L3) and near-infrared (NIR) signal detection, and the sensor readout electronics circuitry must perform at extremely low noise levels to enable new required science measurements. Because we are at the technological edge of enhanced performance for sensors and readout electronics circuitry, as determined by thermal noise level at given temperature in analog domain, we must find new ways of further compensating for the noise in the signal digital domain. To facilitate this new approach, state-of-the-art sensors are augmented at their array hardware boundaries by non-illuminated reference pixels, which can be used to reduce noise attributed to sensors. There are a few proposed methodologies of processing in the digital domain the information carried by reference pixels, as employed by the Hubble Space Telescope and the James Webb Space Telescope Projects. These methods involve using spatial and temporal statistical parameters derived from boundary reference pixel information to enhance the active (non-reference) pixel signals. To make a step beyond this heritage methodology, we apply the NASA-developed technology known as the Hilbert- Huang Transform Data Processing System (HHT-DPS) for reference pixel information processing and its utilization in reconfigurable hardware on-board a spaceflight instrument or post-processing on the ground. The methodology examines signal processing for a 2-D domain, in which high-variance components of the thermal noise are carried by both active and reference pixels, similar to that in processing of low-voltage differential signals and subtraction of a single analog reference pixel from all active pixels on the sensor. Heritage methods using the aforementioned statistical parameters in the

  12. Hybrid amplifier for calorimetry with photodiode readout

    Energy Technology Data Exchange (ETDEWEB)

    Sushkov, V V

    1994-12-31

    A hybrid surface mounted amplifier for the photodiode readout of the EM calorimeter has been developed. The main technical characteristics of the design are presented. The design able to math readout constraints for a high luminosity collider experiment is discussed. 10 refs., 2 tabs., 8 figs.

  13. Evolution of the dual-readout calorimeter

    Indian Academy of Sciences (India)

    ... a calorimeter system of a relatively simple construction and moderate costs, however with excellent properties, built upon experience gained with the extensively beam-tested DREAM (Dual REAdout. Module) prototype. The main idea of multiple readout calorimetry is to indepen- dently measure for each hadronic shower ...

  14. Results from a prototype MAPS sensor telescope and readout system with zero suppression for the heavy flavor tracker at STAR

    International Nuclear Information System (INIS)

    Greiner, L.; Matis, H.S.; Ritter, H.G.; Rose, A.; Stezelberger, T.; Sun, X.; Szelezniak, M.; Thomas, J.; Vu, C.; Wieman, H.

    2008-01-01

    We describe a three Mimostar-2 Monolithic Active Pixel Sensor (MAPS) sensor telescope prototype with an accompanying readout system incorporating on-the-fly data sparsification. The system has been characterized and we report on the measured performance of the sensor telescope and readout system in beam tests conducted both at the Advanced Light Source (ALS) at Lawrence Berkeley National Laboratory (LBNL) and in the STAR experiment at the Relativistic Heavy Ion Collider (RHIC). This effort is part of the development and prototyping work that will lead to a vertex detector for the STAR experiment

  15. System test and noise performance studies at the ATLAS pixel detector

    International Nuclear Information System (INIS)

    Weingarten, J.

    2007-09-01

    The central component of the ATLAS Inner Tracker is the pixel detector. It consists of three barrel layers and three disk-layers in the end-caps in both forward directions. The innermost barrel layer is mounted at a distance of about 5 cm from the interaction region. With its very high granularity, truly two-dimensional hit information, and fast readout it is well suited to cope with the high densities of charged tracks, expected this close to the interaction region. The huge number of readout channels necessitates a very complex services infrastructure for powering, readout and safety. After a description of the pixel detector and its services infrastructure, key results from the system test at CERN are presented. Furthermore the noise performance of the pixel detector, crucial for high tracking and vertexing efficiencies, is studied. Measurements of the single-channel random noise are presented together with studies of common mode noise and measurements of the noise occupancy using a random trigger generator. (orig.)

  16. System test and noise performance studies at the ATLAS pixel detector

    Energy Technology Data Exchange (ETDEWEB)

    Weingarten, J.

    2007-09-15

    The central component of the ATLAS Inner Tracker is the pixel detector. It consists of three barrel layers and three disk-layers in the end-caps in both forward directions. The innermost barrel layer is mounted at a distance of about 5 cm from the interaction region. With its very high granularity, truly two-dimensional hit information, and fast readout it is well suited to cope with the high densities of charged tracks, expected this close to the interaction region. The huge number of readout channels necessitates a very complex services infrastructure for powering, readout and safety. After a description of the pixel detector and its services infrastructure, key results from the system test at CERN are presented. Furthermore the noise performance of the pixel detector, crucial for high tracking and vertexing efficiencies, is studied. Measurements of the single-channel random noise are presented together with studies of common mode noise and measurements of the noise occupancy using a random trigger generator. (orig.)

  17. CMOS Active Pixel Sensors as energy-range detectors for proton Computed Tomography

    International Nuclear Information System (INIS)

    Esposito, M.; Waltham, C.; Allinson, N.M.; Anaxagoras, T.; Evans, P.M.; Poludniowski, G.; Green, S.; Parker, D.J.; Price, T.; Manolopoulos, S.; Nieto-Camero, J.

    2015-01-01

    Since the first proof of concept in the early 70s, a number of technologies has been proposed to perform proton CT (pCT), as a means of mapping tissue stopping power for accurate treatment planning in proton therapy. Previous prototypes of energy-range detectors for pCT have been mainly based on the use of scintillator-based calorimeters, to measure proton residual energy after passing through the patient. However, such an approach is limited by the need for only a single proton passing through the energy-range detector in a read-out cycle. A novel approach to this problem could be the use of pixelated detectors, where the independent read-out of each pixel allows to measure simultaneously the residual energy of a number of protons in the same read-out cycle, facilitating a faster and more efficient pCT scan. This paper investigates the suitability of CMOS Active Pixel Sensors (APSs) to track individual protons as they go through a number of CMOS layers, forming an energy-range telescope. Measurements performed at the iThemba Laboratories will be presented and analysed in terms of correlation, to confirm capability of proton tracking for CMOS APSs

  18. CMOS Active Pixel Sensors as energy-range detectors for proton Computed Tomography.

    Science.gov (United States)

    Esposito, M; Anaxagoras, T; Evans, P M; Green, S; Manolopoulos, S; Nieto-Camero, J; Parker, D J; Poludniowski, G; Price, T; Waltham, C; Allinson, N M

    2015-06-03

    Since the first proof of concept in the early 70s, a number of technologies has been proposed to perform proton CT (pCT), as a means of mapping tissue stopping power for accurate treatment planning in proton therapy. Previous prototypes of energy-range detectors for pCT have been mainly based on the use of scintillator-based calorimeters, to measure proton residual energy after passing through the patient. However, such an approach is limited by the need for only a single proton passing through the energy-range detector in a read-out cycle. A novel approach to this problem could be the use of pixelated detectors, where the independent read-out of each pixel allows to measure simultaneously the residual energy of a number of protons in the same read-out cycle, facilitating a faster and more efficient pCT scan. This paper investigates the suitability of CMOS Active Pixel Sensors (APSs) to track individual protons as they go through a number of CMOS layers, forming an energy-range telescope. Measurements performed at the iThemba Laboratories will be presented and analysed in terms of correlation, to confirm capability of proton tracking for CMOS APSs.

  19. 3D track reconstruction capability of a silicon hybrid active pixel detector

    Energy Technology Data Exchange (ETDEWEB)

    Bergmann, Benedikt; Pichotka, Martin; Pospisil, Stanislav; Vycpalek, Jiri [Czech Technical University in Prague, Institute of Experimental and Applied Physics, Praha (Czech Republic); Burian, Petr; Broulim, Pavel [Czech Technical University in Prague, Institute of Experimental and Applied Physics, Praha (Czech Republic); University of West Bohemia, Faculty of Electrical Engineering, Pilsen (Czech Republic); Jakubek, Jan [Advacam s.r.o., Praha (Czech Republic)

    2017-06-15

    Timepix3 detectors are the latest generation of hybrid active pixel detectors of the Medipix/Timepix family. Such detectors consist of an active sensor layer which is connected to the readout ASIC (application specific integrated circuit), segmenting the detector into a square matrix of 256 x 256 pixels (pixel pitch 55 μm). Particles interacting in the active sensor material create charge carriers, which drift towards the pixelated electrode, where they are collected. In each pixel, the time of the interaction (time resolution 1.56 ns) and the amount of created charge carriers are measured. Such a device was employed in an experiment in a 120 GeV/c pion beam. It is demonstrated, how the drift time information can be used for ''4D'' particle tracking, with the three spatial dimensions and the energy losses along the particle trajectory (dE/dx). Since the coordinates in the detector plane are given by the pixelation (x,y), the x- and y-resolution is determined by the pixel pitch (55 μm). A z-resolution of 50.4 μm could be achieved (for a 500 μm thick silicon sensor at 130 V bias), whereby the drift time model independent z-resolution was found to be 28.5 μm. (orig.)

  20. 3D track reconstruction capability of a silicon hybrid active pixel detector

    Science.gov (United States)

    Bergmann, Benedikt; Pichotka, Martin; Pospisil, Stanislav; Vycpalek, Jiri; Burian, Petr; Broulim, Pavel; Jakubek, Jan

    2017-06-01

    Timepix3 detectors are the latest generation of hybrid active pixel detectors of the Medipix/Timepix family. Such detectors consist of an active sensor layer which is connected to the readout ASIC (application specific integrated circuit), segmenting the detector into a square matrix of 256 × 256 pixels (pixel pitch 55 μm). Particles interacting in the active sensor material create charge carriers, which drift towards the pixelated electrode, where they are collected. In each pixel, the time of the interaction (time resolution 1.56 ns) and the amount of created charge carriers are measured. Such a device was employed in an experiment in a 120 GeV/c pion beam. It is demonstrated, how the drift time information can be used for "4D" particle tracking, with the three spatial dimensions and the energy losses along the particle trajectory (dE/dx). Since the coordinates in the detector plane are given by the pixelation ( x, y), the x- and y-resolution is determined by the pixel pitch (55 μm). A z-resolution of 50.4 μm could be achieved (for a 500 μm thick silicon sensor at 130 V bias), whereby the drift time model independent z-resolution was found to be 28.5 μm.

  1. The upgraded Pixel Detector of the ATLAS Experiment for Run 2 at the Large Hadron Collider

    Energy Technology Data Exchange (ETDEWEB)

    Backhaus, M., E-mail: malte.backhaus@cern.ch

    2016-09-21

    During Run 1 of the Large Hadron Collider (LHC), the ATLAS Pixel Detector has shown excellent performance. The ATLAS collaboration took advantage of the first long shutdown of the LHC during 2013 and 2014 and extracted the ATLAS Pixel Detector from the experiment, brought it to surface and maintained the services. This included the installation of new service quarter panels, the repair of cables, and the installation of the new Diamond Beam Monitor (DBM). Additionally, a completely new innermost pixel detector layer, the Insertable B-Layer (IBL), was constructed and installed in May 2014 between a new smaller beam pipe and the existing Pixel Detector. With a radius of 3.3 cm the IBL is located extremely close to the interaction point. Therefore, a new readout chip and two new sensor technologies (planar and 3D) are used in the IBL. In order to achieve best possible physics performance the material budget was improved with respect to the existing Pixel Detector. This is realized using lightweight staves for mechanical support and a CO{sub 2} based cooling system. This paper describes the improvements achieved during the maintenance of the existing Pixel Detector as well as the performance of the IBL during the construction and commissioning phase. Additionally, first results obtained during the LHC Run 2 demonstrating the distinguished tracking performance of the new Four Layer ATLAS Pixel Detector are presented.

  2. The Binary Offset Effect in CCDs: an Anomalous Readout Artifact Affecting Most Astronomical CCDs in Use

    Science.gov (United States)

    Boone, Kyle Robert; Aldering, Gregory; Copin, Yannick; Dixon, Samantha; Domagalski, Rachel; Gangler, Emmanuel; Pecontal, Emmanuel; Perlmutter, Saul; Nearby Supernova Factory Collaboration

    2018-01-01

    We discovered an anomalous behavior of CCD readout electronics that affects their use in many astronomical applications, which we call the “binary offset effect”. Due to feedback in the readout electronics, an offset is introduced in the values read out for each pixel that depends on the binary encoding of the previously read-out pixel values. One consequence of this effect is that a pathological local background offset can be introduced in images that only appears where science data are present on the CCD. The amplitude of this introduced offset does not scale monotonically with the amplitude of the objects in the image, and can be up to 4.5 ADU per pixel for certain instruments. Additionally, this background offset will be shifted by several pixels from the science data, potentially distorting the shape of objects in the image. We tested 22 instruments for signs of the binary offset effect and found evidence of it in 16 of them, including LRIS and DEIMOS on the Keck telescopes, WFC3-UVIS and STIS on HST, MegaCam on CFHT, SNIFS on the UH88 telescope, GMOS on the Gemini telescopes, HSC on Subaru, and FORS on VLT. A large amount of archival data is therefore affected by the binary offset effect, and conventional methods of reducing CCD images do not measure or remove the introduced offsets. As a demonstration of how to correct for the binary offset effect, we have developed a model that can accurately predict and remove the introduced offsets for the SNIFS instrument on the UH88 telescope. Accounting for the binary offset effect is essential for precision low-count astronomical observations with CCDs.

  3. The Pixels find their way to the heart of ATLAS

    CERN Multimedia

    Kevin Einsweiler

    Since the last e-news article on the Pixel Detector in December 2006, there has been much progress. At that time, we were just about to receive the Beryllium beampipe, and to integrate the innermost layer of the Pixel Detector around it. This innermost layer is referred to as the B-layer because of the powerful role it plays in finding the secondary vertices that are the key signature for the presence of b-quarks, and with somewhat greater difficulty, c-quarks and tau leptons. The integration of the central 7m long beampipe into the Pixel Detector was completed in December, and the B-layer was successfully integrated around it. In January this year, we had largely completed the central 1.5m long detector, including the three barrel layers and the three disk layers on each end of the barrel. Although this region contains all of the 80 million readout channels, it cannot be integrated into the Inner Detector without additional services and infrastructure. Therefore, the next step was to add the Service Panels...

  4. Monolithic active pixel sensors (MAPS) in a VLSI CMOS technology

    CERN Document Server

    Turchetta, R; Manolopoulos, S; Tyndel, M; Allport, P P; Bates, R; O'Shea, V; Hall, G; Raymond, M

    2003-01-01

    Monolithic Active Pixel Sensors (MAPS) designed in a standard VLSI CMOS technology have recently been proposed as a compact pixel detector for the detection of high-energy charged particle in vertex/tracking applications. MAPS, also named CMOS sensors, are already extensively used in visible light applications. With respect to other competing imaging technologies, CMOS sensors have several potential advantages in terms of low cost, low power, lower noise at higher speed, random access of pixels which allows windowing of region of interest, ability to integrate several functions on the same chip. This brings altogether to the concept of 'camera-on-a-chip'. In this paper, we review the use of CMOS sensors for particle physics and we analyse their performances in term of the efficiency (fill factor), signal generation, noise, readout speed and sensor area. In most of high-energy physics applications, data reduction is needed in the sensor at an early stage of the data processing before transfer of the data to ta...

  5. Silicon Sensors for the Upgrades of the CMS Pixel Detector

    CERN Document Server

    Centis Vignali, Matteo; Schleper, Peter

    2015-01-01

    The Compact Muon Solenoid (CMS) is a general purpose detector at the Large Hadron Collider (LHC). The LHC luminosity is constantly increased through upgrades of the accel- erator and its injection chain. Two major upgrades will take place in the next years. The rst upgrade involves the LHC injector chain and allows the collider to achieve a luminosity of about 2 10 34 cm-2 s-1 A further upgrade of the LHC foreseen for 2025 will boost its luminosity to 5 10 34 cm-2 s1. As a consequence of the increased luminosity, the detectors need to be upgraded. In particular, the CMS pixel detector will undergo two upgrades in the next years. The rst upgrade (phase I) consists in the substitution of the current pixel detector in winter 2016/2017. The upgraded pixel detector will implement new readout elec- tronics that allow ecient data taking up to a luminosity of 2 10 34 cm-2s-1,twice as much as the LHC design luminosity. The modules that will constitute the upgraded detector are being produced at dierent institutes. Ham...

  6. Common Readout System in ALICE

    CERN Document Server

    Jubin, Mitra

    2016-01-01

    The ALICE experiment at the CERN Large Hadron Collider is going for a major physics upgrade in 2018. This upgrade is necessary for getting high statistics and high precision measurement for probing into rare physics channels needed to understand the dynamics of the condensed phase of QCD. The high interaction rate and the large event size in the upgraded detectors will result in an experimental data flow traffic of about 1 TB/s from the detectors to the on-line computing system. A dedicated Common Readout Unit (CRU) is proposed for data concentration, multiplexing, and trigger distribution. CRU, as common interface unit, handles timing, data and control signals between on-detector systems and online-offline computing system. An overview of the CRU architecture is presented in this manuscript.

  7. Drift chamber data readout system

    International Nuclear Information System (INIS)

    Basiladze, S.G.; Lokhonyai, L.

    1980-01-01

    An electronic system for processing drift chamber signals is described. The system consists of 4-channel fast amplifier-discriminators of low threshold, 16-channel time-expanders transforming 0.5 μs time intervals to 10 μs and a 9-bit time-to-digital converter (TDC) recording up to 16 expanded time intervals. If the average track multiplicity is small, TDC is capable to process signals from 4 time-expanders (i.e., 64 drift gaps). In order to record multiple tracks per drift gap discriminator outputs can be connected to a number of time-expander channels. The fast clear input enables the system to be cleared within 0.5 μs. Efficient readout from TDC is facilated by reading only those channels which contain non-zero data (9 bits - drift time; 6 bits - wire number)

  8. Common Readout System in ALICE

    CERN Document Server

    Jubin, Mitra

    2017-01-01

    The ALICE experiment at the CERN Large Hadron Collider is going for a major physics upgrade in 2018. This upgrade is necessary for getting high statistics and high precision measurement for probing into rare physics channels needed to understand the dynamics of the condensed phase of QCD. The high interaction rate and the large event size in the upgraded detectors will result in an experimental data flow traffic of about 1 TB/s from the detectors to the on-line computing system. A dedicated Common Readout Unit (CRU) is proposed for data concentration, multiplexing, and trigger distribution. CRU, as common interface unit, handles timing, data and control signals between on-detector systems and online-offline computing system. An overview of the CRU architecture is presented in this manuscript.

  9. Digital readout alpha survey instrument

    International Nuclear Information System (INIS)

    Jacobs, M.E.

    1976-01-01

    A prototype solid-state digital readout alpha particle survey instrument has been designed and constructed. The meter incorporates a Ludlum alpha scintillator as a detector, digital logic circuits for control and timing, and a Digilin counting module with reflective liquid crystal display. The device is used to monitor alpha radiation from a surface. Sample counts are totalized over 10-second intervals and displayed digitally in counts per minute up to 19,999. Tests over source samples with counts to 15,600 cpm have shown the device to be rapid, versatile and accurate. The instrument can be fabricated in one man-week and requires about $835 in material costs. A complete set of drawings is included

  10. High-speed imaging at high x-ray energy: CdTe sensors coupled to charge-integrating pixel array detectors

    Energy Technology Data Exchange (ETDEWEB)

    Becker, Julian; Tate, Mark W.; Shanks, Katherine S.; Philipp, Hugh T.; Weiss, Joel T.; Purohit, Prafull [Laboratory of Atomic and Solid State Physics, Cornell University, Ithaca, NY 14853 (United States); Chamberlain, Darol [Cornell High Energy Synchrotron Source (CHESS), Cornell University, Ithaca, NY 14853 (United States); Gruner, Sol M., E-mail: smg26@cornell.edu [Laboratory of Atomic and Solid State Physics, Cornell University, Ithaca, NY 14853 (United States); Cornell High Energy Synchrotron Source (CHESS), Cornell University, Ithaca, NY 14853 (United States)

    2016-07-27

    Pixel Array Detectors (PADs) consist of an x-ray sensor layer bonded pixel-by-pixel to an underlying readout chip. This approach allows both the sensor and the custom pixel electronics to be tailored independently to best match the x-ray imaging requirements. Here we describe the hybridization of CdTe sensors to two different charge-integrating readout chips, the Keck PAD and the Mixed-Mode PAD (MM-PAD), both developed previously in our laboratory. The charge-integrating architecture of each of these PADs extends the instantaneous counting rate by many orders of magnitude beyond that obtainable with photon counting architectures. The Keck PAD chip consists of rapid, 8-frame, in-pixel storage elements with framing periods <150 ns. The second detector, the MM-PAD, has an extended dynamic range by utilizing an in-pixel overflow counter coupled with charge removal circuitry activated at each overflow. This allows the recording of signals from the single-photon level to tens of millions of x-rays/pixel/frame while framing at 1 kHz. Both detector chips consist of a 128×128 pixel array with (150 µm){sup 2} pixels.

  11. Design and characterization of novel monolithic pixel sensors for the ALICE ITS upgrade

    Science.gov (United States)

    Cavicchioli, C.; Chalmet, P. L.; Giubilato, P.; Hillemanns, H.; Junique, A.; Kugathasan, T.; Mager, M.; Marin Tobon, C. A.; Martinengo, P.; Mattiazzo, S.; Mugnier, H.; Musa, L.; Pantano, D.; Rousset, J.; Reidt, F.; Riedler, P.; Snoeys, W.; Van Hoorne, J. W.; Yang, P.

    2014-11-01

    Within the R&D activities for the upgrade of the ALICE Inner Tracking System (ITS), Monolithic Active Pixel Sensors (MAPS) are being developed and studied, due to their lower material budget ( 0.3 %X0 in total for each inner layer) and higher granularity ( 20 μm × 20 μm pixels) with respect to the present pixel detector. This paper presents the design and characterization results of the Explorer0 chip, manufactured in the TowerJazz 180 nm CMOS Imaging Sensor process, based on a wafer with high-resistivity (ρ > 1 kΩ cm) and 18 μm thick epitaxial layer. The chip is organized in two sub-matrices with different pixel pitches (20 μm and 30 μm), each of them containing several pixel designs. The collection electrode size and shape, as well as the distance between the electrode and the surrounding electronics, are varied; the chip also offers the possibility to decouple the charge integration time from the readout time, and to change the sensor bias. The charge collection properties of the different pixel variants implemented in Explorer0 have been studied using a 55Fe X-ray source and 1-5 GeV/c electrons and positrons. The sensor capacitance has been estimated, and the effect of the sensor bias has also been examined in detail. A second version of the Explorer0 chip (called Explorer1) has been submitted for production in March 2013, together with a novel circuit with in-pixel discrimination and a sparsified readout. Results from these submissions are also presented.

  12. Design and characterization of novel monolithic pixel sensors for the ALICE ITS upgrade

    Energy Technology Data Exchange (ETDEWEB)

    Cavicchioli, C., E-mail: costanza.cavicchioli@cern.ch [CERN European Organization for Nuclear Research, CH-1211 Genève 23 (Switzerland); Chalmet, P.L. [MIND, Archamps Technopole, Saint-Julien-en-Genevois, Cedex 74166 (France); Giubilato, P. [Università and INFN, Padova (Italy); Hillemanns, H.; Junique, A.; Kugathasan, T.; Mager, M. [CERN European Organization for Nuclear Research, CH-1211 Genève 23 (Switzerland); Marin Tobon, C.A. [Valencia Polytechnic University, Valencia (Spain); Martinengo, P. [CERN European Organization for Nuclear Research, CH-1211 Genève 23 (Switzerland); Mattiazzo, S. [Università and INFN, Padova (Italy); Mugnier, H. [MIND, Archamps Technopole, Saint-Julien-en-Genevois, Cedex 74166 (France); Musa, L. [CERN European Organization for Nuclear Research, CH-1211 Genève 23 (Switzerland); Pantano, D. [Università and INFN, Padova (Italy); Rousset, J. [MIND, Archamps Technopole, Saint-Julien-en-Genevois, Cedex 74166 (France); Reidt, F. [CERN European Organization for Nuclear Research, CH-1211 Genève 23 (Switzerland); Physikalisches Institut, Ruprecht-Karls-Universitaet Heidelberg, Heidelberg (Germany); Riedler, P.; Snoeys, W. [CERN European Organization for Nuclear Research, CH-1211 Genève 23 (Switzerland); Van Hoorne, J.W. [CERN European Organization for Nuclear Research, CH-1211 Genève 23 (Switzerland); Technische Universitaet Wien, Vienna (Austria); Yang, P. [Central China Normal University CCNU, Wuhan (China)

    2014-11-21

    Within the R and D activities for the upgrade of the ALICE Inner Tracking System (ITS), Monolithic Active Pixel Sensors (MAPS) are being developed and studied, due to their lower material budget (∼0.3%X{sub 0} in total for each inner layer) and higher granularity (∼20μm×20μm pixels) with respect to the present pixel detector. This paper presents the design and characterization results of the Explorer0 chip, manufactured in the TowerJazz 180 nm CMOS Imaging Sensor process, based on a wafer with high-resistivity (ρ>1kΩcm) and 18 μm thick epitaxial layer. The chip is organized in two sub-matrices with different pixel pitches (20 μm and 30 μm), each of them containing several pixel designs. The collection electrode size and shape, as well as the distance between the electrode and the surrounding electronics, are varied; the chip also offers the possibility to decouple the charge integration time from the readout time, and to change the sensor bias. The charge collection properties of the different pixel variants implemented in Explorer0 have been studied using a {sup 55}Fe X-ray source and 1–5 GeV/c electrons and positrons. The sensor capacitance has been estimated, and the effect of the sensor bias has also been examined in detail. A second version of the Explorer0 chip (called Explorer1) has been submitted for production in March 2013, together with a novel circuit with in-pixel discrimination and a sparsified readout. Results from these submissions are also presented.

  13. Design and characterization of novel monolithic pixel sensors for the ALICE ITS upgrade

    International Nuclear Information System (INIS)

    Cavicchioli, C.; Chalmet, P.L.; Giubilato, P.; Hillemanns, H.; Junique, A.; Kugathasan, T.; Mager, M.; Marin Tobon, C.A.; Martinengo, P.; Mattiazzo, S.; Mugnier, H.; Musa, L.; Pantano, D.; Rousset, J.; Reidt, F.; Riedler, P.; Snoeys, W.; Van Hoorne, J.W.; Yang, P.

    2014-01-01

    Within the R and D activities for the upgrade of the ALICE Inner Tracking System (ITS), Monolithic Active Pixel Sensors (MAPS) are being developed and studied, due to their lower material budget (∼0.3%X 0 in total for each inner layer) and higher granularity (∼20μm×20μm pixels) with respect to the present pixel detector. This paper presents the design and characterization results of the Explorer0 chip, manufactured in the TowerJazz 180 nm CMOS Imaging Sensor process, based on a wafer with high-resistivity (ρ>1kΩcm) and 18 μm thick epitaxial layer. The chip is organized in two sub-matrices with different pixel pitches (20 μm and 30 μm), each of them containing several pixel designs. The collection electrode size and shape, as well as the distance between the electrode and the surrounding electronics, are varied; the chip also offers the possibility to decouple the charge integration time from the readout time, and to change the sensor bias. The charge collection properties of the different pixel variants implemented in Explorer0 have been studied using a 55 Fe X-ray source and 1–5 GeV/c electrons and positrons. The sensor capacitance has been estimated, and the effect of the sensor bias has also been examined in detail. A second version of the Explorer0 chip (called Explorer1) has been submitted for production in March 2013, together with a novel circuit with in-pixel discrimination and a sparsified readout. Results from these submissions are also presented

  14. Thin n-in-p planar pixel modules for the ATLAS upgrade at HL-LHC

    International Nuclear Information System (INIS)

    Savic, N.; Bergbreiter, L.; Breuer, J.; La Rosa, A.; Macchiolo, A.; Nisius, R.; Terzo, S.

    2017-01-01

    The ATLAS experiment will undergo a major upgrade of the tracker system in view of the high luminosity phase of the LHC (HL-LHC) foreseen to start around 2025. Thin planar pixel modules are promising candidates to instrument the new pixel system, thanks to the reduced contribution to the material budget and their high charge collection efficiency after irradiation. New designs of the pixel cells, with an optimized biasing structure, have been implemented in n-in-p planar pixel productions with sensor thicknesses of 270 μm. Using beam tests, the gain in hit efficiency is investigated as a function of the received irradiation fluence. The outlook for future thin planar pixel sensor productions will be discussed, with a focus on thin sensors with a thickness of 100 and 150 μm and a novel design with the optimized biasing structure and small pixel cells (50×50 and 25×100 μm"2). These dimensions are foreseen for the new ATLAS read-out chip in 65 nm CMOS technology and the fine segmentation will represent a challenge for the tracking in the forward region of the pixel system at HL-LHC. To predict the performance of 50×50 μm"2 pixels at high η, FE-I4 compatible planar pixel sensors have been studied before and after irradiation in beam tests at high incidence angle with respect to the short pixel direction. Results on cluster shapes, charge collection- and hit efficiency will be shown.

  15. Thin n-in-p planar pixel modules for the ATLAS upgrade at HL-LHC

    Energy Technology Data Exchange (ETDEWEB)

    Savic, N., E-mail: natascha.savic@mpp.mpg.de; Bergbreiter, L.; Breuer, J.; La Rosa, A.; Macchiolo, A.; Nisius, R.; Terzo, S.

    2017-02-11

    The ATLAS experiment will undergo a major upgrade of the tracker system in view of the high luminosity phase of the LHC (HL-LHC) foreseen to start around 2025. Thin planar pixel modules are promising candidates to instrument the new pixel system, thanks to the reduced contribution to the material budget and their high charge collection efficiency after irradiation. New designs of the pixel cells, with an optimized biasing structure, have been implemented in n-in-p planar pixel productions with sensor thicknesses of 270 μm. Using beam tests, the gain in hit efficiency is investigated as a function of the received irradiation fluence. The outlook for future thin planar pixel sensor productions will be discussed, with a focus on thin sensors with a thickness of 100 and 150 μm and a novel design with the optimized biasing structure and small pixel cells (50×50 and 25×100 μm{sup 2}). These dimensions are foreseen for the new ATLAS read-out chip in 65 nm CMOS technology and the fine segmentation will represent a challenge for the tracking in the forward region of the pixel system at HL-LHC. To predict the performance of 50×50 μm{sup 2} pixels at high η, FE-I4 compatible planar pixel sensors have been studied before and after irradiation in beam tests at high incidence angle with respect to the short pixel direction. Results on cluster shapes, charge collection- and hit efficiency will be shown.

  16. High-resolution photon spectroscopy with a microwave-multiplexed 4-pixel transition edge sensor array

    Science.gov (United States)

    Guss, Paul; Rabin, Michael; Croce, Mark; Hoteling, Nathan; Schwellenbach, David; Kruschwitz, Craig; Mocko, Veronika; Mukhopadhyay, Sanjoy

    2017-09-01

    We demonstrate very high-resolution photon spectroscopy with a microwave-multiplexed 4-pixel transition edge sensor (TES) array. The readout circuit consists of superconducting microwave resonators coupled to radio frequency superconducting-quantum-interference devices (RF-SQUIDs) and transduces changes in input current to changes in phase of a microwave signal. We used a flux-ramp modulation to linearize the response and avoid low-frequency noise. The result is a very high-resolution photon spectroscopy with a microwave-multiplexed 4-pixel transition edge sensor array. We performed and validated a small-scale demonstration and test of all the components of our concept system, which encompassed microcalorimetry, microwave multiplexing, RF-SQUIDs, and software-defined radio (SDR). We shall display data we acquired in the first simultaneous combination of all key innovations in a 4-pixel demonstration, including microcalorimetry, microwave multiplexing, RF-SQUIDs, and SDR. We present the energy spectrum of a gadolinium-153 (153Gd) source we measured using our 4-pixel TES array and the RF-SQUID multiplexer. For each pixel, one can observe the two 97.4 and 103.2 keV photopeaks. We measured the 153Gd photon source with an achieved energy resolution of 70 eV, full width half maximum (FWHM) at 100 keV, and an equivalent readout system noise of 90 pA/pHz at the TES. This demonstration establishes a path for the readout of cryogenic x-ray and gamma ray sensor arrays with more elements and spectral resolving powers. We believe this project has improved capabilities and substantively advanced the science useful for missions such as nuclear forensics, emergency response, and treaty verification through the explored TES developments.

  17. Characterization of Medipix3 with the MARS readout and software

    CERN Document Server

    Ronaldson, J P; van Leeuwen, D; Doesburg, R M N; Ballabriga, R; Butler, A P H; Donaldson, J; Walsh, M; Nik, S J; Clyne, M N

    2011-01-01

    The Medipix3 x-ray imaging detector has been characterized using the MARS camera. This x-ray camera comprises custom built readout electronics and software libraries designed for the Medipix family of detectors. The performance of the Medipix3 and MARS camera system is being studied prior to use in real-world applications such as the recently developed MARS-CT3 spectroscopic micro-CT scanner. We present the results of characterization measurements, describe methods for optimizing performance and give examples of spectroscopic images acquired with Medipix3 and the MARS camera system. A limited number of operating modes of the Medipix3 chip have been characterized and single-pixel mode has been found to give acceptable performance in terms of energy response, image quality and stability over time. Spectroscopic performance is significantly better in charge-summing mode than single-pixel mode however image quality and stability over time are compromised. There are more modes of operation to be tested and further...

  18. Development of a super B-factory monolithic active pixel detector-the Continuous Acquisition Pixel (CAP) prototypes

    International Nuclear Information System (INIS)

    Varner, G.; Barbero, M.; Bozek, A.; Browder, T.; Fang, F.; Hazumi, M.; Igarashi, A.; Iwaida, S.; Kennedy, J.; Kent, N.; Olsen, S.; Palka, H.; Rosen, M.; Ruckman, L.; Stanic, S.; Trabelsi, K.; Tsuboyama, T.; Uchida, K.

    2005-01-01

    Over the last few years great progress has been made in the technological development of Monolithic Active Pixel Sensors (MAPS) such that upgrades to existing vertex detectors using this technology are now actively being considered. Future vertex detection at an upgraded KEK-B factory, already the highest luminosity collider in the world, will require a detector technology capable of withstanding the increased track densities and larger radiation exposures. Near the beam pipe the current silicon strip detectors have projected occupancies in excess of 100%. Deep sub-micron MAPS look very promising to address this problem. In the context of an upgrade to the Belle vertex detector, the major obstacles to realizing such a device have been concerns about radiation hardness and readout speed. Two prototypes implemented in the TSMC 0.35 μm process have been developed to address these issues. Denoted the Continuous Acquisition Pixel, or CAP, the two variants of this architecture are distinguished in that CAP2 includes an 8-deep sampling pipeline within each 22.5 μm 2 pixel. Preliminary test results and remaining R and D issues are presented

  19. A two-dimensional position sensitive gas chamber with scanned charge transfer readout

    Energy Technology Data Exchange (ETDEWEB)

    Gomez, F. E-mail: faustgr@usc.es; Iglesias, A.; Lobato, R.; Mosquera, J.; Pardo, J.; Pena, J.; Pazos, A.; Pombar, M.; Rodriguez, A

    2003-10-21

    We have constructed and tested a two-dimensional position sensitive parallel-plate gas ionization chamber with scanned charge transfer readout. The scan readout method described here is based on the development of a new position-dependent charge transfer technique. It has been implemented by using gate strips perpendicularly oriented to the collector strips. This solution reduces considerably the number of electronic readout channels needed to cover large detector areas. The use of a 25 {mu}m thick kapton etched circuit allows high charge transfer efficiency with a low gating voltage, consequently needing a very simple commutating circuit. The present prototype covers 8x8 cm{sup 2} with a pixel size of 1.27x1.27 mm{sup 2}. Depending on the intended use and beam characteristics a smaller effective pixel is feasible and larger active areas are possible. This detector can be used for X-ray or other continuous beam intensity profile monitoring.

  20. Development of the digital read-out system for the CERN Alice pixel detector

    CERN Document Server

    Grassi, Tullio

    In order to gain new experimental insight at the TeV energy scale, CERN (Geneva) will build the Large Hadron Collider (LHC), a new collider machine operating at a maximum center-of-mass energy of 14 TeV (in the p+/p+ interactions). The accelerator can operate in a heavy ion collision mode achieving a center-of-mass energy of ~5.5 TeV. The experimental environment at LHC is characterized by a high crossing rate of the particle bunches (one every 25 ns for p+/p+) and high levels of radiation. Therefore stringent requirements are imposed on the performance of detectors at LHC. Such a particle physics environment calls for dedicated hardware/software solutions with specific constraints, such as radiation tolerance, limited amount of material and limited power dissipation. One of the particle physics experiments carried out in LHC is ALICE (A Large Ion Collider Experiment). The ALICE detector will face a very high density of tracks of particles (a multiplicity of 8000 charged particles per unit of rapidity, that i...

  1. Modular pixelated detector system with the spectroscopic capability and fast parallel read-out

    Czech Academy of Sciences Publication Activity Database

    Vavřík, Daniel; Holík, M.; Jakůbek, J.; Jakůbek, M.; Kraus, V.; Krejčí, F.; Soukup, P.; Tureček, D.; Vacík, Jiří; Žemlička, J.

    2014-01-01

    Roč. 9, June (2014), C06006 ISSN 1748-0221. [International workshop on radiation imaging detectors /15./. Paris, 23.06.2013-27.06.2013] R&D Projects: GA MŠk(CZ) LO1219; GA TA ČR(CZ) TA01010237 Institutional support: RVO:68378297 ; RVO:61389005 Keywords : particle tracking detectors * X-ray detectors * modular electronics * neutron detectors * solid-state detectors Subject RIV: JN - Civil Engineering; BM - Solid Matter Physics ; Magnetism (UJF-V) Impact factor: 1.399, year: 2014 http://iopscience.iop.org/1748-0221/9/06/C06006

  2. The readout system for the ArTeMis camera

    Science.gov (United States)

    Doumayrou, E.; Lortholary, M.; Dumaye, L.; Hamon, G.

    2014-07-01

    During ArTeMiS observations at the APEX telescope (Chajnantor, Chile), 5760 bolometric pixels from 20 arrays at 300mK, corresponding to 3 submillimeter focal planes at 450μm, 350μm and 200μm, have to be read out simultaneously at 40Hz. The read out system, made of electronics and software, is the full chain from the cryostat to the telescope. The readout electronics consists of cryogenic buffers at 4K (NABU), based on CMOS technology, and of warm electronic acquisition systems called BOLERO. The bolometric signal given by each pixel has to be amplified, sampled, converted, time stamped and formatted in data packets by the BOLERO electronics. The time stamping is obtained by the decoding of an IRIG-B signal given by APEX and is key to ensure the synchronization of the data with the telescope. Specifically developed for ArTeMiS, BOLERO is an assembly of analogue and digital FPGA boards connected directly on the top of the cryostat. Two detectors arrays (18*16 pixels), one NABU and one BOLERO interconnected by ribbon cables constitute the unit of the electronic architecture of ArTeMiS. In total, the 20 detectors for the tree focal planes are read by 10 BOLEROs. The software is working on a Linux operating system, it runs on 2 back-end computers (called BEAR) which are small and robust PCs with solid state disks. They gather the 10 BOLEROs data fluxes, and reconstruct the focal planes images. When the telescope scans the sky, the acquisitions are triggered thanks to a specific network protocol. This interface with APEX enables to synchronize the acquisition with the observations on sky: the time stamped data packets are sent during the scans to the APEX software that builds the observation FITS files. A graphical user interface enables the setting of the camera and the real time display of the focal plane images, which is essential in laboratory and commissioning phases. The software is a set of C++, Labview and Python, the qualities of which are respectively used

  3. Design and development of the IBL-BOC firmware for the ATLAS Pixel IBL optical datalink system

    CERN Document Server

    AUTHOR|(INSPIRE)INSPIRE-00356268

    The Insertable $b$-Layer (IBL) is the first upgrade of the ATLAS Pixel detector at the LHC. It will be installed in the Pixel detector in 2013. The IBL will use a new sensor and readout technology, therefore the readout components of the current Pixel detector are redesigned for the readout of the IBL. In this diploma thesis the design and development of the firmware for the new IBL Back-of-Crate card (IBL-BOC) are described. The IBL-BOC is located on the off-detector side of the readout and performs the optical-electrical conversion and vice versa for the optical connection to and from the detector. To process the data transmitted to and received from the detector, the IBL-BOC uses multiple Field Programmable Gate Arrays (FPGA). The transmitted signal is a 40~Mb/s BiPhase Mark (BPM) encoded data stream, providing the timing, trigger and control to the detector. The received signal is a 160~Mb/s 8b10b encoded data stream, containing data from the detector. The IBL-BOC encodes and decodes these data streams. T...

  4. Development of a Detector Control System for the ATLAS Pixel detector in the HL-LHC

    International Nuclear Information System (INIS)

    Lehmann, N.; Kersten, S.; Zeitnitz, C.; Karagounis, M.

    2016-01-01

    The upgrade of the LHC to the HL-LHC requires a new ITk detector. The innermost part of this new tracker is a pixel detector. The University of Wuppertal is developing a new DCS to monitor and control this new pixel detector. The current concept envisions three parallel paths of the DCS. The first path, called security path, is hardwired and provides an interlock system to guarantee the safety of the detector and human beings. The second path is a control path. This path is used to supervise the entire detector. The control path has its own communication lines independent from the regular data readout for reliable operation. The third path is for diagnostics and provides information on demand. It is merged with the regular data readout and provides the highest granularity and most detailed information. To reduce the material budget, a serial power scheme is the baseline for the pixel modules. A new ASIC used in the control path is in development at Wuppertal for this serial power chain. A prototype exists already and a proof of principle was demonstrated. Development and research is ongoing to guarantee the correct operation of the new ASIC in the harsh environment of the HL-LHC. The concept for the new DCS will be presented in this paper. A focus will be made on the development of the DCS chip, used for monitoring and control of pixel modules in a serial power chain.

  5. Silicon sensors for the upgrades of the CMS pixel detector

    International Nuclear Information System (INIS)

    Centis Vignali, Matteo

    2015-12-01

    The Compact Muon Solenoid (CMS) is a general purpose detector at the Large Hadron Collider (LHC). The LHC luminosity is constantly increased through upgrades of the accelerator and its injection chain. Two major upgrades will take place in the next years. The first upgrade involves the LHC injector chain and allows the collider to achieve a luminosity of about 2.10 34 cm -2 s -1 . A further upgrade of the LHC foreseen for 2025 will boost its luminosity to 5.10 34 cm -2 s -1 . As a consequence of the increased luminosity, the detectors need to be upgraded. In particular, the CMS pixel detector will undergo two upgrades in the next years. The first upgrade (phase I) consists in the substitution of the current pixel detector in winter 2016/2017. The upgraded pixel detector will implement new readout electronics that allow efficient data taking up to a luminosity of 2.10 34 cm -2 s -1 , twice as much as the LHC design luminosity. The modules that will constitute the upgraded detector are being produced at different institutes. Hamburg (University and DESY) is responsible for the production of 350 pixel modules. The second upgrade (phase II) of the pixel detector is foreseen for 2025. The innermost pixel layer of the upgraded detector will accumulate a radiation damage corresponding to an equivalent fluence of Φ eq =2.10 16 cm -2 and a dose of ∼10 MGy after an integrated luminosity of 3000 fb -1 . Several groups are investigating sensor designs and configurations able to withstand such high doses and fluences. This work is divided into two parts related to important aspects of the upgrades of the CMS pixel detector. For the phase I upgrade, a setup has been developed to provide an absolute energy calibration of the pixel modules that will constitute the detector. The calibration is obtained using monochromatic X-rays. The same setup is used to test the buffering capabilities of the modules' readout chip. The maximum rate experienced by the modules produced in

  6. Design of fundamental building blocks for fast binary readout CMOS sensors used in high-energy physics experiments

    Energy Technology Data Exchange (ETDEWEB)

    Degerli, Yavuz [CEA Saclay, IRFU/SEDI, 91191 Gif-sur-Yvette Cedex (France)], E-mail: degerli@cea.fr

    2009-04-21

    In this paper, design details of key building blocks for fast binary readout CMOS monolithic active pixel sensors developed for charged particle detection are presented. Firstly, an all-NMOS pixel architecture with in-pixel amplification and reset noise suppression which allows fast readout is presented. This pixel achieves high charge-to-voltage conversion factors (CVF) using a few number of transistors inside the pixel. It uses a pre-amplifying stage close to the detector and a simple double sampling (DS) circuitry to store the reset level of the detector. The DS removes the offset mismatches of amplifiers and the reset noise of the detector. Offset mismatches of the source follower are also corrected by a second column-level DS stage. The second important building block of these sensors, a low-power auto-zeroed column-level discriminator, is also presented. These two blocks transform the charge of the impinging particle into binary data. Finally, some experimental results obtained on CMOS chips designed using these blocks are presented.

  7. A Full Parallel Event Driven Readout Technique for Area Array SPAD FLIM Image Sensors

    Directory of Open Access Journals (Sweden)

    Kaiming Nie

    2016-01-01

    Full Text Available This paper presents a full parallel event driven readout method which is implemented in an area array single-photon avalanche diode (SPAD image sensor for high-speed fluorescence lifetime imaging microscopy (FLIM. The sensor only records and reads out effective time and position information by adopting full parallel event driven readout method, aiming at reducing the amount of data. The image sensor includes four 8 × 8 pixel arrays. In each array, four time-to-digital converters (TDCs are used to quantize the time of photons’ arrival, and two address record modules are used to record the column and row information. In this work, Monte Carlo simulations were performed in Matlab in terms of the pile-up effect induced by the readout method. The sensor’s resolution is 16 × 16. The time resolution of TDCs is 97.6 ps and the quantization range is 100 ns. The readout frame rate is 10 Mfps, and the maximum imaging frame rate is 100 fps. The chip’s output bandwidth is 720 MHz with an average power of 15 mW. The lifetime resolvability range is 5–20 ns, and the average error of estimated fluorescence lifetimes is below 1% by employing CMM to estimate lifetimes.

  8. Investigation of image distortion due to MCP electronic readout misalignment and correction via customized GUI application

    Science.gov (United States)

    Vitucci, G.; Minniti, T.; Tremsin, A. S.; Kockelmann, W.; Gorini, G.

    2018-04-01

    The MCP-based neutron counting detector is a novel device that allows high spatial resolution and time-resolved neutron radiography and tomography with epithermal, thermal and cold neutrons. Time resolution is possible by the high readout speeds of ~ 1200 frames/sec, allowing high resolution event counting with relatively high rates without spatial resolution degradation due to event overlaps. The electronic readout is based on a Timepix sensor, a CMOS pixel readout chip developed at CERN. Currently, a geometry of a quad Timepix detector is used with an active format of 28 × 28 mm2 limited by the size of the Timepix quad (2 × 2 chips) readout. Measurements of a set of high-precision micrometers test samples have been performed at the Imaging and Materials Science & Engineering (IMAT) beamline operating at the ISIS spallation neutron source (U.K.). The aim of these experiments was the full characterization of the chip misalignment and of the gaps between each pad in the quad Timepix sensor. Such misalignment causes distortions of the recorded shape of the sample analyzed. We present in this work a post-processing image procedure that considers and corrects these effects. Results of the correction will be discussed and the efficacy of this method evaluated.

  9. Performance verification of the CMS Phase-1 Upgrade Pixel detector

    Science.gov (United States)

    Veszpremi, V.

    2017-12-01

    The CMS tracker consists of two tracking systems utilizing semiconductor technology: the inner pixel and the outer strip detectors. The tracker detectors occupy the volume around the beam interaction region between 3 cm and 110 cm in radius and up to 280 cm along the beam axis. The pixel detector consists of 124 million pixels, corresponding to about 2 m 2 total area. It plays a vital role in the seeding of the track reconstruction algorithms and in the reconstruction of primary interactions and secondary decay vertices. It is surrounded by the strip tracker with 10 million read-out channels, corresponding to 200 m 2 total area. The tracker is operated in a high-occupancy and high-radiation environment established by particle collisions in the LHC . The current strip detector continues to perform very well. The pixel detector that has been used in Run 1 and in the first half of Run 2 was, however, replaced with the so-called Phase-1 Upgrade detector. The new system is better suited to match the increased instantaneous luminosity the LHC would reach before 2023. It was built to operate at an instantaneous luminosity of around 2×1034 cm-2s-1. The detector's new layout has an additional inner layer with respect to the previous one; it allows for more efficient tracking with smaller fake rate at higher event pile-up. The paper focuses on the first results obtained during the commissioning of the new detector. It also includes challenges faced during the first data taking to reach the optimal measurement efficiency. Details will be given on the performance at high occupancy with respect to observables such as data-rate, hit reconstruction efficiency, and resolution.

  10. Common Bias Readout for TES Array on Scanning Transmission Electron Microscope

    Science.gov (United States)

    Yamamoto, R.; Sakai, K.; Maehisa, K.; Nagayoshi, K.; Hayashi, T.; Muramatsu, H.; Nakashima, Y.; Mitsuda, K.; Yamasaki, N. Y.; Takei, Y.; Hidaka, M.; Nagasawa, S.; Maehata, K.; Hara, T.

    2016-07-01

    A transition edge sensor (TES) microcalorimeter array as an X-ray sensor for a scanning transmission electron microscope system is being developed. The technical challenge of this system is a high count rate of ˜ 5000 counts/second/array. We adopted a 64 pixel array with a parallel readout. Common SQUID bias, and common TES bias are planned to reduce the number of wires and the resources of a room temperature circuit. The reduction rate of wires is 44 % when a 64 pixel array is read out by a common bias of 8 channels. The possible degradation of the energy resolution has been investigated by simulations and experiments. The bias fluctuation effects of a series connection are less than those of a parallel connection. Simple calculations expect that the fluctuations of the common SQUID bias and common TES bias in a series connection are 10^{-7} and 10^{-3}, respectively. We constructed 8 SQUIDs which are connected to 8 TES outputs and a room temperature circuit for common bias readout and evaluated experimentally. Our simulation of crosstalk indicates that at an X-ray event rate of 500 cps/pixel, crosstalk will broaden a monochromatic line by about 0.01 %, or about 1.5 eV at 15 keV. Thus, our design goal of 10 eV energy resolution across the 0.5-15 keV band should be achievable.

  11. Studies for an upgrade of ALICE Inner Tracking System: Pixel chip characterization

    Directory of Open Access Journals (Sweden)

    Park Jonghan

    2017-01-01

    Full Text Available Inner Tracking System (ITS of ALICE is used for vertex determination and tracking. Future heavy-ion program at the LHC aims to run with high luminosity. To address this challenge, upgrade program of ITS is underway, which aims at better position resolution (factor of 3, high detection efficiency (>99%, high-rate readout capabilities (100 kHz for Pb-Pb and moderate radiation hardness (> 700 krad. The new ITS will be composed with 7 layers of silicon pixel chip based on Monolithic Active Pixel Sensor (MAPS technology. The characterization test of various version of prototype chips at different phases of development has been performed. This contribution will provide the main characterization results obtained from the measurements performed at laboratories and using test beam for finalizing the pixel chip specification.

  12. Development of radiation hard CMOS active pixel sensors for HL-LHC

    International Nuclear Information System (INIS)

    Pernegger, Heinz

    2016-01-01

    New pixel detectors, based on commercial high voltage and/or high resistivity full CMOS processes, hold promise as next-generation active pixel sensors for inner and intermediate layers of the upgraded ATLAS tracker. The use of commercial CMOS processes allow cost-effective detector construction and simpler hybridisation techniques. The paper gives an overview of the results obtained on AMS-produced CMOS sensors coupled to the ATLAS Pixel FE-I4 readout chips. The SOI (silicon-on-insulator) produced sensors by XFAB hold great promise as radiation hard SOI-CMOS sensors due to their combination of partially depleted SOI transistors reducing back-gate effects. The test results include pre-/post-irradiation comparison, measurements of charge collection regions as well as test beam results.

  13. Development of thin pixel sensors and a novel interconnection technology for the SLHC

    International Nuclear Information System (INIS)

    Macchiolo, A.; Andricek, L.; Beimforde, M.; Dubbert, J.; Ghodbane, N.; Kortner, O.; Kroha, H.; Moser, H.G.; Nisius, R.; Richter, R.H.

    2008-01-01

    We present an R and D activity aiming to develop a new detector concept in the framework of the ATLAS pixel detector upgrade in view of the Super-LHC. The new devices combine 75-150 μm thick pixels sensors with a vertical integration technology. A new production of thin pixel sensors on n- and p-type material is under way at the MPI Semiconductor Laboratory. These devices will be connected to the ATLAS read-out electronics with the new Solid-Liquid InterDiffusion technique as an alternative to the bump-bonding process. We also plan for the signals to be extracted from the back of the electronics wafer through Inter-Chip-Vias. The compatibility of the Solid-Liquid InterDiffusion process with the silicon sensor functionality has already been demonstrated by measurements on two wafers hosting diodes with an active thickness of 50 μm

  14. Robustness of the Artificial Neural Networks Used for Clustering in the ATLAS Pixel Detector

    CERN Document Server

    The ATLAS collaboration

    2015-01-01

    A study of the robustness of the ATLAS pixel neural network clustering algorithm is presented. The sensitivity to variations to its input is evaluated. These variations are motivated by potential discrepancies between data and simulation due to uncertainties in the modelling of pixel clusters in simulation, as well as uncertainties from the detector calibration. Within reasonable variation magnitudes, the neural networks prove to be robust to most variations. The neural network used to identify pixel clusters created by multiple charged particles, is most sensitive to variations affecting the total amount of charge collected in the cluster. Modifying the read-out threshold has the biggest effect on the clustering's ability to estimate the position of the particle's intersection with the detector.

  15. A pixel design for X-ray imaging with CdTe sensors

    Energy Technology Data Exchange (ETDEWEB)

    Lambropoulos, C.P.; Zervakis, E.G. [Technological Educational Institute of Halkis, Psahna - Evia (Greece); Loukas, D. [Institute of Nuclear Physics, NCSR Demokritos, Agia Paraskevi - Attiki (Greece)

    2008-07-01

    A readout architecture appropriate for X-ray Imaging using charge integration has been designed. Each pixel consists of a capacitive transimpedance amplifier, a sample and hold circuit a comparator and an 8 bit DRAM. Pixel level A/D conversion and local storage of the digitized signal is performed. The target sensors are 100{mu}m x 100 {mu}m CdTe pixel detectors and integration time of 1ms or less can be achieved. Special measures have been taken to minimize the gain fixed pattern noise and the reset noise, while purely digital correlation double sampling can be performed. (copyright 2008 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim) (orig.)

  16. A pixel design for X-ray imaging with CdTe sensors

    International Nuclear Information System (INIS)

    Lambropoulos, C.P.; Zervakis, E.G.; Loukas, D.

    2008-01-01

    A readout architecture appropriate for X-ray Imaging using charge integration has been designed. Each pixel consists of a capacitive transimpedance amplifier, a sample and hold circuit a comparator and an 8 bit DRAM. Pixel level A/D conversion and local storage of the digitized signal is performed. The target sensors are 100μm x 100 μm CdTe pixel detectors and integration time of 1ms or less can be achieved. Special measures have been taken to minimize the gain fixed pattern noise and the reset noise, while purely digital correlation double sampling can be performed. (copyright 2008 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim) (orig.)

  17. Synchrotron applications of pixel and strip detectors at Diamond Light Source

    International Nuclear Information System (INIS)

    Marchal, J.; Tartoni, N.; Nave, C.

    2009-01-01

    A wide range of position-sensitive X-ray detectors have been commissioned on the synchrotron X-ray beamlines operating at the Diamond Light Source in UK. In addition to mature technologies such as image-plates, CCD-based detectors, multi-wire and micro-strip gas detectors, more recent detectors based on semiconductor pixel or strip sensors coupled to CMOS read-out chips are also in use for routine synchrotron X-ray diffraction and scattering experiments. The performance of several commercial and developmental pixel/strip detectors for synchrotron studies are discussed with emphasis on the image quality achieved with these devices. Examples of pixel or strip detector applications at Diamond Light Source as well as the status of the commissioning of these detectors on the beamlines are presented. Finally, priorities and ideas for future developments are discussed.

  18. Application of a new interconnection technology for the ATLAS pixel upgrade at SLHC

    CERN Document Server

    Macchiolo, A; Beimforde, M; Moser, H G; Nisius, R; Richter, R H

    2009-01-01

    We present an R&D activity aiming towards a new detector concept in the framework of the ATLAS pixel detector upgrade exploiting a vertical integration technology developed at the Fraunhofer Institute IZMMunich. The Solid-Liquid InterDiffusion (SLID) technique is investigated as an alternative to the bump-bonding process. We also investigate the extraction of the signals from the back of the read-out chip through Inter-Chip-Vias to achieve a higher fraction of active area with respect to the present ATLAS pixel module. We will present the layout and the first results obtained with a production of test-structures designed to investigate the SLID interconnection efficiency as a function of different parameters, i.e. the pixel size and pitch, as well as the planarity of the underlying layers.

  19. Characterization of a 512x512-pixel 8-output full-frame CCD for high-speed imaging

    Science.gov (United States)

    Graeve, Thorsten; Dereniak, Eustace L.

    1993-01-01

    The characterization of a 512 by 512 pixel, eight-output full frame CCD manufactured by English Electric Valve under part number CCD13 is discussed. This device is a high- resolution Silicon-based array designed for visible imaging applications at readout periods as low as two milliseconds. The characterization of the device includes mean-variance analysis to determine read noise and dynamic range, as well as charge transfer efficiency, MTF, and quantum efficiency measurements. Dark current and non-uniformity issues on a pixel-to-pixel basis and between individual outputs are also examined. The characterization of the device is restricted by hardware limitations to a one MHz pixel rate, corresponding to a 40 ms readout time. However, subsections of the device have been operated at up to an equivalent 100 frames per second. To maximize the frame rate, the CCD is illuminated by a synchronized strobe flash in between frame readouts. The effects of the strobe illumination on the imagery obtained from the device is discussed.

  20. High dynamic range low-noise focal plane readout for VLWIR applications implemented with current mode background subtraction

    Science.gov (United States)

    Yang, Guang; Sun, Chao; Shaw, Timothy; Wrigley, Chris; Peddada, Pavani; Blazejewski, Edward R.; Pain, Bedabrata

    1998-09-01

    Design and operation of a low noise CMOS focal pa;ne readout circuit with ultra-high charge handling capacity is presented. Designed for high-background, VLWIR detector readout, each readout unit cell use an accurate dynamic current memory for automatic subtraction of the dark pedestal in current domain enabling measurement of small signals 85 dB below the dark level. The redout circuit operates with low-power dissipation, high linearity, and is capable of handling pedestal currents up to 300 nA. Measurements indicate an effective charge handling capacity of over 5 X 10(superscript 9) charges/pixel with less than 10(superscript 5) electrons of input referred noise.

  1. Calibration of ALIBAVA readout system

    Energy Technology Data Exchange (ETDEWEB)

    Trofymov, Artur [DESY, Hamburg (Germany); Collaboration: ATLAS experiment-Collaboration

    2015-07-01

    The High Luminosity Large Hadron Collider (LH-LHC) is the upgrade of the LHC that foreseen to increase the instantaneous luminosity by a factor ten with a total integrated luminosity of 3000 fb{sup -1}. The ATLAS experiment will need to build a new tracker to operate in the new severe LH-LHC conditions (increasing detector granularity to cope with much higher channel occupancy, designing radiation-hard sensors and electronics to cope with radiation damage). Charge collection efficiency (CCE) of silicon strip sensors for the new ATLAS tracker can be done with ALIBAVA analog readout system (analog system gives more information about signal from all strips than digital). In this work the preliminary results of ALIBAVA calibration using two different methods (with ''source data'' and ''calibration data'') are presented. Calibration constant obtained by these methods is necessary for knowing collected charge on the silicon strip sensors and for having the ability to compare it with measurements done at the test beam.

  2. Simulation of the Dynamic Inefficiency of the CMS Pixel Detector

    CERN Document Server

    INSPIRE-00380273

    2015-05-07

    The Pixel Detector is the innermost part of the CMS Tracker. It therefore has to prevail in the harshest environment in terms of particle fluence and radiation. There are several mechanisms that may decrease the efficiency of the detector. These are mainly caused by data acquisition (DAQ) problems and/or Single Event Upsets (SEU). Any remaining efficiency loss is referred to as the dynamic inefficiency. It is caused by various mechanisms inside the Readout Chip (ROC) and depends strongly on the data occupancy. In the 2012 data, at high values of instantaneous luminosity the inefficiency reached 2\\% (in the region closest to the interaction point) which is not negligible. In the 2015 run higher instantaneous luminosity is expected, which will result in lower efficiencies; therefore this effect needs to be understood and simulated. A data-driven method has been developed to simulate dynamic inefficiency, which has been shown to successfully simulate the effects.

  3. Evolution of the dual-readout calorimeter

    Indian Academy of Sciences (India)

    of longitudinal fibers, scintillator and quartz respectively, and therefore capable of deter- ... The main idea of multiple readout calorimetry is to indepen- ... in a campaign of R&D and tests (with sources, cosmic rays and beams) through-.

  4. The high dynamic range pixel array detector (HDR-PAD): Concept and design

    Energy Technology Data Exchange (ETDEWEB)

    Shanks, Katherine S.; Philipp, Hugh T.; Weiss, Joel T.; Becker, Julian; Tate, Mark W. [Laboratory of Atomic and Solid State Physics, Cornell University, Ithaca, NY 14853 (United States); Gruner, Sol M., E-mail: smg26@cornell.edu [Laboratory of Atomic and Solid State Physics, Cornell University, Ithaca, NY 14853 (United States); Cornell High Energy Synchrotron Source (CHESS), Cornell University, Ithaca, NY 14853 (United States)

    2016-07-27

    Experiments at storage ring light sources as well as at next-generation light sources increasingly require detectors capable of high dynamic range operation, combining low-noise detection of single photons with large pixel well depth. XFEL sources in particular provide pulse intensities sufficiently high that a purely photon-counting approach is impractical. The High Dynamic Range Pixel Array Detector (HDR-PAD) project aims to provide a dynamic range extending from single-photon sensitivity to 10{sup 6} photons/pixel in a single XFEL pulse while maintaining the ability to tolerate a sustained flux of 10{sup 11} ph/s/pixel at a storage ring source. Achieving these goals involves the development of fast pixel front-end electronics as well as, in the XFEL case, leveraging the delayed charge collection due to plasma effects in the sensor. A first prototype of essential electronic components of the HDR-PAD readout ASIC, exploring different options for the pixel front-end, has been fabricated. Here, the HDR-PAD concept and preliminary design will be described.

  5. All-passive pixel super-resolution of time-stretch imaging

    Science.gov (United States)

    Chan, Antony C. S.; Ng, Ho-Cheung; Bogaraju, Sharat C. V.; So, Hayden K. H.; Lam, Edmund Y.; Tsia, Kevin K.

    2017-03-01

    Based on image encoding in a serial-temporal format, optical time-stretch imaging entails a stringent requirement of state-of-the-art fast data acquisition unit in order to preserve high image resolution at an ultrahigh frame rate — hampering the widespread utilities of such technology. Here, we propose a pixel super-resolution (pixel-SR) technique tailored for time-stretch imaging that preserves pixel resolution at a relaxed sampling rate. It harnesses the subpixel shifts between image frames inherently introduced by asynchronous digital sampling of the continuous time-stretch imaging process. Precise pixel registration is thus accomplished without any active opto-mechanical subpixel-shift control or other additional hardware. Here, we present the experimental pixel-SR image reconstruction pipeline that restores high-resolution time-stretch images of microparticles and biological cells (phytoplankton) at a relaxed sampling rate (≈2-5 GSa/s)—more than four times lower than the originally required readout rate (20 GSa/s) — is thus effective for high-throughput label-free, morphology-based cellular classification down to single-cell precision. Upon integration with the high-throughput image processing technology, this pixel-SR time-stretch imaging technique represents a cost-effective and practical solution for large scale cell-based phenotypic screening in biomedical diagnosis and machine vision for quality control in manufacturing.

  6. Measurements and simulation of the interaction of turbulence and premixed flames; Messungen und Simulationen zur Wechselwirkung zwischen Turbulenz und vorgemischten Flammen

    Energy Technology Data Exchange (ETDEWEB)

    Durst, B

    2000-11-01

    The interaction between turbulence and hydrogen-flames was investigated in an explosion tube. The flow velocity around single flow obstacles was measured with a laser-Doppler system and compared to the flame velocity which was recorded using photodiodes. The highest turbulence intensity (up to 10 m/s) and correspondingly the highest flame acceleration was measured in the shear layer downstream of the obstacle with the highest blockage ratio. A closure model based on probability density functions (PDF) was developed for the time averaged chemical reaction rate for the purpose of simulating turbulent combustion processes. Comparisons of the results gained from simulations using the PDF combustion modell showed good agreement with the measurements performed. [German] Die Wechselwirkung zwischen Turbulenz und Wasserstoff-Flammen wurde in einem Explosionsrohr untersucht. Die Stroemungsgeschwindigkeit wurde mit einem Laser-Doppler System an Einzelhindernissen gemessen und mit der Flammengeschwindigkeit, die mittels Photodioden erfasst wurde, verglichen. In der Scherschicht hinter dem Hindernis mit der hoechsten Blockierrate wurde die hoechste Turbulenzintensitaet (bis 10 m/s) und damit die hoechste Flammenbeschleunigung gemessen. Fuer numerische Simulationen der turbulenten Verbrennung wurde ein Schliessungsansatz fuer die zeitgemittelte chemische Reaktionsrate entwickelt, der auf Wahrscheinlichkeitsdichtefunktionen (englisch: PDF) basiert. Vergleichsrechnungen mit dem PDF-Verbrennungsmodell zeigten gute Uebereinstimmung mit den durchgefuehrten Messungen.

  7. CMOS Pixel Sensors for High Precision Beam Telescopes and Vertex Detectors

    International Nuclear Information System (INIS)

    Masi, R. de; Baudot, J.; Fontaine, J.-Ch.

    2009-01-01

    CMOS sensors of the MIMOSA (standing for Minimum Ionising particle MOS Active pixel sensor) series are developed at IPHC since a decade and have ended up with full scale devices used in beam telescopes and in demonstrators of future vertex detectors. The sensors deliver analogue, unfiltered, signals and are therefore limited to read-out frequencies of ∼ 1 kframe/s. Since a few years, a fast architecture is being developed in collaboration with IRFU, which aims to speed up the read-out by 1-2 orders of magnitude. The first full scale sensor based on this architecture was fabricated recently and is being tested. Made of 660,000 pixels (18 μm pitch) covering an active area of ∼ 2 cm 2 , it delivers zero-suppressed binary signals, which allow running at ∼ 10 kframes/s. It will equip the beam telescope of the E.U. project EUDET and serve as a forerunner of the sensor equipping the 2 layers of the PIXEL detector of the STAR experiment at RHIC. The contribution to the conference will overview the main features and test results of this pioneering sensor. It will next describe its evolution towards read-out frequencies approaching 100 kframes/s, as required for the vertex detectors of the CBM experiment at FAIR and at the ILC. Finally, the issue of radiation tolerance will be addressed, in the context of a newly available CMOS process using a depleted substrate. A prototype sensor was fabricated in a such CMOS process. The talk will summarise beam test results showing, for the first time, that fluences of 10 14 n eq /cm 2 may be tolerable for CMOS sensors. Overall, the talk provides an overview of the status and plans of CMOS pixel sensors at the frontier of their achievements and outreach. (author)

  8. Study of the spatial resolution for binary readout detectors

    Energy Technology Data Exchange (ETDEWEB)

    Yonamine, R., E-mail: ryo.yonamine@ulb.ac.be; Maerschalk, T.; Lentdecker, G. De

    2016-07-11

    Often the binary readout is proposed for high granularity detectors to reduce the generated data volume to be readout at the price of a somewhat reduced spatial resolution compared to an analogue readout. We have been studying single hit resolutions obtained with a binary readout using simulations as well as analytical approaches. In this note we show that the detector geometry could be optimized to offer an equivalent spatial resolution than with an analogue readout.

  9. Monolithic pixel development in TowerJazz 180 nm CMOS for the outer pixel layers in the ATLAS experiment

    Science.gov (United States)

    Berdalovic, I.; Bates, R.; Buttar, C.; Cardella, R.; Egidos Plaja, N.; Hemperek, T.; Hiti, B.; van Hoorne, J. W.; Kugathasan, T.; Mandic, I.; Maneuski, D.; Marin Tobon, C. A.; Moustakas, K.; Musa, L.; Pernegger, H.; Riedler, P.; Riegel, C.; Schaefer, D.; Schioppa, E. J.; Sharma, A.; Snoeys, W.; Solans Sanchez, C.; Wang, T.; Wermes, N.

    2018-01-01

    The upgrade of the ATLAS tracking detector (ITk) for the High-Luminosity Large Hadron Collider at CERN requires the development of novel radiation hard silicon sensor technologies. Latest developments in CMOS sensor processing offer the possibility of combining high-resistivity substrates with on-chip high-voltage biasing to achieve a large depleted active sensor volume. We have characterised depleted monolithic active pixel sensors (DMAPS), which were produced in a novel modified imaging process implemented in the TowerJazz 180 nm CMOS process in the framework of the monolithic sensor development for the ALICE experiment. Sensors fabricated in this modified process feature full depletion of the sensitive layer, a sensor capacitance of only a few fF and radiation tolerance up to 1015 neq/cm2. This paper summarises the measurements of charge collection properties in beam tests and in the laboratory using radioactive sources and edge TCT. The results of these measurements show significantly improved radiation hardness obtained for sensors manufactured using the modified process. This has opened the way to the design of two large scale demonstrators for the ATLAS ITk. To achieve a design compatible with the requirements of the outer pixel layers of the tracker, a charge sensitive front-end taking 500 nA from a 1.8 V supply is combined with a fast digital readout architecture. The low-power front-end with a 25 ns time resolution exploits the low sensor capacitance to reduce noise and analogue power, while the implemented readout architectures minimise power by reducing the digital activity.

  10. A monolithic pixel sensor (TRAPPISTe-2) for particle physics instrumentation in OKI 0.2μm SOI technology

    Science.gov (United States)

    Soung Yee, L.; Alvarez, P.; Martin, E.; Cortina, E.; Ferrer, C.

    2012-12-01

    A monolithic active pixel sensor for charged particle tracking has been developed within the frame of a research and development project called TRAPPISTe (Tracking Particles for Physics Instrumentation in SOI Technology). TRAPPISTe aims to study the feasibility of developing a monolithic pixel sensor with SOI technology. TRAPPISTe-2 is the second prototype in this series and was fabricated with an OKI 0.20μm fully depleted (FD-SOI) CMOS process. This device contains test transistors and amplifiers, as well as two pixel matrices with integrated 3-transistor and amplifier readout electronics. The results presented are based on the first electrical measurements performed on the test structures and laser measurements on the pixel matrices.

  11. Katherine: Ethernet Embedded Readout Interface for Timepix3

    Science.gov (United States)

    Burian, P.; Broulím, P.; Jára, M.; Georgiev, V.; Bergmann, B.

    2017-11-01

    The Timepix3—the latest generation of hybrid particle pixel detectors of Medipix family—yields a lot of new possibilities, i.e. a high hit-rate, a time resolution of 1.56 ns, event data-driven readout mode, and the capability of measuring the Time-over-Threshold (ToT - energy) and the Time-of-Arrival (ToA) simultaneously. This paper introduces a newly developed readout device for the Timepix3, called "Katherine", featuring a Gigabit Ethernet interface. The primary benefit of the Katherine is the operation of Timepix3 at long distance (up to 100 m) from computer or server, which is advantageous for the installation at beam lines, where the access is difficult or where radiation levels are too high for human interventions. The maximal hit-rate is limited by the bandwidth of the Ethernet connection (peer-to-peer connection; up to 16 Mhit/s). Since the Katherine interface is equipped with a processor of high computational power (ARM Cortex-A9 dual-core processor), it permits the use as a stand-alone (autonomous) radiation detector. The key features of the device are described in detail. These are the implemented high voltage power supply offering both polarities of bias voltage (up to ± 300 V), the automatic data sending to a sever via SSH, the automatic compensation of ToA values from columns with shifted matrix clock, etc. A dedicated control software was developed, which can be used for the detector preparation (sensor equalization, the DACs dependency scan, and the THL scan) and measurement control. Measured energy spectra from photon fields are shown.

  12. Radiation induced effects in the \\\\ATLAS Insertable B-Layer readout chip

    CERN Document Server

    The ATLAS collaboration

    2017-01-01

    The ATLAS Insertable B-Layer is the innermost pixel barrel layer of the ATLAS detector installed in 2014. During the first year of $pp$ collisions at $\\sqrt{s} = 13~{\\rm TeV}$ in 2015, an unusual increase was observed in the low voltage currents of the readout chips. This increase was found to be due to radiation damage to the chips. The dependence of the current on the total ionising dose and temperature has been studied using X-ray and proton beam sources, and will be presented in this note together with its possible parametrisation and operation guidelines for the detector.

  13. Front-end Intelligence for triggering and local track recognition in Gas Pixel Detectors

    CERN Document Server

    Hessey, NP; The ATLAS collaboration; van der Graaf, H; Vermeulen, J; Jansweijer, P; Romaniouk, A

    2012-01-01

    The combination of gaseous detectors with pixel readout chips gives unprecedented hit resolution (improving from O(100 um) for wire chambers to 10 um), as well as high-rate capability, low radiation length and giving in addition angular information on the local track. These devices measure individually every electron liberated by the passage of a charged particle, leading to a large quantity of data to be read out. Typically an external trigger is used to start the read-out. We are investigating the addition of local intelligence to the pixel read-out chip. A first level of processing detects the passage of a particle through the gas volume, and accurately determines the time of passage. A second level measures in an approximate but fast way the tilt-angle of the track. This can be used to trigger a third stage in which all hits associated to the track are processed locally to give a least-squares-fit to the track. The chip can then send out just the fitted track parameters instead of the individual electron ...

  14. Development of Fast and High Precision CMOS Pixel Sensors for an ILC Vertex Detector

    CERN Document Server

    Hu-Guo, Christine

    2010-01-01

    The development of CMOS pixel sensors with column parallel read-out and integrated zero-suppression has resulted in a full size, nearly 1 Megapixel, prototype with ~100 \\mu s read-out time. Its performances are quite close to the ILD vertex detector specifications, showing that the sensor architecture can presumably be evolved to meet these specifications exactly. Starting from the existing architecture and achieved performances, the paper will expose the details of how the sensor will be evolved in the coming 2-3 years in perspective of the ILD Detector Baseline Document, to be delivered in 2012. Two different devices are foreseen for this objective, one being optimized for the inner layers and their fast read-out requirement, while the other exploits the dimmed background in the outer layers to reduce the power consumption. The sensor evolution relies on a high resistivity epitaxial layer, on the use of an advanced CMOS process and on the combination of column-level ADCs with a pixel array. The paper will p...

  15. Construction and commissioning of the Phase 1 upgrade of the CMS pixel detector

    CERN Document Server

    Bartek, Rachel

    2017-01-01

    The Phase 1 upgrade of the CMS pixel detector, installed by the CMS collaboration during the recent extended end-of-year technical stop, is built out of four barrel layers (BPIX) and three forward disks in each endcap (FPIX). It comprises a total of 124M pixel channels, in 1,856 modules and it is designed to withstand instantaneous luminosities of up to $2 \\rm{x} 10^{34} \\rm{cm}^{-2} \\rm{s}^{-1}$ with increased detector acceptance and additional redundancy for the tracking, while at the same time reducing the material budget. These goals are achieved using a new readout chip and modified powering and readout schemes, one additional tracking layer both in the barrel and in the disks, and new detector supports including a $\\rm{CO}_2$ based evaporative cooling system. Different parts of the detector have been assembled over the last year and later brought to CERN for installation inside the CMS tracker. At various stages during the assembly tests have been performed to ensure that the readout and power electro...

  16. Merlin: a fast versatile readout system for Medipix3

    International Nuclear Information System (INIS)

    Plackett, R; Horswell, I; Gimenez, E N; Marchal, J; Omar, D; Tartoni, N

    2013-01-01

    This contribution reports on the development of a new high rate readout system for the Medipix3 hybrid pixel ASIC developed by the Detector Group at Diamond Light Source. It details the current functionality of the system and initial results from tests on Diamond's B16 beamline. The Merlin system is based on a National Instruments PXI/FlexRIO system running a Xilinx Virtex5 FPGA. It is capable of recording Medipix3 256 by 256 by 12 bit data frames at over 1 kHz in bursts of 1200 frames and running at over 100 Hz continuously to disk or over a TCP/IP link. It is compatible with the standard Medipix3 single chipboards developed at CERN and is capable of driving them over cable lengths of up to 10 m depending on the data rate required. In addition to a standalone graphical interface, a system of remote TCP/IP control and data transfer has been developed to allow easy integration with third party control systems and scripting languages. Two Merlin systems are being deployed on the B16 and I16 beamlines at Diamond and the system has been integrated with the EPICS/GDA control systems used. Results from trigger synchronisation, fast burst and high rate tests made on B16 in March are reported and demonstrate an encouraging reliability and timing accuracy. In addition to normal high resolution imaging applications of Medipix3, the results indicate the system could profitably be used in 'pump and probe' style experiments, where a very accurate, high frame rate is especially beneficial. In addition to these two systems, Merlin is being used by the Detector Group to test the Excalibur 16 chip hybrid modules, and by the LHCb VELO Pixel Upgrade group in their forthcoming testbeams. Additionally the contribution looks forward to further developments and improvements in the system, including full rate quad chip readout capability, multi-FPGA support, long distance optical communication and further functionality enhancements built on the capabilities of the Medipix3 chips.

  17. Merlin: a fast versatile readout system for Medipix3

    Science.gov (United States)

    Plackett, R.; Horswell, I.; Gimenez, E. N.; Marchal, J.; Omar, D.; Tartoni, N.

    2013-01-01

    This contribution reports on the development of a new high rate readout system for the Medipix3 hybrid pixel ASIC developed by the Detector Group at Diamond Light Source. It details the current functionality of the system and initial results from tests on Diamond's B16 beamline. The Merlin system is based on a National Instruments PXI/FlexRIO system running a Xilinx Virtex5 FPGA. It is capable of recording Medipix3 256 by 256 by 12 bit data frames at over 1 kHz in bursts of 1200 frames and running at over 100 Hz continuously to disk or over a TCP/IP link. It is compatible with the standard Medipix3 single chipboards developed at CERN and is capable of driving them over cable lengths of up to 10 m depending on the data rate required. In addition to a standalone graphical interface, a system of remote TCP/IP control and data transfer has been developed to allow easy integration with third party control systems and scripting languages. Two Merlin systems are being deployed on the B16 and I16 beamlines at Diamond and the system has been integrated with the EPICS/GDA control systems used. Results from trigger synchronisation, fast burst and high rate tests made on B16 in March are reported and demonstrate an encouraging reliability and timing accuracy. In addition to normal high resolution imaging applications of Medipix3, the results indicate the system could profitably be used in `pump and probe' style experiments, where a very accurate, high frame rate is especially beneficial. In addition to these two systems, Merlin is being used by the Detector Group to test the Excalibur 16 chip hybrid modules, and by the LHCb VELO Pixel Upgrade group in their forthcoming testbeams. Additionally the contribution looks forward to further developments and improvements in the system, including full rate quad chip readout capability, multi-FPGA support, long distance optical communication and further functionality enhancements built on the capabilities of the Medipix3 chips.

  18. LHCb: Fast Readout Control for the upgraded readout architecture of the LHCb experiment at CERN

    CERN Multimedia

    Alessio, F

    2013-01-01

    The LHCb experiment at CERN has proposed an upgrade towards a full 40 MHz readout system in order to run between five and ten times its initial design luminosity with an upgraded LHCb detector. As a consequence, the various LHCb sub-systems in the readout architecture will be upgraded to cope with higher sub-detector occupancies, higher rate, and higher readout load. The new architecture, new functionalities, and the first hardware implementation of a new LHCb Readout Control system (commonly referred to as S-TFC) for the upgraded LHCb experiment is here presented. Our attention is focused in describing solutions for the distribution of clock and timing information to control the entire upgraded readout architecture by profiting of a bidirectional optical network and powerful FPGAs, including a real-time mechanism to synchronize the entire system. Solutions and implementations are presented, together with first results on the simulation and the validation of the system.

  19. [Evaluation of Image Quality of Readout Segmented EPI with Readout Partial Fourier Technique].

    Science.gov (United States)

    Yoshimura, Yuuki; Suzuki, Daisuke; Miyahara, Kanae

    Readout segmented EPI (readout segmentation of long variable echo-trains: RESOLVE) segmented k-space in the readout direction. By using the partial Fourier method in the readout direction, the imaging time was shortened. However, the influence on image quality due to insufficient data sampling is concerned. The setting of the partial Fourier method in the readout direction in each segment was changed. Then, we examined signal-to-noise ratio (SNR), contrast-to-noise ratio (CNR), and distortion ratio for changes in image quality due to differences in data sampling. As the number of sampling segments decreased, SNR and CNR showed a low value. In addition, the distortion ratio did not change. The image quality of minimum sampling segments is greatly different from full data sampling, and caution is required when using it.

  20. Three-dimensional cross point readout detector design for including depth information

    Science.gov (United States)

    Lee, Seung-Jae; Baek, Cheol-Ha

    2018-04-01

    We designed a depth-encoding positron emission tomography (PET) detector using a cross point readout method with wavelength-shifting (WLS) fibers. To evaluate the characteristics of the novel detector module and the PET system, we used the DETECT2000 to perform optical photon transport in the crystal array. The GATE was also used. The detector module is made up of four layers of scintillator arrays, the five layers of WLS fiber arrays, and two sensor arrays. The WLS fiber arrays in each layer cross each other to transport light to each sensor array. The two sensor arrays are coupled to the forward and left sides of the WLS fiber array, respectively. The identification of three-dimensional pixels was determined using a digital positioning algorithm. All pixels were well decoded, with the system resolution ranging from 2.11 mm to 2.29 mm at full width at half maximum (FWHM).

  1. Optical readout of a triple-GEM detector by means of a CMOS sensor

    Energy Technology Data Exchange (ETDEWEB)

    Marafini, M. [INFN Sezione di Roma (Italy); Museo Storico della Fisica e Centro Studi e Ricerche “E. Fermi”, Roma (Italy); Patera, V. [INFN Sezione di Roma (Italy); Museo Storico della Fisica e Centro Studi e Ricerche “E. Fermi”, Roma (Italy); Laboratori Nazionali di Frascati dell' INFN, Frascati (Italy); Pinci, D., E-mail: davide.pinci@roma1.infn.it [INFN Sezione di Roma (Italy); Sarti, A. [Laboratori Nazionali di Frascati dell' INFN, Frascati (Italy); Dipartimento di Scienze di Base e Applicate per Ingegneria, Sapienza Università di Roma (Italy); Sciubba, A. [INFN Sezione di Roma (Italy); Museo Storico della Fisica e Centro Studi e Ricerche “E. Fermi”, Roma (Italy); Dipartimento di Scienze di Base e Applicate per Ingegneria, Sapienza Università di Roma (Italy); Spiriti, E. [Laboratori Nazionali di Frascati dell' INFN, Frascati (Italy)

    2016-07-11

    In last years, the development of optical sensors has produced objects able to provide very interesting performance. Large granularity is offered along with a very high sensitivity. CMOS sensors with millions of pixels able to detect as few as two or three photons per pixel are commercially available and can be used to read-out the optical signals provided by tracking particle detectors. In this work the results obtained by optically reading-out a triple-GEM detector by a commercial CMOS sensor will be presented. A standard detector was assembled with a transparent window below the third GEM allowing the light to get out. The detector is supplied with an Ar/CF{sub 4} based gas mixture producing 650 nm wavelength photons matching the maximum quantum efficiency of the sensor.

  2. Pixelated transmission-mode diamond X-ray detector.

    Science.gov (United States)

    Zhou, Tianyi; Ding, Wenxiang; Gaowei, Mengjia; De Geronimo, Gianluigi; Bohon, Jen; Smedley, John; Muller, Erik

    2015-11-01

    Fabrication and testing of a prototype transmission-mode pixelated diamond X-ray detector (pitch size 60-100 µm), designed to simultaneously measure the flux, position and morphology of an X-ray beam in real time, are described. The pixel density is achieved by lithographically patterning vertical stripes on the front and horizontal stripes on the back of an electronic-grade chemical vapor deposition single-crystal diamond. The bias is rotated through the back horizontal stripes and the current is read out on the front vertical stripes at a rate of ∼ 1 kHz, which leads to an image sampling rate of ∼ 30 Hz. This novel signal readout scheme was tested at beamline X28C at the National Synchrotron Light Source (white beam, 5-15 keV) and at beamline G3 at the Cornell High Energy Synchrotron Source (monochromatic beam, 11.3 keV) with incident beam flux ranges from 1.8 × 10(-2) to 90 W mm(-2). Test results show that the novel detector provides precise beam position (positional noise within 1%) and morphology information (error within 2%), with an additional software-controlled single channel mode providing accurate flux measurement (fluctuation within 1%).

  3. The Phase II ATLAS Pixel Upgrade: The Inner Tracker (ITk)

    CERN Document Server

    Flick, Tobias; The ATLAS collaboration

    2016-01-01

    The entire tracking system of the ATLAS experiment will be replaced during the LHC Phase II shutdown (foreseen to take place around 2025) by an all-silicon detector called the ITk (Inner Tracker). The pixel detector will comprise the five innermost layers, and will be instrumented with new sensor and readout electronics technologies to improve the tracking performance and cope with the HL-LHC environment, which will be severe in terms of occupancy and radiation. The total surface area of silicon in the new pixel system could measure up to 14 m^2, depending on the final layout choice, which is expected to take place in early 2017. Four layout options are being investigated at the moment, two with forward coverage to eta < 3.2 and two to eta < 4. For each coverage option, a layout with long barrel staves and a layout with novel inclined support structures in the barrel-endcap overlap region are considered. All potential layouts include modules mounted on ring-shaped supports in the endcap regions. Support...

  4. Novel micropixel avalanche photodiodes (MAPD) with super high pixel density

    International Nuclear Information System (INIS)

    Anfimov, N.; Chirikov-Zorin, I.; Dovlatov, A.; Gavrishchuk, O.; Guskov, A.; Khovanskiy, N.; Krumshtein, Z.; Leitner, R.; Meshcheryakov, G.; Nagaytsev, A.; Olchevski, A.; Rezinko, T.; Sadovskiy, A.; Sadygov, Z.; Savin, I.; Tchalyshev, V.; Tyapkin, I.; Yarygin, G.; Zerrouk, F.

    2011-01-01

    In many detectors based on scintillators the photomultiplier tubes (PMTs) are used as photodetectors. At present photodiodes are finding wide application. Solid state photodetectors allow operation in strong magnetic fields that are often present in applications, e.g. some calorimeters operating near magnets, combined PET and MRT, etc. The photon detection efficiency (PDE) of photodiodes may reach values a few times higher than that of PMTs. Also, they are rigid, compact and have relatively low operating voltage. In the last few years Micropixel Avalanche PhotoDiodes (MAPD) have been developed and started to be used. The MAPD combines a lot of advantages of semiconductor photodetectors and has a high gain, which is close to that of the PMT. Yet, they have some disadvantages, and one of them is a limited dynamic range that corresponds to a total number of pixels. The novel deep microwell MAPD with high pixel density produced by the Zecotek Company partially avoids this disadvantage. In this paper characteristics of these photodetectors are presented in comparison with the PMT characteristics. The results refer to measurements of the gain, PDE, cross-talks, photon counting and applications: beam test results of two different 'Shashlyk' EM calorimeters for COMPASS (CERN) and NICA-MPD (JINR) with the MAPD readout and a possibility of using the MAPD in PET.

  5. The Phase-II ATLAS ITk Pixel Upgrade

    CERN Document Server

    AUTHOR|(INSPIRE)INSPIRE-00349918; The ATLAS collaboration

    2017-01-01

    The entire tracking system of the ATLAS experiment will be replaced during the LHC Phase~2 shutdown (foreseen to take place around 2025) by an all-silicon detector called the ``ITk'' (Inner Tracker). The innermost portion of ITk will consist of a pixel detector with five layers in the barrel region and ring-shaped supports in the end-cap regions. It will be instrumented with new sensor and readout electronics technologies to improve the tracking performance and cope with the HL-LHC environment, which will be severe in terms of occupancy and radiation levels. The new pixel system could include up to 14 $\\mathrm{m^2}$ of silicon, depending on the final layout, which is expected to be decided in 2017. Several layout options are being investigated at the moment, including some with novel inclined support structures in the barrel end-cap overlap region and others with very long innermost barrel layers. Forward coverage could be as high as |eta| $<4$. Supporting structures will be based on low mass, highly stabl...

  6. Tests of the gated mode for Belle II pixel detector

    Energy Technology Data Exchange (ETDEWEB)

    Prinker, Eduard [Max-Planck-Institute for Physics, Munich (Germany); Collaboration: Belle II-Collaboration

    2015-07-01

    DEPFET pixel detectors offer intrinsic amplification and very high signal to noise ratio. They form an integral building block for the vertex detector system of the Belle II experiment, which will start data taking in the year 2017 at the SuperKEKB Collider in Japan. A special Test board (Hybrid4) is used, which contains a small version of the DEPFET sensor with a read-out (DCD) and a steering chip (Switcher) attached, both controlled by a field-programmable gate array (FPGA) as the central interface to the computer. In order to keep the luminosity of the collider constant over time, the particle bunch currents have to be topped off by injecting additional bunches at a rate of 50 Hz. The particles in the daughter bunches produce a high rate of background (noisy bunches) for a short period of time, saturating the occupancy of the sensor. Operating the DEPFET sensor in a Gated Mode allows preserving the signals from collisions of normal bunches while protecting the pixels from background signals of the passing noisy bunches. An overview of the Gated Mode and first results is presented.

  7. Novel micropixel avalanche photodiodes (MAPD) with superhigh pixel density

    International Nuclear Information System (INIS)

    Anfimov, N.; Chirikov-Zorin, I.; Dovlatov, A.

    2010-01-01

    In many detectors based on scintillators the photomultiplier tubes (PMTs) are used as photodetectors. At present photodiodes are finding wide application. Solid state photodetectors allow operation in strong magnetic fields that are often present in applications, e.g., some calorimeters operating near magnets, combined PET and MRT, etc. The photon detection efficiency (PDE) of photodiodes may reach values a few times higher than that of PMTs. Also, they are rigid, compact and have relatively low operating voltage. In the last few years Micropixel Avalanche PhotoDiodes (MAPDs) have been developed and started to be used. The MAPD combines a lot of advantages of semiconductor photodetectors and has a high gain, which is close to that of the PMT. Yet, they have some disadvantages, and one of them is a limited dynamic range that corresponds to a total number of pixels. The novel deep microwell MAPD with high pixel density produced by Zecotek Company partially avoids this disadvantage. In this paper characteristics of these photodetectors are presented in comparison with the PMT characteristics. The results refer to measurements of the gain, PDE, cross-talks, photon counting and applications: beam test results of two different 'Shashlyk' EM calorimeters for COMPASS (CERN) and NICA-MPD (JINR) with the MAPD readout and a possibility of using the MAPD in PET

  8. The FPGA Pixel Array Detector

    International Nuclear Information System (INIS)

    Hromalik, Marianne S.; Green, Katherine S.; Philipp, Hugh T.; Tate, Mark W.; Gruner, Sol M.

    2013-01-01

    A proposed design for a reconfigurable x-ray Pixel Array Detector (PAD) is described. It operates by integrating a high-end commercial field programmable gate array (FPGA) into a 3-layer device along with a high-resistivity diode detection layer and a custom, application-specific integrated circuit (ASIC) layer. The ASIC layer contains an energy-discriminating photon-counting front end with photon hits streamed directly to the FPGA via a massively parallel, high-speed data connection. FPGA resources can be allocated to perform user defined tasks on the pixel data streams, including the implementation of a direct time autocorrelation function (ACF) with time resolution down to 100 ns. Using the FPGA at the front end to calculate the ACF reduces the required data transfer rate by several orders of magnitude when compared to a fast framing detector. The FPGA-ASIC high-speed interface, as well as the in-FPGA implementation of a real-time ACF for x-ray photon correlation spectroscopy experiments has been designed and simulated. A 16×16 pixel prototype of the ASIC has been fabricated and is being tested. -- Highlights: ► We describe the novelty and need for the FPGA Pixel Array Detector. ► We describe the specifications and design of the Diode, ASIC and FPGA layers. ► We highlight the Autocorrelation Function (ACF) for speckle as an example application. ► Simulated FPGA output calculates the ACF for different input bitstreams to 100 ns. ► Reduced data transfer rate by 640× and sped up real-time ACF by 100× other methods.

  9. The upgraded Pixel Detector of the ATLAS Experiment for Run-II at the Large Hadron Collider

    CERN Document Server

    AUTHOR|(INSPIRE)INSPIRE-00407702

    2016-01-01

    The Pixel Detector of the ATLAS experiment has shown excellent performance during the whole Run-1 of the LHC. Taking advantage of the detector development period 2013 – 2014, the detector was extracted from the experiment and brought to surface to equip it with new service panels and to repair modules furthermore this helped with the installation of the Insertable B-Layer (IBL), fourth layer of pixel, installed in between the existing Pixel Detector and a new beam-pipe at a radius of 3.3 cm. To cope with the high radiation and increased pixel occupancy due to the proximity to the interaction point, two different silicon sensor technologies (planar and 3D) have been used. A new readout chip has been designed with CMOS 130nm technology with larger area, smaller pixel size and faster readout capability. Dedicated design features in combination with a new composite material were considered and used in order to reduce the material budget of the support structure while keeping the optimal thermo-mechanical perfor...

  10. Low complexity pixel-based halftone detection

    Science.gov (United States)

    Ok, Jiheon; Han, Seong Wook; Jarno, Mielikainen; Lee, Chulhee

    2011-10-01

    With the rapid advances of the internet and other multimedia technologies, the digital document market has been growing steadily. Since most digital images use halftone technologies, quality degradation occurs when one tries to scan and reprint them. Therefore, it is necessary to extract the halftone areas to produce high quality printing. In this paper, we propose a low complexity pixel-based halftone detection algorithm. For each pixel, we considered a surrounding block. If the block contained any flat background regions, text, thin lines, or continuous or non-homogeneous regions, the pixel was classified as a non-halftone pixel. After excluding those non-halftone pixels, the remaining pixels were considered to be halftone pixels. Finally, documents were classified as pictures or photo documents by calculating the halftone pixel ratio. The proposed algorithm proved to be memory-efficient and required low computation costs. The proposed algorithm was easily implemented using GPU.

  11. First generation of deep n-well CMOS MAPS with in-pixel sparsification for the ILC vertex detector

    International Nuclear Information System (INIS)

    Traversi, Gianluca; Bulgheroni, Antonio; Caccia, Massimo; Jastrzab, Marcin; Manghisoni, Massimo; Pozzati, Enrico; Ratti, Lodovico; Re, Valerio

    2009-01-01

    In this paper we present the characterization results relevant to a deep n-well (DNW) CMOS active pixel sensor chip designed for vertexing applications at the International Linear Collider. In this chip, named sparsified digital readout (SDR0), for the first time we implemented a sparsification logic at the pixel level. The DNW available in deep submicron CMOS processes is used to collect the charge released in the substrate, and signal processing is performed by a classical optimum amplifying stage for capacitive detectors. In this work, the experimental characterization of the SDR0 chip, including data from radioactive source ( 55 Fe) tests, will be presented.

  12. Chip development in 65 nm CMOS technology for the high luminosity upgrade of the ATLAS pixel detector

    Energy Technology Data Exchange (ETDEWEB)

    Germic, Leonard; Hemperek, Tomasz; Kishishita, Tetsuichi; Krueger, Hans; Rymaszewski, Piotr; Wermes, Norbert [University of Bonn, Bonn (Germany)

    2016-07-01

    The LHC High Luminosity upgrade will result in a significant change of environment in which particle detectors are going to operate, especially for devices very close to the interaction point like pixel detector electronics. Challenges arising from the increased hit rate will have to be solved by designing faster and more complex readout electronics that will also have to withstand unprecedented radiation doses. Developing such integrated circuit requires a significant R and D effort and resources, therefore a joint development project between several institutes (including ours) was started. This collaboration, named RD53, aims to develop a pixel readout chip suitable for ATLAS' and CMS' upgrades using a 65nm CMOS technology. During this presentation motivations and benefits of using this very deep-submicron technology are discussed. Most of the talk is allocated to presenting some of the circuits designed by our group (focusing on developments connected to RD53 collaboration), along with their performance measurement results.

  13. Mapping Electrical Crosstalk in Pixelated Sensor Arrays

    Science.gov (United States)

    Seshadri, Suresh (Inventor); Cole, David (Inventor); Smith, Roger M. (Inventor); Hancock, Bruce R. (Inventor)

    2017-01-01

    The effects of inter pixel capacitance in a pixilated array may be measured by first resetting all pixels in the array to a first voltage, where a first image is read out, followed by resetting only a subset of pixels in the array to a second voltage, where a second image is read out, where the difference in the first and second images provide information about the inter pixel capacitance. Other embodiments are described and claimed.

  14. Operational Experience with the ATLAS Pixel Detector

    CERN Document Server

    Djama, Fares; The ATLAS collaboration

    2017-01-01

    Run 2 of the LHC collider sets new challenges to track and vertex reconstruction because of its higher energy, pileup and luminosity. The ATLAS tracking performance relies critically on the Pixel Detector. Therefore, in view of Run 2, the ATLAS collaboration has constructed the first 4-layer pixel detector in Particle Physics by installing a new pixel layer, called Insertable B-Layer (IBL). Operational experience and performance of the 4-layer Pixel Detector during Run 2 are presented.

  15. CMS has a heart of pixels

    CERN Multimedia

    2003-01-01

    In the immediate vicinity of the collision point, CMS will be equipped with pixel detectors consisting of no fewer than 50 million pixels measuring 150 microns along each side. Each of the pixels, which receive the signal, is connected to its own electronic circuit by a tiny sphere (seen here in the electron microscope image) measuring 15 to 20 microns in diameter.

  16. Charge amplitude distribution of the Gossip gaseous pixel detector

    Energy Technology Data Exchange (ETDEWEB)

    Blanco Carballo, V.M. [Twente University, Enschede (Netherlands); Chefdeville, M. [NIKHEF, P.B. 41882, 1009DB Amsterdam (Netherlands); Colas, P.; Giomataris, Y. [Saclay, Gif-sur-Yvette (France); Graaf, H. van der; Gromov, V. [NIKHEF, P.B. 41882, 1009DB Amsterdam (Netherlands); Hartjes, F. [NIKHEF, P.B. 41882, 1009DB Amsterdam (Netherlands)], E-mail: F.Hartjes@nikhef.nl; Kluit, R.; Koffeman, E. [NIKHEF, P.B. 41882, 1009DB Amsterdam (Netherlands); Salm, C.; Schmitz, J.; Smits, S.M. [Twente University, Enschede (Netherlands); Timmermans, J.; Visschers, J.L. [NIKHEF, P.B. 41882, 1009DB Amsterdam (Netherlands)

    2007-12-11

    The Gossip gaseous pixel detector is being developed for the detection of charged particles in extreme high radiation environments as foreseen close to the interaction point of the proposed super LHC. The detecting medium is a thin layer of gas. Because of the low density of this medium, only a few primary electron/ion pairs are created by the traversing particle. To get a detectable signal, the electrons drift towards a perforated metal foil (Micromegas) whereafter they are multiplied in a gas avalanche to provide a detectable signal. The gas avalanche occurs in the high field between the Micromegas and the pixel readout chip (ROC). Compared to a silicon pixel detector, Gossip features a low material budget and a low cooling power. An experiment using X-rays has indicated a possible high radiation tolerance exceeding 10{sup 16} hadrons/cm{sup 2}. The amplified charge signal has a broad amplitude distribution due to the limited statistics of the primary ionization and the statistical variation of the gas amplification. Therefore, some degree of inefficiency is inevitable. This study presents experimental results on the charge amplitude distribution for CO{sub 2}/DME (dimethyl-ether) and Ar/iC{sub 4}H{sub 10} mixtures. The measured curves were fitted with the outcome of a theoretical model. In the model, the physical Landau distribution is approximated by a Poisson distribution that is convoluted with the variation of the gas gain and the electronic noise. The value for the fraction of pedestal events is used for a direct calculation of the cluster density. For some gases, the measured cluster density is considerably lower than given in literature.

  17. Charge amplitude distribution of the Gossip gaseous pixel detector

    Science.gov (United States)

    Blanco Carballo, V. M.; Chefdeville, M.; Colas, P.; Giomataris, Y.; van der Graaf, H.; Gromov, V.; Hartjes, F.; Kluit, R.; Koffeman, E.; Salm, C.; Schmitz, J.; Smits, S. M.; Timmermans, J.; Visschers, J. L.

    2007-12-01

    The Gossip gaseous pixel detector is being developed for the detection of charged particles in extreme high radiation environments as foreseen close to the interaction point of the proposed super LHC. The detecting medium is a thin layer of gas. Because of the low density of this medium, only a few primary electron/ion pairs are created by the traversing particle. To get a detectable signal, the electrons drift towards a perforated metal foil (Micromegas) whereafter they are multiplied in a gas avalanche to provide a detectable signal. The gas avalanche occurs in the high field between the Micromegas and the pixel readout chip (ROC). Compared to a silicon pixel detector, Gossip features a low material budget and a low cooling power. An experiment using X-rays has indicated a possible high radiation tolerance exceeding 10 16 hadrons/cm 2. The amplified charge signal has a broad amplitude distribution due to the limited statistics of the primary ionization and the statistical variation of the gas amplification. Therefore, some degree of inefficiency is inevitable. This study presents experimental results on the charge amplitude distribution for CO 2/DME (dimethyl-ether) and Ar/iC 4H 10 mixtures. The measured curves were fitted with the outcome of a theoretical model. In the model, the physical Landau distribution is approximated by a Poisson distribution that is convoluted with the variation of the gas gain and the electronic noise. The value for the fraction of pedestal events is used for a direct calculation of the cluster density. For some gases, the measured cluster density is considerably lower than given in literature.

  18. Charge amplitude distribution of the Gossip gaseous pixel detector

    International Nuclear Information System (INIS)

    Blanco Carballo, V.M.; Chefdeville, M.; Colas, P.; Giomataris, Y.; Graaf, H. van der; Gromov, V.; Hartjes, F.; Kluit, R.; Koffeman, E.; Salm, C.; Schmitz, J.; Smits, S.M.; Timmermans, J.; Visschers, J.L.

    2007-01-01

    The Gossip gaseous pixel detector is being developed for the detection of charged particles in extreme high radiation environments as foreseen close to the interaction point of the proposed super LHC. The detecting medium is a thin layer of gas. Because of the low density of this medium, only a few primary electron/ion pairs are created by the traversing particle. To get a detectable signal, the electrons drift towards a perforated metal foil (Micromegas) whereafter they are multiplied in a gas avalanche to provide a detectable signal. The gas avalanche occurs in the high field between the Micromegas and the pixel readout chip (ROC). Compared to a silicon pixel detector, Gossip features a low material budget and a low cooling power. An experiment using X-rays has indicated a possible high radiation tolerance exceeding 10 16 hadrons/cm 2 . The amplified charge signal has a broad amplitude distribution due to the limited statistics of the primary ionization and the statistical variation of the gas amplification. Therefore, some degree of inefficiency is inevitable. This study presents experimental results on the charge amplitude distribution for CO 2 /DME (dimethyl-ether) and Ar/iC 4 H 10 mixtures. The measured curves were fitted with the outcome of a theoretical model. In the model, the physical Landau distribution is approximated by a Poisson distribution that is convoluted with the variation of the gas gain and the electronic noise. The value for the fraction of pedestal events is used for a direct calculation of the cluster density. For some gases, the measured cluster density is considerably lower than given in literature

  19. New generation of monolithic active pixel sensors for charged particle detection

    International Nuclear Information System (INIS)

    Deptuch, G.

    2002-09-01

    Vertex detectors are of great importance in particle physics experiments, as the knowledge of the event flavour is becoming an issue for the physics programme at Future Linear Colliders. Monolithic Active Pixel Sensors (MAPS) based on a novel detector structure have been proposed. Their fabrication is compatible with a standard CMOS process. The sensor is inseparable from the readout electronics, since both of them are integrated on the same, low-resistivity silicon wafer. The basic pixel configuration comprises only three MOS transistors and a diode collecting the charge through thermal diffusion. The charge is generated in the thin non-depleted epitaxial layer underneath the readout electronics. This approach provides, at low cost, a high resolution and thin device with the whole area sensitive to radiation. Device simulations using the ISE-TCAD package have been carried out to study the charge collection mechanism. In order to demonstrate the viability of the technique, four prototype chips have been fabricated using different submicrometer CMOS processes. The pixel gain has been calibrated using a 55 Fe source and the Poisson sequence method. The prototypes have been exposed to high-energy particle beams at CERN. The tests proved excellent detection performances expressed in a single-track spatial resolution of 1.5 μm and detection efficiency close to 100%, resulting from a SNR ratio of more than 30. Irradiation tests showed immunity of MAPS to a level of a few times 10 12 n/cm 2 and a few hundred kRad of ionising radiation. The ideas for future work, including on-pixel signal amplification, double sampling operation and current mode pixel design are present as well. (author)

  20. High bandwidth pixel detector modules for the ATLAS Insertable B-Layer

    International Nuclear Information System (INIS)

    Backhaus, Malte

    2014-01-01

    The investigation of the nature of the recently discovered electro-weak symmetry breaking mechanism of the standard model of particle physics as well as the search for physics beyond the standard model with the LHC require to collect even more data. To achieve this goal, the luminosity of the LHC will be increased in two steps. The increased luminosity results in serious challenges for the inner tracking systems of the experiments at the LHC. The ATLAS pixel detector will also be upgraded in a two stage program. During the shutdown in 2013 and 2014 a fourth hybrid pixel detector layer, the socalled Insertable B-Layer (IBL) is inserted inside the existing pixel detector. This thesis focuses on the characterization, performance measurement, and production quality assurance of the central sensitive elements of the IBL, the modules. This includes a full characterization of the readout chip (FE-I4) and of the assembled modules. A completely new inner tracking system is mandatory in ATLAS after the second luminosity increase in the shutdown of 2022 and 2023. The final chapter of this thesis introduces a new module concept that uses an industrial high voltage CMOS technology as sensor layer, which is capacitively coupled to the FE-I4 readout chip.

  1. Conception and characterization of a virtual coplanar grid for a 11×11 pixelated CZT detector

    Energy Technology Data Exchange (ETDEWEB)

    Espagnet, Romain; Frezza, Andrea [Department of Physics, Engineering Physics and Optics and Cancer Research Center, Université Laval, Quebec city, QC, Canada G1R 0A6 (Canada); Martin, Jean-Pierre; Hamel, Louis-André [Department of Physics, Université de Montréal, C.P. 6128 Montréal QC, Canada H3C 3J7 (Canada); Després, Philippe, E-mail: philippe.despres@phy.ulaval.ca [Department of Physics, Engineering Physics and Optics and Cancer Research Center, Université Laval, Quebec city, QC, Canada G1R 0A6 (Canada); Department of Radiation Oncology and Research Center of CHU de Québec - Université Laval, Quebec city, QC Canada G1R 2J6 (Canada)

    2017-07-11

    Due to the low mobility of holes in CZT, commercially available detectors with a relatively large volume typically use a pixelated anode structure. They are mostly used in imaging applications and often require a dense electronic readout scheme. These large volume detectors are also interesting for high-sensitivity applications and a CZT-based blood gamma counter was developed from a 20×20×15 mm{sup 3} crystal available commercially and having a 11×11 pixelated readout scheme. A method is proposed here to reduce the number of channels required to use the crystal in a high-sensitivity counting application, dedicated to pharmacokinetic modelling in PET and SPECT. Inspired by a classic coplanar anode, an implementation of a virtual coplanar grid was done by connecting the 121 pixels of the detector to form intercalated bands. The layout, the front-end electronics and the characterization of the detector in this 2-channel anode geometry is presented. The coefficients required to compensate for electron trapping in CZT were determined experimentally to improve the performance. The resulting virtual coplanar detector has an intrinsic efficiency of 34% and an energy resolution of 8% at 662 keV. The detector's response was linear between 80 keV and 1372 keV. This suggests that large CZT crystals offer an excellent alternative to scintillation detectors for some applications, especially those where high-sensitivity and compactness are required.

  2. Imaging achievements with the Vernier readout

    CERN Document Server

    Lapington, J S; Worth, L B C; Tandy, J A

    2002-01-01

    We describe the Vernier anode, a high resolution and charge division image readout for microchannel plate detectors. It comprises a planar structure of insulated electrodes deposited on an insulating substrate. The charge cloud from an event is divided amongst all nine electrodes and the charge ratio uniquely determines the two-dimensional position coordinate of the charge centroid. We discuss the design of the anode pattern and describe the advantages offered by this readout. The cyclic variation of the electrode structure allows the image resolution to exceed the charge measurement resolution and enables the entire active area of the readout to be utilized. In addition, fixed pattern noise is greatly reduced. We present results demonstrating the position resolution and image linearity. A position resolution of 10 mu m FWHM is demonstrated and the overall imaging performance is shown to be limited by the microchannel plate pore spacing. We present measurements of the image distortions and describe techniques...

  3. D-Zero muon readout electronics design

    International Nuclear Information System (INIS)

    Baldin, B.; Hansen, S.; Los, S.; Matveev, M.; Vaniev, V.

    1996-11-01

    The readout electronics designed for the D null Muon Upgrade are described. These electronics serve three detector subsystems and one trigger system. The front-ends and readout hardware are synchronized by means of timing signals broadcast from the D null Trigger Framework. The front-end electronics have continuously running digitizers and two levels of buffering resulting in nearly deadtimeless operation. The raw data is corrected and formatted by 16- bit fixed point DSP processors. These processors also perform control of the data buffering. The data transfer from the front-end electronics located on the detector platform is performed by serial links running at 160 Mbit/s. The design and test results of the subsystem readout electronics and system interface are discussed

  4. Radiation hardness and timing studies of a monolithic TowerJazz pixel design for the new ATLAS Inner Tracker

    OpenAIRE

    Riegel, C; Backhaus, M; Hoorne, J W Van; Kugathasan, T; Musa, L; Pernegger, H; Riedler, P; Schaefer, D; Snoeys, W; Wagner, W

    2017-01-01

    A part of the upcoming HL-LHC upgrade of the ATLAS Detector is the construction of a new Inner Tracker. This upgrade opens new possibilities, but also presents challenges in terms of occupancy and radiation tolerance. For the pixel detector inside the inner tracker, hybrid modules containing passive silicon sensors and connected readout chips are presently used, but require expensive assembly techniques like fine-pitch bump bonding. Silicon devices fabricated in standard commercial CMOS techn...

  5. Analog front-end for pixel sensors in a 3D CMOS technology for the SuperB Layer0

    International Nuclear Information System (INIS)

    Manazza, A.; Gaioni, L.; Re, V.

    2011-01-01

    This work is concerned with the design of two different analog channels for hybrid and monolithic pixels readout in view of applications to the SVT at the SuperB Factory. The circuits have been designed in a 130nm CMOS, vertically integrated technology, which, among others, may provide some advantages in terms of functional density and electrical isolation between the analog and the digital sections of the front-end.

  6. Signal height in silicon pixel detectors irradiated with pions and protons

    International Nuclear Information System (INIS)

    Rohe, T.; Acosta, J.; Bean, A.; Dambach, S.; Erdmann, W.; Langenegger, U.; Martin, C.; Meier, B.; Radicci, V.; Sibille, J.; Trueb, P.

    2010-01-01

    Pixel detectors are used in the innermost part of multi-purpose experiments at the Large Hadron Collider (LHC) and are therefore exposed to the highest fluences of ionising radiation, which in this part of the detectors consists mainly of charged pions. The radiation hardness of the detectors has been tested thoroughly up to the fluences expected at the LHC. In case of an LHC upgrade the fluence will be much higher and it is not yet clear up to which radii the present pixel technology can be used. To establish such a limit, pixel sensors of the size of one CMS pixel readout chip (PSI46V2.1) have been bump bonded and irradiated with positive pions up to 6x10 14 n eq /cm 2 at PSI and with protons up to 5x10 15 n eq /cm 2 . The sensors were taken from production wafers of the CMS barrel pixel detector. They use n-type DOFZ material with a resistance of about 3.7kΩcm and an n-side read out. As the performance of silicon sensors is limited by trapping, the response to a Sr-90 source was investigated. The highly energetic beta-particles represent a good approximation to minimum ionising particles. The bias dependence of the signal for a wide range of fluences will be presented.

  7. A new generation of small pixel pitch/SWaP cooled infrared detectors

    Science.gov (United States)

    Espuno, L.; Pacaud, O.; Reibel, Y.; Rubaldo, L.; Kerlain, A.; Péré-Laperne, N.; Dariel, A.; Roumegoux, J.; Brunner, A.; Kessler, A.; Gravrand, O.; Castelein, P.

    2015-10-01

    Following clear technological trends, the cooled IR detectors market is now in demand for smaller, more efficient and higher performance products. This demand pushes products developments towards constant innovations on detectors, read-out circuits, proximity electronics boards, and coolers. Sofradir was first to show a 10μm focal plane array (FPA) at DSS 2012, and announced the DAPHNIS 10μm product line back in 2014. This pixel pitch is a key enabler for infrared detectors with increased resolution. Sofradir recently achieved outstanding products demonstrations at this pixel pitch, which clearly demonstrate the benefits of adopting 10μm pixel pitch focal plane array-based detectors. Both HD and XGA Daphnis 10μm products also benefit from a global video datapath efficiency improvement by transitioning to digital video interfaces. Moreover, innovative smart pixels functionalities drastically increase product versatility. In addition to this strong push towards a higher pixels density, Sofradir acknowledges the need for smaller and lower power cooled infrared detector. Together with straightforward system interfaces and better overall performances, latest technological advances on SWAP-C (Size, Weight, Power and Cost) Sofradir products enable the advent of a new generation of high performance portable and agile systems (handheld thermal imagers, unmanned aerial vehicles, light gimbals etc...). This paper focuses on those features and performances that can make an actual difference in the field.

  8. First images of a digital autoradiography system based on a Medipix2 hybrid silicon pixel detector.

    Science.gov (United States)

    Mettivier, Giovanni; Montesi, Maria Cristina; Russo, Paolo

    2003-06-21

    We present the first images of beta autoradiography obtained with the high-resolution hybrid pixel detector consisting of the Medipix2 single photon counting read-out chip bump-bonded to a 300 microm thick silicon pixel detector. This room temperature system has 256 x 256 square pixels of 55 microm pitch (total sensitive area of 14 x 14 mm2), with a double threshold discriminator and a 13-bit counter in each pixel. It is read out via a dedicated electronic interface and control software, also developed in the framework of the European Medipix2 Collaboration. Digital beta autoradiograms of 14C microscale standard strips (containing separate bands of increasing specific activity in the range 0.0038-32.9 kBq g(-1)) indicate system linearity down to a total background noise of 1.8 x 10(-3) counts mm(-2) s(-1). The minimum detectable activity is estimated to be 0.012 Bq for 36,000 s exposure and 0.023 Bq for 10,800 s exposure. The measured minimum detection threshold is less than 1600 electrons (equivalent to about 6 keV Si). This real-time system for beta autoradiography offers lower pixel pitch and higher sensitive area than the previous Medipix1-based system. It has a 14C sensitivity better than that of micro channel plate based systems, which, however, shows higher spatial resolution and sensitive area.

  9. Design and Characterization of 64K Pixels Chips Working in Single Photon Processing Mode

    CERN Document Server

    Llopart Cudie, Xavier; Campbell, M

    2007-01-01

    Progress in CMOS technology and in fine pitch bump bonding has made possible the development of high granularity single photon counting detectors for X-ray imaging. This thesis studies the design and characterization of three pulse processing chips with 65536 square pixels of 55 µm x 55 µm designed in a commercial 0.25 µm 6-metal CMOS technology. The 3 chips share the same architecture and dimensions and are named Medipix2, Mpix2MXR20 and Timepix. The Medipix2 chip is a pixel detector readout chip consisting of 256 x 256 identical elements, each working in single photon counting mode for positive or negative input charge signals. The preamplifier feedback provides compensation for detector leakage current on a pixel by pixel basis. Two identical pulse height discriminators are used to define an energy window. Every event falling inside the energy window is counted with a 13 bit pseudo-random counter. The counter logic, based in a shift register, also behaves as the input/output register for the pixel. Each...

  10. Design and characterization of novel monolithic pixel sensors for the ALICE ITS upgrade

    CERN Document Server

    Cavicchioli, C; Giubilato, P; Hillemanns, H; Junique, A; Kugathasan, T; Mager, M; Marin Tobon, C A; Martinengo, P; Mattiazzo, S; Mugnier, H; Musa, L; Pantano, D; Rousset, J; Reidt, F; Riedler, P; Snoeys, W; Van Hoorne, J W; Yang, P

    2014-01-01

    Within the R&D activities for the upgrade of the ALICE Inner Tracking System (ITS), Monolithic Active Pixel Sensors (MAPS) are being developed and studied, due to their lower material budget (~0.3%X0~0.3%X0 in total for each inner layer) and higher granularity (View the MathML source~20μm×20μm pixels) with respect to the present pixel detector. This paper presents the design and characterization results of the Explorer0 chip, manufactured in the TowerJazz 180 nm CMOS Imaging Sensor process, based on a wafer with high-resistivity View the MathML source(ρ>1kΩcm) and 18 μm thick epitaxial layer. The chip is organized in two sub-matrices with different pixel pitches (20 μm and 30 μm), each of them containing several pixel designs. The collection electrode size and shape, as well as the distance between the electrode and the surrounding electronics, are varied; the chip also offers the possibility to decouple the charge integration time from the readout time, and to change the sensor bias. The charge c...

  11. Characterisation of the high dynamic range Large Pixel Detector (LPD) and its use at X-ray free electron laser sources

    Science.gov (United States)

    Veale, M. C.; Adkin, P.; Booker, P.; Coughlan, J.; French, M. J.; Hart, M.; Nicholls, T.; Schneider, A.; Seller, P.; Pape, I.; Sawhney, K.; Carini, G. A.; Hart, P. A.

    2017-12-01

    The STFC Rutherford Appleton Laboratory have delivered the Large Pixel Detector (LPD) for MHz frame rate imaging at the European XFEL. The detector system has an active area of 0.5 m × 0.5 m and consists of a million pixels on a 500 μm pitch. Sensors have been produced from 500 μm thick Hammamatsu silicon tiles that have been bump bonded to the readout ASIC using a silver epoxy and gold stud technique. Each pixel of the detector system is capable of measuring 105 12 keV photons per image readout at 4.5 MHz. In this paper results from the testing of these detectors at the Diamond Light Source and the Linac Coherent Light Source (LCLS) are presented. The performance of the detector in terms of linearity, spatial uniformity and the performance of the different ASIC gain stages is characterised.

  12. Characterisation of the NA62 GigaTracker end of column readout ASIC

    International Nuclear Information System (INIS)

    Noy, M; Rinella, G Aglieri; Fiorini, M; Jarron, P; Kaplon, J; Kluge, A; Morel, M; Perktold, L; Riedler, P; Martin, E

    2011-01-01

    The architecture and characterisation of the End Of Column demonstrator readout ASIC for the NA62 GigaTracker hybrid pixel detector is presented. This ASIC serves as a proof of principle for a pixel chip with 1800 pixels which must perform time stamping to better than 200 ps (RMS), provide 300 μm pitch position information and operate with a dead-time of 1% or less for 800 MHz-1 GHz beam rate. The demonstrator ASIC comprises a full test column with 45 pixels alongside other test structures. The timewalk correction mechanism employed is measurement of the time-over-threshold, coupled with an off-detector look-up table. The time to digital converter is a delay locked loop with 32 contributing delay cells fed with a 320 MHz to yield a nominal bin size of 97 ps. Recently, P-in-N sensors have been bump-bonded to the ASIC and characterisation of these assemblies has begun.

  13. A Binary Offset Effect in CCD Readout and Its Impact on Astronomical Data

    Science.gov (United States)

    Boone, K.; Aldering, G.; Copin, Y.; Dixon, S.; Domagalski, R. S.; Gangler, E.; Pecontal, E.; Perlmutter, S.

    2018-06-01

    We have discovered an anomalous behavior of CCD readout electronics that affects their use in many astronomical applications. An offset in the digitization of the CCD output voltage that depends on the binary encoding of one pixel is added to pixels that are read out one, two, and/or three pixels later. One result of this effect is the introduction of a differential offset in the background when comparing regions with and without flux from science targets. Conventional data reduction methods do not correct for this offset. We find this effect in 16 of 22 instruments investigated, covering a variety of telescopes and many different front-end electronics systems. The affected instruments include LRIS and DEIMOS on the Keck telescopes, WFC3 UVIS and STIS on HST, MegaCam on CFHT, SNIFS on the UH88 telescope, GMOS on the Gemini telescopes, HSC on Subaru, and FORS on VLT. The amplitude of the introduced offset is up to 4.5 ADU per pixel, and it is not directly proportional to the measured ADU level. We have developed a model that can be used to detect this “binary offset effect” in data, and correct for it. Understanding how data are affected and applying a correction for the effect is essential for precise astronomical measurements.

  14. Data readout system utilizing photonic integrated circuit

    Energy Technology Data Exchange (ETDEWEB)

    Stopiński, S., E-mail: S.Stopinski@tue.nl [COBRA Research Institute, Eindhoven University of Technology (Netherlands); Institute of Microelectronics and Optoelectronics, Warsaw University of Technology (Poland); Malinowski, M.; Piramidowicz, R. [Institute of Microelectronics and Optoelectronics, Warsaw University of Technology (Poland); Smit, M.K.; Leijtens, X.J.M. [COBRA Research Institute, Eindhoven University of Technology (Netherlands)

    2013-10-11

    We describe a novel optical solution for data readout systems. The core of the system is an Indium-Phosphide photonic integrated circuit performing as a front-end readout unit. It functions as an optical serializer in which the serialization of the input signal is provided by means of on-chip optical delay lines. The circuit employs electro-optic phase shifters to build amplitude modulators, power splitters for signal distribution, semiconductor optical amplifiers for signal amplification as well as on-chip reflectors. We present the concept of the system, the design and first characterization results of the devices that were fabricated in a multi-project wafer run.

  15. FE-I4 Firmware Development and Integration with FELIX for the Pixel Detector

    CERN Document Server

    Yadav, Amitabh; Sharma, Abhishek; CERN. Geneva. EP Department

    2017-01-01

    CERN has planned a series of upgrades for the LHC. The last in this current series of planned upgrades is designated the HL-LHC. At the same time, the ATLAS Experiment will be extensively changed to meet the challenges of this upgrade (termed as the “Phase-II” upgrade). The Inner Detector will be completely rebuilt for the phase-II. The TRT, SCT and Pixel will be replaced by the all-silicon tracker, termed as the Inner Tracker (ITk). The read-out of this future ITk detector is an engineering challenge for the routing of services and quality of the data. This document describes the FPGA firmware development that integrates the GBT, Elink and Rx-Tx Cores for communication between the FE-I4 modules and the FELIX read-out system.

  16. Pixel-by-pixel mean transit time without deconvolution.

    Science.gov (United States)

    Dobbeleir, Andre A; Piepsz, Amy; Ham, Hamphrey R

    2008-04-01

    Mean transit time (MTT) within a kidney is given by the integral of the renal activity on a well-corrected renogram between time zero and time t divided by the integral of the plasma activity between zero and t, providing that t is close to infinity. However, as the data acquisition of a renogram is finite, the MTT calculated using this approach might result in the underestimation of the true MTT. To evaluate the degree of this underestimation we conducted a simulation study. One thousand renograms were created by convoluting various plasma curves obtained from patients with different renal clearance levels with simulated retentions curves having different shapes and mean transit times. For a 20 min renogram, the calculated MTT started to underestimate the MTT when the MTT was higher than 6 min. The longer the MTT, the greater was the underestimation. Up to a MTT value of 6 min, the error on the MTT estimation is negligible. As normal cortical transit is less than 2 min, this approach is used for patients to calculate pixel-to-pixel cortical mean transit time and to create a MTT parametric image without deconvolution.

  17. Radiation hardness and timing studies of a monolithic TowerJazz pixel design for the new ATLAS Inner Tracker

    Science.gov (United States)

    Riegel, C.; Backhaus, M.; Van Hoorne, J. W.; Kugathasan, T.; Musa, L.; Pernegger, H.; Riedler, P.; Schaefer, D.; Snoeys, W.; Wagner, W.

    2017-01-01

    A part of the upcoming HL-LHC upgrade of the ATLAS Detector is the construction of a new Inner Tracker. This upgrade opens new possibilities, but also presents challenges in terms of occupancy and radiation tolerance. For the pixel detector inside the inner tracker, hybrid modules containing passive silicon sensors and connected readout chips are presently used, but require expensive assembly techniques like fine-pitch bump bonding. Silicon devices fabricated in standard commercial CMOS technologies, which include part or all of the readout chain, are also investigated offering a reduced cost as they are cheaper per unit area than traditional silicon detectors. If they contain the full readout chain, as for a fully monolithic approach, there is no need for the expensive flip-chip assembly, resulting in a further cost reduction and material savings. In the outer pixel layers of the ATLAS Inner Tracker, the pixel sensors must withstand non-ionising energy losses of up to 1015 n/cm2 and offer a timing resolution of 25 ns or less. This paper presents test results obtained on a monolithic test chip, the TowerJazz 180nm Investigator, towards these specifications. The presented program of radiation hardness and timing studies has been launched to investigate this technology's potential for the new ATLAS Inner Tracker.

  18. Radiation hardness and timing studies of a monolithic TowerJazz pixel design for the new ATLAS Inner Tracker

    International Nuclear Information System (INIS)

    Riegel, C.; Backhaus, M.; Hoorne, J.W. Van; Kugathasan, T.; Musa, L.; Pernegger, H.; Riedler, P.; Schaefer, D.; Snoeys, W.; Wagner, W.

    2017-01-01

    A part of the upcoming HL-LHC upgrade of the ATLAS Detector is the construction of a new Inner Tracker. This upgrade opens new possibilities, but also presents challenges in terms of occupancy and radiation tolerance. For the pixel detector inside the inner tracker, hybrid modules containing passive silicon sensors and connected readout chips are presently used, but require expensive assembly techniques like fine-pitch bump bonding. Silicon devices fabricated in standard commercial CMOS technologies, which include part or all of the readout chain, are also investigated offering a reduced cost as they are cheaper per unit area than traditional silicon detectors. If they contain the full readout chain, as for a fully monolithic approach, there is no need for the expensive flip-chip assembly, resulting in a further cost reduction and material savings. In the outer pixel layers of the ATLAS Inner Tracker, the pixel sensors must withstand non-ionising energy losses of up to 10 15 n/cm 2 and offer a timing resolution of 25 ns or less. This paper presents test results obtained on a monolithic test chip, the TowerJazz 180nm Investigator, towards these specifications. The presented program of radiation hardness and timing studies has been launched to investigate this technology's potential for the new ATLAS Inner Tracker.

  19. Optimization of thin n-in-p planar pixel modules for the ATLAS upgrade at HL-LHC

    International Nuclear Information System (INIS)

    Macchiolo, A.; Beyer, J.; Rosa, A. La; Nisius, R.; Savic, N.

    2017-01-01

    The ATLAS experiment will undergo around the year 2025 a replacement of the tracker system in view of the high luminosity phase of the LHC (HL-LHC) with a new 5-layer pixel system. Thin planar pixel sensors are promising candidates to instrument the innermost region of the new pixel system, thanks to the reduced contribution to the material budget and their high charge collection efficiency after irradiation. The sensors of 50-150 μm thickness, interconnected to FE-I4 read-out chips, have been characterized with radioactive sources and beam tests. In particular active edge sensors have been investigated. The performance of two different versions of edge designs are compared: the first with a bias ring, and the second one where only a floating guard ring has been implemented. The hit efficiency at the edge has also been studied after irradiation at a fluence of 10 15  n eq /cm 2 . Highly segmented sensors will represent a challenge for the tracking in the forward region of the pixel system at HL-LHC. In order to reproduce the performance of 50x50 μm 2 pixels at high pseudo-rapidity values, FE-I4 compatible planar pixel sensors have been studied before and after irradiation in beam tests at high incidence angles with respect to the short pixel direction. Results on the hit efficiency in this configuration are discussed for different sensor thicknesses.

  20. SiPM based readout system for PbWO4 crystals

    Science.gov (United States)

    Berra, A.; Bolognini, D.; Bonfanti, S.; Bonvicini, V.; Lietti, D.; Penzo, A.; Prest, M.; Stoppani, L.; Vallazza, E.

    2013-08-01

    Silicon PhotoMultipliers (SiPMs) consist of a matrix of small passively quenched silicon avalanche photodiodes operated in limited Geiger-mode (GM-APDs) and read out in parallel from a common output node. Each pixel (with a typical size in the 20-100 μm range) gives the same current response when hit by a photon; the SiPM output signal is the sum of the signals of all the pixels, which depends on the light intensity. The main advantages of SiPMs with respect to photomultiplier tubes (PMTs) are essentially the small dimensions, the insensitivity to magnetic fields and a low bias voltage. This contribution presents the performance of a SiPM based readout system for crystal calorimeters developed in the framework of the FACTOR/TWICE collaboration. The SiPM used for the test is a new device produced by FBK-irst which consists in a matrix of four sensors embedded in the same silicon substrate, called QUAD. The SiPM has been coupled to a lead tungstate crystal, an early-prototype version of the crystals developed for the electromagnetic calorimeter of the CMS experiment. New tests are foreseen using a complete module consisting of nine crystals, each one readout by two QUADs.