The Layer 1 / Layer 2 readout upgrade for the ATLAS Pixel Detector

CERN Document Server

Mullier, Geoffrey; The ATLAS collaboration

2016-01-01

The Pixel Detector of the ATLAS experiment has shown excellent performance during the whole Run-1 of the Large Hadron Collider (LHC). The increase of instantaneous luminosity foreseen during the LHC Run 2, will lead to an increased detector occupancy that is expected to saturate the readout links of the outermost layers of the pixel detector: Layers 1 and 2. To ensure a smooth data taking under such conditions, the read out system of the recently installed fourth innermost pixel layer, the Insertable B-Layer, was modified to accomodate the needs of the older detector. The Layer 2 upgrade installation took place during the 2015 winter shutdown, with the Layer 1 installation scheduled for 2016. A report of the successful installation, together with the design of novel dedicated optical to electrical converters and the software and firmware updates will be presented.

Development of Micromegas-like gaseous detectors using a pixel readout chip as collecting anode

International Nuclear Information System (INIS)

Chefdeville, M.

2009-01-01

This thesis reports on the fabrication and test of a new gaseous detector with a very large number of readout channels. This detector is intended for measuring the tracks of charged particles with an unprecedented sensitivity to single electrons of almost 100 %. It combines a metal grid for signal amplification called the Micromegas with a pixel readout chip as signal collecting anode and is dubbed GridPix. GridPix is a potential candidate for a sub-detector at a future electron linear collider (ILC) foreseen to work in parallel with the LHC around 2020--2030. The tracking capability of GridPix is best exploited if the Micromegas is integrated on the pixel chip. This integrated grid is called InGrid and is precisely fabricated by wafer post-processing. The various steps of the fabrication process and the measurements of its gain, energy resolution and ion back-flow property are reported in this document. Studies of the response of the complete detector formed by an InGrid and a TimePix pixel chip to X-rays and cosmic particles are also presented. In particular, the efficiency for detecting single electrons and the point resolution in the pixel plane are measured. Implications for a GridPix detector at ILC are discussed. (author)

The NA62 Gigatracker: Detector properties and pixel read-out architectures

International Nuclear Information System (INIS)

Fiorini, M.; Carassiti, V.; Ceccucci, A.; Cortina, E.; Cotta Ramusino, A.; Dellacasa, G.; Jarron, P.; Kaplon, J.; Kluge, A.; Marchetto, F.; Martin, E.; Martoiu, S.; Mazza, G.; Noy, M.; Petrucci, F.; Riedler, P.; Rivetti, A.; Tiuraniemi, S.

2010-01-01

The beam spectrometer of the NA62 experiment, named Gigatracker, has to perform single track reconstruction with unprecedented time resolution (150 ps rms) in a harsh radiation environment. To meet these requirements, and in order to reduce material budget to a minimum, three hybrid silicon pixel detector stations will be installed in vacuum. An adequate strategy to compensate for the discriminator time-walk must be implemented and R and D investigating two different options is ongoing. Two read-out chip prototypes have been designed in order to compare their performance: one approach is based on the use of a constant-fraction discriminator followed by an on-pixel TDC, while the other one is based on the use of a time-over-threshold circuit followed by a TDC shared by a group of pixels. This paper describes the Gigatracker system, presents the global architectures of both read-out ASICs and reviews the current status of the R and D project.

Optical readout and control interface for the BTeV pixel vertex detector

CERN Document Server

Vergara-Limon, S; Sheaff, M; Vargas, M A

2002-01-01

Optical links will be used for sending data back and forth from the counting room to the detector in the data acquisition systems for future high energy physics experiments, including ATLAS and CMS in the LHC at CERN (Switzerland) and BTeV at Fermilab (USA). This is because they can be ultra-high speed and are relatively immune to electro-magnetic interference (EMI). The baseline design for the BTeV Pixel Vertex Detector includes two types of optical link, one to control and monitor and the other to read out the hit data from the multi-chip modules on each half-plane of the detector. The design and performance of the first prototype of the Optical Readout and Control Interface for the BTeV Pixel Vertex Detector is described.

Frequency-multiplexed bias and readout of a 16-pixel superconducting nanowire single-photon detector array

Science.gov (United States)

Doerner, S.; Kuzmin, A.; Wuensch, S.; Charaev, I.; Boes, F.; Zwick, T.; Siegel, M.

2017-07-01

We demonstrate a 16-pixel array of microwave-current driven superconducting nanowire single-photon detectors with an integrated and scalable frequency-division multiplexing architecture, which reduces the required number of bias and readout lines to a single microwave feed line. The electrical behavior of the photon-sensitive nanowires, embedded in a resonant circuit, as well as the optical performance and timing jitter of the single detectors is discussed. Besides the single pixel measurements, we also demonstrate the operation of a 16-pixel array with a temporal, spatial, and photon-number resolution.

submitter Development of the readout for the IBL upgrade project of the ATLAS Pixel Detector

CERN Document Server

Krieger, Nina

The LHC luminosity is upgraded in several phases until 2022. The resulting higher occupancy degrades the detector performance of the current Pixel Detector. To provide a good performance during the LHC luminosity upgrade, a fourth pixel layer is inserted into the existing ATLAS Pixel Detector. A new FE-I4 readout chip and a new data acquisition chain are required to cope with the higher track rate and the resulting increased bandwidth. Among others, this includes a new readout board: the IBL ROD. One component of this board is the DSP which creates commands for the FE-I4 chip and has to be upgraded as well. In this thesis, the first tests of the IBL ROD prototype are presented. A correct communication of the DSP to its external memory is verified. Moreover, the implementations for an IBL DSP code are described and tested. This includes the first configuration of the FE-I4 with an IBL ROD. In addition, a working communication with the Histogrammer SDRAM and the Input FIFO on the IBL ROD are demonstrated.

Towards a new generation of pixel detector readout chips

CERN Document Server

Campbell, M; Ballabriga, R.; Frojdh, E.; Heijne, E.; Llopart, X.; Poikela, T.; Tlustos, L.; Valerio, P.; Wong, W.

2016-01-01

The Medipix3 Collaboration has broken new ground in spectroscopic X-ray imaging and in single particle detection and tracking. This paper will review briefly the performance and limitations of the present generation of pixel detector readout chips developed by the Collaboration. Through Silicon Via technology has the potential to provide a significant improvement in the tile- ability and more flexibility in the choice of readout architecture. This has been explored in the context of 3 projects with CEA-LETI using Medipix3 and Timepix3 wafers. The next generation of chips will aim to provide improved spectroscopic imaging performance at rates compatible with human CT. It will also aim to provide full spectroscopic images with unprecedented energy and spatial resolution. Some of the opportunities and challenges posed by moving to a more dense CMOS process will be discussed.

Pixel detector readout electronics with two-level discriminator scheme

International Nuclear Information System (INIS)

Pengg, F.

1998-01-01

In preparation for a silicon pixel detector with more than 3,000 readout channels per chip for operation at the future large hadron collider (LHC) at CERN the analog front end of the readout electronics has been designed and measured on several test-arrays with 16 by 4 cells. They are implemented in the HP 0.8 microm process but compatible with the design rules of the radiation hard Honeywell 0.8 microm bulk process. Each cell contains bump bonding pad, preamplifier, discriminator and control logic for masking and testing within a layout area of only 50 microm by 140 microm. A new two-level discriminator scheme has been implemented to cope with the problems of time-walk and interpixel cross-coupling. The measured gain of the preamplifier is 900 mV for a minimum ionizing particle (MIP, about 24,000 e - for a 300 microm thick Si-detector) with a return to baseline within 750 ns for a 1 MIP input signal. The full readout chain (without detector) shows an equivalent noise charge to 60e - r.m.s. The time-walk, a function of the separation between the two threshold levels, is measured to be 22 ns at a separation of 1,500 e - , which is adequate for the 40 MHz beam-crossing frequency at the LHC. The interpixel cross-coupling, measured with a 40fF coupling capacitance, is less than 3%. A single cell consumes 35 microW at 3.5 V supply voltage

Readout ASIC for ILC-FPCCD vertex detector

International Nuclear Information System (INIS)

Takubo, Yosuke; Miyamoto, Akiya; Ikeda, Hirokazu; Yamamoto, Hitoshi; Itagaki, Kennosuke; Nagamine, Tadashi; Sugimoto, Yasuhiro

2010-01-01

The concept of FPCCD (Fine Pixel CCD) whose pixel size is 5x5μm 2 has been proposed as vertex detector at ILC. Since FPCCD has 128 x20,000 pixels in one readout channel, its readout poses a considerable challenge. We have developed a prototype of readout ASIC to readout the large number of pixels during the inter-train gap of the ILC beam. In this paper, we report the design and performance of the readout ASIC.

Studies and development of a readout ASIC for pixelated CdTe detectors for space applications

International Nuclear Information System (INIS)

Michalowska, A.

2013-01-01

The work presented in this thesis is part of a project where a new instrument is developed: a camera for hard X-rays imaging spectroscopy. It is dedicated to fundamental research for observations in astrophysics, at wavelengths which can only be observed using space-borne instruments. In this domain the spectroscopic accuracy as well as the imaging details are of high importance. This work has been realized at CEA/IRFU (Institut de Recherche sur les lois Fondamentales de l'Univers), which has a long-standing and successful experience in instruments for high energy physics and space physics instrumentation. The objective of this thesis is the design of the readout electronics for a pixelated CdTe detector, suitable for a stacked assembly. The principal parameters of this integrated circuit are a very low noise for reaching a good accuracy in X-ray energy measurement, very low power consumption, a critical parameter in space-borne applications, and a small dead area for the full system combining the detector and the readout electronics. In this work I have studied the limits of these three parameters in order to optimize the circuit. In terms of the spectral resolution, two categories of noise had to be distinguished to determine the final performance. The first is the Fano noise limit, related to detector interaction statistics, which cannot be eliminated. The second is the electronic noise, also unavoidable; however it can be minimized through optimization of the detection chain. Within the detector, establishing a small pixel pitch of 300 μm reduces the input capacitance and the dark current. This limits the effects of the electronic noise. Also in order to limit the input capacitance the future camera is designed as a stacked assembly of the detector with the readout ASIC. This allows to reach extremely good input parameters seen by the readout electronics: a capacitance in range of 0.3 pF-1 pF and a dark current below 5 pA. In the frame of this thesis I have

The ALICE Silicon Pixel Detector System (SPD)

CERN Document Server

Kluge, A; Antinori, Federico; Burns, M; Cali, I A; Campbell, M; Caselle, M; Ceresa, S; Dima, R; Elias, D; Fabris, D; Krivda, Marian; Librizzi, F; Manzari, Vito; Morel, M; Moretto, Sandra; Osmic, F; Pappalardo, G S; Pepato, Adriano; Pulvirenti, A; Riedler, P; Riggi, F; Santoro, R; Stefanini, G; Torcato De Matos, C; Turrisi, R; Tydesjo, H; Viesti, G; PH-EP

2007-01-01

The ALICE silicon pixel detector (SPD) comprises the two innermost layers of the ALICE inner tracker system. The SPD includes 120 detector modules (half-staves) each consisting of 10 ALICE pixel chips bump bonded to two silicon sensors and one multi-chip read-out module. Each pixel chip contains 8192 active cells, so that the total number of pixel cells in the SPD is ≈ 107. The on-detector read-out is based on a multi-chip-module containing 4 ASICs and an optical transceiver module. The constraints on material budget and detector module dimensions are very demanding.

CMS Pixel Detector Upgrade

CERN Document Server

INSPIRE-00038772

2011-01-01

The present Compact Muon Solenoid silicon pixel tracking system has been designed for a peak luminosity of 1034cm-2s-1 and total dose corresponding to two years of the Large Hadron Collider (LHC) operation. With the steady increase of the luminosity expected at the LHC, a new pixel detector with four barrel layers and three endcap disks is being designed. We will present the key points of the design: the new geometry, which minimizes the material budget and increases the tracking points, and the development of a fast digital readout architecture, which ensures readout efficiency even at high rate. The expected performances for tracking and vertexing of the new pixel detector are also addressed.

A pixel unit-cell targeting 16 ns resolution and radiation hardness in a column read-out particle vertex detector

International Nuclear Information System (INIS)

Wright, M.; Millaud, J.; Nygren, D.

1992-10-01

A pixel unit cell (PUC) circuit architecture, optimized for a column read out architecture, is reported. Each PUC contains an integrator, active filter, comparator, and optional analog store. The time-over-threshold (TOT) discriminator allows an all-digital interface to the array periphery readout while passing an analog measure of collected charge. Use of (existing) radiation hard processes, to build a detector bump-bonded to a pixel readout array, is targeted. Here, emphasis is on a qualitative explanation of how the unique circuit implementation benefits operation for Super Collider (SSC) detector application

A pixel unit-cell targeting 16ns resolution and radiation hardness in a column read-out particle vertex detector

International Nuclear Information System (INIS)

Wright, M.; Millaud, J.; Nygren, D.

1993-01-01

A pixel unit cell (PUC) circuit architecture, optimized for a column read out architecture, is reported. Each PUC contains an integrator, active filter, comparator, and optional analog store. The time-over-threshold (TOT) discriminator allows an all-digital interface to the array periphery readout while passing an analog measure of collected charge. Use of (existing) radiation hard processes, to build a detector bump-bonded to a pixel readout array, is targeted. Here emphasis is on a qualitative explanation of how the unique circuit implementation benefits operation for Super Collider (SSC) detector application. (orig.)

Performance of hybrid photon detector prototypes with encapsulated silicon pixel detector and readout for the RICH counters of LHCb

International Nuclear Information System (INIS)

Campbell, M.; George, K.A.; Girone, M.; Gys, T.; Jolly, S.; Piedigrossi, D.; Riedler, P.; Rozema, P.; Snoeys, W.; Wyllie, K.

2003-01-01

These proceedings report on the performance of the latest prototype pixel hybrid photon detector in preparation for the LHCb Ring Imaging Cherenkov detectors. The prototype encapsulates a silicon pixel detector bump-bonded to a binary read-out chip with short (25 ns) peaking time and low ( - ) detection threshold. A brief description of the prototype is given, followed by the preliminary results of the characterisation of the prototype behaviour when tested using a low intensity pulsed light emitting diode. The results obtained are in good agreement with those obtained using previous prototypes. The proceedings conclude with a summary of the current status and future plans

The pin pixel detector--neutron imaging

CERN Document Server

Bateman, J E; Derbyshire, G E; Duxbury, D M; Marsh, A S; Rhodes, N J; Schooneveld, E M; Simmons, J E; Stephenson, R

2002-01-01

The development and testing of a neutron gas pixel detector intended for application in neutron diffraction studies is reported. Using standard electrical connector pins as point anodes, the detector is based on a commercial 100 pin connector block. A prototype detector of aperture 25.4 mmx25.4 mm has been fabricated, giving a pixel size of 2.54 mm which matches well to the spatial resolution typically required in a neutron diffractometer. A 2-Dimensional resistive divide readout system has been adapted to permit the imaging properties of the detector to be explored in advance of true pixel readout electronics. The timing properties of the device match well to the requirements of the ISIS-pulsed neutron source.

Operational Experience with the ATLAS Pixel Detector

CERN Document Server

Lantzsch, Kerstin; The ATLAS collaboration

2016-01-01

Run 2 of the LHC is providing new challenges to track and vertex reconstruction with higher energies, denser jets and higher rates. Therefore the ATLAS experiment has constructed the first 4-layer Pixel detector in HEP, installing a new Pixel layer, also called Insertable B-Layer (IBL). In addition the Pixel detector was refurbished with new service quarter panels to recover about 3% of defective modules lost during run 1 and a new optical readout system to readout the data at higher speed while reducing the occupancy when running with increased luminosity. The commissioning, operation and performance of the 4-layer Pixel Detector will be presented.

Gas pixel detectors

International Nuclear Information System (INIS)

Bellazzini, R.; Baldini, L.; Brez, A.; Cavalca, F.; Latronico, L.; Massai, M.M.; Minuti, M.; Omodei, N.; Pesce-Rollins, M.; Sgro, C.; Spandre, G.; Costa, E.; Soffitta, P.

2007-01-01

With the Gas Pixel Detector (GPD), the class of micro-pattern gas detectors has reached a complete integration between the gas amplification structure and the read-out electronics. To obtain this goal, three generations of application-specific integrated circuit of increased complexity and improved functionality has been designed and fabricated in deep sub-micron CMOS technology. This implementation has allowed manufacturing a monolithic device, which realizes, at the same time, the pixelized charge-collecting electrode and the amplifying, shaping and charge measuring front-end electronics of a GPD. A big step forward in terms of size and performances has been obtained in the last version of the 0.18 μm CMOS analog chip, where over a large active area of 15x15 mm 2 a very high channel density (470 pixels/mm 2 ) has been reached. On the top metal layer of the chip, 105,600 hexagonal pixels at 50 μm pitch have been patterned. The chip has customable self-trigger capability and includes a signal pre-processing function for the automatic localization of the event coordinates. In this way, by limiting the output signal to only those pixels belonging to the region of interest, it is possible to reduce significantly the read-out time and data volume. In-depth tests performed on a GPD built up by coupling this device to a fine pitch (50 μm) gas electron multiplier are reported. Matching of the gas amplification and read-out pitch has let to obtain optimal results. A possible application of this detector for X-ray polarimetry of astronomical sources is discussed

Research of high speed data readout and pre-processing system based on xTCA for silicon pixel detector

International Nuclear Information System (INIS)

Zhao Jingzhou; Lin Haichuan; Guo Fang; Liu Zhen'an; Xu Hao; Gong Wenxuan; Liu Zhao

2012-01-01

As the development of the detector, Silicon pixel detectors have been widely used in high energy physics experiments. It needs data processing system with high speed, high bandwidth and high availability to read data from silicon pixel detectors which generate more large data. The same question occurs on Belle II Pixel Detector which is a new style silicon pixel detector used in SuperKEKB accelerator with high luminance. The paper describes the research of High speed data readout and pre-processing system based on xTCA for silicon pixel detector. The system consists of High Performance Computer Node (HPCN) based on xTCA and ATCA frame. The HPCN consists of 4XFPs based on AMC, 1 AMC Carrier ATCA Board (ACAB) and 1 Rear Transmission Module. It characterized by 5 high performance FPGAs, 16 fiber links based on RocketIO, 5 Gbit Ethernet ports and DDR2 with capacity up to 18GB. In a ATCA frame, 14 HPCNs make up a system using the high speed backplane to achieve the function of data pre-processing and trigger. This system will be used on the trigger and data acquisition system of Belle II Pixel detector. (authors)

The pin pixel detector--X-ray imaging

CERN Document Server

Bateman, J E; Derbyshire, G E; Duxbury, D M; Marsh, A S; Simmons, J E; Stephenson, R

2002-01-01

The development and testing of a soft X-ray gas pixel detector, which uses connector pins for the anodes is reported. Based on a commercial 100 pin connector block, a prototype detector of aperture 25.4 mm centre dot 25.4 mm can be economically fabricated. The individual pin anodes all show the expected characteristics of small gas detectors capable of counting rates reaching 1 MHz per pin. A 2-dimensional resistive divide readout system has been developed to permit the imaging properties of the detector to be explored in advance of true pixel readout electronics.

Status of the CMS Phase I pixel detector upgrade

Energy Technology Data Exchange (ETDEWEB)

Spannagel, S., E-mail: simon.spannagel@desy.de

2016-09-21

A new pixel detector for the CMS experiment is being built, owing to the instantaneous luminosities anticipated for the Phase I Upgrade of the LHC. The new CMS pixel detector provides four-hit tracking while featuring a significantly reduced material budget as well as new cooling and powering schemes. A new front-end readout chip mitigates buffering and bandwidth limitations, and comprises a low-threshold comparator. These improvements allow the new pixel detector to sustain and improve the efficiency of the current pixel tracker at the increased requirements imposed by high luminosities and pile-up. This contribution gives an overview of the design of the upgraded pixel detector and the status of the upgrade project, and presents test beam performance measurements of the production read-out chip.

Status of the CMS Phase I Pixel Detector Upgrade

CERN Document Server

Spannagel, Simon

2016-09-21

A new pixel detector for the CMS experiment is being built, owing to the instantaneous luminosities anticipated for the Phase~I Upgrade of the LHC. The new CMS pixel detector provides four-hit tracking while featuring a significantly reduced material budget as well as new cooling and powering schemes. A new front-end readout chip mitigates buffering and bandwidth limitations, and comprises a low-threshold comparator. These improvements allow the new pixel detector to sustain and improve the efficiency of the current pixel tracker at the increased requirements imposed by high luminosities and pile-up. This contribution gives an overview of the design of the upgraded pixel detector and the status of the upgrade project, and presents test beam performance measurements of the production read-out chip.

Vertically integrated pixel readout chip for high energy physics

International Nuclear Information System (INIS)

Deptuch, Grzegorz; Demarteau, Marcel; Hoff, James; Khalid, Farah; Lipton, Ronald; Shenai, Alpana; Trimpl, Marcel; Yarema, Raymond; Zimmerman, Tom

2011-01-01

We report on the development of the vertex detector pixel readout chips based on multi-tier vertically integrated electronics for the International Linear Collider. Some testing results of the VIP2a prototype are presented. The chip is the second iteration of the silicon implementation of the prototype, data-pushed concept of the readout developed at Fermilab. The device was fabricated in the 3D MIT-LL 0.15 (micro)m fully depleted SOI process. The prototype is a three-tier design, featuring 30 x 30 (micro)m 2 pixels, laid out in an array of 48 x 48 pixels.

X-ray imaging with photon counting hybrid semiconductor pixel detectors

CERN Document Server

Manolopoulos, S; Campbell, M; Snoeys, W; Heijne, Erik H M; Pernigotti, E; Raine, C; Smith, K; Watt, J; O'Shea, V; Ludwig, J; Schwarz, C

1999-01-01

Semiconductor pixel detectors, originally developed for particle physics experiments, have been studied as X-ray imaging devices. The performance of devices using the OMEGA 3 read-out chip bump-bonded to pixellated silicon semiconductor detectors is characterised in terms of their signal-to-noise ratio when exposed to 60 kVp X-rays. Although parts of the devices achieve values of this ratio compatible with the noise being photon statistics limited, this is not found to hold for the whole pixel matrix, resulting in the global signal-to-noise ratio being compromised. First results are presented of X-ray images taken with a gallium arsenide pixel detector bump-bonded to a new read-out chip, (MEDIPIX), which is a single photon counting read-out chip incorporating a 15-bit counter in every pixel. (author)

Online calibrations and performance of the ATLAS Pixel Detector

CERN Document Server

Keil, M; The ATLAS collaboration

2010-01-01

The ATLAS Pixel Detector is the innermost detector of the ATLAS experiment at the Large Hadron Collider at CERN. It consists of 1744 silicon sensors equipped with approximately 80 M electronic channels, providing typically three measurement points with high resolution for particles emerging from the beam-interaction region, thus allowing measuring particle tracks and secondary vertices with very high precision. The readout system of the Pixel Detector is based on a bi-directional optical data transmission system between the detector and the data acquisition system with an individual link for each of the 1744 modules. Signal conversion components are located on both ends, approximately 80 m apart. The talk will give an overview of the calibration and performance of both the detector and its optical readout. The most basic parameter to be tuned and calibrated for the detector electronics is the readout threshold of the individual pixel channels. These need to be carefully tuned to optimise position resolution a...

Development of pixel readout integrated circuits for extreme rate and radiation

CERN Document Server

Garcia-Sciveres, M; CERN. Geneva. The LHC experiments Committee; LHCC

2013-01-01

Letter of Intent for RD Collaboration Proposal focused on development of a next generation pixel readout integrated circuits needed for high luminosity LHC detector upgrades. Brings together ATLAS and CMS pixel chip design communities.

First large DEPFET pixel modules for the Belle II Pixel Detector

Energy Technology Data Exchange (ETDEWEB)

Mueller, Felix; Avella, Paola; Kiesling, Christian; Koffmane, Christian; Moser, Hans-Guenther; Valentan, Manfred [Max-Planck-Institut fuer Physik, Muenchen (Germany); Andricek, Ladislav; Richter, Rainer [Halbleiterlabor der Max-Planck-Gesellschaft, Muenchen (Germany); Collaboration: Belle II-Collaboration

2016-07-01

DEPFET pixel detectors offer excellent signal to noise ratio, resolution and low power consumption with a low material budget. They will be used at Belle II and are a candidate for an ILC vertex detector. The pixels are integrated in a monolithic piece of silicon which also acts as PCB providing the signal and control routings for the ASICs on top. The first prototype DEPFET sensor modules for Belle II have been produced. The modules have 192000 pixels and are equipped with SMD components and three different kinds of ASICs to control and readout the pixels. The entire readout chain has to be studied; the metal layer interconnectivity and routings need to be verified. The modules are fully characterized, and the operation voltages and control sequences of the ASICs are investigated. An overview of the DEPFET concept and first characterization results is presented.

CVD diamond pixel detectors for LHC experiments

Energy Technology Data Exchange (ETDEWEB)

Wedenig, R.; Adam, W.; Bauer, C.; Berdermann, E.; Bergonzo, P.; Bogani, F.; Borchi, E.; Brambilla, A.; Bruzzi, M.; Colledani, C.; Conway, J.; Dabrowski, W.; Delpierre, P.; Deneuville, A.; Dulinski, W.; Eijk, B. van; Fallou, A.; Fizzotti, F.; Foulon, F.; Friedl, M.; Gan, K.K.; Gheeraert, E.; Grigoriev, E.; Hallewell, G.; Hall-Wilton, R.; Han, S.; Hartjes, F.; Hrubec, J.; Husson, D.; Kagan, H.; Kania, D.; Kaplon, J.; Karl, C.; Kass, R.; Knoepfle, K.T.; Krammer, M.; Logiudice, A.; Lu, R.; Manfredi, P.F.; Manfredotti, C.; Marshall, R.D.; Meier, D.; Mishina, M.; Oh, A.; Pan, L.S.; Palmieri, V.G.; Pernicka, M.; Peitz, A.; Pirollo, S.; Polesello, P.; Pretzl, K.; Procario, M.; Re, V.; Riester, J.L.; Roe, S.; Roff, D.; Rudge, A.; Runolfsson, O.; Russ, J.; Schnetzer, S.; Sciortino, S.; Speziali, V.; Stelzer, H.; Stone, R.; Suter, B.; Tapper, R.J.; Tesarek, R.; Trawick, M.; Trischuk, W.; Vittone, E.; Wagner, A.; Walsh, A.M.; Weilhammer, P.; White, C.; Zeuner, W.; Ziock, H.; Zoeller, M.; Blanquart, L.; Breugnion, P.; Charles, E.; Ciocio, A.; Clemens, J.C.; Dao, K.; Einsweiler, K.; Fasching, D.; Fischer, P.; Joshi, A.; Keil, M.; Klasen, V.; Kleinfelder, S.; Laugier, D.; Meuser, S.; Milgrome, O.; Mouthuy, T.; Richardson, J.; Sinervo, P.; Treis, J.; Wermes, N

1999-08-01

This paper reviews the development of CVD diamond pixel detectors. The preparation of the diamond pixel sensors for bump-bonding to the pixel readout electronics for the LHC and the results from beam tests carried out at CERN are described.

CVD diamond pixel detectors for LHC experiments

International Nuclear Information System (INIS)

Wedenig, R.; Adam, W.; Bauer, C.; Berdermann, E.; Bergonzo, P.; Bogani, F.; Borchi, E.; Brambilla, A.; Bruzzi, M.; Colledani, C.; Conway, J.; Dabrowski, W.; Delpierre, P.; Deneuville, A.; Dulinski, W.; Eijk, B. van; Fallou, A.; Fizzotti, F.; Foulon, F.; Friedl, M.; Gan, K.K.; Gheeraert, E.; Grigoriev, E.; Hallewell, G.; Hall-Wilton, R.; Han, S.; Hartjes, F.; Hrubec, J.; Husson, D.; Kagan, H.; Kania, D.; Kaplon, J.; Karl, C.; Kass, R.; Knoepfle, K.T.; Krammer, M.; Logiudice, A.; Lu, R.; Manfredi, P.F.; Manfredotti, C.; Marshall, R.D.; Meier, D.; Mishina, M.; Oh, A.; Pan, L.S.; Palmieri, V.G.; Pernicka, M.; Peitz, A.; Pirollo, S.; Polesello, P.; Pretzl, K.; Procario, M.; Re, V.; Riester, J.L.; Roe, S.; Roff, D.; Rudge, A.; Runolfsson, O.; Russ, J.; Schnetzer, S.; Sciortino, S.; Speziali, V.; Stelzer, H.; Stone, R.; Suter, B.; Tapper, R.J.; Tesarek, R.; Trawick, M.; Trischuk, W.; Vittone, E.; Wagner, A.; Walsh, A.M.; Weilhammer, P.; White, C.; Zeuner, W.; Ziock, H.; Zoeller, M.; Blanquart, L.; Breugnion, P.; Charles, E.; Ciocio, A.; Clemens, J.C.; Dao, K.; Einsweiler, K.; Fasching, D.; Fischer, P.; Joshi, A.; Keil, M.; Klasen, V.; Kleinfelder, S.; Laugier, D.; Meuser, S.; Milgrome, O.; Mouthuy, T.; Richardson, J.; Sinervo, P.; Treis, J.; Wermes, N.

1999-01-01

This paper reviews the development of CVD diamond pixel detectors. The preparation of the diamond pixel sensors for bump-bonding to the pixel readout electronics for the LHC and the results from beam tests carried out at CERN are described

A High-Speed, Event-Driven, Active Pixel Sensor Readout for Photon-Counting Microchannel Plate Detectors

Science.gov (United States)

Kimble, Randy A.; Pain, Bedabrata; Norton, Timothy J.; Haas, J. Patrick; Oegerle, William R. (Technical Monitor)

2002-01-01

Silicon array readouts for microchannel plate intensifiers offer several attractive features. In this class of detector, the electron cloud output of the MCP intensifier is converted to visible light by a phosphor; that light is then fiber-optically coupled to the silicon array. In photon-counting mode, the resulting light splashes on the silicon array are recognized and centroided to fractional pixel accuracy by off-chip electronics. This process can result in very high (MCP-limited) spatial resolution while operating at a modest MCP gain (desirable for dynamic range and long term stability). The principal limitation of intensified CCD systems of this type is their severely limited local dynamic range, as accurate photon counting is achieved only if there are not overlapping event splashes within the frame time of the device. This problem can be ameliorated somewhat by processing events only in pre-selected windows of interest of by using an addressable charge injection device (CID) for the readout array. We are currently pursuing the development of an intriguing alternative readout concept based on using an event-driven CMOS Active Pixel Sensor. APS technology permits the incorporation of discriminator circuitry within each pixel. When coupled with suitable CMOS logic outside the array area, the discriminator circuitry can be used to trigger the readout of small sub-array windows only when and where an event splash has been detected, completely eliminating the local dynamic range problem, while achieving a high global count rate capability and maintaining high spatial resolution. We elaborate on this concept and present our progress toward implementing an event-driven APS readout.

Development of pixel readout integrated circuits for extreme rate and radiation

CERN Multimedia

Liberali, V; Rizzi, A; Re, V; Minuti, M; Pangaud, P; Barbero, M B; Pacher, L; Kluit, R; Hinchliffe, I; Manghisoni, M; Giubilato, P; Faccio, F; Pernegger, H; Krueger, H; Gensolen, F D; Bilei, G M; Da rocha rolo, M D; Prydderch, M L; Fanucci, L; Grillo, A A; Bellazzini, R; Palomo pinto, F R; Michelis, S; Huegging, F G; Kishishita, T; Marchiori, G; Christian, D C; Kaestli, H C; Meier, B; Andreazza, A; Key-charriere, M; Linssen, L; Dannheim, D; Conti, E; Hemperek, T; Menouni, M; Fougeron, D; Genat, J; Bomben, M; Marzocca, C; Demaria, N; Mazza, G; Van bakel, N A; Palla, F; Grippo, M T; Magazzu, G; Ratti, L; Abbaneo, D; Crescioli, F; Deptuch, G W; Neue, G; De robertis, G; Passeri, D; Placidi, P; Gromov, V; Morsani, F; Paccagnella, A; Christiansen, J; Dho, E; Wermes, N; Rymaszewski, P; Rozanov, A; Wang, A; Lipton, R J; Havranek, M; Neviani, A; Marconi, S; Karagounis, M; Godiot, S; Calderini, G; Seidel, S C; Horisberger, R P; Garcia-sciveres, M A; Stabile, A; Beccherle, R; Bacchetta, N

The present hybrid pixel detectors in operation at the LHC represent a major achievement. They deployed a new technology on an unprecedented scale and their success firmly established pixel tracking as indispensable for future HEP experiments. However, extrapolation of hybrid pixel technology to the HL-LHC presents major challenges on several fronts. We propose a new RD collaboration specifically focused on the development of pixel readout Integrated Circuits (IC). The IC challenges include: smaller pixels to resolve tracks in boosted jets, much higher hit rates (1-2 GHz/cm$^{2}$), unprecedented radiation tolerance (10 MGy), much higher output bandwidth, and large IC format with low power consumption in order to instrument large areas while keeping the material budget low. We propose a collaboration to design the next generation of hybrid pixel readout chips to enable the ATLAS and CMS Phase 2 pixel upgrades. This does not imply that ATLAS and CMS must use the same exact pixel readout chip, as most of the dev...

A 2D 4×4 Channel Readout ASIC for Pixelated CdTe Detectors for Medical Imaging Applications.

Science.gov (United States)

Macias-Montero, Jose-Gabriel; Sarraj, Maher; Chmeissani, Mokhtar; Martínez, Ricardo; Puigdengoles, Carles

2015-10-01

We present a 16-channel readout integrated circuit (ROIC) with nanosecond-resolution time to digital converter (TDC) for pixelated Cadmium Telluride (CdTe) gamma-ray detectors. The 4 × 4 pixel array ROIC is the proof of concept of the 10 × 10 pixel array readout ASIC for positron-emission tomography (PET) scanner, positron-emission mammography (PEM) scanner, and Compton gamma camera. The electronics of each individual pixel integrates an analog front-end with switchable gain, an analog to digital converter (ADC), configuration registers, and a 4-state digital controller. For every detected photon, the pixel electronics provides the energy deposited in the detector with 10-bit resolution, and a fast trigger signal for time stamp. The ASIC contains the 16-pixel matrix electronics, a digital controller, five global voltage references, a TDC, a temperature sensor, and a band-gap based current reference. The ASIC has been fabricated with TSMC 0.25 μ m mixed-signal CMOS technology and occupies an area of 5.3 mm × 6.8 mm. The TDC shows a resolution of 95.5 ps, a precision of 600 ps at full width half maximum (FWHM), and a power consumption of 130 μ W. In acquisition mode, the total power consumption of every pixel is 200 μ W. An equivalent noise charge (ENC) of 160 e - RMS at maximum gain and negative polarity conditions has been measured at room temperature.

A 10 MHz micropower CMOS front end for direct readout of pixel detectors

International Nuclear Information System (INIS)

Campbell, M.; Heijne, E.H.M.; Jarron, P.; Krummenacher, F.; Enz, C.C.; Declercq, M.; Vittoz, E.; Viertel, G.

1990-01-01

In the framework of the CERN-LAA project for detector R and D, a micropower circuit of 200 μmx200 μm with a current amplifier, a latched comparator and a digital memory element has been tested electrically and operated in connection with linear silicon detector arrays. The experimental direct-readout (DRO) chip comprises a matrix of 9x12 circuit cells and has been manufactured in a 3 μm CMOS technology. Particles and X-ray photons below 22 keV were detected, and thresholds can be set between 2000 and 20000 e - . The noise is less than 4 keV FWHM or 500 e - rms and the power dissipation per pixel element is 30 μW. The chip can be coupled to a detector matrix using bump bonding. (orig.)

CVD diamond pixel detectors for LHC experiments

CERN Document Server

Wedenig, R; Bauer, C; Berdermann, E; Bergonzo, P; Bogani, F; Borchi, E; Brambilla, A; Bruzzi, Mara; Colledani, C; Conway, J; Dabrowski, W; Delpierre, P A; Deneuville, A; Dulinski, W; van Eijk, B; Fallou, A; Fizzotti, F; Foulon, F; Friedl, M; Gan, K K; Gheeraert, E; Grigoriev, E; Hallewell, G D; Hall-Wilton, R; Han, S; Hartjes, F G; Hrubec, Josef; Husson, D; Kagan, H; Kania, D R; Kaplon, J; Karl, C; Kass, R; Knöpfle, K T; Krammer, Manfred; Lo Giudice, A; Lü, R; Manfredi, P F; Manfredotti, C; Marshall, R D; Meier, D; Mishina, M; Oh, A; Pan, L S; Palmieri, V G; Pernicka, Manfred; Peitz, A; Pirollo, S; Polesello, P; Pretzl, Klaus P; Procario, M; Re, V; Riester, J L; Roe, S; Roff, D G; Rudge, A; Runólfsson, O; Russ, J; Schnetzer, S R; Sciortino, S; Speziali, V; Stelzer, H; Stone, R; Suter, B; Tapper, R J; Tesarek, R J; Trawick, M L; Trischuk, W; Vittone, E; Wagner, A; Walsh, A M; Weilhammer, Peter; White, C; Zeuner, W; Ziock, H J; Zöller, M

1999-01-01

This paper reviews the development of CVD diamond pixel detectors. The preparation of the diamond pixel sensors for bump-bonding to the pixel readout electronics for the LHC and the results from beam tests carried out at CERN are described. (9 refs).

Precision tracking with a single gaseous pixel detector

NARCIS (Netherlands)

Tsigaridas, S.; van Bakel, N.; Bilevych, Y.; Gromov, V.; Hartjes, F.; Hessey, N.P.; de Jong, P.; Kluit, R.

2015-01-01

The importance of micro-pattern gaseous detectors has grown over the past few years after successful usage in a large number of applications in physics experiments and medicine. We develop gaseous pixel detectors using micromegas-based amplification structures on top of CMOS pixel readout chips.

A silicon pixel detector prototype for the CLIC vertex detector

CERN Multimedia

AUTHOR|(INSPIRE)INSPIRE-00714258

2017-01-01

A silicon pixel detector prototype for CLIC, currently under study for the innermost detector surrounding the collision point. The detector is made of a High-Voltage CMOS sensor (top) and a CLICpix2 readout chip (bottom) that are glued to each other. Both parts have a size of 3.3 x 4.0 $mm^2$ and consist of an array of 128 x 128 pixels of 25 x 25 $\\micro m^2$ size.

Design of a current based readout chip and development of a DEPFET pixel prototype system for the ILC vertex detector

International Nuclear Information System (INIS)

Trimpl, M.

2005-12-01

The future TeV-scale linear collider ILC (International Linear Collider) offers a large variety of precision measurements complementary to the discovery potential of the LHC (Large Hadron Collider). To fully exploit its physics potential, a vertex detector with unprecedented performance is needed. One proposed technology for the ILC vertex detector is the DEPFET active pixel sensor. The DEPFET sensor offers particle detection with in-pixel amplification by incorporating a field effect transistor into a fully depleted high-ohmic silicon substrate. The device provides an excellent signal-to-noise ratio and a good spatial resolution at the same time. To establish a very fast readout of a DEPFET pixel matrix with row rates of 20 MHz and more, the 128 channel CURO II ASIC has been designed and fabricated. The architecture of the chip is completely based on current mode techniques (SI) perfectly adapted to the current signal of the sensor. For the ILC vertex detector a prototype system with a 64 x 128 DEPFET pixel matrix read out by the CURO II chip has been developed. The design issues and the standalone performance of the readout chip as well as first results with the prototype system will be presented. (orig.)

Design of a current based readout chip and development of a DEPFET pixel prototype system for the ILC vertex detector

Energy Technology Data Exchange (ETDEWEB)

Trimpl, M.

2005-12-15

The future TeV-scale linear collider ILC (International Linear Collider) offers a large variety of precision measurements complementary to the discovery potential of the LHC (Large Hadron Collider). To fully exploit its physics potential, a vertex detector with unprecedented performance is needed. One proposed technology for the ILC vertex detector is the DEPFET active pixel sensor. The DEPFET sensor offers particle detection with in-pixel amplification by incorporating a field effect transistor into a fully depleted high-ohmic silicon substrate. The device provides an excellent signal-to-noise ratio and a good spatial resolution at the same time. To establish a very fast readout of a DEPFET pixel matrix with row rates of 20 MHz and more, the 128 channel CURO II ASIC has been designed and fabricated. The architecture of the chip is completely based on current mode techniques (SI) perfectly adapted to the current signal of the sensor. For the ILC vertex detector a prototype system with a 64 x 128 DEPFET pixel matrix read out by the CURO II chip has been developed. The design issues and the standalone performance of the readout chip as well as first results with the prototype system will be presented. (orig.)

The TDCpix readout ASIC: A 75 ps resolution timing front-end for the NA62 Gigatracker hybrid pixel detector

Energy Technology Data Exchange (ETDEWEB)

Kluge, A., E-mail: alexander.kluge@cern.ch; Aglieri Rinella, G.; Bonacini, S.; Jarron, P.; Kaplon, J.; Morel, M.; Noy, M.; Perktold, L.; Poltorak, K.

2013-12-21

The TDCpix is a novel pixel readout ASIC for the NA62 Gigatracker detector. NA62 is a new experiment being installed at the CERN Super Proton Synchrotron. Its Gigatracker detector shall provide on-beam tracking and time stamping of individual particles with a time resolution of 150 ps rms. It will consist of three tracking stations, each with one hybrid pixel sensor. The peak flow of particles crossing the detector modules reaches 1.27 MHz/mm{sup 2} for a total rate of about 0.75 GHz. Ten TDCpix chips will be bump-bonded to every silicon pixel sensor. Each chip shall perform time stamping of 100 M particle hits per second with a detection efficiency above 99% and a timing accuracy better than 200 ps rms for an overall three-station-setup time resolution of better than 150 ps. The TDCpix chip has been designed in a 130 nm CMOS technology. It will feature 45×40 square pixels of 300×300μm{sup 2} and a complex End of Column peripheral region including an array of TDCs based on DLLs, four high speed serializers, a low-jitter PLL, readout and control circuits. This contribution will describe the complete design of the final TDCpix ASIC. It will discuss design choices, the challenges faced and some of the lessons learned. Furthermore, experimental results from the testing of circuit prototypes will be presented. These demonstrate the achievement of key performance figures such as a time resolution of the processing chain of 75 ps rms with a laser sent to the center of the pixel and the capability of time stamping charged particles with an overall resolution below 200 ps rms. -- Highlights: • Feasibility demonstration of a silicon pixel detector with sub-ns time tagging capability. • Demonstrator detector assembly with a time resolution of 75 ps RMS with laser charge injection; 170 ps RMS with particle beam. • Design of trigger-less TDCpix ASIC with 1800 pixels, 720 TDC channels and 4 3.2 Gbit/s serializers.

Performance of the CMS Phase 1 Pixel Detector

CERN Document Server

Akgun, Bora

2018-01-01

It is anticipated that the LHC accelerator will reach and exceed the luminosity of L = 2$\\times$10$^{34}$cm$^{-2}$s$^{-1}$ during the LHC Run 2 period until 2023. At this higher luminosity and increased hit occupancies the CMS phase-0 pixel detector would have been subjected to severe dead time and inefficiencies introduced by limited buffers in the analog read-out chip and effects of radiation damage in the sensors. Therefore a new pixel detector has been built and replaced the phase-0 detector in the 2016/17 LHC extended year-end technical stop. The CMS phase-1 pixel detector features four central barrel layers and three end-cap disks in forward and backward direction for robust tracking performance, and a significantly reduced overall material budget including new cooling and powering schemes. The design of the new front-end readout chip comprises larger data buffers, an increased transmission bandwidth, and low-threshold comparators. These improvements allow the new pixel detector to sustain and improve t...

Tracking performance of a single-crystal and a polycrystalline diamond pixel-detector

Energy Technology Data Exchange (ETDEWEB)

Menasce, D.; et al.

2013-06-01

We present a comparative characterization of the performance of a single-crystal and a polycrystalline diamond pixel-detector employing the standard CMS pixel readout chips. Measurements were carried out at the Fermilab Test Beam Facility, FTBF, using protons of momentum 120 GeV/c tracked by a high-resolution pixel telescope. Particular attention was directed to the study of the charge-collection, the charge-sharing among adjacent pixels and the achievable position resolution. The performance of the single-crystal detector was excellent and comparable to the best available silicon pixel-detectors. The measured average detection-efficiency was near unity, ε = 0.99860±0.00006, and the position-resolution for shared hits was about 6 μm. On the other hand, the performance of the polycrystalline detector was hampered by its lower charge collection distance and the readout chip threshold. A new readout chip, capable of operating at much lower threshold (around 1 ke^$-$), would be required to fully exploit the potential performance of the polycrystalline diamond pixel-detector.

Diamond and silicon pixel detectors in high radiation environments

Energy Technology Data Exchange (ETDEWEB)

Tsung, Jieh-Wen

2012-10-15

Diamond pixel detector is a promising candidate for tracking of collider experiments because of the good radiation tolerance of diamond. The diamond pixel detector must withstand the radiation damage from 10{sup 16} particles per cm{sup 2}, which is the expected total fluence in High Luminosity Large Hadron Collider. The performance of diamond and silicon pixel detectors are evaluated in this research in terms of the signal-to-noise ratio (SNR). Single-crystal diamond pixel detectors with the most recent readout chip ATLAS FE-I4 are produced and characterized. Based on the results of the measurement, the SNR of diamond pixel detector is evaluated as a function of radiation fluence, and compared to that of planar-silicon ones. The deterioration of signal due to radiation damage is formulated using the mean free path of charge carriers in the sensor. The noise from the pixel readout circuit is simulated and calculated with leakage current and input capacitance to the amplifier as important parameters. The measured SNR shows good agreement with the calculated and simulated results, proving that the performance of diamond pixel detectors can exceed the silicon ones if the particle fluence is more than 10{sup 15} particles per cm{sup 2}.

Diamond and silicon pixel detectors in high radiation environments

International Nuclear Information System (INIS)

Tsung, Jieh-Wen

2012-10-01

Diamond pixel detector is a promising candidate for tracking of collider experiments because of the good radiation tolerance of diamond. The diamond pixel detector must withstand the radiation damage from 10 16 particles per cm 2 , which is the expected total fluence in High Luminosity Large Hadron Collider. The performance of diamond and silicon pixel detectors are evaluated in this research in terms of the signal-to-noise ratio (SNR). Single-crystal diamond pixel detectors with the most recent readout chip ATLAS FE-I4 are produced and characterized. Based on the results of the measurement, the SNR of diamond pixel detector is evaluated as a function of radiation fluence, and compared to that of planar-silicon ones. The deterioration of signal due to radiation damage is formulated using the mean free path of charge carriers in the sensor. The noise from the pixel readout circuit is simulated and calculated with leakage current and input capacitance to the amplifier as important parameters. The measured SNR shows good agreement with the calculated and simulated results, proving that the performance of diamond pixel detectors can exceed the silicon ones if the particle fluence is more than 10 15 particles per cm 2 .

Design and realisation of integrated circuits for the readout of pixel sensors in high-energy physics and biomedical imaging

Energy Technology Data Exchange (ETDEWEB)

Peric, I.

2004-08-01

Radiation tolerant pixel-readout chip for the ATLAS pixel detector has been designed, implemented in a deep-submicron CMOS technology and successfully tested. The chip contains readout-channels with complex analog and digital circuits. Chip for steering of the DEPFET active-pixel matrix has been implemented in a high-voltage CMOS technology. The chip contains channels which generate fast sequences of high-voltage signals. Detector containing this chip has been successfully tested. Pixel-readout test chip for an X-ray imaging pixel sensor has been designed, implemented in a CMOS technology and tested. Pixel-readout channels are able to simultaneously count the signals generated by passage of individual photons and to sum the total charge generated during exposure time. (orig.)

Design of front end electronics and a full scale 4k pixel readout ASIC for the DSSC X-ray detector at the European XFEL

International Nuclear Information System (INIS)

Erdinger, Florian

2016-01-01

The goal of this thesis was to design a large scale readout ASIC for the 1-Mega pixel DEPFET Sensor with Signal Compression (DSSC) detector system which is being developed by an international collaboration for the European XFEL (EuXFEL). Requirements for the DSSC detector include single photon detection down to 0.5 keV combined with a large dynamic range of up to 10000 photons at frame rates of up to 4.5 MHz. The detector core concepts include full parallel readout, signal compression on the sensor or ASIC level, filtering, immediate digitization and local storage within the pixel. The DSSC is a hybrid pixel detector, each sensor pixel mates to a dedicated ASIC pixel, which includes the entire specified signal processing chain along with auxiliary circuits. One ASIC comprises 4096 pixels and a full periphery including biasing and digital control. This thesis presents the design of the ASIC, its components and integration are described in detail. Emphasis is put on the design of the analog front-end. The first full format ASIC (F1) has been fabricated within the scope of this thesis along with numerous test chips. Furthermore, the EuXFEL and the DSSC detector system are presented to create the context for the ASIC, which is the core topic of this thesis.

Design of front end electronics and a full scale 4k pixel readout ASIC for the DSSC X-ray detector at the European XFEL

Energy Technology Data Exchange (ETDEWEB)

Erdinger, Florian

2016-11-22

The goal of this thesis was to design a large scale readout ASIC for the 1-Mega pixel DEPFET Sensor with Signal Compression (DSSC) detector system which is being developed by an international collaboration for the European XFEL (EuXFEL). Requirements for the DSSC detector include single photon detection down to 0.5 keV combined with a large dynamic range of up to 10000 photons at frame rates of up to 4.5 MHz. The detector core concepts include full parallel readout, signal compression on the sensor or ASIC level, filtering, immediate digitization and local storage within the pixel. The DSSC is a hybrid pixel detector, each sensor pixel mates to a dedicated ASIC pixel, which includes the entire specified signal processing chain along with auxiliary circuits. One ASIC comprises 4096 pixels and a full periphery including biasing and digital control. This thesis presents the design of the ASIC, its components and integration are described in detail. Emphasis is put on the design of the analog front-end. The first full format ASIC (F1) has been fabricated within the scope of this thesis along with numerous test chips. Furthermore, the EuXFEL and the DSSC detector system are presented to create the context for the ASIC, which is the core topic of this thesis.

Digital Power Consumption Estimations for CHIPIX65 Pixel Readout Chip

CERN Document Server

Marcotulli, Andrea

2016-01-01

New hybrid pixel detectors with improved resolution capable of dealing with hit rates up to 3 GHz/cm2 will be required for future High Energy Physics experiments in the Large Hadron Collider (LHC) at CERN. Given this, the RD53 collaboration works on the design of the next generation pixel readout chip needed for both the ATLAS and CMS detector phase 2 pixel upgrades. For the RD53 demonstrator chip in 65nm CMOS technology, different architectures are considered. In particular the purpose of this work is estimating the power consumption of the digital architecture of the readout ASIC developed by CHIPIX65 project of the INFN National Scientific Committee. This has been done with modern chip design tools integrated with the VEPIX53 simulation framework that has been developed within the RD53 collaboration in order to assess the performance of the system in very high rate, high energy physics experiments.

Status of the digital pixel array detector for protein crystallography

CERN Document Server

Datte, P; Beuville, E; Endres, N; Druillole, F; Luo, L; Millaud, J E; Xuong, N H

1999-01-01

A two-dimensional photon counting digital pixel array detector is being designed for static and time resolved protein crystallography. The room temperature detector will significantly enhance monochromatic and polychromatic protein crystallographic through-put data rates by more than three orders of magnitude. The detector has an almost infinite photon counting dynamic range and exhibits superior spatial resolution when compared to present crystallographic phosphor imaging plates or phosphor coupled CCD detectors. The detector is a high resistivity N-type Si with a pixel pitch of 150x150 mu m, and a thickness of 300 mu m, and is bump bonded to an application specific integrated circuit. The event driven readout of the detector is based on the column architecture and allows an independent pixel hit rate above 1 million photons/s/pixel. The device provides energy discrimination and sparse data readout which yields minimal dead-time. This type of architecture allows a continuous (frameless) data acquisition, a f...

Electron imaging with Medipix2 hybrid pixel detector

CERN Document Server

McMullan, G; Chen, S; Henderson, R; Llopart, X; Summerfield, C; Tlustos, L; Faruqi, A R

2007-01-01

The electron imaging performance of Medipix2 is described. Medipix2 is a hybrid pixel detector composed of two layers. It has a sensor layer and a layer of readout electronics, in which each 55 μm×55 μm pixel has upper and lower energy discrimination and MHz rate counting. The sensor layer consists of a 300 μm slab of pixellated monolithic silicon and this is bonded to the readout chip. Experimental measurement of the detective quantum efficiency, DQE(0) at 120 keV shows that it can reach 85% independent of electron exposure, since the detector has zero noise, and the DQE(Nyquist) can reach 35% of that expected for a perfect detector (4/π2). Experimental measurement of the modulation transfer function (MTF) at Nyquist resolution for 120 keV electrons using a 60 keV lower energy threshold, yields a value that is 50% of that expected for a perfect detector (2/π). Finally, Monte Carlo simulations of electron tracks and energy deposited in adjacent pixels have been performed and used to calculate expected v...

The Upgraded Pixel Detector of the ATLAS Experiment for Run-2

CERN Document Server

Ferrere, Didier; The ATLAS collaboration

2016-01-01

Run-2 of the LHC is providing new challenges to track and vertex reconstruction with higher energies, denser jets and higher rates. Therefore the ATLAS experiment has constructed the first 4-layer Pixel detector in HEP, installing a new Pixel layer, also called Insertable B-Layer (IBL). IBL is a fourth layer of pixel detectors, and has been installed in May 2014 at a radius of 3.3 cm between the existing Pixel Detector and a new smaller radius beam-pipe. The new detector, built to cope with high radiation and expected occupancy, is the first large scale application of 3D detectors and CMOS 130nm technology. In addition the Pixel detector was refurbished with a new service quarter panel to recover about 3% of defective modules lost during run-1 and a new optical readout system to readout the data at higher speed while reducing the occupancy when running with increased luminosity. The commissioning and performance of the 4-layer Pixel Detector, in particular the IBL, will be presented, using collision data.

Readout Architecture for Hybrid Pixel Readout Chips

CERN Document Server

AUTHOR|(SzGeCERN)694170; Westerlund, Tomi; Wyllie, Ken

The original contribution of this thesis to knowledge are novel digital readout architectures for hybrid pixel readout chips. The thesis presents asynchronous bus-based architecture, a data-node based column architecture and a network-based pixel matrix architecture for data transportation. It is shown that the data-node architecture achieves readout efficiency 99 % with half the output rate as a bus-based system. The network-based solution avoids ``broken'' columns due to some manufacturing errors, and it distributes internal data traffic more evenly across the pixel matrix than column-based architectures. An improvement of $>$ 10 % to the efficiency is achieved with uniform and non-uniform hit occupancies. Architectural design has been done using transaction level modeling ($TLM$) and sequential high-level design techniques for reducing the design and simulation time. It has been possible to simulate tens of column and full chip architectures using the high-level techniques. A decrease of $>$ 10 in run-time...

Monolithic pixels on moderate resistivity substrate and sparsifying readout architecture

CERN Document Server

Giubilato, P; Snoeys, W; Bisello, D; Marchioro, A; Battaglia, M; Demaria, L; Mansuy, S C; Pantano, D; Rousset, J; Mattiazzo, S; Kloukinas, K; Potenza, A; Ikemoto, Y; Rivetti, A; Chalmet, P; Mugnier, H; Silvestrin, L

2013-01-01

The LePix projects aim realizing a new generation monolithic pixel detectors with improved performances at lesser cost with respect to both current state of the art monolithic and hybrid pixel sensors. The detector is built in a 90 nm CMOS process on a substrate of moderate resistivity. This allows charge collection by drift while maintaining the other advantages usually offered by MAPS, like having a single piece detector and using a standard CMOS production line. The collection by drift mechanism, coupled to the low capacitance design of the collecting node made possible by the monolithic approach, provides an excellent signal to noise ratio straight at the pixel cell together with a radiation tolerance far superior to conventional un-depleted MAPS. The excellent signal-to-noise performance is demonstrated by the device ability to separate the 6 keV Fe-55 double peak at room temperature. To achieve high granularity (10-20 mu m pitch pixels) over large detector areas maintaining high readout speed, a complet...

Study of Charge Diffusion in a Silicon Detector Using an Energy Sensitive Pixel Readout Chip

CERN Document Server

Schioppa, E. J.; van Beuzekom, M.; Visser, J.; Koffeman, E.; Heijne, E.; Engel, K. J.; Uher, J.

2015-01-01

A 300 μm thick thin p-on-n silicon sensor was connected to an energy sensitive pixel readout ASIC and exposed to a beam of highly energetic charged particles. By exploiting the spectral information and the fine segmentation of the detector, we were able to measure the evolution of the transverse profile of the charge carriers cloud in the sensor as a function of the drift distance from the point of generation. The result does not rely on model assumptions or electric field calculations. The data are also used to validate numerical simulations and to predict the detector spectral response to an X-ray fluorescence spectrum for applications in X-ray imaging.

Technological aspects of gaseous pixel detectors fabrication

NARCIS (Netherlands)

Blanco Carballo, V.M.; Salm, Cora; Smits, Sander M.; Schmitz, Jurriaan; Melai, J.; Chefdeville, M.A.; van der Graaf, H.

2007-01-01

Integrated gaseous pixel detectors consisting of a metal punctured foil suspended in the order of 50μm over a pixel readout chip by means by SU-8 insulating pillars have been fabricated. SU-8 is used as sacrificial layer but metallization over uncrosslinked SU-8 presents adhesion and stress

Gossipo-3 A prototype of a Front-End Pixel Chip for Read-Out of Micro-Pattern Gas Detectors

CERN Document Server

Brezina, Christpoh; van der Graaf, Haryy; Gromov, Vladimir; Kluit, Ruud; Kruth, Andre; Zappon, Francesco

2009-01-01

In a joint effort of Nikhef (Amsterdam) and the University of Bonn, the Gossipo-3 integrated circuit (IC) has been developed. This circuit is a prototype of a chip dedicated for read-out of various types of position sensitive Micro-Pattern Gas detectors (MPGD). The Gossipo-3 is defined as a set of building blocks to be used in a future highly granulated (60 μm) chip. The pixel circuit can operate in two modes. In Time mode every readout pixel measures the hit arrival time and the charge deposit. For this purpose it has been equipped with a high resolution TDC (1.7 ns) covering dynamic range up to 102 μs. Charge collected by the pixel will be measured using Time-over- Threshold method in the range from 400 e- to 28000 e- with accuracy of 200 e- (standard deviation). In Counting mode every pixel operates as a 24-bit counter, counting the number of incoming hits. The circuit is also optimized to operate at low power consumption (100 mW/cm2) that is required to avoid the need for massive power transport and coo...

Operational Experience with the ATLAS Pixel Detector

CERN Document Server

Djama, Fares; The ATLAS collaboration

2017-01-01

Run-2 of the LHC is providing new challenges to track and vertex reconstruction imposed by the higher collision energy, pileup and luminosity that are being delivered. The ATLAS tracking performance relies critically on the Pixel Detector, therefore, in view of Run-2 of LHC, the ATLAS experiment has constructed the first 4-layer Pixel detector in HEP, installing a new Pixel layer, also called Insertable B-Layer (IBL). Pixel detector was refurbished with a new service quarter panel to recover about 3% of defective modules lost during run-1 and an additional optical link per module was added to overcome in some layers the readout bandwidth limitation when LHC will exceed the nominal peak luminosity by almost a factor of 3. The key features and challenges met during the IBL project will be presented, as well as its operational experience and Pixel Detector performance in LHC.

A prototype pixel readout chip for asynchronous detection applications

International Nuclear Information System (INIS)

Raymond, D.M.; Hall, G.; Lewis, A.J.; Sharp, P.H.

1991-01-01

A two-dimensional array of amplifier cells has been fabricated as a prototype readout system for a matching array of silicon diode detectors. Each cell contains a preamplifier, shaping amplifier, comparator and analogue signal storage in an area of 300 μmx320 μm using 3 μm CMOS technology. Full size chips will be bump bonded to pixel detector arrays. Low noise and asynchronous operation are novel design features. With noise levels of less than 250 rms electrons for input capacitances up to 600 fF, pixel detectors will be suitable for autoradiography, synchrotron X-ray and high energy particle detection applications. The design of the prototype chip is presented and future developments and prospects for applications are discussed. (orig.)

Integration of the CMS Phase 1 Pixel Detector

CERN Document Server

Kornmayer, Andreas

2018-01-01

During the extended year-end technical stop 2016/17 the CMS Pixel Detector has been replaced. The new Phase 1 Pixel Detector is designed for a luminosity that could exceed $\\text{L} = 2x10^{34} cm^{−2}s^{−1}$. With one additional layer in the barrel and the forward region of the new detector, combined with the higher hit rates as the LHC luminosity increases, these conditions called for an upgrade of the data acquisition system, which was realised based on the $\\mu$TCA standard. This contribution focuses on the experiences with integration of the new detector readout and control system and reports on the operational performance of the CMS Pixel detector.

Monolithic pixels on moderate resistivity substrate and sparsifying readout architecture

International Nuclear Information System (INIS)

Giubilato, P.; Battaglia, M.; Bisello, D.; Caselle, M.; Chalmet, P.; Demaria, L.; Ikemoto, Y.; Kloukinas, K.; Mansuy, S.C.; Mattiazzo, S.; Marchioro, A.; Mugnier, H.; Pantano, D.; Potenza, A.; Rivetti, A.; Rousset, J.; Silvestrin, L.; Snoeys, W.

2013-01-01

The LePix projects aim realizing a new generation monolithic pixel detectors with improved performances at lesser cost with respect to both current state of the art monolithic and hybrid pixel sensors. The detector is built in a 90 nm CMOS process on a substrate of moderate resistivity. This allows charge collection by drift while maintaining the other advantages usually offered by MAPS, like having a single piece detector and using a standard CMOS production line. The collection by drift mechanism, coupled to the low capacitance design of the collecting node made possible by the monolithic approach, provides an excellent signal to noise ratio straight at the pixel cell together with a radiation tolerance far superior to conventional un-depleted MAPS. The excellent signal-to-noise performance is demonstrated by the device ability to separate the 6 keV 55 Fe double peak at room temperature. To achieve high granularity (10–20 µm pitch pixels) over large detector areas maintaining high readout speed, a completely new compressing architecture has been devised. This architecture departs from the mainstream hybrid pixel sparsification approach, which uses in-pixel logic to reduce data, by using topological compression to minimize pixel area and power consumption

The ALICE silicon pixel detector front-end and read-out electronics

CERN Document Server

Kluge, A

2006-01-01

The ALICE silicon pixel detector (SPD) comprises the two innermost barrel layers of the ALICE inner tracker system. The SPD includes 120 half staves each of which consists of a linear array of 10 ALICE pixel chips bump bonded to two silicon sensors. Each pixel chip contains 8192 active cells, so the total number of pixel cells in the SPD is ≈107. The tight material budget and the limitation in physical dimensions required by the detector design introduce new challenges for the integration of the on-detector electronics. An essential part of the half stave is a low-mass multi-layer flex that carries power, ground, and signals to the pixel chips. Each half stave is read out using a multi-chip module (MCM). The MCM contains three radiation hard ASICs and an 800 Mbit/s custom developed optical link for the data transfer between the detector and the control room. The detector components are less than 3 mm thick. The production of the half-staves and MCMs is currently under way. Test results as well as on overvie...

Data acquisition at the front-end of the Mu3e pixel detector

Energy Technology Data Exchange (ETDEWEB)

Perrevoort, Ann-Kathrin [Physikalisches Institut, Universitaet Heidelberg (Germany); Collaboration: Mu3e-Collaboration

2016-07-01

The Mu3e experiment - searching for the lepton-flavour violating decay of the muon into three electrons at an unprecedented sensitivity of one in 10{sup 16} decays - is based on a pixel tracking detector. The sensors are High-Voltage Monolithic Active Pixel Sensors, a technology which allows for very fast and thin detectors, and thus is an ideal fit for Mu3e where the trajectories of low-momentum electrons at high rates are to be measured. The detector will consist of about 275 million pixels and will be operated at up to 10{sup 9} muon stops per second. Therefore, a fast and trigger-less data readout is required. The pixel sensors feature zero-suppressed data output via high-speed serial links. The data is then buffered and sorted by time on a FPGA on the front-end before being processed to the following readout stage. In this talk, the readout of the Mu3e pixel detector at the front-end is introduced. Furthermore, a first firmware implementation of this concept in a beam telescope consisting of the current pixel sensor prototype MuPix7 is presented.

SPIDR, a general-purpose readout system for pixel ASICs

International Nuclear Information System (INIS)

Heijden, B. van der; Visser, J.; Beuzekom, M. van; Boterenbrood, H.; Munneke, B.; Schreuder, F.; Kulis, S.

2017-01-01

The SPIDR (Speedy PIxel Detector Readout) system is a flexible general-purpose readout platform that can be easily adapted to test and characterize new and existing detector readout ASICs. It is originally designed for the readout of pixel ASICs from the Medipix/Timepix family, but other types of ASICs or front-end circuits can be read out as well. The SPIDR system consists of an FPGA board with memory and various communication interfaces, FPGA firmware, CPU subsystem and an API library on the PC . The FPGA firmware can be adapted to read out other ASICs by re-using IP blocks. The available IP blocks include a UDP packet builder, 1 and 10 Gigabit Ethernet MAC's and a 'soft core' CPU . Currently the firmware is targeted at the Xilinx VC707 development board and at a custom board called Compact-SPIDR . The firmware can easily be ported to other Xilinx 7 series and ultra scale FPGAs. The gap between an ASIC and the data acquisition back-end is bridged by the SPIDR system. Using the high pin count VITA 57 FPGA Mezzanine Card (FMC) connector only a simple chip carrier PCB is required. A 1 and a 10 Gigabit Ethernet interface handle the connection to the back-end. These can be used simultaneously for high-speed data and configuration over separate channels. In addition to the FMC connector, configurable inputs and outputs are available for synchronization with other detectors. A high resolution (≈ 27 ps bin size) Time to Digital converter is provided for time stamping events in the detector. The SPIDR system is frequently used as readout for the Medipix3 and Timepix3 ASICs. Using the 10 Gigabit Ethernet interface it is possible to read out a single chip at full bandwidth or up to 12 chips at a reduced rate. Another recent application is the test-bed for the VeloPix ASIC, which is developed for the Vertex Detector of the LHCb experiment. In this case the SPIDR system processes the 20 Gbps scrambled data stream from the VeloPix and distributes it over four

The TDCpix readout ASIC: A 75ps resolution timing front-end for the NA62 Gigatracker hybrid pixel detector

CERN Document Server

Kluge, A; Bonacini, S; Jarron, P; Kaplon, J; Morel, M; Noy, M; Perktold, L; Poltorak, K

2013-01-01

The TDCpix is a novel pixel readout ASIC for the NA62 Gigatracker detector. NA62 is a new experiment being installed at the CERN Super Proton Synchrotron. Its Gigatracker detector shall provide on-beam tracking and time stamping of individual particles with a time resolution of 150 ps rms. It will consist of three tracking stations, each with one hybrid pixel sensor. The peak fl ow of particles crossing the detector modules reaches 1.27 MHz/mm 2 for a total rate of about 0.75 GHz. Ten TDCpix chips will be bump-bonded to every silicon pixel sensor. Each chip shall perform time stamping of 100 M particle hits per second with a detection ef fi ciency above 99% and a timing accuracy better than 200 ps rms for an overall three-station-setup time resolution of better than 150 ps. The TDCpix chip has been designed in a 130 nm CMOS technology. It will feature 45 40 square pixels of 300 300 μ m 2 and a complex End of Column peripheral region including an array of TDCs based on DLLs, four high speed serializers, a low...

Recent progress in the development of a B-factory monolithic active pixel detector

International Nuclear Information System (INIS)

Stanic, S.; Aihara, H.; Barbero, M.; Bozek, A.; Browder, T.; Hazumi, M.; Kennedy, J.; Kent, N.; Olsen, S.; Palka, H.; Rosen, M.; Ruckman, L.; Trabelsi, K.; Tsuboyama, T.; Uchida, K.; Varner, G.; Yang, Q.

2006-01-01

Due to the need for precise vertexing at future higher luminosity B-factories with the expectedly increasing track densities and radiation exposures, upgrade of present silicon strip detectors with thin, radiation resistant pixel detectors is highly desired. Considerable progress in the technological development of thin CMOS based Monolithic Active Pixel Sensors (MAPS) in the last years makes them a realistic upgrade option and the feasibility studies of their application in Belle are actively pursued. The most serious concerns are their radiation hardness and their read-out speed. To address them, several prototypes denoted as Continuous Acquisition Pixel (CAP) sensors have been developed and tested. The latest of the CAP sensor prototypes is CAP3, designed in the TSMC 0.25μm process with a 5-deep sample pair pipeline in each pixel. A setup with several CAP3 sensors will be used to assess the performance of a full scale pixel read-out system running at realistic read-out speed. The results and plans for the next stages of R and D towards a full Pixel Vertex Detector (PVD) are presented

Development and characterization of diamond and 3D-silicon pixel detectors with ATLAS-pixel readout electronics

International Nuclear Information System (INIS)

Mathes, Markus

2008-12-01

Hybrid pixel detectors are used for particle tracking in the innermost layers of current high energy experiments like ATLAS. After the proposed luminosity upgrade of the LHC, they will have to survive very high radiation fluences of up to 10 16 particles per cm 2 per life time. New sensor concepts and materials are required, which promise to be more radiation tolerant than the currently used planar silicon sensors. Most prominent candidates are so-called 3D-silicon and single crystal or poly-crystalline diamond sensors. Using the ATLAS pixel electronics different detector prototypes with a pixel geometry of 400 x 50 μm 2 have been built. In particular three devices have been studied in detail: a 3D-silicon and a single crystal diamond detector with an active area of about 1 cm 2 and a poly-crystalline diamond detector of the same size as a current ATLAS pixel detector module (2 x 6 cm 2 ). To characterize the devices regarding their particle detection efficiency and spatial resolution, the charge collection inside a pixel cell as well as the charge sharing between adjacent pixels was studied using a high energy particle beam. (orig.)

System test and noise performance studies at the ATLAS pixel detector

International Nuclear Information System (INIS)

Weingarten, J.

2007-09-01

The central component of the ATLAS Inner Tracker is the pixel detector. It consists of three barrel layers and three disk-layers in the end-caps in both forward directions. The innermost barrel layer is mounted at a distance of about 5 cm from the interaction region. With its very high granularity, truly two-dimensional hit information, and fast readout it is well suited to cope with the high densities of charged tracks, expected this close to the interaction region. The huge number of readout channels necessitates a very complex services infrastructure for powering, readout and safety. After a description of the pixel detector and its services infrastructure, key results from the system test at CERN are presented. Furthermore the noise performance of the pixel detector, crucial for high tracking and vertexing efficiencies, is studied. Measurements of the single-channel random noise are presented together with studies of common mode noise and measurements of the noise occupancy using a random trigger generator. (orig.)

System test and noise performance studies at the ATLAS pixel detector

Energy Technology Data Exchange (ETDEWEB)

Weingarten, J.

2007-09-15

The central component of the ATLAS Inner Tracker is the pixel detector. It consists of three barrel layers and three disk-layers in the end-caps in both forward directions. The innermost barrel layer is mounted at a distance of about 5 cm from the interaction region. With its very high granularity, truly two-dimensional hit information, and fast readout it is well suited to cope with the high densities of charged tracks, expected this close to the interaction region. The huge number of readout channels necessitates a very complex services infrastructure for powering, readout and safety. After a description of the pixel detector and its services infrastructure, key results from the system test at CERN are presented. Furthermore the noise performance of the pixel detector, crucial for high tracking and vertexing efficiencies, is studied. Measurements of the single-channel random noise are presented together with studies of common mode noise and measurements of the noise occupancy using a random trigger generator. (orig.)

Electron imaging with Medipix2 hybrid pixel detector

International Nuclear Information System (INIS)

McMullan, G.; Cattermole, D.M.; Chen, S.; Henderson, R.; Llopart, X.; Summerfield, C.; Tlustos, L.; Faruqi, A.R.

2007-01-01

The electron imaging performance of Medipix2 is described. Medipix2 is a hybrid pixel detector composed of two layers. It has a sensor layer and a layer of readout electronics, in which each 55 μmx55 μm pixel has upper and lower energy discrimination and MHz rate counting. The sensor layer consists of a 300 μm slab of pixellated monolithic silicon and this is bonded to the readout chip. Experimental measurement of the detective quantum efficiency, DQE(0) at 120 keV shows that it can reach ∼85% independent of electron exposure, since the detector has zero noise, and the DQE(Nyquist) can reach ∼35% of that expected for a perfect detector (4/π 2 ). Experimental measurement of the modulation transfer function (MTF) at Nyquist resolution for 120 keV electrons using a 60 keV lower energy threshold, yields a value that is 50% of that expected for a perfect detector (2/π). Finally, Monte Carlo simulations of electron tracks and energy deposited in adjacent pixels have been performed and used to calculate expected values for the MTF and DQE as a function of the threshold energy. The good agreement between theory and experiment allows suggestions for further improvements to be made with confidence. The present detector is already very useful for experiments that require a high DQE at very low doses

Electron imaging with Medipix2 hybrid pixel detector.

Science.gov (United States)

McMullan, G; Cattermole, D M; Chen, S; Henderson, R; Llopart, X; Summerfield, C; Tlustos, L; Faruqi, A R

2007-01-01

The electron imaging performance of Medipix2 is described. Medipix2 is a hybrid pixel detector composed of two layers. It has a sensor layer and a layer of readout electronics, in which each 55 microm x 55 microm pixel has upper and lower energy discrimination and MHz rate counting. The sensor layer consists of a 300 microm slab of pixellated monolithic silicon and this is bonded to the readout chip. Experimental measurement of the detective quantum efficiency, DQE(0) at 120 keV shows that it can reach approximately 85% independent of electron exposure, since the detector has zero noise, and the DQE(Nyquist) can reach approximately 35% of that expected for a perfect detector (4/pi(2)). Experimental measurement of the modulation transfer function (MTF) at Nyquist resolution for 120 keV electrons using a 60 keV lower energy threshold, yields a value that is 50% of that expected for a perfect detector (2/pi). Finally, Monte Carlo simulations of electron tracks and energy deposited in adjacent pixels have been performed and used to calculate expected values for the MTF and DQE as a function of the threshold energy. The good agreement between theory and experiment allows suggestions for further improvements to be made with confidence. The present detector is already very useful for experiments that require a high DQE at very low doses.

An asynchronous data-driven readout prototype for CEPC vertex detector

Science.gov (United States)

Yang, Ping; Sun, Xiangming; Huang, Guangming; Xiao, Le; Gao, Chaosong; Huang, Xing; Zhou, Wei; Ren, Weiping; Li, Yashu; Liu, Jianchao; You, Bihui; Zhang, Li

2017-12-01

The Circular Electron Positron Collider (CEPC) is proposed as a Higgs boson and/or Z boson factory for high-precision measurements on the Higgs boson. The precision of secondary vertex impact parameter plays an important role in such measurements which typically rely on flavor-tagging. Thus silicon CMOS Pixel Sensors (CPS) are the most promising technology candidate for a CEPC vertex detector, which can most likely feature a high position resolution, a low power consumption and a fast readout simultaneously. For the R&D of the CEPC vertex detector, we have developed a prototype MIC4 in the Towerjazz 180 nm CMOS Image Sensor (CIS) process. We have proposed and implemented a new architecture of asynchronous zero-suppression data-driven readout inside the matrix combined with a binary front-end inside the pixel. The matrix contains 128 rows and 64 columns with a small pixel pitch of 25 μm. The readout architecture has implemented the traditional OR-gate chain inside a super pixel combined with a priority arbiter tree between the super pixels, only reading out relevant pixels. The MIC4 architecture will be introduced in more detail in this paper. It will be taped out in May and will be characterized when the chip comes back.

Fully integrated CMOS pixel detector for high energy particles

International Nuclear Information System (INIS)

Vanstraelen, G.; Debusschere, I.; Claeys, C.; Declerck, G.

1989-01-01

A novel type of position and energy sensitive, monolithic pixel array with integrated readout electronics is proposed. Special features of the design are a reduction of the number of output channels and of the amount of output data, and the use of transistors on the high resistivity silicon. The number of output channels for the detector array is reduced by handling in parallel a number of pixels, chosen as a function of the time resolution required for the system, and by the use of an address decoder. A further reduction of data is achieved by reading out only those pixels which have been activated. The pixel detector circuit will be realized in a 3 μm p-well CMOS process, which is optimized for the full integration of readout electronics and detector diodes on high resistivity Si. A retrograde well is formed by means of a high energy implantation, followed by the appropriate temperature steps. The optimization of the well shape takes into account the high substrate bias applied during the detector operation. The design is largely based on the use of MOS transistors on the high resistivity silicon itself. These have proven to perform as well as transistors on standard doped substrate. The basic building elements as well as the design strategy of the integrated pixel detector are presented in detail. (orig.)

Development of readout system for FE-I4 pixel module using SiTCP

Energy Technology Data Exchange (ETDEWEB)

Teoh, J.J., E-mail: jjteoh@champ.hep.sci.osaka-u.ac.jp [Graduate School of Science, Osaka University, 1-1 Machikaneyama, Toyonaka, Osaka, 560-0043 (Japan); Hanagaki, K. [Graduate School of Science, Osaka University, 1-1 Machikaneyama, Toyonaka, Osaka, 560-0043 (Japan); Ikegami, Y.; Takubo, Y.; Terada, S.; Unno, Y. [Institute for Particle and Nuclear Studies, High Energy Accelerator Research Organization (KEK), 1-1 Oho, Tsukuba City, Ibaraki-ken 305-0801 (Japan)

2013-12-11

The ATLAS pixel detector will be replaced in the future High Luminosity-Large Hadron Collider (HL-LHC) upgrade to preserve or improve the detector performance at high luminosity environment. To meet the tight requirements of the upgrade, a new pixel Front-End (FE) Integrated Circuit (IC) called FE-I4 has been developed. We have then devised a readout system for the new FE IC. Our system incorporates Silicon Transmission Control Protocol (SiTCP) technology (Uchida, 2008 [1]) which utilizes the standard TCP/IP and UDP communication protocols. This technology allows direct data access and transfer between a readout hardware chain and PC via a high speed Ethernet. In addition, the communication protocols are small enough to be implemented in a single Field-Programable Gate Array (FPGA). Relying on this technology, we have been able to construct a very compact, versatile and fast readout system. We have developed a firmware and software together with the readout hardware chain. We also have established basic functionalities for reading out FE-I4.

Toward VIP-PIX: A Low Noise Readout ASIC for Pixelated CdTe Gamma-Ray Detectors for Use in the Next Generation of PET Scanners.

Science.gov (United States)

Macias-Montero, Jose-Gabriel; Sarraj, Maher; Chmeissani, Mokhtar; Puigdengoles, Carles; Lorenzo, Gianluca De; Martínez, Ricardo

2013-08-01

VIP-PIX will be a low noise and low power pixel readout electronics with digital output for pixelated Cadmium Telluride (CdTe) detectors. The proposed pixel will be part of a 2D pixel-array detector for various types of nuclear medicine imaging devices such as positron-emission tomography (PET) scanners, Compton gamma cameras, and positron-emission mammography (PEM) scanners. Each pixel will include a SAR ADC that provides the energy deposited with 10-bit resolution. Simultaneously, the self-triggered pixel which will be connected to a global time-to-digital converter (TDC) with 1 ns resolution will provide the event's time stamp. The analog part of the readout chain and the ADC have been fabricated with TSMC 0.25 μ m mixed-signal CMOS technology and characterized with an external test pulse. The power consumption of these parts is 200 μ W from a 2.5 V supply. It offers 4 switchable gains from ±10 mV/fC to ±40 mV/fC and an input charge dynamic range of up to ±70 fC for the minimum gain for both polarities. Based on noise measurements, the expected equivalent noise charge (ENC) is 65 e - RMS at room temperature.

Development and characterization of diamond and 3D-silicon pixel detectors with ATLAS-pixel readout electronics

Energy Technology Data Exchange (ETDEWEB)

Mathes, Markus

2008-12-15

Hybrid pixel detectors are used for particle tracking in the innermost layers of current high energy experiments like ATLAS. After the proposed luminosity upgrade of the LHC, they will have to survive very high radiation fluences of up to 10{sup 16} particles per cm{sup 2} per life time. New sensor concepts and materials are required, which promise to be more radiation tolerant than the currently used planar silicon sensors. Most prominent candidates are so-called 3D-silicon and single crystal or poly-crystalline diamond sensors. Using the ATLAS pixel electronics different detector prototypes with a pixel geometry of 400 x 50 {mu}m{sup 2} have been built. In particular three devices have been studied in detail: a 3D-silicon and a single crystal diamond detector with an active area of about 1 cm{sup 2} and a poly-crystalline diamond detector of the same size as a current ATLAS pixel detector module (2 x 6 cm{sup 2}). To characterize the devices regarding their particle detection efficiency and spatial resolution, the charge collection inside a pixel cell as well as the charge sharing between adjacent pixels was studied using a high energy particle beam. (orig.)

Commissioning and first results from the CMS phase-1 upgrade pixel detector

CERN Document Server

Sonneveld, Jorine Mirjam

2017-01-01

The phase~1 upgrade of the CMS pixel detector has been designed to maintain the tracking performance at instantaneous luminosities of $2 \\times 10^{34} \\mathrm{~cm}^{-2} \\mathrm{~s}^{-1}$. Both barrel and endcap disk systems now feature one extra layer (4 barrel layers and 3 endcap disks), and a digital readout that provides a large enough bandwidth to read out its 124M pixel channels (87.7 percent more pixels compared to the previous system). The backend control and readout systems have been upgraded accordingly from VME-based to micro-TCA-based ones. The detector is now also fitted with a bi-phase CO$_2$ cooling system that reduces the material budget in the tracking region. The detector has been installed inside CMS at the start of 2017 and is now taking data. These proceedings discuss experiences in the commissioning and operation of the CMS phase~1 pixel detector. The first results from the CMS phase~1 pixel detector with this year's LHC proton-proton collision data are presented. ...

Low-power priority Address-Encoder and Reset-Decoder data-driven readout for Monolithic Active Pixel Sensors for tracker system

International Nuclear Information System (INIS)

Yang, P.; Aglieri, G.; Cavicchioli, C.; Chalmet, P.L.; Chanlek, N.; Collu, A.; Gao, C.; Hillemanns, H.; Junique, A.; Kofarago, M.; Keil, M.; Kugathasan, T.; Kim, D.; Kim, J.; Lattuca, A.; Marin Tobon, C.A.; Marras, D.; Mager, M.; Martinengo, P.; Mazza, G.

2015-01-01

Active Pixel Sensors used in High Energy Particle Physics require low power consumption to reduce the detector material budget, low integration time to reduce the possibilities of pile-up and fast readout to improve the detector data capability. To satisfy these requirements, a novel Address-Encoder and Reset-Decoder (AERD) asynchronous circuit for a fast readout of a pixel matrix has been developed. The AERD data-driven readout architecture operates the address encoding and reset decoding based on an arbitration tree, and allows us to readout only the hit pixels. Compared to the traditional readout structure of the rolling shutter scheme in Monolithic Active Pixel Sensors (MAPS), AERD can achieve a low readout time and a low power consumption especially for low hit occupancies. The readout is controlled at the chip periphery with a signal synchronous with the clock, allows a good digital and analogue signal separation in the matrix and a reduction of the power consumption. The AERD circuit has been implemented in the TowerJazz 180 nm CMOS Imaging Sensor (CIS) process with full complementary CMOS logic in the pixel. It works at 10 MHz with a matrix height of 15 mm. The energy consumed to read out one pixel is around 72 pJ. A scheme to boost the readout speed to 40 MHz is also discussed. The sensor chip equipped with AERD has been produced and characterised. Test results including electrical beam measurement are presented

Low-power priority Address-Encoder and Reset-Decoder data-driven readout for Monolithic Active Pixel Sensors for tracker system

Energy Technology Data Exchange (ETDEWEB)

Yang, P., E-mail: yangping0710@126.com [Central China Normal University, Wuhan (China); Aglieri, G.; Cavicchioli, C. [CERN, 1210 Geneva 23 (Switzerland); Chalmet, P.L. [MIND, Archamps (France); Chanlek, N. [Suranaree University of Technology, Nakhon Ratchasima (Thailand); Collu, A. [University of Cagliari, Cagliari (Italy); INFN (Italy); Gao, C. [Central China Normal University, Wuhan (China); Hillemanns, H.; Junique, A. [CERN, 1210 Geneva 23 (Switzerland); Kofarago, M. [CERN, 1210 Geneva 23 (Switzerland); University of Utrecht, Utrecht (Netherlands); Keil, M.; Kugathasan, T. [CERN, 1210 Geneva 23 (Switzerland); Kim, D. [Dongguk and Yonsei University, Seoul (Korea, Republic of); Kim, J. [Pusan National University, Busan (Korea, Republic of); Lattuca, A. [University of Torino, Torino (Italy); INFN (Italy); Marin Tobon, C.A. [CERN, 1210 Geneva 23 (Switzerland); Marras, D. [University of Cagliari, Cagliari (Italy); INFN (Italy); Mager, M.; Martinengo, P. [CERN, 1210 Geneva 23 (Switzerland); Mazza, G. [University of Torino, Torino (Italy); INFN (Italy); and others

2015-06-11

Active Pixel Sensors used in High Energy Particle Physics require low power consumption to reduce the detector material budget, low integration time to reduce the possibilities of pile-up and fast readout to improve the detector data capability. To satisfy these requirements, a novel Address-Encoder and Reset-Decoder (AERD) asynchronous circuit for a fast readout of a pixel matrix has been developed. The AERD data-driven readout architecture operates the address encoding and reset decoding based on an arbitration tree, and allows us to readout only the hit pixels. Compared to the traditional readout structure of the rolling shutter scheme in Monolithic Active Pixel Sensors (MAPS), AERD can achieve a low readout time and a low power consumption especially for low hit occupancies. The readout is controlled at the chip periphery with a signal synchronous with the clock, allows a good digital and analogue signal separation in the matrix and a reduction of the power consumption. The AERD circuit has been implemented in the TowerJazz 180 nm CMOS Imaging Sensor (CIS) process with full complementary CMOS logic in the pixel. It works at 10 MHz with a matrix height of 15 mm. The energy consumed to read out one pixel is around 72 pJ. A scheme to boost the readout speed to 40 MHz is also discussed. The sensor chip equipped with AERD has been produced and characterised. Test results including electrical beam measurement are presented.

Low-power priority Address-Encoder and Reset-Decoder data-driven readout for Monolithic Active Pixel Sensors for tracker system

Science.gov (United States)

Yang, P.; Aglieri, G.; Cavicchioli, C.; Chalmet, P. L.; Chanlek, N.; Collu, A.; Gao, C.; Hillemanns, H.; Junique, A.; Kofarago, M.; Keil, M.; Kugathasan, T.; Kim, D.; Kim, J.; Lattuca, A.; Marin Tobon, C. A.; Marras, D.; Mager, M.; Martinengo, P.; Mazza, G.; Mugnier, H.; Musa, L.; Puggioni, C.; Rousset, J.; Reidt, F.; Riedler, P.; Snoeys, W.; Siddhanta, S.; Usai, G.; van Hoorne, J. W.; Yi, J.

2015-06-01

Active Pixel Sensors used in High Energy Particle Physics require low power consumption to reduce the detector material budget, low integration time to reduce the possibilities of pile-up and fast readout to improve the detector data capability. To satisfy these requirements, a novel Address-Encoder and Reset-Decoder (AERD) asynchronous circuit for a fast readout of a pixel matrix has been developed. The AERD data-driven readout architecture operates the address encoding and reset decoding based on an arbitration tree, and allows us to readout only the hit pixels. Compared to the traditional readout structure of the rolling shutter scheme in Monolithic Active Pixel Sensors (MAPS), AERD can achieve a low readout time and a low power consumption especially for low hit occupancies. The readout is controlled at the chip periphery with a signal synchronous with the clock, allows a good digital and analogue signal separation in the matrix and a reduction of the power consumption. The AERD circuit has been implemented in the TowerJazz 180 nm CMOS Imaging Sensor (CIS) process with full complementary CMOS logic in the pixel. It works at 10 MHz with a matrix height of 15 mm. The energy consumed to read out one pixel is around 72 pJ. A scheme to boost the readout speed to 40 MHz is also discussed. The sensor chip equipped with AERD has been produced and characterised. Test results including electrical beam measurement are presented.

The Upgraded Pixel Detector of the ATLAS Experiment for Run-2 at the LHC

CERN Document Server

AUTHOR|(INSPIRE)INSPIRE-00084948; The ATLAS collaboration

2016-01-01

Run-2 of the LHC is providing new challenges to track and vertex reconstruction with higher energies, denser jets and higher rates. Therefore the ATLAS experiment has constructed the first 4-layer Pixel detector in HEP, installing a new Pixel layer, also called Insertable B-Layer (IBL). IBL is a fourth layer of pixel detectors, and has been installed in May 2014 at a radius of 3.3 cm between the existing Pixel Detector and a new smaller radius beam-pipe. The new detector, built to cope with high radiation and expected occupancy, is the first large scale application of 3D detectors and CMOS 130 nm technology. In addition the Pixel detector was refurbished with a new service quarter panel to recover about 3% of defective modules lost during run-1 and a new optical readout system to readout the data at higher speed while reducing the occupancy when running with increased luminosity. The commissioning and performance of the 4-layer Pixel Detector, in particular the IBL, will be presented using collision data.

Characterization of Ni/SnPb-TiW/Pt Flip Chip Interconnections in Silicon Pixel Detector Modules

CERN Document Server

Karadzhinova, Aneliya; Härkönen, Jaakko; Luukka, Panja-riina; Mäenpää, Teppo; Tuominen, Eija; Haeggstrom, Edward; Kalliopuska, Juha; Vahanen, Sami; Kassamakov, Ivan

2014-01-01

In contemporary high energy physics experiments, silicon detectors are essential for recording the trajectory of new particles generated by multiple simultaneous collisions. Modern particle tracking systems may feature 100 million channels, or pixels, which need to be individually connected to read-out chains. Silicon pixel detectors are typically connected to readout chips by flip-chip bonding using solder bumps. High-quality electro-mechanical flip-chip interconnects minimizes the number of dead read-out channels in the particle tracking system. Furthermore, the detector modules must endure handling during installation and withstand heat generation and cooling during operation. Silicon pixel detector modules were constructed by flip-chip bonding 16 readout chips to a single sensor. Eutectic SnPb solder bumps were deposited on the readout chips and the sensor chips were coated with TiW/Pt thin film UBM (under bump metallization). The modules were assembled at Advacam Ltd, Finland. We studied the uniformity o...

Development of a versatile readout and test system and characterization of a capacitively coupled active pixel sensor

Energy Technology Data Exchange (ETDEWEB)

Janssen, Jens; Gonella, Laura; Hemperek, Tomasz; Hirono, Toko; Huegging, Fabian; Krueger, Hans; Wermes, Norbert [Institute of Physics, University of Bonn, Bonn (Germany); Peric, Ivan [Karlsruher Institut fuer Technologie, Karlsruhe (Germany); Collaboration: ATLAS-Collaboration

2015-07-01

With the availability of high voltage and high resistivity CMOS processes, active pixel sensors are becoming increasingly interesting for radiation detection in high energy physics experiments. Although the pixel signal-to-noise ratio and the sensor radiation tolerance were improved, active pixel sensors cannot yet compete with state-of-the-art hybrid pixel detector in a high radiation environment. Hence, active pixel sensors are possible candidates for the outer tracking detector in HEP experiments where production cost plays a role. The investigation of numerous prototyping steps and different technologies is still ongoing and requires a versatile test and readout system, which will be presented in this talk. A capacitively coupled active pixel sensor fabricated in AMS 180 nm high voltage CMOS process is investigated. The sensor is designed to be glued to existing front-end pixel readout chips. Results from the characterization are presented in this talk.

Development of pixel detectors for SSC vertex tracking

International Nuclear Information System (INIS)

Kramer, G.; Shapiro, S.L.; Arens, J.F.; Jernigan, J.G.; Skubic, P.

1991-04-01

A description of hybrid PIN diode arrays and a readout architecture for their use as a vertex detector in the SSC environment is presented. Test results obtained with arrays having 256 x 256 pixels, each 30 μm square, are also presented. The development of a custom readout for the SSC will be discussed, which supports a mechanism for time stamping hit pixels, storing their xy coordinates, and storing the analog information within the pixel. The peripheral logic located on the array, permits the selection of those pixels containing interesting data and their coordinates to be selectively read out. This same logic also resolves ambiguous pixel ghost locations and controls the pixel neighbor read out necessary to achieve high spatial resolution. The thermal design of the vertex tracker and the proposed signal processing architecture will also be discussed. 5 refs., 13 figs., 3 tabs

FE-I2 a front-end readout chip designed in a commercial 025- mu m process for the ATLAS pixel detector at LHC

CERN Document Server

Blanquart, L; Einsweiler, Kevin F; Fischer, P; Mandelli, E; Meddeler, G; Peric, I

2004-01-01

A new front-end chip (FE-I2) has been developed for the ATLAS pixel detector at the future Large Hadron Collider (LHC) accelerator facility of the European Laboratory for Particle Physics (CERN). This chip has been submitted in a commercial 0.25- mu m CMOS process using special layout techniques for radiation tolerance. It comprises 2880 pixels arranged into 18 columns of 160 channels. Each pixel element of dimension 50 mu m * 400 mu m is composed of a charge- sensitive amplifier followed by a fast discriminator with a detection threshold adjustable within a range of 0-6000 electrons and slow control logic incorporating a wired-hit-Or, preamplifier-kill, readout mask, and automatic threshold tuning circuitry. There are two single-event- upset (SEU)-tolerant DACs for reducing threshold (7-b) and recovery- time (3-b) mismatches from pixel to pixel along with digital hit emulation and a differential readout circuit aimed at transporting time-stamped data from each pixel to buffers at the bottom of the chip. In c...

Development of an external readout electronics for a hybrid photon detector

CERN Document Server

Uyttenhove, Simon; Tichon, Jacques; Garcia, Salvador

The pixel hybrid photon detectors currently installed in the LHCb Cherenkov system encapsulate readout electronics in the vacuum tube envelope. The LHCb upgrade and the new trigger system will require their replacement with new photon detectors. The baseline photon detector candidate is the multi-anode photomultiplier. A hybrid photon detector with external readout electronics has been proposed as a backup option. This master thesis covers a R & D phase to investigate this latter concept. Extensive studies of the initial electronics system underlined the noise contributions from the Beetle chip used as front-end readout ASIC and from the ceramic carrier of the photon detector. New front-end electronic boards have been developed and made fully compatible with the existing LHCb-RICH infrastructure. With this compact readout system, Cherenkov photons have been successfully detected in a real particle beam environment. The proof-of-concept of a hybrid photon detector with external readout electronics was val...

Development and Characterization of Diamond and 3D-Silicon Pixel Detectors with ATLAS-Pixel Readout Electronics

CERN Document Server

Mathes, Markus

2008-01-01

Hybrid pixel detectors are used for particle tracking in the innermost layers of current high energy experiments like ATLAS. After the proposed luminosity upgrade of the LHC, they will have to survive very high radiation fluences of up to 10^16 particles per cm^2 per life time. New sensor concepts and materials are required, which promise to be more radiation tolerant than the currently used planar silicon sensors. Most prominent candidates are so-called 3D-silicon and single crystal or poly-crystalline diamond sensors. Using the ATLAS pixel electronics different detector prototypes with a pixel geometry of 400 × 50 um^2 have been built. In particular three devices have been studied in detail: a 3D-silicon and a single crystal diamond detector with an active area of about 1 cm^2 and a poly-crystalline diamond detector of the same size as a current ATLAS pixel detector module (2 × 6 cm^2). To characterize the devices regarding their particle detection efficiency and spatial resolution, the charge collection ...

Rework of flip chip bonded radiation pixel detectors

International Nuclear Information System (INIS)

Vaehaenen, S.; Heikkinen, H.; Pohjonen, H.; Salonen, J.; Savolainen-Pulli, S.

2008-01-01

In this paper, some practical aspects of reworking flip chip hybridized pixel detectors are discussed. As flip chip technology has been advancing in terms of placement accuracy and reliability, large-area hybrid pixel detectors have been developed. The area requirements are usually fulfilled by placing several readout chips (ROCs) on single sensor chip. However, as the number of ROCs increases, the probability of failure in the hybridization process and the ROC operation also increases. Because high accuracy flip chip bonding takes time, a significant part of the price of a pixel detector comes from the flip chip assembly process itself. As large-area detector substrates are expensive, and many flip chip placements are required, the price of an assembled detector can become very high. In a typical case, there is just one bad ROC (out of several) on a faulty detector to be replaced. Considering the high price of pixel detectors and the fact that reworking faulty ROCs does not take much longer than the original placement, it is worthwhile to investigate the feasibility of a rework process

Rework of flip chip bonded radiation pixel detectors

Energy Technology Data Exchange (ETDEWEB)

Vaehaenen, S. [VTT MEMS and Micropackaging, Espoo 02150 (Finland)], E-mail: sami.vahanen@vtt.fi; Heikkinen, H.; Pohjonen, H.; Salonen, J.; Savolainen-Pulli, S. [VTT MEMS and Micropackaging, Espoo 02150 (Finland)

2008-06-11

In this paper, some practical aspects of reworking flip chip hybridized pixel detectors are discussed. As flip chip technology has been advancing in terms of placement accuracy and reliability, large-area hybrid pixel detectors have been developed. The area requirements are usually fulfilled by placing several readout chips (ROCs) on single sensor chip. However, as the number of ROCs increases, the probability of failure in the hybridization process and the ROC operation also increases. Because high accuracy flip chip bonding takes time, a significant part of the price of a pixel detector comes from the flip chip assembly process itself. As large-area detector substrates are expensive, and many flip chip placements are required, the price of an assembled detector can become very high. In a typical case, there is just one bad ROC (out of several) on a faulty detector to be replaced. Considering the high price of pixel detectors and the fact that reworking faulty ROCs does not take much longer than the original placement, it is worthwhile to investigate the feasibility of a rework process.

New pixelized Micromegas detector for the COMPASS experiment

International Nuclear Information System (INIS)

Neyret, D; Anfreville, M; Bedfer, Y; Burtin, E; D'Hose, N; Giganon, A; Kunne, F; Magnon, A; Marchand, C; Paul, B; Platchkov, S; Vandenbroucke, M; Ketzer, B; Konorov, I

2009-01-01

New Micromegas (Micro-mesh gaseous detectors) are being developed in view of the future physics projects planned by the COMPASS collaboration at CERN. Several major upgrades compared to present detectors are being studied: detectors standing five times higher luminosity with hadron beams, detection of beam particles (flux up to a few hundred of kHz/mm 2 , 10 times larger than for the present detectors) with pixelized read-out in the central part, light and integrated electronics, and improved robustness. Studies were done with the present detectors moved in the beam, and two first pixelized prototypes are being tested with muon and hadron beams in real conditions at COMPASS. We present here this new project and report on two series of tests, with old detectors moved into the beam and with pixelized prototypes operated in real data taking condition with both muon and hadron beams.

Dead-time free pixel readout architecture for ATLAS front-end IC

CERN Document Server

Einsweiler, Kevin F; Kleinfelder, S A; Luo, L; Marchesini, R; Milgrome, O; Pengg, F X

1999-01-01

A low power sparse scan readout architecture has been developed for the ATLAS pixel front-end IC. The architecture supports a dual discriminator and extracts the time over threshold (TOT) information along with a 2-D spatial address $9 of the hits associating them with a unique 7-bit beam crossing number. The IC implements level-1 trigger filtering along with event building (grouping together all hits in a beam crossing) in the end of column (EOC) buffer. The $9 events are transmitted over a 40 MHz serial data link with the protocol supporting buffer overflow handling by appending error flags to events. This mixed-mode full custom IC is implemented in 0.8 mu HP process to meet the $9 requirements for the pixel readout in the ATLAS inner detector. The circuits have been tested and the IC provides dead-time-less ambiguity free readout at 40 MHz data rate.

Challenges of small-pixel infrared detectors: a review.

Science.gov (United States)

Rogalski, A; Martyniuk, P; Kopytko, M

2016-04-01

In the last two decades, several new concepts for improving the performance of infrared detectors have been proposed. These new concepts particularly address the drive towards the so-called high operating temperature focal plane arrays (FPAs), aiming to increase detector operating temperatures, and as a consequence reduce the cost of infrared systems. In imaging systems with the above megapixel formats, pixel dimension plays a crucial role in determining critical system attributes such as system size, weight and power consumption (SWaP). The advent of smaller pixels has also resulted in the superior spatial and temperature resolution of these systems. Optimum pixel dimensions are limited by diffraction effects from the aperture, and are in turn wavelength-dependent. In this paper, the key challenges in realizing optimum pixel dimensions in FPA design including dark current, pixel hybridization, pixel delineation, and unit cell readout capacity are outlined to achieve a sufficiently adequate modulation transfer function for the ultra-small pitches involved. Both photon and thermal detectors have been considered. Concerning infrared photon detectors, the trade-offs between two types of competing technology-HgCdTe material systems and III-V materials (mainly barrier detectors)-have been investigated.

Semiconductor detectors with proximity signal readout

International Nuclear Information System (INIS)

Asztalos, Stephen J.

2012-01-01

Semiconductor-based radiation detectors are routinely used for the detection, imaging, and spectroscopy of x-rays, gamma rays, and charged particles for applications in the areas of nuclear and medical physics, astrophysics, environmental remediation, nuclear nonproliferation, and homeland security. Detectors used for imaging and particle tracking are more complex in that they typically must also measure the location of the radiation interaction in addition to the deposited energy. In such detectors, the position measurement is often achieved by dividing or segmenting the electrodes into many strips or pixels and then reading out the signals from all of the electrode segments. Fine electrode segmentation is problematic for many of the standard semiconductor detector technologies. Clearly there is a need for a semiconductor-based radiation detector technology that can achieve fine position resolution while maintaining the excellent energy resolution intrinsic to semiconductor detectors, can be fabricated through simple processes, does not require complex electrical interconnections to the detector, and can reduce the number of required channels of readout electronics. Proximity electrode signal readout (PESR), in which the electrodes are not in physical contact with the detector surface, satisfies this need

LHC1: a semiconductor pixel detector readout chip with internal, tunable delay providing a binary pattern of selected events

International Nuclear Information System (INIS)

Heijne, E.H.M.; Antinori, F.; Barberis, D.

1996-01-01

The Omega3/LHC1 pixel detector readout chip comprises a matrix of 128 x 16 readout cells of 50 μm x 500 μm and peripheral functions with 4 distinct modes of initialization and operation, together more than 800 000 transistors. Each cell contains a complete chain of amplifier, discriminator with adjustable threshold and fast-OR output, a globally adjustable delay with local fine-tuning, coincidence logic and memory. Every cell can be individually addressed for electrical test and masking. First results have been obtained from electrical tests of a chip without detector as well as from source measurements. The electronic noise without detector is ∼100 e - rms. The lowest threshold setting is close to 2000 e - and non-uniformity has been measured to be better than 450 e - rms at 5000 e - threshold. A timewalk of <10 ns and a precision of <6 ns rms on a delay of 2 μs have been measured. The results may be improved by further optimization. (orig.)

The STAR Heavy Flavor Tracker PXL detector readout electronics

International Nuclear Information System (INIS)

Schambach, J.; Contin, G.; Greiner, L.; Stezelberger, T.; Vu, C.; Sun, X.; Szelezniak, M.

2016-01-01

The Heavy Flavor Tracker (HFT) is a recently installed micro-vertex detector upgrade to the STAR experiment at RHIC, consisting of three subsystems with various technologies of silicon sensors arranged in 4 concentric cylinders. The two innermost layers of the HFT close to the beam pipe, the Pixel ('PXL') subsystem, employ CMOS Monolithic Active Pixel Sensor (MAPS) technology that integrate the sensor, front-end electronics, and zero-suppression circuitry in one silicon die. This paper presents selected characteristics of the PXL detector part of the HFT and the hardware, firmware and software associated with the readout system for this detector

The FE-I4 Pixel Readout Chip and the IBL Module

Energy Technology Data Exchange (ETDEWEB)

Barbero, Marlon; Arutinov, David; Backhaus, Malte; Fang, Xiao-Chao; Gonella, Laura; Hemperek, Tomasz; Karagounis, Michael; Hans, Kruger; Kruth, Andre; Wermes, Norbert; /Bonn U.; Breugnon, Patrick; Fougeron, Denis; Gensolen, Fabrice; Menouni, Mohsine; Rozanov, Alexander; /Marseille, CPPM; Beccherle, Roberto; Darbo, Giovanni; /INFN, Genoa; Caminada, Lea; Dube, Sourabh; Fleury, Julien; Gnani, Dario; /LBL, Berkeley /NIKHEF, Amsterdam /Gottingen U. /SLAC

2012-05-01

FE-I4 is the new ATLAS pixel readout chip for the upgraded ATLAS pixel detector. Designed in a CMOS 130 nm feature size process, the IC is able to withstand higher radiation levels compared to the present generation of ATLAS pixel Front-End FE-I3, and can also cope with higher hit rate. It is thus suitable for intermediate radii pixel detector layers in the High Luminosity LHC environment, but also for the inserted layer at 3.3 cm known as the 'Insertable B-Layer' project (IBL), at a shorter timescale. In this paper, an introduction to the FE-I4 will be given, focusing on test results from the first full size FE-I4A prototype which has been available since fall 2010. The IBL project will be introduced, with particular emphasis on the FE-I4-based module concept.

Digital column readout architecture for the ATLAS pixel 025 mum front end IC

CERN Document Server

Mandelli, E; Blanquart, L; Comes, G; Denes, P; Einsweiler, Kevin F; Fischer, P; Marchesini, R; Meddeler, G; Peric, I

2002-01-01

A fast low noise, limited power, radiation-hard front-end chip was developed for reading out the Atlas Pixel Silicon Detector. As in the past prototypes, every chip is used to digitize and read out charge and time information from hits on each one of its 2880 inputs. The basic column readout architecture idea was adopted and modified to allow a safe transition to quarter micron technology. Each pixel cell, organized in a 160 multiplied by 18 matrix, can be independently enabled and configured in order to optimize the analog signal response and to prevent defective pixels from saturating the readout. The digital readout organizes hit data coming from each column, with respect to time, and output them on a low-level serial interface. A considerable effort was made to design state machines free of undefined states, where single-point defects and charge deposited by heavy ions in the silicon could have led to unpredicted forbidden states. 7 Refs.

Assembly procedure of the module (half-stave) of the ALICE Silicon Pixel Detector

CERN Document Server

Caselle, M; Antinori, F; Burns, M; Campbell, M; Chochula, P; Dinapoli, R; Elia, D; Formenti, F; Fini, R A; Ghidini, B; Kluge, A; Lenti, V; Manzari, V; Meddi, F; Morel, M; Navach, F; Nilsson, P; Pepato, Adriano; Riedler, P; Santoro, R; Stefanini, G; Viesti, G; Wyllie, K

2004-01-01

The Silicon Pixel Detector (SPD) forms the two innermost layers of the ALICE Inner Tracking System (ITS). The detector includes 1200 readout ASICs, each containing 8192 pixel cells, bump-bonded to Si sensor elements. The thickness of the readout chip and the sensor element is 150mum and 200mum, respectively. Low-mass solutions are implemented for the bus and the mechanical support. In this contribution, we describe the basic module (half-stave) of the two SPD layers and we give an overview of its assembly procedure.

The upgraded Pixel Detector of the ATLAS experiment for Run-2 at the Large Hadron Collider

CERN Document Server

Giordani, MarioPaolo; The ATLAS collaboration

2016-01-01

Run-2 of the LHC is providing new challenges to track and vertex reconstruction with higher energies, denser jets and higher rates. Therefore the ATLAS experiment has constructed the first 4-layer Pixel detector in HEP, installing a new Pixel layer, also called Insertable B-Layer (IBL). IBL is a fourth layer of pixel detectors, and has been installed in May 2014 at a radius of 3.3 cm between the existing Pixel Detector and a new smaller radius beam-pipe. The new detector, built to cope with high radiation and expected occupancy, is the first large scale application of 3D detectors and CMOS 130nm technology. In addition the Pixel detector was refurbished with a new service quarter panel to recover about 3% of defective modules lost during run-1 and a new optical readout system to readout the data at higher speed while reducing the occupancy when running with increased luminosity. The commissioning and performance of the 4-layer Pixel Detector, in particular the IBL, will be presented, using collision data.

Vertex measurement at a hadron collider. The ATLAS pixel detector

International Nuclear Information System (INIS)

Grosse-Knetter, J.

2008-03-01

The ATLAS Pixel Detector is the innermost layer of the ATLAS tracking system and will contribute significantly to the ATLAS track and vertex reconstruction. The detector consists of identical sensor-chip-hybrid modules, arranged in three barrels in the centre and three disks on either side for the forward region. The position of the Pixel Detector near the interaction point requires excellent radiation hardness, fast read-out, mechanical and thermal robustness, good long-term stability, all combined with a low material budget. The new design concepts used to meet the challenging requirements are discussed with their realisation in the Pixel Detector, followed by a description of a refined and extensive set of measurements to assess the detector performance during and after its construction. (orig.)

Operating characteristics of radiation-hardened silicon pixel detectors for the CMS experiment

CERN Document Server

Hyosung, Cho

2002-01-01

The Compact Muon Solenoid (CMS) experiment at the CERN Large Hadron Collider (LHC) will have forward silicon pixel detectors as its innermost tracking device. The pixel devices will be exposed to the harsh radiation environment of the LHC. Prototype silicon pixel detectors have been designed to meet the specification of the CMS experiment. No guard ring is required on the n/sup +/ side, and guard rings on the p/sup +/ side are always kept active before and after type inversion. The whole n/sup +/ side is grounded and connected to readout chips, which greatly simplifies detector assembling and improves the stability of bump-bonded readout chips on the n/sup +/ side. Operating characteristics such as the leakage current, the full depletion voltage, and the potential distributions over guard rings were tested using standard techniques. The tests are discussed in this paper. (9 refs).

Si and gaas pixel detectors for medical imaging applications

International Nuclear Information System (INIS)

Bisogni, M. G.

2001-01-01

As the use of digital radiographic equipment in the morphological imaging field is becoming the more and more diffuse, the research of new and more performing devices from public institutions and industrial companies is in constant progress. Most of these devices are based on solid-state detectors as X-ray sensors. Semiconductor pixel detectors, originally developed in the high energy physics environment, have been then proposed as digital detector for medical imaging applications. In this paper a digital single photon counting device, based on silicon and GaAs pixel detector, is presented. The detector is a thin slab of semiconductor crystal where an array of 64 by 64 square pixels, 170- m side, has been built on one side. The data read-out is performed by a VLSI integrated circuit named Photon Counting Chip (PCC), developed within the MEDIPIX collaboration. Each chip cell geometrically matches the sensor pixel. It contains a charge preamplifier, a threshold comparator and a 15 bits pseudo-random counter and it is coupled to the detector by means of bump bonding. Most important advantages of such system, with respect to a traditional X-rays film/screen device, are the wider linear dynamic range (3x104) and the higher performance in terms of MTF and DQE. Besides the single photon counting architecture allows to detect image contrasts lower than 3%. Electronics read-out performance as well as imaging capabilities of the digital device will be presented. Images of mammographic phantoms acquired with a standard Mammographic tube will be compared with radiographs obtained with traditional film/screen systems

A review of advances in pixel detectors for experiments with high rate and radiation

Science.gov (United States)

Garcia-Sciveres, Maurice; Wermes, Norbert

2018-06-01

The large Hadron collider (LHC) experiments ATLAS and CMS have established hybrid pixel detectors as the instrument of choice for particle tracking and vertexing in high rate and radiation environments, as they operate close to the LHC interaction points. With the high luminosity-LHC upgrade now in sight, for which the tracking detectors will be completely replaced, new generations of pixel detectors are being devised. They have to address enormous challenges in terms of data throughput and radiation levels, ionizing and non-ionizing, that harm the sensing and readout parts of pixel detectors alike. Advances in microelectronics and microprocessing technologies now enable large scale detector designs with unprecedented performance in measurement precision (space and time), radiation hard sensors and readout chips, hybridization techniques, lightweight supports, and fully monolithic approaches to meet these challenges. This paper reviews the world-wide effort on these developments.

The hardware of the ATLAS Pixel Detector Control System

International Nuclear Information System (INIS)

Henss, T; Andreani, A; Boek, J; Boyd, G; Citterio, M; Einsweiler, K; Kersten, S; Kind, P; Lantzsch, K; Latorre, S; Maettig, P; Meroni, C; Sabatini, F; Schultes, J

2007-01-01

The innermost part of the ATLAS (A Toroidal LHC ApparatuS) experiment, which is currently under construction at the LHC (Large Hadron Collider), will be a silicon pixel detector comprised of 1744 individual detector modules. To operate these modules, the readout electronics, and other detector components, a complex power supply and control system is necessary. The specific powering and control requirements, as well as the custom made components of our power supply and control systems, are described. These include remotely programmable regulator stations, the power supply system for the optical transceivers, several monitoring units, and the Interlock System. In total, this comprises the Pixel Detector Control System (DCS)

High-speed X-ray imaging pixel array detector for synchrotron bunch isolation.

Science.gov (United States)

Philipp, Hugh T; Tate, Mark W; Purohit, Prafull; Shanks, Katherine S; Weiss, Joel T; Gruner, Sol M

2016-03-01

A wide-dynamic-range imaging X-ray detector designed for recording successive frames at rates up to 10 MHz is described. X-ray imaging with frame rates of up to 6.5 MHz have been experimentally verified. The pixel design allows for up to 8-12 frames to be stored internally at high speed before readout, which occurs at a 1 kHz frame rate. An additional mode of operation allows the integration capacitors to be re-addressed repeatedly before readout which can enhance the signal-to-noise ratio of cyclical processes. This detector, along with modern storage ring sources which provide short (10-100 ps) and intense X-ray pulses at megahertz rates, opens new avenues for the study of rapid structural changes in materials. The detector consists of hybridized modules, each of which is comprised of a 500 µm-thick silicon X-ray sensor solder bump-bonded, pixel by pixel, to an application-specific integrated circuit. The format of each module is 128 × 128 pixels with a pixel pitch of 150 µm. In the prototype detector described here, the three-side buttable modules are tiled in a 3 × 2 array with a full format of 256 × 384 pixels. The characteristics, operation, testing and application of the detector are detailed.

Sensor development for the CMS pixel detector

CERN Document Server

Bölla, G; Horisberger, R P; Kaufmann, R; Rohe, T; Roy, A

2002-01-01

The CMS experiment which is currently under construction at the Large Hadron Collider (LHC) at CERN (Geneva, Switzerland) will contain a pixel detector which provides in its final configuration three space points per track close to the interaction point of the colliding beams. Because of the harsh radiation environment of the LHC, the technical realization of the pixel detector is extremely challenging. The readout chip as the most damageable part of the system is believed to survive a particle fluence of 6x10 sup 1 sup 4 n sub e sub q /cm sup 2 (All fluences are normalized to 1 MeV neutrons and therefore all components of the hybrid pixel detector have to perform well up to at least this fluence. As this requires a partially depleted operation of the silicon sensors after irradiation-induced type inversion of the substrate, an ''n in n'' concept has been chosen. In order to perform IV-tests on wafer level and to hold accidentally unconnected pixels close to ground potential, a resistive path between the pixe...

The upgraded Pixel detector and the commissioning of the Inner Detector tracking of the ATLAS experiment for Run-2 at the Large Hadron Collider

CERN Document Server

AUTHOR|(INSPIRE)INSPIRE-00019188; The ATLAS collaboration

2016-01-01

Run-2 of the Large Hadron Collider (LHC) will provide new challenges to track and vertex reconstruction with higher energies, denser jets and higher rates. Therefore the ATLAS experiment has constructed the first 4-layer Pixel detector in HEP, installing a new Pixel layer, also called Insertable B-Layer (IBL). The IBL is a fourth layer of pixel detectors, and has been installed in May 2014 at a radius of 3.3 cm between the existing Pixel Detector and a new smaller radius beam-pipe. The new detector, built to cope with the high radiation and expected occupancy, is the first large scale application of 3D detectors and CMOS 130~nm technology. In addition, the Pixel detector was refurbished with a new service quarter panel to recover about 3% of defective modules lost during Run-1 and a new optical readout system to readout the data at higher speed while reducing the occupancy when running with increased luminosity. Complementing detector improvements, many improvements to Inner Detector track and vertex reconstr...

New pixelized Micromegas detector with low discharge rate for the COMPASS experiment

CERN Document Server

Neyret, D.; Anfreville, M.; Bedfer, Y.; Burtin, E.; Coquelet, C.; d'Hose, N.; Desforge, D.; Giganon, A.; Jourde, D.; Kunne, F.; Magnon, A.; Makke, N.; Marchand, C.; Paul, B.; Platchkov, S.; Thibaud, F.; Usseglio, M.; Vandenbroucke, M.

2012-01-01

New Micromegas (Micro-mesh gaseous detectors) are being developed in view of the future physics projects planned by the COMPASS collaboration at CERN. Several major upgrades compared to present detectors are being studied: detectors standing five times higher luminosity with hadron beams, detection of beam particles (flux up to a few hundred of kHz/mm^{2}, 10 times larger than for the present Micromegas detectors) with pixelized read-out in the central part, light and integrated electronics, and improved robustness. Two solutions of reduction of discharge impact have been studied, with Micromegas detectors using resistive layers and using an additional GEM foil. Performance of such detectors has also been measured. A large size prototypes with nominal active area and pixelized read-out has been produced and installed at COMPASS in 2010. In 2011 prototypes featuring an additional GEM foil, as well as an resistive prototype, are installed at COMPASS and preliminary results from those detectors presented very go...

CMOS Active Pixel Sensors as energy-range detectors for proton Computed Tomography

International Nuclear Information System (INIS)

Esposito, M.; Waltham, C.; Allinson, N.M.; Anaxagoras, T.; Evans, P.M.; Poludniowski, G.; Green, S.; Parker, D.J.; Price, T.; Manolopoulos, S.; Nieto-Camero, J.

2015-01-01

Since the first proof of concept in the early 70s, a number of technologies has been proposed to perform proton CT (pCT), as a means of mapping tissue stopping power for accurate treatment planning in proton therapy. Previous prototypes of energy-range detectors for pCT have been mainly based on the use of scintillator-based calorimeters, to measure proton residual energy after passing through the patient. However, such an approach is limited by the need for only a single proton passing through the energy-range detector in a read-out cycle. A novel approach to this problem could be the use of pixelated detectors, where the independent read-out of each pixel allows to measure simultaneously the residual energy of a number of protons in the same read-out cycle, facilitating a faster and more efficient pCT scan. This paper investigates the suitability of CMOS Active Pixel Sensors (APSs) to track individual protons as they go through a number of CMOS layers, forming an energy-range telescope. Measurements performed at the iThemba Laboratories will be presented and analysed in terms of correlation, to confirm capability of proton tracking for CMOS APSs

CMOS Active Pixel Sensors as energy-range detectors for proton Computed Tomography.

Science.gov (United States)

Esposito, M; Anaxagoras, T; Evans, P M; Green, S; Manolopoulos, S; Nieto-Camero, J; Parker, D J; Poludniowski, G; Price, T; Waltham, C; Allinson, N M

2015-06-03

Since the first proof of concept in the early 70s, a number of technologies has been proposed to perform proton CT (pCT), as a means of mapping tissue stopping power for accurate treatment planning in proton therapy. Previous prototypes of energy-range detectors for pCT have been mainly based on the use of scintillator-based calorimeters, to measure proton residual energy after passing through the patient. However, such an approach is limited by the need for only a single proton passing through the energy-range detector in a read-out cycle. A novel approach to this problem could be the use of pixelated detectors, where the independent read-out of each pixel allows to measure simultaneously the residual energy of a number of protons in the same read-out cycle, facilitating a faster and more efficient pCT scan. This paper investigates the suitability of CMOS Active Pixel Sensors (APSs) to track individual protons as they go through a number of CMOS layers, forming an energy-range telescope. Measurements performed at the iThemba Laboratories will be presented and analysed in terms of correlation, to confirm capability of proton tracking for CMOS APSs.

Synchrotron applications of pixel and strip detectors at Diamond Light Source

International Nuclear Information System (INIS)

Marchal, J.; Tartoni, N.; Nave, C.

2009-01-01

A wide range of position-sensitive X-ray detectors have been commissioned on the synchrotron X-ray beamlines operating at the Diamond Light Source in UK. In addition to mature technologies such as image-plates, CCD-based detectors, multi-wire and micro-strip gas detectors, more recent detectors based on semiconductor pixel or strip sensors coupled to CMOS read-out chips are also in use for routine synchrotron X-ray diffraction and scattering experiments. The performance of several commercial and developmental pixel/strip detectors for synchrotron studies are discussed with emphasis on the image quality achieved with these devices. Examples of pixel or strip detector applications at Diamond Light Source as well as the status of the commissioning of these detectors on the beamlines are presented. Finally, priorities and ideas for future developments are discussed.

Results from the Commissioning of the ATLAS Pixel Detector

CERN Document Server

Strandberg, S

2009-01-01

The ATLAS pixel detector is a high resolution, silicon based, tracking detector with its innermost layer located only 5 cm away from the ATLAS interaction point. It is designed to provide good hit resolution and low noise, both important qualities for pattern recognition and for finding secondary vertices originating from decays of long-lived particles. The pixel detector has 80 million readout channels and is built up of three barrel layers and six disks, three on each side of the barrel. The detector was installed in the center of ATLAS in June 2007 and is currently being calibrated and commissioned. Details from the installation, commissioning and calibration are presented together with the current status.

Finite-element simulations of coupling capacitances in capacitively coupled pixel detectors

CERN Document Server

AUTHOR|(SzGeCERN)755510

2017-01-01

Capacitively coupled hybrid silicon pixel-detector assemblies are under study for the vertex detector at the proposed future CLIC linear electron-positron collider. The assemblies consist of active CCPDv3 sensors, with 25 μm pixel pitch implemented in a 180 nm High- Voltage CMOS process, which are glued to the CLICpix readout ASIC, with the same pixel pitch and processed in a commercial 65 nm CMOS technology. The signal created in the silicon bulk of the active sensors passes a two-stage amplifier, in each pixel, and gets transferred as a voltage pulse to metal pads facing the readout chip (ROC). The coupling of the signal to the metal pads on the ROC side proceeds through the capacitors formed between the two chips by a thin layer of epoxy glue. The coupling strength and the amount of unwanted cross coupling to neighbouring pixels depends critically on the uniformity of the glue layer, its thickness and on the alignment precision during the flip-chip assembly process. Finite-element calculations of the coup...

Development of a Detector Control System for the ATLAS Pixel detector in the HL-LHC

International Nuclear Information System (INIS)

Lehmann, N.; Kersten, S.; Zeitnitz, C.; Karagounis, M.

2016-01-01

The upgrade of the LHC to the HL-LHC requires a new ITk detector. The innermost part of this new tracker is a pixel detector. The University of Wuppertal is developing a new DCS to monitor and control this new pixel detector. The current concept envisions three parallel paths of the DCS. The first path, called security path, is hardwired and provides an interlock system to guarantee the safety of the detector and human beings. The second path is a control path. This path is used to supervise the entire detector. The control path has its own communication lines independent from the regular data readout for reliable operation. The third path is for diagnostics and provides information on demand. It is merged with the regular data readout and provides the highest granularity and most detailed information. To reduce the material budget, a serial power scheme is the baseline for the pixel modules. A new ASIC used in the control path is in development at Wuppertal for this serial power chain. A prototype exists already and a proof of principle was demonstrated. Development and research is ongoing to guarantee the correct operation of the new ASIC in the harsh environment of the HL-LHC. The concept for the new DCS will be presented in this paper. A focus will be made on the development of the DCS chip, used for monitoring and control of pixel modules in a serial power chain.

Performance Studies of Pixel Hybrid Photon Detectors for the LHCb RICH Counters

CERN Document Server

Aglieri Rinella, G; Piedigrossi, D; Van Lysebetten, A

2004-01-01

The Pixel Hybrid Photon Detector is a vacuum tube with a multi-alkali photo cathode, high voltage cross-focused electron optics and an anode consisting of a silicon pixel detector bump-bonded to a readout CMOS electronic chip fully encapsulated in the device. The Pixel HPD fulfils the requirements of the Ring Imaging Cherenkov counters of the LHCb experiment at LHC. The performances of the Pixel HPD will be discussed with reference to laboratory measurements, Cherenkov light imaging in recent beam tests, image distortions due to a magnetic field.

Test beam analysis of ultra-thin hybrid pixel detector assemblies with Timepix readout ASICs

CERN Document Server

Alipour Tehrani, Niloufar; Dannheim, Dominik; Firu, Elena; Kulis, Szymon; Redford, Sophie; Sicking, Eva

2016-01-01

The requirements for the vertex detector at the proposed Compact Linear Collider imply a very small material budget: less than 0.2% of a radiation length per detection layer including services and mechanical supports. We present here a study using Timepix readout ASICs hybridised to pixel sensors of 50 − 500 μm thickness, including assemblies with 100 μm thick sensors bonded to thinned 100μm thick ASICs. Sensors from three producers (Advacam, Micron Semiconductor Ltd, Canberra) with different edge termination technologies (active edge, slim edge) were bonded to Timepix ASICs. These devices were characterised with the EUDET telescope at the DESY II test beam using 5.6 GeV electrons. Their performance for the detection and tracking of minimum ionising particles was evaluated in terms of charge sharing, detection efficiency, single-point resolution and energy deposition.

Module Production and Qualification for the Phase I Upgrade of the CMS Pixel Detector

CERN Document Server

AUTHOR|(CDS)2086689

2015-01-01

After consolidation of the LHC in 2013/14 its centre-of-mass energy will increase to 13TeV and the luminosity will reach $2 \\cdot 10^{34}\\, \\textnormal{cm}^{-2} \\textnormal{s}^{-1}$, which is twice the design luminosity. The latter will result in more simultaneous particle collisions, which would significantly increase the dead time of the current readout chip of the CMS pixel detector. Therefore the entire CMS pixel detector is replaced in 2016/17 and a new digital readout with larger buffers will be used to handle increasing pixel hit rates. An additional fourth barrel-layer provides more space points to improve track reconstruction. Half of the required modules for layer four is being produced at Karlsruhe Institute of Technology (KIT). This poster deals with the smallest discrete subunit of the pixel detector, the module and its assembly process. Moreover first production experience will be shown.

Development of a novel direct X-ray detector using photoinduced discharge (PID) readout for digital radiography

Science.gov (United States)

Heo, D.; Jeon, S.; Kim, J.-S.; Kim, R. K.; Cha, B. K.; Moon, B. J.; Yoon, J.

2013-02-01

We developed a novel direct X-ray detector using photoinduced discharge (PID) readout for digital radiography. The pixel resolution is 512 × 512 with 200 μm pixel and the overall active dimensions of the X-ray imaging panel is 10.24 cm × 10.24 cm. The detector consists of an X-ray absorption layer of amorphous selenium, a charge accumulation layer of metal, and a PID readout layer of amorphous silicon. In particular, the charge accumulation is pixelated because image charges generated by X-ray should be stored pixel by pixel. Here the image charges, or holes, are recombined with electrons generated by the PID method. We used a 405 nm laser diode and cylindrical lens to make a line beam source with a width of 50 μm for PID readout, which generates charges for each pixel lines during the scan. We obtained spatial frequencies of about 1.0 lp/mm for the X-direction (lateral direction) and 0.9 lp/mm for the Y-direction (scanning direction) at 50% modulation transfer function.

Readout electronics for low dark count pixel detectors based on Geiger mode avalanche photodiodes fabricated in conventional CMOS technologies for future linear colliders

International Nuclear Information System (INIS)

Vilella, E.; Arbat, A.; Comerma, A.; Trenado, J.; Alonso, O.; Gascon, D.; Vila, A.; Garrido, L.; Dieguez, A.

2011-01-01

High sensitivity and excellent timing accuracy of the Geiger mode avalanche photodiodes make them ideal sensors as pixel detectors for particle tracking in high energy physics experiments to be performed in future linear colliders. Nevertheless, it is well known that these sensors suffer from dark counts and afterpulsing noise, which induce false hits (indistinguishable from event detection) as well as an increase in the necessary area of the readout system. In this work, we present a comparison between APDs fabricated in a high voltage 0.35 μm and a high integration 0.13 μm commercially available CMOS technologies that has been performed to determine which of them best fits the particle collider requirements. In addition, a readout circuit that allows low noise operation is introduced. Experimental characterization of the proposed pixel is also presented in this work.

Test-beam results of a SOI pixel detector prototype

CERN Document Server

Bugiel, Roma; Dannheim, Dominik; Fiergolski, Adrian; Hynds, Daniel; Idzik, Marek; Kapusta, P; Kucewicz, Wojciech; Munker, Ruth Magdalena; Nurnberg, Andreas Matthias

2018-01-01

This paper presents the test-beam results of a monolithic pixel-detector prototype fabricated in 200 nm Silicon-On-Insulator (SOI) CMOS technology. The SOI detector was tested at the CERN SPS H6 beam line. The detector is fabricated on a 500 μm thick high-resistivity float- zone n-type (FZ-n) wafer. The pixel size is 30 μm × 30 μm and its readout uses a source- follower configuration. The test-beam data are analysed in order to compute the spatial resolution and detector efficiency. The analysis chain includes pedestal and noise calculation, cluster reconstruction, as well as alignment and η-correction for non-linear charge sharing. The results show a spatial resolution of about 4.3 μm.

Operational experience of ATLAS SCT and Pixel Detector

CERN Document Server

Kocian, Martin; The ATLAS collaboration

2017-01-01

The ATLAS Inner Detector based on silicon sensors is consisting of a strip detector (SCT) and a pixel detector. It is the crucial component for vertexing and tracking in the ATLAS experiment. With the excellent performance of the LHC well beyond the original specification the silicon tracking detectors are facing substantial challenges in terms of data acquisition, radiation damage to the sensors, and SEUs in the readout ASICs. The approaches on how the detector systems cope with the demands of high luminosity operation while maintaining excellent performance through hardware upgrades, software and firmware algorithms, and operational settings, are presented.

Gas Pixel Detectors for low energy X-ray polarimetry

International Nuclear Information System (INIS)

Spandre, Gloria

2007-01-01

Gas Pixel Detectors are position-sensitive proportional counters in which a complete integration between the gas amplification structure and the read-out electronics has been reached. Various generation of Application-Specific Integrated Circuit (ASIC) have been designed in deep submicron CMOS technology to realize a monolithic device which is at the same time the charge collecting electrode and the analog amplifying and charge measuring front-end electronics. The experimental response of a detector with 22060 pixels at 80 μm pitch to polarized and un-polarized X-ray radiation is shown and the application of this device for Astronomical X-ray Polarimetry discussed

Construction and commissioning of the Phase 1 upgrade of the CMS pixel detector

CERN Document Server

Bartek, Rachel

2017-01-01

The Phase 1 upgrade of the CMS pixel detector, installed by the CMS collaboration during the recent extended end-of-year technical stop, is built out of four barrel layers (BPIX) and three forward disks in each endcap (FPIX). It comprises a total of 124M pixel channels, in 1,856 modules and it is designed to withstand instantaneous luminosities of up to $2 \\rm{x} 10^{34} \\rm{cm}^{-2} \\rm{s}^{-1}$ with increased detector acceptance and additional redundancy for the tracking, while at the same time reducing the material budget. These goals are achieved using a new readout chip and modified powering and readout schemes, one additional tracking layer both in the barrel and in the disks, and new detector supports including a $\\rm{CO}_2$ based evaporative cooling system. Different parts of the detector have been assembled over the last year and later brought to CERN for installation inside the CMS tracker. At various stages during the assembly tests have been performed to ensure that the readout and power electro...

X-CSIT: a toolkit for simulating 2D pixel detectors

Science.gov (United States)

Joy, A.; Wing, M.; Hauf, S.; Kuster, M.; Rüter, T.

2015-04-01

A new, modular toolkit for creating simulations of 2D X-ray pixel detectors, X-CSIT (X-ray Camera SImulation Toolkit), is being developed. The toolkit uses three sequential simulations of detector processes which model photon interactions, electron charge cloud spreading with a high charge density plasma model and common electronic components used in detector readout. In addition, because of the wide variety in pixel detector design, X-CSIT has been designed as a modular platform so that existing functions can be modified or additional functionality added if the specific design of a detector demands it. X-CSIT will be used to create simulations of the detectors at the European XFEL, including three bespoke 2D detectors: the Adaptive Gain Integrating Pixel Detector (AGIPD), Large Pixel Detector (LPD) and DePFET Sensor with Signal Compression (DSSC). These simulations will be used by the detector group at the European XFEL for detector characterisation and calibration. For this purpose, X-CSIT has been integrated into the European XFEL's software framework, Karabo. This will further make it available to users to aid with the planning of experiments and analysis of data. In addition, X-CSIT will be released as a standalone, open source version for other users, collaborations and groups intending to create simulations of their own detectors.

An EUDET/AIDA Pixel Beam Telescope for Detector Development

CERN Document Server

Perrey, Hanno

2013-01-01

A high resolution ($\\sigma 2 \\sim \\mu$) beam telescope based on monolithic active pixel sensors (MAPS) was developed within the EUDET collaboration. The telescope consists of six sensor planes using Mimosa26 MAPS with a pixel pitch of $18.4 \\mu$ and thinned down to $50 \\mu$. The excellent resolution, readout rate and DAQ integration capabilities made the telescope a primary test beam tool for many groups including several CERN based experiments. Within the new European detector infrastructure project AIDA the test beam telescope will be further extended in terms of cooling infrastructure, readout speed and precision. In order to provide a system optimized for the different requirements by the user community, a combination of various pixel technologies is foreseen. In this report the design of this even more flexible telescope with three different pixel technologies (TimePix, Mimosa, ATLAS FE-I4) will be presented. First test beam results with the HitOR signal provided by the FE-I4 integrated into the trigger...

EXCALIBUR: a small-pixel photon counting area detector for coherent X-ray diffraction - Front-end design, fabrication and characterisation

Science.gov (United States)

Marchal, J.; Horswell, I.; Willis, B.; Plackett, R.; Gimenez, E. N.; Spiers, J.; Ballard, D.; Booker, P.; Thompson, J. A.; Gibbons, P.; Burge, S. R.; Nicholls, T.; Lipp, J.; Tartoni, N.

2013-03-01

Coherent X-ray diffraction experiments on synchrotron X-ray beamlines require detectors with high spatial resolution and large detection area. The read-out chip developed by the MEDIPIX3 collaboration offers a small pixel size of 55 microns resulting in a very high spatial resolution when coupled to a direct X-ray conversion segmented silicon sensor. MEDIPIX3 assemblies present also the advantages of hybrid pixel detectors working in single photon counting mode: noiseless imaging, large dynamic range, extremely high frame rate. The EXCALIBUR detector is under development for the X-ray Coherence and Imaging Beamline I13 of the Diamond Light Source. This new detector consists of three modules, each with 16 MEDIPIX3 chips which can be read-out at 100 frames per second in continuous mode or 1000 frames per second in burst mode. In each module, the sensor is a large single silicon die covering 2 rows of 8 individual MEDIPIX3 read-out chips and provides a continuous active detection region within a module. Each module includes 1 million solder bumps connecting the 55 microns pixels of the silicon sensor to the 55 microns pixels of the 16 MEDIPIX3 read-out chips. The detection area of the 3-module EXCALIBUR detector is 115 mm × 100 mm with a small 6.8 mm wide inactive region between modules. Each detector module is connected to 2 FPGA read-out boards via a flexi-rigid circuit to allow a fully parallel read-out of the 16 MEDIPIX3 chips. The 6 FPGA read-out boards used in the EXCALIBUR detector are interfaced to 6 computing nodes via 10Gbit/s fibre-optic links to maintain the very high frame-rate capability. The standard suite of EPICS control software is used to operate the detector and to integrate it with the Diamond Light Source beamline software environment. This article describes the design, fabrication and characterisation of the MEDIPIX3-based modules composing the EXCALIBUR detector.

EXCALIBUR: a small-pixel photon counting area detector for coherent X-ray diffraction - Front-end design, fabrication and characterisation

International Nuclear Information System (INIS)

Marchal, J; Horswell, I; Willis, B; Plackett, R; Gimenez, E N; Spiers, J; Thompson, J A; Gibbons, P; Tartoni, N; Ballard, D; Booker, P; Burge, S R; Nicholls, T; Lipp, J

2013-01-01

Coherent X-ray diffraction experiments on synchrotron X-ray beamlines require detectors with high spatial resolution and large detection area. The read-out chip developed by the MEDIPIX3 collaboration offers a small pixel size of 55 microns resulting in a very high spatial resolution when coupled to a direct X-ray conversion segmented silicon sensor. MEDIPIX3 assemblies present also the advantages of hybrid pixel detectors working in single photon counting mode: noiseless imaging, large dynamic range, extremely high frame rate. The EXCALIBUR detector is under development for the X-ray Coherence and Imaging Beamline I13 of the Diamond Light Source. This new detector consists of three modules, each with 16 MEDIPIX3 chips which can be read-out at 100 frames per second in continuous mode or 1000 frames per second in burst mode. In each module, the sensor is a large single silicon die covering 2 rows of 8 individual MEDIPIX3 read-out chips and provides a continuous active detection region within a module. Each module includes 1 million solder bumps connecting the 55 microns pixels of the silicon sensor to the 55 microns pixels of the 16 MEDIPIX3 read-out chips. The detection area of the 3-module EXCALIBUR detector is 115 mm × 100 mm with a small 6.8 mm wide inactive region between modules. Each detector module is connected to 2 FPGA read-out boards via a flexi-rigid circuit to allow a fully parallel read-out of the 16 MEDIPIX3 chips. The 6 FPGA read-out boards used in the EXCALIBUR detector are interfaced to 6 computing nodes via 10Gbit/s fibre-optic links to maintain the very high frame-rate capability. The standard suite of EPICS control software is used to operate the detector and to integrate it with the Diamond Light Source beamline software environment. This article describes the design, fabrication and characterisation of the MEDIPIX3-based modules composing the EXCALIBUR detector.

ATLAS SemiConductor Tracker and Pixel Detector: Status and Performance

CERN Document Server

Reeves, K; The ATLAS collaboration

2012-01-01

The Semi-Conductor Tracker (SCT) and the Pixel Detector are the key precision tracking devices in the Inner Detector of the ATLAS experiment at CERN LHC. The SCT is a silicon strip detector and is constructed of 4088 silicon detector modules for a total of 6.3 million strips. Each module is designed, constructed and tested to operate as a stand-alone unit, mechanically, electrically, optically and thermally. The SCT silicon micro-strip sensors are processed in the planar p-in-n technology. The signals from the strips are processed in the front-end ASICS ABCD3TA, working in the binary readout mode. The Pixel Detector consists of approximately 80 million pixels that are individually read out via chips bump-bonded to 1744 n-in-n silicon substrates. In the talk the current status of the SCT and Pixel Detector will be reviewed. We will report on the operation of the detectors including an overview of the issues we encountered and the observation of significant increases in leakage currents (as expected) from bulk ...

Online Calibration and Performance of the ATLAS Pixel Detector

CERN Document Server

Keil, M

2011-01-01

The ATLAS Pixel Detector is the innermost detector of the ATLAS experiment at the Large Hadron Collider at CERN. It consists of 1744 silicon sensors equipped with approximately 80 million electronic channels, providing typically three measurement points with high resolution for particles emerging from the beam-interaction region, thus allowing measuring particle tracks and secondary vertices with very high precision. The readout system of the Pixel Detector is based on a bi-directional optical data transmission system between the detector and the data acquisition system with an individual link for each of the 1744 modules. Signal conversion components are located on both ends, approximately 80 m apart. This paper describes the tuning and calibration of the optical links and the detector modules, including measurements of threshold, noise, charge measurement, timing performance and the sensor leakage current.

The upgraded Pixel Detector of the ATLAS Experiment for Run-II at the Large Hadron Collider

CERN Document Server

AUTHOR|(INSPIRE)INSPIRE-00407702

2016-01-01

The Pixel Detector of the ATLAS experiment has shown excellent performance during the whole Run-1 of the LHC. Taking advantage of the detector development period 2013 – 2014, the detector was extracted from the experiment and brought to surface to equip it with new service panels and to repair modules furthermore this helped with the installation of the Insertable B-Layer (IBL), fourth layer of pixel, installed in between the existing Pixel Detector and a new beam-pipe at a radius of 3.3 cm. To cope with the high radiation and increased pixel occupancy due to the proximity to the interaction point, two different silicon sensor technologies (planar and 3D) have been used. A new readout chip has been designed with CMOS 130nm technology with larger area, smaller pixel size and faster readout capability. Dedicated design features in combination with a new composite material were considered and used in order to reduce the material budget of the support structure while keeping the optimal thermo-mechanical perfor...

Characterization of a large-format, fine-pitch CdZnTe pixel detector for the HEFT balloon-Borne experiment

OpenAIRE

Chen, C. M. Hubert; Cook, Walter R.; Harrison, Fiona A.; Lin, Jiao Y. Y.

2004-01-01

We have developed a large-format CdZnTe pixel detector with custom, low-noise ASIC readout, for astrophysical applications. In particular, this detector is targeted for use in the High-Energy Focusing Telescope (HEFT), a balloon-borne experiment with focusing optics for 20-70 keV. The detector is a 24 X 44 pixel array of 498-µm pitch. As a focal plane detector, uniformity from pixel to pixel is very desirable. In this paper, we present the characterization of some detector properties for the ...

A compact readout system for multi-pixel hybrid photodiodes

International Nuclear Information System (INIS)

Datema, C.P.; Meng, L.J.; Ramsden, D.

1999-01-01

Although the first Multi-pixel Hybrid Photodiode (M-HPD) was developed in the early 1990s by Delft Electronic Products, the main obstacle to its application has been the lack of availability of a compact read-out system. A fast, parallel readout system has been constructed for use with the earlier 25-pixel tube with High-energy Physics applications in mind. The excellent properties of the recently developed multi-pixel hybrid photodiodes (M-HPD) will be easier to exploit following the development of the new hybrid read-out circuits described in this paper. This system will enable all of the required read-out functions to be accommodate on a single board into which the M-HPD is plugged. The design and performance of a versatile system is described in which a trigger-signal, derived from the common-side of the silicon anode in the M-HPD, is used to trigger the readout of the 60-anode pixels in the M-HPD. The multi-channel amplifier section is based on the use of a new, commercial VLSI chip, whilst the read-out sequencer uses a chip of its own design. The common anode signal is processed by a fast amplifier and discriminator to provide a trigger signal when a single event is detected. In the prototype version, the serial analogue output data-stream is processed using a PC-mounted, high speed ADC. Results obtained using the new read-out system in a compact gamma-camera and with a small muon tracking-chamber demonstrate the low-noise performance of the system. The application of this read-out system in other position-sensitive or multi-anode photomultiplier tube applications are also described

Novel concept of TDI readout circuit for LWIR detector

Science.gov (United States)

Kim, Byunghyuck; Yoon, Nanyoung; Lee, Hee Chul; Kim, Choong-Ki

2000-07-01

Noise property is the prime consideration in readout circuit design. The output noise caused by the photon noise, which dominates total noise in BLIP detectors, is limited by the integration time that an element looks at a specific point in the scene. Large integration time leads to a low noise performance. Time-delay integration (TDI) is used to effectively increase the integration time and reduce the photon noise. However, it increases the number of dead pixels and requires large integration capacitors and low noise output stage of the readout circuit. In this paper, to solve these problems, we propose a new concept of readout circuit, which performs background suppression, cell-to-cell background current non-uniformity compensation, and dead pixel correction using memory, ADC, DAC, and current copier cell. In simulation results, comparing with the conventional TDI readout circuit, the integration capacitor size can be reduced to 1/5 and trans-impedance gain can be increased by five times. Therefore, the new TDI readout circuit does not require large area and low noise output stage. And the error of skimming current is less than 2%, and the fixed pattern noise induced by cell-to-cell background current variation is reduced to less than 1%.

Studies of mono-crystalline CVD diamond pixel detectors

CERN Document Server

Bartz, E; Atramentov, O; Yang, Z; Hall-Wilton, R; Schnetzer, S; Patel, R; Bugg, W; Hebda, P; Halyo, V; Hunt, A; Marlow, D; Steininger, H; Ryjov, V; Hits, D; Spanier, S; Pernicka, M; Johns, W; Doroshenko, J; Hollingsworth, M; Harrop, B; Farrow, C; Stone, R

2011-01-01

The Pixel Luminosity Telescope (PLT) is a dedicated luminosity monitor, presently under construction, for the Compact Muon Solenoid (CMS) experiment at the Large Hadron Collider (LHC). It measures the particle flux in several three layered pixel diamond detectors that are aligned precisely with respect to each other and the beam direction. At a lower rate it also performs particle track position measurements. The PLTs mono-crystalline CVD diamonds are bump-bonded to the same readout chip used in the silicon pixel system in CMS. Mono-crystalline diamond detectors have many attributes that make them desirable for use in charged particle tracking in radiation hostile environments such as the LHC. In order to further characterize the applicability of diamond technology to charged particle tracking we performed several tests with particle beams that included a measurement of the intrinsic spatial resolution with a high resolution beam telescope. Published by Elsevier B.V.

Studies of mono-crystalline CVD diamond pixel detectors

Energy Technology Data Exchange (ETDEWEB)

Bugg, W. [University of Tennessee, Knoxville (United States); Hollingsworth, M., E-mail: mhollin3@utk.edu [University of Tennessee, Knoxville (United States); Spanier, S.; Yang, Z. [University of Tennessee, Knoxville (United States); Bartz, E.; Doroshenko, J.; Hits, D.; Schnetzer, S.; Stone, R.; Atramentov, O.; Patel, R.; Barker, A. [Rutgers University, Piscataway (United States); Hall-Wilton, R.; Ryjov, V.; Farrow, C. [CERN, Geneva (Switzerland); Pernicka, M.; Steininger, H. [HEPHY, Vienna (Austria); Johns, W. [Vanderbilt University, Nashville (United States); Halyo, V.; Harrop, B. [Princeton University, Princeton (United States); and others

2011-09-11

The Pixel Luminosity Telescope (PLT) is a dedicated luminosity monitor, presently under construction, for the Compact Muon Solenoid (CMS) experiment at the Large Hadron Collider (LHC). It measures the particle flux in several three layered pixel diamond detectors that are aligned precisely with respect to each other and the beam direction. At a lower rate it also performs particle track position measurements. The PLT's mono-crystalline CVD diamonds are bump-bonded to the same readout chip used in the silicon pixel system in CMS. Mono-crystalline diamond detectors have many attributes that make them desirable for use in charged particle tracking in radiation hostile environments such as the LHC. In order to further characterize the applicability of diamond technology to charged particle tracking we performed several tests with particle beams that included a measurement of the intrinsic spatial resolution with a high resolution beam telescope.

Silicon Sensors for the Upgrades of the CMS Pixel Detector

CERN Document Server

Centis Vignali, Matteo; Schleper, Peter

2015-01-01

The Compact Muon Solenoid (CMS) is a general purpose detector at the Large Hadron Collider (LHC). The LHC luminosity is constantly increased through upgrades of the accel- erator and its injection chain. Two major upgrades will take place in the next years. The rst upgrade involves the LHC injector chain and allows the collider to achieve a luminosity of about 2 10 34 cm-2 s-1 A further upgrade of the LHC foreseen for 2025 will boost its luminosity to 5 10 34 cm-2 s1. As a consequence of the increased luminosity, the detectors need to be upgraded. In particular, the CMS pixel detector will undergo two upgrades in the next years. The rst upgrade (phase I) consists in the substitution of the current pixel detector in winter 2016/2017. The upgraded pixel detector will implement new readout elec- tronics that allow ecient data taking up to a luminosity of 2 10 34 cm-2s-1,twice as much as the LHC design luminosity. The modules that will constitute the upgraded detector are being produced at dierent institutes. Ham...

Development of 3D-DDTC pixel detectors for the ATLAS upgrade

International Nuclear Information System (INIS)

Dalla Betta, Gian-Franco; Boscardin, Maurizio; Darbo, Giovanni; Gemme, Claudia; La Rosa, Alessandro; Pernegger, Heinz; Piemonte, Claudio; Povoli, Marco; Ronchin, Sabina; Zoboli, Andrea; Zorzi, Nicola

2011-01-01

We report on the development of n-on-p, 3D Double-Side Double Type Column (3D-DDTC) pixel detectors fabricated at FBK-irst (Trento, Italy) and oriented to the ATLAS upgrade. The considered fabrication technology is simpler than that required for full 3D detectors with active edge, but the detector efficiency and radiation hardness critically depend on the columnar electrode overlap and should be carefully evaluated. The first assemblies of these sensors (featuring 2, 3, or 4 columns per pixel) with the ATLAS FEI3 read-out chip have been tested in laboratory. Selected results from the electrical and functional characterization with radioactive sources are discussed here.

Development of 3D-DDTC pixel detectors for the ATLAS upgrade

Energy Technology Data Exchange (ETDEWEB)

Dalla Betta, Gian-Franco, E-mail: dallabe@disi.unitn.it [INFN, Sezione di Padova (Gruppo Collegato di Trento), and DISI, Universita di Trento, Via Sommarive 14, 38123 Povo di Trento (Italy); Boscardin, Maurizio [Fondazione Bruno Kessler (FBK-irst), Via Sommarive 18, 38123 Povo di Trento (Italy); Darbo, Giovanni; Gemme, Claudia [INFN, Sezione di Genova, Via Dodecaneso 33, 16146 Genova (Italy); La Rosa, Alessandro; Pernegger, Heinz [CERN-PH, CH-1211 Geneve 23 (Switzerland); Piemonte, Claudio [Fondazione Bruno Kessler (FBK-irst), Via Sommarive 18, 38123 Povo di Trento (Italy); Povoli, Marco [INFN, Sezione di Padova (Gruppo Collegato di Trento), and DISI, Universita di Trento, Via Sommarive 14, 38123 Povo di Trento (Italy); Ronchin, Sabina [Fondazione Bruno Kessler (FBK-irst), Via Sommarive 18, 38123 Povo di Trento (Italy); Zoboli, Andrea [INFN, Sezione di Padova (Gruppo Collegato di Trento), and DISI, Universita di Trento, Via Sommarive 14, 38123 Povo di Trento (Italy); Zorzi, Nicola [Fondazione Bruno Kessler (FBK-irst), Via Sommarive 18, 38123 Povo di Trento (Italy)

2011-04-21

We report on the development of n-on-p, 3D Double-Side Double Type Column (3D-DDTC) pixel detectors fabricated at FBK-irst (Trento, Italy) and oriented to the ATLAS upgrade. The considered fabrication technology is simpler than that required for full 3D detectors with active edge, but the detector efficiency and radiation hardness critically depend on the columnar electrode overlap and should be carefully evaluated. The first assemblies of these sensors (featuring 2, 3, or 4 columns per pixel) with the ATLAS FEI3 read-out chip have been tested in laboratory. Selected results from the electrical and functional characterization with radioactive sources are discussed here.

Development of 3D-DDTC pixel detectors for the ATLAS upgrade

CERN Document Server

Betta, G -F Dalla; Darbo, G; Gemme, C; La Rosa, A; Pernegger, H; Piemonte, C; Povoli, M; Ronchin, S; Zoboli, A; Zorzi, N

2011-01-01

We report on the development of n-on-p, 3D Double-Side Double Type Column (3D-DDTC) pixel detectors fabricated at FBK-irst (Trento, Italy) and oriented to the ATLAS upgrade. The considered fabrication technology is simpler than that required for full 3D detectors with active edge, but the detector efficiency and radiation hardness critically depend on the columnar electrode overlap and should be carefully evaluated. The first assemblies of these sensors (featuring 2, 3, or 4 columns per pixel) with the ATLAS FEI3 read-out chip have been tested in laboratory. Selected results from the electrical and functional characterization with radioactive sources are here discussed.

3D silicon pixel detectors for the High-Luminosity LHC

CERN Document Server

Lange, J.

2016-01-01

3D silicon pixel detectors have been investigated as radiation-hard candidates for the innermost layers of the HL-LHC upgrade of the ATLAS pixel detector. 3D detectors are already in use today in the ATLAS IBL and AFP experiments. These are based on 50x250 um2 large pixels connected to the FE-I4 readout chip. Detectors of this generation were irradiated to HL-LHC fluences and demonstrated excellent radiation hardness with operational voltages as low as 180 V and power dissipation of 12--15 mW/cm2 at a fluence of about 1e16 neq/cm2, measured at -25 degree C. Moreover, to cope with the higher occupancies expected at the HL-LHC, a first run of a new generation of 3D detectors designed for the HL-LHC was produced at CNM with small pixel sizes of 50x50 and 25x100 um2, matched to the FE-I4 chip. They demonstrated a good performance in the laboratory and in beam tests with hit efficiencies of about 97% at already 1--2V before irradiation.

Accounting for Dark Current Accumulated during Readout of Hubble's ACS/WFC Detectors

Science.gov (United States)

Ryon, Jenna E.; Grogin, Norman A.; Coe, Dan A.; ACS Team

2018-06-01

We investigate the properties of excess dark current accumulated during the 100-second full-frame readout of the Advanced Camera for Surveys (ACS) Wide Field Channel (WFC) detectors. This excess dark current, called "readout dark", gives rise to ambient background gradients and hot columns in each ACS/WFC image. While readout dark signal is removed from science images during the bias correction step in CALACS, the additional noise from the readout dark is currently not taken into account. We develop a method to estimate the readout dark noise properties in ACS/WFC observations. We update the error (ERR) extensions of superbias images to include the appropriate noise from the ambient readout dark gradient and stable hot columns. In recent data, this amounts to about 5 e-/pixel added variance in the rows farthest from the WFC serial registers, and about 7 to 30 e-/pixel added variance along the stable hot columns. We also flag unstable hot columns in the superbias data quality (DQ) extensions. The new reference file pipeline for ACS/WFC implements these updates to our superbias creation process.

DEPFET active pixel detectors for a future linear $e^+e^-$ collider

CERN Document Server

Alonso, O; Dieguez, A; Dingfelder, J; Hemperek, T; Kishishita, T; Kleinohl, T; Koch, M; Krueger, H; Lemarenko, M; Luetticke, F; Marinas, C; Schnell, M; Wermes, N; Campbell, A; Ferber, T; Kleinwort, C; Niebuhr, C; Soloviev, Y; Steder, M; Volkenborn, R; Yaschenko, S; Fischer, P; Kreidl, C; Peric, I; Knopf, J; Ritzert, M; Curras, E; Lopez-Virto, A; Moya, D; Vila, I; Boronat, M; Esperante, D; Fuster, J; Garcia Garcia, I; Lacasta, C; Oyanguren, A; Ruiz, P; Timon, G; Vos, M; Gessler, T; Kuehn, W; Lange, S; Muenchow, D; Spruck, B; Frey, A; Geisler, C; Schwenker, B; Wilk, F; Barvich, T; Heck, M; Heindl, S; Lutz, O; Mueller, Th; Pulvermacher, C; Simonis, H.J; Weiler, T; Krausser, T; Lipsky, O; Rummel, S; Schieck, J; Schlueter, T; Ackermann, K; Andricek, L; Chekelian, V; Chobanova, V; Dalseno, J; Kiesling, C; Koffmane, C; Gioi, L.Li; Moll, A; Moser, H.G; Mueller, F; Nedelkovska, E; Ninkovic, J; Petrovics, S; Prothmann, K; Richter, R; Ritter, A; Ritter, M; Simon, F; Vanhoefer, P; Wassatsch, A; Dolezal, Z; Drasal, Z; Kodys, P; Kvasnicka, P; Scheirich, J

2013-01-01

The DEPFET collaboration develops highly granular, ultra-transparent active pixel detectors for high-performance vertex reconstruction at future collider experiments. The characterization of detector prototypes has proven that the key principle, the integration of a first amplification stage in a detector-grade sensor material, can provide a comfortable signal to noise ratio of over 40 for a sensor thickness of 50-75 $\\mathrm{\\mathbf{\\mu m}}$. ASICs have been designed and produced to operate a DEPFET pixel detector with the required read-out speed. A complete detector concept is being developed, including solutions for mechanical support, cooling and services. In this paper the status of DEPFET R & D project is reviewed in the light of the requirements of the vertex detector at a future linear $\\mathbf{e^+ e^-}$ collider.

14C autoradiography with an energy-sensitive silicon pixel detector.

Science.gov (United States)

Esposito, M; Mettivier, G; Russo, P

2011-04-07

The first performance tests are presented of a carbon-14 ((14)C) beta-particle digital autoradiography system with an energy-sensitive hybrid silicon pixel detector based on the Timepix readout circuit. Timepix was developed by the Medipix2 Collaboration and it is similar to the photon-counting Medipix2 circuit, except for an added time-based synchronization logic which allows derivation of energy information from the time-over-threshold signal. This feature permits direct energy measurements in each pixel of the detector array. Timepix is bump-bonded to a 300 µm thick silicon detector with 256 × 256 pixels of 55 µm pitch. Since an energetic beta-particle could release its kinetic energy in more than one detector pixel as it slows down in the semiconductor detector, an off-line image analysis procedure was adopted in which the single-particle cluster of hit pixels is recognized; its total energy is calculated and the position of interaction on the detector surface is attributed to the centre of the charge cluster. Measurements reported are detector sensitivity, (4.11 ± 0.03) × 10(-3) cps mm(-2) kBq(-1) g, background level, (3.59 ± 0.01) × 10(-5) cps mm(-2), and minimum detectable activity, 0.0077 Bq. The spatial resolution is 76.9 µm full-width at half-maximum. These figures are compared with several digital imaging detectors for (14)C beta-particle digital autoradiography.

Scintillator counters with multi-pixel avalanche photodiode readout for the ND280 detector of the T2K experiment

International Nuclear Information System (INIS)

Mineev, O.; Afanasjev, A.; Bondarenko, G.; Golovin, V.; Gushchin, E.; Izmailov, A.; Khabibullin, M.; Khotjantsev, A.; Kudenko, Yu.; Kurimoto, Y.; Kutter, T.; Lubsandorzhiev, B.; Mayatski, V.; Musienko, Yu.; Nakaya, T.; Nobuhara, T.; Shaibonov, B.A.J.; Shaikhiev, A.; Taguchi, M.; Yershov, N.; Yokoyama, M.

2007-01-01

The Tokai-to-Kamioka (T2K) experiment is a second generation long baseline neutrino oscillation experiment which aims at a sensitive search for ν e appearance. The main design features of the T2K near neutrino detectors located at 280m from the target are presented, and the scintillator counters are described. The counters are readout via WLS fibers embedded into S-shaped grooves in the scintillator from both ends by multi-pixel avalanche photodiodes operating in a limited Geiger mode. Operating principles and results of tests of photosensors with a sensitive area of 1mm 2 are presented. A time resolution of 1.75ns, a spatial resolution of 9.9-12.4cm, and a detection efficiency for minimum ionizing particles of more than 99% were obtained for scintillator detectors in a beam test

High bandwidth pixel detector modules for the ATLAS Insertable B-Layer

International Nuclear Information System (INIS)

Backhaus, Malte

2014-01-01

The investigation of the nature of the recently discovered electro-weak symmetry breaking mechanism of the standard model of particle physics as well as the search for physics beyond the standard model with the LHC require to collect even more data. To achieve this goal, the luminosity of the LHC will be increased in two steps. The increased luminosity results in serious challenges for the inner tracking systems of the experiments at the LHC. The ATLAS pixel detector will also be upgraded in a two stage program. During the shutdown in 2013 and 2014 a fourth hybrid pixel detector layer, the socalled Insertable B-Layer (IBL) is inserted inside the existing pixel detector. This thesis focuses on the characterization, performance measurement, and production quality assurance of the central sensitive elements of the IBL, the modules. This includes a full characterization of the readout chip (FE-I4) and of the assembled modules. A completely new inner tracking system is mandatory in ATLAS after the second luminosity increase in the shutdown of 2022 and 2023. The final chapter of this thesis introduces a new module concept that uses an industrial high voltage CMOS technology as sensor layer, which is capacitively coupled to the FE-I4 readout chip.

Operational Experience and Performance with the ATLAS Pixel detector

CERN Document Server

Yang, Hongtao; The ATLAS collaboration

2018-01-01

In this presentation, I will discuss the operation of ATLAS Pixel Detector during Run 2 proton-proton data-taking at √s=13 TeV in 2017. The topics to be covered include 1) the bandwidth issue and how it is mitigated through readout upgrade and threshold adjustment; 2) the auto-corrective actions; 3) monitoring of radiation effects.

The Belle II DEPFET pixel detector

Energy Technology Data Exchange (ETDEWEB)

Moser, Hans-Günther, E-mail: moser@mpp.mpg.de

2016-09-21

The Belle II experiment at KEK (Tsukuba, Japan) will explore heavy flavour physics (B, charm and tau) at the starting of 2018 with unprecedented precision. Charged particles are tracked by a two-layer DEPFET pixel device (PXD), a four-layer silicon strip detector (SVD) and the central drift chamber (CDC). The PXD will consist of two layers at radii of 14 mm and 22 mm with 8 and 12 ladders, respectively. The pixel sizes will vary, between 50 μm×(55–60) μm in the first layer and between 50 μm×(70–85) μm in the second layer, to optimize the charge sharing efficiency. These innermost layers have to cope with high background occupancy, high radiation and must have minimal material to reduce multiple scattering. These challenges are met using the DEPFET technology. Each pixel is a FET integrated on a fully depleted silicon bulk. The signal charge collected in the ‘internal gate’ modulates the FET current resulting in a first stage amplification and therefore very low noise. This allows very thin sensors (75 μm) reducing the overall material budget of the detector (0.21% X{sub 0}). Four fold multiplexing of the column parallel readout allows read out a full frame of the pixel matrix in only 20 μs while keeping the power consumption low enough for air cooling. Only the active electronics outside the detector acceptance has to be cooled actively with a two phase CO{sub 2} system. Furthermore the DEPFET technology offers the unique feature of an electronic shutter which allows the detector to operate efficiently in the continuous injection mode of superKEKB.

arXiv Performance verification of the CMS Phase-1 Upgrade Pixel detector

CERN Document Server

Veszpremi, Viktor

2017-12-04

The CMS tracker consists of two tracking systems utilizing semiconductor technology: the inner pixel and the outer strip detectors. The tracker detectors occupy the volume around the beam interaction region between 3 cm and 110 cm in radius and up to 280 cm along the beam axis. The pixel detector consists of 124 million pixels, corresponding to about 2 m 2 total area. It plays a vital role in the seeding of the track reconstruction algorithms and in the reconstruction of primary interactions and secondary decay vertices. It is surrounded by the strip tracker with 10 million read-out channels, corresponding to 200 m 2 total area. The tracker is operated in a high-occupancy and high-radiation environment established by particle collisions in the LHC . The current strip detector continues to perform very well. The pixel detector that has been used in Run 1 and in the first half of Run 2 was, however, replaced with the so-called Phase-1 Upgrade detector. The new system is better suited to match the increased inst...

The construction of the phase 1 upgrade of the CMS pixel detector

CERN Document Server

Weber, Hannsjorg Artur

2017-01-01

The innermost layers of the original CMS tracker were built out of pixel detectors arranged in three barrel layers and two forward disks in each endcap. The original CMS detector was designed for the nominal instantaneous LHC luminosity of $1\\times10^{34}\\,\\text{cm}^{-2}\\text{s}^{-1}$. Under the conditions expected in the coming years, which will see an increase of a factor two of the instantaneous luminosity, the CMS pixel detector would have seen a dynamic inefficiency caused by data losses due to buffer overflows. For this reason the CMS collaboration has installed during the recent extended end of year shutdown a replacement pixel detector. The phase-1 upgrade of the CMS pixel detector will operate at high efficiency at an instantaneous luminosity of $2\\times10^{34}\\,\\text{cm}^{-2}\\text{s}^{-1}$ with increased detector acceptance and additional redundancy for the tracking, while at the same time reducing the material budget. These goals are achieved using a new read-out chip and modified powering and rea...

The color of X-rays: Spectral X-ray computed tomography using energy sensitive pixel detectors

NARCIS (Netherlands)

Schioppa, E.J.

2014-01-01

Energy sensitive X-ray imaging detectors are produced by connecting a semiconductor sensor to a spectroscopic pixel readout chip. In this thesis, the applicability of such detectors to X-ray Computed Tomography (CT) is studied. A prototype Medipix based silicon detector is calibrated using X-ray

Characterization of active CMOS sensors for capacitively coupled pixel detectors

Energy Technology Data Exchange (ETDEWEB)

Hirono, Toko; Gonella, Laura; Janssen, Jens; Hemperek, Tomasz; Huegging, Fabian; Krueger, Hans; Wermes, Norbert [Institute of Physics, University of Bonn (Germany); Peric, Ivan [Institut fuer Prozessdatenverarbeitung und Elektronik, Karlsruher Institut fuer Technologie, Karlsruhe (Germany)

2015-07-01

Active CMOS pixel sensor is one of the most attractive candidates for detectors of upcoming particle physics experiments. In contrast to conventional sensors of hybrid detectors, signal processing circuit can be integrated in the active CMOS sensor. The characterization and optimization of the pixel circuit are indispensable to obtain a good performance from the sensors. The prototype chips of the active CMOS sensor were fabricated in the AMS 180nm and L-Foundry 150 nm CMOS processes, respectively a high voltage and high resistivity technology. Both chips have a charge sensitive amplifier and a comparator in each pixel. The chips are designed to be glued to the FEI4 pixel readout chip. The signals from 3 pixels of the prototype chips are capacitively coupled to the FEI4 input pads. We have performed lab tests and test beams to characterize the prototypes. In this presentation, the measurement results of the active CMOS prototype sensors are shown.

CMOS Pixel Sensors for High Precision Beam Telescopes and Vertex Detectors

International Nuclear Information System (INIS)

Masi, R. de; Baudot, J.; Fontaine, J.-Ch.

2009-01-01

CMOS sensors of the MIMOSA (standing for Minimum Ionising particle MOS Active pixel sensor) series are developed at IPHC since a decade and have ended up with full scale devices used in beam telescopes and in demonstrators of future vertex detectors. The sensors deliver analogue, unfiltered, signals and are therefore limited to read-out frequencies of ∼ 1 kframe/s. Since a few years, a fast architecture is being developed in collaboration with IRFU, which aims to speed up the read-out by 1-2 orders of magnitude. The first full scale sensor based on this architecture was fabricated recently and is being tested. Made of 660,000 pixels (18 μm pitch) covering an active area of ∼ 2 cm 2 , it delivers zero-suppressed binary signals, which allow running at ∼ 10 kframes/s. It will equip the beam telescope of the E.U. project EUDET and serve as a forerunner of the sensor equipping the 2 layers of the PIXEL detector of the STAR experiment at RHIC. The contribution to the conference will overview the main features and test results of this pioneering sensor. It will next describe its evolution towards read-out frequencies approaching 100 kframes/s, as required for the vertex detectors of the CBM experiment at FAIR and at the ILC. Finally, the issue of radiation tolerance will be addressed, in the context of a newly available CMOS process using a depleted substrate. A prototype sensor was fabricated in a such CMOS process. The talk will summarise beam test results showing, for the first time, that fluences of 10 14 n eq /cm 2 may be tolerable for CMOS sensors. Overall, the talk provides an overview of the status and plans of CMOS pixel sensors at the frontier of their achievements and outreach. (author)

High-speed imaging at high x-ray energy: CdTe sensors coupled to charge-integrating pixel array detectors

Energy Technology Data Exchange (ETDEWEB)

Becker, Julian; Tate, Mark W.; Shanks, Katherine S.; Philipp, Hugh T.; Weiss, Joel T.; Purohit, Prafull [Laboratory of Atomic and Solid State Physics, Cornell University, Ithaca, NY 14853 (United States); Chamberlain, Darol [Cornell High Energy Synchrotron Source (CHESS), Cornell University, Ithaca, NY 14853 (United States); Gruner, Sol M., E-mail: smg26@cornell.edu [Laboratory of Atomic and Solid State Physics, Cornell University, Ithaca, NY 14853 (United States); Cornell High Energy Synchrotron Source (CHESS), Cornell University, Ithaca, NY 14853 (United States)

2016-07-27

Pixel Array Detectors (PADs) consist of an x-ray sensor layer bonded pixel-by-pixel to an underlying readout chip. This approach allows both the sensor and the custom pixel electronics to be tailored independently to best match the x-ray imaging requirements. Here we describe the hybridization of CdTe sensors to two different charge-integrating readout chips, the Keck PAD and the Mixed-Mode PAD (MM-PAD), both developed previously in our laboratory. The charge-integrating architecture of each of these PADs extends the instantaneous counting rate by many orders of magnitude beyond that obtainable with photon counting architectures. The Keck PAD chip consists of rapid, 8-frame, in-pixel storage elements with framing periods <150 ns. The second detector, the MM-PAD, has an extended dynamic range by utilizing an in-pixel overflow counter coupled with charge removal circuitry activated at each overflow. This allows the recording of signals from the single-photon level to tens of millions of x-rays/pixel/frame while framing at 1 kHz. Both detector chips consist of a 128×128 pixel array with (150 µm){sup 2} pixels.

3D track reconstruction capability of a silicon hybrid active pixel detector

Energy Technology Data Exchange (ETDEWEB)

Bergmann, Benedikt; Pichotka, Martin; Pospisil, Stanislav; Vycpalek, Jiri [Czech Technical University in Prague, Institute of Experimental and Applied Physics, Praha (Czech Republic); Burian, Petr; Broulim, Pavel [Czech Technical University in Prague, Institute of Experimental and Applied Physics, Praha (Czech Republic); University of West Bohemia, Faculty of Electrical Engineering, Pilsen (Czech Republic); Jakubek, Jan [Advacam s.r.o., Praha (Czech Republic)

2017-06-15

Timepix3 detectors are the latest generation of hybrid active pixel detectors of the Medipix/Timepix family. Such detectors consist of an active sensor layer which is connected to the readout ASIC (application specific integrated circuit), segmenting the detector into a square matrix of 256 x 256 pixels (pixel pitch 55 μm). Particles interacting in the active sensor material create charge carriers, which drift towards the pixelated electrode, where they are collected. In each pixel, the time of the interaction (time resolution 1.56 ns) and the amount of created charge carriers are measured. Such a device was employed in an experiment in a 120 GeV/c pion beam. It is demonstrated, how the drift time information can be used for ''4D'' particle tracking, with the three spatial dimensions and the energy losses along the particle trajectory (dE/dx). Since the coordinates in the detector plane are given by the pixelation (x,y), the x- and y-resolution is determined by the pixel pitch (55 μm). A z-resolution of 50.4 μm could be achieved (for a 500 μm thick silicon sensor at 130 V bias), whereby the drift time model independent z-resolution was found to be 28.5 μm. (orig.)

3D track reconstruction capability of a silicon hybrid active pixel detector

Science.gov (United States)

Bergmann, Benedikt; Pichotka, Martin; Pospisil, Stanislav; Vycpalek, Jiri; Burian, Petr; Broulim, Pavel; Jakubek, Jan

2017-06-01

Timepix3 detectors are the latest generation of hybrid active pixel detectors of the Medipix/Timepix family. Such detectors consist of an active sensor layer which is connected to the readout ASIC (application specific integrated circuit), segmenting the detector into a square matrix of 256 × 256 pixels (pixel pitch 55 μm). Particles interacting in the active sensor material create charge carriers, which drift towards the pixelated electrode, where they are collected. In each pixel, the time of the interaction (time resolution 1.56 ns) and the amount of created charge carriers are measured. Such a device was employed in an experiment in a 120 GeV/c pion beam. It is demonstrated, how the drift time information can be used for "4D" particle tracking, with the three spatial dimensions and the energy losses along the particle trajectory (dE/dx). Since the coordinates in the detector plane are given by the pixelation ( x, y), the x- and y-resolution is determined by the pixel pitch (55 μm). A z-resolution of 50.4 μm could be achieved (for a 500 μm thick silicon sensor at 130 V bias), whereby the drift time model independent z-resolution was found to be 28.5 μm.

Test Beam Results of Geometry Optimized Hybrid Pixel Detectors

CERN Document Server

Becks, K H; Grah, C; Mättig, P; Rohe, T

2006-01-01

The Multi-Chip-Module-Deposited (MCM-D) technique has been used to build hybrid pixel detector assemblies. This paper summarises the results of an analysis of data obtained in a test beam campaign at CERN. Here, single chip hybrids made of ATLAS pixel prototype read-out electronics and special sensor tiles were used. They were prepared by the Fraunhofer Institut fuer Zuverlaessigkeit und Mikrointegration, IZM, Berlin, Germany. The sensors feature an optimized sensor geometry called equal sized bricked. This design enhances the spatial resolution for double hits in the long direction of the sensor cells.

Leakage current measurements on pixelated CdZnTe detectors

International Nuclear Information System (INIS)

Dirks, B.P.F.; Blondel, C.; Daly, F.; Gevin, O.; Limousin, O.; Lugiez, F.

2006-01-01

In the field of the R and D of a new generation hard X-ray cameras for space applications we focus on the use of pixelated CdTe or CdZnTe semiconductor detectors. They are covered with 64 (0.9x0.9 mm 2 ) or 256 (0.5x0.5 mm 2 ) pixels, surrounded by a guard ring and operate in the energy ranging from several keV to 1 MeV, at temperatures between -20 and +20 o C. A critical parameter in the characterisation of these detectors is the leakage current per pixel under polarisation (∼50-500 V/mm). In operation mode each pixel will be read-out by an integrated spectroscopy channel of the multi-channel IDeF-X ASIC currently developed in our lab. The design and functionality of the ASIC depends directly on the direction and value of the current. A dedicated and highly insulating electronics circuit is designed to automatically measure the current in each individual pixel, which is in the order of tens of pico-amperes. Leakage current maps of different CdZnTe detectors of 2 and 6 mm thick and at various temperatures are presented and discussed. Defect density diagnostics have been performed by calculation of the activation energy of the material

Fine pitch and low material readout bus in the Silicon Pixel Vertex Tracker for the PHENIX Vertex Tracker upgrade

International Nuclear Information System (INIS)

Fujiwara, Kohei

2010-01-01

The construction of the Silicon Pixel Detector is starting in spring 2009 as project of the RHIC-PHENIX Silicon Vertex Tracker (VTX) upgrade at the Brookhaven National Laboratory. For the construction, we have developed a fine pitch and low material readout bus as the backbone parts of the VTX. In this article, we report the development and production of the readout bus.

The first bump-bonded pixel detectors on CVD diamond

International Nuclear Information System (INIS)

Adam, W.; Bauer, C.; Berdermann, E.; Bergonzo, P.; Bogani, F.; Borchi, E.; Brambilla, A.; Bruzzi, M.; Colledani, C.; Conway, J.; Dabrowski, W.; Delpierre, P.; Deneuville, A.; Dulinski, W.; Eijk, B. van; Fallou, A.; Fizzotti, F.; Foulon, F.; Friedl, M.; Gan, K.K.; Gheeraert, E.; Grigoriev, E.; Hallewell, G.; Hall-Wilton, R.; Han, S.; Hartjes, F.; Hrubec, J.; Husson, D.; Kagan, H.; Kania, D.; Kaplon, J.; Karl, C.; Kass, R.; Krammer, M.; Logiudice, A.; Lu, R.; Manfredi, P.F.; Manfredotti, C.; Marshall, R.D.; Meier, D.; Mishina, M.; Oh, A.; Palmieri, V.G.; Pan, L.S.; Peitz, A.; Pernicka, M.; Pirollo, S.; Polesello, P.; Pretzl, K.; Re, V.; Riester, J.L.; Roe, S.; Roff, D.; Rudge, A.; Schnetzer, S.; Sciortino, S.; Speziali, V.; Stelzer, H.; Steuerer, J.; Stone, R.; Tapper, R.J.; Tesarek, R.; Trawick, M.; Trischuk, W.; Turchetta, R.; Vittone, E.; Wagner, A.; Walsh, A.M.; Wedenig, R.; Weilhammer, P.; Zeuner, W.; Ziock, H.; Zoeller, M.; Charles, E.; Ciocio, A.; Dao, K.; Einsweiler, K.; Fasching, D.; Gilchriese, M.; Joshi, A.; Kleinfelder, S.; Milgrome, O.; Palaio, N.; Richardson, J.; Sinervo, P.; Zizka, G.

1999-01-01

Diamond is a nearly ideal material for detecting ionising radiation. Its outstanding radiation hardness, fast charge collection and low leakage current allow it to be used in high radiation environments. These characteristics make diamond sensors particularly appealing for use in the next generation of pixel detectors. Over the last year, the RD42 collaboration has worked with several groups that have developed pixel readout electronics in order to optimise diamond sensors for bump-bonding. This effort resulted in an operational diamond pixel sensor that was tested in a pion beam. We demonstrate that greater than 98% of the channels were successfully bump-bonded and functioning. The device shows good overall hit efficiency as well as clear spatial hit correlation to tracks measured in a silicon reference telescope. A position resolution of 14.8 μm was observed, consistent with expectations given the detector pitch

The first bump-bonded pixel detectors on CVD diamond

CERN Document Server

Adam, W; Berdermann, E; Bergonzo, P; Bogani, F; Borchi, E; Brambilla, A; Bruzzi, Mara; Colledani, C; Conway, J; Dabrowski, W; Delpierre, P A; Deneuville, A; Dulinski, W; van Eijk, B; Fallou, A; Fizzotti, F; Foulon, F; Fried, M; Gan, K K; Gheeraert, E; Grigoriev, E; Hallewell, G D; Hall-Wilton, R; Han, S; Hartjes, F G; Hrubec, Josef; Husson, D; Kagan, H; Kania, D R; Kaplon, J; Karl, C; Kass, R; Krammer, Manfred; Lo Giudice, A; Lü, R; Manfredi, P F; Manfredotti, C; Marshall, R D; Meier, D; Mishina, M; Oh, A; Palmieri, V G; Pan, L S; Peitz, A; Pernicka, Manfred; Pirollo, S; Polesello, P; Pretzl, Klaus P; Re, V; Riester, J L; Roe, S; Roff, D G; Rudge, A; Schnetzer, S R; Sciortino, S; Speziali, V; Stelzer, H; Steuerer, J; Stone, R; Tapper, R J; Tesarek, R J; Trawick, M L; Trischuk, W; Turchetta, R; Vittone, E; Wagner, A; Walsh, A M; Wedenig, R; Weilhammer, Peter; Zeuner, W; Ziock, H J; Zöller, M; Charles, E; Ciocio, A; Dao, K; Einsweiler, Kevin F; Fasching, D; Gilchriese, M G D; Joshi, A; Kleinfelder, S A; Milgrome, O; Palaio, N; Richardson, J; Sinervo, P K; Zizka, G

1999-01-01

Diamond is a nearly ideal material for detecting ionising radiation. Its outstanding radiation hardness, fast charge collection and low leakage current allow it to be used in high radiation environments. These characteristics make diamond sensors particularly appealing for use in the next generation of pixel detectors. Over the last year, the RD42 collaboration has worked with several groups that have developed pixel readout electronics in order to optimise diamond sensors for bump-bonding. This effort resulted in an operational diamond pixel sensor that was tested in a pion beam. We demonstrate that greater than 98565544f the channels were successfully bump-bonded and functioning. The device shows good overall hit efficiency as well as clear spatial hit correlation to tracks measured in a silicon reference telescope. A position resolution of 14.8 mu m was observed, consistent with expectations given the detector pitch. (13 refs).

The first bump-bonded pixel detectors on CVD diamond

Energy Technology Data Exchange (ETDEWEB)

Adam, W.; Bauer, C.; Berdermann, E.; Bergonzo, P.; Bogani, F.; Borchi, E.; Brambilla, A.; Bruzzi, M.; Colledani, C.; Conway, J.; Dabrowski, W.; Delpierre, P.; Deneuville, A.; Dulinski, W.; Eijk, B. van; Fallou, A.; Fizzotti, F.; Foulon, F.; Friedl, M.; Gan, K.K.; Gheeraert, E.; Grigoriev, E.; Hallewell, G.; Hall-Wilton, R.; Han, S.; Hartjes, F.; Hrubec, J.; Husson, D.; Kagan, H.; Kania, D.; Kaplon, J.; Karl, C.; Kass, R.; Krammer, M.; Logiudice, A.; Lu, R.; Manfredi, P.F.; Manfredotti, C.; Marshall, R.D.; Meier, D.; Mishina, M.; Oh, A.; Palmieri, V.G.; Pan, L.S.; Peitz, A.; Pernicka, M.; Pirollo, S.; Polesello, P.; Pretzl, K.; Re, V.; Riester, J.L.; Roe, S.; Roff, D.; Rudge, A.; Schnetzer, S.; Sciortino, S.; Speziali, V.; Stelzer, H.; Steuerer, J.; Stone, R.; Tapper, R.J.; Tesarek, R.; Trawick, M.; Trischuk, W. E-mail: william@physics.utoronto.ca; Turchetta, R.; Vittone, E.; Wagner, A.; Walsh, A.M.; Wedenig, R.; Weilhammer, P.; Zeuner, W.; Ziock, H.; Zoeller, M.; Charles, E.; Ciocio, A.; Dao, K.; Einsweiler, K.; Fasching, D.; Gilchriese, M.; Joshi, A.; Kleinfelder, S.; Milgrome, O.; Palaio, N.; Richardson, J.; Sinervo, P.; Zizka, G

1999-11-01

Diamond is a nearly ideal material for detecting ionising radiation. Its outstanding radiation hardness, fast charge collection and low leakage current allow it to be used in high radiation environments. These characteristics make diamond sensors particularly appealing for use in the next generation of pixel detectors. Over the last year, the RD42 collaboration has worked with several groups that have developed pixel readout electronics in order to optimise diamond sensors for bump-bonding. This effort resulted in an operational diamond pixel sensor that was tested in a pion beam. We demonstrate that greater than 98% of the channels were successfully bump-bonded and functioning. The device shows good overall hit efficiency as well as clear spatial hit correlation to tracks measured in a silicon reference telescope. A position resolution of 14.8 {mu}m was observed, consistent with expectations given the detector pitch.

Amorphous silicon pixel radiation detectors and associated thin film transistor electronics readout

International Nuclear Information System (INIS)

Perez-Mendez, V.; Drewery, J.; Hong, W.S.; Jing, T.; Kaplan, S.N.; Lee, H.; Mireshghi, A.

1994-10-01

We describe the characteristics of thin (1 μm) and thick (>30 μm) hydrogenated amorphous silicon p-i-n diodes which are optimized for detecting and recording the spatial distribution of charged particles, x-rays and γ rays. For x-ray, γ ray, and charged particle detection we can use thin p-i-n photosensitive diode arrays coupled to evaporated layers of suitable scintillators. For direct detection of charged particles with high resistance to radiation damage, we use the thick p-i-n diode arrays. Deposition techniques using helium dilution, which produce samples with low stress are described. Pixel arrays for flux exposures can be readout by transistor, single diode or two diode switches. Polysilicon charge sensitive pixel amplifiers for single event detection are described. Various applications in nuclear, particle physics, x-ray medical imaging, neutron crystallography, and radionuclide chromatography are discussed

Performance of a Fast Binary Readout CMOS Active Pixel Sensor Chip Designed for Charged Particle Detection

Science.gov (United States)

Deerli, Yavuz; Besanon, Marc; Besson, Auguste; Claus, Gilles; Deptuch, Grzegorz; Dulinski, Wojciech; Fourches, Nicolas; Goffe, Mathieu; Himmi, Abdelkader; Li, Yan; Lutz, Pierre; Orsini, Fabienne; Szelezniak, Michal

2006-12-01

We report on the performance of the MIMOSA8 (HiMAPS1) chip. The chip is a 128times32 pixels array where 24 columns have discriminated binary outputs and eight columns analog test outputs. Offset correction techniques are used extensively in this chip to overcome process related mismatches. The array is divided in four blocks of pixels with different conversion factors and is controlled by a serially programmable sequencer. MIMOSA8 is a representative of the CMOS sensors development option considered as a promising candidate for the Vertex Detector of the future International Linear Collider (ILC). The readout technique, implemented on the chip, combines high spatial resolution capabilities with high processing readout speed. Data acquisition, providing control of the chip and signal buffering and linked to a VME system, was made on the eight analog outputs. Analog data, without and with a 55Fe X-ray source, were acquired and processed using off-line analysis software. From the reconstruction of pixel clusters, built around a central pixel, we deduce that the charge spread is limited to the closest 25 pixels and almost all the available charge is collected. The position of the total charge collection peak (and subsequently the charge-to-voltage conversion factor) stays unaffected when the clock frequency is increased even up to 150 MHz (13.6 mus readout time per frame). The discriminators, placed in the readout chain, have proved to be fully functional. Beam tests have been made with high energy electrons at DESY (Germany) to study detection efficiency. The results prove that MIMOSA8 is the first and fastest successful monolithic active pixel sensor with on-chip signal discrimination for detection of MIPs

Sensor Development for the CMS Pixel Detector

CERN Document Server

Rohe, T; Chiochia, V; Cremaldi, L M; Cucciarelli, S; Dorkhov, A; Konecki, M; Prokofiev, K; Regenfus, C; Sanders, D A; Son, S; Speer, T; Swartz, M

2003-01-01

This paper reports on a current R&D activity for the sensor part of the CMS pixel detector. Devices featuring several design and technology options have been irradiated up to a proton fluence of 1E15 (1MeV Neutron)/cm**2 at the CERN PS. Afterwards they have been bump bonded to unirradiated readout chips. The chip allows a non zero suppressed full analogue readout and therefore a good characterization of the sensors in terms of noise and charge collection properties. The samples have been tested using high energy pions in the H2 beam line of the CERN SPS in June and September 2003. The results of this test beam are presented and the differences between the sensor options are discussed.

Development of a super B-factory monolithic active pixel detector-the Continuous Acquisition Pixel (CAP) prototypes

International Nuclear Information System (INIS)

Varner, G.; Barbero, M.; Bozek, A.; Browder, T.; Fang, F.; Hazumi, M.; Igarashi, A.; Iwaida, S.; Kennedy, J.; Kent, N.; Olsen, S.; Palka, H.; Rosen, M.; Ruckman, L.; Stanic, S.; Trabelsi, K.; Tsuboyama, T.; Uchida, K.

2005-01-01

Over the last few years great progress has been made in the technological development of Monolithic Active Pixel Sensors (MAPS) such that upgrades to existing vertex detectors using this technology are now actively being considered. Future vertex detection at an upgraded KEK-B factory, already the highest luminosity collider in the world, will require a detector technology capable of withstanding the increased track densities and larger radiation exposures. Near the beam pipe the current silicon strip detectors have projected occupancies in excess of 100%. Deep sub-micron MAPS look very promising to address this problem. In the context of an upgrade to the Belle vertex detector, the major obstacles to realizing such a device have been concerns about radiation hardness and readout speed. Two prototypes implemented in the TSMC 0.35 μm process have been developed to address these issues. Denoted the Continuous Acquisition Pixel, or CAP, the two variants of this architecture are distinguished in that CAP2 includes an 8-deep sampling pipeline within each 22.5 μm 2 pixel. Preliminary test results and remaining R and D issues are presented

Fabrication and characterization of n-on-n silicon pixel detectors compatible with the Medipix2 readout chip

Energy Technology Data Exchange (ETDEWEB)

Zorzi, N. [ITC-irst, Divisione Microsistemi, Via Sommarive 18, I-38050 Povo (Trento) (Italy)]. E-mail: zorzi@itc.it; Bisogni, M.G. [Dipartimento di Fisica, Universita di Pisa and Sezione INFN, Via Buonarroti 2, I-56127 Pisa (Italy); Boscardin, M. [ITC-irst, Divisione Microsistemi, Via Sommarive 18, I-38050 Povo (Trento) (Italy); Dalla Betta, G.-F. [Dipartimento di Informatica e Telecomunicazioni, Universita di Trento, Via Sommarive 14, I-38050 Povo (Trento) (Italy); Gregori, P. [ITC-irst, Divisione Microsistemi, Via Sommarive 18, I-38050 Povo (Trento) (Italy); Novelli, M. [Dipartimento di Fisica, Universita di Pisa and Sezione INFN, Via Buonarroti 2, I-56127 Pisa (Italy); Piemonte, C. [ITC-irst, Divisione Microsistemi, Via Sommarive 18, I-38050 Povo (Trento) (Italy); Quattrocchi, M. [Dipartimento di Fisica, Universita di Pisa and Sezione INFN, Via Buonarroti 2, I-56127 Pisa (Italy); Ronchin, S. [ITC-irst, Divisione Microsistemi, Via Sommarive 18, I-38050 Povo (Trento) (Italy); Rosso, V. [Dipartimento di Fisica, Universita di Pisa and Sezione INFN, Via Buonarroti 2, I-56127 Pisa (Italy)

2005-07-01

Pixel detectors for mammographic applications have been fabricated at ITC-irst on 800 {mu}m thick silicon wafers adopting a double side n{sup +}-on-n fabrication technology. The activity aims at increasing the X-ray detection efficiency in the energy range of interest minimizing the risk of electrical discharges in hybrid systems operating at high voltages. The detectors, having a layout compatible with the Medipix2 photon counting chip, feature two different design solutions for the p-isolation between neighboring n{sup +}-pixels. We report on the characterization of the fabrication process and on preliminary results of electrical measurements on full detectors and pixel test structures. In particular, we found that the detectors can be reliably operated above the full depletion voltage regardless of the isolation design, that however, impacts the performances in terms of current-voltage characteristics, single pixel currents, inter-pixel resistances and inter-pixel capacitances.

Fabrication and characterization of n-on-n silicon pixel detectors compatible with the Medipix2 readout chip

International Nuclear Information System (INIS)

Zorzi, N.; Bisogni, M.G.; Boscardin, M.; Dalla Betta, G.-F.; Gregori, P.; Novelli, M.; Piemonte, C.; Quattrocchi, M.; Ronchin, S.; Rosso, V.

2005-01-01

Pixel detectors for mammographic applications have been fabricated at ITC-irst on 800 μm thick silicon wafers adopting a double side n + -on-n fabrication technology. The activity aims at increasing the X-ray detection efficiency in the energy range of interest minimizing the risk of electrical discharges in hybrid systems operating at high voltages. The detectors, having a layout compatible with the Medipix2 photon counting chip, feature two different design solutions for the p-isolation between neighboring n + -pixels. We report on the characterization of the fabrication process and on preliminary results of electrical measurements on full detectors and pixel test structures. In particular, we found that the detectors can be reliably operated above the full depletion voltage regardless of the isolation design, that however, impacts the performances in terms of current-voltage characteristics, single pixel currents, inter-pixel resistances and inter-pixel capacitances

An EUDET/AIDA Pixel Beam Telescope for Detector Development

CERN Document Server

Rubinskiy, I

2015-01-01

Ahigh resolution(σ< 2 μm) beam telescope based on monolithic active pixel sensors (MAPS) was developed within the EUDET collaboration. EUDET was a coordinated detector R&D programme for the future International Linear Collider providing test beam infrastructure to detector R&D groups. The telescope consists of six sensor planes with a pixel pitch of either 18.4 μm or 10 μmand canbe operated insidea solenoidal magnetic fieldofupto1.2T.Ageneral purpose cooling, positioning, data acquisition (DAQ) and offine data analysis tools are available for the users. The excellent resolution, readout rate andDAQintegration capabilities made the telescopea primary beam tests tool also for several CERN based experiments. In this report the performance of the final telescope is presented. The plans for an even more flexible telescope with three differentpixel technologies(ATLASPixel, Mimosa,Timepix) withinthenew European detector infrastructure project AIDA are presented.

Development and characterization of a DEPFET pixel prototype system for the ILC vertex detector

Energy Technology Data Exchange (ETDEWEB)

Kohrs, Robert

2008-09-15

For the future TeV-scale linear collider ILC (International Linear Collider) a vertex detector of unprecedented performance is needed to fully exploit its physics potential. By incorporating a field effect transistor into a fully depleted sensor substrate the DEPFET (Depleted Field Effect Transistor) sensor combines radiation detection and in-pixel amplification. For the operation at a linear collider the excellent noise performance of DEPFET pixels allows building very thin detectors with a high spatial resolution and a low power consumption. With this thesis a prototype system consisting of a 64 x 128 pixels sensor, dedicated steering and readout ASICs and a data acquisition board has been developed and successfully operated in the laboratory and under realistic conditions in beam test environments at DESY and CERN. A DEPFET matrix has been successfully read out using the on-chip zero-suppression of the readout chip CURO 2. The results of the system characterization and beam test results are presented. (orig.)

Development and characterization of a DEPFET pixel prototype system for the ILC vertex detector

International Nuclear Information System (INIS)

Kohrs, Robert

2008-09-01

For the future TeV-scale linear collider ILC (International Linear Collider) a vertex detector of unprecedented performance is needed to fully exploit its physics potential. By incorporating a field effect transistor into a fully depleted sensor substrate the DEPFET (Depleted Field Effect Transistor) sensor combines radiation detection and in-pixel amplification. For the operation at a linear collider the excellent noise performance of DEPFET pixels allows building very thin detectors with a high spatial resolution and a low power consumption. With this thesis a prototype system consisting of a 64 x 128 pixels sensor, dedicated steering and readout ASICs and a data acquisition board has been developed and successfully operated in the laboratory and under realistic conditions in beam test environments at DESY and CERN. A DEPFET matrix has been successfully read out using the on-chip zero-suppression of the readout chip CURO 2. The results of the system characterization and beam test results are presented. (orig.)

Neural network based cluster creation in the ATLAS silicon pixel detector

CERN Document Server

Selbach, K E; The ATLAS collaboration

2012-01-01

The read-out from individual pixels on planar semi-conductor sensors are grouped into clusters to reconstruct the location where a charged particle passed through the sensor. The resolution given by individual pixel sizes is significantly improved by using the information from the charge sharing between pixels. Such analog cluster creation techniques have been used by the ATLAS experiment for many years to obtain an excellent performance. However, in dense environments, such as those inside high-energy jets, clusters have an increased probability of merging the charge deposited by multiple particles. Recently, a neural network based algorithm which estimates both the cluster position and whether a cluster should be split has been developed for the ATLAS pixel detector. The algorithm significantly reduces ambiguities in the assignment of pixel detector measurement to tracks within jets and improves the position accuracy with respect to standard interpolation techniques by taking into account the 2-dimensional ...

Neural network based cluster creation in the ATLAS silicon Pixel Detector

CERN Document Server

Andreazza, A; The ATLAS collaboration

2013-01-01

The read-out from individual pixels on planar semi-conductor sensors are grouped into clusters to reconstruct the location where a charged particle passed through the sensor. The resolution given by individual pixel sizes is significantly improved by using the information from the charge sharing between pixels. Such analog cluster creation techniques have been used by the ATLAS experiment for many years to obtain an excellent performance. However, in dense environments, such as those inside high-energy jets, clusters have an increased probability of merging the charge deposited by multiple particles. Recently, a neural network based algorithm which estimates both the cluster position and whether a cluster should be split has been developed for the ATLAS Pixel Detector. The algorithm significantly reduces ambiguities in the assignment of pixel detector measurement to tracks within jets and improves the position accuracy with respect to standard interpolation techniques by taking into account the 2-dimensional ...

Characterisation of the high dynamic range Large Pixel Detector (LPD) and its use at X-ray free electron laser sources

Science.gov (United States)

Veale, M. C.; Adkin, P.; Booker, P.; Coughlan, J.; French, M. J.; Hart, M.; Nicholls, T.; Schneider, A.; Seller, P.; Pape, I.; Sawhney, K.; Carini, G. A.; Hart, P. A.

2017-12-01

The STFC Rutherford Appleton Laboratory have delivered the Large Pixel Detector (LPD) for MHz frame rate imaging at the European XFEL. The detector system has an active area of 0.5 m × 0.5 m and consists of a million pixels on a 500 μm pitch. Sensors have been produced from 500 μm thick Hammamatsu silicon tiles that have been bump bonded to the readout ASIC using a silver epoxy and gold stud technique. Each pixel of the detector system is capable of measuring 105 12 keV photons per image readout at 4.5 MHz. In this paper results from the testing of these detectors at the Diamond Light Source and the Linac Coherent Light Source (LCLS) are presented. The performance of the detector in terms of linearity, spatial uniformity and the performance of the different ASIC gain stages is characterised.

Pre- and post-irradiation performance of FBK 3D silicon pixel detectors for CMS

International Nuclear Information System (INIS)

Krzywda, A.; Alagoz, E.; Bubna, M.; Obertino, M.; Solano, A.; Arndt, K.; Uplegger, L.; Betta, G.F. Dalla; Boscardin, M.; Ngadiuba, J.; Rivera, R.; Menasce, D.; Moroni, L.; Terzo, S.; Bortoletto, D.; Prosser, A.; Adreson, J.; Kwan, S.; Osipenkov, I.; Bolla, G.

2014-01-01

In preparation for the tenfold luminosity upgrade of the Large Hadron Collider (the HL-LHC) around 2020, three-dimensional (3D) silicon pixel sensors are being developed as a radiation-hard candidate to replace the planar ones currently being used in the CMS pixel detector. This study examines an early batch of FBK sensors (named ATLAS08) of three 3D pixel geometries: 1E, 2E, and 4E, which respectively contain one, two, and four readout electrodes for each pixel, passing completely through the bulk. We present electrical characteristics and beam test performance results for each detector before and after irradiation. The maximum fluence applied is 3.5×10 15 n eq /cm 2

Investigation of DEPFET as vertex detector at ILC. Intrinsic properties, radiation hardness and alternative readout schemes

International Nuclear Information System (INIS)

Rummel, Stefan

2009-01-01

The International Linear Collider (ILC) is supposed to be the next generation lepton collider. The detectors at ILC are intended to be precision instruments improving the performance in impact parameter (IP), momentum and energy resolution significantly compared to previous detectors at lepton colliders. To achieve this goal it is necessary to develop new detector technologies or pushing existing technologies to their technological edges. Regarding the Vertex detector (VTX) this implies challenges in resolution, material budget, power consumption and readout speed. A promising technology for the Vertex detector is the Depleted Field Effect Transistor (DEPFET). The DEPFET is a semiconductor device with in-pixel ampli cation integrated on a fully depleted bulk. This allows building detectors with intrinsically high SNR due to the large sensitive volume and the small input capacitance at the rst ampli er. To reach the ambitious performance goals it is important to understand its various features: clear performance, internal amplification, noise and radiation hardness. The intrinsic noise is analyzed, showing that the contribution of the DEPFET is below 50 e - at the required speed. Moreover it is possible to show that the internal ampli cation could be further improved to more than 1nA/e - using the standard DEPFET technology. The clear performance is investigated on matrix level utilizing a dedicated setup for single pixel testing which allows direct insight into the DEPFET operation, without the complexity of the full readout system. It is possible to show that a full clear could be achieved with a voltage pulse of 10 V. Furthermore a novel clear concept - the capacitive coupled clear gate - is demonstrated. The radiation hardness is studied with respect to the system performance utilizing various irradiations with ionizing and non ionizing particles. The impact on the bulk as well as the interface damage is investigated. Up to now the readout is performed with

Investigation of DEPFET as vertex detector at ILC. Intrinsic properties, radiation hardness and alternative readout schemes

Energy Technology Data Exchange (ETDEWEB)

Rummel, Stefan

2009-07-20

The International Linear Collider (ILC) is supposed to be the next generation lepton collider. The detectors at ILC are intended to be precision instruments improving the performance in impact parameter (IP), momentum and energy resolution significantly compared to previous detectors at lepton colliders. To achieve this goal it is necessary to develop new detector technologies or pushing existing technologies to their technological edges. Regarding the Vertex detector (VTX) this implies challenges in resolution, material budget, power consumption and readout speed. A promising technology for the Vertex detector is the Depleted Field Effect Transistor (DEPFET). The DEPFET is a semiconductor device with in-pixel ampli cation integrated on a fully depleted bulk. This allows building detectors with intrinsically high SNR due to the large sensitive volume and the small input capacitance at the rst ampli er. To reach the ambitious performance goals it is important to understand its various features: clear performance, internal amplification, noise and radiation hardness. The intrinsic noise is analyzed, showing that the contribution of the DEPFET is below 50 e{sup -} at the required speed. Moreover it is possible to show that the internal ampli cation could be further improved to more than 1nA/e{sup -} using the standard DEPFET technology. The clear performance is investigated on matrix level utilizing a dedicated setup for single pixel testing which allows direct insight into the DEPFET operation, without the complexity of the full readout system. It is possible to show that a full clear could be achieved with a voltage pulse of 10 V. Furthermore a novel clear concept - the capacitive coupled clear gate - is demonstrated. The radiation hardness is studied with respect to the system performance utilizing various irradiations with ionizing and non ionizing particles. The impact on the bulk as well as the interface damage is investigated. Up to now the readout is performed

Readout of a 176 pixel FDM system for SAFARI TES arrays

Science.gov (United States)

Hijmering, R. A.; den Hartog, R.; Ridder, M.; van der Linden, A. J.; van der Kuur, J.; Gao, J. R.; Jackson, B.

2016-07-01

In this paper we present the results of our 176-pixel prototype of the FDM readout system for SAFARI, a TES-based focal-plane instrument for the far-IR SPICA mission. We have implemented the knowledge obtained from the detailed study on electrical crosstalk reported previously. The effect of carrier leakage is reduced by a factor two, mutual impedance is reduced to below 1 nH and mutual inductance is removed. The pixels are connected in stages, one quarter of the array half of the array and the full array, to resolve intermediate technical issues. A semi-automated procedure was incorporated to find all optimal settings for all pixels. And as a final step the complete array has been connected and 132 pixels have been read out simultaneously within the frequency range of 1-3.8MHz with an average frequency separation of 16kHz. The noise was found to be detector limited and was not affected by reading out all pixels in a FDM mode. With this result the concept of using FDM for multiplexed bolometer read out for the SAFARI instrument has been demonstrated.

Silicon pixel-detector R&D for CLIC

CERN Document Server

AUTHOR|(SzGeCERN)718101

2016-01-01

The physics aims at the future CLIC high-energy linear e+e- collider set very high precision requirements on the performance of the vertex and tracking detectors. Moreover, these detectors have to be well adapted to the experimental conditions, such as the time structure of the collisions and the presence of beam-induced backgrounds. The principal challenges are: a point resolution of a few μm, ultra-low mass (∼ 0.2% X${}_0$ per layer for the vertex region and ∼ 1 % X${}_0$ per layer for the outer tracker), very low power dissipation (compatible with air-flow cooling in the inner vertex region) and pulsed power operation, complemented with ∼ 10 ns time stamping capabilities. A highly granular all-silicon vertex and tracking detector system is under development, following an integrated approach addressing simultaneously the physics requirements and engineering constraints. For the vertex-detector region, hybrid pixel detectors with small pitch (25 μm) and analog readout are explored. For the outer trac...

Silicon sensors for the upgrades of the CMS pixel detector

International Nuclear Information System (INIS)

Centis Vignali, Matteo

2015-12-01

The Compact Muon Solenoid (CMS) is a general purpose detector at the Large Hadron Collider (LHC). The LHC luminosity is constantly increased through upgrades of the accelerator and its injection chain. Two major upgrades will take place in the next years. The first upgrade involves the LHC injector chain and allows the collider to achieve a luminosity of about 2.10 34 cm -2 s -1 . A further upgrade of the LHC foreseen for 2025 will boost its luminosity to 5.10 34 cm -2 s -1 . As a consequence of the increased luminosity, the detectors need to be upgraded. In particular, the CMS pixel detector will undergo two upgrades in the next years. The first upgrade (phase I) consists in the substitution of the current pixel detector in winter 2016/2017. The upgraded pixel detector will implement new readout electronics that allow efficient data taking up to a luminosity of 2.10 34 cm -2 s -1 , twice as much as the LHC design luminosity. The modules that will constitute the upgraded detector are being produced at different institutes. Hamburg (University and DESY) is responsible for the production of 350 pixel modules. The second upgrade (phase II) of the pixel detector is foreseen for 2025. The innermost pixel layer of the upgraded detector will accumulate a radiation damage corresponding to an equivalent fluence of Φ eq =2.10 16 cm -2 and a dose of ∼10 MGy after an integrated luminosity of 3000 fb -1 . Several groups are investigating sensor designs and configurations able to withstand such high doses and fluences. This work is divided into two parts related to important aspects of the upgrades of the CMS pixel detector. For the phase I upgrade, a setup has been developed to provide an absolute energy calibration of the pixel modules that will constitute the detector. The calibration is obtained using monochromatic X-rays. The same setup is used to test the buffering capabilities of the modules' readout chip. The maximum rate experienced by the modules produced in

Digital radiography using amorphous selenium: photoconductively activated switch (PAS) readout system.

Science.gov (United States)

Reznik, Nikita; Komljenovic, Philip T; Germann, Stephen; Rowlands, John A

2008-03-01

A new amorphous selenium (a-Se) digital radiography detector is introduced. The proposed detector generates a charge image in the a-Se layer in a conventional manner, which is stored on electrode pixels at the surface of the a-Se layer. A novel method, called photoconductively activated switch (PAS), is used to read out the latent x-ray charge image. The PAS readout method uses lateral photoconduction at the a-Se surface which is a revolutionary modification of the bulk photoinduced discharge (PID) methods. The PAS method addresses and eliminates the fundamental weaknesses of the PID methods--long readout times and high readout noise--while maintaining the structural simplicity and high resolution for which PID optical readout systems are noted. The photoconduction properties of the a-Se surface were investigated and the geometrical design for the electrode pixels for a PAS radiography system was determined. This design was implemented in a single pixel PAS evaluation system. The results show that the PAS x-ray induced output charge signal was reproducible and depended linearly on the x-ray exposure in the diagnostic exposure range. Furthermore, the readout was reasonably rapid (10 ms for pixel discharge). The proposed detector allows readout of half a pixel row at a time (odd pixels followed by even pixels), thus permitting the readout of a complete image in 30 s for a 40 cm x 40 cm detector with the potential of reducing that time by using greater readout light intensity. This demonstrates that a-Se based x-ray detectors using photoconductively activated switches could form a basis for a practical integrated digital radiography system.

Development of Fast and High Precision CMOS Pixel Sensors for an ILC Vertex Detector

CERN Document Server

Hu-Guo, Christine

2010-01-01

The development of CMOS pixel sensors with column parallel read-out and integrated zero-suppression has resulted in a full size, nearly 1 Megapixel, prototype with ~100 \\mu s read-out time. Its performances are quite close to the ILD vertex detector specifications, showing that the sensor architecture can presumably be evolved to meet these specifications exactly. Starting from the existing architecture and achieved performances, the paper will expose the details of how the sensor will be evolved in the coming 2-3 years in perspective of the ILD Detector Baseline Document, to be delivered in 2012. Two different devices are foreseen for this objective, one being optimized for the inner layers and their fast read-out requirement, while the other exploits the dimmed background in the outer layers to reduce the power consumption. The sensor evolution relies on a high resistivity epitaxial layer, on the use of an advanced CMOS process and on the combination of column-level ADCs with a pixel array. The paper will p...

Optical readout of a triple-GEM detector by means of a CMOS sensor

Energy Technology Data Exchange (ETDEWEB)

Marafini, M. [INFN Sezione di Roma (Italy); Museo Storico della Fisica e Centro Studi e Ricerche “E. Fermi”, Roma (Italy); Patera, V. [INFN Sezione di Roma (Italy); Museo Storico della Fisica e Centro Studi e Ricerche “E. Fermi”, Roma (Italy); Laboratori Nazionali di Frascati dell' INFN, Frascati (Italy); Pinci, D., E-mail: davide.pinci@roma1.infn.it [INFN Sezione di Roma (Italy); Sarti, A. [Laboratori Nazionali di Frascati dell' INFN, Frascati (Italy); Dipartimento di Scienze di Base e Applicate per Ingegneria, Sapienza Università di Roma (Italy); Sciubba, A. [INFN Sezione di Roma (Italy); Museo Storico della Fisica e Centro Studi e Ricerche “E. Fermi”, Roma (Italy); Dipartimento di Scienze di Base e Applicate per Ingegneria, Sapienza Università di Roma (Italy); Spiriti, E. [Laboratori Nazionali di Frascati dell' INFN, Frascati (Italy)

2016-07-11

In last years, the development of optical sensors has produced objects able to provide very interesting performance. Large granularity is offered along with a very high sensitivity. CMOS sensors with millions of pixels able to detect as few as two or three photons per pixel are commercially available and can be used to read-out the optical signals provided by tracking particle detectors. In this work the results obtained by optically reading-out a triple-GEM detector by a commercial CMOS sensor will be presented. A standard detector was assembled with a transparent window below the third GEM allowing the light to get out. The detector is supplied with an Ar/CF{sub 4} based gas mixture producing 650 nm wavelength photons matching the maximum quantum efficiency of the sensor.

Spectroscopy study of imaging devices based on silicon Pixel Array Detector coupled to VATAGP7 read-out chips

International Nuclear Information System (INIS)

Linhart, V; Lacasta, C; Llosa, G; Stankova, V; Burdette, D; Chessi, E; Cochran, E; Honscheid, K; Kagan, H; Weilhammer, P; Cindro, V; Grosicar, B; Mikuz, M; Studen, A; Zontar, D; Clinthorne, N H

2011-01-01

Spectroscopic and timing response studies have been conducted on a detector module consisting of a silicon Pixel Array Detector bonded on two VATAGP7 read-out chips manufactured by Gamma-Medica Ideas using laboratory gamma sources and the internal calibration facilities (the calibration system of the read-out chips). The performed tests have proven that the chips have (i) non-linear calibration curves which can be approximated by power functions, (ii) capability to measure the energy of photons with energy resolution better than 2 keV (exact range and resolution depend on experimental setup), (iii) the internal calibration facility which provides 6 out of 16 available internal calibration charges within our region of interest (spanning the Compton edge of 511 keV photons). The peaks induced by the internal calibration facility are suitable for a fit of the calibration curves. However, they are not suitable for measurements of equivalent noise charge because their full width at half maximum varies with their amplitude. These facts indicate that the VATAGP7 chips are useful and precise tools for a wide variety of spectroscopic devices. We have also explored time walk of the module and peaking time of the spectroscopy signals provided by the chips. We have observed that (iv) the time walk is caused partly by the peaking time of the signals provided by the fast shaper of the chips and partly by the timing uncertainty related to the varying position of the photon interaction, (v) the peaking time of the spectroscopy signals provided by the chips increases with increasing pulse height.

A high efficiency readout architecture for a large matrix of pixels.

Science.gov (United States)

Gabrielli, A.; Giorgi, F.; Villa, M.

2010-07-01

In this work we present a fast readout architecture for silicon pixel matrix sensors that has been designed to sustain very high rates, above 1 MHz/mm2 for matrices greater than 80k pixels. This logic can be implemented within MAPS (Monolithic Active Pixel Sensors), a kind of high resolution sensor that integrates on the same bulk the sensor matrix and the CMOS logic for readout, but it can be exploited also with other technologies. The proposed architecture is based on three main concepts. First of all, the readout of the hits is performed by activating one column at a time; all the fired pixels on the active column are read, sparsified and reset in parallel in one clock cycle. This implies the use of global signals across the sensor matrix. The consequent reduction of metal interconnections improves the active area while maintaining a high granularity (down to a pixel pitch of 40 μm). Secondly, the activation for readout takes place only for those columns overlapping with a certain fired area, thus reducing the sweeping time of the whole matrix and reducing the pixel dead-time. Third, the sparsification (x-y address labeling of the hits) is performed with a lower granularity with respect to single pixels, by addressing vertical zones of 8 pixels each. The fine-grain Y resolution is achieved by appending the zone pattern to the zone address of a hit. We show then the benefits of this technique in presence of clusters. We describe this architecture from a schematic point of view, then presenting the efficiency results obtained by VHDL simulations.

A high efficiency readout architecture for a large matrix of pixels

International Nuclear Information System (INIS)

Gabrielli, A; Giorgi, F; Villa, M

2010-01-01

In this work we present a fast readout architecture for silicon pixel matrix sensors that has been designed to sustain very high rates, above 1 MHz/mm 2 for matrices greater than 80k pixels. This logic can be implemented within MAPS (Monolithic Active Pixel Sensors), a kind of high resolution sensor that integrates on the same bulk the sensor matrix and the CMOS logic for readout, but it can be exploited also with other technologies. The proposed architecture is based on three main concepts. First of all, the readout of the hits is performed by activating one column at a time; all the fired pixels on the active column are read, sparsified and reset in parallel in one clock cycle. This implies the use of global signals across the sensor matrix. The consequent reduction of metal interconnections improves the active area while maintaining a high granularity (down to a pixel pitch of 40 μm). Secondly, the activation for readout takes place only for those columns overlapping with a certain fired area, thus reducing the sweeping time of the whole matrix and reducing the pixel dead-time. Third, the sparsification (x-y address labeling of the hits) is performed with a lower granularity with respect to single pixels, by addressing vertical zones of 8 pixels each. The fine-grain Y resolution is achieved by appending the zone pattern to the zone address of a hit. We show then the benefits of this technique in presence of clusters. We describe this architecture from a schematic point of view, then presenting the efficiency results obtained by VHDL simulations.

Conceptual design of 3D integrated pixel sensors for the innermost layer of the ILC vertex detector

International Nuclear Information System (INIS)

Fu, Y; Hu-Guo, C; Dorokhov, A; Zhao, W; Hu, Y; Torheim, O

2011-01-01

The paper presents a design of CMOS Pixel Sensor (CPS) using the vertical integration technology (3DIT), expected to alleviate the most essential limitations of 2D-CPS. Our objective is to develop an intelligent architecture in order to meet the requirements of the innermost layer of the International Linear Collider (ILC) vertex detectors, which are particularly demanding in spatial resolution of less than 3 μm and associated frame readout time of 10 μs. The sensor, with a pixel pitch of 23 μm, will be composed of 3-tiers Integrated Circuits (IC) with different functionalities: detection with in pixel analogue processing, pixel-level 3-bit Analogue to Digital Conversion (ADC) and fast parallel sparse readout.

The Phase-2 ATLAS ITk Pixel Upgrade

CERN Document Server

Macchiolo, Anna; The ATLAS collaboration

2018-01-01

The new ATLAS ITk pixel system will be installed during the LHC Phase-II shutdown, to better take advantage of the increased luminosity of the HL-LHC. The detector will consist of 5 layers of stave-like support structures in the most central region and ring-shaped supports in the endcap regions, covering up to |η| < 4. While the outer 3 layers of the Pixel Detector are designed to operate for the full HL-LHC data taking period, the innermost 2 layers of the detector will be replaced around half of the lifetime. The ITk pixel detector will be instrumented with new sensors and readout electronics to provide improved tracking performance and radiation hardness compared to the current detector. Sensors will be read out by new ASICs based on the chip developed by the RD53 Collaboration. The pixel off-detector readout electronics will be implemented in the framework of the general ATLAS trigger and DAQ system with a readout speed of up to 5 Gb/s per data link for the innermost layers. Results of extensive tests...

Performance of the Insertable B-Layer for the ATLAS Pixel Detector during Quality Assurance and a Novel Pixel Detector Readout Concept based on PCIe

CERN Document Server

AUTHOR|(INSPIRE)INSPIRE-00356268; Pernegger, Heinz

2016-07-27

During the first long shutdown of the LHC the Pixel detector has been upgraded with a new 4th innermost layer, the Insertable B-Layer (IBL). The IBL will increase the tracking performance and help with higher than nominal luminosity the LHC will produce. The IBL is made up of 14 staves and in total 20 staves have been produced for the IBL. This thesis presents the results of the final quality tests performed on these staves in an detector-like environment, in order to select the 14 best of the 20 staves for integration onto the detector. The test setup as well as the testing procedure is introduced and typical results of each testing stage are shown and discussed. The overall performance of all staves is presented in regards to: tuning performance, radioactive source measurements, and number of failing pixels. Other measurement, which did not directly impact the selection of staves, but will be important for the operation of the detector or production of a future detector, are included. Based on the experienc...

Signal height in silicon pixel detectors irradiated with pions and protons

International Nuclear Information System (INIS)

Rohe, T.; Acosta, J.; Bean, A.; Dambach, S.; Erdmann, W.; Langenegger, U.; Martin, C.; Meier, B.; Radicci, V.; Sibille, J.; Trueb, P.

2010-01-01

Pixel detectors are used in the innermost part of multi-purpose experiments at the Large Hadron Collider (LHC) and are therefore exposed to the highest fluences of ionising radiation, which in this part of the detectors consists mainly of charged pions. The radiation hardness of the detectors has been tested thoroughly up to the fluences expected at the LHC. In case of an LHC upgrade the fluence will be much higher and it is not yet clear up to which radii the present pixel technology can be used. To establish such a limit, pixel sensors of the size of one CMS pixel readout chip (PSI46V2.1) have been bump bonded and irradiated with positive pions up to 6x10 14 n eq /cm 2 at PSI and with protons up to 5x10 15 n eq /cm 2 . The sensors were taken from production wafers of the CMS barrel pixel detector. They use n-type DOFZ material with a resistance of about 3.7kΩcm and an n-side read out. As the performance of silicon sensors is limited by trapping, the response to a Sr-90 source was investigated. The highly energetic beta-particles represent a good approximation to minimum ionising particles. The bias dependence of the signal for a wide range of fluences will be presented.

Testing and Integration of the Service Cylinders for the CMS Phase 1 pixel detector

CERN Document Server

Ngadiuba, Jennifer

2016-01-01

The present 3-layer CMS pixel detector will be replaced with a new 4-layer pixel system, referred to as Phase~1 upgrade, during the LHC extended technical stop in winter 2016/2017. The upgraded detector will allow to maintain the excellent tracking performance of CMS at the upcoming higher luminosity conditions at the LHC. The addition of an extra layer, closer to the beam pipe, demands a complete redesign of its services. The barrel pixel detector is attached to four half cylinders which carry the services along the beam pipe, accommodate the cooling lines and house the electronics for detector readout and control. The service cylinders are a complex system in design as well as in production due to the large number of channels and tight space requirements. In this document we present the design of the system and discuss the construction and testing of the service cylinders for the barrel pixel detector. Furthermore, we present results of the testing and calibrations carried out with a set of new digital dete...

Planar sensors for the upgrade of the CMS pixel detector

International Nuclear Information System (INIS)

Rohe, T.; Bean, A.; Radicci, V.; Sibille, J.

2011-01-01

A replacement of the present CMS pixel detector with a better performing light weight four-layer system is foreseen in 2016. In the lifetime of this new system the LHC will reach and exceed its nominal luminosity of 10 34 cm -2 s -1 . Therefore the radiation hardness of all parts of the pixel system has to be reviewed. For the construction of the much larger four-layer pixel system, the replacement of the present double sided sensors by much cheaper single sided ones is considered. However, the construction of pixel modules with such sensors is challenging due to the small geometrical distance of the sensor high voltage and the ground of the readout electronics. This small distance limits the sensor bias to about 500 V in the tested samples.

A new generation of small pixel pitch/SWaP cooled infrared detectors

Science.gov (United States)

Espuno, L.; Pacaud, O.; Reibel, Y.; Rubaldo, L.; Kerlain, A.; Péré-Laperne, N.; Dariel, A.; Roumegoux, J.; Brunner, A.; Kessler, A.; Gravrand, O.; Castelein, P.

2015-10-01

Following clear technological trends, the cooled IR detectors market is now in demand for smaller, more efficient and higher performance products. This demand pushes products developments towards constant innovations on detectors, read-out circuits, proximity electronics boards, and coolers. Sofradir was first to show a 10μm focal plane array (FPA) at DSS 2012, and announced the DAPHNIS 10μm product line back in 2014. This pixel pitch is a key enabler for infrared detectors with increased resolution. Sofradir recently achieved outstanding products demonstrations at this pixel pitch, which clearly demonstrate the benefits of adopting 10μm pixel pitch focal plane array-based detectors. Both HD and XGA Daphnis 10μm products also benefit from a global video datapath efficiency improvement by transitioning to digital video interfaces. Moreover, innovative smart pixels functionalities drastically increase product versatility. In addition to this strong push towards a higher pixels density, Sofradir acknowledges the need for smaller and lower power cooled infrared detector. Together with straightforward system interfaces and better overall performances, latest technological advances on SWAP-C (Size, Weight, Power and Cost) Sofradir products enable the advent of a new generation of high performance portable and agile systems (handheld thermal imagers, unmanned aerial vehicles, light gimbals etc...). This paper focuses on those features and performances that can make an actual difference in the field.

The ALICE silicon pixel detector system

International Nuclear Information System (INIS)

Kapusta, S.

2009-01-01

The Large Hadron Collider (LHC) is again reaching its startup phase at the European Organization for Particle Physics (CERN). The LHC started its operation on the 10 th of September, 2008 with huge success managing to sent the the first beam successfully around the entire ring in less than an hour after the first injection in one direction, and later that day in the opposite direction. Unfortunately, on the 19 th of September, an accident occurred during the 5.5 TeV magnet commissioning in Sector 34, which will significantly delay the operation of the LHC. The ALICE experiment will exploit the collisions of accelerated ions produced at the LHC to study strongly interacting matter at extreme densities and high temperatures. e ALICE Silicon Pixel Detector (SPD) represents the two innermost layers of the ALICE Inner Traing System (ITS) located at radii of 3.9 cm and 7.6 cm from the Interaction Point (IP). One of the main tasks of the SPD is to provide precise traing information. is information is fundamental for the study of weak decays of heavy flavor particles, since the corresponding signature is a secondary vertex separated from the primary vertex only by a few hundred micrometers. e tra density could be as high as 80 tracks per cm 2 in the innermost SPD layer as a consequence of a heavy ion collision. The SPD will provide a spatial resolution of around ≅12 μm in the rφ direction and ≅70 μm in the z direction. The expected occupancy of the SPD ranges from 0.4% to 1.5% which makes it an excellent charged particle multiplicity detector in the pseudorapidity region |η| < 2. Furthermore, by combining all possible hits in the SPD, one can get a rough estimate of the position of the primary interaction. One of the challenges is the tight material budget constraint (<1% radiation length per layer) in order to limit the scattering of the traversing particles. e silicon sensor and its readout chip have a total thickness of only 350 μm and the signal lines from the

Qualification of barrel pixel detector modules for the Phase 1 Upgrade of the CMS vertex detector

CERN Document Server

Kudella, Simon

2016-01-01

To withstand the higher particle rates of LHC Runs 2 and 3, with expected luminosities of up to $2\\times 10^{34}\\,\\mathrm{cm^{-2}s^{-1}}$, the current CMS pixel detector at the LHC will be replaced as part of the CMS Phase I Upgrade during the extended winter shutdown in 2016/17. The new pixel detector features a new geometry with one additional detector layer in the barrel region~(BPIX) and one pair of additional disks in the forward region~(FPIX), new digital readout chips as well as a new CO$_{2}$-based cooling system for both the barrel and forward region. The BPIX detector module production is summarized, with special focus on the different stages of quality assurance. The quality tests as well as the calibrations which all produced modules undergo in a temperature and humidity controlled environment are described. Exemplarily, the KIT/Aachen production line and its subprocesses are presented together with its quality and yields.

Three-dimensional cross point readout detector design for including depth information

Science.gov (United States)

Lee, Seung-Jae; Baek, Cheol-Ha

2018-04-01

We designed a depth-encoding positron emission tomography (PET) detector using a cross point readout method with wavelength-shifting (WLS) fibers. To evaluate the characteristics of the novel detector module and the PET system, we used the DETECT2000 to perform optical photon transport in the crystal array. The GATE was also used. The detector module is made up of four layers of scintillator arrays, the five layers of WLS fiber arrays, and two sensor arrays. The WLS fiber arrays in each layer cross each other to transport light to each sensor array. The two sensor arrays are coupled to the forward and left sides of the WLS fiber array, respectively. The identification of three-dimensional pixels was determined using a digital positioning algorithm. All pixels were well decoded, with the system resolution ranging from 2.11 mm to 2.29 mm at full width at half maximum (FWHM).

CMOS Active-Pixel Image Sensor With Intensity-Driven Readout

Science.gov (United States)

Langenbacher, Harry T.; Fossum, Eric R.; Kemeny, Sabrina

1996-01-01

Proposed complementary metal oxide/semiconductor (CMOS) integrated-circuit image sensor automatically provides readouts from pixels in order of decreasing illumination intensity. Sensor operated in integration mode. Particularly useful in number of image-sensing tasks, including diffractive laser range-finding, three-dimensional imaging, event-driven readout of sparse sensor arrays, and star tracking.

Development of Small-Pixel CZT Detectors for Future High-Resolution Hard X-ray Missions

Science.gov (United States)

Beilicke, Matthias

Owing to recent breakthroughs in grazing incidence mirror technology, next-generation hard X-ray telescopes will achieve angular resolutions of between 5 and 10 arc seconds - about an order of magnitude better than that of the NuSTAR hard X-ray telescope. As a consequence, the next generation of hard X-ray telescopes will require pixelated hard X- ray detectors with pixels on a grid with a lattice constant of between 120 and 240 um. Additional detector requirements include a low energy threshold of less than 5 keV and an energy resolution of less than 1 keV. The science drivers for a high angular-resolution hard X-ray mission include studies and measurements of black hole spins, the cosmic evolution of super-massive black holes, AGN feedback, and the behavior of matter at very high densities. We propose a R&D research program to develop, optimize and study the performance of 100-200 um pixel pitch CdTe and Cadmium Zinc Telluride (CZT) detectors of 1-2 mm thickness. Our program aims at a comparison of the performance achieved with CdTe and CZT detectors, and the optimization of the pixel, steering grid, and guard ring anode patterns. Although these studies will use existing ASICs (Application Specific Integrated Circuits), our program also includes modest funds for the development of an ultra-low noise ASIC with a 2-D grid of readout pads that can be directly bonded to the 100-200 um pixel pitch CdTe and CZT detectors. The team includes the Washington University group (Prof. M. Beilicke and Co-I Prof. H.S.W. Krawczynski et al.), and co-investigator G. De Geronimo at Brookhaven National Laboratory (BNL). The Washington University group has a 10 year track record of innovative CZT detector R&D sponsored by the NASA Astronomy and Physics Research and Analysis (APRA) program. The accomplishments to date include the development of CZT detectors with pixel pitches between 350 um and 2.5 mm for the ProtoExist, EXIST, and X-Calibur hard X-ray missions with some of the best

The high dynamic range pixel array detector (HDR-PAD): Concept and design

Energy Technology Data Exchange (ETDEWEB)

Shanks, Katherine S.; Philipp, Hugh T.; Weiss, Joel T.; Becker, Julian; Tate, Mark W. [Laboratory of Atomic and Solid State Physics, Cornell University, Ithaca, NY 14853 (United States); Gruner, Sol M., E-mail: smg26@cornell.edu [Laboratory of Atomic and Solid State Physics, Cornell University, Ithaca, NY 14853 (United States); Cornell High Energy Synchrotron Source (CHESS), Cornell University, Ithaca, NY 14853 (United States)

2016-07-27

Experiments at storage ring light sources as well as at next-generation light sources increasingly require detectors capable of high dynamic range operation, combining low-noise detection of single photons with large pixel well depth. XFEL sources in particular provide pulse intensities sufficiently high that a purely photon-counting approach is impractical. The High Dynamic Range Pixel Array Detector (HDR-PAD) project aims to provide a dynamic range extending from single-photon sensitivity to 10{sup 6} photons/pixel in a single XFEL pulse while maintaining the ability to tolerate a sustained flux of 10{sup 11} ph/s/pixel at a storage ring source. Achieving these goals involves the development of fast pixel front-end electronics as well as, in the XFEL case, leveraging the delayed charge collection due to plasma effects in the sensor. A first prototype of essential electronic components of the HDR-PAD readout ASIC, exploring different options for the pixel front-end, has been fabricated. Here, the HDR-PAD concept and preliminary design will be described.

Preliminary test of an imaging probe for nuclear medicine using hybrid pixel detectors

International Nuclear Information System (INIS)

Bertolucci, E.; Maiorino, M.; Mettivier, G.; Montesi, M.C.; Russo, P.

2002-01-01

We are investigating the feasibility of an intraoperative imaging probe for lymphoscintigraphy with Tc-99m tracer, for sentinel node radioguided surgery, using the Medipix series of hybrid detectors coupled to a collimator. These detectors are pixelated semiconductor detectors bump-bonded to the Medipix1 photon counting read-out chip (64x64 pixel, 170 μm pitch) or to the Medipix2 chip (256x256 pixel, 55 μm pitch), developed by the European Medipix collaboration. The pixel detector we plan to use in the final version of the probe is a semi-insulating GaAs detector or a 1-2 mm thick CdZnTe detector. For the preliminary tests presented here, we used 300-μm thick silicon detectors, hybridized via bump-bonding to the Medipix1 chip. We used a tungsten parallel-hole collimator (7 mm thick, matrix array of 64x64 100 μm circular holes with 170 μm pitch), and a 22, 60 and 122 keV point-like (1 mm diameter) radioactive sources, placed at various distances from the detector. These tests were conducted in order to investigate the general feasibility of this imaging probe and its resolving power. Measurements show the high resolution but low efficiency performance of the detector-collimator set, which is able to image the 122 keV source with <1 mm FWHM resolution

Semiconductor micropattern pixel detectors: a review of the beginnings

International Nuclear Information System (INIS)

Heijne, E.H.M.

2001-01-01

The innovation in monolithic and hybrid semiconductor 'micropattern' or 'reactive' pixel detectors for tracking in particle physics was actually to fit logic and pulse processing electronics with μW power on a pixel area of less than 0.04 mm 2 , retaining the characteristics of a traditional nuclear amplifier chain. The ns timing precision in conjunction with local memory and logic operations allowed event selection at >10 MHz rates with unambiguous track reconstruction even at particle multiplicities >10 cm -2 . The noise in a channel was ∼100e - rms and enabled binary operation with random noise 'hits' at a level -8 . Rectangular pixels from 75 μmx500 μm down to 34 μmx125 μm have been used by different teams. In binary mode a tracking precision from 6 to 14 μm was obtained, and using analog interpolation one came close to 1 μm. Earlier work, still based on charge integrating imaging circuits, provided a starting point. Two systems each with more than 1 million sensor + readout channels have been built, for WA97-NA57 and for the Delphi very forward tracker. The use of 0.5 μm and 0.25 μm CMOS and enclosed geometry for the transistors in the pixel readout chips resulted in radiation hardness of ∼2 Mrad, respectively, >30 Mrad

A pixel read-out architecture implementing a two-stage token ring, zero suppression and compression

International Nuclear Information System (INIS)

Heuvelmans, S; Boerrigter, M

2011-01-01

Increasing luminosity in high energy physics experiments leads to new challenges in the design of data acquisition systems for pixel detectors. With the upgrade of the LHCb experiment, the data processing will be changed; hit data from every collision will be transported off the pixel chip, without any trigger selection. A read-out architecture is proposed which is able to obtain low hit data loss on limited silicon area by using the logic beneath the pixels as a data buffer. Zero suppression and redundancy reduction ensure that the data rate off chip is minimized. A C++ model has been created for simulation of functionality and data loss, and for system development. A VHDL implementation has been derived from this model.

A pixel read-out architecture implementing a two-stage token ring, zero suppression and compression

Energy Technology Data Exchange (ETDEWEB)

Heuvelmans, S; Boerrigter, M, E-mail: sander.heuvelmans@bruco.nl [Bruco integrated circuits BV, Oostermaat 2, 7623 CS (Netherlands)

2011-01-15

Increasing luminosity in high energy physics experiments leads to new challenges in the design of data acquisition systems for pixel detectors. With the upgrade of the LHCb experiment, the data processing will be changed; hit data from every collision will be transported off the pixel chip, without any trigger selection. A read-out architecture is proposed which is able to obtain low hit data loss on limited silicon area by using the logic beneath the pixels as a data buffer. Zero suppression and redundancy reduction ensure that the data rate off chip is minimized. A C++ model has been created for simulation of functionality and data loss, and for system development. A VHDL implementation has been derived from this model.

Fast Imaging Detector Readout Circuits with In-Pixel ADCs for Fourier Transform Imaging Spectrometers

Science.gov (United States)

Rider, D.; Blavier, J-F.; Cunningham, T.; Hancock, B.; Key, R.; Pannell, Z.; Sander, S.; Seshadri, S.; Sun, C.; Wrigley, C.

2011-01-01

Focal plane arrays (FPAs) with high frame rates and many pixels benefit several upcoming Earth science missions including GEO-CAPE, GACM, and ACE by enabling broader spatial coverage and higher spectral resolution. FPAs for the PanFTS, a high spatial resolution Fourier transform spectrometer and a candidate instrument for the GEO-CAPE mission are the focus of the developments reported here, but this FPA technology has the potential to enable a variety of future measurements and instruments. The ESTO ACT Program funded the developed of a fast readout integrated circuit (ROIC) based on an innovative in-pixel analog-to-digital converter (ADC). The 128 X 128 pixel ROIC features 60 ?m pixels, a 14-bit ADC in each pixel and operates at a continuous frame rate of 14 kHz consuming only 1.1 W of power. The ROIC outputs digitized data completely eliminating the bulky, power consuming signal chains needed by conventional FPAs. The 128 X 128 pixel ROIC has been fabricated in CMOS and tested at the Jet Propulsion Laboratory. The current version is designed to be hybridized with PIN photodiode arrays via indium bump bonding for light detection in the visible and ultraviolet spectral regions. However, the ROIC design incorporates a small photodiode in each cell to permit detailed characterization of the ROICperformance without the need for hybridization. We will describe the essential features of the ROIC design and present results of ROIC performance measurements.

Deployment of the CMS Tracker AMC as Backend for the CMS Pixel Detector

CERN Document Server

AUTHOR|(CDS)2079000

2016-01-01

The silicon pixel detector of the CMS experiment at CERN will be replaced with an upgraded version at the beginning of 2017 with the new detector featuring an additional barrel- and end-cap layer resulting in an increased number of fully digital read-out links running at 400Mb/s. New versions of the PSI46 Read-Out Chip and Token Bit Manager have been developed to operate at higher rates and reduce data loss. Front-End Controller and Front-End Driver boards, based on the {\\textmu}TCA compatible CMS Tracker AMC, a variant of the FC7 card, are being developed using different mezzanines to host the optical links for the digital read-out and control system. An overview of the system architecture is presented, with details on the implementation, and first results obtained from test systems.

Test Beam Performance Measurements for the Phase I Upgrade of the CMS Pixel Detector

CERN Document Server

Dragicevic, M.; Hrubec, J.; Steininger, H.; Gädda, A.; Härkönen, J.; Lampén, T.; Luukka, P.; Peltola, T.; Tuominen, E.; Tuovinen, E.; Winkler, A.; Eerola, P.; Tuuva, T.; Baulieu, G.; Boudoul, G.; Caponetto, L.; Combaret, C.; Contardo, D.; Dupasquier, T.; Gallbit, G.; Lumb, N.; Mirabito, L.; Perries, S.; Donckt, M.Vander; Viret, S.; Bonnin, C.; Charles, L.; Gross, L.; Hosselet, J.; Tromson, D.; Feld, L.; Karpinski, W.; Klein, K.; Lipinski, M.; Pierschel, G.; Preuten, M.; Rauch, M.; Wlochal, M.; Aldaya, M.; Asawatangtrakuldee, C.; Beernaert, K.; Bertsche, D.; Contreras-Campana, C.; Eckerlin, G.; Eckstein, D.; Eichhorn, T.; Gallo, E.; Garcia, J.Garay; Hansen, K.; Haranko, M.; Harb, A.; Hauk, J.; Keaveney, J.; Kalogeropoulos, A.; Kleinwort, C.; Lohmann, W.; Mankel, R.; Maser, H.; Mittag, G.; Muhl, C.; Mussgiller, A.; Pitzl, D.; Reichelt, O.; Savitskyi, M.; Schütze, P.; Sola, V.; Spannagel, S.; Walsh, R.; Zuber, A.; Biskop, H.; Buhmann, P.; Centis-Vignali, M.; Garutti, E.; Haller, J.; Hoffmann, M.; Klanner, R.; Lapsien, T.; Matysek, M.; Perieanu, A.; Scharf, Ch.; Schleper, P.; Schmidt, A.; Schwandt, J.; Sonneveld, J.; Steinbrück, G.; Vormwald, B.; Wellhausen, J.; Abbas, M.; Amstutz, C.; Barvich, T.; Barth, Ch.; Boegelspacher, F.; Boer, W.De; Butz, E.; Casele, M.; Colombo, F.; Dierlamm, A.; Freund, B.; Hartmann, F.; Heindl, S.; Husemann, U.; Kornmeyer, A.; Kudella, S.; Muller, Th.; Simonis, H.J.; Steck, P.; Weber, M.; Weiler, Th.; Kiss, T.; Siklér, F.; Tölyhi, T.; Veszprémi, V.; Cariola, P.; Creanza, D.; Palma, M.De; Robertis, G.De; Fiore, L.; Franco, M.; Loddo, F.; Sala, G.; Silvestris, L.; Maggi, G.; My, S.; Selvaggi, G.; Albergo, S.; Cappello, G.; Costa, S.; Mattia, A.Di; Giordano, F.; Potenza, R.; Saizu, M.A.; Tricomi, A.; Tuve, C.; Focardi, E.; Dinardo, M.E.; Fiorendi, S.; Gennai, S.; Malvezzi, S.; Manzoni, R.A.; Menasce, D.; Moroni, L.; Pedrini, D.; Azzi, P.; Bacchetta, N.; Bisello, D.; Dall'Osso, M.; Pozzobon, N.; Tosi, M.; Solestizi, L.Alunni; Biasini, M.; Bilei, G.M.; Cecchi, C.; Checcucci, B.; Ciangottini, D.; Fanò, L.; Gentsos, C.; Ionica, M.; Leonardi, R.; Manoni, E.; Mantovani, G.; Marconi, S.; Mariani, V.; Menichelli, M.; Modak, A.; Morozzi, A.; Moscatelli, F.; Passeri, D.; Placidi, P.; Postolache, V.; Rossi, A.; Saha, A.; Santocchia, A.; Storchi, L.; Spiga, D.; Androsov, K.; Azzurri, P.; Bagliesi, G.; Basti, A.; Boccali, T.; Borrello, L.; Bosi, F.; Castaldi, R.; Ceccanti, M.; Ciocci, M.A.; Dell'Orso, R.; Donato, S.; Fedi, G.; Giassi, A.; Grippo, M.T.; Ligabue, F.; Magazzu, G.; Mammini, P.; Mariani, F.; Mazzoni, E.; Messineo, A.; Moggi, A.; Morsani, F.; Palla, F.; Palmonari, F.; Profeti, A.; Raffaelli, F.; Ragonesi, A.; Rizzi, A.; Soldani, A.; Spagnolo, P.; Tenchini, R.; Tonelli, G.; Venturi, A.; Verdini, P.G.; Abbaneo, D.; Ahmed, I.; Albert, E.; Auzinger, G.; Berruti, G.; Bonnaud, J.; Daguin, J.; D'Auria, A.; Detraz, S.; Dondelewski, O.; Engegaard, B.; Faccio, F.; Frank, N.; Gill, K.; Honma, A.; Kornmayer, A.; Labaza, A.; Manolescu, F.; McGill, I.; Mersi, S.; Michelis, S.; Onnela, A.; Ostrega, M.; Pavis, S.; Peisert, A.; Pernot, J.F.; Petagna, P.; Postema, H.; Rapacz, K.; Sigaud, C.; Tropea, P.; Troska, J.; Tsirou, A.; Vasey, F.; Verlaat, B.; Vichoudis, P.; Zwalinski, L.; Bachmair, F.; Becker, R.; di Calafiori, D.; Casal, B.; Berger, P.; Djambazov, L.; Donega, M.; Grab, C.; Hits, D.; Hoss, J.; Kasieczka, G.; Lustermann, W.; Mangano, B.; Marionneau, M.; Arbol, P.Martinez Ruiz del; Masciovecchio, M.; Meinhard, M.; Perozzi, L.; Roeser, U.; Starodumov, A.; Tavolaro, V.; Wallny, R.; Zhu, D.; Amsler, C.; Bösiger, K.; Caminada, L.; Canelli, F.; Chiochia, V.; de Cosa, A.; Galloni, C.; Hreus, T.; Kilminster, B.; Lange, C.; Maier, R.; Ngadiuba, J.; Pinna, D.; Robmann, P.; Taroni, S.; Yang, Y.; Bertl, W.; Deiters, K.; Erdmann, W.; Horisberger, R.; Kaestli, H.C.; Kotlinski, D.; Langenegger, U.; Meier, B.; Rohe, T.; Streuli, S.; Chen, P.H.; Dietz, C.; Fiori, F.; Grundler, U.; Hou, W.S.; Lu, R.S.; Moya, M.; Tsai, J.F.; Tzeng, Y.M.; Cussans, D.; Goldstein, J.; Grimes, M.; Newbold, D.; Hobson, P.; Reid, I.D.; Auzinger, G.; Bainbridge, R.; Dauncey, P.; Hall, G.; James, T.; Magnan, A.M.; Pesaresi, M.; Raymond, D.M.; Uchida, K.; Durkin, T.; Harder, K.; Shepherd-Themistocleous, C.; Chertok, M.; Conway, J.; Conway, R.; Flores, C.; Lander, R.; Pellett, D.; Ricci-Tam, F.; Squires, M.; Thomson, J.; Yohay, R.; Burt, K.; Ellison, J.; Hanson, G.; Olmedo, M.; Si, W.; Yates, B.R.; Dominguez, A.; Bartek, R.; Bentele, B.; Cumalat, J.P.; Ford, W.T.; Jensen, F.; Johnson, A.; Krohn, M.; Leontsinis, S.; Mulholland, T.; Stenson, K.; Wagner, S.R.; Apresyan, A.; Bolla, G.; Burkett, K.; Butler, J.N.; Canepa, A.; Cheung, H.W.K.; Christian, D.; Cooper, W.E.; Deptuch, G.; Derylo, G.; Gingu, C.; Grünendahl, S.; Hasegawa, S.; Hoff, J.; Howell, J.; Hrycyk, M.; Jindariani, S.; Johnson, M.; Kahlid, F.; Kwan, S.; Lei, C.M.; Lipton, R.; Sá, R.Lopes De; Liu, T.; Los, S.; Matulik, M.; Merkel, P.; Nahn, S.; Prosser, A.; Rivera, R.; Schneider, B.; Sellberg, G.; Shenai, A.; Siehl, K.; Spiegel, L.; Tran, N.; Uplegger, L.; Voirin, E.; Berry, D.R.; Chen, X.; Ennesser, L.; Evdokimov, A.; Gerber, C.E.; Makauda, S.; Mills, C.; Gonzalez, I.D.Sandoval; Alimena, J.; Antonelli, L.J.; Francis, B.; Hart, A.; Hill, C.S.; Parashar, N.; Stupak, J.; Bortoletto, D.; Bubna, M.; Hinton, N.; Jones, M.; Miller, D.H.; Shi, X.; Baringer, P.; Bean, A.; Khalil, S.; Kropivnitskaya, A.; Majumder, D.; Schmitz, E.; Wilson, G.; Ivanov, A.; Mendis, R.; Mitchell, T.; Skhirtladze, N.; Taylor, R.; Anderson, I.; Fehling, D.; Gritsan, A.; Maksimovic, P.; Martin, C.; Nash, K.; Osherson, M.; Swartz, M.; Xiao, M.; Acosta, J.G.; Cremaldi, L.M.; Oliveros, S.; Perera, L.; Summers, D.; Bloom, K.; Claes, D.R.; Fangmeier, C.; Suarez, R.Gonzalez; Monroy, J.; Siado, J.; Bartz, E.; Gershtein, Y.; Halkiadakis, E.; Kyriacou, S.; Lath, A.; Nash, K.; Osherson, M.; Schnetzer, S.; Stone, R.; Walker, M.; Malik, S.; Norberg, S.; Vargas, J.E.Ramirez; Alyari, M.; Dolen, J.; Godshalk, A.; Harrington, C.; Iashvili, I.; Kharchilava, A.; Nguyen, D.; Parker, A.; Rappoccio, S.; Roozbahani, B.; Alexander, J.; Chaves, J.; Chu, J.; Dittmer, S.; McDermott, K.; Mirman, N.; Rinkevicius, A.; Ryd, A.; Salvati, E.; Skinnari, L.; Soffi, L.; Tao, Z.; Thom, J.; Tucker, J.; Zientek, M.; Akgün, B.; Ecklund, K.M.; Kilpatrick, M.; Nussbaum, T.; Zabel, J.; D'Angelo, P.; Johns, W.; Rose, K.

2017-05-30

A new pixel detector for the CMS experiment is being built, owing to the instantaneous luminosities anticipated for the Phase I Upgrade of the LHC. The new CMS pixel detector provides four-hit tracking while featuring a reduced material budget as well as new cooling and powering schemes. A new front-end readout chip mitigates buffering and bandwidth limitations, and comprises a low-threshold comparator. These upgrades allow the new pixel detector to sustain and improve the efficiency of the current pixel tracker at the increased requirements imposed by high luminosities and pile-up. In this paper, comprehensive test beam studies are presented which have been conducted to verify the design and to quantify the performance of the new detector assemblies in terms of tracking efficiency and spatial resolution. Under optimal conditions, the tracking efficiency has been determined to be ($99.95 \\pm 0.05$) \\%, while the intrinsic spatial resolution has been measured to be ($4.80 \\pm 0.25$) $\\mu$m and ($7.99 \\pm 0.21$...

Silicon pixel R&D for the CLIC detector

CERN Document Server

AUTHOR|(SzGeCERN)674552

2017-01-01

The physics aims at the future CLIC high-energy linear $e^{+}e^{−}$ collider set very high precision requirements on the performance of the vertex and tracking detectors. Moreover, these detectors have to be well adapted to the experimental conditions, such as the time structure of the collisions and the presence of beam-induced backgrounds. The main challenges are: a point resolution of a few microns, ultra-low mass (~0.2% X$_{0}$ per layer for the vertex region and ~1% X$_{0}$ per layer for the outer tracker), very low power dissipation (compatible with air-flow cooling in the inner vertex region) and pulsed power operation, complemented with ~10 ns time stamping capabilities. A highly granular all-silicon vertex and tracking detector system is under development, following an integrated approach addressing simultaneously the physics requirements and engineering constraints. For the vertex-detector region, hybrid pixel detectors with small pitch (25 μm) and analogue readout are explored. For the outer tra...

Conception and characterization of a virtual coplanar grid for a 11×11 pixelated CZT detector

Energy Technology Data Exchange (ETDEWEB)

Espagnet, Romain; Frezza, Andrea [Department of Physics, Engineering Physics and Optics and Cancer Research Center, Université Laval, Quebec city, QC, Canada G1R 0A6 (Canada); Martin, Jean-Pierre; Hamel, Louis-André [Department of Physics, Université de Montréal, C.P. 6128 Montréal QC, Canada H3C 3J7 (Canada); Després, Philippe, E-mail: philippe.despres@phy.ulaval.ca [Department of Physics, Engineering Physics and Optics and Cancer Research Center, Université Laval, Quebec city, QC, Canada G1R 0A6 (Canada); Department of Radiation Oncology and Research Center of CHU de Québec - Université Laval, Quebec city, QC Canada G1R 2J6 (Canada)

2017-07-11

Due to the low mobility of holes in CZT, commercially available detectors with a relatively large volume typically use a pixelated anode structure. They are mostly used in imaging applications and often require a dense electronic readout scheme. These large volume detectors are also interesting for high-sensitivity applications and a CZT-based blood gamma counter was developed from a 20×20×15 mm{sup 3} crystal available commercially and having a 11×11 pixelated readout scheme. A method is proposed here to reduce the number of channels required to use the crystal in a high-sensitivity counting application, dedicated to pharmacokinetic modelling in PET and SPECT. Inspired by a classic coplanar anode, an implementation of a virtual coplanar grid was done by connecting the 121 pixels of the detector to form intercalated bands. The layout, the front-end electronics and the characterization of the detector in this 2-channel anode geometry is presented. The coefficients required to compensate for electron trapping in CZT were determined experimentally to improve the performance. The resulting virtual coplanar detector has an intrinsic efficiency of 34% and an energy resolution of 8% at 662 keV. The detector's response was linear between 80 keV and 1372 keV. This suggests that large CZT crystals offer an excellent alternative to scintillation detectors for some applications, especially those where high-sensitivity and compactness are required.

Performance verification of the CMS Phase-1 Upgrade Pixel detector

Science.gov (United States)

Veszpremi, V.

2017-12-01

The CMS tracker consists of two tracking systems utilizing semiconductor technology: the inner pixel and the outer strip detectors. The tracker detectors occupy the volume around the beam interaction region between 3 cm and 110 cm in radius and up to 280 cm along the beam axis. The pixel detector consists of 124 million pixels, corresponding to about 2 m 2 total area. It plays a vital role in the seeding of the track reconstruction algorithms and in the reconstruction of primary interactions and secondary decay vertices. It is surrounded by the strip tracker with 10 million read-out channels, corresponding to 200 m 2 total area. The tracker is operated in a high-occupancy and high-radiation environment established by particle collisions in the LHC . The current strip detector continues to perform very well. The pixel detector that has been used in Run 1 and in the first half of Run 2 was, however, replaced with the so-called Phase-1 Upgrade detector. The new system is better suited to match the increased instantaneous luminosity the LHC would reach before 2023. It was built to operate at an instantaneous luminosity of around 2×1034 cm-2s-1. The detector's new layout has an additional inner layer with respect to the previous one; it allows for more efficient tracking with smaller fake rate at higher event pile-up. The paper focuses on the first results obtained during the commissioning of the new detector. It also includes challenges faced during the first data taking to reach the optimal measurement efficiency. Details will be given on the performance at high occupancy with respect to observables such as data-rate, hit reconstruction efficiency, and resolution.

Evaluation of 320x240 pixel LEC GaAs Schottky barrier X-ray imaging arrays, hybridized to CMOS readout circuit based on charge integration

CERN Document Server

Irsigler, R; Alverbro, J; Borglind, J; Froejdh, C; Helander, P; Manolopoulos, S; O'Shea, V; Smith, K

1999-01-01

320x240 pixels GaAs Schottky barrier detector arrays were fabricated, hybridized to silicon readout circuits, and subsequently evaluated. The detector chip was based on semi-insulating LEC GaAs material. The square shaped pixel detector elements were of the Schottky barrier type and had a pitch of 38 mu m. The GaAs wafers were thinned down prior to the fabrication of the ohmic back contact. After dicing, the chips were indium bump, flip-chip bonded to CMOS readout circuits based on charge integration, and finally evaluated. A bias voltage between 50 and 100 V was sufficient to operate the detector. Results on I-V characteristics, noise behaviour and response to X-ray radiation are presented. Images of various objects and slit patterns were acquired by using a standard dental imaging X-ray source. The work done was a part of the XIMAGE project financed by the European Community (Brite-Euram). (author)

Low noise signal-to-noise ratio enhancing readout circuit for current-mediated active pixel sensors

International Nuclear Information System (INIS)

Ottaviani, Tony; Karim, Karim S.; Nathan, Arokia; Rowlands, John A.

2006-01-01

Diagnostic digital fluoroscopic applications continuously expose patients to low doses of x-ray radiation, posing a challenge to both the digital imaging pixel and readout electronics when amplifying small signal x-ray inputs. Traditional switch-based amorphous silicon imaging solutions, for instance, have produced poor signal-to-noise ratios (SNRs) at low exposure levels owing to noise sources from the pixel readout circuitry. Current-mediated amorphous silicon pixels are an improvement over conventional pixel amplifiers with an enhanced SNR across the same low-exposure range, but whose output also becomes nonlinear with increasing dosage. A low-noise SNR enhancing readout circuit has been developed that enhances the charge gain of the current-mediated active pixel sensor (C-APS). The solution takes advantage of the current-mediated approach, primarily integrating the signal input at the desired frequency necessary for large-area imaging, while adding minimal noise to the signal readout. Experimental data indicates that the readout circuit can detect pixel outputs over a large bandwidth suitable for real-time digital diagnostic x-ray fluoroscopy. Results from hardware testing indicate that the minimum achievable C-APS output current that can be discerned at the digital fluoroscopic output from the enhanced SNR readout circuit is 0.341 nA. The results serve to highlight the applicability of amorphous silicon current-mediated pixel amplifiers for large-area flat panel x-ray imagers

Robustness of the Artificial Neural Networks Used for Clustering in the ATLAS Pixel Detector

CERN Document Server

The ATLAS collaboration

2015-01-01

A study of the robustness of the ATLAS pixel neural network clustering algorithm is presented. The sensitivity to variations to its input is evaluated. These variations are motivated by potential discrepancies between data and simulation due to uncertainties in the modelling of pixel clusters in simulation, as well as uncertainties from the detector calibration. Within reasonable variation magnitudes, the neural networks prove to be robust to most variations. The neural network used to identify pixel clusters created by multiple charged particles, is most sensitive to variations affecting the total amount of charge collected in the cluster. Modifying the read-out threshold has the biggest effect on the clustering's ability to estimate the position of the particle's intersection with the detector.

Depleted fully monolithic CMOS pixel detectors using a column based readout architecture for the ATLAS Inner Tracker upgrade

Science.gov (United States)

Wang, T.; Barbero, M.; Berdalovic, I.; Bespin, C.; Bhat, S.; Breugnon, P.; Caicedo, I.; Cardella, R.; Chen, Z.; Degerli, Y.; Egidos, N.; Godiot, S.; Guilloux, F.; Hemperek, T.; Hirono, T.; Krüger, H.; Kugathasan, T.; Hügging, F.; Marin Tobon, C. A.; Moustakas, K.; Pangaud, P.; Schwemling, P.; Pernegger, H.; Pohl, D.-L.; Rozanov, A.; Rymaszewski, P.; Snoeys, W.; Wermes, N.

2018-03-01

Depleted monolithic active pixel sensors (DMAPS), which exploit high voltage and/or high resistivity add-ons of modern CMOS technologies to achieve substantial depletion in the sensing volume, have proven to have high radiation tolerance towards the requirements of ATLAS in the high-luminosity LHC era. DMAPS integrating fast readout architectures are currently being developed as promising candidates for the outer pixel layers of the future ATLAS Inner Tracker, which will be installed during the phase II upgrade of ATLAS around year 2025. In this work, two DMAPS prototype designs, named LF-Monopix and TJ-Monopix, are presented. LF-Monopix was fabricated in the LFoundry 150 nm CMOS technology, and TJ-Monopix has been designed in the TowerJazz 180 nm CMOS technology. Both chips employ the same readout architecture, i.e. the column drain architecture, whereas different sensor implementation concepts are pursued. The paper makes a joint description of the two prototypes, so that their technical differences and challenges can be addressed in direct comparison. First measurement results for LF-Monopix will also be shown, demonstrating for the first time a fully functional fast readout DMAPS prototype implemented in the LFoundry technology.

The upgraded Pixel Detector of the ATLAS Experiment for Run 2 at the Large Hadron Collider

Energy Technology Data Exchange (ETDEWEB)

Backhaus, M., E-mail: malte.backhaus@cern.ch

2016-09-21

During Run 1 of the Large Hadron Collider (LHC), the ATLAS Pixel Detector has shown excellent performance. The ATLAS collaboration took advantage of the first long shutdown of the LHC during 2013 and 2014 and extracted the ATLAS Pixel Detector from the experiment, brought it to surface and maintained the services. This included the installation of new service quarter panels, the repair of cables, and the installation of the new Diamond Beam Monitor (DBM). Additionally, a completely new innermost pixel detector layer, the Insertable B-Layer (IBL), was constructed and installed in May 2014 between a new smaller beam pipe and the existing Pixel Detector. With a radius of 3.3 cm the IBL is located extremely close to the interaction point. Therefore, a new readout chip and two new sensor technologies (planar and 3D) are used in the IBL. In order to achieve best possible physics performance the material budget was improved with respect to the existing Pixel Detector. This is realized using lightweight staves for mechanical support and a CO{sub 2} based cooling system. This paper describes the improvements achieved during the maintenance of the existing Pixel Detector as well as the performance of the IBL during the construction and commissioning phase. Additionally, first results obtained during the LHC Run 2 demonstrating the distinguished tracking performance of the new Four Layer ATLAS Pixel Detector are presented.

Tests of UFXC32k chip with CdTe pixel detector

Science.gov (United States)

Maj, P.; Taguchi, T.; Nakaye, Y.

2018-02-01

The paper presents the performance of the UFXC32K—a hybrid pixel detector readout chip working with CdTe detectors. The UFXC32K has a pixel pitch of 75 μm and can cope with both input signal polarities. This functionality allows operating with widely used silicon sensors collecting holes and CdTe sensors collecting electrons. This article describes the chip focusing on solving the issues connected to high-Z sensor material, namely high leakage currents, slow charge collection time and thick material resulting in increased charge-sharring effects. The measurements were conducted with higher X-ray energies including 17.4 keV from molybdenum. Conclusions drawn inside the paper show the UFXC32K's usability for CdTe sensors in high X-ray energy applications.

First functionality tests of a 64 × 64 pixel DSSC sensor module connected to the complete ladder readout

Science.gov (United States)

Donato, M.; Hansen, K.; Kalavakuru, P.; Kirchgessner, M.; Kuster, M.; Porro, M.; Reckleben, C.; Turcato, M.

2017-03-01

The European X-ray Free Electron Laser (XFEL.EU) will provide every 0.1 s a train of 2700 spatially coherent ultrashort X-ray pulses at 4.5 MHz repetition rate. The Small Quantum Systems (SQS) instrument and the Spectroscopy and Coherent Scattering instrument (SCS) operate with soft X-rays between 0.5 keV-6 keV. The DEPFET Sensor with Signal Compression (DSSC) detector is being developed to meet the requirements set by these two XFEL.EU instruments. The DSSC imager is a 1 mega-pixel camera able to store up to 800 single-pulse images per train. The so-called ladder is the basic unit of the DSSC detector. It is the single unit out of sixteen identical-units composing the DSSC-megapixel camera, containing all representative electronic components of the full-size system and allows testing the full electronic chain. Each DSSC ladder has a focal plane sensor with 128× 512 pixels. The read-out ASIC provides full-parallel readout of the sensor pixels. Every read-out channel contains an amplifier and an analog filter, an up-to 9 bit ADC and the digital memory. The ASIC amplifier have a double front-end to allow one to use either DEPFET sensors or Mini-SDD sensors. In the first case, the signal compression is a characteristic intrinsic of the sensor; in the second case, the compression is implemented at the first amplification stage. The goal of signal compression is to meet the requirement of single-photon detection capability and wide dynamic range. We present the first results of measurements obtained using a 64× 64 pixel DEPFET sensor attached to the full final electronic and data-acquisition chain.

Pixelated transmission-mode diamond X-ray detector.

Science.gov (United States)

Zhou, Tianyi; Ding, Wenxiang; Gaowei, Mengjia; De Geronimo, Gianluigi; Bohon, Jen; Smedley, John; Muller, Erik

2015-11-01

Fabrication and testing of a prototype transmission-mode pixelated diamond X-ray detector (pitch size 60-100 µm), designed to simultaneously measure the flux, position and morphology of an X-ray beam in real time, are described. The pixel density is achieved by lithographically patterning vertical stripes on the front and horizontal stripes on the back of an electronic-grade chemical vapor deposition single-crystal diamond. The bias is rotated through the back horizontal stripes and the current is read out on the front vertical stripes at a rate of ∼ 1 kHz, which leads to an image sampling rate of ∼ 30 Hz. This novel signal readout scheme was tested at beamline X28C at the National Synchrotron Light Source (white beam, 5-15 keV) and at beamline G3 at the Cornell High Energy Synchrotron Source (monochromatic beam, 11.3 keV) with incident beam flux ranges from 1.8 × 10(-2) to 90 W mm(-2). Test results show that the novel detector provides precise beam position (positional noise within 1%) and morphology information (error within 2%), with an additional software-controlled single channel mode providing accurate flux measurement (fluctuation within 1%).

ATLAS Pixel Detector Operational Experience

CERN Document Server

Di Girolamo, B; The ATLAS collaboration

2011-01-01

The ATLAS Pixel Detector is the innermost detector of the ATLAS experiment at the Large Hadron Collider at CERN, providing high-resolution measurements of charged particle tracks in the high radiation environment close to the collision region. This capability is vital for the identification and measurement of proper decay times of long-lived particles such as b-hadrons, and thus vital for the ATLAS physics program. The detector provides hermetic coverage with three cylindrical layers and three layers of forward and backward pixel detectors. It consists of approximately 80 million pixels that are individually read out via chips bump-bonded to 1744 n-in-n silicon substrates. In this talk, results from the successful operation of the Pixel Detector at the LHC will be presented, including monitoring, calibration procedures, timing optimization and detector performance. The detector performance is excellent: 96.9% of the pixels are operational, noise occupancy and hit efficiency exceed the design specification, an...

Radiation-hard Active Pixel Sensors for HL-LHC Detector Upgrades based on HV-CMOS Technology

International Nuclear Information System (INIS)

Miucci, A; Gonzalez-Sevilla, S; Ferrere, D; Iacobucci, G; Rosa, A La; Muenstermann, D; Gonella, L; Hemperek, T; Hügging, F; Krüger, H; Obermann, T; Wermes, N; Garcia-Sciveres, M; Backhaus, M; Capeans, M; Feigl, S; Nessi, M; Pernegger, H; Ristic, B; George, M

2014-01-01

Luminosity upgrades are discussed for the LHC (HL-LHC) which would make updates to the detectors necessary, requiring in particular new, even more radiation-hard and granular, sensors for the inner detector region. A proposal for the next generation of inner detectors is based on HV-CMOS: a new family of silicon sensors based on commercial high-voltage CMOS technology, which enables the fabrication of part of the pixel electronics inside the silicon substrate itself. The main advantages of this technology with respect to the standard silicon sensor technology are: low material budget, fast charge collection time, high radiation tolerance, low cost and operation at room temperature. A traditional readout chip is still needed to receive and organize the data from the active sensor and to handle high-level functionality such as trigger management. HV-CMOS has been designed to be compatible with both pixel and strip readout. In this paper an overview of HV2FEI4, a HV-CMOS prototype in 180 nm AMS technology, will be given. Preliminary results after neutron and X-ray irradiation are shown

TCAD simulations of High-Voltage-CMOS Pixel structures for the CLIC vertex detector

CERN Document Server

Buckland, Matthew Daniel

2016-01-01

The requirements for precision physics and the experimental conditions at CLIC result in stringent constraints for the vertex detector. Capacitively coupled active pixel sensors with 25 μm pitch implemented in a commercial 180 nm High-Voltage CMOS (HV-CMOS) process are currently under study as a candidate technology for the CLIC vertex detector. Laboratory calibration measurements and beam tests with prototypes are complemented by detailed TCAD and electronic circuit simulations, aiming for a comprehensive understanding of the signal formation in the HV-CMOS sensors and subsequent readout stages. In this note 2D and 3D TCAD simulation results of the prototype sensor, the Capacitively Coupled Pixel Detector version three (CCPDv3), will be presented. These include the electric field distribution, leakage current, well capacitance, transient response to minimum ionising particles and charge-collection.

Amorphous silicon pixel radiation detectors and associated thin film transistor electronics readout

International Nuclear Information System (INIS)

Perez-Mendez, V.; Cho, G.; Drewery, J.; Jing, T.; Kaplan, S.N.; Mireshghi, A.; Wildermuth, D.; Goodman, C.; Fujieda, I.

1992-07-01

We describe the characteristics of thin (1 μm) and thick (> 30 μm) hydrogenated amorphous silicon p-i-n diodes which are optimized for detecting and recording the spatial distribution of charged particles, x-ray, γ rays and thermal neutrons. For x-ray, γ ray, and charged particle detection we can use thin p-i-n photosensitive diode arrays coupled to evaporated layers of suitable scintillators. For thermal neutron detection we use thin (2∼5 μm) gadolinium converters on 30 μm thick a-Si:H diodes. For direct detection of minimum ionizing particles and others with high resistance to radiation damage, we use the thick p-i-n diode arrays. Diode and amorphous silicon readouts as well as polysilicon pixel amplifiers are described

The Gigatracker: An ultra-fast and low-mass silicon pixel detector for the NA62 experiment

Science.gov (United States)

Fiorini, M.; Carassiti, V.; Ceccucci, A.; Cortina, E.; Cotta Ramusino, A.; Dellacasa, G.; Garbolino, S.; Jarron, P.; Kaplon, J.; Kluge, A.; Mapelli, A.; Marchetto, F.; Martin, E.; Martoiu, S.; Mazza, G.; Morel, M.; Noy, M.; Nuessle, G.; Petrucci, F.; Riedler, P.; Aglieri Rinella, G.; Rivetti, A.; Tiuraniemi, S.

2011-02-01

The Gigatracker is a hybrid silicon pixel detector developed to track the highly intense NA62 hadron beam with a time resolution of 150 ps (rms). The beam spectrometer of the experiment is composed of three Gigatracker stations installed in vacuum in order to precisely measure momentum, time and direction of every traversing particle. Precise tracking demands a very low mass of the detector assembly ( beam hadronic interactions. The high rate and especially the high timing precision requirements are very demanding: two R&D options are ongoing and the corresponding prototype read-out chips have been recently designed and produced in 0.13 μm CMOS technology. One solution makes use of a constant fraction discriminator and on-pixel analogue-based time-to-digital-converter (TDC); the other comprises a delay-locked loop based TDC placed at the end of each pixel column and a time-over-threshold discriminator with time-walk correction technique. The current status of the R&D program is overviewed and results from the prototype read-out chips test are presented.

Diamond Pixel Detectors

International Nuclear Information System (INIS)

Adam, W.; Berdermann, E.; Bergonzo, P.; Bertuccio, G.; Bogani, F.; Borchi, E.; Brambilla, A.; Bruzzi, M.; Colledani, C.; Conway, J.; D'Angelo, P.; Dabrowski, W.; Delpierre, P.; Deneuville, A.; Doroshenko, J.; Dulinski, W.; Eijk, B. van; Fallou, A.; Fizzotti, F.; Foster, J.; Foulon, F.; Friedl, M.; Gan, K.K.; Gheeraert, E.; Gobbi, B.; Grim, G.P.; Hallewell, G.; Han, S.; Hartjes, F.; Hrubec, J.; Husson, D.; Kagan, H.; Kania, D.; Kaplon, J.; Kass, R.; Koeth, T.; Krammer, M.; Lander, R.; Logiudice, A.; Lu, R.; Lynne, L.M.; Manfredotti, C.; Meier, D.; Mishina, M.; Moroni, L.; Oh, A.; Pan, L.S.; Pernicka, M.; Perera, L.; Pirollo, S.; Plano, R.; Procario, M.; Riester, J.L.; Roe, S.; Rott, C.; Rousseau, L.; Rudge, A.; Russ, J.; Sala, S.; Sampietro, M.; Schnetzer, S.; Sciortino, S.; Stelzer, H.; Stone, R.; Suter, B.; Tapper, R.J.; Tesarek, R.; Trischuk, W.; Tromson, D.; Vittone, E.; Wedenig, R.; Weilhammer, P.; White, C.; Zeuner, W.; Zoeller, M.

2001-01-01

Diamond based pixel detectors are a promising radiation-hard technology for use at the LHC. We present first results on a CMS diamond pixel sensor. With a threshold setting of 2000 electrons, an average pixel efficiency of 78% was obtained for normally incident minimum ionizing particles

Diamond Pixel Detectors

Energy Technology Data Exchange (ETDEWEB)

Adam, W.; Berdermann, E.; Bergonzo, P.; Bertuccio, G.; Bogani, F.; Borchi, E.; Brambilla, A.; Bruzzi, M.; Colledani, C.; Conway, J.; D' Angelo, P.; Dabrowski, W.; Delpierre, P.; Deneuville, A.; Doroshenko, J.; Dulinski, W.; Eijk, B. van; Fallou, A.; Fizzotti, F.; Foster, J.; Foulon, F.; Friedl, M.; Gan, K.K.; Gheeraert, E.; Gobbi, B.; Grim, G.P.; Hallewell, G.; Han, S.; Hartjes, F.; Hrubec, J.; Husson, D.; Kagan, H.; Kania, D.; Kaplon, J.; Kass, R.; Koeth, T.; Krammer, M.; Lander, R.; Logiudice, A.; Lu, R.; Lynne, L.M.; Manfredotti, C.; Meier, D.; Mishina, M.; Moroni, L.; Oh, A.; Pan, L.S.; Pernicka, M.; Perera, L. E-mail: perera@physics.rutgers.edu; Pirollo, S.; Plano, R.; Procario, M.; Riester, J.L.; Roe, S.; Rott, C.; Rousseau, L.; Rudge, A.; Russ, J.; Sala, S.; Sampietro, M.; Schnetzer, S.; Sciortino, S.; Stelzer, H.; Stone, R.; Suter, B.; Tapper, R.J.; Tesarek, R.; Trischuk, W.; Tromson, D.; Vittone, E.; Wedenig, R.; Weilhammer, P.; White, C.; Zeuner, W.; Zoeller, M

2001-06-01

Diamond based pixel detectors are a promising radiation-hard technology for use at the LHC. We present first results on a CMS diamond pixel sensor. With a threshold setting of 2000 electrons, an average pixel efficiency of 78% was obtained for normally incident minimum ionizing particles.

Readout architecture for the Pixel-Strip module of the CMS Outer Tracker Phase-2 upgrade

CERN Document Server

Caratelli, Alessandro; Jan Kaplon; Kloukinas, Konstantinos; Simone Scarfi

2017-01-01

The Outer Tracker upgrade of the Compact Muon Solenoid (CMS) experiment at CERN introduces new challenges for the front-end readout electronics. In particular, the capability of identifying particles with high transverse momentum using modules with double sensor layers requires high speed real time interconnects between readout ASICs. The Pixel-Strip module combines a pixelated silicon layer with a silicon-strip layer. Consequently, it needs two different readout ASICs, namely the Short Strip ASIC (SSA) for the strip sensor and the Macro Pixel ASIC (MPA) for the pixelated sensor. The architecture proposed in this paper allows for a total data flow between readout ASICs of $\\sim$100\\,Gbps and reduces the output data flow from 1.3\\,Tbps to 30\\,Gbps per module while limiting the total power density to below 100\\,mW/cm$^2$. In addition a system-level simulation framework of all the front-end readout ASICs is developed in order to verify the data processing algorithm and the hardware implementation allowing mult...

Position dependence of charge collection in prototype sensors for the CMS pixel detector

CERN Document Server

Rohe, Tilman; Chiochia, Vincenzo; Cremaldi, Lucien M; Cucciarelli, Susanna; Dorokhov, Andrei; Konecki, Marcin; Prokofiev, Kirill; Regenfus, Christian; Sanders, David A; Son Seung Hee; Speer, Thomas; Swartz, Morris

2004-01-01

This paper reports on the sensor R&D activity for the CMS pixel detector. Devices featuring several design and technology options have been irradiated up to a proton fluence1 of 1 multiplied by 10**1**5 n //e//q/cm**2 at the CERN PS. Afterward, they were bump bonded to unirradiated readout chips and tested using high energy pions in the H2 beam line of the CERN SPS. The readout chip allows a nonzero suppressed full analogue readout and therefore a good characterization of the sensors in terms of noise and charge collection properties. The position dependence of signal is presented and the differences between the two sensor options are discussed. 20 Refs.

Development of the ASICs for the NA62 pixel Gigatracker

CERN Document Server

Jarron, P

2008-01-01

We present the ASIC development for the readout electronics of the Gigatracker pixel detector of NA62. Specifications of this detector are challenging in terms of timing precision with a hit time stamp accuracy of 100 ps and a peak hit rate of 50 Mhits/cm2/s. A timing precision and hit rate are more than one order of magnitude faster than pixel LHC readout ASIC. The research for pixel cell design and the readout architectures are following two approaches, which are presented and discussed in this paper. Presently demonstrator prototypes are under development and SPICE simulation results of the frontend, the readout strategy and and the pixelcolumn are also presented and discussed.

Fabrication of a high-density MCM-D for a pixel detector system using a BCB/Cu technology

CERN Document Server

Topper, M; Engelmann, G; Fehlberg, S; Gerlach, P; Wolf, J; Ehrmann, O; Becks, K H; Reichl, H

1999-01-01

The MCM-D which is described here is a prototype for a pixel detector system for the planned Large Hadron Collider (LHC) at CERN, Geneva. The project is within the ATLAS experiment. The module consists of a sensor tile with an active area of 16.4 mm*60.4 mm, 16 readout chips, each serving 24*160 pixel unit cells, a module controller chip, an optical transceiver and the local signal interconnection and power distribution buses. The extremely high wiring density which is necessary to interconnect the readout chips was achieved using a thin film copper/photo-BCB process above the pixel array. The bumping of the readout chips was done by PbSn electroplating. All dice are then attached by flip-chip assembly to the sensor diodes and the local buses. The focus of this paper is a detailed description of the technologies for the fabrication of this advanced MCM-D. (10 refs).

Firmware development and testing of the ATLAS Pixel Detector / IBL ROD card

CERN Document Server

Gabrielli, Alessandro; The ATLAS collaboration; Balbi, Gabriele; Bindi, Marcello; Chen, Shaw-pin; Falchieri, Davide; Flick, Tobias; Hauck, Scott Alan; Hsu, Shih-Chieh; Kretz, Moritz; Kugel, Andreas; Lama, Luca; Travaglini, Riccardo; Wensing, Marius; ATLAS Pixel Collaboration

2015-01-01

The ATLAS Experiment is reworking and upgrading systems during the current LHC shut down. In particular, the Pixel detector has inserted an additional inner layer called Insertable B-Layer (IBL). The Readout-Driver card (ROD), the Back-of-Crate card (BOC), and the S-Link together form the essential frontend data path of the IBL’s off-detector DAQ system. The strategy for IBL ROD firmware development was three-fold: keeping as much of the Pixel ROD datapath firmware logic as possible, employing a complete new scheme of steering and calibration firmware and designing the overall system to prepare for a future unified code version integrating IBL and Pixel layers. Essential features such as data formatting, frontend-specific error handling, and calibration are added to the ROD data path. An IBL DAQ testbench using realistic frontend chip model was created to serve as an initial framework for full offline electronic system simulation. In this document, major firmware achievements concerning the IBL ROD data pat...

Firmware development and testing of the ATLAS Pixel Detector / IBL ROD card

CERN Document Server

Balbi, G; The ATLAS collaboration; Gabrielli, A; Lama, L; Travaglini, R; Backhaus, M; Bindi, M; Chen, S-P; Flick, T; Kretz, M; Kugel, A; Wensing, M

2014-01-01

The ATLAS Experiment is reworking and upgrading systems during the current LHC shut down. In particular, the Pixel detector has inserted an additional inner layer called Insertable B-Layer (IBL). The Readout-Driver card (ROD), the Back-of-Crate card (BOC), and the S-Link together form the essential frontend data path of the IBL’s off-detector DAQ system. The strategy for IBLROD firmware development was three-fold: keeping as much of the PixelROD datapath firmware logic as possible, employing a complete new scheme of steering and calibration firmware and designing the overall system to prepare for a future unified code version integrating IBL and Pixel layers. Essential features such as data formatting, frontend-specific error handling, and calibration are added to the ROD data path. An IBLDAQ testbench using realistic frontend chip model was created to serve as an initial framework for full offline electronic system simulation. In this document, major firmware achievements concerning the IBLROD data path im...

High accuracy injection circuit for the calibration of a large pixel sensor matrix

International Nuclear Information System (INIS)

Quartieri, E.; Comotti, D.; Manghisoni, M.

2013-01-01

Semiconductor pixel detectors, for particle tracking and vertexing in high energy physics experiments as well as for X-ray imaging, in particular for synchrotron light sources and XFELs, require a large area sensor matrix. This work will discuss the design and the characterization of a high-linearity, low dispersion injection circuit to be used for pixel-level calibration of detector readout electronics in a large pixel sensor matrix. The circuit provides a useful tool for the characterization of the readout electronics of the pixel cell unit for both monolithic active pixel sensors and hybrid pixel detectors. In the latter case, the circuit allows for precise analogue test of the readout channel already at the chip level, when no sensor is connected. Moreover, it provides a simple means for calibration of readout electronics once the detector has been connected to the chip. Two injection techniques can be provided by the circuit: one for a charge sensitive amplification and the other for a transresistance readout channel. The aim of the paper is to describe the architecture and the design guidelines of the calibration circuit, which has been implemented in a 130 nm CMOS technology. Moreover, experimental results of the proposed injection circuit will be presented in terms of linearity and dispersion

Development of high data readout rate pixel module and detector hybridization at Fermilab

International Nuclear Information System (INIS)

Zimmermann, Sergio

2001-01-01

This paper describes the baseline design and a variation of the pixel module to handle the data rate required for the BTeV experiment at Fermilab. The present prototype has shown good electrical performance characteristics. Indium bump bonding is proven to be capable of successful fabrication at 50 micron pitch on real detectors. For solder bumps at 50 micron pitch, much better results have been obtained with the fluxless PADS processed detectors. The results are adequate for our needs and our tests have validated it as a viable technology

Front-end Intelligence for triggering and local track recognition in Gas Pixel Detectors

CERN Document Server

Hessey, NP; The ATLAS collaboration; van der Graaf, H; Vermeulen, J; Jansweijer, P; Romaniouk, A

2012-01-01

The combination of gaseous detectors with pixel readout chips gives unprecedented hit resolution (improving from O(100 um) for wire chambers to 10 um), as well as high-rate capability, low radiation length and giving in addition angular information on the local track. These devices measure individually every electron liberated by the passage of a charged particle, leading to a large quantity of data to be read out. Typically an external trigger is used to start the read-out. We are investigating the addition of local intelligence to the pixel read-out chip. A first level of processing detects the passage of a particle through the gas volume, and accurately determines the time of passage. A second level measures in an approximate but fast way the tilt-angle of the track. This can be used to trigger a third stage in which all hits associated to the track are processed locally to give a least-squares-fit to the track. The chip can then send out just the fitted track parameters instead of the individual electron ...

Applications of pixellated GaAs X-ray detectors in a synchrotron radiation beam

CERN Document Server

Watt, J; Campbell, M; Mathieson, K; Mikulec, B; O'Shea, V; Passmore, M S; Schwarz, C; Smith, K M; Whitehill, C

2001-01-01

Hybrid semiconductor pixel detectors are being investigated as imaging devices for radiography and synchrotron radiation beam applications. Based on previous work in the CERN RD19 and the UK IMPACT collaborations, a photon counting GaAs pixel detector (PCD) has been used in an X-ray powder diffraction experiment. The device consists of a 200 mu m thick SI-LEC GaAs detector patterned in a 64*64 array of 170 mu m pitch square pixels, bump-bonded to readout electronics operating in single photon counting mode. Intensity peaks in the powder diffraction pattern of KNbO/sub 3/ have been resolved and compared with results using the standard scintillator, and a PCD predecessor (the Omega 3). The PCD shows improved speed, dynamic range, 2-D information and comparable spatial resolution to the standard scintillator based systems. It also overcomes the severe dead time limitations of the Omega 3 by using a shutter based acquisition mode. A brief demonstration of the possibilities of the system for dental radiography and...

FE-I4 Firmware Development and Integration with FELIX for the Pixel Detector

CERN Document Server

Yadav, Amitabh; Sharma, Abhishek; CERN. Geneva. EP Department

2017-01-01

CERN has planned a series of upgrades for the LHC. The last in this current series of planned upgrades is designated the HL-LHC. At the same time, the ATLAS Experiment will be extensively changed to meet the challenges of this upgrade (termed as the “Phase-II” upgrade). The Inner Detector will be completely rebuilt for the phase-II. The TRT, SCT and Pixel will be replaced by the all-silicon tracker, termed as the Inner Tracker (ITk). The read-out of this future ITk detector is an engineering challenge for the routing of services and quality of the data. This document describes the FPGA firmware development that integrates the GBT, Elink and Rx-Tx Cores for communication between the FE-I4 modules and the FELIX read-out system.

An induced charge readout scheme incorporating image charge splitting on discrete pixels

International Nuclear Information System (INIS)

Kataria, D.O.; Lapington, J.S.

2003-01-01

Top hat electrostatic analysers used in space plasma instruments typically use microchannel plates (MCPs) followed by discrete pixel anode readout for the angular definition of the incoming particles. Better angular definition requires more pixels/readout electronics channels but with stringent mass and power budgets common in space applications, the number of channels is restricted. We describe here a technique that improves the angular definition using induced charge and an interleaved anode pattern. The technique adopts the readout philosophy used on the CRRES and CLUSTER I instruments but has the advantages of the induced charge scheme and significantly reduced capacitance. Charge from the MCP collected by an anode pixel is inductively split onto discrete pixels whose geometry can be tailored to suit the scientific requirements of the instrument. For our application, the charge is induced over two pixels. One of them is used for a coarse angular definition but is read out by a single channel of electronics, allowing a higher rate handling. The other provides a finer angular definition but is interleaved and hence carries the expense of lower rate handling. Using the technique and adding four channels of electronics, a four-fold increase in the angular resolution is obtained. Details of the scheme and performance results are presented

DEPFET: A silicon pixel detector for future colliders. Fundamentals, characterization and performance

CERN Document Server

Marinas Pardo, Carlos Manuel; Vos, Marcel Andre

2011-01-01

The future electron-positron colliders, either breaking the energy frontier (like ILC or CLIC) or the luminosity frontier (SuperKEKB), impose unprecedented constraints over the new generation of detectors that will be operated in those facilities. In particular, the vertex detectors must be designed for an efficient flavour tagging and excellent vertex reconstruction. To cope with these requirements, highly pixelated sensors with a fast readout, very low material budget and low power consumption must be developed. Although the combination of these factors is a substantial challenge, the DEPFET Collaboration has developed a new generation of sensors that can be operated in such a harsh environment. The DEpleted P-channel Field Effect Transistor (DEPFET) is a pixel sensor that combines detection and internal amplification at the same time. With such configuration, thin detectors with good signal-to-noise ratio and low power consumption can be produced. In this thesis, the optimization and performance of two gen...

Optimization of ADC transfer curves for the Belle II pixel detector

Energy Technology Data Exchange (ETDEWEB)

Haidl, Jakob; Mueller, Felix; Moser, Hans-Guenther; Kiesling, Christian; Valentan, Manfred [Max-Planck-Institut fuer Physik, Muenchen (Germany); Koffmane, Christian [Halbleiterlabor der Max-Planck-Gesellschaft, Muenchen (Germany); Collaboration: Belle II-Collaboration

2016-07-01

The Super-KEKB accelerator at the KEK high energy research center in Tsukuba in Japan will provide a 40 times higher luminosity. To cope with this high luminosity the Belle detector is improved to Belle II, which includes the integration of a two layer DEPFET pixel detector (PXD) resulting in a higher vertex resolution. The task of the read-out electronics is to process the high data rate of the PXD. To fulfill these requirements three different types of ASICs were designed. The foremost of them called Drain Current Digitizer (DCD) converts the drain currents of the DEPFET pixel sensors into digital code. Since the PXD will be equipped with 160 DCDs automatic testing of the chips is needed. Analog to digital transfer curves are an appropriate tool for error recognition and optimization of the digitization process within the DCD. An overview of measurements and optimization strategies is presented.

Study of preamplifier, shaper and peak detector in readout ASIC for particle detector

International Nuclear Information System (INIS)

Wang Ke; Zhang Shengjun; Fan Lei; Li Xian

2014-01-01

Recently, kinds of particle detectors have used Application Specific Integrated Circuits (ASIC) in their electronics readout system and ASICs have been designed in China now. This project designed a multi-channel readout ASIC for general detector. The chip has Preamplifier, Shaper and Peak Detector embedded for easy readout. For each channel, signal which is preprocessed by a low-noise preamplifier is sent to the shaper to form a quasi-Gaussian pulse and keep its peak for readout. This chip and modules of individual Preamplifier, Shaper and Peak Detector have been manufactured, results will be reported in time. (authors)

Development of a pixel sensor with fine space-time resolution based on SOI technology for the ILC vertex detector

Energy Technology Data Exchange (ETDEWEB)

Ono, Shun, E-mail: s-ono@champ.hep.sci.osaka-u.ac.jp [Osaka University, 1-1 Machikaneyama, Toyonaka (Japan); Togawa, Manabu; Tsuji, Ryoji; Mori, Teppei [Osaka University, 1-1 Machikaneyama, Toyonaka (Japan); Yamada, Miho; Arai, Yasuo; Tsuboyama, Toru; Hanagaki, Kazunori [Institute of Particle and Nuclear Studies, High Energy Accelerator Research Org. (KEK), 1-1 Oho, Tsukuba (Japan)

2017-02-11

We have been developing a new monolithic pixel sensor with silicon-on-insulator (SOI) technology for the International Linear Collider (ILC) vertex detector system. The SOI monolithic pixel detector is realized using standard CMOS circuits fabricated on a fully depleted sensor layer. The new SOI sensor SOFIST can store both the position and timing information of charged particles in each 20×20 μm{sup 2} pixel. The position resolution is further improved by the position weighted with the charges spread to multiple pixels. The pixel also records the hit timing with an embedded time-stamp circuit. The sensor chip has column-parallel analog-to-digital conversion (ADC) circuits and zero-suppression logic for high-speed data readout. We are designing and evaluating some prototype sensor chips for optimizing and minimizing the pixel circuit.

The Gigatracker: An ultra-fast and low-mass silicon pixel detector for the NA62 experiment

International Nuclear Information System (INIS)

Fiorini, M.; Carassiti, V.; Ceccucci, A.; Cortina, E.; Cotta Ramusino, A.; Dellacasa, G.; Garbolino, S.; Jarron, P.; Kaplon, J.; Kluge, A.; Mapelli, A.; Marchetto, F.; Martin, E.; Martoiu, S.; Mazza, G.; Morel, M.; Noy, M.; Nuessle, G.; Petrucci, F.; Riedler, P.

2011-01-01

The Gigatracker is a hybrid silicon pixel detector developed to track the highly intense NA62 hadron beam with a time resolution of 150 ps (rms). The beam spectrometer of the experiment is composed of three Gigatracker stations installed in vacuum in order to precisely measure momentum, time and direction of every traversing particle. Precise tracking demands a very low mass of the detector assembly ( 0 per station) in order to limit multiple scattering and beam hadronic interactions. The high rate and especially the high timing precision requirements are very demanding: two R and D options are ongoing and the corresponding prototype read-out chips have been recently designed and produced in 0.13μm CMOS technology. One solution makes use of a constant fraction discriminator and on-pixel analogue-based time-to-digital-converter (TDC); the other comprises a delay-locked loop based TDC placed at the end of each pixel column and a time-over-threshold discriminator with time-walk correction technique. The current status of the R and D program is overviewed and results from the prototype read-out chips test are presented.

First experiences with the ATLAS pixel detector control system at the combined test beam 2004

International Nuclear Information System (INIS)

Imhaeuser, Martin; Becks, Karl-Heinz; Henss, Tobias; Kersten, Susanne; Maettig, Peter; Schultes, Joachim

2006-01-01

Detector control systems (DCS) include the readout, control and supervision of hardware devices as well as the monitoring of external systems like cooling system and the processing of control data. The implementation of such a system in the final experiment also has to provide the communication with the trigger and data acquisition system (TDAQ). In addition, conditions data which describe the status of the pixel detector modules and their environment must be logged and stored in a common LHC wide database system. At the combined test beam all ATLAS subdetectors were operated together for the first time over a longer period. To ensure the functionality of the pixel detector, a control system was set up. We describe the architecture chosen for the pixel DCS, the interfaces to hardware devices, the interfaces to the users and the performance of our system. The embedding of the DCS in the common infrastructure of the combined test beam and also its communication with surrounding systems will be discussed in some detail

Performance of n-in-p pixel detectors irradiated at fluences up to $5x10^{15} n_{eq}/cm^{2}$ for the future ATLAS upgrades

CERN Document Server

INSPIRE-00219560; La Rosa, A.; Nisius, R.; Pernegger, H.; Richter, R.H.; Weigell, P.

We present the results of the characterization of novel n-in-p planar pixel detectors, designed for the future upgrades of the ATLAS pixel system. N-in-p silicon devices are a promising candidate to replace the n-in-n sensors thanks to their radiation hardness and cost effectiveness, that allow for enlarging the area instrumented with pixel detectors. The n-in-p modules presented here are composed of pixel sensors produced by CiS connected by bump-bonding to the ATLAS readout chip FE-I3. The characterization of these devices has been performed with the ATLAS pixel read-out systems, TurboDAQ and USBPIX, before and after irradiation with 25 MeV protons and neutrons up to a fluence of 5x10**15 neq /cm2. The charge collection measurements carried out with radioactive sources have proven the feasibility of employing this kind of detectors up to these particle fluences. The collected charge has been measured to be for any fluence in excess of twice the value of the FE-I3 threshold, tuned to 3200 e. The first result...

The ATLAS Pixel Detector

CERN Document Server

Huegging, Fabian

2006-06-26

The contruction of the ATLAS Pixel Detector which is the innermost layer of the ATLAS tracking system is prgressing well. Because the pixel detector will contribute significantly to the ATLAS track and vertex reconstruction. The detector consists of identical sensor-chip-hybrid modules, arranged in three barrels in the centre and three disks on either side for the forward region. The position of the detector near the interaction point requires excellent radiation hardness, mechanical and thermal robustness, good long-term stability for all parts, combined with a low material budget. The final detector layout, new results from production modules and the status of assembly are presented.

Overview of the CMS Pixel Detector

CERN Document Server

Cerati, Giuseppe B

2008-01-01

The Compact Muon Solenoid Experiment (CMS) will start taking data at the Large Hadron Collider (LHC) in 2009. It will investigate the proton-proton collisions at $14~TeV$. A robust tracking combined with a precise vertex reconstruction is crucial to address the physics challenge of proton collisions at this energy. To this extent an all-silicon tracking system with very fine granularity has been built and now is in the final commissioning phase. It represents the largest silicon tracking detector ever built. The system is composed by an outer part, made of micro-strip detectors, and an inner one, made of pixel detectors. The pixel detector consists of three pixel barrel layers and two forward disks at each side of the interaction region. Each pixel sensor, both for the barrel and forward detectors, has $100 \\times 150$ $\\mu m^2$ cells for a total of 66 million pixels covering a total area of about $1~m^2$. The pixel detector will play a crucial role in the pattern recognition and the track reconstruction both...

Multi-anode photon-multiplier readout electronics for the LHCb ring imaging Cherenkov detectors

CERN Document Server

Smale, N J

2004-01-01

A readout system for the Ring Imaging CHerenkov (RICH) detectors of the LHCb experiment has been developed. Two detector technologies for the measurement of Cherenkov photons are considered, the Multi-Anode Photo-Multiplier Tube (MAPMT) and the Hybrid Photon Detector (HPD), both of which meet the RICH requirements. The properties of the MAPMT are evaluated using a controlled single-photon source; a pixel-to-pixel gain variation of ~3 and a typical signal to noise of ~20 is measured. The relative tube efficiency is found to be reduced by ~26 % due to the detailed focusing structure of the MAPMT device. A radiation hard application-specific integrated circuit (ASIC) chip, the Beetle1.2MA0, has been developed to capture and store signals from a pair of MAPMTs. The Beetle1.2MA0 is built on the architecture of the Beetle family that was designed for silicon strip detectors, the difference being a modified front-end amplifier. The 128 input-channels of the Beetle1.2MA0 have a charge-sensitive pre-amplifier followed...

Gas filled prototype of a CdZnTe pixel detector

International Nuclear Information System (INIS)

Ramsey, B.; Sharma, D.; Sipila, H.; Gostilo, V.; Loupilov, A.

2001-01-01

CdZnTe pixel structures are currently the most promising detectors for the focal planes of hard X-ray telescopes, for astronomical observation in the range 5-100 keV. In Sharma et al. (Proc. SPIE 3765 (1999) 822) and Ramsey et al. (Nucl. Instrum. Methods A 458 (2001) 55) we presented preliminary results on the development of prototype 4x4 CdZnTe imaging detectors operated under vacuum. These pixel detectors were installed inside vacuum chambers on three-stage Peltier coolers providing detector temperatures down to -40 deg. C. A miniature sputter ion pump inside each chamber maintained the necessary vacuum of 10 -5 Torr. At a temperature of -20 deg. C we achieved an FWHM energy resolution of between 2% and 3% at 60 keV and ∼15% at 5.9 keV; however, the dependency on temperature was weak and at +20 deg. C the respective resolutions were 3% and 20%. As the detectors could be operated at room temperature without loss of their good characteristics it was possible to exclude the sputter ion pump and fill the chamber with dry nitrogen instead. We have tested a nitrogen-filled CdZnTe (5x5x1 mm 3 ) prototype having 0.65x0.65 mm 2 readout pads on a 0.75 mm pitch. The interpixel resistance at an applied voltage of 10 V was higher than 50 GΩ and the pixel leakage currents at room temperature with a bias of 200 V between each pad and the common electrode did not exceed 0.8 nA. The pixel detector inside the microassembly, which also contained the input stages of the preamplifiers, was installed on a Peltier cooler to maintain the detector temperature at +20 deg. C. To define real leakage currents of the pixels in their switched-on state we have checked the voltage on the preamplifiers feedback resistors. The resulting currents were 10-50 pA at a detector bias of 500 V. Under test, the typical energy resolution per pixel at +20 deg. C was ∼3% at energy 59.6 keV and ∼20% at energy 5.9 keV, which are similar to the values obtained in the vacuum prototype at room temperature

3D integration technology for hybrid pixel detectors designed for particle physics and imaging experiments

International Nuclear Information System (INIS)

Henry, D.; Berthelot, A.; Cuchet, R.; Chantre, C.; Campbell, M.; Tick, T.

2012-01-01

Hybrid pixel detectors are now widely used in particle physics experiments and are becoming established at synchrotron light sources. They have also stimulated growing interest in other fields and, in particular, in medical imaging. Through the continuous pursuit of miniaturization in CMOS it has been possible to increase the functionality per pixel while maintaining or even shrinking pixel dimensions. The main constraint on the more extensive use of the technology in all fields is the cost of module building and the difficulty of covering large areas seamlessly. On another hand, in the field of electronic component integration, a new approach has been developed in the last years, called 3D Integration. This concept, based on using the vertical axis for component integration, allows improving the global performance of complex systems. Thanks to this technology, the cost and the form factor of components could be decreased and the performance of the global system could be enhanced. In the field of radiation imaging detectors the advantages of 3D Integration come from reduced inter chip dead area even on large surfaces and from improved detector construction yield resulting from the use of single chip 4-side buttable tiles. For many years, numerous R and centres and companies have put a lot of effort into developing 3D integration technologies and today, some mature technologies are ready for prototyping and production. The core technology of the 3D integration is the TSV (Through Silicon Via) and for many years, LETI has developed those technologies for various types of applications. In this paper we present how one of the TSV approaches developed by LETI, called TSV last, has been applied to a readout wafer containing readout chips intended for a hybrid pixel detector assembly. In the first part of this paper, the 3D design adapted to the read-out chip will be described. Then the complete process flow will be explained and, finally, the test strategy adopted and

Cryogenic readout for multiple VUV4 Multi-Pixel Photon Counters in liquid xenon

Science.gov (United States)

Arneodo, F.; Benabderrahmane, M. L.; Bruno, G.; Conicella, V.; Di Giovanni, A.; Fawwaz, O.; Messina, M.; Candela, A.; Franchi, G.

2018-06-01

We present the performances and characterization of an array made of S13370-3050CN (VUV4 generation) Multi-Pixel Photon Counters manufactured by Hamamatsu and equipped with a low power consumption preamplifier operating at liquid xenon temperature (∼ 175 K). The electronics is designed for the readout of a matrix of maximum dimension of 8 × 8 individual photosensors and it is based on a single operational amplifier. The detector prototype presented in this paper utilizes the Analog Devices AD8011 current feedback operational amplifier, but other models can be used depending on the application. A biasing correction circuit has been implemented for the gain equalization of photosensors operating at different voltages. The results show single photon detection capability making this device a promising choice for future generation of large scale dark matter detectors based on liquid xenon, such as DARWIN.

Prototyping of larger structures for the Phase-II upgrade of the pixel detector of the ATLAS experiment

CERN Document Server

Alvarez Feito, Diego; The ATLAS collaboration

2017-01-01

For the high luminosity era of the Large Hadron Collider (HL-LHC) it is forseen to replace the current inner tracker of the ATLAS experiment with a new detector to cope with the occuring increase in occupancy, bandwidth and radiation damage. It will consist of an inner pixel and outer strip detector aiming to provide tracking coverage up to |η|<4. The layout of the pixel detector is foreseen to consist of five layers of pixel silicon sensor modules in the central region and several ring-shaped layers in the forward region. It results in up to 14 m² of silicon depending on the selected layout. Beside the challenge of radiation hardness and high-rate capable silicon sensors and readout electronics many system aspects have to be considered for a fully functional detector. Both stable and low mass mechanical structures and services are important. Within the collaboration a large effort is started to prototype larger detector structures for both the central and forward region of the detector. The aspect of sy...

High tracking resolution detectors. Final Technical Report

International Nuclear Information System (INIS)

Vasile, Stefan; Li, Zheng

2010-01-01

High-resolution tracking detectors based on Active Pixel Sensor (APS) have been valuable tools in Nuclear Physics and High-Energy Physics research, and have contributed to major discoveries. Their integration time, radiation length and readout rate is a limiting factor for the planed luminosity upgrades in nuclear and high-energy physics collider-based experiments. The goal of this program was to demonstrate and develop high-gain, high-resolution tracking detector arrays with faster readout, and shorter radiation length than APS arrays. These arrays may operate as direct charged particle detectors or as readouts of high resolution scintillating fiber arrays. During this program, we developed in CMOS large, high-resolution pixel sensor arrays with integrated readout, and reset at pixel level. Their intrinsic gain, high immunity to surface and moisture damage, will allow operating these detectors with minimal packaging/passivation requirements and will result in radiation length superior to APS. In Phase I, we designed and fabricated arrays with calorimetric output capable of sub-pixel resolution and sub-microsecond readout rate. The technical effort was dedicated to detector and readout structure development, performance verification, as well as to radiation damage and damage annealing.

ATLAS ITk Pixel detector

CERN Document Server

Gemme, Claudia; The ATLAS collaboration

2016-01-01

The high luminosity upgrade of the LHC (HL-LHC) in 2026 will provide new challenge to the ATLAS tracker. The current inner detector will be replaced with a whole silicon tracker which will consist of a five barrel layer Pixel detector surrounded by a four barrel layer Strip detector. The expected high radiation level are requiring the development of upgraded silicon sensors as well as new a front-end chip. The dense tracking environment will require finer granularity detectors. The data rates will require new technologies for high bandwidth data transmission and handling. The current status of the HL-LHC ATLA Pixel detector developments as well as the various layout options will be reviewed.

The readout system of the new H1 silicon detectors

International Nuclear Information System (INIS)

Buerger, J.; Hansen, K.; Lange, W.; Prell, S.; Zimmermann, W.; Henschel, H.; Haynes, W.J.; Noyes, G.W.; Joensson, L.; Gabathuler, K.; Horisberger, R.; Wagener, M.; Eichler, R.; Erdmann, W.; Niggli, H.; Pitzl, D.

1995-03-01

The H1 detector at HERA at DESY undergoes presently a major upgrade. In this context silicon strip detectors have been installed at beginning of 1995. The high bunch crossing frequency of HERA (10.4 MHz) demands a novel readout architecture which includes pipelining, signal processing and data reduction at a very early stage. The front end readout is hierarchically organized. The detector elements are read out by the APC chip which contains an analog pipeline and performs first background subtraction. Up to five readout chips are controlled by a Decoder Chip. The readout processor module (OnSiRoC) operates the detectors, controls the Decoder Chips and performs a first level data reduction. The paper describes the readout architecture of the H1 Silicon Detectors and performance data of the complete readout chain. (orig.)

Pixelated CdZnTe drift detectors

DEFF Research Database (Denmark)

Kuvvetli, Irfan; Budtz-Jørgensen, Carl

2005-01-01

A technique, the so-called Drift Strip Method (DSM), for improving the CdZnTe detector energy response to hard X-rays and gamma-rays was applied as a pixel geometry. First tests have confirmed that this detector type provides excellent energy resolution and imaging performance. We specifically...... report on the performance of 3 mm thick prototype CZT drift pixel detectors fabricated using material from eV-products. We discuss issues associated with detector module performance. Characterization results obtained from several prototype drift pixel detectors are presented. Results of position...

Readout scheme for the Baby-MIND detector

CERN Document Server

Noah, Etam; Cadoux, F; Favre, Y; Martinez, B; Nicola, L; Parsa, S; Rayner, M; Antonova, M; Fedotov, S; Izmaylov, A; Kleymenova, A; Khabibullin, M; Khotyantsev, A; Kudenko, Y; Likhacheva, V; Mefodiev, A; Mineev, O; Ovsiannikova, T; Shaykhiev, A; Suvorov, S; Yershov, N; Tsenov, R

2016-01-01

A readout scheme has been designed for the plastic scintillator bars of the Baby-MIND detector modules. This spectrometer will measure momentum and identify the charge of 1 GeV/c muons with magnetized iron plates interleaved with detector modules. One challenge the detector aims to address is that of keeping high charge identification efficiencies for momenta below 1 GeV/c where multiple scattering in the iron plates degrades momentum resolution. A front-end board has been developed, with 3 CITIROC readout chips per board and up to 96 channels. Hamamatsu MPPCs type S12571-025C photosensors were chosen for readout of wavelength shifting fibers embedded in plastic scintillators. Procurement of the MPPCs has been carried out to instrument 3000 channels in total. Design choices and first results of this readout scheme are presented.

Chip development in 65 nm CMOS technology for the high luminosity upgrade of the ATLAS pixel detector

Energy Technology Data Exchange (ETDEWEB)

Germic, Leonard; Hemperek, Tomasz; Kishishita, Tetsuichi; Krueger, Hans; Rymaszewski, Piotr; Wermes, Norbert [University of Bonn, Bonn (Germany)

2016-07-01

The LHC High Luminosity upgrade will result in a significant change of environment in which particle detectors are going to operate, especially for devices very close to the interaction point like pixel detector electronics. Challenges arising from the increased hit rate will have to be solved by designing faster and more complex readout electronics that will also have to withstand unprecedented radiation doses. Developing such integrated circuit requires a significant R and D effort and resources, therefore a joint development project between several institutes (including ours) was started. This collaboration, named RD53, aims to develop a pixel readout chip suitable for ATLAS' and CMS' upgrades using a 65nm CMOS technology. During this presentation motivations and benefits of using this very deep-submicron technology are discussed. Most of the talk is allocated to presenting some of the circuits designed by our group (focusing on developments connected to RD53 collaboration), along with their performance measurement results.

The power supply system for the DEPFET pixel detector at BELLE II

International Nuclear Information System (INIS)

Rummel, Stefan

2013-01-01

The upgrade of the KEKB accelerator towards 8×10 35 cm −2 s −1 poses several challenges for the BELLE II detector. Especially the innermost detector will be faced with a significant radiation of several MRad per year as well as a high hit density. To cope with this a silicon pixel detector will be used for the inner layers of the silicon tracker. The pixel detector (PXD) consists of two layers of DEPFET active pixel sensors. The DEPFET technology has an unique set of advantages like low power dissipation in the active area, flexible device size, radiation hardness and a thinning procedure allowing to adjust the thickness of the device over a wide range. The two layers close to the interaction point together with a low material budget will improve the IP resolution by a factor of 2 compared to the previous installed silicon detector. In addition silicon stand-alone pattern recognition will be possible together with the four layers of double sided strip detectors (DSSD) of the strip detector. The PXD detector system consists of the DEPFET modules with integrated readout chips, the data handling hybrid receiving the data and sending them to compute nodes performing an online pattern recognition. Moreover the power supply system provides the supply voltages for the DEPFET from a position outside of the detector. The power distribution is designed to provide low output impedance over all frequencies and transient response with appropriate overshoots. The PXD pose several challenges to the power distribution system—number of voltages, tight requirements on regulation and noise. -- Highlights: ► The KEKB accelerator receive a luminosity upgrade towards 8×10 35 cm −2 s −1 . ► A two layer pixel detector based on the DEPFET technology will be installed. ► An improvement of a factor of 2 in. impact parameter resolution is expected. ► The 34 A dedicated power supply system for the detector is under development which aims for low noise, low output impedance

Characterization of the column-based priority logic readout of Topmetal-II− CMOS pixel direct charge sensor

International Nuclear Information System (INIS)

An, M.; Zhang, W.; Xiao, L.; Gao, C.; Chen, C.; Huang, G.; Ji, R.; Liu, J.; Pei, H.; Sun, X.; Wang, K.; Yang, P.; Zhou, W.; Han, M.; Mei, Y.; Li, X.; Sun, Q.

2017-01-01

We present the detailed study of the digital readout of Topmetal-II - CMOS pixel direct charge sensor. Topmetal-II - is an integrated sensor with an array of 72×72 pixels each capable of directly collecting external charge through exposed metal electrodes in the topmost metal layer. In addition to the time-shared multiplexing readout of the analog output from Charge Sensitive Amplifiers in each pixel, hits are also generated through comparators in each pixel with individually adjustable thresholds. The hits are read out via a column-based priority logic structure, retaining both hit location and time information. The in-array column-based priority logic features with a full clock-less circuitry hence there is no continuously running clock distributed in the pixel and matrix logic. These characteristics enable its use as the charge readout device in future Time Projection Chambers without gaseous gain mechanism, which has unique advantages in low background and low rate-density experiments. We studied the detailed working behavior and performance of this readout, and demonstrated its functional validity and potential in imaging applications.

Study of the spatial resolution for binary readout detectors

Energy Technology Data Exchange (ETDEWEB)

Yonamine, R., E-mail: ryo.yonamine@ulb.ac.be; Maerschalk, T.; Lentdecker, G. De

2016-07-11

Often the binary readout is proposed for high granularity detectors to reduce the generated data volume to be readout at the price of a somewhat reduced spatial resolution compared to an analogue readout. We have been studying single hit resolutions obtained with a binary readout using simulations as well as analytical approaches. In this note we show that the detector geometry could be optimized to offer an equivalent spatial resolution than with an analogue readout.

Development of a serial powering scheme and a versatile characterization system for the ATLAS pixel detector upgrade

Energy Technology Data Exchange (ETDEWEB)

Filimonov, Viacheslav

2017-08-15

In order to increase the probability of new discoveries the LHC will be upgraded to the HL-LHC. The upgrade of the ATLAS detector is an essential part of this program. The entire ATLAS tracking system will be replaced by an all-silicon detector called Inner Tracker (ITk) which should be able to withstand the increased luminosity of 5 x 10{sup 34} cm{sup -2}s{sup -1}. The work presented in this thesis is focused on the ATLAS ITk pixel detector upgrade. Advanced silicon pixel detectors will be an essential part of the ITk pixel detector where they will be used for tracking and vertexing. Characterization of the pixel detectors is one of the required tasks for a successful ATLAS tracker upgrade. Therefore, the work presented in this thesis includes the development of a versatile and modular test system for advanced silicon pixel detectors for the HL-LHC. The performance of the system is verified. Single and quad FE-I4 modules functionalities are characterized with the developed system. The reduction of the material budget of the ATLAS ITk pixel detector is essential for a successful operation at high luminosity. Therefore, a low mass, efficient power distribution scheme to power detector modules (serial powering scheme) is investigated as well in the framework of this thesis. A serially powered pixel detector prototype is built with all the components that are needed for current distribution, data transmission, sensor biasing, bypassing and redundancy in order to prove the feasibility of implementing the serial powering scheme in the ITk. Detailed investigations of the electrical performance of the detector prototype equipped with FE-I4 quad modules are made with the help of the developed readout system.

Development of a serial powering scheme and a versatile characterization system for the ATLAS pixel detector upgrade

International Nuclear Information System (INIS)

Filimonov, Viacheslav

2017-08-01

In order to increase the probability of new discoveries the LHC will be upgraded to the HL-LHC. The upgrade of the ATLAS detector is an essential part of this program. The entire ATLAS tracking system will be replaced by an all-silicon detector called Inner Tracker (ITk) which should be able to withstand the increased luminosity of 5 x 10 34 cm -2 s -1 . The work presented in this thesis is focused on the ATLAS ITk pixel detector upgrade. Advanced silicon pixel detectors will be an essential part of the ITk pixel detector where they will be used for tracking and vertexing. Characterization of the pixel detectors is one of the required tasks for a successful ATLAS tracker upgrade. Therefore, the work presented in this thesis includes the development of a versatile and modular test system for advanced silicon pixel detectors for the HL-LHC. The performance of the system is verified. Single and quad FE-I4 modules functionalities are characterized with the developed system. The reduction of the material budget of the ATLAS ITk pixel detector is essential for a successful operation at high luminosity. Therefore, a low mass, efficient power distribution scheme to power detector modules (serial powering scheme) is investigated as well in the framework of this thesis. A serially powered pixel detector prototype is built with all the components that are needed for current distribution, data transmission, sensor biasing, bypassing and redundancy in order to prove the feasibility of implementing the serial powering scheme in the ITk. Detailed investigations of the electrical performance of the detector prototype equipped with FE-I4 quad modules are made with the help of the developed readout system.

Development of a Timepix3 readout system based on the Merlin readout system

International Nuclear Information System (INIS)

Crevatin, G.; Carrato, S.; Horswell, I.; Omar, D.; Tartoni, N.; Cautero, G.

2015-01-01

Timepix3 chip is a new ASIC specifically designed to readout hybrid pixel detectors. The main purpose of Timepix3 is to measure the time of arrival of events. This characteristic can be exploited very effectively to develop detectors for time resolved experiments at synchrotron radiation facilities. In order to investigate how the ASIC can be applied to synchrotron experiments the Merlin readout system, developed at Diamond for the Medipix3 ASIC, has been adapted to readout the Timepix3 ASIC. The first tests of the ASIC with pulse injection and with alpha particles show that its behaviour is consistent with its nominal characteristics

Results from the NA62 Gigatracker Prototype: A Low-Mass and sub-ns Time Resolution Silicon Pixel Detector

Science.gov (United States)

Fiorini, M.; Rinella, G. Aglieri; Carassiti, V.; Ceccucci, A.; Gil, E. Cortina; Ramusino, A. Cotta; Dellacasa, G.; Garbolino, S.; Jarron, P.; Kaplon, J.; Kluge, A.; Marchetto, F.; Mapelli, A.; Martin, E.; Mazza, G.; Morel, M.; Noy, M.; Nuessle, G.; Petagna, P.; Petrucci, F.; Perktold, L.; Riedler, P.; Rivetti, A.; Statera, M.; Velghe, B.

The Gigatracker (GTK) is a hybrid silicon pixel detector developed for NA62, the experiment aimed at studying ultra-rare kaon decays at the CERN SPS. Three GTK stations will provide precise momentum and angular measurements on every track of the high intensity NA62 hadron beam with a time-tagging resolution of 150 ps. Multiple scattering and hadronic interactions of beam particles in the GTK have to be minimized to keep background events at acceptable levels, hence the total material budget is fixed to 0.5% X0 per station. In addition the calculated fluence for 100 days of running is 2×1014 1 MeV neq/cm2, comparable to the one expected for the inner trackers of LHC detectors in 10 years of operation. These requirements pose challenges for the development of an efficient and low-mass cooling system, to be operated in vacuum, and on the thinning of read-out chips to 100 μm or less. The most challenging requirement is represented by the time resolution, which can be achieved by carefully compensating for the discriminator time-walk. For this purpose, two complementary read-out architectures have been designed and produced as small-scale prototypes: the first is based on the use of a Time-over-Threshold circuit followed by a TDC shared by a group of pixels, while the other uses a constant-fraction discriminator followed by an on-pixel TDC. The readout pixel ASICs are produced in 130 nm IBM CMOS technology and bump-bonded to 200 μm thick silicon sensors. The Gigatracker detector system is described with particular emphasis on recent experimental results obtained from laboratory and beam tests of prototype bump-bonded assemblies, which show a time resolution of less than 200 ps for single hits.

RD Collaboration Proposal: Development of pixel readout integrated circuits for extreme rate and radiation

CERN Document Server

Chistiansen, J (CERN)

2013-01-01

This proposal describes a new RD collaboration to develop the next genrration of hybrid pixel readout chips for use in ATLAS and CMS PHase 2 upgrades. extrapolation of hybrid pixel technology to the HL-LHC presents major challenges on several fronts. Challenges include: smaller pixels to resolve tracks in boosted jets, much higher hit rates (1-2 GHz/cm2 ), unprecedented radiation tolerance (10 MGy), much higher output bandwidth, and large IC format with low power consumption in order to instrument large areas while keeping the material budget low. This collaboration is specifically focused on design of hybrid pixel readout chips, and not on more general chip design or on other aspects of hybrid pixel technology. Participants include 7 institutes on ATLAS and 7 on CMS, plus 2 on both experiments.

Testbeam and laboratory test results of irradiated 3D CMS pixel detectors

Energy Technology Data Exchange (ETDEWEB)

Bubna, Mayur [Purdue University, Department of Physics, West Lafayette, IN 47907-1396 (United States); Purdue University, School of Electrical and Computer Engineering, West Lafayette, IN 47907-1396 (United States); Alagoz, Enver, E-mail: enver.alagoz@cern.ch [Purdue University, Department of Physics, West Lafayette, IN 47907-1396 (United States); Cervantes, Mayra; Krzywda, Alex; Arndt, Kirk [Purdue University, Department of Physics, West Lafayette, IN 47907-1396 (United States); Obertino, Margherita; Solano, Ada [Istituto Nazionale di Fisica Nucleare, Sezione di Torino, 10125 Torino (Italy); Dalla Betta, Gian-Franco [INFN Padova (Gruppo Collegato di Trento) (Italy); Dipartimento di Ingegneria e Scienzadella Informazione, Universitá di Trento, I-38123 Povo di Trento (Italy); Menace, Dario; Moroni, Luigi [Istituto Nazionale di Fisica Nucleare, Sezione di Milano Bicocca (Italy); Universitá degli Studi di Milano Bicocca, 20126 Milano (Italy); Uplegger, Lorenzo; Rivera, Ryan [Fermi National Accelerator Laboratory, Batavia, IL 60510-0500 (United States); Osipenkov, Ilya [Texas A and M University, Department of Physics, College Station, TX 77843-4242 (United States); Andresen, Jeff [Fermi National Accelerator Laboratory, Batavia, IL 60510-0500 (United States); Bolla, Gino; Bortoletto, Daniela [Purdue University, Department of Physics, West Lafayette, IN 47907-1396 (United States); Boscardin, Maurizio [Centro per i Materiali e i Microsistemi Fondazione Bruno Kessler (FBK), Trento, I-38123 Povo di Trento (Italy); Marie Brom, Jean [Strasbourg IPHC, Institut Pluriedisciplinaire Hubert Curien, F-67037 Strasbourg Cedex (France); Brosius, Richard [State University of New York at Buffalo (SUNY), Department of Physics, Buffalo, NY 14260-1500 (United States); Chramowicz, John [Fermi National Accelerator Laboratory, Batavia, IL 60510-0500 (United States); and others

2013-12-21

The CMS silicon pixel detector is the tracking device closest to the LHC p–p collisions, which precisely reconstructs the charged particle trajectories. The planar technology used in the current innermost layer of the pixel detector will reach the design limit for radiation hardness at the end of Phase I upgrade and will need to be replaced before the Phase II upgrade in 2020. Due to its unprecedented performance in harsh radiation environments, 3D silicon technology is under consideration as a possible replacement of planar technology for the High Luminosity-LHC or HL-LHC. 3D silicon detectors are fabricated by the Deep Reactive-Ion-Etching (DRIE) technique which allows p- and n-type electrodes to be processed through the silicon substrate as opposed to being implanted through the silicon surface. The 3D CMS pixel devices presented in this paper were processed at FBK. They were bump bonded to the current CMS pixel readout chip, tested in the laboratory, and testbeams carried out at FNAL with the proton beam of 120 GeV/c. In this paper we present the laboratory and beam test results for the irradiated 3D CMS pixel devices. -- Highlights: •Pre-irradiation and post-irradiation electrical properties of 3D sensors and 3D diodes from various FBK production batches were measured and analyzed. •I–T measurements of gamma irradiated diodes were analyzed to understand leakage current generation mechanism in 3D diodes. •Laboratory measurements: signal to noise ratio and charge collection efficiency of 3D sensors before and after irradiation. •Testbeam measurements: pre- and post-irradiation pixel cell efficiency and position resolution of 3D sensors.

Verification of Dosimetry Measurements with Timepix Pixel Detectors for Space Applications

Science.gov (United States)

Kroupa, M.; Pinsky, L. S.; Idarraga-Munoz, J.; Hoang, S. M.; Semones, E.; Bahadori, A.; Stoffle, N.; Rios, R.; Vykydal, Z.; Jakubek, J.;

GOSSIPO-4: Evaluation of a Novel PLL-Based TDC-Technique for the Readout of GridPix-Detectors

CERN Document Server

Brezina, C; Zappon, F; Van Beuzekom, M; Campbell, M; Desch, K; Van der Graaf, H; Gromov, V; Kluit, R; Llopart, X; Poikela, T; Zivkovic, V

2014-01-01

The direct readout of Micro-Pattern Gaseous Detectors (MPGDs) with bare pixel chips introduces the need for a new generation of readout electronics featuring a high spatial granularity as well as a highly accurate time measurement in each pixel. GOSSIPO-4, fabricated in a 130 nm CMOS technology, is a demonstrator ASIC investigating the potential of a new TDC-concept that is based on a chip-wide 40 MHz clock which is complemented by an additional 640 MHz clock. The latter is created upon demand by local oscillators distributed across the pixel matrix. PLL tuning of the local oscillators allows for automatic compensation of frequency fluctuations caused by process parameter, supply voltage and temperature variations. The developed PLL locks within s and achieves a duty cycle of 50.75% with a time interval error of only 23.4 ps. Mean DNL and INL of the TDC are less than 20% of the time bin size of 1.56 ns under all anticipated conditions.

Firmware development and testing of the ATLAS Pixel Detector / IBL ROD card

International Nuclear Information System (INIS)

Gabrielli, A.; Balbi, G.; Falchieri, D.; Lama, L.; Travaglini, R.; Backhaus, M.; Bindi, M.; Chen, S.P.; Hauck, S.; Hsu, S.C.; Flick, T.; Wensing, M.; Kretz, M.; Kugel, A.

2015-01-01

The ATLAS Experiment is reworking and upgrading systems during the current LHC shut down. In particular, the Pixel detector has inserted an additional inner layer called the Insertable B-Layer (IBL). The Readout-Driver card (ROD), the Back-of-Crate card (BOC), and the S-Link together form the essential frontend data path of the IBL's off-detector DAQ system. The strategy for IBL ROD firmware development was three-fold: keeping as much of the Pixel ROD datapath firmware logic as possible, employing a complete new scheme of steering and calibration firmware, and designing the overall system to prepare for a future unified code version integrating IBL and Pixel layers. Essential features such as data formatting, frontend-specific error handling, and calibration are added to the ROD data path. An IBL DAQ test bench using a realistic front-end chip model was created to serve as an initial framework for full offline electronic system simulation. In this document, major firmware achievements concerning the IBL ROD data path implementation, test on the test bench and ROD prototypes, will be reported. Recent Pixel collaboration efforts focus on finalizing hardware and firmware tests for the IBL. The plan is to approach a complete IBL DAQ hardware-software installation by the end of 2014

Operational experience of the ATLAS Pixel detector

CERN Document Server

Hirschbuehl, D; The ATLAS collaboration

2011-01-01

The ATLAS Pixel Detector is the innermost detector of the ATLAS experiment at the Large Hadron Collider at CERN, providing high-resolution measurements of charged particle tracks in the high radiation environment close to the collision region. This capability is vital for the identification and measurement of proper decay times of long-lived particles such as b-hadrons, and thus vital for the ATLAS physics program. The detector provides hermetic coverage with three cylindrical layers and three layers of forward and backward pixel detectors. It consists of approximately 80 million pixels that are individually read out via chips bump-bonded to 1744 n-in-n silicon substrates. In this talk, results from the successful operation of the Pixel Detector at the LHC will be presented, including monitoring, calibration procedures, timing optimization and detector performance. The detector performance is excellent: 97,5% of the pixels are operational, noise occupancy and hit efficiency exceed the design specification, an...

Operational experience of the ATLAS Pixel Detector

CERN Document Server

Marcisovsky, M; The ATLAS collaboration

2011-01-01

The ATLAS Pixel Detector is the innermost detector of the ATLAS experiment at the Large Hadron Collider at CERN, providing high-resolution measurements of charged particle tracks in the high radiation environment close to the collision region. This capability is vital for the identification and measurement of proper decay times of long-lived particles such as b-hadrons, and thus vital for the ATLAS physics program. The detector provides hermetic coverage with three cylindrical layers and three layers of forward and backward pixel detectors. It consists of approximately 80 million pixels that are individually read out via chips bump-bonded to 1744 n-in-n silicon substrates. In this talk, results from the successful operation of the Pixel Detector at the LHC will be presented, including monitoring, calibration procedures, timing optimization and detector performance. The detector performance is excellent: 97,5% of the pixels are operational, noise occupancy and hit efficiency exceed the design specification, an...

Design and development of the IBL-BOC firmware for the ATLAS Pixel IBL optical datalink system

CERN Document Server

AUTHOR|(INSPIRE)INSPIRE-00356268

The Insertable $b$-Layer (IBL) is the first upgrade of the ATLAS Pixel detector at the LHC. It will be installed in the Pixel detector in 2013. The IBL will use a new sensor and readout technology, therefore the readout components of the current Pixel detector are redesigned for the readout of the IBL. In this diploma thesis the design and development of the firmware for the new IBL Back-of-Crate card (IBL-BOC) are described. The IBL-BOC is located on the off-detector side of the readout and performs the optical-electrical conversion and vice versa for the optical connection to and from the detector. To process the data transmitted to and received from the detector, the IBL-BOC uses multiple Field Programmable Gate Arrays (FPGA). The transmitted signal is a 40~Mb/s BiPhase Mark (BPM) encoded data stream, providing the timing, trigger and control to the detector. The received signal is a 160~Mb/s 8b10b encoded data stream, containing data from the detector. The IBL-BOC encodes and decodes these data streams. T...

Zero suppression logic of the ALICE muon forward tracker pixel chip prototype PIXAM and associated readout electronics development

International Nuclear Information System (INIS)

Flouzat, C.; Değerli, Y.; Guilloux, F.; Orsini, F.; Venault, P.

2015-01-01

In the framework of the ALICE experiment upgrade at HL-LHC, a new forward tracking detector, the Muon Forward Tracker (MFT), is foreseen to overcome the intrinsic limitations of the present Muon Spectrometer and will perform new measurements of general interest for the whole ALICE physics. To fulfill the new detector requirements, CMOS Monolithic Active Pixel Sensors (MAPS) provide an attractive trade-off between readout speed, spatial resolution, radiation hardness, granularity, power consumption and material budget. This technology has been chosen to equip the Muon Forward Tracker and also the vertex detector: the Inner Tracking System (ITS). Since few years, an intensive R and D program has been performed on the design of MAPS in the 0.18 μ m CMOS Image Sensor (CIS) process. In order to avoid pile up effects in the experiment, the classical rolling shutter readout system of MAPS has been improved to overcome the readout speed limitation. A zero suppression algorithm, based on a 3 by 3 cluster finding (position and data), has been chosen for the MFT. This algorithm allows adequate data compression for the sensor. This paper presents the large size prototype PIXAM, which represents 1/3 of the final chip, and will focus specially on the zero suppression block architecture. This chip is designed and under fabrication in the 0.18 μ m CIS process. Finally, the readout electronics principle to send out the compressed data flow is also presented taking into account the cluster occupancy per MFT plane for a single central Pb-Pb collision

Zero suppression logic of the ALICE muon forward tracker pixel chip prototype PIXAM and associated readout electronics development

Science.gov (United States)

Flouzat, C.; Değerli, Y.; Guilloux, F.; Orsini, F.; Venault, P.

2015-05-01

In the framework of the ALICE experiment upgrade at HL-LHC, a new forward tracking detector, the Muon Forward Tracker (MFT), is foreseen to overcome the intrinsic limitations of the present Muon Spectrometer and will perform new measurements of general interest for the whole ALICE physics. To fulfill the new detector requirements, CMOS Monolithic Active Pixel Sensors (MAPS) provide an attractive trade-off between readout speed, spatial resolution, radiation hardness, granularity, power consumption and material budget. This technology has been chosen to equip the Muon Forward Tracker and also the vertex detector: the Inner Tracking System (ITS). Since few years, an intensive R&D program has been performed on the design of MAPS in the 0.18 μ m CMOS Image Sensor (CIS) process. In order to avoid pile up effects in the experiment, the classical rolling shutter readout system of MAPS has been improved to overcome the readout speed limitation. A zero suppression algorithm, based on a 3 by 3 cluster finding (position and data), has been chosen for the MFT. This algorithm allows adequate data compression for the sensor. This paper presents the large size prototype PIXAM, which represents 1/3 of the final chip, and will focus specially on the zero suppression block architecture. This chip is designed and under fabrication in the 0.18 μ m CIS process. Finally, the readout electronics principle to send out the compressed data flow is also presented taking into account the cluster occupancy per MFT plane for a single central Pb-Pb collision.

Development of telescope readout system based on FELIX for testbeam experiments

CERN Document Server

Wu, Weihao; Chen, Hucheng; Chen, Kai; Lacobucci, Giuseppe; Lanni, Francessco; Liu, Hongbin; Barrero Pinto, Mateus Vicente; Xu, Lailin

2017-01-01

The High Voltage CMOS (HV-CMOS) sensors are extensively investigated by the ATLAS collaboration in the High-Luminosity LHC (HL-LHC) upgrade of the Inner Tracker (ITk) detector. A testbeam telescope, based on the ATLAS IBL (Insertable B-Layer) silicon pixel modules, has been built to characterize the HV-CMOS sensor prototypes. The Front-End LInk eXchange (FELIX) system is a new approach to function as the gateway between front-ends and the commodity switched network in the different detectors of the ATLAS upgrade. A FELIX based readout system has been developed for the readout of the testbeam telescope, which includes a Telescope Readout FMC Card as interface between the IBL DC (double-chip) modules and a Xilinx ZC706 evaluation board. The test results show that the FELIX based telescope readout system is capable of sensor calibration and readout of a high-density pixel detector in test beam experiments in an effective way.

Characterisation of the NA62 GigaTracker End of Column Demonstrator Hybrid Pixel Detector

Science.gov (United States)

Noy, M.; Aglieri Rinella, G.; Cotta Ramusino, A.; Fiorini, M.; Jarron, P.; Kaplon, J.; Kluge, A.; Martin, E.; Morel, M.; Perktold, L.; Poltorak, K.; Riedler, P.

2011-11-01

The architecture and characterisation of the NA62 GigaTracker End of Column Demonstrator Hybrid Pixel Detector (HPD) are presented. This detector must perform time stamping to 200 ps (RMS) or better, provide 300 μm pitch position information and operate with a dead time of 1% or less for 800 MHz-1 GHz beam rate. The demonstrator HPD Assembly comprises a readout chip with a test column of 45 pixels, alongside other test structures, bump bonded to a p-in-n detector 200 μm in thickness. Validation of the performance of the HPD and the time-over-threshold timewalk compensation mechanism with both beam particles and a high precision laser system was performed and is presented. Confirmation of better than the required time stamping precision has been demonstrated and subsequent work on the design of the full-scale ASIC, dubbed TDCPix, is underway. An overview of the TDCPix architecure is given.

Development of a cadmium telluride pixel detector for astrophysical applications

Science.gov (United States)

Miyasaka, Hiromasa; Harrison, Fiona A.; Cook, Walter R.; Mao, Peter H.; Rana, Vikram R.; Ishikawa, Shin-Nosuke; Ushio, Masayoshi; Aono, Hiroyuki; Watanabe, Shin; Sato, Goro; Kokubun, Motohide; Takahashi, Tadayuki

2009-08-01

We are developing imaging Cadmium Telluride (CdTe) pixel detectors optimized for astrophysical hard X-ray applications. Our hybrid detector consist of a CdTe crystal 1mm thick and 2cm × 2cm in area with segmented anode contacts directly bonded to a custom low-noise application specific integrated circuit (ASIC). The CdTe sensor, fabricated by ACRORAD (Okinawa, Japan), has Schottky blocking contacts on a 605 micron pitch in a 32 × 32 array, providing low leakage current and enabling readout of the anode side. The detector is bonded using epoxy-gold stud interconnects to a custom low noise, low power ASIC circuit developed by Caltech's Space Radiation Laboratory. We have achieved very good energy resolution over a wide energy range (0.62keV FWHM @ 60keV, 10.8keV FWHM @ 662keV). We observe polarization effects at room temperature, but they are suppressed if we operate the detector at or below 0°C degree. These detectors have potential application for future missions such as the International X-ray Observatory (IXO).

Module and Electronics Developments for the ATLAS ITK Pixel System

CERN Document Server

Rummler, Andr{e}; The ATLAS collaboration

2016-01-01

The entire tracking system of the ATLAS experiment will be replaced during the LHC Phase II shutdown around 2025 by an all-silicon detector (Inner Tracker, ITk). The pixel detector will be composed by the five innermost layers, instrumented with new sensor and readout electronics technologies to improve the tracking performance and cope with the severe HL-LHC environment in terms of occupancy and radiation. The total area of the new pixel system could measure up to 14 m^2, depending on the final layout choice that is expected to take place in early 2017. Different designs of planar, 3D, CMOS sensors are being investigated to identify the optimal technology for the different pixel layers. In parallel sensor-chip interconnection options are evaluated in collaboration with industrial partners to identify reliable technologies when employing 100-150 μm thin chips. While the new read-out chip is being developed by the RD53 Collaboration, the pixel off detector read-out electronics will be implemented in the frame...

Operational Experience with the ATLAS Pixel Detector

CERN Document Server

Djama, Fares; The ATLAS collaboration

2017-01-01

Run 2 of the LHC collider sets new challenges to track and vertex reconstruction because of its higher energy, pileup and luminosity. The ATLAS tracking performance relies critically on the Pixel Detector. Therefore, in view of Run 2, the ATLAS collaboration has constructed the first 4-layer pixel detector in Particle Physics by installing a new pixel layer, called Insertable B-Layer (IBL). Operational experience and performance of the 4-layer Pixel Detector during Run 2 are presented.

Applying Statistical Mechanics to pixel detectors

International Nuclear Information System (INIS)

Pindo, Massimiliano

2002-01-01

Pixel detectors, being made of a large number of active cells of the same kind, can be considered as significant sets to which Statistical Mechanics variables and methods can be applied. By properly redefining well known statistical parameters in order to let them match the ones that actually characterize pixel detectors, an analysis of the way they work can be performed in a totally new perspective. A deeper understanding of pixel detectors is attained, helping in the evaluation and comparison of their intrinsic characteristics and performance

Operational experience with the ATLAS Pixel Detector

CERN Document Server

Ince, T; The ATLAS collaboration

2012-01-01

The ATLAS Pixel Detector is the innermost element of the ATLAS experiment at the Large Hadron Collider at CERN, providing high-resolution measurements of charged particle tracks in the high radiation environment close to the collision region. This capability is vital for the identification and measurement of proper decay times of long-lived particles such as b-hadrons, and thus vital for the ATLAS physics program. The detector provides hermetic coverage with three cylindrical layers and three layers of forward and backward pixel detectors. It consists of approximately 80 million pixels that are individually read out via chips bump-bonded to 1744 n-in-n silicon substrates. In this paper, results from the successful operation of the Pixel Detector at the LHC will be presented, including monitoring, calibration procedures, timing optimization and detector performance. The detector performance is excellent: 96.2% of the pixels are operational, noise occupancy and hit efficiency exceed the design specification, an...

The Design and Implementation in $0.13\\mu m$ CMOS of an Algorithm Permitting Spectroscopic Imaging with High Spatial Resolution for Hybrid Pixel Detectors

CERN Document Server

Ballabriga, Rafael; Vilasís-Cardona, Xavier

2009-01-01

Advances in pixel detector technology are opening up new possibilities in many fields of science. Modern High Energy Physics (HEP) experiments use pixel detectors in tracking systems where excellent spatial resolution, precise timing and high signal-to-noise ratio are required for accurate and clean track reconstruction. Many groups are working worldwide to adapt the hybrid pixel technology to other fields such as medical X-ray radiography, protein structure analysis or neutron imaging. The Medipix3 chip is a 256x256 channel hybrid pixel detector readout chip working in Single Photon Counting Mode. It has been developed with a new front-end architecture aimed at eliminating the spectral distortion produced by charge diffusion in highly segmented semiconductor detectors. In the new architecture neighbouring pixels communicate with one another. Charges can be summed event-by-event and the incoming quantum can be assigned as a single hit to the pixel with the biggest charge deposit. In the case where incoming X-...

Development of the Continuous Acquisition Pixel (CAP) sensor for high luminosity lepton colliders

International Nuclear Information System (INIS)

Varner, G.; Aihara, H.; Barbero, M.; Bozek, A.; Browder, T.; Hazumi, M.; Kennedy, J.; Martin, E.; Mueller, J.; Olsen, S.; Palka, H.; Rosen, M.; Ruckman, L.; Stanic, S.; Trabelsi, K.; Tsuboyama, T.; Uchida, K.; Yang, Q.; Yarema, R.

2006-01-01

A future higher luminosity B-factory detector and concept study detectors for the proposed International Linear Collider require precision vertex reconstruction while coping with high track densities and radiation exposures. Compared with current silicon strip and hybrid pixels, a significant reduction in the overall detector material thickness is needed to achieve the desired vertex resolution. Considerable progress in the development of thin CMOS-based Monolithic Active Pixel Sensors (MAPS) in recent years makes them a viable technology option and feasibility studies are being actively pursued. The most serious concerns are their radiation hardness and their readout speed. To address these, several prototypes denoted as the Continuous Acquisition Pixel (CAP) sensors have been developed and tested. The latest of the CAP sensor prototypes is CAP3, designed in the TSMC 0.25μm process with a 5-deep Correlated Double Sample (CDS) pair pipeline in each pixel. A setup with several CAP3 sensors is under evaluation to assess the performance of a full-scale pixel readout system running at realistic readout speed. Given the similarity in the occupancy numbers and hit throughput requirements, per unit area, between a Belle vertex detector upgradation and the requirements for a future ILC pixel detector, this effort can be considered a small-scale functioning prototype for such a future system. The results and plans for the next stages of R and D towards a full Belle Pixel Vertex Detector (PVD) are presented

CMS Barrel Pixel Detector Overview

CERN Document Server

Kästli, H C; Erdmann, W; Gabathuler, K; Hörmann, C; Horisberger, Roland Paul; König, S; Kotlinski, D; Meier, B; Robmann, P; Rohe, T; Streuli, S

2007-01-01

The pixel detector is the innermost tracking device of the CMS experiment at the LHC. It is built from two independent sub devices, the pixel barrel and the end disks. The barrel consists of three concentric layers around the beam pipe with mean radii of 4.4, 7.3 and 10.2 cm. There are two end disks on each side of the interaction point at 34.5 cm and 46.5 cm. This article gives an overview of the pixel barrel detector, its mechanical support structure, electronics components, services and its expected performance.

Small Pixel Hybrid CMOS X-ray Detectors

Science.gov (United States)

Hull, Samuel; Bray, Evan; Burrows, David N.; Chattopadhyay, Tanmoy; Falcone, Abraham; Kern, Matthew; McQuaide, Maria; Wages, Mitchell

2018-01-01

Concepts for future space-based X-ray observatories call for a large effective area and high angular resolution instrument to enable precision X-ray astronomy at high redshift and low luminosity. Hybrid CMOS detectors are well suited for such high throughput instruments, and the Penn State X-ray detector lab, in collaboration with Teledyne Imaging Sensors, has recently developed new small pixel hybrid CMOS X-ray detectors. These prototype 128x128 pixel devices have 12.5 micron pixel pitch, 200 micron fully depleted depth, and include crosstalk eliminating CTIA amplifiers and in-pixel correlated double sampling (CDS) capability. We report on characteristics of these new detectors, including the best read noise ever measured for an X-ray hybrid CMOS detector, 5.67 e- (RMS).

Tests of the gated mode for Belle II pixel detector

Energy Technology Data Exchange (ETDEWEB)

Prinker, Eduard [Max-Planck-Institute for Physics, Munich (Germany); Collaboration: Belle II-Collaboration

2015-07-01

DEPFET pixel detectors offer intrinsic amplification and very high signal to noise ratio. They form an integral building block for the vertex detector system of the Belle II experiment, which will start data taking in the year 2017 at the SuperKEKB Collider in Japan. A special Test board (Hybrid4) is used, which contains a small version of the DEPFET sensor with a read-out (DCD) and a steering chip (Switcher) attached, both controlled by a field-programmable gate array (FPGA) as the central interface to the computer. In order to keep the luminosity of the collider constant over time, the particle bunch currents have to be topped off by injecting additional bunches at a rate of 50 Hz. The particles in the daughter bunches produce a high rate of background (noisy bunches) for a short period of time, saturating the occupancy of the sensor. Operating the DEPFET sensor in a Gated Mode allows preserving the signals from collisions of normal bunches while protecting the pixels from background signals of the passing noisy bunches. An overview of the Gated Mode and first results is presented.

Design, simulation, fabrication, and preliminary tests of 3D CMS pixel detectors for the super-LHC

Energy Technology Data Exchange (ETDEWEB)

Koybasi, Ozhan; /Purdue U.; Bortoletto, Daniela; /Purdue U.; Hansen, Thor-Erik; /SINTEF, Oslo; Kok, Angela; /SINTEF, Oslo; Hansen, Trond Andreas; /SINTEF, Oslo; Lietaer, Nicolas; /SINTEF, Oslo; Jensen, Geir Uri; /SINTEF, Oslo; Summanwar, Anand; /SINTEF, Oslo; Bolla, Gino; /Purdue U.; Kwan, Simon Wing Lok; /Fermilab

2010-01-01

The Super-LHC upgrade puts strong demands on the radiation hardness of the innermost tracking detectors of the CMS, which cannot be fulfilled with any conventional planar detector design. The so-called 3D detector architectures, which feature columnar electrodes passing through the substrate thickness, are under investigation as a potential solution for the closest operation points to the beams, where the radiation fluence is estimated to reach 10{sup 16} n{sub eq}/cm{sup 2}. Two different 3D detector designs with CMS pixel readout electronics are being developed and evaluated for their advantages and drawbacks. The fabrication of full-3D active edge CMS pixel devices with p-type substrate has been successfully completed at SINTEF. In this paper, we study the expected post-irradiation behaviors of these devices with simulations and, after a brief description of their fabrication, we report the first leakage current measurement results as performed on wafer.

IDeF-X ECLAIRs: A CMOS ASIC for the Readout of CdTe and CdZnTe Detectors for High Resolution Spectroscopy

International Nuclear Information System (INIS)

Gevin, O.; Baron, P.; Coppolani, X.; Delagnes, E.; Lugiez, F.; Daly, F.; Limousin, O.; Meuris, A.; Pinsard, F.; Renaud, D.

2009-01-01

The very last member of the IDeF-X ASIC family is presented: IDeF-X ECLAIRs is a 32-channel front end ASIC designed for the readout of Cadmium Telluride (CdTe) and Cadmium Zinc Telluride (CdZnTe) Detectors. Thanks to its noise performance (Equivalent Noise Charge floor of 33 e - rms) and to its radiation hardened design (Single Event Latch-up Linear Energy Transfer threshold of 56 MeV.cm 2 .mg -1 ), the chip is well suited for soft X-rays energy discrimination and high energy resolution, 'space proof', hard X-ray spectroscopy. We measured an energy low threshold of less than 4 keV with a 10 pF input capacitor and a minimal reachable sensitivity of the Equivalent Noise Charge (ENC) to input capacitance of less than 7e - /pF obtained with a 6 μs peak time. IDeF-X ECLAIRs will be used for the readout of 6400 CdTe Schottky mono-pixel detectors of the 2D coded mask imaging telescope ECLAIRs aboard the SVOM satellite. IDeF-X ECLAIRs (or IDeF-X V2) has also been designed for the readout of a pixelated CdTe detector in the miniature spectro-imager prototype Caliste 256 that is currently foreseen for the high energy detector module of the Simbol-X mission. (authors)

Strip detectors read-out system user's guide

International Nuclear Information System (INIS)

Claus, G.; Dulinski, W.; Lounis, A.

1996-01-01

The Strip Detector Read-out System consists of two VME modules: SDR-Flash and SDR-seq completed by a fast logic SDR-Trig stand alone card. The system is a self-consistent, cost effective and easy use solution for the read-out of analog multiplexed signals coming from some of the front-end electronics chips (Viking/VA chips family, Premus 128 etc...) currently used together with solid (silicon) or gas microstrip detectors. (author)

Design and realization of a fast low noise electronics for a hybrid pixel X-ray detector dedicated to small animal imaging

International Nuclear Information System (INIS)

Chantepie, Benoit

2008-01-01

Since the invention of computerized tomography (CT), charge integration detector were widely employed for X-ray biomedical imaging applications. Nevertheless, other options exist. A new technology of direct detection using semiconductors has been developed for high energy physics instrumentation. This new technology, called hybrid pixel detector, works in photon counting mode and allows for selecting the minimum energy of the counted photons. The imXgam research team at CPPM develops the PIXSCAN demonstrator, a CT-scanner using the hybrid pixel detector XPAD. The aim of this project is to evaluate the improvement on image quality and on dose delivered during X-ray examinations of a small animal. After a first prototype of hybrid pixel detector XPAD1 proving the feasibility of the project, a complete imager XPAD2 was designed and integrated in the PIXSCAN demonstrator. Since then, with the evolution of microelectronic industry, important improvements are conceivable. To reducing the size of pixels and to improving the energy resolution of detectors, a third design XPAD3 was conceived and will be soon integrated in a second generation of PIXSCAN demonstrator. In this project, my thesis's work consisted in taking part to the design of the detector readout electronics, to the characterization of the chips and of the hybrid pixel detectors, and also to the definition of an auto-zeroing architecture for pixels. (author) [fr

Capacitively coupled hybrid pixel assemblies for the CLIC vertex detector

CERN Document Server

AUTHOR|(SzGeCERN)734627; Benoit, Mathieu; Dannheim, Dominik; Dette, Karola; Hynds, Daniel; Kulis, Szymon; Peric, Ivan; Petric, Marko; Redford, Sophie; Sicking, Eva; Valerio, Pierpaolo

2016-01-01

The vertex detector at the proposed CLIC multi-TeV linear e+e- collider must have minimal material content and high spatial resolution, combined with accurate time-stamping to cope with the expected high rate of beam-induced backgrounds. One of the options being considered is the use of active sensors implemented in a commercial high-voltage CMOS process, capacitively coupled to hybrid pixel ASICs. A prototype of such an assembly, using two custom designed chips (CCPDv3 as active sensor glued to a CLICpix readout chip), has been characterised both in the lab and in beam tests at the CERN SPS using 120 GeV/c positively charged hadrons. Results of these characterisation studies are presented both for single and dual amplification stages in the active sensor. Pixel cross-coupling results are also presented, showing the sensitivity to placement precision and planarity of the glue layer.

High rate particle tracking and ultra-fast timing with a thin hybrid silicon pixel detector

Science.gov (United States)

Fiorini, M.; Aglieri Rinella, G.; Carassiti, V.; Ceccucci, A.; Cortina Gil, E.; Cotta Ramusino, A.; Dellacasa, G.; Garbolino, S.; Jarron, P.; Kaplon, J.; Kluge, A.; Marchetto, F.; Mapelli, A.; Martin, E.; Mazza, G.; Morel, M.; Noy, M.; Nuessle, G.; Perktold, L.; Petagna, P.; Petrucci, F.; Poltorak, K.; Riedler, P.; Rivetti, A.; Statera, M.; Velghe, B.

2013-08-01

The Gigatracker (GTK) is a hybrid silicon pixel detector designed for the NA62 experiment at CERN. The beam spectrometer, made of three GTK stations, has to sustain high and non-uniform particle rate (∼ 1 GHz in total) and measure momentum and angles of each beam track with a combined time resolution of 150 ps. In order to reduce multiple scattering and hadronic interactions of beam particles, the material budget of a single GTK station has been fixed to 0.5% X0. The expected fluence for 100 days of running is 2 ×1014 1 MeV neq /cm2, comparable to the one foreseen in the inner trackers of LHC detectors during 10 years of operation. To comply with these requirements, an efficient and very low-mass (< 0.15 %X0) cooling system is being constructed, using a novel microchannel cooling silicon plate. Two complementary read-out architectures have been produced as small-scale prototypes: one is based on a Time-over-Threshold circuit followed by a TDC shared by a group of pixels, while the other makes use of a constant-fraction discriminator followed by an on-pixel TDC. The read-out ASICs are produced in 130 nm IBM CMOS technology and will be thinned down to 100 μm or less. An overview of the Gigatracker detector system will be presented. Experimental results from laboratory and beam tests of prototype bump-bonded assemblies will be described as well. These results show a time resolution of about 170 ps for single hits from minimum ionizing particles, using 200 μm thick silicon sensors.

Characterisation of edgeless technologies for pixellated and strip silicon detectors with a micro-focused X-ray beam

Science.gov (United States)

Bates, R.; Blue, A.; Christophersen, M.; Eklund, L.; Ely, S.; Fadeyev, V.; Gimenez, E.; Kachkanov, V.; Kalliopuska, J.; Macchiolo, A.; Maneuski, D.; Phlips, B. F.; Sadrozinski, H. F.-W.; Stewart, G.; Tartoni, N.; Zain, R. M.

2013-01-01

Reduced edge or ``edgeless'' detector design offers seamless tileability of sensors for a wide range of applications from particle physics to synchrotron and free election laser (FEL) facilities and medical imaging. Combined with through-silicon-via (TSV) technology, this would allow reduced material trackers for particle physics and an increase in the active area for synchrotron and FEL pixel detector systems. In order to quantify the performance of different edgeless fabrication methods, 2 edgeless detectors were characterized at the Diamond Light Source using an 11 μm FWHM 15 keV micro-focused X-ray beam. The devices under test were: a 150 μm thick silicon active edge pixel sensor fabricated at VTT and bump-bonded to a Medipix2 ROIC; and a 300 μm thick silicon strip sensor fabricated at CIS with edge reduction performed by SCIPP and the NRL and wire bonded to an ALiBaVa readout system. Sub-pixel resolution of the 55 μm active edge pixels was achieved. Further scans showed no drop in charge collection recorded between the centre and edge pixels, with a maximum deviation of 5% in charge collection between scanned edge pixels. Scans across the cleaved and standard guard ring edges of the strip detector also show no reduction in charge collection. These results indicate techniques such as the scribe, cleave and passivate (SCP) and active edge processes offer real potential for reduced edge, tiled sensors for imaging detection applications.

Simulation of digital pixel readout chip architectures with the RD53 SystemVerilog-UVM verification environment using Monte Carlo physics data

International Nuclear Information System (INIS)

Conti, E.; Marconi, S.; Christiansen, J.; Placidi, P.; Hemperek, T.

2016-01-01

The simulation and verification framework developed by the RD53 collaboration is a powerful tool for global architecture optimization and design verification of next generation hybrid pixel readout chips. In this paper the framework is used for studying digital pixel chip architectures at behavioral level. This is carried out by simulating a dedicated, highly parameterized pixel chip description, which makes it possible to investigate different grouping strategies between pixels and different latency buffering and arbitration schemes. The pixel hit information used as simulation input can be either generated internally in the framework or imported from external Monte Carlo detector simulation data. The latter have been provided by both the CMS and ATLAS experiments, featuring HL-LHC operating conditions and the specifications related to the Phase 2 upgrade. Pixel regions and double columns were simulated using such Monte Carlo data as inputs: the performance of different latency buffering architectures was compared and the compliance of different link speeds with the expected column data rate was verified

Operation of a GEM-TPC with pixel readout

CERN Document Server

Brezina, C; Kaminski, J; Killenberg, M; Krautscheid, T

2012-01-01

A prototype time projection chamber with 26 cm drift length was operated with a short-spaced triple gas electron multiplier (GEM) stack in a setup triggering on cosmic muon tracks. A small part of the anode plane is read out with a CMOS pixel application-specified integrated circuit (ASIC) named Timepix, which provides ultimate readout granularity. Pixel clusters of charge depositions corresponding to single primary electrons are observed and analyzed to reconstruct charged particle tracks. A dataset of several weeks of cosmic ray data is analyzed. The number of clusters per track length is well described by simulation. The obtained single point resolution approaches 50 m at short drift distances and is well reproduced by a simple model of single-electron diffusion.

Macro Pixel ASIC (MPA): The readout ASIC for the pixel-strip (PS) module of the CMS outer tracker at HL-LHC

CERN Document Server

Ceresa, Davide; Kloukinas, Konstantinos; Jan Kaplon; Bialas, Wojciech; Re, Valerio; Traversi, Gianluca; Gaioni, Luigi; Ratti, Lodovico

2014-01-01

The CMS tracker at HL-LHC is required to provide prompt information on particles with high transverse momentum to the central Level\\,1 trigger. For this purpose, the innermost part of the outer tracker is based on a combination of a pixelated sensor with a short strip sensor, the so-called Pixel-Strip module (PS). The readout of these sensors is carried out by distinct ASICs, the Strip Sensor ASIC (SSA), for the strip layer, and the Macro Pixel ASIC (MPA) for the pixel layer. The processing of the data directly on the front-end module represents a design challenge due to the large data volume (30720\\,pixels and 1920\\,strips per module) and the limited power budget. This is the reason why several studies have been carried out to find the best compromise between ASICs performance and power consumption. This paper describes the current status of the MPA ASIC development where the logic for generating prompt information on particles with high transverse momentum is implemented. An overview of the readout method i...

Test of the TRAPPISTe monolithic detector system

Science.gov (United States)

Soung Yee, L.; Álvarez, P.; Martin, E.; Cortina, E.; Ferrer, C.

2013-12-01

A monolithic pixel detector named TRAPPISTe-2 has been developed in Silicon-on-Insulator (SOI) technology. A p-n junction is implanted in the bottom handle wafer and connected to readout electronics integrated in the top active layer. The two parts are insulated from each other by a buried oxide layer resulting in a monolithic detector. Two small pixel matrices have been fabricated: one containing a 3-transistor readout and a second containing a charge sensitive amplifier readout. These two readout structures have been characterized and the pixel matrices were tested with an infrared laser source. The readout circuits are adversely affected by the backgate effect, which limits the voltage that can be applied to the metal back plane to deplete the sensor, thus narrowing the depletion width of the sensor. Despite the low depletion voltages, the integrated pixel matrices were able to respond to and track a laser source.

Characterization of a pixelated CdTe Timepix detector operated in ToT mode

International Nuclear Information System (INIS)

Billoud, T.; Leroy, C.; Papadatos, C.; Roux, J.S.; Pichotka, M.; Pospisil, S.

2017-01-01

A 1 mm thick CdTe sensor bump-bonded to a Timepix readout chip operating in Time-over-Threshold (ToT) mode has been characterized in view of possible applications in particle and medical physics. The CdTe sensor layer was segmented into 256 × 256 pixels, with a pixel pitch of 55  μm. This CdTe Timepix device, of ohmic contact type, has been exposed to alpha-particles and photons from an 241 Am source, photons from a 137 Cs source, and protons of different energies (0.8–10 MeV) delivered by the University of Montreal Tandem Accelerator. The device was irradiated on the negatively biased backside electrode. An X-ray per-pixel calibration commonly used for this type of detector was done and its accuracy and resolution were assessed and compared to those of a 300  μm thick silicon Timepix device. The electron mobility-lifetime product (μ e τ e ) of CdTe for protons of low energy has been obtained from the Hecht equation. Possible polarization effects have been also investigated. Finally, information about the homogeneity of the detector was obtained from X-ray irradiation.

The Gigatracker: An ultra-fast and low-mass silicon pixel detector for the NA62 experiment

CERN Document Server

Fiorini, M; Morel, M; Petrucci, F; Marchetto, F; Garbolino, S; Cortina, E; Tiuraniemi, S; Ceccucci, A; Martin, E; Riedler, P; Martoiu, S; Ramusino, A C; Rinella, G A; Mapelli, A; Mazza, G; Noy, M; Jarron, P; Nuessle, G; Dellacasa, G; Kluge, A; Rivetti, A; Kaplon, J

2011-01-01

The Gigatracker is a hybrid silicon pixel detector developed to track the highly intense NA62 hadron beam with a time resolution of 150 ps (rms). The beam spectrometer of the experiment is composed of three Gigatracker stations installed in vacuum in order to precisely measure momentum, time and direction of every traversing particle. Precise tracking demands a very low mass of the detector assembly (<0.5\\% X(O) per station) in order to limit multiple scattering and beam hadronic interactions. The high rate and especially the high timing precision requirements are very demanding: two R\\&D options are ongoing and the corresponding prototype read-out chips have been recently designed and produced in 0.13 mu m CMOS technology. One solution makes use of a constant fraction discriminator and on-pixel analogue-based time-to-digital-converter (TDC); the other comprises a delay-locked loop based TDC placed at the end of each pixel column and a time-over-threshold discriminator with time-walk correction techniq...

Cryogenic readout techniques for germanium detectors

Energy Technology Data Exchange (ETDEWEB)

Benato, G. [University of Zurich, (Switzerland); Cattadori, C. [INFN - Milano Bicocca, (Italy); Di Vacri, A. [INFN LNGS, (Italy); Ferri, E. [Universita Milano Bicocca/INFN Milano Bicocca, (Italy); D' Andrea, V.; Macolino, C. [GSSI/INFN LNGS, (Italy); Riboldi, S. [Universita degli Studi di Milano/INFN Milano, (Italy); Salamida, F. [Universita Milano Bicocca/INFN Milano Bicocca, (Italy)

2015-07-01

High Purity Germanium detectors are used in many applications, from nuclear and astro-particle physics, to homeland security or environment protection. Although quite standard configurations are often used, with cryostats, charge sensitive amplifiers and analog or digital acquisition systems all commercially available, it might be the case that a few specific applications, e.g. satellites, portable devices, cryogenic physics experiments, etc. also require the development of a few additional or complementary techniques. An interesting case is for sure GERDA, the Germanium Detector Array experiment, searching for neutrino-less double beta decay of {sup 76}Ge at the Gran Sasso National Laboratory of INFN - Italy. In GERDA the entire detector array, composed of semi-coaxial and BEGe naked crystals, is operated suspended inside a cryostat filled with liquid argon, that acts not only as cooling medium and but also as an active shield, thanks to its scintillation properties. These peculiar circumstances, together with the additional requirement of a very low radioactive background from all the materials adjacent to the detectors, clearly introduce significant constraints on the design of the Ge front-end readout electronics. All the Ge readout solutions developed within the framework of the GERDA collaboration, for both Phase I and Phase II, will be briefly reviewed, with their relative strength and weakness compared together and with respect to ideal Ge readout. Finally, the digital processing techniques developed by the GERDA collaboration for energy estimation of Ge detector signals will be recalled. (authors)

3D, Flash, Induced Current Readout for Silicon Sensors

Energy Technology Data Exchange (ETDEWEB)

Parker, Sherwood I. [Univ. of Hawaii, Honolulu, HI (United States)

2014-06-07

A new method for silicon microstrip and pixel detector readout using (1) 65 nm-technology current amplifers which can, for the first time with silicon microstrop and pixel detectors, have response times far shorter than the charge collection time (2) 3D trench electrodes large enough to subtend a reasonable solid angle at most track locations and so have adequate sensitivity over a substantial volume of pixel, (3) induced signals in addition to, or in place of, collected charge

CMS Forward Pixel Upgrade Electronics and System Testing

CERN Document Server

Weber, Hannsjorg Artur

2016-01-01

This note discusses results of electronics and system testing of the CMS forward pixel (FPIX) detector upgrade for Phase 1. The FPIX detector is comprised of four stand-alone half cylinders, each of which contains frontend readout electronic boards, power regulators, cables and fibers in addition to the pixel modules. All of the components undergo rigorous testing and quality assurance before assembly into the half cylinders. Afterwards, we perform full system tests on the completely assembled half cylinders, including calibrations at final operating temperatures, characterization of the realistic readout chain, and system grounding and noise studies. The results from all these tests are discussed.

Development of a detector control system for the serially powered ATLAS pixel detector at the HL-LHC

Energy Technology Data Exchange (ETDEWEB)

Puellen, Lukas

2015-02-10

In the years around 2020 the LHC will be upgraded to the HL-LHC. In terms of this upgrade, the ATLAS detector will also be upgraded. This also includes the pixel detector, the innermost of the sub-detectors in ATLAS. Thereby the powering concept of the pixel detector will be changed to reduce the material budget of the detector. From individual powering of each detector module, the concept changes to serial powering, where all modules of a powering group are connected in series. This change makes the development of a new detector control system (DCS) mandatory. Therefore, a new concept for the ATLAS pixel DCS is being developed at the University of Wuppertal. This concept is split into three paths: a safety path, a control path, and a diagnostics path. The safety path is a hard wired interlock system. The concept of this system will not differ significantly, compared to the interlock system of the current detector. The diagnostics path is embedded into the optical data read-out of the detector and will be used for detector tuning with high precision and granularity. The control path supervises the detector and provides a user interface to the hardware components. A concept for this path, including a prototype and proof-of-principle studies, has been developed in terms of this thesis. The control path consists of the DCS network, a read-out and controlling topology created by two types of ASICs: the DCS controller and the DCS chip. These ASICs measure and control all values, necessary for a safe detector operation in situ. This reduces the number of required cables and hence the material budget of the system. For the communication between these ASICs, two very fault tolerant bus protocols have been chosen: CAN bus carries data from the DCS computers, outside of the detector, to the DCS controllers at the edge of the pixel detector. For the communication between the DCS controller and the DCS chip, which is located close to each detector module, an enhanced I2C

Development of a detector control system for the serially powered ATLAS pixel detector at the HL-LHC

International Nuclear Information System (INIS)

Puellen, Lukas

2015-01-01

In the years around 2020 the LHC will be upgraded to the HL-LHC. In terms of this upgrade, the ATLAS detector will also be upgraded. This also includes the pixel detector, the innermost of the sub-detectors in ATLAS. Thereby the powering concept of the pixel detector will be changed to reduce the material budget of the detector. From individual powering of each detector module, the concept changes to serial powering, where all modules of a powering group are connected in series. This change makes the development of a new detector control system (DCS) mandatory. Therefore, a new concept for the ATLAS pixel DCS is being developed at the University of Wuppertal. This concept is split into three paths: a safety path, a control path, and a diagnostics path. The safety path is a hard wired interlock system. The concept of this system will not differ significantly, compared to the interlock system of the current detector. The diagnostics path is embedded into the optical data read-out of the detector and will be used for detector tuning with high precision and granularity. The control path supervises the detector and provides a user interface to the hardware components. A concept for this path, including a prototype and proof-of-principle studies, has been developed in terms of this thesis. The control path consists of the DCS network, a read-out and controlling topology created by two types of ASICs: the DCS controller and the DCS chip. These ASICs measure and control all values, necessary for a safe detector operation in situ. This reduces the number of required cables and hence the material budget of the system. For the communication between these ASICs, two very fault tolerant bus protocols have been chosen: CAN bus carries data from the DCS computers, outside of the detector, to the DCS controllers at the edge of the pixel detector. For the communication between the DCS controller and the DCS chip, which is located close to each detector module, an enhanced I2C

Digital readouts for large microwave low-temperature detector arrays

International Nuclear Information System (INIS)

Mazin, Benjamin A.; Day, Peter K.; Irwin, Kent D.; Reintsema, Carl D.; Zmuidzinas, Jonas

2006-01-01

Over the last several years many different types of low-temperature detectors (LTDs) have been developed that use a microwave resonant circuit as part of their readout. These devices include microwave kinetic inductance detectors (MKID), microwave SQUID readouts for transition edge sensors (TES), and NIS bolometers. Current readout techniques for these devices use analog frequency synthesizers and IQ mixers. While these components are available as microwave integrated circuits, one set is required for each resonator. We are exploring a new readout technique for this class of detectors based on a commercial-off-the-shelf technology called software defined radio (SDR). In this method a fast digital to analog (D/A) converter creates as many tones as desired in the available bandwidth. Our prototype system employs a 100MS/s 16-bit D/A to generate an arbitrary number of tones in 50MHz of bandwidth. This signal is then mixed up to the desired detector resonant frequency (∼10GHz), sent through the detector, then mixed back down to baseband. The baseband signal is then digitized with a series of fast analog to digital converters (80MS/s, 14-bit). Next, a numerical mixer in a dedicated integrated circuit or FPGA mixes the resonant frequency of a specified detector to 0Hz, and sends the complex detector output over a computer bus for processing and storage. In this paper we will report on our results in using a prototype system to readout a MKID array, including system noise performance, X-ray pulse response, and cross-talk measurements. We will also discuss how this technique can be scaled to read out many thousands of detectors

Development of a free-running readout ASIC for the PANDA micro vertex detector and investigation of the performance to reconstruct anti pp → anti Ξ"+Ξ"-(1690)

International Nuclear Information System (INIS)

Zambanini, Andre

2015-01-01

The PANDA experiment is a multi-purpose particle detector, investigating hadron physics topics in the strange and charm quark mass regime. PANDA will measure antiproton-proton annihilation reactions at the FAIR complex, which is currently under construction. Caused by the initial reaction, signal and background events are similar to each other. Hence, self-triggering readout electronics is required throughout all sub-detectors. The innermost sub-detector, the Micro Vertex Detector, is based on silicon sensors with pixel and microstrip segmentation. This thesis describes the development of a readout solution (PASTA) for the microstrip sensors and the preparations for a characterization setup to perform laboratory measurements with this readout prototype. Furthermore, an exploratory study on the reconstructability of the reaction anti pp→ anti Ξ"+Ξ"-(1690) with PANDA's software framework is presented.

The IBL Readout System

CERN Document Server

Dopke, J; The ATLAS collaboration; Flick, T; Gabrielli, A; Kugel, A; Maettig, P; Morettini, P; Polini, A; Schroer, N

2010-01-01

The first upgrade for the ATLAS pixel detector will be an additional layer, which is called IBL (Insertable B-Layer). To readout this new layer having new electronics assembled an update of the readout electronics is necessary. The aim is to develop a system which is capable to read out at a higher bandwidth and also compatible with the existing system to be integrated into it. The talk will describe the necessary development to reach a new readout system, concentrating on the requirements of a newly designed Back of Crate card as the optical interface in the counting room.

The IBL Readout System

CERN Document Server

Dopke, J; Flick, T; Gabrielli, A; Kugel, A; Maettig, P; Morettini, P; Polini, A; Schroer, N

2011-01-01

The first upgrade for the ATLAS Pixel Detector will be an additional layer, which is called IBL (Insertable B-Layer). To readout this new layer, having new electronics, an update of the readout electronics is necessary. The aim is to develop a system which is capable to read out at a higher bandwidth, but also compatible with the existing system to be integrated into it. This paper will describe the necessary development to reach a new readout system, concentrating on the requirements of a newly designed Back of Crate card as the optical interface in the counting room.

Response of a hybrid pixel detector (MEDIPIX3) to different radiation sources for medical applications

Energy Technology Data Exchange (ETDEWEB)

Chumacero, E. Miguel; De Celis Alonso, B.; Martínez Hernández, M. I.; Vargas, G.; Moreno Barbosa, E., E-mail: emoreno.emb@gmail.com [Facultad de Ciencias Físico Matemáticas, Benemérita Universidad Autónoma de Puebla, Av. San Claudio y Rio Verde, Puebla (Mexico); Moreno Barbosa, F. [Hospital General del Sur Hospital de la Mujer, Puebla (Mexico)

2014-11-07

The development in semiconductor CMOS technology has enabled the creation of sensitive detectors for a wide range of ionizing radiation. These devices are suitable for photon counting and can be used in imaging and tomography X-ray diagnostics. The Medipix[1] radiation detection system is a hybrid silicon pixel chip developed for particle tracking applications in High Energy Physics. Its exceptional features (high spatial and energy resolution, embedded ultra fast readout, different operation modes, etc.) make the Medipix an attractive device for applications in medical imaging. In this work the energy characterization of a third-generation Medipix chip (Medipix3) coupled to a silicon sensor is presented. We used different radiation sources (strontium 90, iron 55 and americium 241) to obtain the response curve of the hybrid detector as a function of energy. We also studied the contrast of the Medipix as a measure of pixel noise. Finally we studied the response to fluorescence X rays from different target materials (In, Pd and Cd) for the two data acquisition modes of the chip; single pixel mode and charge summing mode.

Status of the CMS Phase 1 Pixel Upgrade

CERN Document Server

Mattig, Stefan

2014-01-01

The silicon pixel detector is the innermost component of the CMS tracking system, providing high precision space point measurements of charged particle trajectories. Before 2018 the instantaneous luminosity of the LHC is expected to reach 2\\,$\\times 10^{34}\\,{\\rm cm^{-2}s^{-1}}$, which will significantly increase the number of interactions per bunch crossing. The current pixel detector of CMS was not designed to work efficiently in such a high occupancy environment and will be degraded by substantial data-loss introduced by buffer filling in the analog Read-Out Chip (ROC) and effects of radiation damage in the sensors, built up over the operational period. To maintain a high tracking efficiency, CMS has planned to replace the current pixel system during ``Phase 1'' (2016/17) by a new lightweight detector, equipped with an additional 4th layer in the barrel, and one additional forward/backward disk. A new digital ROC has been designed, with increased buffers to minimize data-loss, and a digital read-out protoc...

CASAGEM: a readout ASIC for micro pattern gas detectors

International Nuclear Information System (INIS)

He Li; Deng Zhi; Liu Yinong

2012-01-01

A readout ASIC for micro pattern gas detectors has been designed This ASIC integrates 16 channels for anode readout and 1 channel for cathode readout which can make use of the signal of detector's cathode to generate a trigger Every channel can provide amplification and shaping of detector signals. The ASIC can also provide adjustable gain which can be adjusted from 2 mV/fC to 40 mV/fC, and adjustable shaping time which can be adjusted from 20 ns to 80 ns; so this ASIC can be applied to detectors with wide range output signal and different counting rate. The ASIC is fabricated with Chartered 0.35 μm CMOS process More circuit design Details and test results will be presented. (authors)

Pixelized M-pi-n CdTe detector coupled to Medipix2 readout chip

CERN Document Server

Kalliopuska, J; Penttila, R; Andersson, H; Nenonen, S; Gadda, A; Pohjonen, H; Vanttajac, I; Laaksoc, P; Likonen, J

2011-01-01

We have realized a simple method for patterning an M-pi-n CdTe diode with a deeply diffused pn-junction, such as indium anode on CdTe. The method relies on removing the semiconductor material on the anode-side of the diode until the physical junction has been reached. The pixelization of the p-type CdTe diode with an indium anode has been demonstrated by patterning perpendicular trenches with a high precision diamond blade and pulsed laser. Pixelization or microstrip pattering can be done on both sides of the diode, also on the cathode-side to realize double sided detector configuration. The article compares the patterning quality of the diamond blade process, pulsed pico-second and femto-second lasers processes. Leakage currents and inter-strip resistance have been measured and are used as the basis of the comparison. Secondary ion mass spectrometry (SIMS) characterization has been done for a diode to define the pn-junction depth and to see the effect of the thermal loads of the flip-chip bonding process. Th...

Development of radiation hardened pixel sensors for charged particle detection

CERN Document Server

Koziel, Michal

2014-01-01

CMOS Pixel Sensors are being developed since a few years to equip vertex detectors for future high-energy physics experiments with the crucial advantages of a low material budget and low production costs. The features simultaneously required are a short readout time, high granularity and high tolerance to radiation. This thesis mainly focuses on the radiation tolerance studies. To achieve the targeted readout time (tens of microseconds), the sensor pixel readout was organized in parallel columns restricting in addition the readout to pixels that had collected the signal charge. The pixels became then more complex, and consequently more sensitive to radiation. Different in-pixel architectures were studied and it was concluded that the tolerance to ionizing radiation was limited to 300 krad with the 0.35- m fabrication process currently used, while the targeted value was several Mrad. Improving this situation calls for implementation of the sensors in processes with a smaller feature size which naturally imp...

Study of the CMS Phase 1 Pixel Pilot Blade Reconstruction

CERN Document Server

CMS Collaboration

2017-01-01

The silicon pixel detector is the innermost component of the CMS tracking system. It was replaced in March 2017 with an upgraded one, called the Phase 1 upgrade detector. During Long Shutdown 1, a third disk was inserted into the present forward pixel detector with eight prototype blades constructed using a new digital read-out chip architecture and a prototype readout chain. Testing the performance of these pilot modules enabled us to gain experience with the Phase 1 upgrade modules. In this document, the data reconstruction with the pilot system is presented. The hit finding efficiency and residual of these new modules is also shown, and how these observables were used to adjust the timing of the pilot blades.

TID-dependent current measurements of IBL readout chips

Energy Technology Data Exchange (ETDEWEB)

Dette, Karola [TU Dortmund, Experimentelle Physik IV (Germany); CERN (Switzerland); Collaboration: ATLAS Pixel-Collaboration

2016-07-01

The ATLAS detector consists of several subsystems with a hybrid pixel detector as the innermost component of the tracking system. The pixel detector has been composed of three layers of silicon sensor assemblies during the first data taking run of the LHC and has been upgraded with a new 4th layer, the so-called Insertable B-Layer (IBL), in summer 2014. Each silicon sensor of the IBL is connected to a Front End readout chip (FE-I4) via bump bonds. During the first year of data taking an increase of the LV current produced by the readout chips was observed. This increase could be traced back to radiation damage inside the silicon. The dependence of the current on the Total Ionizing Dose (TID) and temperature has been tested with X-ray irradiations and will be presented in this talk.

A new design of the gaseous imaging detector: Micro Pixel Chamber

CERN Document Server

Ochi, A; Koishi, S; Tanimori, T; Nagae, T; Nakamura, M

2001-01-01

The novel gaseous detector 'Micro Pixel Chamber (Micro PIC)' has been developed for X-ray, gamma-ray and charged particle imaging. This detector consists of double sided printing circuit board (PCB). The stable operation of Micro PIC is realized by thick substrate and wide anode strips. One of the most outstanding feature is the process of production and the cost. The base technology of producing Micro PIC is same as producing PCB, then detector with large detection area (more than 10 cmx10 cm) can be made by present technology. Our first tests were performed using a 3 cmx3 cm detection area with a readout of 0.4 mm pitch. The gas gain and stability were measured in these tests. The gas gain of 10 sup 4 was obtained using argon ethane (8:2) gas mixture. Also, there was no discharge between anodes and cathodes in the gain of 10 sup 3 during two days of continuous operation. Although some discharges occurred in the higher gain (approximately 10 sup 4), no critical damage on the detector was found.

Pixel Detectors for Particle Physics and Imaging Applications

CERN Document Server

Wermes, N

2003-01-01

Semiconductor pixel detectors offer features for the detection of radiation which are interesting for particle physics detectors as well as for imaging e.g. in biomedical applications (radiography, autoradiography, protein crystallography) or in Xray astronomy. At the present time hybrid pixel detectors are technologically mastered to a large extent and large scale particle detectors are being built. Although the physical requirements are often quite different, imaging applications are emerging and interesting prototype results are available. Monolithic detectors, however, offer interesting features for both fields in future applications. The state of development of hybrid and monolithic pixel detectors, excluding CCDs, and their different suitability for particle detection and imaging, is reviewed.

A low mass pixel detector upgrade for CMS

CERN Document Server

Kästli, H C

2010-01-01

The CMS pixel detector has been designed for a peak luminosity of 10^34cm-2s-1 and a total dose corresponding to 2 years of LHC operation at a radius of 4 cm from the interaction region. Parts of the pixel detector will have to be replaced until 2015. The detector performance will be degraded for two reasons: radiation damage of the innermost layers and the planned increase of the LHC peak luminosity by a factor of 2-3. Based on the experience in planning, constructing and commissioning of the present pixel detector, we intend to upgrade the whole pixel detector in 2015. The main focus is on lowering the material budget and adding more tracking points. We will present the design of a new low mass pixel system consisting of 4 barrel layers and 3 end cap disks on each side. The design comprises of thin detector modules and a lightweight mechanical support structure using CO2 cooling. In addition, large efforts have been made to move material from the services out of the tracking region.

Radiation hardness of CMS pixel barrel modules

CERN Document Server

Rohe, T; Erdmann, W; Kästli, H C; Khalatyan, S; Meier, B; Radicci, V; Sibille, J

2010-01-01

Pixel detectors are used in the innermost part of the multi purpose experiments at LHC and are therefore exposed to the highest fluences of ionising radiation, which in this part of the detectors consists mainly of charged pions. The radiation hardness of all detector components has thoroughly been tested up to the fluences expected at the LHC. In case of an LHC upgrade, the fluence will be much higher and it is not yet clear how long the present pixel modules will stay operative in such a harsh environment. The aim of this study was to establish such a limit as a benchmark for other possible detector concepts considered for the upgrade. As the sensors and the readout chip are the parts most sensitive to radiation damage, samples consisting of a small pixel sensor bump-bonded to a CMS-readout chip (PSI46V2.1) have been irradiated with positive 200 MeV pions at PSI up to 6E14 Neq and with 21 GeV protons at CERN up to 5E15 Neq. After irradiation the response of the system to beta particles from a Sr-90 source w...

Design and realization of a fast low noise electronics for a hybrid pixel X-ray detector dedicated to small animal imaging

International Nuclear Information System (INIS)

Chantepie, B.

2008-12-01

Since the invention of computerized tomography (CT), charge integration detector were widely employed for X-ray biomedical imaging applications. Nevertheless, other options exist. A new technology of direct detection using semiconductors has been developed for high energy physics instrumentation. This new technology, called hybrid pixel detector, works in photon counting mode and allows for selecting the minimum energy of the counted photons. The ImXgam research team at CPPM develops the PIXSCAN demonstrator, a CT-scanner using the hybrid pixel detector XPAD. The aim of this project is to evaluate the improvement in image quality and in dose delivered during X-ray examinations of a small animal. After a first prototype of a hybrid pixel detector XPAD1 proving the feasibility of the project, a complete imager XPAD2 was designed and integrated in the PIXSCAN demonstrator. Since then, with the evolution of microelectronic industry, important improvements are conceivable. To reducing the size of pixels and to improving the energy resolution of detectors, a third design XPAD3 was conceived and will be soon integrated in a second generation of PIXSCAN demonstrator. In this project, my thesis work consisted in taking part to the design of the detector readout electronics, to the characterization of the chips and of the hybrid pixel detectors, and also to the definition of a auto-zeroing architecture for pixels. The first and second chapters present X-ray medical imaging and particle detection with semi-conductors and its modelling. The third chapter deals with the specifications of electronic circuits for imaging applications first for analog pixels then for digital pixels and describes the general architecture of the integrated circuits. The validation tests are presented in the fourth chapter while the last chapter gives an account of expected changes in pixel electronics

A Medipix2-based imaging system for digital mammography with silicon pixel detectors

CERN Document Server

Bisogni, M G; Fantacci, M E; Mettivier, G; Montesi, M C; Novelli, M; Quattrocchi, M; Rosso, V; Russo, P; Stefanini, A

2004-01-01

In this paper we present the first tests of a digital imaging system based on a silicon pixel detector bump-bonded to an integrated circuit operating in single photon counting mode. The X-rays sensor is a 300 mu m thick silicon, 14 by 14 mm/sup 2/, upon which a matrix of 256 * 256 pixels has been built. The read-out chip, named MEDIPIX2, has been developed at CERN within the MEDIPIX2 Collaboration and it is composed by a matrix of 256 * 256 cells, 55 * 55 mu m/sup 2/. The spatial resolution properties of the system have been assessed by measuring the square wave resolution function (SWRF) and first images of a standard mammographic phantom were acquired using a radiographic tube in the clinical irradiation condition. (5 refs).

Charge amplitude distribution of the Gossip gaseous pixel detector

Energy Technology Data Exchange (ETDEWEB)

Blanco Carballo, V.M. [Twente University, Enschede (Netherlands); Chefdeville, M. [NIKHEF, P.B. 41882, 1009DB Amsterdam (Netherlands); Colas, P.; Giomataris, Y. [Saclay, Gif-sur-Yvette (France); Graaf, H. van der; Gromov, V. [NIKHEF, P.B. 41882, 1009DB Amsterdam (Netherlands); Hartjes, F. [NIKHEF, P.B. 41882, 1009DB Amsterdam (Netherlands)], E-mail: F.Hartjes@nikhef.nl; Kluit, R.; Koffeman, E. [NIKHEF, P.B. 41882, 1009DB Amsterdam (Netherlands); Salm, C.; Schmitz, J.; Smits, S.M. [Twente University, Enschede (Netherlands); Timmermans, J.; Visschers, J.L. [NIKHEF, P.B. 41882, 1009DB Amsterdam (Netherlands)

2007-12-11

The Gossip gaseous pixel detector is being developed for the detection of charged particles in extreme high radiation environments as foreseen close to the interaction point of the proposed super LHC. The detecting medium is a thin layer of gas. Because of the low density of this medium, only a few primary electron/ion pairs are created by the traversing particle. To get a detectable signal, the electrons drift towards a perforated metal foil (Micromegas) whereafter they are multiplied in a gas avalanche to provide a detectable signal. The gas avalanche occurs in the high field between the Micromegas and the pixel readout chip (ROC). Compared to a silicon pixel detector, Gossip features a low material budget and a low cooling power. An experiment using X-rays has indicated a possible high radiation tolerance exceeding 10{sup 16} hadrons/cm{sup 2}. The amplified charge signal has a broad amplitude distribution due to the limited statistics of the primary ionization and the statistical variation of the gas amplification. Therefore, some degree of inefficiency is inevitable. This study presents experimental results on the charge amplitude distribution for CO{sub 2}/DME (dimethyl-ether) and Ar/iC{sub 4}H{sub 10} mixtures. The measured curves were fitted with the outcome of a theoretical model. In the model, the physical Landau distribution is approximated by a Poisson distribution that is convoluted with the variation of the gas gain and the electronic noise. The value for the fraction of pedestal events is used for a direct calculation of the cluster density. For some gases, the measured cluster density is considerably lower than given in literature.

Charge amplitude distribution of the Gossip gaseous pixel detector

Science.gov (United States)

Blanco Carballo, V. M.; Chefdeville, M.; Colas, P.; Giomataris, Y.; van der Graaf, H.; Gromov, V.; Hartjes, F.; Kluit, R.; Koffeman, E.; Salm, C.; Schmitz, J.; Smits, S. M.; Timmermans, J.; Visschers, J. L.

2007-12-01

The Gossip gaseous pixel detector is being developed for the detection of charged particles in extreme high radiation environments as foreseen close to the interaction point of the proposed super LHC. The detecting medium is a thin layer of gas. Because of the low density of this medium, only a few primary electron/ion pairs are created by the traversing particle. To get a detectable signal, the electrons drift towards a perforated metal foil (Micromegas) whereafter they are multiplied in a gas avalanche to provide a detectable signal. The gas avalanche occurs in the high field between the Micromegas and the pixel readout chip (ROC). Compared to a silicon pixel detector, Gossip features a low material budget and a low cooling power. An experiment using X-rays has indicated a possible high radiation tolerance exceeding 10 16 hadrons/cm 2. The amplified charge signal has a broad amplitude distribution due to the limited statistics of the primary ionization and the statistical variation of the gas amplification. Therefore, some degree of inefficiency is inevitable. This study presents experimental results on the charge amplitude distribution for CO 2/DME (dimethyl-ether) and Ar/iC 4H 10 mixtures. The measured curves were fitted with the outcome of a theoretical model. In the model, the physical Landau distribution is approximated by a Poisson distribution that is convoluted with the variation of the gas gain and the electronic noise. The value for the fraction of pedestal events is used for a direct calculation of the cluster density. For some gases, the measured cluster density is considerably lower than given in literature.

Charge amplitude distribution of the Gossip gaseous pixel detector

International Nuclear Information System (INIS)

Blanco Carballo, V.M.; Chefdeville, M.; Colas, P.; Giomataris, Y.; Graaf, H. van der; Gromov, V.; Hartjes, F.; Kluit, R.; Koffeman, E.; Salm, C.; Schmitz, J.; Smits, S.M.; Timmermans, J.; Visschers, J.L.

2007-01-01

The Gossip gaseous pixel detector is being developed for the detection of charged particles in extreme high radiation environments as foreseen close to the interaction point of the proposed super LHC. The detecting medium is a thin layer of gas. Because of the low density of this medium, only a few primary electron/ion pairs are created by the traversing particle. To get a detectable signal, the electrons drift towards a perforated metal foil (Micromegas) whereafter they are multiplied in a gas avalanche to provide a detectable signal. The gas avalanche occurs in the high field between the Micromegas and the pixel readout chip (ROC). Compared to a silicon pixel detector, Gossip features a low material budget and a low cooling power. An experiment using X-rays has indicated a possible high radiation tolerance exceeding 10 16 hadrons/cm 2 . The amplified charge signal has a broad amplitude distribution due to the limited statistics of the primary ionization and the statistical variation of the gas amplification. Therefore, some degree of inefficiency is inevitable. This study presents experimental results on the charge amplitude distribution for CO 2 /DME (dimethyl-ether) and Ar/iC 4 H 10 mixtures. The measured curves were fitted with the outcome of a theoretical model. In the model, the physical Landau distribution is approximated by a Poisson distribution that is convoluted with the variation of the gas gain and the electronic noise. The value for the fraction of pedestal events is used for a direct calculation of the cluster density. For some gases, the measured cluster density is considerably lower than given in literature

Development of an Indium Bump Bond Process for Silicon Pixel Detectors at PSI

CERN Document Server

Brönnimann, C; Gobrecht, J; Heising, S; Horisberger, M; Horisberger, R P; Kästli, H C; Lehmann, J; Rohe, T; Streuli, S; Broennimann, Ch.

2006-01-01

The hybrid pixel detectors used in the high energy physics experiments currently under construction use a three dimensional connection technique, the so-called bump bonding. As the pitch below 100um, required in these applications, cannot be fullfilled with standard industrial processes (e.g. the IBM C4 process), an in-house bump bond process using reflown indium bumps was developed at PSI as part of the R&D for the CMS-pixel detector. The bump deposition on the sensor is performed in two subsequent lift-off steps. As the first photolithographic step a thin under bump metalization (UBM) is sputtered onto bump pads. It is wettable by indium and defines the diameter of the bump. The indium is evaporated via a second photolithographic step with larger openings and is reflown afterwards. The height of the balls is defined by the volume of the indium. On the readout chip only one photolithographic step is carried out to deposit the UBM and a thin indium layer for better adhesion. After mating both parts a seco...

Module and electronics developments for the ATLAS ITK pixel system

CERN Document Server

Nellist, Clara; The ATLAS collaboration

2016-01-01

Summary ATLAS is preparing for an extensive modification of its detector in the course of the planned HL‐ LHC accelerator upgrade around 2025 which includes a replacement of the entire tracking system by an all‐silicon detector (Inner Tracker, ITk). A revised trigger and data taking system is foreseen with triggers expected at lowest level at an average rate of 1 MHz. The five innermost layers of ITk will comprise of a pixel detector built of new sensor and readout electronics technologies to improve the tracking performance and cope with the severe HL‐LHC environment in terms of occupancy and radiation. The total area of the new pixel system could measure up to 14 m2, depending on the final layout choice that is expected to take place in early 2017. A new on‐detector readout chip is designed in the context of the RD53 collaboration in 65 nm CMOS technology. This paper will present the on‐going R&D within the ATLAS ITK project towards the new pixel modules and the off‐detector electronics. Pla...

Development of a free-running readout ASIC for the PANDA micro vertex detector and investigation of the performance to reconstruct anti pp → anti Ξ{sup +}Ξ{sup -}(1690)

Energy Technology Data Exchange (ETDEWEB)

Zambanini, Andre

2015-12-08

The PANDA experiment is a multi-purpose particle detector, investigating hadron physics topics in the strange and charm quark mass regime. PANDA will measure antiproton-proton annihilation reactions at the FAIR complex, which is currently under construction. Caused by the initial reaction, signal and background events are similar to each other. Hence, self-triggering readout electronics is required throughout all sub-detectors. The innermost sub-detector, the Micro Vertex Detector, is based on silicon sensors with pixel and microstrip segmentation. This thesis describes the development of a readout solution (PASTA) for the microstrip sensors and the preparations for a characterization setup to perform laboratory measurements with this readout prototype. Furthermore, an exploratory study on the reconstructability of the reaction anti pp→ anti Ξ{sup +}Ξ{sup -}(1690) with PANDA's software framework is presented.

Detectors in 3D available for assessment

CERN Document Server

Re, Valerio

2014-01-01

This deliverable reports on 3D devices resulting from the vertical integration of pixel sensors and readout electronics. After 3D integration steps such as etching of through-silicon vias and backside metallization of readout integrated circuits, ASICs and sensors are interconnected to form a 3D pixel detector. Various 3D detectors have been devised in AIDA WP3 and their status and performance is assessed here.

PantherPix hybrid pixel γ-ray detector for radio-therapeutic applications

Science.gov (United States)

Neue, G.; Benka, T.; Havránek, M.; Hejtmánek, M.; Janoška, Z.; Kafka, V.; Korchak, O.; Lednický, D.; Marčišovská, M.; Marčišovský, M.; Popule, J.; Şmarhák, J.; Şvihra, P.; Tomášek, L.; Vrba, V.; Konček, O.; Semmler, M.

2018-02-01

This work focuses on the design of a semiconductor pixelated γ-ray camera with a pixel size of 1 mm2. The cost of semiconductor manufacturing is mainly driven by economies of scale, which makes silicon the cheapest semiconductor material due to its widespread utilization. The energy of γ-photons used in radiation therapy are in a range, in which the dominant interaction mechanism is Compton scattering in every conceivable sensor material. Since the Compton scattering cross section is linearly dependent upon Z, it is less rewarding to utilize high Z sensor materials, than it is in the case of X-ray detectors (X-rays interact also via the photoelectric effect whose cross section scales proportional to Zn, where n is ≈ 4,5). For the stated reasons it was decided to use the low Z material silicon (Z = 14) despite its worse detection efficiency. The proposed detector is designed as a portal detector to be used in radiation cancer therapy. The purpose of the detector is to ensure correct patient alignment, spatial dose monitoring and to provide the feedback necessary for an emergency shutdown should the spatial dose rate profile deviate from the treatment plan. Radiation therapy equipment is complex and thus failure prone and the consequences of malfunction are often life threatening. High spatial resolution and high detection efficiency are not a high design priority. The detector design priorities are focused up on radiation hardness, robustness and the ability to cover a large area cost efficiently. The quintessential idea of the PanterPix detector exploits the relaxed spatial resolution requirement to achieve the stated goals. The detector is composed of submodules, each submodule consisting of a Si sensor with an array of fully depleted detection diodes and 8 miniature custom design readout ASICs collecting and measuring the minuscule charge packets generated due to ionization in the PN junctions.

Operational Experience with the ATLAS Pixel Detector at LHC

CERN Document Server

Keil, M

2013-01-01

The ATLAS Pixel Detector is the innermost detector of the ATLAS experiment at the Large Hadron Collider at CERN, providing high-resolution measurements of charged particle tracks in the high radiation environment close to the collision region. This capability is vital for the identification and measurement of proper decay times of long-lived particles such as b-hadrons, and thus crucial for the ATLAS physics program. The detector provides hermetic coverage with three cylindrical layers and three layers of forward and backward pixel detectors. It consists of approximately 80 million pixels that are individually read out via front-end chips bump-bonded to 1744 n-on-n silicon substrates. In this paper results from the successful operation of the Pixel Detector at the LHC will be presented, including calibration procedures, detector performance and measurements of radiation damage. The detector performance is excellent: more than 95% of the pixels are operational, noise occupancy and hit efficiency exceed the des...

Simulation of the Dynamic Inefficiency of the CMS Pixel Detector

CERN Document Server

INSPIRE-00380273

2015-05-07

The Pixel Detector is the innermost part of the CMS Tracker. It therefore has to prevail in the harshest environment in terms of particle fluence and radiation. There are several mechanisms that may decrease the efficiency of the detector. These are mainly caused by data acquisition (DAQ) problems and/or Single Event Upsets (SEU). Any remaining efficiency loss is referred to as the dynamic inefficiency. It is caused by various mechanisms inside the Readout Chip (ROC) and depends strongly on the data occupancy. In the 2012 data, at high values of instantaneous luminosity the inefficiency reached 2\\% (in the region closest to the interaction point) which is not negligible. In the 2015 run higher instantaneous luminosity is expected, which will result in lower efficiencies; therefore this effect needs to be understood and simulated. A data-driven method has been developed to simulate dynamic inefficiency, which has been shown to successfully simulate the effects.

From vertex detectors to inner trackers with CMOS pixel sensors

CERN Document Server

Besson, A.

2017-01-01

The use of CMOS Pixel Sensors (CPS) for high resolution and low material vertex detectors has been validated with the 2014 and 2015 physics runs of the STAR-PXL detector at RHIC/BNL. This opens the door to the use of CPS for inner tracking devices, with 10-100 times larger sensitive area, which require therefore a sensor design privileging power saving, response uniformity and robustness. The 350 nm CMOS technology used for the STAR-PXL sensors was considered as too poorly suited to upcoming applications like the upgraded ALICE Inner Tracking System (ITS), which requires sensors with one order of magnitude improvement on readout speed and improved radiation tolerance. This triggered the exploration of a deeper sub-micron CMOS technology, Tower-Jazz 180 nm, for the design of a CPS well adapted for the new ALICE-ITS running conditions. This paper reports the R&D results for the conception of a CPS well adapted for the ALICE-ITS.

An Efficient, FPGA-Based, Cluster Detection Algorithm Implementation for a Strip Detector Readout System in a Time Projection Chamber Polarimeter

Science.gov (United States)

Gregory, Kyle J.; Hill, Joanne E. (Editor); Black, J. Kevin; Baumgartner, Wayne H.; Jahoda, Keith

2016-01-01

A fundamental challenge in a spaceborne application of a gas-based Time Projection Chamber (TPC) for observation of X-ray polarization is handling the large amount of data collected. The TPC polarimeter described uses the APV-25 Application Specific Integrated Circuit (ASIC) to readout a strip detector. Two dimensional photoelectron track images are created with a time projection technique and used to determine the polarization of the incident X-rays. The detector produces a 128x30 pixel image per photon interaction with each pixel registering 12 bits of collected charge. This creates challenging requirements for data storage and downlink bandwidth with only a modest incidence of photons and can have a significant impact on the overall mission cost. An approach is described for locating and isolating the photoelectron track within the detector image, yielding a much smaller data product, typically between 8x8 pixels and 20x20 pixels. This approach is implemented using a Microsemi RT-ProASIC3-3000 Field-Programmable Gate Array (FPGA), clocked at 20 MHz and utilizing 10.7k logic gates (14% of FPGA), 20 Block RAMs (17% of FPGA), and no external RAM. Results will be presented, demonstrating successful photoelectron track cluster detection with minimal impact to detector dead-time.

High-voltage pixel sensors for ATLAS upgrade

Energy Technology Data Exchange (ETDEWEB)

Perić, I., E-mail: ivan.peric@ziti.uni-heidelberg.de [Heidelberg University, Institute of Computer Engineering, Mannheim (Germany); Kreidl, C.; Fischer, P. [Heidelberg University, Institute of Computer Engineering, Mannheim (Germany); Bompard, F.; Breugnon, P.; Clemens, J.-C.; Fougeron, D.; Liu, J.; Pangaud, P.; Rozanov, A.; Barbero, M. [CPPM, Marseille (France); Feigl, S.; Capeans, M.; Ferrere, D.; Pernegger, H.; Ristic, B. [CERN, Geneve (Switzerland); Muenstermann, D.; Gonzalez Sevilla, S.; La Rosa, A.; Miucci, A. [University of Geneve (Switzerland); and others

2014-11-21

The high-voltage (HV-) CMOS pixel sensors offer several good properties: a fast charge collection by drift, the possibility to implement relatively complex CMOS in-pixel electronics and the compatibility with commercial processes. The sensor element is a deep n-well diode in a p-type substrate. The n-well contains CMOS pixel electronics. The main charge collection mechanism is drift in a shallow, high field region, which leads to a fast charge collection and a high radiation tolerance. We are currently evaluating the use of the high-voltage detectors implemented in 180 nm HV-CMOS technology for the high-luminosity ATLAS upgrade. Our approach is replacing the existing pixel and strip sensors with the CMOS sensors while keeping the presently used readout ASICs. By intelligence we mean the ability of the sensor to recognize a particle hit and generate the address information. In this way we could benefit from the advantages of the HV sensor technology such as lower cost, lower mass, lower operating voltage, smaller pitch, smaller clusters at high incidence angles. Additionally we expect to achieve a radiation hardness necessary for ATLAS upgrade. In order to test the concept, we have designed two HV-CMOS prototypes that can be readout in two ways: using pixel and strip readout chips. In the case of the pixel readout, the connection between HV-CMOS sensor and the readout ASIC can be established capacitively.

ATLAS Phase-II upgrade pixel data transmission development

CERN Document Server

AUTHOR|(INSPIRE)INSPIRE-00111400; The ATLAS collaboration

2017-01-01

The current tracking system of the ATLAS experiment will be replaced by an all-silicon detector (ITk) in the course of the planned HL-LHC accelerator upgrade around 2025. The readout of the ITk pixel system will be most challenging in terms of data rate and readout speed. Simulation of the on-detector electronics indicates that the planned trigger rate of 1 MHz will require readout speeds up to 5.12 Gb/s per data link. The high-radiation environment precludes optical data transmission, so the first part of the data transmission has to be implemented electrically, over a 6-m distance between the pixel modules and the optical transceivers. Several high-speed electrical data transmission solutions involving small-gauge wire cables or flexible circuits have been prototyped and characterized. A combination of carefully-selected physical layers and aggressive signal conditioning are required to achieve the proposed specifications.

Development of n+-in-p planar pixel quadsensor flip-chipped with FE-I4 readout ASICs

International Nuclear Information System (INIS)

Unno, Y.; Hanagaki, K.; Hori, R.; Ikegami, Y.; Nakamura, K.; Takubo, Y.; Kamada, S.; Yamamura, K.; Yamamoto, H.; Takashima, R.; Tojo, J.; Kono, T.; Nagai, R.; Saito, S.; Sugibayashi, K.; Hirose, M.; Jinnouchi, O.; Sato, S.; Sawai, H.; Hara, K.

2017-01-01

We have developed flip-chip modules applicable to the pixel detector for the HL-LHC. New radiation-tolerant n + -in-p planar pixel sensors of a size of four FE-I4 application-specific integrated circuits (ASICs) are laid out in a 6-in wafer. Variation in readout connection for the pixels at the boundary of ASICs is implemented in the design of quadsensors. Bump bonding technology is developed for four ASICs onto one quadsensor. Both sensors and ASICs are thinned to 150 μm before bump bonding, and are held flat with vacuum chucks. Using lead-free SnAg solder bumps, we encounter deficiency with large areas of disconnected bumps after thermal stress treatment, including irradiation. Surface oxidation of the solder bumps is identified as a critical source of this deficiency after bump bonding trials, using SnAg bumps with solder flux, indium bumps, and SnAg bumps with a newly-introduced hydrogen-reflow process. With hydrogen-reflow, we establish flux-less bump bonding technology with SnAg bumps, appropriate for mass production of the flip-chip modules with thin sensors and thin ASICs.

Detector performance of the ALICE silicon pixel detector

CERN Document Server

Cavicchioli, C

2011-01-01

The ALICE Silicon Pixel Detector (SPD) forms the two innermost layers of the ALICE Inner Tracking System (ITS). It consists of two barrel layers of hybrid silicon pixel detectors at radii of 39 and 76 mm. The physics targets of the ALICE experiment require that the material budget of the SPD is kept within approximate to 1\\%X(0) per layer. This has set some stringent constraints on the design and construction of the SPD. A unique feature of the ALICE SPD is that it is capable of providing a prompt trigger signal, called Fast-OR, which contributes to the L0 trigger decision. The pixel trigger system allows to apply a set of algorithms for the trigger selection, and its output is sent to the Central Trigger Processor (CTP). The detector has been installed in the experiment in summer 2007. During the first injection tests in June 2008 the SPD was able to record the very first sign of life of the LHC by registering secondary particles from the beam dumped upstream the ALICE experiment. In the following months the...

Upgrade of ATLAS ITk Pixel Detector

CERN Document Server

Huegging, Fabian; The ATLAS collaboration

2017-01-01

The high luminosity upgrade of the LHC (HL-LHC) in 2026 will provide new challenges to the ATLAS tracker. The current inner detector will be replaced with an entirely-silicon inner tracker (ITk) which will consist of a five barrel layer Pixel detector surrounded by a four barrel layer Strip detector. The expected high radiation levels are requiring the development of upgraded silicon sensors as well as new a front-end chip. The dense tracking environment will require finer granularity detectors and low mass global and local support structures. The data rates will require new technologies for high bandwidth data transmission and handling. The current status of the ITk ATLAS Pixel detector developments as well as different layout options will be reviewed.

GOSSIP: A vertex detector combining a thin gas layer as signal generator with a CMOS readout pixel array

Energy Technology Data Exchange (ETDEWEB)

Campbell, M. [CERN/MediPix Consortium, Geneva (Switzerland); Heijne, E.H.M. [CERN/MediPix Consortium, Geneva (Switzerland); Llopart, X. [CERN/MediPix Consortium, Geneva (Switzerland); Colas, P. [DAPNIA, CEA Saclay, 91191 Gif sur Yvette Cedex (France); Giganon, A. [DAPNIA, CEA Saclay, 91191 Gif sur Yvette Cedex (France); Giomataris, Y. [DAPNIA, CEA Saclay, 91191 Gif sur Yvette Cedex (France); Chefdeville, M. [NIKHEF, Amsterdam (Netherlands); Colijn, A.P. [NIKHEF, Amsterdam (Netherlands); Fornaini, A. [NIKHEF, Amsterdam (Netherlands); Graaf, H. van der [NIKHEF, Amsterdam (Netherlands)]. E-mail: vdgraaf@nikhef.nl; Kluit, P. [NIKHEF, Amsterdam (Netherlands); Timmermans, J. [NIKHEF, Amsterdam (Netherlands); Visschers, J.L. [NIKHEF, Amsterdam (Netherlands); Schmitz, J. [University of Twente/MESA (Netherlands)

2006-05-01

A small TPC has been read out by means of a Medipix2 chip as direct anode. A Micromegas foil was placed 50{mu}m above the chip, and electron multiplication occurred in the gap. With a He/isobutane 80/20 mixture, gas multiplication factors up to tens of thousands were achieved, resulting in an efficiency for detecting single electrons of better than 90%. With this new readout technology for gas-filled detectors we recorded many image frames containing 2D images with tracks from cosmic muons. Along these tracks, electron clusters were observed, as well as {delta}-rays. With a gas layer thickness of only 1mm, the device could be applied as vertex detector, outperforming all Si-based detectors.

GOSSIP: A vertex detector combining a thin gas layer as signal generator with a CMOS readout pixel array

International Nuclear Information System (INIS)

Campbell, M.; Heijne, E.H.M.; Llopart, X.; Colas, P.; Giganon, A.; Giomataris, Y.; Chefdeville, M.; Colijn, A.P.; Fornaini, A.; Graaf, H. van der; Kluit, P.; Timmermans, J.; Visschers, J.L.; Schmitz, J.

2006-01-01

A small TPC has been read out by means of a Medipix2 chip as direct anode. A Micromegas foil was placed 50μm above the chip, and electron multiplication occurred in the gap. With a He/isobutane 80/20 mixture, gas multiplication factors up to tens of thousands were achieved, resulting in an efficiency for detecting single electrons of better than 90%. With this new readout technology for gas-filled detectors we recorded many image frames containing 2D images with tracks from cosmic muons. Along these tracks, electron clusters were observed, as well as δ-rays. With a gas layer thickness of only 1mm, the device could be applied as vertex detector, outperforming all Si-based detectors

GOSSIP: A vertex detector combining a thin gas layer as signal generator with a CMOS readout pixel array

Science.gov (United States)

Campbell, M.; Heijne, E. H. M.; Llopart, X.; Colas, P.; Giganon, A.; Giomataris, Y.; Chefdeville, M.; Colijn, A. P.; Fornaini, A.; van der Graaf, H.; Kluit, P.; Timmermans, J.; Visschers, J. L.; Schmitz, J.

2006-05-01

A small TPC has been read out by means of a Medipix2 chip as direct anode. A Micromegas foil was placed 50 μm above the chip, and electron multiplication occurred in the gap. With a He/isobutane 80/20 mixture, gas multiplication factors up to tens of thousands were achieved, resulting in an efficiency for detecting single electrons of better than 90%. With this new readout technology for gas-filled detectors we recorded many image frames containing 2D images with tracks from cosmic muons. Along these tracks, electron clusters were observed, as well as δ-rays. With a gas layer thickness of only 1 mm, the device could be applied as vertex detector, outperforming all Si-based detectors.

Studies on irradiated pixel detectors for the ATLAS IBL and HL-LHC upgrade

Energy Technology Data Exchange (ETDEWEB)

Gallrapp, Christian

2015-07-01

The constant demand for higher luminosity in high energy physics is the reason for the continuous effort to adapt the accelerators and the experiments. The upgrade program for the experiments and the accelerators at CERN already includes several expansion stages of the Large Hadron Collider (LHC) which will increase the luminosity and the energy of the accelerator. Simultaneously the LHC experiments prepare the individual sub-detectors for the increasing demands in the coming years. Especially the tracking detectors have to cope with fluence levels unprecedented for high energy physics experiments. Correspondingly to the fluence increases the impact of the radiation damage which reduces the life time of the detectors by decreasing the detector performance and efficiency. To cope with this effect new and more radiation hard detector concepts become necessary to extend the life time. This work concentrates on the impact of radiation damage on the pixel sensor technologies to be used in the next upgrade of the ATLAS Pixel Detector as well as for applications in the ATLAS Experiment at HL-LHC conditions. The sensors considered in this work include various designs based on silicon and diamond as sensor material. The investigated designs include a planar silicon pixel design currently used in the ATLAS Experiment as well as a 3D pixel design which uses electrodes penetrating the entire sensor material. The diamond designs implement electrodes similar to the design used by the planar technology with diamond sensors made out of single- and poly-crystalline material. To investigate the sensor properties characterization tests are performed before and after irradiation with protons or neutrons. The measurements are used to determine the interaction between the read-out electronics and the sensors to ensure the signal transfer after irradiation. Further tests focus on the sensor performance itself which includes the analysis of the leakage current behavior and the charge

Studies on irradiated pixel detectors for the ATLAS IBL and HL-LHC upgrade

International Nuclear Information System (INIS)

Gallrapp, Christian

2015-01-01

The constant demand for higher luminosity in high energy physics is the reason for the continuous effort to adapt the accelerators and the experiments. The upgrade program for the experiments and the accelerators at CERN already includes several expansion stages of the Large Hadron Collider (LHC) which will increase the luminosity and the energy of the accelerator. Simultaneously the LHC experiments prepare the individual sub-detectors for the increasing demands in the coming years. Especially the tracking detectors have to cope with fluence levels unprecedented for high energy physics experiments. Correspondingly to the fluence increases the impact of the radiation damage which reduces the life time of the detectors by decreasing the detector performance and efficiency. To cope with this effect new and more radiation hard detector concepts become necessary to extend the life time. This work concentrates on the impact of radiation damage on the pixel sensor technologies to be used in the next upgrade of the ATLAS Pixel Detector as well as for applications in the ATLAS Experiment at HL-LHC conditions. The sensors considered in this work include various designs based on silicon and diamond as sensor material. The investigated designs include a planar silicon pixel design currently used in the ATLAS Experiment as well as a 3D pixel design which uses electrodes penetrating the entire sensor material. The diamond designs implement electrodes similar to the design used by the planar technology with diamond sensors made out of single- and poly-crystalline material. To investigate the sensor properties characterization tests are performed before and after irradiation with protons or neutrons. The measurements are used to determine the interaction between the read-out electronics and the sensors to ensure the signal transfer after irradiation. Further tests focus on the sensor performance itself which includes the analysis of the leakage current behavior and the charge

Module and Electronics Developments for the ATLAS ITK Pixel System

CERN Document Server

Nellist, Clara; The ATLAS collaboration

2016-01-01

ATLAS is preparing for an extensive modification of its detector in the course of the planned HL-LHC accelerator upgrade around 2025 which includes a replacement of the entire tracking system by an all-silicon detector (Inner Tracker, ITk). The five innermost layers of ITk will comprise of a pixel detector built of new sensor and readout electronics technologies to improve the tracking performance and cope with the severe HL-LHC environment in terms of occupancy and radiation. The total area of the new pixel system could measure up to 14 m$^{2}$, depending on the final layout choice that is expected to take place in early 2017. An intense R\\&D activity is taking place in the field of planar, 3D, CMOS sensors to identify the optimal technology for the different pixel layers. In parallel various sensor-chip interconnection options are explored to identify reliable technologies when employing 100-150~$\\mu$m thin chips. While the new read-out chip is being developed by the RD53 Collaboration, the pixel off de...

Novel silicon stripixel detector: concept, simulation, design, and fabrication

International Nuclear Information System (INIS)

Li, Z.

2004-01-01

A novel detector concept has been developed in this work that has the necessary properties to provide two-dimensional (2-D) position sensitivity with a moderate number of readout electronic channels and single-sided detector fabrication process. The concept is based on interleaved pixel electrodes arranged in a projective X-Y readout, which makes possible position encoding with minimum number of channels. In further discussions, we refer to this concept as 'stripixel' detector, as it combines the 2-D position resolution of a pixel electrode geometry with the simplicity of the projective readout of a double-sided strip detector. For DC coupled detectors with large pitches (>20 μm), individual pixels are divided into X- and Y-cell that can be interleaved by many different schemes that ensure the charge sharing between them. This type of stripixel detectors is called interleaved stripixel detectors. When the detector pitch goes down (<20 μm), the X and Y-pixel may not have to be interleaved, and they can be connected in an alternating way to X-Y strip readout. This type of stripixel detectors is called alternating stripixel detectors (ASD). For ASD, a position resolution better than 1 μm in two dimensions can be achieved by determining the centroid of the charge collected on pixel electrodes with a granularity in the range of 5-6 μm. For AC coupled detectors, no interleaving scheme may be needed, and there may be no limit on the pitch size, i.e. it may go from pitches in the order of microns, to hundreds of microns or even mm's. This electrode granularity does not pose difficult demands on the lithography and the fabrication technology. This novel detector concept can be applied to any semiconductor detectors/sensors, such as Si, Ge, GaAs, SiC, diamond, etc

Development of an X-ray imaging system with SOI pixel detectors