A pixel read-out architecture implementing a two-stage token ring, zero suppression and compression

Energy Technology Data Exchange (ETDEWEB)

Heuvelmans, S; Boerrigter, M, E-mail: sander.heuvelmans@bruco.nl [Bruco integrated circuits BV, Oostermaat 2, 7623 CS (Netherlands)

2011-01-15

Increasing luminosity in high energy physics experiments leads to new challenges in the design of data acquisition systems for pixel detectors. With the upgrade of the LHCb experiment, the data processing will be changed; hit data from every collision will be transported off the pixel chip, without any trigger selection. A read-out architecture is proposed which is able to obtain low hit data loss on limited silicon area by using the logic beneath the pixels as a data buffer. Zero suppression and redundancy reduction ensure that the data rate off chip is minimized. A C++ model has been created for simulation of functionality and data loss, and for system development. A VHDL implementation has been derived from this model.

Readout architecture for the Pixel-Strip module of the CMS Outer Tracker Phase-2 upgrade

CERN Document Server

Caratelli, Alessandro; Jan Kaplon; Kloukinas, Konstantinos; Simone Scarfi

2017-01-01

The Outer Tracker upgrade of the Compact Muon Solenoid (CMS) experiment at CERN introduces new challenges for the front-end readout electronics. In particular, the capability of identifying particles with high transverse momentum using modules with double sensor layers requires high speed real time interconnects between readout ASICs. The Pixel-Strip module combines a pixelated silicon layer with a silicon-strip layer. Consequently, it needs two different readout ASICs, namely the Short Strip ASIC (SSA) for the strip sensor and the Macro Pixel ASIC (MPA) for the pixelated sensor. The architecture proposed in this paper allows for a total data flow between readout ASICs of $\\sim$100\\,Gbps and reduces the output data flow from 1.3\\,Tbps to 30\\,Gbps per module while limiting the total power density to below 100\\,mW/cm$^2$. In addition a system-level simulation framework of all the front-end readout ASICs is developed in order to verify the data processing algorithm and the hardware implementation allowing mult...

Pixel Experiments

DEFF Research Database (Denmark)

Petersen, Kjell Yngve; Søndergaard, Karin; Augustesen, Christina

2015-01-01

Pixel Experiments The term pixel is traditionally defined as any of the minute elements that together constitute a larger context or image. A pixel has its own form and is the smallest unit seen within a larger structure. In working with the potentials of LED technology in architectural lighting...... lighting design in practice, one quickly experiences and realises that there are untapped potentials in the attributes of LED technology. In this research, speculative studies have been made working with the attributes of LEDs in architectural contexts, with the ambition to ascertain new strategies...... for using LED lighting in lighting design practice. The speculative experiments that have been set-up have aimed to clarify the variables that can be used as parameters in the design of lighting applications; including, for example, the structuring and software control of light. The experiments also...

Design and Verification of Digital Architecture of 65K Pixel Readout Chip for High-Energy Physics

CERN Document Server

Poikela, Tuomas; Paakkulainen, J

2010-01-01

The feasibility to design and implement a front-end ASIC for the upgrade of the VELO detector of LHCb experiment at CERN using IBM’s 130nm standard CMOS process and a standard cell library is studied in this thesis. The proposed architecture is a design to cope with high data rates and continuous data taking. The architecture is designed to operate without any external trigger to record every hit signal the ASIC receives from a sensor chip, and then to transmit the information to the next level of electronics, for example to FPGAs. This thesis focuses on design, implementation and functional verification of the digital electronics of the active pixel area. The area requirements are dictated by the geometry of pixels (55$mu$m x 55$mu$m), power requirements (20W/module) by restricted cooling capabilities of the module consisting of 10 chips and output bandwidth requirements by data rate (< 10 Gbit/s) produced by a particle flux passing through the chip. The design work was carried out using transaction...

Matrix light and pixel light: optical system architecture and requirements to the light source

Science.gov (United States)

Spinger, Benno; Timinger, Andreas L.

2015-09-01

Modern Automotive headlamps enable improved functionality for more driving comfort and safety. Matrix or Pixel light headlamps are not restricted to either pure low beam functionality or pure high beam. Light in direction of oncoming traffic is selectively switched of, potential hazard can be marked via an isolated beam and the illumination on the road can even follow a bend. The optical architectures that enable these advanced functionalities are diverse. Electromechanical shutters and lens units moved by electric motors were the first ways to realize these systems. Switching multiple LED light sources is a more elegant and mechanically robust solution. While many basic functionalities can already be realized with a limited number of LEDs, an increasing number of pixels will lead to more driving comfort and better visibility. The required optical system needs not only to generate a desired beam distribution with a high angular dynamic, but also needs to guarantee minimal stray light and cross talk between the different pixels. The direct projection of the LED array via a lens is a simple but not very efficient optical system. We discuss different optical elements for pre-collimating the light with minimal cross talk and improved contrast between neighboring pixels. Depending on the selected optical system, we derive the basic light source requirements: luminance, surface area, contrast, flux and color homogeneity.

Depleted fully monolithic CMOS pixel detectors using a column based readout architecture for the ATLAS Inner Tracker upgrade

Science.gov (United States)

Wang, T.; Barbero, M.; Berdalovic, I.; Bespin, C.; Bhat, S.; Breugnon, P.; Caicedo, I.; Cardella, R.; Chen, Z.; Degerli, Y.; Egidos, N.; Godiot, S.; Guilloux, F.; Hemperek, T.; Hirono, T.; Krüger, H.; Kugathasan, T.; Hügging, F.; Marin Tobon, C. A.; Moustakas, K.; Pangaud, P.; Schwemling, P.; Pernegger, H.; Pohl, D.-L.; Rozanov, A.; Rymaszewski, P.; Snoeys, W.; Wermes, N.

2018-03-01

Depleted monolithic active pixel sensors (DMAPS), which exploit high voltage and/or high resistivity add-ons of modern CMOS technologies to achieve substantial depletion in the sensing volume, have proven to have high radiation tolerance towards the requirements of ATLAS in the high-luminosity LHC era. DMAPS integrating fast readout architectures are currently being developed as promising candidates for the outer pixel layers of the future ATLAS Inner Tracker, which will be installed during the phase II upgrade of ATLAS around year 2025. In this work, two DMAPS prototype designs, named LF-Monopix and TJ-Monopix, are presented. LF-Monopix was fabricated in the LFoundry 150 nm CMOS technology, and TJ-Monopix has been designed in the TowerJazz 180 nm CMOS technology. Both chips employ the same readout architecture, i.e. the column drain architecture, whereas different sensor implementation concepts are pursued. The paper makes a joint description of the two prototypes, so that their technical differences and challenges can be addressed in direct comparison. First measurement results for LF-Monopix will also be shown, demonstrating for the first time a fully functional fast readout DMAPS prototype implemented in the LFoundry technology.

Pixel Experiments

DEFF Research Database (Denmark)

Petersen, Kjell Yngve; Søndergaard, Karin; Augustesen, Christina

2015-01-01

Pixel Experiments The term pixel is traditionally defined as any of the minute elements that together constitute a larger context or image. A pixel has its own form and is the smallest unit seen within a larger structure. In working with the potentials of LED technology in architectural lighting...... for using LED lighting in lighting design practice. The speculative experiments that have been set-up have aimed to clarify the variables that can be used as parameters in the design of lighting applications; including, for example, the structuring and software control of light. The experiments also...... elucidate and exemplify already well-known problems in relation to the experience of vertical and horizontal lighting. Pixel Experiments exist as a synergy between speculative test setups and lighting design in practice. This book is one of four books that is published in connection with the research...

Development of pixel detectors for SSC vertex tracking

International Nuclear Information System (INIS)

Kramer, G.; Shapiro, S.L.; Arens, J.F.; Jernigan, J.G.; Skubic, P.

1991-04-01

A description of hybrid PIN diode arrays and a readout architecture for their use as a vertex detector in the SSC environment is presented. Test results obtained with arrays having 256 x 256 pixels, each 30 μm square, are also presented. The development of a custom readout for the SSC will be discussed, which supports a mechanism for time stamping hit pixels, storing their xy coordinates, and storing the analog information within the pixel. The peripheral logic located on the array, permits the selection of those pixels containing interesting data and their coordinates to be selectively read out. This same logic also resolves ambiguous pixel ghost locations and controls the pixel neighbor read out necessary to achieve high spatial resolution. The thermal design of the vertex tracker and the proposed signal processing architecture will also be discussed. 5 refs., 13 figs., 3 tabs

Radiant exchange in partially specular architectural environments

Science.gov (United States)

Beamer, C. Walter; Muehleisen, Ralph T.

2003-10-01

The radiant exchange method, also known as radiosity, was originally developed for thermal radiative heat transfer applications. Later it was used to model architectural lighting systems, and more recently it has been extended to model acoustic systems. While there are subtle differences in these applications, the basic method is based on solving a system of energy balance equations, and it is best applied to spaces with mainly diffuse reflecting surfaces. The obvious drawback to this method is that it is based around the assumption that all surfaces in the system are diffuse reflectors. Because almost all architectural systems have at least some partially specular reflecting surfaces in the system it is important to extend the radiant exchange method to deal with this type of surface reflection. [Work supported by NSF.

Evaluation of a single-pixel one-transistor active pixel sensor for fingerprint imaging

Science.gov (United States)

Xu, Man; Ou, Hai; Chen, Jun; Wang, Kai

2015-08-01

Since it first appeared in iPhone 5S in 2013, fingerprint identification (ID) has rapidly gained popularity among consumers. Current fingerprint-enabled smartphones unanimously consists of a discrete sensor to perform fingerprint ID. This architecture not only incurs higher material and manufacturing cost, but also provides only static identification and limited authentication. Hence as the demand for a thinner, lighter, and more secure handset grows, we propose a novel pixel architecture that is a photosensitive device embedded in a display pixel and detects the reflected light from the finger touch for high resolution, high fidelity and dynamic biometrics. To this purpose, an amorphous silicon (a-Si:H) dual-gate photo TFT working in both fingerprint-imaging mode and display-driving mode will be developed.

Application-specific architectures of CMOS monolithic active pixel sensors

Energy Technology Data Exchange (ETDEWEB)

Szelezniak, Michal [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France)]. E-mail: michal.szelezniak@ires.in2p3.fr; Besson, Auguste [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); Claus, Gilles; Colledani, Claude; [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); Degerli, Yavuz [CEA Saclay, DAPNIA, Gif-sur-Yvette Cedex (France); Deptuch, Grzegorz [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); Deveaux, Michael [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); GSI, Planckstrasse 1, Darmstadt 64291 (Germany); Dorokhov, Andrei [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); Dulinski, Wojciech [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); Fourches, Nicolas [CEA Saclay, DAPNIA, Gif-sur-Yvette Cedex (France); Goffe, Mathieu [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); Grandjean, Damien; Guilloux, Fabrice [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); Heini, Sebastien [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France)]|[GSI, Planckstrasse 1, Darmstadt 64291 (Germany); Himmi, Abdelkader [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); Hu, Christine [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); Jaaskelainen, Kimmo; Li, Yan; Lutz, Pierre; Orsini, Fabienne [CEA Saclay, DAPNIA, Gif-sur-Yvette Cedex (France); Pellicioli, Michel; Shabetai, Alexandre; Valin, Isabelle; Winter, Marc [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France)

2006-11-30

Several development directions intended to adapt and optimize monolithic active pixel sensors for specific applications are presented in this work. The first example, compatible with the STAR microvertex upgrade, is based on a simple two-transistor pixel circuitry. It is suited for a long integration time, room-temperature operation and minimum power dissipation. In another approach for this application, a specific readout method is proposed, allowing optimization of the integration time independently of the full frame-readout time. The circuit consists of an in-pixel front-end voltage amplifier, with a gain on the order of five, followed by two analog memory cells. The extended version of this scheme, based on the implementation of more memory cells per pixel, is the solution considered for the outer layers of a microvertex detector at the international linear collider. For the two innermost layers, a circuit allowing fast frame scans together with on-line, on-chip data sparsification is proposed. The first results of this prototype demonstrate that the fixed pattern dispersion is reduced below a noise level of 15 e{sup -}, allowing the use of a single comparator or a low-resolution ADC per pixel column. A common element for most of the mentioned readout schemes is a low-noise, low power consumption, layout efficient in-pixel amplifier. A review of possible solutions for this element together with some experimental results is presented.

Development of a customized SSC pixel detector readout for vertex tracking

International Nuclear Information System (INIS)

Barkan, O.; Atlas, E.L.; Marking, W.L.; Worley, S.; Yacoub, G.Y.; Kramer, G.; Arens, J.F.; Jernigan, J.G.; Shapiro, S.L.; Nygren, D.; Spieler, H.; Wright, M.

1990-01-01

The authors describe the readout architecture and progress to date in the development of hybrid PIN diode arrays for use as vertex detectors in the SSC environment. The architecture supports a self-timed mechanism for time stamping hit pixels, storing their xy coordinates and later selectively reading out only those pixels containing interesting data along with their coordinates. The peripheral logic resolves ambiguous pixel ghost locations and controls pixel neighbor readout to achieve high spatial resolution. A test lot containing 64 x 32 pixel arrays has been processed and is currently being tested. Each pixel contains 23 transistors and six capacitors consuming an area of 50μm by 150μm and dissipating about 20μW of power

Monte Carlo based performance assessment of different animal PET architectures using pixellated CZT detectors

International Nuclear Information System (INIS)

Visvikis, D.; Lefevre, T.; Lamare, F.; Kontaxakis, G.; Santos, A.; Darambara, D.

2006-01-01

The majority of present position emission tomography (PET) animal systems are based on the coupling of high-density scintillators and light detectors. A disadvantage of these detector configurations is the compromise between image resolution, sensitivity and energy resolution. In addition, current combined imaging devices are based on simply placing back-to-back and in axial alignment different apparatus without any significant level of software or hardware integration. The use of semiconductor CdZnTe (CZT) detectors is a promising alternative to scintillators for gamma-ray imaging systems. At the same time CZT detectors have the potential properties necessary for the construction of a truly integrated imaging device (PET/SPECT/CT). The aims of this study was to assess the performance of different small animal PET scanner architectures based on CZT pixellated detectors and compare their performance with that of state of the art existing PET animal scanners. Different scanner architectures were modelled using GATE (Geant4 Application for Tomographic Emission). Particular scanner design characteristics included an overall cylindrical scanner format of 8 and 24 cm in axial and transaxial field of view, respectively, and a temporal coincidence window of 8 ns. Different individual detector modules were investigated, considering pixel pitch down to 0.625 mm and detector thickness from 1 to 5 mm. Modified NEMA NU2-2001 protocols were used in order to simulate performance based on mouse, rat and monkey imaging conditions. These protocols allowed us to directly compare the performance of the proposed geometries with the latest generation of current small animal systems. Results attained demonstrate the potential for higher NECR with CZT based scanners in comparison to scintillator based animal systems

Random On-Board Pixel Sampling (ROPS) X-Ray Camera

Energy Technology Data Exchange (ETDEWEB)

Wang, Zhehui [Los Alamos; Iaroshenko, O. [Los Alamos; Li, S. [Los Alamos; Liu, T. [Fermilab; Parab, N. [Argonne (main); Chen, W. W. [Purdue U.; Chu, P. [Los Alamos; Kenyon, G. [Los Alamos; Lipton, R. [Fermilab; Sun, K.-X. [Nevada U., Las Vegas

2017-09-25

Recent advances in compressed sensing theory and algorithms offer new possibilities for high-speed X-ray camera design. In many CMOS cameras, each pixel has an independent on-board circuit that includes an amplifier, noise rejection, signal shaper, an analog-to-digital converter (ADC), and optional in-pixel storage. When X-ray images are sparse, i.e., when one of the following cases is true: (a.) The number of pixels with true X-ray hits is much smaller than the total number of pixels; (b.) The X-ray information is redundant; or (c.) Some prior knowledge about the X-ray images exists, sparse sampling may be allowed. Here we first illustrate the feasibility of random on-board pixel sampling (ROPS) using an existing set of X-ray images, followed by a discussion about signal to noise as a function of pixel size. Next, we describe a possible circuit architecture to achieve random pixel access and in-pixel storage. The combination of a multilayer architecture, sparse on-chip sampling, and computational image techniques, is expected to facilitate the development and applications of high-speed X-ray camera technology.

Small-Scale Readout System Prototype for the STAR PIXEL Detector

International Nuclear Information System (INIS)

Szelezniak, Michal; Anderssen, Eric; Greiner, Leo; Matis, Howard; Ritter, Hans Georg; Stezelberger, Thorsten; Sun, Xiangming; Thomas, James; Vu, Chinh; Wieman, Howard

2008-01-01

Development and prototyping efforts directed towards construction of a new vertex detector for the STAR experiment at the RHIC accelerator at BNL are presented. This new detector will extend the physics range of STAR by allowing for precision measurements of yields and spectra of particles containing heavy quarks. The innermost central part of the new detector is a high resolution pixel-type detector (PIXEL). PIXEL requirements are discussed as well as a conceptual mechanical design, a sensor development path, and a detector readout architecture. Selected progress with sensor prototypes dedicated to the PIXEL detector is summarized and the approach chosen for the readout system architecture validated in tests of hardware prototypes is discussed

CMS Pixel Detector Upgrade

CERN Document Server

INSPIRE-00038772

2011-01-01

The present Compact Muon Solenoid silicon pixel tracking system has been designed for a peak luminosity of 1034cm-2s-1 and total dose corresponding to two years of the Large Hadron Collider (LHC) operation. With the steady increase of the luminosity expected at the LHC, a new pixel detector with four barrel layers and three endcap disks is being designed. We will present the key points of the design: the new geometry, which minimizes the material budget and increases the tracking points, and the development of a fast digital readout architecture, which ensures readout efficiency even at high rate. The expected performances for tracking and vertexing of the new pixel detector are also addressed.

CMOS VLSI Active-Pixel Sensor for Tracking

Science.gov (United States)

Pain, Bedabrata; Sun, Chao; Yang, Guang; Heynssens, Julie

2004-01-01

An architecture for a proposed active-pixel sensor (APS) and a design to implement the architecture in a complementary metal oxide semiconductor (CMOS) very-large-scale integrated (VLSI) circuit provide for some advanced features that are expected to be especially desirable for tracking pointlike features of stars. The architecture would also make this APS suitable for robotic- vision and general pointing and tracking applications. CMOS imagers in general are well suited for pointing and tracking because they can be configured for random access to selected pixels and to provide readout from windows of interest within their fields of view. However, until now, the architectures of CMOS imagers have not supported multiwindow operation or low-noise data collection. Moreover, smearing and motion artifacts in collected images have made prior CMOS imagers unsuitable for tracking applications. The proposed CMOS imager (see figure) would include an array of 1,024 by 1,024 pixels containing high-performance photodiode-based APS circuitry. The pixel pitch would be 9 m. The operations of the pixel circuits would be sequenced and otherwise controlled by an on-chip timing and control block, which would enable the collection of image data, during a single frame period, from either the full frame (that is, all 1,024 1,024 pixels) or from within as many as 8 different arbitrarily placed windows as large as 8 by 8 pixels each. A typical prior CMOS APS operates in a row-at-a-time ( grolling-shutter h) readout mode, which gives rise to exposure skew. In contrast, the proposed APS would operate in a sample-first/readlater mode, suppressing rolling-shutter effects. In this mode, the analog readout signals from the pixels corresponding to the windows of the interest (which windows, in the star-tracking application, would presumably contain guide stars) would be sampled rapidly by routing them through a programmable diagonal switch array to an on-chip parallel analog memory array. The

FE-I4 Chip Development for Upgraded ATLAS Pixel Detector at LHC

CERN Document Server

Barbero, M; The ATLAS collaboration

2010-01-01

A new ATLAS pixel chip FE-I4 has been developed for use in upgraded LHC luminosity environments, including the near-term Insertable B-Layer upgrade. FE-I4 is designed in a 130 nm CMOS technology, presenting advantages in terms of radiation tolerance and digital logic density compared to the 0.25 μm CMOS technology used for the current ATLAS pixel IC, FE-I3. FE-I4 architecture is based on an array of 80×336 pixels, each 50×250 μm2, consisting of analog and digital sections. The analog pixel section is designed for low power consumption and compatibility to several sensor candidates. It is based on a two-stage architecture with a pre-amp AC-coupled to a second stage of amplification. It features leakage current compensation circuitry, local 4-bit pre-amp feedback tuning and a discriminator locally adjusted through 5 configuration bits. The digital architecture is based on a 4-pixel unit called Pixel Digital Region (PDR) allowing for local storage of hits in 5-deep data buffers at pixel level for the duratio...

Architecture and characterization of the P4DI CMOS hybrid pixel sensor

International Nuclear Information System (INIS)

Chatzistratis, D.; Theodoratos, G.; Kazas, I.; Loukas, D.; Zervakis, E.; Lambropoulos, C.P.

2017-01-01

Gamma ray imaging can be used for the extraction either of the activity map of a source or of the attenuation map of an object or both, as well as for the identification of the material composition of the emitting source or the object. All these imaging modalities can benefit from instruments giving the information of the energy of the converted photons and also the spatial and time coordinates of the conversion. The P4DI CMOS and hybrid provides the core technology for this task being a 2-D array based on Cd(Zn)Te material for the sensing layer. It consists of 1250 pixels with 400 μ m pitch. The energy resolution of the 241 Am photopeak is 3.5 keV, time resolution is less than 12 μ s and power consumption is less than 100 mW. Architecture and characterization are described.

Monolithic pixels on moderate resistivity substrate and sparsifying readout architecture

CERN Document Server

Giubilato, P; Snoeys, W; Bisello, D; Marchioro, A; Battaglia, M; Demaria, L; Mansuy, S C; Pantano, D; Rousset, J; Mattiazzo, S; Kloukinas, K; Potenza, A; Ikemoto, Y; Rivetti, A; Chalmet, P; Mugnier, H; Silvestrin, L

2013-01-01

The LePix projects aim realizing a new generation monolithic pixel detectors with improved performances at lesser cost with respect to both current state of the art monolithic and hybrid pixel sensors. The detector is built in a 90 nm CMOS process on a substrate of moderate resistivity. This allows charge collection by drift while maintaining the other advantages usually offered by MAPS, like having a single piece detector and using a standard CMOS production line. The collection by drift mechanism, coupled to the low capacitance design of the collecting node made possible by the monolithic approach, provides an excellent signal to noise ratio straight at the pixel cell together with a radiation tolerance far superior to conventional un-depleted MAPS. The excellent signal-to-noise performance is demonstrated by the device ability to separate the 6 keV Fe-55 double peak at room temperature. To achieve high granularity (10-20 mu m pitch pixels) over large detector areas maintaining high readout speed, a complet...

The FE-I4 pixel readout integrated circuit

Energy Technology Data Exchange (ETDEWEB)

Garcia-Sciveres, M., E-mail: mgarcia-sciveres@bl.gov [Lawrence Berkeley National Laboratory, Berkeley, CA (United States); Arutinov, D.; Barbero, M. [University of Bonn, Bonn (Germany); Beccherle, R. [Istituto Nazionale di Fisica Nucleare Sezione di Genova, Genova (Italy); Dube, S.; Elledge, D. [Lawrence Berkeley National Laboratory, Berkeley, CA (United States); Fleury, J. [Laboratoire de l' Accelerateur Lineaire, Orsay (France); Fougeron, D.; Gensolen, F. [Centre de Physique des Particules de Marseille, Marseille (France); Gnani, D. [Lawrence Berkeley National Laboratory, Berkeley, CA (United States); Gromov, V. [Nationaal Instituut voor Subatomaire Fysica, Amsterdam (Netherlands); Hemperek, T.; Karagounis, M. [University of Bonn, Bonn (Germany); Kluit, R. [Nationaal Instituut voor Subatomaire Fysica, Amsterdam (Netherlands); Kruth, A. [University of Bonn, Bonn (Germany); Mekkaoui, A. [Lawrence Berkeley National Laboratory, Berkeley, CA (United States); Menouni, M. [Centre de Physique des Particules de Marseille, Marseille (France); Schipper, J.-D. [Nationaal Instituut voor Subatomaire Fysica, Amsterdam (Netherlands)

2011-04-21

A new pixel readout integrated circuit denominated FE-I4 is being designed to meet the requirements of ATLAS experiment upgrades. It will be the largest readout IC produced to date for particle physics applications, filling the maximum allowed reticle area. This will significantly reduce the cost of future hybrid pixel detectors. In addition, FE-I4 will have smaller pixels and higher rate capability than the present generation of LHC pixel detectors. Design features are described along with simulation and test results, including low power and high rate readout architecture, mixed signal design strategy, and yield hardening.

Status of the digital pixel array detector for protein crystallography

CERN Document Server

Datte, P; Beuville, E; Endres, N; Druillole, F; Luo, L; Millaud, J E; Xuong, N H

1999-01-01

A two-dimensional photon counting digital pixel array detector is being designed for static and time resolved protein crystallography. The room temperature detector will significantly enhance monochromatic and polychromatic protein crystallographic through-put data rates by more than three orders of magnitude. The detector has an almost infinite photon counting dynamic range and exhibits superior spatial resolution when compared to present crystallographic phosphor imaging plates or phosphor coupled CCD detectors. The detector is a high resistivity N-type Si with a pixel pitch of 150x150 mu m, and a thickness of 300 mu m, and is bump bonded to an application specific integrated circuit. The event driven readout of the detector is based on the column architecture and allows an independent pixel hit rate above 1 million photons/s/pixel. The device provides energy discrimination and sparse data readout which yields minimal dead-time. This type of architecture allows a continuous (frameless) data acquisition, a f...

Digital Power Consumption Estimations for CHIPIX65 Pixel Readout Chip

CERN Document Server

Marcotulli, Andrea

2016-01-01

New hybrid pixel detectors with improved resolution capable of dealing with hit rates up to 3 GHz/cm2 will be required for future High Energy Physics experiments in the Large Hadron Collider (LHC) at CERN. Given this, the RD53 collaboration works on the design of the next generation pixel readout chip needed for both the ATLAS and CMS detector phase 2 pixel upgrades. For the RD53 demonstrator chip in 65nm CMOS technology, different architectures are considered. In particular the purpose of this work is estimating the power consumption of the digital architecture of the readout ASIC developed by CHIPIX65 project of the INFN National Scientific Committee. This has been done with modern chip design tools integrated with the VEPIX53 simulation framework that has been developed within the RD53 collaboration in order to assess the performance of the system in very high rate, high energy physics experiments.

A novel CMOS sensor with in-pixel auto-zeroed discrimination for charged particle tracking

International Nuclear Information System (INIS)

Degerli, Y; Guilloux, F; Orsini, F

2014-01-01

With the aim of developing fast and granular Monolithic Active Pixels Sensors (MAPS) as new charged particle tracking detectors for high energy physics experiments, a new rolling shutter binary pixel architecture concept (RSBPix) with in-pixel correlated double sampling, amplification and discrimination is presented. The discriminator features auto-zeroing in order to compensate process-related transistor mismatches. In order to validate the pixel, a first monolithic CMOS sensor prototype, including a pixel array of 96 × 64 pixels, has been designed and fabricated in the Tower-Jazz 0.18 μm CMOS Image Sensor (CIS) process. Results of laboratory tests are presented

Design and Performance of the CMS Pixel Detector Readout Chip

CERN Document Server

Kästli, H C; Erdmann, W; Hörmann, C; Horisberger, R P; Kotlinski, D; Meier, B; Hoermann, Ch.

2006-01-01

The readout chip for the CMS pixel detector has to deal with an enormous data rate. On-chip zero suppression is inevitable and hit data must be buffered locally during the latency of the first level trigger. Dead-time must be kept at a minimum. It is dominated by contributions coming from the readout. To keep it low an analog readout scheme has been adopted where pixel addresses are analog coded. We present the architecture of the final CMS pixel detector readout chip with special emphasis on the analog readout chain. Measurements of its performance are discussed.

An area efficient readout architecture for photon counting color imaging

International Nuclear Information System (INIS)

Lundgren, Jan; O'Nils, Mattias; Oelmann, Bengt; Norlin, Boerje; Abdalla, Suliman

2007-01-01

The introduction of several energy levels, namely color imaging, in photon counting X-ray image sensors is a trade-off between circuit complexity and spatial resolution. In this paper, we propose a pixel architecture that has full resolution for the intensity and uses sub-sampling for the energy spectrum. The results show that this sub-sampling pixel architecture produces images with an image quality which is, on average, 2.4 dB (PSNR) higher than those for a single energy range architecture and with half the circuit complexity of that for a full sampling architecture

The RD53 collaboration's SystemVerilog-UVM simulation framework and its general applicability to design of advanced pixel readout chips

International Nuclear Information System (INIS)

Marconi, S; Christiansen, J; Conti, E; Placidi, P; Hemperek, T

2014-01-01

The foreseen Phase 2 pixel upgrades at the LHC have very challenging requirements for the design of hybrid pixel readout chips. A versatile pixel simulation platform is as an essential development tool for the design, verification and optimization of both the system architecture and the pixel chip building blocks (Intellectual Properties, IPs). This work is focused on the implemented simulation and verification environment named VEPIX53, built using the SystemVerilog language and the Universal Verification Methodology (UVM) class library in the framework of the RD53 Collaboration. The environment supports pixel chips at different levels of description: its reusable components feature the generation of different classes of parameterized input hits to the pixel matrix, monitoring of pixel chip inputs and outputs, conformity checks between predicted and actual outputs and collection of statistics on system performance. The environment has been tested performing a study of shared architectures of the trigger latency buffering section of pixel chips. A fully shared architecture and a distributed one have been described at behavioral level and simulated; the resulting memory occupancy statistics and hit loss rates have subsequently been compared

High-speed imaging at high x-ray energy: CdTe sensors coupled to charge-integrating pixel array detectors

Energy Technology Data Exchange (ETDEWEB)

Becker, Julian; Tate, Mark W.; Shanks, Katherine S.; Philipp, Hugh T.; Weiss, Joel T.; Purohit, Prafull [Laboratory of Atomic and Solid State Physics, Cornell University, Ithaca, NY 14853 (United States); Chamberlain, Darol [Cornell High Energy Synchrotron Source (CHESS), Cornell University, Ithaca, NY 14853 (United States); Gruner, Sol M., E-mail: smg26@cornell.edu [Laboratory of Atomic and Solid State Physics, Cornell University, Ithaca, NY 14853 (United States); Cornell High Energy Synchrotron Source (CHESS), Cornell University, Ithaca, NY 14853 (United States)

2016-07-27

Pixel Array Detectors (PADs) consist of an x-ray sensor layer bonded pixel-by-pixel to an underlying readout chip. This approach allows both the sensor and the custom pixel electronics to be tailored independently to best match the x-ray imaging requirements. Here we describe the hybridization of CdTe sensors to two different charge-integrating readout chips, the Keck PAD and the Mixed-Mode PAD (MM-PAD), both developed previously in our laboratory. The charge-integrating architecture of each of these PADs extends the instantaneous counting rate by many orders of magnitude beyond that obtainable with photon counting architectures. The Keck PAD chip consists of rapid, 8-frame, in-pixel storage elements with framing periods <150 ns. The second detector, the MM-PAD, has an extended dynamic range by utilizing an in-pixel overflow counter coupled with charge removal circuitry activated at each overflow. This allows the recording of signals from the single-photon level to tens of millions of x-rays/pixel/frame while framing at 1 kHz. Both detector chips consist of a 128×128 pixel array with (150 µm){sup 2} pixels.

The RD53 Collaboration's SystemVerilog-UVM Simulation Framework and its General Applicability to Design of Advanced Pixel Readout Chips

CERN Document Server

Marconi, S.; Placidi, P.; Christiansen, J.; Hemperek, T.

2014-01-01

The foreseen Phase 2 pixel upgrades at the LHC have very challenging requirements for the design of hybrid pixel readout chips. A versatile pixel simulation platform is as an essential development tool for the design, verification and optimization of both the system architecture and the pixel chip building blocks (Intellectual Properties, IPs). This work is focused on the implemented simulation and verification environment named VEPIX53, built using the SystemVerilog language and the Universal Verification Methodology (UVM) class library in the framework of the RD53 Collaboration. The environment supports pixel chips at different levels of description: its reusable components feature the generation of different classes of parameterized input hits to the pixel matrix, monitoring of pixel chip inputs and outputs, conformity checks between predicted and actual outputs and collection of statistics on system performance. The environment has been tested performing a study of shared architectures of the trigger late...

Sleep Architecture in Partially Acclimatized Lowlanders and Native Tibetans at 3800 Meter Altitude: What Are the Differences?

Science.gov (United States)

Kong, Fanyi; Liu, Shixiang; Li, Qiong; Wang, Lin

2015-09-01

It is not well known whether high altitude acclimatization could help lowlanders improve their sleep architecture as well as Native Tibetans. In order to address this, we investigated the structural differences in sleep between Native Tibetans and partially acclimatized lowlanders and examined the association between sleep architecture and subjective sleep quality. Partially acclimatized soldiers from lowlands and Native Tibetan soldiers stationed at Shangri-La (3800 m) were surveyed using the Pittsburgh Sleep Quality Index (PSQI), Hamilton Anxiety Scale (HAMA), and Hamilton Depression Rating Scale (HAMD). The sleep architecture of those without anxiety (as determined by HAMA>14) and/or depression (HAMD>20) was analyzed using polysomnography and the results were compared between the two groups. One hundred sixty-five male soldiers, including 55 Native Tibetans, were included in the study. After partial acclimatization, lowlanders still exhibited differences in sleep architecture as compared to Native Tibetans, as indicated by a higher PSQI score (8.14±2.37 vs. 3.90±2.85, p<0.001), shorter non-rapid eye movement (non-REM) sleep (458.68±112.63 vs. 501±37.82 min, P=0.03), lower nocturnal arterial oxygen saturation (Spo2; mean 91.39±1.24 vs. 92.71±2.12%, p=0.03), and increased times of Spo2 reduction from 89% to 85% (median 48 vs.17, p=0.04) than Native Tibetans. Sleep onset latency (β=0.08, 95%CI: 0.01 to 0.15), non-REM latency (β=0.011, 95%CI 0.001 to 0.02), mean Spo2 (β=-0.79, 95%CI: -1.35 to -0.23) and time in stage 3+4 sleep (β=-0.014, 95%CI: -0.001 to -0.028) were slightly associated with the PSQI score. Partially acclimatized lowlanders experienced less time in non-REM sleep and had lower arterial oxygen saturation than Native Tibetans at an altitude of 3800 m. The main independent contributors to poor sleep quality are hypoxemia, difficulty in sleep induction, and time in deep sleep.

Development of radiation hardened pixel sensors for charged particle detection

CERN Document Server

Koziel, Michal

2014-01-01

CMOS Pixel Sensors are being developed since a few years to equip vertex detectors for future high-energy physics experiments with the crucial advantages of a low material budget and low production costs. The features simultaneously required are a short readout time, high granularity and high tolerance to radiation. This thesis mainly focuses on the radiation tolerance studies. To achieve the targeted readout time (tens of microseconds), the sensor pixel readout was organized in parallel columns restricting in addition the readout to pixels that had collected the signal charge. The pixels became then more complex, and consequently more sensitive to radiation. Different in-pixel architectures were studied and it was concluded that the tolerance to ionizing radiation was limited to 300 krad with the 0.35- m fabrication process currently used, while the targeted value was several Mrad. Improving this situation calls for implementation of the sensors in processes with a smaller feature size which naturally imp...

Calibration Analysis Software for the ATLAS Pixel Detector

CERN Document Server

AUTHOR|(INSPIRE)INSPIRE-00372086; The ATLAS collaboration

2016-01-01

The calibration of the ATLAS Pixel detector at LHC fulfils two main purposes: to tune the front-end configuration parameters for establishing the best operational settings and to measure the tuning performance through a subset of scans. An analysis framework has been set up in order to take actions on the detector given the outcome of a calibration scan (e.g. to create a mask for disabling noisy pixels). The software framework to control all aspects of the Pixel detector scans and analyses is called Calibration Console. The introduction of a new layer, equipped with new Front End-I4 Chips, required an update the Console architecture. It now handles scans and scans analyses applied together to chips with different characteristics. An overview of the newly developed Calibration Analysis Software will be presented, together with some preliminary result.

Development of the ASICs for the NA62 pixel Gigatracker

CERN Document Server

Jarron, P

2008-01-01

We present the ASIC development for the readout electronics of the Gigatracker pixel detector of NA62. Specifications of this detector are challenging in terms of timing precision with a hit time stamp accuracy of 100 ps and a peak hit rate of 50 Mhits/cm2/s. A timing precision and hit rate are more than one order of magnitude faster than pixel LHC readout ASIC. The research for pixel cell design and the readout architectures are following two approaches, which are presented and discussed in this paper. Presently demonstrator prototypes are under development and SPICE simulation results of the frontend, the readout strategy and and the pixelcolumn are also presented and discussed.

Beam test results for the RAPS03 non-epitaxial CMOS active pixel sensor

International Nuclear Information System (INIS)

Biagetti, Daniele; Marras, Alessandro; Meroli, Stefano; Passeri, Daniele; Placidi, Pisana; Servoli, Leonello; Tucceri, Paola

2011-01-01

Recently our group has been investigating the possibility of using a standard CMOS technology - featuring no epitaxial layer - to fabricate a sensor for charged particle detection. In this work we present the results obtained exposing sensors with 256x256 pixels (10x10μm pixel size, two different pixel layouts) to 180 GeV protons and positrons at the SuperProtoSynchrotron facility (CERN). We have investigated the different response of the two architectural options in terms of S/N, cluster width, intrinsic spatial resolution, efficiency. The results show a good Landau response, S/N about 22 with an average cluster size of 4.5 pixels, and an intrinsic spatial resolution of 1.5μm (order of 1/7th of the pixel size).

Development and simulation results of a sparsification and readout circuit for wide pixel matrices

International Nuclear Information System (INIS)

Gabrielli, A.; Giorgi, F.; Morsani, F.; Villa, M.

2011-01-01

In future collider experiments, the increasing luminosity and centre of mass energy are rising challenging problems in the design of new inner tracking systems. In this context we develop high-efficiency readout architectures for large binary pixel matrices that are meant to cope with the high-stressing conditions foreseen in the innermost layers of a tracker [The SuperB Conceptual Design Report, INFN/AE-07/02, SLAC-R-856, LAL 07-15, Available online at: (http://www.pi.infn.it/SuperB)]. We model and design digital readout circuits to be integrated on VLSI ASICs. These architectures can be realized with different technology processes and sensors: they can be implemented on the same silicon sensor substrate of a CMOS MAPS devices (Monolithic Active Pixel Sensor), on the CMOS tier of a hybrid pixel sensor or in a 3D chip where the digital layer is stacked on the sensor and the analog layers [V. Re et al., Nuc. Instr. and Meth. in Phys. Res. A, (doi:10.1016/j.nima.2010.05.039)]. In the presented work, we consider a data-push architecture designed for a sensor matrix of an area of about 1.3 cm 2 with a pitch of 50 microns. The readout circuit tries to take great advantage of the high density of in-pixel digital logic allowed by vertical integration. We aim at sustaining a rate density of 100 Mtrack . s -1 . cm -2 with a temporal resolution below 1 μs. We show how this architecture can cope with these stressing conditions presenting the results of Monte Carlo simulations.

Development and simulation results of a sparsification and readout circuit for wide pixel matrices

Energy Technology Data Exchange (ETDEWEB)

Gabrielli, A.; Giorgi, F. [University and INFN of Bologna (Italy); Morsani, F. [University and INFN of Pisa (Italy); Villa, M. [University and INFN of Bologna (Italy)

2011-06-15

In future collider experiments, the increasing luminosity and centre of mass energy are rising challenging problems in the design of new inner tracking systems. In this context we develop high-efficiency readout architectures for large binary pixel matrices that are meant to cope with the high-stressing conditions foreseen in the innermost layers of a tracker [The SuperB Conceptual Design Report, INFN/AE-07/02, SLAC-R-856, LAL 07-15, Available online at: (http://www.pi.infn.it/SuperB)]. We model and design digital readout circuits to be integrated on VLSI ASICs. These architectures can be realized with different technology processes and sensors: they can be implemented on the same silicon sensor substrate of a CMOS MAPS devices (Monolithic Active Pixel Sensor), on the CMOS tier of a hybrid pixel sensor or in a 3D chip where the digital layer is stacked on the sensor and the analog layers [V. Re et al., Nuc. Instr. and Meth. in Phys. Res. A, (doi:10.1016/j.nima.2010.05.039)]. In the presented work, we consider a data-push architecture designed for a sensor matrix of an area of about 1.3 cm{sup 2} with a pitch of 50 microns. The readout circuit tries to take great advantage of the high density of in-pixel digital logic allowed by vertical integration. We aim at sustaining a rate density of 100 Mtrack . s{sup -1} . cm{sup -2} with a temporal resolution below 1 {mu}s. We show how this architecture can cope with these stressing conditions presenting the results of Monte Carlo simulations.

A compressed sensing X-ray camera with a multilayer architecture

Science.gov (United States)

Wang, Zhehui; Iaroshenko, O.; Li, S.; Liu, T.; Parab, N.; Chen, W. W.; Chu, P.; Kenyon, G. T.; Lipton, R.; Sun, K.-X.

2018-01-01

Recent advances in compressed sensing theory and algorithms offer new possibilities for high-speed X-ray camera design. In many CMOS cameras, each pixel has an independent on-board circuit that includes an amplifier, noise rejection, signal shaper, an analog-to-digital converter (ADC), and optional in-pixel storage. When X-ray images are sparse, i.e., when one of the following cases is true: (a.) The number of pixels with true X-ray hits is much smaller than the total number of pixels; (b.) The X-ray information is redundant; or (c.) Some prior knowledge about the X-ray images exists, sparse sampling may be allowed. Here we first illustrate the feasibility of random on-board pixel sampling (ROPS) using an existing set of X-ray images, followed by a discussion about signal to noise as a function of pixel size. Next, we describe a possible circuit architecture to achieve random pixel access and in-pixel storage. The combination of a multilayer architecture, sparse on-chip sampling, and computational image techniques, is expected to facilitate the development and applications of high-speed X-ray camera technology.

Development of a super B-factory monolithic active pixel detector-the Continuous Acquisition Pixel (CAP) prototypes

International Nuclear Information System (INIS)

Varner, G.; Barbero, M.; Bozek, A.; Browder, T.; Fang, F.; Hazumi, M.; Igarashi, A.; Iwaida, S.; Kennedy, J.; Kent, N.; Olsen, S.; Palka, H.; Rosen, M.; Ruckman, L.; Stanic, S.; Trabelsi, K.; Tsuboyama, T.; Uchida, K.

2005-01-01

Over the last few years great progress has been made in the technological development of Monolithic Active Pixel Sensors (MAPS) such that upgrades to existing vertex detectors using this technology are now actively being considered. Future vertex detection at an upgraded KEK-B factory, already the highest luminosity collider in the world, will require a detector technology capable of withstanding the increased track densities and larger radiation exposures. Near the beam pipe the current silicon strip detectors have projected occupancies in excess of 100%. Deep sub-micron MAPS look very promising to address this problem. In the context of an upgrade to the Belle vertex detector, the major obstacles to realizing such a device have been concerns about radiation hardness and readout speed. Two prototypes implemented in the TSMC 0.35 μm process have been developed to address these issues. Denoted the Continuous Acquisition Pixel, or CAP, the two variants of this architecture are distinguished in that CAP2 includes an 8-deep sampling pipeline within each 22.5 μm 2 pixel. Preliminary test results and remaining R and D issues are presented

Noise analysis of a novel hybrid active-passive pixel sensor for medical X-ray imaging

International Nuclear Information System (INIS)

Safavian, N.; Izadi, M.H.; Sultana, A.; Wu, D.; Karim, K.S.; Nathan, A.; Rowlands, J.A.

2009-01-01

Passive pixel sensor (PPS) is one of the most widely used architectures in large area amorphous silicon (a-Si) flat panel imagers. It consists of a detector and a thin film transistor (TFT) acting as a readout switch. While the PPS is advantageous in terms of providing a simple and small architecture suitable for high-resolution imaging, it directly exposes the signal to the noise of data line and external readout electronics, causing significant increase in the minimum readable sensor input signal. In this work we present the operation and noise performance of a hybrid 3-TFT current programmed, current output active pixel sensor (APS) suitable for real-time X-ray imaging. The pixel circuit extends the application of a-Si TFT from conventional switching element to on-pixel amplifier for enhanced signal-to-noise ratio and higher imager dynamic range. The capability of operation in both passive and active modes as well as being able to compensate for inherent instabilities of the TFTs makes the architecture a good candidate for X-ray imaging modalities with a wide range of incoming X-ray intensities. Measurement and theoretical calculations reveal a value for input refferd noise below the 1000 electron noise limit for real-time fluoroscopy. (copyright 2009 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim) (orig.)

MCC: the Module Controller Chip for the ATLAS Pixel Detector

International Nuclear Information System (INIS)

Beccherle, R.; Darbo, G.; Gagliardi, G.; Gemme, C.; Morettini, P.; Musico, P.; Osculati, B.; Oppizzi, P.; Pratolongo, F.; Ruscino, E.; Schiavi, C.; Vernocchi, F.; Blanquart, L.; Einsweiler, K.; Meddeler, G.; Richardson, J.; Comes, G.; Fischer, P.; Calvet, D.; Boyd, R.; Sicho, P.

2002-01-01

In this article we describe the architecture of the Module Controller Chip for the ATLAS Pixel Detector. The project started in 1997 with the definition of the system specifications. A first fully-working rad-soft prototype was designed in 1998, while a radiation hard version was submitted in 2000. The 1998 version was used to build pixel detector modules. Results from those modules and from the simulated performance in ATLAS are reported. In the article we also describe the hardware/software tools developed to test the MCC performance at the LHC event rate

ePix: a class of architectures for second generation LCLS cameras

International Nuclear Information System (INIS)

Dragone, A; Caragiulo, P; Markovic, B; Herbst, R; Reese, B; Herrmann, S C; Hart, P A; Segal, J; Carini, G A; Kenney, C J; Haller, G

2014-01-01

ePix is a novel class of ASIC architectures, based on a common platform, optimized to build modular scalable detectors for LCLS. The platform architecture is composed of a random access analog matrix of pixel with global shutter, fast parallel column readout, and dedicated sigma-delta analog-to-digital converters per column. It also implements a dedicated control interface and all the required support electronics to perform configuration, calibration and readout of the matrix. Based on this platform a class of front-end ASICs and several camera modules, meeting different requirements, can be developed by designing specific pixel architectures. This approach reduces development time and expands the possibility of integration of detector modules with different size, shape or functionality in the same camera. The ePix platform is currently under development together with the first two integrating pixel architectures: ePix100 dedicated to ultra low noise applications and ePix10k for high dynamic range applications.

A pixel design for X-ray imaging with CdTe sensors

Energy Technology Data Exchange (ETDEWEB)

Lambropoulos, C.P.; Zervakis, E.G. [Technological Educational Institute of Halkis, Psahna - Evia (Greece); Loukas, D. [Institute of Nuclear Physics, NCSR Demokritos, Agia Paraskevi - Attiki (Greece)

2008-07-01

A readout architecture appropriate for X-ray Imaging using charge integration has been designed. Each pixel consists of a capacitive transimpedance amplifier, a sample and hold circuit a comparator and an 8 bit DRAM. Pixel level A/D conversion and local storage of the digitized signal is performed. The target sensors are 100{mu}m x 100 {mu}m CdTe pixel detectors and integration time of 1ms or less can be achieved. Special measures have been taken to minimize the gain fixed pattern noise and the reset noise, while purely digital correlation double sampling can be performed. (copyright 2008 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim) (orig.)

A pixel design for X-ray imaging with CdTe sensors

International Nuclear Information System (INIS)

Lambropoulos, C.P.; Zervakis, E.G.; Loukas, D.

2008-01-01

A readout architecture appropriate for X-ray Imaging using charge integration has been designed. Each pixel consists of a capacitive transimpedance amplifier, a sample and hold circuit a comparator and an 8 bit DRAM. Pixel level A/D conversion and local storage of the digitized signal is performed. The target sensors are 100μm x 100 μm CdTe pixel detectors and integration time of 1ms or less can be achieved. Special measures have been taken to minimize the gain fixed pattern noise and the reset noise, while purely digital correlation double sampling can be performed. (copyright 2008 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim) (orig.)

The Level 0 Pixel Trigger system for the ALICE experiment

International Nuclear Information System (INIS)

Rinella, G Aglieri; Kluge, A; Krivda, M

2007-01-01

The ALICE Silicon Pixel Detector contains 1200 readout chips. Fast-OR signals indicate the presence of at least one hit in the 8192 pixel matrix of each chip. The 1200 bits are transmitted every 100 ns on 120 data readout optical links using the G-Link protocol. The Pixel Trigger System extracts and processes them to deliver an input signal to the Level 0 trigger processor targeting a latency of 800 ns. The system is compact, modular and based on FPGA devices. The architecture allows the user to define and implement various trigger algorithms. The system uses advanced 12-channel parallel optical fiber modules operating at 1310 nm as optical receivers and 12 deserializer chips closely packed in small area receiver boards. Alternative solutions with multi-channel G-Link deserializers implemented directly in programmable hardware devices were investigated. The design of the system and the progress of the ALICE Pixel Trigger project are described in this paper

Sensor development for the CMS pixel detector

CERN Document Server

Bölla, G; Horisberger, R P; Kaufmann, R; Rohe, T; Roy, A

2002-01-01

The CMS experiment which is currently under construction at the Large Hadron Collider (LHC) at CERN (Geneva, Switzerland) will contain a pixel detector which provides in its final configuration three space points per track close to the interaction point of the colliding beams. Because of the harsh radiation environment of the LHC, the technical realization of the pixel detector is extremely challenging. The readout chip as the most damageable part of the system is believed to survive a particle fluence of 6x10 sup 1 sup 4 n sub e sub q /cm sup 2 (All fluences are normalized to 1 MeV neutrons and therefore all components of the hybrid pixel detector have to perform well up to at least this fluence. As this requires a partially depleted operation of the silicon sensors after irradiation-induced type inversion of the substrate, an ''n in n'' concept has been chosen. In order to perform IV-tests on wafer level and to hold accidentally unconnected pixels close to ground potential, a resistive path between the pixe...

Fully depleted CMOS pixel sensor development and potential applications

Energy Technology Data Exchange (ETDEWEB)

Baudot, J.; Kachel, M. [Universite de Strasbourg, IPHC, 23 rue du Loess 67037 Strasbourg (France); CNRS, UMR7178, 67037 Strasbourg (France)

2015-07-01

CMOS pixel sensors are often opposed to hybrid pixel sensors due to their very different sensitive layer. In standard CMOS imaging processes, a thin (about 20 μm) low resistivity epitaxial layer acts as the sensitive volume and charge collection is mostly driven by thermal agitation. In contrast, the so-called hybrid pixel technology exploits a thick (typically 300 μm) silicon sensor with high resistivity allowing for the depletion of this volume, hence charges drift toward collecting electrodes. But this difference is fading away with the recent availability of some CMOS imaging processes based on a relatively thick (about 50 μm) high resistivity epitaxial layer which allows for full depletion. This evolution extents the range of applications for CMOS pixel sensors where their known assets, high sensitivity and granularity combined with embedded signal treatment, could potentially foster breakthrough in detection performances for specific scientific instruments. One such domain is the Xray detection for soft energies, typically below 10 keV, where the thin sensitive layer was previously severely impeding CMOS sensor usage. Another application becoming realistic for CMOS sensors, is the detection in environment with a high fluence of non-ionizing radiation, such as hadron colliders. However, when considering highly demanding applications, it is still to be proven that micro-circuits required to uniformly deplete the sensor at the pixel level, do not mitigate the sensitivity and efficiency required. Prototype sensors in two different technologies with resistivity higher than 1 kΩ, sensitive layer between 40 and 50 μm and featuring pixel pitch in the range 25 to 50 μm, have been designed and fabricated. Various biasing architectures were adopted to reach full depletion with only a few volts. Laboratory investigations with three types of sources (X-rays, β-rays and infrared light) demonstrated the validity of the approach with respect to depletion, keeping a

A liquid-crystal-on-silicon color sequential display using frame buffer pixel circuits

Science.gov (United States)

Lee, Sangrok

Next generation liquid-crystal-on-silicon (LCOS) high definition (HD) televisions and image projection displays will need to be low-cost and high quality to compete with existing systems based on digital micromirror devices (DMDs), plasma displays, and direct view liquid crystal displays. In this thesis, a novel frame buffer pixel architecture that buffers data for the next image frame while displaying the current frame, offers such a competitive solution is presented. The primary goal of the thesis is to demonstrate the LCOS microdisplay architecture for high quality image projection displays and at potentially low cost. The thesis covers four main research areas: new frame buffer pixel circuits to improve the LCOS performance, backplane architecture design and testing, liquid crystal modes for the LCOS microdisplay, and system integration and demonstration. The design requirements for the LCOS backplane with a 64 x 32 pixel array are addressed and measured electrical characteristics matches to computer simulation results. Various liquid crystal (LC) modes applicable for LCOS microdisplays and their physical properties are discussed. One- and two-dimensional director simulations are performed for the selected LC modes. Test liquid crystal cells with the selected LC modes are made and their electro-optic effects are characterized. The 64 x 32 LCOS microdisplays fabricated with the best LC mode are optically tested with interface circuitry. The characteristics of the LCOS microdisplays are summarized with the successful demonstration.

Prevalence of Pure Versus Mixed Snow Cover Pixels across Spatial Resolutions in Alpine Environments

Directory of Open Access Journals (Sweden)

David J. Selkowitz

2014-12-01

Full Text Available Remote sensing of snow-covered area (SCA can be binary (indicating the presence/absence of snow cover at each pixel or fractional (indicating the fraction of each pixel covered by snow. Fractional SCA mapping provides more information than binary SCA, but is more difficult to implement and may not be feasible with all types of remote sensing data. The utility of fractional SCA mapping relative to binary SCA mapping varies with the intended application as well as by spatial resolution, temporal resolution and period of interest, and climate. We quantified the frequency of occurrence of partially snow-covered (mixed pixels at spatial resolutions between 1 m and 500 m over five dates at two study areas in the western U.S., using 0.5 m binary SCA maps derived from high spatial resolution imagery aggregated to fractional SCA at coarser spatial resolutions. In addition, we used in situ monitoring to estimate the frequency of partially snow-covered conditions for the period September 2013–August 2014 at 10 60-m grid cell footprints at two study areas with continental snow climates. Results from the image analysis indicate that at 40 m, slightly above the nominal spatial resolution of Landsat, mixed pixels accounted for 25%–93% of total pixels, while at 500 m, the nominal spatial resolution of MODIS bands used for snow cover mapping, mixed pixels accounted for 67%–100% of total pixels. Mixed pixels occurred more commonly at the continental snow climate site than at the maritime snow climate site. The in situ data indicate that some snow cover was present between 186 and 303 days, and partial snow cover conditions occurred on 10%–98% of days with snow cover. Four sites remained partially snow-free throughout most of the winter and spring, while six sites were entirely snow covered throughout most or all of the winter and spring. Within 60 m grid cells, the late spring/summer transition from snow-covered to snow-free conditions lasted 17–56 days

Compact, open-architecture computed radiography system

International Nuclear Information System (INIS)

Huang, H.K.; Lim, A.; Kangarloo, H.; Eldredge, S.; Loloyan, M.; Chuang, K.S.

1990-01-01

Computed radiography (CR) was introduced in 1982, and its basic system design has not changed. Current CR systems have certain limitations: spatial resolution and signal-to-noise ratios are lower than those of screen-film systems, they are complicated and expensive to build, and they have a closed architecture. The authors of this paper designed and implemented a simpler, lower-cost, compact, open-architecture CR system to overcome some of these limitations. The open-architecture system is a manual-load-single-plate reader that can fit on a desk top. Phosphor images are stored in a local disk and can be sent to any other computer through standard interfaces. Any manufacturer's plate can be read with a scanning time of 90 second for a 35 x 43-cm plate. The standard pixel size is 174 μm and can be adjusted for higher spatial resolution. The data resolution is 12 bits/pixel over an x-ray exposure range of 0.01-100 mR

Frequency-multiplexed bias and readout of a 16-pixel superconducting nanowire single-photon detector array

Science.gov (United States)

Doerner, S.; Kuzmin, A.; Wuensch, S.; Charaev, I.; Boes, F.; Zwick, T.; Siegel, M.

2017-07-01

We demonstrate a 16-pixel array of microwave-current driven superconducting nanowire single-photon detectors with an integrated and scalable frequency-division multiplexing architecture, which reduces the required number of bias and readout lines to a single microwave feed line. The electrical behavior of the photon-sensitive nanowires, embedded in a resonant circuit, as well as the optical performance and timing jitter of the single detectors is discussed. Besides the single pixel measurements, we also demonstrate the operation of a 16-pixel array with a temporal, spatial, and photon-number resolution.

Fast semivariogram computation using FPGA architectures

Science.gov (United States)

Lagadapati, Yamuna; Shirvaikar, Mukul; Dong, Xuanliang

2015-02-01

The semivariogram is a statistical measure of the spatial distribution of data and is based on Markov Random Fields (MRFs). Semivariogram analysis is a computationally intensive algorithm that has typically seen applications in the geosciences and remote sensing areas. Recently, applications in the area of medical imaging have been investigated, resulting in the need for efficient real time implementation of the algorithm. The semivariogram is a plot of semivariances for different lag distances between pixels. A semi-variance, γ(h), is defined as the half of the expected squared differences of pixel values between any two data locations with a lag distance of h. Due to the need to examine each pair of pixels in the image or sub-image being processed, the base algorithm complexity for an image window with n pixels is O(n2). Field Programmable Gate Arrays (FPGAs) are an attractive solution for such demanding applications due to their parallel processing capability. FPGAs also tend to operate at relatively modest clock rates measured in a few hundreds of megahertz, but they can perform tens of thousands of calculations per clock cycle while operating in the low range of power. This paper presents a technique for the fast computation of the semivariogram using two custom FPGA architectures. The design consists of several modules dedicated to the constituent computational tasks. A modular architecture approach is chosen to allow for replication of processing units. This allows for high throughput due to concurrent processing of pixel pairs. The current implementation is focused on isotropic semivariogram computations only. Anisotropic semivariogram implementation is anticipated to be an extension of the current architecture, ostensibly based on refinements to the current modules. The algorithm is benchmarked using VHDL on a Xilinx XUPV5-LX110T development Kit, which utilizes the Virtex5 FPGA. Medical image data from MRI scans are utilized for the experiments

A robust sub-pixel edge detection method of infrared image based on tremor-based retinal receptive field model

Science.gov (United States)

Gao, Kun; Yang, Hu; Chen, Xiaomei; Ni, Guoqiang

2008-03-01

Because of complex thermal objects in an infrared image, the prevalent image edge detection operators are often suitable for a certain scene and extract too wide edges sometimes. From a biological point of view, the image edge detection operators work reliably when assuming a convolution-based receptive field architecture. A DoG (Difference-of- Gaussians) model filter based on ON-center retinal ganglion cell receptive field architecture with artificial eye tremors introduced is proposed for the image contour detection. Aiming at the blurred edges of an infrared image, the subsequent orthogonal polynomial interpolation and sub-pixel level edge detection in rough edge pixel neighborhood is adopted to locate the foregoing rough edges in sub-pixel level. Numerical simulations show that this method can locate the target edge accurately and robustly.

A pixel unit-cell targeting 16 ns resolution and radiation hardness in a column read-out particle vertex detector

International Nuclear Information System (INIS)

Wright, M.; Millaud, J.; Nygren, D.

1992-10-01

A pixel unit cell (PUC) circuit architecture, optimized for a column read out architecture, is reported. Each PUC contains an integrator, active filter, comparator, and optional analog store. The time-over-threshold (TOT) discriminator allows an all-digital interface to the array periphery readout while passing an analog measure of collected charge. Use of (existing) radiation hard processes, to build a detector bump-bonded to a pixel readout array, is targeted. Here, emphasis is on a qualitative explanation of how the unique circuit implementation benefits operation for Super Collider (SSC) detector application

A pixel unit-cell targeting 16ns resolution and radiation hardness in a column read-out particle vertex detector

International Nuclear Information System (INIS)

Wright, M.; Millaud, J.; Nygren, D.

1993-01-01

A pixel unit cell (PUC) circuit architecture, optimized for a column read out architecture, is reported. Each PUC contains an integrator, active filter, comparator, and optional analog store. The time-over-threshold (TOT) discriminator allows an all-digital interface to the array periphery readout while passing an analog measure of collected charge. Use of (existing) radiation hard processes, to build a detector bump-bonded to a pixel readout array, is targeted. Here emphasis is on a qualitative explanation of how the unique circuit implementation benefits operation for Super Collider (SSC) detector application. (orig.)

LePIX: First results from a novel monolithic pixel sensor

International Nuclear Information System (INIS)

Mattiazzo, S.; Battaglia, M.; Bisello, D.; Caselle, M.; Chalmet, P.; Demaria, N.; Giubilato, P.; Ikemoto, Y.; Kloukinas, K.; Mansuy, C.; Marchioro, A.; Mugnier, H.; Pantano, D.; Potenza, A.; Rivetti, A.; Rousset, J.; Silvestrin, L.; Snoeys, W.; Wyss, J.

2013-01-01

We present a monolithic pixel sensor developed in the framework of the LePIX project aimed at tracking/triggering tasks where high granularity, low power consumption, material budget, radiation hardness and production costs are a concern. The detector is built in a 90 nm CMOS process on a substrate of moderate resistivity. This maintains the advantages usually offered by Monolithic Active Pixel Sensors (MAPS), like a low input capacitance, having a single piece detector and using a standard CMOS production line, but offers charge collection by drift from a depleted region and therefore an excellent signal to noise ratio and a radiation tolerance superior to conventional undepleted MAPS. Measurement results obtained with the first prototypes from laser, radioactive source and beam test experiments are described. The excellent signal-to-noise performance is demonstrated by the capability of the device to separate the peaks in the spectrum of a 55 Fe source. We will also highlight the interaction between pixel cell design and architecture which points toward a very precise direction in the development of such depleted monolithic pixel devices for high energy physics

The Design and Implementation in $0.13\\mu m$ CMOS of an Algorithm Permitting Spectroscopic Imaging with High Spatial Resolution for Hybrid Pixel Detectors

CERN Document Server

Ballabriga, Rafael; Vilasís-Cardona, Xavier

2009-01-01

Advances in pixel detector technology are opening up new possibilities in many fields of science. Modern High Energy Physics (HEP) experiments use pixel detectors in tracking systems where excellent spatial resolution, precise timing and high signal-to-noise ratio are required for accurate and clean track reconstruction. Many groups are working worldwide to adapt the hybrid pixel technology to other fields such as medical X-ray radiography, protein structure analysis or neutron imaging. The Medipix3 chip is a 256x256 channel hybrid pixel detector readout chip working in Single Photon Counting Mode. It has been developed with a new front-end architecture aimed at eliminating the spectral distortion produced by charge diffusion in highly segmented semiconductor detectors. In the new architecture neighbouring pixels communicate with one another. Charges can be summed event-by-event and the incoming quantum can be assigned as a single hit to the pixel with the biggest charge deposit. In the case where incoming X-...

Architectural slicing

DEFF Research Database (Denmark)

Christensen, Henrik Bærbak; Hansen, Klaus Marius

2013-01-01

Architectural prototyping is a widely used practice, con- cerned with taking architectural decisions through experiments with light- weight implementations. However, many architectural decisions are only taken when systems are already (partially) implemented. This is prob- lematic in the context...... of architectural prototyping since experiments with full systems are complex and expensive and thus architectural learn- ing is hindered. In this paper, we propose a novel technique for harvest- ing architectural prototypes from existing systems, \\architectural slic- ing", based on dynamic program slicing. Given...... a system and a slicing criterion, architectural slicing produces an architectural prototype that contain the elements in the architecture that are dependent on the ele- ments in the slicing criterion. Furthermore, we present an initial design and implementation of an architectural slicer for Java....

Development of Pixel Front-End Electronics using Advanced Deep Submicron CMOS Technologies

CERN Document Server

Havránek, Miroslav; Dingfelder, Jochen

The content of this thesis is oriented on the R&D; of microelectronic integrated circuits for processing the signal from particle sensors and partially on the sensors themselves. This work is motivated by ongoing upgrades of the ATLAS Pixel Detector at CERN laboratory and by exploration of new technologies for the future experiments in particle physics. Evolution of technologies for the fabrication of microelectronic circuits follows Moore’s laws. Transistors become smaller and electronic chips reach higher complexity. Apart from this, silicon foundries become more open to smaller customers and often provide non-standard process options. Two new directions in pixel technologies are explored in this thesis: design of pixel electronics using ultra deep submicron (65 nm) CMOS technology and Depleted Monolithic Active Pixel Sensors (DMAPS). An independent project concerning the measurement of pixel capacitance with a dedicated measurement chip is a part of this thesis. Pixel capacitance is one of the key pa...

ASIC Readout Circuit Architecture for Large Geiger Photodiode Arrays

Science.gov (United States)

Vasile, Stefan; Lipson, Jerold

2012-01-01

The objective of this work was to develop a new class of readout integrated circuit (ROIC) arrays to be operated with Geiger avalanche photodiode (GPD) arrays, by integrating multiple functions at the pixel level (smart-pixel or active pixel technology) in 250-nm CMOS (complementary metal oxide semiconductor) processes. In order to pack a maximum of functions within a minimum pixel size, the ROIC array is a full, custom application-specific integrated circuit (ASIC) design using a mixed-signal CMOS process with compact primitive layout cells. The ROIC array was processed to allow assembly in bump-bonding technology with photon-counting infrared detector arrays into 3-D imaging cameras (LADAR). The ROIC architecture was designed to work with either common- anode Si GPD arrays or common-cathode InGaAs GPD arrays. The current ROIC pixel design is hardwired prior to processing one of the two GPD array configurations, and it has the provision to allow soft reconfiguration to either array (to be implemented into the next ROIC array generation). The ROIC pixel architecture implements the Geiger avalanche quenching, bias, reset, and time to digital conversion (TDC) functions in full-digital design, and uses time domain over-sampling (vernier) to allow high temporal resolution at low clock rates, increased data yield, and improved utilization of the laser beam.

Study of the CMS Phase 1 Pixel Pilot Blade Reconstruction

CERN Document Server

CMS Collaboration

2017-01-01

The silicon pixel detector is the innermost component of the CMS tracking system. It was replaced in March 2017 with an upgraded one, called the Phase 1 upgrade detector. During Long Shutdown 1, a third disk was inserted into the present forward pixel detector with eight prototype blades constructed using a new digital read-out chip architecture and a prototype readout chain. Testing the performance of these pilot modules enabled us to gain experience with the Phase 1 upgrade modules. In this document, the data reconstruction with the pilot system is presented. The hit finding efficiency and residual of these new modules is also shown, and how these observables were used to adjust the timing of the pilot blades.

Software architecture as a set of architectural design decisions

NARCIS (Netherlands)

Jansen, Anton; Bosch, Jan; Nord, R; Medvidovic, N; Krikhaar, R; Khrhaar, R; Stafford, J; Bosch, J

2006-01-01

Software architectures have high costs for change, are complex, and erode during evolution. We believe these problems are partially due to knowledge vaporization. Currently, almost all the knowledge and information about the design decisions the architecture is based on are implicitly embedded in

Monolithic active pixel sensor development for the upgrade of the ALICE inner tracking system

Science.gov (United States)

Aglieri, G.; Cavicchioli, C.; Chalmet, P. L.; Chanlek, N.; Collu, A.; Giubilato, P.; Hillemanns, H.; Junique, A.; Keil, M.; Kim, D.; Kim, J.; Kugathasan, T.; Lattuca, A.; Mager, M.; Marin Tobon, C. A.; Marras, D.; Martinengo, P.; Mattiazzo, S.; Mazza, G.; Mugnier, H.; Musa, L.; Pantano, D.; Puggioni, C.; Rousset, J.; Reidt, F.; Riedler, P.; Siddhanta, S.; Snoeys, W.; Usai, G.; van Hoorne, J. W.; Yang, P.; Yi, J.

2013-12-01

ALICE plans an upgrade of its Inner Tracking System for 2018. The development of a monolithic active pixel sensor for this upgrade is described. The TowerJazz 180 nm CMOS imaging sensor process has been chosen as it is possible to use full CMOS in the pixel due to the offering of a deep pwell and also to use different starting materials. The ALPIDE development is an alternative to approaches based on a rolling shutter architecture, and aims to reduce power consumption and integration time by an order of magnitude below the ALICE specifications, which would be quite beneficial in terms of material budget and background. The approach is based on an in-pixel binary front-end combined with a hit-driven architecture. Several prototypes have already been designed, submitted for fabrication and some of them tested with X-ray sources and particles in a beam. Analog power consumption has been limited by optimizing the Q/C of the sensor using Explorer chips. Promising but preliminary first results have also been obtained with a prototype ALPIDE. Radiation tolerance up to the ALICE requirements has also been verified.

Monolithic active pixel sensor development for the upgrade of the ALICE inner tracking system

International Nuclear Information System (INIS)

Aglieri, G; Cavicchioli, C; Hillemanns, H; Junique, A; Keil, M; Kugathasan, T; Mager, M; Tobon, C A Marin; Martinengo, P; Chalmet, P L; Mugnier, H; Chanlek, N; Collu, A; Marras, D; Giubilato, P; Mattiazzo, S; Kim, D; Kim, J; Lattuca, A; Mazza, G

2013-01-01

ALICE plans an upgrade of its Inner Tracking System for 2018. The development of a monolithic active pixel sensor for this upgrade is described. The TowerJazz 180 nm CMOS imaging sensor process has been chosen as it is possible to use full CMOS in the pixel due to the offering of a deep pwell and also to use different starting materials. The ALPIDE development is an alternative to approaches based on a rolling shutter architecture, and aims to reduce power consumption and integration time by an order of magnitude below the ALICE specifications, which would be quite beneficial in terms of material budget and background. The approach is based on an in-pixel binary front-end combined with a hit-driven architecture. Several prototypes have already been designed, submitted for fabrication and some of them tested with X-ray sources and particles in a beam. Analog power consumption has been limited by optimizing the Q/C of the sensor using Explorer chips. Promising but preliminary first results have also been obtained with a prototype ALPIDE. Radiation tolerance up to the ALICE requirements has also been verified

FED firmware interface testing with pixel phase 1 emulator

CERN Document Server

Kilpatrick, Matthew

2017-01-01

A hardware emulation of the CMS pixel detector phase 1 upgrade front-end electronics has been developed to test and validate the architecture of the back-end electronics (FED) firmware. The emulation is implemented on a Virtex 6 FPGA on the CERN GLIB uTCA platform, utilizing an 8-way SFP FPGA Mezzanine Card to drive compatible optical transmitters to the back-end electronics at 400 bps. The firmware emulates the complex functions of the phase 1 pixel readout chips (PSI46digv2 and PROC600) and token bit manager ASICs and allows for possible abnormalities that can occur in the output data stream. The emulation implements both fixed data patterns that are used as test vectors and realistic simulated data to drive the readout of the FED at the expected data and trigger rates. Testing software was developed to control the emulator and verify correct transmission of data and exception handling in the FED. An installation has been integrated into the pixel DAQ test system at CMS to be used for fast validation of F...

FED firmware interface testing with pixel phase 1 emulator

CERN Document Server

Kilpatrick, Matthew

2018-01-01

A hardware emulation of the CMS pixel detector phase 1 upgrade front-end electronics has been developed to test and validate the architecture of the back-end electronics (FED) firmware. The emulation is implemented on a Virtex 6 FPGA on the CERN GLIB uTCA platform, utilizing an 8-way SFP FPGA Mezzanine Card to drive compatible optical transmitters to the back-end electronics at 400 bps. The firmware emulates the complex functions of the phase 1 pixel readout chips (PSI46digv2 and PROC600) and token bit manager ASICs and allows for possible abnormalities that can occur in the output data stream. The emulation implements both fixed data patterns that are used as test vectors and realistic simulated data to drive the readout of the FED at the expected data and trigger rates. Testing software was developed to control the emulator and verify correct transmission of data and exception handling in the FED. An installation has been integrated into the pixel DAQ test system at CMS to be used for fast validation of F...

Conceptual design of 3D integrated pixel sensors for the innermost layer of the ILC vertex detector

International Nuclear Information System (INIS)

Fu, Y; Hu-Guo, C; Dorokhov, A; Zhao, W; Hu, Y; Torheim, O

2011-01-01

The paper presents a design of CMOS Pixel Sensor (CPS) using the vertical integration technology (3DIT), expected to alleviate the most essential limitations of 2D-CPS. Our objective is to develop an intelligent architecture in order to meet the requirements of the innermost layer of the International Linear Collider (ILC) vertex detectors, which are particularly demanding in spatial resolution of less than 3 μm and associated frame readout time of 10 μs. The sensor, with a pixel pitch of 23 μm, will be composed of 3-tiers Integrated Circuits (IC) with different functionalities: detection with in pixel analogue processing, pixel-level 3-bit Analogue to Digital Conversion (ADC) and fast parallel sparse readout.

Development of pixel front-end electronics using advanced deep submicron CMOS technologies

International Nuclear Information System (INIS)

Havranek, Miroslav

2014-09-01

The content of this thesis is oriented on the R and D of microelectronic integrated circuits for processing the signal from particle sensors and partially on the sensors themselves. This work is motivated by ongoing upgrades of the ATLAS Pixel Detector at CERN laboratory and by exploration of new technologies for the future experiments in particle physics. Evolution of technologies for the fabrication of microelectronic circuits follows Moore's laws. Transistors become smaller and electronic chips reach higher complexity. Apart from this, silicon foundries become more open to smaller customers and often provide non-standard process options. Two new directions in pixel technologies are explored in this thesis: design of pixel electronics using ultra deep submicron (65 nm) CMOS technology and Depleted Monolithic Active Pixel Sensors (DMAPS). An independent project concerning the measurement of pixel capacitance with a dedicated measurement chip is a part of this thesis. Pixel capacitance is one of the key parameters for design of the pixel front-end electronics and thus it is closely related to the content of the thesis. The theoretical background, aspects of chip design, performance of chip prototypes and prospect for design of large pixel chips are comprehensively described in five chapters of the thesis.

Development of pixel front-end electronics using advanced deep submicron CMOS technologies

Energy Technology Data Exchange (ETDEWEB)

Havranek, Miroslav

2014-09-15

The content of this thesis is oriented on the R and D of microelectronic integrated circuits for processing the signal from particle sensors and partially on the sensors themselves. This work is motivated by ongoing upgrades of the ATLAS Pixel Detector at CERN laboratory and by exploration of new technologies for the future experiments in particle physics. Evolution of technologies for the fabrication of microelectronic circuits follows Moore's laws. Transistors become smaller and electronic chips reach higher complexity. Apart from this, silicon foundries become more open to smaller customers and often provide non-standard process options. Two new directions in pixel technologies are explored in this thesis: design of pixel electronics using ultra deep submicron (65 nm) CMOS technology and Depleted Monolithic Active Pixel Sensors (DMAPS). An independent project concerning the measurement of pixel capacitance with a dedicated measurement chip is a part of this thesis. Pixel capacitance is one of the key parameters for design of the pixel front-end electronics and thus it is closely related to the content of the thesis. The theoretical background, aspects of chip design, performance of chip prototypes and prospect for design of large pixel chips are comprehensively described in five chapters of the thesis.

Optical data links for the ATLAS SCT and Pixel Detector

International Nuclear Information System (INIS)

Gregor, I.M.; Weidberg, A.R.; Lee, S.C.; Chu, M.L.; Teng, P.K.

2001-01-01

ATLAS (The ATLAS Technical Proposal, CERN/LHCC 94-33) is one of the large electronic particle detectors at LHC (The LHC Conceptual Design, Report- The Yellow Book, CERN/AC/95-05(LHC)) which will become operational in 2005. It is planned to use radiation tolerant optical links for the data transfer from the SemiConductor Tracker (SCT) (ATLAS Inner Detector Technical Proposal, CERN/LHCC 97-16 and CERN/LHCC 97-17). and Pixel Detector (ATLAS Pixel Detector Technical Proposal, CERN/LHCC 98-13) systems to the acquisition electronics over a distance up to 140m. The overall architecture and the performance of these optical data links are described. One of the three candidate designs for an on-detector Opto-Package is presented

CMOS Pixel Sensors for High Precision Beam Telescopes and Vertex Detectors

International Nuclear Information System (INIS)

Masi, R. de; Baudot, J.; Fontaine, J.-Ch.

2009-01-01

CMOS sensors of the MIMOSA (standing for Minimum Ionising particle MOS Active pixel sensor) series are developed at IPHC since a decade and have ended up with full scale devices used in beam telescopes and in demonstrators of future vertex detectors. The sensors deliver analogue, unfiltered, signals and are therefore limited to read-out frequencies of ∼ 1 kframe/s. Since a few years, a fast architecture is being developed in collaboration with IRFU, which aims to speed up the read-out by 1-2 orders of magnitude. The first full scale sensor based on this architecture was fabricated recently and is being tested. Made of 660,000 pixels (18 μm pitch) covering an active area of ∼ 2 cm 2 , it delivers zero-suppressed binary signals, which allow running at ∼ 10 kframes/s. It will equip the beam telescope of the E.U. project EUDET and serve as a forerunner of the sensor equipping the 2 layers of the PIXEL detector of the STAR experiment at RHIC. The contribution to the conference will overview the main features and test results of this pioneering sensor. It will next describe its evolution towards read-out frequencies approaching 100 kframes/s, as required for the vertex detectors of the CBM experiment at FAIR and at the ILC. Finally, the issue of radiation tolerance will be addressed, in the context of a newly available CMOS process using a depleted substrate. A prototype sensor was fabricated in a such CMOS process. The talk will summarise beam test results showing, for the first time, that fluences of 10 14 n eq /cm 2 may be tolerable for CMOS sensors. Overall, the talk provides an overview of the status and plans of CMOS pixel sensors at the frontier of their achievements and outreach. (author)

An efficient interpolation filter VLSI architecture for HEVC standard

Science.gov (United States)

Zhou, Wei; Zhou, Xin; Lian, Xiaocong; Liu, Zhenyu; Liu, Xiaoxiang

2015-12-01

The next-generation video coding standard of High-Efficiency Video Coding (HEVC) is especially efficient for coding high-resolution video such as 8K-ultra-high-definition (UHD) video. Fractional motion estimation in HEVC presents a significant challenge in clock latency and area cost as it consumes more than 40 % of the total encoding time and thus results in high computational complexity. With aims at supporting 8K-UHD video applications, an efficient interpolation filter VLSI architecture for HEVC is proposed in this paper. Firstly, a new interpolation filter algorithm based on the 8-pixel interpolation unit is proposed in this paper. It can save 19.7 % processing time on average with acceptable coding quality degradation. Based on the proposed algorithm, an efficient interpolation filter VLSI architecture, composed of a reused data path of interpolation, an efficient memory organization, and a reconfigurable pipeline interpolation filter engine, is presented to reduce the implement hardware area and achieve high throughput. The final VLSI implementation only requires 37.2k gates in a standard 90-nm CMOS technology at an operating frequency of 240 MHz. The proposed architecture can be reused for either half-pixel interpolation or quarter-pixel interpolation, which can reduce the area cost for about 131,040 bits RAM. The processing latency of our proposed VLSI architecture can support the real-time processing of 4:2:0 format 7680 × 4320@78fps video sequences.

Research and Development of Monolithic Active Pixel Sensors for the Detection of the Elementary Particles

International Nuclear Information System (INIS)

Li, Y.

2007-09-01

In order to develop high spatial resolution and readout speed vertex detectors for the future International Linear Collider (ILC), fast CMOS Monolithic Active Pixel Sensors (MAPS) are studied on this work. Two prototypes of MAPS, MIMOSA 8 and MIMOSA 16, based on the same micro-electronic architecture were developed in CMOS processes with different thickness of epitaxial layer. The size of pixel matrix is 32 x 128: 8 columns of the pixel array are readout directly with analog outputs and the other 24 columns are connected to the column level auto-zero discriminators. The Correlated Double Sampling (CDS) structures are successfully implemented inside pixel and discriminator. The photo diode type pixels with different diode sizes are used in these prototypes. With a 55 Fe X-ray radioactive source, the important parameters, such as Temporal Noise, Fixed Pattern Noise (FPN), Signal-to-Noise Ratio (SNR), Charge-to-Voltage conversion Factor (CVF) and Charge Collection Efficiency (CCE), are studied as function of readout speed and diode size. For MIMOSA 8, the effect of fast neutrons irradiation is also. Two beam tests campaigns were made: at DESY with a 5 GeV electrons beam and at CERN with a 180 GeV pions beam. Detection Efficiency and Spatial Resolution are studied in function of the discriminator threshold. For these two parameters, the influences of diode size and SNR of the central pixel of a cluster are also discussed. In order to improve the spatial resolution of the digital outputs, a very compact (25 μm x 1 mm) and low consumption (300 μW) column level ADC is designed in AMS 0.35 μm OPTO process. Based on successive approximation architecture, the auto-offset cancellation structure is integrated. A new column level auto-zero discriminator using static latch is also designed. (author)

A Prototype of a New Generation Readout ASIC in 65 nm CMOS for Pixel Detectors at HL-LHC

CERN Document Server

Pacher, L.; Paternò, A; Panati, S; Demaria, L; Rivetti, A; Da Rocha Rolo, M; Dellacasa, G; Mazza, G; Rotondo, F; Wheadon, R; Loddo, F; Licciulli, F; Ciciriello, F; Marzocca, C; Gaioni, L; Traversi, G; Re, V; De Canio, F; Ratti, L; Marconi, S; Placidi, P; Magazzù, G; Stabile, A; Mattiazzo, S

2018-01-01

The prototype is composed of a matrix of 64×64 pixels with 50 μm × 50 μm cells featuring a compact design, low-noise and low-power performance. The pixel array integrates two diffe- rent analogue front-end architectures working in parallel, one with asynchronous and one with synchronous hit discriminators. Common characteristics are a compact layout able to fit int...

Development of radiation hard CMOS active pixel sensors for HL-LHC

International Nuclear Information System (INIS)

Pernegger, Heinz

2016-01-01

New pixel detectors, based on commercial high voltage and/or high resistivity full CMOS processes, hold promise as next-generation active pixel sensors for inner and intermediate layers of the upgraded ATLAS tracker. The use of commercial CMOS processes allow cost-effective detector construction and simpler hybridisation techniques. The paper gives an overview of the results obtained on AMS-produced CMOS sensors coupled to the ATLAS Pixel FE-I4 readout chips. The SOI (silicon-on-insulator) produced sensors by XFAB hold great promise as radiation hard SOI-CMOS sensors due to their combination of partially depleted SOI transistors reducing back-gate effects. The test results include pre-/post-irradiation comparison, measurements of charge collection regions as well as test beam results.

Monolithic pixel development in TowerJazz 180 nm CMOS for the outer pixel layers in the ATLAS experiment

Science.gov (United States)

Berdalovic, I.; Bates, R.; Buttar, C.; Cardella, R.; Egidos Plaja, N.; Hemperek, T.; Hiti, B.; van Hoorne, J. W.; Kugathasan, T.; Mandic, I.; Maneuski, D.; Marin Tobon, C. A.; Moustakas, K.; Musa, L.; Pernegger, H.; Riedler, P.; Riegel, C.; Schaefer, D.; Schioppa, E. J.; Sharma, A.; Snoeys, W.; Solans Sanchez, C.; Wang, T.; Wermes, N.

2018-01-01

The upgrade of the ATLAS tracking detector (ITk) for the High-Luminosity Large Hadron Collider at CERN requires the development of novel radiation hard silicon sensor technologies. Latest developments in CMOS sensor processing offer the possibility of combining high-resistivity substrates with on-chip high-voltage biasing to achieve a large depleted active sensor volume. We have characterised depleted monolithic active pixel sensors (DMAPS), which were produced in a novel modified imaging process implemented in the TowerJazz 180 nm CMOS process in the framework of the monolithic sensor development for the ALICE experiment. Sensors fabricated in this modified process feature full depletion of the sensitive layer, a sensor capacitance of only a few fF and radiation tolerance up to 1015 neq/cm2. This paper summarises the measurements of charge collection properties in beam tests and in the laboratory using radioactive sources and edge TCT. The results of these measurements show significantly improved radiation hardness obtained for sensors manufactured using the modified process. This has opened the way to the design of two large scale demonstrators for the ATLAS ITk. To achieve a design compatible with the requirements of the outer pixel layers of the tracker, a charge sensitive front-end taking 500 nA from a 1.8 V supply is combined with a fast digital readout architecture. The low-power front-end with a 25 ns time resolution exploits the low sensor capacitance to reduce noise and analogue power, while the implemented readout architectures minimise power by reducing the digital activity.

High accuracy injection circuit for the calibration of a large pixel sensor matrix

International Nuclear Information System (INIS)

Quartieri, E.; Comotti, D.; Manghisoni, M.

2013-01-01

Semiconductor pixel detectors, for particle tracking and vertexing in high energy physics experiments as well as for X-ray imaging, in particular for synchrotron light sources and XFELs, require a large area sensor matrix. This work will discuss the design and the characterization of a high-linearity, low dispersion injection circuit to be used for pixel-level calibration of detector readout electronics in a large pixel sensor matrix. The circuit provides a useful tool for the characterization of the readout electronics of the pixel cell unit for both monolithic active pixel sensors and hybrid pixel detectors. In the latter case, the circuit allows for precise analogue test of the readout channel already at the chip level, when no sensor is connected. Moreover, it provides a simple means for calibration of readout electronics once the detector has been connected to the chip. Two injection techniques can be provided by the circuit: one for a charge sensitive amplification and the other for a transresistance readout channel. The aim of the paper is to describe the architecture and the design guidelines of the calibration circuit, which has been implemented in a 130 nm CMOS technology. Moreover, experimental results of the proposed injection circuit will be presented in terms of linearity and dispersion

Design and Characterization of 64K Pixels Chips Working in Single Photon Processing Mode

CERN Document Server

Llopart Cudie, Xavier; Campbell, M

2007-01-01

Progress in CMOS technology and in fine pitch bump bonding has made possible the development of high granularity single photon counting detectors for X-ray imaging. This thesis studies the design and characterization of three pulse processing chips with 65536 square pixels of 55 µm x 55 µm designed in a commercial 0.25 µm 6-metal CMOS technology. The 3 chips share the same architecture and dimensions and are named Medipix2, Mpix2MXR20 and Timepix. The Medipix2 chip is a pixel detector readout chip consisting of 256 x 256 identical elements, each working in single photon counting mode for positive or negative input charge signals. The preamplifier feedback provides compensation for detector leakage current on a pixel by pixel basis. Two identical pulse height discriminators are used to define an energy window. Every event falling inside the energy window is counted with a 13 bit pseudo-random counter. The counter logic, based in a shift register, also behaves as the input/output register for the pixel. Each...

GigaTracker, a Thin and Fast Silicon Pixels Tracker

CERN Document Server

Velghe, Bob; Bonacini, Sandro; Ceccucci, Augusto; Kaplon, Jan; Kluge, Alexander; Mapelli, Alessandro; Morel, Michel; Noël, Jérôme; Noy, Matthew; Perktold, Lukas; Petagna, Paolo; Poltorak, Karolina; Riedler, Petra; Romagnoli, Giulia; Chiozzi, Stefano; Cotta Ramusino, Angelo; Fiorini, Massimiliano; Gianoli, Alberto; Petrucci, Ferruccio; Wahl, Heinrich; Arcidiacono, Roberta; Jarron, Pierre; Marchetto, Flavio; Gil, Eduardo Cortina; Nuessle, Georg; Szilasi, Nicolas

2014-01-01

GigaTracker, the NA62’s upstream spectrometer, plays a key role in the kinematically constrained background suppression for the study of the K + ! p + n ̄ n decay. It is made of three independent stations, each of which is a six by three cm 2 hybrid silicon pixels detector. To meet the NA62 physics goals, GigaTracker has to address challenging requirements. The hit time resolution must be better than 200 ps while keeping the total thickness of the sensor to less than 0.5 mm silicon equivalent. The 200 μm thick sensor is divided into 18000 300 μm 300 μm pixels bump-bounded to ten independent read-out chips. The chips use an end-of-column architecture and rely on time-over- threshold discriminators. A station can handle a crossing rate of 750 MHz. Microchannel cooling technology will be used to cool the assembly. It allows us to keep the sensor close to 0 C with 130 μm of silicon in the beam area. The sensor and read-out chip performance were validated using a 45 pixel demonstrator with a laser test setu...

Device Simulation of Monolithic Active Pixel Sensors: Radiation Damage Effects

International Nuclear Information System (INIS)

Fourches, N.T.

2009-01-01

Vertexing for the future International Linear Collider represents a challenging goal because of the high spatial resolution required with low material budget and high ionizing radiation tolerance. CMOS Monolithic Active Pixel Sensors (MAPS) represent a good potential solution for this purpose. Up to now many MAPS sensors have been developed. They are based on various architectures and manufactured in different processes. However, up so far, the sensor diode has not been the subject of extensive modelization and simulation. Published simulation studies of sensor-signal formation have been less numerous than measurements on real sensors. This is a cause for concern because such sensor is physically based on the partially depleted diode, in the vicinity of which the electric field collects the minority carriers generated by an incident MIP (minimum ionizing particle). Although the microscopic mechanisms are well known and modelled, the global physical mechanisms for signal formation are not very rigorously established. This is partly due to the presence of a predominant diffusion component in the charge transport. We present here simulations mainly based on the S-PISCES code, in which physical mechanisms affecting transport are taken into account. Diffusion, influence of residual carrier concentration due to the doping level in the sensitive volume, and more importantly charge trapping due to deep levels in the active (detecting) layer are studied together with geometric aspects. The effect of neutron irradiation is studied to assess the effects of deep traps. A comparison with available experimental data, obtained on processed MAPS before or after neutron irradiation will be introduced. Simulated reconstruction of the Minimum Ionizing Particle (MIP) point of impact in two dimensions is also investigated. For further steps, guidelines for process choices of next Monolithic Active Pixel Sensors are introduced. (authors)

Design and realization of a fast low noise electronics for a hybrid pixel X-ray detector dedicated to small animal imaging

International Nuclear Information System (INIS)

Chantepie, B.

2008-12-01

Since the invention of computerized tomography (CT), charge integration detector were widely employed for X-ray biomedical imaging applications. Nevertheless, other options exist. A new technology of direct detection using semiconductors has been developed for high energy physics instrumentation. This new technology, called hybrid pixel detector, works in photon counting mode and allows for selecting the minimum energy of the counted photons. The ImXgam research team at CPPM develops the PIXSCAN demonstrator, a CT-scanner using the hybrid pixel detector XPAD. The aim of this project is to evaluate the improvement in image quality and in dose delivered during X-ray examinations of a small animal. After a first prototype of a hybrid pixel detector XPAD1 proving the feasibility of the project, a complete imager XPAD2 was designed and integrated in the PIXSCAN demonstrator. Since then, with the evolution of microelectronic industry, important improvements are conceivable. To reducing the size of pixels and to improving the energy resolution of detectors, a third design XPAD3 was conceived and will be soon integrated in a second generation of PIXSCAN demonstrator. In this project, my thesis work consisted in taking part to the design of the detector readout electronics, to the characterization of the chips and of the hybrid pixel detectors, and also to the definition of a auto-zeroing architecture for pixels. The first and second chapters present X-ray medical imaging and particle detection with semi-conductors and its modelling. The third chapter deals with the specifications of electronic circuits for imaging applications first for analog pixels then for digital pixels and describes the general architecture of the integrated circuits. The validation tests are presented in the fourth chapter while the last chapter gives an account of expected changes in pixel electronics

Analysis and Design of a Context Adaptable SAD/MSE Architecture

Directory of Open Access Journals (Sweden)

Arvind Sudarsanam

2009-01-01

Full Text Available Design of flexible multimedia accelerators that can cater to multiple algorithms is being aggressively pursued in the media processors community. Such an approach is justified in the era of sub-45 nm technology where an increasingly dominating leakage power component is forcing designers to make the best possible use of on-chip resources. In this paper we present an analysis of two commonly used window-based operations (sum of absolute differences and mean squared error across a variety of search patterns and block sizes (2×3, 5×5, etc.. We propose a context adaptable architecture that has (i configurable 2D systolic array and (ii 2D Configurable Register Array (CRA. CRA can cater to variable pixel access patterns while reusing fetched pixels across search windows. Benefits of proposed architecture when compared to 15 other published architectures are adaptability, high throughput, and low latency at a cost of increased footprint, when ported on a Xilinx FPGA.

How spectroscopic x-ray imaging benefits from inter-pixel communication

CERN Document Server

Koenig, Thomas; Hamann, Elias; Cecilia, Angelica; Ballabriga, Rafael; Campbell, Michael; Ruat, Marie; Tlustos, Lukas; Fauler, Alex; Fiederle, Michael; Baumbach, Tilo

2014-01-01

Spectroscopic x-ray imaging based on pixellated semiconductor detectors can be sensitive to charge sharing and K-fluorescence, depending on the sensor material used, its thickness and the pixel pitch employed. As a consequence, spectroscopic resolution is partially lost. In this paper, we study a new detector ASIC, the Medipix3RX, that offers a novel feature called charge summing, which is established by making adjacent pixels communicate with each other. Consequently, single photon interactions resulting in multiple hits are almost completely avoided. We investigate this charge summing mode with respect to those of its imaging properties that are of interest in medical physics and benchmark them against the case without charge summing. In particular, we review its influence on spectroscopic resolution and find that the low energy bias normally present when recording energy spectra is dramatically reduced. Furthermore, we show that charge summing provides a modulation transfer function which is almost indepen...

Architecture Of High Speed Image Processing System

Science.gov (United States)

Konishi, Toshio; Hayashi, Hiroshi; Ohki, Tohru

1988-01-01

One of architectures for a high speed image processing system which corresponds to a new algorithm for a shape understanding is proposed. And the hardware system which is based on the archtecture was developed. Consideration points of the architecture are mainly that using processors should match with the processing sequence of the target image and that the developed system should be used practically in an industry. As the result, it was possible to perform each processing at a speed of 80 nano-seconds a pixel.

Development of Fast and High Precision CMOS Pixel Sensors for an ILC Vertex Detector

CERN Document Server

Hu-Guo, Christine

2010-01-01

The development of CMOS pixel sensors with column parallel read-out and integrated zero-suppression has resulted in a full size, nearly 1 Megapixel, prototype with ~100 \\mu s read-out time. Its performances are quite close to the ILD vertex detector specifications, showing that the sensor architecture can presumably be evolved to meet these specifications exactly. Starting from the existing architecture and achieved performances, the paper will expose the details of how the sensor will be evolved in the coming 2-3 years in perspective of the ILD Detector Baseline Document, to be delivered in 2012. Two different devices are foreseen for this objective, one being optimized for the inner layers and their fast read-out requirement, while the other exploits the dimmed background in the outer layers to reduce the power consumption. The sensor evolution relies on a high resistivity epitaxial layer, on the use of an advanced CMOS process and on the combination of column-level ADCs with a pixel array. The paper will p...

Diamond Pixel Detectors

International Nuclear Information System (INIS)

Adam, W.; Berdermann, E.; Bergonzo, P.; Bertuccio, G.; Bogani, F.; Borchi, E.; Brambilla, A.; Bruzzi, M.; Colledani, C.; Conway, J.; D'Angelo, P.; Dabrowski, W.; Delpierre, P.; Deneuville, A.; Doroshenko, J.; Dulinski, W.; Eijk, B. van; Fallou, A.; Fizzotti, F.; Foster, J.; Foulon, F.; Friedl, M.; Gan, K.K.; Gheeraert, E.; Gobbi, B.; Grim, G.P.; Hallewell, G.; Han, S.; Hartjes, F.; Hrubec, J.; Husson, D.; Kagan, H.; Kania, D.; Kaplon, J.; Kass, R.; Koeth, T.; Krammer, M.; Lander, R.; Logiudice, A.; Lu, R.; Lynne, L.M.; Manfredotti, C.; Meier, D.; Mishina, M.; Moroni, L.; Oh, A.; Pan, L.S.; Pernicka, M.; Perera, L.; Pirollo, S.; Plano, R.; Procario, M.; Riester, J.L.; Roe, S.; Rott, C.; Rousseau, L.; Rudge, A.; Russ, J.; Sala, S.; Sampietro, M.; Schnetzer, S.; Sciortino, S.; Stelzer, H.; Stone, R.; Suter, B.; Tapper, R.J.; Tesarek, R.; Trischuk, W.; Tromson, D.; Vittone, E.; Wedenig, R.; Weilhammer, P.; White, C.; Zeuner, W.; Zoeller, M.

2001-01-01

Diamond based pixel detectors are a promising radiation-hard technology for use at the LHC. We present first results on a CMS diamond pixel sensor. With a threshold setting of 2000 electrons, an average pixel efficiency of 78% was obtained for normally incident minimum ionizing particles

Diamond Pixel Detectors

Energy Technology Data Exchange (ETDEWEB)

Adam, W.; Berdermann, E.; Bergonzo, P.; Bertuccio, G.; Bogani, F.; Borchi, E.; Brambilla, A.; Bruzzi, M.; Colledani, C.; Conway, J.; D' Angelo, P.; Dabrowski, W.; Delpierre, P.; Deneuville, A.; Doroshenko, J.; Dulinski, W.; Eijk, B. van; Fallou, A.; Fizzotti, F.; Foster, J.; Foulon, F.; Friedl, M.; Gan, K.K.; Gheeraert, E.; Gobbi, B.; Grim, G.P.; Hallewell, G.; Han, S.; Hartjes, F.; Hrubec, J.; Husson, D.; Kagan, H.; Kania, D.; Kaplon, J.; Kass, R.; Koeth, T.; Krammer, M.; Lander, R.; Logiudice, A.; Lu, R.; Lynne, L.M.; Manfredotti, C.; Meier, D.; Mishina, M.; Moroni, L.; Oh, A.; Pan, L.S.; Pernicka, M.; Perera, L. E-mail: perera@physics.rutgers.edu; Pirollo, S.; Plano, R.; Procario, M.; Riester, J.L.; Roe, S.; Rott, C.; Rousseau, L.; Rudge, A.; Russ, J.; Sala, S.; Sampietro, M.; Schnetzer, S.; Sciortino, S.; Stelzer, H.; Stone, R.; Suter, B.; Tapper, R.J.; Tesarek, R.; Trischuk, W.; Tromson, D.; Vittone, E.; Wedenig, R.; Weilhammer, P.; White, C.; Zeuner, W.; Zoeller, M

2001-06-01

Diamond based pixel detectors are a promising radiation-hard technology for use at the LHC. We present first results on a CMS diamond pixel sensor. With a threshold setting of 2000 electrons, an average pixel efficiency of 78% was obtained for normally incident minimum ionizing particles.

Si and gaas pixel detectors for medical imaging applications

International Nuclear Information System (INIS)

Bisogni, M. G.

2001-01-01

As the use of digital radiographic equipment in the morphological imaging field is becoming the more and more diffuse, the research of new and more performing devices from public institutions and industrial companies is in constant progress. Most of these devices are based on solid-state detectors as X-ray sensors. Semiconductor pixel detectors, originally developed in the high energy physics environment, have been then proposed as digital detector for medical imaging applications. In this paper a digital single photon counting device, based on silicon and GaAs pixel detector, is presented. The detector is a thin slab of semiconductor crystal where an array of 64 by 64 square pixels, 170- m side, has been built on one side. The data read-out is performed by a VLSI integrated circuit named Photon Counting Chip (PCC), developed within the MEDIPIX collaboration. Each chip cell geometrically matches the sensor pixel. It contains a charge preamplifier, a threshold comparator and a 15 bits pseudo-random counter and it is coupled to the detector by means of bump bonding. Most important advantages of such system, with respect to a traditional X-rays film/screen device, are the wider linear dynamic range (3x104) and the higher performance in terms of MTF and DQE. Besides the single photon counting architecture allows to detect image contrasts lower than 3%. Electronics read-out performance as well as imaging capabilities of the digital device will be presented. Images of mammographic phantoms acquired with a standard Mammographic tube will be compared with radiographs obtained with traditional film/screen systems

A smart-pixel holographic competitive learning network

Science.gov (United States)

Slagle, Timothy Michael

Neural networks are adaptive classifiers which modify their decision boundaries based on feedback from externally- or internally-generated error signals. Optics is an attractive technology for neural network implementation because it offers the possibility of parallel, nearly instantaneous computation of the weighted neuron inputs by the propagation of light through the optical system. Using current optical device technology, system performance levels of 3 × 1011 connection updates per second can be achieved. This thesis presents an architecture for an optical competitive learning network which offers advantages over previous optical implementations, including smart-pixel-based optical neurons, phase- conjugate self-alignment of a single neuron plane, and high-density, parallel-access weight storage, interconnection, and learning in a volume hologram. The competitive learning algorithm with modifications for optical implementation is described, and algorithm simulations are performed for an example problem. The optical competitive learning architecture is then introduced. The optical system is simulated using the ``beamprop'' algorithm at the level of light propagating through the system components, and results showing competitive learning operation in agreement with the algorithm simulations are presented. The optical competitive learning requires a non-linear, non-local ``winner-take-all'' (WTA) neuron function. Custom-designed smart-pixel WTA neuron arrays were fabricated using CMOS VLSI/liquid crystal technology. Results of laboratory tests of the WTA arrays' switching characteristics, time response, and uniformity are then presented. The system uses a phase-conjugate mirror to write the self-aligning interconnection weight holograms, and energy gain is required from the reflection to minimize erasure of the existing weights. An experimental system for characterizing the PCM response is described. Useful gains of 20 were obtained with a polarization

PIXEL 2010 - A Resume

International Nuclear Information System (INIS)

Wermes, N.

2011-01-01

The Pixel 2010 conference focused on semiconductor pixel detectors for particle tracking/vertexing as well as for imaging, in particular for synchrotron light sources and XFELs. The big LHC hybrid pixel detectors have impressively started showing their capabilities. X-ray imaging detectors, also using the hybrid pixel technology, have greatly advanced the experimental possibilities for diffraction experiments. Monolithic or semi-monolithic devices like CMOS active pixels and DEPFET pixels have now reached a state such that complete vertex detectors for RHIC and superKEKB are being built with these technologies. Finally, new advances towards fully monolithic active pixel detectors, featuring full CMOS electronics merged with efficient signal charge collection, exploiting standard CMOS technologies, SOI and/or 3D integration, show the path for the future. This resume attempts to extract the main statements of the results and developments presented at this conference.

Optimization of detector pixel size for stent visualization in x-ray fluoroscopy

International Nuclear Information System (INIS)

Jiang Yuhao; Wilson, David L.

2006-01-01

Pixel size is of great interest in the flat-panel detector design because of its potential impact on image quality. In the particular case of angiographic x-ray fluoroscopy, small pixels are required in order to adequately visualize interventional devices such as guidewires and stents which have wire diameters as small as 200 and 50 μm, respectively. We used quantitative experimental and modeling techniques to investigate the optimal pixel size for imaging stents. Image quality was evaluated by the ability of subjects to perform two tasks: detect the presence of a stent and discriminate a partially deployed stent from a fully deployed one in synthetic images. With measurements at 50, 100, 200, and 300 μm, the 100 μm pixel size gave the maximum contrast sensitivity for the detection experiment with the idealized direct detector. For an idealized indirect detector with a scintillating layer, an optimal pixel size was obtained at 200 μm pixel size. A channelized human observer model predicted a peak at 150 and 170 μm, for the idealized direct and indirect detectors, respectively. With regard to the stent deployment task for both detector types, smaller pixel sizes are favored and there is a steep drop in performance with larger pixels. In general, with the increasing exposures, the model and measurements give the enhanced contrast sensitivities and a smaller optimal pixel size. The effects of electronic noise and fill factor were investigated using the model. We believe that the experimental results and human observer model predications can help guide the flat-panel detector design. In addition, the human observer model should work on the similar images and be applicable to the future model and actual flat-panel implementations

Operational experience with the CMS pixel detector in LHC Run II

CERN Document Server

Karancsi, Janos

2016-01-01

The CMS pixel detector was repaired successfully, calibrated and commissioned for the second run of Large Hadron Collider during the first long shutdown between 2013 and 2015. The replaced pixel modules were calibrated separately and show the expected behavior of an un-irradiated detector. In 2015, the system performed very well with an even improved spatial resolution compared to 2012. During this time, the operational team faced various challenges including the loss of a sector in one half shell which was only partially recovered. In 2016, the detector is expected to withstand instantaneous luminosities beyond the design limits and will need a combined effort of both online and offline teams in order to provide the high quality data that is required to reach the physics goals of CMS. We present the operational experience gained during the second run of the LHC and show the latest performance results of the CMS pixel detector.

Prevalence of pure versus mixed snow cover pixels across spatial resolutions in alpine environments: implications for binary and fractional remote sensing approaches

Science.gov (United States)

Selkowitz, David J.; Forster, Richard; Caldwell, Megan K.

2014-01-01

Remote sensing of snow-covered area (SCA) can be binary (indicating the presence/absence of snow cover at each pixel) or fractional (indicating the fraction of each pixel covered by snow). Fractional SCA mapping provides more information than binary SCA, but is more difficult to implement and may not be feasible with all types of remote sensing data. The utility of fractional SCA mapping relative to binary SCA mapping varies with the intended application as well as by spatial resolution, temporal resolution and period of interest, and climate. We quantified the frequency of occurrence of partially snow-covered (mixed) pixels at spatial resolutions between 1 m and 500 m over five dates at two study areas in the western U.S., using 0.5 m binary SCA maps derived from high spatial resolution imagery aggregated to fractional SCA at coarser spatial resolutions. In addition, we used in situ monitoring to estimate the frequency of partially snow-covered conditions for the period September 2013–August 2014 at 10 60-m grid cell footprints at two study areas with continental snow climates. Results from the image analysis indicate that at 40 m, slightly above the nominal spatial resolution of Landsat, mixed pixels accounted for 25%–93% of total pixels, while at 500 m, the nominal spatial resolution of MODIS bands used for snow cover mapping, mixed pixels accounted for 67%–100% of total pixels. Mixed pixels occurred more commonly at the continental snow climate site than at the maritime snow climate site. The in situ data indicate that some snow cover was present between 186 and 303 days, and partial snow cover conditions occurred on 10%–98% of days with snow cover. Four sites remained partially snow-free throughout most of the winter and spring, while six sites were entirely snow covered throughout most or all of the winter and spring. Within 60 m grid cells, the late spring/summer transition from snow-covered to snow-free conditions lasted 17–56 days and averaged 37

Dual-gate photo thin-film transistor: a “smart” pixel for high- resolution and low-dose X-ray imaging

Science.gov (United States)

Wang, Kai; Ou, Hai; Chen, Jun

2015-06-01

Since its emergence a decade ago, amorphous silicon flat panel X-ray detector has established itself as a ubiquitous platform for an array of digital radiography modalities. The fundamental building block of a flat panel detector is called a pixel. In all current pixel architectures, sensing, storage, and readout are unanimously kept separate, inevitably compromising resolution by increasing pixel size. To address this issue, we hereby propose a “smart” pixel architecture where the aforementioned three components are combined in a single dual-gate photo thin-film transistor (TFT). In other words, the dual-gate photo TFT itself functions as a sensor, a storage capacitor, and a switch concurrently. Additionally, by harnessing the amplification effect of such a thin-film transistor, we for the first time created a single-transistor active pixel sensor. The proof-of-concept device had a W/L ratio of 250μm/20μm and was fabricated using a simple five-mask photolithography process, where a 130nm transparent ITO was used as the top photo gate, and a 200nm amorphous silicon as the absorbing channel layer. The preliminary results demonstrated that the photocurrent had been increased by four orders of magnitude due to light-induced threshold voltage shift in the sub-threshold region. The device sensitivity could be simply tuned by photo gate bias to specifically target low-level light detection. The dependence of threshold voltage on light illumination indicated that a dynamic range of at least 80dB could be achieved. The "smart" pixel technology holds tremendous promise for developing high-resolution and low-dose X-ray imaging and may potentially lower the cancer risk imposed by radiation, especially among paediatric patients.

Dual-gate photo thin-film transistor: a “smart” pixel for high- resolution and low-dose X-ray imaging

International Nuclear Information System (INIS)

Wang, Kai; Ou, Hai; Chen, Jun

2015-01-01

Since its emergence a decade ago, amorphous silicon flat panel X-ray detector has established itself as a ubiquitous platform for an array of digital radiography modalities. The fundamental building block of a flat panel detector is called a pixel. In all current pixel architectures, sensing, storage, and readout are unanimously kept separate, inevitably compromising resolution by increasing pixel size. To address this issue, we hereby propose a “smart” pixel architecture where the aforementioned three components are combined in a single dual-gate photo thin-film transistor (TFT). In other words, the dual-gate photo TFT itself functions as a sensor, a storage capacitor, and a switch concurrently. Additionally, by harnessing the amplification effect of such a thin-film transistor, we for the first time created a single-transistor active pixel sensor. The proof-of-concept device had a W/L ratio of 250μm/20μm and was fabricated using a simple five-mask photolithography process, where a 130nm transparent ITO was used as the top photo gate, and a 200nm amorphous silicon as the absorbing channel layer. The preliminary results demonstrated that the photocurrent had been increased by four orders of magnitude due to light-induced threshold voltage shift in the sub-threshold region. The device sensitivity could be simply tuned by photo gate bias to specifically target low-level light detection. The dependence of threshold voltage on light illumination indicated that a dynamic range of at least 80dB could be achieved. The 'smart' pixel technology holds tremendous promise for developing high-resolution and low-dose X-ray imaging and may potentially lower the cancer risk imposed by radiation, especially among paediatric patients. (paper)

Single-pixel optical sensing architecture for compressive hyperspectral imaging

Directory of Open Access Journals (Sweden)

Hoover Fabián Rueda-Chacón

2014-01-01

Full Text Available Los sistemas de sensado de imágenes espectrales (CSI capturan información tridimensional (3D de una escena usando mediciones codificadas en dos dimensiones (2D. Estas mediciones son procesadas posteriormente por un algoritmo de optimización para obtener una estimación de la información tridimensional. La calidad de las reconstrucciones obtenidas depende altamente de la resolución del detector, cuyo costo aumenta exponencialmente a mayor resolución exhiba. Así, reconstrucciones de alta resolución son requeridas, pero a bajo costo. Este artículo propone una arquitectura óptica de sensado compresivo que utiliza un único pixel como detector para la captura y reconstrucción de imágenes hiperespectrales. Esta arquitectura óptica depende del uso de múltiples capturas de imágenes procesadas por medio de dos aperturas codificadas que varían en cada toma, y un elemento de dispersión. Diferentes simulaciones con 2 bases de datos distintas muestran resultados promisorios que permiten reconstruir una imagen hiperespectral utilizando tan solo el 30% de los vóxeles de la imagen original.

Hot pixel generation in active pixel sensors: dosimetric and micro-dosimetric response

Science.gov (United States)

Scheick, Leif; Novak, Frank

2003-01-01

The dosimetric response of an active pixel sensor is analyzed. heavy ions are seen to damage the pixel in much the same way as gamma radiation. The probability of a hot pixel is seen to exhibit behavior that is not typical with other microdose effects.

Digital Particle Image Velocimetry: Partial Image Error (PIE)

International Nuclear Information System (INIS)

Anandarajah, K; Hargrave, G K; Halliwell, N A

2006-01-01

This paper quantifies the errors due to partial imaging of seeding particles which occur at the edges of interrogation regions in Digital Particle Image Velocimetry (DPIV). Hitherto, in the scientific literature the effect of these partial images has been assumed to be negligible. The results show that the error is significant even at a commonly used interrogation region size of 32 x 32 pixels. If correlation of interrogation region sizes of 16 x 16 pixels and smaller is attempted, the error which occurs can preclude meaningful results being obtained. In order to reduce the error normalisation of the correlation peak values is necessary. The paper introduces Normalisation by Signal Strength (NSS) as the preferred means of normalisation for optimum accuracy. In addition, it is shown that NSS increases the dynamic range of DPIV

Development of a 750x750 pixels CMOS imager sensor for tracking applications

Science.gov (United States)

Larnaudie, Franck; Guardiola, Nicolas; Saint-Pé, Olivier; Vignon, Bruno; Tulet, Michel; Davancens, Robert; Magnan, Pierre; Corbière, Franck; Martin-Gonthier, Philippe; Estribeau, Magali

2017-11-01

Solid-state optical sensors are now commonly used in space applications (navigation cameras, astronomy imagers, tracking sensors...). Although the charge-coupled devices are still widely used, the CMOS image sensor (CIS), which performances are continuously improving, is a strong challenger for Guidance, Navigation and Control (GNC) systems. This paper describes a 750x750 pixels CMOS image sensor that has been specially designed and developed for star tracker and tracking sensor applications. Such detector, that is featuring smart architecture enabling very simple and powerful operations, is built using the AMIS 0.5μm CMOS technology. It contains 750x750 rectangular pixels with 20μm pitch. The geometry of the pixel sensitive zone is optimized for applications based on centroiding measurements. The main feature of this device is the on-chip control and timing function that makes the device operation easier by drastically reducing the number of clocks to be applied. This powerful function allows the user to operate the sensor with high flexibility: measurement of dark level from masked lines, direct access to the windows of interest… A temperature probe is also integrated within the CMOS chip allowing a very precise measurement through the video stream. A complete electro-optical characterization of the sensor has been performed. The major parameters have been evaluated: dark current and its uniformity, read-out noise, conversion gain, Fixed Pattern Noise, Photo Response Non Uniformity, quantum efficiency, Modulation Transfer Function, intra-pixel scanning. The characterization tests are detailed in the paper. Co60 and protons irradiation tests have been also carried out on the image sensor and the results are presented. The specific features of the 750x750 image sensor such as low power CMOS design (3.3V, power consumption<100mW), natural windowing (that allows efficient and robust tracking algorithms), simple proximity electronics (because of the on

Two-dimensional systolic-array architecture for pixel-level vision tasks

Science.gov (United States)

Vijverberg, Julien A.; de With, Peter H. N.

2010-05-01

This paper presents ongoing work on the design of a two-dimensional (2D) systolic array for image processing. This component is designed to operate on a multi-processor system-on-chip. In contrast with other 2D systolic-array architectures and many other hardware accelerators, we investigate the applicability of executing multiple tasks in a time-interleaved fashion on the Systolic Array (SA). This leads to a lower external memory bandwidth and better load balancing of the tasks on the different processing tiles. To enable the interleaving of tasks, we add a shadow-state register for fast task switching. To reduce the number of accesses to the external memory, we propose to share the communication assist between consecutive tasks. A preliminary, non-functional version of the SA has been synthesized for an XV4S25 FPGA device and yields a maximum clock frequency of 150 MHz requiring 1,447 slices and 5 memory blocks. Mapping tasks from video content-analysis applications from literature on the SA yields reductions in the execution time of 1-2 orders of magnitude compared to the software implementation. We conclude that the choice for an SA architecture is useful, but a scaled version of the SA featuring less logic with fewer processing and pipeline stages yielding a lower clock frequency, would be sufficient for a video analysis system-on-chip.

From hybrid to CMOS pixels ... a possibility for LHC's pixel future?

International Nuclear Information System (INIS)

Wermes, N.

2015-01-01

Hybrid pixel detectors have been invented for the LHC to make tracking and vertexing possible at all in LHC's radiation intense environment. The LHC pixel detectors have meanwhile very successfully fulfilled their promises and R and D for the planned HL-LHC upgrade is in full swing, targeting even higher ionising doses and non-ionising fluences. In terms of rate and radiation tolerance hybrid pixels are unrivaled. But they have disadvantages as well, most notably material thickness, production complexity, and cost. Meanwhile also active pixel sensors (DEPFET, MAPS) have become real pixel detectors but they would by far not stand the rates and radiation faced from HL-LHC. New MAPS developments, so-called DMAPS (depleted MAPS) which are full CMOS-pixel structures with charge collection in a depleted region have come in the R and D focus for pixels at high rate/radiation levels. This goal can perhaps be realised exploiting HV technologies, high ohmic substrates and/or SOI based technologies. The paper covers the main ideas and some encouraging results from prototyping R and D, not hiding the difficulties

3D-FBK Pixel sensors: recent beam tests results with irradiated devices

CERN Document Server

Micelli, A; Sandaker, H; Stugu, B; Barbero, M; Hugging, F; Karagounis, M; Kostyukhin, V; Kruger, H; Tsung, J W; Wermes, N; Capua, M; Fazio, S; Mastroberardino, A; Susinno, G; Gallrapp, C; Di Girolamo, B; Dobos, D; La Rosa, A; Pernegger, H; Roe, S; Slavicek, T; Pospisil, S; Jakobs, K; Kohler, M; Parzefall, U; Darbo, G; Gariano, G; Gemme, C; Rovani, A; Ruscino, E; Butter, C; Bates, R; Oshea, V; Parker, S; Cavalli-Sforza, M; Grinstein, S; Korokolov, I; Pradilla, C; Einsweiler, K; Garcia-Sciveres, M; Borri, M; Da Via, C; Freestone, J; Kolya, S; Lai, C H; Nellist, C; Pater, J; Thompson, R; Watts, S J; Hoeferkamp, M; Seidel, S; Bolle, E; Gjersdal, H; Sjobaek, K N; Stapnes, S; Rohne, O; Su, D; Young, C; Hansson, P; Grenier, P; Hasi, J; Kenney, C; Kocian, M; Jackson, P; Silverstein, D; Davetak, H; DeWilde, B; Tsybychev, D; Dalla Betta, G F; Gabos, P; Povoli, M; Cobal, M; Giordani, M P; Selmi, L; Cristofoli, A; Esseni, D; Palestri, P; Fleta, C; Lozano, M; Pellegrini, G; Boscardin, M; Bagolini, A; Piemonte, C; Ronchin, S; Zorzi, N; Hansen, T E; Hansen, T; Kok, A; Lietaer, N; Kalliopuska, J; Oja, A

2011-01-01

The Pixel detector is the innermost part of the ATLAS experiment tracking device at the Large Hadron Collider (LHC), and plays a key role in the reconstruction of the primary and secondary vertices of short-lived particles. To cope with the high level of radiation produced during the collider operation, it is planned to add to the present three layers of silicon pixel sensors which constitute the Pixel Detector, an additional layer (Insertable B-Layer, or IBL) of sensors. 3D silicon sensors are one of the technologies which are under study for the IBL. 3D silicon technology is an innovative combination of very-large-scale integration (VLSI) and Micro-Electro-Mechanical-Systems (MEMS) where electrodes are fabricated inside the silicon bulk instead of being implanted on the wafer surfaces. 3D sensors, with electrodes fully or partially penetrating the silicon substrate, are currently fabricated at different processing facilities in Europe and USA. This paper reports on the 2010 June beam test results for irradi...

Implementing a real-time chain of segmentation of images on a multi-FPGA architecture

Science.gov (United States)

Akil, Mohamed; Zahirazami, Shahram

1998-03-01

In this paper we present the study and the implementation of an optimized chain of segmentation operators. We implemented this chain in real time, consisting of a Deriche contour detection, double threshold, closing of contours and finally region labeling, on a multi-FPGA architecture. This architecture has four processing FPGAs and four memory modules. Deriche operator, closing of contours and labeling occupy each one an FPGA. Double threshold and detection of the extremities filled partially the forth FPGA. The slowest component of the chain is Deriche operator which can go up to 11.4 Mhz, assuring the process of an image every 40 ms. Deriche operator tries to extract the contours by assuming that a contour is a step super positioned by a white gaussian noise. Our implementation consists of a smoothing part of four second order filters and a Sobel as a derivation part. The second order filters are causal and non-causal horizontal and vertical operators. The gradient image passes through a double threshold filter to select the real contours and the crests and the background pixels. Closing of contours eliminates the false crests and finally the labeling gives a unique label to each closed region. The latency of the chain is in the order of three images. This implementation shows the efficiency of the chain and also it demonstrates the capabilities of our architecture as a prototyping system.

First experiences with the ATLAS pixel detector control system at the combined test beam 2004

International Nuclear Information System (INIS)

Imhaeuser, Martin; Becks, Karl-Heinz; Henss, Tobias; Kersten, Susanne; Maettig, Peter; Schultes, Joachim

2006-01-01

Detector control systems (DCS) include the readout, control and supervision of hardware devices as well as the monitoring of external systems like cooling system and the processing of control data. The implementation of such a system in the final experiment also has to provide the communication with the trigger and data acquisition system (TDAQ). In addition, conditions data which describe the status of the pixel detector modules and their environment must be logged and stored in a common LHC wide database system. At the combined test beam all ATLAS subdetectors were operated together for the first time over a longer period. To ensure the functionality of the pixel detector, a control system was set up. We describe the architecture chosen for the pixel DCS, the interfaces to hardware devices, the interfaces to the users and the performance of our system. The embedding of the DCS in the common infrastructure of the combined test beam and also its communication with surrounding systems will be discussed in some detail

Evaluation of computational endomicroscopy architectures for minimally-invasive optical biopsy

Science.gov (United States)

Dumas, John P.; Lodhi, Muhammad A.; Bajwa, Waheed U.; Pierce, Mark C.

2017-02-01

We are investigating compressive sensing architectures for applications in endomicroscopy, where the narrow diameter probes required for tissue access can limit the achievable spatial resolution. We hypothesize that the compressive sensing framework can be used to overcome the fundamental pixel number limitation in fiber-bundle based endomicroscopy by reconstructing images with more resolvable points than fibers in the bundle. An experimental test platform was assembled to evaluate and compare two candidate architectures, based on introducing a coded amplitude mask at either a conjugate image or Fourier plane within the optical system. The benchtop platform consists of a common illumination and object path followed by separate imaging arms for each compressive architecture. The imaging arms contain a digital micromirror device (DMD) as a reprogrammable mask, with a CCD camera for image acquisition. One arm has the DMD positioned at a conjugate image plane ("IP arm"), while the other arm has the DMD positioned at a Fourier plane ("FP arm"). Lenses were selected and positioned within each arm to achieve an element-to-pixel ratio of 16 (230,400 mask elements mapped onto 14,400 camera pixels). We discuss our mathematical model for each system arm and outline the importance of accounting for system non-idealities. Reconstruction of a 1951 USAF resolution target using optimization-based compressive sensing algorithms produced images with higher spatial resolution than bicubic interpolation for both system arms when system non-idealities are included in the model. Furthermore, images generated with image plane coding appear to exhibit higher spatial resolution, but more noise, than images acquired through Fourier plane coding.

Studies Concerning the ATLAS IBL Calibration Architecture

CERN Document Server

Kretz, Moritz; Kugel, Andreas

With the commissioning of the Insertable B-Layer (IBL) in 2013 at the ATLAS experiment 12~million additional pixels will be added to the current Pixel Detector. While the idea of employing pairs of VME based Read-Out Driver (ROD) and Back of Crate (BOC) cards in the read-out chain remains unchanged, modifications regarding the IBL calibration procedure were introduced to overcome current hardware limitations. The analysis of calibration histograms will no longer be performed on the RODs, but on an external computing farm that is connected to the RODs via Ethernet. This thesis contributes to the new IBL calibration procedure and presents a concept for a scalable software and hardware architecture. An embedded system targeted to the ROD FPGAs is realized for sending data from the RODs to the fit farm servers and benchmarks are carried out with a Linux based networking stack, as well as a standalone software stack. Furthermore, the histogram fitting algorithm currently being employed on the Pixel Detector RODs i...

MODIS Collection 6 Clear Sky Restoral (CSR): Filtering Cloud Mast 'Not Clear' Pixels

Science.gov (United States)

Meyer, Kerry G.; Platnick, Steven Edward; Wind, Galina; Riedi, Jerome

2014-01-01

Correctly identifying cloudy pixels appropriate for the MOD06 cloud optical and microphysical property retrievals is accomplished in large part using results from the MOD35 1km cloud mask tests (note there are also two 250m subpixel cloud mask tests that can convert the 1km cloudy designations to clear sky). However, because MOD35 is by design clear sky conservative (i.e., it identifies "not clear" pixels), certain situations exist in which pixels identified by MOD35 as "cloudy" are nevertheless likely to be poor retrieval candidates. For instance, near the edge of clouds or within broken cloud fields, a given 1km MODIS field of view (FOV) may in fact only be partially cloudy. This can be problematic for the MOD06 retrievals because in these cases the assumptions of a completely overcast homogenous cloudy FOV and 1-dimensional plane-parallel radiative transfer no longer hold, and subsequent retrievals will be of low confidence. Furthermore, some pixels may be identified by MOD35 as "cloudy" for reasons other than the presence of clouds, such as scenes with thick smoke or lofted dust, and should therefore not be retrieved as clouds. With such situations in mind, a Clear Sky Restoral (CSR) algorithm was introduced in C5 that attempts to identify pixels expected to be poor retrieval candidates. Table 1 provides SDS locations for CSR and partly cloudy (PCL) pixels.

First large DEPFET pixel modules for the Belle II Pixel Detector

Energy Technology Data Exchange (ETDEWEB)

Mueller, Felix; Avella, Paola; Kiesling, Christian; Koffmane, Christian; Moser, Hans-Guenther; Valentan, Manfred [Max-Planck-Institut fuer Physik, Muenchen (Germany); Andricek, Ladislav; Richter, Rainer [Halbleiterlabor der Max-Planck-Gesellschaft, Muenchen (Germany); Collaboration: Belle II-Collaboration

2016-07-01

DEPFET pixel detectors offer excellent signal to noise ratio, resolution and low power consumption with a low material budget. They will be used at Belle II and are a candidate for an ILC vertex detector. The pixels are integrated in a monolithic piece of silicon which also acts as PCB providing the signal and control routings for the ASICs on top. The first prototype DEPFET sensor modules for Belle II have been produced. The modules have 192000 pixels and are equipped with SMD components and three different kinds of ASICs to control and readout the pixels. The entire readout chain has to be studied; the metal layer interconnectivity and routings need to be verified. The modules are fully characterized, and the operation voltages and control sequences of the ASICs are investigated. An overview of the DEPFET concept and first characterization results is presented.

Graphene metamaterial spatial light modulator for infrared single pixel imaging.

Science.gov (United States)

Fan, Kebin; Suen, Jonathan Y; Padilla, Willie J

2017-10-16

High-resolution and hyperspectral imaging has long been a goal for multi-dimensional data fusion sensing applications - of interest for autonomous vehicles and environmental monitoring. In the long wave infrared regime this quest has been impeded by size, weight, power, and cost issues, especially as focal-plane array detector sizes increase. Here we propose and experimentally demonstrated a new approach based on a metamaterial graphene spatial light modulator (GSLM) for infrared single pixel imaging. A frequency-division multiplexing (FDM) imaging technique is designed and implemented, and relies entirely on the electronic reconfigurability of the GSLM. We compare our approach to the more common raster-scan method and directly show FDM image frame rates can be 64 times faster with no degradation of image quality. Our device and related imaging architecture are not restricted to the infrared regime, and may be scaled to other bands of the electromagnetic spectrum. The study presented here opens a new approach for fast and efficient single pixel imaging utilizing graphene metamaterials with novel acquisition strategies.

Development of a High Dynamic Range Pixel Array Detector for Synchrotrons and XFELs

Science.gov (United States)

Weiss, Joel Todd

Advances in synchrotron radiation light source technology have opened new lines of inquiry in material science, biology, and everything in between. However, x-ray detector capabilities must advance in concert with light source technology to fully realize experimental possibilities. X-ray free electron lasers (XFELs) place particularly large demands on the capabilities of detectors, and developments towards diffraction-limited storage ring sources also necessitate detectors capable of measuring very high flux [1-3]. The detector described herein builds on the Mixed Mode Pixel Array Detector (MM-PAD) framework, developed previously by our group to perform high dynamic range imaging, and the Adaptive Gain Integrating Pixel Detector (AGIPD) developed for the European XFEL by a collaboration between Deustsches Elektronen-Synchrotron (DESY), the Paul-Scherrer-Institute (PSI), the University of Hamburg, and the University of Bonn, led by Heinz Graafsma [4, 5]. The feasibility of combining adaptive gain with charge removal techniques to increase dynamic range in XFEL experiments is assessed by simulating XFEL scatter with a pulsed infrared laser. The strategy is incorporated into pixel prototypes which are evaluated with direct current injection to simulate very high incident x-ray flux. A fully functional 16x16 pixel hybrid integrating x-ray detector featuring several different pixel architectures based on the prototypes was developed. This dissertation describes its operation and characterization. To extend dynamic range, charge is removed from the integration node of the front-end amplifier without interrupting integration. The number of times this process occurs is recorded by a digital counter in the pixel. The parameter limiting full well is thereby shifted from the size of an integration capacitor to the depth of a digital counter. The result is similar to that achieved by counting pixel array detectors, but the integrators presented here are designed to tolerate a

FDTD-based optical simulations methodology for CMOS image sensors pixels architecture and process optimization

Science.gov (United States)

Hirigoyen, Flavien; Crocherie, Axel; Vaillant, Jérôme M.; Cazaux, Yvon

2008-02-01

This paper presents a new FDTD-based optical simulation model dedicated to describe the optical performances of CMOS image sensors taking into account diffraction effects. Following market trend and industrialization constraints, CMOS image sensors must be easily embedded into even smaller packages, which are now equipped with auto-focus and short-term coming zoom system. Due to miniaturization, the ray-tracing models used to evaluate pixels optical performances are not accurate anymore to describe the light propagation inside the sensor, because of diffraction effects. Thus we adopt a more fundamental description to take into account these diffraction effects: we chose to use Maxwell-Boltzmann based modeling to compute the propagation of light, and to use a software with an FDTD-based (Finite Difference Time Domain) engine to solve this propagation. We present in this article the complete methodology of this modeling: on one hand incoherent plane waves are propagated to approximate a product-use diffuse-like source, on the other hand we use periodic conditions to limit the size of the simulated model and both memory and computation time. After having presented the correlation of the model with measurements we will illustrate its use in the case of the optimization of a 1.75μm pixel.

Motion camera based on a custom vision sensor and an FPGA architecture

Science.gov (United States)

Arias-Estrada, Miguel

1998-09-01

A digital camera for custom focal plane arrays was developed. The camera allows the test and development of analog or mixed-mode arrays for focal plane processing. The camera is used with a custom sensor for motion detection to implement a motion computation system. The custom focal plane sensor detects moving edges at the pixel level using analog VLSI techniques. The sensor communicates motion events using the event-address protocol associated to a temporal reference. In a second stage, a coprocessing architecture based on a field programmable gate array (FPGA) computes the time-of-travel between adjacent pixels. The FPGA allows rapid prototyping and flexible architecture development. Furthermore, the FPGA interfaces the sensor to a compact PC computer which is used for high level control and data communication to the local network. The camera could be used in applications such as self-guided vehicles, mobile robotics and smart surveillance systems. The programmability of the FPGA allows the exploration of further signal processing like spatial edge detection or image segmentation tasks. The article details the motion algorithm, the sensor architecture, the use of the event- address protocol for velocity vector computation and the FPGA architecture used in the motion camera system.

Development of pixellated Ir-TESs

International Nuclear Information System (INIS)

Zen, Nobuyuki; Takahashi, Hiroyuki; Kunieda, Yuichi; Dayanthi, Rathnayaka M.T.; Mori, Fumiakira; Fujita, Kaoru; Nakazawa, Masaharu; Fukuda, Daiji; Ohkubo, Masataka

2006-01-01

We have been developing Ir-based pixellated superconducting transition edge sensors (TESs). In the area of material or astronomical applications, the sensor with few eV energy resolution and over 1000 pixels imaging property is desired. In order to achieve this goal, we have been analyzing signals from pixellated TESs. In the case of a 20 pixel array of Ir-TESs, with 45 μmx45 μm pixel sizes, the incident X-ray signals have been classified into 16 groups. We have applied numerical signal analysis. On the one hand, the energy resolution of our pixellated TES is strongly degraded. However, using pulse shape analysis, we can dramatically improve the resolution. Thus, we consider that the pulse signal analysis will lead this device to be used as a practical photon incident position identifying TES

The design and implementation of a VR-architecture for smooth motion

NARCIS (Netherlands)

F.A. Smit (Ferdi); R. van Liere (Robert); B. Fröhlich (Bernd); S.N. Spencer

2007-01-01

textabstractWe introduce an architecture for smooth motion in virtual environments. The system performs forward depth image warping to produce images at video refresh rates. In addition to color and depth, our 3D warping approach records per-pixel motion information during rendering of the

How many pixels does it take to make a good 4"×6" print? Pixel count wars revisited

Science.gov (United States)

Kriss, Michael A.

2011-01-01

In the early 1980's the future of conventional silver-halide photographic systems was of great concern due to the potential introduction of electronic imaging systems then typified by the Sony Mavica analog electronic camera. The focus was on the quality of film-based systems as expressed in the number of equivalent number pixels and bits-per-pixel, and how many pixels would be required to create an equivalent quality image from a digital camera. It was found that 35-mm frames, for ISO 100 color negative film, contained equivalent pixels of 12 microns for a total of 18 million pixels per frame (6 million pixels per layer) with about 6 bits of information per pixel; the introduction of new emulsion technology, tabular AgX grains, increased the value to 8 bit per pixel. Higher ISO speed films had larger equivalent pixels, fewer pixels per frame, but retained the 8 bits per pixel. Further work found that a high quality 3.5" x 5.25" print could be obtained from a three layer system containing 1300 x 1950 pixels per layer or about 7.6 million pixels in all. In short, it became clear that when a digital camera contained about 6 million pixels (in a single layer using a color filter array and appropriate image processing) that digital systems would challenge and replace conventional film-based system for the consumer market. By 2005 this became the reality. Since 2005 there has been a "pixel war" raging amongst digital camera makers. The question arises about just how many pixels are required and are all pixels equal? This paper will provide a practical look at how many pixels are needed for a good print based on the form factor of the sensor (sensor size) and the effective optical modulation transfer function (optical spread function) of the camera lens. Is it better to have 16 million, 5.7-micron pixels or 6 million 7.8-micron pixels? How does intrinsic (no electronic boost) ISO speed and exposure latitude vary with pixel size? A systematic review of these issues will

Development of pixellated Ir-TESs

Science.gov (United States)

Zen, Nobuyuki; Takahashi, Hiroyuki; Kunieda, Yuichi; Damayanthi, Rathnayaka M. T.; Mori, Fumiakira; Fujita, Kaoru; Nakazawa, Masaharu; Fukuda, Daiji; Ohkubo, Masataka

2006-04-01

We have been developing Ir-based pixellated superconducting transition edge sensors (TESs). In the area of material or astronomical applications, the sensor with few eV energy resolution and over 1000 pixels imaging property is desired. In order to achieve this goal, we have been analyzing signals from pixellated TESs. In the case of a 20 pixel array of Ir-TESs, with 45 μm×45 μm pixel sizes, the incident X-ray signals have been classified into 16 groups. We have applied numerical signal analysis. On the one hand, the energy resolution of our pixellated TES is strongly degraded. However, using pulse shape analysis, we can dramatically improve the resolution. Thus, we consider that the pulse signal analysis will lead this device to be used as a practical photon incident position identifying TES.

A Proposed Extension to the Soil Moisture and Ocean Salinity Level 2 Algorithm for Mixed Forest and Moderate Vegetation Pixels

Science.gov (United States)

Panciera, Rocco; Walker, Jeffrey P.; Kalma, Jetse; Kim, Edward

2011-01-01

The Soil Moisture and Ocean Salinity (SMOS)mission, launched in November 2009, provides global maps of soil moisture and ocean salinity by measuring the L-band (1.4 GHz) emission of the Earth's surface with a spatial resolution of 40-50 km.Uncertainty in the retrieval of soilmoisture over large heterogeneous areas such as SMOS pixels is expected, due to the non-linearity of the relationship between soil moisture and the microwave emission. The current baseline soilmoisture retrieval algorithm adopted by SMOS and implemented in the SMOS Level 2 (SMOS L2) processor partially accounts for the sub-pixel heterogeneity of the land surface, by modelling the individual contributions of different pixel fractions to the overall pixel emission. This retrieval approach is tested in this study using airborne L-band data over an area the size of a SMOS pixel characterised by a mix Eucalypt forest and moderate vegetation types (grassland and crops),with the objective of assessing its ability to correct for the soil moisture retrieval error induced by the land surface heterogeneity. A preliminary analysis using a traditional uniform pixel retrieval approach shows that the sub-pixel heterogeneity of land cover type causes significant errors in soil moisture retrieval (7.7%v/v RMSE, 2%v/v bias) in pixels characterised by a significant amount of forest (40-60%). Although the retrieval approach adopted by SMOS partially reduces this error, it is affected by errors beyond the SMOS target accuracy, presenting in particular a strong dry bias when a fraction of the pixel is occupied by forest (4.1%v/v RMSE,-3.1%v/v bias). An extension to the SMOS approach is proposed that accounts for the heterogeneity of vegetation optical depth within the SMOS pixel. The proposed approach is shown to significantly reduce the error in retrieved soil moisture (2.8%v/v RMSE, -0.3%v/v bias) in pixels characterised by a critical amount of forest (40-60%), at the limited cost of only a crude estimate of the

A hybrid 3D LIDAR imager based on pixel-by-pixel scanning and DS-OCDMA

Science.gov (United States)

Kim, Gunzung; Eom, Jeongsook; Park, Yongwan

2016-03-01

We propose a new hybrid 3D light detection and ranging (LIDAR) system, which measures a scene with 1280 x 600 pixels at a refresh rate of 60fps. The emitted pulses of each pixel are modulated by direct sequence optical code division multiple access (DS-OCDMA) techniques. The modulated pulses include a unique device identification number, the pixel position in the line, and a checksum. The LIDAR emits the modulated pulses periodically without waiting to receive returning light at the detector. When all the pixels are completely through the process, the travel time, amplitude, width, and speed are used by the pixel-by-pixel scanning LIDAR imager to generate point cloud data as the measured results. We programmed the entire hybrid 3D LIDAR operation in a simulator to observe the functionality accomplished by our proposed model.

How architecture students gain and apply knowledge of sustainable architecture

DEFF Research Database (Denmark)

Donovan, Elizabeth; Holder, Anna

2016-01-01

understandings of how architects synthesise different types of knowledge while designing, raising questions about the ‘match’ between educational experiences and subsequent behaviours in practice. Taking an example from Denmark, we outline the approach of Aarhus School of Architecture, where sustainability...... teaching is partially integrated within the design studio courses. We compare the institution’s philosophy for sustainability with pedagogical approaches as practiced within the school. An empirical study was made of 2nd year architecture student experiences of a one-month introduction course to ‘Reuse...... to be supported in gaining different types of knowledge (ie. propositional, experiential, applied) through different modes of learning. There are gaps to be bridged in education in order for the sustainability agenda to be fully integrated in architectural practice....

Low complexity pixel-based halftone detection

Science.gov (United States)

Ok, Jiheon; Han, Seong Wook; Jarno, Mielikainen; Lee, Chulhee

2011-10-01

With the rapid advances of the internet and other multimedia technologies, the digital document market has been growing steadily. Since most digital images use halftone technologies, quality degradation occurs when one tries to scan and reprint them. Therefore, it is necessary to extract the halftone areas to produce high quality printing. In this paper, we propose a low complexity pixel-based halftone detection algorithm. For each pixel, we considered a surrounding block. If the block contained any flat background regions, text, thin lines, or continuous or non-homogeneous regions, the pixel was classified as a non-halftone pixel. After excluding those non-halftone pixels, the remaining pixels were considered to be halftone pixels. Finally, documents were classified as pictures or photo documents by calculating the halftone pixel ratio. The proposed algorithm proved to be memory-efficient and required low computation costs. The proposed algorithm was easily implemented using GPU.

The design and implementation of a VR-architecture for smooth motion

NARCIS (Netherlands)

Smit, F.A.; Liere, van R.; Fröhlich, B.

2007-01-01

We introduce an architecture for smooth motion in virtual environments. The system performs forward depth image warping to produce images at video refresh rates. In addition to color and depth, our 3D warping approach records per-pixel motion information during rendering of the three-dimensional

THE KEPLER PIXEL RESPONSE FUNCTION

International Nuclear Information System (INIS)

Bryson, Stephen T.; Haas, Michael R.; Dotson, Jessie L.; Koch, David G.; Borucki, William J.; Tenenbaum, Peter; Jenkins, Jon M.; Chandrasekaran, Hema; Caldwell, Douglas A.; Klaus, Todd; Gilliland, Ronald L.

2010-01-01

Kepler seeks to detect sequences of transits of Earth-size exoplanets orbiting solar-like stars. Such transit signals are on the order of 100 ppm. The high photometric precision demanded by Kepler requires detailed knowledge of how the Kepler pixels respond to starlight during a nominal observation. This information is provided by the Kepler pixel response function (PRF), defined as the composite of Kepler's optical point-spread function, integrated spacecraft pointing jitter during a nominal cadence and other systematic effects. To provide sub-pixel resolution, the PRF is represented as a piecewise-continuous polynomial on a sub-pixel mesh. This continuous representation allows the prediction of a star's flux value on any pixel given the star's pixel position. The advantages and difficulties of this polynomial representation are discussed, including characterization of spatial variation in the PRF and the smoothing of discontinuities between sub-pixel polynomial patches. On-orbit super-resolution measurements of the PRF across the Kepler field of view are described. Two uses of the PRF are presented: the selection of pixels for each star that maximizes the photometric signal-to-noise ratio for that star, and PRF-fitted centroids which provide robust and accurate stellar positions on the CCD, primarily used for attitude and plate scale tracking. Good knowledge of the PRF has been a critical component for the successful collection of high-precision photometry by Kepler.

Thermomechanical architecture of the VIS focal plane for Euclid

International Nuclear Information System (INIS)

Martignac, Jerome; Carty, Michael; Tourette, Thierry; Bachet, Damien; Berthe, Michel; Augueres, Jean-Louis; Amiaux, Jerome; Fontignie, Jean; Horeau, Benoit; Renaud, Diana

2014-01-01

One of the main challenges for current and near future space experiments is the increase of focal plane complexity in terms of amount of pixels. In the frame work of the ESA Euclid mission to be launched in 2020, the Euclid Consortium is developing an extremely large and stable focal plane for the VIS instrument. CEA has developed the thermomechanical architecture of that Focal Plane taking into account all the very stringent performance and mission related requirements. The VIS Focal Plane Assembly integrates 36 CCDs (operated at 150 K) connected to their front end electronics (operated at 280 K) as to obtain one of the largest focal plane (0.6 billion pixels) ever built for space application after the GAIA one. The CCDs are CCD273 type specially designed and provided by the e2v company under ESA contract, front end electronics is studied and provided by MSSL. In this paper we first recall the specific requirements that have driven the overall architecture of the VIS-FPA and especially the solutions proposed to cope with the scientific needs of an extremely stable focal plane, both mechanically and thermally. The mechanical structure based on SiC material used for the cold sub assembly supporting the CCDs is detailed. We describe also the modular architecture concept that we have selected taking into account AIT-AIV and programmatic constraints. (authors)

Giga-pixel lensfree holographic microscopy and tomography using color image sensors.

Directory of Open Access Journals (Sweden)

Serhan O Isikman

Full Text Available We report Giga-pixel lensfree holographic microscopy and tomography using color sensor-arrays such as CMOS imagers that exhibit Bayer color filter patterns. Without physically removing these color filters coated on the sensor chip, we synthesize pixel super-resolved lensfree holograms, which are then reconstructed to achieve ~350 nm lateral resolution, corresponding to a numerical aperture of ~0.8, across a field-of-view of ~20.5 mm(2. This constitutes a digital image with ~0.7 Billion effective pixels in both amplitude and phase channels (i.e., ~1.4 Giga-pixels total. Furthermore, by changing the illumination angle (e.g., ± 50° and scanning a partially-coherent light source across two orthogonal axes, super-resolved images of the same specimen from different viewing angles are created, which are then digitally combined to synthesize tomographic images of the object. Using this dual-axis lensfree tomographic imager running on a color sensor-chip, we achieve a 3D spatial resolution of ~0.35 µm × 0.35 µm × ~2 µm, in x, y and z, respectively, creating an effective voxel size of ~0.03 µm(3 across a sample volume of ~5 mm(3, which is equivalent to >150 Billion voxels. We demonstrate the proof-of-concept of this lensfree optical tomographic microscopy platform on a color CMOS image sensor by creating tomograms of micro-particles as well as a wild-type C. elegans nematode.

Simulation-based evaluation and optimization of a new CdZnTe gamma-camera architecture (HiSens)

International Nuclear Information System (INIS)

Robert, Charlotte; Montemont, Guillaume; Rebuffel, Veronique; Guerin, Lucie; Verger, Loick; Buvat, Irene

2010-01-01

A new gamma-camera architecture named HiSens is presented and evaluated. It consists of a parallel hole collimator, a pixelated CdZnTe (CZT) detector associated with specific electronics for 3D localization and dedicated reconstruction algorithms. To gain in efficiency, a high aperture collimator is used. The spatial resolution is preserved thanks to accurate 3D localization of the interactions inside the detector based on a fine sampling of the CZT detector and on the depth of interaction information. The performance of this architecture is characterized using Monte Carlo simulations in both planar and tomographic modes. Detective quantum efficiency (DQE) computations are then used to optimize the collimator aperture. In planar mode, the simulations show that the fine CZT detector pixelization increases the system sensitivity by 2 compared to a standard Anger camera without loss in spatial resolution. These results are then validated against experimental data. In SPECT, Monte Carlo simulations confirm the merits of the HiSens architecture observed in planar imaging.

A new method to improve multiplication factor in micro-pixel avalanche photodiodes with high pixel density

Energy Technology Data Exchange (ETDEWEB)

Sadygov, Z. [National Nuclear Research Center, Baku (Azerbaijan); Joint Institute for Nuclear Research, Dubna (Russian Federation); Ahmadov, F. [National Nuclear Research Center, Baku (Azerbaijan); Khorev, S. [Zecotek Photonics Inc., Vancouver (Canada); Sadigov, A., E-mail: saazik@yandex.ru [National Nuclear Research Center, Baku (Azerbaijan); Suleymanov, S. [National Nuclear Research Center, Baku (Azerbaijan); Madatov, R.; Mehdiyeva, R. [Institute of Radiation Problems, Baku (Azerbaijan); Zerrouk, F. [Zecotek Photonics Inc., Vancouver (Canada)

2016-07-11

Presented is a new model describing development of the avalanche process in time, taking into account the dynamics of electric field within the depleted region of the diode and the effect of parasitic capacitance shunting individual quenching micro-resistors on device parameters. Simulations show that the effective capacitance of a single pixel, which defines the multiplication factor, is the sum of the pixel capacitance and a parasitic capacitance shunting its quenching micro-resistor. Conclusions obtained as a result of modeling open possibilities of improving the pixel gain in micropixel avalanche photodiodes with high pixel density (or low pixel capacitance).

IMPLEMENTATION OF TRANSMITTER AND RECEIVER ARCHITECTURE FOR PHYSICAL HYBRID INDICATOR CHANNEL OF LTE-ADVANCED USING PARTIAL RECONFIGURATION IN ML605 VIRTEX-6 DEVICE

Directory of Open Access Journals (Sweden)

S. Syed Ameer Abbas

2014-09-01

Full Text Available LTE-A (Long Term Evolution-Advanced is the fourth generation technology to increase the speed of wireless data network. The LTE-A Physical layer provides both data and control information between an enhanced base station and mobile user equipment which is quite complex and consists of a mixture of technologies. Since there is requirement for more resources to accommodate all the channels in a single FPGA, Partial Reconfiguration (PR technique is introduced to configure the total hardware into sub modules that configure and operate in different instants of time. PR enables a part of FPGA to be reconfigured, while the rest continues to function without any interruptions and reduces the hardware resource power and fabric area. This work proposes the realization of transmitter and receiver architecture of Physical Hybrid Indicator Channel (PHICH channel for LTE-A using partial reconfiguration on xc6vlx240tff1156-1 FPGA. The receiver architecture for PHICH is to report the correct reception of uplink user data to the User Equipment (UE in the form of Acknowledgment (ACK, or Negative ACK (NACK in a 1 millisecond duration sub-frame of Long Term Evolution (LTE System. The modules for the different diversities are reconfigured based on the control signals from the transmitter.

Objective guidelines for removing an external fixator after tibial lengthening using pixel value ratio: a pilot study.

Science.gov (United States)

Zhao, Li; Fan, Qing; Venkatesh, K P; Park, Man S; Song, Hae Ryong

2009-12-01

During limb lengthening over an intramedullary nail, decisions regarding external fixator removal and weightbearing depend on the amount of callus seen at the lengthening area on radiographs. However, this method is subjective and objective evaluation of the amount of callus likely would minimize nail or interlocking screw breakage and refracture after fixator removal. We asked how many cortices with full corticalization of the newly formed bone at the lengthening area are needed to allow fixator removal and full weightbearing and how to radiographically determine the stage of corticalization. We retrospectively reviewed 17 patients (34 lengthenings) who underwent bilateral tibial lengthenings over an intramedullary nail. The average gain in length was 7.2 +/- 3.4 cm. We determined the pixel value ratio (ratio of pixel value of regenerate versus the mean pixel value of adjacent bone) of the lengthened area on radiographs. There were no nail or screw breakage and refracture. Partial weightbearing with crutches was permitted when the pixel value ratio was 1 in two cortices and full weightbearing without crutches was permitted when the pixel value ratio was 1 in three cortices. The pixel value ratio on radiographs can be an objective parameter for callus measurement and may provide guidelines for the timing of external fixator removal. We cannot determine from our limited data the minimum pixel value in how many cortices would suggest safe removal, but we can say our criteria were not associated with subsequent refracture.

Scalable Distributed Architectures for Information Retrieval

National Research Council Canada - National Science Library

Lu, Zhihong

1999-01-01

.... Our distributed architectures exploit parallelism in information retrieval on a cluster of parallel IR servers using symmetric multiprocessors, and use partial collection replication and selection...

Spatial clustering of pixels of a multispectral image

Science.gov (United States)

Conger, James Lynn

2014-08-19

A method and system for clustering the pixels of a multispectral image is provided. A clustering system computes a maximum spectral similarity score for each pixel that indicates the similarity between that pixel and the most similar neighboring. To determine the maximum similarity score for a pixel, the clustering system generates a similarity score between that pixel and each of its neighboring pixels and then selects the similarity score that represents the highest similarity as the maximum similarity score. The clustering system may apply a filtering criterion based on the maximum similarity score so that pixels with similarity scores below a minimum threshold are not clustered. The clustering system changes the current pixel values of the pixels in a cluster based on an averaging of the original pixel values of the pixels in the cluster.

Gas pixel detectors

International Nuclear Information System (INIS)

Bellazzini, R.; Baldini, L.; Brez, A.; Cavalca, F.; Latronico, L.; Massai, M.M.; Minuti, M.; Omodei, N.; Pesce-Rollins, M.; Sgro, C.; Spandre, G.; Costa, E.; Soffitta, P.

2007-01-01

With the Gas Pixel Detector (GPD), the class of micro-pattern gas detectors has reached a complete integration between the gas amplification structure and the read-out electronics. To obtain this goal, three generations of application-specific integrated circuit of increased complexity and improved functionality has been designed and fabricated in deep sub-micron CMOS technology. This implementation has allowed manufacturing a monolithic device, which realizes, at the same time, the pixelized charge-collecting electrode and the amplifying, shaping and charge measuring front-end electronics of a GPD. A big step forward in terms of size and performances has been obtained in the last version of the 0.18 μm CMOS analog chip, where over a large active area of 15x15 mm 2 a very high channel density (470 pixels/mm 2 ) has been reached. On the top metal layer of the chip, 105,600 hexagonal pixels at 50 μm pitch have been patterned. The chip has customable self-trigger capability and includes a signal pre-processing function for the automatic localization of the event coordinates. In this way, by limiting the output signal to only those pixels belonging to the region of interest, it is possible to reduce significantly the read-out time and data volume. In-depth tests performed on a GPD built up by coupling this device to a fine pitch (50 μm) gas electron multiplier are reported. Matching of the gas amplification and read-out pitch has let to obtain optimal results. A possible application of this detector for X-ray polarimetry of astronomical sources is discussed

ATLAS Pixel Detector Operational Experience

CERN Document Server

Di Girolamo, B; The ATLAS collaboration

2011-01-01

The ATLAS Pixel Detector is the innermost detector of the ATLAS experiment at the Large Hadron Collider at CERN, providing high-resolution measurements of charged particle tracks in the high radiation environment close to the collision region. This capability is vital for the identification and measurement of proper decay times of long-lived particles such as b-hadrons, and thus vital for the ATLAS physics program. The detector provides hermetic coverage with three cylindrical layers and three layers of forward and backward pixel detectors. It consists of approximately 80 million pixels that are individually read out via chips bump-bonded to 1744 n-in-n silicon substrates. In this talk, results from the successful operation of the Pixel Detector at the LHC will be presented, including monitoring, calibration procedures, timing optimization and detector performance. The detector performance is excellent: 96.9% of the pixels are operational, noise occupancy and hit efficiency exceed the design specification, an...

Low-power priority Address-Encoder and Reset-Decoder data-driven readout for Monolithic Active Pixel Sensors for tracker system

International Nuclear Information System (INIS)

Yang, P.; Aglieri, G.; Cavicchioli, C.; Chalmet, P.L.; Chanlek, N.; Collu, A.; Gao, C.; Hillemanns, H.; Junique, A.; Kofarago, M.; Keil, M.; Kugathasan, T.; Kim, D.; Kim, J.; Lattuca, A.; Marin Tobon, C.A.; Marras, D.; Mager, M.; Martinengo, P.; Mazza, G.

2015-01-01

Active Pixel Sensors used in High Energy Particle Physics require low power consumption to reduce the detector material budget, low integration time to reduce the possibilities of pile-up and fast readout to improve the detector data capability. To satisfy these requirements, a novel Address-Encoder and Reset-Decoder (AERD) asynchronous circuit for a fast readout of a pixel matrix has been developed. The AERD data-driven readout architecture operates the address encoding and reset decoding based on an arbitration tree, and allows us to readout only the hit pixels. Compared to the traditional readout structure of the rolling shutter scheme in Monolithic Active Pixel Sensors (MAPS), AERD can achieve a low readout time and a low power consumption especially for low hit occupancies. The readout is controlled at the chip periphery with a signal synchronous with the clock, allows a good digital and analogue signal separation in the matrix and a reduction of the power consumption. The AERD circuit has been implemented in the TowerJazz 180 nm CMOS Imaging Sensor (CIS) process with full complementary CMOS logic in the pixel. It works at 10 MHz with a matrix height of 15 mm. The energy consumed to read out one pixel is around 72 pJ. A scheme to boost the readout speed to 40 MHz is also discussed. The sensor chip equipped with AERD has been produced and characterised. Test results including electrical beam measurement are presented

Low-power priority Address-Encoder and Reset-Decoder data-driven readout for Monolithic Active Pixel Sensors for tracker system

Energy Technology Data Exchange (ETDEWEB)

Yang, P., E-mail: yangping0710@126.com [Central China Normal University, Wuhan (China); Aglieri, G.; Cavicchioli, C. [CERN, 1210 Geneva 23 (Switzerland); Chalmet, P.L. [MIND, Archamps (France); Chanlek, N. [Suranaree University of Technology, Nakhon Ratchasima (Thailand); Collu, A. [University of Cagliari, Cagliari (Italy); INFN (Italy); Gao, C. [Central China Normal University, Wuhan (China); Hillemanns, H.; Junique, A. [CERN, 1210 Geneva 23 (Switzerland); Kofarago, M. [CERN, 1210 Geneva 23 (Switzerland); University of Utrecht, Utrecht (Netherlands); Keil, M.; Kugathasan, T. [CERN, 1210 Geneva 23 (Switzerland); Kim, D. [Dongguk and Yonsei University, Seoul (Korea, Republic of); Kim, J. [Pusan National University, Busan (Korea, Republic of); Lattuca, A. [University of Torino, Torino (Italy); INFN (Italy); Marin Tobon, C.A. [CERN, 1210 Geneva 23 (Switzerland); Marras, D. [University of Cagliari, Cagliari (Italy); INFN (Italy); Mager, M.; Martinengo, P. [CERN, 1210 Geneva 23 (Switzerland); Mazza, G. [University of Torino, Torino (Italy); INFN (Italy); and others

2015-06-11

Active Pixel Sensors used in High Energy Particle Physics require low power consumption to reduce the detector material budget, low integration time to reduce the possibilities of pile-up and fast readout to improve the detector data capability. To satisfy these requirements, a novel Address-Encoder and Reset-Decoder (AERD) asynchronous circuit for a fast readout of a pixel matrix has been developed. The AERD data-driven readout architecture operates the address encoding and reset decoding based on an arbitration tree, and allows us to readout only the hit pixels. Compared to the traditional readout structure of the rolling shutter scheme in Monolithic Active Pixel Sensors (MAPS), AERD can achieve a low readout time and a low power consumption especially for low hit occupancies. The readout is controlled at the chip periphery with a signal synchronous with the clock, allows a good digital and analogue signal separation in the matrix and a reduction of the power consumption. The AERD circuit has been implemented in the TowerJazz 180 nm CMOS Imaging Sensor (CIS) process with full complementary CMOS logic in the pixel. It works at 10 MHz with a matrix height of 15 mm. The energy consumed to read out one pixel is around 72 pJ. A scheme to boost the readout speed to 40 MHz is also discussed. The sensor chip equipped with AERD has been produced and characterised. Test results including electrical beam measurement are presented.

Low-power priority Address-Encoder and Reset-Decoder data-driven readout for Monolithic Active Pixel Sensors for tracker system

Science.gov (United States)

Yang, P.; Aglieri, G.; Cavicchioli, C.; Chalmet, P. L.; Chanlek, N.; Collu, A.; Gao, C.; Hillemanns, H.; Junique, A.; Kofarago, M.; Keil, M.; Kugathasan, T.; Kim, D.; Kim, J.; Lattuca, A.; Marin Tobon, C. A.; Marras, D.; Mager, M.; Martinengo, P.; Mazza, G.; Mugnier, H.; Musa, L.; Puggioni, C.; Rousset, J.; Reidt, F.; Riedler, P.; Snoeys, W.; Siddhanta, S.; Usai, G.; van Hoorne, J. W.; Yi, J.

2015-06-01

Active Pixel Sensors used in High Energy Particle Physics require low power consumption to reduce the detector material budget, low integration time to reduce the possibilities of pile-up and fast readout to improve the detector data capability. To satisfy these requirements, a novel Address-Encoder and Reset-Decoder (AERD) asynchronous circuit for a fast readout of a pixel matrix has been developed. The AERD data-driven readout architecture operates the address encoding and reset decoding based on an arbitration tree, and allows us to readout only the hit pixels. Compared to the traditional readout structure of the rolling shutter scheme in Monolithic Active Pixel Sensors (MAPS), AERD can achieve a low readout time and a low power consumption especially for low hit occupancies. The readout is controlled at the chip periphery with a signal synchronous with the clock, allows a good digital and analogue signal separation in the matrix and a reduction of the power consumption. The AERD circuit has been implemented in the TowerJazz 180 nm CMOS Imaging Sensor (CIS) process with full complementary CMOS logic in the pixel. It works at 10 MHz with a matrix height of 15 mm. The energy consumed to read out one pixel is around 72 pJ. A scheme to boost the readout speed to 40 MHz is also discussed. The sensor chip equipped with AERD has been produced and characterised. Test results including electrical beam measurement are presented.

Submission of the First Full Scale Prototype Chip for Upgraded ATLAS Pixel Detector at LHC, FE-I4A

CERN Document Server

Barbero, M; The ATLAS collaboration; Beccherle, R; Darbo, G; Dube, S; Elledge, D; Fleury, J; Fougeron, D; Garcia-Sciveres, M; Gensolen, F; Gnani, D; Gromov, V; Jensen, F; Hemperek, T; Karagounis, M; Kluit, R; Kruth, A; Mekkaoui, A; Menouni, M; Schipper, JD; Wermes, N; Zivkovic, V

2010-01-01

A new ATLAS pixel chip FE-I4 is being developed for use in upgraded LHC luminosity environments, including the near-term Insertable B-Layer (IBL) upgrade. FE-I4 is designed in a 130nm CMOS technology, presenting advantages in terms of radiation tolerance and digital logic density compared to the 250nm CMOS technology used for the current ATLAS pixel IC, FE-I3. The FE-I4 architecture is based on an array of 80x336 pixels, each 50x250um^2, consisting of analog and digital sections. In the summer 2010, a first full scale prototype FE-I4A was submitted for an engineering run. This IC features the full scale pixel array as well as the complex periphery of the future full-size FE-I4. The FE-I4A contains also various extra test features which should prove very useful for the chip characterization, but deviate from the needs for standard operation of the final FE-I4 for IBL. In this paper, focus will be brought to the various features implemented in the FE-I4A submission, while also underlining the main differences b...

Semivariogram Analysis of Bone Images Implemented on FPGA Architectures.

Science.gov (United States)

Shirvaikar, Mukul; Lagadapati, Yamuna; Dong, Xuanliang

2017-03-01

Osteoporotic fractures are a major concern for the healthcare of elderly and female populations. Early diagnosis of patients with a high risk of osteoporotic fractures can be enhanced by introducing second-order statistical analysis of bone image data using techniques such as variogram analysis. Such analysis is computationally intensive thereby creating an impediment for introduction into imaging machines found in common clinical settings. This paper investigates the fast implementation of the semivariogram algorithm, which has been proven to be effective in modeling bone strength, and should be of interest to readers in the areas of computer-aided diagnosis and quantitative image analysis. The semivariogram is a statistical measure of the spatial distribution of data, and is based on Markov Random Fields (MRFs). Semivariogram analysis is a computationally intensive algorithm that has typically seen applications in the geosciences and remote sensing areas. Recently, applications in the area of medical imaging have been investigated, resulting in the need for efficient real time implementation of the algorithm. A semi-variance, γ ( h ), is defined as the half of the expected squared differences of pixel values between any two data locations with a lag distance of h . Due to the need to examine each pair of pixels in the image or sub-image being processed, the base algorithm complexity for an image window with n pixels is O ( n 2 ) Field Programmable Gate Arrays (FPGAs) are an attractive solution for such demanding applications due to their parallel processing capability. FPGAs also tend to operate at relatively modest clock rates measured in a few hundreds of megahertz. This paper presents a technique for the fast computation of the semivariogram using two custom FPGA architectures. A modular architecture approach is chosen to allow for replication of processing units. This allows for high throughput due to concurrent processing of pixel pairs. The current

Pixelated coatings and advanced IR coatings

Science.gov (United States)

Pradal, Fabien; Portier, Benjamin; Oussalah, Meihdi; Leplan, Hervé

2017-09-01

Reosc developed pixelated infrared coatings on detector. Reosc manufactured thick pixelated multilayer stacks on IR-focal plane arrays for bi-spectral imaging systems, demonstrating high filter performance, low crosstalk, and no deterioration of the device sensitivities. More recently, a 5-pixel filter matrix was designed and fabricated. Recent developments in pixelated coatings, shows that high performance infrared filters can be coated directly on detector for multispectral imaging. Next generation space instrument can benefit from this technology to reduce their weight and consumptions.

Characterisation of the NA62 GigaTracker End of Column Demonstrator Hybrid Pixel Detector

Science.gov (United States)

Noy, M.; Aglieri Rinella, G.; Cotta Ramusino, A.; Fiorini, M.; Jarron, P.; Kaplon, J.; Kluge, A.; Martin, E.; Morel, M.; Perktold, L.; Poltorak, K.; Riedler, P.

2011-11-01

The architecture and characterisation of the NA62 GigaTracker End of Column Demonstrator Hybrid Pixel Detector (HPD) are presented. This detector must perform time stamping to 200 ps (RMS) or better, provide 300 μm pitch position information and operate with a dead time of 1% or less for 800 MHz-1 GHz beam rate. The demonstrator HPD Assembly comprises a readout chip with a test column of 45 pixels, alongside other test structures, bump bonded to a p-in-n detector 200 μm in thickness. Validation of the performance of the HPD and the time-over-threshold timewalk compensation mechanism with both beam particles and a high precision laser system was performed and is presented. Confirmation of better than the required time stamping precision has been demonstrated and subsequent work on the design of the full-scale ASIC, dubbed TDCPix, is underway. An overview of the TDCPix architecure is given.

Design and realization of a fast low noise electronics for a hybrid pixel X-ray detector dedicated to small animal imaging

International Nuclear Information System (INIS)

Chantepie, Benoit

2008-01-01

Since the invention of computerized tomography (CT), charge integration detector were widely employed for X-ray biomedical imaging applications. Nevertheless, other options exist. A new technology of direct detection using semiconductors has been developed for high energy physics instrumentation. This new technology, called hybrid pixel detector, works in photon counting mode and allows for selecting the minimum energy of the counted photons. The imXgam research team at CPPM develops the PIXSCAN demonstrator, a CT-scanner using the hybrid pixel detector XPAD. The aim of this project is to evaluate the improvement on image quality and on dose delivered during X-ray examinations of a small animal. After a first prototype of hybrid pixel detector XPAD1 proving the feasibility of the project, a complete imager XPAD2 was designed and integrated in the PIXSCAN demonstrator. Since then, with the evolution of microelectronic industry, important improvements are conceivable. To reducing the size of pixels and to improving the energy resolution of detectors, a third design XPAD3 was conceived and will be soon integrated in a second generation of PIXSCAN demonstrator. In this project, my thesis's work consisted in taking part to the design of the detector readout electronics, to the characterization of the chips and of the hybrid pixel detectors, and also to the definition of an auto-zeroing architecture for pixels. (author) [fr

Centralized and Modular Architectures for Photovoltaic Panels with Improved Efficiency: Preprint

Energy Technology Data Exchange (ETDEWEB)

Dhakal, B.; Mancilla-David, F.; Muljadi, E.

2012-07-01

The most common type of photovoltaic installation in residential applications is the centralized architecture, but the performance of a centralized architecture is adversely affected when it is subject to partial shading effects due to clouds or surrounding obstacles, such as trees. An alternative modular approach can be implemented using several power converters with partial throughput power processing capability. This paper presents a detailed study of these two architectures for the same throughput power level and compares the overall efficiencies using a set of rapidly changing real solar irradiance data collected by the Solar Radiation Research Laboratory at the National Renewable Energy Laboratory.

Pixels, Blocks of Pixels, and Polygons: Choosing a Spatial Unit for Thematic Accuracy Assessment

Science.gov (United States)

Pixels, polygons, and blocks of pixels are all potentially viable spatial assessment units for conducting an accuracy assessment. We develop a statistical population-based framework to examine how the spatial unit chosen affects the outcome of an accuracy assessment. The populati...

Gossip: Gaseous pixels

Science.gov (United States)

Koffeman, E. N.

2007-12-01

Several years ago a revolutionary miniature TPC was developed using a pixel chip with a Micromegas foil spanned over it. To overcome the mechanical stability problems and improve the positioning accuracy while spanning a foil on top of a small readout chip a process has been developed in which a Micromegas-like grid is applied on a CMOS wafer in a post-processing step. This aluminum grid is supported on insulating pillars that are created by etching after the grid has been made. The energy resolution (measured on the absorption of the X-rays from a 55Fe source) was remarkably good. Several geometries have since been tested and we now believe that a Gas On Slimmed Silicon Pixel chip' (Gossip) may be realized. The drift region of such a gaseous pixel detector would be reduced to a millimeter. Such a detector is potentially very radiation hard (SLHC vertexing) but aging and sparking must be eliminated.

Gossip: Gaseous pixels

Energy Technology Data Exchange (ETDEWEB)

Koffeman, E.N. [Nikhef, Kruislaan 409, 1098 SJ Amsterdam (Netherlands)], E-mail: d77@nikhef.nl

2007-12-01

Several years ago a revolutionary miniature TPC was developed using a pixel chip with a Micromegas foil spanned over it. To overcome the mechanical stability problems and improve the positioning accuracy while spanning a foil on top of a small readout chip a process has been developed in which a Micromegas-like grid is applied on a CMOS wafer in a post-processing step. This aluminum grid is supported on insulating pillars that are created by etching after the grid has been made. The energy resolution (measured on the absorption of the X-rays from a {sup 55}Fe source) was remarkably good. Several geometries have since been tested and we now believe that a Gas On Slimmed Silicon Pixel chip' (Gossip) may be realized. The drift region of such a gaseous pixel detector would be reduced to a millimeter. Such a detector is potentially very radiation hard (SLHC vertexing) but aging and sparking must be eliminated.

Gossip: Gaseous pixels

International Nuclear Information System (INIS)

Koffeman, E.N.

2007-01-01

Several years ago a revolutionary miniature TPC was developed using a pixel chip with a Micromegas foil spanned over it. To overcome the mechanical stability problems and improve the positioning accuracy while spanning a foil on top of a small readout chip a process has been developed in which a Micromegas-like grid is applied on a CMOS wafer in a post-processing step. This aluminum grid is supported on insulating pillars that are created by etching after the grid has been made. The energy resolution (measured on the absorption of the X-rays from a 55 Fe source) was remarkably good. Several geometries have since been tested and we now believe that a Gas On Slimmed Silicon Pixel chip' (Gossip) may be realized. The drift region of such a gaseous pixel detector would be reduced to a millimeter. Such a detector is potentially very radiation hard (SLHC vertexing) but aging and sparking must be eliminated

Pixel 2010: A résumé

CERN Document Server

Wermes, Norbert

2011-01-01

The Pixel 2010 conference focused on semiconductor pixel detectors for particle tracking/vertexing as well as for imaging, in particular for synchrotron light sources and XFELs. The big LHC hybrid pixel detectors have impressively started showing their capabilities. X-ray imaging detectors, also using the hybrid pixel technology, have greatly advanced the experimental possibilities for diffraction experiments. Monolithic or semi-monolithic devices like CMOS active pixels and DEPFET pixels have now reached a state such that complete vertex detectors for RHIC and superKEKB are being built with these technologies. Finally, new advances towards fully monolithic active pixel detectors, featuring full CMOS electronics merged with efficient signal charge collection, exploiting standard CMOS technologies, SOI and/or 3D integration, show the path for the future. This résumé attempts to extract the main statements of the results and developments presented at this conference.

Development and characterization of diamond and 3D-silicon pixel detectors with ATLAS-pixel readout electronics

International Nuclear Information System (INIS)

Mathes, Markus

2008-12-01

Hybrid pixel detectors are used for particle tracking in the innermost layers of current high energy experiments like ATLAS. After the proposed luminosity upgrade of the LHC, they will have to survive very high radiation fluences of up to 10 16 particles per cm 2 per life time. New sensor concepts and materials are required, which promise to be more radiation tolerant than the currently used planar silicon sensors. Most prominent candidates are so-called 3D-silicon and single crystal or poly-crystalline diamond sensors. Using the ATLAS pixel electronics different detector prototypes with a pixel geometry of 400 x 50 μm 2 have been built. In particular three devices have been studied in detail: a 3D-silicon and a single crystal diamond detector with an active area of about 1 cm 2 and a poly-crystalline diamond detector of the same size as a current ATLAS pixel detector module (2 x 6 cm 2 ). To characterize the devices regarding their particle detection efficiency and spatial resolution, the charge collection inside a pixel cell as well as the charge sharing between adjacent pixels was studied using a high energy particle beam. (orig.)

Study and Development of a novel Silicon Pixel Detector for the Upgrade of the ALICE Inner Tracking System

CERN Document Server

van Hoorn, Jacobus Willem; Riedler, Petra

ALICE (A Large Ion Collider Experiment) is the heavy-ion experiment at the CERN Large Hadron Collider (LHC). As an important part of its upgrade plans, the ALICE experiment schedules the installation of a new Inner Tracking System (ITS) during the Long Shutdown 2 (LS2) of the LHC in 2019/20. The new ITS will consist of seven concentric layers, covering about 10m2 with Monolithic Active Pixel Sensors (MAPS). This choice of technology has been guided by the tight requirements on the material budget of 0.3 % x/X0 per layer for the three innermost layers and backed by the significant progress in the field of MAPS in recent years. The pixel chips are manufactured in the TowerJazz 180 nm CMOS process on wafers with a high-resistivity epitaxial layer on top of the substrate. During the R&D phase several chip architectures have been investigated, which take full advantage of a particular process feature, the deep p-well, that allows for full CMOS circuitry within the pixel matrix while retaining full charge colle...

Overview of the CMS Pixel Detector

CERN Document Server

Cerati, Giuseppe B

2008-01-01

The Compact Muon Solenoid Experiment (CMS) will start taking data at the Large Hadron Collider (LHC) in 2009. It will investigate the proton-proton collisions at $14~TeV$. A robust tracking combined with a precise vertex reconstruction is crucial to address the physics challenge of proton collisions at this energy. To this extent an all-silicon tracking system with very fine granularity has been built and now is in the final commissioning phase. It represents the largest silicon tracking detector ever built. The system is composed by an outer part, made of micro-strip detectors, and an inner one, made of pixel detectors. The pixel detector consists of three pixel barrel layers and two forward disks at each side of the interaction region. Each pixel sensor, both for the barrel and forward detectors, has $100 \\times 150$ $\\mu m^2$ cells for a total of 66 million pixels covering a total area of about $1~m^2$. The pixel detector will play a crucial role in the pattern recognition and the track reconstruction both...

Dead pixel replacement in LWIR microgrid polarimeters.

Science.gov (United States)

Ratliff, Bradley M; Tyo, J Scott; Boger, James K; Black, Wiley T; Bowers, David L; Fetrow, Matthew P

2007-06-11

LWIR imaging arrays are often affected by nonresponsive pixels, or "dead pixels." These dead pixels can severely degrade the quality of imagery and often have to be replaced before subsequent image processing and display of the imagery data. For LWIR arrays that are integrated with arrays of micropolarizers, the problem of dead pixels is amplified. Conventional dead pixel replacement (DPR) strategies cannot be employed since neighboring pixels are of different polarizations. In this paper we present two DPR schemes. The first is a modified nearest-neighbor replacement method. The second is a method based on redundancy in the polarization measurements.We find that the redundancy-based DPR scheme provides an order-of-magnitude better performance for typical LWIR polarimetric data.

CMS Barrel Pixel Detector Overview

CERN Document Server

Kästli, H C; Erdmann, W; Gabathuler, K; Hörmann, C; Horisberger, Roland Paul; König, S; Kotlinski, D; Meier, B; Robmann, P; Rohe, T; Streuli, S

2007-01-01

The pixel detector is the innermost tracking device of the CMS experiment at the LHC. It is built from two independent sub devices, the pixel barrel and the end disks. The barrel consists of three concentric layers around the beam pipe with mean radii of 4.4, 7.3 and 10.2 cm. There are two end disks on each side of the interaction point at 34.5 cm and 46.5 cm. This article gives an overview of the pixel barrel detector, its mechanical support structure, electronics components, services and its expected performance.

CMS has a heart of pixels

CERN Multimedia

2003-01-01

In the immediate vicinity of the collision point, CMS will be equipped with pixel detectors consisting of no fewer than 50 million pixels measuring 150 microns along each side. Each of the pixels, which receive the signal, is connected to its own electronic circuit by a tiny sphere (seen here in the electron microscope image) measuring 15 to 20 microns in diameter.

Development and characterization of diamond and 3D-silicon pixel detectors with ATLAS-pixel readout electronics

Energy Technology Data Exchange (ETDEWEB)

Mathes, Markus

2008-12-15

Hybrid pixel detectors are used for particle tracking in the innermost layers of current high energy experiments like ATLAS. After the proposed luminosity upgrade of the LHC, they will have to survive very high radiation fluences of up to 10{sup 16} particles per cm{sup 2} per life time. New sensor concepts and materials are required, which promise to be more radiation tolerant than the currently used planar silicon sensors. Most prominent candidates are so-called 3D-silicon and single crystal or poly-crystalline diamond sensors. Using the ATLAS pixel electronics different detector prototypes with a pixel geometry of 400 x 50 {mu}m{sup 2} have been built. In particular three devices have been studied in detail: a 3D-silicon and a single crystal diamond detector with an active area of about 1 cm{sup 2} and a poly-crystalline diamond detector of the same size as a current ATLAS pixel detector module (2 x 6 cm{sup 2}). To characterize the devices regarding their particle detection efficiency and spatial resolution, the charge collection inside a pixel cell as well as the charge sharing between adjacent pixels was studied using a high energy particle beam. (orig.)

A Generic Architecture for Autonomous Uninhabited Vehicles

National Research Council Canada - National Science Library

Barbier, Magali; Gabard, Jean-Francois; Ayreault, Herve

2007-01-01

...; few solutions propose architecture adaptive to several types of platform. Autonomous vehicles that move in partially known and dynamic environments have to deal with asynchronous disruptive events...

High dynamic range imaging sensors and architectures

CERN Document Server

Darmont, Arnaud

2013-01-01

Illumination is a crucial element in many applications, matching the luminance of the scene with the operational range of a camera. When luminance cannot be adequately controlled, a high dynamic range (HDR) imaging system may be necessary. These systems are being increasingly used in automotive on-board systems, road traffic monitoring, and other industrial, security, and military applications. This book provides readers with an intermediate discussion of HDR image sensors and techniques for industrial and non-industrial applications. It describes various sensor and pixel architectures capable

MT-ADRES: Multithreading on Coarse-Grained Reconfigurable Architecture

DEFF Research Database (Denmark)

Wu, Kehuai; Kanstein, Andreas; Madsen, Jan

2007-01-01

The coarse-grained reconfigurable architecture ADRES (Architecture for Dynamically Reconfigurable Embedded Systems) and its compiler offer high instruction-level parallelism (ILP) to applications by means of a sparsely interconnected array of functional units and register files. As high-ILP archi......The coarse-grained reconfigurable architecture ADRES (Architecture for Dynamically Reconfigurable Embedded Systems) and its compiler offer high instruction-level parallelism (ILP) to applications by means of a sparsely interconnected array of functional units and register files. As high......-ILP architectures achieve only low parallelism when executing partially sequential code segments, which is also known as Amdahl’s law, this paper proposes to extend ADRES to MT-ADRES (Multi-Threaded ADRES) to also exploit thread-level parallelism. On MT-ADRES architectures, the array can be partitioned in multiple...

Charge sharing in silicon pixel detectors

CERN Document Server

Mathieson, K; Seller, P; Prydderch, M L; O'Shea, V; Bates, R L; Smith, K M; Rahman, M

2002-01-01

We used a pixellated hybrid silicon X-ray detector to study the effect of the sharing of generated charge between neighbouring pixels over a range of incident X-ray energies, 13-36 keV. The system is a room temperature, energy resolving detector with a Gaussian FWHM of 265 eV at 5.9 keV. Each pixel is 300 mu m square, 300 mu m deep and is bump bonded to matching read out electronics. The modelling packages MEDICI and MCNP were used to model the complete X-ray interaction and the subsequent charge transport. Using this software a model is developed which reproduces well the experimental results. The simulations are then altered to explore smaller pixel sizes and different X-ray energies. Charge sharing was observed experimentally to be 2% at 13 keV rising to 4.5% at 36 keV, for an energy threshold of 4 keV. The models predict that up to 50% of charge may be lost to the neighbouring pixels, for an X-ray energy of 36 keV, when the pixel size is reduced to 55 mu m.

Experimental characterization of a 10 μW 55 μm-pitch FPN-compensated CMOS digital pixel sensor for X-ray imagers

Energy Technology Data Exchange (ETDEWEB)

Figueras, Roger, E-mail: roger.figueras@imb-cnm.csic.es [Institut de Microelectrònica de Barcelona IMB-CNM(CSIC), Bellaterra (Spain); Martínez, Ricardo; Terés, Lluís [Institut de Microelectrònica de Barcelona IMB-CNM(CSIC), Bellaterra (Spain); Serra-Graells, Francisco [Institut de Microelectrònica de Barcelona IMB-CNM(CSIC), Bellaterra (Spain); Department of Microelectronics and Electronic Systems, Universitat Autònoma de Barcelona, Bellaterra (Spain)

2014-10-11

This paper presents experimental results obtained from both electrical and radiation tests of a new room-temperature digital pixel sensor (DPS) circuit specifically optimized for digital direct X-ray imaging. The 10 μW 55 μm-pitch CMOS active pixel circuit under test includes self-bias capability, built-in test, selectable e{sup −}/h{sup +} collection, 10-bit charge-integration A/D conversion, individual gain tuning for fixed pattern noise (FPN) cancellation, and digital-only I/O interface, which make it suitable for 2D modular chip assemblies in large and seamless sensing areas. Experimental results for this DPS architecture in 0.18 μm 1P6M CMOS technology are reported, returning good performance in terms of linearity, 2ke{sub rms}{sup −} of ENC, inter-pixel crosstalk below 0.5 LSB, 50 Mbps of I/O speed, and good radiation response for its use in digital X-ray imaging.

Charge Pump Clock Generation PLL for the Data Output Block of the Upgraded ATLAS Pixel Front-End in 130 nm CMOS

CERN Document Server

Kruth, A; Arutinov, D; Barbero, M; Gronewald, M; Hemperek, T; Karagounis, M; Krueger, H; Wermes, N; Fougeron, D; Menouni, M; Beccherle, R; Dube, S; Ellege, D; Garcia-Sciveres, M; Gnani, D; Mekkaoui, A; Gromov, V; Kluit, R; Schipper, J

2009-01-01

FE-I4 is the 130 nm ATLAS pixel IC currently under development for upgraded Large Hadron Collider (LHC) luminosities. FE-I4 is based on a low-power analog pixel array and digital architecture concepts tuned to higher hit rates [1]. An integrated Phase Locked Loop (PLL) has been developed that locally generates a clock signal for the 160 Mbit/s output data stream from the 40 MHz bunch crossing reference clock. This block is designed for low power, low area consumption and recovers quickly from loss of lock related to single-event transients in the high radiation environment of the ATLAS pixel detector. After a general introduction to the new FE-I4 pixel front-end chip, this work focuses on the FE-I4 output blocks and on a first PLL prototype test chip submitted in early 2009. The PLL is nominally operated from a 1.2V supply and consumes 3.84mW of DC power. Under nominal operating conditions, the control voltage settles to within 2% of its nominal value in less than 700 ns. The nominal operating frequency for t...

CVD diamond pixel detectors for LHC experiments

Energy Technology Data Exchange (ETDEWEB)

Wedenig, R.; Adam, W.; Bauer, C.; Berdermann, E.; Bergonzo, P.; Bogani, F.; Borchi, E.; Brambilla, A.; Bruzzi, M.; Colledani, C.; Conway, J.; Dabrowski, W.; Delpierre, P.; Deneuville, A.; Dulinski, W.; Eijk, B. van; Fallou, A.; Fizzotti, F.; Foulon, F.; Friedl, M.; Gan, K.K.; Gheeraert, E.; Grigoriev, E.; Hallewell, G.; Hall-Wilton, R.; Han, S.; Hartjes, F.; Hrubec, J.; Husson, D.; Kagan, H.; Kania, D.; Kaplon, J.; Karl, C.; Kass, R.; Knoepfle, K.T.; Krammer, M.; Logiudice, A.; Lu, R.; Manfredi, P.F.; Manfredotti, C.; Marshall, R.D.; Meier, D.; Mishina, M.; Oh, A.; Pan, L.S.; Palmieri, V.G.; Pernicka, M.; Peitz, A.; Pirollo, S.; Polesello, P.; Pretzl, K.; Procario, M.; Re, V.; Riester, J.L.; Roe, S.; Roff, D.; Rudge, A.; Runolfsson, O.; Russ, J.; Schnetzer, S.; Sciortino, S.; Speziali, V.; Stelzer, H.; Stone, R.; Suter, B.; Tapper, R.J.; Tesarek, R.; Trawick, M.; Trischuk, W.; Vittone, E.; Wagner, A.; Walsh, A.M.; Weilhammer, P.; White, C.; Zeuner, W.; Ziock, H.; Zoeller, M.; Blanquart, L.; Breugnion, P.; Charles, E.; Ciocio, A.; Clemens, J.C.; Dao, K.; Einsweiler, K.; Fasching, D.; Fischer, P.; Joshi, A.; Keil, M.; Klasen, V.; Kleinfelder, S.; Laugier, D.; Meuser, S.; Milgrome, O.; Mouthuy, T.; Richardson, J.; Sinervo, P.; Treis, J.; Wermes, N

1999-08-01

This paper reviews the development of CVD diamond pixel detectors. The preparation of the diamond pixel sensors for bump-bonding to the pixel readout electronics for the LHC and the results from beam tests carried out at CERN are described.

CVD diamond pixel detectors for LHC experiments

International Nuclear Information System (INIS)

Wedenig, R.; Adam, W.; Bauer, C.; Berdermann, E.; Bergonzo, P.; Bogani, F.; Borchi, E.; Brambilla, A.; Bruzzi, M.; Colledani, C.; Conway, J.; Dabrowski, W.; Delpierre, P.; Deneuville, A.; Dulinski, W.; Eijk, B. van; Fallou, A.; Fizzotti, F.; Foulon, F.; Friedl, M.; Gan, K.K.; Gheeraert, E.; Grigoriev, E.; Hallewell, G.; Hall-Wilton, R.; Han, S.; Hartjes, F.; Hrubec, J.; Husson, D.; Kagan, H.; Kania, D.; Kaplon, J.; Karl, C.; Kass, R.; Knoepfle, K.T.; Krammer, M.; Logiudice, A.; Lu, R.; Manfredi, P.F.; Manfredotti, C.; Marshall, R.D.; Meier, D.; Mishina, M.; Oh, A.; Pan, L.S.; Palmieri, V.G.; Pernicka, M.; Peitz, A.; Pirollo, S.; Polesello, P.; Pretzl, K.; Procario, M.; Re, V.; Riester, J.L.; Roe, S.; Roff, D.; Rudge, A.; Runolfsson, O.; Russ, J.; Schnetzer, S.; Sciortino, S.; Speziali, V.; Stelzer, H.; Stone, R.; Suter, B.; Tapper, R.J.; Tesarek, R.; Trawick, M.; Trischuk, W.; Vittone, E.; Wagner, A.; Walsh, A.M.; Weilhammer, P.; White, C.; Zeuner, W.; Ziock, H.; Zoeller, M.; Blanquart, L.; Breugnion, P.; Charles, E.; Ciocio, A.; Clemens, J.C.; Dao, K.; Einsweiler, K.; Fasching, D.; Fischer, P.; Joshi, A.; Keil, M.; Klasen, V.; Kleinfelder, S.; Laugier, D.; Meuser, S.; Milgrome, O.; Mouthuy, T.; Richardson, J.; Sinervo, P.; Treis, J.; Wermes, N.

1999-01-01

This paper reviews the development of CVD diamond pixel detectors. The preparation of the diamond pixel sensors for bump-bonding to the pixel readout electronics for the LHC and the results from beam tests carried out at CERN are described

Research and Development of Monolithic Active Pixel Sensors for the Detection of the Elementary Particles; Recherche et developpement de capteurs actifs monolithiques CMOS pour la detection de particules elementaires

Energy Technology Data Exchange (ETDEWEB)

Li, Y

2007-09-15

In order to develop high spatial resolution and readout speed vertex detectors for the future International Linear Collider (ILC), fast CMOS Monolithic Active Pixel Sensors (MAPS) are studied on this work. Two prototypes of MAPS, MIMOSA 8 and MIMOSA 16, based on the same micro-electronic architecture were developed in CMOS processes with different thickness of epitaxial layer. The size of pixel matrix is 32 x 128: 8 columns of the pixel array are readout directly with analog outputs and the other 24 columns are connected to the column level auto-zero discriminators. The Correlated Double Sampling (CDS) structures are successfully implemented inside pixel and discriminator. The photo diode type pixels with different diode sizes are used in these prototypes. With a {sup 55}Fe X-ray radioactive source, the important parameters, such as Temporal Noise, Fixed Pattern Noise (FPN), Signal-to-Noise Ratio (SNR), Charge-to-Voltage conversion Factor (CVF) and Charge Collection Efficiency (CCE), are studied as function of readout speed and diode size. For MIMOSA 8, the effect of fast neutrons irradiation is also. Two beam tests campaigns were made: at DESY with a 5 GeV electrons beam and at CERN with a 180 GeV pions beam. Detection Efficiency and Spatial Resolution are studied in function of the discriminator threshold. For these two parameters, the influences of diode size and SNR of the central pixel of a cluster are also discussed. In order to improve the spatial resolution of the digital outputs, a very compact (25 {mu}m x 1 mm) and low consumption (300 {mu}W) column level ADC is designed in AMS 0.35 {mu}m OPTO process. Based on successive approximation architecture, the auto-offset cancellation structure is integrated. A new column level auto-zero discriminator using static latch is also designed. (author)

Fast readout logic interfacing a 256-pixel matrix of a dual-layer 3D device

International Nuclear Information System (INIS)

Gabrielli, A; Giorgi, F; Villa, M; Morsani, F

2010-01-01

A prototype of a 3D ASIC built up of a fast readout architecture, with sparsification capabilities, which interfaces with a matrix of a 256-pixel sensor, was recently submitted. The chosen technology is CMOS Chartered 130 nm as it is compatible with the Tezzaron facility to interconnect face-to-face two silicon wafers allowing for a vertical integration structure by means of through-silicon-vias. Particularly, the readout logic uses one layer that will be stacked on a sensor layer at the end of the fabrication process.

Fast readout logic interfacing a 256-pixel matrix of a dual-layer 3D device

Energy Technology Data Exchange (ETDEWEB)

Gabrielli, A; Giorgi, F; Villa, M [INFN-Bologna and Physics Department, University of Bologna, Viale Berti Pichat, 6/2, 40127, Bologna (Italy); Morsani, F, E-mail: alessandro.gabrielli@bo.infn.i [INFN-Pisa and University of Pisa, Largo B. Pontecorvo, 3, 56127, Pisa (Italy)

2010-07-15

A prototype of a 3D ASIC built up of a fast readout architecture, with sparsification capabilities, which interfaces with a matrix of a 256-pixel sensor, was recently submitted. The chosen technology is CMOS Chartered 130 nm as it is compatible with the Tezzaron facility to interconnect face-to-face two silicon wafers allowing for a vertical integration structure by means of through-silicon-vias. Particularly, the readout logic uses one layer that will be stacked on a sensor layer at the end of the fabrication process.

Urban Image Classification: Per-Pixel Classifiers, Sub-Pixel Analysis, Object-Based Image Analysis, and Geospatial Methods. 10; Chapter

Science.gov (United States)

Myint, Soe W.; Mesev, Victor; Quattrochi, Dale; Wentz, Elizabeth A.

2013-01-01

Remote sensing methods used to generate base maps to analyze the urban environment rely predominantly on digital sensor data from space-borne platforms. This is due in part from new sources of high spatial resolution data covering the globe, a variety of multispectral and multitemporal sources, sophisticated statistical and geospatial methods, and compatibility with GIS data sources and methods. The goal of this chapter is to review the four groups of classification methods for digital sensor data from space-borne platforms; per-pixel, sub-pixel, object-based (spatial-based), and geospatial methods. Per-pixel methods are widely used methods that classify pixels into distinct categories based solely on the spectral and ancillary information within that pixel. They are used for simple calculations of environmental indices (e.g., NDVI) to sophisticated expert systems to assign urban land covers. Researchers recognize however, that even with the smallest pixel size the spectral information within a pixel is really a combination of multiple urban surfaces. Sub-pixel classification methods therefore aim to statistically quantify the mixture of surfaces to improve overall classification accuracy. While within pixel variations exist, there is also significant evidence that groups of nearby pixels have similar spectral information and therefore belong to the same classification category. Object-oriented methods have emerged that group pixels prior to classification based on spectral similarity and spatial proximity. Classification accuracy using object-based methods show significant success and promise for numerous urban 3 applications. Like the object-oriented methods that recognize the importance of spatial proximity, geospatial methods for urban mapping also utilize neighboring pixels in the classification process. The primary difference though is that geostatistical methods (e.g., spatial autocorrelation methods) are utilized during both the pre- and post

Towards a new generation of pixel detector readout chips

CERN Document Server

Campbell, M; Ballabriga, R.; Frojdh, E.; Heijne, E.; Llopart, X.; Poikela, T.; Tlustos, L.; Valerio, P.; Wong, W.

2016-01-01

The Medipix3 Collaboration has broken new ground in spectroscopic X-ray imaging and in single particle detection and tracking. This paper will review briefly the performance and limitations of the present generation of pixel detector readout chips developed by the Collaboration. Through Silicon Via technology has the potential to provide a significant improvement in the tile- ability and more flexibility in the choice of readout architecture. This has been explored in the context of 3 projects with CEA-LETI using Medipix3 and Timepix3 wafers. The next generation of chips will aim to provide improved spectroscopic imaging performance at rates compatible with human CT. It will also aim to provide full spectroscopic images with unprecedented energy and spatial resolution. Some of the opportunities and challenges posed by moving to a more dense CMOS process will be discussed.

Improvement of Shade Resilience in Photovoltaic Modules Using Buck Converters in a Smart Module Architecture

Directory of Open Access Journals (Sweden)

S. Zahra Mirbagheri Golroodbari

2018-01-01

Full Text Available Partial shading has a nonlinear effect on the performance of photovoltaic (PV modules. Different methods of optimizing energy harvesting under partial shading conditions have been suggested to mitigate this issue. In this paper, a smart PV module architecture is proposed for improvement of shade resilience in a PV module consisting of 60 silicon solar cells, which compensates the current drops caused by partial shading. The architecture consists of groups of series-connected solar cells in parallel to a DC-DC buck converter. The number of cell groups is optimized with respect to cell and converter specifications using a least-squares support vector machine method. A generic model is developed to simulate the behavior of the smart architecture under different shading patterns, using high time resolution irradiance data. In this research the shading patterns are a combination of random and pole shadows. To investigate the shade resilience, results for the smart architecture are compared with an ideal module, and also ordinary series and parallel connected architectures. Although the annual yield for the smart architecture is 79.5% of the yield of an ideal module, we show that the smart architecture outperforms a standard series connected module by 47%, and a parallel architecture by 13.4%.

CVD diamond pixel detectors for LHC experiments

CERN Document Server

Wedenig, R; Bauer, C; Berdermann, E; Bergonzo, P; Bogani, F; Borchi, E; Brambilla, A; Bruzzi, Mara; Colledani, C; Conway, J; Dabrowski, W; Delpierre, P A; Deneuville, A; Dulinski, W; van Eijk, B; Fallou, A; Fizzotti, F; Foulon, F; Friedl, M; Gan, K K; Gheeraert, E; Grigoriev, E; Hallewell, G D; Hall-Wilton, R; Han, S; Hartjes, F G; Hrubec, Josef; Husson, D; Kagan, H; Kania, D R; Kaplon, J; Karl, C; Kass, R; Knöpfle, K T; Krammer, Manfred; Lo Giudice, A; Lü, R; Manfredi, P F; Manfredotti, C; Marshall, R D; Meier, D; Mishina, M; Oh, A; Pan, L S; Palmieri, V G; Pernicka, Manfred; Peitz, A; Pirollo, S; Polesello, P; Pretzl, Klaus P; Procario, M; Re, V; Riester, J L; Roe, S; Roff, D G; Rudge, A; Runólfsson, O; Russ, J; Schnetzer, S R; Sciortino, S; Speziali, V; Stelzer, H; Stone, R; Suter, B; Tapper, R J; Tesarek, R J; Trawick, M L; Trischuk, W; Vittone, E; Wagner, A; Walsh, A M; Weilhammer, Peter; White, C; Zeuner, W; Ziock, H J; Zöller, M

1999-01-01

This paper reviews the development of CVD diamond pixel detectors. The preparation of the diamond pixel sensors for bump-bonding to the pixel readout electronics for the LHC and the results from beam tests carried out at CERN are described. (9 refs).

The ALPIDE pixel sensor chip for the upgrade of the ALICE Inner Tracking System

Energy Technology Data Exchange (ETDEWEB)

Aglieri Rinella, Gianluca, E-mail: gianluca.aglieri.rinella@cern.ch

2017-02-11

The ALPIDE chip is a CMOS Monolithic Active Pixel Sensor being developed for the Upgrade of the ITS of the ALICE experiment at the CERN Large Hadron Collider. The ALPIDE chip is implemented with a 180 nm CMOS Imaging Process and fabricated on substrates with a high-resistivity epitaxial layer. It measures 15 mm×30 mm and contains a matrix of 512×1024 pixels with in-pixel amplification, shaping, discrimination and multi-event buffering. The readout of the sensitive matrix is hit driven. There is no signaling activity over the matrix if there are no hits to read out and power consumption is proportional to the occupancy. The sensor meets the experimental requirements of detection efficiency above 99%, fake-hit probability below 10{sup −5} and a spatial resolution of 5 μm. The capability to read out Pb–Pb interactions at 100 kHz is provided. The power density of the ALPIDE chip is projected to be less than 35 mW/cm{sup 2} for the application in the Inner Barrel Layers and below 20 mW/cm{sup 2} for the Outer Barrel Layers, where the occupancy is lower. This contribution describes the architecture and the main features of the final ALPIDE chip, planned for submission at the beginning of 2016. Early results from the experimental qualification of full scale prototype predecessors are also reported. - Highlights: • The ALPIDE chip, an innovative CMOS pixel particle detector is described. • It achieves excellent detection performance figures and very low power consumption. • The characterization of prototypes confirms the achievement of the specifications.

Mapping Electrical Crosstalk in Pixelated Sensor Arrays

Science.gov (United States)

Seshadri, Suresh (Inventor); Cole, David (Inventor); Smith, Roger M. (Inventor); Hancock, Bruce R. (Inventor)

2017-01-01

The effects of inter pixel capacitance in a pixilated array may be measured by first resetting all pixels in the array to a first voltage, where a first image is read out, followed by resetting only a subset of pixels in the array to a second voltage, where a second image is read out, where the difference in the first and second images provide information about the inter pixel capacitance. Other embodiments are described and claimed.

Operational Experience with the ATLAS Pixel Detector

CERN Document Server

Djama, Fares; The ATLAS collaboration

2017-01-01

Run 2 of the LHC collider sets new challenges to track and vertex reconstruction because of its higher energy, pileup and luminosity. The ATLAS tracking performance relies critically on the Pixel Detector. Therefore, in view of Run 2, the ATLAS collaboration has constructed the first 4-layer pixel detector in Particle Physics by installing a new pixel layer, called Insertable B-Layer (IBL). Operational experience and performance of the 4-layer Pixel Detector during Run 2 are presented.

Pixel-based OPC optimization based on conjugate gradients.

Science.gov (United States)

Ma, Xu; Arce, Gonzalo R

2011-01-31

Optical proximity correction (OPC) methods are resolution enhancement techniques (RET) used extensively in the semiconductor industry to improve the resolution and pattern fidelity of optical lithography. In pixel-based OPC (PBOPC), the mask is divided into small pixels, each of which is modified during the optimization process. Two critical issues in PBOPC are the required computational complexity of the optimization process, and the manufacturability of the optimized mask. Most current OPC optimization methods apply the steepest descent (SD) algorithm to improve image fidelity augmented by regularization penalties to reduce the complexity of the mask. Although simple to implement, the SD algorithm converges slowly. The existing regularization penalties, however, fall short in meeting the mask rule check (MRC) requirements often used in semiconductor manufacturing. This paper focuses on developing OPC optimization algorithms based on the conjugate gradient (CG) method which exhibits much faster convergence than the SD algorithm. The imaging formation process is represented by the Fourier series expansion model which approximates the partially coherent system as a sum of coherent systems. In order to obtain more desirable manufacturability properties of the mask pattern, a MRC penalty is proposed to enlarge the linear size of the sub-resolution assistant features (SRAFs), as well as the distances between the SRAFs and the main body of the mask. Finally, a projection method is developed to further reduce the complexity of the optimized mask pattern.

Development of a two-dimensional ASIC for hard X-ray spectroscopy and imaging with a CdTe pixel detector

International Nuclear Information System (INIS)

Hiruta, Tatsuro; Tamura, K.; Ikeda, H.; Nakazawa, K.; Takasima, T.; Takahashi, T.

2006-01-01

We are developing a two-dimensional analog ASIC for the readout of pixel sensors based on silicon (Si) or cadmium telluride (CdTe) for spectroscopic imaging observations in the X-ray and gamma-ray regions. The aim for the ASIC is to obtain a low-noise performance better than 100 electrons (rms) with self-triggering capabilities. As the first step of prototyping, we have fabricated several ASICs. We obtained an energy resolution of 5.4 keV (FWHM) for 81 keV gamma-rays from 133 Ba with a one-dimensional ASIC connected to a CdTe diode and also verified a readout architecture via a two-dimensional ASIC with 144 pixel channels. Based on the results obtained and experience gained through prototype ASICs, we are developing a 4096-channel two-dimensional analog ASIC

Development of CMOS pixel sensors for the upgrade of the ALICE Inner Tracking System

International Nuclear Information System (INIS)

Molnar, L.

2014-01-01

The ALICE Collaboration is preparing a major upgrade of the current detector, planned for installation during the second long LHC shutdown in the years 2018-19, in order to enhance its low-momentum vertexing and tracking capability, and exploit the planned increase of the LHC luminosity with Pb beams. One of the cornerstones of the ALICE upgrade strategy is to replace the current Inner Tracking System in its entirety with a new, high resolution, low-material ITS detector. The new ITS will consist of seven concentric layers equipped with Monolithic Active Pixel Sensors (MAPS) implemented using the 0.18 μm CMOS technology of TowerJazz. In this contribution, the main key features of the ITS upgrade will be illustrated with emphasis on the functionality of the pixel chip. The ongoing developments on the readout architectures, which have been implemented in several fabricated prototypes, will be discussed. The operational features of these prototypes as well as the results of the characterisation tests before and after irradiation will also be presented

Development of CMOS pixel sensors for the upgrade of the ALICE Inner Tracking System

Science.gov (United States)

Molnar, L.

2014-12-01

The ALICE Collaboration is preparing a major upgrade of the current detector, planned for installation during the second long LHC shutdown in the years 2018-19, in order to enhance its low-momentum vertexing and tracking capability, and exploit the planned increase of the LHC luminosity with Pb beams. One of the cornerstones of the ALICE upgrade strategy is to replace the current Inner Tracking System in its entirety with a new, high resolution, low-material ITS detector. The new ITS will consist of seven concentric layers equipped with Monolithic Active Pixel Sensors (MAPS) implemented using the 0.18 μm CMOS technology of TowerJazz. In this contribution, the main key features of the ITS upgrade will be illustrated with emphasis on the functionality of the pixel chip. The ongoing developments on the readout architectures, which have been implemented in several fabricated prototypes, will be discussed. The operational features of these prototypes as well as the results of the characterisation tests before and after irradiation will also be presented.

Point DCT VLSI Architecture for Emerging HEVC Standard

OpenAIRE

Ahmed, Ashfaq; Shahid, Muhammad Usman; Rehman, Ata ur

2012-01-01

This work presents a flexible VLSI architecture to compute the -point DCT. Since HEVC supports different block sizes for the computation of the DCT, that is, 4 × 4 up to 3 2 × 3 2 , the design of a flexible architecture to support them helps reducing the area overhead of hardware implementations. The hardware proposed in this work is partially folded to save area and to get speed for large video sequences sizes. The proposed architecture relies on the decomposition of the DCT matrices into ...

Design and performance of large-pixel-size high-fill-fraction TES arrays for future X-ray astrophysics missions

International Nuclear Information System (INIS)

Figueroa-Feliciano, E.; Bandler, S.R.; Chervenak, J.; Finkbeiner, F.; Iyomoto, N.; Kelley, R.L.; Kilbourne, C.A.; Porter, F.S.; Saab, T.; Sadleir, J.; White, J.

2006-01-01

We have designed, modeled, fabricated and tested a 600μm high-fill-fraction microcalorimeter array that will be a good match to the requirements of future X-ray missions. Our devices use transition-edge sensors coupled to overhanging bismuth/copper absorbers to produce arrays with 97% or higher fill fraction. An extensive modeling effort was undertaken in order to accommodate large pixel sizes (500-1000μm) and maintain the best energy resolution possible. The finite thermalization time of the large absorber and the associated position dependence of the pulse shape on absorption position constrain the time constants of the system given a desired energy-resolution performance. We show the results of our analysis and our new pixel design, consisting of a novel TES-on-the-side architecture which creates a controllable TES-absorber conductance

Real-time recursive hyperspectral sample and band processing algorithm architecture and implementation

CERN Document Server

Chang, Chein-I

2017-01-01

This book explores recursive architectures in designing progressive hyperspectral imaging algorithms. In particular, it makes progressive imaging algorithms recursive by introducing the concept of Kalman filtering in algorithm design so that hyperspectral imagery can be processed not only progressively sample by sample or band by band but also recursively via recursive equations. This book can be considered a companion book of author’s books, Real-Time Progressive Hyperspectral Image Processing, published by Springer in 2016. Explores recursive structures in algorithm architecture Implements algorithmic recursive architecture in conjunction with progressive sample and band processing Derives Recursive Hyperspectral Sample Processing (RHSP) techniques according to Band-Interleaved Sample/Pixel (BIS/BIP) acquisition format Develops Recursive Hyperspectral Band Processing (RHBP) techniques according to Band SeQuential (BSQ) acquisition format for hyperspectral data.

The NA60 experiment readout architecture

CERN Document Server

Floris, M; Usai, G L; David, A; Rosinsky, P; Ohnishi, H

2004-01-01

The NA60 experiment was designed to identify signatures of a new state of matter, the Quark Gluon Plasma, in heavy-ion collisions at the CERN Super Proton Synchroton. The apparatus is composed of four main detectors: a muon spectrometer (MS), a zero degree calorimeter (ZDC), a silicon vertex telescope (VT), and a silicon microstrip beam tracker (BT). The readout of the whole experiment is based on a PCI architecture. The basic unit is a general purpose PCI card, interfaced to the different subdetectors via custom mezzanine cards. This allowed us to successfully implement several completely different readout protocols (from the VME like protocol of the MS to the custom protocol of the pixel telescope). The system was fully tested with proton and ion beams, and several million events were collected in 2002 and 2003. This paper presents the readout architecture of NA60, with particular emphasis on the PCI layer common to all the subdetectors. (16 refs).

Design of a current based readout chip and development of a DEPFET pixel prototype system for the ILC vertex detector

International Nuclear Information System (INIS)

Trimpl, M.

2005-12-01

The future TeV-scale linear collider ILC (International Linear Collider) offers a large variety of precision measurements complementary to the discovery potential of the LHC (Large Hadron Collider). To fully exploit its physics potential, a vertex detector with unprecedented performance is needed. One proposed technology for the ILC vertex detector is the DEPFET active pixel sensor. The DEPFET sensor offers particle detection with in-pixel amplification by incorporating a field effect transistor into a fully depleted high-ohmic silicon substrate. The device provides an excellent signal-to-noise ratio and a good spatial resolution at the same time. To establish a very fast readout of a DEPFET pixel matrix with row rates of 20 MHz and more, the 128 channel CURO II ASIC has been designed and fabricated. The architecture of the chip is completely based on current mode techniques (SI) perfectly adapted to the current signal of the sensor. For the ILC vertex detector a prototype system with a 64 x 128 DEPFET pixel matrix read out by the CURO II chip has been developed. The design issues and the standalone performance of the readout chip as well as first results with the prototype system will be presented. (orig.)

Design of a current based readout chip and development of a DEPFET pixel prototype system for the ILC vertex detector

Energy Technology Data Exchange (ETDEWEB)

Trimpl, M.

2005-12-15

The future TeV-scale linear collider ILC (International Linear Collider) offers a large variety of precision measurements complementary to the discovery potential of the LHC (Large Hadron Collider). To fully exploit its physics potential, a vertex detector with unprecedented performance is needed. One proposed technology for the ILC vertex detector is the DEPFET active pixel sensor. The DEPFET sensor offers particle detection with in-pixel amplification by incorporating a field effect transistor into a fully depleted high-ohmic silicon substrate. The device provides an excellent signal-to-noise ratio and a good spatial resolution at the same time. To establish a very fast readout of a DEPFET pixel matrix with row rates of 20 MHz and more, the 128 channel CURO II ASIC has been designed and fabricated. The architecture of the chip is completely based on current mode techniques (SI) perfectly adapted to the current signal of the sensor. For the ILC vertex detector a prototype system with a 64 x 128 DEPFET pixel matrix read out by the CURO II chip has been developed. The design issues and the standalone performance of the readout chip as well as first results with the prototype system will be presented. (orig.)

Developments of the ATLAS pixel detector

International Nuclear Information System (INIS)

Andreazza, Attilio

2004-01-01

The ATLAS silicon pixel detector is the innermost tracking device of the ATLAS experiment at the Large Hardon Collider, consisting of more than 1700 modules for a total sensitive area of about 1.7m2 and over 80 million pixel cells. The concept is a hybrid of front-end chips bump bonded to the pixel sensor. The elementary pixel cell has 50μmx400μm size, providing pulse height information via the time over threshold technique. Prototype devices with oxygenated silicon sensor and rad-hard electronics built in the IBM 0.25μm process have been tested and maintain good resolution, efficiency and timing performances even after receiving the design radiation damage of 1015neq/cm2

Design, simulation, fabrication, and preliminary tests of 3D CMS pixel detectors for the super-LHC

Energy Technology Data Exchange (ETDEWEB)

Koybasi, Ozhan; /Purdue U.; Bortoletto, Daniela; /Purdue U.; Hansen, Thor-Erik; /SINTEF, Oslo; Kok, Angela; /SINTEF, Oslo; Hansen, Trond Andreas; /SINTEF, Oslo; Lietaer, Nicolas; /SINTEF, Oslo; Jensen, Geir Uri; /SINTEF, Oslo; Summanwar, Anand; /SINTEF, Oslo; Bolla, Gino; /Purdue U.; Kwan, Simon Wing Lok; /Fermilab

2010-01-01

The Super-LHC upgrade puts strong demands on the radiation hardness of the innermost tracking detectors of the CMS, which cannot be fulfilled with any conventional planar detector design. The so-called 3D detector architectures, which feature columnar electrodes passing through the substrate thickness, are under investigation as a potential solution for the closest operation points to the beams, where the radiation fluence is estimated to reach 10{sup 16} n{sub eq}/cm{sup 2}. Two different 3D detector designs with CMS pixel readout electronics are being developed and evaluated for their advantages and drawbacks. The fabrication of full-3D active edge CMS pixel devices with p-type substrate has been successfully completed at SINTEF. In this paper, we study the expected post-irradiation behaviors of these devices with simulations and, after a brief description of their fabrication, we report the first leakage current measurement results as performed on wafer.

The DELPHI pixels

International Nuclear Information System (INIS)

Becks, K.H.; Brunet, J.M.

1997-01-01

To improve tracking in the very forward direction for running at LEP200, the angular acceptance of the DELPHI Vertex detector has been extended from 45 to 11 with respect to the beam axis. Pixel detector crowns cover the region between 25 and 13 . Due to very tight space and material thickness constraints it was necessary to develop new techniques (integrated busses in the detector substrate, high density layout on Kapton, etc.). About 1000 cm 2 of pixels are already installed and working in DELPHI. Techniques, tests and production of these detectors will be described, as well as the main problems encountered during this work. (orig.)

2D/3D Quantification of bone morphometric parameter changes using X-ray microtomograpphy with different pixel sizes

International Nuclear Information System (INIS)

Vidal, F.; Assis, J.T. de; Lopes, R.T.; Lima, I.

2014-01-01

In recent years, bone quantification led to a deeper knowledge of the 3D microarchitecture. In this study the bone architecture of rats was investigated based on 2D/3D morphometric analysis using microcomputed tomography, aiming at determining the effect of the image acquisition pixel on the quality of some 2D/3D morphometric parameters, such as porosity and trabecular density. Six pairs of bone samples were used and the scans were carried out using high microcomputed tomography system, operating at three different pixel sizes of 33.3 μm, 15.0 μm and 9.5 μm. The results showed 2D parameters values lower than those obtained in the 3D analysis, mainly for trabecular density, separation and thickness. - Highlights: ► Bone quantification led to a deeper knowledge of the 3D microarchitecture. ► μCT was used in order to investigate condyles bone in 03 different pixel sizes. ► The results showed 2D parameters values lower than those obtained in the 3D analysis. ► The parameters trabecular density, separation and thickness were the most affected

MT-ADRES: multi-threading on coarse-grained reconfigurable architecture

DEFF Research Database (Denmark)

Wu, Kehuai; Kanstein, Andreas; Madsen, Jan

2008-01-01

The coarse-grained reconfigurable architecture ADRES (architecture for dynamically reconfigurable embedded systems) and its compiler offer high instruction-level parallelism (ILP) to applications by means of a sparsely interconnected array of functional units and register files. As high-ILP archi......The coarse-grained reconfigurable architecture ADRES (architecture for dynamically reconfigurable embedded systems) and its compiler offer high instruction-level parallelism (ILP) to applications by means of a sparsely interconnected array of functional units and register files. As high......-ILP architectures achieve only low parallelism when executing partially sequential code segments, which is also known as Amdahl's law, this article proposes to extend ADRES to MT-ADRES (multi-threaded ADRES) to also exploit thread-level parallelism. On MT-ADRES architectures, the array can be partitioned...

Calculating Viewing Angles Pixel by Pixel in Optical Remote Sensing Satellite Imagery Using the Rational Function Model

OpenAIRE

Kai Xu; Guo Zhang; Qingjun Zhang; Deren Li

2018-01-01

In studies involving the extraction of surface physical parameters using optical remote sensing satellite imagery, sun-sensor geometry must be known, especially for sensor viewing angles. However, while pixel-by-pixel acquisitions of sensor viewing angles are of critical importance to many studies, currently available algorithms for calculating sensor-viewing angles focus only on the center-point pixel or are complicated and are not well known. Thus, this study aims to provide a simple and ge...

A programmable display layer for virtual reality system architectures.

Science.gov (United States)

Smit, Ferdi Alexander; van Liere, Robert; Froehlich, Bernd

2010-01-01

Display systems typically operate at a minimum rate of 60 Hz. However, existing VR-architectures generally produce application updates at a lower rate. Consequently, the display is not updated by the application every display frame. This causes a number of undesirable perceptual artifacts. We describe an architecture that provides a programmable display layer (PDL) in order to generate updated display frames. This replaces the default display behavior of repeating application frames until an update is available. We will show three benefits of the architecture typical to VR. First, smooth motion is provided by generating intermediate display frames by per-pixel depth-image warping using 3D motion fields. Smooth motion eliminates various perceptual artifacts due to judder. Second, we implement fine-grained latency reduction at the display frame level using a synchronized prediction of simulation objects and the viewpoint. This improves the average quality and consistency of latency reduction. Third, a crosstalk reduction algorithm for consecutive display frames is implemented, which improves the quality of stereoscopic images. To evaluate the architecture, we compare image quality and latency to that of a classic level-of-detail approach.

Edge pixel response studies of edgeless silicon sensor technology for pixellated imaging detectors

Science.gov (United States)

Maneuski, D.; Bates, R.; Blue, A.; Buttar, C.; Doonan, K.; Eklund, L.; Gimenez, E. N.; Hynds, D.; Kachkanov, S.; Kalliopuska, J.; McMullen, T.; O'Shea, V.; Tartoni, N.; Plackett, R.; Vahanen, S.; Wraight, K.

2015-03-01

Silicon sensor technologies with reduced dead area at the sensor's perimeter are under development at a number of institutes. Several fabrication methods for sensors which are sensitive close to the physical edge of the device are under investigation utilising techniques such as active-edges, passivated edges and current-terminating rings. Such technologies offer the goal of a seamlessly tiled detection surface with minimum dead space between the individual modules. In order to quantify the performance of different geometries and different bulk and implant types, characterisation of several sensors fabricated using active-edge technology were performed at the B16 beam line of the Diamond Light Source. The sensors were fabricated by VTT and bump-bonded to Timepix ROICs. They were 100 and 200 μ m thick sensors, with the last pixel-to-edge distance of either 50 or 100 μ m. The sensors were fabricated as either n-on-n or n-on-p type devices. Using 15 keV monochromatic X-rays with a beam spot of 2.5 μ m, the performance at the outer edge and corners pixels of the sensors was evaluated at three bias voltages. The results indicate a significant change in the charge collection properties between the edge and 5th (up to 275 μ m) from edge pixel for the 200 μ m thick n-on-n sensor. The edge pixel performance of the 100 μ m thick n-on-p sensors is affected only for the last two pixels (up to 110 μ m) subject to biasing conditions. Imaging characteristics of all sensor types investigated are stable over time and the non-uniformities can be minimised by flat-field corrections. The results from the synchrotron tests combined with lab measurements are presented along with an explanation of the observed effects.

The ALICE Silicon Pixel Detector System (SPD)

CERN Document Server

Kluge, A; Antinori, Federico; Burns, M; Cali, I A; Campbell, M; Caselle, M; Ceresa, S; Dima, R; Elias, D; Fabris, D; Krivda, Marian; Librizzi, F; Manzari, Vito; Morel, M; Moretto, Sandra; Osmic, F; Pappalardo, G S; Pepato, Adriano; Pulvirenti, A; Riedler, P; Riggi, F; Santoro, R; Stefanini, G; Torcato De Matos, C; Turrisi, R; Tydesjo, H; Viesti, G; PH-EP

2007-01-01

The ALICE silicon pixel detector (SPD) comprises the two innermost layers of the ALICE inner tracker system. The SPD includes 120 detector modules (half-staves) each consisting of 10 ALICE pixel chips bump bonded to two silicon sensors and one multi-chip read-out module. Each pixel chip contains 8192 active cells, so that the total number of pixel cells in the SPD is ≈ 107. The on-detector read-out is based on a multi-chip-module containing 4 ASICs and an optical transceiver module. The constraints on material budget and detector module dimensions are very demanding.

Applying Statistical Mechanics to pixel detectors

International Nuclear Information System (INIS)

Pindo, Massimiliano

2002-01-01

Pixel detectors, being made of a large number of active cells of the same kind, can be considered as significant sets to which Statistical Mechanics variables and methods can be applied. By properly redefining well known statistical parameters in order to let them match the ones that actually characterize pixel detectors, an analysis of the way they work can be performed in a totally new perspective. A deeper understanding of pixel detectors is attained, helping in the evaluation and comparison of their intrinsic characteristics and performance

Pixelated CdZnTe drift detectors

DEFF Research Database (Denmark)

Kuvvetli, Irfan; Budtz-Jørgensen, Carl

2005-01-01

A technique, the so-called Drift Strip Method (DSM), for improving the CdZnTe detector energy response to hard X-rays and gamma-rays was applied as a pixel geometry. First tests have confirmed that this detector type provides excellent energy resolution and imaging performance. We specifically...... report on the performance of 3 mm thick prototype CZT drift pixel detectors fabricated using material from eV-products. We discuss issues associated with detector module performance. Characterization results obtained from several prototype drift pixel detectors are presented. Results of position...

arXiv Characterization and Verification Environment for the RD53A Pixel Readout Chip in 65 nm CMOS

CERN Document Server

Vogt, M.; Hemperek, T.; Janssen, J.; Pohl, D.L.; Daas, M.

2018-02-02

The RD53 collaboration is currently designing a large scale prototype pixel readout chip in 65 nm CMOS technology for the phase 2 upgrades at the HL-LHC. The RD53A chip will be available by the end of the year 2017 and will be extensively tested to confirm if the circuit and the architecture make a solid foundation for the final pixel readout chips for the experiments at the HL-LHC. A test and data acquisition system for the RD53A chip is currently under development to perform single-chip and multi-chip module measurements. In addition, the verification of the RD53A design is performed in a dedicated simulation environment. The concept and the implementation of the test and data acquisition system and the simulation environment, which are based on a modular data acquisition and system testing framework, are presented in this work.

ISPA (imaging silicon pixel array) experiment

CERN Multimedia

Patrice Loïez

2002-01-01

The bump-bonded silicon pixel detector, developed at CERN by the EP-MIC group, is shown here in its ceramic carrier. Both represent the ISPA-tube anode. The chip features between 1024 (called OMEGA-1) and 8196 (ALICE-1) active pixels.

Operational Experience with the ATLAS Pixel Detector

CERN Document Server

Djama, Fares; The ATLAS collaboration

2017-01-01

Run-2 of the LHC is providing new challenges to track and vertex reconstruction imposed by the higher collision energy, pileup and luminosity that are being delivered. The ATLAS tracking performance relies critically on the Pixel Detector, therefore, in view of Run-2 of LHC, the ATLAS experiment has constructed the first 4-layer Pixel detector in HEP, installing a new Pixel layer, also called Insertable B-Layer (IBL). Pixel detector was refurbished with a new service quarter panel to recover about 3% of defective modules lost during run-1 and an additional optical link per module was added to overcome in some layers the readout bandwidth limitation when LHC will exceed the nominal peak luminosity by almost a factor of 3. The key features and challenges met during the IBL project will be presented, as well as its operational experience and Pixel Detector performance in LHC.

A hybrid POMDP-BDI agent architecture with online stochastic planning and plan caching

CSIR Research Space (South Africa)

Moodley, D

2016-12-01

Full Text Available This article presents an agent architecture for controlling an autonomous agent in stochastic, noisy environments. The architecture combines the partially observable Markov decision process (POMDP) model with the belief-desire-intention (BDI...

Operational Experience with the ATLAS Pixel Detector

CERN Document Server

Lantzsch, Kerstin; The ATLAS collaboration

2016-01-01

Run 2 of the LHC is providing new challenges to track and vertex reconstruction with higher energies, denser jets and higher rates. Therefore the ATLAS experiment has constructed the first 4-layer Pixel detector in HEP, installing a new Pixel layer, also called Insertable B-Layer (IBL). In addition the Pixel detector was refurbished with new service quarter panels to recover about 3% of defective modules lost during run 1 and a new optical readout system to readout the data at higher speed while reducing the occupancy when running with increased luminosity. The commissioning, operation and performance of the 4-layer Pixel Detector will be presented.

Focal plane array with modular pixel array components for scalability

Science.gov (United States)

Kay, Randolph R; Campbell, David V; Shinde, Subhash L; Rienstra, Jeffrey L; Serkland, Darwin K; Holmes, Michael L

2014-12-09

A modular, scalable focal plane array is provided as an array of integrated circuit dice, wherein each die includes a given amount of modular pixel array circuitry. The array of dice effectively multiplies the amount of modular pixel array circuitry to produce a larger pixel array without increasing die size. Desired pixel pitch across the enlarged pixel array is preserved by forming die stacks with each pixel array circuitry die stacked on a separate die that contains the corresponding signal processing circuitry. Techniques for die stack interconnections and die stack placement are implemented to ensure that the desired pixel pitch is preserved across the enlarged pixel array.

Novel micropixel avalanche photodiodes (MAPD) with superhigh pixel density

International Nuclear Information System (INIS)

Anfimov, N.; Chirikov-Zorin, I.; Dovlatov, A.

2010-01-01

In many detectors based on scintillators the photomultiplier tubes (PMTs) are used as photodetectors. At present photodiodes are finding wide application. Solid state photodetectors allow operation in strong magnetic fields that are often present in applications, e.g., some calorimeters operating near magnets, combined PET and MRT, etc. The photon detection efficiency (PDE) of photodiodes may reach values a few times higher than that of PMTs. Also, they are rigid, compact and have relatively low operating voltage. In the last few years Micropixel Avalanche PhotoDiodes (MAPDs) have been developed and started to be used. The MAPD combines a lot of advantages of semiconductor photodetectors and has a high gain, which is close to that of the PMT. Yet, they have some disadvantages, and one of them is a limited dynamic range that corresponds to a total number of pixels. The novel deep microwell MAPD with high pixel density produced by Zecotek Company partially avoids this disadvantage. In this paper characteristics of these photodetectors are presented in comparison with the PMT characteristics. The results refer to measurements of the gain, PDE, cross-talks, photon counting and applications: beam test results of two different 'Shashlyk' EM calorimeters for COMPASS (CERN) and NICA-MPD (JINR) with the MAPD readout and a possibility of using the MAPD in PET

E-Beam Effects on CMOS Active Pixel Sensors

International Nuclear Information System (INIS)

Kang, Dong Ook; Jo, Gyu Seong; Kim, Hyeon Daek; Kim, Hyunk Taek; Kim, Jong Yeol; Kim, Chan Kyu

2011-01-01

Three different CMOS active pixel structures manufactured in a deep submicron process have been evaluated with electron beam. The devices were exposed to 1 MeV electron beam up to 5kGy. Dark current increased after E-beam irradiation differently at each pixel structure. Dark current change is dependent on CMOS pixel structures. CMOS image sensors are now good candidates in demanding applications such as medical image sensor, particle detection and space remote sensing. In these situations, CISs are exposed to high doses of radiation. In fact radiation is known to generate trapped charge in CMOS oxides. It can lead to threshold voltage shifts and current leakages in MOSFETs and dark current increase in photodiodes. We studied ionizing effects in three types of CMOS APSs fabricated by 0.25 CMOS process. The devices were irradiated by a Co 60 source up to 50kGy. All irradiation took place at room temperature. The dark current in the three different pixels exhibits increase with electron beam exposure. From the above figure, the change of dark current is dependent on the pixel structure. Double junction structure has shown relatively small increase of dark current after electron beam irradiation. The dark current in the three different pixels exhibits increase with electron beam exposure. The contribution of the total ionizing dose to the dark current increase is small here, since the devices were left unbiased during the electron beam irradiation. Radiation hardness in dependent on the pixel structures. Pixel2 is relatively vulnerable to radiation exposure. Pixel3 has radiation hardened structure

Operational experience with the ATLAS Pixel Detector

CERN Document Server

Ince, T; The ATLAS collaboration

2012-01-01

The ATLAS Pixel Detector is the innermost element of the ATLAS experiment at the Large Hadron Collider at CERN, providing high-resolution measurements of charged particle tracks in the high radiation environment close to the collision region. This capability is vital for the identification and measurement of proper decay times of long-lived particles such as b-hadrons, and thus vital for the ATLAS physics program. The detector provides hermetic coverage with three cylindrical layers and three layers of forward and backward pixel detectors. It consists of approximately 80 million pixels that are individually read out via chips bump-bonded to 1744 n-in-n silicon substrates. In this paper, results from the successful operation of the Pixel Detector at the LHC will be presented, including monitoring, calibration procedures, timing optimization and detector performance. The detector performance is excellent: 96.2% of the pixels are operational, noise occupancy and hit efficiency exceed the design specification, an...

Operational experience of the ATLAS Pixel detector

CERN Document Server

Hirschbuehl, D; The ATLAS collaboration

2011-01-01

The ATLAS Pixel Detector is the innermost detector of the ATLAS experiment at the Large Hadron Collider at CERN, providing high-resolution measurements of charged particle tracks in the high radiation environment close to the collision region. This capability is vital for the identification and measurement of proper decay times of long-lived particles such as b-hadrons, and thus vital for the ATLAS physics program. The detector provides hermetic coverage with three cylindrical layers and three layers of forward and backward pixel detectors. It consists of approximately 80 million pixels that are individually read out via chips bump-bonded to 1744 n-in-n silicon substrates. In this talk, results from the successful operation of the Pixel Detector at the LHC will be presented, including monitoring, calibration procedures, timing optimization and detector performance. The detector performance is excellent: 97,5% of the pixels are operational, noise occupancy and hit efficiency exceed the design specification, an...

Operational experience of the ATLAS Pixel Detector

CERN Document Server

Marcisovsky, M; The ATLAS collaboration

2011-01-01

The ATLAS Pixel Detector is the innermost detector of the ATLAS experiment at the Large Hadron Collider at CERN, providing high-resolution measurements of charged particle tracks in the high radiation environment close to the collision region. This capability is vital for the identification and measurement of proper decay times of long-lived particles such as b-hadrons, and thus vital for the ATLAS physics program. The detector provides hermetic coverage with three cylindrical layers and three layers of forward and backward pixel detectors. It consists of approximately 80 million pixels that are individually read out via chips bump-bonded to 1744 n-in-n silicon substrates. In this talk, results from the successful operation of the Pixel Detector at the LHC will be presented, including monitoring, calibration procedures, timing optimization and detector performance. The detector performance is excellent: 97,5% of the pixels are operational, noise occupancy and hit efficiency exceed the design specification, an...

Building CMS Pixel Barrel Detectur Modules

CERN Document Server

König, S; Horisberger, R.; Meier, B.; Rohe, T.; Streuli, S.; Weber, R.; Kastli, H.Chr.; Erdmann, W.

2007-01-01

For the barrel part of the CMS pixel tracker about 800 silicon pixel detector modules are required. The modules are bump bonded, assembled and tested at the Paul Scherrer Institute. This article describes the experience acquired during the assembly of the first ~200 modules.

PIXEL PATTERN BASED STEGANOGRAPHY ON IMAGES

Directory of Open Access Journals (Sweden)

R. Rejani

2015-02-01

Full Text Available One of the drawback of most of the existing steganography methods is that it alters the bits used for storing color information. Some of the examples include LSB or MSB based steganography. There are also various existing methods like Dynamic RGB Intensity Based Steganography Scheme, Secure RGB Image Steganography from Pixel Indicator to Triple Algorithm etc that can be used to find out the steganography method used and break it. Another drawback of the existing methods is that it adds noise to the image which makes the image look dull or grainy making it suspicious for a person about existence of a hidden message within the image. To overcome these shortcomings we have come up with a pixel pattern based steganography which involved hiding the message within in image by using the existing RGB values whenever possible at pixel level or with minimum changes. Along with the image a key will also be used to decrypt the message stored at pixel levels. For further protection, both the message stored as well as the key file will be in encrypted format which can have same or different keys or decryption. Hence we call it as a RGB pixel pattern based steganography.

Measurements of Ultra-Fast single photon counting chip with energy window and 75 μm pixel pitch with Si and CdTe detectors

International Nuclear Information System (INIS)

Maj, P.; Grybos, P.; Kasinski, K.; Koziol, A.; Krzyzanowska, A.; Kmon, P.; Szczygiel, R.; Zoladz, M.

2017-01-01

Single photon counting pixel detectors become increasingly popular in various 2-D X-ray imaging techniques and scientific experiments mainly in solid state physics, material science and medicine. This paper presents architecture and measurement results of the UFXC32k chip designed in a CMOS 130 nm process. The chip consists of about 50 million transistors and has an area of 9.64 mm × 20.15 mm. The core of the IC is a matrix of 128 × 256 pixels of 75 μm pitch. Each pixel contains a CSA, a shaper with tunable gain, two discriminators with correction circuits and two 14-bit ripple counters operating in a normal mode (with energy window), a long counter mode (one 28-bit counter) and a zero-dead time mode. Gain and noise performance were verified with X-ray radiation and with the chip connected to Si (320 μm thick) and CdTe (750 μ m thick) sensors.

Charge Gain, Voltage Gain, and Node Capacitance of the SAPHIRA Detector Pixel by Pixel

Science.gov (United States)

Pastrana, Izabella M.; Hall, Donald N. B.; Baker, Ian M.; Jacobson, Shane M.; Goebel, Sean B.

2018-01-01

The University of Hawai`i Institute for Astronomy has partnered with Leonardo (formerly Selex) in the development of HgCdTe linear mode avalanche photodiode (L-APD) SAPHIRA detectors. The SAPHIRA (Selex Avalanche Photodiode High-speed Infra-Red Array) is ideally suited for photon-starved astronomical observations, particularly near infrared (NIR) adaptive optics (AO) wave-front sensing. I have measured the stability, and linearity with current, of a 1.7-um (10% spectral bandpass) infrared light emitting diode (IR LED) used to illuminate the SAPHIRA and have then utilized this source to determine the charge gain (in e-/ADU), voltage gain (in uV/ADU), and node capacitance (in fF) for each pixel of the 320x256@24um SAPHIRA. These have previously only been averages over some sub-array. Determined from the ratio of the temporal averaged signal level to variance under constant 1.7-um LED illumination, I present the charge gain pixel-by-pixel in a 64x64 sub-array at the center of the active area of the SAPHIRA (analyzed separately as four 32x32 sub-arrays) to be about 1.6 e-/ADU (σ=0.5 e-/ADU). Additionally, the standard technique of varying the pixel reset voltage (PRV) in 10 mV increments and recording output frames for the same 64x64 subarray found the voltage gain per pixel to be about 11.7 uV/ADU (σ=0.2 uV/ADU). Finally, node capacitance was found to be approximately 23 fF (σ=6 fF) utilizing the aforementioned charge and voltage gain measurements. I further discuss the linearity measurements of the 1.7-um LED used in the charge gain characterization procedure.

Partially Adaptive STAP Algorithm Approaches to functional MRI

OpenAIRE

Huang, Lejian; Thompson, Elizabeth A.; Schmithorst, Vincent; Holland, Scott K.; Talavage, Thomas M.

2008-01-01

In this work, the architectures of three partially adaptive STAP algorithms are introduced, one of which is explored in detail, that reduce dimensionality and improve tractability over fully adaptive STAP when used in construction of brain activation maps in fMRI. Computer simulations incorporating actual MRI noise and human data analysis indicate that element space partially adaptive STAP can attain close to the performance of fully adaptive STAP while significantly decreasing processing tim...

Analysis and Modeling of Parallel Photovoltaic Systems under Partial Shading Conditions

Science.gov (United States)

Buddala, Santhoshi Snigdha

Since the industrial revolution, fossil fuels like petroleum, coal, oil, natural gas and other non-renewable energy sources have been used as the primary energy source. The consumption of fossil fuels releases various harmful gases into the atmosphere as byproducts which are hazardous in nature and they tend to deplete the protective layers and affect the overall environmental balance. Also the fossil fuels are bounded resources of energy and rapid depletion of these sources of energy, have prompted the need to investigate alternate sources of energy called renewable energy. One such promising source of renewable energy is the solar/photovoltaic energy. This work focuses on investigating a new solar array architecture with solar cells connected in parallel configuration. By retaining the structural simplicity of the parallel architecture, a theoretical small signal model of the solar cell is proposed and modeled to analyze the variations in the module parameters when subjected to partial shading conditions. Simulations were run in SPICE to validate the model implemented in Matlab. The voltage limitations of the proposed architecture are addressed by adopting a simple dc-dc boost converter and evaluating the performance of the architecture in terms of efficiencies by comparing it with the traditional architectures. SPICE simulations are used to compare the architectures and identify the best one in terms of power conversion efficiency under partial shading conditions.

Development and Characterization of Diamond and 3D-Silicon Pixel Detectors with ATLAS-Pixel Readout Electronics

CERN Document Server

Mathes, Markus

2008-01-01

Hybrid pixel detectors are used for particle tracking in the innermost layers of current high energy experiments like ATLAS. After the proposed luminosity upgrade of the LHC, they will have to survive very high radiation fluences of up to 10^16 particles per cm^2 per life time. New sensor concepts and materials are required, which promise to be more radiation tolerant than the currently used planar silicon sensors. Most prominent candidates are so-called 3D-silicon and single crystal or poly-crystalline diamond sensors. Using the ATLAS pixel electronics different detector prototypes with a pixel geometry of 400 × 50 um^2 have been built. In particular three devices have been studied in detail: a 3D-silicon and a single crystal diamond detector with an active area of about 1 cm^2 and a poly-crystalline diamond detector of the same size as a current ATLAS pixel detector module (2 × 6 cm^2). To characterize the devices regarding their particle detection efficiency and spatial resolution, the charge collection ...

Point DCT VLSI Architecture for Emerging HEVC Standard

Directory of Open Access Journals (Sweden)

Ashfaq Ahmed

2012-01-01

Full Text Available This work presents a flexible VLSI architecture to compute the -point DCT. Since HEVC supports different block sizes for the computation of the DCT, that is, 4×4 up to 32×32, the design of a flexible architecture to support them helps reducing the area overhead of hardware implementations. The hardware proposed in this work is partially folded to save area and to get speed for large video sequences sizes. The proposed architecture relies on the decomposition of the DCT matrices into sparse submatrices in order to reduce the multiplications. Finally, multiplications are completely eliminated using the lifting scheme. The proposed architecture sustains real-time processing of 1080P HD video codec running at 150 MHz.

Characterization of Pixel Sensors

CERN Document Server

Oliveira, Felipe Ferraz

2017-01-01

It was commissioned at CERN ATLAS pixel group a fluorescence setup for characterization of pixel sensors. The idea is to measure the energies of different targets to calibrate your sensor. It was measured four matrices (80, 95, 98 and 106) of the Investigator1 sensor with different deep PW using copper, iron and titanium as target materials. The matrix 80 has a higher gain (0.065 ± 0.002) and matrix 106 has a better energy resolution (0.05 ± 0.04). The noise of the setup is around 3.6 mV .

Small Pixel Hybrid CMOS X-ray Detectors

Science.gov (United States)

Hull, Samuel; Bray, Evan; Burrows, David N.; Chattopadhyay, Tanmoy; Falcone, Abraham; Kern, Matthew; McQuaide, Maria; Wages, Mitchell

2018-01-01

Concepts for future space-based X-ray observatories call for a large effective area and high angular resolution instrument to enable precision X-ray astronomy at high redshift and low luminosity. Hybrid CMOS detectors are well suited for such high throughput instruments, and the Penn State X-ray detector lab, in collaboration with Teledyne Imaging Sensors, has recently developed new small pixel hybrid CMOS X-ray detectors. These prototype 128x128 pixel devices have 12.5 micron pixel pitch, 200 micron fully depleted depth, and include crosstalk eliminating CTIA amplifiers and in-pixel correlated double sampling (CDS) capability. We report on characteristics of these new detectors, including the best read noise ever measured for an X-ray hybrid CMOS detector, 5.67 e- (RMS).

LISe pixel detector for neutron imaging

Energy Technology Data Exchange (ETDEWEB)

Herrera, Elan; Hamm, Daniel [Department of Nuclear Engineering, University of Tennessee, Knoxville, TN (United States); Wiggins, Brenden [Technology Development, Y-12 National Security Complex, Oak Ridge, TN (United States); Department of Physics and Astronomy, Vanderbilt University, Nashville, TN (United States); Milburn, Rob [Department of Nuclear Engineering, University of Tennessee, Knoxville, TN (United States); Burger, Arnold [Department of Physics and Astronomy, Vanderbilt University, Nashville, TN (United States); Department of Life and Physical Sciences, Fisk University, Nashville, TN (United States); Bilheux, Hassina [Chemical and Engineering Materials Division, Oak Ridge National Laboratory, Oak Ridge, TN (United States); Santodonato, Louis [Instrument and Source Division, Oak Ridge National Laboratory, Oak Ridge National Laboratory, Oak Ridge, TN (United States); Chvala, Ondrej [Department of Nuclear Engineering, University of Tennessee, Knoxville, TN (United States); Stowe, Ashley [Department of Nuclear Engineering, University of Tennessee, Knoxville, TN (United States); Technology Development, Y-12 National Security Complex, Oak Ridge, TN (United States); Department of Physics and Astronomy, Vanderbilt University, Nashville, TN (United States); Lukosi, Eric, E-mail: elukosi@utk.edu [Department of Nuclear Engineering, University of Tennessee, Knoxville, TN (United States)

2016-10-11

Semiconducting lithium indium diselenide, {sup 6}LiInSe{sub 2} or LISe, has promising characteristics for neutron detection applications. The 95% isotopic enrichment of {sup 6}Li results in a highly efficient thermal neutron-sensitive material. In this study, we report on a proof-of-principle investigation of a semiconducting LISe pixel detector to demonstrate its potential as an efficient neutron imager. The LISe pixel detector had a 4×4 of pixels with a 550 µm pitch on a 5×5×0.56 mm{sup 3} LISe substrate. An experimentally verified spatial resolution of 300 µm was observed utilizing a super-sampling technique.

Pixel-by-pixel mean transit time without deconvolution.

Science.gov (United States)

Dobbeleir, Andre A; Piepsz, Amy; Ham, Hamphrey R

2008-04-01

Mean transit time (MTT) within a kidney is given by the integral of the renal activity on a well-corrected renogram between time zero and time t divided by the integral of the plasma activity between zero and t, providing that t is close to infinity. However, as the data acquisition of a renogram is finite, the MTT calculated using this approach might result in the underestimation of the true MTT. To evaluate the degree of this underestimation we conducted a simulation study. One thousand renograms were created by convoluting various plasma curves obtained from patients with different renal clearance levels with simulated retentions curves having different shapes and mean transit times. For a 20 min renogram, the calculated MTT started to underestimate the MTT when the MTT was higher than 6 min. The longer the MTT, the greater was the underestimation. Up to a MTT value of 6 min, the error on the MTT estimation is negligible. As normal cortical transit is less than 2 min, this approach is used for patients to calculate pixel-to-pixel cortical mean transit time and to create a MTT parametric image without deconvolution.

Pixel readout ASIC for an APD based 2D X-ray hybrid pixel detector with sub-nanosecond resolution

Energy Technology Data Exchange (ETDEWEB)

Thil, Ch., E-mail: christophe.thil@ziti.uni-heidelberg.d [Heidelberg University, Institute of Computer Engineering, B6, 26, 68161 Mannheim (Germany); Baron, A.Q.R. [RIKEN SPring-8 Center, 1-1-1 Kouto, Sayo-cho, Sayo-gun, Hyogo 679-5148 (Japan); Fajardo, P. [ESRF, Polygone Scientifique Louis Neel, 6, rue Jules Horowitz, 38000 Grenoble (France); Fischer, P. [Heidelberg University, Institute of Computer Engineering, B6, 26, 68161 Mannheim (Germany); Graafsma, H. [DESY, Notkestrasse 85, 22607 Hamburg (Germany); Rueffer, R. [ESRF, Polygone Scientifique Louis Neel, 6, rue Jules Horowitz, 38000 Grenoble (France)

2011-02-01

The fast response and the short recovery time of avalanche photodiodes (APDs) in linear mode make those devices ideal for direct X-ray detection in applications requiring high time resolution or counting rate. In order to provide position sensitivity, the XNAP project aims at creating a hybrid pixel detector with nanosecond time resolution based on a monolithic APD sensor array with 32 x32 pixels covering about 1 cm{sup 2} active area. The readout is implemented in a pixelated front-end ASIC suited for the readout of such arrays, matched to pixels of 280{mu}mx280{mu}m size. Every single channel features a fast transimpedance amplifier, a discriminator with locally adjustable threshold and two counters with high dynamic range and counting speed able to accumulate X-ray hits with no readout dead time. Additionally, the detector can be operated in list mode by time-stamping every single event with sub-nanosecond resolution. In a first phase of the project, a 4x4 pixel test module is built to validate the conceptual design of the detector. The XNAP project is briefly presented and the performance of the readout ASIC is discussed.

Pixel readout ASIC for an APD based 2D X-ray hybrid pixel detector with sub-nanosecond resolution

International Nuclear Information System (INIS)

Thil, Ch.; Baron, A.Q.R.; Fajardo, P.; Fischer, P.; Graafsma, H.; Rueffer, R.

2011-01-01

The fast response and the short recovery time of avalanche photodiodes (APDs) in linear mode make those devices ideal for direct X-ray detection in applications requiring high time resolution or counting rate. In order to provide position sensitivity, the XNAP project aims at creating a hybrid pixel detector with nanosecond time resolution based on a monolithic APD sensor array with 32 x32 pixels covering about 1 cm 2 active area. The readout is implemented in a pixelated front-end ASIC suited for the readout of such arrays, matched to pixels of 280μmx280μm size. Every single channel features a fast transimpedance amplifier, a discriminator with locally adjustable threshold and two counters with high dynamic range and counting speed able to accumulate X-ray hits with no readout dead time. Additionally, the detector can be operated in list mode by time-stamping every single event with sub-nanosecond resolution. In a first phase of the project, a 4x4 pixel test module is built to validate the conceptual design of the detector. The XNAP project is briefly presented and the performance of the readout ASIC is discussed.

Algorithms for spectral calibration of energy-resolving small-pixel detectors

International Nuclear Information System (INIS)

Scuffham, J; Veale, M C; Wilson, M D; Seller, P

2013-01-01

Small pixel Cd(Zn)Te detectors often suffer from inter-pixel variations in gain, resulting in shifts in the individual energy spectra. These gain variations are mainly caused by inclusions and defects within the crystal structure, which affect the charge transport within the material causing a decrease in the signal pulse height. In imaging applications, spectra are commonly integrated over a particular peak of interest. This means that the individual pixels must be accurately calibrated to ensure that the same portion of the spectrum is integrated in every pixel. The development of large-area detectors with fine pixel pitch necessitates automated algorithms for this spectral calibration, due to the very large number of pixels. Algorithms for automatic spectral calibration require accurate determination of characteristic x-ray or photopeak positions on a pixelwise basis. In this study, we compare two peak searching spectral calibration algorithms for a small-pixel CdTe detector in gamma spectroscopic imaging. The first algorithm uses rigid search ranges to identify peaks in each pixel spectrum, based on the average peak positions across all pixels. The second algorithm scales the search ranges on the basis of the position of the highest-energy peak relative to the average across all pixels. In test spectra acquired with Tc-99m, we found that the rigid search algorithm failed to correctly identify the target calibraton peaks in up to 4% of pixels. In contrast, the scaled search algorithm failed in only 0.16% of pixels. Failures in the scaled search algorithm were attributed to the presence of noise events above the main photopeak, and possible non-linearities in the spectral response in a small number of pixels. We conclude that a peak searching algorithm based on scaling known peak spacings is simple to implement and performs well for the spectral calibration of pixellated radiation detectors

Steganography based on pixel intensity value decomposition

Science.gov (United States)

Abdulla, Alan Anwar; Sellahewa, Harin; Jassim, Sabah A.

2014-05-01

This paper focuses on steganography based on pixel intensity value decomposition. A number of existing schemes such as binary, Fibonacci, Prime, Natural, Lucas, and Catalan-Fibonacci (CF) are evaluated in terms of payload capacity and stego quality. A new technique based on a specific representation is proposed to decompose pixel intensity values into 16 (virtual) bit-planes suitable for embedding purposes. The proposed decomposition has a desirable property whereby the sum of all bit-planes does not exceed the maximum pixel intensity value, i.e. 255. Experimental results demonstrate that the proposed technique offers an effective compromise between payload capacity and stego quality of existing embedding techniques based on pixel intensity value decomposition. Its capacity is equal to that of binary and Lucas, while it offers a higher capacity than Fibonacci, Prime, Natural, and CF when the secret bits are embedded in 1st Least Significant Bit (LSB). When the secret bits are embedded in higher bit-planes, i.e., 2nd LSB to 8th Most Significant Bit (MSB), the proposed scheme has more capacity than Natural numbers based embedding. However, from the 6th bit-plane onwards, the proposed scheme offers better stego quality. In general, the proposed decomposition scheme has less effect in terms of quality on pixel value when compared to most existing pixel intensity value decomposition techniques when embedding messages in higher bit-planes.

Simulation study of pixel detector charge digitization

Science.gov (United States)

Wang, Fuyue; Nachman, Benjamin; Sciveres, Maurice; Lawrence Berkeley National Laboratory Team

2017-01-01

Reconstruction of tracks from nearly overlapping particles, called Tracking in Dense Environments (TIDE), is an increasingly important component of many physics analyses at the Large Hadron Collider as signatures involving highly boosted jets are investigated. TIDE makes use of the charge distribution inside a pixel cluster to resolve tracks that share one of more of their pixel detector hits. In practice, the pixel charge is discretized using the Time-over-Threshold (ToT) technique. More charge information is better for discrimination, but more challenging for designing and operating the detector. A model of the silicon pixels has been developed in order to study the impact of the precision of the digitized charge distribution on distinguishing multi-particle clusters. The output of the GEANT4-based simulation is used to train neutral networks that predict the multiplicity and location of particles depositing energy inside one cluster of pixels. By studying the multi-particle cluster identification efficiency and position resolution, we quantify the trade-off between the number of ToT bits and low-level tracking inputs. As both ATLAS and CMS are designing upgraded detectors, this work provides guidance for the pixel module designs to meet TIDE needs. Work funded by the China Scholarship Council and the Office of High Energy Physics of the U.S. Department of Energy under contract DE-AC02-05CH11231.

Polarimetric analysis of a CdZnTe spectro-imager under multi-pixel irradiation conditions

Energy Technology Data Exchange (ETDEWEB)

Pinto, M. [LIP-Laboratório de Instrumentação e Física Experimental de Partículas (Portugal); Physics Department, University of Coimbra, Coimbra (Portugal); Curado da Silva, R.M., E-mail: rui.silva@coimbra.lip.pt [LIP-Laboratório de Instrumentação e Física Experimental de Partículas (Portugal); Physics Department, University of Coimbra, Coimbra (Portugal); Maia, J.M. [LIP-Laboratório de Instrumentação e Física Experimental de Partículas (Portugal); Physics Department, University of Beira-Interior, Covilhã (Portugal); Simões, N. [LIP-Laboratório de Instrumentação e Física Experimental de Partículas (Portugal); Physics Department, University of Coimbra, Coimbra (Portugal); Marques, J. [LIP-Laboratório de Instrumentação e Física Experimental de Partículas (Portugal); Centro de Astrofísica, Universidade do Porto, Porto (Portugal); Pereira, L.; Trindade, A.M.F. [LIP-Laboratório de Instrumentação e Física Experimental de Partículas (Portugal); and others

2016-12-21

So far, polarimetry in high-energy astrophysics has been insufficiently explored due to the complexity of the required detection, electronic and signal processing systems. However, its importance is today largely recognized by the astrophysical community, therefore the next generation of high-energy space instruments will certainly provide polarimetric observations, contemporaneously with spectroscopy and imaging. We have been participating in high-energy observatory proposals submitted to ESA Cosmic Vision calls, such as GRI (Gamma-Ray Imager), DUAL and ASTROGAM, where the main instrument was a spectro-imager with polarimetric capabilities. More recently, the H2020 AHEAD project was launched with the objective to promote more coherent and mature future high-energy space mission proposals. In this context of high-energy proposal development, we have tested a CdZnTe detection plane prototype polarimeter under a partially polarized gamma-ray beam generated from an aluminum target irradiated by a {sup 22}Na (511 keV) radioactive source. The polarized beam cross section was 1 cm{sup 2}, allowing the irradiation of a wide multi-pixelated area where all the pixels operate simultaneously as a scatterer and as an absorber. The methods implemented to analyze such multi-pixel irradiation are similar to those required to analyze a spectro-imager polarimeter operating in space, since celestial source photons should irradiate its full pixilated area. Correction methods to mitigate systematic errors inherent to CdZnTe and to the experimental conditions were also implemented. The polarization level (~40%) and the polarization angle (precision of ±5° up to ±9°) obtained under multi-pixel irradiation conditions are presented and compared with simulated data.

A Systematic Hardware Sharing Method for Unified Architecture Design of H.264 Transforms

Directory of Open Access Journals (Sweden)

Po-Hung Chen

2015-01-01

Full Text Available Multitransform techniques have been widely used in modern video coding and have better compression efficiency than the single transform technique that is used conventionally. However, every transform needs a corresponding hardware implementation, which results in a high hardware cost for multiple transforms. A novel method that includes a five-step operation sharing synthesis and architecture-unification techniques is proposed to systematically share the hardware and reduce the cost of multitransform coding. In order to demonstrate the effectiveness of the method, a unified architecture is designed using the method for all of the six transforms involved in the H.264 video codec: 2D 4 × 4 forward and inverse integer transforms, 2D 4 × 4 and 2 × 2 Hadamard transforms, and 1D 8 × 8 forward and inverse integer transforms. Firstly, the six H.264 transform architectures are designed at a low cost using the proposed five-step operation sharing synthesis technique. Secondly, the proposed architecture-unification technique further unifies these six transform architectures into a low cost hardware-unified architecture. The unified architecture requires only 28 adders, 16 subtractors, 40 shifters, and a proposed mux-based routing network, and the gate count is only 16308. The unified architecture processes 8 pixels/clock-cycle, up to 275 MHz, which is equal to 707 Full-HD 1080 p frames/second.

Qualification Procedures of the CMS Pixel Barrel Modules

CERN Document Server

Starodumov, A; Horisberger, R.; Kastli, H.Chr.; Kotlinski, D.; Langenegger, U.; Meier, B.; Rohe, T.; Trueb, P.

2006-01-01

The CMS pixel barrel system will consist of three layers built of about 800 modules. One module contains 66560 readout channels and the full pixel barrel system about 48 million channels. It is mandatory to test each channel for functionality, noise level, trimming mechanism, and bump bonding quality. Different methods to determine the bump bonding yield with electrical measurements have been developed. Measurements of several operational parameters are also included in the qualification procedure. Among them are pixel noise, gains and pedestals. Test and qualification procedures of the pixel barrel modules are described and some results are presented.

The pin pixel detector--neutron imaging

CERN Document Server

Bateman, J E; Derbyshire, G E; Duxbury, D M; Marsh, A S; Rhodes, N J; Schooneveld, E M; Simmons, J E; Stephenson, R

2002-01-01

The development and testing of a neutron gas pixel detector intended for application in neutron diffraction studies is reported. Using standard electrical connector pins as point anodes, the detector is based on a commercial 100 pin connector block. A prototype detector of aperture 25.4 mmx25.4 mm has been fabricated, giving a pixel size of 2.54 mm which matches well to the spatial resolution typically required in a neutron diffractometer. A 2-Dimensional resistive divide readout system has been adapted to permit the imaging properties of the detector to be explored in advance of true pixel readout electronics. The timing properties of the device match well to the requirements of the ISIS-pulsed neutron source.

The ATLAS Pixel Detector

CERN Document Server

Huegging, Fabian

2006-06-26

The contruction of the ATLAS Pixel Detector which is the innermost layer of the ATLAS tracking system is prgressing well. Because the pixel detector will contribute significantly to the ATLAS track and vertex reconstruction. The detector consists of identical sensor-chip-hybrid modules, arranged in three barrels in the centre and three disks on either side for the forward region. The position of the detector near the interaction point requires excellent radiation hardness, mechanical and thermal robustness, good long-term stability for all parts, combined with a low material budget. The final detector layout, new results from production modules and the status of assembly are presented.

Semiconductor Pixel detectors and their applications in life sciences

International Nuclear Information System (INIS)

Jakubek, J

2009-01-01

Recent advances in semiconductor technology allow construction of highly efficient and low noise pixel detectors of ionizing radiation. Steadily improving quality of front end electronics enables fast digital signal processing in each pixel which offers recording of more complete information about each detected quantum (energy, time, number of particles). All these features improve an extend applicability of pixel technology in different fields. Some applications of this technology especially for imaging in life sciences will be shown (energy and phase sensitive X-ray radiography and tomography, radiography with heavy charged particles, neutron radiography, etc). On the other hand a number of obstacles can limit the detector performance if not handled. The pixel detector is in fact an array of individual detectors (pixels), each of them has its own efficiency, energy calibration and also noise. The common effort is to make all these parameters uniform for all pixels. However an ideal uniformity can be never reached. Moreover, it is often seen that the signal in one pixel can affect the neighbouring pixels due to various reasons (e.g. charge sharing). All such effects have to be taken into account during data processing to avoid false data interpretation. A brief view into the future of pixel detectors and their applications including also spectroscopy, tracking and dosimetry is given too. Special attention is paid to the problem of detector segmentation in context of the charge sharing effect.

An improved approach to reduce partial volume errors in brain SPET

International Nuclear Information System (INIS)

Hatton, R.L.; Hatton, B.F.; Michael, G.; Barnden, L.; QUT, Brisbane, QLD; The Queen Elizabeth Hospital, Adelaide, SA

1999-01-01

Full text: Limitations in SPET resolution give rise to significant partial volume error (PVE) in small brain structures We have investigated a previously published method (Muller-Gartner et al., J Cereb Blood Flow Metab 1992;16: 650-658) to correct PVE in grey matter using MRI. An MRI is registered and segmented to obtain a grey matter tissue volume which is then smoothed to obtain resolution matched to the corresponding SPET. By dividing the original SPET with this correction map, structures can be corrected for PVE on a pixel-by-pixel basis. Since this approach is limited by space-invariant filtering, modification was made by estimating projections for the segmented MRI and reconstructing these using identical parameters to SPET. The methods were tested on simulated brain scans, reconstructed with the ordered subsets EM algorithm (8,16, 32, 64 equivalent EM iterations) The new method provided better recovery visually. For 32 EM iterations, recovery coefficients were calculated for grey matter regions. The effects of potential errors in the method were examined. Mean recovery was unchanged with one pixel registration error, the maximum error found in most registration programs. Errors in segmentation > 2 pixels results in loss of accuracy for small structures. The method promises to be useful for reducing PVE in brain SPET

Development of an ultra-fast X-ray camera using hybrid pixel detectors

International Nuclear Information System (INIS)

Dawiec, A.

2011-05-01

The aim of the project whose work described in this thesis is part, was to design a high-speed X-ray camera using hybrid pixels applied to biomedical imaging and for material science. As a matter of fact the hybrid pixel technology meets the requirements of these two research fields, particularly by providing energy selection and low dose imaging capabilities. In this thesis, high frame rate X-ray imaging based on the XPAD3-S photons counting chip is presented. Within a collaboration between CPPM, ESRF and SOLEIL, three XPAD3 cameras were built. Two of them are being operated at the beamline of the ESRF and SOLEIL synchrotron facilities and the third one is embedded in the PIXSCAN II irradiation setup of CPPM. The XPAD3 camera is a large surface X-ray detector composed of eight detection modules of seven XPAD3-S chips each with a high-speed data acquisition system. The readout architecture of the camera is based on the PCI Express interface and on programmable FPGA chips. The camera achieves a readout speed of 240 images/s, with maximum number of images limited by the RAM memory of the acquisition PC. The performance of the device was characterized by carrying out several high speed imaging experiments using the PIXSCAN II irradiation setup described in the last chapter of this thesis. (author)

Results from CHIPIX-FE0, a Small-Scale Prototype of a New Generation Pixel Readout ASIC in 65 nm CMOS for HL-LHC

CERN Document Server

Pacher, L.; Demaria, N.; Rivetti, A.; Da Rocha Rolo, M.; Dellacasa, G.; Mazza, G.; Rotondo, F.; Wheadon, R.; Paternò, A.; Panati, S.; Loddo, F.; Licciulli, F.; Ciciriello, F.; Marzocca, C.; Gaioni, L.; Traversi, G.; Re, V.; De Canio, F.; Ratti, L.; Marconi, S.; Placidi, P.; Magazzù, G.; Stabile, A.; Mattiazzo, S.

2018-01-01

A prototype of a new-generation readout ASIC targeting High-Luminosity (HL) LHC pixel detector upgrades has been designed and fabricated as part of the Italian INFN CHIPIX65 project using a commercial 65 nm CMOS technology. This demonstrator, hereinafter referred to as CHIPIX-FE0, is composed of a matrix of 64 × 64 pixels with 50 μm × 50 μm pixel size embedding two different architectures of analog front-ends working in parallel. The final layout of the chip was submitted and accepted for fabrication on July 2016. Chips were received back from the foundry on October 2016 and successfully characterized before irradiation. Several irra- diation campaigns with X-rays have been accomplished during 2017 at Padova INFN and CERN EP/ESE facilities under different uniformity and temperature conditions up to 630 Mrad Total Ionizing Dose (TID). These studies corfirmed negligible degradation of analog front-ends per- formance after irradiation. First sample chips have been also bump-bonded to 50 μm × 50 μm and sin...

Performances of multiprocessor multidisk architectures for continuous media storage

Science.gov (United States)

Gennart, Benoit A.; Messerli, Vincent; Hersch, Roger D.

1996-03-01

Multimedia interfaces increase the need for large image databases, capable of storing and reading streams of data with strict synchronicity and isochronicity requirements. In order to fulfill these requirements, we consider a parallel image server architecture which relies on arrays of intelligent disk nodes, each disk node being composed of one processor and one or more disks. This contribution analyzes through bottleneck performance evaluation and simulation the behavior of two multi-processor multi-disk architectures: a point-to-point architecture and a shared-bus architecture similar to current multiprocessor workstation architectures. We compare the two architectures on the basis of two multimedia algorithms: the compute-bound frame resizing by resampling and the data-bound disk-to-client stream transfer. The results suggest that the shared bus is a potential bottleneck despite its very high hardware throughput (400Mbytes/s) and that an architecture with addressable local memories located closely to their respective processors could partially remove this bottleneck. The point- to-point architecture is scalable and able to sustain high throughputs for simultaneous compute- bound and data-bound operations.

Adaptive pixel-to-pixel projection intensity adjustment for measuring a shiny surface using orthogonal color fringe pattern projection

Science.gov (United States)

Chen, Chao; Gao, Nan; Wang, Xiangjun; Zhang, Zonghua

2018-05-01

Three-dimensional (3D) shape measurement based on fringe pattern projection techniques has been commonly used in various fields. One of the remaining challenges in fringe pattern projection is that camera sensor saturation may occur if there is a large range of reflectivity variation across the surface that causes measurement errors. To overcome this problem, a novel fringe pattern projection method is proposed to avoid image saturation and maintain high-intensity modulation for measuring shiny surfaces by adaptively adjusting the pixel-to-pixel projection intensity according to the surface reflectivity. First, three sets of orthogonal color fringe patterns and a sequence of uniform gray-level patterns with different gray levels are projected onto a measured surface by a projector. The patterns are deformed with respect to the object surface and captured by a camera from a different viewpoint. Subsequently, the optimal projection intensity at each pixel is determined by fusing different gray levels and transforming the camera pixel coordinate system into the projector pixel coordinate system. Finally, the adapted fringe patterns are created and used for 3D shape measurement. Experimental results on a flat checkerboard and shiny objects demonstrate that the proposed method can measure shiny surfaces with high accuracy.

High-voltage pixel sensors for ATLAS upgrade

Energy Technology Data Exchange (ETDEWEB)

Perić, I., E-mail: ivan.peric@ziti.uni-heidelberg.de [Heidelberg University, Institute of Computer Engineering, Mannheim (Germany); Kreidl, C.; Fischer, P. [Heidelberg University, Institute of Computer Engineering, Mannheim (Germany); Bompard, F.; Breugnon, P.; Clemens, J.-C.; Fougeron, D.; Liu, J.; Pangaud, P.; Rozanov, A.; Barbero, M. [CPPM, Marseille (France); Feigl, S.; Capeans, M.; Ferrere, D.; Pernegger, H.; Ristic, B. [CERN, Geneve (Switzerland); Muenstermann, D.; Gonzalez Sevilla, S.; La Rosa, A.; Miucci, A. [University of Geneve (Switzerland); and others

2014-11-21

The high-voltage (HV-) CMOS pixel sensors offer several good properties: a fast charge collection by drift, the possibility to implement relatively complex CMOS in-pixel electronics and the compatibility with commercial processes. The sensor element is a deep n-well diode in a p-type substrate. The n-well contains CMOS pixel electronics. The main charge collection mechanism is drift in a shallow, high field region, which leads to a fast charge collection and a high radiation tolerance. We are currently evaluating the use of the high-voltage detectors implemented in 180 nm HV-CMOS technology for the high-luminosity ATLAS upgrade. Our approach is replacing the existing pixel and strip sensors with the CMOS sensors while keeping the presently used readout ASICs. By intelligence we mean the ability of the sensor to recognize a particle hit and generate the address information. In this way we could benefit from the advantages of the HV sensor technology such as lower cost, lower mass, lower operating voltage, smaller pitch, smaller clusters at high incidence angles. Additionally we expect to achieve a radiation hardness necessary for ATLAS upgrade. In order to test the concept, we have designed two HV-CMOS prototypes that can be readout in two ways: using pixel and strip readout chips. In the case of the pixel readout, the connection between HV-CMOS sensor and the readout ASIC can be established capacitively.

Partial differential equations

CERN Document Server

Sloan, D; Süli, E

2001-01-01

/homepage/sac/cam/na2000/index.html7-Volume Set now available at special set price ! Over the second half of the 20th century the subject area loosely referred to as numerical analysis of partial differential equations (PDEs) has undergone unprecedented development. At its practical end, the vigorous growth and steady diversification of the field were stimulated by the demand for accurate and reliable tools for computational modelling in physical sciences and engineering, and by the rapid development of computer hardware and architecture. At the more theoretical end, the analytical insight in

Wafer-scale pixelated detector system

Science.gov (United States)

Fahim, Farah; Deptuch, Grzegorz; Zimmerman, Tom

2017-10-17

A large area, gapless, detection system comprises at least one sensor; an interposer operably connected to the at least one sensor; and at least one application specific integrated circuit operably connected to the sensor via the interposer wherein the detection system provides high dynamic range while maintaining small pixel area and low power dissipation. Thereby the invention provides methods and systems for a wafer-scale gapless and seamless detector systems with small pixels, which have both high dynamic range and low power dissipation.

Novel micropixel avalanche photodiodes (MAPD) with super high pixel density

International Nuclear Information System (INIS)

Anfimov, N.; Chirikov-Zorin, I.; Dovlatov, A.; Gavrishchuk, O.; Guskov, A.; Khovanskiy, N.; Krumshtein, Z.; Leitner, R.; Meshcheryakov, G.; Nagaytsev, A.; Olchevski, A.; Rezinko, T.; Sadovskiy, A.; Sadygov, Z.; Savin, I.; Tchalyshev, V.; Tyapkin, I.; Yarygin, G.; Zerrouk, F.

2011-01-01

In many detectors based on scintillators the photomultiplier tubes (PMTs) are used as photodetectors. At present photodiodes are finding wide application. Solid state photodetectors allow operation in strong magnetic fields that are often present in applications, e.g. some calorimeters operating near magnets, combined PET and MRT, etc. The photon detection efficiency (PDE) of photodiodes may reach values a few times higher than that of PMTs. Also, they are rigid, compact and have relatively low operating voltage. In the last few years Micropixel Avalanche PhotoDiodes (MAPD) have been developed and started to be used. The MAPD combines a lot of advantages of semiconductor photodetectors and has a high gain, which is close to that of the PMT. Yet, they have some disadvantages, and one of them is a limited dynamic range that corresponds to a total number of pixels. The novel deep microwell MAPD with high pixel density produced by the Zecotek Company partially avoids this disadvantage. In this paper characteristics of these photodetectors are presented in comparison with the PMT characteristics. The results refer to measurements of the gain, PDE, cross-talks, photon counting and applications: beam test results of two different 'Shashlyk' EM calorimeters for COMPASS (CERN) and NICA-MPD (JINR) with the MAPD readout and a possibility of using the MAPD in PET.

Challenges of small-pixel infrared detectors: a review.

Science.gov (United States)

Rogalski, A; Martyniuk, P; Kopytko, M

2016-04-01

In the last two decades, several new concepts for improving the performance of infrared detectors have been proposed. These new concepts particularly address the drive towards the so-called high operating temperature focal plane arrays (FPAs), aiming to increase detector operating temperatures, and as a consequence reduce the cost of infrared systems. In imaging systems with the above megapixel formats, pixel dimension plays a crucial role in determining critical system attributes such as system size, weight and power consumption (SWaP). The advent of smaller pixels has also resulted in the superior spatial and temperature resolution of these systems. Optimum pixel dimensions are limited by diffraction effects from the aperture, and are in turn wavelength-dependent. In this paper, the key challenges in realizing optimum pixel dimensions in FPA design including dark current, pixel hybridization, pixel delineation, and unit cell readout capacity are outlined to achieve a sufficiently adequate modulation transfer function for the ultra-small pitches involved. Both photon and thermal detectors have been considered. Concerning infrared photon detectors, the trade-offs between two types of competing technology-HgCdTe material systems and III-V materials (mainly barrier detectors)-have been investigated.

Super-pixel extraction based on multi-channel pulse coupled neural network

Science.gov (United States)

Xu, GuangZhu; Hu, Song; Zhang, Liu; Zhao, JingJing; Fu, YunXia; Lei, BangJun

2018-04-01

Super-pixel extraction techniques group pixels to form over-segmented image blocks according to the similarity among pixels. Compared with the traditional pixel-based methods, the image descripting method based on super-pixel has advantages of less calculation, being easy to perceive, and has been widely used in image processing and computer vision applications. Pulse coupled neural network (PCNN) is a biologically inspired model, which stems from the phenomenon of synchronous pulse release in the visual cortex of cats. Each PCNN neuron can correspond to a pixel of an input image, and the dynamic firing pattern of each neuron contains both the pixel feature information and its context spatial structural information. In this paper, a new color super-pixel extraction algorithm based on multi-channel pulse coupled neural network (MPCNN) was proposed. The algorithm adopted the block dividing idea of SLIC algorithm, and the image was divided into blocks with same size first. Then, for each image block, the adjacent pixels of each seed with similar color were classified as a group, named a super-pixel. At last, post-processing was adopted for those pixels or pixel blocks which had not been grouped. Experiments show that the proposed method can adjust the number of superpixel and segmentation precision by setting parameters, and has good potential for super-pixel extraction.

Hybrid POMDP-BDI Agent Architecture with Online Stochastic Planning and Desires with Changing Intensity Levels

CSIR Research Space (South Africa)

Rens, GB

2015-01-01

Full Text Available The authors propose an agent architecture which combines Partially observable Markov decision processes (POMDPs) and the belief-desire-intention (BDI) framework have several complementary strengths. The authors propose an agent architecture, which...

Steganography on quantum pixel images using Shannon entropy

Science.gov (United States)

Laurel, Carlos Ortega; Dong, Shi-Hai; Cruz-Irisson, M.

2016-07-01

This paper presents a steganographical algorithm based on least significant bit (LSB) from the most significant bit information (MSBI) and the equivalence of a bit pixel image to a quantum pixel image, which permits to make the information communicate secretly onto quantum pixel images for its secure transmission through insecure channels. This algorithm offers higher security since it exploits the Shannon entropy for an image.

System architecture for high speed reconstruction in time-of-flight positron tomography

International Nuclear Information System (INIS)

Campagnolo, R.E.; Bouvier, A.; Chabanas, L.; Robert, C.

1985-06-01

A new generation of Time Of Flight (TOF) positron tomograph with high resolution and high count rate capabilities is under development in our group. After a short recall of the data acquisition process and image reconstruction in a TOF PET camera, we present the data acquisition system which achieves a data transfer rate of 0.8 mega events per second or more if necessary in list mode. We describe the reconstruction process based on a five stages pipe line architecture using home made processors. The expected performance with this architecture is a time reconstruction of six seconds per image (256x256 pixels) of one million events. This time could be reduce to 4 seconds. We conclude with the future developments of the system

Characterization of Ir/Au pixel TES

International Nuclear Information System (INIS)

Kunieda, Y.; Takahashi, H.; Zen, N.; Damayanthi, R.M.T.; Mori, F.; Fujita, K.; Nakazawa, M.; Fukuda, D.; Ohkubo, M.

2006-01-01

Signal shapes and noise characteristics of an asymmetrical ten-pixel Ir/Au-TES have been studied. The asymmetric design may be effective to realize an imaging spectrometer. Distinct two exponential decays observed for X-ray events are consistent with a two-step R-T curve. A theoretical thermal model for noise in multi-pixel devices reasonably explains the experimental data

4T CMOS Active Pixel Sensors under Ionizing Radiation

NARCIS (Netherlands)

Tan, J.

2013-01-01

This thesis investigates the ionizing radiation effects on 4T pixels and the elementary in-pixel test devices with regard to the electrical performance and the optical performance. In addition to an analysis of the macroscopic pixel parameter degradation, the radiation-induced degradation mechanisms

Selecting Pixels for High-Precision Photometry in the Kepler Mission

Science.gov (United States)

Bryson, Steve; Jenkins, J.; Caldwell, D.; Koch, D.; Borucki, W.

2007-12-01

The Kepler Mission is designed to discover and characterize the frequency of Earth-size planets in the habitable zone of solar-like stars by observing 100,000 main-sequence stars in a 100 square degree field of view (FOV). Kepler's transit detection method uses a long photometric time series for each target star. Each data point is created by summing several pixels.The data are co-added and stored at a 30 minute cadence that is stored for monthly downlink. Memory and bandwidth constraints prevent the storage of all 95 million pixels in the photometer, so pixels of interest are assigned to each target. We describe the automated method by which each transit target is assigned a set of pixels that are optimal for high precision photometry. This method relies on synthetic images based on the Kepler input catalog combined with a direct measurement of the Kepler systempoint spread function. We cover the PSF measurement process, the rendering of the synthetic image, and the use of the synthetic image to determine the contribution of each pixel to a target's signal-to-noise ratio. The optimal pixels for a target are defined as those pixels which maximize that target's signal-to-noise ratio. Our method includes models of the noise associated with pixel response variations and for spacecraft motion. We describe the process that is used to identify appropriate pixels for modeling the background as well as pixel management, including the specification of pixels for non-transit targets. Funding for this mission provided by NASA's Discovery Program Office, SMD.

ATLAS ITk Pixel detector

CERN Document Server

Gemme, Claudia; The ATLAS collaboration

2016-01-01

The high luminosity upgrade of the LHC (HL-LHC) in 2026 will provide new challenge to the ATLAS tracker. The current inner detector will be replaced with a whole silicon tracker which will consist of a five barrel layer Pixel detector surrounded by a four barrel layer Strip detector. The expected high radiation level are requiring the development of upgraded silicon sensors as well as new a front-end chip. The dense tracking environment will require finer granularity detectors. The data rates will require new technologies for high bandwidth data transmission and handling. The current status of the HL-LHC ATLA Pixel detector developments as well as the various layout options will be reviewed.

X-ray imaging characterization of active edge silicon pixel sensors

International Nuclear Information System (INIS)

Ponchut, C; Ruat, M; Kalliopuska, J

2014-01-01

The aim of this work was the experimental characterization of edge effects in active-edge silicon pixel sensors, in the frame of X-ray pixel detectors developments for synchrotron experiments. We produced a set of active edge pixel sensors with 300 to 500 μm thickness, edge widths ranging from 100 μm to 150 μm, and n or p pixel contact types. The sensors with 256 × 256 pixels and 55 × 55 μm 2 pixel pitch were then bump-bonded to Timepix readout chips for X-ray imaging measurements. The reduced edge widths makes the edge pixels more sensitive to the electrical field distribution at the sensor boundaries. We characterized this effect by mapping the spatial response of the sensor edges with a finely focused X-ray synchrotron beam. One of the samples showed a distortion-free response on all four edges, whereas others showed variable degrees of distortions extending at maximum to 300 micron from the sensor edge. An application of active edge pixel sensors to coherent diffraction imaging with synchrotron beams is described

Thermal Characterization and Optimization of the Pixel Module Support Structure for the Phase-1 Upgrade of the CMS Pixel Detector

CERN Document Server

AUTHOR|(CDS)2094386; Feld, Lutz Werner

2015-01-01

The CMS (Compact Muon Solenoid) pixel detector is used in CMS for the vertex reconstruction of events in high-energy proton-proton collisions produced by the Large Hadron Collider (LHC). It is planned for the future years that the LHC will deliver significantly higher instantaneous and integrated luminosities. Therefore, also the demands and requirements for the participating detectors rise. Thus the current CMS pixel detector will be replaced by the CMS Phase-1 Upgrade Pixel Detector in the extended year-end technical stop in winter 2016/2017. As a vertex detector, the pixel detector is the innermost detector component and it is located at a short distance to the proton-proton interaction point. Therefore it has to cope with high particle hit rates and high irradiation. The heat produced due to power consumption has to be removed while using a low-mass detector design. The low-mass design of the Phase-1 Upgrade Pixel Detector will be implemented by utilizing a new two-phase CO2 cooling concept and an ultra l...

Plasmonic nanospherical dimers for color pixels

KAUST Repository

Alrasheed, Salma

2018-04-20

Display technologies are evolving more toward higher resolution and miniaturization. Plasmonic color pixels can offer solutions to realize such technologies due to their sharp resonances and selective scattering and absorption at particular wavelengths. Metal nanosphere dimers are capable of supporting plasmon resonances that can be tuned to span the entire visible spectrum. In this article, we demonstrate numerically bright color pixels that are highly polarized and broadly tuned using periodic arrays of metal nanosphere dimers on a glass substrate. We show that it is possible to obtain RGB pixels in the reflection mode. The longitudinal plasmon resonance of nanosphere dimers along the axis of the dimer is the main contributor to the color of the pixel, while far-field diffractive coupling further enhances and tunes the plasmon resonance. The computational method used is the finite-difference time-domain method. The advantages of this approach include simplicity of the design, bright coloration, and highly polarized function. In addition, we show that it is possible to obtain different colors by varying the angle of incidence, the periodicity, the size of the dimer, the gap, and the substrate thickness.

Theory and applications of structured light single pixel imaging

Science.gov (United States)

Stokoe, Robert J.; Stockton, Patrick A.; Pezeshki, Ali; Bartels, Randy A.

2018-02-01

Many single-pixel imaging techniques have been developed in recent years. Though the methods of image acquisition vary considerably, the methods share unifying features that make general analysis possible. Furthermore, the methods developed thus far are based on intuitive processes that enable simple and physically-motivated reconstruction algorithms, however, this approach may not leverage the full potential of single-pixel imaging. We present a general theoretical framework of single-pixel imaging based on frame theory, which enables general, mathematically rigorous analysis. We apply our theoretical framework to existing single-pixel imaging techniques, as well as provide a foundation for developing more-advanced methods of image acquisition and reconstruction. The proposed frame theoretic framework for single-pixel imaging results in improved noise robustness, decrease in acquisition time, and can take advantage of special properties of the specimen under study. By building on this framework, new methods of imaging with a single element detector can be developed to realize the full potential associated with single-pixel imaging.

Towards an inline reconstruction architecture for micro-CT systems

International Nuclear Information System (INIS)

Brasse, David; Humbert, Bernard; Mathelin, Carole; Rio, Marie-Christine; Guyonnet, Jean-Louis

2005-01-01

Recent developments in micro-CT have revolutionized the ability to examine in vivo living experimental animal models such as mouse with a spatial resolution less than 50 μm. The main requirements of in vivo imaging for biological researchers are a good spatial resolution, a low dose induced to the animal during the full examination and a reduced acquisition and reconstruction time for screening purposes. We introduce inline acquisition and reconstruction architecture to obtain in real time the 3D attenuation map of the animal fulfilling the three previous requirements. The micro-CT system is based on commercially available x-ray detector and micro-focus x-ray source. The reconstruction architecture is based on a cluster of PCs where a dedicated communication scheme combining serial and parallel treatments is implemented. In order to obtain high performance transmission rate between the detector and the reconstruction architecture, a dedicated data acquisition system is also developed. With the proposed solution, the time required to filter and backproject a projection of 2048 x 2048 pixels inside a volume of 140 mega voxels using the Feldkamp algorithm is similar to 500 ms, the time needed to acquire the same projection

SVM Pixel Classification on Colour Image Segmentation

Science.gov (United States)

Barui, Subhrajit; Latha, S.; Samiappan, Dhanalakshmi; Muthu, P.

2018-04-01

The aim of image segmentation is to simplify the representation of an image with the help of cluster pixels into something meaningful to analyze. Segmentation is typically used to locate boundaries and curves in an image, precisely to label every pixel in an image to give each pixel an independent identity. SVM pixel classification on colour image segmentation is the topic highlighted in this paper. It holds useful application in the field of concept based image retrieval, machine vision, medical imaging and object detection. The process is accomplished step by step. At first we need to recognize the type of colour and the texture used as an input to the SVM classifier. These inputs are extracted via local spatial similarity measure model and Steerable filter also known as Gabon Filter. It is then trained by using FCM (Fuzzy C-Means). Both the pixel level information of the image and the ability of the SVM Classifier undergoes some sophisticated algorithm to form the final image. The method has a well developed segmented image and efficiency with respect to increased quality and faster processing of the segmented image compared with the other segmentation methods proposed earlier. One of the latest application result is the Light L16 camera.

Status of the CMS Phase I pixel detector upgrade

Energy Technology Data Exchange (ETDEWEB)

Spannagel, S., E-mail: simon.spannagel@desy.de

2016-09-21

A new pixel detector for the CMS experiment is being built, owing to the instantaneous luminosities anticipated for the Phase I Upgrade of the LHC. The new CMS pixel detector provides four-hit tracking while featuring a significantly reduced material budget as well as new cooling and powering schemes. A new front-end readout chip mitigates buffering and bandwidth limitations, and comprises a low-threshold comparator. These improvements allow the new pixel detector to sustain and improve the efficiency of the current pixel tracker at the increased requirements imposed by high luminosities and pile-up. This contribution gives an overview of the design of the upgraded pixel detector and the status of the upgrade project, and presents test beam performance measurements of the production read-out chip.

Status of the CMS Phase I Pixel Detector Upgrade

CERN Document Server

Spannagel, Simon

2016-09-21

A new pixel detector for the CMS experiment is being built, owing to the instantaneous luminosities anticipated for the Phase~I Upgrade of the LHC. The new CMS pixel detector provides four-hit tracking while featuring a significantly reduced material budget as well as new cooling and powering schemes. A new front-end readout chip mitigates buffering and bandwidth limitations, and comprises a low-threshold comparator. These improvements allow the new pixel detector to sustain and improve the efficiency of the current pixel tracker at the increased requirements imposed by high luminosities and pile-up. This contribution gives an overview of the design of the upgraded pixel detector and the status of the upgrade project, and presents test beam performance measurements of the production read-out chip.

Dichromatic Gray Pixel for Camera-agnostic Color Constancy

OpenAIRE

Qian, Yanlin; Chen, Ke; Nikkanen, Jarno; Kämäräinen, Joni-Kristian; Matas, Jiri

2018-01-01

We propose a novel statistical color constancy method, especially suitable for the Camera-agnostic Color Constancy, i.e. the scenario where nothing is known a priori about the capturing devices. The method, called Dichromatic Gray Pixel, or DGP, relies on a novel gray pixel detection algorithm derived using the Dichromatic Reflection Model. DGP is suitable for camera-agnostic color constancy since varying devices are set to make achromatic pixels look gray under standard neutral illumination....

Partially Adaptive STAP Algorithm Approaches to functional MRI

Science.gov (United States)

Huang, Lejian; Thompson, Elizabeth A.; Schmithorst, Vincent; Holland, Scott K.; Talavage, Thomas M.

2010-01-01

In this work, the architectures of three partially adaptive STAP algorithms are introduced, one of which is explored in detail, that reduce dimensionality and improve tractability over fully adaptive STAP when used in construction of brain activation maps in fMRI. Computer simulations incorporating actual MRI noise and human data analysis indicate that element space partially adaptive STAP can attain close to the performance of fully adaptive STAP while significantly decreasing processing time and maximum memory requirements, and thus demonstrates potential in fMRI analysis. PMID:19272913

A Real-Time Early Cognitive Vision System based on a Hybrid coarse and fine grained Parallel Architecture

DEFF Research Database (Denmark)

Jensen, Lars Baunegaard With

. The current top model GPUs from NVIDIA possess up to 240 homogeneous cores. In the past, GPUs have beenhard to program, forcing the programmer to map the algorithm to the graphics processing pipeline and think in terms of vertex and fragment shaders, imposing a limiting factor in the implementation of non......-graphics applications. This, however, has changed with the introduction of the Compute Unified Device Architecture (CUDA) framework from NVIDIA. The EV and ECV stages have different parallel properties. The regular, pixel-based processing of EV fit the GPU architecture very well, and parts of ECV, on the other hand...

Diamond and silicon pixel detectors in high radiation environments

Energy Technology Data Exchange (ETDEWEB)

Tsung, Jieh-Wen

2012-10-15

Diamond pixel detector is a promising candidate for tracking of collider experiments because of the good radiation tolerance of diamond. The diamond pixel detector must withstand the radiation damage from 10{sup 16} particles per cm{sup 2}, which is the expected total fluence in High Luminosity Large Hadron Collider. The performance of diamond and silicon pixel detectors are evaluated in this research in terms of the signal-to-noise ratio (SNR). Single-crystal diamond pixel detectors with the most recent readout chip ATLAS FE-I4 are produced and characterized. Based on the results of the measurement, the SNR of diamond pixel detector is evaluated as a function of radiation fluence, and compared to that of planar-silicon ones. The deterioration of signal due to radiation damage is formulated using the mean free path of charge carriers in the sensor. The noise from the pixel readout circuit is simulated and calculated with leakage current and input capacitance to the amplifier as important parameters. The measured SNR shows good agreement with the calculated and simulated results, proving that the performance of diamond pixel detectors can exceed the silicon ones if the particle fluence is more than 10{sup 15} particles per cm{sup 2}.

Diamond and silicon pixel detectors in high radiation environments

International Nuclear Information System (INIS)

Tsung, Jieh-Wen

2012-10-01

Diamond pixel detector is a promising candidate for tracking of collider experiments because of the good radiation tolerance of diamond. The diamond pixel detector must withstand the radiation damage from 10 16 particles per cm 2 , which is the expected total fluence in High Luminosity Large Hadron Collider. The performance of diamond and silicon pixel detectors are evaluated in this research in terms of the signal-to-noise ratio (SNR). Single-crystal diamond pixel detectors with the most recent readout chip ATLAS FE-I4 are produced and characterized. Based on the results of the measurement, the SNR of diamond pixel detector is evaluated as a function of radiation fluence, and compared to that of planar-silicon ones. The deterioration of signal due to radiation damage is formulated using the mean free path of charge carriers in the sensor. The noise from the pixel readout circuit is simulated and calculated with leakage current and input capacitance to the amplifier as important parameters. The measured SNR shows good agreement with the calculated and simulated results, proving that the performance of diamond pixel detectors can exceed the silicon ones if the particle fluence is more than 10 15 particles per cm 2 .

Quality control on planar n-in-n pixel sensors — Recent progress of ATLAS planar pixel sensors

International Nuclear Information System (INIS)

Klingenberg, R.

2013-01-01

To extend the physics reach of the Large Hadron Collider (LHC), upgrades to the accelerator are planned which will increase the peak luminosity by a factor 5–10. To cope with the increased occupancy and radiation damage, the ATLAS experiment plans to introduce an all-silicon inner tracker with the high luminosity upgrade (HL-LHC). To investigate the suitability of pixel sensors using the proven planar technology for the upgraded tracker, the ATLAS Upgrade Planar Pixel Sensor (PPS) R and D Project was established. Main areas of research are the performance of planar pixel sensors at highest fluences, the exploration of possibilities for cost reduction to enable the instrumentation of large areas, the achievement of slim or active edges to provide low geometric inefficiencies without the need for shingling of modules and the investigation of the operation of highly irradiated sensors at low thresholds to increase the efficiency. The Insertable b-layer (IBL) is the first upgrade project within the ATLAS experiment and will employ a new detector layer consisting of silicon pixel sensors, which were improved and prototyped in the framework of the planar pixel sensor R and D project. A special focus of this paper is the status of the development and testing of planar n-in-n pixel sensors including the quality control of the on-going series production and postprocessing of sensor wafers. A high yield of produced planar sensor wafers and FE-I4 double chip sensors after first steps of post-processing including under bump metallization and dicing is observed. -- Highlights: ► Prototypes of irradiated planar n-in-n sensors have been successfully tested under laboratory conditions. ► A quality assurance programme on the series production of planar sensors for the IBL has started. ► A high yield of double chip sensors during the series production is observed which are compatible to the specifications to this detector component.

Active pixel sensor pixel having a photodetector whose output is coupled to an output transistor gate

Science.gov (United States)

Fossum, Eric R. (Inventor); Nakamura, Junichi (Inventor); Kemeny, Sabrina E. (Inventor)

2005-01-01

An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node. There is also a readout circuit, part of which can be disposed at the bottom of each column of cells and be common to all the cells in the column. A Simple Floating Gate (SFG) pixel structure could also be employed in the imager to provide a non-destructive readout and smaller pixel sizes.

A low mass pixel detector upgrade for CMS

CERN Document Server

Kästli, H C

2010-01-01

The CMS pixel detector has been designed for a peak luminosity of 10^34cm-2s-1 and a total dose corresponding to 2 years of LHC operation at a radius of 4 cm from the interaction region. Parts of the pixel detector will have to be replaced until 2015. The detector performance will be degraded for two reasons: radiation damage of the innermost layers and the planned increase of the LHC peak luminosity by a factor of 2-3. Based on the experience in planning, constructing and commissioning of the present pixel detector, we intend to upgrade the whole pixel detector in 2015. The main focus is on lowering the material budget and adding more tracking points. We will present the design of a new low mass pixel system consisting of 4 barrel layers and 3 end cap disks on each side. The design comprises of thin detector modules and a lightweight mechanical support structure using CO2 cooling. In addition, large efforts have been made to move material from the services out of the tracking region.

A hardware architecture for real-time shadow removal in high-contrast video

Science.gov (United States)

Verdugo, Pablo; Pezoa, Jorge E.; Figueroa, Miguel

2017-09-01

Broadcasting an outdoor sports event at daytime is a challenging task due to the high contrast that exists between areas in the shadow and light conditions within the same scene. Commercial cameras typically do not handle the high dynamic range of such scenes in a proper manner, resulting in broadcast streams with very little shadow detail. We propose a hardware architecture for real-time shadow removal in high-resolution video, which reduces the shadow effect and simultaneously improves shadow details. The algorithm operates only on the shadow portions of each video frame, thus improving the results and producing more realistic images than algorithms that operate on the entire frame, such as simplified Retinex and histogram shifting. The architecture receives an input in the RGB color space, transforms it into the YIQ space, and uses color information from both spaces to produce a mask of the shadow areas present in the image. The mask is then filtered using a connected components algorithm to eliminate false positives and negatives. The hardware uses pixel information at the edges of the mask to estimate the illumination ratio between light and shadow in the image, which is then used to correct the shadow area. Our prototype implementation simultaneously processes up to 7 video streams of 1920×1080 pixels at 60 frames per second on a Xilinx Kintex-7 XC7K325T FPGA.

Opto-VLSI-based reconfigurable free-space optical interconnects architecture

DEFF Research Database (Denmark)

Aljada, Muhsen; Alameh, Kamal; Chung, Il-Sug

2007-01-01

is the Opto-VLSI processor which can be driven by digital phase steering and multicasting holograms that reconfigure the optical interconnects between the input and output ports. The optical interconnects architecture is experimentally demonstrated at 2.5 Gbps using high-speed 1×3 VCSEL array and 1......×3 photoreceiver array in conjunction with two 1×4096 pixel Opto-VLSI processors. The minimisation of the crosstalk between the output ports is achieved by appropriately aligning the VCSEL and PD elements with respect to the Opto-VLSI processors and driving the latter with optimal steering phase holograms....

Technological aspects of gaseous pixel detectors fabrication

NARCIS (Netherlands)

Blanco Carballo, V.M.; Salm, Cora; Smits, Sander M.; Schmitz, Jurriaan; Melai, J.; Chefdeville, M.A.; van der Graaf, H.

2007-01-01

Integrated gaseous pixel detectors consisting of a metal punctured foil suspended in the order of 50μm over a pixel readout chip by means by SU-8 insulating pillars have been fabricated. SU-8 is used as sacrificial layer but metallization over uncrosslinked SU-8 presents adhesion and stress

Access To The PMM's Pixel Database

Science.gov (United States)

Monet, D.; Levine, S.

1999-12-01

The U.S. Naval Observatory Flagstaff Station is in the process of enabling access to the Precision Measuring Machine (PMM) program's pixel database. The initial release will include the pixels from the PMM's scans of the Palomar Observatory Sky Survey I (POSS-I) -O and -E surveys, the Whiteoak Extension, the European Southern Observatory-R survey, the Science and Engineering Council-J, -EJ, and -ER surveys, and the Anglo- Australian Observatory-R survey. (The SERC-ER and AAO-R surveys are currently incomplete.) As time allows, access to the POSS-II -J, -F, and -N surveys, the Palomar Infrared Milky Way Atlas, the Yale/San Juan Southern Proper Motion survey, and plates rejected by various surveys will be added. (POSS-II -J and -F are complete, but -N was never finished.) Eventually, some 10 Tbytes of pixel data will be available. Due to funding and technology limitations, the initial interface will have only limited functionality, and access time will be slow since the archive is stored on Digital Linear Tape (DLT). Usage of the pixel data will be restricted to non-commercial, scientific applications, and agreements on copyright issues have yet to be finalized. The poster presentation will give the URL.

The FPGA Pixel Array Detector

International Nuclear Information System (INIS)

Hromalik, Marianne S.; Green, Katherine S.; Philipp, Hugh T.; Tate, Mark W.; Gruner, Sol M.

2013-01-01

A proposed design for a reconfigurable x-ray Pixel Array Detector (PAD) is described. It operates by integrating a high-end commercial field programmable gate array (FPGA) into a 3-layer device along with a high-resistivity diode detection layer and a custom, application-specific integrated circuit (ASIC) layer. The ASIC layer contains an energy-discriminating photon-counting front end with photon hits streamed directly to the FPGA via a massively parallel, high-speed data connection. FPGA resources can be allocated to perform user defined tasks on the pixel data streams, including the implementation of a direct time autocorrelation function (ACF) with time resolution down to 100 ns. Using the FPGA at the front end to calculate the ACF reduces the required data transfer rate by several orders of magnitude when compared to a fast framing detector. The FPGA-ASIC high-speed interface, as well as the in-FPGA implementation of a real-time ACF for x-ray photon correlation spectroscopy experiments has been designed and simulated. A 16×16 pixel prototype of the ASIC has been fabricated and is being tested. -- Highlights: ► We describe the novelty and need for the FPGA Pixel Array Detector. ► We describe the specifications and design of the Diode, ASIC and FPGA layers. ► We highlight the Autocorrelation Function (ACF) for speckle as an example application. ► Simulated FPGA output calculates the ACF for different input bitstreams to 100 ns. ► Reduced data transfer rate by 640× and sped up real-time ACF by 100× other methods.

Macro Pixel ASIC (MPA): The readout ASIC for the pixel-strip (PS) module of the CMS outer tracker at HL-LHC

CERN Document Server

Ceresa, Davide; Kloukinas, Konstantinos; Jan Kaplon; Bialas, Wojciech; Re, Valerio; Traversi, Gianluca; Gaioni, Luigi; Ratti, Lodovico

2014-01-01

The CMS tracker at HL-LHC is required to provide prompt information on particles with high transverse momentum to the central Level\\,1 trigger. For this purpose, the innermost part of the outer tracker is based on a combination of a pixelated sensor with a short strip sensor, the so-called Pixel-Strip module (PS). The readout of these sensors is carried out by distinct ASICs, the Strip Sensor ASIC (SSA), for the strip layer, and the Macro Pixel ASIC (MPA) for the pixel layer. The processing of the data directly on the front-end module represents a design challenge due to the large data volume (30720\\,pixels and 1920\\,strips per module) and the limited power budget. This is the reason why several studies have been carried out to find the best compromise between ASICs performance and power consumption. This paper describes the current status of the MPA ASIC development where the logic for generating prompt information on particles with high transverse momentum is implemented. An overview of the readout method i...

An investigation of signal performance enhancements achieved through innovative pixel design across several generations of indirect detection, active matrix, flat-panel arrays

International Nuclear Information System (INIS)

Antonuk, Larry E.; Zhao Qihua; El-Mohri, Youcef; Du Hong; Wang Yi; Street, Robert A.; Ho, Jackson; Weisfield, Richard; Yao, William

2009-01-01

Active matrix flat-panel imager (AMFPI) technology is being employed for an increasing variety of imaging applications. An important element in the adoption of this technology has been significant ongoing improvements in optical signal collection achieved through innovations in indirect detection array pixel design. Such improvements have a particularly beneficial effect on performance in applications involving low exposures and/or high spatial frequencies, where detective quantum efficiency is strongly reduced due to the relatively high level of additive electronic noise compared to signal levels of AMFPI devices. In this article, an examination of various signal properties, as determined through measurements and calculations related to novel array designs, is reported in the context of the evolution of AMFPI pixel design. For these studies, dark, optical, and radiation signal measurements were performed on prototype imagers incorporating a variety of increasingly sophisticated array designs, with pixel pitches ranging from 75 to 127 μm. For each design, detailed measurements of fundamental pixel-level properties conducted under radiographic and fluoroscopic operating conditions are reported and the results are compared. A series of 127 μm pitch arrays employing discrete photodiodes culminated in a novel design providing an optical fill factor of ∼80% (thereby assuring improved x-ray sensitivity), and demonstrating low dark current, very low charge trapping and charge release, and a large range of linear signal response. In two of the designs having 75 and 90 μm pitches, a novel continuous photodiode structure was found to provide fill factors that approach the theoretical maximum of 100%. Both sets of novel designs achieved large fill factors by employing architectures in which some, or all of the photodiode structure was elevated above the plane of the pixel addressing transistor. Generally, enhancement of the fill factor in either discrete or continuous

Development of pixel readout integrated circuits for extreme rate and radiation

CERN Multimedia

Liberali, V; Rizzi, A; Re, V; Minuti, M; Pangaud, P; Barbero, M B; Pacher, L; Kluit, R; Hinchliffe, I; Manghisoni, M; Giubilato, P; Faccio, F; Pernegger, H; Krueger, H; Gensolen, F D; Bilei, G M; Da rocha rolo, M D; Prydderch, M L; Fanucci, L; Grillo, A A; Bellazzini, R; Palomo pinto, F R; Michelis, S; Huegging, F G; Kishishita, T; Marchiori, G; Christian, D C; Kaestli, H C; Meier, B; Andreazza, A; Key-charriere, M; Linssen, L; Dannheim, D; Conti, E; Hemperek, T; Menouni, M; Fougeron, D; Genat, J; Bomben, M; Marzocca, C; Demaria, N; Mazza, G; Van bakel, N A; Palla, F; Grippo, M T; Magazzu, G; Ratti, L; Abbaneo, D; Crescioli, F; Deptuch, G W; Neue, G; De robertis, G; Passeri, D; Placidi, P; Gromov, V; Morsani, F; Paccagnella, A; Christiansen, J; Dho, E; Wermes, N; Rymaszewski, P; Rozanov, A; Wang, A; Lipton, R J; Havranek, M; Neviani, A; Marconi, S; Karagounis, M; Godiot, S; Calderini, G; Seidel, S C; Horisberger, R P; Garcia-sciveres, M A; Stabile, A; Beccherle, R; Bacchetta, N

The present hybrid pixel detectors in operation at the LHC represent a major achievement. They deployed a new technology on an unprecedented scale and their success firmly established pixel tracking as indispensable for future HEP experiments. However, extrapolation of hybrid pixel technology to the HL-LHC presents major challenges on several fronts. We propose a new RD collaboration specifically focused on the development of pixel readout Integrated Circuits (IC). The IC challenges include: smaller pixels to resolve tracks in boosted jets, much higher hit rates (1-2 GHz/cm$^{2}$), unprecedented radiation tolerance (10 MGy), much higher output bandwidth, and large IC format with low power consumption in order to instrument large areas while keeping the material budget low. We propose a collaboration to design the next generation of hybrid pixel readout chips to enable the ATLAS and CMS Phase 2 pixel upgrades. This does not imply that ATLAS and CMS must use the same exact pixel readout chip, as most of the dev...

Design and development of pixel size calibration phantom for gamma camera

International Nuclear Information System (INIS)

Khokhar, S.B.; Manan, A.; Chaudary, M.A.; Pervaiz, T.

2005-01-01

The purpose of the study is to make pixel calibration phantom, to measure pixel size for different zoom factors and matrix sizes and to compare the pixel size with the values of provided by the vendor. For this purpose pixel size calibration phantom (rectangular in shape) made up of acrylic material having dimension 43 x 10 square cm was prepared. Seven circular holes at exact known distance with whole diameter 1.5 mm were born. High specific activity was filled in the holes of the phantom, acquired the image by fixing the number of counts at all available matrices and zoom factors. Pixel size was calculated by counting the number of pixels between focused points and divided the distance thereof by the number of pixels. Mean pixel size was calculated and compared it with reference value provided by the manufacturer of the camera. P- value was calculated which showed that most results lie in the acceptable limit. The calculated values agreed very well. However there exist some deviation at larger matrix sizes, which might be due to scattering of radiation that overlaps nearest pixels, and due to human error. (author)

The Phase-2 ATLAS ITk Pixel Upgrade

CERN Document Server

Macchiolo, Anna; The ATLAS collaboration

2018-01-01

The new ATLAS ITk pixel system will be installed during the LHC Phase-II shutdown, to better take advantage of the increased luminosity of the HL-LHC. The detector will consist of 5 layers of stave-like support structures in the most central region and ring-shaped supports in the endcap regions, covering up to |η| < 4. While the outer 3 layers of the Pixel Detector are designed to operate for the full HL-LHC data taking period, the innermost 2 layers of the detector will be replaced around half of the lifetime. The ITk pixel detector will be instrumented with new sensors and readout electronics to provide improved tracking performance and radiation hardness compared to the current detector. Sensors will be read out by new ASICs based on the chip developed by the RD53 Collaboration. The pixel off-detector readout electronics will be implemented in the framework of the general ATLAS trigger and DAQ system with a readout speed of up to 5 Gb/s per data link for the innermost layers. Results of extensive tests...

CMS pixel upgrade project

CERN Document Server

Kaestli, Hans-Christian

2010-01-01

The LHC machine at CERN finished its first year of pp collisions at a center of mass energy of 7~TeV. While the commissioning to exploit its full potential is still ongoing, there are plans to upgrade its components to reach instantaneous luminosities beyond the initial design value after 2016. A corresponding upgrade of the innermost part of the CMS detector, the pixel detector, is needed. A full replacement of the pixel detector is planned in 2016. It will not only address limitations of the present system at higher data rates, but will aggressively lower the amount of material inside the fiducial tracking volume which will lead to better tracking and b-tagging performance. This article gives an overview of the project and illuminates the motivations and expected improvements in the detector performance.

CMS pixel upgrade project

CERN Document Server

INSPIRE-00575876

2011-01-01

The LHC machine at CERN finished its first year of pp collisions at a center of mass energy of 7 TeV. While the commissioning to exploit its full potential is still ongoing, there are plans to upgrade its components to reach instantaneous luminosities beyond the initial design value after 2016. A corresponding upgrade of the innermost part of the CMS detector, the pixel detector, is needed. A full replacement of the pixel detector is planned in 2016. It will not only address limitations of the present system at higher data rates, but will aggressively lower the amount of material inside the fiducial tracking volume which will lead to better tracking and b-tagging performance. This article gives an overview of the project and illuminates the motivations and expected improvements in the detector performance.

Comparative Analysis of Maximum Power Point Tracking Controllers under Partial Shaded Conditions in a Photovoltaic System

Directory of Open Access Journals (Sweden)

R. Ramaprabha

2015-06-01

Full Text Available Mismatching effects due to partial shaded conditions are the major drawbacks existing in today’s photovoltaic (PV systems. These mismatch effects are greatly reduced in distributed PV system architecture where each panel is effectively decoupled from its neighboring panel. To obtain the optimal operation of the PV panels, maximum power point tracking (MPPT techniques are used. In partial shaded conditions, detecting the maximum operating point is difficult as the characteristic curves are complex with multiple peaks. In this paper, a neural network control technique is employed for MPPT. Detailed analyses were carried out on MPPT controllers in centralized and distributed architecture under partial shaded environments. The efficiency of the MPPT controllers and the effectiveness of the proposed control technique under partial shaded environments was examined using MATLAB software. The results were validated through experimentation.

Realistic full wave modeling of focal plane array pixels.

Energy Technology Data Exchange (ETDEWEB)

Campione, Salvatore [Sandia National Laboratories (SNL-NM), Albuquerque, NM (United States). Electromagnetic Theory Dept.; Warne, Larry K. [Sandia National Laboratories (SNL-NM), Albuquerque, NM (United States). Electromagnetic Theory Dept.; Jorgenson, Roy E. [Sandia National Laboratories (SNL-NM), Albuquerque, NM (United States). Electromagnetic Theory Dept.; Davids, Paul [Sandia National Laboratories (SNL-NM), Albuquerque, NM (United States). Applied Photonic Microsystems Dept.; Peters, David W. [Sandia National Laboratories (SNL-NM), Albuquerque, NM (United States). Applied Photonic Microsystems Dept.

2017-11-01

Here, we investigate full-wave simulations of realistic implementations of multifunctional nanoantenna enabled detectors (NEDs). We focus on a 2x2 pixelated array structure that supports two wavelengths of operation. We design each resonating structure independently using full-wave simulations with periodic boundary conditions mimicking the whole infinite array. We then construct a supercell made of a 2x2 pixelated array with periodic boundary conditions mimicking the full NED; in this case, however, each pixel comprises 10-20 antennas per side. In this way, the cross-talk between contiguous pixels is accounted for in our simulations. We observe that, even though there are finite extent effects, the pixels work as designed, each responding at the respective wavelength of operation. This allows us to stress that realistic simulations of multifunctional NEDs need to be performed to verify the design functionality by taking into account finite extent and cross-talk effects.

A Cherenkov camera with integrated electronics based on the 'Smart Pixel' concept

International Nuclear Information System (INIS)

Bulian, Norbert; Hirsch, Thomas; Hofmann, Werner; Kihm, Thomas; Kohnle, Antje; Panter, Michael; Stein, Michael

2000-01-01

An option for the cameras of the HESS telescopes, the concept of a modular camera based on 'Smart Pixels' was developed. A Smart Pixel contains the photomultiplier, the high voltage supply for the photomultiplier, a dual-gain sample-and-hold circuit with a 14 bit dynamic range, a time-to-voltage converter, a trigger discriminator, trigger logic to detect a coincidence of X=1...7 neighboring pixels, and an analog ratemeter. The Smart Pixels plug into a common backplane which provides power, communicates trigger signals between neighboring pixels, and holds a digital control bus as well as an analog bus for multiplexed readout of pixel signals. The performance of the Smart Pixels has been studied using a 19-pixel test camera

High rate particle tracking and ultra-fast timing with a thin hybrid silicon pixel detector

Science.gov (United States)

Fiorini, M.; Aglieri Rinella, G.; Carassiti, V.; Ceccucci, A.; Cortina Gil, E.; Cotta Ramusino, A.; Dellacasa, G.; Garbolino, S.; Jarron, P.; Kaplon, J.; Kluge, A.; Marchetto, F.; Mapelli, A.; Martin, E.; Mazza, G.; Morel, M.; Noy, M.; Nuessle, G.; Perktold, L.; Petagna, P.; Petrucci, F.; Poltorak, K.; Riedler, P.; Rivetti, A.; Statera, M.; Velghe, B.

2013-08-01

The Gigatracker (GTK) is a hybrid silicon pixel detector designed for the NA62 experiment at CERN. The beam spectrometer, made of three GTK stations, has to sustain high and non-uniform particle rate (∼ 1 GHz in total) and measure momentum and angles of each beam track with a combined time resolution of 150 ps. In order to reduce multiple scattering and hadronic interactions of beam particles, the material budget of a single GTK station has been fixed to 0.5% X0. The expected fluence for 100 days of running is 2 ×1014 1 MeV neq /cm2, comparable to the one foreseen in the inner trackers of LHC detectors during 10 years of operation. To comply with these requirements, an efficient and very low-mass (< 0.15 %X0) cooling system is being constructed, using a novel microchannel cooling silicon plate. Two complementary read-out architectures have been produced as small-scale prototypes: one is based on a Time-over-Threshold circuit followed by a TDC shared by a group of pixels, while the other makes use of a constant-fraction discriminator followed by an on-pixel TDC. The read-out ASICs are produced in 130 nm IBM CMOS technology and will be thinned down to 100 μm or less. An overview of the Gigatracker detector system will be presented. Experimental results from laboratory and beam tests of prototype bump-bonded assemblies will be described as well. These results show a time resolution of about 170 ps for single hits from minimum ionizing particles, using 200 μm thick silicon sensors.

Study of plasma charging-induced white pixel defect increase in CMOS active pixel sensor

International Nuclear Information System (INIS)

Tokashiki, Ken; Bai, KeunHee; Baek, KyeHyun; Kim, Yongjin; Min, Gyungjin; Kang, Changjin; Cho, Hanku; Moon, Jootae

2007-01-01

Plasma process-induced 'white pixel defect' (WPD) of CMOS active pixel sensor (APS) is studied for Si3N4 spacer etch back process by using a magnetically enhanced reactive ion etching (MERIE) system. WPD preferably takes place at the wafer edge region when the magnetized plasma is applied to Si3N4 etch. Plasma charging analysis reveals that the plasma charge-up characteristic is well matching the edge-intensive WPD generation, rather than the UV radiation. Plasma charging on APS transfer gate might lead to a gate leakage, which could play a role in generation of signal noise or WPD. In this article the WPD generation mechanism will be discussed from plasma charging point of view

AGAPEROS Searches for microlensing in the LMC with the Pixel Method; 1, Data treatment and pixel light curves production

CERN Document Server

Melchior, A.-L.; Ansari, R.; Aubourg, E.; Baillon, P.; Bareyre, P.; Bauer, F.; Beaulieu, J.-Ph.; Bouquet, A.; Brehin, S.; Cavalier, F.; Char, S.; Couchot, F.; Coutures, C.; Ferlet, R.; Fernandez, J.; Gaucherel, C.; Giraud-Heraud, Y.; Glicenstein, J.-F.; Goldman, B.; Gondolo, P.; Gros, M.; Guibert, J.; Gry, C.; Hardin, D.; Kaplan, J.; de Kat, J.; Lachieze-Rey, M.; Laurent, B.; Lesquoy, E.; Magneville, Ch.; Mansoux, B.; Marquette, J.-B.; Maurice, E.; Milsztajn, A.; Moniez, M.; Moreau, O.; Moscoso, L.; Palanque-Delabrouille, N.; Perdereau, O.; Prevot, L.; Renault, C.; Queinnec, F.; Rich, J.; Spiro, M.; Vigroux, L.; Zylberajch, S.; Vidal-Madjar, A.; Magneville, Ch.

1999-01-01

The presence and abundance of MAssive Compact Halo Objects (MACHOs) towards the Large Magellanic Cloud (LMC) can be studied with microlensing searches. The 10 events detected by the EROS and MACHO groups suggest that objects with 0.5 Mo could fill 50% of the dark halo. This preferred mass is quite surprising, and increasing the presently small statistics is a crucial issue. Additional microlensing of stars too dim to be resolved in crowded fields should be detectable using the Pixel Method. We present here an application of this method to the EROS 91-92 data (one tenth of the whole existing data set). We emphasize the data treatment required for monitoring pixel fluxes. Geometric and photometric alignments are performed on each image. Seeing correction and error estimates are discussed. 3.6" x 3.6" super-pixel light curves, thus produced, are very stable over the 120 days time-span. Fluctuations at a level of 1.8% of the flux in blue and 1.3% in red are measured on the pixel light curves. This level of stabil...

Advanced information processing system: The Army fault tolerant architecture conceptual study. Volume 2: Army fault tolerant architecture design and analysis

Science.gov (United States)

Harper, R. E.; Alger, L. S.; Babikyan, C. A.; Butler, B. P.; Friend, S. A.; Ganska, R. J.; Lala, J. H.; Masotto, T. K.; Meyer, A. J.; Morton, D. P.

1992-01-01

Described here is the Army Fault Tolerant Architecture (AFTA) hardware architecture and components and the operating system. The architectural and operational theory of the AFTA Fault Tolerant Data Bus is discussed. The test and maintenance strategy developed for use in fielded AFTA installations is presented. An approach to be used in reducing the probability of AFTA failure due to common mode faults is described. Analytical models for AFTA performance, reliability, availability, life cycle cost, weight, power, and volume are developed. An approach is presented for using VHSIC Hardware Description Language (VHDL) to describe and design AFTA's developmental hardware. A plan is described for verifying and validating key AFTA concepts during the Dem/Val phase. Analytical models and partial mission requirements are used to generate AFTA configurations for the TF/TA/NOE and Ground Vehicle missions.

Human vision-based algorithm to hide defective pixels in LCDs

Science.gov (United States)

Kimpe, Tom; Coulier, Stefaan; Van Hoey, Gert

2006-02-01

Producing displays without pixel defects or repairing defective pixels is technically not possible at this moment. This paper presents a new approach to solve this problem: defects are made invisible for the user by using image processing algorithms based on characteristics of the human eye. The performance of this new algorithm has been evaluated using two different methods. First of all the theoretical response of the human eye was analyzed on a series of images and this before and after applying the defective pixel compensation algorithm. These results show that indeed it is possible to mask a defective pixel. A second method was to perform a psycho-visual test where users were asked whether or not a defective pixel could be perceived. The results of these user tests also confirm the value of the new algorithm. Our "defective pixel correction" algorithm can be implemented very efficiently and cost-effectively as pixel-dataprocessing algorithms inside the display in for instance an FPGA, a DSP or a microprocessor. The described techniques are also valid for both monochrome and color displays ranging from high-quality medical displays to consumer LCDTV applications.

Operational Experience with the ATLAS Pixel Detector at LHC

CERN Document Server

Keil, M

2013-01-01

The ATLAS Pixel Detector is the innermost detector of the ATLAS experiment at the Large Hadron Collider at CERN, providing high-resolution measurements of charged particle tracks in the high radiation environment close to the collision region. This capability is vital for the identification and measurement of proper decay times of long-lived particles such as b-hadrons, and thus crucial for the ATLAS physics program. The detector provides hermetic coverage with three cylindrical layers and three layers of forward and backward pixel detectors. It consists of approximately 80 million pixels that are individually read out via front-end chips bump-bonded to 1744 n-on-n silicon substrates. In this paper results from the successful operation of the Pixel Detector at the LHC will be presented, including calibration procedures, detector performance and measurements of radiation damage. The detector performance is excellent: more than 95% of the pixels are operational, noise occupancy and hit efficiency exceed the des...

Charge collection and absorption-limited x-ray sensitivity of pixellated x-ray detectors

International Nuclear Information System (INIS)

Kabir, M. Zahangir; Kasap, S.O.

2004-01-01

The charge collection and absorption-limited x-ray sensitivity of a direct conversion pixellated x-ray detector operating in the presence of deep trapping of charge carriers is calculated using the Shockley-Ramo theorem and the weighting potential of the individual pixel. The sensitivity of a pixellated x-ray detector is analyzed in terms of normalized parameters; (a) the normalized x-ray absorption depth (absorption depth/photoconductor thickness), (b) normalized pixel width (pixel size/thickness), and (c) normalized carrier schubwegs (schubweg/thickness). The charge collection and absorption-limited sensitivity of pixellated x-ray detectors mainly depends on the transport properties (mobility and lifetime) of the charges that move towards the pixel electrodes and the extent of dependence increases with decreasing normalized pixel width. The x-ray sensitivity of smaller pixels may be higher or lower than that of larger pixels depending on the rate of electron and hole trapping and the bias polarity. The sensitivity of pixellated detectors can be improved by ensuring that the carrier with the higher mobility-lifetime product is drifted towards the pixel electrodes

Results from the NA62 Gigatracker Prototype: A Low-Mass and sub-ns Time Resolution Silicon Pixel Detector

Science.gov (United States)

Fiorini, M.; Rinella, G. Aglieri; Carassiti, V.; Ceccucci, A.; Gil, E. Cortina; Ramusino, A. Cotta; Dellacasa, G.; Garbolino, S.; Jarron, P.; Kaplon, J.; Kluge, A.; Marchetto, F.; Mapelli, A.; Martin, E.; Mazza, G.; Morel, M.; Noy, M.; Nuessle, G.; Petagna, P.; Petrucci, F.; Perktold, L.; Riedler, P.; Rivetti, A.; Statera, M.; Velghe, B.

The Gigatracker (GTK) is a hybrid silicon pixel detector developed for NA62, the experiment aimed at studying ultra-rare kaon decays at the CERN SPS. Three GTK stations will provide precise momentum and angular measurements on every track of the high intensity NA62 hadron beam with a time-tagging resolution of 150 ps. Multiple scattering and hadronic interactions of beam particles in the GTK have to be minimized to keep background events at acceptable levels, hence the total material budget is fixed to 0.5% X0 per station. In addition the calculated fluence for 100 days of running is 2×1014 1 MeV neq/cm2, comparable to the one expected for the inner trackers of LHC detectors in 10 years of operation. These requirements pose challenges for the development of an efficient and low-mass cooling system, to be operated in vacuum, and on the thinning of read-out chips to 100 μm or less. The most challenging requirement is represented by the time resolution, which can be achieved by carefully compensating for the discriminator time-walk. For this purpose, two complementary read-out architectures have been designed and produced as small-scale prototypes: the first is based on the use of a Time-over-Threshold circuit followed by a TDC shared by a group of pixels, while the other uses a constant-fraction discriminator followed by an on-pixel TDC. The readout pixel ASICs are produced in 130 nm IBM CMOS technology and bump-bonded to 200 μm thick silicon sensors. The Gigatracker detector system is described with particular emphasis on recent experimental results obtained from laboratory and beam tests of prototype bump-bonded assemblies, which show a time resolution of less than 200 ps for single hits.

The Phase-2 ATLAS ITk Pixel Upgrade

CERN Document Server

Rossi, Leonardo Paolo; The ATLAS collaboration

2018-01-01

The upgrade of the ATLAS experiment for the operation at the High Luminosity Large Hadron Collider requires a new and more performant inner tracker, the ITk. The innermost part of this tracker will be built using silicon pixel detectors. This paper describes the ITk pixel project, which, after few years of design and test e ort, is now defined in detail.

Dense Iterative Contextual Pixel Classification using Kriging

DEFF Research Database (Denmark)

Ganz, Melanie; Loog, Marco; Brandt, Sami

2009-01-01

have been proposed to this end, e.g., iterative contextual pixel classification, iterated conditional modes, and other approaches related to Markov random fields. A problem of these methods, however, is their computational complexity, especially when dealing with high-resolution images in which......In medical applications, segmentation has become an ever more important task. One of the competitive schemes to perform such segmentation is by means of pixel classification. Simple pixel-based classification schemes can be improved by incorporating contextual label information. Various methods...... relatively long range interactions may play a role. We propose a new method based on Kriging that makes it possible to include such long range interactions, while keeping the computations manageable when dealing with large medical images....

Performance of active edge pixel sensors

Science.gov (United States)

Bomben, M.; Ducourthial, A.; Bagolini, A.; Boscardin, M.; Bosisio, L.; Calderini, G.; D'Eramo, L.; Giacomini, G.; Marchiori, G.; Zorzi, N.; Rummler, A.; Weingarten, J.

2017-05-01

To cope with the High Luminosity LHC harsh conditions, the ATLAS inner tracker has to be upgraded to meet requirements in terms of radiation hardness, pile up and geometrical acceptance. The active edge technology allows to reduce the insensitive area at the border of the sensor thanks to an ion etched trench which avoids the crystal damage produced by the standard mechanical dicing process. Thin planar n-on-p pixel sensors with active edge have been designed and produced by LPNHE and FBK foundry. Two detector module prototypes, consisting of pixel sensors connected to FE-I4B readout chips, have been tested with beams at CERN and DESY. In this paper the performance of these modules are reported. In particular the lateral extension of the detection volume, beyond the pixel region, is investigated and the results show high hit efficiency also at the detector edge, even in presence of guard rings.

Active Pixel Sensors: Are CCD's Dinosaurs?

Science.gov (United States)

Fossum, Eric R.

1993-01-01

Charge-coupled devices (CCD's) are presently the technology of choice for most imaging applications. In the 23 years since their invention in 1970, they have evolved to a sophisticated level of performance. However, as with all technologies, we can be certain that they will be supplanted someday. In this paper, the Active Pixel Sensor (APS) technology is explored as a possible successor to the CCD. An active pixel is defined as a detector array technology that has at least one active transistor within the pixel unit cell. The APS eliminates the need for nearly perfect charge transfer -- the Achilles' heel of CCDs. This perfect charge transfer makes CCD's radiation 'soft,' difficult to use under low light conditions, difficult to manufacture in large array sizes, difficult to integrate with on-chip electronics, difficult to use at low temperatures, difficult to use at high frame rates, and difficult to manufacture in non-silicon materials that extend wavelength response.

Bio-Inspired Asynchronous Pixel Event Tricolor Vision Sensor.

Science.gov (United States)

Lenero-Bardallo, Juan Antonio; Bryn, D H; Hafliger, Philipp

2014-06-01

This article investigates the potential of the first ever prototype of a vision sensor that combines tricolor stacked photo diodes with the bio-inspired asynchronous pixel event communication protocol known as Address Event Representation (AER). The stacked photo diodes are implemented in a 22 × 22 pixel array in a standard STM 90 nm CMOS process. Dynamic range is larger than 60 dB and pixels fill factor is 28%. The pixels employ either simple pulse frequency modulation (PFM) or a Time-to-First-Spike (TFS) mode. A heuristic linear combination of the chip's inherent pseudo colors serves to approximate RGB color representation. Furthermore, the sensor outputs can be processed to represent the radiation in the near infrared (NIR) band without employing external filters, and to color-encode direction of motion due to an asymmetry in the update rates of the different diode layers.

Deployment of the CMS Tracker AMC as Backend for the CMS Pixel Detector

CERN Document Server

AUTHOR|(CDS)2079000

2016-01-01

The silicon pixel detector of the CMS experiment at CERN will be replaced with an upgraded version at the beginning of 2017 with the new detector featuring an additional barrel- and end-cap layer resulting in an increased number of fully digital read-out links running at 400Mb/s. New versions of the PSI46 Read-Out Chip and Token Bit Manager have been developed to operate at higher rates and reduce data loss. Front-End Controller and Front-End Driver boards, based on the {\\textmu}TCA compatible CMS Tracker AMC, a variant of the FC7 card, are being developed using different mezzanines to host the optical links for the digital read-out and control system. An overview of the system architecture is presented, with details on the implementation, and first results obtained from test systems.

Quantification of brain tissue through incorporation of partial volume effects

Science.gov (United States)

Gage, Howard D.; Santago, Peter, II; Snyder, Wesley E.

1992-06-01

This research addresses the problem of automatically quantifying the various types of brain tissue, CSF, white matter, and gray matter, using T1-weighted magnetic resonance images. The method employs a statistical model of the noise and partial volume effect and fits the derived probability density function to that of the data. Following this fit, the optimal decision points can be found for the materials and thus they can be quantified. Emphasis is placed on repeatable results for which a confidence in the solution might be measured. Results are presented assuming a single Gaussian noise source and a uniform distribution of partial volume pixels for both simulated and actual data. Thus far results have been mixed, with no clear advantage being shown in taking into account partial volume effects. Due to the fitting problem being ill-conditioned, it is not yet clear whether these results are due to problems with the model or the method of solution.

PHOTOMETRIC STEREO SHAPE-AND-ALBEDO-FROM-SHADING FOR PIXEL-LEVEL RESOLUTION LUNAR SURFACE RECONSTRUCTION

Directory of Open Access Journals (Sweden)

W. C. Liu

2017-07-01

Full Text Available Shape and Albedo from Shading (SAfS techniques recover pixel-wise surface details based on the relationship between terrain slopes, illumination and imaging geometry, and the energy response (i.e., image intensity captured by the sensing system. Multiple images with different illumination geometries (i.e., photometric stereo can provide better SAfS surface reconstruction due to the increase in observations. Photometric stereo SAfS is suitable for detailed surface reconstruction of the Moon and other extra-terrestrial bodies due to the availability of photometric stereo and the less complex surface reflecting properties (i.e., albedo of the target bodies as compared to the Earth. Considering only one photometric stereo pair (i.e., two images, pixel-variant albedo is still a major obstacle to satisfactory reconstruction and it needs to be regulated by the SAfS algorithm. The illumination directional difference between the two images also becomes an important factor affecting the reconstruction quality. This paper presents a photometric stereo SAfS algorithm for pixel-level resolution lunar surface reconstruction. The algorithm includes a hierarchical optimization architecture for handling pixel-variant albedo and improving performance. With the use of Lunar Reconnaissance Orbiter Camera - Narrow Angle Camera (LROC NAC photometric stereo images, the reconstructed topography (i.e., the DEM is compared with the DEM produced independently by photogrammetric methods. This paper also addresses the effect of illumination directional difference in between one photometric stereo pair on the reconstruction quality of the proposed algorithm by both mathematical and experimental analysis. In this case, LROC NAC images under multiple illumination directions are utilized by the proposed algorithm for experimental comparison. The mathematical derivation suggests an illumination azimuthal difference of 90 degrees between two images is recommended to achieve

Precision tracking with a single gaseous pixel detector

NARCIS (Netherlands)

Tsigaridas, S.; van Bakel, N.; Bilevych, Y.; Gromov, V.; Hartjes, F.; Hessey, N.P.; de Jong, P.; Kluit, R.

2015-01-01

The importance of micro-pattern gaseous detectors has grown over the past few years after successful usage in a large number of applications in physics experiments and medicine. We develop gaseous pixel detectors using micromegas-based amplification structures on top of CMOS pixel readout chips.

Centi-pixel accurate real-time inverse distortion correction

CSIR Research Space (South Africa)

De Villiers, Johan P

2008-11-01

Full Text Available Inverse distortion is used to create an undistorted image from a distorted image. For each pixel in the undistorted image it is required to determine which pixel in the distorted image should be used. However the process of characterizing a lens...

Characterization of pixel sensor designed in 180 nm SOI CMOS technology

Science.gov (United States)

Benka, T.; Havranek, M.; Hejtmanek, M.; Jakovenko, J.; Janoska, Z.; Marcisovska, M.; Marcisovsky, M.; Neue, G.; Tomasek, L.; Vrba, V.

2018-01-01

A new type of X-ray imaging Monolithic Active Pixel Sensor (MAPS), X-CHIP-02, was developed using a 180 nm deep submicron Silicon On Insulator (SOI) CMOS commercial technology. Two pixel matrices were integrated into the prototype chip, which differ by the pixel pitch of 50 μm and 100 μm. The X-CHIP-02 contains several test structures, which are useful for characterization of individual blocks. The sensitive part of the pixel integrated in the handle wafer is one of the key structures designed for testing. The purpose of this structure is to determine the capacitance of the sensitive part (diode in the MAPS pixel). The measured capacitance is 2.9 fF for 50 μm pixel pitch and 4.8 fF for 100 μm pixel pitch at -100 V (default operational voltage). This structure was used to measure the IV characteristics of the sensitive diode. In this work, we report on a circuit designed for precise determination of sensor capacitance and IV characteristics of both pixel types with respect to X-ray irradiation. The motivation for measurement of the sensor capacitance was its importance for the design of front-end amplifier circuits. The design of pixel elements, as well as circuit simulation and laboratory measurement techniques are described. The experimental results are of great importance for further development of MAPS sensors in this technology.

PIXEL ANALYSIS OF PHOTOSPHERIC SPECTRAL DATA. I. PLASMA DYNAMICS

Energy Technology Data Exchange (ETDEWEB)

Rasca, Anthony P.; Chen, James [Plasma Physics Division, U.S. Naval Research Laboratory, Washington, DC 20375 (United States); Pevtsov, Alexei A., E-mail: anthony.rasca.ctr@nrl.navy.mil [National Solar Observatory, Sunspot, NM 88349 (United States)

2016-11-20

Recent observations of the photosphere using high spatial and temporal resolution show small dynamic features at or below the current resolving limits. A new pixel dynamics method has been developed to analyze spectral profiles and quantify changes in line displacement, width, asymmetry, and peakedness of photospheric absorption lines. The algorithm evaluates variations of line profile properties in each pixel and determines the statistics of such fluctuations averaged over all pixels in a given region. The method has been used to derive statistical characteristics of pixel fluctuations in observed quiet-Sun regions, an active region with no eruption, and an active region with an ongoing eruption. Using Stokes I images from the Vector Spectromagnetograph (VSM) of the Synoptic Optical Long-term Investigations of the Sun (SOLIS) telescope on 2012 March 13, variations in line width and peakedness of Fe i 6301.5 Å are shown to have a distinct spatial and temporal relationship with an M7.9 X-ray flare in NOAA 11429. This relationship is observed as stationary and contiguous patches of pixels adjacent to a sunspot exhibiting intense flattening in the line profile and line-center displacement as the X-ray flare approaches peak intensity, which is not present in area scans of the non-eruptive active region. The analysis of pixel dynamics allows one to extract quantitative information on differences in plasma dynamics on sub-pixel scales in these photospheric regions. The analysis can be extended to include the Stokes parameters and study signatures of vector components of magnetic fields and coupled plasma properties.

CMOS Active Pixel Sensor Technology and Reliability Characterization Methodology

Science.gov (United States)

Chen, Yuan; Guertin, Steven M.; Pain, Bedabrata; Kayaii, Sammy

2006-01-01

This paper describes the technology, design features and reliability characterization methodology of a CMOS Active Pixel Sensor. Both overall chip reliability and pixel reliability are projected for the imagers.

Lagrange constraint neural networks for massive pixel parallel image demixing

Science.gov (United States)

Szu, Harold H.; Hsu, Charles C.

2002-03-01

We have shown that the remote sensing optical imaging to achieve detailed sub-pixel decomposition is a unique application of blind source separation (BSS) that is truly linear of far away weak signal, instantaneous speed of light without delay, and along the line of sight without multiple paths. In early papers, we have presented a direct application of statistical mechanical de-mixing method called Lagrange Constraint Neural Network (LCNN). While the BSAO algorithm (using a posteriori MaxEnt ANN and neighborhood pixel average) is not acceptable for remote sensing, a mirror symmetric LCNN approach is all right assuming a priori MaxEnt for unknown sources to be averaged over the source statistics (not neighborhood pixel data) in a pixel-by-pixel independent fashion. LCNN reduces the computation complexity, save a great number of memory devices, and cut the cost of implementation. The Landsat system is designed to measure the radiation to deduce surface conditions and materials. For any given material, the amount of emitted and reflected radiation varies by the wavelength. In practice, a single pixel of a Landsat image has seven channels receiving 0.1 to 12 microns of radiation from the ground within a 20x20 meter footprint containing a variety of radiation materials. A-priori LCNN algorithm provides the spatial-temporal variation of mixture that is hardly de-mixable by other a-posteriori BSS or ICA methods. We have already compared the Landsat remote sensing using both methods in WCCI 2002 Hawaii. Unfortunately the absolute benchmark is not possible because of lacking of the ground truth. We will arbitrarily mix two incoherent sampled images as the ground truth. However, the constant total probability of co-located sources within the pixel footprint is necessary for the remote sensing constraint (since on a clear day the total reflecting energy is constant in neighborhood receiving pixel sensors), we have to normalized two image pixel-by-pixel as well. Then, the

X-ray imaging with photon counting hybrid semiconductor pixel detectors

CERN Document Server

Manolopoulos, S; Campbell, M; Snoeys, W; Heijne, Erik H M; Pernigotti, E; Raine, C; Smith, K; Watt, J; O'Shea, V; Ludwig, J; Schwarz, C

1999-01-01

Semiconductor pixel detectors, originally developed for particle physics experiments, have been studied as X-ray imaging devices. The performance of devices using the OMEGA 3 read-out chip bump-bonded to pixellated silicon semiconductor detectors is characterised in terms of their signal-to-noise ratio when exposed to 60 kVp X-rays. Although parts of the devices achieve values of this ratio compatible with the noise being photon statistics limited, this is not found to hold for the whole pixel matrix, resulting in the global signal-to-noise ratio being compromised. First results are presented of X-ray images taken with a gallium arsenide pixel detector bump-bonded to a new read-out chip, (MEDIPIX), which is a single photon counting read-out chip incorporating a 15-bit counter in every pixel. (author)

The effect of split pixel HDR image sensor technology on MTF measurements

Science.gov (United States)

Deegan, Brian M.

2014-03-01

Split-pixel HDR sensor technology is particularly advantageous in automotive applications, because the images are captured simultaneously rather than sequentially, thereby reducing motion blur. However, split pixel technology introduces artifacts in MTF measurement. To achieve a HDR image, raw images are captured from both large and small sub-pixels, and combined to make the HDR output. In some cases, a large sub-pixel is used for long exposure captures, and a small sub-pixel for short exposures, to extend the dynamic range. The relative size of the photosensitive area of the pixel (fill factor) plays a very significant role in the output MTF measurement. Given an identical scene, the MTF will be significantly different, depending on whether you use the large or small sub-pixels i.e. a smaller fill factor (e.g. in the short exposure sub-pixel) will result in higher MTF scores, but significantly greater aliasing. Simulations of split-pixel sensors revealed that, when raw images from both sub-pixels are combined, there is a significant difference in rising edge (i.e. black-to-white transition) and falling edge (white-to-black) reproduction. Experimental results showed a difference of ~50% in measured MTF50 between the falling and rising edges of a slanted edge test chart.

Improvement of Shade Resilience in Photovoltaic Modules Using Buck Converters in a Smart Module Architecture

NARCIS (Netherlands)

Golroodbari, S. Mirbagheri; Waal, Arjen. de; Sark, Wilfried van

2018-01-01

Partial shading has a nonlinear effect on the performance of photovoltaic (PV) modules. Different methods of optimizing energy harvesting under partial shading conditions have been suggested to mitigate this issue. In this paper, a smart PV module architecture is proposed for improvement of shade

Probabilistic Characterization of Partial Volume Effects in Imaging of Rectangular Objects

Energy Technology Data Exchange (ETDEWEB)

Bulaevskaya, V. [Lawrence Livermore National Lab. (LLNL), Livermore, CA (United States)

2015-05-06

In imaging, a partial volume effect refers to the problem that arises when the system resolution is low relative to the size of the object being imaged [1, 2]. In this setting, it is likely that most voxels occupied by the object are only partially covered, and that the fraction covered in each voxel is low. This makes the problem of object detection and image segmentation very difficult because the algorithms designed for these purposes rely on pixel summary statistics. If the area covered by the object is very low in relatively many of the total number of the voxels the object occupies, these summary statistics may not reach the thresholds required to detect this object. It is thus important to understand the extent of partial volume effect for a given object size and resolution. This technical report focuses on rectangular objects and derives the probability distributions for three quantities for such objects: 1) the number of fully covered voxels, 2) the number of partially covered voxels, and 3) the fractions of the total volume covered in the partially covered voxels. The derivations are first shown for 2-D settings and are then extended to 3-D settings.

All-passive pixel super-resolution of time-stretch imaging

Science.gov (United States)

Chan, Antony C. S.; Ng, Ho-Cheung; Bogaraju, Sharat C. V.; So, Hayden K. H.; Lam, Edmund Y.; Tsia, Kevin K.

2017-03-01

Based on image encoding in a serial-temporal format, optical time-stretch imaging entails a stringent requirement of state-of-the-art fast data acquisition unit in order to preserve high image resolution at an ultrahigh frame rate — hampering the widespread utilities of such technology. Here, we propose a pixel super-resolution (pixel-SR) technique tailored for time-stretch imaging that preserves pixel resolution at a relaxed sampling rate. It harnesses the subpixel shifts between image frames inherently introduced by asynchronous digital sampling of the continuous time-stretch imaging process. Precise pixel registration is thus accomplished without any active opto-mechanical subpixel-shift control or other additional hardware. Here, we present the experimental pixel-SR image reconstruction pipeline that restores high-resolution time-stretch images of microparticles and biological cells (phytoplankton) at a relaxed sampling rate (≈2-5 GSa/s)—more than four times lower than the originally required readout rate (20 GSa/s) — is thus effective for high-throughput label-free, morphology-based cellular classification down to single-cell precision. Upon integration with the high-throughput image processing technology, this pixel-SR time-stretch imaging technique represents a cost-effective and practical solution for large scale cell-based phenotypic screening in biomedical diagnosis and machine vision for quality control in manufacturing.

The simulation of charge sharing in semiconductor X-ray pixel detectors

CERN Document Server

Mathieson, K; O'Shea, V; Passmore, M S; Rahman, M; Smith, K M; Watt, J; Whitehill, C

2002-01-01

Two simulation packages were used to model the sharing of charge, due to the scattering and diffusion of carriers, between adjacent pixel elements in semiconductors X-ray detectors. The X-ray interaction and the consequent multiple scattering was modelled with the aid of the Monte Carlo package, MCNP. The resultant deposited charge distribution was then used to create the charge cloud profile in the finite element semiconductor simulation code MEDICI. The analysis of the current pulses induced on pixel electrodes for varying photon energies was performed for a GaAs pixel detector. For a pixel pitch of 25 mu m, the charge lost to a neighbouring pixel was observed to be constant, at 0.6%, through the energies simulated. Ultimately, a fundamental limit on the pixel element size for imaging and spectroscopic devices may be set due to these key physical principles.

Pixel-based meshfree modelling of skeletal muscles

OpenAIRE

Chen, Jiun-Shyan; Basava, Ramya Rao; Zhang, Yantao; Csapo, Robert; Malis, Vadim; Sinha, Usha; Hodgson, John; Sinha, Shantanu

2015-01-01

This paper introduces the meshfree Reproducing Kernel Particle Method (RKPM) for 3D image-based modeling of skeletal muscles. This approach allows for construction of simulation model based on pixel data obtained from medical images. The material properties and muscle fiber direction obtained from Diffusion Tensor Imaging (DTI) are input at each pixel point. The reproducing kernel (RK) approximation allows a representation of material heterogeneity with smooth transition. A ...

Pixel Detectors for Particle Physics and Imaging Applications

CERN Document Server

Wermes, N

2003-01-01

Semiconductor pixel detectors offer features for the detection of radiation which are interesting for particle physics detectors as well as for imaging e.g. in biomedical applications (radiography, autoradiography, protein crystallography) or in Xray astronomy. At the present time hybrid pixel detectors are technologically mastered to a large extent and large scale particle detectors are being built. Although the physical requirements are often quite different, imaging applications are emerging and interesting prototype results are available. Monolithic detectors, however, offer interesting features for both fields in future applications. The state of development of hybrid and monolithic pixel detectors, excluding CCDs, and their different suitability for particle detection and imaging, is reviewed.

32 x 16 CMOS smart pixel array for optical interconnects

Science.gov (United States)

Kim, Jongwoo; Guilfoyle, Peter S.; Stone, Richard V.; Hessenbruch, John M.; Choquette, Kent D.; Kiamilev, Fouad E.

2000-05-01

Free space optical interconnects can increase throughput capacities and eliminate much of the energy consumption required for `all electronic' systems. High speed optical interconnects can be achieved by integrating optoelectronic devices with conventional electronics. Smart pixel arrays have been developed which use optical interconnects. An individual smart pixel cell is composed of a vertical cavity surface emitting laser (VCSEL), a photodetector, an optical receiver, a laser driver, and digital logic circuitry. Oxide-confined VCSELs are being developed to operate at 850 nm with a threshold current of approximately 1 mA. Multiple quantum well photodetectors are being fabricated from AlGaAs for use with the 850 nm VCSELs. The VCSELs and photodetectors are being integrated with complementary metal oxide semiconductor (CMOS) circuitry using flip-chip bonding. CMOS circuitry is being integrated with a 32 X 16 smart pixel array. The 512 smart pixels are serially linked. Thus, an entire data stream may be clocked through the chip and output electrically by the last pixel. Electrical testing is being performed on the CMOS smart pixel array. Using an on-chip pseudo random number generator, a digital data sequence was cycled through the chip verifying operation of the digital circuitry. Although, the prototype chip was fabricated in 1.2 micrometers technology, simulations have demonstrated that the array can operate at 1 Gb/s per pixel using 0.5 micrometers technology.

CMOS Active Pixel Sensor Star Tracker with Regional Electronic Shutter

Science.gov (United States)

Yadid-Pecht, Orly; Pain, Bedabrata; Staller, Craig; Clark, Christopher; Fossum, Eric

1996-01-01

The guidance system in a spacecraft determines spacecraft attitude by matching an observed star field to a star catalog....An APS(active pixel sensor)-based system can reduce mass and power consumption and radiation effects compared to a CCD(charge-coupled device)-based system...This paper reports an APS (active pixel sensor) with locally variable times, achieved through individual pixel reset (IPR).

Characterization of the CMS Pixel Detectors

CERN Document Server

Gu, Weihua

2002-01-01

In 2005 the Large Hadron Collider (LHC) will start the pp collisions at a high luminosity and at a center of mass energy of 14 TeV. The primary goal of the experimental programme is the search of the Higgs boson(s) and the supersymmetric particles. The programme is also proposed to detect a range of diverse signatures in order to provide guidance for future physics. The pixel detector system makes up the innermost part of the CMS experiment, which is one of the two general purpose detectors at the LHC. The main tasks of the system are vertex detection and flavor tagging. The high luminosity and the high particle multiplicity as well as the small bunch spacing at the LHC impose great challenges on the pixel detectors: radiation hardness of sensors and electronics, fast signal processing and a high granularity are the essential requirements. This thesis concentrates on the study of the suitability of two test stands, which are implemented to characterize the CMS pixel detectors: one is con-cerned with test puls...

Status and future of the ATLAS Pixel Detector at the LHC

International Nuclear Information System (INIS)

Rozanov, Alexandre

2013-01-01

The ATLAS Pixel Detector is the innermost detector of the ATLAS experiment at the Large Hadron Collider at CERN. The detector provides hermetic coverage with three cylindrical layers and three layers of disks in each forward end-cap. It consists of approximately 80 million pixels that are individually read out via chips bump-bonded to 1744 n-on-n silicon substrates. Intensive calibration, tuning, timing optimization and monitoring resulted in the successful five years of operation with good detector performance. The record breaking instantaneous luminosities of 7.7×10 33 cm −2 s −1 recently surpassed at the LHC generated a rapidly increasing particle fluence in the ATLAS Pixel Detector. As the radiation dose accumulated, the first effects of radiation damage became observable in the silicon sensors as an increase in the silicon leakage current and the change of the voltage required to fully deplete the sensor. A fourth pixel layer at a radius of 3.3 cm will be added during the long shutdown (2013–2014) together with the replacement of pixel services. A letter of intent was submitted for a completely new Pixel Detector after 2023, capable to take data with extremely high leveled luminosities of 5×10 34 cm −2 s −1 at the high luminosity LHC. -- Highlights: •The ATLAS Pixel Detector provides hermetic coverage with three layers with 80 million pixels. •Calibration, tuning, timing optimization and monitoring resulted in the successful five years of operation with good detector performance. •First effects of radiation damage became observable in the silicon sensors. •A fourth pixel layer at a radius of 3.3 cm will be added during the long shutdown (2013–2014). •Replacement of pixel services in 2013–2014. •A letter of intent was submitted for new Pixel Detector after 2023 for high luminosity LHC

ALICE Silicon Pixel Detector

CERN Multimedia

Manzari, V

2013-01-01

The Silicon Pixel Detector (SPD) forms the innermost two layers of the 6-layer barrel Inner Tracking System (ITS). The SPD plays a key role in the determination of the position of the primary collision and in the reconstruction of the secondary vertices from particle decays.

Adaptive PVD Steganography Using Horizontal, Vertical, and Diagonal Edges in Six-Pixel Blocks

Directory of Open Access Journals (Sweden)

Anita Pradhan

2017-01-01

Full Text Available The traditional pixel value differencing (PVD steganographical schemes are easily detected by pixel difference histogram (PDH analysis. This problem could be addressed by adding two tricks: (i utilizing horizontal, vertical, and diagonal edges and (ii using adaptive quantization ranges. This paper presents an adaptive PVD technique using 6-pixel blocks. There are two variants. The proposed adaptive PVD for 2×3-pixel blocks is known as variant 1, and the proposed adaptive PVD for 3×2-pixel blocks is known as variant 2. For every block in variant 1, the four corner pixels are used to hide data bits using the middle column pixels for detecting the horizontal and diagonal edges. Similarly, for every block in variant 2, the four corner pixels are used to hide data bits using the middle row pixels for detecting the vertical and diagonal edges. The quantization ranges are adaptive and are calculated using the correlation of the two middle column/row pixels with the four corner pixels. The technique performs better as compared to the existing adaptive PVD techniques by possessing higher hiding capacity and lesser distortion. Furthermore, it has been proven that the PDH steganalysis and RS steganalysis cannot detect this proposed technique.

From green architecture to architectural green

DEFF Research Database (Denmark)

Earon, Ofri

2011-01-01

that describes the architectural exclusivity of this particular architecture genre. The adjective green expresses architectural qualities differentiating green architecture from none-green architecture. Currently, adding trees and vegetation to the building’s facade is the main architectural characteristics...... they have overshadowed the architectural potential of green architecture. The paper questions how a green space should perform, look like and function. Two examples are chosen to demonstrate thorough integrations between green and space. The examples are public buildings categorized as pavilions. One......The paper investigates the topic of green architecture from an architectural point of view and not an energy point of view. The purpose of the paper is to establish a debate about the architectural language and spatial characteristics of green architecture. In this light, green becomes an adjective...

Electron imaging with Medipix2 hybrid pixel detector

CERN Document Server

McMullan, G; Chen, S; Henderson, R; Llopart, X; Summerfield, C; Tlustos, L; Faruqi, A R

2007-01-01

The electron imaging performance of Medipix2 is described. Medipix2 is a hybrid pixel detector composed of two layers. It has a sensor layer and a layer of readout electronics, in which each 55 μm×55 μm pixel has upper and lower energy discrimination and MHz rate counting. The sensor layer consists of a 300 μm slab of pixellated monolithic silicon and this is bonded to the readout chip. Experimental measurement of the detective quantum efficiency, DQE(0) at 120 keV shows that it can reach 85% independent of electron exposure, since the detector has zero noise, and the DQE(Nyquist) can reach 35% of that expected for a perfect detector (4/π2). Experimental measurement of the modulation transfer function (MTF) at Nyquist resolution for 120 keV electrons using a 60 keV lower energy threshold, yields a value that is 50% of that expected for a perfect detector (2/π). Finally, Monte Carlo simulations of electron tracks and energy deposited in adjacent pixels have been performed and used to calculate expected v...

Rework of flip chip bonded radiation pixel detectors

International Nuclear Information System (INIS)

Vaehaenen, S.; Heikkinen, H.; Pohjonen, H.; Salonen, J.; Savolainen-Pulli, S.

2008-01-01

In this paper, some practical aspects of reworking flip chip hybridized pixel detectors are discussed. As flip chip technology has been advancing in terms of placement accuracy and reliability, large-area hybrid pixel detectors have been developed. The area requirements are usually fulfilled by placing several readout chips (ROCs) on single sensor chip. However, as the number of ROCs increases, the probability of failure in the hybridization process and the ROC operation also increases. Because high accuracy flip chip bonding takes time, a significant part of the price of a pixel detector comes from the flip chip assembly process itself. As large-area detector substrates are expensive, and many flip chip placements are required, the price of an assembled detector can become very high. In a typical case, there is just one bad ROC (out of several) on a faulty detector to be replaced. Considering the high price of pixel detectors and the fact that reworking faulty ROCs does not take much longer than the original placement, it is worthwhile to investigate the feasibility of a rework process

Rework of flip chip bonded radiation pixel detectors

Energy Technology Data Exchange (ETDEWEB)

Vaehaenen, S. [VTT MEMS and Micropackaging, Espoo 02150 (Finland)], E-mail: sami.vahanen@vtt.fi; Heikkinen, H.; Pohjonen, H.; Salonen, J.; Savolainen-Pulli, S. [VTT MEMS and Micropackaging, Espoo 02150 (Finland)

2008-06-11

In this paper, some practical aspects of reworking flip chip hybridized pixel detectors are discussed. As flip chip technology has been advancing in terms of placement accuracy and reliability, large-area hybrid pixel detectors have been developed. The area requirements are usually fulfilled by placing several readout chips (ROCs) on single sensor chip. However, as the number of ROCs increases, the probability of failure in the hybridization process and the ROC operation also increases. Because high accuracy flip chip bonding takes time, a significant part of the price of a pixel detector comes from the flip chip assembly process itself. As large-area detector substrates are expensive, and many flip chip placements are required, the price of an assembled detector can become very high. In a typical case, there is just one bad ROC (out of several) on a faulty detector to be replaced. Considering the high price of pixel detectors and the fact that reworking faulty ROCs does not take much longer than the original placement, it is worthwhile to investigate the feasibility of a rework process.

Performance of the CMS Phase 1 Pixel Detector

CERN Document Server

Akgun, Bora

2018-01-01

It is anticipated that the LHC accelerator will reach and exceed the luminosity of L = 2$\\times$10$^{34}$cm$^{-2}$s$^{-1}$ during the LHC Run 2 period until 2023. At this higher luminosity and increased hit occupancies the CMS phase-0 pixel detector would have been subjected to severe dead time and inefficiencies introduced by limited buffers in the analog read-out chip and effects of radiation damage in the sensors. Therefore a new pixel detector has been built and replaced the phase-0 detector in the 2016/17 LHC extended year-end technical stop. The CMS phase-1 pixel detector features four central barrel layers and three end-cap disks in forward and backward direction for robust tracking performance, and a significantly reduced overall material budget including new cooling and powering schemes. The design of the new front-end readout chip comprises larger data buffers, an increased transmission bandwidth, and low-threshold comparators. These improvements allow the new pixel detector to sustain and improve t...

HST/WFC3 Characteristics: gain, post-flash stability, UVIS low-sensitivity pixels, persistence, IR flats and bad pixel table

Science.gov (United States)

Gunning, Heather C.; Baggett, Sylvia; Gosmeyer, Catherine M.; Long, Knox S.; Ryan, Russell E.; MacKenty, John W.; Durbin, Meredith

2015-08-01

The Wide Field Camera 3 (WFC3) is a fourth-generation imaging instrument on the Hubble Space Telescope (HST). Installed in May 2009, WFC3 is comprised of two observational channels covering wavelengths from UV/Visible (UVIS) to infrared (IR); both have been performing well on-orbit. We discuss the gain stability of both WFC3 channel detectors from ground testing through present day. For UVIS, we detail a low-sensitivity pixel population that evolves during the time between anneals, but is largely reset by the annealing procedure. We characterize the post-flash LED lamp stability, used and recommended to mitigate CTE effects for observations with less than 12e-/pixel backgrounds. We present mitigation options for IR persistence during and after observations. Finally, we give an overview on the construction of the IR flats and provide updates on the bad pixel table.

Integration of the CMS Phase 1 Pixel Detector

CERN Document Server

Kornmayer, Andreas

2018-01-01

During the extended year-end technical stop 2016/17 the CMS Pixel Detector has been replaced. The new Phase 1 Pixel Detector is designed for a luminosity that could exceed $\\text{L} = 2x10^{34} cm^{−2}s^{−1}$. With one additional layer in the barrel and the forward region of the new detector, combined with the higher hit rates as the LHC luminosity increases, these conditions called for an upgrade of the data acquisition system, which was realised based on the $\\mu$TCA standard. This contribution focuses on the experiences with integration of the new detector readout and control system and reports on the operational performance of the CMS Pixel detector.

Program Execution on Reconfigurable Multicore Architectures

Directory of Open Access Journals (Sweden)

Sanjiva Prasad

2016-06-01

Full Text Available Based on the two observations that diverse applications perform better on different multicore architectures, and that different phases of an application may have vastly different resource requirements, Pal et al. proposed a novel reconfigurable hardware approach for executing multithreaded programs. Instead of mapping a concurrent program to a fixed architecture, the architecture adaptively reconfigures itself to meet the application's concurrency and communication requirements, yielding significant improvements in performance. Based on our earlier abstract operational framework for multicore execution with hierarchical memory structures, we describe execution of multithreaded programs on reconfigurable architectures that support a variety of clustered configurations. Such reconfiguration may not preserve the semantics of programs due to the possible introduction of race conditions arising from concurrent accesses to shared memory by threads running on the different cores. We present an intuitive partial ordering notion on the cluster configurations, and show that the semantics of multithreaded programs is always preserved for reconfigurations "upward" in that ordering, whereas semantics preservation for arbitrary reconfigurations can be guaranteed for well-synchronised programs. We further show that a simple approximate notion of efficiency of execution on the different configurations can be obtained using the notion of amortised bisimulations, and extend it to dynamic reconfiguration.

Qualification measurements of the voltage supply system as well as conceptionation of a state machine for the detector control of the ATLAS pixel detector; Qualifizierungsmessungen des Spannungsversorgungssystems sowie Konzeptionierung einer Zustandsmaschine fuer die Detektorkontrolle des ATLAS-Pixeldetektors

Energy Technology Data Exchange (ETDEWEB)

Schultes, Joachim

2007-02-15

The supply system and the control system of the ATLAS pixel detector represent important building blocks of the pixel detector. Corresponding studies of the supply system, which were performed within a comprehensive test system, the so-called system test, with nearly all final components and the effects on the pixel detector are object of this thesis. A further point of this thesis is the coordination and further development of the detector-control-system software under regardment of the different partial systems. A main topic represents thereby the conceptionation of the required state machine as interface for the users and the connection to the data acquisition system.

Irradiation and beam tests qualification for ATLAS IBL Pixel Modules

International Nuclear Information System (INIS)

Rubinskiy, Igor

2013-01-01

The upgrade for the ATLAS detector will have different steps towards HL-LHC. The first upgrade for the Pixel Detector will consist in the construction of a new pixel layer which will be installed during the first shutdown of the LHC machine (foreseen for 2013–2014). The new detector, called Insertable B-Layer (IBL), will be inserted between the existing Pixel Detector and a new (smaller radius) beam-pipe at a radius of 33 mm. The IBL will require the development of several new technologies to cope with the increase in the radiation damage and the pixel occupancy and also to improve the physics performance, which will be achieved by reduction of the pixel size and of the material budget. Two different promising silicon sensor technologies (Planar n-in-n and 3D) are currently under investigation for the Pixel Detector. An overview of the sensor technologies' qualification with particular emphasis on irradiation and beam tests is presented. -- Highlights: ► The ATLAS inner tracker will be extended with a so called Insertable B-Layer (IBL). ► The IBL modules are required to withstand irradiation up to 5×10 15 n eq /cm 2 . ► Two types of silicon pixel detector technologies (Planar and 3D) were tested in beam. ► The irradiated sensor efficiency exceeds 97% both with and without magnetic field. ► The leakage current, power dissipation, module active area ratio requirements are met.

A pixelated x-ray detector for diffraction imaging at next-generation high-rate FEL sources

Science.gov (United States)

Lodola, L.; Ratti, L.; Comotti, D.; Fabris, L.; Grassi, M.; Malcovati, P.; Manghisoni, M.; Re, V.; Traversi, G.; Vacchi, C.; Batignani, G.; Bettarini, S.; Forti, F.; Casarosa, G.; Morsani, F.; Paladino, A.; Paoloni, E.; Rizzo, G.; Benkechkache, M. A.; Dalla Betta, G.-F.; Mendicino, R.; Pancheri, L.; Verzellesi, G.; Xu, H.

2017-08-01

The PixFEL collaboration has developed the building blocks for an X-ray imager to be used in applications at FELs. In particular, slim edge pixel detectors with high detection efficiency over a broad energy range, from 1 to 12 keV, have been developed. Moreover, a multichannel readout chip, called PFM2 (PixFEL front-end Matrix 2) and consisting of 32 × 32 cells, has been designed and fabricated in a 65 nm CMOS technology. The pixel pitch is 110 μm, the overall area is around 16 mm2. In the chip, different solutions have been implemented for the readout channel, which includes a charge sensitive amplifier (CSA) with dynamic signal compression, a time-variant shaper and an A-to-D converter with a 10 bit resolution. The CSA can be configured in four different gain modes, so as to comply with photon energies in the 1 to 10 keV range. The paper will describe in detail the channel architecture and present the results from the characterization of PFM2. It will discuss the design of a new version of the chip, called PFM3, suitable for post-processing with peripheral, under-pad through silicon vias (TSVs), which are needed to develop four-side buttable chips and cover large surfaces with minimum inactive area.

Partially slotted crystals for a high-resolution γ-camera based on a position sensitive photomultiplier

International Nuclear Information System (INIS)

Giokaris, N.; Loudos, G.; Maintas, D.; Karabarbounis, A.; Lembesi, M.; Spanoudaki, V.; Stiliaris, E.; Boukis, S.; Gektin, A.; Pedash, V.; Gayshan, V.

2005-01-01

Partially slotted crystals have been designed and constructed and have been used to evaluate the performance with respect to the spatial resolution of a γ-camera based on a position-sensitive photomultiplier. It is shown that the resolution obtained with such a crystal is only slightly worse than the one obtained with a fully pixelized one whose cost, however, is much higher

Design Considerations for Area-Constrained In-Pixel Photon Counting in Medipix3

CERN Document Server

Wong, W; Campbell, M; Heijne, E H M; Llopart, X; Tlustos, L

2008-01-01

Hybrid pixel detectors process impinging photons using front-end electronics electrically connected to a segmented sensor via solder bumps. This allows for complex in-pixel processing while maintaining 100% fill factor. Medipix3 is a single photon processing chip whose 55 μm x 55 μm pixels contain analog charge-processing circuits, inter-pixel routing, and digital blocks. While a standard digital design flow would use logic gates from a standard cell library, the integration of multiple functions and configurations within the compact area of the Medipix3 pixel requires a full-custom manual layout. This work describes the various area-saving design strategies which were employed to optimize the use of available space in the digital section of the Medipix3 pixel.

Operational Experience with the ATLAS Pixel Detector at the LHC

CERN Document Server

Keil, M; The ATLAS collaboration

2012-01-01

The ATLAS Pixel Detector is the innermost detector of the ATLAS experiment at the Large Hadron Collider at CERN, providing high-resolution measurements of charged particle tracks in the high radiation environment close to the collision region. This capability is vital for the identification and measurement of proper decay times of long-lived particles such as b-hadrons, and thus vital for the ATLAS physics program. The detector provides hermetic coverage with three cylindrical layers and three layers of forward and backward pixel detectors. It consists of approximately 80 million pixels that are individually read out via chips bump-bonded to 1744 n-in-n silicon substrates. In this talk, results from the successful operation of the Pixel Detector at the LHC and its status after three years of operation will be presented, including calibration procedures, timing optimization and detector performance. The detector performance is excellent: ~96 % of the pixels are operational, noise occupancy and hit efficiency e...

Operational Experience with the ATLAS Pixel Detector at the LHC

CERN Document Server

Keil, M; The ATLAS collaboration

2011-01-01

The ATLAS Pixel Detector is the innermost detector of the ATLAS experiment at the Large Hadron Collider at CERN, providing high-resolution measurements of charged particle tracks in the high radiation environment close to the collision region. This capability is vital for the identification and measurement of proper decay times of long-lived particles such as b-hadrons, and thus vital for the ATLAS physics program. The detector provides hermetic coverage with three cylindrical layers and three layers of forward and backward pixel detectors. It consists of approximately 80 million pixels that are individually read out via chips bump-bonded to 1744 n-in-n silicon substrates. In this talk, results from the successful operation of the Pixel Detector at the LHC will be presented, including monitoring, calibration procedures, timing optimization and detector performance. The detector performance is excellent: 97,5% of the pixels are operational, noise occupancy and hit efficiency exceed the design specification, an...

Operational experience with the ATLAS Pixel Detector at the LHC

CERN Document Server

Hirschbuehl, D; The ATLAS collaboration

2011-01-01

The ATLAS Pixel Detector is the innermost detector of the ATLAS experiment at the Large Hadron Collider at CERN, providing high-resolution measurements of charged particle tracks in the high radiation environment close to the collision region. This capability is vital for the identification and measurement of proper decay times of long-lived particles such as b-hadrons, and thus vital for the ATLAS physics program. The detector provides hermetic coverage with three cylindrical layers and three layers of forward and backward pixel detectors. It consists of approximately 80 million pixels that are individually read out via chips bump-bonded to 1744 n-in-n silicon substrates. In this paper results from the successful operation of the Pixel Detector at the LHC will be presented, including monitoring, calibration procedures, timing optimization and detector performance. The detector performance is excellent: 96.7% of the pixels are operational, noise occupancy and hit efficiency exceed the design specification, an...

Operational experience with the ATLAS Pixel Detector at the LHC

CERN Document Server

Lapoire, C; The ATLAS collaboration

2011-01-01

The ATLAS Pixel Detector is the innermost detector of the ATLAS experiment at the Large Hadron Collider at CERN, providing high-resolution measurements of charged particle tracks in the high radiation environment close to the collision region. This capability is vital for the identification and measurement of proper decay times of long-lived particles such as b-hadrons, and thus vital for the ATLAS physics program. The detector provides hermetic coverage with three cylindrical layers and three layers of forward and backward pixel detectors. It consists of approximately 80 million pixels that are individually read out via chips bump-bonded to 1744 n-in-n silicon substrates. In this talk, results from the successful operation of the Pixel Detector at the LHC will be presented, including monitoring, calibration procedures, timing optimization and detector performance. The detector performance is excellent: 97,5% of the pixels are operational, noise occupancy and hit efficiency exceed the design specification, an...

Operational Experience with the ATLAS Pixel Detector at the LHC

CERN Document Server

Lapoire, C; The ATLAS collaboration

2012-01-01

The ATLAS Pixel Detector is the innermost detector of the ATLAS experiment at the Large Hadron Collider at CERN, providing high-resolution measurements of charged particle tracks in the high radiation environment close to the collision region. This capability is vital for the identification and measurement of proper decay times of long-lived particles such as B-hadrons, and thus vital for the ATLAS physics program. The detector provides hermetic coverage with three cylindrical layers and three layers of forward and backward pixel detectors. It consists of approximately 80 million pixels that are individually read out via chips bump-bonded to 1744 n-in-n silicon substrates. In this paper, results from the successful operation of the Pixel Detector at the LHC will be presented, including monitoring, calibration procedures and detector performance. The detector performance is excellent: 96.2% of the pixels are operational, noise occupancy and hit efficiency exceed the design specification.

Operational Experience with the ATLAS Pixel Detector at the LHC

CERN Document Server

Keil, M

2012-01-01

The ATLAS Pixel Detector is the innermost detector of the ATLAS experiment at the Large Hadron Collider at CERN, providing high-resolution measurements of charged particle tracks in the high radiation environment close to the collision region. This capability is vital for the identification and measurement of proper decay times of long-lived particles such as b-hadrons, and thus vital for the ATLAS physics program. The detector provides hermetic coverage with three cylindrical layers and three layers of forward and backward pixel detectors. It consists of approximately 80 million pixels that are individually read out via chips bump-bonded to 1744 n-in-n silicon substrates. In this paper results from the successful operation of the Pixel Detector at the LHC will be presented, including calibration procedures, timing optimization and detector performance. The detector performance is excellent: approximately 97% of the pixels are operational, noise occupancy and hit efficiency exceed the design specification, an...

Operational experience with the ATLAS Pixel Detector at the LHC

CERN Document Server

Ince, T; The ATLAS collaboration

2011-01-01

The ATLAS Pixel Detector is the innermost detector of the ATLAS experiment at the Large Hadron Collider at CERN, providing high-resolution measurements of charged particle tracks in the high radiation environment close to the collision region. This capability is vital for the identification and measurement of proper decay times of long-lived particles such as b-hadrons, and thus vital for the ATLAS physics program. The detector provides hermetic coverage with three cylindrical layers and three layers of forward and backward pixel detectors. It consists of approximately 80 million pixels that are individually read out via chips bump-bonded to 1744 n-in-n silicon substrates. In this talk, results from the successful operation of the Pixel Detector at the LHC will be presented, including monitoring, calibration procedures, timing optimization and detector performance. The detector performance is excellent: 96.8% of the pixels are operational, noise occupancy and hit efficiency exceed the design specification, an...

Operational experience with the ATLAS Pixel detector at the LHC

CERN Document Server

Deluca, C; The ATLAS collaboration

2011-01-01

The ATLAS Pixel Detector is the innermost detector of the ATLAS experiment at the Large Hadron Collider at CERN, providing high-resolution measurements of charged particle tracks in the high radiation environment close to the collision region. This capability is vital for the identification and measurement of proper decay times of long-lived particles such as b-hadrons, and thus vital for the ATLAS physics program. The detector provides hermetic coverage with three cylindrical layers and three layers of forward and backward pixel detectors. It consists of approximately 80 million pixels that are individually read out via chips bump-bonded to 1744 n-in-n silicon substrates. In this paper, results from the successful operation of the Pixel Detector at the LHC will be presented, including monitoring, calibration procedures, timing optimization and detector performance. The detector performance is excellent: 97,5\\% of the pixels are operational, noise occupancy and hit efficiency exceed the design specification, ...

Operational Experience with the ATLAS Pixel Detector at the LHC

CERN Document Server

Lange, C; The ATLAS collaboration

2011-01-01

The ATLAS Pixel Detector is the innermost detector of the ATLAS experiment at the Large Hadron Collider at CERN, providing high-resolution measurements of charged particle tracks in the high radiation environment close to the collision region. This capability is vital for the identification and measurement of proper decay times of long-lived particles such as b-hadrons, and thus vital for the ATLAS physics program. The detector provides hermetic coverage with three cylindrical layers and three layers of forward and backward pixel detectors. It consists of approximately 80 million pixels that are individually read out via chips bump- bonded to 1744 n-in-n silicon substrates. In this talk, results from the successful operation of the Pixel Detector at the LHC will be presented, including monitoring, calibration procedures, timing optimization and detector performance. The detector performance is excellent: 97,5% of the pixels are operational, noise occupancy and hit efficiency exceed the design specification, a...

Operational experience with the ATLAS Pixel detector at the LHC

CERN Document Server

Deluca, C; The ATLAS collaboration

2011-01-01

The ATLAS Pixel Detector is the innermost detector of the ATLAS experiment at the Large Hadron Collider at CERN, providing high-resolution measurements of charged particle tracks in the high radiation environment close to the collision region. This capability is vital for the identification and measurement of proper decay times of long-lived particles such as b-hadrons, and thus vital for the ATLAS physics program. The detector provides hermetic coverage with three cylindrical layers and three layers of forward and backward pixel detectors. It consists of approximately 80 million pixels that are individually read out via chips bump-bonded to 1744 n-in-n silicon substrates. In this talk, results from the successful operation of the Pixel Detector at the LHC will be presented, including monitoring, calibration procedures, timing optimization and detector performance. The detector performance is excellent: 97,5% of the pixels are operational, noise occupancy and hit efficiency exceed the design specification, an...

Characterization of active CMOS sensors for capacitively coupled pixel detectors

Energy Technology Data Exchange (ETDEWEB)

Hirono, Toko; Gonella, Laura; Janssen, Jens; Hemperek, Tomasz; Huegging, Fabian; Krueger, Hans; Wermes, Norbert [Institute of Physics, University of Bonn (Germany); Peric, Ivan [Institut fuer Prozessdatenverarbeitung und Elektronik, Karlsruher Institut fuer Technologie, Karlsruhe (Germany)

2015-07-01

Active CMOS pixel sensor is one of the most attractive candidates for detectors of upcoming particle physics experiments. In contrast to conventional sensors of hybrid detectors, signal processing circuit can be integrated in the active CMOS sensor. The characterization and optimization of the pixel circuit are indispensable to obtain a good performance from the sensors. The prototype chips of the active CMOS sensor were fabricated in the AMS 180nm and L-Foundry 150 nm CMOS processes, respectively a high voltage and high resistivity technology. Both chips have a charge sensitive amplifier and a comparator in each pixel. The chips are designed to be glued to the FEI4 pixel readout chip. The signals from 3 pixels of the prototype chips are capacitively coupled to the FEI4 input pads. We have performed lab tests and test beams to characterize the prototypes. In this presentation, the measurement results of the active CMOS prototype sensors are shown.

Architecture on Architecture

DEFF Research Database (Denmark)

Olesen, Karen

2016-01-01

that is not scientific or academic but is more like a latent body of data that we find embedded in existing works of architecture. This information, it is argued, is not limited by the historical context of the work. It can be thought of as a virtual capacity – a reservoir of spatial configurations that can...... correlation between the study of existing architectures and the training of competences to design for present-day realities.......This paper will discuss the challenges faced by architectural education today. It takes as its starting point the double commitment of any school of architecture: on the one hand the task of preserving the particular knowledge that belongs to the discipline of architecture, and on the other hand...

Optimization of CMOS active pixels for high resolution digital radiography

International Nuclear Information System (INIS)

Kim, Young Soo

2007-02-01

CMOS image sensors have poorer performance compared to conventional charge coupled devices (CCDs). Since CMOS Active Pixel Sensors (APSs) in general have higher temporal noise, higher dark current, smaller full well charge capacitance, and lower spectral response, they cannot provide the same wide dynamic range and superior signal-to-noise ratio as CCDs. In view of electronic noise, the main source for the CMOS APS is the pixel, along with other signal processing blocks such as row and column decoder, analog signal processor (ASP), analog-to-digital converter (ADC), and timing and control logic circuitry. Therefore, it is important and necessary to characterize noise of the active pixels in CMOS APSs. We developed our theoretical noise model to account for the temporal noise in active pixels, and then found out the optimum design parameters such as fill actor, each size of the three transistors (source follower, row selection transistor, bias transistor) comprising active pixels, bias current, and load capacitance that can have the maximum signal-to-noise ratio. To develop the theoretical noise model in active pixels, we considered the integration noise of the photodiode and the readout noise of the transistors related to readout. During integration, the shot noise due to the dark current and photocurrent, during readout, the thermal and flicker noise were considered. The developed model can take the input variables such as photocurrent, capacitance of the photodiode, integration time, transconductance of the transistors, channel resistance of the transistors, gate-to-source capacitance of the follower, and load capacitance etc. To validate our noise model, two types of test structures have been realized. Firstly, four types of photodiodes (n_d_i_f_f_u_s_i_o_n/p_s_u_b_s_t_r_a_t_e, n_w_e_l_l/p_s_u_b_s_t_r_a_t_e, n_d_i_f_f_u_s_i_o_n/p_e_p_i_t_a_x_i_a_l/p_s_u_b_s_t_r_a_t_e, n_w_e_l_l/p_e_p_i_t_a_x_i_a_l/p_s_u_b_s_t_r_a_t_e) used in CMOS active pixels were fabricated

Development of thin sensors and a novel interconnection technology for the upgrade of the ATLAS pixel system

Energy Technology Data Exchange (ETDEWEB)

Beimforde, Michael

2010-07-19

To extend the discovery potential of the experiments at the LHC accelerator a two phase luminosity upgrade towards the super LHC (sLHC) with a maximum instantaneous luminosity of 10{sup 35}/cm{sup 2}s{sup 1} is planned. Retaining the reconstruction efficiency and spatial resolution of the ATLAS tracking detector at the sLHC, new pixel modules have to be developed that have a higher granularity, can be placed closer to the interaction point, and allow for a cost-efficient coverage of a larger pixel detector volume compared to the present one. The reduced distance to the interaction point calls for more compact modules that have to be radiation hard to supply a sufficient charge collection efficiency up to an integrated particle fluence equivalent to that of (1-2).10{sup 16} 1-MeV-neutrons per square centimeter (n{sub eq}/cm{sup 2}). Within this thesis a new module concept was partially realised and evaluated for the operation within an ATLAS pixel detector at the sLHC. This module concept utilizes a novel thin sensor production process for thin n-in-p silicon sensors which potentially allow for a higher radiation hardness at a reduced cost. Furthermore, the new 3D-integration technology ICV-SLID is explored which will allow for increasing the active area of the modules from 71% to about 90% and hence, for employing the modules in the innermost layer of the upgraded ATLAS pixel detector. A semiconductor simulation and measurements of irradiated test sensors are used to optimize the implantation parameters for the inter-pixel isolation of the thin sensors. These reduce the crosstalk between the pixel channels and should allow for operating the sensors during the whole runtime of the experiment without causing junction breakdowns. The characterization of the first production of sensors with active thicknesses of 75 {mu}m and 150 {mu}m proved that thin pixel sensors can be successfully produced with the new process technology. Thin pad sensors with a reduced inactive

Development of thin sensors and a novel interconnection technology for the upgrade of the ATLAS pixel system

International Nuclear Information System (INIS)

Beimforde, Michael

2010-01-01

To extend the discovery potential of the experiments at the LHC accelerator a two phase luminosity upgrade towards the super LHC (sLHC) with a maximum instantaneous luminosity of 10 35 /cm 2 s 1 is planned. Retaining the reconstruction efficiency and spatial resolution of the ATLAS tracking detector at the sLHC, new pixel modules have to be developed that have a higher granularity, can be placed closer to the interaction point, and allow for a cost-efficient coverage of a larger pixel detector volume compared to the present one. The reduced distance to the interaction point calls for more compact modules that have to be radiation hard to supply a sufficient charge collection efficiency up to an integrated particle fluence equivalent to that of (1-2).10 16 1-MeV-neutrons per square centimeter (n eq /cm 2 ). Within this thesis a new module concept was partially realised and evaluated for the operation within an ATLAS pixel detector at the sLHC. This module concept utilizes a novel thin sensor production process for thin n-in-p silicon sensors which potentially allow for a higher radiation hardness at a reduced cost. Furthermore, the new 3D-integration technology ICV-SLID is explored which will allow for increasing the active area of the modules from 71% to about 90% and hence, for employing the modules in the innermost layer of the upgraded ATLAS pixel detector. A semiconductor simulation and measurements of irradiated test sensors are used to optimize the implantation parameters for the inter-pixel isolation of the thin sensors. These reduce the crosstalk between the pixel channels and should allow for operating the sensors during the whole runtime of the experiment without causing junction breakdowns. The characterization of the first production of sensors with active thicknesses of 75 μm and 150 μm proved that thin pixel sensors can be successfully produced with the new process technology. Thin pad sensors with a reduced inactive edge demonstrate that the active

Detector Sampling of Optical/IR Spectra: How Many Pixels per FWHM?

Science.gov (United States)

Robertson, J. Gordon

2017-08-01

Most optical and IR spectra are now acquired using detectors with finite-width pixels in a square array. Each pixel records the received intensity integrated over its own area, and pixels are separated by the array pitch. This paper examines the effects of such pixellation, using computed simulations to illustrate the effects which most concern the astronomer end-user. It is shown that coarse sampling increases the random noise errors in wavelength by typically 10-20 % at 2 pixels per Full Width at Half Maximum, but with wide variation depending on the functional form of the instrumental Line Spread Function (i.e. the instrumental response to a monochromatic input) and on the pixel phase. If line widths are determined, they are even more strongly affected at low sampling frequencies. However, the noise in fitted peak amplitudes is minimally affected by pixellation, with increases less than about 5%. Pixellation has a substantial but complex effect on the ability to see a relative minimum between two closely spaced peaks (or relative maximum between two absorption lines). The consistent scale of resolving power presented by Robertson to overcome the inadequacy of the Full Width at Half Maximum as a resolution measure is here extended to cover pixellated spectra. The systematic bias errors in wavelength introduced by pixellation, independent of signal/noise ratio, are examined. While they may be negligible for smooth well-sampled symmetric Line Spread Functions, they are very sensitive to asymmetry and high spatial frequency sub-structure. The Modulation Transfer Function for sampled data is shown to give a useful indication of the extent of improperly sampled signal in an Line Spread Function. The common maxim that 2 pixels per Full Width at Half Maximum is the Nyquist limit is incorrect and most Line Spread Functions will exhibit some aliasing at this sample frequency. While 2 pixels per Full Width at Half Maximum is nevertheless often an acceptable minimum for

Monte Carlo Optimization of Crystal Configuration for Pixelated Molecular SPECT Scanners

Energy Technology Data Exchange (ETDEWEB)

Mahani, Hojjat [Radiation Application Research School, Nuclear Science and Technology Research Institute, Tehran (Iran, Islamic Republic of); Research Center for Molecular and Cellular Imaging, Tehran University of Medical Science, Tehran (Iran, Islamic Republic of); Raisali, Gholamreza [Radiation Application Research School, Nuclear Science and Technology Research Institute, Tehran (Iran, Islamic Republic of); Kamali-Asl, Alireza [Radiation Medicine Department, Shahid Beheshti University, Tehran (Iran, Islamic Republic of); Ay, Mohammad Reza, E-mail: mohammadreza_ay@sina.tums.ac.ir [Research Center for Molecular and Cellular Imaging, Tehran University of Medical Science, Tehran (Iran, Islamic Republic of); Department of Medical Physics and Biomedical Engineering, Tehran University of Medical Science, Tehran (Iran, Islamic Republic of)

2017-02-01

Resolution-sensitivity-PDA tradeoff is the most challenging problem in design and optimization of pixelated preclinical SPECT scanners. In this work, we addressed such a challenge from a crystal point-of-view by looking for an optimal pixelated scintillator using GATE Monte Carlo simulation. Various crystal configurations have been investigated and the influence of different pixel sizes, pixel gaps, and three scintillators on tomographic resolution, sensitivity, and PDA of the camera were evaluated. The crystal configuration was then optimized using two objective functions: the weighted-sum and the figure-of-merit methods. The CsI(Na) reveals the highest sensitivity of the order of 43.47 cps/MBq in comparison to the NaI(Tl) and the YAP(Ce), for a 1.5×1.5 mm{sup 2} pixel size and 0.1 mm gap. The results show that the spatial resolution, in terms of FWHM, improves from 3.38 to 2.21 mm while the sensitivity simultaneously deteriorates from 42.39 cps/MBq to 27.81 cps/MBq when pixel size varies from 2×2 mm{sup 2} to 0.5×0.5 mm{sup 2} for a 0.2 mm gap, respectively. The PDA worsens from 0.91 to 0.42 when pixel size decreases from 0.5×0.5 mm{sup 2} to 1×1 mm{sup 2} for a 0.2 mm gap at 15° incident-angle. The two objective functions agree that the 1.5×1.5 mm{sup 2} pixel size and 0.1 mm Epoxy gap CsI(Na) configuration provides the best compromise for small-animal imaging, using the HiReSPECT scanner. Our study highlights that crystal configuration can significantly affect the performance of the camera, and thereby Monte Carlo optimization of pixelated detectors is mandatory in order to achieve an optimal quality tomogram. - Highlights: • We optimized pixelated crystal configuration for the purpose of molecular SPECT imaging. • The weighted-sum and the figure-of-merit methods were used in order to search for an optimal crystal configuration. • The higher the pixel size, the poorer the resolution and simultaneously the higher the sensitivity and the PDA. • The

Monte Carlo Optimization of Crystal Configuration for Pixelated Molecular SPECT Scanners

International Nuclear Information System (INIS)

Mahani, Hojjat; Raisali, Gholamreza; Kamali-Asl, Alireza; Ay, Mohammad Reza

2017-01-01

Resolution-sensitivity-PDA tradeoff is the most challenging problem in design and optimization of pixelated preclinical SPECT scanners. In this work, we addressed such a challenge from a crystal point-of-view by looking for an optimal pixelated scintillator using GATE Monte Carlo simulation. Various crystal configurations have been investigated and the influence of different pixel sizes, pixel gaps, and three scintillators on tomographic resolution, sensitivity, and PDA of the camera were evaluated. The crystal configuration was then optimized using two objective functions: the weighted-sum and the figure-of-merit methods. The CsI(Na) reveals the highest sensitivity of the order of 43.47 cps/MBq in comparison to the NaI(Tl) and the YAP(Ce), for a 1.5×1.5 mm"2 pixel size and 0.1 mm gap. The results show that the spatial resolution, in terms of FWHM, improves from 3.38 to 2.21 mm while the sensitivity simultaneously deteriorates from 42.39 cps/MBq to 27.81 cps/MBq when pixel size varies from 2×2 mm"2 to 0.5×0.5 mm"2 for a 0.2 mm gap, respectively. The PDA worsens from 0.91 to 0.42 when pixel size decreases from 0.5×0.5 mm"2 to 1×1 mm"2 for a 0.2 mm gap at 15° incident-angle. The two objective functions agree that the 1.5×1.5 mm"2 pixel size and 0.1 mm Epoxy gap CsI(Na) configuration provides the best compromise for small-animal imaging, using the HiReSPECT scanner. Our study highlights that crystal configuration can significantly affect the performance of the camera, and thereby Monte Carlo optimization of pixelated detectors is mandatory in order to achieve an optimal quality tomogram. - Highlights: • We optimized pixelated crystal configuration for the purpose of molecular SPECT imaging. • The weighted-sum and the figure-of-merit methods were used in order to search for an optimal crystal configuration. • The higher the pixel size, the poorer the resolution and simultaneously the higher the sensitivity and the PDA. • The higher the pixel gap, the

Novel WLL Architecture Based on Color Pixel Multiple Access Implemented on a Terrestrial Video Network as the Overlay

DEFF Research Database (Denmark)

Sanyal, Rajarshi; Cianca, Ernestina; Prasad, Ramjee

2013-01-01

Wireless Local Loop deployments are based on the traditional cellular technologies. However there are limitations in terms of intricacy, cost and time to deploy .In this paper, the authors introduce a Wireless Local Loop architecture employing the proposed CPMA technique on existing overlay video...

Limits in point to point resolution of MOS based pixels detector arrays

Science.gov (United States)

Fourches, N.; Desforge, D.; Kebbiri, M.; Kumar, V.; Serruys, Y.; Gutierrez, G.; Leprêtre, F.; Jomard, F.

2018-01-01

In high energy physics point-to-point resolution is a key prerequisite for particle detector pixel arrays. Current and future experiments require the development of inner-detectors able to resolve the tracks of particles down to the micron range. Present-day technologies, although not fully implemented in actual detectors, can reach a 5-μm limit, this limit being based on statistical measurements, with a pixel-pitch in the 10 μm range. This paper is devoted to the evaluation of the building blocks for use in pixel arrays enabling accurate tracking of charged particles. Basing us on simulations we will make here a quantitative evaluation of the physical and technological limits in pixel size. Attempts to design small pixels based on SOI technology will be briefly recalled here. A design based on CMOS compatible technologies that allow a reduction of the pixel size below the micrometer is introduced here. Its physical principle relies on a buried carrier-localizing collecting gate. The fabrication process needed by this pixel design can be based on existing process steps used in silicon microelectronics. The pixel characteristics will be discussed as well as the design of pixel arrays. The existing bottlenecks and how to overcome them will be discussed in the light of recent ion implantation and material characterization experiments.

Planar pixel sensors in commercial CMOS technologies

Energy Technology Data Exchange (ETDEWEB)

Gonella, Laura; Hemperek, Tomasz; Huegging, Fabian; Krueger, Hans; Wermes, Norbert [Physikalisches Institut der Universitaet Bonn, Nussallee 12, 53115 Bonn (Germany); Macchiolo, Anna [Max-Planck-Institut fuer Physik, Foehringer Ring 6, 80805 Muenchen (Germany)

2015-07-01

For the upgrade of the ATLAS experiment at the high luminosity LHC, an all-silicon tracker is foreseen to cope with the increased rate and radiation levels. Pixel and strip detectors will have to cover an area of up to 200m2. To produce modules in high number at reduced costs, new sensor and bonding technologies have to be investigated. Commercial CMOS technologies on high resistive substrates can provide significant advantages in this direction. They offer cost effective, large volume sensor production. In addition to this, production is done on 8'' wafers allowing wafer-to-wafer bonding to the electronics, an interconnection technology substantially cheaper than the bump bonding process used for hybrid pixel detectors at the LHC. Both active and passive n-in-p pixel sensor prototypes have been submitted in a 150 nm CMOS technology on a 2kΩ cm substrate. The passive sensor design will be used to characterize sensor properties and to investigate wafer-to-wafer bonding technologies. This first prototype is made of a matrix of 36 x 16 pixels of size compatible with the FE-I4 readout chip (i.e. 50 μm x 250 μm). Results from lab characterization of this first submission are shown together with TCAD simulations. Work towards a full size FE-I4 sensor for wafer-to-wafer bonding is discussed.

18k Channels single photon counting readout circuit for hybrid pixel detector

International Nuclear Information System (INIS)

Maj, P.; Grybos, P.; Szczygiel, R.; Zoladz, M.; Sakumura, T.; Tsuji, Y.

2013-01-01

We have performed measurements of an integrated circuit named PXD18k designed for hybrid pixel semiconductor detectors used in X-ray imaging applications. The PXD18k integrated circuit, fabricated in CMOS 180 nm technology, has dimensions of 9.64 mm×20 mm and contains approximately 26 million transistors. The core of the IC is a matrix of 96×192 pixels with 100 μm×100 μm pixel size. Each pixel works in a single photon counting mode. A single pixel contains two charge sensitive amplifiers with Krummenacher feedback scheme, two shapers, two discriminators (with independent thresholds A and B) and two 16-bit ripple counters. The data are read out via eight low voltage differential signaling (LVDS) outputs with 100 Mbps rate. The power consumption is dominated by analog blocks and it is about 23 μW/pixel. The effective peaking time at the discriminator input is 30 ns and is mainly determined by the time constants of the charge sensitive amplifier (CSA). The gain is equal to 42.5 μV/e − and the equivalent noise charge is 168 e − rms (with bump-bonded silicon pixel detector). Thanks to the use of trim DACs in each pixel, the effective threshold spread at the discriminator input is only 1.79 mV. The dead time of the front end electronics for a standard setting is 172 ns (paralyzable model). In the standard readout mode (when the data collection time is separated from the time necessary to readout data from the chip) the PXD18k IC works with two energy thresholds per pixel. The PXD18k can also be operated in the continuous readout mode (with a zero dead time) where one can select the number of bits readout from each pixel to optimize the PXD18k frame rate. For example, for reading out 16 bits/pixel the frame rate is 2.7 kHz and for 4 bits/pixel it rises to 7.1 kHz.

18k Channels single photon counting readout circuit for hybrid pixel detector

Energy Technology Data Exchange (ETDEWEB)

Maj, P., E-mail: piotr.maj@agh.edu.pl [AGH University of Science and Technology, Department of Measurements and Electronics, Al. Mickiewicza 30, 30-059 Krakow (Poland); Grybos, P.; Szczygiel, R.; Zoladz, M. [AGH University of Science and Technology, Department of Measurements and Electronics, Al. Mickiewicza 30, 30-059 Krakow (Poland); Sakumura, T.; Tsuji, Y. [X-ray Analysis Division, Rigaku Corporation, Matsubara, Akishima, Tokyo 196-8666 (Japan)

2013-01-01

We have performed measurements of an integrated circuit named PXD18k designed for hybrid pixel semiconductor detectors used in X-ray imaging applications. The PXD18k integrated circuit, fabricated in CMOS 180 nm technology, has dimensions of 9.64 mm Multiplication-Sign 20 mm and contains approximately 26 million transistors. The core of the IC is a matrix of 96 Multiplication-Sign 192 pixels with 100 {mu}m Multiplication-Sign 100 {mu}m pixel size. Each pixel works in a single photon counting mode. A single pixel contains two charge sensitive amplifiers with Krummenacher feedback scheme, two shapers, two discriminators (with independent thresholds A and B) and two 16-bit ripple counters. The data are read out via eight low voltage differential signaling (LVDS) outputs with 100 Mbps rate. The power consumption is dominated by analog blocks and it is about 23 {mu}W/pixel. The effective peaking time at the discriminator input is 30 ns and is mainly determined by the time constants of the charge sensitive amplifier (CSA). The gain is equal to 42.5 {mu}V/e{sup -} and the equivalent noise charge is 168 e{sup -} rms (with bump-bonded silicon pixel detector). Thanks to the use of trim DACs in each pixel, the effective threshold spread at the discriminator input is only 1.79 mV. The dead time of the front end electronics for a standard setting is 172 ns (paralyzable model). In the standard readout mode (when the data collection time is separated from the time necessary to readout data from the chip) the PXD18k IC works with two energy thresholds per pixel. The PXD18k can also be operated in the continuous readout mode (with a zero dead time) where one can select the number of bits readout from each pixel to optimize the PXD18k frame rate. For example, for reading out 16 bits/pixel the frame rate is 2.7 kHz and for 4 bits/pixel it rises to 7.1 kHz.

The Belle II DEPFET pixel detector

Energy Technology Data Exchange (ETDEWEB)

Moser, Hans-Günther, E-mail: moser@mpp.mpg.de

2016-09-21

The Belle II experiment at KEK (Tsukuba, Japan) will explore heavy flavour physics (B, charm and tau) at the starting of 2018 with unprecedented precision. Charged particles are tracked by a two-layer DEPFET pixel device (PXD), a four-layer silicon strip detector (SVD) and the central drift chamber (CDC). The PXD will consist of two layers at radii of 14 mm and 22 mm with 8 and 12 ladders, respectively. The pixel sizes will vary, between 50 μm×(55–60) μm in the first layer and between 50 μm×(70–85) μm in the second layer, to optimize the charge sharing efficiency. These innermost layers have to cope with high background occupancy, high radiation and must have minimal material to reduce multiple scattering. These challenges are met using the DEPFET technology. Each pixel is a FET integrated on a fully depleted silicon bulk. The signal charge collected in the ‘internal gate’ modulates the FET current resulting in a first stage amplification and therefore very low noise. This allows very thin sensors (75 μm) reducing the overall material budget of the detector (0.21% X{sub 0}). Four fold multiplexing of the column parallel readout allows read out a full frame of the pixel matrix in only 20 μs while keeping the power consumption low enough for air cooling. Only the active electronics outside the detector acceptance has to be cooled actively with a two phase CO{sub 2} system. Furthermore the DEPFET technology offers the unique feature of an electronic shutter which allows the detector to operate efficiently in the continuous injection mode of superKEKB.

Depleted CMOS pixels for LHC proton–proton experiments

International Nuclear Information System (INIS)

Wermes, N.

2016-01-01

While so far monolithic pixel detectors have remained in the realm of comparatively low rate and radiation applications outside LHC, new developments exploiting high resistivity substrates with three or four well CMOS process options allow reasonably large depletion depths and full CMOS circuitry in a monolithic structure. This opens up the possibility to target CMOS pixel detectors also for high radiation pp-experiments at the LHC upgrade, either in a hybrid-type fashion or even fully monolithic. Several pixel matrices have been prototyped with high ohmic substrates, high voltage options, and full CMOS electronics. They were characterized in the lab and in test beams. An overview of the necessary development steps and different approaches as well as prototype results are presented in this paper.

Pixel array detector for X-ray free electron laser experiments

Energy Technology Data Exchange (ETDEWEB)

Philipp, Hugh T., E-mail: htp2@cornell.edu [Department of Physics, Laboratory of Solid State Physics, Cornell University, Ithaca, NY 14853 (United States); Hromalik, Marianne [Electrical and Computer Engineering, SUNY Oswego, Oswego, NY 13126 (United States); Tate, Mark; Koerner, Lucas [Department of Physics, Laboratory of Solid State Physics, Cornell University, Ithaca, NY 14853 (United States); Gruner, Sol M. [Department of Physics, Laboratory of Solid State Physics, Cornell University, Ithaca, NY 14853 (United States); Wilson Laboratory, Cornell University, CHESS, Ithaca, NY 14853 (United States)

2011-09-01

X-ray free electron lasers (XFELs) promise to revolutionize X-ray science with extremely high peak brilliances and femtosecond X-ray pulses. This will require novel detectors to fully realize the potential of these new sources. There are many current detector development projects aimed at the many challenges of meeting the XFEL requirements . This paper describes a pixel array detector (PAD) that has been developed for the Coherent X-ray Imaging experiment at the Linac Coherent Light Source (LCLS) at the SLAC National Laboratory . The detector features 14-bit in-pixel digitization; a 2-level in-pixel gain setting that can be used to make an arbitrary 2-D gain pattern that is adaptable to a particular experiment; the ability to handle instantaneous X-ray flux rates of 10{sup 17} photons per second; and continuous frames rates in excess of 120 Hz. The detector uses direct detection of X-rays in a silicon diode. The charge produced by the diode is integrated in a pixilated application specific integrated circuit (ASIC) which digitizes collected holes with single X-ray photon capability. Each ASIC is 194x185 pixels, each pixel is 110{mu}mx110{mu}m on a side. Each pixel can detect up to 2500 X-rays per frame in low-gain mode, yet easily detects single photons at high-gain. Cooled, single-chip detectors have been built and meet all the required specifications. SLAC National Laboratory is engaged in constructing a tiled, multi-chip 1516x1516 pixel detector.

Baryon Acoustic Oscillations reconstruction with pixels

Energy Technology Data Exchange (ETDEWEB)

Obuljen, Andrej [SISSA—International School for Advanced Studies, Via Bonomea 265, 34136 Trieste (Italy); Villaescusa-Navarro, Francisco [Center for Computational Astrophysics, 160 5th Ave, New York, NY, 10010 (United States); Castorina, Emanuele [Berkeley Center for Cosmological Physics, University of California, Berkeley, CA 94720 (United States); Viel, Matteo, E-mail: aobuljen@sissa.it, E-mail: fvillaescusa@simonsfoundation.org, E-mail: ecastorina@berkeley.edu, E-mail: viel@oats.inaf.it [INAF, Osservatorio Astronomico di Trieste, via Tiepolo 11, I-34131 Trieste (Italy)

2017-09-01

Gravitational non-linear evolution induces a shift in the position of the baryon acoustic oscillations (BAO) peak together with a damping and broadening of its shape that bias and degrades the accuracy with which the position of the peak can be determined. BAO reconstruction is a technique developed to undo part of the effect of non-linearities. We present and analyse a reconstruction method that consists of displacing pixels instead of galaxies and whose implementation is easier than the standard reconstruction method. We show that this method is equivalent to the standard reconstruction technique in the limit where the number of pixels becomes very large. This method is particularly useful in surveys where individual galaxies are not resolved, as in 21cm intensity mapping observations. We validate this method by reconstructing mock pixelated maps, that we build from the distribution of matter and halos in real- and redshift-space, from a large set of numerical simulations. We find that this method is able to decrease the uncertainty in the BAO peak position by 30-50% over the typical angular resolution scales of 21 cm intensity mapping experiments.

Pixel electronics for the ATLAS experiment

International Nuclear Information System (INIS)

Fischer, P.

2001-01-01

The ATLAS experiment at LHC will use 3 barrel layers and 2x5 disks of silicon pixel detectors as the innermost elements of the semiconductor tracker. The basic building blocks are pixel modules with an active area of 16.4 mmx60.8 mm which include an n + on n-type silicon sensor and 16 VLSI front-end (FE) chips. Every FE chip contains a low power, high speed charge sensitive preamplifier, a fast discriminator, and a readout system which operates at the 40 MHz rate of LHC. The addresses of hit pixels (as well as a low resolution pulse height information) are stored on the FE chips until arrival of a level 1 trigger signal. Hits are then transferred to a module controller chip (MCC) which collects the data of all 16 FE chips, builds complete events and sends the data through two optical links to the data acquisition system. The MCC receives clock and data through an additional optical link and provides timing and configuration information for the FE chips. Two additional chips are used to amplify and decode the pin diode signal and to drive the VCSEL laser diodes of the optical links

LHC-rate beam test of CMS pixel barrel modules

International Nuclear Information System (INIS)

Erdmann, W.; Hoermann, Ch.; Kotlinski, D.; Horisberger, R.; Kaestli, H. Chr.; Gabathuler, K.; Bertl, W.; Meier, B.; Langenegger, U.; Trueeb, P.; Rohe, T.

2007-01-01

Modules for the CMS pixel barrel detector have been operated in a high rate pion beam at PSI in order to verify under LHC-like conditions the final module design for the production. The test beam provided charged particle rates up to 10 8 cm -2 s -1 over the full module area. Bunch structure and randomized high trigger rates simulated realistic operation. A four layer telescope made of single pixel readout chip assemblies provided tracking needed for the determination of the modules hit reconstruction efficiency. The performance of the modules has been shown to be adequate for the CMS pixel barrel

Vertically integrated pixel readout chip for high energy physics

International Nuclear Information System (INIS)

Deptuch, Grzegorz; Demarteau, Marcel; Hoff, James; Khalid, Farah; Lipton, Ronald; Shenai, Alpana; Trimpl, Marcel; Yarema, Raymond; Zimmerman, Tom

2011-01-01

We report on the development of the vertex detector pixel readout chips based on multi-tier vertically integrated electronics for the International Linear Collider. Some testing results of the VIP2a prototype are presented. The chip is the second iteration of the silicon implementation of the prototype, data-pushed concept of the readout developed at Fermilab. The device was fabricated in the 3D MIT-LL 0.15 (micro)m fully depleted SOI process. The prototype is a three-tier design, featuring 30 x 30 (micro)m 2 pixels, laid out in an array of 48 x 48 pixels.

ATLAS Pixel Detector Upgrade

CERN Document Server

Flick, T; The ATLAS collaboration

2009-01-01

The first upgrade for higher luminosity at LHC for the ATLAS pixel detector is the insertion of a forth layer, the IBL. The talk gives an overview about what the IBL is and how it will be set up, as well as to give a status of the research and develoment work.

Commissioning of the ATLAS pixel detector

International Nuclear Information System (INIS)

Golling, Tobias

2008-01-01

The ATLAS pixel detector is a high precision silicon tracking device located closest to the LHC interaction point. It belongs to the first generation of its kind in a hadron collider experiment. It will provide crucial pattern recognition information and will largely determine the ability of ATLAS to precisely track particle trajectories and find secondary vertices. It was the last detector to be installed in ATLAS in June 2007, has been fully connected and tested in-situ during spring and summer 2008, and is ready for the imminent LHC turn-on. The highlights of the past and future commissioning activities of the ATLAS pixel system are presented

Leakage current measurements on pixelated CdZnTe detectors

International Nuclear Information System (INIS)

Dirks, B.P.F.; Blondel, C.; Daly, F.; Gevin, O.; Limousin, O.; Lugiez, F.

2006-01-01

In the field of the R and D of a new generation hard X-ray cameras for space applications we focus on the use of pixelated CdTe or CdZnTe semiconductor detectors. They are covered with 64 (0.9x0.9 mm 2 ) or 256 (0.5x0.5 mm 2 ) pixels, surrounded by a guard ring and operate in the energy ranging from several keV to 1 MeV, at temperatures between -20 and +20 o C. A critical parameter in the characterisation of these detectors is the leakage current per pixel under polarisation (∼50-500 V/mm). In operation mode each pixel will be read-out by an integrated spectroscopy channel of the multi-channel IDeF-X ASIC currently developed in our lab. The design and functionality of the ASIC depends directly on the direction and value of the current. A dedicated and highly insulating electronics circuit is designed to automatically measure the current in each individual pixel, which is in the order of tens of pico-amperes. Leakage current maps of different CdZnTe detectors of 2 and 6 mm thick and at various temperatures are presented and discussed. Defect density diagnostics have been performed by calculation of the activation energy of the material

A 3D photograph with 92 million pixels for tagging particles

CERN Multimedia

Antonella Del Rosso

2013-01-01

Where was a given particle born? How can we tag it precisely enough to be able to then follow it along its track and through its decays? This is the job of the pixel detector installed at the heart of the ATLAS detector, only centimeters away from the LHC collisions. In order to improve its identification and tagging capabilities, the ATLAS collaboration has recently taken a big step towards the completion of the upgrade of its Pixel detector, which will include the insertion of a brand-new layer of 12 million pixels.   The 7 metre long beryllium beam pipe inserted in the carbon-fibre positioning tool is being prepared ready for the new innermost layer of the Pixel detector to be mounted. Photo: ATLAS Collaboration. With its three layers and 80 million channels concentrated in 2.2 square metres, the ATLAS pixel detector was already the world’s largest pixel-based system used in particle physics. Its excellent performance was instrumental in the discovery of the Higgs boson in July ...

The Upgraded Pixel Detector of the ATLAS Experiment for Run-2

CERN Document Server

Ferrere, Didier; The ATLAS collaboration

2016-01-01

Run-2 of the LHC is providing new challenges to track and vertex reconstruction with higher energies, denser jets and higher rates. Therefore the ATLAS experiment has constructed the first 4-layer Pixel detector in HEP, installing a new Pixel layer, also called Insertable B-Layer (IBL). IBL is a fourth layer of pixel detectors, and has been installed in May 2014 at a radius of 3.3 cm between the existing Pixel Detector and a new smaller radius beam-pipe. The new detector, built to cope with high radiation and expected occupancy, is the first large scale application of 3D detectors and CMOS 130nm technology. In addition the Pixel detector was refurbished with a new service quarter panel to recover about 3% of defective modules lost during run-1 and a new optical readout system to readout the data at higher speed while reducing the occupancy when running with increased luminosity. The commissioning and performance of the 4-layer Pixel Detector, in particular the IBL, will be presented, using collision data.

Initial Measurements on Pixel Detector Modules for the ATLAS Upgrades

CERN Document Server

Gallrapp, C; The ATLAS collaboration

2011-01-01

Delicate conditions in terms of peak and integrated luminosity in the Large Hadron Collider (LHC) will raise the ATLAS Pixel Detector to its performance limits. Silicon planar, silicon 3D and diamond pixel sensors are three possible sensor technologies which could be implemented in the upcoming Pixel Detector upgrades of the ATLAS experiment. Measurements of the IV-behavior and measurements with radioactive Americium-241 and Strontium-90 are used to characterize the sensor properties and to understand the interaction between the ATLAS FE-I4 front-end chip and the sensor. Comparisons of results from before and after irradiation for silicon planar and 3D pixel sensors, which give a first impression on the charge collection properties of the different sensor technologies, are presented.

A passive CMOS pixel sensor for the high luminosity LHC

Energy Technology Data Exchange (ETDEWEB)

Daas, Michael; Gonella, Laura; Hemperek, Tomasz; Huegging, Fabian; Janssen, Jens; Krueger, Hans; Pohl, David-Leon; Wermes, Norbert [Physikalisches Institut der Universitaet Bonn (Germany); Macchiolo, Anna [Max-Planck-Institut fuer Physik, Muenchen (Germany)

2016-07-01

The high luminosity upgrade for the Large Hadron Collider at CERN requires a new inner tracking detector for the ATLAS experiment. About 200 m{sup 2} of silicon detectors are needed demanding new, low cost hybridization- and sensor technologies. One promising approach is to use commercial CMOS technologies to produce the passive sensor for a hybrid pixel detector design. In this talk a fully functional prototype of a 300 μm thick, backside biased CMOS pixel sensor in 150 nm LFoundry technology is presented. The sensor is bump bonded to the ATLAS FE-I4 with AC and DC coupled pixels. Results like leakage current, noise performance, and charge collection efficiency are presented and compared to the actual ATLAS pixel sensor design.

A low-power and small-area column-level ADC for high frame-rate CMOS pixel sensor

Energy Technology Data Exchange (ETDEWEB)

Zhang, L., E-mail: liang.zhang@iphc.cnrs.fr [School of Physics, Key Laboratory of Particle Physics and Particle Irradiation, Shandong University, 250100 Jinan (China); Institut Pluridisciplinaire Hubert Curien, University of Strasbourg, CNRS/IN2P3/UDS, 23 rue du loess, BP 28, 67037 Strasbourg (France); Morel, F.; Hu-Guo, C.; Hu, Y. [Institut Pluridisciplinaire Hubert Curien, University of Strasbourg, CNRS/IN2P3/UDS, 23 rue du loess, BP 28, 67037 Strasbourg (France)

2014-07-01

CMOS pixel sensors (CPS) have demonstrated performances meeting the specifications of the International Linear Collider (ILC) vertex detector (VTX). This paper presents a low-power and small-area 4-bit column-level analog-to-digital converter (ADC) for CMOS pixel sensors. The ADC employs a self-timed trigger and completes the conversion by performing a multi-bit/step approximation. As in the outer layers of the ILC vertex detector hit density is of the order of a few per thousand, in order to reduce power consumption, the ADC is designed to work in two modes: active mode and idle mode. The ADC is fabricated in a 0.35 μm CMOS process with a pixel pitch of 35 μm. It is implemented with 48 columns in a sensor prototype. Each column ADC covers an area of 35 ×545 μm{sup 2}. The measured temporal noise and Fixed Pattern Noise (FPN) are 0.96 mV and 0.40 mV, respectively. The power consumption, for a 3 V supply and 6.25 MS/s sampling rate, is 486 μW during idle time, which is by far the most frequently employed one. This value rises to 714 μW in the case of the active mode. The measured differential nonlinearity (DNL) and integral nonlinearity (INL) are 0.49/−0.28 LSB and 0.29/−0.20 LSB, respectively. - Highlights: • CMOS sensor integrated with column-level ADC is proposed for ILC VTX outer layers. • A low-power and small-area column-level ADC for high frame-rate CPS is presented. • The test results demonstrate the power and area efficiency. • The architecture is suitable for the outer layer CMOS sensors.

A low-power and small-area column-level ADC for high frame-rate CMOS pixel sensor

International Nuclear Information System (INIS)

Zhang, L.; Morel, F.; Hu-Guo, C.; Hu, Y.

2014-01-01

CMOS pixel sensors (CPS) have demonstrated performances meeting the specifications of the International Linear Collider (ILC) vertex detector (VTX). This paper presents a low-power and small-area 4-bit column-level analog-to-digital converter (ADC) for CMOS pixel sensors. The ADC employs a self-timed trigger and completes the conversion by performing a multi-bit/step approximation. As in the outer layers of the ILC vertex detector hit density is of the order of a few per thousand, in order to reduce power consumption, the ADC is designed to work in two modes: active mode and idle mode. The ADC is fabricated in a 0.35 μm CMOS process with a pixel pitch of 35 μm. It is implemented with 48 columns in a sensor prototype. Each column ADC covers an area of 35 ×545 μm 2 . The measured temporal noise and Fixed Pattern Noise (FPN) are 0.96 mV and 0.40 mV, respectively. The power consumption, for a 3 V supply and 6.25 MS/s sampling rate, is 486 μW during idle time, which is by far the most frequently employed one. This value rises to 714 μW in the case of the active mode. The measured differential nonlinearity (DNL) and integral nonlinearity (INL) are 0.49/−0.28 LSB and 0.29/−0.20 LSB, respectively. - Highlights: • CMOS sensor integrated with column-level ADC is proposed for ILC VTX outer layers. • A low-power and small-area column-level ADC for high frame-rate CPS is presented. • The test results demonstrate the power and area efficiency. • The architecture is suitable for the outer layer CMOS sensors

On-Orbit Solar Dynamics Observatory (SDO) Star Tracker Warm Pixel Analysis

Science.gov (United States)

Felikson, Denis; Ekinci, Matthew; Hashmall, Joseph A.; Vess, Melissa

2011-01-01

This paper describes the process of identification and analysis of warm pixels in two autonomous star trackers on the Solar Dynamics Observatory (SDO) mission. A brief description of the mission orbit and attitude regimes is discussed and pertinent star tracker hardware specifications are given. Warm pixels are defined and the Quality Index parameter is introduced, which can be explained qualitatively as a manifestation of a possible warm pixel event. A description of the algorithm used to identify warm pixel candidates is given. Finally, analysis of dumps of on-orbit star tracker charge coupled devices (CCD) images is presented and an operational plan going forward is discussed. SDO, launched on February 11, 2010, is operated from the NASA Goddard Space Flight Center (GSFC). SDO is in a geosynchronous orbit with a 28.5 inclination. The nominal mission attitude points the spacecraft X-axis at the Sun, with the spacecraft Z-axis roughly aligned with the Solar North Pole. The spacecraft Y-axis completes the triad. In attitude, SDO moves approximately 0.04 per hour, mostly about the spacecraft Z-axis. The SDO star trackers, manufactured by Galileo Avionica, project the images of stars in their 16.4deg x 16.4deg fields-of-view onto CCD detectors consisting of 512 x 512 pixels. The trackers autonomously identify the star patterns and provide an attitude estimate. Each unit is able to track up to 9 stars. Additionally, each tracker calculates a parameter called the Quality Index, which is a measure of the quality of the attitude solution. Each pixel in the CCD measures the intensity of light and a warns pixel is defined as having a measurement consistently and significantly higher than the mean background intensity level. A warns pixel should also have lower intensity than a pixel containing a star image and will not move across the field of view as the attitude changes (as would a dim star image). It should be noted that the maximum error introduced in the star tracker

Scaling of Thermal Images at Different Spatial Resolution: The Mixed Pixel Problem

Directory of Open Access Journals (Sweden)

Hamlyn G. Jones

2014-07-01

Full Text Available The consequences of changes in spatial resolution for application of thermal imagery in plant phenotyping in the field are discussed. Where image pixels are significantly smaller than the objects of interest (e.g., leaves, accurate estimates of leaf temperature are possible, but when pixels reach the same scale or larger than the objects of interest, the observed temperatures become significantly biased by the background temperature as a result of the presence of mixed pixels. Approaches to the estimation of the true leaf temperature that apply both at the whole-pixel level and at the sub-pixel level are reviewed and discussed.

An EUDET/AIDA Pixel Beam Telescope for Detector Development

CERN Document Server

Perrey, Hanno

2013-01-01

A high resolution ($\\sigma 2 \\sim \\mu$) beam telescope based on monolithic active pixel sensors (MAPS) was developed within the EUDET collaboration. The telescope consists of six sensor planes using Mimosa26 MAPS with a pixel pitch of $18.4 \\mu$ and thinned down to $50 \\mu$. The excellent resolution, readout rate and DAQ integration capabilities made the telescope a primary test beam tool for many groups including several CERN based experiments. Within the new European detector infrastructure project AIDA the test beam telescope will be further extended in terms of cooling infrastructure, readout speed and precision. In order to provide a system optimized for the different requirements by the user community, a combination of various pixel technologies is foreseen. In this report the design of this even more flexible telescope with three different pixel technologies (TimePix, Mimosa, ATLAS FE-I4) will be presented. First test beam results with the HitOR signal provided by the FE-I4 integrated into the trigger...

Harmonics rejection in pixelated interferograms using spatio-temporal demodulation.

Science.gov (United States)

Padilla, J M; Servin, M; Estrada, J C

2011-09-26

Pixelated phase-mask interferograms have become an industry standard in spatial phase-shifting interferometry. These pixelated interferograms allow full wavefront encoding using a single interferogram. This allows the study of fast dynamic events in hostile mechanical environments. Recently an error-free demodulation method for ideal pixelated interferograms was proposed. However, non-ideal conditions in interferometry may arise due to non-linear response of the CCD camera, multiple light paths in the interferometer, etc. These conditions generate non-sinusoidal fringes containing harmonics which degrade the phase estimation. Here we show that two-dimensional Fourier demodulation of pixelated interferograms rejects most harmonics except the complex ones at {-3(rd), +5(th), -7(th), +9(th), -11(th),…}. We propose temporal phase-shifting to remove these remaining harmonics. In particular, a 2-step phase-shifting algorithm is used to eliminate the -3(rd) and +5(th) complex harmonics, while a 3-step one is used to remove the -3(rd), +5harmonics. © 2011 Optical Society of America

Field-portable pixel super-resolution colour microscope.

Directory of Open Access Journals (Sweden)

Alon Greenbaum

Full Text Available Based on partially-coherent digital in-line holography, we report a field-portable microscope that can render lensfree colour images over a wide field-of-view of e.g., >20 mm(2. This computational holographic microscope weighs less than 145 grams with dimensions smaller than 17×6×5 cm, making it especially suitable for field settings and point-of-care use. In this lensfree imaging design, we merged a colorization algorithm with a source shifting based multi-height pixel super-resolution technique to mitigate 'rainbow' like colour artefacts that are typical in holographic imaging. This image processing scheme is based on transforming the colour components of an RGB image into YUV colour space, which separates colour information from brightness component of an image. The resolution of our super-resolution colour microscope was characterized using a USAF test chart to confirm sub-micron spatial resolution, even for reconstructions that employ multi-height phase recovery to handle dense and connected objects. To further demonstrate the performance of this colour microscope Papanicolaou (Pap smears were also successfully imaged. This field-portable and wide-field computational colour microscope could be useful for tele-medicine applications in resource poor settings.

50 μm pixel pitch wafer-scale CMOS active pixel sensor x-ray detector for digital breast tomosynthesis.

Science.gov (United States)

Zhao, C; Konstantinidis, A C; Zheng, Y; Anaxagoras, T; Speller, R D; Kanicki, J

2015-12-07

Wafer-scale CMOS active pixel sensors (APSs) have been developed recently for x-ray imaging applications. The small pixel pitch and low noise are very promising properties for medical imaging applications such as digital breast tomosynthesis (DBT). In this work, we evaluated experimentally and through modeling the imaging properties of a 50 μm pixel pitch CMOS APS x-ray detector named DynAMITe (Dynamic Range Adjustable for Medical Imaging Technology). A modified cascaded system model was developed for CMOS APS x-ray detectors by taking into account the device nonlinear signal and noise properties. The imaging properties such as modulation transfer function (MTF), noise power spectrum (NPS), and detective quantum efficiency (DQE) were extracted from both measurements and the nonlinear cascaded system analysis. The results show that the DynAMITe x-ray detector achieves a high spatial resolution of 10 mm(-1) and a DQE of around 0.5 at spatial frequencies  CMOS APS x-ray detector, image aquisition geometry and image reconstruction techniques should be considered.

A silicon pixel detector with routing for external VLSI read-out

International Nuclear Information System (INIS)

Thomas, S.L.; Seller, P.

1988-07-01

A silicon pixel detector with an array of 32 by 16 hexagonal pixels has been designed and is being built on high resistivity silicon. The detector elements are reverse biased diodes consisting of p-implants in an n-type substrate and are fully depleted from the front to the back of the wafer. They are intended to measure high energy ionising particles traversing the detector. The detailed design of the pixels, their layout and method of read-out are discussed. A number of test structures have been incorporated onto the wafer to enable measurements to be made on individual pixels together with a variety of active devices. The results will give a better understanding of the operation of the pixel array, and will allow testing of computer simulations of more elaborate structures for the future. (author)

Chandra ACIS Sub-pixel Resolution

Science.gov (United States)

Kim, Dong-Woo; Anderson, C. S.; Mossman, A. E.; Allen, G. E.; Fabbiano, G.; Glotfelty, K. J.; Karovska, M.; Kashyap, V. L.; McDowell, J. C.

2011-05-01

We investigate how to achieve the best possible ACIS spatial resolution by binning in ACIS sub-pixel and applying an event repositioning algorithm after removing pixel-randomization from the pipeline data. We quantitatively assess the improvement in spatial resolution by (1) measuring point source sizes and (2) detecting faint point sources. The size of a bright (but no pile-up), on-axis point source can be reduced by about 20-30%. With the improve resolution, we detect 20% more faint sources when embedded on the extended, diffuse emission in a crowded field. We further discuss the false source rate of about 10% among the newly detected sources, using a few ultra-deep observations. We also find that the new algorithm does not introduce a grid structure by an aliasing effect for dithered observations and does not worsen the positional accuracy

Active pixel sensor with intra-pixel charge transfer

Science.gov (United States)

Fossum, Eric R. (Inventor); Mendis, Sunetra (Inventor); Kemeny, Sabrina E. (Inventor)

2004-01-01

An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node.

Optimization of CMOS image sensor utilizing variable temporal multisampling partial transfer technique to achieve full-frame high dynamic range with superior low light and stop motion capability

Science.gov (United States)

Kabir, Salman; Smith, Craig; Armstrong, Frank; Barnard, Gerrit; Schneider, Alex; Guidash, Michael; Vogelsang, Thomas; Endsley, Jay

2018-03-01

Differential binary pixel technology is a threshold-based timing, readout, and image reconstruction method that utilizes the subframe partial charge transfer technique in a standard four-transistor (4T) pixel CMOS image sensor to achieve a high dynamic range video with stop motion. This technology improves low light signal-to-noise ratio (SNR) by up to 21 dB. The method is verified in silicon using a Taiwan Semiconductor Manufacturing Company's 65 nm 1.1 μm pixel technology 1 megapixel test chip array and is compared with a traditional 4 × oversampling technique using full charge transfer to show low light SNR superiority of the presented technology.

Pixel detector readout chip

CERN Multimedia

1991-01-01

Close-up of a pixel detector readout chip. The photograph shows an aera of 1 mm x 2 mm containing 12 separate readout channels. The entire chip contains 1000 readout channels (around 80 000 transistors) covering a sensitive area of 8 mm x 5 mm. The chip has been mounted on a silicon detector to detect high energy particles.

Pixelated camouflage patterns from the perspective of hyperspectral imaging

Science.gov (United States)

Racek, František; Jobánek, Adam; Baláž, Teodor; Krejčí, Jaroslav

2016-10-01

Pixelated camouflage patterns fulfill the role of both principles the matching and the disrupting that are exploited for blending the target into the background. It means that pixelated pattern should respect natural background in spectral and spatial characteristics embodied in micro and macro patterns. The HS imaging plays the similar, however the reverse role in the field of reconnaissance systems. The HS camera fundamentally records and extracts both the spectral and spatial information belonging to the recorded scenery. Therefore, the article deals with problems of hyperspectral (HS) imaging and subsequent processing of HS images of pixelated camouflage patterns which are among others characterized by their specific spatial frequency heterogeneity.

Planar sensors for the upgrade of the CMS pixel detector

International Nuclear Information System (INIS)

Rohe, T.; Bean, A.; Radicci, V.; Sibille, J.

2011-01-01

A replacement of the present CMS pixel detector with a better performing light weight four-layer system is foreseen in 2016. In the lifetime of this new system the LHC will reach and exceed its nominal luminosity of 10 34 cm -2 s -1 . Therefore the radiation hardness of all parts of the pixel system has to be reviewed. For the construction of the much larger four-layer pixel system, the replacement of the present double sided sensors by much cheaper single sided ones is considered. However, the construction of pixel modules with such sensors is challenging due to the small geometrical distance of the sensor high voltage and the ground of the readout electronics. This small distance limits the sensor bias to about 500 V in the tested samples.

Argus: A W-band 16-pixel focal plane array for the Green Bank Telescope

Science.gov (United States)

Devaraj, Kiruthika; Church, Sarah; Cleary, Kieran; Frayer, David; Gawande, Rohit; Goldsmith, Paul; Gundersen, Joshua; Harris, Andrew; Kangaslahti, Pekka; Readhead, Tony; Reeves, Rodrigo; Samoska, Lorene; Sieth, Matt; Voll, Patricia

2015-05-01

We are building Argus, a 16-pixel square-packed focal plane array that will cover the 75-115.3 GHz frequency range on the Robert C. Byrd Green Bank Telescope (GBT). The primary research area for Argus is the study of star formation within our Galaxy and nearby galaxies. Argus will map key molecules that trace star formation, including carbon monoxide (CO) and hydrogen cyanide (HCN). An additional key science area is astrochemistry, which will be addressed by observing complex molecules in the interstellar medium, and the study of formation of solar systems, which will be addressed by identifying dense pre-stellar cores and by observing comets in our solar system. Argus has a highly scalable architecture and will be a technology path finder for larger arrays. The array is modular in construction, which will allow easy replacement of malfunctioning and poorly performing components.

Parallel encoders for pixel detectors

International Nuclear Information System (INIS)

Nikityuk, N.M.

1991-01-01

A new method of fast encoding and determining the multiplicity and coordinates of fired pixels is described. A specific example construction of parallel encodes and MCC for n=49 and t=2 is given. 16 refs.; 6 figs.; 2 tabs

Operational Experience with the CMS Pixel Detector

CERN Document Server

INSPIRE-00205212

2015-05-15

In the first LHC running period the CMS-pixel detector had to face various operational challenges and had to adapt to the rapidly changing beam conditions. In order to maximize the physics potential and the quality of the data, online and offline calibrations were performed on a regular basis. The detector performed excellently with an average hit efficiency above 99\\% for all layers and disks. In this contribution the operational challenges of the silicon pixel detector in the first LHC run and the current long shutdown are summarized and the expectations for 2015 are discussed.

Technology development for SOI monolithic pixel detectors

International Nuclear Information System (INIS)

Marczewski, J.; Domanski, K.; Grabiec, P.; Grodner, M.; Jaroszewicz, B.; Kociubinski, A.; Kucharski, K.; Tomaszewski, D.; Caccia, M.; Kucewicz, W.; Niemiec, H.

2006-01-01

A monolithic detector of ionizing radiation has been manufactured using silicon on insulator (SOI) wafers with a high-resistivity substrate. In our paper the integration of a standard 3 μm CMOS technology, originally designed for bulk devices, with fabrication of pixels in the bottom wafer of a SOI substrate is described. Both technological sequences have been merged minimizing thermal budget and providing suitable properties of all the technological layers. The achieved performance proves that fully depleted monolithic active pixel matrix might be a viable option for a wide spectrum of future applications

Study of FPGA and GPU based pixel calibration for ATLAS IBL

CERN Document Server

Dopke, J; The ATLAS collaboration; Flick, T; Gabrielli, A; Grosse-Knetter, J; Krieger, N; Kugel, A; Polini, A; Schroer, N

2010-01-01

The insertable B-layer (IBL) is a new stage of the ATLAS pixel detector to be installed around 2014. 12 million pixel are attached to new FE-I4 readout ASICs, each controlling 26680 pixel. Compared to the existing FE-I3 based detector the new system features higher readout speed of 160Mbit/s per ASIC and simplified control. For calibration defined charges are applied to all pixels and the resulting time-over-threshold values are evaluated. In the present system multiple sets of two custom VME cards which employ a combination of FPGA and DSP technology are used for I/O interfacing, formatting and processing. The execution time of 51s to perform a threshold scan on a FE-I3 module of 46080 pixel is composed of 8s control, 29s transfer, 7.5s histogramming and 7s analysis. Extrapolating to FE-I4 the times per module of 53760 pixels are 12ms, 5.8s, 9.4s and 8.3s, a total of 23.5s. We present a proposal for a novel approach to the dominant tasks for FE-I4: histogramming and ananlysis. An FPGA-based histogramming uni...

ATLAS Pixel IBL: Stave Quality Assurance

CERN Document Server

The ATLAS collaboration

2014-01-01

For Run 2 of the LHC a fourth innermost Pixel Detector layer on a smaller radius beam pipe has been installed in the ATLAS Detector to add redundancy against radiation damage of the current Pixel Detector and to ensure a high quality tracking and b-tagging performance of the Inner Detector over the coming years until the High Luminosity Upgrade. State of the art components have been produced and assembled onto support structures known as staves over the last two years. In total, 20 staves have been built and qualified in a designated Quality Assurance setup at CERN of which 14 have been integrated onto the beam pipe. Results from the testing are presented.

Fully integrated CMOS pixel detector for high energy particles

International Nuclear Information System (INIS)

Vanstraelen, G.; Debusschere, I.; Claeys, C.; Declerck, G.

1989-01-01

A novel type of position and energy sensitive, monolithic pixel array with integrated readout electronics is proposed. Special features of the design are a reduction of the number of output channels and of the amount of output data, and the use of transistors on the high resistivity silicon. The number of output channels for the detector array is reduced by handling in parallel a number of pixels, chosen as a function of the time resolution required for the system, and by the use of an address decoder. A further reduction of data is achieved by reading out only those pixels which have been activated. The pixel detector circuit will be realized in a 3 μm p-well CMOS process, which is optimized for the full integration of readout electronics and detector diodes on high resistivity Si. A retrograde well is formed by means of a high energy implantation, followed by the appropriate temperature steps. The optimization of the well shape takes into account the high substrate bias applied during the detector operation. The design is largely based on the use of MOS transistors on the high resistivity silicon itself. These have proven to perform as well as transistors on standard doped substrate. The basic building elements as well as the design strategy of the integrated pixel detector are presented in detail. (orig.)

Partial wave analysis using graphics processing units

Energy Technology Data Exchange (ETDEWEB)

Berger, Niklaus; Liu Beijiang; Wang Jike, E-mail: nberger@ihep.ac.c [Institute of High Energy Physics, Chinese Academy of Sciences, 19B Yuquan Lu, Shijingshan, 100049 Beijing (China)

2010-04-01

Partial wave analysis is an important tool for determining resonance properties in hadron spectroscopy. For large data samples however, the un-binned likelihood fits employed are computationally very expensive. At the Beijing Spectrometer (BES) III experiment, an increase in statistics compared to earlier experiments of up to two orders of magnitude is expected. In order to allow for a timely analysis of these datasets, additional computing power with short turnover times has to be made available. It turns out that graphics processing units (GPUs) originally developed for 3D computer games have an architecture of massively parallel single instruction multiple data floating point units that is almost ideally suited for the algorithms employed in partial wave analysis. We have implemented a framework for tensor manipulation and partial wave fits called GPUPWA. The user writes a program in pure C++ whilst the GPUPWA classes handle computations on the GPU, memory transfers, caching and other technical details. In conjunction with a recent graphics processor, the framework provides a speed-up of the partial wave fit by more than two orders of magnitude compared to legacy FORTRAN code.

1T Pixel Using Floating-Body MOSFET for CMOS Image Sensors

Directory of Open Access Journals (Sweden)

Guo-Neng Lu

2009-01-01

Full Text Available We present a single-transistor pixel for CMOS image sensors (CIS. It is a floating-body MOSFET structure, which is used as photo-sensing device and source-follower transistor, and can be controlled to store and evacuate charges. Our investigation into this 1T pixel structure includes modeling to obtain analytical description of conversion gain. Model validation has been done by comparing theoretical predictions and experimental results. On the other hand, the 1T pixel structure has been implemented in different configurations, including rectangular-gate and ring-gate designs, and variations of oxidation parameters for the fabrication process. The pixel characteristics are presented and discussed.

1T Pixel Using Floating-Body MOSFET for CMOS Image Sensors.

Science.gov (United States)

Lu, Guo-Neng; Tournier, Arnaud; Roy, François; Deschamps, Benoît

2009-01-01

We present a single-transistor pixel for CMOS image sensors (CIS). It is a floating-body MOSFET structure, which is used as photo-sensing device and source-follower transistor, and can be controlled to store and evacuate charges. Our investigation into this 1T pixel structure includes modeling to obtain analytical description of conversion gain. Model validation has been done by comparing theoretical predictions and experimental results. On the other hand, the 1T pixel structure has been implemented in different configurations, including rectangular-gate and ring-gate designs, and variations of oxidation parameters for the fabrication process. The pixel characteristics are presented and discussed.

Multiple-Channel Security Architecture and its Implementation over SSL

Directory of Open Access Journals (Sweden)

Song Yong

2006-01-01

Full Text Available This paper presents multiple-channel SSL (MC-SSL, an architecture and protocol for protecting client-server communications. In contrast to SSL, which provides a single end-to-end secure channel, MC-SSL enables applications to employ multiple channels, each with its own cipher suite and data-flow direction. Our approach also allows for several partially trusted application proxies. The main advantages of MC-SSL over SSL are (a support for end-to-end security in the presence of partially trusted proxies, and (b selective data protection for achieving computational efficiency important to resource-constrained clients and heavily loaded servers.

Pixel-by-pixel analysis of DCE-MRI curve shape patterns in knees of active and inactive juvenile idiopathic arthritis patients

International Nuclear Information System (INIS)

Hemke, Robert; Lavini, Cristina; Maas, Mario; Nusman, Charlotte M.; Berg, J.M. van den; Schonenberg-Meinema, Dieneke; Kuijpers, Taco W.; Dolman, Koert M.; Rossum, Marion A.J. van

2014-01-01

To compare DCE-MRI parameters and the relative number of time-intensity curve (TIC) shapes as derived from pixel-by-pixel DCE-MRI TIC shape analysis between knees of clinically active and inactive juvenile idiopathic arthritis (JIA) patients. DCE-MRI data sets were prospectively obtained. Patients were classified into two clinical groups: active disease (n = 43) and inactive disease (n = 34). Parametric maps, showing seven different TIC shape types, were created per slice. Statistical measures of different TIC shapes, maximal enhancement (ME), maximal initial slope (MIS), initial area under the curve (iAUC), time-to-peak (TTP), enhancing volume (EV), volume transfer constant (K trans ), extravascular space fractional volume (V e ) and reverse volume transfer constant (k ep ) of each voxel were calculated in a three-dimensional volume-of-interest of the synovial membrane. Imaging findings from 77 JIA patients were analysed. Significantly higher numbers of TIC shape 4 (P = 0.008), median ME (P = 0.015), MIS (P = 0.001) and iAUC (P = 0.002) were observed in clinically active compared with inactive patients. TIC shape 5 showed higher presence in the clinically inactive patients (P = 0.036). The pixel-by-pixel DCE-MRI TIC shape analysis method proved capable of differentiating clinically active from inactive JIA patients by the difference in the number of TIC shapes, as well as the descriptive parameters ME, MIS and iAUC. (orig.)

Noise Originating from Intra-pixel Structure and Satellite Attitude Jitter on COROT

DEFF Research Database (Denmark)

Karoff, Christoffer; Arentoft, Torben; Kjeldsen, Hans

2006-01-01

We present a study on noise in space-based photometry originating from sensitivity variations within individual pixels, known as intra-pixel variations, and satellite attitude jitter. We have measured the intra-pixel structure on an e2v 47-20 CCD and made simulations of the effects these structur...

The ATLAS Pixel Detector operation and performance

CERN Document Server

Andreazza, A; The ATLAS collaboration

2010-01-01

The ATLAS Pixel Detector is the innermost detector of the ATLAS experiment at the Large Hadron Collider at CERN. It consists of 1744 silicon sensors equipped with approximately $80 imes 10^6$~electronic channels, providing typically three measurement points with high resolution for particles emerging from the beam-interaction region. The complete Pixel Detector has been taking part in cosmic-ray data-taking since 2008. Since November 2009 it has been operated with LHC colliding beams at $sqrt{s}=900$~GeV, 2.36~TeV and 7 TeV. The detector operated with an active fraction of 97.2% at a threshold of 3500~$e$, showing a noise occupancy rate better than $10^{-9}$~hit/pixel/BC and a track association efficiency of 99%. The Lorentz angle for electrons in silicon is measured to be $ heta_mathrm{L}=12.11^circ pm 0.09^circ$ and its temperature dependence has been verified. The pulse height information from the time-over-threshold technique allows to improve the point resolution using charge sharing and to perform parti...

ATLAS ITk and new pixel sensors technologies

CERN Document Server

Gaudiello, A

2016-01-01

During the 2023–2024 shutdown, the Large Hadron Collider (LHC) will be upgraded to reach an instantaneous luminosity up to 7×10$^{34}$ cm$^{−2}$s$^{−1}$. This upgrade of the accelerator is called High-Luminosity LHC (HL-LHC). The ATLAS detector will be changed to meet the challenges of HL-LHC: an average of 200 pile-up events in every bunch crossing, and an integrated luminosity of 3000 fb $^{−1}$ over ten years. The HL-LHC luminosity conditions are too extreme for the current silicon (pixel and strip) detectors and straw tube transition radiation tracker (TRT) of the current ATLAS tracking system. Therefore the ATLAS inner tracker is being completely rebuilt for data-taking and the new system is called Inner Tracker (ITk). During this upgrade the TRT will be removed in favor of an all-new all-silicon tracker composed only by strip and pixel detectors. An overview of new layouts in study will be reported and the new pixel sensor technologies in development will be explained.

ATLAS Pixel Detector Design For HL-LHC

CERN Document Server

Smart, Ben; The ATLAS collaboration

2016-01-01

The ATLAS Inner Detector will be replaced for the High-Luminosity LHC (HL-LHC) running in 2026. The new Inner Detector will be called the Inner Tracker (ITk). The ITk will cover an extended eta-range: at least to |eta|<3.2, and likely up to |eta|<4.0. The ITk will be an all-Silicon based detector, consisting of a Silicon strip detector outside of a radius of 362mm, and a Silicon pixel detector inside of this radius. Several novel designs are being considered for the ITk pixel detector, to cope with high-eta charged particle tracks. These designs are grouped into 'extended' and 'inclined' design-types. Extended designs have long pixel staves with sensors parallel to the beamline. High-eta particles will therefore hit these sensors at shallow angles, leaving elongated charge clusters. The length of such a charge cluster can be used to estimate the angle of the passing particle. This information can then be used in track reconstruction to improve tracking efficiency and reduce fake rates. Inclined designs ...

Information quantity in a pixel of digital image

OpenAIRE

Kharinov, M.

2014-01-01

The paper is devoted to the problem of integer-valued estimating of information quantity in a pixel of digital image. The definition of an integer estimation of information quantity based on constructing of the certain binary hierarchy of pixel clusters is proposed. The methods for constructing hierarchies of clusters and generating of hierarchical sequences of image approximations that minimally differ from the image by a standard deviation are developed. Experimental results on integer-valu...

Photovoltaic Pixels for Neural Stimulation: Circuit Models and Performance.

Science.gov (United States)

Boinagrov, David; Lei, Xin; Goetz, Georges; Kamins, Theodore I; Mathieson, Keith; Galambos, Ludwig; Harris, James S; Palanker, Daniel

2016-02-01

Photovoltaic conversion of pulsed light into pulsed electric current enables optically-activated neural stimulation with miniature wireless implants. In photovoltaic retinal prostheses, patterns of near-infrared light projected from video goggles onto subretinal arrays of photovoltaic pixels are converted into patterns of current to stimulate the inner retinal neurons. We describe a model of these devices and evaluate the performance of photovoltaic circuits, including the electrode-electrolyte interface. Characteristics of the electrodes measured in saline with various voltages, pulse durations, and polarities were modeled as voltage-dependent capacitances and Faradaic resistances. The resulting mathematical model of the circuit yielded dynamics of the electric current generated by the photovoltaic pixels illuminated by pulsed light. Voltages measured in saline with a pipette electrode above the pixel closely matched results of the model. Using the circuit model, our pixel design was optimized for maximum charge injection under various lighting conditions and for different stimulation thresholds. To speed discharge of the electrodes between the pulses of light, a shunt resistor was introduced and optimized for high frequency stimulation.

CMOS monolithic active pixel sensors for high energy physics

Energy Technology Data Exchange (ETDEWEB)

Snoeys, W., E-mail: walter.snoeys@cern.ch

2014-11-21

Monolithic pixel detectors integrating sensor matrix and readout in one piece of silicon are only now starting to make their way into high energy physics. Two major requirements are radiation tolerance and low power consumption. For the most extreme radiation levels, signal charge has to be collected by drift from a depletion layer onto a designated collection electrode without losing the signal charge elsewhere in the in-pixel circuit. Low power consumption requires an optimization of Q/C, the ratio of the collected signal charge over the input capacitance [1]. Some solutions to combine sufficient Q/C and collection by drift require exotic fabrication steps. More conventional solutions up to now require a simple in-pixel readout circuit. Both high voltage CMOS technologies and Monolithic Active Pixel Sensors (MAPS) technologies with high resistivity epitaxial layers offer high voltage diodes. The choice between the two is not fundamental but more a question of how much depletion can be reached and also of availability and cost. This paper tries to give an overview.

Geneva University: Pixel Detectors – trends and options for the future

CERN Multimedia

Geneva University

2012-01-01

GENEVA UNIVERSITY École de physique Département de physique nucléaire et corspusculaire 24, quai Ernest-Ansermet 1211 Genève 4 Tél.: (022) 379 62 73 Fax: (022) 379 69 92   Wednesday 25 April 2012 SEMINAIRE DE PHYSIQUE CORPUSCULAIRE Science III, Auditoire 1S081 30Science III, Auditoire 1S081 30 Pixel Detectors – trends and options for the future Prof. Norbert Wermes - University of Bonn  Pixel detectors have been invented in the early 90s with the advancement of micro technologies. With the advent of the LHC, big vertex detectors have demonstrated that the pixel detector type is holding many of the promises it had made before. Meanwhile new, different or just improved variants of the pixel technology are being studied for their suitability for future experiments or experiment upgrades. The talk will address the various pro's and con's comparing hybrid and monolithic pixel technologies and their su...

Neural network based cluster creation in the ATLAS silicon pixel detector

CERN Document Server

Selbach, K E; The ATLAS collaboration

2012-01-01

The read-out from individual pixels on planar semi-conductor sensors are grouped into clusters to reconstruct the location where a charged particle passed through the sensor. The resolution given by individual pixel sizes is significantly improved by using the information from the charge sharing between pixels. Such analog cluster creation techniques have been used by the ATLAS experiment for many years to obtain an excellent performance. However, in dense environments, such as those inside high-energy jets, clusters have an increased probability of merging the charge deposited by multiple particles. Recently, a neural network based algorithm which estimates both the cluster position and whether a cluster should be split has been developed for the ATLAS pixel detector. The algorithm significantly reduces ambiguities in the assignment of pixel detector measurement to tracks within jets and improves the position accuracy with respect to standard interpolation techniques by taking into account the 2-dimensional ...

Neural network based cluster creation in the ATLAS silicon Pixel Detector

CERN Document Server

Andreazza, A; The ATLAS collaboration

2013-01-01

The read-out from individual pixels on planar semi-conductor sensors are grouped into clusters to reconstruct the location where a charged particle passed through the sensor. The resolution given by individual pixel sizes is significantly improved by using the information from the charge sharing between pixels. Such analog cluster creation techniques have been used by the ATLAS experiment for many years to obtain an excellent performance. However, in dense environments, such as those inside high-energy jets, clusters have an increased probability of merging the charge deposited by multiple particles. Recently, a neural network based algorithm which estimates both the cluster position and whether a cluster should be split has been developed for the ATLAS Pixel Detector. The algorithm significantly reduces ambiguities in the assignment of pixel detector measurement to tracks within jets and improves the position accuracy with respect to standard interpolation techniques by taking into account the 2-dimensional ...

Pixel front-end development in 65 nm CMOS technology

International Nuclear Information System (INIS)

Havránek, M; Hemperek, T; Kishishita, T; Krüger, H; Wermes, N

2014-01-01

Luminosity upgrade of the LHC (HL-LHC) imposes severe constraints on the detector tracking systems in terms of radiation hardness and capability to cope with higher hit rates. One possible way of keeping track with increasing luminosity is the usage of more advanced technologies. Ultra deep sub-micron CMOS technologies allow a design of complex and high speed electronics with high integration density. In addition, these technologies are inherently radiation hard. We present a prototype of analog pixel front-end integrated circuit designed in 65 nm CMOS technology with applications oriented towards the ATLAS Pixel Detector upgrade. The aspects of ultra deep sub-micron design and performance of the analog pixel front-end circuits will be discussed

Design and implementation of 3D LIDAR based on pixel-by-pixel scanning and DS-OCDMA

Science.gov (United States)

Kim, Gunzung; Eom, Jeongsook; Park, Yongwan

2017-02-01

We designed a prototype for testing feasibility of a proposed light detection and ranging (LIDAR) system, which was designed to encode pixel location information in its laser pulses using the direct-sequence optical code division multiple access method in conjunction with a scanning-based microelectromechanical system (MEMS) mirror. The prototype was built using commercial o -the-shelf optical components and development kits. It comprised of an optical modulator, an amplified photodetector, an MEMS mirror development kit, an analog-to-digital converter evaluation module, a digital signal processor with ARM evaluation kit and a Windows personal computer. The prototype LIDAR system has capable of acquiring 120 x 32-pixel images at 5 frames/s. We measured a watering pot to demonstrate the imaging performance of the prototype LIDAR system.

Investigation of photon counting pixel detectors for X-ray spectroscopy and imaging

Energy Technology Data Exchange (ETDEWEB)

Talla, Patrick Takoukam

2011-04-07

The Medipix2 and Medipix3 detectors are hybrid pixelated photon counting detectors with a pixel pitch of 55 {mu}m. The sensor material used in this thesis was silicon. Because of their small pixel size they suffer from charge sharing i.e. an incoming photon can be registered by more than one pixel. In order to correct for charge sharing due to lateral diffusion of charge carriers, the Medipix3 detector was developed: with its Charge Summing Mode, the charge collected in a cluster of 2 x 2 pixel is added up and attributed to only one pixel whose counter is incremented. The adjustable threshold of the detectors allows to count the photons and to gain information on their energy. The main purposes of the thesis are to investigate spectral and imaging properties of pixelated photon counting detectors from the Medipix family such as Medipix2 and Medipix3. The investigations are based on simulations and measurements. In order to investigate the spectral properties of the detectors measurements were performed using fluorescence lines of materials such as molybdenum, silver but also some radioactive sources such as Am-241 or Cd-109. From the measured data, parameters like the threshold dispersion and the gain variation from pixel-to-pixel were extracted and used as input in the Monte Carlo code ROSI to model the responses of the detector to monoenergetic photons. The measured data are well described by the simulations for Medipix2 and for Medipix3 operating in Charge Summing Mode. Due to charge sharing and due to the energy dependence of attenuation processes in silicon and to Compton scattering the incoming and the measured spectrum differ substantially from each other. Since the responses to monoenergetic photons are known, a deconvolution was performed to determine the true incoming spectrum. Several direct and iterative methods were successfully applied on measured and simulated data of an X-ray tube and radioactive sources. The knowledge of the X-ray spectrum is

Investigation of photon counting pixel detectors for X-ray spectroscopy and imaging

International Nuclear Information System (INIS)

Talla, Patrick Takoukam

2011-01-01

The Medipix2 and Medipix3 detectors are hybrid pixelated photon counting detectors with a pixel pitch of 55 μm. The sensor material used in this thesis was silicon. Because of their small pixel size they suffer from charge sharing i.e. an incoming photon can be registered by more than one pixel. In order to correct for charge sharing due to lateral diffusion of charge carriers, the Medipix3 detector was developed: with its Charge Summing Mode, the charge collected in a cluster of 2 x 2 pixel is added up and attributed to only one pixel whose counter is incremented. The adjustable threshold of the detectors allows to count the photons and to gain information on their energy. The main purposes of the thesis are to investigate spectral and imaging properties of pixelated photon counting detectors from the Medipix family such as Medipix2 and Medipix3. The investigations are based on simulations and measurements. In order to investigate the spectral properties of the detectors measurements were performed using fluorescence lines of materials such as molybdenum, silver but also some radioactive sources such as Am-241 or Cd-109. From the measured data, parameters like the threshold dispersion and the gain variation from pixel-to-pixel were extracted and used as input in the Monte Carlo code ROSI to model the responses of the detector to monoenergetic photons. The measured data are well described by the simulations for Medipix2 and for Medipix3 operating in Charge Summing Mode. Due to charge sharing and due to the energy dependence of attenuation processes in silicon and to Compton scattering the incoming and the measured spectrum differ substantially from each other. Since the responses to monoenergetic photons are known, a deconvolution was performed to determine the true incoming spectrum. Several direct and iterative methods were successfully applied on measured and simulated data of an X-ray tube and radioactive sources. The knowledge of the X-ray spectrum is

CMOS Active-Pixel Image Sensor With Simple Floating Gates

Science.gov (United States)

Fossum, Eric R.; Nakamura, Junichi; Kemeny, Sabrina E.

1996-01-01

Experimental complementary metal-oxide/semiconductor (CMOS) active-pixel image sensor integrated circuit features simple floating-gate structure, with metal-oxide/semiconductor field-effect transistor (MOSFET) as active circuit element in each pixel. Provides flexibility of readout modes, no kTC noise, and relatively simple structure suitable for high-density arrays. Features desirable for "smart sensor" applications.

Performance Studies of Pixel Hybrid Photon Detectors for the LHCb RICH Counters

CERN Document Server

Aglieri Rinella, G; Piedigrossi, D; Van Lysebetten, A

2004-01-01

The Pixel Hybrid Photon Detector is a vacuum tube with a multi-alkali photo cathode, high voltage cross-focused electron optics and an anode consisting of a silicon pixel detector bump-bonded to a readout CMOS electronic chip fully encapsulated in the device. The Pixel HPD fulfils the requirements of the Ring Imaging Cherenkov counters of the LHCb experiment at LHC. The performances of the Pixel HPD will be discussed with reference to laboratory measurements, Cherenkov light imaging in recent beam tests, image distortions due to a magnetic field.

PET image reconstruction with rotationally symmetric polygonal pixel grid based highly compressible system matrix

International Nuclear Information System (INIS)

Yu Yunhan; Xia Yan; Liu Yaqiang; Wang Shi; Ma Tianyu; Chen Jing; Hong Baoyu

2013-01-01

To achieve a maximum compression of system matrix in positron emission tomography (PET) image reconstruction, we proposed a polygonal image pixel division strategy in accordance with rotationally symmetric PET geometry. Geometrical definition and indexing rule for polygonal pixels were established. Image conversion from polygonal pixel structure to conventional rectangular pixel structure was implemented using a conversion matrix. A set of test images were analytically defined in polygonal pixel structure, converted to conventional rectangular pixel based images, and correctly displayed which verified the correctness of the image definition, conversion description and conversion of polygonal pixel structure. A compressed system matrix for PET image recon was generated by tap model and tested by forward-projecting three different distributions of radioactive sources to the sinogram domain and comparing them with theoretical predictions. On a practical small animal PET scanner, a compress ratio of 12.6:1 of the system matrix size was achieved with the polygonal pixel structure, comparing with the conventional rectangular pixel based tap-mode one. OS-EM iterative image reconstruction algorithms with the polygonal and conventional Cartesian pixel grid were developed. A hot rod phantom was detected and reconstructed based on these two grids with reasonable time cost. Image resolution of reconstructed images was both 1.35 mm. We conclude that it is feasible to reconstruct and display images in a polygonal image pixel structure based on a compressed system matrix in PET image reconstruction. (authors)

Real-time generation of images with pixel-by-pixel spectra for a coded aperture imager with high spectral resolution

International Nuclear Information System (INIS)

Ziock, K.P.; Burks, M.T.; Craig, W.; Fabris, L.; Hull, E.L.; Madden, N.W.

2003-01-01

The capabilities of a coded aperture imager are significantly enhanced when a detector with excellent energy resolution is used. We are constructing such an imager with a 1.1 cm thick, crossed-strip, planar detector which has 38 strips of 2 mm pitch in each dimension followed by a large coaxial detector. Full value from this system is obtained only when the images are 'fully deconvolved' meaning that the energy spectrum is available from each pixel in the image. The large number of energy bins associated with the spectral resolution of the detector, and the fixed pixel size, present significant computational challenges in generating an image in a timely manner at the conclusion of a data acquisition. The long computation times currently preclude the generation of intermediate images during the acquisition itself. We have solved this problem by building the images on-line as each event comes in using pre-imaged arrays of the system response. The generation of these arrays and the use of fractional mask-to-detector pixel sampling is discussed

3D track reconstruction capability of a silicon hybrid active pixel detector

Energy Technology Data Exchange (ETDEWEB)

Bergmann, Benedikt; Pichotka, Martin; Pospisil, Stanislav; Vycpalek, Jiri [Czech Technical University in Prague, Institute of Experimental and Applied Physics, Praha (Czech Republic); Burian, Petr; Broulim, Pavel [Czech Technical University in Prague, Institute of Experimental and Applied Physics, Praha (Czech Republic); University of West Bohemia, Faculty of Electrical Engineering, Pilsen (Czech Republic); Jakubek, Jan [Advacam s.r.o., Praha (Czech Republic)

2017-06-15

Timepix3 detectors are the latest generation of hybrid active pixel detectors of the Medipix/Timepix family. Such detectors consist of an active sensor layer which is connected to the readout ASIC (application specific integrated circuit), segmenting the detector into a square matrix of 256 x 256 pixels (pixel pitch 55 μm). Particles interacting in the active sensor material create charge carriers, which drift towards the pixelated electrode, where they are collected. In each pixel, the time of the interaction (time resolution 1.56 ns) and the amount of created charge carriers are measured. Such a device was employed in an experiment in a 120 GeV/c pion beam. It is demonstrated, how the drift time information can be used for ''4D'' particle tracking, with the three spatial dimensions and the energy losses along the particle trajectory (dE/dx). Since the coordinates in the detector plane are given by the pixelation (x,y), the x- and y-resolution is determined by the pixel pitch (55 μm). A z-resolution of 50.4 μm could be achieved (for a 500 μm thick silicon sensor at 130 V bias), whereby the drift time model independent z-resolution was found to be 28.5 μm. (orig.)

3D track reconstruction capability of a silicon hybrid active pixel detector

Science.gov (United States)

Bergmann, Benedikt; Pichotka, Martin; Pospisil, Stanislav; Vycpalek, Jiri; Burian, Petr; Broulim, Pavel; Jakubek, Jan

2017-06-01

Timepix3 detectors are the latest generation of hybrid active pixel detectors of the Medipix/Timepix family. Such detectors consist of an active sensor layer which is connected to the readout ASIC (application specific integrated circuit), segmenting the detector into a square matrix of 256 × 256 pixels (pixel pitch 55 μm). Particles interacting in the active sensor material create charge carriers, which drift towards the pixelated electrode, where they are collected. In each pixel, the time of the interaction (time resolution 1.56 ns) and the amount of created charge carriers are measured. Such a device was employed in an experiment in a 120 GeV/c pion beam. It is demonstrated, how the drift time information can be used for "4D" particle tracking, with the three spatial dimensions and the energy losses along the particle trajectory (dE/dx). Since the coordinates in the detector plane are given by the pixelation ( x, y), the x- and y-resolution is determined by the pixel pitch (55 μm). A z-resolution of 50.4 μm could be achieved (for a 500 μm thick silicon sensor at 130 V bias), whereby the drift time model independent z-resolution was found to be 28.5 μm.

Status and perspectives of pixel sensors based on 3D vertical integration

Energy Technology Data Exchange (ETDEWEB)

Re, Valerio [Università di Bergamo, Dipartimento di Ingegneria, Viale Marconi, 5, 24044 Dalmine (Italy); INFN, Sezione di Pavia, Via Bassi, 6, 27100 Pavia (Italy)

2014-11-21

This paper reviews the most recent developments of 3D integration in the field of silicon pixel sensors and readout integrated circuits. This technology may address the needs of future high energy physics and photon science experiments by increasing the electronic functional density in small pixel readout cells and by stacking various device layers based on different technologies, each optimized for a different function. Current efforts are aimed at improving the performance of both hybrid pixel detectors and of CMOS sensors. The status of these activities is discussed here, taking into account experimental results on 3D devices developed in the frame of the 3D-IC consortium. The paper also provides an overview of the ideas that are being currently devised for novel 3D vertically integrated pixel sensors. - Highlights: • 3D integration is a promising technology for pixel sensors in high energy physics. • Experimental results on two-layer 3D CMOS pixel sensors are presented. • The outcome of the first run from the 3D-IC consortium is discussed. • The AIDA network is studying via-last 3D integration of heterogeneous layers. • New ideas based on 3D vertically integrated pixels are being developed for HEP.

Status and perspectives of pixel sensors based on 3D vertical integration

International Nuclear Information System (INIS)

Re, Valerio

2014-01-01

This paper reviews the most recent developments of 3D integration in the field of silicon pixel sensors and readout integrated circuits. This technology may address the needs of future high energy physics and photon science experiments by increasing the electronic functional density in small pixel readout cells and by stacking various device layers based on different technologies, each optimized for a different function. Current efforts are aimed at improving the performance of both hybrid pixel detectors and of CMOS sensors. The status of these activities is discussed here, taking into account experimental results on 3D devices developed in the frame of the 3D-IC consortium. The paper also provides an overview of the ideas that are being currently devised for novel 3D vertically integrated pixel sensors. - Highlights: • 3D integration is a promising technology for pixel sensors in high energy physics. • Experimental results on two-layer 3D CMOS pixel sensors are presented. • The outcome of the first run from the 3D-IC consortium is discussed. • The AIDA network is studying via-last 3D integration of heterogeneous layers. • New ideas based on 3D vertically integrated pixels are being developed for HEP

Photodiode area effect on performance of X-ray CMOS active pixel sensors

Science.gov (United States)

Kim, M. S.; Kim, Y.; Kim, G.; Lim, K. T.; Cho, G.; Kim, D.

2018-02-01

Compared to conventional TFT-based X-ray imaging devices, CMOS-based X-ray imaging sensors are considered next generation because they can be manufactured in very small pixel pitches and can acquire high-speed images. In addition, CMOS-based sensors have the advantage of integration of various functional circuits within the sensor. The image quality can also be improved by the high fill-factor in large pixels. If the size of the subject is small, the size of the pixel must be reduced as a consequence. In addition, the fill factor must be reduced to aggregate various functional circuits within the pixel. In this study, 3T-APS (active pixel sensor) with photodiodes of four different sizes were fabricated and evaluated. It is well known that a larger photodiode leads to improved overall performance. Nonetheless, if the size of the photodiode is > 1000 μm2, the degree to which the sensor performance increases as the photodiode size increases, is reduced. As a result, considering the fill factor, pixel-pitch > 32 μm is not necessary to achieve high-efficiency image quality. In addition, poor image quality is to be expected unless special sensor-design techniques are included for sensors with a pixel pitch of 25 μm or less.

A design of optical modulation system with pixel-level modulation accuracy

Science.gov (United States)

Zheng, Shiwei; Qu, Xinghua; Feng, Wei; Liang, Baoqiu

2018-01-01

Vision measurement has been widely used in the field of dimensional measurement and surface metrology. However, traditional methods of vision measurement have many limits such as low dynamic range and poor reconfigurability. The optical modulation system before image formation has the advantage of high dynamic range, high accuracy and more flexibility, and the modulation accuracy is the key parameter which determines the accuracy and effectiveness of optical modulation system. In this paper, an optical modulation system with pixel level accuracy is designed and built based on multi-points reflective imaging theory and digital micromirror device (DMD). The system consisted of digital micromirror device, CCD camera and lens. Firstly we achieved accurate pixel-to-pixel correspondence between the DMD mirrors and the CCD pixels by moire fringe and an image processing of sampling and interpolation. Then we built three coordinate systems and calculated the mathematic relationship between the coordinate of digital micro-mirror and CCD pixels using a checkerboard pattern. A verification experiment proves that the correspondence error is less than 0.5 pixel. The results show that the modulation accuracy of system meets the requirements of modulation. Furthermore, the high reflecting edge of a metal circular piece can be detected using the system, which proves the effectiveness of the optical modulation system.

Upgrade of ATLAS ITk Pixel Detector

CERN Document Server

Huegging, Fabian; The ATLAS collaboration

2017-01-01

The high luminosity upgrade of the LHC (HL-LHC) in 2026 will provide new challenges to the ATLAS tracker. The current inner detector will be replaced with an entirely-silicon inner tracker (ITk) which will consist of a five barrel layer Pixel detector surrounded by a four barrel layer Strip detector. The expected high radiation levels are requiring the development of upgraded silicon sensors as well as new a front-end chip. The dense tracking environment will require finer granularity detectors and low mass global and local support structures. The data rates will require new technologies for high bandwidth data transmission and handling. The current status of the ITk ATLAS Pixel detector developments as well as different layout options will be reviewed.

The pin pixel detector--X-ray imaging

CERN Document Server

Bateman, J E; Derbyshire, G E; Duxbury, D M; Marsh, A S; Simmons, J E; Stephenson, R

2002-01-01

The development and testing of a soft X-ray gas pixel detector, which uses connector pins for the anodes is reported. Based on a commercial 100 pin connector block, a prototype detector of aperture 25.4 mm centre dot 25.4 mm can be economically fabricated. The individual pin anodes all show the expected characteristics of small gas detectors capable of counting rates reaching 1 MHz per pin. A 2-dimensional resistive divide readout system has been developed to permit the imaging properties of the detector to be explored in advance of true pixel readout electronics.

Pixel-based meshfree modelling of skeletal muscles.

Science.gov (United States)

Chen, Jiun-Shyan; Basava, Ramya Rao; Zhang, Yantao; Csapo, Robert; Malis, Vadim; Sinha, Usha; Hodgson, John; Sinha, Shantanu

2016-01-01

This paper introduces the meshfree Reproducing Kernel Particle Method (RKPM) for 3D image-based modeling of skeletal muscles. This approach allows for construction of simulation model based on pixel data obtained from medical images. The material properties and muscle fiber direction obtained from Diffusion Tensor Imaging (DTI) are input at each pixel point. The reproducing kernel (RK) approximation allows a representation of material heterogeneity with smooth transition. A multiphase multichannel level set based segmentation framework is adopted for individual muscle segmentation using Magnetic Resonance Images (MRI) and DTI. The application of the proposed methods for modeling the human lower leg is demonstrated.

Content Progressive Coding of Limited Bits/pixel Images

DEFF Research Database (Denmark)

Jensen, Ole Riis; Forchhammer, Søren

1999-01-01

A new lossless context based method for content progressive coding of limited bits/pixel images is proposed. Progressive coding is achieved by separating the image into contelnt layers. Digital maps are compressed up to 3 times better than GIF.......A new lossless context based method for content progressive coding of limited bits/pixel images is proposed. Progressive coding is achieved by separating the image into contelnt layers. Digital maps are compressed up to 3 times better than GIF....

Studies of mono-crystalline CVD diamond pixel detectors

CERN Document Server

Bartz, E; Atramentov, O; Yang, Z; Hall-Wilton, R; Schnetzer, S; Patel, R; Bugg, W; Hebda, P; Halyo, V; Hunt, A; Marlow, D; Steininger, H; Ryjov, V; Hits, D; Spanier, S; Pernicka, M; Johns, W; Doroshenko, J; Hollingsworth, M; Harrop, B; Farrow, C; Stone, R

2011-01-01

The Pixel Luminosity Telescope (PLT) is a dedicated luminosity monitor, presently under construction, for the Compact Muon Solenoid (CMS) experiment at the Large Hadron Collider (LHC). It measures the particle flux in several three layered pixel diamond detectors that are aligned precisely with respect to each other and the beam direction. At a lower rate it also performs particle track position measurements. The PLTs mono-crystalline CVD diamonds are bump-bonded to the same readout chip used in the silicon pixel system in CMS. Mono-crystalline diamond detectors have many attributes that make them desirable for use in charged particle tracking in radiation hostile environments such as the LHC. In order to further characterize the applicability of diamond technology to charged particle tracking we performed several tests with particle beams that included a measurement of the intrinsic spatial resolution with a high resolution beam telescope. Published by Elsevier B.V.

New pixelized Micromegas detector for the COMPASS experiment

International Nuclear Information System (INIS)

Neyret, D; Anfreville, M; Bedfer, Y; Burtin, E; D'Hose, N; Giganon, A; Kunne, F; Magnon, A; Marchand, C; Paul, B; Platchkov, S; Vandenbroucke, M; Ketzer, B; Konorov, I

2009-01-01

New Micromegas (Micro-mesh gaseous detectors) are being developed in view of the future physics projects planned by the COMPASS collaboration at CERN. Several major upgrades compared to present detectors are being studied: detectors standing five times higher luminosity with hadron beams, detection of beam particles (flux up to a few hundred of kHz/mm 2 , 10 times larger than for the present detectors) with pixelized read-out in the central part, light and integrated electronics, and improved robustness. Studies were done with the present detectors moved in the beam, and two first pixelized prototypes are being tested with muon and hadron beams in real conditions at COMPASS. We present here this new project and report on two series of tests, with old detectors moved into the beam and with pixelized prototypes operated in real data taking condition with both muon and hadron beams.

Studies of mono-crystalline CVD diamond pixel detectors

Energy Technology Data Exchange (ETDEWEB)

Bugg, W. [University of Tennessee, Knoxville (United States); Hollingsworth, M., E-mail: mhollin3@utk.edu [University of Tennessee, Knoxville (United States); Spanier, S.; Yang, Z. [University of Tennessee, Knoxville (United States); Bartz, E.; Doroshenko, J.; Hits, D.; Schnetzer, S.; Stone, R.; Atramentov, O.; Patel, R.; Barker, A. [Rutgers University, Piscataway (United States); Hall-Wilton, R.; Ryjov, V.; Farrow, C. [CERN, Geneva (Switzerland); Pernicka, M.; Steininger, H. [HEPHY, Vienna (Austria); Johns, W. [Vanderbilt University, Nashville (United States); Halyo, V.; Harrop, B. [Princeton University, Princeton (United States); and others

2011-09-11

The Pixel Luminosity Telescope (PLT) is a dedicated luminosity monitor, presently under construction, for the Compact Muon Solenoid (CMS) experiment at the Large Hadron Collider (LHC). It measures the particle flux in several three layered pixel diamond detectors that are aligned precisely with respect to each other and the beam direction. At a lower rate it also performs particle track position measurements. The PLT's mono-crystalline CVD diamonds are bump-bonded to the same readout chip used in the silicon pixel system in CMS. Mono-crystalline diamond detectors have many attributes that make them desirable for use in charged particle tracking in radiation hostile environments such as the LHC. In order to further characterize the applicability of diamond technology to charged particle tracking we performed several tests with particle beams that included a measurement of the intrinsic spatial resolution with a high resolution beam telescope.

Characterisation of crystal matrices and single pixels for nuclear medicine applications

International Nuclear Information System (INIS)

Herbert, D.J.; Belcari, N.; Camarda, M.; Del Guerra, A.; Vaiano, A.

2005-01-01

Commercially constructed crystal matrices are characterised for use with PSPMT detectors for PET system developments and other nuclear medicine applications. The matrices of different scintillation materials were specified with pixel dimensions of 1.5x1.5 mm 2 in cross-section and a length corresponding to one gamma ray interaction length at 511 keV. The materials used in this study were BGO, LSO, LYSO, YSO and CsI(Na). Each matrix was constructed using a white TiO loaded epoxy that forms a 0.2 mm septa between each pixel. The white epoxy is not the optimum choice in terms of the reflective properties, but represents a good compromise between cost and the need for optical isolation between pixels. We also tested a YAP matrix that consisted of pixels of the same size specification but was manufactured by a different company, who instead of white epoxy, used a thin aluminium reflective layer for optical isolation that resulted in a septal thickness of just 0.01 mm, resulting in a much higher packing fraction. The characteristics of the scintillation materials, such as the light output and energy resolution, were first studied in the form of individual crystal elements by using a single pixel HPD. A comparison of individual pixels with and without the epoxy or dielectric coatings was also performed. Then the matrices themselves were coupled to a PSPMT in order to study the imaging performance. In particular, the system pixel resolution and the peak to valley ratio were measured at 511 and 122 keV

Extending the dynamic range of silicon photomultipliers without increasing pixel count

International Nuclear Information System (INIS)

Johnson, Kurtis F.

2010-01-01

A silicon photomultiplier, sometimes called 'multipixel photon counter', which we here refer to as a 'SiPM', is a photo-sensitive device built from an avalanche photodiode array of pixels on a common silicon substrate, such that it can detect single photon events. The dimensions of a pixel may vary from 20 to 100 μm and their density can be greater than 1000 per square millimeter. Each pixel in a SiPM operates in Geiger mode and is coupled to the output by a quenching resistor. Although each pixel operates in digital mode, the SiPM is an analog device because all the pixels are read in parallel, making it possible to generate signals within a dynamic range from a single photon to a large number of photons, ultimately limited by the number of pixels on the chip. In this note we describe a simple and general method of increasing the dynamic range of a SiPM beyond that one may naively assume from the shape of the cumulative distribution function of the SiPM response to the average number of photons per pixel. We show that by rendering the incoming flux of photons to be non-uniform in a prescribed manner, a significant increase in dynamic range is achievable. Such re-distribution of the incoming flux may be accomplished with simple, non-focusing lenses, prisms, interference films, mirrors or attenuating films. Almost any optically non-inert interceding device can increase the dynamic range of the SiPM.

Parallel processing architecture for H.264 deblocking filter on multi-core platforms

Science.gov (United States)

Prasad, Durga P.; Sonachalam, Sekar; Kunchamwar, Mangesh K.; Gunupudi, Nageswara Rao

2012-03-01

Massively parallel computing (multi-core) chips offer outstanding new solutions that satisfy the increasing demand for high resolution and high quality video compression technologies such as H.264. Such solutions not only provide exceptional quality but also efficiency, low power, and low latency, previously unattainable in software based designs. While custom hardware and Application Specific Integrated Circuit (ASIC) technologies may achieve lowlatency, low power, and real-time performance in some consumer devices, many applications require a flexible and scalable software-defined solution. The deblocking filter in H.264 encoder/decoder poses difficult implementation challenges because of heavy data dependencies and the conditional nature of the computations. Deblocking filter implementations tend to be fixed and difficult to reconfigure for different needs. The ability to scale up for higher quality requirements such as 10-bit pixel depth or a 4:2:2 chroma format often reduces the throughput of a parallel architecture designed for lower feature set. A scalable architecture for deblocking filtering, created with a massively parallel processor based solution, means that the same encoder or decoder will be deployed in a variety of applications, at different video resolutions, for different power requirements, and at higher bit-depths and better color sub sampling patterns like YUV, 4:2:2, or 4:4:4 formats. Low power, software-defined encoders/decoders may be implemented using a massively parallel processor array, like that found in HyperX technology, with 100 or more cores and distributed memory. The large number of processor elements allows the silicon device to operate more efficiently than conventional DSP or CPU technology. This software programing model for massively parallel processors offers a flexible implementation and a power efficiency close to that of ASIC solutions. This work describes a scalable parallel architecture for an H.264 compliant deblocking

Tracking performance of a single-crystal and a polycrystalline diamond pixel-detector

Energy Technology Data Exchange (ETDEWEB)

Menasce, D.; et al.

2013-06-01

We present a comparative characterization of the performance of a single-crystal and a polycrystalline diamond pixel-detector employing the standard CMS pixel readout chips. Measurements were carried out at the Fermilab Test Beam Facility, FTBF, using protons of momentum 120 GeV/c tracked by a high-resolution pixel telescope. Particular attention was directed to the study of the charge-collection, the charge-sharing among adjacent pixels and the achievable position resolution. The performance of the single-crystal detector was excellent and comparable to the best available silicon pixel-detectors. The measured average detection-efficiency was near unity, ε = 0.99860±0.00006, and the position-resolution for shared hits was about 6 μm. On the other hand, the performance of the polycrystalline detector was hampered by its lower charge collection distance and the readout chip threshold. A new readout chip, capable of operating at much lower threshold (around 1 ke^$-$), would be required to fully exploit the potential performance of the polycrystalline diamond pixel-detector.

The high dynamic range pixel array detector (HDR-PAD): Concept and design

Energy Technology Data Exchange (ETDEWEB)

Shanks, Katherine S.; Philipp, Hugh T.; Weiss, Joel T.; Becker, Julian; Tate, Mark W. [Laboratory of Atomic and Solid State Physics, Cornell University, Ithaca, NY 14853 (United States); Gruner, Sol M., E-mail: smg26@cornell.edu [Laboratory of Atomic and Solid State Physics, Cornell University, Ithaca, NY 14853 (United States); Cornell High Energy Synchrotron Source (CHESS), Cornell University, Ithaca, NY 14853 (United States)

2016-07-27

Experiments at storage ring light sources as well as at next-generation light sources increasingly require detectors capable of high dynamic range operation, combining low-noise detection of single photons with large pixel well depth. XFEL sources in particular provide pulse intensities sufficiently high that a purely photon-counting approach is impractical. The High Dynamic Range Pixel Array Detector (HDR-PAD) project aims to provide a dynamic range extending from single-photon sensitivity to 10{sup 6} photons/pixel in a single XFEL pulse while maintaining the ability to tolerate a sustained flux of 10{sup 11} ph/s/pixel at a storage ring source. Achieving these goals involves the development of fast pixel front-end electronics as well as, in the XFEL case, leveraging the delayed charge collection due to plasma effects in the sensor. A first prototype of essential electronic components of the HDR-PAD readout ASIC, exploring different options for the pixel front-end, has been fabricated. Here, the HDR-PAD concept and preliminary design will be described.

X-ray micro-beam characterization of a small pixel spectroscopic CdTe detector

Science.gov (United States)

Veale, M. C.; Bell, S. J.; Seller, P.; Wilson, M. D.; Kachkanov, V.

2012-07-01

A small pixel, spectroscopic, CdTe detector has been developed at the Rutherford Appleton Laboratory (RAL) for X-ray imaging applications. The detector consists of 80 × 80 pixels on a 250 μm pitch with 50 μm inter-pixel spacing. Measurements with an 241Am γ-source demonstrated that 96% of all pixels have a FWHM of better than 1 keV while the majority of the remaining pixels have FWHM of less than 4 keV. Using the Diamond Light Source synchrotron, a 10 μm collimated beam of monochromatic 20 keV X-rays has been used to map the spatial variation in the detector response and the effects of charge sharing corrections on detector efficiency and resolution. The mapping measurements revealed the presence of inclusions in the detector and quantified their effect on the spectroscopic resolution of pixels.

Plasmonic nanospherical dimers for color pixels

KAUST Repository

Alrasheed, Salma; Di Fabrizio, Enzo M.

2018-01-01

Display technologies are evolving more toward higher resolution and miniaturization. Plasmonic color pixels can offer solutions to realize such technologies due to their sharp resonances and selective scattering and absorption at particular

Construction and Tests of Modules for the ATLAS Pixel Detector

CERN Document Server

AUTHOR|(CDS)2068490

2003-01-01

The ATLAS Pixel Detector is the innermost layer of the ATLAS tracking system and will contribute significantly to the ATLAS track and vertex reconstruction. The detector consists of identical sensor-chip-hybrid modules, arranged in three barrels in the centre and three disks on either side for the forward region. The position of the pixel detector near the interaction point requires excellent radiation hardness, mechanical and thermal robustness, good long-term stability, all combined with a low material budget. The pre-production phase of such pixel modules has nearly finished, yielding fully functional modules. Results are presented of tests with these modules.

A comprehensive study on partial shading response of c-Si modules and yield modeling of string inverter and module level power electronics

NARCIS (Netherlands)

Sinapis, K.; Tzikas, C.; Litjens, G.; van den Donker, M.; Folkerts, W.; van Sark, W.G.J.H.M.; Smets, A.

2016-01-01

Building Integrated and Building Attached Photovoltaic (BIPV, BAPV) systems may suffer from lower performance than predicted as a result of not considered partial shading. New system architectures have been proposed to optimize performance. The common approach of these new architectures is to track

Electron imaging with Medipix2 hybrid pixel detector

International Nuclear Information System (INIS)

McMullan, G.; Cattermole, D.M.; Chen, S.; Henderson, R.; Llopart, X.; Summerfield, C.; Tlustos, L.; Faruqi, A.R.

2007-01-01

The electron imaging performance of Medipix2 is described. Medipix2 is a hybrid pixel detector composed of two layers. It has a sensor layer and a layer of readout electronics, in which each 55 μmx55 μm pixel has upper and lower energy discrimination and MHz rate counting. The sensor layer consists of a 300 μm slab of pixellated monolithic silicon and this is bonded to the readout chip. Experimental measurement of the detective quantum efficiency, DQE(0) at 120 keV shows that it can reach ∼85% independent of electron exposure, since the detector has zero noise, and the DQE(Nyquist) can reach ∼35% of that expected for a perfect detector (4/π 2 ). Experimental measurement of the modulation transfer function (MTF) at Nyquist resolution for 120 keV electrons using a 60 keV lower energy threshold, yields a value that is 50% of that expected for a perfect detector (2/π). Finally, Monte Carlo simulations of electron tracks and energy deposited in adjacent pixels have been performed and used to calculate expected values for the MTF and DQE as a function of the threshold energy. The good agreement between theory and experiment allows suggestions for further improvements to be made with confidence. The present detector is already very useful for experiments that require a high DQE at very low doses

Electron imaging with Medipix2 hybrid pixel detector.

Science.gov (United States)

McMullan, G; Cattermole, D M; Chen, S; Henderson, R; Llopart, X; Summerfield, C; Tlustos, L; Faruqi, A R

2007-01-01

The electron imaging performance of Medipix2 is described. Medipix2 is a hybrid pixel detector composed of two layers. It has a sensor layer and a layer of readout electronics, in which each 55 microm x 55 microm pixel has upper and lower energy discrimination and MHz rate counting. The sensor layer consists of a 300 microm slab of pixellated monolithic silicon and this is bonded to the readout chip. Experimental measurement of the detective quantum efficiency, DQE(0) at 120 keV shows that it can reach approximately 85% independent of electron exposure, since the detector has zero noise, and the DQE(Nyquist) can reach approximately 35% of that expected for a perfect detector (4/pi(2)). Experimental measurement of the modulation transfer function (MTF) at Nyquist resolution for 120 keV electrons using a 60 keV lower energy threshold, yields a value that is 50% of that expected for a perfect detector (2/pi). Finally, Monte Carlo simulations of electron tracks and energy deposited in adjacent pixels have been performed and used to calculate expected values for the MTF and DQE as a function of the threshold energy. The good agreement between theory and experiment allows suggestions for further improvements to be made with confidence. The present detector is already very useful for experiments that require a high DQE at very low doses.

Detector Modules for the CMS Pixel Phase 1 Upgrade

CERN Document Server

Zhu, De Hua; Berger, Pirmin; Meinhard, Maren Tabea; Starodumov, Andrey; Tavolaro, Vittorio Raoul

2017-01-01

The CMS Pixel phase 1 upgrade detector consists of 1184 modules with new design. An important part of the production is the module qualification and calibration, ensuring their proper functionality within the detector. This paper summarizes the qualification and calibration results of modules used in the innermost two detector layers with focus on methods using module-internal calibration signals. Extended characterizations on pixel level such as electronic noise and bump bond connectivity, optimization of operational parameters, sensor quality and thermal stress resistance were performed using a customized setup with controlled environment. It could be shown that the selected modules have on average $0.55 \\mathrm{ {}^{0\\!}\\!/\\!_{00} }\\, \\pm \\, 0.01 \\mathrm{ {}^{0\\!}\\!/\\!_{00} }\\,$ defective pixels and that all performance parameters stay within their specifications.

Maximum likelihood pixel labeling using a spatially variant finite mixture model

International Nuclear Information System (INIS)

Gopal, S.S.; Hebert, T.J.

1996-01-01

We propose a spatially-variant mixture model for pixel labeling. Based on this spatially-variant mixture model we derive an expectation maximization algorithm for maximum likelihood estimation of the pixel labels. While most algorithms using mixture models entail the subsequent use of a Bayes classifier for pixel labeling, the proposed algorithm yields maximum likelihood estimates of the labels themselves and results in unambiguous pixel labels. The proposed algorithm is fast, robust, easy to implement, flexible in that it can be applied to any arbitrary image data where the number of classes is known and, most importantly, obviates the need for an explicit labeling rule. The algorithm is evaluated both quantitatively and qualitatively on simulated data and on clinical magnetic resonance images of the human brain

Characterization and correction of charge-induced pixel shifts in DECam

Energy Technology Data Exchange (ETDEWEB)

Gruen, D.; Bernstein, G. M.; Jarvis, M.; Rowe, B.; Vikram, V.; Plazas, A. A.; Seitz, S.

2015-05-01

Interaction of charges in CCDs with the already accumulated charge distribution causes both a flux dependence of the point-spread function (an increase of observed size with flux, also known as the brighter/fatter effect) and pixel-to-pixel correlations of the {Poissonian} noise in flat fields. We describe these effects in the Dark Energy Camera (DECam) with charge dependent shifts of effective pixel borders, i.e. the Antilogus et al. (2014) model, which we fit to measurements of flat-field {Poissonian} noise correlations. The latter fall off approximately as a power-law r(-)(2.5) with pixel separation r, are isotropic except for an asymmetry in the direct neighbors along rows and columns, are stable in time, and are weakly dependent on wavelength. They show variations from chip to chip at the 20% level that correlate with the silicon resistivity. The charge shifts predicted by the model cause biased shape measurements, primarily due to their effect on bright stars, at levels exceeding weak lensing science requirements. We measure the flux dependence of star images and show that the effect can be mitigated by applying the reverse charge shifts at the pixel level during image processing. Differences in stellar size, however, remain significant due to residuals at larger distance from the centroid.

Designing bioinspired composite reinforcement architectures via 3D magnetic printing

Science.gov (United States)

Martin, Joshua J.; Fiore, Brad E.; Erb, Randall M.

2015-10-01

Discontinuous fibre composites represent a class of materials that are strong, lightweight and have remarkable fracture toughness. These advantages partially explain the abundance and variety of discontinuous fibre composites that have evolved in the natural world. Many natural structures out-perform the conventional synthetic counterparts due, in part, to the more elaborate reinforcement architectures that occur in natural composites. Here we present an additive manufacturing approach that combines real-time colloidal assembly with existing additive manufacturing technologies to create highly programmable discontinuous fibre composites. This technology, termed as `3D magnetic printing', has enabled us to recreate complex bioinspired reinforcement architectures that deliver enhanced material performance compared with monolithic structures. Further, we demonstrate that we can now design and evolve elaborate reinforcement architectures that are not found in nature, demonstrating a high level of possible customization in discontinuous fibre composites with arbitrary geometries.

Designing bioinspired composite reinforcement architectures via 3D magnetic printing.

Science.gov (United States)

Martin, Joshua J; Fiore, Brad E; Erb, Randall M

2015-10-23

Discontinuous fibre composites represent a class of materials that are strong, lightweight and have remarkable fracture toughness. These advantages partially explain the abundance and variety of discontinuous fibre composites that have evolved in the natural world. Many natural structures out-perform the conventional synthetic counterparts due, in part, to the more elaborate reinforcement architectures that occur in natural composites. Here we present an additive manufacturing approach that combines real-time colloidal assembly with existing additive manufacturing technologies to create highly programmable discontinuous fibre composites. This technology, termed as '3D magnetic printing', has enabled us to recreate complex bioinspired reinforcement architectures that deliver enhanced material performance compared with monolithic structures. Further, we demonstrate that we can now design and evolve elaborate reinforcement architectures that are not found in nature, demonstrating a high level of possible customization in discontinuous fibre composites with arbitrary geometries.

Compressive Video Recovery Using Block Match Multi-Frame Motion Estimation Based on Single Pixel Cameras

Directory of Open Access Journals (Sweden)

Sheng Bi

2016-03-01

Full Text Available Compressive sensing (CS theory has opened up new paths for the development of signal processing applications. Based on this theory, a novel single pixel camera architecture has been introduced to overcome the current limitations and challenges of traditional focal plane arrays. However, video quality based on this method is limited by existing acquisition and recovery methods, and the method also suffers from being time-consuming. In this paper, a multi-frame motion estimation algorithm is proposed in CS video to enhance the video quality. The proposed algorithm uses multiple frames to implement motion estimation. Experimental results show that using multi-frame motion estimation can improve the quality of recovered videos. To further reduce the motion estimation time, a block match algorithm is used to process motion estimation. Experiments demonstrate that using the block match algorithm can reduce motion estimation time by 30%.

The ALICE silicon pixel detector front-end and read-out electronics

CERN Document Server

Kluge, A

2006-01-01

The ALICE silicon pixel detector (SPD) comprises the two innermost barrel layers of the ALICE inner tracker system. The SPD includes 120 half staves each of which consists of a linear array of 10 ALICE pixel chips bump bonded to two silicon sensors. Each pixel chip contains 8192 active cells, so the total number of pixel cells in the SPD is ≈107. The tight material budget and the limitation in physical dimensions required by the detector design introduce new challenges for the integration of the on-detector electronics. An essential part of the half stave is a low-mass multi-layer flex that carries power, ground, and signals to the pixel chips. Each half stave is read out using a multi-chip module (MCM). The MCM contains three radiation hard ASICs and an 800 Mbit/s custom developed optical link for the data transfer between the detector and the control room. The detector components are less than 3 mm thick. The production of the half-staves and MCMs is currently under way. Test results as well as on overvie...

Finite-element simulations of coupling capacitances in capacitively coupled pixel detectors

CERN Document Server

AUTHOR|(SzGeCERN)755510

2017-01-01

Capacitively coupled hybrid silicon pixel-detector assemblies are under study for the vertex detector at the proposed future CLIC linear electron-positron collider. The assemblies consist of active CCPDv3 sensors, with 25 μm pixel pitch implemented in a 180 nm High- Voltage CMOS process, which are glued to the CLICpix readout ASIC, with the same pixel pitch and processed in a commercial 65 nm CMOS technology. The signal created in the silicon bulk of the active sensors passes a two-stage amplifier, in each pixel, and gets transferred as a voltage pulse to metal pads facing the readout chip (ROC). The coupling of the signal to the metal pads on the ROC side proceeds through the capacitors formed between the two chips by a thin layer of epoxy glue. The coupling strength and the amount of unwanted cross coupling to neighbouring pixels depends critically on the uniformity of the glue layer, its thickness and on the alignment precision during the flip-chip assembly process. Finite-element calculations of the coup...

Energy-correction photon counting pixel for photon energy extraction under pulse pile-up

Energy Technology Data Exchange (ETDEWEB)

Lee, Daehee; Park, Kyungjin; Lim, Kyung Taek; Cho, Gyuseong, E-mail: gscho@kaist.ac.kr

2017-06-01

A photon counting detector (PCD) has been proposed as an alternative solution to an energy-integrating detector (EID) in medical imaging field due to its high resolution, high efficiency, and low noise. The PCD has expanded to variety of fields such as spectral CT, k-edge imaging, and material decomposition owing to its capability to count and measure the number and the energy of an incident photon, respectively. Nonetheless, pulse pile-up, which is a superimposition of pulses at the output of a charge sensitive amplifier (CSA) in each PC pixel, occurs frequently as the X-ray flux increases due to the finite pulse processing time (PPT) in CSAs. Pulse pile-up induces not only a count loss but also distortion in the measured X-ray spectrum from each PC pixel and thus it is a main constraint on the use of PCDs in high flux X-ray applications. To minimize these effects, an energy-correction PC (ECPC) pixel is proposed to resolve pulse pile-up without cutting off the PPT by adding an energy correction logic (ECL) via a cross detection method (CDM). The ECPC pixel with a size of 200×200 µm{sup 2} was fabricated by using a 6-metal 1-poly 0.18 µm CMOS process with a static power consumption of 7.2 μW/pixel. The maximum count rate of the ECPC pixel was extended by approximately three times higher than that of a conventional PC pixel with a PPT of 500 nsec. The X-ray spectrum of 90 kVp, filtered by 3 mm Al filter, was measured as the X-ray current was increased using the CdTe and the ECPC pixel. As a result, the ECPC pixel dramatically reduced the energy spectrum distortion at 2 Mphotons/pixel/s when compared to that of the ERCP pixel with the same 500 nsec PPT.

Individualized Pixel Synthesis and Characterization of Combinatorial Materials Chips

Directory of Open Access Journals (Sweden)

Xiao-Dong Xiang

2015-06-01

Full Text Available Conventionally, an experimentally determined phase diagram requires studies of phase formation at a range of temperatures for each composition, which takes years of effort from multiple research groups. Combinatorial materials chip technology, featuring high-throughput synthesis and characterization, is able to determine the phase diagram of an entire composition spread of a binary or ternary system at a single temperature on one materials library, which, though significantly increasing efficiency, still requires many libraries processed at a series of temperatures in order to complete a phase diagram. In this paper, we propose a “one-chip method” to construct a complete phase diagram by individually synthesizing each pixel step by step with a progressive pulse of energy to heat at different temperatures while monitoring the phase evolution on the pixel in situ in real time. Repeating this process pixel by pixel throughout the whole chip allows the entire binary or ternary phase diagram to be mapped on one chip in a single experiment. The feasibility of this methodology is demonstrated in a study of a Ge-Sb-Te ternary alloy system, on which the amorphous-crystalline phase boundary is determined.

FEATURES BASED ON NEIGHBORHOOD PIXELS DENSITY - A STUDY AND COMPARISON

Directory of Open Access Journals (Sweden)

Satish Kumar

2016-02-01

Full Text Available In optical character recognition applications, the feature extraction method(s used to recognize document images play an important role. The features are the properties of the pattern that can be statistical, structural and/or transforms or series expansion. The structural features are difficult to compute particularly from hand-printed images. The structure of the strokes present inside the hand-printed images can be estimated using statistical means. In this paper three features have been purposed, those are based on the distribution of B/W pixels on the neighborhood of a pixel in an image. We name these features as Spiral Neighbor Density, Layer Pixel Density and Ray Density. The recognition performance of these features has been compared with two more features Neighborhood Pixels Weight and Total Distances in Four Directions already studied in our work. We have used more than 20000 Devanagari handwritten character images for conducting experiments. The experiments are conducted with two classifiers i.e. PNN and k-NN.

Development of the MCM-D technique for pixel detector modules

CERN Document Server

Grah, Christian

2005-01-01

This thesis treats a copper--polymer based thin film technology, the MCM-D technique and its application when building hybrid pixel detector modules. The ATLAS experiment at the LHC will be equipped with a pixel detector system. The basic mechanical units of the pixel detector are multi chip modules. The main components of these modules are: 16 electronic chips, a controller chip and a large sensor tile, featuring more than 46000 sensor cells. MCM-D is a superior technique to build the necessary signal bus system and the power distribution system directly on the active sensor tile. In collaboration with the Fraunhofer Institute for Reliability and Microintegration, IZM, the thin film process is reviewed and enhanced. The multi layer system was designed and optimized for the interconnection system as well as for the 46000 pixel contacts. Laboratory measurements on prototypes prove that complex routing schemes for geometrically optimized single chips are suitable and have negligible influence on the front--end ...

CMOS pixel development for the ATLAS experiment at HL-LHC

CERN Document Server

Rimoldi, Marco; The ATLAS collaboration

2017-01-01

To cope with the rate and radiation environment expected at the HL-LHC new approaches are being developed on CMOS pixel detectors, providing charge collection in a depleted layer. They are based on: HV enabling technologies that allow to use high depletion voltages, high resistivity wafers for large depletion depths; radiation hard processed with multiple nested wells to allow CMOS electronics embedded with sufficient shielding into the sensor substrate and backside processing and thinning for material minimization and backside voltage application. Since 2014, members of more than 20 groups in the ATLAS experiment are actively pursuing CMOS pixel R$\\&$D in an ATLAS Demonstrator program pursuing sensor design and characterizations. The goal of this program is to demonstrate that depleted CMOS pixels are suited for high rate, fast timing and high radiation operation at LHC. For this a number of technologies have been explored and characterized. In this presentation the challenges for the usage of CMOS pixel...

IV and CV curves for irradiated prototype BTeV silicon pixel sensors

International Nuclear Information System (INIS)

Coluccia, Maria R.

2002-01-01

The authors present IV and CV curves for irradiated prototype n + /n/p + silicon pixel sensors, intended for use in the BTeV experiment at Fermilab. They tested pixel sensors from various vendors and with two pixel isolation layouts: p-stop and p-spray. Results are based on exposure with 200 MeV protons up to 6 x 10 14 protons/cm 2

Status of the CMS Phase 1 Pixel Upgrade

CERN Document Server

Mattig, Stefan

2014-01-01

The silicon pixel detector is the innermost component of the CMS tracking system, providing high precision space point measurements of charged particle trajectories. Before 2018 the instantaneous luminosity of the LHC is expected to reach 2\\,$\\times 10^{34}\\,{\\rm cm^{-2}s^{-1}}$, which will significantly increase the number of interactions per bunch crossing. The current pixel detector of CMS was not designed to work efficiently in such a high occupancy environment and will be degraded by substantial data-loss introduced by buffer filling in the analog Read-Out Chip (ROC) and effects of radiation damage in the sensors, built up over the operational period. To maintain a high tracking efficiency, CMS has planned to replace the current pixel system during ``Phase 1'' (2016/17) by a new lightweight detector, equipped with an additional 4th layer in the barrel, and one additional forward/backward disk. A new digital ROC has been designed, with increased buffers to minimize data-loss, and a digital read-out protoc...

Monitoring radiation damage in the ATLAS pixel detector

CERN Document Server

Schorlemmer, André Lukas; Quadt, Arnulf; Große-Knetter, Jörn; Rembser, Christoph; Di Girolamo, Beniamino

2014-11-05

Radiation hardness is one of the most important features of the ATLAS pixel detector in order to ensure a good performance and a long lifetime. Monitoring of radiation damage is crucial in order to assess and predict the expected performance of the detector. Key values for the assessment of radiation damage in silicon, such as the depletion voltage and depletion depth in the sensors, are measured on a regular basis during operations. This thesis summarises the monitoring program that is conducted in order to assess the impact of radiation damage and compares it to model predictions. In addition, the physics performance of the ATLAS detector highly depends on the amount of disabled modules in the ATLAS pixel detector. A worrying amount of module failures was observed during run I. Thus it was decided to recover repairable modules during the long shutdown (LS1) by extracting the pixel detector. The impact of the module repairs and module failures on the detector performance is analysed in this thesis.

Studies on a 300 k pixel detector telescope

Science.gov (United States)

Middelkamp, Peter; Antinori, F.; Barberis, D.; Becks, K. H.; Beker, H.; Beusch, W.; Burger, P.; Campbell, M.; Cantatore, E.; Catanesi, M. G.; Chesi, E.; Darbo, G.; D'Auria, S.; Davia, C.; di Bari, D.; di Liberto, S.; Elia, D.; Gys, T.; Heijne, E. H. M.; Helstrup, H.; Jacholkowski, A.; Jæger, J. J.; Jakubek, J.; Jarron, P.; Klempt, W.; Krummenacher, F.; Knudson, K.; Kralik, I.; Kubasta, J.; Lasalle, J. C.; Leitner, R.; Lemeilleur, F.; Lenti, V.; Letheren, M.; Lopez, L.; Loukas, D.; Luptak, M.; Martinengo, P.; Meddeler, G.; Meddi, F.; Morando, M.; Munns, A.; Pellegrini, F.; Pengg, F.; Pospisil, S.; Quercigh, E.; Ridky, J.; Rossi, L.; Safarik, K.; Scharfetter, L.; Segato, G.; Simone, S.; Smith, K.; Snoeys, W.; Vrba, V.

1996-02-01

Four silicon pixel detector planes are combined to form a tracking telescope in the lead ion experiment WA97 at CERN with 290 304 sensitive elements each of 75 μm by 500 μm area. An electronic pulse processing circuit is associated with each individual sensing element and the response for ionizing particles is binary with an adjustable threshold. The noise rate for a threshold of 6000 e- has been measured to be less than 10-10. The inefficient area due to malfunctioning pixels is 2.8% of the 120 cm2. Detector overlaps within one plane have been used to determine the alignment of the components of the plane itself, without need for track reconstruction using external detectors. It is the first time that such a big surface covered with active pixels has been used in a physics experiment. Some aspects concerning inclined particle tracks and time walk have been measured separately in a beam test at the CERN SPS H6 beam.

Studies on a 300 k pixel detector telescope