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Sample records for oxidized silicon wafer

  1. Laser wafering for silicon solar

    International Nuclear Information System (INIS)

    Friedmann, Thomas Aquinas; Sweatt, William C.; Jared, Bradley Howell

    2011-01-01

    Current technology cuts solar Si wafers by a wire saw process, resulting in 50% 'kerf' loss when machining silicon from a boule or brick into a wafer. We want to develop a kerf-free laser wafering technology that promises to eliminate such wasteful wire saw processes and achieve up to a ten-fold decrease in the g/W p (grams/peak watt) polysilicon usage from the starting polysilicon material. Compared to today's technology, this will also reduce costs (∼20%), embodied energy, and green-house gas GHG emissions (∼50%). We will use short pulse laser illumination sharply focused by a solid immersion lens to produce subsurface damage in silicon such that wafers can be mechanically cleaved from a boule or brick. For this concept to succeed, we will need to develop optics, lasers, cleaving, and high throughput processing technologies capable of producing wafers with thicknesses < 50 (micro)m with high throughput (< 10 sec./wafer). Wafer thickness scaling is the 'Moore's Law' of silicon solar. Our concept will allow solar manufacturers to skip entire generations of scaling and achieve grid parity with commercial electricity rates. Yet, this idea is largely untested and a simple demonstration is needed to provide credibility for a larger scale research and development program. The purpose of this project is to lay the groundwork to demonstrate the feasibility of laser wafering. First, to design and procure on optic train suitable for producing subsurface damage in silicon with the required damage and stress profile to promote lateral cleavage of silicon. Second, to use an existing laser to produce subsurface damage in silicon, and third, to characterize the damage using scanning electron microscopy and confocal Raman spectroscopy mapping.

  2. Laser wafering for silicon solar.

    Energy Technology Data Exchange (ETDEWEB)

    Friedmann, Thomas Aquinas; Sweatt, William C.; Jared, Bradley Howell

    2011-03-01

    Current technology cuts solar Si wafers by a wire saw process, resulting in 50% 'kerf' loss when machining silicon from a boule or brick into a wafer. We want to develop a kerf-free laser wafering technology that promises to eliminate such wasteful wire saw processes and achieve up to a ten-fold decrease in the g/W{sub p} (grams/peak watt) polysilicon usage from the starting polysilicon material. Compared to today's technology, this will also reduce costs ({approx}20%), embodied energy, and green-house gas GHG emissions ({approx}50%). We will use short pulse laser illumination sharply focused by a solid immersion lens to produce subsurface damage in silicon such that wafers can be mechanically cleaved from a boule or brick. For this concept to succeed, we will need to develop optics, lasers, cleaving, and high throughput processing technologies capable of producing wafers with thicknesses < 50 {micro}m with high throughput (< 10 sec./wafer). Wafer thickness scaling is the 'Moore's Law' of silicon solar. Our concept will allow solar manufacturers to skip entire generations of scaling and achieve grid parity with commercial electricity rates. Yet, this idea is largely untested and a simple demonstration is needed to provide credibility for a larger scale research and development program. The purpose of this project is to lay the groundwork to demonstrate the feasibility of laser wafering. First, to design and procure on optic train suitable for producing subsurface damage in silicon with the required damage and stress profile to promote lateral cleavage of silicon. Second, to use an existing laser to produce subsurface damage in silicon, and third, to characterize the damage using scanning electron microscopy and confocal Raman spectroscopy mapping.

  3. Industrial Silicon Wafer Solar Cells

    OpenAIRE

    Neuhaus, Dirk-Holger; Münzer, Adolf

    2007-01-01

    In 2006, around 86% of all wafer-based silicon solar cells were produced using screen printing to form the silver front and aluminium rear contacts and chemical vapour deposition to grow silicon nitride as the antireflection coating onto the front surface. This paper reviews this dominant solar cell technology looking into state-of-the-art equipment and corresponding processes for each process step. The main efficiency losses of this type of solar cell are analyzed to demonstrate the future e...

  4. Direct Electroplating on Highly Doped Patterned Silicon Wafers

    NARCIS (Netherlands)

    Vargas Llona, Laura Dolores; Jansen, Henricus V.; Elwenspoek, Michael Curt

    Nickel thin films have been electrodeposited directly on highly doped silicon wafers after removal of the native oxide layer. These substrates conduct sufficiently well to allow deposition using a periferical electrical contact on the wafer. Films 2 μm thick were deposited using a nickel sulfamate

  5. Silicon wafers for integrated circuit process

    OpenAIRE

    Leroy , B.

    1986-01-01

    Silicon as a substrate material will continue to dominate the market of integrated circuits for many years. We first review how crystal pulling procedures impact the quality of silicon. We then investigate how thermal treatments affect the behaviour of oxygen and carbon, and how, as a result, the quality of silicon wafers evolves. Gettering techniques are then presented. We conclude by detailing the requirements that wafers must satisfy at the incoming inspection.

  6. Industrial Silicon Wafer Solar Cells

    Directory of Open Access Journals (Sweden)

    Dirk-Holger Neuhaus

    2007-01-01

    Full Text Available In 2006, around 86% of all wafer-based silicon solar cells were produced using screen printing to form the silver front and aluminium rear contacts and chemical vapour deposition to grow silicon nitride as the antireflection coating onto the front surface. This paper reviews this dominant solar cell technology looking into state-of-the-art equipment and corresponding processes for each process step. The main efficiency losses of this type of solar cell are analyzed to demonstrate the future efficiency potential of this technology. In research and development, more various advanced solar cell concepts have demonstrated higher efficiencies. The question which arises is “why are new solar cell concepts not transferred into industrial production more frequently?”. We look into the requirements a new solar cell technology has to fulfill to have an advantage over the current approach. Finally, we give an overview of high-efficiency concepts which have already been transferred into industrial production.

  7. Characterization of silicon-on-insulator wafers

    Science.gov (United States)

    Park, Ki Hoon

    The silicon-on-insulator (SOI) is attracting more interest as it is being used for an advanced complementary-metal-oxide-semiconductor (CMOS) and a base substrate for novel devices to overcome present obstacles in bulk Si scaling. Furthermore, SOI fabrication technology has improved greatly in recent years and industries produce high quality wafers with high yield. This dissertation investigated SOI material properties with simple, yet accurate methods. The electrical properties of as-grown wafers such as electron and hole mobilities, buried oxide (BOX) charges, interface trap densities, and carrier lifetimes were mainly studied. For this, various electrical measurement techniques were utilized such as pseudo-metal-oxide-semiconductor field-effect-transistor (PseudoMOSFET) static current-voltage (I-V) and transient drain current (I-t), Hall effect, and MOS capacitance-voltage/capacitance-time (C-V/C-t). The electrical characterization, however, mainly depends on the pseudo-MOSFET method, which takes advantage of the intrinsic SOI structure. From the static current-voltage and pulsed measurement, carrier mobilities, lifetimes and interface trap densities were extracted. During the course of this study, a pseudo-MOSFET drain current hysteresis regarding different gate voltage sweeping directions was discovered and the cause was revealed through systematic experiments and simulations. In addition to characterization of normal SOI, strain relaxation of strained silicon-on-insulator (sSOI) was also measured. As sSOI takes advantage of wafer bonding in its fabrication process, the tenacity of bonding between the sSOI and the BOX layer was investigated by means of thermal treatment and high dose energetic gamma-ray irradiation. It was found that the strain did not relax with processes more severe than standard CMOS processes, such as anneals at temperature as high as 1350 degree Celsius.

  8. Bond strength tests between silicon wafers and duran tubes (fusion bonded fluidic interconnects)

    NARCIS (Netherlands)

    Fazal, I.; Berenschot, Johan W.; de Boer, J.H.; Jansen, Henricus V.; Elwenspoek, Michael Curt

    2005-01-01

    The fusion bond strength of glass tubes with standard silicon wafers is presented. Experiments with plain silicon wafers and those coated with silicon oxide and silicon nitride are presented. Results obtained are discussed in terms of homogeneity and strength of fusion bond. High pressure testing

  9. Lamb wave propagation in monocrystalline silicon wafers

    OpenAIRE

    Fromme, P.; Pizzolato, M.; Robyr, J-L; Masserey, B.

    2018-01-01

    Monocrystalline silicon wafers are widely used in the photovoltaic industry for solar panels with high conversion efficiency. Guided ultrasonic waves offer the potential to efficiently detect micro-cracks in the thin wafers. Previous studies of ultrasonic wave propagation in silicon focused on effects of material anisotropy on bulk ultrasonic waves, but the dependence of the wave propagation characteristics on the material anisotropy is not well understood for Lamb waves. The phase slowness a...

  10. Nonlinear resonance ultrasonic vibrations in Czochralski-silicon wafers

    Science.gov (United States)

    Ostapenko, S.; Tarasov, I.

    2000-04-01

    A resonance effect of generation of subharmonic acoustic vibrations is observed in as-grown, oxidized, and epitaxial silicon wafers. Ultrasonic vibrations were generated into a standard 200 mm Czochralski-silicon (Cz-Si) wafer using a circular ultrasound transducer with major frequency of the radial vibrations at about 26 kHz. By tuning frequency (f) of the transducer within a resonance curve, we observed a generation of intense f/2 subharmonic acoustic mode assigned as a "whistle." The whistle mode has a threshold amplitude behavior and narrow frequency band. The whistle is attributed to a nonlinear acoustic vibration of a silicon plate. It is demonstrated that characteristics of the whistle mode are sensitive to internal stress and can be used for quality control and in-line diagnostics of oxidized and epitaxial Cz-Si wafers.

  11. Making Porous Luminescent Regions In Silicon Wafers

    Science.gov (United States)

    Fathauer, Robert W.; Jones, Eric W.

    1994-01-01

    Regions damaged by ion implantation stain-etched. Porous regions within single-crystal silicon wafers fabricated by straightforward stain-etching process. Regions exhibit visible photoluminescence at room temperature and might constitute basis of novel class of optoelectronic devices. Stain-etching process has advantages over recently investigated anodic-etching process. Process works on both n-doped and p-doped silicon wafers. Related development reported in article, "Porous Si(x)Ge(1-x) Layers Within Single Crystals of Si," (NPO-18836).

  12. Silicon waveguides produced by wafer bonding

    DEFF Research Database (Denmark)

    Poulsen, Mette; Jensen, Flemming; Bunk, Oliver

    2005-01-01

    X-ray waveguides are successfully produced employing standard silicon technology of UV photolithography and wafer bonding. Contrary to theoretical expectations for similar systems even 100 mu m broad guides of less than 80 nm height do not collapse and can be used as one dimensional waveguides...

  13. Hydrogen Incorporation during Aluminium Anodisation on Silicon Wafer Surfaces

    International Nuclear Information System (INIS)

    Lu, Pei Hsuan Doris; Strutzberg, Hartmuth; Wenham, Stuart; Lennon, Alison

    2014-01-01

    Hydrogen can act to reduce recombination at silicon surfaces for solar cell devices and consequently the ability of dielectric layers to provide a source of hydrogen for this purpose is of interest. However, due to the ubiquitous nature of hydrogen and its mobility, direct measurements of hydrogen incorporation in dielectric layers are challenging. In this paper, we report the use of secondary ion mass spectrometry measurements to show that deuterium from an electrolyte can be incorporated in an anodic aluminium oxide (AAO) layer and be introduced into an underlying amorphous silicon layer during anodisation of aluminium on silicon wafers. After annealing at 400 °C, the concentration of deuterium in the AAO was reduced by a factor of two, as the deuterium was re-distributed to the interface between the amorphous silicon and AAO and to the amorphous silicon. The assumption that hydrogen, from an aqueous electrolyte, could be similarly incorporated in AAO, is supported by the observation that the hydrogen content in the underlying amorphous silicon was increased by a factor of ∼ 3 after anodisation. Evidence for hydrogen being introduced into crystalline silicon after aluminium anodisation was provided by electrochemical capacitance voltage measurements indicating boron electrical deactivation in the underlying crystalline silicon. If introduced hydrogen can electrically deactivate dopant atoms at the surface, then it is reasonable to assume that it could also deactivate recombination-active states at the crystalline silicon interface therefore enabling higher minority carrier lifetimes in the silicon wafer

  14. Surface etching technologies for monocrystalline silicon wafer solar cells

    Science.gov (United States)

    Tang, Muzhi

    With more than 200 GW of accumulated installations in 2015, photovoltaics (PV) has become an important green energy harvesting method. The PV market is dominated by solar cells made from crystalline silicon wafers. The engineering of the wafer surfaces is critical to the solar cell cost reduction and performance enhancement. Therefore, this thesis focuses on the development of surface etching technologies for monocrystalline silicon wafer solar cells. It aims to develop a more efficient alkaline texturing method and more effective surface cleaning processes. Firstly, a rapid, isopropanol alcohol free texturing method is successfully demonstrated to shorten the process time and reduce the consumption of chemicals. This method utilizes the special chemical properties of triethylamine, which can form Si-N bonds with wafer surface atoms. Secondly, a room-temperature anisotropic emitter etch-back process is developed to improve the n+ emitter passivation. Using this method, 19.0% efficient screen-printed aluminium back surface field solar cells are developed that show an efficiency gain of 0.15% (absolute) compared with conventionally made solar cells. Finally, state-of-the-art silicon surface passivation results are achieved using hydrogen plasma etching as a dry alternative to the classical hydrofluoric acid wet-chemical process. The effective native oxide removal and the hydrogenation of the silicon surface are shown to be the reasons for the excellent level of surface passivation achieved with this novel method.

  15. Stress and phase changes in a low-thermal-expansion Al-3at.%Ge alloy film on oxidized silicon wafers

    International Nuclear Information System (INIS)

    Tu, K.N.; Rodbell, K.P.; Herd, S.R.; Mikalsen, D.J.

    1993-01-01

    The alloy of Al-3at.%Ge has been found to have a low thermal expansion and contraction in the temperature range of room temperature to 400 C. The reason for the low thermal contraction (or expansion) is the precipitation (or dissolution) of Ge in the alloy. The Ge precipitates have a diamond structure in which each Ge atom occupies a much larger atomic volume than a Ge atom dissolved substitutionally in Al. The volume difference compensates for the effect of thermal expansion and contraction with changing temperature which in turn reduces the thermal stress due to thermal mismatch. The technique of wafer bending was used to determine the stress of the alloy film on oxidized silicon wafers upon thermal cycling; indeed, it is much lower than that of pure Al on identical wafers. The morphology of precipitation and dissolution of Ge in Al has been studied by transmission and scanning electron microscopy. It is found that the precipitation follows a discontinuous mode and occurs predominantly along grain boundaries. In dissolving the Ge precipitates into Al, voids are left behind because of the volume difference. It is proposed that this may explain the enhancement of nucleation of voids in the alloy film upon thermal cycling. (orig.)

  16. Low-cost silicon wafer dicing using a craft cutter

    KAUST Repository

    Fan, Yiqiang

    2014-05-20

    This paper reports a low-cost silicon wafer dicing technique using a commercial craft cutter. The 4-inch silicon wafers were scribed using a crafter cutter with a mounted diamond blade. The pre-programmed automated process can reach a minimum die feature of 3 mm by 3 mm. We performed this scribing process on the top polished surface of a silicon wafer; we also created a scribing method for the back-unpolished surface in order to protect the structures on the wafer during scribing. Compared with other wafer dicing methods, our proposed dicing technique is extremely low cost (lower than $1,000), and suitable for silicon wafer dicing in microelectromechanical or microfluidic fields, which usually have a relatively large die dimension. The proposed dicing technique is also usable for dicing multiple project wafers, a process where dies of different dimensions are diced on the same wafer.

  17. Graphitized silicon carbide microbeams: wafer-level, self-aligned graphene on silicon wafers

    International Nuclear Information System (INIS)

    Cunning, Benjamin V; Ahmed, Mohsin; Mishra, Neeraj; Kermany, Atieh Ranjbar; Iacopi, Francesca; Wood, Barry

    2014-01-01

    Currently proven methods that are used to obtain devices with high-quality graphene on silicon wafers involve the transfer of graphene flakes from a growth substrate, resulting in fundamental limitations for large-scale device fabrication. Moreover, the complex three-dimensional structures of interest for microelectromechanical and nanoelectromechanical systems are hardly compatible with such transfer processes. Here, we introduce a methodology for obtaining thousands of microbeams, made of graphitized silicon carbide on silicon, through a site-selective and wafer-scale approach. A Ni-Cu alloy catalyst mediates a self-aligned graphitization on prepatterned SiC microstructures at a temperature that is compatible with silicon technologies. The graphene nanocoating leads to a dramatically enhanced electrical conductivity, which elevates this approach to an ideal method for the replacement of conductive metal films in silicon carbide-based MEMS and NEMS devices. (paper)

  18. Sol-gel bonding of silicon wafers

    International Nuclear Information System (INIS)

    Barbe, C.J.; Cassidy, D.J.; Triani, G.; Latella, B.A.; Mitchell, D.R.G.; Finnie, K.S.; Short, K.; Bartlett, J.R.; Woolfrey, J.L.; Collins, G.A.

    2005-01-01

    Sol-gel bonds have been produced between smooth, clean silicon substrates by spin-coating solutions containing partially hydrolysed silicon alkoxides. The two coated substrates were assembled and the resulting sandwich fired at temperatures ranging from 60 to 600 deg. C. The sol-gel coatings were characterised using attenuated total reflectance Fourier transform infrared spectroscopy, ellipsometry, and atomic force microscopy, while the corresponding bonded specimens were investigated using scanning electron microscopy and cross-sectional transmission electron microscopy. Mechanical properties were characterised using both microindentation and tensile testing. Bonding of silicon wafers has been successfully achieved at temperatures as low as 60 deg. C. At 300 deg. C, the interfacial fracture energy was 1.55 J/m 2 . At 600 deg. C, sol-gel bonding provided superior interfacial fracture energy over classical hydrophilic bonding (3.4 J/m 2 vs. 1.5 J/m 2 ). The increase in the interfacial fracture energy is related to the increase in film density due to the sintering of the sol-gel interface with increasing temperature. The superior interfacial fracture energy obtained by sol-gel bonding at low temperature is due to the formation of an interfacial layer, which chemically bonds the two sol-gel coatings on each wafer. Application of a tensile stress on the resulting bond leads to fracture of the samples at the silicon/sol-gel interface

  19. Lamb wave propagation in monocrystalline silicon wafers.

    Science.gov (United States)

    Fromme, Paul; Pizzolato, Marco; Robyr, Jean-Luc; Masserey, Bernard

    2018-01-01

    Monocrystalline silicon wafers are widely used in the photovoltaic industry for solar panels with high conversion efficiency. Guided ultrasonic waves offer the potential to efficiently detect micro-cracks in the thin wafers. Previous studies of ultrasonic wave propagation in silicon focused on effects of material anisotropy on bulk ultrasonic waves, but the dependence of the wave propagation characteristics on the material anisotropy is not well understood for Lamb waves. The phase slowness and beam skewing of the two fundamental Lamb wave modes A 0 and S 0 were investigated. Experimental measurements using contact wedge transducer excitation and laser measurement were conducted. Good agreement was found between the theoretically calculated angular dependency of the phase slowness and measurements for different propagation directions relative to the crystal orientation. Significant wave skew and beam widening was observed experimentally due to the anisotropy, especially for the S 0 mode. Explicit finite element simulations were conducted to visualize and quantify the guided wave beam skew. Good agreement was found for the A 0 mode, but a systematic discrepancy was observed for the S 0 mode. These effects need to be considered for the non-destructive testing of wafers using guided waves.

  20. Chemical polishing of epitoxial silicon wafer

    International Nuclear Information System (INIS)

    Osada, Shohei

    1978-01-01

    SSD telescopes are used for the determination of the kind and energy of charged particles produced by nuclear reactions, and are the equipments combining ΔE counters and E counters. The ΔE counter is a thin SSD which is required to be thin and homogeneous enough to get the high resolution of measurement. The SSDs for ΔE counters have so far been obtained by polishing silicon plates mechanically and chemically or by applying electrolytic polishing method on epitaxial silicon wafers, but it was very hard to obtain them. The creative etching equipment and technique developed this time make it possible to obtain thin SSDs for ΔE counters. The outline of the etching equipment and its technique are described in the report. The etching technique applied for the silicon films for ΔE counters with thickness of about 10 μm was able to be experimentally established in this study. (Kobatake, H.)

  1. Silicon-to-silicon wafer bonding using evaporated glass

    DEFF Research Database (Denmark)

    Weichel, Steen; Reus, Roger De; Lindahl, M.

    1998-01-01

    Anodic bending of silicon to silicon 4-in. wafers using an electron-beam evaporated glass (Schott 8329) was performed successfully in air at temperatures ranging from 200 degrees C to 450 degrees C. The composition of the deposited glass is enriched in sodium as compared to the target material....... The roughness of the as-deposited films was below 5 nm and was found to be unchanged by annealing at 500 degrees C for 1 h in air. No change in the macroscopic edge profiles of the glass film was found as a function of annealing; however, small extrusions appear when annealing above 450 degrees C. Annealing...... of silicon/glass structures in air around 340 degrees C for 15 min leads to stress-free structures. Bonded wafer pairs, however, show no reduction in stress and always exhibit compressive stress. The bond yield is larger than 95% for bonding temperatures around 350 degrees C and is above 80% for bonding...

  2. High frequency guided wave propagation in monocrystalline silicon wafers

    OpenAIRE

    Pizzolato, M.; Masserey, B.; Robyr, J. L.; Fromme, P.

    2017-01-01

    Monocrystalline silicon wafers are widely used in the photovoltaic industry for solar panels with high conversion efficiency. The cutting process can introduce micro-cracks in the thin wafers and lead to varying thickness. High frequency guided ultrasonic waves are considered for the structural monitoring of the wafers. The anisotropy of the monocrystalline silicon leads to variations of the wave characteristics, depending on the propagation direction relative to the crystal orientation. Full...

  3. Ambient plasma treatment of silicon wafers for surface passivation recovery

    Science.gov (United States)

    Ge, Jia; Prinz, Markus; Markert, Thomas; Aberle, Armin G.; Mueller, Thomas

    2017-08-01

    In this work, the effect of an ambient plasma treatment powered by compressed dry air on the passivation quality of silicon wafers coated with intrinsic amorphous silicon sub-oxide is investigated. While long-time storage deteriorates the effective lifetime of all samples, a short ambient plasma treatment improves their passivation qualities. By studying the influence of the plasma treatment parameters on the passivation layers, an optimized process condition was identified which even boosted the passivation quality beyond its original value obtained immediately after deposition. On the other hand, the absence of stringent requirement on gas precursors, vacuum condition and longtime processing makes the ambient plasma treatment an excellent candidate to replace conventional thermal annealing in industrial heterojunction solar cell production.

  4. Low-cost silicon wafer dicing using a craft cutter

    KAUST Repository

    Fan, Yiqiang; Carreno, Armando Arpys Arevalo; Li, Huawei; Foulds, Ian G.

    2014-01-01

    feature of 3 mm by 3 mm. We performed this scribing process on the top polished surface of a silicon wafer; we also created a scribing method for the back-unpolished surface in order to protect the structures on the wafer during scribing. Compared

  5. Fluorine-enhanced low-temperature wafer bonding of native-oxide covered Si wafers

    Science.gov (United States)

    Tong, Q.-Y.; Gan, Q.; Fountain, G.; Enquist, P.; Scholz, R.; Gösele, U.

    2004-10-01

    The bonding energy of bonded native-oxide-covered silicon wafers treated in the HNO3/H2O/HF or the HNO3/HF solution prior to room-temperature contact is significantly higher than bonded standard RCA1 cleaned wafer pairs after low-temperature annealing. The bonding energy reaches over 2000mJ/m2 after annealing at 100 °C. The very slight etching and fluorine in the chemically grown oxide are believed to be the main contributors to the enhanced bonding energy. Transmission-electron-microscopic images have shown that the chemically formed native oxide at bonding interface is embedded with many flake-like cavities. The cavities can absorb the by-products of the interfacial reactions that result in covalent bond formation at low temperatures allowing the strong bond to be retained.

  6. Sol-gel bonding of silicon wafers

    International Nuclear Information System (INIS)

    Barbe, C.J.; Cassidy, D.J.; Triani, G.; Latella, B.A.; Mitchell, D.R.G.; Finnie, K.S.; Bartlett, J.R.; Woolfrey, J.L.; Collins, G.A.

    2005-01-01

    Low temperature bonding of silicon wafers was achieved using sol-gel technology. The initial sol-gel chemistry of the coating solution was found to influence the mechanical properties of the resulting bonds. More precisely, the influence of parameters such as the alkoxide concentration, water-to-alkoxide molar ratio, pH, and solution aging on the final bond morphologies and interfacial fracture energy was studied. The thickness and density of the sol-gel coating were characterised using ellipsometry. The corresponding bonded specimens were investigated using attenuated total reflectance Fourier transformed infrared spectroscopy to monitor their chemical composition, infrared imaging to control bond integrity, and cross-sectional transmission electron microscopy to study their microstructure. Their interfacial fracture energy was measured using microindentation. An optimum water-to-alkoxide molar ratio of 10 and hydrolysis water at pH = 2 were found. Such conditions led to relatively dense films (> 90%), resulting in bonds with a fracture energy of 3.5 J/m 2 , significantly higher than those obtained using classical hydrophilic bonding (typically 1.5-2.5 J/m 2 ). Ageing of the coating solution was found to decrease the bond strength

  7. Effect of nanoscale surface roughness on the bonding energy of direct-bonded silicon wafers

    Science.gov (United States)

    Miki, N.; Spearing, S. M.

    2003-11-01

    Direct wafer bonding of silicon wafers is a promising technology for manufacturing three-dimensional complex microelectromechanical systems as well as silicon-on-insulator substrates. Previous work has reported that the bond quality declines with increasing surface roughness, however, this relationship has not been quantified. This article explicitly correlates the bond quality, which is quantified by the apparent bonding energy, and the surface morphology via the bearing ratio, which describes the area of surface lying above a given depth. The apparent bonding energy is considered to be proportional to the real area of contact. The effective area of contact is defined as the area sufficiently close to contribute to the attractive force between the two bonding wafers. Experiments were conducted with silicon wafers whose surfaces were roughened by a buffered oxide etch solution (BOE, HF:NH4F=1:7) and/or a potassium hydroxide solution. The surface roughness was measured by atomic force microscopy. The wafers were direct bonded to polished "monitor" wafers following a standard RCA cleaning and the resulting bonding energy was measured by the crack-opening method. The experimental results revealed a clear correlation between the bonding energy and the bearing ratio. A bearing depth of ˜1.4 nm was found to be appropriate for the characterization of direct-bonded silicon at room temperature, which is consistent with the thickness of the water layer at the interface responsible for the hydrogen bonds that link the mating wafers.

  8. Guided ultrasonic wave beam skew in silicon wafers

    Science.gov (United States)

    Pizzolato, Marco; Masserey, Bernard; Robyr, Jean-Luc; Fromme, Paul

    2018-04-01

    In the photovoltaic industry, monocrystalline silicon wafers are employed for solar cells with high conversion efficiency. Micro-cracks induced by the cutting process in the thin wafers can lead to brittle wafer fracture. Guided ultrasonic waves would offer an efficient methodology for the in-process non-destructive testing of wafers to assess micro-crack density. The material anisotropy of the monocrystalline silicon leads to variations of the guided wave characteristics, depending on the propagation direction relative to the crystal orientation. Selective guided ultrasonic wave excitation was achieved using a contact piezoelectric transducer with custom-made wedges for the A0 and S0 Lamb wave modes and a transducer holder to achieve controlled contact pressure and orientation. The out-of-plane component of the guided wave propagation was measured using a non-contact laser interferometer. The phase slowness (velocity) of the two fundamental Lamb wave modes was measured experimentally for varying propagation directions relative to the crystal orientation and found to match theoretical predictions. Significant wave beam skew was observed experimentally, especially for the S0 mode, and investigated from 3D finite element simulations. Good agreement was found with the theoretical predictions based on nominal material properties of the silicon wafer. The important contribution of guided wave beam skewing effects for the non-destructive testing of silicon wafers was demonstrated.

  9. Preparation and characterisation of immobilised humic acid on silicon wafer

    International Nuclear Information System (INIS)

    Szabo, Gy.; Guczi, J.; Telegdi, J.; Pashalidis, I.; Szymczak, W.; Buckau, G.

    2005-01-01

    Full text of publication follows: The chemistry of the interactions of radionuclides with humic acid needs to be understood in details so that humate-mediated migration of radionuclides through the environment can be predicted. To achieve such a data in microscopic scale, several detective techniques, such as atomic force microscopy (AFM), chemical force microscopy (CFM), nuclear microprobe analysis (NMA) and X-ray photoelectron spectroscopy (XPS) can be used to measure intermolecular forces and to visualize the surface morphology. The main aim of this work was to provide humic material with specific properties in order to study with different spectroscopic techniques, the complexation behaviour of surface bound humic acid in microscopic scale. Namely, humic acid has been immobilised on silicon wafers in order to mimic surface bound humic substances in natural aquatic systems. In this communication, we present a simple protocol to immobilize humic acid on silicon wafer surface. A tri-functional silane reagent 3-amino-propyl-tri-methoxy-silane (APTES) was used to modify the surface of silicon wafers and appeared to be able to strongly attached soluble humic acid through their carboxylic groups to solid support. Characterisation of the surfaces, after any preparation steps, was done by ATR-FTIR, AFM and TOF-SIMS. These methods have proved that the humic acid forms a relatively homogeneous layer on the wafers. Immobilisation of humic acid on silicon wafer was further proved by binding isotherm of Am/Nd. (authors)

  10. Size of silicon strip sensor from 6 inch wafer (right) compared to that from a 4 inch wafer (left).

    CERN Multimedia

    Honma, Alan

    1999-01-01

    Silicon strip sensors made from 6 inch wafers will allow for much larger surface area coverage at a reduced cost per unit surface area. A prototype sensor of size 8cm x 11cm made by Hamamatsu from a 6 inch wafer is shown next to a traditional 6cm x 6cm sensor from a 4 inch wafer.

  11. Cohesive zone model for direct silicon wafer bonding

    Science.gov (United States)

    Kubair, D. V.; Spearing, S. M.

    2007-05-01

    Direct silicon wafer bonding and decohesion are simulated using a spectral scheme in conjunction with a rate-dependent cohesive model. The cohesive model is derived assuming the presence of a thin continuum liquid layer at the interface. Cohesive tractions due to the presence of a liquid meniscus always tend to reduce the separation distance between the wafers, thereby opposing debonding, while assisting the bonding process. In the absence of the rate-dependence effects the energy needed to bond a pair of wafers is equal to that needed to separate them. When rate-dependence is considered in the cohesive law, the experimentally observed asymmetry in the energetics can be explained. The derived cohesive model has the potential to form a bridge between experiments and a multiscale-modelling approach to understand the mechanics of wafer bonding.

  12. High frequency guided wave propagation in monocrystalline silicon wafers

    Science.gov (United States)

    Pizzolato, Marco; Masserey, Bernard; Robyr, Jean-Luc; Fromme, Paul

    2017-04-01

    Monocrystalline silicon wafers are widely used in the photovoltaic industry for solar panels with high conversion efficiency. The cutting process can introduce micro-cracks in the thin wafers and lead to varying thickness. High frequency guided ultrasonic waves are considered for the structural monitoring of the wafers. The anisotropy of the monocrystalline silicon leads to variations of the wave characteristics, depending on the propagation direction relative to the crystal orientation. Full three-dimensional Finite Element simulations of the guided wave propagation were conducted to visualize and quantify these effects for a line source. The phase velocity (slowness) and skew angle of the two fundamental Lamb wave modes (first anti-symmetric mode A0 and first symmetric mode S0) for varying propagation directions relative to the crystal orientation were measured experimentally. Selective mode excitation was achieved using a contact piezoelectric transducer with a custom-made wedge and holder to achieve a controlled contact pressure. The out-of-plane component of the guided wave propagation was measured using a noncontact laser interferometer. Good agreement was found with the simulation results and theoretical predictions based on nominal material properties of the silicon wafer.

  13. Comparison of silicon strip tracker module size using large sensors from 6 inch wafers

    CERN Multimedia

    Honma, Alan

    1999-01-01

    Two large silicon strip sensor made from 6 inch wafers are placed next to each other to simulate the size of a CMS outer silicon tracker module. On the left is a prototype 2 sensor CMS inner endcap silicon tracker module made from 4 inch wafers.

  14. Denuded zone in Czochralski silicon wafer with high carbon content

    International Nuclear Information System (INIS)

    Chen Jiahe; Yang Deren; Ma Xiangyang; Que Duanlin

    2006-01-01

    The thermal stability of the denuded zone (DZ) created by high-low-high-temperature annealing in high carbon content (H[C]) and low carbon content (L[C]) Czochralski silicon (Cz-Si) has been investigated in a subsequent ramping and isothermal 1050 deg. C annealing. The tiny oxygen precipitates which might occur in the DZ were checked. It was found in the L[C] Cz-Si that the DZ shrank and the density of bulk micro-defects (BMDs) reduced with the increase of time spent at 1050 deg. C. Also, the DZs above 15 μm of thickness present in the H[C] Cz-Si wafers continuously and the density and total volume of BMDs first decreased then increased and finally decreased again during the treatments. Moreover, tiny oxygen precipitates were hardly generated inside the DZs, indicating that H[C] Cz-Si wafers could support the fabrication of integrated circuits

  15. Denuded zone in Czochralski silicon wafer with high carbon content

    Science.gov (United States)

    Chen, Jiahe; Yang, Deren; Ma, Xiangyang; Que, Duanlin

    2006-12-01

    The thermal stability of the denuded zone (DZ) created by high-low-high-temperature annealing in high carbon content (H[C]) and low carbon content (L[C]) Czochralski silicon (Cz-Si) has been investigated in a subsequent ramping and isothermal 1050 °C annealing. The tiny oxygen precipitates which might occur in the DZ were checked. It was found in the L[C] Cz-Si that the DZ shrank and the density of bulk micro-defects (BMDs) reduced with the increase of time spent at 1050 °C. Also, the DZs above 15 µm of thickness present in the H[C] Cz-Si wafers continuously and the density and total volume of BMDs first decreased then increased and finally decreased again during the treatments. Moreover, tiny oxygen precipitates were hardly generated inside the DZs, indicating that H[C] Cz-Si wafers could support the fabrication of integrated circuits.

  16. Peptide and protein loading into porous silicon wafers

    Energy Technology Data Exchange (ETDEWEB)

    Prestidge, C.A.; Barnes, T.J.; Mierczynska-Vasilev, A.; Kempson, I.; Peddie, F. [Ian Wark Research Institute, University of South Australia, Mawson Lakes (Australia); Barnett, C. [Medica Ltd, Malvern, Worcestershire, UK WR14 3SZ (United Kingdom)

    2008-02-15

    The influence of peptide/protein size and hydrophobicity on the physical and chemical aspects of loading within porous silicon (pSi) wafer samples has been determined using Atomic Force Microscopy (AFM) and Time-of-Flight Secondary Ion Mass Spectroscopy (ToF-SIMS). Both Gramicidin A (a small hydrophobic peptide) and Papain (a larger hydrophilic protein) were observed (ToF-SIMS) to penetrate across the entire pSi layer, even at low loading levels. AFM surface imaging of pSi wafers during peptide/protein loading showed that surface roughness increased with Papain loading, but decreased with Gramicidin A loading. For Papain, the loading methodology was also found to influence loading efficiency. These differences indicate more pronounced surface adsorption of Papain. (copyright 2008 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim) (orig.)

  17. Contacting graphene in a 200 mm wafer silicon technology environment

    Science.gov (United States)

    Lisker, Marco; Lukosius, Mindaugas; Kitzmann, Julia; Fraschke, Mirko; Wolansky, Dirk; Schulze, Sebastian; Lupina, Grzegorz; Mai, Andreas

    2018-06-01

    Two different approaches for contacting graphene in a 200 mm wafer silicon technology environment were tested. The key is the opportunity to create a thin SiN passivation layer on top of the graphene protecting it from the damage by plasma processes. The first approach uses pure Ni contacts with a thickness of 200 nm. For the second attempt, Ni is used as the contact metal which substitutes the Ti compared to a standard contact hole filling process. Accordingly, the contact hole filling of this "stacked via" approach is Ni/TiN/W. We demonstrate that the second "stacked Via" is beneficial and shows contact resistances of a wafer scale process with values below 200 Ohm μm.

  18. Mechanical Properties of Photovoltaic Silicon in Relation to Wafer Breakage

    Science.gov (United States)

    Kulshreshtha, Prashant Kumar

    This thesis focuses on the fundamental understanding of stress-modified crack-propagation in photovoltaic (PV) silicon in relation to the critical issue of PV silicon "wafer breakage". The interactions between a propagating crack and impurities/defects/residual stresses have been evaluated for consequential fracture path in a thin PV Si wafer. To investigate the mechanism of brittle fracture in silicon, the phase transformations induced by elastic energy released at a propagating crack-tip have been evaluated by locally stressing the diamond cubic Si lattice using a rigid Berkovich nanoindenter tip (radius ≈50 nm). Unique pressure induced phase transformations and hardness variations have been then related to the distribution of precipitates (O, Cu, Fe etc.), and the local stresses in the wafer. This research demonstrates for the first time the "ductile-like fracture" in almost circular crack path that significantly deviates from its energetically favorable crystallographic [110](111) system. These large diameter (≈ 200 mm) Si wafers were sliced to less than 180 microm thickness from a Czochralski (CZ) ingot that was grown at faster than normal growth rates. The vacancy (vSi) driven precipitation of oxygen at enhanced thermal gradients in the wafer core develops large localized stresses (upto 100 MPa) which we evaluated using Raman spectral analysis. Additional micro-FTIR mapping and microscopic etch pit measurements in the wafer core have related the observed crack path deviations to the presence of concentric ring-like distributions of oxygen precipitates (OPs). To replicate these "real-world" breakage scenarios and provide better insight on crack-propagation, several new and innovative tools/devices/methods have been developed in this study. An accurate quantitative profiling of local stress, phase changes and load-carrying ability of Si lattice has been performed in the vicinity of the controlled micro-cracks created using micro-indentations to represent

  19. Residual stress in silicon wafer using IR polariscope

    Science.gov (United States)

    Lu, Zhijia; Wang, Pin; Asundi, Anand

    2008-09-01

    The infrared phase shift polariscope (IR-PSP) is a full-field optical technique for stress analysis in Silicon wafers. Phase shift polariscope is preferred to a conventional polariscope, as it can provide quantitative information of the normal stress difference and the shear stress in the specimen. The method is based on the principles of photoelasticity, in which stresses induces temporary birefringence in materials which can be quantitatively analyzed using a phase shift polariscope. Compared to other stress analysis techniques such as x-ray diffraction or laser scanning, infrared photoelastic stress analysis provides full-field information with high resolution and in near real time. As the semiconductor fabrication is advancing, larger wafers, thinner films and more compact packages are being manufactured. This results in a growing demand of process control. Residual stress exist in silicon during semiconductor fabrication and these stresses may make cell processing difficult or even cause the failure of the silicon. Reducing these stresses would improve manufacturability and reliability. Therefore stress analysis is essential to trace the root cause of the stresses. The polariscope images are processed using MATLAB and four-step phase shifting method to provide quantitative as well as qualitative information regarding the residual stress of the sample. The system is calibrated using four-point bend specimen and then the residual stress distribution in a MEMS sample is shown.

  20. Ultra-thin silicon oxide layers on crystalline silicon wafers: Comparison of advanced oxidation techniques with respect to chemically abrupt SiO{sub 2}/Si interfaces with low defect densities

    Energy Technology Data Exchange (ETDEWEB)

    Stegemann, Bert, E-mail: bert.stegemann@htw-berlin.de [HTW Berlin - University of Applied Sciences, 12459 Berlin (Germany); Gad, Karim M. [University of Freiburg, Department of Microsystems Engineering - IMTEK, 79110 Freiburg (Germany); Balamou, Patrice [HTW Berlin - University of Applied Sciences, 12459 Berlin (Germany); Helmholtz Center Berlin for Materials and Energy (HZB), 12489 Berlin (Germany); Sixtensson, Daniel [Helmholtz Center Berlin for Materials and Energy (HZB), 12489 Berlin (Germany); Vössing, Daniel; Kasemann, Martin [University of Freiburg, Department of Microsystems Engineering - IMTEK, 79110 Freiburg (Germany); Angermann, Heike [Helmholtz Center Berlin for Materials and Energy (HZB), 12489 Berlin (Germany)

    2017-02-15

    Highlights: • Fabrication of ultrathin SiO{sub 2} tunnel layers on c-Si. • Correlation of electronic and chemical SiO{sub 2}/Si interface properties revealed by XPS/SPV. • Chemically abrupt SiO{sub 2}/Si interfaces generate less interface defect states considerable. - Abstract: Six advanced oxidation techniques were analyzed, evaluated and compared with respect to the preparation of high-quality ultra-thin oxide layers on crystalline silicon. The resulting electronic and chemical SiO{sub 2}/Si interface properties were determined by a combined x-ray photoemission (XPS) and surface photovoltage (SPV) investigation. Depending on the oxidation technique, chemically abrupt SiO{sub 2}/Si interfaces with low densities of interface states were fabricated on c-Si either at low temperatures, at short times, or in wet-chemical environment, resulting in each case in excellent interface passivation. Moreover, the beneficial effect of a subsequent forming gas annealing (FGA) step for the passivation of the SiO{sub 2}/Si interface of ultra-thin oxide layers has been proven. Chemically abrupt SiO{sub 2}/Si interfaces have been shown to generate less interface defect states.

  1. Tests of a silicon wafer based neutron collimator

    International Nuclear Information System (INIS)

    Cussen, L.D.; Vale, C.J.; Anderson, I.S.; Hoeghoj, P.

    2001-01-01

    A Soller slit neutron collimator has been prepared by stacking 160 μm thick single crystal silicon wafers coated on one surface with 4 μm of gadolinium metal. The collimator has an angular width of 20 min full width at half maximum and an effective length of 2.75 cm. The collimator has beam dimensions of 1 cm wide by 5.3 cm high. Tests at neutron wavelengths 7.5A and 1.8A showed a peak transmission of 88% within 2% of the optimum theoretical possibility. The background suppression in the wings is comparable with that of conventional neutron collimators

  2. Tests of a silicon wafer based neutron collimator

    CERN Document Server

    Cussen, L D; Anderson, I S; Hoeghoj, P

    2001-01-01

    A Soller slit neutron collimator has been prepared by stacking 160 mu m thick single crystal silicon wafers coated on one surface with 4 mu m of gadolinium metal. The collimator has an angular width of 20 min full width at half maximum and an effective length of 2.75 cm. The collimator has beam dimensions of 1 cm wide by 5.3 cm high. Tests at neutron wavelengths 7.5A and 1.8A showed a peak transmission of 88% within 2% of the optimum theoretical possibility. The background suppression in the wings is comparable with that of conventional neutron collimators.

  3. Coherent spin transport through a 350 micron thick silicon wafer.

    Science.gov (United States)

    Huang, Biqin; Monsma, Douwe J; Appelbaum, Ian

    2007-10-26

    We use all-electrical methods to inject, transport, and detect spin-polarized electrons vertically through a 350-micron-thick undoped single-crystal silicon wafer. Spin precession measurements in a perpendicular magnetic field at different accelerating electric fields reveal high spin coherence with at least 13pi precession angles. The magnetic-field spacing of precession extrema are used to determine the injector-to-detector electron transit time. These transit time values are associated with output magnetocurrent changes (from in-plane spin-valve measurements), which are proportional to final spin polarization. Fitting the results to a simple exponential spin-decay model yields a conduction electron spin lifetime (T1) lower bound in silicon of over 500 ns at 60 K.

  4. An attempt to specify thermal history in CZ silicon wafers and possibilities for its modification

    International Nuclear Information System (INIS)

    Kissinger, G.; Sattler, A.; Mueller, T.; Ammon, W. von

    2007-01-01

    The term thermal history of silicon wafers represents the whole variety of process parameters of crystal growth. The aim of this contribution is an attempt to specify thermal history by one parameter that is directly correlated to the bulk microdefect density. The parameter that reflects thermal history and correlates it with nucleation of oxide precipitates is the concentration of VO 2 complexes. The VO 2 concentration in silicon wafers is too low to be measured by FTIR but it can be obtained from the loss of interstitial oxygen during a standardized thermal treatment. Based on this, the vacancy concentration frozen during crystal cooling in the ingot can be calculated. RTA treatments above 1150 deg. C create a well defined level of the VO 2 concentration in silicon wafers. This means that a well controlled modification of the thermal history is possible. We also investigated the kinetics of reduction of the as-grown excess VO 2 concentration during RTA treatments at 950 deg. C and 1050 deg. C and the effectiveness of this attempt to totally delete the thermal history

  5. Comparison on mechanical properties of heavily phosphorus- and arsenic-doped Czochralski silicon wafers

    Science.gov (United States)

    Yuan, Kang; Sun, Yuxin; Lu, Yunhao; Liang, Xingbo; Tian, Daxi; Ma, Xiangyang; Yang, Deren

    2018-04-01

    Heavily phosphorus (P)- and arsenic (As)-doped Czochralski silicon (CZ-Si) wafers generally act as the substrates for the epitaxial silicon wafers used to fabricate power and communication devices. The mechanical properties of such two kinds of n-type heavily doped CZ silicon wafers are vital to ensure the quality of epitaxial silicon wafers and the manufacturing yields of devices. In this work, the mechanical properties including the hardness, Young's modulus, indentation fracture toughness and the resistance to dislocation motion have been comparatively investigated for heavily P- and As-doped CZ-Si wafers. It is found that heavily P-doped CZ-Si possesses somewhat higher hardness, lower Young's modulus, larger indentation fracture toughness and stronger resistance to dislocation motion than heavily As-doped CZ-Si. The mechanisms underlying this finding have been tentatively elucidated by considering the differences in the doping effects of P and As in silicon.

  6. Nano-ridge fabrication by local oxidation of silicon edges with silicon nitride as a mask

    NARCIS (Netherlands)

    Haneveld, J.; Berenschot, Johan W.; Maury, P.A.; Jansen, Henricus V.

    2005-01-01

    A method to fabricate nano-ridges over a full wafer is presented. The fabrication method uses local oxidation of silicon, with silicon nitride as a mask, and wet anisotropic etching of silicon. The realized structures are 7-20 nm wide, 40-100 nm high and centimeters long. All dimensions are easily

  7. Locally-enhanced light scattering by a monocrystalline silicon wafer

    Directory of Open Access Journals (Sweden)

    Li Ma

    2018-03-01

    Full Text Available We study the optical properties of light scattering by a monocrystalline silicon wafer, by using transparent material to replicate its surface structure and illuminating a fabricated sample with a laser source. The experimental results show that the scattering field contains four spots of concentrated intensity with high local energy, and these spots are distributed at the four vertices of a square with lines of intensity linking adjacent spots. After discussing simulations of and theory about the formation of this light scattering, we conclude that the scattering field is formed by the effects of both geometrical optics and physical optics. Moreover, we calculate the central angle of the spots in the light field, and the result indicates that the locally-enhanced intensity spots have a definite scattering angle. These results may possibly provide a method for improving energy efficiency within mono-Si based solar cells.

  8. Impurity engineering for germanium-doped Czochralski silicon wafer used for ultra large scale integrated circuit

    Energy Technology Data Exchange (ETDEWEB)

    Chen, Jiahe; Yang, Deren [State Key Laboratory of Silicon Materials, Department of Materials Science and Engineering, Zhejiang University, Hangzhou (China)

    2009-07-01

    Internal gettering (IG) technology has been challenged by both the reduction of thermal budget during device fabrication and the enlargement of wafer diameter. Improving the properties of Czochralski (Cz) silicon wafers by intentional impurity doping, the so-called 'impurity engineering (IE)', is defined. Germanium has been found to be one of the important impurities for improving the internal gettering effect in Cz silicon wafer. In this paper, the investigations on IE involved with the conventional furnace anneal based denudation processing for germanium-doped Cz silicon wafer are reviewed. Meanwhile, the potential mechanisms of germanium effects for the IE of Cz silicon wafer are also interpreted based on the experimental facts. (copyright 2009 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim) (orig.)

  9. "Silicon millefeuille": From a silicon wafer to multiple thin crystalline films in a single step

    Science.gov (United States)

    Hernández, David; Trifonov, Trifon; Garín, Moisés; Alcubilla, Ramon

    2013-04-01

    During the last years, many techniques have been developed to obtain thin crystalline films from commercial silicon ingots. Large market applications are foreseen in the photovoltaic field, where important cost reductions are predicted, and also in advanced microelectronics technologies as three-dimensional integration, system on foil, or silicon interposers [Dross et al., Prog. Photovoltaics 20, 770-784 (2012); R. Brendel, Thin Film Crystalline Silicon Solar Cells (Wiley-VCH, Weinheim, Germany 2003); J. N. Burghartz, Ultra-Thin Chip Technology and Applications (Springer Science + Business Media, NY, USA, 2010)]. Existing methods produce "one at a time" silicon layers, once one thin film is obtained, the complete process is repeated to obtain the next layer. Here, we describe a technology that, from a single crystalline silicon wafer, produces a large number of crystalline films with controlled thickness in a single technological step.

  10. Introduction of high oxygen concentrations into silicon wafers by high-temperature diffusion

    International Nuclear Information System (INIS)

    Casse, G.; Glaser, M.; Lemeilleur, F.; Ruzin, A.; Wegrzecki, M.

    1999-01-01

    The tolerance of silicon detectors to hadron irradiation can be improved by the introduction of a high concentration of oxygen into the starting material. High-resistivity Floating-Zone (FZ) silicon is required for detectors used in particle physics applications. A significantly high oxygen concentration (>10 17 atoms cm -3 ) cannot readily be achieved during the FZ silicon refinement. The diffusion of oxygen at elevated temperatures from a SiO 2 layer grown on both sides of a silicon wafer is a simple and effective technique to achieve high and uniform concentrations of oxygen throughout the bulk of a 300 μm thick silicon wafer

  11. Buried oxide layer in silicon

    Science.gov (United States)

    Sadana, Devendra Kumar; Holland, Orin Wayne

    2001-01-01

    A process for forming Silicon-On-Insulator is described incorporating the steps of ion implantation of oxygen into a silicon substrate at elevated temperature, ion implanting oxygen at a temperature below 200.degree. C. at a lower dose to form an amorphous silicon layer, and annealing steps to form a mixture of defective single crystal silicon and polycrystalline silicon or polycrystalline silicon alone and then silicon oxide from the amorphous silicon layer to form a continuous silicon oxide layer below the surface of the silicon substrate to provide an isolated superficial layer of silicon. The invention overcomes the problem of buried isolated islands of silicon oxide forming a discontinuous buried oxide layer.

  12. Analysis of borophosphosilicate glass layers on silicon wafers by X-ray emission from photon and electron excitation

    International Nuclear Information System (INIS)

    Elgersma, O.; Borstrok, J.J.M.

    1989-01-01

    Phosphorus and oxygen concentrations in the homogeneous layer of borosilicate glass (BPSG) deposited on Si-integrated circuits are determined by X-ray fluorescence from photon excitation. The X-ray emission from electron excitation in an open X-ray tube instrument yields a sufficiently precise determination of the boron content. The thickness of the layer can be derived from silicon Kα-fluorescence. A calibration model is proposed for photon as well as for electron excitation. The experimentally determined parameters in this model well agree with those derived from fundamental parameters for X-ray absorption and emission. The chemical surrounding of silicon affects strongly the peak profile of the silicon Kβ-emission. This enables to distinguish emission from the silicon atoms in the wafer and from the silicon atoms in the silicon oxide complexes of the BPSG-layer. (author)

  13. Electronic properties of interfaces produced by silicon wafer hydrophilic bonding

    Energy Technology Data Exchange (ETDEWEB)

    Trushin, Maxim

    2011-07-15

    The thesis presents the results of the investigations of electronic properties and defect states of dislocation networks (DNs) in silicon produced by wafers direct bonding technique. A new insight into the understanding of their very attractive properties was succeeded due to the usage of a new, recently developed silicon wafer direct bonding technique, allowing to create regular dislocation networks with predefined dislocation types and densities. Samples for the investigations were prepared by hydrophilic bonding of p-type Si (100) wafers with same small misorientation tilt angle ({proportional_to}0.5 ), but with four different twist misorientation angles Atw (being of < , 3 , 6 and 30 , respectively), thus giving rise to the different DN microstructure on every particular sample. The main experimental approach of this work was the measurements of current and capacitance of Schottky diodes prepared on the samples which contained the dislocation network at a depth that allowed one to realize all capabilities of different methods of space charge region spectroscopy (such as CV/IV, DLTS, ITS, etc.). The key tasks for the investigations were specified as the exploration of the DN-related gap states, their variations with gradually increasing twist angle Atw, investigation of the electrical field impact on the carrier emission from the dislocation-related states, as well as the establishing of the correlation between the electrical (DLTS), optical (photoluminescence PL) and structural (TEM) properties of DNs. The most important conclusions drawn from the experimental investigations and theoretical calculations can be formulated as follows: - DLTS measurements have revealed a great difference in the electronic structure of small-angle (SA) and large-angle (LA) bonded interfaces: dominating shallow level and a set of 6-7 deep levels were found in SA-samples with Atw of 1 and 3 , whereas the prevalent deep levels - in LA-samples with Atw of 6 and 30 . The critical twist

  14. Texturization of diamond-wire-sawn multicrystalline silicon wafer using Cu, Ag, or Ag/Cu as a metal catalyst

    Science.gov (United States)

    Wang, Shing-Dar; Chen, Ting-Wei

    2018-06-01

    In this work, Cu, Ag, or Ag/Cu was used as a metal catalyst to study the surface texturization of diamond-wire-sawn (DWS) multi-crystalline silicon (mc-Si) wafer by a metal-assisted chemical etching (MACE) method. The DWS wafer was first etched by standard HF-HNO3 acidic etching, and it was labeled as AE-DWS wafer. The effects of ratios of Cu(NO3)2:HF, AgNO3:HF, and AgNO3:Cu(NO3)2 on the morphology of AE-DWS wafer were investigated. After the process of MACE, the wafer was treated with a NaF/H2O2 solution. In this process, H2O2 etched the nanostructure, and NaF removed the oxidation layer. The Si {1 1 1} plane was revealed by etching the wafer in a mixture of 0.03 M Cu(NO3)2 and 1 M HF at 55 °C for 2.5 min. These parallel Si {1 1 1} planes replaced some parallel saw marks on the surface of AE-DWS wafers without forming a positive pyramid or an inverted pyramid structure. The main topography of the wafer is comprised of silicon nanowires grown in direction when Ag or Ag/Cu was used as a metal catalyst. When silicon is etched in a mixed solution of Cu(NO3)2, AgNO3, HF and H2O2 at 55 °C with a concentration ratio of [Cu2+]/[Ag+] of 50 or at 65 °C with a concentration ratio of [Cu2+]/[Ag+] of 33, a quasi-inverted pyramid structure can be obtained. The reflectivity of the AE-DWS wafers treated with MACE is lower than that of the multiwire-slurry-sawn (MWSS) mc-Si wafers treated with traditional HF + HNO3 etching.

  15. Surface modification of silicon wafer by grafting zwitterionic polymers to improve its antifouling property

    Science.gov (United States)

    Sun, Yunlong; Chen, Changlin; Xu, Heng; Lei, Kun; Xu, Guanzhe; Zhao, Li; Lang, Meidong

    2017-10-01

    Silicon (111) wafer was modified by triethoxyvinylsilane containing double bond as an intermedium, and then P4VP (polymer 4-vinyl pyridine) brush was "grafted" onto the surface of silicon wafer containing reactive double bonds by adopting the "grafting from" way and Si-P4VP substrate (silicon wafer grafted by P4VP) was obtained. Finally, P4VP brush of Si-P4VP substrate was modified by 1,3-propanesulfonate fully to obtain P4VP-psl brush (zwitterionic polypyridinium salt) and the functional Si-P4VP-psl substrate (silicon wafer grafted by zwitterionic polypyridinium salt based on polymer 4-vinyl pyridine) was obtained successfully. The antifouling property of the silicon wafer, the Si-P4VP substrate and the Si-P4VP-psl substrate was investigated by using bovine serum albumin, mononuclear macrophages (RAW 264.7) and Escherichia coli (E. coli) ATTC25922 as model bacterium. The results showed that compared with the blank sample-silicon wafer, the Si-P4VP-psl substrate had excellent anti-adhesion ability against bovine serum albumin, cells and bacterium, due to zwitterionic P4VP-psl brush (polymer 4-vinyl pyridine salt) having special functionality like antifouling ability on biomaterial field.

  16. Comparative TEM study of bonded silicon/silicon interfaces fabricated by hydrophilic, hydrophobic and UHV wafer bonding

    International Nuclear Information System (INIS)

    Reznicek, A.; Scholz, R.; Senz, S.; Goesele, U.

    2003-01-01

    Wafers of Czochralski-grown silicon were bonded hydrophilically, hydrophobically and in ultrahigh vacuum (UHV) at room temperature. Wafers bonded hydrophilically adhere together by hydrogen bonds, those bonded hydrophobically by van der Waals forces and UHV-bonded ones by covalent bonds. Annealing the pre-bonded hydrophilic and hydrophobic wafer pairs in argon for 2 h at different temperatures increases the initially low bonding energy. UHV-bonded wafer pairs were also annealed to compare the results. Transmission electron microscopy (TEM) investigations show nano-voids at the interface. The void density depends on the initial bonding strength. During annealing the shape, coverage and density of the voids change significantly

  17. Synchrotron radiation total reflection x-ray fluorescence analysis; of polymer coated silicon wafers

    International Nuclear Information System (INIS)

    Brehm, L.; Kregsamer, P.; Pianetta, P.

    2000-01-01

    It is well known that total reflection x-ray fluorescence (TXRF) provides an efficient method for analyzing trace metal contamination on silicon wafer surfaces. New polymeric materials used as interlayer dielectrics in microprocessors are applied to the surface of silicon wafers by a spin-coating process. Analysis of these polymer coated wafers present a new challenge for TXRF analysis. Polymer solutions are typically analyzed for bulk metal contamination prior to application on the wafer using inductively coupled plasma mass spectrometry (ICP-MS). Questions have arisen about how to relate results of surface contamination analysis (TXRF) of a polymer coated wafer to bulk trace analysis (ICP-MS) of the polymer solutions. Experiments were done to explore this issue using synchrotron radiation (SR) TXRF. Polymer solutions were spiked with several different concentrations of metals. These solutions were applied to silicon wafers using the normal spin-coating process. The polymer coated wafers were then measured using the SR-TXRF instrument set-up at the Stanford Synchrotron Radiation Laboratory (SSRL). Several methods of quantitation were evaluated. The best results were obtained by developing calibration curves (intensity versus ppb) using the spiked polymer coated wafers as standards. Conversion of SR-TXRF surface analysis results (atoms/cm 2 ) to a volume related concentration was also investigated. (author)

  18. Crack detection and analyses using resonance ultrasonic vibrations in full-size crystalline silicon wafers

    International Nuclear Information System (INIS)

    Belyaev, A.; Polupan, O.; Dallas, W.; Ostapenko, S.; Hess, D.; Wohlgemuth, J.

    2006-01-01

    An experimental approach for fast crack detection and length determination in full-size solar-grade crystalline silicon wafers using a resonance ultrasonic vibrations (RUV) technique is presented. The RUV method is based on excitation of the longitudinal ultrasonic vibrations in full-size wafers. Using an external piezoelectric transducer combined with a high sensitivity ultrasonic probe and computer controlled data acquisition system, real-time frequency response analysis can be accomplished. On a set of identical crystalline Si wafers with artificially introduced periphery cracks, it was demonstrated that the crack results in a frequency shift in a selected RUV peak to a lower frequency and increases the resonance peak bandwidth. Both characteristics were found to increase with the length of the crack. The frequency shift and bandwidth increase serve as reliable indicators of the crack appearance in silicon wafers and are suitable for mechanical quality control and fast wafer inspection

  19. Use of porous silicon to minimize oxidation induced stacking fault defects in silicon

    International Nuclear Information System (INIS)

    Shieh, S.Y.; Evans, J.W.

    1992-01-01

    This paper presents methods for minimizing stacking fault defects, generated during oxidation of silicon, include damaging the back of the wafer or depositing poly-silicon on the back. In either case a highly defective structure is created and this is capable of gettering either self-interstitials or impurities which promote nucleation of stacking fault defects. A novel method of minimizing these defects is to form a patch of porous silicon on the back of the wafer by electrochemical etching. Annealing under inert gas prior to oxidation may then result in the necessary gettering. Experiments were carried out in which wafers were subjected to this treatment. Subsequent to oxidation, the wafers were etched to remove oxide and reveal defects. The regions of the wafer adjacent to the porous silicon patch were defect-free, whereas remote regions had defects. Deep level transient spectroscopy has been used to examine the gettering capability of porous silicon, and the paper discusses the mechanism by which the porous silicon getters

  20. Corrugation Architecture Enabled Ultraflexible Wafer-Scale High-Efficiency Monocrystalline Silicon Solar Cell

    KAUST Repository

    Bahabry, Rabab R.

    2018-01-02

    Advanced classes of modern application require new generation of versatile solar cells showcasing extreme mechanical resilience, large-scale, low cost, and excellent power conversion efficiency. Conventional crystalline silicon-based solar cells offer one of the most highly efficient power sources, but a key challenge remains to attain mechanical resilience while preserving electrical performance. A complementary metal oxide semiconductor-based integration strategy where corrugation architecture enables ultraflexible and low-cost solar cell modules from bulk monocrystalline large-scale (127 × 127 cm) silicon solar wafers with a 17% power conversion efficiency. This periodic corrugated array benefits from an interchangeable solar cell segmentation scheme which preserves the active silicon thickness of 240 μm and achieves flexibility via interdigitated back contacts. These cells can reversibly withstand high mechanical stress and can be deformed to zigzag and bifacial modules. These corrugation silicon-based solar cells offer ultraflexibility with high stability over 1000 bending cycles including convex and concave bending to broaden the application spectrum. Finally, the smallest bending radius of curvature lower than 140 μm of the back contacts is shown that carries the solar cells segments.

  1. Corrugation Architecture Enabled Ultraflexible Wafer-Scale High-Efficiency Monocrystalline Silicon Solar Cell

    KAUST Repository

    Bahabry, Rabab R.; Kutbee, Arwa T.; Khan, Sherjeel M.; Sepulveda, Adrian C.; Wicaksono, Irmandy; Nour, Maha A.; Wehbe, Nimer; Almislem, Amani Saleh Saad; Ghoneim, Mohamed T.; Sevilla, Galo T.; Syed, Ahad; Shaikh, Sohail F.; Hussain, Muhammad Mustafa

    2018-01-01

    Advanced classes of modern application require new generation of versatile solar cells showcasing extreme mechanical resilience, large-scale, low cost, and excellent power conversion efficiency. Conventional crystalline silicon-based solar cells offer one of the most highly efficient power sources, but a key challenge remains to attain mechanical resilience while preserving electrical performance. A complementary metal oxide semiconductor-based integration strategy where corrugation architecture enables ultraflexible and low-cost solar cell modules from bulk monocrystalline large-scale (127 × 127 cm) silicon solar wafers with a 17% power conversion efficiency. This periodic corrugated array benefits from an interchangeable solar cell segmentation scheme which preserves the active silicon thickness of 240 μm and achieves flexibility via interdigitated back contacts. These cells can reversibly withstand high mechanical stress and can be deformed to zigzag and bifacial modules. These corrugation silicon-based solar cells offer ultraflexibility with high stability over 1000 bending cycles including convex and concave bending to broaden the application spectrum. Finally, the smallest bending radius of curvature lower than 140 μm of the back contacts is shown that carries the solar cells segments.

  2. The integration of InGaP LEDs with CMOS on 200 mm silicon wafers

    Science.gov (United States)

    Wang, Bing; Lee, Kwang Hong; Wang, Cong; Wang, Yue; Made, Riko I.; Sasangka, Wardhana Aji; Nguyen, Viet Cuong; Lee, Kenneth Eng Kian; Tan, Chuan Seng; Yoon, Soon Fatt; Fitzgerald, Eugene A.; Michel, Jurgen

    2017-02-01

    The integration of photonics and electronics on a converged silicon CMOS platform is a long pursuit goal for both academe and industry. We have been developing technologies that can integrate III-V compound semiconductors and CMOS circuits on 200 mm silicon wafers. As an example we present our work on the integration of InGaP light-emitting diodes (LEDs) with CMOS. The InGaP LEDs were epitaxially grown on high-quality GaAs and Ge buffers on 200 mm (100) silicon wafers in a MOCVD reactor. Strain engineering was applied to control the wafer bow that is induced by the mismatch of coefficients of thermal expansion between III-V films and silicon substrate. Wafer bonding was used to transfer the foundry-made silicon CMOS wafers to the InGaP LED wafers. Process trenches were opened on the CMOS layer to expose the underneath III-V device layers for LED processing. We show the issues encountered in the 200 mm processing and the methods we have been developing to overcome the problems.

  3. Wafer scale nano-membrane supported on a silicon microsieve using thin-film transfer technology

    NARCIS (Netherlands)

    Unnikrishnan, S.; Jansen, Henricus V.; Berenschot, Johan W.; Elwenspoek, Michael Curt

    A new micromachining method to fabricate wafer scale nano-membranes is described. The delicate thin-film nano-membrane is supported on a robust silicon microsieve fabricated by plasma etching. The silicon sieve is micromachined independently of the thin-film, which is later transferred onto it by

  4. Towards ultra-thin plasmonic silicon wafer solar cells with minimized efficiency loss.

    Science.gov (United States)

    Zhang, Yinan; Stokes, Nicholas; Jia, Baohua; Fan, Shanhui; Gu, Min

    2014-05-13

    The cost-effectiveness of market-dominating silicon wafer solar cells plays a key role in determining the competiveness of solar energy with other exhaustible energy sources. Reducing the silicon wafer thickness at a minimized efficiency loss represents a mainstream trend in increasing the cost-effectiveness of wafer-based solar cells. In this paper we demonstrate that, using the advanced light trapping strategy with a properly designed nanoparticle architecture, the wafer thickness can be dramatically reduced to only around 1/10 of the current thickness (180 μm) without any solar cell efficiency loss at 18.2%. Nanoparticle integrated ultra-thin solar cells with only 3% of the current wafer thickness can potentially achieve 15.3% efficiency combining the absorption enhancement with the benefit of thinner wafer induced open circuit voltage increase. This represents a 97% material saving with only 15% relative efficiency loss. These results demonstrate the feasibility and prospect of achieving high-efficiency ultra-thin silicon wafer cells with plasmonic light trapping.

  5. Micropore x-ray optics using anisotropic wet etching of (110) silicon wafers.

    Science.gov (United States)

    Ezoe, Yuichiro; Koshiishi, Masaki; Mita, Makoto; Mitsuda, Kazuhisa; Hoshino, Akio; Ishisaki, Yoshitaka; Yang, Zhen; Takano, Takayuki; Maeda, Ryutaro

    2006-12-10

    To develop x-ray mirrors for micropore optics, smooth silicon (111) sidewalls obtained after anisotropic wet etching of a silicon (110) wafer were studied. A sample device with 19 microm wide (111) sidewalls was fabricated using a 220 microm thick silicon (110) wafer and potassium hydroxide solution. For what we believe to be the first time, x-ray reflection on the (111) sidewalls was detected in the angular response measurement. Compared to ray-tracing simulations, the surface roughness of the sidewalls was estimated to be 3-5 nm, which is consistent with the atomic force microscope and the surface profiler measurements.

  6. Micropore x-ray optics using anisotropic wet etching of (110) silicon wafers

    International Nuclear Information System (INIS)

    Ezoe, Yuichiro; Koshiishi, Masaki; Mita, Makoto; Mitsuda, Kazuhisa; Hoshino, Akio; Ishisaki, Yoshitaka; Yang Zhen; Takano, Takayuki; Maeda, Ryutaro

    2006-01-01

    To develop x-ray mirrors for micropore optics, smooth silicon (111)sidewalls obtained after anisotropic wet etching of a silicon (110) wafer were studied. A sample device with 19 μm wide (111) sidewalls was fabricated using a 220 μm thick silicon (110) wafer and potassium hydroxide solution. For what we believe to be the first time,x-ray reflection on the (111) sidewalls was detected in the angular response measurement. Compared to ray-tracing simulations, the surface roughness of the sidewalls was estimated to be 3-5 nm, which is consistent with the atomic force microscope and the surface profiler measurements

  7. Silicon wafer wettability and aging behaviors: Impact on gold thin-film morphology

    KAUST Repository

    Yang, Xiaoming; Zhong, Zhaowei; Diallo, Elhadj; Wang, Zhihong; Yue, Weisheng

    2014-01-01

    This paper reports on the wettability and aging behaviors of the silicon wafers that had been cleaned using a piranha (3:1 mixture of sulfuric acid (H2SO4, 96%) and hydrogen peroxide (H2O 2, 30%), 120 °C), SC1 (1:1:5 mixture of NH4OH, H 2O2 and H2O, at 80°C) or HF solution (6 parts of 40% NH4F and 1 part of 49% HF, at room temperature) solution, and treated with gaseous plasma. The silicon wafers cleaned using the piranha or SC1 solution were hydrophilic, and the water contact angles on the surfaces would increase along with aging time, until they reached the saturated points of around 70°. The contact angle increase rate of these wafers in a vacuum was much faster than that in the open air, because of loss of water, which was physically adsorbed on the wafer surfaces. The silicon wafers cleaned with the HF solution were hydrophobic. Their contact angle decreased in the atmosphere, while it increased in the vacuum up to 95°. Gold thin films deposited on the hydrophilic wafers were smoother than that deposited on the hydrophobic wafers, because the numerous oxygen groups formed on the hydrophilic surfaces would react with gold adatoms in the sputtering process to form a continuous thin film at the nucleation stage. The argon, nitrogen, oxygen gas plasma treatments could change the silicon wafer surfaces from hydrophobic to hydrophilic by creating a thin (around 2.5 nm) silicon dioxide film, which could be utilized to improve the roughness and adhesion of the gold thin film. © 2014 Elsevier Ltd. All rights reserved.

  8. Silicon wafer wettability and aging behaviors: Impact on gold thin-film morphology

    KAUST Repository

    Yang, Xiaoming

    2014-10-01

    This paper reports on the wettability and aging behaviors of the silicon wafers that had been cleaned using a piranha (3:1 mixture of sulfuric acid (H2SO4, 96%) and hydrogen peroxide (H2O 2, 30%), 120 °C), SC1 (1:1:5 mixture of NH4OH, H 2O2 and H2O, at 80°C) or HF solution (6 parts of 40% NH4F and 1 part of 49% HF, at room temperature) solution, and treated with gaseous plasma. The silicon wafers cleaned using the piranha or SC1 solution were hydrophilic, and the water contact angles on the surfaces would increase along with aging time, until they reached the saturated points of around 70°. The contact angle increase rate of these wafers in a vacuum was much faster than that in the open air, because of loss of water, which was physically adsorbed on the wafer surfaces. The silicon wafers cleaned with the HF solution were hydrophobic. Their contact angle decreased in the atmosphere, while it increased in the vacuum up to 95°. Gold thin films deposited on the hydrophilic wafers were smoother than that deposited on the hydrophobic wafers, because the numerous oxygen groups formed on the hydrophilic surfaces would react with gold adatoms in the sputtering process to form a continuous thin film at the nucleation stage. The argon, nitrogen, oxygen gas plasma treatments could change the silicon wafer surfaces from hydrophobic to hydrophilic by creating a thin (around 2.5 nm) silicon dioxide film, which could be utilized to improve the roughness and adhesion of the gold thin film. © 2014 Elsevier Ltd. All rights reserved.

  9. Surface evolution and stability transition of silicon wafer subjected to nano-diamond grinding

    Directory of Open Access Journals (Sweden)

    Shisheng Cai

    2017-03-01

    Full Text Available In order to obtain excellent physical properties and ultrathin devices, thinning technique plays an important role in semiconductor industry with the rapid development of wearable electronic devices. This study presents a physical nano-diamond grinding technique without any chemistry to obtain ultrathin silicon substrate. The nano-diamond with spherical shape repeats nano-cutting and penetrating surface to physically etch silicon wafer during grinding process. Nano-diamond grinding induces an ultrathin “amorphous layer” on silicon wafer and thus the mismatch strain between the amorphous layer and substrate leads to stability transition from the spherical to non-spherical deformation of the wafer. Theoretical model is proposed to predict and analyze the deformation of amorphous layer/silicon substrate system. Furthermore, the deformation bifurcation behavior of amorphous layer/silicon substrate system is analyzed. As the mismatch strain increases or thickness decreases, the amorphous layer/silicon substrate system may transit to non-spherical deformation, which is consistent to the experimental results. The amorphous layer stresses are also obtained to predict the damage of silicon wafer.

  10. Laser cutting sandwich structure glass-silicon-glass wafer with laser induced thermal-crack propagation

    Science.gov (United States)

    Cai, Yecheng; Wang, Maolu; Zhang, Hongzhi; Yang, Lijun; Fu, Xihong; Wang, Yang

    2017-08-01

    Silicon-glass devices are widely used in IC industry, MEMS and solar energy system because of their reliability and simplicity of the manufacturing process. With the trend toward the wafer level chip scale package (WLCSP) technology, the suitable dicing method of silicon-glass bonded structure wafer has become necessary. In this paper, a combined experimental and computational approach is undertaken to investigate the feasibility of cutting the sandwich structure glass-silicon-glass (SGS) wafer with laser induced thermal-crack propagation (LITP) method. A 1064 nm semiconductor laser cutting system with double laser beams which could simultaneously irradiate on the top and bottom of the sandwich structure wafer has been designed. A mathematical model for describing the physical process of the interaction between laser and SGS wafer, which consists of two surface heating sources and two volumetric heating sources, has been established. The temperature stress distribution are simulated by using finite element method (FEM) analysis software ABAQUS. The crack propagation process is analyzed by using the J-integral method. In the FEM model, a stationary planar crack is embedded in the wafer and the J-integral values around the crack front edge are determined using the FEM. A verification experiment under typical parameters is conducted and the crack propagation profile on the fracture surface is examined by the optical microscope and explained from the stress distribution and J-integral value.

  11. Uniformity across 200 mm silicon wafers printed by nanoimprint lithography

    International Nuclear Information System (INIS)

    Gourgon, C; Perret, C; Tallal, J; Lazzarino, F; Landis, S; Joubert, O; Pelzer, R

    2005-01-01

    Uniformity of the printing process is one of the key parameters of nanoimprint lithography. This technique has to be extended to large size wafers to be useful for several industrial applications, and the uniformity of micro and nanostructures has to be guaranteed on large surfaces. This paper presents results of printing on 200 mm diameter wafers. The residual thickness uniformity after printing is demonstrated at the wafer scale in large patterns (100 μm), in smaller lines of 250 nm and in sub-100 nm features. We show that a mould deformation occurs during the printing process, and that this deformation is needed to guarantee printing uniformity. However, the mould deformation is also responsible for the potential degradation of the patterns

  12. First thin AC-coupled silicon strip sensors on 8-inch wafers

    Energy Technology Data Exchange (ETDEWEB)

    Bergauer, T., E-mail: thomas.bergauer@oeaw.ac.at [Institute of High Energy Physics of the Austrian Academy of Sciences, Nikolsdorfer Gasse 18, 1050 Wien (Vienna) (Austria); Dragicevic, M.; König, A. [Institute of High Energy Physics of the Austrian Academy of Sciences, Nikolsdorfer Gasse 18, 1050 Wien (Vienna) (Austria); Hacker, J.; Bartl, U. [Infineon Technologies Austria AG, Siemensstrasse 2, 9500 Villach (Austria)

    2016-09-11

    The Institute of High Energy Physics (HEPHY) in Vienna and the semiconductor manufacturer Infineon Technologies Austria AG developed a production process for planar AC-coupled silicon strip sensors manufactured on 200 μm thick 8-inch p-type wafers. In late 2015, the first wafers were delivered featuring the world's largest AC-coupled silicon strip sensors. Detailed electrical measurements were carried out at HEPHY, where single strip and global parameters were measured. Mechanical studies were conducted and the long-term behavior was investigated using a climate chamber. Furthermore, the electrical properties of various test structures were investigated to validate the quality of the manufacturing process.

  13. DEPTH MEASUREMENT OF DISRUPTED LAYER ON SILICON WAFER SURFACE USING AUGER SPECTROSCOPY METHOD

    Directory of Open Access Journals (Sweden)

    V. A. Solodukha

    2016-01-01

    Full Text Available The paper proposes a method for depth measurement of a disrupted layer on silicon wafer surface which is based on application of Auger spectroscopy with the precision sputtering of surface silicon layers and registration of the Auger electron yield intensity. In order to measure the disrupted layer with the help of Auger spectroscopy it is necessary to determine dependence of the released Auger electron amount on sputtering time (profile and then the dependence is analyzed. Silicon amount in the disrupted layer is less than in the volume. While going deeper the disruptive layer is decreasing that corresponds to an increase of atom density in a single layer. The essence of the method lies in the fact the disruptive layer is removed by ion beam sputtering and detection of interface region is carried out with the help of registration of the Auger electron yield intensity from the sputtered surface up to the moment when it reaches the value which is equal to the Auger electron yield intensity for single-crystal silicon. While removing surface silicon layers the registration of the Auger electron yield intensity from silicon surface makes it possible to control efficiently a presence of the disrupted layer on the silicon wafer surface. In this case depth control locality is about 1.0 nm due to some peculiarities of Auger spectroscopy method. The Auger electron yield intensity is determined automatically while using Auger spectrometer and while removing the disrupted layer the intensity is gradually increasing. Depth of the disrupted layer is determined by measuring height of the step which has been formed as a result of removal of the disrupted layer from the silicon wafer surface. Auger spectroscopy methods ensures an efficient depth control surface disruptions at the manufacturing stages of silicon wafers and integrated circuits. The depth measurement range of disruptions constitutes 0.001–1.000 um.

  14. Friction mechanisms of silicon wafer and silicon wafer coated with diamond-like carbon film and two monolayers

    International Nuclear Information System (INIS)

    Singh, R. Arvind; Yoon, Eui Sung; Han, Hung Gu; Kong, Ho Sung

    2006-01-01

    The friction behaviour of Si-wafer, Diamond-Like Carbon (DLC) and two Self-Assembled Monolayers(SAMs) namely DiMethylDiChlorosilane (DMDC) and DiPhenyl-DiChlorosilane (DPDC) coated on Si-wafer was studied under loading conditions in milli-Newton (mN) range. Experiments were performed using a ball-on-flat type reciprocating micro-tribo tester. Glass balls with various radii 0.25 mm, 0.5 mm and 1 mm were used. The applied normal load was in the range of 1.5 mN to 4.8 mN. Results showed that the friction increased with the applied normal load in the case of all the test materials. It was also observed that friction was affected by the ball size. Friction increased with the increase in the ball size in the case of Si-wafer. The SAMs also showed a similar trend, but had lower values of friction than those of Si-wafer. Interestingly, for DLC it was observed that friction decreased with the increase in the ball size. This distinct difference in the behavior of friction in DLC was attributed to the difference in the operating mechanism. It was observed that Si-wafer and DLC exhibited wear, whereas wear was absent in the SAMs. Observations showed that solid-solid adhesion was dominant in Si-wafer, while plowing in DLC. The wear in these two materials significantly influenced their friction. In the case of SAMs their friction behaviour was largely influenced by the nature of their molecular chains

  15. Uncertainty evaluation of thickness and warp of a silicon wafer measured by a spectrally resolved interferometer

    Science.gov (United States)

    Praba Drijarkara, Agustinus; Gergiso Gebrie, Tadesse; Lee, Jae Yong; Kang, Chu-Shik

    2018-06-01

    Evaluation of uncertainty of thickness and gravity-compensated warp of a silicon wafer measured by a spectrally resolved interferometer is presented. The evaluation is performed in a rigorous manner, by analysing the propagation of uncertainty from the input quantities through all the steps of measurement functions, in accordance with the ISO Guide to the Expression of Uncertainty in Measurement. In the evaluation, correlation between input quantities as well as uncertainty attributed to thermal effect, which were not included in earlier publications, are taken into account. The temperature dependence of the group refractive index of silicon was found to be nonlinear and varies widely within a wafer and also between different wafers. The uncertainty evaluation described here can be applied to other spectral interferometry applications based on similar principles.

  16. Determination of thicknesses and temperatures of crystalline silicon wafers from optical measurements in the far infrared region

    Science.gov (United States)

    Franta, Daniel; Franta, Pavel; Vohánka, Jiří; Čermák, Martin; Ohlídal, Ivan

    2018-05-01

    Optical measurements of transmittance in the far infrared region performed on crystalline silicon wafers exhibit partially coherent interference effects appropriate for the determination of thicknesses of the wafers. The knowledge of accurate spectral and temperature dependencies of the optical constants of crystalline silicon in this spectral region is crucial for the determination of its thickness and vice versa. The recently published temperature dependent dispersion model of crystalline silicon is suitable for this purpose. Because the linear thermal expansion of crystalline silicon is known, the temperatures of the wafers can be determined with high precision from the evolution of the interference patterns at elevated temperatures.

  17. Aerosol-assisted extraction of silicon nanoparticles from wafer slicing waste for lithium ion batteries.

    Science.gov (United States)

    Jang, Hee Dong; Kim, Hyekyoung; Chang, Hankwon; Kim, Jiwoong; Roh, Kee Min; Choi, Ji-Hyuk; Cho, Bong-Gyoo; Park, Eunjun; Kim, Hansu; Luo, Jiayan; Huang, Jiaxing

    2015-03-30

    A large amount of silicon debris particles are generated during the slicing of silicon ingots into thin wafers for the fabrication of integrated-circuit chips and solar cells. This results in a significant loss of valuable materials at about 40% of the mass of ingots. In addition, a hazardous silicon sludge waste is produced containing largely debris of silicon, and silicon carbide, which is a common cutting material on the slicing saw. Efforts in material recovery from the sludge and recycling have been largely directed towards converting silicon or silicon carbide into other chemicals. Here, we report an aerosol-assisted method to extract silicon nanoparticles from such sludge wastes and their use in lithium ion battery applications. Using an ultrasonic spray-drying method, silicon nanoparticles can be directly recovered from the mixture with high efficiency and high purity for making lithium ion battery anode. The work here demonstrated a relatively low cost approach to turn wafer slicing wastes into much higher value-added materials for energy applications, which also helps to increase the sustainability of semiconductor material and device manufacturing.

  18. Growth of misfit dislocation-free p/p+ thick epitaxial silicon wafers on Ge-B-codoped substrates

    International Nuclear Information System (INIS)

    Jiang Huihua; Yang Deren; Ma Xiangyang; Tian Daxi; Li Liben; Que Duanlin

    2006-01-01

    The growth of p/p + silicon epitaxial silicon wafers (epi-wafers) without misfit dislocations has been successfully achieved by using heavily boron-doped Czochralski (CZ) silicon wafers codoped with desirable level of germanium as the substrates. The lattice compensation by codoping of germanium and boron into the silicon matrix to reduce the lattice mismatch between the substrate (heavily boron-doped) and epi-layer (lightly boron-doped) is the basic idea underlying in the present achievement. In principle, the codoping of germanium and boron in the CZ silicon can be tailored to achieve misfit dislocation-free epi-layer with required thickness. It is reasonably expected that the presented solution to elimination of misfit dislocations in the p/p + silicon wafers can be applied in the volume production

  19. Sample pretreatment for the determination of metal impurities in silicon wafer

    International Nuclear Information System (INIS)

    Chung, H. Y.; Kim, Y. H.; Yoo, H. D.; Lee, S. H.

    1999-01-01

    The analytical results obtained by microwave digestion and acid digestion methods for sample pretreatment to determine metal impurities in silicon wafer by inductively coupled plasma--mass spectrometry(ICP-MS) were compared. In order to decompose the silicon wafer, a mixed solution of HNO 3 and HF was added to the sample and the metal elements were determined after removing the silicon matrix by evaporating silicon in the form of Si-F. The recovery percentages of Ni, Cr and Fe were found to be 95∼106% for both microwave digestion and acid digestion methods. The recovery percentage of Cu obtained by the acid digestion method was higher than that obtained by the microwave digestion method. For Zn, however, the microwave digestion method gave better result than the acid digestion method. Fe was added to a silicon wafer using a spin coater. The concentration of Fe in this sample was determined by ICP-MS, and the same results were obtained in the two pretreatment methods

  20. Large-aperture focusing of x rays with micropore optics using dry etching of silicon wafers.

    Science.gov (United States)

    Ezoe, Yuichiro; Moriyama, Teppei; Ogawa, Tomohiro; Kakiuchi, Takuya; Mitsuishi, Ikuyuki; Mitsuda, Kazuhisa; Aoki, Tatsuhiko; Morishita, Kohei; Nakajima, Kazuo

    2012-03-01

    Large-aperture focusing of Al K(α) 1.49 keV x-ray photons using micropore optics made from a dry-etched 4 in. (100 mm) silicon wafer is demonstrated. Sidewalls of the micropores are smoothed with high-temperature annealing to work as x-ray mirrors. The wafer is bent to a spherical shape to collect parallel x rays into a focus. Our result supports that this new type of optics allows for the manufacturing of ultralight-weight and high-performance x-ray imaging optics with large apertures at low cost. © 2012 Optical Society of America

  1. Compositional analysis of silicon oxide/silicon nitride thin films

    Directory of Open Access Journals (Sweden)

    Meziani Samir

    2016-06-01

    Full Text Available Hydrogen, amorphous silicon nitride (SiNx:H abbreviated SiNx films were grown on multicrystalline silicon (mc-Si substrate by plasma enhanced chemical vapour deposition (PECVD in parallel configuration using NH3/SiH4 gas mixtures. The mc-Si wafers were taken from the same column of Si cast ingot. After the deposition process, the layers were oxidized (thermal oxidation in dry oxygen ambient environment at 950 °C to get oxide/nitride (ON structure. Secondary ion mass spectroscopy (SIMS, Rutherford backscattering spectroscopy (RBS, Auger electron spectroscopy (AES and energy dispersive X-ray analysis (EDX were employed for analyzing quantitatively the chemical composition and stoichiometry in the oxide-nitride stacked films. The effect of annealing temperature on the chemical composition of ON structure has been investigated. Some species, O, N, Si were redistributed in this structure during the thermal oxidation of SiNx. Indeed, oxygen diffused to the nitride layer into Si2O2N during dry oxidation.

  2. Fabrication of silicon condenser microphones using single wafer technology

    NARCIS (Netherlands)

    Scheeper, P.R.; van der Donk, A.G.H.; Olthuis, Wouter; Bergveld, Piet

    1992-01-01

    A condenser microphone design that can be fabricated using the sacrificial layer technique is proposed and tested. The microphone backplate is a 1-¿m plasma-enhanced chemical-vapor-deposited (PECVD) silicon nitride film with a high density of acoustic holes (120-525 holes/mm2), covered with a thin

  3. A comparison of buried oxide characteristics of single and multiple implant SIMOX and bond and etch back wafers

    International Nuclear Information System (INIS)

    Annamalai, N.K.; Bockman, J.F.; McGruer, N.E.; Chapski, J.

    1990-01-01

    The current through the buried oxides of single and multiple implant SIMOX and bond and etch back silicon-on-insulator (BESOI) wafers were measured as a function of radiation dose. From these measurements, conductivity and static capacitances were derived. High frequency capacitances were also measured. Leakage current through the buried oxide of multiple implant SIMOX is considerably less than that of single implant SIMOX (more than an order of magnitude). High frequency and static capacitances, as a function of total dose, were used to study the buried oxide---top silicon interface and the buried oxide---bottom silicon interface. Multiple implant had fewer interface traps than single implant at pre-rad and after irradiation

  4. Flat-plate solar array project. Volume 3: Silicon sheet: Wafers and ribbons

    Science.gov (United States)

    Briglio, A.; Dumas, K.; Leipold, M.; Morrison, A.

    1986-01-01

    The primary objective of the Silicon Sheet Task of the Flat-Plate Solar Array (FSA) Project was the development of one or more low cost technologies for producing silicon sheet suitable for processing into cost-competitive solar cells. Silicon sheet refers to high purity crystalline silicon of size and thickness for fabrication into solar cells. Areas covered in the project were ingot growth and casting, wafering, ribbon growth, and other sheet technologies. The task made and fostered significant improvements in silicon sheet including processing of both ingot and ribbon technologies. An additional important outcome was the vastly improved understanding of the characteristics associated with high quality sheet, and the control of the parameters required for higher efficiency solar cells. Although significant sheet cost reductions were made, the technology advancements required to meet the task cost goals were not achieved.

  5. Germanium photodetectors fabricated on 300 mm silicon wafers for near-infrared focal plane arrays

    Science.gov (United States)

    Zeller, John W.; Rouse, Caitlin; Efstathiadis, Harry; Dhar, Nibir K.; Wijewarnasuriya, Priyalal; Sood, Ashok K.

    2017-09-01

    SiGe p-i-n photodetectors have been fabricated on 300 mm (12") diameter silicon (Si) wafers utilizing high throughput, large-area complementary metal-oxide semiconductor (CMOS) technologies. These Ge photodetectors are designed to operate in room temperature environments without cooling, and thus have potential size and cost advantages over conventional cooled infrared detectors. The two-step fabrication process for the p-i-n photodetector devices, designed to minimize the formation of defects and threading dislocations, involves low temperature epitaxial growth of a thin p+ (boron) Ge seed/buffer layer, followed by higher temperature deposition of a thicker Ge intrinsic layer. Scanning electron microscopy (SEM) and transmission electron microscopy (TEM) demonstrated uniform layer compositions with well defined layer interfaces and reduced dislocation density. Time-of-flight secondary ion mass spectroscopy (TOF-SIMS) was likewise employed to analyze the doping levels of the p+ and n+ layers. Current-voltage (I-V) measurements demonstrated that these SiGe photodetectors, when exposed to incident visible-NIR radiation, exhibited dark currents down below 1 μA and significant enhancement in photocurrent at -1 V. The zero-bias photocurrent was also relatively high, showing a minimal drop compared to that at -1 V bias.

  6. Micro-spectroscopy on silicon wafers and solar cells

    Directory of Open Access Journals (Sweden)

    Gundel Paul

    2011-01-01

    Full Text Available Abstract Micro-Raman (μRS and micro-photoluminescence spectroscopy (μPLS are demonstrated as valuable characterization techniques for fundamental research on silicon as well as for technological issues in the photovoltaic production. We measure the quantitative carrier recombination lifetime and the doping density with submicron resolution by μPLS and μRS. μPLS utilizes the carrier diffusion from a point excitation source and μRS the hole density-dependent Fano resonances of the first order Raman peak. This is demonstrated on micro defects in multicrystalline silicon. In comparison with the stress measurement by μRS, these measurements reveal the influence of stress on the recombination activity of metal precipitates. This can be attributed to the strong stress dependence of the carrier mobility (piezoresistance of silicon. With the aim of evaluating technological process steps, Fano resonances in μRS measurements are analyzed for the determination of the doping density and the carrier lifetime in selective emitters, laser fired doping structures, and back surface fields, while μPLS can show the micron-sized damage induced by the respective processes.

  7. Qualification of multi-crystalline silicon wafers by optical imaging for industrial use

    Energy Technology Data Exchange (ETDEWEB)

    Janssen, G.J.M.; Van der Borg, N.J.C.M.; Manshanden, P.; De Bruijne, M.; Bende, E.E. [ECN Solar Energy, Petten (Netherlands)

    2012-09-15

    We have developed a method to qualify multi-crystalline silicon (mc-Si) wafers that are being used in a production process. An optical image of an etched wafer is made. This etching can be a standard industrial acid etching for mc-Si wafers as is commonly used for saw damage removal and simultaneous iso-texturing. Digital image processing is then applied to identify the number of dislocations and their distribution over the wafer. This information is used as input for a cell performance prediction model, where the performance is characterized by the open circuit voltage (Voc) or the efficiency. The model can include various levels of sophistication, i.e. from using an average density of dislocations to the full spatial resolution of the dislocations in a 2D simulation that includes also the metallization pattern on the cell. The predicted performance is then evaluated against pre-selected criteria. The possibility to apply this optical qualification method in an initial stage in the production enables early rejection of the wafers, further tailoring of the cell production process or identification of instabilities in the production process.

  8. External self-gettering of nickel in float zone silicon wafers

    Science.gov (United States)

    Gay, N.; Martinuzzi, S.

    1997-05-01

    During indiffusion of Ni atoms in silicon crystals at 950 °C from a nickel layer source, Ni-Si alloys can be formed close to the surface. Metal solubility in these alloys is higher than in silicon, which induces a marked segregation gettering of the Ni atoms which have diffused in the bulk of the wafers. Consequently, the regions of the wafers covered with the Ni layer are less contaminated than adjacent regions in which Ni atoms have also penetrated, as shown by the absence of precipitates and the higher diffusion length of minority carriers. The results suggest the existence of external self-gettering of Ni atoms by the nickel source.

  9. Electrical Interconnections Through CMOS Wafers

    DEFF Research Database (Denmark)

    Rasmussen, Frank Engel

    2003-01-01

    Chips with integrated vias are currently the ultimate miniaturizing solution for 3D packaging of microsystems. Previously the application of vias has almost exclusively been demonstrated within MEMS technology, and only a few of these via technologies have been CMOS compatible. This thesis...... describes the development of vias through a silicon wafer containing Complementary Metal-Oxide Semiconductor (CMOS) circuitry. Two via technologies have been developed and fabricated in blank silicon wafers; one based on KOH etching of wafer through-holes and one based on DRIE of wafer through......-holes. The most promising of these technologies --- the DRIE based process --- has been implemented in CMOS wafers containing hearing aid amplifiers. The main challenges in the development of a CMOS compatible via process depend on the chosen process for etching of wafer through-holes. In the case of KOH etching...

  10. Texturization of as-cut p-type monocrystalline silicon wafer using different wet chemical solutions

    Science.gov (United States)

    Hashmi, Galib; Hasanuzzaman, Muhammad; Basher, Mohammad Khairul; Hoq, Mahbubul; Rahman, Md. Habibur

    2018-06-01

    Implementing texturization process on the monocrystalline silicon substrate reduces reflection and enhances light absorption of the substrate. Thus texturization is one of the key elements to increase the efficiency of solar cell. Considering as-cut monocrystalline silicon wafer as base substrate, in this work different concentrations of Na2CO3 and NaHCO3 solution, KOH-IPA (isopropyl alcohol) solution and tetramethylammonium hydroxide solution with different time intervals have been investigated for texturization process. Furthermore, saw damage removal process was conducted with 10% NaOH solution, 20 wt% KOH-13.33 wt% IPA solution and HF/nitric/acetic acid solution. The surface morphology of saw damage, saw damage removed surface and textured wafer were observed using optical microscope and field emission scanning electron microscopy. Texturization causes pyramidal micro structures on the surface of (100) oriented monocrystalline silicon wafer. The height of the pyramid on the silicon surface varies from 1.5 to 3.2 µm and the inclined planes of the pyramids are acute angle. Contact angle value indicates that the textured wafer's surface fall in between near-hydrophobic to hydrophobic range. With respect to base material absolute reflectance 1.049-0.75% within 250-800 nm wavelength region, 0.1-0.026% has been achieved within the same wavelength region when textured with 0.76 wt% KOH-4 wt% IPA solution for 20 min. Furthermore, an alternative route of using 1 wt% Na2CO3-0.2 wt% NaHCO3 solution for 50 min has been exploited in the texturization process.

  11. Effect of dose and size on defect engineering in carbon cluster implanted silicon wafers

    Science.gov (United States)

    Okuyama, Ryosuke; Masada, Ayumi; Shigematsu, Satoshi; Kadono, Takeshi; Hirose, Ryo; Koga, Yoshihiro; Okuda, Hidehiko; Kurita, Kazunari

    2018-01-01

    Carbon-cluster-ion-implanted defects were investigated by high-resolution cross-sectional transmission electron microscopy toward achieving high-performance CMOS image sensors. We revealed that implantation damage formation in the silicon wafer bulk significantly differs between carbon-cluster and monomer ions after implantation. After epitaxial growth, small and large defects were observed in the implanted region of carbon clusters. The electron diffraction pattern of both small and large defects exhibits that from bulk crystalline silicon in the implanted region. On the one hand, we assumed that the silicon carbide structure was not formed in the implanted region, and small defects formed because of the complex of carbon and interstitial silicon. On the other hand, large defects were hypothesized to originate from the recrystallization of the amorphous layer formed by high-dose carbon-cluster implantation. These defects are considered to contribute to the powerful gettering capability required for high-performance CMOS image sensors.

  12. Large current MOSFET on photonic silicon-on-insulator wafers and its monolithic integration with a thermo-optic 2 × 2 Mach-Zehnder switch.

    Science.gov (United States)

    Cong, G W; Matsukawa, T; Chiba, T; Tadokoro, H; Yanagihara, M; Ohno, M; Kawashima, H; Kuwatsuka, H; Igarashi, Y; Masahara, M; Ishikawa, H

    2013-03-25

    n-channel body-tied partially depleted metal-oxide-semiconductor field-effect transistors (MOSFETs) were fabricated for large current applications on a silicon-on-insulator wafer with photonics-oriented specifications. The MOSFET can drive an electrical current as large as 20 mA. We monolithically integrated this MOSFET with a 2 × 2 Mach-Zehnder interferometer optical switch having thermo-optic phase shifters. The static and dynamic performances of the integrated device are experimentally evaluated.

  13. Formation of silicon carbide by laser ablation in graphene oxide-N-methyl-2-pyrrolidone suspension on silicon surface

    Science.gov (United States)

    Jaleh, Babak; Ghasemi, Samaneh; Torkamany, Mohammad Javad; Salehzadeh, Sadegh; Maleki, Farahnaz

    2018-01-01

    Laser ablation of a silicon wafer in graphene oxide-N-methyl-2-pyrrolidone (GO-NMP) suspension was carried out with a pulsed Nd:YAG laser (pulse duration = 250 ns, wavelength = 1064 nm). The surface of silicon wafer before and after laser ablation was studied using optical microscopy, scanning electron microscopy (SEM) and energy dispersive X-ray analysis (EDX). The results showed that the ablation of silicon surface in liquid by pulsed laser was done by the process of melt expulsion under the influence of the confined plasma-induced pressure or shock wave trapped between the silicon wafer and the liquid. The X-ray diffraction‌ (XRD) pattern of Si wafer after laser ablation showed that 4H-SiC layer is formed on its surface. The formation of the above layer was also confirmed by Raman spectroscopy, and X-ray photoelectron spectroscopy‌ (XPS), as well as EDX was utilized. The reflectance of samples decreased with increasing pulse energy. Therefore, the morphological alteration and the formation of SiC layer at high energy increase absorption intensity in the UV‌-vis regions. Theoretical calculations confirm that the formation of silicon carbide from graphene oxide and silicon wafer is considerably endothermic. Development of new methods for increasing the reflectance without causing harmful effects is still an important issue for crystalline Si solar cells. By using the method described in this paper, the optical properties of solar cells can be improved.

  14. High Efficiency, Low Cost Solar Cells Manufactured Using 'Silicon Ink' on Thin Crystalline Silicon Wafers

    Energy Technology Data Exchange (ETDEWEB)

    Antoniadis, H.

    2011-03-01

    Reported are the development and demonstration of a 17% efficient 25mm x 25mm crystalline Silicon solar cell and a 16% efficient 125mm x 125mm crystalline Silicon solar cell, both produced by Ink-jet printing Silicon Ink on a thin crystalline Silicon wafer. To achieve these objectives, processing approaches were developed to print the Silicon Ink in a predetermined pattern to form a high efficiency selective emitter, remove the solvents in the Silicon Ink and fuse the deposited particle Silicon films. Additionally, standard solar cell manufacturing equipment with slightly modified processes were used to complete the fabrication of the Silicon Ink high efficiency solar cells. Also reported are the development and demonstration of a 18.5% efficient 125mm x 125mm monocrystalline Silicon cell, and a 17% efficient 125mm x 125mm multicrystalline Silicon cell, by utilizing high throughput Ink-jet and screen printing technologies. To achieve these objectives, Innovalight developed new high throughput processing tools to print and fuse both p and n type particle Silicon Inks in a predetermined pat-tern applied either on the front or the back of the cell. Additionally, a customized Ink-jet and screen printing systems, coupled with customized substrate handling solution, customized printing algorithms, and a customized ink drying process, in combination with a purchased turn-key line, were used to complete the high efficiency solar cells. This development work delivered a process capable of high volume producing 18.5% efficient crystalline Silicon solar cells and enabled the Innovalight to commercialize its technology by the summer of 2010.

  15. Camera-Based Lock-in and Heterodyne Carrierographic Photoluminescence Imaging of Crystalline Silicon Wafers

    Science.gov (United States)

    Sun, Q. M.; Melnikov, A.; Mandelis, A.

    2015-06-01

    Carrierographic (spectrally gated photoluminescence) imaging of a crystalline silicon wafer using an InGaAs camera and two spread super-bandgap illumination laser beams is introduced in both low-frequency lock-in and high-frequency heterodyne modes. Lock-in carrierographic images of the wafer up to 400 Hz modulation frequency are presented. To overcome the frame rate and exposure time limitations of the camera, a heterodyne method is employed for high-frequency carrierographic imaging which results in high-resolution near-subsurface information. The feasibility of the method is guaranteed by the typical superlinearity behavior of photoluminescence, which allows one to construct a slow enough beat frequency component from nonlinear mixing of two high frequencies. Intensity-scan measurements were carried out with a conventional single-element InGaAs detector photocarrier radiometry system, and the nonlinearity exponent of the wafer was found to be around 1.7. Heterodyne images of the wafer up to 4 kHz have been obtained and qualitatively analyzed. With the help of the complementary lock-in and heterodyne modes, camera-based carrierographic imaging in a wide frequency range has been realized for fundamental research and industrial applications toward in-line nondestructive testing of semiconductor materials and devices.

  16. Crack Detection in Single-Crystalline Silicon Wafer Using Laser Generated Lamb Wave

    Directory of Open Access Journals (Sweden)

    Min-Kyoo Song

    2013-01-01

    Full Text Available In the semiconductor industry, with increasing requirements for high performance, high capacity, high reliability, and compact components, the crack has been one of the most critical issues in accordance with the growing requirement of the wafer-thinning in recent years. Previous researchers presented the crack detection on the silicon wafers with the air-coupled ultrasonic method successfully. However, the high impedance mismatching will be the problem in the industrial field. In this paper, in order to detect the crack, we propose a laser generated Lamb wave method which is not only noncontact, but also reliable for the measurement. The laser-ultrasonic generator and the laser-interferometer are used as a transmitter and a receiver, respectively. We firstly verified the identification of S0 and A0 lamb wave modes and then conducted the crack detection under the thermoelastic regime. The experimental results showed that S0 and A0 modes of lamb wave were clearly generated and detected, and in the case of the crack detection, the estimated crack size by 6 dB drop method was almost equal to the actual crack size. So, the proposed method is expected to make it possible to detect the crack in the silicon wafer in the industrial fields.

  17. Non-axisymmetric flexural vibrations of free-edge circular silicon wafers

    Energy Technology Data Exchange (ETDEWEB)

    Dmitriev, A.V., E-mail: dmitriev@hbar.phys.msu.ru; Gritsenko, D.S.; Mitrofanov, V.P., E-mail: mitr@hbar.phys.msu.ru

    2014-02-07

    Non-axisymmetric flexural vibrations of circular silicon (111) wafers are investigated. The modes with azimuthal index 2⩽k⩽30 are electrostatically excited and monitored by a capacitive sensor. The splitting of the mode frequencies associated with imperfection of the wafer is observed. The measured loss factors for the modes with 6≲k≲26 are close to those calculated according to the thermoelastic damping theory, while clamping losses likely dominate for k≲6, and surface losses at the level of inverse Q-factor Q{sup −1}≈4×10{sup −6} prevail for the modes with large k. The modes demonstrate nonlinear behavior of mainly geometrical origin at large amplitudes.

  18. The influence of silicon wafer thickness on characteristics of multijunction solar cells with vertical p—n-junctions

    Directory of Open Access Journals (Sweden)

    Gnilenko A. B.

    2012-02-01

    Full Text Available A multijunction silicon solar cell with vertical p–n junctions consisted of four serial n+–p–p+-structures was simulated using Silvaco TCAD software package. The dependence of solar cell characteristics on the silicon wafer thickness is investigated for a wide range of values.

  19. Mechanical grooving of oxidized porous silicon to reduce the reflectivity of monocrystalline silicon solar cells

    Energy Technology Data Exchange (ETDEWEB)

    Zarroug, A.; Dimassi, W.; Ouertani, R.; Ezzaouia, H. [Laboratoire de Photovoltaique, Centre des Recherches et des Technologies de l' Energie, BP. 95, Hammam-Lif 2050 (Tunisia)

    2012-10-15

    In this work, we are interested to use oxidized porous silicon (ox-PS) as a mask. So, we display the creating of a rough surface which enhances the absorption of incident light by solar cells and reduces the reflectivity of monocrystalline silicon (c-Si). It clearly can be seen that the mechanical grooving enables us to elaborate the texturing of monocrystalline silicon wafer. Results demonstrated that the application of a PS layer followed by a thermal treatment under O2 ambient easily gives us an oxide layer of uniform size which can vary from a nanometer to about ten microns. In addition, the Fourier transform infrared (FTIR) spectroscopy investigations of the PS layer illustrates the possibility to realize oxide layer as a mask for porous silicon. We found also that this simple and low cost method decreases the total reflectivity (copyright 2012 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim) (orig.)

  20. Laser direct writing of oxide structures on hydrogen-passivated silicon surfaces

    DEFF Research Database (Denmark)

    Müllenborn, Matthias; Birkelund, Karen; Grey, Francois

    1996-01-01

    on amorphous and crystalline silicon surfaces in order to determine the depassivation mechanism. The minimum linewidth achieved is about 450 nm using writing speeds of up to 100 mm/s. The process is fully compatible with local oxidation of silicon by scanning probe lithography. Wafer-scale patterns can...

  1. Automated and inexpensive method to manufacture solid- state nanopores and micropores in robust silicon wafers

    International Nuclear Information System (INIS)

    Vega, M; Lasorsa, C; Lerner, B; Perez, M; Granell, P

    2016-01-01

    In this work an easy, reproducible and inexpensive technique for the production of solid state nanopores and micropores using silicon wafer substrate is proposed. The technique is based on control of pore formation, by neutralization etchant (KOH) with a strong acid (HCl). Thus, a local neutralization is produced around the nanopore, which stops the silicon etching. The etching process was performed with 7M KOH at 80°C, where 1.23µm/min etching speed was obtained, similar to those published in literature. The control of the pore formation with the braking acid method was done using 12M HCl and different extreme conditions: i) at 25°C, ii) at 80°C and iii) at 80°C applying an electric potential. In these studies, it was found that nanopores and micropores can be obtained automatically and at a low cost. Additionally, the process was optimized to obtain clean silicon wafers after the pore fabrication process. This method opens the possibility for an efficient scale-up from laboratory production. (paper)

  2. Automated and inexpensive method to manufacture solid- state nanopores and micropores in robust silicon wafers

    Science.gov (United States)

    Vega, M.; Granell, P.; Lasorsa, C.; Lerner, B.; Perez, M.

    2016-02-01

    In this work an easy, reproducible and inexpensive technique for the production of solid state nanopores and micropores using silicon wafer substrate is proposed. The technique is based on control of pore formation, by neutralization etchant (KOH) with a strong acid (HCl). Thus, a local neutralization is produced around the nanopore, which stops the silicon etching. The etching process was performed with 7M KOH at 80°C, where 1.23µm/min etching speed was obtained, similar to those published in literature. The control of the pore formation with the braking acid method was done using 12M HCl and different extreme conditions: i) at 25°C, ii) at 80°C and iii) at 80°C applying an electric potential. In these studies, it was found that nanopores and micropores can be obtained automatically and at a low cost. Additionally, the process was optimized to obtain clean silicon wafers after the pore fabrication process. This method opens the possibility for an efficient scale-up from laboratory production.

  3. Integration of functional complex oxide nanomaterials on silicon

    Directory of Open Access Journals (Sweden)

    Jose Manuel eVila-Fungueiriño

    2015-06-01

    Full Text Available The combination of standard wafer-scale semiconductor processing with the properties of functional oxides opens up to innovative and more efficient devices with high value applications that can be produced at large scale. This review uncovers the main strategies that are successfully used to monolithically integrate functional complex oxide thin films and nanostructures on silicon: the chemical solution deposition approach (CSD and the advanced physical vapor deposition techniques such as oxide molecular beam epitaxy (MBE. Special emphasis will be placed on complex oxide nanostructures epitaxially grown on silicon using the combination of CSD and MBE. Several examples will be exposed, with a particular stress on the control of interfaces and crystallization mechanisms on epitaxial perovskite oxide thin films, nanostructured quartz thin films, and octahedral molecular sieve nanowires. This review enlightens on the potential of complex oxide nanostructures and the combination of both chemical and physical elaboration techniques for novel oxide-based integrated devices.

  4. Eutectic and solid-state wafer bonding of silicon with gold

    International Nuclear Information System (INIS)

    Abouie, Maryam; Liu, Qi; Ivey, Douglas G.

    2012-01-01

    Highlights: ► Eutectic and solid-state Au-Si bonding are compared for both a-Si and c-Si samples. ► Exchange of a-Si and Au layer was observed in both types of bonded samples. ► Use of c-Si for bonding resulted in formation of craters at the Au/c-Si interface. ► Solid-state Au-Si bonding produces better bonds in terms of microstructure. - Abstract: The simple Au-Si eutectic, which melts at 363 °C, can be used to bond Si wafers. However, faceted craters can form at the Au/Si interface as a result of anisotropic and non-uniform reaction between Au and crystalline silicon (c-Si). These craters may adversely affect active devices on the wafers. Two possible solutions to this problem were investigated in this study. One solution was to use an amorphous silicon layer (a-Si) that was deposited on the c-Si substrate to bond with the Au. The other solution was to use solid-state bonding instead of eutectic bonding, and the wafers were bonded at a temperature (350 °C) below the Au-Si eutectic temperature. The results showed that the a-Si layer prevented the formation of craters and solid-state bonding not only required a lower bonding temperature than eutectic bonding, but also prevented spill out of the solder resulting in strong bonds with high shear strength in comparison with eutectic bonding. Using amorphous silicon, the maximum shear strength for the solid-state Au-Si bond reached 15.2 MPa, whereas for the eutectic Au-Si bond it was 13.2 MPa.

  5. Magnetic structure of cross-shaped permalloy arrays embedded in silicon wafers

    International Nuclear Information System (INIS)

    Machida, Kenji; Tezuka, Tomoyuki; Yamamoto, Takahiro; Ishibashi, Takayuki; Morishita, Yoshitaka; Koukitu, Akinori; Sato, Katsuaki

    2005-01-01

    This paper describes the observed magnetic structure and the micromagnetic simulation of cross-shaped, permalloy (Ni 80 Fe 20 ) arrays embedded in silicon wafers. The nano-scale-width, cross-shaped patterns were fabricated using the damascene technique, electron beam lithography, and chemical mechanical polishing. The magnetic poles were observed as two pairs of bright and dark spots at the ends of the crossed-bars using a magnetic force microscope. The force gradient distributions were simulated based on micromagnetic calculations and tip's stray field calculations using the integral equation method. This process of calculation successfully explains the appearance of the poles and complicated spin structure at the crossing region

  6. Plasma Etching of Tapered Features in Silicon for MEMS and Wafer Level Packaging Applications

    International Nuclear Information System (INIS)

    Ngo, H-D; Hiess, Andre; Seidemann, Volker; Studzinski, Daniel; Lange, Martin; Leib, Juergen; Shariff, Dzafir; Ashraf, Huma; Steel, Mike; Atabo, Lilian; Reast, Jon

    2006-01-01

    This paper is a brief report of plasma etching as applied to pattern transfer in silicon. It will focus more on concept overview and strategies for etching of tapered features of interest for MEMS and Wafer Level Packaging (WLP). The basis of plasma etching, the dry etching technique, is explained and plasma configurations are described elsewhere. An important feature of plasma etching is the possibility to achieve etch anisotropy. The plasma etch process is extremely sensitive to many variables such as mask material, mask openings and more important the plasma parameters

  7. Development of a classical force field for the oxidized Si surface: application to hydrophilic wafer bonding.

    Science.gov (United States)

    Cole, Daniel J; Payne, Mike C; Csányi, Gábor; Spearing, S Mark; Colombi Ciacchi, Lucio

    2007-11-28

    We have developed a classical two- and three-body interaction potential to simulate the hydroxylated, natively oxidized Si surface in contact with water solutions, based on the combination and extension of the Stillinger-Weber potential and of a potential originally developed to simulate SiO(2) polymorphs. The potential parameters are chosen to reproduce the structure, charge distribution, tensile surface stress, and interactions with single water molecules of a natively oxidized Si surface model previously obtained by means of accurate density functional theory simulations. We have applied the potential to the case of hydrophilic silicon wafer bonding at room temperature, revealing maximum room temperature work of adhesion values for natively oxidized and amorphous silica surfaces of 97 and 90 mJm(2), respectively, at a water adsorption coverage of approximately 1 ML. The difference arises from the stronger interaction of the natively oxidized surface with liquid water, resulting in a higher heat of immersion (203 vs 166 mJm(2)), and may be explained in terms of the more pronounced water structuring close to the surface in alternating layers of larger and smaller densities with respect to the liquid bulk. The computed force-displacement bonding curves may be a useful input for cohesive zone models where both the topographic details of the surfaces and the dependence of the attractive force on the initial surface separation and wetting can be taken into account.

  8. Detection of trace contamination of copper on a silicon wafer with TXRF

    International Nuclear Information System (INIS)

    Yamada, T.; Matsuo, M.; Kohno, H.; Mori, Y.

    2000-01-01

    The element copper on silicon wafers is one of the most important metals to be detected among the contamination in semiconductor industries. When W-Lβ 1 (9.67 keV) line is used for the excitation in TXRF instrument and when Si(Li) is used as its detector, an escape peak appears at 7.93 keV which is close to the energy of Cu-Kα line(8.04 keV). When the concentration of copper is lower than 10 10 atoms/cm 2 , accurate quantitative analysis is difficult because of the overlapping of the peaks. When Au-Lβ 1 line(11.44 keV) is used for the excitation, the escape peak appears at 9.70 keV which is far enough from the energy of Cu-Ka line. We prepared silicon wafers intentionally contaminated with copper in a low concentration range of 10 8 to 10 10 atoms/cm 2 and measured them with a TXRF instrument having Au-Lβ 1 line for excitation. The contaminated samples were made with IAP method and their Cu concentrations were calibrated with VPD-AAS method (recovery solution: 2 % HF + 2 % H 2 O 2 ). A figure shows the correlation between the results with TXRF and those with AAS. The horizontal axis is the value of concentration decided by AAS and the vertical axis is the intensity of Cu-Kα line measured with the TXRF. Six wafers of different concentration were used and five points on each wafer including the center were measured with TXRF. Five points at each concentration in the figure correspond to the results measured on one wafer. Intensities of Cu-Kα line are weak in these low concentration ranges but the background of them are also very small (less than 0.05 cps). Therefore the peak of Cu-Kα line can be distinguished from the background. It can be said that a calibration curve can be drawn to the middle range of 10 9 atoms/cm 2 . The same samples were measured with another TXRF instrument having W-Lβ 1 line for excitation. It was difficult to draw a calibration curve in this case. We will present both results taken with Au-Lβ 1 line and with W-Lβ 1 line. (author)

  9. Formation of cross-cutting structures with different porosity on thick silicon wafers

    Directory of Open Access Journals (Sweden)

    Vera A. Yuzova

    2017-06-01

    The second type pass-through structures include a macroporous silicon layer with a thickness of 250 μm which interlock in the depth of the silicon wafer to form a cavity with a size of 4–8 μm. For the formation of the second type structures we only used the first one of the abovementioned stages, the etching time being longer, i.e. 210 min. All the etching procedures were carried out in a cooling chamber at 5 °C. The developed technology will provided for easier and more reliable formation of the monolithic structures of membrane-electrode assembly micro fuel cells.

  10. EQUIPMENT FOR NONDESTRUCTIVE TESTING OF SILICON WAFERS SUBMICRON TOPOLOGY DURING THE FABRICATION OF INTEGRATED CIRCUITS

    Directory of Open Access Journals (Sweden)

    S. A. Chizhik

    2013-01-01

    Full Text Available The advantages of using an atomic force microscopy in manufacturing of submicron integrated circuits are described. The possibilities of characterizing the surface morphology and the etching profile for silicon substrate and bus lines, estimation of the periodicity and size of bus lines, geometrical stability for elementary bus line are shown. Methods of optical and atomic force microcopies are combined in one diagnostic unit. Scanning  probe  microscope  (SPM  200  is  designed  and  produced.  Complex  SPM  200  realizes  nondestructive control of microelectronics elements made on silicon wafers up to 200 mm in diameter and it is introduced by JSC «Integral» for the purpose of operational control, metrology and acceptance of the final product.

  11. Kerfless epitaxial silicon wafers with 7 ms carrier lifetimes and a wide lift-off process window

    Science.gov (United States)

    Gemmel, Catherin; Hensen, Jan; David, Lasse; Kajari-Schröder, Sarah; Brendel, Rolf

    2018-04-01

    Silicon wafers contribute significantly to the photovoltaic module cost. Kerfless silicon wafers that grow epitaxially on porous silicon (PSI) and are subsequently detached from the growth substrate are a promising lower cost drop-in replacement for standard Czochralski (Cz) wafers. However, a wide technological processing window appears to be a challenge for this process. This holds in particularly for the etching current density of the separation layer that leads to lift-off failures if it is too large or too low. Here we present kerfless PSI wafers of high electronic quality that we fabricate on weakly reorganized porous Si with etch current densities varying in a wide process window from 110 to 150 mA/cm2. We are able to detach all 17 out of 17 epitaxial wafers. All wafers exhibit charge carrier lifetimes in the range of 1.9 to 4.3 ms at an injection level of 1015 cm-3 without additional high-temperature treatment. We find even higher lifetimes in the range of 4.6 to 7.0 ms after applying phosphorous gettering. These results indicate that a weak reorganization of the porous layer can be beneficial for a large lift-off process window while still allowing for high carrier lifetimes.

  12. Study on chemical mechanical polishing of silicon wafer with megasonic vibration assisted.

    Science.gov (United States)

    Zhai, Ke; He, Qing; Li, Liang; Ren, Yi

    2017-09-01

    Chemical mechanical polishing (CMP) is the primary method to realize the global planarization of silicon wafer. In order to improve this process, a novel method which combined megasonic vibration to assist chemical mechanical polishing (MA-CMP) is developed in this paper. A matching layer structure of polishing head was calculated and designed. Silicon wafers are polished by megasonic assisted chemical mechanical polishing and traditional chemical mechanical polishing respectively, both coarse polishing and precision polishing experiments were carried out. With the use of megasonic vibration, the surface roughness values Ra reduced from 22.260nm to 17.835nm in coarse polishing, and the material removal rate increased by approximately 15-25% for megasonic assisted chemical mechanical polishing relative to traditional chemical mechanical polishing. Average Surface roughness values Ra reduced from 0.509nm to 0.387nm in precision polishing. The results show that megasonic assisted chemical mechanical polishing is a feasible method to improve polishing efficiency and surface quality. The material removal and finishing mechanisms of megasonic vibration assisted polishing are investigated too. Copyright © 2017 Elsevier B.V. All rights reserved.

  13. Process induced sub-surface damage in mechanically ground silicon wafers

    International Nuclear Information System (INIS)

    Yang Yu; De Munck, Koen; Teixeira, Ricardo Cotrin; Swinnen, Bart; De Wolf, Ingrid; Verlinden, Bert

    2008-01-01

    Micro-Raman spectroscopy, scanning electron microcopy, atomic force microscopy and preferential etching were used to characterize the sub-surface damage induced by the rough and fine grinding steps used to make ultra-thin silicon wafers. The roughly and ultra-finely ground silicon wafers were examined on both the machined (1 0 0) planes and the cross-sectional (1 1 0) planes. They reveal similar multi-layer damage structures, consisting of amorphous, plastically deformed and elastically stressed layers. However, the thickness of each layer in the roughly ground sample is much higher than its counterpart layers in the ultra-finely ground sample. The residual stress after rough and ultra-fine grinding is in the range of several hundreds MPa and 30 MPa, respectively. In each case, the top amorphous layer is believed to be the result of sequential phase transformations (Si-I to Si-II to amorphous Si). These phase transformations correspond to a ductile grinding mechanism, which is dominating in ultra-fine grinding. On the other hand, in rough grinding, a mixed mechanism of ductile and brittle grinding causes multi-layer damage and sub-surface cracks

  14. Silicon heterojunction solar cells with novel fluorinated n-type nanocrystalline silicon oxide emitters on p-type crystalline silicon

    Science.gov (United States)

    Dhar, Sukanta; Mandal, Sourav; Das, Gourab; Mukhopadhyay, Sumita; Pratim Ray, Partha; Banerjee, Chandan; Barua, Asok Kumar

    2015-08-01

    A novel fluorinated phosphorus doped silicon oxide based nanocrystalline material have been used to prepare heterojunction solar cells on flat p-type crystalline silicon (c-Si) Czochralski (CZ) wafers. The n-type nc-SiO:F:H material were deposited by radio frequency plasma enhanced chemical vapor deposition. Deposited films were characterized in detail by using atomic force microscopy (AFM), high resolution transmission electron microscopy (HRTEM), Raman, fourier transform infrared spectroscopy (FTIR) and optoelectronics properties have been studied using temperature dependent conductivity measurement, Ellipsometry, UV-vis spectrum analysis etc. It is observed that the cell fabricated with fluorinated silicon oxide emitter showing higher initial efficiency (η = 15.64%, Jsc = 32.10 mA/cm2, Voc = 0.630 V, FF = 0.77) for 1 cm2 cell area compare to conventional n-a-Si:H emitter (14.73%) on flat c-Si wafer. These results indicate that n type nc-SiO:F:H material is a promising candidate for heterojunction solar cell on p-type crystalline wafers. The high Jsc value is associated with excellent quantum efficiencies at short wavelengths (<500 nm).

  15. Effect of Anisotropy on Shape Measurement Accuracy of Silicon Wafer Using Three-Point-Support Inverting Method

    Science.gov (United States)

    Ito, Yukihiro; Natsu, Wataru; Kunieda, Masanori

    This paper describes the influences of anisotropy found in the elastic modulus of monocrystalline silicon wafers on the measurement accuracy of the three-point-support inverting method which can measure the warp and thickness of thin large panels simultaneously. Deflection due to gravity depends on the crystal orientation relative to the positions of the three-point-supports. Thus the deviation of actual crystal orientation from the direction indicated by the notch fabricated on the wafer causes measurement errors. Numerical analysis of the deflection confirmed that the uncertainty of thickness measurement increases from 0.168µm to 0.524µm due to this measurement error. In addition, experimental results showed that the rotation of crystal orientation relative to the three-point-supports is effective for preventing wafer vibration excited by disturbance vibration because the resonance frequency of wafers can be changed. Thus, surface shape measurement accuracy was improved by preventing resonant vibration during measurement.

  16. Field oxide radiation damage measurements in silicon strip detectors

    Energy Technology Data Exchange (ETDEWEB)

    Laakso, M [Particle Detector Group, Fermilab, Batavia, IL (United States) Research Inst. for High Energy Physics (SEFT), Helsinki (Finland); Singh, P; Shepard, P F [Dept. of Physics and Astronomy, Univ. Pittsburgh, PA (United States)

    1993-04-01

    Surface radiation damage in planar processed silicon detectors is caused by radiation generated holes being trapped in the silicon dioxide layers on the detector wafer. We have studied charge trapping in thick (field) oxide layers on detector wafers by irradiating FOXFET biased strip detectors and MOS test capacitors. Special emphasis was put on studying how a negative bias voltage across the oxide during irradiation affects hole trapping. In addition to FOXFET biased detectors, negatively biased field oxide layers may exist on the n-side of double-sided strip detectors with field plate based n-strip separation. The results indicate that charge trapping occurred both close to the Si-SiO[sub 2] interface and in the bulk of the oxide. The charge trapped in the bulk was found to modify the electric field in the oxide in a way that leads to saturation in the amount of charge trapped in the bulk when the flatband/threshold voltage shift equals the voltage applied over the oxide during irradiation. After irradiation only charge trapped close to the interface is annealed by electrons tunneling to the oxide from the n-type bulk. (orig.).

  17. Investigation of the heating behavior of carbide-bonded graphene coated silicon wafer used for hot embossing

    Science.gov (United States)

    Yang, Gao; Li, Lihua; Lee, Wing Bun; Ng, Man Cheung; Chan, Chang Yuen

    2018-03-01

    A recently developed carbide-bonded graphene (CBG) coated silicon wafer was found to be an effective micro-patterned mold material for implementing rapid heating in hot embossing processes owing to its superior electrical and thermal conductivity, in addition to excellent mechanical properties. To facilitate the achievement of precision temperature control in the hot embossing, the heating behavior of a CBG coated silicon wafer sample was experimentally investigated. First, two groups of controlled experiments were conducted for quantitatively evaluating the influence of the main factors such as the vacuum pressure and gaseous environment (vacuum versus nitrogen) on its heating performance. The electrical and thermal responses of this sample under a voltage of 60 V were then intensively analyzed, and revealed that it had somewhat semi-conducting properties. Further, we compared its thermal profiles under different settings of the input voltage and current limiting threshold. Moreover, the strong temperature dependence of electrical resistance for this material was observed and determined. Ultimately, the surface temperature of CBG coated silicon wafer could be as high as 1300 ℃, but surprisingly the graphene coating did not detach from the substrate under such an elevated temperature due to its strong thermal coupling with the silicon wafer.

  18. High sensitivity detection and characterization of the chemical state of trace element contamination on silicon wafers

    CERN Document Server

    Pianetta, Piero A; Baur, K; Brennan, S; Homma, T; Kubo, N

    2003-01-01

    Increasing the speed and complexity of semiconductor integrated circuits requires advanced processes that put extreme constraints on the level of metal contamination allowed on the surfaces of silicon wafers. Such contamination degrades the performance of the ultrathin SiO sub 2 gate dielectrics that form the heart of the individual transistors. Ultimately, reliability and yield are reduced to levels that must be improved before new processes can be put into production. It should be noted that much of this metal contamination occurs during the wet chemical etching and rinsing steps required for the manufacture of integrated circuits and industry is actively developing new processes that have already brought the metal contamination to levels beyond the measurement capabilities of conventional analytical techniques. The measurement of these extremely low contamination levels has required the use of synchrotron radiation total reflection X-ray fluorescence (SR-TXRF) where sensitivities 100 times better than conv...

  19. Suppression of interfacial voids formation during silane (SiH4)-based silicon oxide bonding with a thin silicon nitride capping layer

    Science.gov (United States)

    Lee, Kwang Hong; Bao, Shuyu; Wang, Yue; Fitzgerald, Eugene A.; Seng Tan, Chuan

    2018-01-01

    The material properties and bonding behavior of silane-based silicon oxide layers deposited by plasma-enhanced chemical vapor deposition were investigated. Fourier transform infrared spectroscopy was employed to determine the chemical composition of the silicon oxide films. The incorporation of hydroxyl (-OH) groups and moisture absorption demonstrates a strong correlation with the storage duration for both as-deposited and annealed silicon oxide films. It is observed that moisture absorption is prevalent in the silane-based silicon oxide film due to its porous nature. The incorporation of -OH groups and moisture absorption in the silicon oxide films increase with the storage time (even in clean-room environments) for both as-deposited and annealed silicon oxide films. Due to silanol condensation and silicon oxidation reactions that take place at the bonding interface and in the bulk silicon, hydrogen (a byproduct of these reactions) is released and diffused towards the bonding interface. The trapped hydrogen forms voids over time. Additionally, the absorbed moisture could evaporate during the post-bond annealing of the bonded wafer pair. As a consequence, defects, such as voids, form at the bonding interface. To address the problem, a thin silicon nitride capping film was deposited on the silicon oxide layer before bonding to serve as a diffusion barrier to prevent moisture absorption and incorporation of -OH groups from the ambient. This process results in defect-free bonded wafers.

  20. Effect of Processing Parameters on Thickness of Columnar Structured Silicon Wafers Directly Grown from Silicon Melts

    Directory of Open Access Journals (Sweden)

    Jin-Seok Lee

    2012-01-01

    Full Text Available In order to obtain optimum growth conditions for desired thickness and more effective silicon feedstock usage, effects of processing parameters such as preheated substrate temperatures, time intervals, moving velocity of substrates, and Ar gas blowing rates on silicon ribbon thickness were investigated in the horizontal growth process. Most of the parameters strongly affected in the control of ribbon thickness with columnar grain structure depended on the solidification rate. The thickness of the silicon ribbon decreased with an increasing substrate temperature, decreasing time interval, and increasing moving velocity of the substrate. However, the blowing of Ar gas onto a liquid layer existing on the surface of solidified ribbon contributed to achieving smooth surface roughness but did not closely affect the change of ribbon thickness in the case of a blowing rate of ≥0.65 Nm3/h because the thickness of the solidified layer was already determined by the exit height of the reservoir.

  1. Preparation and characterization of ultra-thin amphiphobic coatings on silicon wafers

    International Nuclear Information System (INIS)

    Mou, Chun-Yueh; Yuan, Wei-Li; Shih, Chih-Hsin

    2013-01-01

    Fluorine-based amphiphobic coatings have been widely used in commercial domestic utensils and textiles to repel water and oil contaminants. However, few reports from the literature survey have discussed the effects on amphiphobicity of the nano- to micro-scale surface features of such a coating. In this research thin amphiphobic epoxy coatings based on a mixture of bisphenol A diglycidyl ether, tetraethylorthosilicate (TEOS), and a particular alkoxy silane with fluorinated side chains (F-silane) are deposited on silicon wafers. Film amphiphobicity is characterized by the measurement of water and oil contact angles of the coating. Film morphology is revealed in the scanned images using atomic force microscopy. The deposited films free of F-silane are about 10 nm thick. When a small amount of F-silane was firstly added, the water and oil contact angles of the deposited films jumped up to 107° and 69° respectively and then flattened out with increased F-silane. Water droplets gave an average plateau contact angle about 110°, while vegetable oil ones, 40°. It was noted that there is a dramatic decrease in the lyophobicity causing a reduction in contact angles. However, surface lyophobicity also depends on sub-microscopic surface structures. In addition, by increasing TEOS, it was shown that the formed silica sols or granules were helpful in enhancing the mechanical strength along with retaining the lyophobicity of the film. - Highlights: • Epoxy ultrathin films about 10 nm thick deposited on silicon wafer. • Nominal fluorinated silane added to epoxy coatings for amphiphobicity. • Surface lyophobicity retained by sub-micrometer granules in ultrathin coatings. • Film hardness improved by adding tetraethylorthosilicate

  2. Probing photo-carrier collection efficiencies of individual silicon nanowire diodes on a wafer substrate.

    Science.gov (United States)

    Schmitt, S W; Brönstrup, G; Shalev, G; Srivastava, S K; Bashouti, M Y; Döhler, G H; Christiansen, S H

    2014-07-21

    Vertically aligned silicon nanowire (SiNW) diodes are promising candidates for the integration into various opto-electronic device concepts for e.g. sensing or solar energy conversion. Individual SiNW p-n diodes have intensively been studied, but to date an assessment of their device performance once integrated on a silicon substrate has not been made. We show that using a scanning electron microscope (SEM) equipped with a nano-manipulator and an optical fiber feed-through for tunable (wavelength, power using a tunable laser source) sample illumination, the dark and illuminated current-voltage (I-V) curve of individual SiNW diodes on the substrate wafer can be measured. Surprisingly, the I-V-curve of the serially coupled system composed of SiNW/wafers is accurately described by an equivalent circuit model of a single diode and diode parameters like series and shunting resistivity, diode ideality factor and photocurrent can be retrieved from a fit. We show that the photo-carrier collection efficiency (PCE) of the integrated diode illuminated with variable wavelength and intensity light directly gives insight into the quality of the device design at the nanoscale. We find that the PCE decreases for high light intensities and photocurrent densities, due to the fact that considerable amounts of photo-excited carriers generated within the substrate lead to a decrease in shunting resistivity of the SiNW diode and deteriorate its rectification. The PCE decreases systematically for smaller wavelengths of visible light, showing the possibility of monitoring the effectiveness of the SiNW device surface passivation using the shown measurement technique. The integrated device was pre-characterized using secondary ion mass spectrometry (SIMS), TCAD simulations and electron beam induced current (EBIC) measurements to validate the properties of the characterized material at the single SiNW diode level.

  3. Preparation and characterization of ultra-thin amphiphobic coatings on silicon wafers

    Energy Technology Data Exchange (ETDEWEB)

    Mou, Chun-Yueh, E-mail: cymou165@gmail.com; Yuan, Wei-Li; Shih, Chih-Hsin

    2013-06-30

    Fluorine-based amphiphobic coatings have been widely used in commercial domestic utensils and textiles to repel water and oil contaminants. However, few reports from the literature survey have discussed the effects on amphiphobicity of the nano- to micro-scale surface features of such a coating. In this research thin amphiphobic epoxy coatings based on a mixture of bisphenol A diglycidyl ether, tetraethylorthosilicate (TEOS), and a particular alkoxy silane with fluorinated side chains (F-silane) are deposited on silicon wafers. Film amphiphobicity is characterized by the measurement of water and oil contact angles of the coating. Film morphology is revealed in the scanned images using atomic force microscopy. The deposited films free of F-silane are about 10 nm thick. When a small amount of F-silane was firstly added, the water and oil contact angles of the deposited films jumped up to 107° and 69° respectively and then flattened out with increased F-silane. Water droplets gave an average plateau contact angle about 110°, while vegetable oil ones, 40°. It was noted that there is a dramatic decrease in the lyophobicity causing a reduction in contact angles. However, surface lyophobicity also depends on sub-microscopic surface structures. In addition, by increasing TEOS, it was shown that the formed silica sols or granules were helpful in enhancing the mechanical strength along with retaining the lyophobicity of the film. - Highlights: • Epoxy ultrathin films about 10 nm thick deposited on silicon wafer. • Nominal fluorinated silane added to epoxy coatings for amphiphobicity. • Surface lyophobicity retained by sub-micrometer granules in ultrathin coatings. • Film hardness improved by adding tetraethylorthosilicate.

  4. Effect of PECVD SiNx/SiOy Nx –Si interface property on surface passivation of silicon wafer

    International Nuclear Information System (INIS)

    Jia Xiao-Jie; Zhou Chun-Lan; Zhou Su; Wang Wen-Jing; Zhu Jun-Jie

    2016-01-01

    It is studied in this paper that the electrical characteristics of the interface between SiO y N x /SiN x stack and silicon wafer affect silicon surface passivation. The effects of precursor flow ratio and deposition temperature of the SiO y N x layer on interface parameters, such as interface state density Di t and fixed charge Q f , and the surface passivation quality of silicon are observed. Capacitance–voltage measurements reveal that inserting a thin SiO y N x layer between the SiN x and the silicon wafer can suppress Q f in the film and D it at the interface. The positive Q f and D it and a high surface recombination velocity in stacks are observed to increase with the introduced oxygen and minimal hydrogen in the SiO y N x film increasing. Prepared by deposition at a low temperature and a low ratio of N 2 O/SiH 4 flow rate, the SiO y N x /SiN x stacks result in a low effective surface recombination velocity (S eff ) of 6 cm/s on a p-type 1 Ω·cm–5 Ω·cm FZ silicon wafer. The positive relationship between S eff and D it suggests that the saturation of the interface defect is the main passivation mechanism although the field-effect passivation provided by the fixed charges also make a contribution to it. (paper)

  5. Study of the processes of carbonization and oxidation of porous silicon by Raman and IR spectroscopy

    International Nuclear Information System (INIS)

    Vasin, A. V.; Okholin, P. N.; Verovsky, I. N.; Nazarov, A. N.; Lysenko, V. S.; Kholostov, K. I.; Bondarenko, V. P.; Ishikawa, Y.

    2011-01-01

    Porous silicon layers were produced by electrochemical etching of single-crystal silicon wafers with the resistivity 10 Ω cm in the aqueous-alcohol solution of hydrofluoric acid. Raman spectroscopy and infrared absorption spectroscopy are used to study the processes of interaction of porous silicon with undiluted acetylene at low temperatures and the processes of oxidation of carbonized porous silicon by water vapors. It is established that, even at the temperature 550°C, the silicon-carbon bonds are formed at the pore surface and the graphite-like carbon condensate emerges. It is shown that the carbon condensate inhibits oxidation of porous silicon by water vapors and contributes to quenching of white photoluminescence in the oxidized carbonized porous silicon nanocomposite layer.

  6. Tunnel Oxides Formed by Field-Induced Anodisation for Passivated Contacts of Silicon Solar Cells

    Directory of Open Access Journals (Sweden)

    Jingnan Tong

    2018-02-01

    Full Text Available Tunnel silicon oxides form a critical component for passivated contacts for silicon solar cells. They need to be sufficiently thin to allow carriers to tunnel through and to be uniform both in thickness and stoichiometry across the silicon wafer surface, to ensure uniform and low recombination velocities if high conversion efficiencies are to be achieved. This paper reports on the formation of ultra-thin silicon oxide layers by field-induced anodisation (FIA, a process that ensures uniform oxide thickness by passing the anodisation current perpendicularly through the wafer to the silicon surface that is anodised. Spectroscopical analyses show that the FIA oxides contain a lower fraction of Si-rich sub-oxides compared to wet-chemical oxides, resulting in lower recombination velocities at the silicon and oxide interface. This property along with its low temperature formation highlights the potential for FIA to be used to form low-cost tunnel oxide layers for passivated contacts of silicon solar cells.

  7. Tailoring the graphene/silicon carbide interface for monolithic wafer-scale electronics.

    Science.gov (United States)

    Hertel, S; Waldmann, D; Jobst, J; Albert, A; Albrecht, M; Reshanov, S; Schöner, A; Krieger, M; Weber, H B

    2012-07-17

    Graphene is an outstanding electronic material, predicted to have a role in post-silicon electronics. However, owing to the absence of an electronic bandgap, graphene switching devices with high on/off ratio are still lacking. Here in the search for a comprehensive concept for wafer-scale graphene electronics, we present a monolithic transistor that uses the entire material system epitaxial graphene on silicon carbide (0001). This system consists of the graphene layer with its vanishing energy gap, the underlying semiconductor and their common interface. The graphene/semiconductor interfaces are tailor-made for ohmic as well as for Schottky contacts side-by-side on the same chip. We demonstrate normally on and normally off operation of a single transistor with on/off ratios exceeding 10(4) and no damping at megahertz frequencies. In its simplest realization, the fabrication process requires only one lithography step to build transistors, diodes, resistors and eventually integrated circuits without the need of metallic interconnects.

  8. Reliability assessment of ultra-thin HfO2 films deposited on silicon wafer

    International Nuclear Information System (INIS)

    Fu, Wei-En; Chang, Chia-Wei; Chang, Yong-Qing; Yao, Chih-Kai; Liao, Jiunn-Der

    2012-01-01

    Highlights: ► Nano-mechanical properties on annealed ultra-thin HfO 2 film are studied. ► By AFM analysis, hardness of the crystallized HfO 2 film significantly increases. ► By nano-indention, the film hardness increases with less contact stiffness. ► Quality assessment on the annealed ultra-thin films can thus be achieved. - Abstract: Ultra-thin hafnium dioxide (HfO 2 ) is used to replace silicon dioxide to meet the required transistor feature size in advanced semiconductor industry. The process integration compatibility and long-term reliability for the transistors depend on the mechanical performance of ultra-thin HfO 2 films. The criteria of reliability including wear resistance, thermal fatigue, and stress-driven failure rely on film adhesion significantly. The adhesion and variations in mechanical properties induced by thermal annealing of the ultra-thin HfO 2 films deposited on silicon wafers (HfO 2 /SiO 2 /Si) are not fully understood. In this work, the mechanical properties of an atomic layer deposited HfO 2 (nominal thickness ≈10 nm) on a silicon wafer were characterized by the diamond-coated tip of an atomic force microscope and compared with those of annealed samples. The results indicate that the annealing process leads to the formation of crystallized HfO 2 phases for the atomic layer deposited HfO 2 . The HfSi x O y complex formed at the interface between HfO 2 and SiO 2 /Si, where the thermal diffusion of Hf, Si, and O atoms occurred. The annealing process increases the surface hardness of crystallized HfO 2 film and therefore the resistance to nano-scratches. In addition, the annealing process significantly decreases the harmonic contact stiffness (or thereafter eliminate the stress at the interface) and increases the nano-hardness, as measured by vertically sensitive nano-indentation. Quality assessments on as-deposited and annealed HfO 2 films can be thereafter used to estimate the mechanical properties and adhesion of ultra-thin HfO 2

  9. Reliability assessment of ultra-thin HfO{sub 2} films deposited on silicon wafer

    Energy Technology Data Exchange (ETDEWEB)

    Fu, Wei-En [Center for Measurement Standards, Industrial Technology Research Institute, Room 216, Building 8, 321 Kuang Fu Road Sec. 2, Hsinchu, Taiwan (China); Chang, Chia-Wei [Department of Materials Science and Engineering, National Cheng Kung University, 1 University Road, Tainan 70101, Taiwan (China); Chang, Yong-Qing [Center for Measurement Standards, Industrial Technology Research Institute, Room 216, Building 8, 321 Kuang Fu Road Sec. 2, Hsinchu, Taiwan (China); Yao, Chih-Kai [Department of Materials Science and Engineering, National Cheng Kung University, 1 University Road, Tainan 70101, Taiwan (China); Liao, Jiunn-Der, E-mail: jdliao@mail.ncku.edu.tw [Department of Materials Science and Engineering, National Cheng Kung University, 1 University Road, Tainan 70101, Taiwan (China)

    2012-09-01

    Highlights: Black-Right-Pointing-Pointer Nano-mechanical properties on annealed ultra-thin HfO{sub 2} film are studied. Black-Right-Pointing-Pointer By AFM analysis, hardness of the crystallized HfO{sub 2} film significantly increases. Black-Right-Pointing-Pointer By nano-indention, the film hardness increases with less contact stiffness. Black-Right-Pointing-Pointer Quality assessment on the annealed ultra-thin films can thus be achieved. - Abstract: Ultra-thin hafnium dioxide (HfO{sub 2}) is used to replace silicon dioxide to meet the required transistor feature size in advanced semiconductor industry. The process integration compatibility and long-term reliability for the transistors depend on the mechanical performance of ultra-thin HfO{sub 2} films. The criteria of reliability including wear resistance, thermal fatigue, and stress-driven failure rely on film adhesion significantly. The adhesion and variations in mechanical properties induced by thermal annealing of the ultra-thin HfO{sub 2} films deposited on silicon wafers (HfO{sub 2}/SiO{sub 2}/Si) are not fully understood. In this work, the mechanical properties of an atomic layer deposited HfO{sub 2} (nominal thickness Almost-Equal-To 10 nm) on a silicon wafer were characterized by the diamond-coated tip of an atomic force microscope and compared with those of annealed samples. The results indicate that the annealing process leads to the formation of crystallized HfO{sub 2} phases for the atomic layer deposited HfO{sub 2}. The HfSi{sub x}O{sub y} complex formed at the interface between HfO{sub 2} and SiO{sub 2}/Si, where the thermal diffusion of Hf, Si, and O atoms occurred. The annealing process increases the surface hardness of crystallized HfO{sub 2} film and therefore the resistance to nano-scratches. In addition, the annealing process significantly decreases the harmonic contact stiffness (or thereafter eliminate the stress at the interface) and increases the nano-hardness, as measured by vertically

  10. Comparison of slowness profiles of lamb wave with elastic moduli and crystal structure in single crystalline silicon wafers

    Energy Technology Data Exchange (ETDEWEB)

    Min, Young Jae; Yun, Gyeong Won; Kim, Kyung Min; Roh, Yuji; Kim, Young H. [Applied Acoustics Lab, Korea Science Academy of KAIST, Busan (Korea, Republic of)

    2016-02-15

    Single crystalline silicon wafers having (100), (110), and (111) directions are employed as specimens for obtaining slowness profiles. Leaky Lamb waves (LLW) from immersed wafers were detected by varying the incident angles of the specimens and rotating the specimens. From an analysis of LLW signals for different propagation directions and phase velocities of each specimen, slowness profiles were obtained, which showed a unique symmetry with different symmetric axes. Slowness profiles were compared with elastic moduli of each wafer. They showed the same symmetries as crystal structures. In addition, slowness profiles showed expected patterns and values that can be inferred from elastic moduli. This implies that slowness profiles can be used to examine crystal structures of anisotropic solids.

  11. Wafer scale formation of monocrystalline silicon-based Mie resonators via silicon-on-insulator dewetting.

    Science.gov (United States)

    Abbarchi, Marco; Naffouti, Meher; Vial, Benjamin; Benkouider, Abdelmalek; Lermusiaux, Laurent; Favre, Luc; Ronda, Antoine; Bidault, Sébastien; Berbezier, Isabelle; Bonod, Nicolas

    2014-11-25

    Subwavelength-sized dielectric Mie resonators have recently emerged as a promising photonic platform, as they combine the advantages of dielectric microstructures and metallic nanoparticles supporting surface plasmon polaritons. Here, we report the capabilities of a dewetting-based process, independent of the sample size, to fabricate Si-based resonators over large scales starting from commercial silicon-on-insulator (SOI) substrates. Spontaneous dewetting is shown to allow the production of monocrystalline Mie-resonators that feature two resonant modes in the visible spectrum, as observed in confocal scattering spectroscopy. Homogeneous scattering responses and improved spatial ordering of the Si-based resonators are observed when dewetting is assisted by electron beam lithography. Finally, exploiting different thermal agglomeration regimes, we highlight the versatility of this technique, which, when assisted by focused ion beam nanopatterning, produces monocrystalline nanocrystals with ad hoc size, position, and organization in complex multimers.

  12. Quantitative analysis of phosphosilicate glass films on silicon wafers for calibration of x-ray fluorescence spectrometry standards

    International Nuclear Information System (INIS)

    Weissman, S.H.

    1983-01-01

    The phosphorus and silicon contents of phosphosilicate glass films deposited by chemical vapor deposition (CVD) on silicon wafers were determined. These films were prepared for use as x-ray fluorescence (XRF) spectrometry standards. The thin films were removed from the wafer by etching with dilute hydrofluoric acid, and the P and Si concentrations in solution were determined by inductively coupled plasma atomic emission spectroscopy (ICP). The calculated phosphorus concentration ranged from 2.2 to 12 wt %, with an uncertainty of 2.73 to 10.1 relative percent. Variation between the calculated weight loss (summation of P 2 O 5 and SiO 2 amounts as determined by ICP) and the measured weight loss (determined gravimetrically) averaged 4.9%. Results from the ICP method, Fourier transform-infrared spectroscopy (FT-IR), dispersive infrared spectroscopy, electron microprobe, and x-ray fluorescence spectroscopy for the same samples are compared

  13. Large-size, high-uniformity, random silver nanowire networks as transparent electrodes for crystalline silicon wafer solar cells.

    Science.gov (United States)

    Xie, Shouyi; Ouyang, Zi; Jia, Baohua; Gu, Min

    2013-05-06

    Metal nanowire networks are emerging as next generation transparent electrodes for photovoltaic devices. We demonstrate the application of random silver nanowire networks as the top electrode on crystalline silicon wafer solar cells. The dependence of transmittance and sheet resistance on the surface coverage is measured. Superior optical and electrical properties are observed due to the large-size, highly-uniform nature of these networks. When applying the nanowire networks on the solar cells with an optimized two-step annealing process, we achieved as large as 19% enhancement on the energy conversion efficiency. The detailed analysis reveals that the enhancement is mainly caused by the improved electrical properties of the solar cells due to the silver nanowire networks. Our result reveals that this technology is a promising alternative transparent electrode technology for crystalline silicon wafer solar cells.

  14. Femtosecond versus nanosecond laser machining: comparison of induced stresses and structural changes in silicon wafers

    International Nuclear Information System (INIS)

    Amer, M.S.; El-Ashry, M.A.; Dosser, L.R.; Hix, K.E.; Maguire, J.F.; Irwin, Bryan

    2005-01-01

    Laser micromachining has proven to be a very successful tool for precision machining and microfabrication with applications in microelectronics, MEMS, medical device, aerospace, biomedical, and defense applications. Femtosecond (FS) laser micromachining is usually thought to be of minimal heat-affected zone (HAZ) local to the micromachined feature. The assumption of reduced HAZ is attributed to the absence of direct coupling of the laser energy into the thermal modes of the material during irradiation. However, a substantial HAZ is thought to exist when machining with lasers having pulse durations in the nanosecond (NS) regime. In this paper, we compare the results of micromachining a single crystal silicon wafer using a 150-femtosecond and a 30-nanosecond lasers. Induced stress and amorphization of the silicon single crystal were monitored using micro-Raman spectroscopy as a function of the fluence and pulse duration of the incident laser. The onset of average induced stress occurs at lower fluence when machining with the femtosecond pulse laser. Induced stresses were found to maximize at fluence of 44 J cm -2 and 8 J cm -2 for nanosecond and femtosecond pulsed lasers, respectively. In both laser pulse regimes, a maximum induced stress is observed at which point the induced stress begins to decrease as the fluence is increased. The maximum induced stress was comparable at 2.0 GPa and 1.5 GPa for the two lasers. For the nanosecond pulse laser, the induced amorphization reached a plateau of approximately 20% for fluence exceeding 22 J cm -2 . For the femtosecond pulse laser, however, induced amorphization was approximately 17% independent of the laser fluence within the experimental range. These two values can be considered nominally the same within experimental error. For femtosecond laser machining, some effect of the laser polarization on the amount of induced stress and amorphization was also observed

  15. Characterization of a vertically movable gate field effect transistor using a silicon-on-insulator wafer

    Science.gov (United States)

    Song, In-Hyouk; Forfang, William B. D.; Cole, Bryan; You, Byoung Hee

    2014-10-01

    The vertically movable gate field effect transistor (VMGFET) is a FET-based sensing element, whose gate moves in a vertical direction over the channel. A VMGFET gate covers the region between source and drain. A 1 μm thick air layer separates the gate and the substrate of the VMGFET. A novel fabrication process to form a VMGFET using a silicon-on-insulator (SOI) wafer provides minimal internal stress of the gate structure. The enhancement-type n-channel VMGFET is fabricated with the threshold voltage of 2.32 V in steady state. A non-inverting amplifier is designed and integrated on a printable circuit board (PCB) to characterize device sensitivity and mechanical properties. The VMGFET is mechanically coupled to a speaker membrane to apply mechanical vibration. The oscillated drain current of FET are monitored and sampled with NI LabVIEW. The frequency of the output signal correlates with that of the input stimulus. The resonance frequency of the fabricated VMGFET is measured to be 1.11 kHz. The device sensitivity linearly increases by 0.106 mV/g Hz in the range of 150 Hz and 1 kHz.

  16. Characterization of a vertically movable gate field effect transistor using a silicon-on-insulator wafer

    International Nuclear Information System (INIS)

    Song, In-Hyouk; Forfang, William B D; Cole, Bryan; Hee You, Byoung

    2014-01-01

    The vertically movable gate field effect transistor (VMGFET) is a FET-based sensing element, whose gate moves in a vertical direction over the channel. A VMGFET gate covers the region between source and drain. A 1 μm thick air layer separates the gate and the substrate of the VMGFET. A novel fabrication process to form a VMGFET using a silicon-on-insulator (SOI) wafer provides minimal internal stress of the gate structure. The enhancement-type n-channel VMGFET is fabricated with the threshold voltage of 2.32 V in steady state. A non-inverting amplifier is designed and integrated on a printable circuit board (PCB) to characterize device sensitivity and mechanical properties. The VMGFET is mechanically coupled to a speaker membrane to apply mechanical vibration. The oscillated drain current of FET are monitored and sampled with NI LabVIEW. The frequency of the output signal correlates with that of the input stimulus. The resonance frequency of the fabricated VMGFET is measured to be 1.11 kHz. The device sensitivity linearly increases by 0.106 mV/g Hz in the range of 150 Hz and 1 kHz. (paper)

  17. Low-temperature wafer direct bonding of silicon and quartz glass by a two-step wet chemical surface cleaning

    Science.gov (United States)

    Wang, Chenxi; Xu, Jikai; Zeng, Xiaorun; Tian, Yanhong; Wang, Chunqing; Suga, Tadatomo

    2018-02-01

    We demonstrate a facile bonding process for combining silicon and quartz glass wafers by a two-step wet chemical surface cleaning. After a post-annealing at 200 °C, strong bonding interfaces with no defects or microcracks were obtained. On the basis of the detailed surface and bonding interface characterizations, the bonding mechanism was explored and discussed. The amino groups terminated on the cleaned surfaces might contribute to the bonding strength enhancement during the annealing. This cost-effective bonding process has great potentials for silicon- and glass-based heterogeneous integrations without requiring a vacuum system.

  18. Simple, Fast, and Cost-Effective Fabrication of Wafer-Scale Nanohole Arrays on Silicon for Antireflection

    Directory of Open Access Journals (Sweden)

    Di Di

    2014-01-01

    Full Text Available A simple, fast, and cost-effective method was developed in this paper for the high-throughput fabrication of nanohole arrays on silicon (Si, which is utilized for antireflection. Wafer-scale polystyrene (PS monolayer colloidal crystal was developed as templates by spin-coating method. Metallic shadow mask was prepared by lifting off the oxygen etched PS beads from the deposited chromium film. Nanohole arrays were fabricated by Si dry etching. A series of nanohole arrays were fabricated with the similar diameter but with different depth. It is found that the maximum depth of the Si-hole was determined by the diameter of the Cr-mask. The antireflection ability of these Si-hole arrays was investigated. The results show that the reflection decreases with the depth of the Si-hole. The deepest Si-hole arrays show the best antireflection ability (reflection 600 nm, which was about 28 percent of the nonpatterned silicon wafer’s reflection. The proposed method has the potential for high-throughput fabrication of patterned Si wafer, and the low reflectivity allows the application of these wafers in crystalline silicon solar cells.

  19. Simulation of atomistic processes during silicon oxidation

    OpenAIRE

    Bongiorno, Angelo

    2003-01-01

    Silicon dioxide (SiO2) films grown on silicon monocrystal (Si) substrates form the gate oxides in current Si-based microelectronics devices. The understanding at the atomic scale of both the silicon oxidation process and the properties of the Si(100)-SiO2 interface is of significant importance in state-of-the-art silicon microelectronics manufacturing. These two topics are intimately coupled and are both addressed in this theoretical investigation mainly through first-principles calculations....

  20. Method of forming buried oxide layers in silicon

    Science.gov (United States)

    Sadana, Devendra Kumar; Holland, Orin Wayne

    2000-01-01

    A process for forming Silicon-On-Insulator is described incorporating the steps of ion implantation of oxygen into a silicon substrate at elevated temperature, ion implanting oxygen at a temperature below 200.degree. C. at a lower dose to form an amorphous silicon layer, and annealing steps to form a mixture of defective single crystal silicon and polycrystalline silicon or polycrystalline silicon alone and then silicon oxide from the amorphous silicon layer to form a continuous silicon oxide layer below the surface of the silicon substrate to provide an isolated superficial layer of silicon. The invention overcomes the problem of buried isolated islands of silicon oxide forming a discontinuous buried oxide layer.

  1. Photoluminescence and electrical properties of silicon oxide and silicon nitride superlattices containing silicon nanocrystals

    International Nuclear Information System (INIS)

    Shuleiko, D V; Ilin, A S

    2016-01-01

    Photoluminescence and electrical properties of superlattices with thin (1 to 5 nm) alternating silicon-rich silicon oxide or silicon-rich silicon nitride, and silicon oxide or silicon nitride layers containing silicon nanocrystals prepared by plasma-enhanced chemical vapor deposition with subsequent annealing were investigated. The entirely silicon oxide based superlattices demonstrated photoluminescence peak shift due to quantum confinement effect. Electrical measurements showed the hysteresis effect in the vicinity of zero voltage due to structural features of the superlattices from SiOa 93 /Si 3 N 4 and SiN 0 . 8 /Si 3 N 4 layers. The entirely silicon nitride based samples demonstrated resistive switching effect, comprising an abrupt conductivity change at about 5 to 6 V with current-voltage characteristic hysteresis. The samples also demonstrated efficient photoluminescence with maximum at ∼1.4 eV, due to exiton recombination in silicon nanocrystals. (paper)

  2. Passivation mechanism in silicon heterojunction solar cells with intrinsic hydrogenated amorphous silicon oxide layers

    Science.gov (United States)

    Deligiannis, Dimitrios; van Vliet, Jeroen; Vasudevan, Ravi; van Swaaij, René A. C. M. M.; Zeman, Miro

    2017-02-01

    In this work, we use intrinsic hydrogenated amorphous silicon oxide layers (a-SiOx:H) with varying oxygen content (cO) but similar hydrogen content to passivate the crystalline silicon wafers. Using our deposition conditions, we obtain an effective lifetime (τeff) above 5 ms for cO ≤ 6 at. % for passivation layers with a thickness of 36 ± 2 nm. We subsequently reduce the thickness of the layers using an accurate wet etching method to ˜7 nm and deposit p- and n-type doped layers fabricating a device structure. After the deposition of the doped layers, τeff appears to be predominantly determined by the doped layers themselves and is less dependent on the cO of the a-SiOx:H layers. The results suggest that τeff is determined by the field-effect rather than by chemical passivation.

  3. Disposable attenuated total reflection-infrared crystals from silicon wafer: a versatile approach to surface infrared spectroscopy.

    Science.gov (United States)

    Karabudak, Engin; Kas, Recep; Ogieglo, Wojciech; Rafieian, Damon; Schlautmann, Stefan; Lammertink, R G H; Gardeniers, Han J G E; Mul, Guido

    2013-01-02

    Attenuated total reflection-infrared (ATR-IR) spectroscopy is increasingly used to characterize solids and liquids as well as (catalytic) chemical conversion. Here we demonstrate that a piece of silicon wafer cut by a dicing machine or cleaved manually can be used as disposable internal reflection element (IRE) without the need for polishing and laborious edge preparation. Technical aspects, fundamental differences, and pros and cons of these novel disposable IREs and commercial IREs are discussed. The use of a crystal (the Si wafer) in a disposable manner enables simultaneous preparation and analysis of substrates and application of ATR spectroscopy in high temperature processes that may lead to irreversible interaction between the crystal and the substrate. As representative application examples, the disposable IREs were used to study high temperature thermal decomposition and chemical changes of polyvinyl alcohol (PVA) in a titania (TiO(2)) matrix and assemblies of 65-450 nm thick polystyrene (PS) films.

  4. Comparison of cross-sectional transmission electron microscope studies of thin germanium epilayers grown on differently oriented silicon wafers.

    Science.gov (United States)

    Norris, D J; Myronov, M; Leadley, D R; Walther, T

    2017-12-01

    We compare transmission electron microscopical analyses of the onset of islanding in the germanium-on-silicon (Ge/Si) system for three different Si substrate orientations: (001), (11¯0) and (11¯1)Si. The Ge was deposited by reduced pressure chemical vapour deposition and forms islands on the surface of all Si wafers; however, the morphology (aspect ratio) of the deposited islands is different for each type of wafer. Moreover, the mechanism for strain relaxation is different for each type of wafer owing to the different orientation of the (111) slip planes with the growth surface. Ge grown on (001)Si is initially pseudomorphically strained, yielding small, almost symmetrical islands of high aspect ratio (clusters or domes) on top interdiffused SiGe pedestals, without any evidence of plastic relaxation by dislocations, which would nucleate later-on when the islands might have coalesced and then the Matthews-Blakeslee limit is reached. For (11¯0)Si, islands are flatter and more asymmetric, and this is correlated with plastic relaxation of some islands by dislocations. In the case of growth on (11¯1)Si wafers, there is evidence of immediate strain relaxation taking place by numerous dislocations and also twinning. In the case of untwined film/substrate interfaces, Burgers circuits drawn around certain (amorphous-like) regions show a nonclosure with an edge-type a/4[1¯12] Burgers vector component visible in projection along [110]. Microtwins of multiples of half unit cells in thickness have been observed which occur at the growth interface between the Si(11¯1) buffer layer and the overlying Ge material. Models of the growth mechanisms to explain the interfacial configurations of each type of wafer are suggested. © 2017 The Authors Journal of Microscopy © 2017 Royal Microscopical Society.

  5. Launching of multi-project wafer runs in ePIXfab with micron-scale silicon rib waveguide technology

    Science.gov (United States)

    Aalto, Timo; Cherchi, Matteo; Harjanne, Mikko; Ylinen, Sami; Kapulainen, Markku; Vehmas, Tapani

    2014-03-01

    Silicon photonics is a rapidly growing R&D field where universities, institutes and companies are all involved and the business expectations for the next few years are high. One of the key enabling elements that led to the present success of silicon photonics is ePIXfab. It is a consortium of institutes that has together offered multi-project wafer (MPW) runs, packaging services, training, and feasibility studies. These services have significantly lowered the barrier of various research groups and companies to start developing silicon photonics. Until now the MPW services have been offered by the ePIXfab partners IMEC, CEA-Leti and IHP, which all use CMOS-type silicon photonics technology with a typical silicon-on-insulator (SOI) waveguide thickness of 220 nm. In November 2013 this MPW offering was expanded by the ePIXfab partner VTT that opened the access to its 3 μm SOI waveguide platform via ePIXfab MPW runs. This technology platform is complementary to the mainstream silicon photonics technology (220 nm) and it offers such benefits as very low losses, small polarization dependency, ultrabroadband operation and low starting costs

  6. Synthesis of thermoresponsive poly(N-isopropylacrylamide) brush on silicon wafer surface via atom transfer radical polymerization

    Energy Technology Data Exchange (ETDEWEB)

    Turan, Eylem; Demirci, Serkan [Department of Chemistry, Faculty of Art and Science, Gazi University, 06500 Besevler, Ankara (Turkey); Caykara, Tuncer, E-mail: caykara@gazi.edu.t [Department of Chemistry, Faculty of Art and Science, Gazi University, 06500 Besevler, Ankara (Turkey)

    2010-08-31

    Thermoresponsive poly(N-isopropylacrylamide) [poly(NIPAM)] brush on silicon wafer surface was prepared by combining the self-assembled monolayer of initiator and atom transfer radical polymerization (ATRP). The resulting polymer brush was characterized by in situ reflectance Fourier transform infrared spectroscopy, atomic force microscopy and ellipsometry techniques. Gel permeation chromatography determination of the number-average molecular weight and polydispersity index of the brush detached from the silicon wafer surface suggested that the surface-initiated ATRP method can provide relatively homogeneous polymer brush. Contact angle measurements exhibited a two-stage increase upon heating over the board temperature range 25-45 {sup o}C, which is in contrast to the fact that free poly(NIPAM) homopolymer in aqueous solution exhibits a phase transition at ca. 34 {sup o}C within a narrow temperature range. The first de-wetting transition takes place at 27 {sup o}C, which can be tentatively attributed to the n-cluster induced collapse of the inner region of poly(NIPAM) brush close to the silicon surface; the second de-wetting transition occurs at 38 {sup o}C, which can be attributed to the outer region of poly(NIPAM) brush, possessing much lower chain density compared to that of the inner part.

  7. A simple chemical method for the separation of phosphorus interfering the trace element determinations by neutron activation analysis in high doped silicon wafers

    International Nuclear Information System (INIS)

    Wagler, H.; Flachowsky, J.

    1986-01-01

    Neutron activation analysis is one of the most available method for the determination of trace elements, but in the case of P-doped silicon wafers the 32 P-activity interferes the gamma spectrometry. It is not possible to determine the trace elements without chemical manipulations. On the other hand, time consuming chemical separations should be avoided. Therefore, a simple and rapid P-separation method has to be developed, in which the following twelve trace elements should be taken into consideration: Ag, As, Au, Co, Cr, Cu, Fe, Mo, Na, Sb, W, and Zn. After acid oxidative dissolution of the activated sample, P is present as phosphate ion. The phosphate ion is removed by precipitation as BiPO 4 . (author)

  8. Development of thin film measurement program of wafer for spin etcher

    International Nuclear Information System (INIS)

    Seo, Hak Suk; Kim, No Hyu; Kim, Young Chul; Cho, Jung Keun; Bae, Jung Yong

    2001-01-01

    This paper proposes a thickness measurement method of silicon-oxide and poly-silicon film deposited on 12 inch silicon wafer for spin etcher. Krypton lamp is used as a light source for generating a wide-band spectrum, which is guided and focused on the wafer surface through a optical fiber cable. Interference signal from the film is detected by optical sensor to determine the thickness of the film using spectrum analysis and several signal processing techniques including curve-fitting and filtering. Test wafers with two kinds of priori-known films, silicon-oxide(100nm) and poly-silicon(300nm), are measured under the condition that the wafer is spinning at 20Hz and DI water flowing on the wafer surface. From experiment results the algorithm presented in the paper is proved to be effective with accuracy of maximum 6.5% error.

  9. Development of thin film measurement program of wafer for spin etcher

    Energy Technology Data Exchange (ETDEWEB)

    Seo, Hak Suk; Kim, No Hyu; Kim, Young Chul [Korea University of Technology and Education, Cheonan (Korea, Republic of); Cho, Jung Keun; Bae, Jung Yong [Korea DNS, Cheonan (Korea, Republic of)

    2001-11-15

    This paper proposes a thickness measurement method of silicon-oxide and poly-silicon film deposited on 12 inch silicon wafer for spin etcher. Krypton lamp is used as a light source for generating a wide-band spectrum, which is guided and focused on the wafer surface through a optical fiber cable. Interference signal from the film is detected by optical sensor to determine the thickness of the film using spectrum analysis and several signal processing techniques including curve-fitting and filtering. Test wafers with two kinds of priori-known films, silicon-oxide(100nm) and poly-silicon(300nm), are measured under the condition that the wafer is spinning at 20Hz and DI water flowing on the wafer surface. From experiment results the algorithm presented in the paper is proved to be effective with accuracy of maximum 6.5% error.

  10. Fluorescence and thermoluminescence in silicon oxide films rich in silicon

    International Nuclear Information System (INIS)

    Berman M, D.; Piters, T. M.; Aceves M, M.; Berriel V, L. R.; Luna L, J. A.

    2009-10-01

    In this work we determined the fluorescence and thermoluminescence (TL) creation spectra of silicon rich oxide films (SRO) with three different silicon excesses. To study the TL of SRO, 550 nm of SRO film were deposited by Low Pressure Chemical Vapor Deposition technique on N-type silicon substrates with resistivity in the order of 3 to 5 Ω-cm with silicon excess controlled by the ratio of the gases used in the process, SRO films with Ro= 10, 20 and 30 (12-6% silicon excess) were obtained. Then, they were thermally treated in N 2 at high temperatures to diffuse and homogenize the silicon excess. In the fluorescence spectra two main emission regions are observed, one around 400 nm and one around 800 nm. TL creation spectra were determined by plotting the integrated TL intensity as function of the excitation wavelength. (Author)

  11. A model for the formation of lattice defects at silicon oxide precipitates in silicon

    International Nuclear Information System (INIS)

    Vanhellemont, J.; Gryse, O. de; Clauws, P.

    2003-01-01

    The critical size of silicon oxide precipitates and the formation of lattice defects by the precipitates are discussed. An expression is derived allowing estimation of self-interstitial emission by spherical precipitates as well as strain build-up during precipitate growth. The predictions are compared with published experimental data. A model for stacking fault nucleation at oxide precipitates is developed based on strain and self-interstitial accumulation during the thermal history of the wafer. During a low-temperature treatment high levels of strain develop. During subsequent high-temperature treatment, excess strain energy in the precipitate is released by self-interstitial emission leading to favourable conditions for stacking fault nucleation

  12. The effect of oxidation on physical properties of porous silicon layers for optical applications

    Energy Technology Data Exchange (ETDEWEB)

    Pirasteh, Parasteh [Laboratoire d' Optronique, CNRS-UMR FOTON 6082, Universite de Rennes 1, ENSSAT Tecnhopole Anticipa, 6 rue de Kerampont, BP 447, 22305 Lannion Cedex (France); Charrier, Joel [Laboratoire d' Optronique, CNRS-UMR FOTON 6082, Universite de Rennes 1, ENSSAT Tecnhopole Anticipa, 6 rue de Kerampont, BP 447, 22305 Lannion Cedex (France)]. E-mail: joel.charrier@univ-rennes1.fr; Soltani, Ali [Institut d' Electronique, de Microemectronique et de Nanotechnologie, CNRS-UMR 8520, Cite Scientifique Avenue Poincare, BP 69, 59652 Villeneuve d' Ascq Cedex (France); Haesaert, Severine [Laboratoire d' Optronique, CNRS-UMR FOTON 6082, Universite de Rennes 1, ENSSAT Tecnhopole Anticipa, 6 rue de Kerampont, BP 447, 22305 Lannion Cedex (France); Haji, Lazhar [Laboratoire d' Optronique, CNRS-UMR FOTON 6082, Universite de Rennes 1, ENSSAT Tecnhopole Anticipa, 6 rue de Kerampont, BP 447, 22305 Lannion Cedex (France); Godon, Christine [Laboratoire de Physique Crystalline, Institut des Materiaux Jean Rouxel, 44322 Nantes Cedex 3 (France); Errien, Nicolas [Laboratoire de Physique Crystalline, Institut des Materiaux Jean Rouxel, 44322 Nantes Cedex 3 (France)

    2006-12-15

    In order to understand the optical loss mechanisms in porous silicon based waveguides, structural and optical studies have been performed. Scanning and transmission electron microscopic observations of porous silicon layers are obtained before and after an oxidation process at high temperature in wet O{sub 2}. Pore size and shape of heavily p-type doped Si wafers are estimated and correlated to the optical properties of the material before and after oxidation. The refractive index was measured and compared to that determined by the Bruggeman model.

  13. Wafer-Level Membrane-Transfer Process for Fabricating MEMS

    Science.gov (United States)

    Yang, Eui-Hyeok; Wiberg, Dean

    2003-01-01

    A process for transferring an entire wafer-level micromachined silicon structure for mating with and bonding to another such structure has been devised. This process is intended especially for use in wafer-level integration of microelectromechanical systems (MEMS) that have been fabricated on dissimilar substrates. Unlike in some older membrane-transfer processes, there is no use of wax or epoxy during transfer. In this process, the substrate of a wafer-level structure to be transferred serves as a carrier, and is etched away once the transfer has been completed. Another important feature of this process is that two electrodes constitutes an electrostatic actuator array. An SOI wafer and a silicon wafer (see Figure 1) are used as the carrier and electrode wafers, respectively. After oxidation, both wafers are patterned and etched to define a corrugation profile and electrode array, respectively. The polysilicon layer is deposited on the SOI wafer. The carrier wafer is bonded to the electrode wafer by using evaporated indium bumps. The piston pressure of 4 kPa is applied at 156 C in a vacuum chamber to provide hermetic sealing. The substrate of the SOI wafer is etched in a 25 weight percent TMAH bath at 80 C. The exposed buried oxide is then removed by using 49 percent HF droplets after an oxygen plasma ashing. The SOI top silicon layer is etched away by using an SF6 plasma to define the corrugation profile, followed by the HF droplet etching of the remaining oxide. The SF6 plasma with a shadow mask selectively etches the polysilicon membrane, if the transferred membrane structure needs to be patterned. Electrostatic actuators with various electrode gaps have been fabricated by this transfer technique. The gap between the transferred membrane and electrode substrate is very uniform ( 0.1 m across a wafer diameter of 100 mm, provided by optimizing the bonding control). Figure 2 depicts the finished product.

  14. Wiping frictional properties of electrospun hydrophobic/hydrophilic polyurethane nanofiber-webs on soda-lime glass and silicon-wafer.

    Science.gov (United States)

    Watanabe, Kei; Wei, Kai; Nakashima, Ryu; Kim, Ick Soo; Enomoto, Yuji

    2013-04-01

    In the present work, we conducted the frictional tests of hydrophobic and hydrophilic polyurethane (PUo and PUi) nanofiber webs against engineering materials; soda-lime glass and silicon wafer. PUi/glass combination, with highest hydrophilicity, showed the highest friction coefficient which decrease with the increase of the applied load. Furthermore, the effects of fluorine coating are also investigated. The friction coefficient of fluorine coated hydrophobic PU nanofiber (PUof) shows great decrease against the silicon wafer. Finally, wiping ability and friction property are investigated when the substrate surface is contaminated. Nano-particle dusts are effectively collected into the pores by wiping with PUo and PUi nanofiber webs both on glass and silicon wafer. The friction coefficient gradually increased with the increase of the applied load.

  15. Terahertz transmission properties of silicon wafers using continuous-wave terahertz spectroscopy

    Science.gov (United States)

    Kim, Chihoon; Ahn, Jae Sung; Ji, Taeksoo; Eom, Joo Beom

    2017-04-01

    We present the spectral properties of Si wafers using continuous-wave terahertz (CW-THz) spectroscopy. By using a tunable laser source and a fixed distributed-feedback laser diode (DFB-LD), a stably tunable beat source for CW-THz spectroscopy system can be implemented. THz radiation is generated in the frequency range of 100 GHz-800 GHz by photomixing in a photoconductive antenna. We also measured CW-THz waveforms by changing the beat frequency and confirmed repeatability through repeated measurement. We calculated the peaks of the THz frequency by taking fast Fourier transforms (FFTs) of measured THz waveforms. The feasibility of CW-THz spectroscopy is demonstrated by the THz spectra of Si wafers with different resistivities, mobilities, and carrier concentrations. The results show that Si wafers with a lower resistivity absorb more THz waves. Thus, we expect our CW-THz system to have the advantage of being able to perform fast non-destructive analysis.

  16. Terahertz transmission properties of silicon wafers using continuous-wave terahertz spectroscopy

    International Nuclear Information System (INIS)

    Kim, Chihoon; Ahn, Jae Sung; Eom, Joo Beom; Ji, Taeksoo

    2017-01-01

    We present the spectral properties of Si wafers using continuous-wave terahertz (CW-THz) spectroscopy. By using a tunable laser source and a fixed distributed-feedback laser diode (DFB-LD), a stably tunable beat source for CW-THz spectroscopy system can be implemented. THz radiation is generated in the frequency range of 100 GHz–800 GHz by photomixing in a photoconductive antenna. We also measured CW-THz waveforms by changing the beat frequency and confirmed repeatability through repeated measurement. We calculated the peaks of the THz frequency by taking fast Fourier transforms (FFTs) of measured THz waveforms. The feasibility of CW-THz spectroscopy is demonstrated by the THz spectra of Si wafers with different resistivities, mobilities, and carrier concentrations. The results show that Si wafers with a lower resistivity absorb more THz waves. Thus, we expect our CW-THz system to have the advantage of being able to perform fast non-destructive analysis. (paper)

  17. Methods for characterization of wafer-level encapsulation applied on silicon to LTCC anodic bonding

    International Nuclear Information System (INIS)

    Khan, M F; Ghavanini, F A; Enoksson, P; Haasl, S; Löfgren, L; Persson, K; Rusu, C; Schjølberg-Henriksen, K

    2010-01-01

    This paper presents initial results on generic characterization methods for wafer-level encapsulation. The methods, developed specifically to evaluate anodic bonding of low-temperature cofired ceramics (LTCC) to Si, are generally applicable to wafer-level encapsulation. Different microelectromechanical system (MEMS) structures positioned over the whole wafer provide local information about the bond quality. The structures include (i) resonating cantilevers as pressure sensors for bond hermeticity, (ii) resonating bridges as stress sensors for measuring the stress induced by the bonding and (iii) frames/mesas for pull tests. These MEMS structures have been designed, fabricated and characterized indicating that local information can easily be obtained. Buried electrodes to enable localized bonding have been implemented and their effectiveness is indicated from first results of the novel Si to LTCC anodic bonding.

  18. Preparation of freestanding GaN wafer by hydride vapor phase epitaxy on porous silicon

    Science.gov (United States)

    Wu, Xian; Li, Peng; Liang, Renrong; Xiao, Lei; Xu, Jun; Wang, Jing

    2018-05-01

    A freestanding GaN wafer was prepared on porous Si (111) substrate using hydride vapor phase epitaxy (HVPE). To avoid undesirable effects of the porous surface on the crystallinity of the GaN, a GaN seed layer was first grown on the Si (111) bare wafer. A pattern with many apertures was fabricated in the GaN seed layer using lithography and etching processes. A porous layer was formed in the Si substrate immediately adjacent to the GaN seed layer by an anodic etching process. A 500-μm-thick GaN film was then grown on the patterned GaN seed layer using HVPE. The GaN film was separated from the Si substrate through the formation of cracks in the porous layer caused by thermal mismatch stress during the cooling stage of the HVPE. Finally, the GaN film was polished to obtain a freestanding GaN wafer.

  19. Interfacial Characteristics of TiN Coatings on SUS304 and Silicon Wafer Substrates with Pulsed Laser Thermal Shock

    International Nuclear Information System (INIS)

    Seo, Nokun; Jeon, Seol; Choi, Youngkue; Shin, Hyun-Gyoo; Lee, Heesoo; Jeon, Min-Seok

    2014-01-01

    TiN coatings prepared on different substrates that had different coefficients of thermal expansion were subjected to pulsed laser thermal shock and observed by using FIB milling to compare the deterioration behaviors. TiN coating on SUS304, which had a larger CTE (⁓17.3 × 10 - 6 /℃) than the coating was degraded with pores and cracks on the surface and showed significant spalling of the coating layer over a certain laser pulses. TiN coating on silicon wafer with a smaller CTE value, ⁓4.2 × 10‒6 /℃, than the coating exhibited less degradation of the coating layer at the same ablation condition. Cracks propagated at the interface were observed in the coating on the silicon wafer, which induced a compressive stress to the coating. The coating on the SUS304 showed less interface cracks while the tensile stress was applied to the coating. Delamination of the coating layer related to the intercolumnar cracks at the interface was observed in both coatings through bright-field TEM analysis.

  20. Vapor phase treatment–total reflection X-ray fluorescence for trace elemental analysis of silicon wafer surface

    International Nuclear Information System (INIS)

    Takahara, Hikari; Mori, Yoshihiro; Shibata, Harumi; Shimazaki, Ayako; Shabani, Mohammad B.; Yamagami, Motoyuki; Yabumoto, Norikuni; Nishihagi, Kazuo; Gohshi, Yohichi

    2013-01-01

    Vapor phase treatment (VPT) was under investigation by the International Organization for Standardization/Technical Committee 201/Working Group 2 (ISO/TC201/WG2) to improve the detection limit of total reflection X-ray fluorescence spectroscopy (TXRF) for trace metal analysis of silicon wafers. Round robin test results have confirmed that TXRF intensity increased by VPT for intentional contamination with 5 × 10 9 and 5 × 10 10 atoms/cm 2 Fe and Ni. The magnification of intensity enhancement varied greatly (1.2–4.7 in VPT factor) among the participating laboratories, though reproducible results could be obtained for average of mapping measurement. SEM observation results showed that various features, sizes, and surface densities of particles formed on the wafer after VPT. The particle morphology seems to have some impact on the VPT efficiency. High resolution SEM observation revealed that a certain number of dots with SiO 2 , silicate and/or carbon gathered to form a particle and heavy metals, Ni and Fe in this study were segregated on it. The amount and shape of the residue should be important to control VPT factor. - Highlights: • This paper presents a summary of study results of VPT–TXRF using ISO/TC201/WG2. • Our goal is to analyze the trace metallic contamination on silicon wafer with concentrations below 1 × 10 10 atoms/cm 2 . • The efficiency and mechanism of VPT are discussed under several round robin tests and systematic studies

  1. Development of low cost silicon solar cells by reusing the silicon saw dust collected during wafering process

    International Nuclear Information System (INIS)

    Zaidi, Z.I.; Raza, B.; Ahmed, M.; Sheikh, H.; Qazi, I.A.

    2002-01-01

    Silicon material due to its abundance in nature and maximum conversion efficiency has been successfully being used for the fabrication of electronic and photovoltaic devices such as ICs, diodes, transistors and solar cells. The 80% of the semiconductor industry is ruled by silicon material. Single crystal silicon solar cells are in use for both space and terrestrial application, due to the well developed technology and better efficiency than polycrystalline and amorphous silicon solar cells. The current research work is an attempt to reduce the cost of single crystal silicon solar cells by reusing the silicon saw dust obtained during the watering process. During the watering process about 45% Si material is wasted in the form of Si powder dust. Various waste powder silicon samples were analyzed using inductively Coupled Plasma (ICP) technique, for metallic impurities critical for solar grade silicon material. The results were evaluated from impurity and cost point of view. (author)

  2. Formation of porous silicon oxide from substrate-bound silicon rich silicon oxide layers by continuous-wave laser irradiation

    Science.gov (United States)

    Wang, Nan; Fricke-Begemann, Th.; Peretzki, P.; Ihlemann, J.; Seibt, M.

    2018-03-01

    Silicon nanocrystals embedded in silicon oxide that show room temperature photoluminescence (PL) have great potential in silicon light emission applications. Nanocrystalline silicon particle formation by laser irradiation has the unique advantage of spatially controlled heating, which is compatible with modern silicon micro-fabrication technology. In this paper, we employ continuous wave laser irradiation to decompose substrate-bound silicon-rich silicon oxide films into crystalline silicon particles and silicon dioxide. The resulting microstructure is studied using transmission electron microscopy techniques with considerable emphasis on the formation and properties of laser damaged regions which typically quench room temperature PL from the nanoparticles. It is shown that such regions consist of an amorphous matrix with a composition similar to silicon dioxide which contains some nanometric silicon particles in addition to pores. A mechanism referred to as "selective silicon ablation" is proposed which consistently explains the experimental observations. Implications for the damage-free laser decomposition of silicon-rich silicon oxides and also for controlled production of porous silicon dioxide films are discussed.

  3. Iridium-coated micropore x-ray optics using dry etching of a silicon wafer and atomic layer deposition.

    Science.gov (United States)

    Ogawa, Tomohiro; Ezoe, Yuichiro; Moriyama, Teppei; Mitsuishi, Ikuyuki; Kakiuchi, Takuya; Ohashi, Takaya; Mitsuda, Kazuhisa; Putkonen, Matti

    2013-08-20

    To enhance x-ray reflectivity of silicon micropore optics using dry etching of silicon (111) wafers, iridium coating is tested by use of atomic layer deposition. An iridium layer is successfully formed on sidewalls of tiny micropores with a pore width of 20 μm and depth of 300 μm. The film thickness is ∼20  nm. An enhanced x-ray reflectivity compared to that of silicon is confirmed at Ti Kα 4.51 keV, for what we believe to be the first time, with this type of optics. Some discrepancies from a theoretical reflectivity curve of iridium-coated silicon are noticed at small incident angles <1.3°. When a geometrical shadowing effect due to occultation by a ridge existing on the sidewalls is taken into account, the observed reflectivity becomes well represented by the modified theoretical curve. An estimated surface micro roughness of ∼1  nm rms is consistent with atomic force microscope measurements of the sidewalls.

  4. Sidewall patterning - A new wafer-scale method for accurate patterning of vertical silicon structures

    NARCIS (Netherlands)

    Westerik, P. J.; Vijselaar, W. J.C.; Berenschot, J. W.; Tas, N. R.; Huskens, J.; Gardeniers, J. G.E.

    2018-01-01

    For the definition of wafer scale micro- and nanostructures, in-plane geometry is usually controlled by optical lithography. However, options for precisely patterning structures in the out-of-plane direction are much more limited. In this paper we present a versatile self-aligned technique that

  5. Fabrication of a silicon oxide stamp by edge lithography reinforced with silicon nitride for nanoimprint lithography

    NARCIS (Netherlands)

    Zhao, Yiping; Berenschot, Johan W.; de Boer, M.; de Boer, Meint J.; Jansen, Henricus V.; Tas, Niels Roelof; Huskens, Jurriaan; Elwenspoek, Michael Curt

    2008-01-01

    The fabrication of a stamp reinforced with silicon nitride is presented for its use in nanoimprint lithography. The fabrication process is based on edge lithography using conventional optical lithography and wet anisotropic etching of 110 silicon wafers. SiO2 nano-ridges of 20 nm in width were

  6. Subsurface oxidation for micropatterning silicon (SOMS).

    Science.gov (United States)

    Zhang, Feng; Sautter, Ken; Davis, Robert C; Linford, Matthew R

    2009-02-03

    Here we present a straightforward patterning technique for silicon: subsurface oxidation for micropatterning silicon (SOMS). In this method, a stencil mask is placed above a silicon surface. Radio-frequency plasma oxidation of the substrate creates a pattern of thicker oxide in the exposed regions. Etching with HF or KOH produces very shallow or much higher aspect ratio features on silicon, respectively, where patterning is confirmed by atomic force microscopy, scanning electron microscopy, and optical microscopy. The oxidation process itself is studied under a variety of reaction conditions, including higher and lower oxygen pressures (2 and 0.5 Torr), a variety of powers (50-400 W), different times and as a function of reagent purity (99.5 or 99.994% oxygen). SOMS can be easily executed in any normal chemistry laboratory with a plasma generator. Because of its simplicity, it may have industrial viability.

  7. Analysis and optimization of silicon wafers wire sawing; Analyse et optimisation du procede de decoupe de plaques de silicium

    Energy Technology Data Exchange (ETDEWEB)

    Rouault de Coligny, P.

    2002-09-15

    This work has been done at the Centre de Mise en Forme des Materiaux and supported by the Agence de l'Environnement et la Maitrise de l'Energie and Photowatt International SA. It concerns one of the stages of the production of photovoltaic solar cells: the cutting of multi-crystalline silicon wafers by wire sawing. A review of the literature combined with the observation of rough wafers shows that wire sawing involves 3-body abrasion and that material removal is achieved in a ductile manner and forms micro-chips. Therefore, the depth of indentation which is necessary for the ductile-fragile transition as shown by the review of the literature is not reached. The resulting abrasion can be described thanks to Archard's Law. The subsurface damage is 2.5 {mu}m deep. A thermal study has shown that the temperature of the cutting is no higher than about 50 deg. C and that it depends on how much heat can be evacuated by the wire. Analyzing the flaws of the wafers has enabled us to identify their origins and to find solutions. The study of the wire's wear has proved that its diameter can be reduced only if the wire is drawn continuously. Energy can be saved at various stages, the surface of the wafers can be improved, these three arguments plead for the suppression of the back and forth. A tribological device has been set up which allows us to study the abrasion of silicon in the same conditions as in the wire sawing. A mechanical model linking the bending of the wire to the parameters collected during the wire sawing process can predict how high the wire web will be in the transitional and permanent regimes, the contact pressure and the wire wear. Material removal by plane strain scratch tests has been numerically simulated. The orders of magnitude of wear coefficients are identical to those deduced from tribological simulations and to those measured on the saws. This approach has opened new prospects which will improve the process by optimizing the

  8. Effect of porous silicon layer on the performance of Si/oxide photovoltaic and photoelectrochemical cells

    International Nuclear Information System (INIS)

    Badawy, Waheed A.

    2008-01-01

    Photovoltaic and photoelectrochemical systems were prepared by the formation of a thin porous film on silicon. The porous silicon layer was formed on the top of a clean oxide free silicon wafer surface by anodic etching in HF/H 2 O/C 2 H 5 OH mixture (2:1:1). The silicon was then covered by an oxide film (tin oxide, ITO or titanium oxide). The oxide films were prepared by the spray/pyrolysis technique which enables doping of the oxide film by different atoms like In, Ru or Sb during the spray process. Doping of SnO 2 or TiO 2 films with Ru atoms improves the surface characteristics of the oxide film which improves the solar conversion efficiency. The prepared solar cells are stable against environmental attack due to the presence of the stable oxide film. It gives relatively high short circuit currents (I sc ), due to the presence of the porous silicon layer, which leads to the recorded high conversion efficiency. Although the open-circuit potential (V oc ) and fill factor (FF) were not affected by the thickness of the porous silicon film, the short circuit current was found to be sensitive to this thickness. An optimum thickness of the porous film and also the oxide layer is required to optimize the solar cell efficiency. The results represent a promising system for the application of porous silicon layers in solar energy converters. The use of porous silicon instead of silicon single crystals in solar cell fabrication and the optimization of the solar conversion efficiency will lead to the reduction of the cost as an important factor and also the increase of the solar cell efficiency making use of the large area of the porous structures

  9. Enhancing the far-ultraviolet sensitivity of silicon complementary metal oxide semiconductor imaging arrays

    Science.gov (United States)

    Retherford, Kurt D.; Bai, Yibin; Ryu, Kevin K.; Gregory, James A.; Welander, Paul B.; Davis, Michael W.; Greathouse, Thomas K.; Winters, Gregory S.; Suntharalingam, Vyshnavi; Beletic, James W.

    2015-10-01

    We report our progress toward optimizing backside-illuminated silicon P-type intrinsic N-type complementary metal oxide semiconductor devices developed by Teledyne Imaging Sensors (TIS) for far-ultraviolet (UV) planetary science applications. This project was motivated by initial measurements at Southwest Research Institute of the far-UV responsivity of backside-illuminated silicon PIN photodiode test structures, which revealed a promising QE in the 100 to 200 nm range. Our effort to advance the capabilities of thinned silicon wafers capitalizes on recent innovations in molecular beam epitaxy (MBE) doping processes. Key achievements to date include the following: (1) representative silicon test wafers were fabricated by TIS, and set up for MBE processing at MIT Lincoln Laboratory; (2) preliminary far-UV detector QE simulation runs were completed to aid MBE layer design; (3) detector fabrication was completed through the pre-MBE step; and (4) initial testing of the MBE doping process was performed on monitoring wafers, with detailed quality assessments.

  10. A Reuse Evaluation for Solar-Cell Silicon Wafers via Shift Revolution and Tool Rotation Using Magnetic Assistance in Ultrasonic Electrochemical Micromachining

    Directory of Open Access Journals (Sweden)

    P. S. Pa

    2013-01-01

    Full Text Available A new reuse fabrication using a tool module with rotation and revolution through a process of magnetic assistance in ultrasonic electrochemical micromachining (UEMM for removal of the surface layers from silicon wafers of solar cells is demonstrated. The target of the proposed reuse fabrication method is to replace the current approach, which uses strong acid and grinding and may damage the physical structure of silicon wafers and pollute to the environment. A precisely engineered clean production approach to removal of surface microstructure layers from silicon wafers is to develop a mass production system for recycling defective or discarded silicon wafers of solar cells that can reduce pollution and cost. The high revolution speed of the shift with the high rotation speed of the designed tool increases the discharge mobility and improves the removal effect associated with the high feed rate of the workpiece. High frequency and high power of ultrasonic with large electrolyte flow rate and high magnetic strengths with a small distance between the two magnets provide a large discharge effect and good removal; only a short period of time is required to remove the epoxy film and Si3N4 layer easily and cleanly.

  11. An optical MEMS accelerometer fabricated using double-sided deep reactive ion etching on silicon-on-insulator wafer

    Science.gov (United States)

    Teo, Adrian J. T.; Li, Holden; Tan, Say Hwa; Yoon, Yong-Jin

    2017-06-01

    Optical MEMS devices provide fast detection, electromagnetic resilience and high sensitivity. Using this technology, an optical gratings based accelerometer design concept was developed for seismic motion detection purposes that provides miniaturization, high manufacturability, low costs and high sensitivity. Detailed in-house fabrication procedures of a double-sided deep reactive ion etching (DRIE) on a silicon-on-insulator (SOI) wafer for a micro opto electro mechanical system (MOEMS) device are presented and discussed. Experimental results obtained show that the conceptual device successfully captured motion similar to a commercial accelerometer with an average sensitivity of 13.6 mV G-1, and a highest recorded sensitivity of 44.1 mV G-1. A noise level of 13.5 mV was detected due to experimental setup limitations. This is the first MOEMS accelerometer developed using double-sided DRIE on SOI wafer for the application of seismic motion detection, and is a breakthrough technology platform to open up options for lower cost MOEMS devices.

  12. An optical MEMS accelerometer fabricated using double-sided deep reactive ion etching on silicon-on-insulator wafer

    International Nuclear Information System (INIS)

    Teo, Adrian J T; Li, Holden; Yoon, Yong-Jin; Tan, Say Hwa

    2017-01-01

    Optical MEMS devices provide fast detection, electromagnetic resilience and high sensitivity. Using this technology, an optical gratings based accelerometer design concept was developed for seismic motion detection purposes that provides miniaturization, high manufacturability, low costs and high sensitivity. Detailed in-house fabrication procedures of a double-sided deep reactive ion etching (DRIE) on a silicon-on-insulator (SOI) wafer for a micro opto electro mechanical system (MOEMS) device are presented and discussed. Experimental results obtained show that the conceptual device successfully captured motion similar to a commercial accelerometer with an average sensitivity of 13.6 mV G −1 , and a highest recorded sensitivity of 44.1 mV G −1 . A noise level of 13.5 mV was detected due to experimental setup limitations. This is the first MOEMS accelerometer developed using double-sided DRIE on SOI wafer for the application of seismic motion detection, and is a breakthrough technology platform to open up options for lower cost MOEMS devices. (technical note)

  13. Ion-implanted capacitively coupled silicon strip detectors with integrated polysilicon bias resistors processed on a 100 mm wafer

    International Nuclear Information System (INIS)

    Hietanen, I.; Lindgren, J.; Orava, R.; Tuuva, T.; Voutilainen, M.; Brenner, R.; Andersson, M.; Leinonen, K.; Ronkainen, H.

    1991-01-01

    Double-sided silicon strip detectors with integrated coupling capacitors and polysilicon resistors have been processed on a 100 mm wafer. A detector with an active area of 19x19 mm 2 was connected to LSI readout electronics and tested. The strip pitch of the detector is 25 μm on the p-side and 50 μm on the n-side. The readout pitch is 50 μm on both sides. The number of readout strips is 774 and the total number of strips is 1161. On the p-side a signal-to-noise of 35 has been measured using a 90 Sr β-source. The n-side has been studied using a laser. (orig.)

  14. High-density oxidized porous silicon

    International Nuclear Information System (INIS)

    Gharbi, Ahmed; Souifi, Abdelkader; Remaki, Boudjemaa; Halimaoui, Aomar; Bensahel, Daniel

    2012-01-01

    We have studied oxidized porous silicon (OPS) properties using Fourier transform infraRed (FTIR) spectroscopy and capacitance–voltage C–V measurements. We report the first experimental determination of the optimum porosity allowing the elaboration of high-density OPS insulators. This is an important contribution to the research of thick integrated electrical insulators on porous silicon based on an optimized process ensuring dielectric quality (complete oxidation) and mechanical and chemical reliability (no residual pores or silicon crystallites). Through the measurement of the refractive indexes of the porous silicon (PS) layer before and after oxidation, one can determine the structural composition of the OPS material in silicon, air and silica. We have experimentally demonstrated that a porosity approaching 56% of the as-prepared PS layer is required to ensure a complete oxidation of PS without residual silicon crystallites and with minimum porosity. The effective dielectric constant values of OPS materials determined from capacitance–voltage C–V measurements are discussed and compared to FTIR results predictions. (paper)

  15. Broadband dielectric spectroscopy of oxidized porous silicon

    International Nuclear Information System (INIS)

    Axelrod, Ekaterina; Urbach, Benayahu; Sa'ar, Amir; Feldman, Yuri

    2006-01-01

    Dielectric measurements accompanied by infrared absorption and photoluminescence (PL) spectroscopy were used to investigate the electrical and optical properties of oxidized porous silicon (PS). As opposed to non-oxidized PS, only high temperature relaxation processes could be resolved for oxidized PS. Two relaxation processes have been observed. The first process is related to dc-conductivity that dominates at high temperatures and low frequencies. After subtraction of dc-conductivity we could analyse a second high-temperature relaxation process that is related to interface polarization induced by charge carriers trapped at the host matrix-pore interfaces. We found that, while the main effect of the oxidation on the PL appears to be a size reduction in the silicon nanocrystals that gives rise to a blue shift of the PL spectrum, its main contribution to the dielectric properties turns out to be blocking of transport channels in the host tissue and activation of hopping conductivity between silicon nanocrystals

  16. Broadband dielectric spectroscopy of oxidized porous silicon

    Energy Technology Data Exchange (ETDEWEB)

    Axelrod, Ekaterina [Department of Applied Physics, Hebrew University of Jerusalem, Jerusalem, 91904 (Israel); Urbach, Benayahu [Racah Institute of Physics and the Center for Nanoscience and Nanotechnology, Hebrew University of Jerusalem, Jerusalem, 91904 (Israel); Sa' ar, Amir [Racah Institute of Physics and the Center for Nanoscience and Nanotechnology, Hebrew University of Jerusalem, Jerusalem, 91904 (Israel); Feldman, Yuri [Department of Applied Physics, Hebrew University of Jerusalem, Jerusalem, 91904 (Israel)

    2006-04-07

    Dielectric measurements accompanied by infrared absorption and photoluminescence (PL) spectroscopy were used to investigate the electrical and optical properties of oxidized porous silicon (PS). As opposed to non-oxidized PS, only high temperature relaxation processes could be resolved for oxidized PS. Two relaxation processes have been observed. The first process is related to dc-conductivity that dominates at high temperatures and low frequencies. After subtraction of dc-conductivity we could analyse a second high-temperature relaxation process that is related to interface polarization induced by charge carriers trapped at the host matrix-pore interfaces. We found that, while the main effect of the oxidation on the PL appears to be a size reduction in the silicon nanocrystals that gives rise to a blue shift of the PL spectrum, its main contribution to the dielectric properties turns out to be blocking of transport channels in the host tissue and activation of hopping conductivity between silicon nanocrystals.

  17. Thermal Oxidation of Structured Silicon Dioxide

    DEFF Research Database (Denmark)

    Christiansen, Thomas Lehrmann; Hansen, Ole; Jensen, Jørgen Arendt

    2014-01-01

    The topography of thermally oxidized, structured silicon dioxide is investigated through simulations, atomic force microscopy, and a proposed analytical model. A 357 nm thick oxide is structured by removing regions of the oxide in a masked etch with either reactive ion etching or hydrofluoric acid....... Subsequent thermal oxidation is performed in both dry and wet ambients in the temperature range 950◦C to 1100◦C growing a 205 ± 12 nm thick oxide in the etched mask windows. Lifting of the original oxide near the edge of the mask in the range 6 nm to 37 nm is seen with increased lifting for increasing...

  18. III-V/Si wafer bonding using transparent, conductive oxide interlayers

    Energy Technology Data Exchange (ETDEWEB)

    Tamboli, Adele C., E-mail: Adele.Tamboli@nrel.gov; Hest, Maikel F. A. M. van; Steiner, Myles A.; Essig, Stephanie; Norman, Andrew G.; Bosco, Nick; Stradins, Paul [National Center for Photovoltaics, National Renewable Energy Laboratory, 15013 Denver West Pkwy, Golden, Colorado 80401 (United States); Perl, Emmett E. [Department of Electrical and Computer Engineering, University of California, Santa Barbara, California 93106-9560 (United States)

    2015-06-29

    We present a method for low temperature plasma-activated direct wafer bonding of III-V materials to Si using a transparent, conductive indium zinc oxide interlayer. The transparent, conductive oxide (TCO) layer provides excellent optical transmission as well as electrical conduction, suggesting suitability for Si/III-V hybrid devices including Si-based tandem solar cells. For bonding temperatures ranging from 100 °C to 350 °C, Ohmic behavior is observed in the sample stacks, with specific contact resistivity below 1 Ω cm{sup 2} for samples bonded at 200 °C. Optical absorption measurements show minimal parasitic light absorption, which is limited by the III-V interlayers necessary for Ohmic contact formation to TCOs. These results are promising for Ga{sub 0.5}In{sub 0.5}P/Si tandem solar cells operating at 1 sun or low concentration conditions.

  19. Fabrication of an integrated ΔE-E-silicon detector by wafer bonding using cobalt disilicide

    International Nuclear Information System (INIS)

    Thungstroem, G.; Veldhuizen, E.J. van; Westerberg, L.; Norlin, L.-O.; Petersson, C.S.

    1997-01-01

    The problem concerning mechanical stability of thin self-supporting ΔE detector in a ΔE-E semiconductor detector telescope, has been solved by integrating both detectors into one unit. We show here a low-cost method to integrate the detectors by wafer bonding using cobalt disilicide. The ΔE-detector has a thickness of 6.5 μm and the E detector 290 μm with an area of 24.8 mm 2 . The system was characterized with secondary ion mass spectroscopy (SIMS), scanning electron microscopy (SEM), electrical measurement, particle measurement and two-dimensional electrical simulation. (orig.)

  20. Fabrication of an integrated {Delta}E-E-silicon detector by wafer bonding using cobalt disilicide

    Energy Technology Data Exchange (ETDEWEB)

    Thungstroem, G. [Mid-Sweden Univ., Sundsvall (Sweden). Dept. of Inf. Technol.]|[Royal Institute of Technology, Department of Electronics, Electrum 229, S-164 40 Kista (Sweden); Veldhuizen, E.J. van [Uppsala University, Department of Radiation Science, Box 535, S-751 21 Uppsala (Sweden); Westerberg, L. [Uppsala University, The Svedberg Laboratory, Box 533, S-751 21 Uppsala (Sweden); Norlin, L.-O. [Royal Institute of Technology, Department of Physics, Frescativaegen 24, S-104 05 Stockholm (Sweden); Petersson, C.S. [Royal Institute of Technology, Department of Electronics, Electrum 229, S-164 40 Kista (Sweden)

    1997-06-01

    The problem concerning mechanical stability of thin self-supporting {Delta}E detector in a {Delta}E-E semiconductor detector telescope, has been solved by integrating both detectors into one unit. We show here a low-cost method to integrate the detectors by wafer bonding using cobalt disilicide. The {Delta}E-detector has a thickness of 6.5 {mu}m and the E detector 290 {mu}m with an area of 24.8 mm{sup 2}. The system was characterized with secondary ion mass spectroscopy (SIMS), scanning electron microscopy (SEM), electrical measurement, particle measurement and two-dimensional electrical simulation. (orig.).

  1. Preliminary reduction of chromium ore using Si sludge generated in silicon wafer manufacturing process

    Directory of Open Access Journals (Sweden)

    Jung W.-G.

    2018-01-01

    Full Text Available In order to promote the recycling of by-product from Si wafer manufacturing process and to develop environment-friend and low cost process for ferrochrome alloy production, a basic study was performed on the preliminary reduction reaction between chromium ore and the Si sludge, comprised of SiC and Si particles, which is recovered from the Si wafer manufacturing process for the semiconductor and solar cell industries. Pellets were first made by mixing chromium ore, Si sludge, and some binders in the designed mixing ratios and were then treated at different temperatures in the 1116°C–1388°C range in an ambient atmosphere. Cordierite and SiO2 were confirmed to be formed in the products after the reduction. Additionally, metal particles were observed in the product with Fe, Cr, and Si components. It is found that temperatures above 1300°C are necessary for the reduction of the chromium ore by the Si sludge. The reduction ratio for Fe was evaluated quantitatively for our experimental conditions, and the proper mixing ratio was suggested for the pre-reduction of the chromium ore by the Si sludge. This study provides basic information for the production of ferrochrome alloys on the pre-reduction of chromium ore using Si sludge.

  2. Effect of Rapid Thermal Processing on Light-Induced Degradation of Carrier Lifetime in Czochralski p-Type Silicon Bare Wafers

    Science.gov (United States)

    Kouhlane, Y.; Bouhafs, D.; Khelifati, N.; Belhousse, S.; Menari, H.; Guenda, A.; Khelfane, A.

    2016-11-01

    The electrical properties of Czochralski silicon (Cz-Si) p-type boron-doped bare wafers have been investigated after rapid thermal processing (RTP) with different peak temperatures. Treated wafers were exposed to light for various illumination times, and the effective carrier lifetime ( τ eff) measured using the quasi-steady-state photoconductance (QSSPC) technique. τ eff values dropped after prolonged illumination exposure due to light-induced degradation (LID) related to electrical activation of boron-oxygen (BO) complexes, except in the sample treated with peak temperature of 785°C, for which the τ eff degradation was less pronounced. Also, a reduction was observed when using the 830°C peak temperature, an effect that was enhanced by alteration of the wafer morphology (roughness). Furthermore, the electrical resistivity presented good stability under light exposure as a function of temperature compared with reference wafers. Additionally, the optical absorption edge shifted to higher wavelength, leading to increased free-carrier absorption by treated wafers. Moreover, a theoretical model is used to understand the lifetime degradation and regeneration behavior as a function of illumination time. We conclude that RTP plays an important role in carrier lifetime regeneration for Cz-Si wafers via modification of optoelectronic and structural properties. The balance between an optimized RTP cycle and the rest of the solar cell elaboration process can overcome the negative effect of LID and contribute to achievement of higher solar cell efficiency and module performance.

  3. Fabrication of a 77 GHz Rotman Lens on a High Resistivity Silicon Wafer Using Lift-Off Process

    Directory of Open Access Journals (Sweden)

    Ali Attaran

    2014-01-01

    Full Text Available Fabrication of a high resistivity silicon based microstrip Rotman lens using a lift-off process has been presented. The lens features 3 beam ports, 5 array ports, 16 dummy ports, and beam steering angles of ±10 degrees. The lens was fabricated on a 200 μm thick high resistivity silicon wafer and has a footprint area of 19.7 mm × 15.6 mm. The lens was tested as an integral part of a 77 GHz radar where a tunable X band source along with an 8 times multiplier was used as the RF source and the resulting millimeter wave signal centered at 77 GHz was radiated through a lens-antenna combination. A horn antenna with a downconverter harmonic mixer was used to receive the radiated signal and display the received signal in an Advantest R3271A spectrum analyzer. The superimposed transmit and receive signal in the spectrum analyzer showed the proper radar operation confirming the Rotman lens design.

  4. Possibility of whole-surface analysis of a silicon wafer with ordinary straight TXRF

    International Nuclear Information System (INIS)

    Mori, Y.; Uemura, K.; Iizuka, Y.

    2000-01-01

    For the analysis of average metal concentration on a semiconductor surface, we customarily use the wet techniques (AAS, typically), that require skilled operators or expensive automated machines for sample pretreatment. The straight TXRF require no pretreatment, on the other hand. However, its detection area is too small (1-2 cm 2 ) to conduct a whole-surface analysis. In fact, it takes more than one day per one wafer (500 s/point x 100-300 points) for a complete mapping. Therefore it has been believed that the whole-surface analysis with straight TXRF is impracticable. It should be noted that the absolute lower limit of detection (LLD) of the straight TXRF is superior to AAS. As an example, the absolute LLD of TXRF for Fe is 0.2 pg (500 s integration), while that of AAS is l0 pg. The required integration time for TXRF to obtain the same LLD of AAS is calculated to be only 0.2 s. This means, in principle, that the whole-surface contamination can be measured in some ten seconds by accumulating 0.2 s mapping. But actually, the adjustment of glancing angle requires several ten seconds per one point, so the above mapping still takes several hours. That is why such a measurement has not been applied to daily analysis so far. However, the influence of glancing angle errors is expected to be reduced through the multi-point measurement. Figure 1 shows an accumulated spectrum of 20 s x 25 points mapping for an IAP wafer doped with Ni. In this measurement, glancing angles were not precisely controlled (the error of glancing angle is ±15 %). A spectrum of 500 s x 1 point measurement for the same wafer is shown in Figure 2. Figures 1 and 2 are almost identical. This suggests that the reduction of glancing angle errors actually works well through multi-points measurement. This method is expected to give better results by increasing the number of measuring points. The overall variation for the final measurement value obtained by multi-point measurement can be assessed by the

  5. Synchrotron Radiation Total Reflection X-ray Fluorescence Spectroscopy for Microcontamination Analysis on Silicon Wafer Surfaces

    Energy Technology Data Exchange (ETDEWEB)

    Takaura, Norikatsu

    1997-10-01

    As dimensions in state-of-the-art CMOS devices shrink to less than 0.1 pm, even low levels of impurities on wafer surfaces can cause device degradation. Conventionally, metal contamination on wafer surfaces is measured using Total Reflection X-Ray Fluorescence Spectroscopy (TXRF). However, commercially available TXRF systems do not have the necessary sensitivity for measuring the lower levels of contamination required to develop new CMOS technologies. In an attempt to improve the sensitivity of TXRF, this research investigates Synchrotron Radiation TXRF (SR TXRF). The advantages of SR TXRF over conventional TXRF are higher incident photon flux, energy tunability, and linear polarization. We made use of these advantages to develop an optimized SR TXRF system at the Stanford Synchrotron Radiation Laboratory (SSRL). The results of measurements show that the Minimum Detection Limits (MDLs) of SR TXRF for 3-d transition metals are typically at a level-of 3x10{sup 8} atoms/cm{sup 2}, which is better than conventional TXRF by about a factor of 20. However, to use our SR TXRF system for practical applications, it was necessary to modify a commercially available Si (Li) detector which generates parasitic fluorescence signals. With the modified detector, we could achieve true MDLs of 3x10{sup 8} atoms/cm{sup 2} for 3-d transition metals. In addition, the analysis of Al on Si wafers is described. Al analysis is difficult because strong Si signals overlap the Al signals. In this work, the Si signals are greatly reduced by tuning the incident beam energy below the Si K edge. The results of our measurements show that the sensitivity for Al is limited by x-ray Raman scattering. Furthermore, we show the results of theoretical modeling of SR TXRF backgrounds consisting of the bremsstrahlung generated by photoelectrons, Compton scattering, and Raman scattering. To model these backgrounds, we extended conventional theoretical models by taking into account several aspects particular

  6. Radiation hardness of silicon detectors manufactured on wafers from various sources

    International Nuclear Information System (INIS)

    Dezillie, B.; Bates, S.; Glaser, M.; Lemeilleur, F.; Leroy, C.

    1997-01-01

    Impurity concentrations in the initial silicon material are expected to play an important role for the radiation hardness of silicon detectors, during their irradiation and for their evolution with time after irradiation. This work reports on the experimental results obtained with detectors manufactured using various float-zone (FZ) and epitaxial-grown material. Preliminary results comparing the changes in leakage current and full depletion voltage of FZ and epitaxial detectors as a function of fluence and of time after 10 14 cm -2 proton irradiation are given. The measurement of charge collection efficiency for epitaxial detectors is also presented. (orig.)

  7. Damage-free polishing of monocrystalline silicon wafers without chemical additives

    International Nuclear Information System (INIS)

    Biddut, A.Q.; Zhang, L.C.; Ali, Y.M.; Liu, Z.

    2008-01-01

    This investigation explores the possibility and identifies the mechanism of damage-free polishing of monocrystalline silicon without chemical additives. Using high resolution electron microscopy and contact mechanics, the study concludes that a damage-free polishing process without chemicals is feasible. All forms of damages, such as amorphous Si, dislocations and plane shifting, can be eliminated by avoiding the initiation of the β-tin phase of silicon during polishing. When using 50 nm abrasives, the nominal pressure to achieve damage-free polishing is 20 kPa

  8. Heterogeneous integration of lithium niobate and silicon nitride waveguides for wafer-scale photonic integrated circuits on silicon.

    Science.gov (United States)

    Chang, Lin; Pfeiffer, Martin H P; Volet, Nicolas; Zervas, Michael; Peters, Jon D; Manganelli, Costanza L; Stanton, Eric J; Li, Yifei; Kippenberg, Tobias J; Bowers, John E

    2017-02-15

    An ideal photonic integrated circuit for nonlinear photonic applications requires high optical nonlinearities and low loss. This work demonstrates a heterogeneous platform by bonding lithium niobate (LN) thin films onto a silicon nitride (Si3N4) waveguide layer on silicon. It not only provides large second- and third-order nonlinear coefficients, but also shows low propagation loss in both the Si3N4 and the LN-Si3N4 waveguides. The tapers enable low-loss-mode transitions between these two waveguides. This platform is essential for various on-chip applications, e.g., modulators, frequency conversions, and quantum communications.

  9. Study of an Amorphous Silicon Oxide Buffer Layer for p-Type Microcrystalline Silicon Oxide/n-Type Crystalline Silicon Heterojunction Solar Cells and Their Temperature Dependence

    Directory of Open Access Journals (Sweden)

    Taweewat Krajangsang

    2014-01-01

    Full Text Available Intrinsic hydrogenated amorphous silicon oxide (i-a-SiO:H films were used as front and rear buffer layers in crystalline silicon heterojunction (c-Si-HJ solar cells. The surface passivity and effective lifetime of these i-a-SiO:H films on an n-type silicon wafer were improved by increasing the CO2/SiH4 ratios in the films. Using i-a-SiO:H as the front and rear buffer layers in c-Si-HJ solar cells was investigated. The front i-a-SiO:H buffer layer thickness and the CO2/SiH4 ratio influenced the open-circuit voltage (Voc, fill factor (FF, and temperature coefficient (TC of the c-Si-HJ solar cells. The highest total area efficiency obtained was 18.5% (Voc=700 mV, Jsc=33.5 mA/cm2, and FF=0.79. The TC normalized for this c-Si-HJ solar cell efficiency was −0.301%/°C.

  10. IC Compatible Wafer Level Fabrication of Silicon Nanowire Field Effect Transistors for Biosensing Applications

    NARCIS (Netherlands)

    Moh, T.S.Y.

    2013-01-01

    In biosensing, nano-devices such as Silicon Nanowire Field Effect Transistors (SiNW FETs) are promising components/sensors for ultra-high sensitive detection, especially when samples are low in concentration or a limited volume is available. Current processing of SiNW FETs often relies on expensive

  11. Alternative method for steam generation for thermal oxidation of silicon

    Science.gov (United States)

    Spiegelman, Jeffrey J.

    2010-02-01

    Thermal oxidation of silicon is an important process step in MEMS device fabrication. Thicker oxide layers are often used as structural components and can take days or weeks to grow, causing high gas costs, maintenance issues, and a process bottleneck. Pyrolytic steam, which is generated from hydrogen and oxygen combustion, was the default process, but has serious drawbacks: cost, safety, particles, permitting, reduced growth rate, rapid hydrogen consumption, component breakdown and limited steam flow rates. Results from data collected over a 24 month period by a MEMS manufacturer supports replacement of pyrolytic torches with RASIRC Steamer technology to reduce process cycle time and enable expansion previously limited by local hydrogen permitting. Data was gathered to determine whether Steamers can meet or exceed pyrolytic torch performance. The RASIRC Steamer uses de-ionized water as its steam source, eliminating dependence on hydrogen and oxygen. A non-porous hydrophilic membrane selectively allows water vapor to pass. All other molecules are greatly restricted, so contaminants in water such as dissolved gases, ions, total organic compounds (TOC), particles, and metals can be removed in the steam phase. The MEMS manufacturer improved growth rate by 7% over the growth range from 1μm to 3.5μm. Over a four month period, wafer uniformity, refractive index, wafer stress, and etch rate were tracked with no significant difference found. The elimination of hydrogen generated a four-month return on investment (ROI). Mean time between failure (MTBF) was increased from 3 weeks to 32 weeks based on three Steamers operating over eight months.

  12. Thermal oxidation of silicon with two oxidizing species

    International Nuclear Information System (INIS)

    Vild-Maior, A.A.; Filimon, S.

    1979-01-01

    A theoretical model for the thermal oxidation of silicon in wet oxygen is presented. It is shown that the presence of oxygen in the oxidation furnace has an important effect when the water temperature is not too high (less than about 65 deg C). The model is in good agreement with the experimental data. (author)

  13. Silicon heterojunction solar cell passivation in combination with nanocrystalline silicon oxide emitters

    NARCIS (Netherlands)

    Gatz, H.A.; Rath, J.K.; Verheijen, M.A.; Kessels, W.M.M.; Schropp, R.E.I.

    2016-01-01

    Silicon heterojunction solar cells (SHJ) are well known for their high efficiencies, enabled by their remarkably high open-circuit voltages (VOC). A key factor in achieving these values is a good passivation of the crystalline wafer interface. One of the restrictions during SHJ solar cell production

  14. Internal Friction and Young's Modulus Measurements on SiO2 and Ta2O5 Films Done with an Ultra-High Q Silicon-Wafer Suspension

    Directory of Open Access Journals (Sweden)

    Granata M.

    2015-04-01

    Full Text Available In order to study the internal friction of thin films a nodal suspension system called GeNS (Gentle Nodal Suspension has been developed. The key features of this system are: i the possibility to use substrates easily available like silicon wafers; ii extremely low excess losses coming from the suspension system which allows to measure Q factors in excess of 2×108 on 3” diameter wafers; iii reproducibility of measurements within few percent on mechanical losses and 0.01% on resonant frequencies; iv absence of clamping; v the capability to operate at cryogenic temperatures. Measurements at cryogenic temperatures on SiO2 and at room temperature only on Ta2O5 films deposited on silicon are presented.

  15. Neutron activation analysis of low-level element contents in silicon wafers

    Energy Technology Data Exchange (ETDEWEB)

    Goerner, W [Bundesanstalt fuer Materialforschung und -pruefung, Berlin (Germany); Berger, A [Bundesanstalt fuer Materialforschung und -pruefung, Berlin (Germany); Niese, S [Verein fuer Kernverfahrenstechnik und Analytik Rossendorf e.V. (VKTA), Dresden (Germany); Koehler, M [Verein fuer Kernverfahrenstechnik und Analytik Rossendorf e.V. (VKTA), Dresden (Germany); Matthes, M [Verein fuer Kernverfahrenstechnik und Analytik Rossendorf e.V. (VKTA), Dresden (Germany); Gawlik, D [Hahn-Meitner-Institut, Berlin (Germany)

    1997-03-01

    Semiconductor silicon is among the purest materials having ever been produced by modern technology. Thus, it is quite suitable as a primary reference material validating the correctness and the detection capabilities of developed analytical methods. Among them neutron activation analysis plays a competitive role. The U.S. National Institute of Science and Technology (NIST) has initiated and carried out an interlaboratory comparison in order to study the spread of analytical results worldwide evolved by several laboratories dealing with specimens of extreme purity. The outcome of the experiment was intended to review the capabilities of NAA as well as to differentiate between bulk and surface contamination. (orig./DG)

  16. Laser-fired contact formation on metallized and passivated silicon wafers under short pulse durations

    Science.gov (United States)

    Raghavan, Ashwin S.

    The objective of this work is to develop a comprehensive understanding of the physical processes governing laser-fired contact (LFC) formation under microsecond pulse durations. Primary emphasis is placed on understanding how processing parameters influence contact morphology, passivation layer quality, alloying of Al and Si, and contact resistance. In addition, the research seeks to develop a quantitative method to accurately predict the contact geometry, thermal cycles, heat and mass transfer phenomena, and the influence of contact pitch distance on substrate temperatures in order to improve the physical understanding of the underlying processes. Finally, the work seeks to predict how geometry for LFCs produced with microsecond pulses will influence fabrication and performance factors, such as the rear side contacting scheme, rear surface series resistance and effective rear surface recombination rates. The characterization of LFC cross-sections reveals that the use of microsecond pulse durations results in the formation of three-dimensional hemispherical or half-ellipsoidal contact geometries. The LFC is heavily alloyed with Al and Si and is composed of a two-phase Al-Si microstructure that grows from the Si wafer during resolidification. As a result of forming a large three-dimensional contact geometry, the total contact resistance is governed by the interfacial contact area between the LFC and the wafer rather than the planar contact area at the original Al-Si interface within an opening in the passivation layer. By forming three-dimensional LFCs, the total contact resistance is significantly reduced in comparison to that predicted for planar contacts. In addition, despite the high energy densities associated with microsecond pulse durations, the passivation layer is well preserved outside of the immediate contact region. Therefore, the use of microsecond pulse durations can be used to improve device performance by leading to lower total contact resistances

  17. Wafer-level integration of NiTi shape memory alloy on silicon using Au–Si eutectic bonding

    International Nuclear Information System (INIS)

    Gradin, Henrik; Bushra, Sobia; Braun, Stefan; Stemme, Göran; Van der Wijngaart, Wouter

    2013-01-01

    This paper reports on the wafer level integration of NiTi shape memory alloy (SMA) sheets with silicon substrates through Au–Si eutectic bonding. Different bond parameters, such as Au layer thicknesses and substrate surface treatments were evaluated. The amount of gold in the bond interface is the most important parameter to achieve a high bond yield; the amount can be determined by the barrier layers between the Au and Si or by the amount of Au deposition. Deposition of a gold layer of more than 1 μm thickness before bonding gives the most promising results. Through patterning of the SMA sheet and by limiting bonding to small areas, stresses created by the thermal mismatch between Si and NiTi are reduced. With a gold layer of 1 μm thickness and bond areas between 200 × 200 and 800 × 800 μm 2 a high bond strength and a yield above 90% is demonstrated. (paper)

  18. Silicon Wafer-Based Platinum Microelectrode Array Biosensor for Near Real-Time Measurement of Glutamate in Vivo

    Directory of Open Access Journals (Sweden)

    Nigel T. Maidment

    2008-08-01

    Full Text Available Using Micro-Electro-Mechanical-Systems (MEMS technologies, we have developed silicon wafer-based platinum microelectrode arrays (MEAs modified with glutamate oxidase (GluOx for electroenzymatic detection of glutamate in vivo. These MEAs were designed to have optimal spatial resolution for in vivo recordings. Selective detection of glutamate in the presence of the electroactive interferents, dopamine and ascorbic acid, was attained by deposition of polypyrrole and Nafion. The sensors responded to glutamate with a limit of detection under 1μM and a sub-1-second response time in solution. In addition to extensive in vitro characterization, the utility of these MEA glutamate biosensors was also established in vivo. In the anesthetized rat, these MEA glutamate biosensors were used for detection of cortically-evoked glutamate release in the ventral striatum. The MEA biosensors also were applied to the detection of stress-induced glutamate release in the dorsal striatum of the freely-moving rat.

  19. Analysis and wafer-level design of a high-order silicon vibration isolator for resonating MEMS devices

    International Nuclear Information System (INIS)

    Yoon, Sang Won; Lee, Sangwoo; Najafi, Khalil; Perkins, Noel C

    2011-01-01

    This paper presents the analysis and preliminary design, fabrication, and measurement for mechanical vibration-isolation platforms especially designed for resonating MEMS devices including gyroscopes. Important parameters for designing isolation platforms are specified and the first platform (in designs with cascaded multiple platforms) is crucial for improving vibration-isolation performance and minimizing side-effects on integrated gyroscopes. This isolation platform, made from a thick silicon wafer substrate for an environment-resistant MEMS package, incorporates the functionalities of a previous design including vacuum packaging and thermal resistance with no additional resources. This platform consists of platform mass, isolation beams, vertical feedthroughs, and bonding pads. Two isolation platform designs follow from two isolation beam designs: lateral clamped–clamped beams and vertical torsion beams. The beams function simultaneously as mechanical springs and electrical interconnects. The vibration-isolation platform can yield a multi-dimensional, high-order mechanical low pass filter. The isolation platform possesses eight interconnects within a 12.2 × 12.2 mm 2 footprint. The contact resistance ranges from 4–11 Ω depending on the beam design. Vibration measurements using a laser-Doppler vibrometer demonstrate that the lateral vibration-isolation platform suppresses external vibration having frequencies exceeding 2.1 kHz.

  20. Corporate array of micromachined dipoles on silicon wafer for 60 GHz communication systems

    KAUST Repository

    Sallam, M. O.

    2013-03-01

    In this paper, an antenna array operating at 60 GHz and realized on 0.675 mm thick silicon substrate is presented. The array is constructed using four micromachined half-wavelength dipoles fed by a corporate feeding network. Isolation between the antenna array and its feeding network is achieved via a ground plane. This arrangement leads to maximizing the broadside radiation with relatively high front-to-back ratio. Simulations have been carried out using both HFSS and CST, which showed very good agreement. Results reveal that the proposed antenna array has good radiation characteristics, where the directivity, gain, and radiation efficiency are around 10.5 dBi, 9.5 dBi, and 79%, respectively. © 2013 IEEE.

  1. Determination of ultra-trace contaminants on silicon wafer surfaces using TXRF. Present state of the art

    International Nuclear Information System (INIS)

    Pahlke, S.; Fabry, L.; Kotz, L.; Mantler, C.; Ehmann, T.

    2000-01-01

    Recently, TXRF became a standard, on-line inspection tool for controlling the cleanliness of polished Si wafers for semiconductor use now up to 300 diameter. Wafer makers strive for an all-over metallic cleanliness of 10 atoms x cm -2 . Therefore an analytical tools must cover LOD in a range 9 atoms x cm -2 or lower. The all-over cleanliness of the whole wafer surface can analyzed using VPD/TXRF. For this chemical wafer-pre-preparation under cleanroom conditions class 1 we have developed a full automatic 'Wafer Surface Preparation System' coupled with a new generation TXRF. We have also combined this system with other independent methods for Na, Al, anions and cations. Only the combination of automatic wafer handling systems, modem analytical tools, ultra-pure water, ULSI chemicals and special cleanroom conditions provides us a chance to achieve the present and the future demands for semiconductor industry. (author)

  2. Efficiency improvement of multicrystalline silicon solar cells after surface and grain boundaries passivation using vanadium oxide

    Energy Technology Data Exchange (ETDEWEB)

    Derbali, L., E-mail: rayan.slat@yahoo.fr [Photovoltaiec Laboratory, Research and Technology Center of Energy, Technopole de Borj-Cedria, BP 95, Hammam-Lif 2050 (Tunisia); Ezzaouia, H. [Photovoltaiec Laboratory, Research and Technology Center of Energy, Technopole de Borj-Cedria, BP 95, Hammam-Lif 2050 (Tunisia)

    2012-08-01

    Highlights: Black-Right-Pointing-Pointer Evaporation of vanadium pentoxide onto the front surface leads to reduce the surface reflectivity considerably. Black-Right-Pointing-Pointer An efficient surface passivation can be obtained after thermal treatment of obtained films. Black-Right-Pointing-Pointer Efficiency of the obtained solar cells has been improved noticeably after thermal treatment of deposited thin films. - Abstract: The aim of this work is to investigate the effect of vanadium oxide deposition onto the front surface of multicrystalline silicon (mc-Si) substrat, without any additional cost in the fabrication process and leading to an efficient surface and grain boundaries (GBs) passivation that have not been reported before. The lowest reflectance of mc-Si coated with vanadium oxide film of 9% was achieved by annealing the deposited film at 600 Degree-Sign C. Vanadium pentoxide (V{sub 2}O{sub 5}) were thermally evaporated onto the surface of mc-Si substrates, followed by a short annealing duration at a temperature ranging between 600 Degree-Sign C and 800 Degree-Sign C, under O{sub 2} atmosphere. The chemical composition of the films was analyzed by means of Fourier transform infrared spectroscopy (FTIR). Surface and cross-section morphology were determined by atomic force microscope (AFM) and a scanning electron microscope (SEM), respectively. The deposited vanadium oxide thin films make the possibility of combining in one processing step an antireflection coating deposition along with efficient surface state passivation, as compared to a reference wafer. Silicon solar cells based on untreated and treated mc-Si wafers were achieved. We showed that mc-silicon solar cells, subjected to the above treatment, have better short circuit currents and open-circuit voltages than those made from untreated wafers. Thus, the efficiency of obtained solar cells has been improved.

  3. Efficiency improvement of multicrystalline silicon solar cells after surface and grain boundaries passivation using vanadium oxide

    International Nuclear Information System (INIS)

    Derbali, L.; Ezzaouia, H.

    2012-01-01

    Highlights: ► Evaporation of vanadium pentoxide onto the front surface leads to reduce the surface reflectivity considerably. ► An efficient surface passivation can be obtained after thermal treatment of obtained films. ► Efficiency of the obtained solar cells has been improved noticeably after thermal treatment of deposited thin films. - Abstract: The aim of this work is to investigate the effect of vanadium oxide deposition onto the front surface of multicrystalline silicon (mc-Si) substrat, without any additional cost in the fabrication process and leading to an efficient surface and grain boundaries (GBs) passivation that have not been reported before. The lowest reflectance of mc-Si coated with vanadium oxide film of 9% was achieved by annealing the deposited film at 600 °C. Vanadium pentoxide (V 2 O 5 ) were thermally evaporated onto the surface of mc-Si substrates, followed by a short annealing duration at a temperature ranging between 600 °C and 800 °C, under O 2 atmosphere. The chemical composition of the films was analyzed by means of Fourier transform infrared spectroscopy (FTIR). Surface and cross-section morphology were determined by atomic force microscope (AFM) and a scanning electron microscope (SEM), respectively. The deposited vanadium oxide thin films make the possibility of combining in one processing step an antireflection coating deposition along with efficient surface state passivation, as compared to a reference wafer. Silicon solar cells based on untreated and treated mc-Si wafers were achieved. We showed that mc-silicon solar cells, subjected to the above treatment, have better short circuit currents and open-circuit voltages than those made from untreated wafers. Thus, the efficiency of obtained solar cells has been improved.

  4. Photoconduction in silicon rich oxide films

    Energy Technology Data Exchange (ETDEWEB)

    Luna-Lopez, J A; Carrillo-Lopez, J; Flores-Gracia, F J; Garcia-Salgado, G [CIDS-ICUAP, Benemerita Universidad Autonoma de Puebla. Ed. 103 D and C, col. San Manuel, Puebla, Pue. Mexico 72570 (Mexico); Aceves-Mijares, M; Morales-Sanchez, A, E-mail: jluna@buap.siu.m, E-mail: jluna@inaoep.m [INAOE, Luis Enrique Erro No. 1, Apdo. 51, Tonantzintla, Puebla, Mexico 72000 (Mexico)

    2009-05-01

    Photoconduction of silicon rich oxide (SRO) thin films were studied by current-voltage (I-V) measurements, where ultraviolet (UV) and white (Vis) light illumination were applied. SRO thin films were deposited by low pressure chemical vapour deposition (LPCVD) technique, using SiH{sub 4} (silane) and N{sub 2}O (nitrous oxide) as reactive gases at 700 {sup 0}. The gas flow ratio, Ro = [N{sub 2}O]/[SiH{sub 4}] was used to control the silicon excess. The thickness and refractive index of the SRO films were 72.0 nm, 75.5 nm, 59.1 nm, 73.4 nm and 1.7, 1.5, 1.46, 1.45, corresponding to R{sub o} = 10, 20, 30 and 50, respectively. These results were obtained by null ellipsometry. Si nanoparticles (Si-nps) and defects within SRO films permit to obtain interesting photoelectric properties as a high photocurrent and photoconduction. These effects strongly depend on the silicon excess, thickness and structure type. Two different structures (Al/SRO/Si and Al/SRO/SRO/Si metal-oxide-semiconductor (MOS)-like structures) were fabricated and used as devices. The photocurrent in these structures is dominated by the generation of carriers due to the incident photon energies ({approx}3.0-1.6 eV and 5 eV). These structures showed large photoconductive response at room temperature. Therefore, these structures have potential applications in optoelectronics devices.

  5. Wafer of Intel Pentium 4 Prescott Chips

    CERN Multimedia

    Silicon wafer with hundreds of Penryn cores (microprocessor). There are around four times as many Prescott chips can be made per wafer than with the previous generation of Northwood-core Pentium 4 processors. It is faster and cheaper.

  6. Strained silicon/silicon germanium heterojunction n-channel metal oxide semiconductor field effect transistors

    International Nuclear Information System (INIS)

    Olsen, Sarah H.

    2002-01-01

    Investigations into the performance of strained silicon/silicon-germanium (Si/SiGe) n-channel metal-oxide-semiconductor field effect transistors (MOSFETs) have been carried out. Theoretical predictions suggest that use of a strained Si/SiGe material system with advanced material properties compared with conventional silicon allows enhanced MOSFET device performance. This study has therefore investigated the practical feasibility of obtaining superior electrical performance using a Si/SiGe material system. The MOSFET devices consisted of a strained Si surface channel and were fabricated on relaxed SiGe material using a reduced thermal budget process in order to preserve the strain. Two batches of strained Si/SiGe devices fabricated on material grown by differing methods have been analysed and both showed good transistor action. A correlation of electrical and physical device data established that the electrical device behaviour was closely related to the SiGe material quality, which differed depending on growth technique. The cross-wafer variation in the electrical performance of the strained Si/SiGe devices was found to be a function of material quality, thus the viability of Si/SiGe MOSFET technology for commercial applications has been addressed. Of particular importance was the finding that large-scale 'cross-hatching' roughness associated with relaxed SiGe alloys led to degradation in the small-scale roughness at the gate oxide interface, which affects electrical device performance. The fabrication of strained Si MOSFET devices on high quality SiGe material thus enabled significant performance gains to be realised compared with conventional Si control devices. In contrast, the performance of devices fabricated on material with severe cross-hatching roughness was found to be diminished by the nanoscale oxide interface roughness. The effect of device processing on SiGe material with differing as-grown roughness has been carried out and compared with the reactions

  7. Electrochemical impedance spectroscopy of oxidized porous silicon

    Energy Technology Data Exchange (ETDEWEB)

    Mula, Guido, E-mail: guido.mula@unica.it [Dipartimento di Fisica, Università degli Studi di Cagliari, Cittadella Universitaria di Monserrato, S.P. 8 km 0.700, 09042 Cagliari (Italy); Tiddia, Maria V. [Dipartimento di Fisica, Università degli Studi di Cagliari, Cittadella Universitaria di Monserrato, S.P. 8 km 0.700, 09042 Cagliari (Italy); Ruffilli, Roberta [Nanochemistry, Istituto Italiano di Tecnologia, Via Morego 30, 16163 Genova (Italy); Falqui, Andrea [Nanochemistry, Istituto Italiano di Tecnologia, Via Morego 30, 16163 Genova (Italy); Dipartimento di Scienze Chimiche e Geologiche, Università degli Studi di Cagliari, Cittadella Universitaria di Monserrato, S.P. 8 km 0.700, 09042 Cagliari (Italy); Palmas, Simonetta; Mascia, Michele [Dipartimento di Ingegneria Meccanica Chimica e dei Materiali, Università degli Studi di Cagliari, Piazza d' Armi, 09126 Cagliari (Italy)

    2014-04-01

    We present a study of the electrochemical oxidation process of porous silicon. We analyze the effect of the layer thickness (1.25–22 μm) and of the applied current density (1.1–11.1 mA/cm{sup 2}, values calculated with reference to the external samples surface) on the oxidation process by comparing the galvanostatic electrochemical impedance spectroscopy (EIS) measurements and the optical specular reflectivity of the samples. The results of EIS were interpreted using an equivalent circuit to separate the contribution of different sample parts. A different behavior of the electrochemical oxidation process has been found for thin and thick samples: whereas for thin samples the oxidation process is univocally related to current density and thickness, for thicker samples this is no more true. Measurements by Energy Dispersive Spectroscopy using a Scanning Electron Microscopy confirmed that the inhomogeneity of the electrochemical oxidation process is increased by higher thicknesses and higher currents. A possible explanation is proposed to justify the different behavior of thin and thick samples during the electrochemical process. - Highlights: • A multidisciplinary approach on porous Si electrochemical oxidation is proposed. • Electrochemical, optical, and structural characterizations are used. • Layer thickness and oxidation current effects are shown. • An explanation of the observed behavior is proposed.

  8. Non-invasive thermal profiling of silicon wafer surface during RTP using acoustic and signal processing techniques

    Science.gov (United States)

    Syed, Ahmed Rashid

    Among the great physical challenges faced by the current front-end semiconductor equipment manufacturers is the accurate and repeatable surface temperature measurement of wafers during various fabrication steps. Close monitoring of temperature is essential in that it ensures desirable device characteristics to be reliably reproduced across various wafer lots. No where is the need to control temperature more pronounced than it is during Rapid Thermal Processing (RTP) which involves temperature ramp rates in excess of 200°C/s. This dissertation presents an elegant and practical approach to solve the wafer surface temperature estimation problem, in context of RTP, by deploying hardware that acquires the necessary data while preserving the integrity and purity of the wafer. In contrast to the widely used wafer-contacting (and hence contaminating) methods, such as bonded thermocouples, or environment sensitive schemes, such as light-pipes and infrared pyrometry, the proposed research explores the concept of utilizing Lamb (acoustic) waves to detect changes in wafer surface temperature, during RTP. Acoustic waves are transmitted to the wafer via an array of quartz rods that normally props the wafer inside an RTP chamber. These waves are generated using piezoelectric transducers affixed to the bases of the quartz rods. The group velocity of Lamb waves traversing the wafer surface undergoes a monotonic decrease with rise in wafer temperature. The correspondence of delay in phase of the received Lamb waves and the ambient temperature, along all direct paths between sending and receiving transducers, yields a psuedo real-time thermal image of the wafer. Although the custom built hardware-setup implements the above "proof-of-concept" scheme by transceiving acoustic signals at a single frequency, the real-world application will seek to enhance the data acquistion. rate (>1000 temperature measurements per seconds) by sending and receiving Lamb waves at multiple frequencies (by

  9. Oxide film assisted dopant diffusion in silicon carbide

    Energy Technology Data Exchange (ETDEWEB)

    Tin, Chin-Che, E-mail: cctin@physics.auburn.ed [Department of Physics, Auburn University, Alabama 36849 (United States); Mendis, Suwan [Department of Physics, Auburn University, Alabama 36849 (United States); Chew, Kerlit [Department of Electrical and Electronic Engineering, Faculty of Engineering and Science, Universiti Tunku Abdul Rahman, Kuala Lumpur (Malaysia); Atabaev, Ilkham; Saliev, Tojiddin; Bakhranov, Erkin [Physical Technical Institute, Uzbek Academy of Sciences, 700084 Tashkent (Uzbekistan); Atabaev, Bakhtiyar [Institute of Electronics, Uzbek Academy of Sciences, 700125 Tashkent (Uzbekistan); Adedeji, Victor [Department of Chemistry, Geology and Physics, Elizabeth City State University, North Carolina 27909 (United States); Rusli [School of Electrical and Electronic Engineering, Nanyang Technological University (Singapore)

    2010-10-01

    A process is described to enhance the diffusion rate of impurities in silicon carbide so that doping by thermal diffusion can be done at lower temperatures. This process involves depositing a thin film consisting of an oxide of the impurity followed by annealing in an oxidizing ambient. The process uses the lower formation energy of silicon dioxide relative to that of the impurity-oxide to create vacancies in silicon carbide and to promote dissociation of the impurity-oxide. The impurity atoms then diffuse from the thin film into the near-surface region of silicon carbide.

  10. Oxide film assisted dopant diffusion in silicon carbide

    International Nuclear Information System (INIS)

    Tin, Chin-Che; Mendis, Suwan; Chew, Kerlit; Atabaev, Ilkham; Saliev, Tojiddin; Bakhranov, Erkin; Atabaev, Bakhtiyar; Adedeji, Victor; Rusli

    2010-01-01

    A process is described to enhance the diffusion rate of impurities in silicon carbide so that doping by thermal diffusion can be done at lower temperatures. This process involves depositing a thin film consisting of an oxide of the impurity followed by annealing in an oxidizing ambient. The process uses the lower formation energy of silicon dioxide relative to that of the impurity-oxide to create vacancies in silicon carbide and to promote dissociation of the impurity-oxide. The impurity atoms then diffuse from the thin film into the near-surface region of silicon carbide.

  11. Segregation of boron implanted into silicon on angular configurations of silicon/silicon dioxide oxidation interface

    CERN Document Server

    Tarnavskij, G A; Obrekht, M S

    2001-01-01

    One studies segregation of boron implanted into silicon when a wave (interface) of oxidation moves within it. There are four types of angular configurations of SiO sub 2 /Si oxidation interface, that is: direct and reverse shoulders, trench type cavities and a square. By means of computer-aided simulation one obtained and analyzed complex patterns of B concentration distribution within Si, SiO sub 2 domains and at SiO sub 2 /Si interface for all types of angular configurations of the oxidation interface

  12. Ellipsometry measurements of thickness of oxide and water layers on spherical and flat silicon surfaces

    International Nuclear Information System (INIS)

    Kenny, M.J.; Netterfield, R.; Wielunski, L.S.

    1998-01-01

    Full text: Ellipsometry has been used to measure the thickness of oxide layers on single crystal silicon surfaces, both flat and spherical and also to measure the extent of adsorption of moisture on the surface as a function of partial water vapour pressure. The measurements form part of an international collaborative project to make a precise determination of the Avogadro constant (ΔN A /N A -8 ) which will then be used to obtain an absolute definition of the kilogram, rather than one in terms of an artefact. Typically the native oxide layer on a cleaned silicon wafer is about 2 nm thick. On a polished sphere this oxide layer is typically 8 to 10 nm thick, the increased thickness being attributed to parameters related to the polishing process. Ellipsometry measurements on an 89 mm diameter polished silicon sphere at both VUW and CSIRO indicated a SiO 2 layer at 7 to 10 nm thick. It was observed that this thickness varied regularly. The crystal orientation of the sphere was determined using electron patterns generated from an electron microscope and the oxide layer was then measured through 180 arcs of great circles along (110) and (100) planes. It was observed that the thickness varied systematically with orientation. The minimum thickness was 7.4 nm at the axis (softest direction in silicon) and the greatest thickness was 9.5 nm at the axis (hardest direction in silicon). This is similar to an orientation dependent cubic pattern which has been observed to be superimposed on polished silicon spheres. At VUW, the sphere was placed in an evacuated bell jar and the ellipsometry signal was observed as the water vapour pressure was progressively increased up to saturation. The amount of water vapour adsorbed at saturation was one or two monolayers, indicating that the sphere does not wet

  13. Hydrothermal deposition and characterization of silicon oxide nanospheres

    International Nuclear Information System (INIS)

    Pei, L.Z.

    2008-01-01

    Silicon oxide nanospheres with the average diameter of about 100 nm have been synthesized by hydrothermal deposition process using silicon and silica as the starting materials. The silicon oxide nanospheres were characterized by field emission scanning electron microscopy (FESEM), energy dispersive X-ray spectrum (EDS), transmission electron microscopy (TEM), high-resolution transmission electron microscopy (HRTEM) and photoluminescence (PL) spectrum, respectively. The results show that large scale silicon oxide nanospheres with the uniform size are composed of Si and O showing the amorphous structure. Strong PL peak at 435 nm is observed demonstrating the good blue light emission property

  14. The effects of trichloroethane HCl and ion-implantation on the oxidation rate of silicon

    International Nuclear Information System (INIS)

    Ahmed, W.; Ahmed, E.

    1994-01-01

    The thermal oxidation of silicon was studied using a large-scale industrial oxidation system. The characteristics of the oxides resulting from pure hydrogen/oxygen (Hsub(2)/Osub(2)), trichloroethane/oxygen (TCA/Osub(2) and hydrogen chloride/oxygen (HCI/Osub(2)) mixtures are compared. Both HCI and TCA addition to oxygen produced an enhanced oxidation rate. The oxidation rate for TCA/Osub(2) was approximately 30-40% higher than for HCI/Osub(2) mixtures. A molar ratio of TCA/Osub(2) of 1% gives an optimum process for very-large-scale industrial (VLSI) applications. However, 3% HCI/Osub(2) gives comparable results to 1% TCA. In addition, boron and phosphorus implantation are observed to increase the oxidation rate. Phosphorus doping of the silicon yields a higher rate than boron-doped wafers. This behaviour is explained in terms of surface damage and chemistry. It appears that the overall mechanisms governing all these processes are similar. (8 figures, 22 references) (Author)

  15. Linear self-assembly and grafting of gold nanorods into arrayed micrometer-long nanowires on a silicon wafer via a combined top-down/bottom-up approach.

    Science.gov (United States)

    Lestini, Elena; Andrei, Codrin; Zerulla, Dominic

    2018-01-01

    Macroscopically long wire-like arrangements of gold nanoparticles were obtained by controlled evaporation and partial coalescence of an aqueous colloidal solution of capped CTAB-Au nanorods onto a functionalised 3-mercaptopropyl trimethoxysilane (MPTMS) silicon substrate, using a removable, silicon wafer with a hydrophobic surface that serves as a "handrail" for the initial nanorods' linear self-assembly. The wire-like structures display a quasi-continuous pattern by thermal annealing of the gold nanorods when the solvent (i.e. water) is evaporated at temperatures rising from 20°C to 140°C. Formation of both single and self-replicating parallel 1D-superstructures consisting of two or even three wires is observed and explained under such conditions.

  16. Electrical analysis of high dielectric constant insulator and metal gate metal oxide semiconductor capacitors on flexible bulk mono-crystalline silicon

    KAUST Repository

    Ghoneim, Mohamed T.

    2015-06-01

    We report on the electrical study of high dielectric constant insulator and metal gate metal oxide semiconductor capacitors (MOSCAPs) on a flexible ultra-thin (25 μm) silicon fabric which is peeled off using a CMOS compatible process from a standard bulk mono-crystalline silicon substrate. A lifetime projection is extracted using statistical analysis of the ramping voltage (Vramp) breakdown and time dependent dielectric breakdown data. The obtained flexible MOSCAPs operational voltages satisfying the 10 years lifetime benchmark are compared to those of the control MOSCAPs, which are not peeled off from the silicon wafer. © 2014 IEEE.

  17. Sub-Micrometer Zeolite Films on Gold-Coated Silicon Wafers with Single-Crystal-Like Dielectric Constant and Elastic Modulus

    Energy Technology Data Exchange (ETDEWEB)

    Tiriolo, Raffaele [Department of Medical and Surgical Sciences, University Magna Graecia of Catanzaro, Viale Europa 88100 Catanzaro Italy; Rangnekar, Neel [Department of Chemical Engineering and Materials Science, University of Minnesota, 421 Washington Ave SE Minneapolis MN 55455 USA; Zhang, Han [Department of Chemical Engineering and Materials Science, University of Minnesota, 421 Washington Ave SE Minneapolis MN 55455 USA; Shete, Meera [Department of Chemical Engineering and Materials Science, University of Minnesota, 421 Washington Ave SE Minneapolis MN 55455 USA; Bai, Peng [Department of Chemistry and Chemistry Theory Center, University of Minnesota, 207 Pleasant St SE Minneapolis MN 55455 USA; Nelson, John [Characterization Facility, University of Minnesota, 12 Shepherd Labs, 100 Union St. S.E. Minneapolis MN 55455 USA; Karapetrova, Evguenia [Surface Scattering and Microdiffraction, X-ray Science Division, Argonne National Laboratory, 9700 S. Cass Ave, Building 438-D002 Argonne IL 60439 USA; Macosko, Christopher W. [Department of Chemical Engineering and Materials Science, University of Minnesota, 421 Washington Ave SE Minneapolis MN 55455 USA; Siepmann, Joern Ilja [Department of Chemistry and Chemistry Theory Center, University of Minnesota, 207 Pleasant St SE Minneapolis MN 55455 USA; Lamanna, Ernesto [Department of Health Sciences, University Magna Graecia of Catanzaro, Viale Europa 88100 Catanzaro Italy; Lavano, Angelo [Department of Medical and Surgical Sciences, University Magna Graecia of Catanzaro, Viale Europa 88100 Catanzaro Italy; Tsapatsis, Michael [Department of Chemical Engineering and Materials Science, University of Minnesota, 421 Washington Ave SE Minneapolis MN 55455 USA

    2017-05-08

    A low-temperature synthesis coupled with mild activation produces zeolite films exhibiting low dielectric constant (low-k) matching the theoretically predicted and experimentally measured values for single crystals. This synthesis and activation method allows for the fabrication of a device consisting of a b-oriented film of the pure-silica zeolite MFI (silicalite-1) supported on a gold-coated silicon wafer. The zeolite seeds are assembled by a manual assembly process and subjected to optimized secondary growth conditions that do not cause corrosion of the gold underlayer, while strongly promoting in-plane growth. The traditional calcination process is replaced with a non-thermal photochemical activation to ensure preservation of an intact gold layer. The dielectric constant (k), obtained through measurement of electrical capacitance in a metal-insulator-metal configuration, highlights the ultralow k approximate to 1.7 of the synthetized films, which is among the lowest values reported for an MFI film. There is large improvement in elastic modulus of the film (E approximate to 54 GPa) over previous reports, potentially allowing for integration into silicon wafer processing technology.

  18. Tribology study of reduced graphene oxide sheets on silicon substrate synthesized via covalent assembly.

    Science.gov (United States)

    Ou, Junfei; Wang, Jinqing; Liu, Sheng; Mu, Bo; Ren, Junfang; Wang, Honggang; Yang, Shengrong

    2010-10-19

    Reduced graphene oxide (RGO) sheets were covalently assembled onto silicon wafers via a multistep route based on the chemical adsorption and thermal reduction of graphene oxide (GO). The formation and microstructure of RGO were analyzed by X-ray photoelectron spectroscopy (XPS), attenuated total reflectance Fourier transform infrared (ATR-FTIR) spectroscopy, Raman spectroscopy, and water contact angle (WCA) measurements. Characterization by atomic force microscopy (AFM) was performed to evaluate the morphology and microtribological behaviors of the samples. Macrotribological performance was tested on a ball-on-plate tribometer. Results show that the assembled RGO possesses good friction reduction and antiwear ability, properties ascribed to its intrinsic structure, that is, the covalent bonding to the substrate and self-lubricating property of RGO.

  19. Robust Wafer-Level Thin-Film Encapsulation (Packaging) of Microstructures (MEMS) using Low Stress PECVD Silicon Carbide

    NARCIS (Netherlands)

    Rajaraman, V.; Pakula, L.S.; Pham, H.T.M.; Sarro, P.M.; French, P.J.

    2009-01-01

    This paper presents a new low-cost, CMOS-compatible and robust wafer-level encapsulation technique developed using a stress-optimised PECVD SiC as the capping and sealing material, imparting harsh environment capability. This technique has been applied for the fabrication and encapsulation of a wide

  20. The oxidized porous silicon field emission array

    International Nuclear Information System (INIS)

    Smith, D.D.; Demroff, H.P.; Elliott, T.S.; Kasprowicz, T.B.; Lee, B.; Mazumdar, T.K.; McIntyre, P.M.; Pang, Y.; Trost, H.J.

    1993-01-01

    The goal of developing a highly efficient microwave power source has led the authors to investigate new methods of electron field emission. One method presently under consideration involves the use of oxidized porous silicon thin films. The authors have used this technology to fabricate the first working field emission arrays from this substance. This approach reduces the diameter of an individual emitter to the nanometer scale. Tests of the first samples are encouraging, with extracted electron currents to nearly 1 mA resulting from less than 20 V of pulsed DC gate voltage. Modulated emission at 5 MHz was also observed. Developments of a full-scale emission array capable of delivering an electron beam at 18 GHz of minimum density 100 A/cm 2 is in progress

  1. Surface passivation at low temperature of p- and n-type silicon wafers using a double layer a-Si:H/SiNx:H

    International Nuclear Information System (INIS)

    Focsa, A.; Slaoui, A.; Charifi, H.; Stoquert, J.P.; Roques, S.

    2009-01-01

    Surface passivation of bare silicon or emitter region is of great importance towards high efficiency solar cells. Nowadays, this is usually accomplished by depositing an hydrogenated amorphous silicon nitride (a-SiNx:H) layer on n + p structures that serves also as an excellent antireflection layer. On the other hand, surface passivation of p-type silicon is better assured by an hydrogenated amorphous silicon (a-Si:H) layer but suffers from optical properties. In this paper, we reported the surface passivation of p-type and n-type silicon wafers by using an a-Si:H/SiNx:H double layer formed at low temperature (50-400 deg. C) with ECR-PECVD technique. We first investigated the optical properties (refraction index, reflectance, and absorbance) and structural properties by FTIR (bonds Si-H, N-H) of the deposited films. The hydrogen content in the layers was determined by elastic recoil detection analysis (ERDA). The passivation effect was monitored by measuring the minority carrier effective lifetime vs. different parameters such as deposition temperature and amorphous silicon layer thickness. We have found that a 10-15 nm a-Si film with an 86 nm thick SiN layer provides an optimum of the minority carriers' lifetime. It increases from an initial value of about 50-70 μs for a-Si:H to about 760 and 800 μs for a-Si:H/SiNx:H on Cz-pSi and FZ-nSi, respectively, at an injection level 2 x 10 15 cm -3 . The effective surface recombination velocity, S eff , for passivated double layer on n-type FZ Si reached 11 cm/s and for FZ-pSi-14 cm/s, and for Cz-pSi-16-20 cm/s. Effect of hydrogen in the passivation process is discussed.

  2. Assessment of Electrodes Prepared from Wafers of Boron-doped Diamond for the Electrochemical Oxidation of Waste Lubricants

    International Nuclear Information System (INIS)

    Taylor, G.T.; Sullivan, I.A.; Newey, A.W.E.

    2006-01-01

    Electrochemical oxidation using boron-doped diamond electrodes is being investigated as a treatment process for radioactively contaminated oily wastes. Previously, it was shown that electrodes coated with a thin film of diamond were able to oxidise a cutting oil but not a mineral oil. These tests were inconclusive, because the electrodes lost their diamond coating during operation. Accordingly, an electrode prepared from a 'solid' wafer of boron-doped diamond is being investigated to determine whether it will oxidise mineral oils. The electrode has been tested with sucrose, a cutting oil and an emulsified mineral oil. Before and after each test, the state of the electrode was assessed by cyclic voltammetry with the ferro/ferricyanide redox couple. Analysis of the cyclic voltammogram suggested that material accumulated on the surface of the electrode during the tests. The magnitude of the effect was in the order: - emulsified mineral oil > cutting oil > sucrose. Despite this, the results indicated that the electrode was capable of oxidising the emulsified mineral oil. Confirmatory tests were undertaken in the presence of alkali to trap the carbon dioxide, but they had to be abandoned when the adhesive holding the diamond in the electrode was attacked by the alkali. Etching of the diamond wafer was also observed at the end of the tests. Surface corrosion is now regarded as an intrinsic part of the electrochemical oxidation on diamond, and it is expected that the rate of attack will determine the service life of the electrodes. (authors)

  3. The effect of thermal oxidation on the luminescence properties of nanostructured silicon.

    Science.gov (United States)

    Liu, Lijia; Sham, Tsun-Kong

    2012-08-06

    Herein is reported a detailed study of the luminescence properties of nanostructured Si using X-ray excited optical luminescence (XEOL) in combination with X-ray absorption near-edge structures (XANES). P-type Si nanowires synthesized via electroless chemical etching from Si wafers of different doping levels and porous Si synthesized using electrochemical method are examined under X-ray excitation across the Si K-, L(3,2) -, and O K-edges. It is found that while as-prepared Si nanostructures are weak light emitters, intense visible luminescence is observed from thermally oxidized Si nanowires and porous Si. The luminescence mechanism of Si upon oxidation is investigated by oxidizing nanostructured Si at different temperatures. Interestingly, the two luminescence bands observed show different response with the variation of absorption coefficient upon Si and O core-electron excitation in elemental silicon and silicon oxide. A correlation between luminescence properties and electronic structures is thus established. The implications of the finding are discussed in terms of the behavior of the oxygen deficient center (OCD) and non-bridging oxygen hole center (NBOHC). Copyright © 2012 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  4. Indium tin oxide thin-films prepared by vapor phase pyrolysis for efficient silicon based solar cells

    Energy Technology Data Exchange (ETDEWEB)

    Simashkevich, Alexei, E-mail: alexeisimashkevich@hotmail.com [Institute of Applied Physics, 5 Academiei str., Chisinau, MD-2028, Republic of Moldova (Moldova, Republic of); Serban, Dormidont; Bruc, Leonid; Curmei, Nicolai [Institute of Applied Physics, 5 Academiei str., Chisinau, MD-2028, Republic of Moldova (Moldova, Republic of); Hinrichs, Volker [Institut für Heterogene Materialsysteme, Helmholtz-Zentrum Berlin für Materialien und Energie GmbH, Lise-Meitner Campus, Hahn-Meitner-Platz 1, 14109 Berlin (Germany); Rusu, Marin [Institute of Applied Physics, 5 Academiei str., Chisinau, MD-2028, Republic of Moldova (Moldova, Republic of); Institut für Heterogene Materialsysteme, Helmholtz-Zentrum Berlin für Materialien und Energie GmbH, Lise-Meitner Campus, Hahn-Meitner-Platz 1, 14109 Berlin (Germany)

    2016-07-01

    The vapor phase pyrolysis deposition method was developed for the preparation of indium tin oxide (ITO) thin films with thicknesses ranging between 300 and 400 nm with the sheet resistance of 10–15 Ω/sq. and the transparency in the visible region of the spectrum over 80%. The layers were deposited on the (100) surface of the n-type silicon wafers with the charge carriers concentration of ~ 10{sup 15} cm{sup −3}. The morphology of the ITO layers deposited on Si wafers with different surface morphologies, e.g., smooth (polished), rough (irregularly structured) and textured (by inversed pyramids) was investigated. The as-deposited ITO thin films consist of crystalline columns with the height of 300–400 nm and the width of 50–100 nm. Photovoltaic parameters of mono- and bifacial solar cells of Cu/ITO/SiO{sub 2}/n–n{sup +} Si/Cu prepared on Si (100) wafers with different surface structures were studied and compared. A maximum efficiency of 15.8% was achieved on monofacial solar cell devices with the textured Si surface. Bifacial photovoltaic devices from 100 μm thick Si wafers with the smooth surface have demonstrated efficiencies of 13.0% at frontal illumination and 10% at rear illumination. - Highlights: • ITO thin films prepared by vapor phase pyrolysis on Si (100) wafers with a smooth (polished), rough (irregularly structured) and textured (by inversed pyramids) surface. • Monofacial ITO/SiO2/n-n+Si solar cells with an efficiency of 15.8% prepared and bifacial PV devices with front- and rear-side efficiencies up to 13% demonstrated. • Comparative studies of photovoltaic properties of solar cells with different morphologies of the Si wafer surface presented.

  5. An experimental and theoretical study of pendellösung fringes in synchrotron section topographs of silicon wafers.

    Science.gov (United States)

    Partanen, J; Tuomi, T

    1990-01-01

    X-ray section topographs of nearly perfect Czochralski-grown wafers were made with synchrotron radiation having a continuous spectrum. An intensity curve measured from the x-ray film is compared to the calculated curve obtained using the dynamical theory of x-ray diffraction. A computer simulation of the topograph is also presented. A good agreement between theory and experiment is found except in the middle part of the topograph.

  6. Manipulation of polystyrene nanoparticles on a silicon wafer in the peak force tapping mode in water: pH-dependent friction and adhesion force

    Energy Technology Data Exchange (ETDEWEB)

    Schiwek, Simon; Stark, Robert W., E-mail: stark@csi.tu-darmstadt.de, E-mail: dietz@csi.tu-darmstadt.de; Dietz, Christian, E-mail: stark@csi.tu-darmstadt.de, E-mail: dietz@csi.tu-darmstadt.de [Center of Smart Interfaces, Technische Universität Darmstadt, Alarich-Weiss-Str. 10, 64287 Darmstadt (Germany); Physics of Surfaces, Institute of Materials Science, Technische Universität Darmstadt, Alarich-Weiss-Str. 16, 64287 Darmstadt (Germany); Heim, Lars-Oliver [Center of Smart Interfaces, Technische Universität Darmstadt, Alarich-Weiss-Str. 10, 64287 Darmstadt (Germany)

    2015-03-14

    The friction force between nanoparticles and a silicon wafer is a crucial parameter for cleaning processes in the semiconductor industry. However, little is known about the pH-dependency of the friction forces and the shear strength at the interface. Here, we push polystyrene nanoparticles, 100 nm in diameter, with the tip of an atomic force microscope and measure the pH-dependency of the friction, adhesion, and normal forces on a silicon substrate covered with a native silicon dioxide layer. The peak force tapping mode was applied to control the vertical force on these particles. We successively increased the applied load until the particles started to move. The main advantage of this technique over single manipulation processes is the achievement of a large number of manipulation events in short time and in a straightforward manner. Geometrical considerations of the interaction forces at the tip-particle interface allowed us to calculate the friction force and shear strength from the applied normal force depending on the pH of an aqueous solution. The results clearly demonstrated that particle removal should be performed with a basic solution at pH 9 because of the low interaction forces between particle and substrate.

  7. Elastocapillary folding of three dimensional micro-structures using water pumped through the wafer via a silicon nitride tube

    NARCIS (Netherlands)

    Legrain, A.B.H.; Berenschot, Johan W.; Sanders, Remco G.P.; Ma, Kechun; Tas, Niels Roelof; Abelmann, Leon

    2011-01-01

    In this paper we present the first investigation of a batch method for folding of threedimensional micrometer-sized silicon nitride structures by capillary forces. Silicon nitride tubes have been designed and fabricated using DRIE at the center of the planar origami patterns of the structures. Water

  8. Electrostatic bonding of thin (cycle sine 3 mil) 7070 cover glass to Ta2O5 AR-coated thin (cycle sine 2 mil) silicon wafers and solar cells

    Science.gov (United States)

    Egelkrout, D. W.

    1981-01-01

    Electrostatic bonding of thin cover glass to thin solar cells was researched. Silicon solar cells, wafers, and Corning 7070 glass of from about 0.002" to about 0.003" in thickness were used in the investigation to establish optimum parameters for producing mechanically acceptable bonds while minimizing thermal stresses and resultant solar cell electrical parameter degradation.

  9. Serial section scanning electron microscopy (S3EM) on silicon wafers for ultra-structural volume imaging of cells and tissues.

    Science.gov (United States)

    Horstmann, Heinz; Körber, Christoph; Sätzler, Kurt; Aydin, Daniel; Kuner, Thomas

    2012-01-01

    High resolution, three-dimensional (3D) representations of cellular ultrastructure are essential for structure function studies in all areas of cell biology. While limited subcellular volumes have been routinely examined using serial section transmission electron microscopy (ssTEM), complete ultrastructural reconstructions of large volumes, entire cells or even tissue are difficult to achieve using ssTEM. Here, we introduce a novel approach combining serial sectioning of tissue with scanning electron microscopy (SEM) using a conductive silicon wafer as a support. Ribbons containing hundreds of 35 nm thick sections can be generated and imaged on the wafer at a lateral pixel resolution of 3.7 nm by recording the backscattered electrons with the in-lens detector of the SEM. The resulting electron micrographs are qualitatively comparable to those obtained by conventional TEM. S(3)EM images of the same region of interest in consecutive sections can be used for 3D reconstructions of large structures. We demonstrate the potential of this approach by reconstructing a 31.7 µm(3) volume of a calyx of Held presynaptic terminal. The approach introduced here, Serial Section SEM (S(3)EM), for the first time provides the possibility to obtain 3D ultrastructure of large volumes with high resolution and to selectively and repetitively home in on structures of interest. S(3)EM accelerates process duration, is amenable to full automation and can be implemented with standard instrumentation.

  10. Serial section scanning electron microscopy (S3EM on silicon wafers for ultra-structural volume imaging of cells and tissues.

    Directory of Open Access Journals (Sweden)

    Heinz Horstmann

    Full Text Available High resolution, three-dimensional (3D representations of cellular ultrastructure are essential for structure function studies in all areas of cell biology. While limited subcellular volumes have been routinely examined using serial section transmission electron microscopy (ssTEM, complete ultrastructural reconstructions of large volumes, entire cells or even tissue are difficult to achieve using ssTEM. Here, we introduce a novel approach combining serial sectioning of tissue with scanning electron microscopy (SEM using a conductive silicon wafer as a support. Ribbons containing hundreds of 35 nm thick sections can be generated and imaged on the wafer at a lateral pixel resolution of 3.7 nm by recording the backscattered electrons with the in-lens detector of the SEM. The resulting electron micrographs are qualitatively comparable to those obtained by conventional TEM. S(3EM images of the same region of interest in consecutive sections can be used for 3D reconstructions of large structures. We demonstrate the potential of this approach by reconstructing a 31.7 µm(3 volume of a calyx of Held presynaptic terminal. The approach introduced here, Serial Section SEM (S(3EM, for the first time provides the possibility to obtain 3D ultrastructure of large volumes with high resolution and to selectively and repetitively home in on structures of interest. S(3EM accelerates process duration, is amenable to full automation and can be implemented with standard instrumentation.

  11. Passivating electron contact based on highly crystalline nanostructured silicon oxide layers for silicon solar cells

    Czech Academy of Sciences Publication Activity Database

    Stuckelberger, J.; Nogay, G.; Wyss, P.; Jeangros, Q.; Allebe, Ch.; Debrot, F.; Niquille, X.; Ledinský, Martin; Fejfar, Antonín; Despeisse, M.; Haug, F.J.; Löper, P.; Ballif, C.

    2016-01-01

    Roč. 158, Dec (2016), s. 2-10 ISSN 0927-0248 R&D Projects: GA MŠk LM2015087 Institutional support: RVO:68378271 Keywords : surface passivation * passivating contact * nanostructure * silicon oxide * nanocrystalline * microcrystalline * poly-silicon * crystallization * Raman * transmission line measurement Subject RIV: BM - Solid Matter Physics ; Magnetism Impact factor: 4.784, year: 2016

  12. Silicon oxide nanoimprint stamp fabrication by edge lithography reinforced with silicon nitride

    NARCIS (Netherlands)

    Zhao, Yiping; Berenschot, Johan W.; de Boer, Meint J.; Jansen, Henricus V.; Tas, Niels Roelof; Huskens, Jurriaan; Elwenspoek, Michael Curt

    2007-01-01

    The fabrication of silicon oxide nanoimprint stamp employing edge lithography in combination with silicon nitride deposition is presented. The fabrication process is based on conventional photolithography an weg etching methods. Nanoridges with width dimension of sub-20 nm were fabricated by edge

  13. Development of Doped Microcrystalline Silicon Oxide and its Application to Thin‑Film Silicon Solar Cells

    NARCIS (Netherlands)

    Lambertz, A.

    2015-01-01

    The aim of the present study is the development of doped microcrystalline silicon oxide (µc‑SiOx:H) alloys and its application in thin‑film silicon solar cells. The doped µc‑SiOx:H material was prepared from carbon dioxide (CO2), silane (SiH4), hydrogen (H2) gas mixtures using plasma enhanced

  14. Indium oxide/n-silicon heterojunction solar cells

    Science.gov (United States)

    Feng, Tom; Ghosh, Amal K.

    1982-12-28

    A high photo-conversion efficiency indium oxide/n-silicon heterojunction solar cell is spray deposited from a solution containing indium trichloride. The solar cell exhibits an Air Mass One solar conversion efficiency in excess of about 10%.

  15. Density of oxidation-induced stacking faults in damaged silicon

    NARCIS (Netherlands)

    Kuper, F.G.; Hosson, J.Th.M. De; Verwey, J.F.

    1986-01-01

    A model for the relation between density and length of oxidation-induced stacking faults on damaged silicon surfaces is proposed, based on interactions of stacking faults with dislocations and neighboring stacking faults. The model agrees with experiments.

  16. Fabrication of SGOI material by oxidation of an epitaxial SiGe layer on an SOI wafer with H ions implantation

    International Nuclear Information System (INIS)

    Cheng Xinli; Chen Zhijun; Wang Yongjin; Jin Bo; Zhang Feng; Zou Shichang

    2005-01-01

    SGOI materials were fabricated by thermal dry oxidation of epitaxial H-ion implanted SiGe layers on SOI wafers. The hydrogen implantation was found to delay the oxidation rate of SiGe layer and to decrease the loss of Ge atoms during oxidation. Further, the H implantation did not degrade the crystallinity of SiGe layer during fabrication of the SGOI

  17. Toward Annealing-Stable Molybdenum-Oxide-Based Hole-Selective Contacts For Silicon Photovoltaics

    KAUST Repository

    Essig, Stephanie

    2018-02-21

    Molybdenum oxide (MoOX) combines a high work function with broadband optical transparency. Sandwiched between a hydrogenated intrinsic amorphous silicon passivation layer and a transparent conductive oxide, this material allows a highly efficient hole-selective front contact stack for crystalline silicon solar cells. However, hole extraction from the Si wafer and transport through this stack degrades upon annealing at 190 °C, which is needed to cure the screen-printed Ag metallization applied to typical Si solar cells. Here, we show that effusion of hydrogen from the adjacent layers is a likely cause for this degradation, highlighting the need for hydrogen-lean passivation layers when using such metal-oxide-based carrier-selective contacts. Pre-MoOX-deposition annealing of the passivating a-Si:H layer is shown to be a straightforward approach to manufacturing MoOX-based devices with high fill factors using screen-printed metallization cured at 190 °C.

  18. Off-line wafer level reliability control: unique measurement method to monitor the lifetime indicator of gate oxide validated within bipolar/CMOS/DMOS technology

    Science.gov (United States)

    Gagnard, Xavier; Bonnaud, Olivier

    2000-08-01

    We have recently published a paper on a new rapid method for the determination of the lifetime of the gate oxide involved in a Bipolar/CMOS/DMOS technology (BCD). Because this previous method was based on a current measurement with gate voltage as a parameter needing several stress voltages, it was applied only by lot sampling. Thus, we tried to find an indicator in order to monitor the gate oxide lifetime during the wafer level parametric test and involving only one measurement of the device on each wafer test cell. Using the Weibull law and Crook model, combined with our recent model, we have developed a new test method needing only one electrical measurement of MOS capacitor to monitor the quality of the gate oxide. Based also on a current measurement, the parameter is the lifetime indicator of the gate oxide. From the analysis of several wafers, we gave evidence of the possibility to detect a low performance wafer, which corresponds to the infantile failure on the Weibull plot. In order to insert this new method in the BCD parametric program, a parametric flowchart was established. This type of measurement is an important challenges, because the actual measurements, breakdown charge, Qbd, and breakdown electric field, Ebd, at parametric level and Ebd and interface states density, Dit during the process cannot guarantee the gate oxide lifetime all along fabrication process. This indicator measurement is the only one, which predicts the lifetime decrease.

  19. The influence of initial defects on mechanical stress and deformation distribution in oxidized silicon

    Directory of Open Access Journals (Sweden)

    Kulinich O. A.

    2008-10-01

    Full Text Available The near-surface silicon layers in silicon – dioxide silicon systems with modern methods of research are investigated. It is shown that these layers have compound structure and their parameters depend on oxidation and initial silicon parameters. It is shown the influence of initial defects on mechanical stress and deformation distribution in oxidized silicon.

  20. Crystallization behavior of polyethylene on silicon wafers in solution casting processes traced by time-resolved measurements of synchrotron grazing-incidence small-angle and wide-angle X-ray scattering

    International Nuclear Information System (INIS)

    Sasaki, S; Masunaga, H; Takata, M; Itou, K; Tashiro, K; Okuda, H; Takahara, A

    2009-01-01

    Crystallization behavior of polyethylene (PE) on silicon wafers in solution casting processes has been successfully traced by time-resolved grazing-incidence small-angle and wide-angle X-ray scattering (GISWAXS) measurements utilizing synchrotron radiation. A p-xylene solution of PE kept at ca. 343 K was dropped on a silicon wafer at ca. 298 K. While the p-xylene evaporated naturally from the dropped solution sample, PE chains crystallized to be a thin film. Raman spectral measurements were performed simultaneously with the GISWAXS measurements to evaluate quantitatively the p-xylene the dropped solution contained. Grazing-incidence wide-angle X-ray scattering (GIWAXS) patterns indicated nucleation and crystal growth in the dropped solution and the following as-cast film. GIWAXS and Raman spectral data revealed that crystallization of PE was enhanced after complete evaporation of the p-xylene from the dropped solution. The [110] and [200] directions of the orthorhombic PE crystal became relatively parallel to the wafer surface with time, which implied that the flat-on lamellae with respect to the wafer surface were mainly formed in the as-cast film. On the other hand, grazing-incidence small-angle X-ray scattering (GISAXS) patterns implied formation of isolated lamellae in the dropped solution. The lamellae and amorphous might alternatively be stacked in the preferred direction perpendicular to the wafer surface. The synchrotron GISWAXS experimental method could be applied for kinetic study on hierarchical structure of polymer thin films.

  1. Oxidation of ultra low carbon and silicon bearing steels

    Energy Technology Data Exchange (ETDEWEB)

    Suarez, Lucia [CTM - Technologic Centre, Materials Technology Area, Manresa, Barcelona (Spain)], E-mail: lucia.suarez@ctm.com.es; Rodriguez-Calvillo, Pablo [CTM - Technologic Centre, Materials Technology Area, Manresa, Barcelona (Spain)], E-mail: pablo.rodriguez@ctm.com.es; Houbaert, Yvan [Department of Materials Science and Engineering, University of Ghent (Belgium)], E-mail: Yvan.Houbaert@UGent.be; Colas, Rafael [Facultad de Ingenieria Mecanica y Electrica, Universidad Autonoma de Nuevo Leon (Mexico)], E-mail: rcolas@mail.uanl.mx

    2010-06-15

    Oxidation tests were carried out in samples from an ultra low carbon and two silicon bearing steels to determine the distribution and morphology of the oxide species present. The ultra low carbon steel was oxidized for short periods of time within a chamber designed to obtain thin oxide layers by controlling the atmosphere, and for longer times in an electric furnace; the silicon steels were reheated only in the electric furnace. The chamber was constructed to study the behaviour encountered during the short period of time between descaling and rolling in modern continuous mills. It was found that the oxide layers formed on the samples reheated in the electric furnace were made of different oxide species. The specimens treated in the chamber had layers made almost exclusively of wustite. Selected oxide samples were studied by scanning electron microscopy to obtain electron backscattered diffraction patterns, which were used to identify the oxide species in the layer.

  2. Oxide layers for silicon detector protection against enviroment effects

    International Nuclear Information System (INIS)

    Bel'tsazh, E.; Brylovska, I.; Valerian, M.

    1986-01-01

    It is shown that for protection of silicon detectors of nuclear radiations oxide layers could be used. The layers are produced by electrochemical oxidation of silicon surface with the following low-temperature annealing. These layers have characteristics similar to those for oxide layers produced by treatment of silicon samples at elevated temperature in oxygen flow. To determine properties of oxide layers produced by electrochemical oxidation the α-particle back-scattering method and the method of volt-farad characteristics were used. Protection properties of such layers were checked on the surface-barrier detectors. It was shown that protection properties of such detectors were conserved during long storage at room temperature and during their storage under wet-bulb temperature. Detectors without protection layer have worsened their characteristics

  3. Catalytic oxidation of silicon by cesium ion bombardment

    International Nuclear Information System (INIS)

    Souzis, A.E.; Huang, H.; Carr, W.E.; Seidl, M.

    1991-01-01

    Results for room-temperature oxidation of silicon using cesium ion bombardment and low oxygen exposure are presented. Bombardment with cesium ions is shown to allow oxidation at O 2 pressures orders of magnitude smaller than with noble gas ion bombardment. Oxide layers of up to 30 A in thickness are grown with beam energies ranging from 20--2000 eV, O 2 pressures from 10 -9 to 10 -6 Torr, and total O 2 exposures of 10 0 to 10 4 L. Results are shown to be consistent with models indicating that initial oxidation of silicon is via dissociative chemisorption of O 2 , and that the low work function of the cesium- and oxygen-coated silicon plays the primary role in promoting the oxidation process

  4. Fabrication of heterojunction solar cells by using microcrystalline hydrogenated silicon oxide film as an emitter

    International Nuclear Information System (INIS)

    Banerjee, Chandan; Sritharathikhun, Jaran; Konagai, Makoto; Yamada, Akira

    2008-01-01

    Wide gap, highly conducting n-type hydrogenated microcrystalline silicon oxide (μc-SiO : H) films were prepared by very high frequency plasma enhanced chemical vapour deposition at a very low substrate temperature (170 deg. C) as an alternative to amorphous silicon (a-Si : H) for use as an emitter layer of heterojunction solar cells. The optoelectronic properties of n-μc-SiO : H films prepared for the emitter layer are dark conductivity = 0.51 S cm -1 at 20 nm thin film, activation energy = 23 meV and E 04 = 2.3 eV. Czochralski-grown 380 μm thick p-type (1 0 0) oriented polished silicon wafers with a resistivity of 1-10 Ω cm were used for the fabrication of heterojunction solar cells. Photovoltaic parameters of the device were found to be V oc = 620 mV, J sc = 32.1 mA cm -2 , FF = 0.77, η = 15.32% (active area efficiency)

  5. A review of oxide, silicon nitride, and silicon carbide brazing

    International Nuclear Information System (INIS)

    Santella, M.L.; Moorhead, A.J.

    1987-01-01

    There is growing interest in using ceramics for structural applications, many of which require the fabrication of components with complicated shapes. Normal ceramic processing methods restrict the shapes into which these materials can be produced, but ceramic joining technology can be used to overcome many of these limitations, and also offers the possibility for improving the reliability of ceramic components. One method of joining ceramics is by brazing. The metallic alloys used for bonding must wet and adhere to the ceramic surfaces without excessive reaction. Alumina, partially stabilized zirconia, and silicon nitride have high ionic character to their chemical bonds and are difficult to wet. Alloys for brazing these materials must be formulated to overcome this problem. Silicon carbide, which has some metallic characteristics, reacts excessively with many alloys, and forms joints of low mechanical strength. The brazing characteristics of these three types of ceramics, and residual stresses in ceramic-to-metal joints are briefly discussed

  6. Wafer bonding applications and technology

    CERN Document Server

    Gösele, Ulrich

    2004-01-01

    During the past decade direct wafer bonding has developed into a mature materials integration technology. This book presents state-of-the-art reviews of the most important applications of wafer bonding written by experts from industry and academia. The topics include bonding-based fabrication methods of silicon-on-insulator, photonic crystals, VCSELs, SiGe-based FETs, MEMS together with hybrid integration and laser lift-off. The non-specialist will learn about the basics of wafer bonding and its various application areas, while the researcher in the field will find up-to-date information about this fast-moving area, including relevant patent information.

  7. Device fabrication and transport measurements of FinFETs built with 28Si SOI wafers towards donor qubits in silicon

    Energy Technology Data Exchange (ETDEWEB)

    Lo, Cheuk Chi; Persaud, Arun; Dhuey, Scott; Olynick, Deirdre; Borondics, Ferenc; Martin, Michael C.; Bechtel, Hans A.; Bokor, Jeffrey; Schenkel, Thomas

    2009-06-10

    We report fabrication of transistors in a FinFET geometry using isotopically purified silicon-28 -on-insulator (28-SOI) substrates. Donor electron spin coherence in natural silicon is limited by spectral diffusion due to the residual 29Si nuclear spin bath, making isotopically enriched nuclear spin-free 28Si substrates a promising candidate for forming spin quantum bit devices. The FinFET architecture is fully compatible with single-ion implant detection for donor-based qubits, and the donor spin-state readout through electrical detection of spin resonance. We describe device processing steps and discuss results on electrical transport measurements at 0.3 K.

  8. Evaluation of the soft x-ray reflectivity of micropore optics using anisotropic wet etching of silicon wafers.

    Science.gov (United States)

    Mitsuishi, Ikuyuki; Ezoe, Yuichiro; Koshiishi, Masaki; Mita, Makoto; Maeda, Yoshitomo; Yamasaki, Noriko Y; Mitsuda, Kazuhisa; Shirata, Takayuki; Hayashi, Takayuki; Takano, Takayuki; Maeda, Ryutaro

    2010-02-20

    The x-ray reflectivity of an ultralightweight and low-cost x-ray optic using anisotropic wet etching of Si (110) wafers is evaluated at two energies, C K(alpha)0.28 keV and Al K(alpha)1.49 keV. The obtained reflectivities at both energies are not represented by a simple planar mirror model considering surface roughness. Hence, an geometrical occultation effect due to step structures upon the etched mirror surface is taken into account. Then, the reflectivities are represented by the theoretical model. The estimated surface roughness at C K(alpha) (approximately 6 nm rms) is significantly larger than approximately 1 nm at Al K(alpha). This can be explained by different coherent lengths at two energies.

  9. Evaluation of the soft x-ray reflectivity of micropore optics using anisotropic wet etching of silicon wafers

    Energy Technology Data Exchange (ETDEWEB)

    Mitsuishi, Ikuyuki; Ezoe, Yuichiro; Koshiishi, Masaki; Mita, Makoto; Maeda, Yoshitomo; Yamasaki, Noriko Y.; Mitsuda, Kazuhisa; Shirata, Takayuki; Hayashi, Takayuki; Takano, Takayuki; Maeda, Ryutaro

    2010-02-20

    The x-ray reflectivity of an ultralightweight and low-cost x-ray optic using anisotropic wet etching of Si (110) wafers is evaluated at two energies, C K{alpha}0.28 keV and Al K{alpha}1.49 keV. The obtained reflectivities at both energies are not represented by a simple planar mirror model considering surface roughness. Hence, an geometrical occultation effect due to step structures upon the etched mirror surface is taken into account. Then, the reflectivities are represented by the theoretical model. The estimated surface roughness at C K{alpha} ({approx}6 nm rms) is significantly larger than {approx}1 nm at Al K{alpha}. This can be explained by different coherent lengths at two energies.

  10. Characterization of the first double-sided 3D radiation sensors fabricated at FBK on 6-inch silicon wafers

    International Nuclear Information System (INIS)

    Sultan, D.M.S.; Mendicino, R.; Betta, G.-F. Dalla; Boscardin, M.; Ronchin, S.; Zorzi, N.

    2015-01-01

    Following 3D pixel sensor production for the ATLAS Insertable B-Layer, Fondazione Bruno Kessler (FBK) fabrication facility has recently been upgraded to process 6-inch wafers. In 2014, a test batch was fabricated to check for possible issues relevant to this upgrade. While maintaining a double-sided fabrication technology, some process modifications have been investigated. We report here on the technology and the design of this batch, and present selected results from the electrical characterization of sensors and test structures. Notably, the breakdown voltage is shown to exceed 200 V before irradiation, much higher than in earlier productions, demonstrating robustness in terms of radiation hardness for forthcoming productions aimed at High Luminosity LHC upgrades

  11. Study of thickness and uniformity of oxide passivation with DI-O3 on silicon substrate for electronic and photonic applications

    Science.gov (United States)

    Sharma, Mamta; Hazra, Purnima; Singh, Satyendra Kumar

    2018-05-01

    Since the beginning of semiconductor fabrication technology evolution, clean and passivated substrate surface is one of the prime requirements for fabrication of Electronic and optoelectronic device fabrication. However, as the scale of silicon circuits and device architectures are continuously decreased from micrometer to nanometer (from VLSI to ULSI technology), the cleaning methods to achieve better wafer surface qualities has raised research interests. The development of controlled and uniform silicon dioxide is the most effective and reliable way to achieve better wafer surface quality for fabrication of electronic devices. On the other hand, in order to meet the requirement of high environment safety/regulatory standards, the innovation of cleaning technology is also in demand. The controlled silicon dioxide layer formed by oxidant de-ionized ozonated water has better uniformity. As the uniformity of the controlled silicon dioxide layer is improved on the substrate, it enhances the performance of the devices. We can increase the thickness of oxide layer, by increasing the ozone time treatment. We reported first time to measurement of thickness of controlled silicon dioxide layer and obtained the uniform layer for same ozone time.

  12. Waveguiding properties of Er-implanted silicon-rich oxides

    International Nuclear Information System (INIS)

    Elliman, R.G.; Forcales, M.; Wilkinson, A.R.; Smith, N.J.

    2007-01-01

    The optical properties of erbium-doped silicon-rich silicon-oxide waveguides containing amorphous silicon nanoclusters and/or silicon nanocrystals are reported. Both amorphous nanoclusters and nanocrystals are shown to act as effective sensitizers for Er, with nanocrystals being more effective at low pump powers and nanoclusters being more effective at higher pump powers. All samples are shown to exhibit photo-induced absorption, as measured for a guided 1.5 μm probe beam while the waveguide was illuminated from above with a 477 nm pump beam. At a given pump power samples containing silicon nanocrystals exhibited greater attenuation than samples containing amorphous nanoclusters. The absorption is shown to be consistent with confined-carrier absorption due to photoexcited carriers in the nanocrystals and/or nanoclusters

  13. Carbon nanotube network-silicon oxide non-volatile switches.

    Science.gov (United States)

    Liao, Albert D; Araujo, Paulo T; Xu, Runjie; Dresselhaus, Mildred S

    2014-12-08

    The integration of carbon nanotubes with silicon is important for their incorporation into next-generation nano-electronics. Here we demonstrate a non-volatile switch that utilizes carbon nanotube networks to electrically contact a conductive nanocrystal silicon filament in silicon dioxide. We form this device by biasing a nanotube network until it physically breaks in vacuum, creating the conductive silicon filament connected across a small nano-gap. From Raman spectroscopy, we observe coalescence of nanotubes during breakdown, which stabilizes the system to form very small gaps in the network~15 nm. We report that carbon nanotubes themselves are involved in switching the device to a high resistive state. Calculations reveal that this switching event occurs at ~600 °C, the temperature associated with the oxidation of nanotubes. Therefore, we propose that, in switching to a resistive state, the nanotube oxidizes by extracting oxygen from the substrate.

  14. Oxidation under electron bombardment. A tool for studying the initial states of silicon oxidation

    Energy Technology Data Exchange (ETDEWEB)

    Carriere, B.; Deville, J.P.; El Maachi, A.

    1987-06-01

    The exciting beam of an Auger electron spectrometer has been used to monitor the oxidation of silicon single crystals at room temperature and very low pressures of oxygen (approx. 10/sup -7/ Torr). This process allows us to build ultra-thin layers of silica on silicon (down to 30 A) but it is mostly used to investigate the mechanisms of the initial stages of oxidation. Auger spectra recorded continuously during the oxidation process provide information on (1) the nature of the silicon-oxygen chemical bonds which are interpreted through fine structure in the Auger peak, and (2) the kinetics of oxide formation which are deduced from curves of Auger signal versus time. An account is given of the contribution of these Auger studies to the description of the intermediate oxide layer during the reaction between silicon and oxygen and the influence of surface structural disorder, induced mainly by argon-ion bombardment, is discussed in terms of reactivity and oxide coverage.

  15. Oxidation of mullite-zirconia-alumina-silicon carbide composites

    International Nuclear Information System (INIS)

    Baudin, C.; Moya, J.S.

    1990-01-01

    This paper reports the isothermal oxidation of mullite-alumina-zirconia-silicon carbide composites obtained by reaction sintering studied in the temperature interval 800 degrees to 1400 degrees C. The kinetics of the oxidation process was related to the viscosity of the surface glassy layer as well as to the crystallization of the surface film. The oxidation kinetics was halted to T ≤ 1300 degrees C, presumably because of crystallization

  16. Oxidation kinetics of CVD silicon carbide and silicon nitride

    Science.gov (United States)

    Fox, Dennis S.

    1992-01-01

    The long-term oxidation behavior of pure, monolithic CVD SiC and Si3N4 is studied, and the isothermal oxidation kinetics of these two materials are obtained for the case of 100 hrs at 1200-1500 C in flowing oxygen. Estimates are made of lifetimes at the various temperatures investigated. Parabolic rate constants for SiC are within an order of magnitude of shorter exposure time values reported in the literature. The resulting silica scales are in the form of cristobalite, with cracks visible after exposure. The oxidation protection afforded by silica for these materials is adequate for long service times under isothermal conditions in 1-atm dry oxygen.

  17. Study of Silicon/silicon, Silicon/silicon Dioxide, and Metal-Oxide

    Science.gov (United States)

    Leung, To Chi

    A variable-energy positron beam is used to study Si/Si, Si/SiO_2, and metal-oxide -semiconductor (MOS) structures. The capability of depth resolution and the remarkable sensitivity to defects have made the positron annihilation technique a unique tool in detecting open-volume defects in the newly innovated low temperature (300^circC) molecular-beam-epitaxy (MBE) Si/Si. These two features of the positron beam have further shown its potential role in the study of the Si/SiO_2. Distinct annihilation characteristics has been observed at the interface and has been studied as a function of the sample growth conditions, annealing (in vacuum), and hydrogen exposure. The MOS structure provides an effective way to study the electrical properties of the Si/SiO_2 interface as a function of applied bias voltage. The annihilation characteristics show a large change as the device condition is changed from accumulation to inversion. The effect of forming gas (FG) anneal is studied using positron annihilation and the result is compared with capacitance-voltage (C -V) measurements. The reduction in the number of interface states is found correlated with the changes in the positron spectra. The present study shows the importance of the positron annihilation technique as a non-contact, non-destructive, and depth-sensitive characterization tool to study the Si-related systems, in particular, the Si/SiO_2 interface which is of crucial importance in semiconductor technology, and fundamental understanding of the defects responsible for degradation of the electrical properties.

  18. Porous Silicon Nanowires

    Science.gov (United States)

    Qu, Yongquan; Zhou, Hailong; Duan, Xiangfeng

    2011-01-01

    In this minreview, we summarize recent progress in the synthesis, properties and applications of a new type of one-dimensional nanostructures — single crystalline porous silicon nanowires. The growth of porous silicon nanowires starting from both p- and n-type Si wafers with a variety of dopant concentrations can be achieved through either one-step or two-step reactions. The mechanistic studies indicate the dopant concentration of Si wafers, oxidizer concentration, etching time and temperature can affect the morphology of the as-etched silicon nanowires. The porous silicon nanowires are both optically and electronically active and have been explored for potential applications in diverse areas including photocatalysis, lithium ion battery, gas sensor and drug delivery. PMID:21869999

  19. Structural and electrical characteristics of high-k/metal gate metal oxide semiconductor capacitors fabricated on flexible, semi-transparent silicon (100) fabric

    KAUST Repository

    Rojas, Jhonathan Prieto

    2013-02-12

    In pursuit of flexible computers with high performance devices, we demonstrate a generic process to fabricate 10 000 metal-oxide-semiconductor capacitors (MOSCAPs) with semiconductor industry\\'s most advanced high-k/metal gate stacks on widely used, inexpensive bulk silicon (100) wafers and then using a combination of iso-/anisotropic etching to release the top portion of the silicon with the already fabricated devices as a mechanically flexible (bending curvature of 133 m−1), optically semi-transparent silicon fabric (1.5 cm × 3 cm × 25 μm). The electrical characteristics show 3.7 nm effective oxide thickness, −0.2 V flat band voltage, and no hysteresis from the fabricated MOSCAPs.

  20. Structural and electrical characteristics of high-k/metal gate metal oxide semiconductor capacitors fabricated on flexible, semi-transparent silicon (100) fabric

    KAUST Repository

    Rojas, Jhonathan Prieto; Hussain, Muhammad Mustafa; Sevilla, Galo T.

    2013-01-01

    In pursuit of flexible computers with high performance devices, we demonstrate a generic process to fabricate 10 000 metal-oxide-semiconductor capacitors (MOSCAPs) with semiconductor industry's most advanced high-k/metal gate stacks on widely used, inexpensive bulk silicon (100) wafers and then using a combination of iso-/anisotropic etching to release the top portion of the silicon with the already fabricated devices as a mechanically flexible (bending curvature of 133 m−1), optically semi-transparent silicon fabric (1.5 cm × 3 cm × 25 μm). The electrical characteristics show 3.7 nm effective oxide thickness, −0.2 V flat band voltage, and no hysteresis from the fabricated MOSCAPs.

  1. Structural and photoluminescent properties of a composite tantalum oxide and silicon nanocrystals embedded in a silicon oxide film

    International Nuclear Information System (INIS)

    Díaz-Becerril, T.; Herrera, V.; Morales, C.; García-Salgado, G.; Rosendo, E.; Coyopol, A.; Galeazzi, R.; Romano, R.; Nieto-Caballero, F.G.; Sarmiento, J.

    2017-01-01

    Tantalum oxide crystals encrusted in a silicon oxide matrix were synthesized by using a hot filament chemical vapor deposition system (HFCVD). A solid source composed by a mixture in different percentages of Ta 2 O 5 and silicon (Si) powders were used as reactants. The films were grown at 800 °C and 1000 °C under hydrogen ambient. The deposited films were characterized by X-ray photoelectron spectroscopy (XPS), high-resolution transmission electron microscopy (HRTEM) and photoluminescence (PL) at room temperature. From the XPS results it was confirmed the formation of a mixture of Tantalum oxide, silicon oxide and Si nanoparticles (Ta 2 O 5- SiO 2 -Si(nc)) as seen from the Si (2p) and Ta (4f) lines corresponding to Si + and Ta + states respectively. Ta 2 O 5 and Si nanocrystals (Si-NCs) embedded in the silicon oxide films were observed on HRTEM images which corroborate the XPS results. Finally the emission properties of the films exhibited a broad band from 400 to 850 nm caused by the independent PL properties of tantalum oxide and Si-NCs that compose the film. The intensity of the emissions was observed to be dependent on both temperature of deposition and the ratio Ta 2 O 5 /Si, used as initial reactants. Results from this work might supply useful data for the development of future light emitter devices.

  2. Temperature-dependent interface characteristic of silicon wafer bonding based on an amorphous germanium layer deposited by DC-magnetron sputtering

    Science.gov (United States)

    Ke, Shaoying; Lin, Shaoming; Ye, Yujie; Mao, Danfeng; Huang, Wei; Xu, Jianfang; Li, Cheng; Chen, Songyan

    2018-03-01

    We report a near-bubble-free low-temperature silicon (Si) wafer bonding with a thin amorphous Ge (a-Ge) intermediate layer. The DC-magnetron-sputtered a-Ge film on Si is demonstrated to be extremely flat (RMS = 0.28 nm) and hydrophilic (contact angle = 3°). The effect of the post-annealing temperature on the surface morphology and crystallinity of a-Ge film at the bonded interface is systematically identified. The relationship among the bubble density, annealing temperature, and crystallinity of a-Ge film is also clearly clarified. The crystallization of a-Ge film firstly appears at the bubble region. More interesting feature is that the crystallization starts from the center of the bubbles and sprawls to the bubble edge gradually. The H2 by-product is finally absorbed by intermediate Ge layer with crystalline phase after post annealing. Moreover, the whole a-Ge film out of the bubble totally crystallizes when the annealing time increases. This Ge integration at the bubble region leads to the decrease of the bubble density, which in turn increases the bonding strength.

  3. Co-Design Method and Wafer-Level Packaging Technique of Thin-Film Flexible Antenna and Silicon CMOS Rectifier Chips for Wireless-Powered Neural Interface Systems

    Directory of Open Access Journals (Sweden)

    Kenji Okabe

    2015-12-01

    Full Text Available In this paper, a co-design method and a wafer-level packaging technique of a flexible antenna and a CMOS rectifier chip for use in a small-sized implantable system on the brain surface are proposed. The proposed co-design method optimizes the system architecture, and can help avoid the use of external matching components, resulting in the realization of a small-size system. In addition, the technique employed to assemble a silicon large-scale integration (LSI chip on the very thin parylene film (5 μm enables the integration of the rectifier circuits and the flexible antenna (rectenna. In the demonstration of wireless power transmission (WPT, the fabricated flexible rectenna achieved a maximum efficiency of 0.497% with a distance of 3 cm between antennas. In addition, WPT with radio waves allows a misalignment of 185% against antenna size, implying that the misalignment has a less effect on the WPT characteristics compared with electromagnetic induction.

  4. Electrodeposition of three-dimensionally assembled platinum spheres on a gold-coated silicon wafer, and its application to nonenzymatic sensing of glucose

    International Nuclear Information System (INIS)

    Roh, Seongjin; Kim, Jongwon

    2015-01-01

    We report on a method of single-step electrodeposition of three-dimensionally (3-D) assembled Pt spheres on a gold-coated silicon wafer. The 3-D interconnected Pt spheres could be electrodeposited by applying a negative potential (−0.8 V, vs. Ag/AgCl) in neutral electrolytes containing KClO 4 . The application of such a negative potential is not possible in acidic solutions because of the formation of hydrogen. Scanning electron microscopy revealed that the seed Pt particles first grew to a certain size, and then form Pt spheres interconnected in multiple layers. The resulting 3-D assembled Pt sphere structures warrants a high surface area, and this property was utilized for the selective and sensitive amperometric determination of glucose at a working potential of 0.4 V (vs. Ag/AgCl), at near neutral pH values and in the presence of 0.1 M chloride. This straightforward method for the fabrication of 3-D assembled Pt sphere structures offers new opportunities for electroanalytical and electrocatalytic sensing based on porous Pt surfaces (author)

  5. Co-Design Method and Wafer-Level Packaging Technique of Thin-Film Flexible Antenna and Silicon CMOS Rectifier Chips for Wireless-Powered Neural Interface Systems.

    Science.gov (United States)

    Okabe, Kenji; Jeewan, Horagodage Prabhath; Yamagiwa, Shota; Kawano, Takeshi; Ishida, Makoto; Akita, Ippei

    2015-12-16

    In this paper, a co-design method and a wafer-level packaging technique of a flexible antenna and a CMOS rectifier chip for use in a small-sized implantable system on the brain surface are proposed. The proposed co-design method optimizes the system architecture, and can help avoid the use of external matching components, resulting in the realization of a small-size system. In addition, the technique employed to assemble a silicon large-scale integration (LSI) chip on the very thin parylene film (5 μm) enables the integration of the rectifier circuits and the flexible antenna (rectenna). In the demonstration of wireless power transmission (WPT), the fabricated flexible rectenna achieved a maximum efficiency of 0.497% with a distance of 3 cm between antennas. In addition, WPT with radio waves allows a misalignment of 185% against antenna size, implying that the misalignment has a less effect on the WPT characteristics compared with electromagnetic induction.

  6. Superparamagnetic iron oxide nanoparticle attachment on array of micro test tubes and microbeakers formed on p-type silicon substrate for biosensor applications

    Directory of Open Access Journals (Sweden)

    Raja Sufi

    2011-01-01

    Full Text Available Abstract A uniformly distributed array of micro test tubes and microbeakers is formed on a p-type silicon substrate with tunable cross-section and distance of separation by anodic etching of the silicon wafer in N, N-dimethylformamide and hydrofluoric acid, which essentially leads to the formation of macroporous silicon templates. A reasonable control over the dimensions of the structures could be achieved by tailoring the formation parameters, primarily the wafer resistivity. For a micro test tube, the cross-section (i.e., the pore size as well as the distance of separation between two adjacent test tubes (i.e., inter-pore distance is typically approximately 1 μm, whereas, for a microbeaker the pore size exceeds 1.5 μm and the inter-pore distance could be less than 100 nm. We successfully synthesized superparamagnetic iron oxide nanoparticles (SPIONs, with average particle size approximately 20 nm and attached them on the porous silicon chip surface as well as on the pore walls. Such SPION-coated arrays of micro test tubes and microbeakers are potential candidates for biosensors because of the biocompatibility of both silicon and SPIONs. As acquisition of data via microarray is an essential attribute of high throughput bio-sensing, the proposed nanostructured array may be a promising step in this direction.

  7. The silicon-silicon oxide multilayers utilization as intrinsic layer on pin solar cells

    International Nuclear Information System (INIS)

    Colder, H.; Marie, P.; Gourbilleau, F.

    2008-01-01

    Silicon nanostructures are promising candidate for the intrinsic layer on pin solar cells. In this work we report on new material: silicon-rich silicon oxide (SRSO) deposited by reactive magnetron sputtering of a pure silica target and an interesting structure: multilayers consisting of a stack of SRSO and pure silicon oxide layers. Two thicknesses of the SRSO sublayer, t SRSO , are studied 3 nm and 5 nm whereas the thickness of silica sublayer is maintaining at 3 nm. The presence of nanocrystallites of silicon, evidenced by X-Ray diffraction (XRD), leads to photoluminescence (PL) emission at room temperature due to the quantum confinement of the carriers. The PL peak shifts from 1.3 eV to 1.5 eV is correlated to the decreasing of t SRSO from 5 nm down to 3 nm. In the purpose of their potential utilization for i-layer, the optical properties are studied by absorption spectroscopy. The achievement a such structures at promising absorption properties. Moreover by favouring the carriers injection by the tunnel effect between silicon nanograins and silica sublayers, the multilayers seem to be interesting for solar cells

  8. Effect of annealing on silicon heterojunction solar cells with textured ZnO:Al as transparent conductive oxide

    Directory of Open Access Journals (Sweden)

    Roca i Cabarrocas P.

    2012-07-01

    Full Text Available We report on silicon heterojunction solar cells using textured aluminum doped zinc oxide (ZnO:Al as a transparent conductive oxide (TCO instead of flat indium tin oxide. Double side silicon heterojunction solar cell were fabricated by radio frequency plasma enhanced chemical vapor deposition on high life time N-type float zone crystalline silicon wafers. On both sides of these cells we have deposited by radio frequency magnetron sputtering ZnO:Al layers of thickness ranging from 800 nm to 1400 nm. These TCO layers were then textured by dipping the samples in a 0.5% hydrochloric acid. External quantum efficiency as well as I-V under 1 sun illumination measurements showed an increase of the current for the cells using textured ZnO:Al. The cells were then annealed at 150 °C, 175 °C and 200 °C during 30 min in ambient atmosphere and characterized at each annealing step. The results show that annealing has no impact on the open circuit voltage of the devices but that up to a 175 °C it enhances their short circuit current, consistent with an overall enhancement of their spectral response. Our results suggest that ZnO:Al is a promising material to increase the short circuit current (Jsc while avoiding texturing the c-Si substrate.

  9. Y-Ba-Cu-O superconducting film on oxidized silicon

    International Nuclear Information System (INIS)

    Gupta, R.P.; Khokle, W.S.; Dubey, R.C.; Singhal, S.; Nagpal, K.C.; Rao, G.S.T.; Jain, J.D.

    1988-01-01

    We report thick superconducting films of Y-Ba-Cu-O on oxidized silicon substrates. The critical temperatures for onset and zero resistance are 96 and 77 K, respectively. X-ray diffraction analysis predicts 1, 2, 3 composition and orthorhombic phase of the film

  10. Transparent conductive oxides for thin-film silicon solar cells

    NARCIS (Netherlands)

    Löffler, J.

    2005-01-01

    This thesis describes research on thin-film silicon solar cells with focus on the transparent conductive oxide (TCO) for such devices. In addition to the formation of a transparent and electrically conductive front electrode for the solar cell allowing photocurrent collection with low ohmic losses,

  11. RF Reactive Magnetron Sputter Deposition of Silicon Sub-Oxides

    NARCIS (Netherlands)

    Hattum, E.D. van

    2007-01-01

    RF reactive magnetron plasma sputter deposition of silicon sub oxide E.D. van Hattum Department of Physics and Astronomy, Faculty of Sciences, Utrecht University The work described in the thesis has been inspired and stimulated by the use of SiOx layers in the direct inductive printing technology,

  12. Study of oxide facing at silicone detectors of ionization detectors

    International Nuclear Information System (INIS)

    Kopestansky, J.; Tykva, R.

    1999-01-01

    Formation of oxide facing on silicone in discrete phases of technological preparation of detectors and interaction of gold (aluminium) steamed with SiO x layer were studied. The homogeneity of Au and Si) x layers and interface Au-SiO x and SiO x -Si were examined. The methods SIMS, and partially XPS, AES and RBS were used

  13. Fluorescence studies of Rhodamine 6G functionalized silicon oxide nanostructures

    International Nuclear Information System (INIS)

    Baumgaertel, Thomas; Borczyskowski, Christian von; Graaf, Harald

    2010-01-01

    Selective anchoring of optically active molecules on nanostructured surfaces is a promising step towards the creation of nanoscale devices with new functionalities. Recently we have demonstrated the electrostatic attachment of charged fluorescent molecules on silicon oxide nanostructures prepared by atomic force microscopy (AFM) nanolithography via local anodic oxidation (LAO) of dodecyl-terminated silicon. In this paper we report on our findings from a more detailed optical investigation of the bound dye Rhodamine 6G. High sensitivity optical wide field microscopy as well as confocal laser microscopy have been used to characterize the Rhodamine fluorescence emission. A highly interesting question concerns the interaction between an emitter close to a silicon surface because mechanisms such as energy transfer and fluorescence quenching will occur which are still not fully understood. Since the oxide thickness can be varied during preparation continuously from 1 to ∼ 5 nm, it is possible to investigate the fluorescence of the bound dye in close proximity to the underlying silicon. Using confocal laser microscopy we were also able to obtain optical spectra from the bound molecules. Together with the results from an analysis of their photochemical bleaching behaviour, we conjecture that some of the Rhodamine 6G molecules on the structure are interacting with the oxide, causing a spectral shift and differences in their photochemical properties.

  14. Effect of backbond oxidation on silicon nanocrystallites

    International Nuclear Information System (INIS)

    Ramos, L.E.; Furthmueller, J.; Bechstedt, F.

    2004-01-01

    We employ density functional calculations to study properties of Si nanocrystals after backbond oxidation in comparison to the ones passivated with hydrogen or hydroxyl. Structural parameters, pair excitation energies, quasiparticle gaps, and electrostatic potentials vary significantly in dependence on degree of oxidation and surface passivation. The variations are discussed within a quantum confinement picture. Blueshifts and redshifts observed in photoluminescence are related to the size of the Si nanocrystallite cores and the oxygen incorporation via passivation with group OH or oxidation

  15. Development of an oxidized porous silicon vacuum microtriode

    Energy Technology Data Exchange (ETDEWEB)

    Smith, II, Don Deewayne [Texas A & M Univ., College Station, TX (United States)

    1994-05-01

    In order to realize a high-power microwave amplifier design known as a gigatron, a gated field emission array must be developed that can deliver a high-intensity electron beam at gigahertz frequencies. No existing field emission device meets the requirements for a gigatron cathode. In the present work, a porous silicon-based approach is evaluated. The use of porous silicon reduces the size of a single emitter to the nanometer scale, and a true two-dimensional array geometry can be approached. A wide number of applications for such a device exist in various disciplines. Oxidized porous silicon vacuum diodes were first developed in 1990. No systematic study had been done to characterize the performance of these devices as a function of the process parameters. The author has done the first such study, fabricating diodes from p<100>, p<111>, and n<100> silicon substrates. Anodization current densities from 11 mA/cm2 to 151 mA/cm2 were used, and Fowler-Nordheim behavior was observed in over 80% of the samples. In order to effectively adapt this technology to mainstream vacuum microelectronic applications, a means of creating a gated triodic structure must be found. No previous attempts had successfully yielded such a device. The author has succeeded in utilizing a novel metallization method to fabricate the first operational oxidized porous silicon vacuum microtriodes, and results are encouraging.

  16. Oxidation Protection of Porous Reaction-Bonded Silicon Nitride

    Science.gov (United States)

    Fox, D. S.

    1994-01-01

    Oxidation kinetics of both as-fabricated and coated reaction-bonded silicon nitride (RBSN) were studied at 900 and 1000 C with thermogravimetry. Uncoated RBSN exhibited internal oxidation and parabolic kinetics. An amorphous Si-C-O coating provided the greatest degree of protection to oxygen, with a small linear weight loss observed. Linear weight gains were measured on samples with an amorphous Si-N-C coating. Chemically vapor deposited (CVD) Si3N4 coated RBSN exhibited parabolic kinetics, and the coating cracked severely. A continuous-SiC-fiber-reinforced RBSN composite was also coated with the Si-C-O material, but no substantial oxidation protection was observed.

  17. Demonstration of slot-waveguide structures on silicon nitride / silicon oxide platform.

    Science.gov (United States)

    Barrios, C A; Sánchez, B; Gylfason, K B; Griol, A; Sohlström, H; Holgado, M; Casquel, R

    2007-05-28

    We report on the first demonstration of guiding light in vertical slot-waveguides on silicon nitride/silicon oxide material system. Integrated ring resonators and Fabry-Perot cavities have been fabricated and characterized in order to determine optical features of the slot-waveguides. Group index behavior evidences guiding and confinement in the low-index slot region at O-band (1260-1370nm) telecommunication wavelengths. Propagation losses of <20 dB/cm have been measured for the transverse-electric mode of the slot-waveguides.

  18. Oxidation and corrosion of silicon-based ceramics and composites

    International Nuclear Information System (INIS)

    Jacobson, N.S.; Fox, D.S.; Smialek, J.L.

    1997-01-01

    Silica scales exhibit slow growth rates and a low activation energy. Thus silica-protected materials are attractive high temperature structural materials for their potentially excellent oxidation resistance and well-documented high temperature strength. This review focuses on silicon carbide, silicon nitride, and composites of these materials. It is divided into four parts: (i) Fundamental oxidation mechanisms, (ii) Special properties of silica scales, (iii) Protective coatings, and (iv) Internal oxidation behavior of composites. While the fundamental oxidation mechanism of SiC is understood, there are still many questions regarding the oxidation mechanism of Si 3 N 4 . Silica scales exhibit many unique properties as compared to chromia and alumina. These include slower growth rates, SiO(g) formation, sensitivity to water vapor and impurities, and dissolution by basic molten salts. Protective coatings can limit the deleterious effects. The fourth area-internal oxidation of fibers and fiber coatings in composites-has limited the application of these novel materials. Strategies for understanding and limiting this internal oxidation are discussed. (orig.)

  19. High-Throughput Multiple Dies-to-Wafer Bonding Technology and III/V-on-Si Hybrid Lasers for Heterogeneous Integration of Optoelectronic Integrated Circuits

    Directory of Open Access Journals (Sweden)

    Xianshu eLuo

    2015-04-01

    Full Text Available Integrated optical light source on silicon is one of the key building blocks for optical interconnect technology. Great research efforts have been devoting worldwide to explore various approaches to integrate optical light source onto the silicon substrate. The achievements so far include the successful demonstration of III/V-on-Si hybrid lasers through III/V-gain material to silicon wafer bonding technology. However, for potential large-scale integration, leveraging on mature silicon complementary metal oxide semiconductor (CMOS fabrication technology and infrastructure, more effective bonding scheme with high bonding yield is in great demand considering manufacturing needs. In this paper, we propose and demonstrate a high-throughput multiple dies-to-wafer (D2W bonding technology which is then applied for the demonstration of hybrid silicon lasers. By temporarily bonding III/V dies to a handle silicon wafer for simultaneous batch processing, it is expected to bond unlimited III/V dies to silicon device wafer with high yield. As proof-of-concept, more than 100 III/V dies bonding to 200 mm silicon wafer is demonstrated. The high performance of the bonding interface is examined with various characterization techniques. Repeatable demonstrations of 16-III/V-die bonding to pre-patterned 200 mm silicon wafers have been performed for various hybrid silicon lasers, in which device library including Fabry-Perot (FP laser, lateral-coupled distributed feedback (LC-DFB laser with side wall grating, and mode-locked laser (MLL. From these results, the presented multiple D2W bonding technology can be a key enabler towards the large-scale heterogeneous integration of optoelectronic integrated circuits (H-OEIC.

  20. Influence of sample oxidation on the nature of optical luminescence from porous silicon

    International Nuclear Information System (INIS)

    Coulthard, I.; Antel, W. J. Jr.; Freeland, J. W.; Sham, T. K.; Naftel, S. J.; Zhang, P.

    2000-01-01

    Site-selective luminescence experiments were performed upon porous-silicon samples exposed to varying degrees of oxidation. The source of different luminescence bands was determined to be due to either quantum confinement in nanocrystalline silicon or defective silicon oxide. Of particular interest is the defective silicon-oxide luminescence band found at 2.1 eV, which was found to frequently overlap with a luminescence band from nanocrystalline silicon. Some of the historical confusion and debate with regards to the source of luminescence from porous silicon can be attributed to this overlap. (c) 2000 American Institute of Physics

  1. Ultrathin Oxide Passivation Layer by Rapid Thermal Oxidation for the Silicon Heterojunction Solar Cell Applications

    Directory of Open Access Journals (Sweden)

    Youngseok Lee

    2012-01-01

    Full Text Available It is difficult to deposit extremely thin a-Si:H layer in heterojunction with intrinsic thin layer (HIT solar cell due to thermal damage and tough process control. This study aims to understand oxide passivation mechanism of silicon surface using rapid thermal oxidation (RTO process by examining surface effective lifetime and surface recombination velocity. The presence of thin insulating a-Si:H layer is the key to get high Voc by lowering the leakage current (I0 which improves the efficiency of HIT solar cell. The ultrathin thermal passivation silicon oxide (SiO2 layer was deposited by RTO system in the temperature range 500–950°C for 2 to 6 minutes. The thickness of the silicon oxide layer was affected by RTO annealing temperature and treatment time. The best value of surface recombination velocity was recorded for the sample treated at a temperature of 850°C for 6 minutes at O2 flow rate of 3 Lpm. A surface recombination velocity below 25 cm/s was obtained for the silicon oxide layer of 4 nm thickness. This ultrathin SiO2 layer was employed for the fabrication of HIT solar cell structure instead of a-Si:H, (i layer and the passivation and tunneling effects of the silicon oxide layer were exploited. The photocurrent was decreased with the increase of illumination intensity and SiO2 thickness.

  2. Microcrystalline silicon oxides for silicon-based solar cells: impact of the O/Si ratio on the electronic structure

    Science.gov (United States)

    Bär, M.; Starr, D. E.; Lambertz, A.; Holländer, B.; Alsmeier, J.-H.; Weinhardt, L.; Blum, M.; Gorgoi, M.; Yang, W.; Wilks, R. G.; Heske, C.

    2014-10-01

    Hydrogenated microcrystalline silicon oxide (μc-SiOx:H) layers are one alternative approach to ensure sufficient interlayer charge transport while maintaining high transparency and good passivation in Si-based solar cells. We have used a combination of complementary x-ray and electron spectroscopies to study the chemical and electronic structure of the (μc-SiOx:H) material system. With these techniques, we monitor the transition from a purely Si-based crystalline bonding network to a silicon oxide dominated environment, coinciding with a significant decrease of the material's conductivity. Most Si-based solar cell structures contain emitter/contact/passivation layers. Ideally, these layers fulfill their desired task (i.e., induce a sufficiently high internal electric field, ensure a good electric contact, and passivate the interfaces of the absorber) without absorbing light. Usually this leads to a trade-off in which a higher transparency can only be realized at the expense of the layer's ability to properly fulfill its task. One alternative approach is to use hydrogenated microcrystalline silicon oxide (μc-SiOx:H), a mixture of microcrystalline silicon and amorphous silicon (sub)oxide. The crystalline Si regions allow charge transport, while the oxide matrix maintains a high transparency. To date, it is still unclear how in detail the oxygen content influences the electronic structure of the μc-SiOx:H mixed phase material. To address this question, we have studied the chemical and electronic structure of the μc-SiOx:H (0 0.5, we observe a pronounced decrease of Si 3s - Si 3p hybridization in favor of Si 3p - O 2p hybridization in the upper valence band. This coincides with a significant increase of the material's resistivity, possibly indicating the breakdown of the conducting crystalline Si network. Silicon oxide layers with a thickness of several hundred nanometres were deposited in a PECVD (plasma-enhanced chemical vapor deposition) multi chamber system

  3. Structural and photoluminescent properties of a composite tantalum oxide and silicon nanocrystals embedded in a silicon oxide film

    Energy Technology Data Exchange (ETDEWEB)

    Díaz-Becerril, T., E-mail: tomas.diaz.be@gmail.com; Herrera, V.; Morales, C.; García-Salgado, G.; Rosendo, E.; Coyopol, A., E-mail: acoyopol@gmail.com; Galeazzi, R.; Romano, R.; Nieto-Caballero, F.G.; Sarmiento, J.

    2017-04-15

    Tantalum oxide crystals encrusted in a silicon oxide matrix were synthesized by using a hot filament chemical vapor deposition system (HFCVD). A solid source composed by a mixture in different percentages of Ta{sub 2}O{sub 5} and silicon (Si) powders were used as reactants. The films were grown at 800 °C and 1000 °C under hydrogen ambient. The deposited films were characterized by X-ray photoelectron spectroscopy (XPS), high-resolution transmission electron microscopy (HRTEM) and photoluminescence (PL) at room temperature. From the XPS results it was confirmed the formation of a mixture of Tantalum oxide, silicon oxide and Si nanoparticles (Ta{sub 2}O{sub 5-}SiO{sub 2}-Si(nc)) as seen from the Si (2p) and Ta (4f) lines corresponding to Si{sup +} and Ta{sup +} states respectively. Ta{sub 2}O{sub 5} and Si nanocrystals (Si-NCs) embedded in the silicon oxide films were observed on HRTEM images which corroborate the XPS results. Finally the emission properties of the films exhibited a broad band from 400 to 850 nm caused by the independent PL properties of tantalum oxide and Si-NCs that compose the film. The intensity of the emissions was observed to be dependent on both temperature of deposition and the ratio Ta{sub 2}O{sub 5}/Si, used as initial reactants. Results from this work might supply useful data for the development of future light emitter devices.

  4. Methods and mechanisms of gettering of silicon structures in the production of integrated circuits

    Directory of Open Access Journals (Sweden)

    Pilipenko V. A.

    2013-05-01

    Full Text Available Increasing the degree of integration of hardware components imposes more stringent requirements for the reduction of the concentration of contaminants and oxidation stacking faults in the original silicon wafers with its preservation in the IC manufacturing process cycle. This causes high relevance of the application of gettering in modern microelectronic technology. The existing methods of silicon wafers gettering and the mechanisms of their occurrence are considered.

  5. Defects and defect generation in oxide layer of ion implanted silicon-silicon dioxide structures

    CERN Document Server

    Baraban, A P

    2002-01-01

    One studies mechanism of generation of defects in Si-SiO sub 2 structure oxide layer as a result of implantation of argon ions with 130 keV energy and 10 sup 1 sup 3 - 3.2 x 10 sup 1 sup 7 cm sup - sup 2 doses. Si-SiO sub 2 structures are produced by thermal oxidation of silicon under 950 deg C temperature. Investigations were based on electroluminescence technique and on measuring of high-frequency volt-farad characteristics. Increase of implantation dose was determined to result in spreading of luminosity centres and in its maximum shifting closer to boundary with silicon. Ion implantation was shown, as well, to result in increase of density of surface states at Si-SiO sub 2 interface. One proposed model of defect generation resulting from Ar ion implantation into Si-SiO sub 2

  6. Strong and reversible modulation of carbon nanotube-silicon heterojunction solar cells by an interfacial oxide layer.

    Science.gov (United States)

    Jia, Yi; Cao, Anyuan; Kang, Feiyu; Li, Peixu; Gui, Xuchun; Zhang, Luhui; Shi, Enzheng; Wei, Jinquan; Wang, Kunlin; Zhu, Hongwei; Wu, Dehai

    2012-06-21

    Deposition of nanostructures such as carbon nanotubes on Si wafers to make heterojunction structures is a promising route toward high efficiency solar cells with reduced cost. Here, we show a significant enhancement in the cell characteristics and power conversion efficiency by growing a silicon oxide layer at the interface between the nanotube film and Si substrate. The cell efficiency increases steadily from 0.5% without interfacial oxide to 8.8% with an optimal oxide thickness of about 1 nm. This systematic study reveals that formation of an oxide layer switches charge transport from thermionic emission to a mixture of thermionic emission and tunneling and improves overall diode properties, which are critical factors for tailoring the cell behavior. By controlled formation and removal of interfacial oxide, we demonstrate oscillation of the cell parameters between two extreme states, where the cell efficiency can be reversibly altered by a factor of 500. Our results suggest that the oxide layer plays an important role in Si-based photovoltaics, and it might be utilized to tune the cell performance in various nanostructure-Si heterojunction structures.

  7. Study Trapped Charge Distribution in P-Channel Silicon-Oxide-Nitride-Oxide-Silicon Memory Device Using Dynamic Programming Scheme

    Science.gov (United States)

    Li, Fu-Hai; Chiu, Yung-Yueh; Lee, Yen-Hui; Chang, Ru-Wei; Yang, Bo-Jun; Sun, Wein-Town; Lee, Eric; Kuo, Chao-Wei; Shirota, Riichiro

    2013-04-01

    In this study, we precisely investigate the charge distribution in SiN layer by dynamic programming of channel hot hole induced hot electron injection (CHHIHE) in p-channel silicon-oxide-nitride-oxide-silicon (SONOS) memory device. In the dynamic programming scheme, gate voltage is increased as a staircase with fixed step amplitude, which can prohibits the injection of holes in SiN layer. Three-dimensional device simulation is calibrated and is compared with the measured programming characteristics. It is found, for the first time, that the hot electron injection point quickly traverses from drain to source side synchronizing to the expansion of charged area in SiN layer. As a result, the injected charges quickly spread over on the almost whole channel area uniformly during a short programming period, which will afford large tolerance against lateral trapped charge diffusion by baking.

  8. Optical characterization of nanocrystals in silicon rich oxide superlattices and porous silicon

    International Nuclear Information System (INIS)

    Agocs, E.; Petrik, P.; Milita, S.; Vanzetti, L.; Gardelis, S.; Nassiopoulou, A.G.; Pucker, G.; Balboni, R.; Fried, M.

    2011-01-01

    We propose to analyze ellipsometry data by using effective medium approximation (EMA) models. Thanks to EMA, having nanocrystalline reference dielectric functions and generalized critical point (GCP) model the physical parameters of two series of samples containing silicon nanocrystals, i.e. silicon rich oxide (SRO) superlattices and porous silicon layers (PSL), have been determined. The superlattices, consisting of ten SRO/SiO 2 layer pairs, have been prepared using plasma enhanced chemical vapor deposition. The porous silicon layers have been prepared using short monopulses of anodization current in the transition regime between porous silicon formation and electropolishing, in a mixture of hydrofluoric acid and ethanol. The optical modeling of both structures is similar. The effective dielectric function of the layer is calculated by EMA using nanocrystalline components (nc-Si and GCP) in a dielectric matrix (SRO) or voids (PSL). We discuss the two major problems occurring when modeling such structures: (1) the modeling of the vertically non-uniform layer structures (including the interface properties like nanoroughness at the layer boundaries) and (2) the parameterization of the dielectric function of nanocrystals. We used several techniques to reduce the large number of fit parameters of the GCP models. The obtained results are in good agreement with those obtained by X-ray diffraction and electron microscopy. We investigated the correlation of the broadening parameter and characteristic EMA components with the nanocrystal size and the sample preparation conditions, such as the annealing temperatures of the SRO superlattices and the anodization current density of the porous silicon samples. We found that the broadening parameter is a sensitive measure of the nanocrystallinity of the samples, even in cases, where the nanocrystals are too small to be visible for X-ray scattering. Major processes like sintering, phase separation, and intermixing have been

  9. Physical mechanisms of Cu-Cu wafer bonding

    International Nuclear Information System (INIS)

    Rebhan, B.

    2014-01-01

    Modern manufacturing processes of complex integrated semiconductor devices are based on wafer-level manufacturing of components which are subsequently interconnected. When compared with classical monolithic bi-dimensional integrated circuits (2D ICs), the new approach of three-dimensional integrated circuits (3D ICs) exhibits significant benefits in terms of signal propagation delay and power consumption due to the reduced metal interconnection length and allows high integration levels with reduced form factor. Metal thermo-compression bonding is a process suitable for 3D interconnects applications at wafer level, which facilitates the electrical and mechanical connection of two wafers even processed in different technologies, such as complementary metal oxide semiconductor (CMOS) and microelectromechanical systems (MEMS). Due to its high electrical conductivity, copper is a very attractive material for electrical interconnects. For Cu-Cu wafer bonding the process requires typically bonding for around 1 h at 400°C and high contact pressure applied during bonding. Temperature reduction below such values is required in order to solve issues regarding (i) throughput in the wafer bonder, (ii) wafer-to-wafer misalignment after bonding and (iii) to minimise thermo-mechanical stresses or device degradation. The aim of this work was to study the physical mechanisms of Cu-Cu bonding and based on this study to further optimise the bonding process for low temperatures. The critical sample parameters (roughness, oxide, crystallinity) were identified using selected analytical techniques and correlated with the characteristics of the bonded Cu-Cu interfaces. Based on the results of this study the impact of several materials and process specifications on the bonding result were theoretically defined and experimentally proven. These fundamental findings subsequently facilitated low temperature (LT) metal thermo-compression Cu-Cu wafer bonding and even room temperature direct

  10. Detailed statistical contact angle analyses; "slow moving" drops on inclining silicon-oxide surfaces.

    Science.gov (United States)

    Schmitt, M; Groß, K; Grub, J; Heib, F

    2015-06-01

    Contact angle determination by sessile drop technique is essential to characterise surface properties in science and in industry. Different specific angles can be observed on every solid which are correlated with the advancing or the receding of the triple line. Different procedures and definitions for the determination of specific angles exist which are often not comprehensible or reproducible. Therefore one of the most important things in this area is to build standard, reproducible and valid methods for determining advancing/receding contact angles. This contribution introduces novel techniques to analyse dynamic contact angle measurements (sessile drop) in detail which are applicable for axisymmetric and non-axisymmetric drops. Not only the recently presented fit solution by sigmoid function and the independent analysis of the different parameters (inclination, contact angle, velocity of the triple point) but also the dependent analysis will be firstly explained in detail. These approaches lead to contact angle data and different access on specific contact angles which are independent from "user-skills" and subjectivity of the operator. As example the motion behaviour of droplets on flat silicon-oxide surfaces after different surface treatments is dynamically measured by sessile drop technique when inclining the sample plate. The triple points, the inclination angles, the downhill (advancing motion) and the uphill angles (receding motion) obtained by high-precision drop shape analysis are independently and dependently statistically analysed. Due to the small covered distance for the dependent analysis (contact angle determination. They are characterised by small deviations of the computed values. Additional to the detailed introduction of this novel analytical approaches plus fit solution special motion relations for the drop on inclined surfaces and detailed relations about the reactivity of the freshly cleaned silicon wafer surface resulting in acceleration

  11. Direct comparison of the electrical properties in metal/oxide/nitride/oxide/silicon and metal/aluminum oxide/nitride/oxide/silicon capacitors with equivalent oxide thicknesses

    Energy Technology Data Exchange (ETDEWEB)

    An, Ho-Myoung; Seo, Yu Jeong; Kim, Hee Dong; Kim, Kyoung Chan; Kim, Jong-Guk [School of Electrical Engineering, Korea University, Seoul 136-713 (Korea, Republic of); Cho, Won-Ju; Koh, Jung-Hyuk [Department of Electronic Materials Engineering, Kwangwoon University, Seoul 139-701 (Korea, Republic of); Sung, Yun Mo [Department of Materials and Science Engineering, Korea University, Seoul 136-713 (Korea, Republic of); Kim, Tae Geun, E-mail: tgkim1@korea.ac.k [School of Electrical Engineering, Korea University, Seoul 136-713 (Korea, Republic of)

    2009-07-31

    We examine the electrical properties of metal/oxide/nitride/oxide/silicon (MONOS) capacitors with two different blocking oxides, SiO{sub 2} and Al{sub 2}O{sub 3}, under the influence of the same electric field. The thickness of the Al{sub 2}O{sub 3} layer is set to 150 A, which is electrically equivalent to a thickness of the SiO{sub 2} layer of 65 A, in the MONOS structure for this purpose. The capacitor with the Al{sub 2}O{sub 3} blocking layer shows a larger capacitance-voltage memory window of 8.6 V, lower program voltage of 7 V, faster program/erase speeds of 10 ms/1 {mu}s, lower leakage current of 100 pA and longer data retention than the one with the SiO{sub 2} blocking layer does. These improvements are attributed to the suppression of the carrier transport to the gate electrode afforded by the use of an Al{sub 2}O{sub 3} blocking layer physically thicker than the SiO{sub 2} one, as well as the effective charge-trapping by Al{sub 2}O{sub 3} at the deep energy levels in the nitride layer.

  12. Thermal processing and native oxidation of silicon nanoparticles

    International Nuclear Information System (INIS)

    Winters, Brandon J.; Holm, Jason; Roberts, Jeffrey T.

    2011-01-01

    In this study, Fourier transform infrared spectroscopy (FTIR), X-ray photoelectron spectroscopy (XPS), and electron energy loss spectroscopy (EELS) were used to investigate in-air oxidation of silicon nanoparticles ca. 11 nm in diameter. Particle samples were prepared first by extracting them from an RF plasma synthesis reactor, and then heating them in an inert carrier gas stream. The resulting particles had varying surface hydrogen coverages and relative amounts of SiH x (x = 1, 2, and 3), depending on the temperature to which they had been heated. The particles were allowed to oxidize in-air for several weeks. FTIR, XPS, and EELS analyses that were performed during this period clearly establish that adsorbed hydrogen retards oxidation, although in complex ways. In particular, particles that have been heated to intermediate hydrogen coverages oxidize more slowly in air than do freshly generated particles that have a much higher hydrogen content. In addition, the loss of surface hydride species at high processing temperatures results in fast initial oxidation and the formation of a self-limiting oxide layer. Analogous measurements made on deuterium-covered particles show broadly similar behavior; i.e., that oxidation is the slowest at some intermediate coverage of adsorbed deuterium.

  13. Self-cleaning glass coating containing titanium oxide and silicon

    International Nuclear Information System (INIS)

    Araujo, A.O. de; Alves, A.K.; Berutti, F.A.; Bergmann, C.P.

    2009-01-01

    Using the electro spinning technique nano fibers of titanium oxide doped with silicon were synthesized. As precursor materials, titanium propoxide, silicon tetra propoxide and a solution of polyvinylpyrrolidone were used. The non-tissue material obtained was characterized by X-ray diffraction to determine the phase and crystallite size, BET method to determine the surface and SEM to analyze the microstructure of the fibers. After ultrasound dispersion of this material in ethanol, the glass coatings were made by dip-coating methodology. The influence of the removal velocity, the solution composition and the glass surface preparation were evaluated. The film was characterized by the contact angle of a water droplet in its surface. (author)

  14. Ion beam analysis of PECVD silicon oxide thin films

    International Nuclear Information System (INIS)

    Fernandez-Lima, F.; Rodriguez, J.A.; Pedrero, E.; Fonseca Filho, H.D.; Llovera, A.; Riera, M.; Dominguez, C.; Behar, M.; Zawislak, F.C.

    2006-01-01

    A study of ion beam analysis techniques of plasma enhanced chemical vapor deposited (PECVD) silicon oxide thin films (1 μm thick) obtained from silane (SiH 4 ) and nitrous oxide (N 2 O) is reported. The film, elemental composition and surface morphology were determined as function of the reactant gas flow ratio, R = [N 2 O]/[SiH 4 ] in the 22-110 range using the Rutherford backscattering spectrometry, nuclear reaction analysis and atomic force microscopy techniques. The density of the films was determined by combining the RBS and thickness measurements. All the experiments were done at a deposition temperature of 300 deg. C. In all the cases almost stoichiometric oxides were obtained being the impurity content function of R. It was also observed that physical properties such as density, surface roughness and shape factor increase with R in the studied interval

  15. Size modulation of nanocrystalline silicon embedded in amorphous silicon oxide by Cat-CVD

    International Nuclear Information System (INIS)

    Matsumoto, Y.; Godavarthi, S.; Ortega, M.; Sanchez, V.; Velumani, S.; Mallick, P.S.

    2011-01-01

    Different issues related to controlling size of nanocrystalline silicon (nc-Si) embedded in hydrogenated amorphous silicon oxide (a-SiO x :H) deposited by catalytic chemical vapor deposition (Cat-CVD) have been reported. Films were deposited using tantalum (Ta) and tungsten (W) filaments and it is observed that films deposited using tantalum filament resulted in good control on the properties. The parameters which can affect the size of nc-Si domains have been studied which include hydrogen flow rate, catalyst and substrate temperatures. The deposited samples are characterized by X-ray diffraction, HRTEM and micro-Raman spectroscopy, for determining the size of the deposited nc-Si. The crystallite formation starts for Ta-catalyst around the temperature of 1700 o C.

  16. Ultrathin Oxide Passivation Layer by Rapid Thermal Oxidation for the Silicon Heterojunction Solar Cell Applications

    OpenAIRE

    Lee, Youngseok; Oh, Woongkyo; Dao, Vinh Ai; Hussain, Shahzada Qamar; Yi, Junsin

    2012-01-01

    It is difficult to deposit extremely thin a-Si:H layer in heterojunction with intrinsic thin layer (HIT) solar cell due to thermal damage and tough process control. This study aims to understand oxide passivation mechanism of silicon surface using rapid thermal oxidation (RTO) process by examining surface effective lifetime and surface recombination velocity. The presence of thin insulating a-Si:H layer is the key to get high Voc by lowering the leakage current (I0) which improves the efficie...

  17. Comparison of aggregation behaviors between ionic liquid-type imidazolium gemini surfactant [C12-4-C12im]Br2 and its monomer [C12mim]Br on silicon wafer.

    Science.gov (United States)

    Ao, Mingqi; Xu, Guiying; Pang, Jinyu; Zhao, Taotao

    2009-09-01

    The aggregation of ionic liquid-type imidazolium gemini surfactant [C(12)-4-C(12)im]Br(2) on silicon wafer, which is compared with its monomer [C(12)mim]Br, have been studied. AFM morphology images and contact angle measurements suggest that the aggregations of [C(12)-4-C(12)im]Br(2) and [C(12)mim]Br on silicon wafer follow different mechanisms. Below the critical surface aggregation concentrations (CSAC), both surfactant molecules are adsorbed with their hydrophobic tails facing the air. But above the CSAC, [C(12)-4-C(12)im]Br(2) molecules finally form a bilayer structure with hydrophilic head groups facing the air, whereas [C(12)mim]Br molecules form a multilayer structure, and with increasing its concentration, the layer numbers increase with the hydrophobic chains and hydrophilic head groups facing the air by turns. Besides, the watery wettability of [C(12)-4-C(12)im]Br(2)-treated silica surface is lower than that of [C(12)mim]Br at the concentration of 5.0 cmc, and the infrared spectroscopy suggests that the poorer watery wettability of [C(12)-4-C(12)im]Br(2) may be relative to the less-ordered packing of methylene chains inside the aggregate. These different aggregation behaviors for the two surfactants ascribe to the different molecular structures and electrostatic interactions. This work would have certain theoretical guidance meaning on the modification of solid surface.

  18. Correlation study of actual temperature profile and in-line metrology measurements for within-wafer uniformity improvement and wafer edge yield enhancement (Conference Presentation)

    Science.gov (United States)

    Fang, Fang; Vaid, Alok; Vinslava, Alina; Casselberry, Richard; Mishra, Shailendra; Dixit, Dhairya; Timoney, Padraig; Chu, Dinh; Porter, Candice; Song, Da; Ren, Zhou

    2018-03-01

    to 7KW. The wafer surface is coated with Yttrium oxide film which allows Silicon Etch chemistry. At Fab-8, we carried investigations in 14 nm FEOL critical etch process which has direct impact on yield, using SensorArray EtchTemp-SE wafer, we measured ESC temperature profile across multiple chambers, for both plasma on and plasma off, promising results achieved on chamber temperature signature identification, guideline for chamber to chamber matching improvement. Correlation between wafer mean temperature and determining criticality-process parameters of recess depth and CD is observed. Furthermore, detail zonal temperature/profile correlation is investigated to identify individual correlation in each chuck zone, and provided unique process knobs corresponding to each chunk. Meanwhile, passive ESC Chuck DOE was done to modulate wafer temperature at different zones, and Sensor Array wafer measurements verified temperature responding well with the ESC set point. Correlation R2 = 0.9979 for outer ring and R2 = 0.9981 for Mid Outer ring is observed, as shown in . Experiments planning to modulate edge zone ESC temperature to tune profile within-wafer uniformity and prove gain in edge yield enhancement and to improve edge yield is underway.

  19. Wet-Chemical Preparation of Silicon Tunnel Oxides for Transparent Passivated Contacts in Crystalline Silicon Solar Cells.

    Science.gov (United States)

    Köhler, Malte; Pomaska, Manuel; Lentz, Florian; Finger, Friedhelm; Rau, Uwe; Ding, Kaining

    2018-05-02

    Transparent passivated contacts (TPCs) using a wide band gap microcrystalline silicon carbide (μc-SiC:H(n)), silicon tunnel oxide (SiO 2 ) stack are an alternative to amorphous silicon-based contacts for the front side of silicon heterojunction solar cells. In a systematic study of the μc-SiC:H(n)/SiO 2 /c-Si contact, we investigated selected wet-chemical oxidation methods for the formation of ultrathin SiO 2 , in order to passivate the silicon surface while ensuring a low contact resistivity. By tuning the SiO 2 properties, implied open-circuit voltages of 714 mV and contact resistivities of 32 mΩ cm 2 were achieved using μc-SiC:H(n)/SiO 2 /c-Si as transparent passivated contacts.

  20. Porous silicon carbide (SIC) semiconductor device

    Science.gov (United States)

    Shor, Joseph S. (Inventor); Kurtz, Anthony D. (Inventor)

    1996-01-01

    Porous silicon carbide is fabricated according to techniques which result in a significant portion of nanocrystallites within the material in a sub 10 nanometer regime. There is described techniques for passivating porous silicon carbide which result in the fabrication of optoelectronic devices which exhibit brighter blue luminescence and exhibit improved qualities. Based on certain of the techniques described porous silicon carbide is used as a sacrificial layer for the patterning of silicon carbide. Porous silicon carbide is then removed from the bulk substrate by oxidation and other methods. The techniques described employ a two-step process which is used to pattern bulk silicon carbide where selected areas of the wafer are then made porous and then the porous layer is subsequently removed. The process to form porous silicon carbide exhibits dopant selectivity and a two-step etching procedure is implemented for silicon carbide multilayers.

  1. Toward Annealing-Stable Molybdenum-Oxide-Based Hole-Selective Contacts For Silicon Photovoltaics

    KAUST Repository

    Essig, Stephanie; Dré on, Julie; Rucavado, Esteban; Mews, Mathias; Koida, Takashi; Boccard, Mathieu; Werner, Jé ré mie; Geissbü hler, Jonas; Lö per, Philipp; Morales-Masis, Monica; Korte, Lars; De Wolf, Stefaan; Balllif, Christophe

    2018-01-01

    Molybdenum oxide (MoOX) combines a high work function with broadband optical transparency. Sandwiched between a hydrogenated intrinsic amorphous silicon passivation layer and a transparent conductive oxide, this material allows a highly efficient

  2. 22.5% efficient silicon heterojunction solar cell with molybdenum oxide hole collector

    Energy Technology Data Exchange (ETDEWEB)

    Geissbühler, Jonas, E-mail: jonas.geissbuehler@epfl.ch; Werner, Jérémie; Martin de Nicolas, Silvia; Hessler-Wyser, Aïcha; Tomasi, Andrea; Niesen, Bjoern; De Wolf, Stefaan [Photovoltaics and Thin Film Electronics Laboratory, Institute of Microengineering (IMT), École Polytechnique Fédérale de Lausanne (EPFL), Rue de la Maladière 71b, CH-2000 Neuchâtel (Switzerland); Barraud, Loris; Despeisse, Matthieu; Nicolay, Sylvain [CSEM PV-Center, Jaquet-Droz 1, CH-2000 Neuchâtel (Switzerland); Ballif, Christophe [Photovoltaics and Thin Film Electronics Laboratory, Institute of Microengineering (IMT), École Polytechnique Fédérale de Lausanne (EPFL), Rue de la Maladière 71b, CH-2000 Neuchâtel (Switzerland); CSEM PV-Center, Jaquet-Droz 1, CH-2000 Neuchâtel (Switzerland)

    2015-08-24

    Substituting the doped amorphous silicon films at the front of silicon heterojunction solar cells with wide-bandgap transition metal oxides can mitigate parasitic light absorption losses. This was recently proven by replacing p-type amorphous silicon with molybdenum oxide films. In this article, we evidence that annealing above 130 °C—often needed for the curing of printed metal contacts—detrimentally impacts hole collection of such devices. We circumvent this issue by using electrodeposited copper front metallization and demonstrate a silicon heterojunction solar cell with molybdenum oxide hole collector, featuring a fill factor value higher than 80% and certified energy conversion efficiency of 22.5%.

  3. 22.5% efficient silicon heterojunction solar cell with molybdenum oxide hole collector

    OpenAIRE

    Geissbühler Jonas; Werner Jérémie; Martin de Nicolas Silvia; Barraud Loris; Hessler-Wyser Aïcha; Despeisse Matthieu; Nicolay Sylvain; Tomasi Andrea; Niesen Bjoern; De Wolf Stefaan; Ballif Christophe

    2015-01-01

    Substituting the doped amorphous silicon films at the front of silicon heterojunction solar cells with wide bandgap transition metal oxides can mitigate parasitic light absorption losses. This was recently proven by replacing p type amorphous silicon with molybdenum oxide films. In this article we evidence that annealing above 130?°C—often needed for the curing of printed metal contacts—detrimentally impacts hole collection of such devices. We circumvent this issue by using electrodeposited c...

  4. The uses of Man-Made diamond in wafering applications

    Science.gov (United States)

    Fallon, D. B.

    1982-01-01

    The continuing, rapid growth of the semiconductor industry requires the involvement of several specialized industries in the development of special products geared toward the unique requirements of this new industry. A specialized manufactured diamond to meet various material removal needs was discussed. The area of silicon wafer slicing has presented yet anothr challenge and it is met most effectively. The history, operation, and performance of Man-Made diamond and particularly as applied to silicon wafer slicing is discussed. Product development is underway to come up with a diamond specifically for sawing silicon wafers on an electroplated blade.

  5. The role of oxide interlayers in back reflector configurations for amorphous silicon solar cells

    NARCIS (Netherlands)

    Demontis, V.; Sanna, C.; Melskens, J.; Santbergen, R.; Smets, A.H.M.; Damiano, A.; Zeman, M.

    2013-01-01

    Thin oxide interlayers are commonly added to the back reflector of thin-film silicon solar cells to increase their current. To gain more insight in the enhancement mechanism, we tested different back reflector designs consisting of aluminium-doped zinc oxide (ZnO:Al) and/or hydrogenated silicon

  6. Charging effects during focused electron beam induced deposition of silicon oxide

    NARCIS (Netherlands)

    de Boer, Sanne K.; van Dorp, Willem F.; De Hosson, Jeff Th. M.

    2011-01-01

    This paper concentrates on focused electron beam induced deposition of silicon oxide. Silicon oxide pillars are written using 2, 4, 6, 8, 10-pentamethyl-cyclopenta-siloxane (PMCPS) as precursor. It is observed that branching of the pillar occurs above a minimum pillar height. The branching is

  7. A new cleaning process for the metallic contaminants on a post-CMP wafer's surface

    International Nuclear Information System (INIS)

    Gao Baohong; Liu Yuling; Wang Chenwei; Wang Shengli; Zhou Qiang; Tan Baimei; Zhu Yadong

    2010-01-01

    This paper presents a new cleaning process using boron-doped diamond (BDD) film anode electrochemical oxidation for metallic contaminants on polished silicon wafer surfaces. The BDD film anode electrochemical oxidation can efficiently prepare pyrophosphate peroxide, pyrophosphate peroxide can oxidize organic contaminants, and pyrophosphate peroxide is deoxidized into pyrophosphate. Pyrophosphate, a good complexing agent, can form a metal complex, which is a structure consisting of a copper ion, bonded to a surrounding array of two pyrophosphate anions. Three polished wafers were immersed in the 0.01 mol/L CuSO 4 solution for 2 h in order to make comparative experiments. The first one was cleaned by pyrophosphate peroxide, the second by RCA (Radio Corporation of America) cleaning, and the third by deionized (DI) water. The XPS measurement result shows that the metallic contaminants on wafers cleaned by the RCA method and by pyrophosphate peroxide is less than the XPS detection limits of 1 ppm. And the wafer's surface cleaned by pyrophosphate peroxide is more efficient in removing organic carbon residues than RCA cleaning. Therefore, BDD film anode electrochemical oxidation can be used for microelectronics cleaning, and it can effectively remove organic contaminants and metallic contaminants in one step. It also achieves energy saving and environmental protection. (semiconductor technology)

  8. Wafer level packaging of MEMS

    International Nuclear Information System (INIS)

    Esashi, Masayoshi

    2008-01-01

    Wafer level packaging plays many important roles for MEMS (micro electro mechanical systems), including cost, yield and reliability. MEMS structures on silicon chips are encapsulated between bonded wafers or by surface micromachining, and electrical interconnections are made from the cavity. Bonding at the interface, such as glass–Si anodic bonding and metal-to-metal bonding, requires electrical interconnection through the lid vias in many cases. On the other hand, lateral electrical interconnections on the surface of the chip are used for bonding with intermediate melting materials, such as low melting point glass and solder. The cavity formed by surface micromachining is made using sacrificial etching, and the openings needed for the sacrificial etching are plugged using deposition sealing methods. Vacuum packaging methods and the structures for electrical feedthrough for the interconnection are discussed in this review. (topical review)

  9. Shrinking of silicon nanocrystals embedded in an amorphous silicon oxide matrix during rapid thermal annealing in a forming gas atmosphere

    Science.gov (United States)

    van Sebille, M.; Fusi, A.; Xie, L.; Ali, H.; van Swaaij, R. A. C. M. M.; Leifer, K.; Zeman, M.

    2016-09-01

    We report the effect of hydrogen on the crystallization process of silicon nanocrystals embedded in a silicon oxide matrix. We show that hydrogen gas during annealing leads to a lower sub-band gap absorption, indicating passivation of defects created during annealing. Samples annealed in pure nitrogen show expected trends according to crystallization theory. Samples annealed in forming gas, however, deviate from this trend. Their crystallinity decreases for increased annealing time. Furthermore, we observe a decrease in the mean nanocrystal size and the size distribution broadens, indicating that hydrogen causes a size reduction of the silicon nanocrystals.

  10. Statistical contact angle analyses; "slow moving" drops on a horizontal silicon-oxide surface.

    Science.gov (United States)

    Schmitt, M; Grub, J; Heib, F

    2015-06-01

    Sessile drop experiments on horizontal surfaces are commonly used to characterise surface properties in science and in industry. The advancing angle and the receding angle are measurable on every solid. Specially on horizontal surfaces even the notions themselves are critically questioned by some authors. Building a standard, reproducible and valid method of measuring and defining specific (advancing/receding) contact angles is an important challenge of surface science. Recently we have developed two/three approaches, by sigmoid fitting, by independent and by dependent statistical analyses, which are practicable for the determination of specific angles/slopes if inclining the sample surface. These approaches lead to contact angle data which are independent on "user-skills" and subjectivity of the operator which is also of urgent need to evaluate dynamic measurements of contact angles. We will show in this contribution that the slightly modified procedures are also applicable to find specific angles for experiments on horizontal surfaces. As an example droplets on a flat freshly cleaned silicon-oxide surface (wafer) are dynamically measured by sessile drop technique while the volume of the liquid is increased/decreased. The triple points, the time, the contact angles during the advancing and the receding of the drop obtained by high-precision drop shape analysis are statistically analysed. As stated in the previous contribution the procedure is called "slow movement" analysis due to the small covered distance and the dominance of data points with low velocity. Even smallest variations in velocity such as the minimal advancing motion during the withdrawing of the liquid are identifiable which confirms the flatness and the chemical homogeneity of the sample surface and the high sensitivity of the presented approaches. Copyright © 2014 Elsevier Inc. All rights reserved.

  11. Surface and Core Electronic Structure of Oxidized Silicon Nanocrystals

    Directory of Open Access Journals (Sweden)

    Noor A. Nama

    2010-01-01

    Full Text Available Ab initio restricted Hartree-Fock method within the framework of large unit cell formalism is used to simulate silicon nanocrystals between 216 and 1000 atoms (1.6–2.65 nm in diameter that include Bravais and primitive cell multiples. The investigated properties include core and oxidized surface properties. Results revealed that electronic properties converge to some limit as the size of the nanocrystal increases. Increasing the size of the core of a nanocrystal resulted in an increase of the energy gap, valence band width, and cohesive energy. The lattice constant of the core and oxidized surface parts shows a decreasing trend as the nanocrystal increases in a size that converges to 5.28 Ǻ in a good agreement with the experiment. Surface and core convergence to the same lattice constant reflects good adherence of oxide layer at the surface. The core density of states shows highly degenerate states that split at the oxygenated (001-(1×1 surface due to symmetry breaking. The nanocrystal surface shows smaller gap and higher valence and conduction bands when compared to the core part, due to oxygen surface atoms and reduced structural symmetry. The smaller surface energy gap shows that energy gap of the nanocrystal is controlled by the surface part. Unlike the core part, the surface part shows a descending energy gap that proves its obedience to quantum confinement effects. Nanocrystal geometry proved to have some influence on all electronic properties including the energy gap.

  12. Transparent conducting oxide contacts and textured metal back reflectors for thin film silicon solar cells

    Science.gov (United States)

    Franken, R. H.-J.

    2006-09-01

    With the growing population and the increasing environmental problems of the 'common' fossil and nuclear energy production, the need for clean and sustainable energy sources is evident. Solar energy conversion, such as in photovoltaic (PV) systems, can play a major role in the urgently needed energy transition in electricity production. At the present time PV module production is dominated by the crystalline wafer technology. Thin film silicon technology is an alternative solar energy technology that operates at lower efficiencies, however, it has several significant advantages, such as the possibility of deposition on cheap (flexible) substrates and the much smaller silicon material consumption. Because of the small thickness of the solar cells, light trapping schemes are needed in order to obtain enough light absorption and current generation. This thesis describes the research on thin film silicon solar cells with the focus on the optimization of the transparent conducting oxide (TCO) layers and textured metal Ag substrate layers for the use as enhanced light scattering back reflectors in n-i-p type of solar cells. First we analyzed ZnO:Al (TCO) layers deposited in an radio frequent (rf) magnetron deposition system equipped with a 7 inch target. We have focused on the improvement of the electrical properties without sacrificing the optical properties by increasing the mobility and decreasing the grain boundary density. Furthermore, we described some of the effects on light trapping of ZnO:Al enhanced back reflectors. The described effects are able to explain the observed experimental data. Furthermore, we present a relation between the surface morphology of the Ag back contact and the current enhancement in microcrystalline (muc-Si:H) solar cells. We show the importance of the lateral feature sizes of the Ag surface on the light scattering and introduce a method to characterize the quality of the back reflector by combining the vertical and lateral feature sizes

  13. Viscous properties of aluminum oxide nanotubes and aluminium oxide nanoparticles - silicone oil suspensions

    Science.gov (United States)

    Thapa, Ram; French, Steven; Delgado, Adrian; Ramos, Carlos; Gutierrez, Jose; Chipara, Mircea; Lozano, Karen

    2010-03-01

    Electrorheological (ER) fluids consisting of γ-aluminum oxide nanotubes and γ-aluminum oxide nanoparticles dispersed within silicone oil were prepared. The relationship between shear stress and shear rate was measured and theoretically simulated by using an extended Bingham model for both the rheological and electrorheological features of these systems. Shear stress and viscosity showed a sharp increase for the aluminum oxide nanotubes suspensions subjected to applied electric fields whereas aluminum oxide nanoparticles suspensions showed a moderate change. It was found that the transition from liquid to solid state (mediated by the applied electric field) can be described by a power law and that for low applied voltages the relationship is almost linear.

  14. Functionalization of 2D macroporous silicon under the high-pressure oxidation

    Science.gov (United States)

    Karachevtseva, L.; Kartel, M.; Kladko, V.; Gudymenko, O.; Bo, Wang; Bratus, V.; Lytvynenko, O.; Onyshchenko, V.; Stronska, O.

    2018-03-01

    Addition functionalization after high-pressure oxidation of 2D macroporous silicon structures is evaluated. X-ray diffractometry indicates formation of orthorhombic SiO2 phase on macroporous silicon at oxide thickness of 800-1200 nm due to cylindrical symmetry of macropores and high thermal expansion coefficient of SiO2. Pb center concentration grows with the splitting energy of LO- and TO-phonons and SiO2 thickness in oxidized macroporous silicon structures. This increase EPR signal amplitude and GHz radiation absorption and is promising for development of high-frequency devices and electronically controlled elements.

  15. A parametric study of laser induced ablation-oxidation on porous silicon surfaces

    International Nuclear Information System (INIS)

    De Stefano, Luca; Rea, Ilaria; Nigro, M Arcangela; Della Corte, Francesco G; Rendina, Ivo

    2008-01-01

    We have investigated the laser induced ablation-oxidation process on porous silicon layers having different porosities and thicknesses by non-destructive optical techniques. In particular, the interaction between a low power blue light laser and the porous silicon surfaces has been characterized by variable angle spectroscopic ellipsometry and Fourier transform infrared spectroscopy. The oxidation profiles etched on the porous samples can be tuned as functions of the layer porosity and laser fluence. Oxide stripes of width less than 2 μm and with thicknesses between 100 nm and 5 μm have been produced, depending on the porosity of the porous silicon, by using a 40 x focusing objective

  16. Silicon (100)/SiO2 by XPS

    Energy Technology Data Exchange (ETDEWEB)

    Jensen, David S.; Kanyal, Supriya S.; Madaan, Nitesh; Vail, Michael A.; Dadson, Andrew; Engelhard, Mark H.; Linford, Matthew R.

    2013-09-25

    Silicon (100) wafers are ubiquitous in microfabrication and, accordingly, their surface characteristics are important. Herein, we report the analysis of Si (100) via X-ray photoelectron spectroscopy (XPS) using monochromatic Al K radiation. Survey scans show that the material is primarily silicon and oxygen, and the Si 2p region shows two peaks that correspond to elemental silicon and silicon dioxide. Using these peaks the thickness of the native oxide (SiO2) was estimated using the equation of Strohmeier.1 The oxygen peak is symmetric. The material shows small amounts of carbon, fluorine, and nitrogen contamination. These silicon wafers are used as the base material for subsequent growth of templated carbon nanotubes.

  17. Bias-assisted KOH etching of macroporous silicon membranes

    International Nuclear Information System (INIS)

    Mathwig, K; Geilhufe, M; Müller, F; Gösele, U

    2011-01-01

    This paper presents an improved technique to fabricate porous membranes from macroporous silicon as a starting material. A crucial step in the fabrication process is the dissolution of silicon from the backside of the porous wafer by aqueous potassium hydroxide to open up the pores. We improved this step by biasing the silicon wafer electrically against the KOH. By monitoring the current–time characteristics a good control of the process is achieved and the yield is improved. Also, the etching can be stopped instantaneously and automatically by short-circuiting Si and KOH. Moreover, the bias-assisted etching allows for the controlled fabrication of silicon dioxide tube arrays when the silicon pore walls are oxidized and inverted pores are released.

  18. The suitability of silicon carbide for photocatalytic water oxidation

    Science.gov (United States)

    Aslam, M.; Qamar, M. T.; Ahmed, Ikram; Rehman, Ateeq Ur; Ali, Shahid; Ismail, I. M. I.; Hameed, Abdul

    2018-04-01

    Silicon carbide (SiC), owing to its extraordinary chemical stability and refractory properties, is widely used in the manufacturing industry. Despite the semiconducting nature and morphology-tuned band gap, its efficacy as photocatalysts has not been thoroughly investigated. The current study reports the synthesis, characterization and the evaluation of the capability of silicon carbide for hydrogen generation from water splitting. The optical characterization of the as-synthesized powder exposed the formation of multi-wavelength absorbing entities in synthetic process. The structural analysis by XRD and the fine microstructure analysis by HRTEM revealed the cubic 3C-SiC (β-SiC) and hexagonal α-polymorphs (2H-SiC and 6H-SiC) as major and minor phases, respectively. The Mott-Schottky analysis verified the n-type nature of the material with the flat band potential of - 0.7 V. In the electrochemical evaluation, the sharp increase in the peak currents in various potential ranges, under illumination, revealed the plausible potential of the material for the oxidation of water and generation of hydrogen. The generation of hydrogen and oxygen, as a consequence of water splitting in the actual photocatalytic experiments, was observed and measured. A significant increase in the yield of hydrogen was noticed in the presence of methanol as h + scavenger, whereas a retarding effect was offered by the Fe3+ entities that served as e - scavengers. The combined effect of both methanol and Fe3+ ions in the photocatalytic process was also investigated. Besides hydrogen gas, the other evolved gasses such as methane and carbon monoxide were also measured to estimate the mechanism of the process.

  19. New transport phenomena probed by dielectric spectroscopy of oxidized and non-oxidized porous silicon

    Energy Technology Data Exchange (ETDEWEB)

    Urbach, B.; Axelrod, E.; Sa' ar, A. [Racah Institute of Physics and the Center for Nanoscience and Nanotechnology, the Hebrew University of Jerusalem, Jerusalem 91904 (Israel)

    2007-05-15

    Dielectric spectroscopy accompanied by infrared (IR) and photoluminescence (PL) spectroscopy have been utilized to reveal the correlation between transport, optical and structural properties of oxidized porous silicon (PS). Three relaxation processes at low-, mid- and high-temperatures were observed, including dc-conductivity at high-temperatures. Both the low-T relaxation and the dc conductivity were found to be thermally activated processes that involve tunneling and hopping in between the nanocrystals in oxidized PS. We have found that the dc-conductivity is limited by geometrical constrictions along the transport channels, which are not effected by the oxidation process and are characterized by activation energies of about {proportional_to}0.85 eV. The low-T relaxation process involves thermal activation followed by tunneling in between neighbor nanocrystals, with somewhat lower activation energies. (copyright 2007 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim) (orig.)

  20. Exploring the deposition of oxides on silicon for photovoltaic cells by pulsed laser deposition

    NARCIS (Netherlands)

    Doeswijk, L.M.; de Moor, Hugo H.C.; Rogalla, Horst; Blank, David H.A.

    2002-01-01

    Since most commercially available solar cells are still made from silicon, we are exploring the introduction of passivating qualities in oxides, with the potential to serve as an antireflection coating. Pulsed laser deposition (PLD) was used to deposit TiO2 and SrTiO3 coatings on silicon substrates.

  1. Method for forming indium oxide/n-silicon heterojunction solar cells

    Science.gov (United States)

    Feng, Tom; Ghosh, Amal K.

    1984-03-13

    A high photo-conversion efficiency indium oxide/n-silicon heterojunction solar cell is spray deposited from a solution containing indium trichloride. The solar cell exhibits an Air Mass One solar conversion efficiency in excess of about 10%.

  2. Synchrotron x-ray reflectivity study of oxidation/passivation of copper and silicon

    International Nuclear Information System (INIS)

    Chu, Y.; Nagy, Z.; Parkhutik, V.; You, H.

    1999-01-01

    Synchrotron x-ray-scattering technique studies of copper and silicon electrochemical interfaces are reported. These two examples illustrate the application of synchrotron x-ray techniques for oxidation, passivation, and dissolution of metals and semiconductors

  3. Synchrotron x-ray reflectivity study of oxidation/passivation of copper and silicon.

    Energy Technology Data Exchange (ETDEWEB)

    Chu, Y.; Nagy, Z.; Parkhutik, V.; You, H.

    1999-07-21

    Synchrotron x-ray-scattering technique studies of copper and silicon electrochemical interfaces are reported. These two examples illustrate the application of synchrotron x-ray techniques for oxidation, passivation, and dissolution of metals and semiconductors.

  4. Nitric oxide levels in the anterior chamber of vitrectomized eyes with silicon oil

    Directory of Open Access Journals (Sweden)

    Paulo Escarião

    2013-10-01

    Full Text Available PURPOSE: To investigate the nitric oxide levels in the anterior chamber of eyes who underwent pars plana vitrectomy (PPV with silicone oil. METHODS: Patients who underwent PPV with silicon oil injection, from february 2005 to august 2007, were selected. Nine patients (nine eyes participated in the study (five women and four men. Nitric oxide concentration was quantified after the aspiration of aqueous humor samples during the procedure of silicon oil removal. Data such as: oil emulsification; presence of oil in the anterior chamber; intraocular pressure and time with silicone oil were evaluated. Values of p <0.05 were considered to be statistically significant. RESULTS: A positive correlation between nitric oxide concentration and time with silicon oil in the vitreous cavity (r=0.799 was observed. The nitric oxide concentration was significantly higher (p=0.02 in patients with silicon oil more than 24 months (0.90µmol/ml ± 0.59, n=3 in the vitreous cavity comparing to patients with less than 24 months (0.19µmol/ml ± 0.10, n=6. CONCLUSION: A positive correlation linking silicone oil time in the vitreous cavity with the nitric oxide concentration in the anterior chamber was observed.

  5. Role of atomic layer deposited aluminum oxide as oxidation barrier for silicon based materials

    Energy Technology Data Exchange (ETDEWEB)

    Fiorentino, Giuseppe, E-mail: g.fiorentino@tudelft.nl; Morana, Bruno [Department of Microelectronic, Delft University of Technology, Feldmannweg 17, 2628 CT Delft (Netherlands); Forte, Salvatore [Department of Electronic, University of Naples Federico II, Piazzale Tecchio, 80125 Napoli (Italy); Sarro, Pasqualina Maria [Department of Microelectronic, Delft University of Technology, Feldmannweg 17, 2628 CT, Delft (Netherlands)

    2015-01-15

    In this paper, the authors study the protective effect against oxidation of a thin layer of atomic layer deposited (ALD) aluminum oxide (Al{sub 2}O{sub 3}). Nitrogen doped silicon carbide (poly-SiC:N) based microheaters coated with ALD Al{sub 2}O{sub 3} are used as test structure to investigate the barrier effect of the alumina layers to oxygen and water vapor at very high temperature (up to 1000 °C). Different device sets have been fabricated changing the doping levels, to evaluate possible interaction between the dopants and the alumina layer. The as-deposited alumina layer morphology has been evaluated by means of AFM analysis and compared to an annealed sample (8 h at 1000 °C) to estimate the change in the grain structure and the film density. The coated microheaters are subjected to very long oxidation time in dry and wet environment (up to 8 h at 900 and 1000 °C). By evaluating the electrical resistance variation between uncoated reference devices and the ALD coated devices, the oxide growth on the SiC is estimated. The results show that the ALD alumina coating completely prevents the oxidation of the SiC up to 900 °C in wet environment, while an oxide thickness reduction of 50% is observed at 1000 °C compared to uncoated devices.

  6. Science and technology of plasma activated direct wafer bonding

    Science.gov (United States)

    Roberds, Brian Edward

    This dissertation studied the kinetics of silicon direct wafer bonding with emphasis on low temperature bonding mechanisms. The project goals were to understand the topological requirements for initial bonding, develop a tensile test to measure the bond strength as a function of time and temperature and, using the kinetic information obtained, develop lower temperature methods of bonding. A reproducible surface metrology metric for bonding was best described by power spectral density derived from atomic force microscopy measurements. From the tensile strength kinetics study it was found that low annealing temperatures could be used to obtain strong bonds, but at the expense of longer annealing times. Three models were developed to describe the kinetics. A diffusion controlled model and a reaction rate controlled model were developed for the higher temperature regimes (T > 600sp°C), and an electric field assisted oxidation model was proposed for the low temperature range. An in situ oxygen plasma treatment was used to further enhance the field-controlled mechanism which resulted in dramatic increases in the low temperature bonding kinetics. Multiple internal transmission Fourier transform infrared spectroscopy (MIT-FTIR) was used to monitor species evolution at the bonded interface and a capacitance-voltage (CV) study was undertaken to investigate charge distribution and surface states resulting from plasma activation. A short, less than a minute, plasma exposure prior to contacting the wafers was found to obtain very strong bonds for hydrophobic silicon wafers at very low temperatures (100sp°C). This novel bonding method may enable new technologies involving heterogeneous material systems or bonding partially fabricated devices to become realities.

  7. Etched ion tracks in silicon oxide and silicon oxynitride as charge injection or extraction channels for novel electronic structures

    International Nuclear Information System (INIS)

    Fink, D.; Petrov, A.V.; Hoppe, K.; Fahrner, W.R.; Papaleo, R.M.; Berdinsky, A.S.; Chandra, A.; Chemseddine, A.; Zrineh, A.; Biswas, A.; Faupel, F.; Chadderton, L.T.

    2004-01-01

    The impact of swift heavy ions onto silicon oxide and silicon oxynitride on silicon creates etchable tracks in these insulators. After their etching and filling-up with highly resistive matter, these nanometric pores can be used as charge extraction or injection paths towards the conducting channel in the underlying silicon. In this way, a novel family of electronic structures has been realized. The basic characteristics of these 'TEMPOS' (=tunable electronic material with pores in oxide on silicon) structures are summarized. Their functionality is determined by the type of insulator, the etch track diameters and lengths, their areal densities, the type of conducting matter embedded therein, and of course by the underlying semiconductor and the contact geometry. Depending on the TEMPOS preparation recipe and working point, the structures may resemble gatable resistors, condensors, diodes, transistors, photocells, or sensors, and they are therefore rather universally applicable in electronics. TEMPOS structures are often sensitive to temperature, light, humidity and organic gases. Also light-emitting TEMPOS structures have been produced. About 37 TEMPOS-based circuits such as thermosensors, photosensors, humidity and alcohol sensors, amplifiers, frequency multipliers, amplitude modulators, oscillators, flip-flops and many others have already been designed and successfully tested. Sometimes TEMPOS-based circuits are more compact than conventional electronics

  8. Electrical properties improvement of multicrystalline silicon solar cells using a combination of porous silicon and vanadium oxide treatment

    International Nuclear Information System (INIS)

    Derbali, L.; Ezzaouia, H.

    2013-01-01

    In this paper, we will report the enhancement of the conversion efficiency of multicrystalline silicon solar cells after coating the front surface with a porous silicon layer treated with vanadium oxide. The incorporation of vanadium oxide into the porous silicon (PS) structure, followed by a thermal treatment under oxygen ambient, leads to an important decrease of the surface reflectivity, a significant enhancement of the effective minority carrier lifetime (τ eff ) and a significant enhancement of the photoluminescence (PL) of the PS structure. We Obtained a noticeable increase of (τ eff ) from 3.11 μs to 134.74 μs and the surface recombination velocity (S eff ) have decreased from 8441 cm s −1 to 195 cm s −1 . The reflectivity spectra of obtained films, performed in the 300–1200 nm wavelength range, show an important decrease of the average reflectivity from 40% to 5%. We notice a significant improvement of the internal quantum efficiency (IQE) in the used multicrystalline silicon substrates. Results are analyzed and compared to those carried out on a reference (untreated) sample. The electrical properties of the treated silicon solar cells were improved noticeably as regard to the reference (untreated) sample.

  9. Method of fabricating porous silicon carbide (SiC)

    Science.gov (United States)

    Shor, Joseph S. (Inventor); Kurtz, Anthony D. (Inventor)

    1995-01-01

    Porous silicon carbide is fabricated according to techniques which result in a significant portion of nanocrystallites within the material in a sub 10 nanometer regime. There is described techniques for passivating porous silicon carbide which result in the fabrication of optoelectronic devices which exhibit brighter blue luminescence and exhibit improved qualities. Based on certain of the techniques described porous silicon carbide is used as a sacrificial layer for the patterning of silicon carbide. Porous silicon carbide is then removed from the bulk substrate by oxidation and other methods. The techniques described employ a two-step process which is used to pattern bulk silicon carbide where selected areas of the wafer are then made porous and then the porous layer is subsequently removed. The process to form porous silicon carbide exhibits dopant selectivity and a two-step etching procedure is implemented for silicon carbide multilayers.

  10. Nafion/Silicon Oxide Composite Membrane for High Temperature Proton Exchange Membrane Fuel Cell

    Institute of Scientific and Technical Information of China (English)

    2007-01-01

    Nafion/Silicon oxide composite membranes were produced via in situ sol-gel reaction of tetraethylorthosilicate (TEOS) in Nafion membranes. The physicochemical properties of the membranes were studied by FT-IR, TG-DSC and tensile strength. The results show that the silicon oxide is compatible with the Nafion membrane and the thermo stability of Nafion/Silicon oxide composite membrane is higher than that of Nafion membrane. Furthermore, the tensile strength of Nafion/Silicon oxide composite membrane is similar to that of the Nafion membrane. The proton conductivity of Nafion/Silicon oxide composite membrane is higher than that of Nafion membrane. When the Nafion/Silicon oxide composite membrane was employed as an electrolyte in H2/O2 PEMFC, a higher current density value (1 000 mA/cm2 at 0.38 V) than that of the Nafion 1135 membrane (100 mA/cm2 at 0.04 V) was obtained at 110 ℃.

  11. About the optical properties of oxidized black silicon structures

    Science.gov (United States)

    Pincik, E.; Brunner, R.; Kobayashi, H.; Mikula, M.; Kučera, M.; Švec, P.; Greguš, J.; Vojtek, P.; Zábudlá, Z.; Imamura, K.; Zahoran, M.

    2017-02-01

    The paper deals with the optical and morphological properties of thermally oxidized black silicon (OBSi) nano-crystalline specimens produced by the surface structure chemical transfer method (SSCT). This method can produce a nano-crystalline Si black color layer on c-Si with a range of thickness of ∼50 nm to ∼300 nm by the contact of c-Si immersed in chemical solutions HF + H2O2 with a catalytic mesh. We present and discuss mainly the photoluminescence properties of both polished c-Si and OBSi structures, respectively. The similar photoluminescence (PL) behaviors recorded at liquid helium (6 K) and room temperatures on both polished crystalline Si and OBSi samples, respectively, indicate the similar origin of recorded luminescence light. As the positions of PL maxima of OBSi structures are mainly related to the size of Si nanocrystallites and SiO(x), we therefore suppose that the size of the dominant parts of the luminated OBSi nanostructure is pre-determined by the used polishing Si procedure, and/or the distribution function of the number of formed crystallites on their size is very similar. The blue shift of both PL spectra reaching almost value of 0.40 eV observed after the decrease of the sample temperature to 6 K we relate also with the change of the semiconductor band gap width.

  12. Process for depositing an oxide epitaxially onto a silicon substrate and structures prepared with the process

    Science.gov (United States)

    McKee, Rodney A.; Walker, Frederick J.

    1993-01-01

    A process and structure involving a silicon substrate utilizes an ultra high vacuum and molecular beam epitaxy (MBE) methods to grow an epitaxial oxide film upon a surface of the substrate. As the film is grown, the lattice of the compound formed at the silicon interface becomes stabilized, and a base layer comprised of an oxide having a sodium chloride-type lattice structure grows epitaxially upon the compound so as to cover the substrate surface. A perovskite may then be grown epitaxially upon the base layer to render a product which incorporates silicon, with its electronic capabilities, with a perovskite having technologically-significant properties of its own.

  13. Role of masking oxide on silicon in processes of defect generation at formation of SIMOX structures

    CERN Document Server

    Askinazi, A Y; Miloglyadova, L V

    2002-01-01

    One investigated into Si-SiO sub 2 structures formed by implantation of oxygen ions into silicon (SIMOX-technology) by means of techniques based on measuring of high-frequency volt-farad characteristics and by means of electroluminescence. One determined existence of electrically active centres and of luminescence centres in the formed oxide layer near boundary with silicon. One clarified the role SiO sub 2 masking layer in silicon in defect generation under formation of the masked oxide layer. One established dependence of concentration of electrically active and luminescence centres on thickness of masking layer

  14. Effect of additive gases and injection methods on chemical dry etching of silicon nitride, silicon oxynitride, and silicon oxide layers in F2 remote plasmas

    International Nuclear Information System (INIS)

    Yun, Y. B.; Park, S. M.; Kim, D. J.; Lee, N.-E.; Kim, K. S.; Bae, G. H.

    2007-01-01

    The authors investigated the effects of various additive gases and different injection methods on the chemical dry etching of silicon nitride, silicon oxynitride, and silicon oxide layers in F 2 remote plasmas. N 2 and N 2 +O 2 gases in the F 2 /Ar/N 2 and F 2 /Ar/N 2 /O 2 remote plasmas effectively increased the etch rate of the layers. The addition of direct-injected NO gas increased the etch rates most significantly. NO radicals generated by the addition of N 2 and N 2 +O 2 or direct-injected NO molecules contributed to the effective removal of nitrogen and oxygen in the silicon nitride and oxide layers, by forming N 2 O and NO 2 by-products, respectively, and thereby enhancing SiF 4 formation. As a result of the effective removal of the oxygen, nitrogen, and silicon atoms in the layers, the chemical dry etch rates were enhanced significantly. The process regime for the etch rate enhancement of the layers was extended at elevated temperature

  15. The effect of oxidation on the efficiency and spectrum of photoluminescence of porous silicon

    International Nuclear Information System (INIS)

    Bulakh, B. M.; Korsunska, N. E.; Khomenkova, L. Yu.; Staraya, T. R.; Sheinkman, M. K.

    2006-01-01

    The photoluminescence spectra of porous silicon and their temperature dependences and transformations on aging are studied. It is shown that the infrared band prevailing in the spectra of as-prepared samples is due to exciton recombination in silicon crystallites. On aging, a well-pronounced additional band is observed at shorter wavelengths of the spectra. It is assumed that this band is due to the recombination of carriers that are excited in silicon crystallites and recombine via some centers located in oxide. It is shown that the broad band commonly observable in oxidized porous silicon is a superposition of the above two bands. The dependences of the peak positions and integrated intensities of the bands on time and temperature are studied. The data on the distribution of oxide centers with depth in the porous layer are obtained

  16. 18O isotopic tracer studies of silicon oxidation in dry oxygen

    International Nuclear Information System (INIS)

    Han, C.J.

    1986-01-01

    Oxidation of silicon in dry oxygen has been an important process in the integrated circuit industry for making gate insulators on metal-oxide-semiconductory (MOS) devices. This work examines this process using isotopic tracers of oxygen to determine the transport mechanisms of oxygen through silicon dioxide. Oxides were grown sequentially using mass-16 and mass-18 oxygen gas sources to label the oxygen molecules from each step. The resulting oxides are analyzed using secondary ion mass spectrometry (SIMS). The results of these analyses suggest two oxidant species are present during the oxidation, each diffuses and oxidizes separately during the process. A model from this finding using a sum of two linear-parabolic growth rates, each representing the growth rate from one of the oxidants, describes the reported oxidation kinetics in the literature closely. A fit of this relationship reveals excellent fits to the data for oxide thicknesses ranging from 30 A to 1 μm and for temperatures ranging from 800 to 1200 0 C. The mass-18 oxygen tracers also enable a direct observation of the oxygen solubility in the silicon dioxide during a dry oxidation process. The SIMS profiles establish a maximum solubility for interstitial oxygen at 1000 0 C at 2 x 10 20 cm -3 . Furthermore, the mass-18 oxygen profiles show negligible network diffusion during an 1000 0 C oxidation

  17. Distribution of impurity elements in slag-silicon equilibria for oxidative refining of metallurgical silicon for solar cell applications

    Energy Technology Data Exchange (ETDEWEB)

    Johnston, M.D.; Barati, M. [Department of Materials Science and Engineering, The University of Toronto, 184 College Street, Toronto, Ont. (Canada)

    2010-12-15

    The possibility of refining metallurgical grade silicon to a high-purity product for solar cell applications by the slagging of impurity elements was investigated. Distribution coefficients were determined for B, Ca, Mg, Fe, K and P between magnesia or alumina saturated Al{sub 2}O{sub 3}-CaO-MgO-SiO{sub 2} and Al{sub 2}O{sub 3}-BaO-SiO{sub 2} slags and silicon at 1500 C. The partitioning of the impurity elements between molten silicon and slag was examined in terms of basicity and oxygen potential of the slag, with particular focus on the behaviour of boron and phosphorus. The experimental results showed that both of these aspects of slag chemistry have a significant influence on the distribution coefficient of B and P. Increasing the oxygen potential by additions of silica was found to increase the distribution coefficients for both B and P. Increasing the basicity of the slag was not always effective in achieving high removal of these elements from silicon as excess amounts of basic oxides lower the activity of silica and consequently the oxygen potential. The extent of this effect is such that increasing basicity can lead to a decrease in distribution coefficient. Increasing lime in the slag increased distribution coefficients for B and P, but this counterbalancing effect was such that distributions were the lowest in barium-containing slags, despite barium oxide being the most basic of the fluxes used in this study. The highest removal efficiencies achieved were of the order of 80% and 90% for B and P, respectively. It was demonstrated that for the removal of B and P from metallurgical-grade silicon to solar-grade levels, a slag mass about 5 times the mass of silicon would be required. (author)

  18. Microstructure and oxidative degradation behavior of silicon carbide fiber Hi-Nicalon type S

    International Nuclear Information System (INIS)

    Takeda, M.; Urano, A.; Sakamoto, J.; Imai, Y.

    1998-01-01

    Polycarbosilane-derived SiC fibers, Nicalon, Hi-Nicalon, and Hi-Nicalon type S were exposed for 1 to 100 h at 1273-1773 K in air. Oxide layer growth and tensile strength change of these fibers were examined after the oxidation test. As a result, three types of SiC fibers decreased their strength as oxide layer thickness increased. Fracture origins were determined at near the oxide layer-fiber interface. Adhered fibers arised from softening of silicon oxide at high temperature were also observed. In this study, Hi-Nicalon type S showed better oxidation resistance than other polycarbosilane-derived SiC fibers after 1673 K or higher temperature exposure in air for 10 h. This result was explained by the poreless silicon oxide layer structure of Hi-Nicalon type S. (orig.)

  19. SOI silicon on glass for optical MEMS

    DEFF Research Database (Denmark)

    Larsen, Kristian Pontoppidan; Ravnkilde, Jan Tue; Hansen, Ole

    2003-01-01

    and a final sealing at the interconnects can be performed using a suitable polymer. Packaged MEMS on glass are advantageous within Optical MEMS and for sensitive capacitive devices. We report on experiences with bonding SOI to Pyrex. Uniform DRIE shallow and deep etching was achieved by a combination......A newly developed fabrication method for fabrication of single crystalline Si (SCS) components on glass, utilizing Deep Reactive Ion Etching (DRIE) of a Silicon On Insulator (SOI) wafer is presented. The devices are packaged at wafer level in a glass-silicon-glass (GSG) stack by anodic bonding...... of an optimized device layout and an optimized process recipe. The behavior of the buried oxide membrane when used as an etch stop for the through-hole etch is described. No harmful buckling or fracture of the membrane is observed for an oxide thickness below 1 μm, but larger and more fragile released structures...

  20. Silicon-Rich Silicon Carbide Hole-Selective Rear Contacts for Crystalline-Silicon-Based Solar Cells.

    Science.gov (United States)

    Nogay, Gizem; Stuckelberger, Josua; Wyss, Philippe; Jeangros, Quentin; Allebé, Christophe; Niquille, Xavier; Debrot, Fabien; Despeisse, Matthieu; Haug, Franz-Josef; Löper, Philipp; Ballif, Christophe

    2016-12-28

    The use of passivating contacts compatible with typical homojunction thermal processes is one of the most promising approaches to realizing high-efficiency silicon solar cells. In this work, we investigate an alternative rear-passivating contact targeting facile implementation to industrial p-type solar cells. The contact structure consists of a chemically grown thin silicon oxide layer, which is capped with a boron-doped silicon-rich silicon carbide [SiC x (p)] layer and then annealed at 800-900 °C. Transmission electron microscopy reveals that the thin chemical oxide layer disappears upon thermal annealing up to 900 °C, leading to degraded surface passivation. We interpret this in terms of a chemical reaction between carbon atoms in the SiC x (p) layer and the adjacent chemical oxide layer. To prevent this reaction, an intrinsic silicon interlayer was introduced between the chemical oxide and the SiC x (p) layer. We show that this intrinsic silicon interlayer is beneficial for surface passivation. Optimized passivation is obtained with a 10-nm-thick intrinsic silicon interlayer, yielding an emitter saturation current density of 17 fA cm -2 on p-type wafers, which translates into an implied open-circuit voltage of 708 mV. The potential of the developed contact at the rear side is further investigated by realizing a proof-of-concept hybrid solar cell, featuring a heterojunction front-side contact made of intrinsic amorphous silicon and phosphorus-doped amorphous silicon. Even though the presented cells are limited by front-side reflection and front-side parasitic absorption, the obtained cell with a V oc of 694.7 mV, a FF of 79.1%, and an efficiency of 20.44% demonstrates the potential of the p + /p-wafer full-side-passivated rear-side scheme shown here.

  1. On the oxidation mechanism of microcrystalline silicon thin films studied by Fourier transform infrared spectroscopy

    NARCIS (Netherlands)

    Bronneberg, A. C.; Smets, A. H. M.; Creatore, M.; M. C. M. van de Sanden,

    2011-01-01

    Insight into the oxidation mechanism of microcrystalline silicon thin films has been obtained by means of Fourier transform infrared spectroscopy. The films were deposited by using the expanding thermal plasma and their oxidation upon air exposure was followed in time. Transmission spectra were

  2. Super-oxidation of silicon nanoclusters: magnetism and reactive oxygen species at the surface

    Energy Technology Data Exchange (ETDEWEB)

    Lepeshkin, Sergey; Baturin, Vladimir; Tikhonov, Evgeny; Matsko, Nikita; Uspenskii, Yurii; Naumova, Anastasia; Feya, Oleg; Schoonen, Martin A.; Oganov, Artem R.

    2016-01-01

    Oxidation of silicon nanoclusters depending on the temperature and oxygen pressure is explored from first principles using the evolutionary algorithm, and structural and thermodynamic analysis. From our calculations of 90 SinOm clusters we found that under normal conditions oxidation does not stop at the stoichiometric SiO2 composition, as it does in bulk silicon, but goes further placing extra oxygen atoms on the cluster surface. These extra atoms are responsible for light emission, relevant to reactive oxygen species and many of them are magnetic. We argue that the super-oxidation effect is size-independent and discuss its relevance to nanotechnology and miscellaneous applications, including biomedical ones.

  3. Fabrication of amorphous silicon nanoribbons by atomic force microscope tip-induced local oxidation for thin film device applications

    International Nuclear Information System (INIS)

    Pichon, L; Rogel, R; Demami, F

    2010-01-01

    We demonstrate the feasibility of induced local oxidation of amorphous silicon by atomic force microscopy. The resulting local oxide is used as a mask for the elaboration of a thin film silicon resistor. A thin amorphous silicon layer deposited on a glass substrate is locally oxidized following narrow continuous lines. The corresponding oxide line is then used as a mask during plasma etching of the amorphous layer leading to the formation of a nanoribbon. Such an amorphous silicon nanoribbon is used for the fabrication of the resistor

  4. Effect of yttrium on the oxide scale adherence of pre-oxidized silicon-containing heat-resistant alloy

    International Nuclear Information System (INIS)

    Yan Jingbo; Gao Yimin; Shen Yudi; Yang Fang; Yi Dawei; Ye Zhaozhong; Liang Long; Du Yingqian

    2011-01-01

    Highlights: → AE experiment shows yttrium has a beneficial effect on the pre-oxidized HP40 alloy. → Yttrium facilitates the formation of internal oxide after 10 h of oxidation. → Internal oxide changes the rupture behaviour of the oxide scale. → Twins form in the internal oxide and improve the binding strength of the scale. - Abstract: This paper investigates the effect of the rare earth element yttrium on the rupture behaviour of the oxide scale on the silicon-containing heat-resistant alloy during cooling. After 10 h of oxidation, yttrium is found to facilitate the formation of internal oxides (silica) at the scale-matrix interface. Due to the twinning observed by scanning transmission electron microscopy (STEM) in silica, the critical strain value for the scale failure can be dramatically improved, and the formation of cracks at the scale-matrix interface is inhibited.

  5. Effect of trichloroethylene enhancement on deposition rate of low-temperature silicon oxide films by silicone oil and ozone

    Science.gov (United States)

    Horita, Susumu; Jain, Puneet

    2017-08-01

    A low-temperature silcon oxide film was deposited at 160 to 220 °C using an atmospheric pressure CVD system with silicone oil vapor and ozone gases. It was found that the deposition rate is markedly increased by adding trichloroethylene (TCE) vapor, which is generated by bubbling TCE solution with N2 gas flow. The increase is more than 3 times that observed without TCE, and any contamination due to TCE is hardly observed in the deposited Si oxide films from Fourier transform infrared spectra.

  6. Unveiling the Formation Pathway of Single Crystalline Porous Silicon Nanowires

    Science.gov (United States)

    Zhong, Xing; Qu, Yongquan; Lin, Yung-Chen; Liao, Lei; Duan, Xiangfeng

    2011-01-01

    Porous silicon nanowire is emerging as an interesting material system due to its unique combination of structural, chemical, electronic, and optical properties. To fully understand their formation mechanism is of great importance for controlling the fundamental physical properties and enabling potential applications. Here we present a systematic study to elucidate the mechanism responsible for the formation of porous silicon nanowires in a two-step silver-assisted electroless chemical etching method. It is shown that silicon nanowire arrays with various porosities can be prepared by varying multiple experimental parameters such as the resistivity of the starting silicon wafer, the concentration of oxidant (H2O2) and the amount of silver catalyst. Our study shows a consistent trend that the porosity increases with the increasing wafer conductivity (dopant concentration) and oxidant (H2O2) concentration. We further demonstrate that silver ions, formed by the oxidation of silver, can diffuse upwards and re-nucleate on the sidewalls of nanowires to initiate new etching pathways to produce porous structure. The elucidation of this fundamental formation mechanism opens a rational pathway to the production of wafer-scale single crystalline porous silicon nanowires with tunable surface areas ranging from 370 m2·g−1 to 30 m2·g−1, and can enable exciting opportunities in catalysis, energy harvesting, conversion, storage, as well as biomedical imaging and therapy. PMID:21244020

  7. Switchable Super-Hydrophilic/Hydrophobic Indium Tin Oxide (ITO) Film Surfaces on Reactive Ion Etching (RIE) Textured Si Wafer.

    Science.gov (United States)

    Kim, Hwa-Min; Litao, Yao; Kim, Bonghwan

    2015-11-01

    We have developed a surface texturing process for pyramidal surface features along with an indium tin oxide (ITO) coating process to fabricate super-hydrophilic conductive surfaces. The contact angle of a water droplet was less than 5 degrees, which means that an extremely high wettability is achievable on super-hydrophilic surfaces. We have also fabricated a super-hydrophobic conductive surface using an additional coating of polytetrafluoroethylene (PTFE) on the ITO layer coated on the textured Si surface; the ITO and PTFE films were deposited by using a conventional sputtering method. We found that a super-hydrophilic conductive surface is produced by ITO coated on the pyramidal Si surface (ITO/Si), with contact angles of approximately 0 degrees and a resistivity of 3 x 10(-4) Ω x cm. These values are highly dependent on the substrate temperature during the sputtering process. We also found that the super-hydrophobic conductive surface produced by the additional coating of PTFE on the pyramidal Si surface with an ITO layer (PTFE/ITO/Si) has a contact angle of almost 160 degrees and a resistivity of 3 x 10(-4) Ω x cm, with a reflectance lower than 9%. Therefore, these processes can be used to fabricate multifunctional features of ITO films for switchable super-hydrophilic and super-hydrophobic surfaces.

  8. The oxidation of titanium nitride- and silicon nitride-coated stainless steel in carbon dioxide environments

    International Nuclear Information System (INIS)

    Mitchell, D.R.G.; Stott, F.H.

    1992-01-01

    A study has been undertaken into the effects of thin titanium nitride and silicon nitride coatings, deposited by physical vapour deposition and chemical vapour deposition processes, on the oxidation resistance of 321 stainless steel in a simulated advanced gas-cooled reactor carbon dioxide environment for long periods at 550 o C and 700 o C under thermal-cycling conditions. The uncoated steel contains sufficient chromium to develop a slow-growing chromium-rich oxide layer at these temperatures, particularly if the surfaces have been machine-abraded. Failure of this layer in service allows formation of less protective iron oxide-rich scales. The presence of a thin (3-4 μm) titanium nitride coating is not very effective in increasing the oxidation resistance since the ensuing titanium oxide scale is not a good barrier to diffusion. Even at 550 o C, iron oxide-rich nodules are able to develop following relatively rapid oxidation and breakdown of the coating. At 700 o C, the coated specimens oxidize at relatively similar rates to the uncoated steel. A thin silicon nitride coating gives improved oxidation resistance, with both the coating and its slow-growing oxide being relatively electrically insulating. The particular silicon nitride coating studied here was susceptible to spallation on thermal cycling, due to an inherently weak coating/substrate interface. (Author)

  9. Preparation of highly aligned silicon oxide nanowires with stable intensive photoluminescence

    International Nuclear Information System (INIS)

    Duraia, El-Shazly M.; Mansurov, Z.A.; Tokmolden, S.; Beall, Gary W.

    2010-01-01

    In this work we report the successful formation of highly aligned vertical silicon oxide nanowires. The source of silicon was from the substrate itself without any additional source of silicon. X-ray measurement demonstrated that our nanowires are amorphous. Photoluminescence measurements were conducted through 18 months and indicated that there is a very good intensive emission peaks near the violet regions. The FTIR measurements indicated the existence of peaks at 463, 604, 795 and a wide peak at 1111 cm -1 and this can be attributed to Si-O-Si and Si-O stretching vibrations. We also report the formation of the octopus-like silicon oxide nanowires and the growth mechanism of these structures was discussed.

  10. Preparation of highly aligned silicon oxide nanowires with stable intensive photoluminescence

    Energy Technology Data Exchange (ETDEWEB)

    Duraia, El-Shazly M., E-mail: duraia_physics@yahoo.co [Suez Canal University, Faculty of Science, Physics Department, Ismailia (Egypt); Al-Farabi Kazakh National University, Almaty (Kazakhstan); Institute of Physics and Technology, 11 Ibragimov Street, 050032 Almaty (Kazakhstan); Mansurov, Z.A. [Al-Farabi Kazakh National University, Almaty (Kazakhstan); Tokmolden, S. [Institute of Physics and Technology, 11 Ibragimov Street, 050032 Almaty (Kazakhstan); Beall, Gary W. [Texas State University-San Marcos, Department of Chemistry and Biochemistry, 601 University Dr., San Marcos, TX 78666 (United States)

    2010-02-15

    In this work we report the successful formation of highly aligned vertical silicon oxide nanowires. The source of silicon was from the substrate itself without any additional source of silicon. X-ray measurement demonstrated that our nanowires are amorphous. Photoluminescence measurements were conducted through 18 months and indicated that there is a very good intensive emission peaks near the violet regions. The FTIR measurements indicated the existence of peaks at 463, 604, 795 and a wide peak at 1111 cm{sup -1} and this can be attributed to Si-O-Si and Si-O stretching vibrations. We also report the formation of the octopus-like silicon oxide nanowires and the growth mechanism of these structures was discussed.

  11. Sponge-like reduced graphene oxide/silicon/carbon nanotube composites for lithium ion batteries

    Science.gov (United States)

    Fang, Menglu; Wang, Zhao; Chen, Xiaojun; Guan, Shiyou

    2018-04-01

    Three-dimensional sponge-like reduced graphene oxide/silicon/carbon nanotube composites were synthesized by one-step hydrothermal self-assembly using silicon nanoparticles, graphene oxide and amino modified carbon nanotubes to develop high-performance anode materials of lithium ion batteries. Scanning electron microscopy and transmission electron microscopy images show the structure of composites that Silicon nanoparticles are coated with reduced graphene oxide while amino modified carbon nanotubes wrap around the reduced graphene oxide in the composites. When applied to lithium ion battery, these composites exhibit high initial specific capacity of 2552 mA h/g at a current density of 0.05 A/g. In addition, reduced graphene oxide/silicon/carbon nanotube composites also have better cycle stability than bare Silicon nanoparticles electrode with the specific capacity of 1215 mA h/g after 100 cycles. The three-dimension sponge-like structure not only ensures the electrical conductivity but also buffers the huge volume change, which has broad potential application in the field of battery.

  12. Covalent Surface Modification of Silicon Oxides with Alcohols in Polar Aprotic Solvents.

    Science.gov (United States)

    Lee, Austin W H; Gates, Byron D

    2017-09-05

    Alcohol-based monolayers were successfully formed on the surfaces of silicon oxides through reactions performed in polar aprotic solvents. Monolayers prepared from alcohol-based reagents have been previously introduced as an alternative approach to covalently modify the surfaces of silicon oxides. These reagents are readily available, widely distributed, and are minimally susceptible to side reactions with ambient moisture. A limitation of using alcohol-based compounds is that previous reactions required relatively high temperatures in neat solutions, which can degrade some alcohol compounds or could lead to other unwanted side reactions during the formation of the monolayers. To overcome these challenges, we investigate the condensation reaction of alcohols on silicon oxides carried out in polar aprotic solvents. In particular, propylene carbonate has been identified as a polar aprotic solvent that is relatively nontoxic, readily accessible, and can facilitate the formation of alcohol-based monolayers. We have successfully demonstrated this approach for tuning the surface chemistry of silicon oxide surfaces with a variety of alcohol containing compounds. The strategy introduced in this research can be utilized to create silicon oxide surfaces with hydrophobic, oleophobic, or charged functionalities.

  13. Recovery of indium-tin-oxide/silicon heterojunction solar cells by thermal annealing

    OpenAIRE

    Morales Vilches, Ana Belén; Voz Sánchez, Cristóbal; Colina Brito, Mónica Alejandra; López Rodríguez, Gema; Martín García, Isidro; Ortega Villasclaras, Pablo Rafael; Orpella García, Alberto; Alcubilla González, Ramón

    2014-01-01

    The emitter of silicon heterojunction solar cells consists of very thin hydrogenated amorphous silicon layers deposited at low temperature. The high sheet resistance of this type of emitter requires a transparent conductive oxide layer, which also acts as an effective antireflection coating. The deposition of this front electrode, typically by Sputtering, involves a relatively high energy ion bombardment at the surface that could degrade the emitter quality. The work function of the tra...

  14. Stressing effects on the charge trapping of silicon oxynitride prepared by thermal oxidation of LPCVD Si-rich silicon nitride

    International Nuclear Information System (INIS)

    Choi, H.Y.; Wong, H.; Filip, V.; Sen, B.; Kok, C.W.; Chan, M.; Poon, M.C.

    2006-01-01

    It was recently found that the silicon oxynitride prepared by oxidation of silicon-rich silicon nitride (SRN) has several important features. The high nitrogen and extremely low hydrogen content of this material allows it to have a high dielectric constant and a low trap density. The present work investigates in further detail the electrical reliability of this kind of gate dielectric films by studying the charge trapping and interface state generation induced by constant current stressing. Capacitance-voltage (C-V) measurements indicate that for oxidation temperatures of 850 and 950 deg. C, the interface trap generation is minimal because of the high nitrogen content at the interface. At a higher oxidation temperature of 1050 deg. C, a large flatband shift is found for constant current stressing. This observation can be explained by the significant reduction of the nitrogen content and the phase separation effect at this temperature as found by X-ray photoelectron spectroscopy study. In addition to the high nitrogen content, the Si atoms at the interface exist in the form of random bonding to oxygen and nitrogen atoms for samples oxidized at 850 and 950 deg. C. This structure reduces the interface bonding constraint and results in the low interface trap density. For heavily oxidized samples the trace amount of interface nitrogen atoms exist in the form of a highly constraint SiN 4 phase and the interface oxynitride layer is a random mixture of SiO 4 and SiN 4 phases, which consequently reduces the reliability against high energy electron stressing

  15. Modeling of direct wafer bonding: Effect of wafer bow and etch patterns

    Science.gov (United States)

    Turner, K. T.; Spearing, S. M.

    2002-12-01

    Direct wafer bonding is an important technology for the manufacture of silicon-on-insulator substrates and microelectromechanical systems. As devices become more complex and require the bonding of multiple patterned wafers, there is a need to understand the mechanics of the bonding process. A general bonding criterion based on the competition between the strain energy accumulated in the wafers and the surface energy that is dissipated as the bond front advances is developed. The bonding criterion is used to examine the case of bonding bowed wafers. An analytical expression for the strain energy accumulation rate, which is the quantity that controls bonding, and the final curvature of a bonded stack is developed. It is demonstrated that the thickness of the wafers plays a large role and bonding success is independent of wafer diameter. The analytical results are verified through a finite element model and a general method for implementing the bonding criterion numerically is presented. The bonding criterion developed permits the effect of etched features to be assessed. Shallow etched patterns are shown to make bonding more difficult, while it is demonstrated that deep etched features can facilitate bonding. Model results and their process design implications are discussed in detail.

  16. Silicon microphotonic waveguides

    International Nuclear Information System (INIS)

    Ta'eed, V.; Steel, M.J.; Grillet, C.; Eggleton, B.; Du, J.; Glasscock, J.; Savvides, N.

    2004-01-01

    Full text: Silicon microphotonic devices have been drawing increasing attention in the past few years. The high index-difference between silicon and its oxide (Δn = 2) suggests a potential for high-density integration of optical functions on to a photonic chip. Additionally, it has been shown that silicon exhibits strong Raman nonlinearity, a necessary property as light interaction can occur only by means of nonlinearities in the propagation medium. The small dimensions of silicon waveguides require the design of efficient tapers to couple light to them. We have used the beam propagation method (RSoft BeamPROP) to understand the principles and design of an inverse-taper mode-converter as implemented in several recent papers. We report on progress in the design and fabrication of silicon-based waveguides. Preliminary work has been conducted by patterning silicon-on-insulator (SOI) wafers using optical lithography and reactive ion etching. Thus far, only rib waveguides have been designed, as single-mode ridge-waveguides are beyond the capabilities of conventional optical lithography. We have recently moved to electron beam lithography as the higher resolutions permitted will provide the flexibility to begin fabricating sub-micron waveguides

  17. Reticle variation influence on manufacturing line and wafer device performance

    Science.gov (United States)

    Nistler, John L.; Spurlock, Kyle

    1994-01-01

    Cost effective manufacturing of devices at 0.5, 0.35 and 0.25μm geometries will be highly dependent on a companys' ability to obtain an economic return on investment. The high capital investment in equipment and facilities, not to mention the related chemical and wafer costs, for producing 200mm silicon wafers requires aspects of wafer processing to be tightly controlled. Reduction in errors and enhanced yield management requires early correction or avoidance of reticle problems. It is becoming increasingly important to recognize and track all pertinent factors impacting both the technical and financial viability of a wafer manufacturing fabrication area. Reticle related effects on wafer manufacturing can be costly and affect the total quality perceived by the device customer.

  18. High aspect ratio silicon nanomoulds for UV embossing fabricated by directional thermal oxidation using an oxidation mask

    International Nuclear Information System (INIS)

    Chen, L Q; Chan-Park, Mary B; Yan, Y H; Zhang Qing; Li, C M; Zhang Jun

    2007-01-01

    Nanomoulding is simple and economical but moulds with nanoscale features are usually prohibitively expensive to fabricate because nanolithographic techniques are mostly serial and time-consuming for large-area patterning. This paper describes a novel, simple and inexpensive parallel technique for fabricating nanoscale pattern moulds by silicon etching followed by thermal oxidation. The mask pattern can be made by direct photolithography or photolithography followed by metal overetching for submicron- and nanoscale features, respectively. To successfully make nanoscale channels having a post-oxidation cross-sectional shape similar to that of the original channel, an oxidation mask to promote unidirectional (specifically horizontal) oxide growth is found to be essential. A silicon nitride or metal mask layer prevents vertical oxidation of the Si directly beneath it. Without this mask, rectangular channels become smaller but are V-shaped after oxidation. By controlling the silicon etch depth and oxidation time, moulds with high aspect ratio channels having widths ranging from 500 to 50 nm and smaller can be obtained. The nanomould, when passivated with a Teflon-like layer, can be used for first-generation replication using ultraviolet (UV) nanoembossing and second-generation replication in other materials, such as polydimethylsiloxane (PDMS). The PDMS stamp, which was subsequently coated with Au, was used for transfer printing of Au electrodes with a 600 nm gap which will find applications in plastics nanoelectronics

  19. Characteristics of MOSFETs fabricated in silicon-on-insulator material formed by high-dose oxygen ion implantation

    International Nuclear Information System (INIS)

    Lam, H.W.; Pinizzotto, R.F.; Yuan, H.T.; Bellavance, D.W.

    1981-01-01

    By implanting a dose of 6 x 10 17 cm -2 of 32 O 2 + at 300 keV into a silicon wafer, a buried oxide layer is formed. Crystallinity of the silicon layer above the buried oxide layer is maintained by applying a high (>200 0 C) substrate temperature during the ion implantation process. A two-step anneal cycle is found to be adequate to form the insulating buried oxide layer and to repair the implantation damage in the silicon layer on top of the buried oxide. A surface electron mobility as high as 710 cm 2 /Vs has been measured in n-channel MOSFETs fabricated in a 0.5 μm-thick epitaxial layer grown on the buried oxide wafer. A minimum subthreshold current of about 10 pA per micron of channel width at Vsub(DS)=2 V has been measured. (author)

  20. Designing high performance precursors for atomic layer deposition of silicon oxide

    Energy Technology Data Exchange (ETDEWEB)

    Mallikarjunan, Anupama, E-mail: mallika@airproducts.com; Chandra, Haripin; Xiao, Manchao; Lei, Xinjian; Pearlstein, Ronald M.; Bowen, Heather R.; O' Neill, Mark L. [Air Products and Chemicals, Inc., 1969 Palomar Oaks Way, Carlsbad, California 92011 (United States); Derecskei-Kovacs, Agnes [Air Products and Chemicals, Inc., 7201 Hamilton Blvd., Allentown, Pennsylvania 18195 (United States); Han, Bing [Air Products and Chemicals, Inc., 2 Dongsanhuan North Road, Chaoyang District, Beijing 100027 (China)

    2015-01-15

    Conformal and continuous silicon oxide films produced by atomic layer deposition (ALD) are enabling novel processing schemes and integrated device structures. The increasing drive toward lower temperature processing requires new precursors with even higher reactivity. The aminosilane family of precursors has advantages due to their reactive nature and relative ease of use. In this paper, the authors present the experimental results that reveal the uniqueness of the monoaminosilane structure [(R{sub 2}N)SiH{sub 3}] in providing ultralow temperature silicon oxide depositions. Disubstituted aminosilanes with primary amines such as in bis(t-butylamino)silane and with secondary amines such as in bis(diethylamino)silane were compared with a representative monoaminosilane: di-sec-butylaminosilane (DSBAS). DSBAS showed the highest growth per cycle in both thermal and plasma enhanced ALD. These findings show the importance of the arrangement of the precursor's organic groups in an ALD silicon oxide process.

  1. Electronic structure of indium-tungsten-oxide alloys and their energy band alignment at the heterojunction to crystalline silicon

    Science.gov (United States)

    Menzel, Dorothee; Mews, Mathias; Rech, Bernd; Korte, Lars

    2018-01-01

    The electronic structure of thermally co-evaporated indium-tungsten-oxide films is investigated. The stoichiometry is varied from pure tungsten oxide to pure indium oxide, and the band alignment at the indium-tungsten-oxide/crystalline silicon heterointerface is monitored. Using in-system photoelectron spectroscopy, optical spectroscopy, and surface photovoltage measurements, we show that the work function of indium-tungsten-oxide continuously decreases from 6.3 eV for tungsten oxide to 4.3 eV for indium oxide, with a concomitant decrease in the band bending at the hetero interface to crystalline silicon than indium oxide.

  2. Lithium-storage Properties of Gallic Acid-Reduced Graphene Oxide and Silicon-Graphene Composites

    International Nuclear Information System (INIS)

    Xu, Binghui; Zhang, Jintao; Gu, Yi; Zhang, Zhi; Al Abdulla, Wael; Kumar, Nanjundan Ashok; Zhao, X.S.

    2016-01-01

    Graphene oxide (GO) was de-oxygenated using gallic acid under mild conditions to prepare reduced graphene oxide (RGO). The resultant RGO showed a lithium-ion storage capacity of 1280 mA h g −1 at a current density of 200 mA g −1 after 350 cycles when used as an anode for lithium ion batteries. The RGO was further used to stabilize silicon (Si) nanoparticles to prepare silicon-graphene composite electrode materials. Experimental results showed that a composite electrode prepared with a mass ratio of Si:GO = 1:2 exhibited the best lithium ion storage performance.

  3. Surface texture of single-crystal silicon oxidized under a thin V{sub 2}O{sub 5} layer

    Energy Technology Data Exchange (ETDEWEB)

    Nikitin, S. E., E-mail: nikitin@mail.ioffe.ru; Verbitskiy, V. N.; Nashchekin, A. V.; Trapeznikova, I. N.; Bobyl, A. V.; Terukova, E. E. [Russian Academy of Sciences, Ioffe Physical–Technical Institute (Russian Federation)

    2017-01-15

    The process of surface texturing of single-crystal silicon oxidized under a V{sub 2}O{sub 5} layer is studied. Intense silicon oxidation at the Si–V{sub 2}O{sub 5} interface begins at a temperature of 903 K which is 200 K below than upon silicon thermal oxidation in an oxygen atmosphere. A silicon dioxide layer 30–50 nm thick with SiO{sub 2} inclusions in silicon depth up to 400 nm is formed at the V{sub 2}O{sub 5}–Si interface. The diffusion coefficient of atomic oxygen through the silicon-dioxide layer at 903 K is determined (D ≥ 2 × 10{sup –15} cm{sup 2} s{sup –1}). A model of low-temperature silicon oxidation, based on atomic oxygen diffusion from V{sub 2}O{sub 5} through the SiO{sub 2} layer to silicon, and SiO{sub x} precipitate formation in silicon is proposed. After removing the V{sub 2}O{sub 5} and silicon-dioxide layers, texture is formed on the silicon surface, which intensely scatters light in the wavelength range of 300–550 nm and is important in the texturing of the front and rear surfaces of solar cells.

  4. Influence of post-annealing on the electrical properties of metal/oxide/silicon nitride/oxide/silicon capacitors for flash memories

    International Nuclear Information System (INIS)

    Kim, Hee Dong; An, Ho-Myoung; Kim, Kyoung Chan; Seo, Yu Jeong; Kim, Tae Geun

    2008-01-01

    We report the effect of post-annealing on the electrical properties of metal/oxide/silicon nitride/oxide/silicon (MONOS) capacitors. Four samples, namely as-deposited and annealed at 750, 850 and 950 °C for 30 s in nitrogen ambient by a rapid thermal process, were prepared and characterized for comparison. The best performance with the largest memory window of 4.4 V and the fastest program speed of 10 ms was observed for the sample annealed at 850 °C. In addition, the highest traps density of 6.84 × 10 18 cm −3 was observed with ideal trap distributions for the same sample by capacitance–voltage (C–V) measurement. These results indicate that the memory traps in the ONO structure can be engineered by post-annealing to improve the electrical properties of the MONOS device

  5. MOS structures containing silicon nanoparticles for memory device applications

    International Nuclear Information System (INIS)

    Nedev, N; Zlatev, R; Nesheva, D; Manolov, E; Levi, Z; Brueggemann, R; Meier, S

    2008-01-01

    Metal-oxide-silicon structures containing layers with amorphous or crystalline silicon nanoparticles in a silicon oxide matrix are fabricated by sequential physical vapour deposition of SiO x (x = 1.15) and RF sputtering of SiO 2 on n-type crystalline silicon, followed by high temperature annealing in an inert gas ambient. Depending on the annealing temperature, 700 deg. C or 1000 deg. C, amorphous or crystalline silicon nanoparticles are formed in the silicon oxide matrix. The annealing process is used not only for growing nanoparticles but also to form a dielectric layer with tunnelling thickness at the silicon/insulator interface. High frequency C-V measurements demonstrate that both types of structures can be charged negatively or positively by applying a positive or negative voltage on the gate. The structures with amorphous silicon nanoparticles show several important advantages compared to the nanocrystal ones, such as lower defect density at the interface between the crystalline silicon wafer and the tunnel silicon oxide, better retention characteristics and better reliability

  6. Black silicon with black bus-bar strings

    DEFF Research Database (Denmark)

    Davidsen, Rasmus Schmidt; Tang, Peter Torben; Mizushima, Io

    2016-01-01

    We present the combination of black silicon texturing and blackened bus-bar strings as a potential method for obtaining all-black solar panels, while using conventional, front-contacted solar cells. Black silicon was realized by mask-less reactive ion etching resulting in total, average reflectance...... below 0.5% across a 156x156 mm2 silicon wafer. Black bus-bars were realized by oxidized copper resulting in reflectance below 3% in the entire visible wavelength range. The combination of these two technologies may result in aesthetic, all-black panels based on conventional, front-contacted solar cells...

  7. Transparent conducting oxide layers for thin film silicon solar cells

    NARCIS (Netherlands)

    Rath, J.K.; Liu, Y.; de Jong, M.M.; de Wild, J.; Schuttauf, J.A.; Brinza, M.; Schropp, R.E.I.

    2009-01-01

    Texture etching of ZnO:1%Al layers using diluted HCl solution provides excellent TCOs with crater type surface features for the front contact of superstrate type of thin film silicon solar cells. The texture etched ZnO:Al definitely gives superior performance than Asahi SnO2:F TCO in case of

  8. Spectroellipsometric detection of silicon substrate damage caused by radiofrequency sputtering of niobium oxide

    Science.gov (United States)

    Lohner, Tivadar; Serényi, Miklós; Szilágyi, Edit; Zolnai, Zsolt; Czigány, Zsolt; Khánh, Nguyen Quoc; Petrik, Péter; Fried, Miklós

    2017-11-01

    Substrate surface damage induced by deposition of metal atoms by radiofrequency (rf) sputtering or ion beam sputtering onto single-crystalline silicon (c-Si) surface has been characterized earlier by electrical measurements. The question arises whether it is possible to characterize surface damage using spectroscopic ellipsometry (SE). In our experiments niobium oxide layers were deposited by rf sputtering on c-Si substrates in gas mixture of oxygen and argon. Multiple angle of incidence spectroscopic ellipsometry measurements were performed, a four-layer optical model (surface roughness layer, niobium oxide layer, native silicon oxide layer and ion implantation-amorphized silicon [i-a-Si] layer on a c-Si substrate) was created in order to evaluate the spectra. The evaluations yielded thicknesses of several nm for the i-a-Si layer. Better agreement could be achieved between the measured and the generated spectra by inserting a mixed layer (with components of c-Si and i-a-Si applying the effective medium approximation) between the silicon oxide layer and the c-Si substrate. High depth resolution Rutherford backscattering (RBS) measurements were performed to investigate the interface disorder between the deposited niobium oxide layer and the c-Si substrate. Atomic resolution cross-sectional transmission electron microscopy investigation was applied to visualize the details of the damaged subsurface region of the substrate.

  9. Silicon fabric for multi-functional applications

    KAUST Repository

    Sevilla, Galo T.; Rojas, Jhonathan Prieto; Ahmed, Sally; Hussain, Aftab M.; Inayat, Salman Bin; Hussain, Muhammad Mustafa

    2013-01-01

    This paper reports a generic process flow to fabricate mechanically flexible and optically semi-transparent thermoelectric generators (TEGs), micro lithium-ion batteries (μLIB) and metal-oxide-semiconductor capacitors (MOSCAPs) on mono-crystalline silicon fabric platforms from standard bulk silicon (100) wafers. All the fabricated devices show outstanding mechanical flexibility and performance, making an important step towards monolithic integration of Energy Chip (self-powered devices) including energy harvesters and electronic devices on flexible platforms. We also report a recyclability process for the remaining bulk substrate after release, allowing us to achieve a low cost flexible platform for high performance applications. © 2013 IEEE.

  10. Silicon fabric for multi-functional applications

    KAUST Repository

    Sevilla, Galo T.

    2013-06-01

    This paper reports a generic process flow to fabricate mechanically flexible and optically semi-transparent thermoelectric generators (TEGs), micro lithium-ion batteries (μLIB) and metal-oxide-semiconductor capacitors (MOSCAPs) on mono-crystalline silicon fabric platforms from standard bulk silicon (100) wafers. All the fabricated devices show outstanding mechanical flexibility and performance, making an important step towards monolithic integration of Energy Chip (self-powered devices) including energy harvesters and electronic devices on flexible platforms. We also report a recyclability process for the remaining bulk substrate after release, allowing us to achieve a low cost flexible platform for high performance applications. © 2013 IEEE.

  11. Analysis of temperature profiles and the mechanism of silicon substrate plastic deformation under epitaxial growth

    International Nuclear Information System (INIS)

    Mirkurbanov, H.A.; Sazhnev, S.V.; Timofeev, V.N.

    2004-01-01

    Full text: Thermal treatment of silicon wafers holds one of the major place in the manufacturing of semi-conductor devices. Thermal treatment includes wafer annealing, thermal oxidation, epitaxial growing etc. Quality of wafers in the high-temperature processes (900-1200 deg C) is estimated by the density of structural defects, including areas of plastic deformation, which are shown as the slip lines appearance. Such areas amount to 50-60 % of total wafer surface. The plastic deformation is caused by the thermal stresses. Experimental and theoretical researches allowed to determine thermal balance and to construct a temperature profiles throughout the plate surface. Thermal stresses are caused by temperature drop along the radius of a wafer and at the basic peripheral ring. The threshold temperature drop between center f a wafer and its peripherals (ΔT) for slip lines appearance, amounts to 15-17 deg. C. At the operating temperature of 900-1200 deg. C and ΔT>20 deg. C, the stresses reach the silicon yield point. According to the results of the researches of structure and stress profiles in a wafer, the mechanism of slip lines formation has been constructed. A source of dislocations is the rear broken layer of thickness 8-10 microns, formed after polishing. The micro-fissures with a density 10 5 -10 6 cm -2 are the sources of dislocations. Dislocations move on a surface of a wafer into a slip plane (111). On a wafer surface with orientation (111) it is possible to allocate zones where the tangential stress vector is most favorably directed with respect to a slip plane leaving on a surface, i.e. the shift stresses are maximal in the slip plane. The way to eliminate plastic deformation is to lower the temperature drop to a level of <15 deg. C and elimination of the broken layer in wafer

  12. Water saving in IC wafer washing process; IC wafer senjo deno sessui taisaku

    Energy Technology Data Exchange (ETDEWEB)

    Harada, H. [Mitsubishi Corp., Tokyo (Japan); Araki, M.; Nakazawa, T.

    1997-11-30

    This paper reports features of a wafer washing technology, a new IC wafer washing process, its pure water saving effect, and a `QC washing` which has pure water saving effect in the wafer washing. Wafer washing processes generally include the SC1 process (using ammonia + hydrogen peroxide aqueous solution) purposed for removing contamination due to ultrafine particles, the SC2 process (using hydrochloric acid + hydrogen peroxide aqueous solution) purposed for removing contamination due to heavy metals, the piranha washing process (using hot sulfuric acid + hydrogen peroxide aqueous solution) purposed for removing contamination due to organic matters, and the DHF (using dilute hydrofluoric acid) purposed for removing natural oxide films. Natural oxide films are now remained as surface protection films, by which surface contamination has been reduced remarkably. A high-temperature washing chemical circulating and filtering technology developed in Japan has brought about a reform in wafer washing processes having been used previously. Spin washing is used as a water saving measure, in which washing chemicals or pure water are sprayed onto one each of wafers which is spin-rotated, allowing washing and rinsing to be made with small amount of washing chemicals and pure water. The QC washing is a method to replace tank interior with pure was as quick as possible in order to increase the rinsing effect. 7 refs., 5 figs.

  13. Room temperature NO2-sensing properties of porous silicon/tungsten oxide nanorods composite

    International Nuclear Information System (INIS)

    Wei, Yulong; Hu, Ming; Wang, Dengfeng; Zhang, Weiyi; Qin, Yuxiang

    2015-01-01

    Highlights: • Porous silicon/WO 3 nanorods composite is synthesized via hydrothermal method. • The morphology of WO 3 nanorods depends on the amount of oxalic acid (pH value). • The sensor can detect ppb level NO 2 at room temperature. - Abstract: One-dimensional single crystalline WO 3 nanorods have been successfully synthesized onto the porous silicon substrates by a seed-induced hydrothermal method. The controlled morphology of porous silicon/tungsten oxide nanorods composite was obtained by using oxalic acid as an organic inducer. The reaction was carried out at 180 °C for 2 h. The influence of oxalic acid (pH value) on the morphology of porous silicon/tungsten oxide nanorods composite was investigated by scanning electron microscopy (SEM), X-ray diffraction (XRD) and transmission electron microscopy (TEM). The NO 2 -sensing properties of the sensor based on porous silicon/tungsten oxide nanorods composite were investigated at different temperatures ranging from room temperature (∼25 °C) to 300 °C. At room temperature, the sensor behaved as a typical p-type semiconductor and exhibited high gas response, good repeatability and excellent selectivity characteristics toward NO 2 gas due to its high specific surface area, special structure, and large amounts of oxygen vacancies

  14. Effects of indium concentration on the properties of In-doped ZnO films: Applications to silicon wafer solar cells

    Energy Technology Data Exchange (ETDEWEB)

    Djessas, K. [Université de Perpignan Via Domitia (UPVD), Laboratoire Procédés, Matériaux et Energie Solaire (PROMES—CNRS), TECNOSUD, Rambla de la thermodynamique, 66100 Perpignan (France); Bouchama, I., E-mail: bouchama.idris@yahoo.fr [Université de Perpignan Via Domitia (UPVD), Laboratoire Procédés, Matériaux et Energie Solaire (PROMES—CNRS), TECNOSUD, Rambla de la thermodynamique, 66100 Perpignan (France); Département d' Electronique, Faculté de Technologie, Université de Msila, 28000 (Algeria); Gauffier, J.L. [Département de Physique, INSA de Toulouse, 135 Avenue de Rangueil, 31077 Toulouse Cedex 4 (France); Ayadi, Z. Ben [Laboratoire de Physique des Matériaux et des Nanomatériaux appliquée à l' Environnement (LaPhyMNE), Université de Gabès, Faculté des Sciences de Gabès, Cité Erriadh Manara Zrig, 6072 Gabès (Tunisia)

    2014-03-31

    In the present paper, high-quality In-doped ZnO (ZnO:In) thin films have been prepared by rf-magnetron sputtering on glass and p-type monocrystalline silicon substrates from an aerogel nanopowder target material. The nanoparticles with the [In]/[Zn] ratio varying between 0.01 and 0.05 were synthesized by the sol–gel method and the structural properties have been analyzed. The effect of different dopant concentrations on the electrical, optical, structural and morphological properties of the films has been investigated. The obtained ZnO:In films at room temperature are polycrystalline with a hexagonal structure and a highly preferred orientation with the c-axis perpendicular to the substrate. Scanning electron microscopy and atomic force microscopy have been applied for a morphology characterization of the films' cross-section and surface. The results revealed a typical columnar structure and very smooth surface. Films with good optical transmittance, around 85%, within the visible wavelength region, and low resistivity in the range of 10{sup −3} Ω·cm and high mobility of 4 cm{sup 2}/Vs, were produced at low substrate temperature. On the other hand, we have studied the position of the p–n junction involved in an Au/In{sub 2}O{sub 3}:SnO{sub 2}/ZnO:In(n)/c-Si(p)/Al structure by electron beam induced current. Current density–voltage characterizations in the dark and under illumination were also performed. The cell exhibits an efficiency of 6%. - Highlights: • ZnO:In thin films were prepared by rf-magnetron sputtering. • No significant changes were observed in the ZnO:In properties. • In-doped ZnO shows superior electric properties compared with pure ZnO. • Interesting photovoltaic effect observed in ITO/ZnO:In(n)/c-Si(p) heterostructure • Good quality of p–n junction in the ZnO:In(n)/c-Si(p) solar cell.

  15. Genesis of nanostructured, magnetically tunable ceramics from the pyrolysis of cross-linked polyferrocenylsilane networks and formation of shaped macroscopic objects and micron scale patterns by micromolding inside silicon wafers.

    Science.gov (United States)

    Ginzburg, Madlen; MacLachlan, Mark J; Yang, San Ming; Coombs, Neil; Coyle, Thomas W; Raju, Nandyala P; Greedan, John E; Herber, Rolfe H; Ozin, Geoffrey A; Manners, Ian

    2002-03-20

    The ability to form molded or patterned metal-containing ceramics with tunable properties is desirable for many applications. In this paper we describe the evolution of a ceramic from a metal-containing polymer in which the variation of pyrolysis conditions facilitates control of ceramic structure and composition, influencing magnetic and mechanical properties. We have found that pyrolysis under nitrogen of a well-characterized cross-linked polyferrocenylsilane network derived from the ring-opening polymerization (ROP) of a spirocyclic [1]ferrocenophane precursor gives shaped macroscopic magnetic ceramics consisting of alpha-Fe nanoparticles embedded in a SiC/C/Si(3)N(4) matrix in greater than 90% yield up to 1000 degrees C. Variation of the pyrolysis temperature and time permitted control over the nucleation and growth of alpha-Fe particles, which ranged in size from around 15 to 700 A, and the crystallization of the surrounding matrix. The ceramics contained smaller alpha-Fe particles when prepared at temperatures lower than 900 degrees C and displayed superparamagnetic behavior, whereas the materials prepared at 1000 degrees C contained larger alpha-Fe particles and were ferromagnetic. This flexibility may be useful for particular materials applications. In addition, the composition of the ceramic was altered by changing the pyrolysis atmosphere to argon, which yielded ceramics that contain Fe(3)Si(5). The ceramics have been characterized by a combination of physical techniques, including powder X-ray diffraction, TEM, reflectance UV-vis/near-IR spectroscopy, elemental analysis, XPS, SQUID magnetometry, Mössbauer spectroscopy, nanoindentation, and SEM. Micromolding of the spirocyclic [1]ferrocenophane precursor within soft lithographically patterned channels housed inside silicon wafers followed by thermal ROP and pyrolysis enabled the formation of predetermined micron scale designs of the magnetic ceramic.

  16. Fluorescence and thermoluminescence in silicon oxide films rich in silicon; Fluorescencia y termoluminiscencia en peliculas de oxido de silicio rico en silicio

    Energy Technology Data Exchange (ETDEWEB)

    Berman M, D.; Piters, T. M. [Centro de Investigacion en Fisica, Universidad de Sonora, Apdo. Postal 5-088, Hermosillo 83190, Sonora (Mexico); Aceves M, M.; Berriel V, L. R. [Instituto Nacional de Astrofisica, Optica y Electronica, Apdo. Postal 51, Puebla 72000, Puebla (Mexico); Luna L, J. A. [CIDS, Benemerita Universidad Autonoma de Puebla, Apdo. Postal 1651, Puebla 72000, Puebla (Mexico)

    2009-10-15

    In this work we determined the fluorescence and thermoluminescence (TL) creation spectra of silicon rich oxide films (SRO) with three different silicon excesses. To study the TL of SRO, 550 nm of SRO film were deposited by Low Pressure Chemical Vapor Deposition technique on N-type silicon substrates with resistivity in the order of 3 to 5 {omega}-cm with silicon excess controlled by the ratio of the gases used in the process, SRO films with Ro= 10, 20 and 30 (12-6% silicon excess) were obtained. Then, they were thermally treated in N{sub 2} at high temperatures to diffuse and homogenize the silicon excess. In the fluorescence spectra two main emission regions are observed, one around 400 nm and one around 800 nm. TL creation spectra were determined by plotting the integrated TL intensity as function of the excitation wavelength. (Author)

  17. Heterojunction Solar Cells Based on Silicon and Composite Films of Graphene Oxide and Carbon Nanotubes.

    Science.gov (United States)

    Yu, LePing; Tune, Daniel; Shearer, Cameron; Shapter, Joseph

    2015-09-07

    Graphene oxide (GO) sheets have been used as the surfactant to disperse single-walled carbon nanotubes (CNT) in water to prepare GO/CNT electrodes that are applied to silicon to form a heterojunction that can be used in solar cells. GO/CNT films with different ratios of the two components and with various thicknesses have been used as semitransparent electrodes, and the influence of both factors on the performance of the solar cell has been studied. The degradation rate of the GO/CNT-silicon devices under ambient conditions has also been explored. The influence of the film thickness on the device performance is related to the interplay of two competing factors, namely, sheet resistance and transmittance. CNTs help to improve the conductivity of the GO/CNT film, and GO is able to protect the silicon from oxidation in the atmosphere. © 2015 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  18. Nanopatterning of Crystalline Silicon Using Anodized Aluminum Oxide Templates for Photovoltaics

    Science.gov (United States)

    Chao, Tsu-An

    A novel thin film anodized aluminum oxide templating process was developed and applied to make nanopatterns on crystalline silicon to enhance the optical properties of silicon. The thin film anodized aluminum oxide was created to improve the conventional thick aluminum templating method with the aim for potential large scale fabrication. A unique two-step anodizing method was introduced to create high quality nanopatterns and it was demonstrated that this process is superior over the original one-step approach. Optical characterization of the nanopatterned silicon showed up to 10% reduction in reflection in the short wavelength range. Scanning electron microscopy was also used to analyze the nanopatterned surface structure and it was found that interpore spacing and pore density can be tuned by changing the anodizing potential.

  19. Waveguide silicon nitride grating coupler

    Science.gov (United States)

    Litvik, Jan; Dolnak, Ivan; Dado, Milan

    2016-12-01

    Grating couplers are one of the most used elements for coupling of light between optical fibers and photonic integrated components. Silicon-on-insulator platform provides strong confinement of light and allows high integration. In this work, using simulations we have designed a broadband silicon nitride surface grating coupler. The Fourier-eigenmode expansion and finite difference time domain methods are utilized in design optimization of grating coupler structure. The fully, single etch step grating coupler is based on a standard silicon-on-insulator wafer with 0.55 μm waveguide Si3N4 layer. The optimized structure at 1550 nm wavelength yields a peak coupling efficiency -2.6635 dB (54.16%) with a 1-dB bandwidth up to 80 nm. It is promising way for low-cost fabrication using complementary metal-oxide- semiconductor fabrication process.

  20. Improved reaction sintered silicon nitride. [protective coatings to improve oxidation resistance

    Science.gov (United States)

    Baumgartner, H. R.

    1978-01-01

    Processing treatments were applied to as-nitrided reaction sintered silicon nitride (RSSN) with the purposes of improving strength after processing to above 350 MN/m2 and improving strength after oxidation exposure. The experimental approaches are divided into three broad classifications: sintering of surface-applied powders; impregnation of solution followed by further thermal processing; and infiltration of molten silicon and subsequent carburization or nitridation of the silicon. The impregnation of RSSN with solutions of aluminum nitrate and zirconyl chloride, followed by heating at 1400-1500 C in a nitrogen atmosphere containing silicon monoxide, improved RSSN strength and oxidation resistance. The room temperature bend strength of RSSN was increased nearly fifty percent above the untreated strength with mean absolute strengths up to 420 MN/m2. Strengths of treated samples that were measured after a 12 hour oxidation exposure in air were up to 90 percent of the original as-nitrided strength, as compared to retained strengths in the range of 35 to 60 percent for untreated RSSN after the same oxidation exposure.

  1. Recent progress in the development and understanding of silicon surface passivation by aluminum oxide for photovoltaics

    NARCIS (Netherlands)

    Dingemans, G.; Kessels, W.M.M.

    2010-01-01

    In the recent years, considerable progress has been made in the understanding of the unique silicon surface passivation properties of aluminum oxide (Al2O3) films including its underlying mechanisms. Containing a high fixed negative charge density located close to the Si interface, Al2O3 provides a

  2. Transmission Electron Microscopy Studies of Electron-Selective Titanium Oxide Contacts in Silicon Solar Cells

    KAUST Repository

    Ali, Haider; Yang, Xinbo; Weber, Klaus; Schoenfeld, Winston V.; Davis, Kristopher O.

    2017-01-01

    In this study, the cross-section of electron-selective titanium oxide (TiO2) contacts for n-type crystalline silicon solar cells were investigated by transmission electron microscopy. It was revealed that the excellent cell efficiency of 21

  3. Effects of Cl+ and F+ implantation of oxidation-induced stacking faults in silicon

    NARCIS (Netherlands)

    Xu, J.Y.; Bronsveld, P.M.; Boom, G.; Hosson, J.Th.M. De

    1984-01-01

    Three implantation effects were investigated in floating-zone-grown silicon: (a) the effect of Cl+ implantation resulting in the shrinkage of oxidation-induced stacking faults; (b) the effect of F+ implantation giving rise to defaulting of the 1/3 [111] Frank dislocations into 1/2[110] perfect

  4. Mechanical anomaly impact on metal-oxide-semiconductor capacitors on flexible silicon fabric

    KAUST Repository

    Ghoneim, Mohamed T.; Kutbee, Arwa T.; Ghodsi Nasseri, Seyed Faizelldin; Bersuker, G.; Hussain, Muhammad Mustafa

    2014-01-01

    We report the impact of mechanical anomaly on high-κ/metal-oxide-semiconductor capacitors built on flexible silicon (100) fabric. The mechanical tests include studying the effect of bending radius up to 5 mm minimum bending radius with respect

  5. Doping profile measurements in silicon using terahertz time domain spectroscopy (THz-TDS) via electrochemical anodic oxidation

    Science.gov (United States)

    Tulsyan, Gaurav

    Doping profiles are engineered to manipulate device properties and to determine electrical performances of microelectronic devices frequently. To support engineering studies afterward, essential information is usually required from physically characterized doping profiles. Secondary Ion Mass Spectrometry (SIMS), Spreading Resistance Profiling (SRP) and Electrochemical Capacitance Voltage (ECV) profiling are standard techniques for now to map profile. SIMS yields a chemical doping profile via ion sputtering process and owns a better resolution, whereas ECV and SRP produce an electrical doping profile detecting free carriers in microelectronic devices. The major difference between electrical and chemical doping profiles is at heavily doped regions greater than 1020 atoms/cm3. At the profile region over the solubility limit, inactive dopants induce a flat plateau and detected by electrical measurements only. Destructive techniques are usually designed as stand-alone systems to study impurities. For an in-situ process control purpose, non-contact methods, such as ellipsometry and non-contact capacitance voltage (CV) techniques are current under development. In this theses work, terahertz time domain spectroscopy (THz-TDS) is utilized to achieve electrical doping profile in both destructive and non-contact manners. In recent years the Terahertz group at Rochester Institute Technology developed several techniques that use terahertz pulses to non-destructively map doping profiles. In this thesis, we study a destructive but potentially higher resolution version of the terahertz based approach to map the profile of activated dopants and augment the non-destructive approaches already developed. The basic idea of the profile mapping approach developed in this MS thesis is to anodize, and thus oxidize to silicon dioxide, thin layers (down to below 10 nm) of the wafer with the doping profile to be mapped. Since the dopants atoms and any free carriers in the silicon oxide thin

  6. 1366 Project Automate: Enabling Automation for <$0.10/W High-Efficiency Kerfless Wafers Manufactured in the US

    Energy Technology Data Exchange (ETDEWEB)

    Lorenz, Adam [1366 Technologies, Bedford, MA (United States)

    2017-05-10

    For photovoltaic (PV) manufacturing to thrive in the U.S., there must be an innovative core to the technology. Project Automate builds on 1366’s proprietary Direct Wafer® kerfless wafer technology and aims to unlock the cost and efficiency advantages of thin kerfless wafers. Direct Wafer is an innovative, U.S.-friendly (efficient, low-labor content) manufacturing process that addresses the main cost barrier limiting silicon PV cost-reductions – the 35-year-old grand challenge of manufacturing quality wafers (40% of the cost of modules) without the cost and waste of sawing. This simple, scalable process will allow 1366 to manufacture “drop-in” replacement wafers for the $10 billion silicon PV wafer market at 50% of the cost, 60% of the capital, and 30% of the electricity of conventional casting and sawing manufacturing processes. This SolarMat project developed the Direct Wafer processes’ unique capability to tailor the shape of wafers to simultaneously make thinner AND stronger wafers (with lower silicon usage) that enable high-efficiency cell architectures. By producing wafers with a unique target geometry including a thick border (which determines handling characteristics) and thin interior regions (which control light capture and electron transport and therefore determine efficiency), 1366 can simultaneously improve quality and lower cost (using less silicon).

  7. Fabrication of disposable topographic silicon oxide from sawtoothed patterns: control of arrays of gold nanoparticles.

    Science.gov (United States)

    Cho, Heesook; Yoo, Hana; Park, Soojin

    2010-05-18

    Disposable topographic silicon oxide patterns were fabricated from polymeric replicas of sawtoothed glass surfaces, spin-coating of poly(dimethylsiloxane) (PDMS) thin films, and thermal annealing at certain temperature and followed by oxygen plasma treatment of the thin PDMS layer. A simple imprinting process was used to fabricate the replicated PDMS and PS patterns from sawtoothed glass surfaces. Next, thin layers of PDMS films having different thicknesses were spin-coated onto the sawtoothed PS surfaces and annealed at 60 degrees C to be drawn the PDMS into the valley of the sawtoothed PS surfaces, followed by oxygen plasma treatment to fabricate topographic silicon oxide patterns. By control of the thickness of PDMS layers, silicon oxide patterns having various line widths were fabricated. The silicon oxide topographic patterns were used to direct the self-assembly of polystyrene-block-poly(2-vinylpyridine) (PS-b-P2VP) block copolymer thin films via solvent annealing process. A highly ordered PS-b-P2VP micellar structure was used to let gold precursor complex with P2VP chains, and followed by oxygen plasma treatment. When the PS-b-P2VP thin films containing gold salts were exposed to oxygen plasma environments, gold salts were reduced to pure gold nanoparticles without changing high degree of lateral order, while polymers were completely degraded. As the width of trough and crest in topographic patterns increases, the number of gold arrays and size of gold nanoparticles are tuned. In the final step, the silicon oxide topographic patterns were selectively removed by wet etching process without changing the arrays of gold nanoparticles.

  8. Magnetic oxide heterostructures. EuO on cubic oxides and on silicon

    International Nuclear Information System (INIS)

    Caspers, Christian

    2013-01-01

    In the thesis at hand, we explore fundamental properties of ultrathin europium oxide (EuO) films. EuO is a model system of a localized 4f Heisenberg ferromagnet, in which the ferromagnetic coupling. provided a high crystalline quality. can be tuned by biaxial lattice strain. Moreover, the magnetic oxide EuO is perfectly suited as a spin-functional tunnel contact for silicon spintronics. However, up to now a challenging bulk and interface chemistry of EuO and Si has hampered a seamless integration into functional silicon heterostructures. In order to investigate fundamental aspects of the magnetic and electronic structure of ultrathin EuO, in the first part of this thesis, we synthesize EuO thin films on conductive YSZ substrates from bulklike thicknesses down to one nanometer by oxide molecular beam epitaxy (MBE). The EuO thin films are of textbook-like single-crystalline quality, and show bulk-like magnetic properties. We control the stoichiometry of buried EuO thin films by hard X-ray photoemission spectroscopy (HAXPES); even a 1 nm ultrathin EuO film exhibits no valence change or interface shifts. Furthermore, we conduct an advanced magnetic characterization by the magnetic circular dichroism (MCD) of Eu core-levels in photoemission, this gives us insight into the intra-atomic exchange coupling of EuO thin films. The MCD reveals large asymmetries of up to 49% in the well-resolved Eu 4d photoemission multiplet. Thus, ultrathin EuO coherently grown on conductive YSZ allows us to explore fundamental magnetic and electronic properties of a 4f magnetic oxide. Biaxial lateral strain applied to single-crystalline EuO is of fundamental interest, since it alters the electronic structure and magnetic coupling in a controlled way. We apply +4.2% tensile biaxial strain to EuO by epitaxial EuO/LaAlO 3 (100) heterostructures. EuO seamlessly adapts the lateral lattice parameter of LaAlO 3 , while the perpendicular parameter of EuO is the unchanged EuO bulk value, thus the

  9. High performance high-κ/metal gate complementary metal oxide semiconductor circuit element on flexible silicon

    KAUST Repository

    Sevilla, Galo T.

    2016-02-29

    Thinned silicon based complementary metal oxide semiconductor(CMOS)electronics can be physically flexible. To overcome challenges of limited thinning and damaging of devices originated from back grinding process, we show sequential reactive ion etching of silicon with the assistance from soft polymeric materials to efficiently achieve thinned (40 μm) and flexible (1.5 cm bending radius) silicon based functional CMOSinverters with high-κ/metal gate transistors. Notable advances through this study shows large area of silicon thinning with pre-fabricated high performance elements with ultra-large-scale-integration density (using 90 nm node technology) and then dicing of such large and thinned (seemingly fragile) pieces into smaller pieces using excimer laser. The impact of various mechanical bending and bending cycles show undeterred high performance of flexible siliconCMOSinverters. Future work will include transfer of diced silicon chips to destination site, interconnects, and packaging to obtain fully flexible electronic systems in CMOS compatible way.

  10. Coating of tips for electrochemical scanning tunneling microscopy by means of silicon, magnesium, and tungsten oxides

    Science.gov (United States)

    Salerno, Marco

    2010-09-01

    Different combinations of metal tips and oxide coatings have been tested for possible operation in electrochemical scanning tunneling microscopy. Silicon and magnesium oxides have been thermally evaporated onto gold and platinum-iridium tips, respectively. Two different thickness values have been explored for both materials, namely, 40 and 120 nm for silicon oxide and 20 and 60 nm for magnesium oxide. Alternatively, tungsten oxide has been grown on tungsten tips via electrochemical anodization. In the latter case, to seek optimal results we have varied the pH of the anodizing electrolyte between one and four. The oxide coated tips have been first inspected by means of scanning electron microscopy equipped with microanalysis to determine the morphological results of the coating. Second, the coated tips have been electrically characterized ex situ for stability in time by means of cyclic voltammetry in 1 M aqueous KCl supporting electrolyte, both bare and supplemented with K3[Fe(CN)6] complex at 10 mM concentration in milliQ water as an analyte. Only the tungsten oxide coated tungsten tips have shown stable electrical behavior in the electrolyte. For these tips, the uncoated metal area has been estimated from the electrical current levels, and they have been successfully tested by imaging a gold grating in situ, which provided stable results for several hours. The successful tungsten oxide coating obtained at pH=4 has been assigned to the WO3 form.

  11. Formation of silicon Oxide nano thickness on Si (III) with the assistance of Cs

    International Nuclear Information System (INIS)

    Bahari, A.; Bagheri, M.

    2006-01-01

    : The possibility of controlling the growth of a uniform ultra thin oxide on silicon via oxygen dosing at low temperatures, would be a great interest for the projected further development of nano electronics. One way to achieve this is to be able to control the conversion of chemically adsorbed oxygen and retained at room temperature into oxide during subsequent heating. Oxygen is chemisorbed at room temperature on Si(111) surface to saturation ( >100 L O 2 ), and the experimental chamber is then evacuated. This leaves adsorbed oxygen as atomically inserted on Si surface which sits on the back bonds. This surface is then used as a base for further processing which in one case consists of annealing to 600- 700 d eg C and subsequent exposures equivalent to the first step. This is repeated again. As the focus of this work, a series of experiments are done with adsorbed Cs, which assists in retaining oxygen and in transforming the adsorbed oxygen into oxide upon heating. It was found that the oxide formed on the surface at low coverage clusters. Without any external influence, the clusters may be made to coalesce upon further oxygen adsorption at room temperature, and annealing terminates as a continuous monolayer of amorphous oxide on top of a well-ordered silicon substrate. This configuration is inert to further uptake of oxygen. A higher oxide thickness could be obtained with Cs. Also in this case, the oxide growth saturates in an inert oxide Iayer

  12. The role of extra-atomic relaxation in determining Si2p binding energy shifts at silicon/silicon oxide interfaces

    International Nuclear Information System (INIS)

    Zhang, K.Z.; Greeley, J.N.; Banaszak Holl, M.M.; McFeely, F.R.

    1997-01-01

    The observed binding energy shift for silicon oxide films grown on crystalline silicon varies as a function of film thickness. The physical basis of this shift has previously been ascribed to a variety of initial state effects (Si endash O ring size, strain, stoichiometry, and crystallinity), final state effects (a variety of screening mechanisms), and extrinsic effects (charging). By constructing a structurally homogeneous silicon oxide film on silicon, initial state effects have been minimized and the magnitude of final state stabilization as a function of film thickness has been directly measured. In addition, questions regarding the charging of thin silicon oxide films on silicon have been addressed. From these studies, it is concluded that initial state effects play a negligible role in the thickness-dependent binding energy shift. For the first ∼30 Angstrom of oxide film, the thickness-dependent binding energy shift can be attributed to final state effects in the form of image charge induced stabilization. Beyond about 30 Angstrom, charging of the film occurs. copyright 1997 American Institute of Physics

  13. Wafer integrated micro-scale concentrating photovoltaics

    Science.gov (United States)

    Gu, Tian; Li, Duanhui; Li, Lan; Jared, Bradley; Keeler, Gordon; Miller, Bill; Sweatt, William; Paap, Scott; Saavedra, Michael; Das, Ujjwal; Hegedus, Steve; Tauke-Pedretti, Anna; Hu, Juejun

    2017-09-01

    Recent development of a novel micro-scale PV/CPV technology is presented. The Wafer Integrated Micro-scale PV approach (WPV) seamlessly integrates multijunction micro-cells with a multi-functional silicon platform that provides optical micro-concentration, hybrid photovoltaic, and mechanical micro-assembly. The wafer-embedded micro-concentrating elements is shown to considerably improve the concentration-acceptance-angle product, potentially leading to dramatically reduced module materials and fabrication costs, sufficient angular tolerance for low-cost trackers, and an ultra-compact optical architecture, which makes the WPV module compatible with commercial flat panel infrastructures. The PV/CPV hybrid architecture further allows the collection of both direct and diffuse sunlight, thus extending the geographic and market domains for cost-effective PV system deployment. The WPV approach can potentially benefits from both the high performance of multijunction cells and the low cost of flat plate Si PV systems.

  14. Oxidation Kinetics of Chemically Vapor-Deposited Silicon Carbide in Wet Oxygen

    Science.gov (United States)

    Opila, Elizabeth J.

    1994-01-01

    The oxidation kinetics of chemically vapor-deposited SiC in dry oxygen and wet oxygen (P(sub H2O) = 0.1 atm) at temperatures between 1200 C and 1400 C were monitored using thermogravimetric analysis. It was found that in a clean environment, 10% water vapor enhanced the oxidation kinetics of SiC only very slightly compared to rates found in dry oxygen. Oxidation kinetics were examined in terms of the Deal and Grove model for oxidation of silicon. It was found that in an environment containing even small amounts of impurities, such as high-purity Al2O3 reaction tubes containing 200 ppm Na, water vapor enhanced the transport of these impurities to the oxidation sample. Oxidation rates increased under these conditions presumably because of the formation of less protective sodium alumino-silicate scales.

  15. Anchoring of alkyl chain molecules on oxide surface using silicon alkoxide

    Energy Technology Data Exchange (ETDEWEB)

    Narita, Ayumi, E-mail: narita.ayumi@jaea.go.jp [Quantum Beam Science Directorate, Japan Atomic Energy Agency, Tokai-mura, Naka-gun, Ibaraki-ken 319-1195 (Japan); Graduate School of Science and Engineering, Ibaraki University, Bunnkyo, Mito-shi, Ibaraki-ken 310-8512 (Japan); Baba, Yuji; Sekiguchi, Tetsuhiro; Shimoyama, Iwao; Hirao, Norie [Quantum Beam Science Directorate, Japan Atomic Energy Agency, Tokai-mura, Naka-gun, Ibaraki-ken 319-1195 (Japan); Yaita, Tsuyoshi [Quantum Beam Science Directorate, Japan Atomic Energy Agency, Tokai-mura, Naka-gun, Ibaraki-ken 319-1195 (Japan); Graduate School of Science and Engineering, Ibaraki University, Bunnkyo, Mito-shi, Ibaraki-ken 310-8512 (Japan)

    2012-01-01

    Chemical states of the interfaces between octadecyl-triethoxy-silane (ODTS) molecules and sapphire surface were measured by X-ray photoelectron spectroscopy (XPS) and near edge X-ray absorption fine structure (NEXAFS) using synchrotron soft X-rays. The nearly self-assembled monolayer of ODTS was formed on the sapphire surface. For XPS and NEXAFS measurements, it was elucidated that the chemical bond between silicon alkoxide in ODTS and the surface was formed, and the alkane chain of ODTS locates upper side on the surface. As a result, it was elucidated that the silicon alkoxide is a good anchor for the immobilization of organic molecules on oxides.

  16. Participation of oxygen and carbon in formation of oxidation-induced stacking faults in monocrystalline silicon

    Directory of Open Access Journals (Sweden)

    Иван Федорович Червоный

    2015-11-01

    Full Text Available It is experimentally established, that density of oxidation-induced stacking faults (OISF in the boron doped monocrystalline silicon plates, that above, than it is more relation of oxygen atoms concentration to carbon atoms concentration in them.On research results of geometry of OISF rings in the different sections of single-crystal geometry of areas is reconstructed with their different closeness. At adjustment of the growing modes of single-crystals of silicon the increase of output of suitable product is observed

  17. Subattoampere current induced by single ions in silicon oxide layers of nonvolatile memory cells

    International Nuclear Information System (INIS)

    Cellere, G.; Paccagnella, A.; Larcher, L.; Visconti, A.; Bonanomi, M.

    2006-01-01

    A single ion impinging on a thin silicon dioxide layer generates a number of electron/hole pairs proportional to its linear energy transfer coefficient. Defects generated by recombination can act as a conductive path for electrons that cross the oxide barrier, thanks to a multitrap-assisted mechanism. We present data on the dependence of this phenomenon on the oxide thickness by using floating gate memory arrays. The tiny number of excess electrons stored in these devices allows for extremely high sensitivity, impossible with any direct measurement of oxide leakage current. Results are of particular interest for next generation devices

  18. Improved the Surface Roughness of Silicon Nanophotonic Devices by Thermal Oxidation Method

    Energy Technology Data Exchange (ETDEWEB)

    Shi Zujun; Shao Shiqian; Wang Yi, E-mail: ywangwnlo@mail.hust.edu.cn [Wuhan National Laboratory for Optoelectronics, Huazhong University of Science and Technology, No. 1037, Luoyu Street, Wuhan 430074 (China)

    2011-02-01

    The transmission loss of the silicon-on-insulator (SOI) waveguide and the coupling loss of the SOI grating are determined to a large extent by the surface roughness. In order to obtain smaller loss, thermal oxidation is a good choice to reduce the surface roughness of the SOI waveguide and grating. Before the thermal oxidation, the root mean square of the surface roughness is over 11 nm. After the thermal oxidation, the SEM figure shows that the bottom of the grating is as smooth as quartz surface, while the AFM shows that the root mean square of the surface is less than 5 nm.

  19. Rate equation modelling of erbium luminescence dynamics in erbium-doped silicon-rich-silicon-oxide

    Energy Technology Data Exchange (ETDEWEB)

    Shah, Miraj, E-mail: m.shah@ee.ucl.ac.uk [Department of Electronic and Electrical Engineering, UCL, Torrington Place, London WC1E 7JE (United Kingdom); Wojdak, Maciej; Kenyon, Anthony J. [Department of Electronic and Electrical Engineering, UCL, Torrington Place, London WC1E 7JE (United Kingdom); Halsall, Matthew P.; Li, Hang; Crowe, Iain F. [Photon Science Institute and School of Electrical and Electronic Engineering, University of Manchester, Sackville St Building, Manchester M13 9PL (United Kingdom)

    2012-12-15

    Erbium doped silicon-rich silica offers broad band and very efficient excitation of erbium photoluminescence (PL) due to a sensitization effect attributed to silicon nanocrystals (Si-nc), which grow during thermal treatment. PL decay lifetime measurements of sensitised Er{sup 3+} ions are usually reported to be stretched or multi exponential, very different to those that are directly excited, which usually show a single exponential decay component. In this paper, we report on SiO{sub 2} thin films doped with Si-nc's and erbium. Time resolved PL measurements reveal two distinct 1.54 {mu}m Er decay components; a fast microsecond component, and a relatively long lifetime component (10 ms). We also study the structural properties of these samples through TEM measurements, and reveal the formation of Er clusters. We propose that these Er clusters are responsible for the fast {mu}s decay component, and we develop rate equation models that reproduce the experimental transient observations, and can explain some of the reported transient behaviour in previously published literature.

  20. Improvement of silicon direct bonding using surfaces activated by hydrogen plasma treatment

    CERN Document Server

    Choi, W B; Lee Jae Sik; Sung, M Y

    2000-01-01

    The plasma surface treatment, using hydrogen gas, of silicon wafers was studied as a pretreatment for silicon direct bonding. Chemical reactions of the hydrogen plasma with the surfaces were used for both surface activation and removal of surface contaminants. Exposure of the silicon wafers to the plasma formed an active oxide layer on the surface. This layer was hydrophilic. The surface roughness and morphology were examined as functions of the plasma exposure time and power. The surface became smoother with shorter plasma exposure time and lower power. In addition, the plasma surface treatment was very efficient in removing the carbon contaminants on the silicon surface. The value of the initial surface energy, as estimated by using the crack propagation method, was 506 mJ/M sup 2 , which was up to about three times higher than the value for the conventional direct bonding method using wet chemical treatments.

  1. The influence of oxidation properties on the electron emission characteristics of porous silicon

    Energy Technology Data Exchange (ETDEWEB)

    He, Li [Key Laboratory of Physical Electronics and Devices of the Ministry of Education, Xi’an Jiaotong University, Xi’an 710049 (China); Zhang, Xiaoning, E-mail: znn@mail.xjtu.edu.cn [Key Laboratory of Physical Electronics and Devices of the Ministry of Education, Xi’an Jiaotong University, Xi’an 710049 (China); Wang, Wenjiang [Key Laboratory of Physical Electronics and Devices of the Ministry of Education, Xi’an Jiaotong University, Xi’an 710049 (China); Wei, Haicheng [School of Electrical and Information Engineering, Beifang University of Nationalities, Yinchuan750021 (China)

    2016-09-30

    Highlights: • Evaluated the oxidation properties of porous silicon from semi-quantitative methods. • Discovered the relationship between oxidation properties and emission characteristics. • Revealed the micro-essence of the electron emission of the porous silicon. - Abstract: In order to investigate the influence of oxidation properties such as oxygen content and its distribution gradient on the electron emission characteristics of porous silicon (PS) emitters, emitters with PS thickness of 8 μm, 5 μm, and 3 μm were prepared and then oxidized by electrochemical oxidation (ECO) and ECO-RTO (rapid thermal oxidation) to get different oxidation properties. The experimental results indicated that the emission current density, efficiency, and stability of the PS emitters are mainly determined by oxidation properties. The higher oxygen content and the smaller oxygen distribution gradient in the PS layer, the larger emission current density and efficiency we noted. The most favorable results occurred for the PS emitter with the smallest oxygen distribution gradient and the highest level of oxygen content, with an emission current density of 212.25 μA/cm{sup 2} and efficiency of 59.21‰. Additionally, it also demonstrates that thick PS layer benefits to the emission stability due to its longer electron acceleration tunnel. The FN fitting plots indicated that the effective emission areas of PS emitters can be enlarged and electron emission thresholds is decreased because of the higher oxygen content and smaller distribution gradient, which were approved by the optical micrographs of top electrode of PS emitters before and after electron emission.

  2. The influence of oxidation properties on the electron emission characteristics of porous silicon

    International Nuclear Information System (INIS)

    He, Li; Zhang, Xiaoning; Wang, Wenjiang; Wei, Haicheng

    2016-01-01

    Highlights: • Evaluated the oxidation properties of porous silicon from semi-quantitative methods. • Discovered the relationship between oxidation properties and emission characteristics. • Revealed the micro-essence of the electron emission of the porous silicon. - Abstract: In order to investigate the influence of oxidation properties such as oxygen content and its distribution gradient on the electron emission characteristics of porous silicon (PS) emitters, emitters with PS thickness of 8 μm, 5 μm, and 3 μm were prepared and then oxidized by electrochemical oxidation (ECO) and ECO-RTO (rapid thermal oxidation) to get different oxidation properties. The experimental results indicated that the emission current density, efficiency, and stability of the PS emitters are mainly determined by oxidation properties. The higher oxygen content and the smaller oxygen distribution gradient in the PS layer, the larger emission current density and efficiency we noted. The most favorable results occurred for the PS emitter with the smallest oxygen distribution gradient and the highest level of oxygen content, with an emission current density of 212.25 μA/cm"2 and efficiency of 59.21‰. Additionally, it also demonstrates that thick PS layer benefits to the emission stability due to its longer electron acceleration tunnel. The FN fitting plots indicated that the effective emission areas of PS emitters can be enlarged and electron emission thresholds is decreased because of the higher oxygen content and smaller distribution gradient, which were approved by the optical micrographs of top electrode of PS emitters before and after electron emission.

  3. Cost of Czochralski wafers as a function of diameter

    Science.gov (United States)

    Leipold, M. H.; Radics, C.; Kachare, A.

    1980-02-01

    The impact of diameter in the range of 10 to 15 cm on the cost of wafers sliced from Czochralski ingots was analyzed. Increasing silicon waste and decreasing ingot cost with increasing ingot size were estimated along with projected costs. Results indicate a small but continuous decrease in sheet cost with increasing ingot size in this size range. Sheet costs including silicon are projected to be $50 to $60/sq m (1980 $) depending upon technique used.

  4. High-precision drop shape analysis (HPDSA) of quasistatic contact angles on silanized silicon wafers with different surface topographies during inclining-plate measurements: Influence of the surface roughness on the contact line dynamics

    International Nuclear Information System (INIS)

    Heib, F.; Hempelmann, R.; Munief, W.M.; Ingebrandt, S.; Fug, F.; Possart, W.; Groß, K.; Schmitt, M.

    2015-01-01

    Highlights: • Analysis of the triple line motion on surfaces with nanoscale surface topographies. • Analysis of the triple line motion is performed in sub-pixel resolution. • A special fitting and statistical approach for contact angle analysis is applied. • The analyses result set of contact angle data which is independent of “user-skills”. • Characteristically density distributions in dependence on the surface properties. - Abstract: Contact angles and wetting of solid surfaces are strongly influenced by the physical and chemical properties of the surfaces. These influence quantities are difficult to distinguish from each other if contact angle measurements are performed by measuring only the advancing θ a and the receding θ r contact angle. In this regard, time-dependent water contact angles are measured on two hydrophobic modified silicon wafers with different physical surface topographies. The first surface is nearly atomically flat while the second surface is patterned (alternating flat and nanoscale rough patterns) which is synthesized by a photolithography and etching procedure. The different surface topographies are characterized with atomic force microscopy (AFM), Fourier transform infrared reflection absorption spectroscopy (FTIRRAS) and Fourier transform infrared attenuated total reflection spectroscopy (FTIR-ATR). The resulting set of contact angle data obtained by the high-precision drop shape analysis approach is further analyzed by a Gompertzian fitting procedure and a statistical counting procedure in dependence on the triple line velocity. The Gompertzian fit is used to analyze overall properties of the surface and dependencies between the motion on the front and the back edge of the droplets. The statistical counting procedure results in the calculation of expectation values E(p) and standard deviations σ(p) for the inclination angle φ, contact angle θ, triple line velocity vel and the covered distance of the triple line dis

  5. High-precision drop shape analysis (HPDSA) of quasistatic contact angles on silanized silicon wafers with different surface topographies during inclining-plate measurements: Influence of the surface roughness on the contact line dynamics

    Energy Technology Data Exchange (ETDEWEB)

    Heib, F., E-mail: f.heib@mx.uni-saarland.de [Department of Physical Chemistry, Saarland University, 66123 Saarbrücken (Germany); Hempelmann, R. [Department of Physical Chemistry, Saarland University, 66123 Saarbrücken (Germany); Munief, W.M.; Ingebrandt, S. [Department of Informatics and Microsystem Technology, University of Applied Sciences, Kaiserslautern, 66482 Zweibrücken (Germany); Fug, F.; Possart, W. [Department of Adhesion and Interphases in Polymers, Saarland University, 66123 Saarbrücken (Germany); Groß, K.; Schmitt, M. [Department of Physical Chemistry, Saarland University, 66123 Saarbrücken (Germany)

    2015-07-01

    Highlights: • Analysis of the triple line motion on surfaces with nanoscale surface topographies. • Analysis of the triple line motion is performed in sub-pixel resolution. • A special fitting and statistical approach for contact angle analysis is applied. • The analyses result set of contact angle data which is independent of “user-skills”. • Characteristically density distributions in dependence on the surface properties. - Abstract: Contact angles and wetting of solid surfaces are strongly influenced by the physical and chemical properties of the surfaces. These influence quantities are difficult to distinguish from each other if contact angle measurements are performed by measuring only the advancing θ{sub a} and the receding θ{sub r} contact angle. In this regard, time-dependent water contact angles are measured on two hydrophobic modified silicon wafers with different physical surface topographies. The first surface is nearly atomically flat while the second surface is patterned (alternating flat and nanoscale rough patterns) which is synthesized by a photolithography and etching procedure. The different surface topographies are characterized with atomic force microscopy (AFM), Fourier transform infrared reflection absorption spectroscopy (FTIRRAS) and Fourier transform infrared attenuated total reflection spectroscopy (FTIR-ATR). The resulting set of contact angle data obtained by the high-precision drop shape analysis approach is further analyzed by a Gompertzian fitting procedure and a statistical counting procedure in dependence on the triple line velocity. The Gompertzian fit is used to analyze overall properties of the surface and dependencies between the motion on the front and the back edge of the droplets. The statistical counting procedure results in the calculation of expectation values E(p) and standard deviations σ(p) for the inclination angle φ, contact angle θ, triple line velocity vel and the covered distance of the triple

  6. Oxidation-enhanced diffusion of boron in very low-energy N2+-implanted silicon

    Science.gov (United States)

    Skarlatos, D.; Tsamis, C.; Perego, M.; Fanciulli, M.

    2005-06-01

    In this article we study the interstitial injection during oxidation of very low-energy nitrogen-implanted silicon. Buried boron δ layers are used to monitor the interstitial supersaturation during the oxidation of nitrogen-implanted silicon. No difference in boron diffusivity enhancement was observed compared to dry oxidation of nonimplanted samples. This result is different from our experience from N2O oxynitridation study, during which a boron diffusivity enhancement of the order of 20% was observed, revealing the influence of interfacial nitrogen on interstitial kinetics. A possible explanation may be that implanted nitrogen acts as an excess interstitial sink in order to diffuse towards the surface via a non-Fickian mechanism. This work completes a wide study of oxidation of very low-energy nitrogen-implanted silicon related phenomena we performed within the last two years [D. Skarlatos, C. Tsamis, and D. Tsoukalas, J. Appl. Phys. 93, 1832 (2003); D. Skarlatos, E. Kapetanakis, P. Normand, C. Tsamis, M. Perego, S. Ferrari, M. Fanciulli, and D. Tsoukalas, J. Appl. Phys. 96, 300 (2004)].

  7. Experimental and theoretical study of heterogeneous iron precipitation in silicon

    OpenAIRE

    Haarahiltunen, Antti; Väinölä, Hele; Anttila, O.; Yli-Koski, Marko

    2007-01-01

    Heterogeneous iron precipitation in silicon was studied experimentally by measuring the gettering efficiency of oxide precipitate density of 1×10exp10cm−3. The wafers were contaminated with varying iron concentrations, and the gettering efficiency was studied using isothermal annealing in the temperature range from 300 to 780°C. It was found that iron precipitation obeys the so called s-curve behavior: if iron precipitation occurs, nearly all iron is gettered. For example, after 30 min anneal...

  8. Characterization of Transition Metal Oxide/Silicon Heterojunctions for Solar Cell Applications

    Directory of Open Access Journals (Sweden)

    Luis G. Gerling

    2015-10-01

    Full Text Available During the last decade, transition metal oxides have been actively investigated as hole- and electron-selective materials in organic electronics due to their low-cost processing. In this study, four transition metal oxides (V2O5, MoO3, WO3, and ReO3 with high work functions (>5 eV were thermally evaporated as front p-type contacts in planar n-type crystalline silicon heterojunction solar cells. The concentration of oxygen vacancies in MoO3−x was found to be dependent on film thickness and redox conditions, as determined by X-ray Photoelectron Spectroscopy. Transfer length method measurements of oxide films deposited on glass yielded high sheet resistances (~109 Ω/sq, although lower values (~104 Ω/sq were measured for oxides deposited on silicon, indicating the presence of an inversion (hole rich layer. Of the four oxide/silicon solar cells, ReO3 was found to be unstable upon air exposure, while V2O5 achieved the highest open-circuit voltage (593 mV and conversion efficiency (12.7%, followed by MoO3 (581 mV, 12.6% and WO3 (570 mV, 11.8%. A short-circuit current gain of ~0.5 mA/cm2 was obtained when compared to a reference amorphous silicon contact, as expected from a wider energy bandgap. Overall, these results support the viability of a simplified solar cell design, processed at low temperature and without dopants.

  9. Handbook of wafer bonding

    CERN Document Server

    Ramm, Peter; Taklo, Maaike M V

    2011-01-01

    Written by an author and editor team from microsystems companies and industry-near research organizations, this handbook and reference presents dependable, first-hand information on bonding technologies.In the first part, researchers from companies and institutions around the world discuss the most reliable and reproducible technologies for the production of bonded wafers. The second part is devoted to current and emerging applications, including microresonators, biosensors and precise measuring devices.

  10. Silicon Wafer X-ray Mirror Project

    Data.gov (United States)

    National Aeronautics and Space Administration — We propose to undertake the initial development of a Kirkpatrick-Baez (K-B) type X-ray mirror using the relatively recent availability of high quality, inexpensive,...

  11. Silicon Wafer X-ray Mirror

    Data.gov (United States)

    National Aeronautics and Space Administration — We propose to undertake the initial development of a Kirkpatrick-Baez (K-B) type X-ray mirror using the relatively recent availability of high quality, inexpensive,...

  12. Sacrificial wafer bonding for planarization after very deep etching

    NARCIS (Netherlands)

    Spiering, V.L.; Spiering, Vincent L.; Berenschot, Johan W.; Elwenspoek, Michael Curt; Fluitman, J.H.J.

    A new technique is presented that provides planarization after a very deep etching step in silicon. This offers the possibility for as well resist spinning and layer patterning as realization of bridges or cantilevers across deep holes or grooves. The sacrificial wafer bonding technique contains a

  13. Growth of aluminum oxide on silicon carbide with an atomically sharp interface

    DEFF Research Database (Denmark)

    Silva, Ana Gomes; Pedersen, Kjeld; Li, Zheshen

    2017-01-01

    this system up to around 600 °C (all in ultrahigh vacuum). This converts all the SiO2 into a uniform layer of Al2O3 with an atomically sharp interface between the Al2O3 and the Si surface. In the present work, the same procedures are applied to form Al2O3 on a SiC film grown on top of Si (111). The results...... indicate that a similar process, resulting in a uniform layer of 1-2 nm of Al2O3 with an atomically sharp Al2O3/SiC interface, also works in this case.......The development of SiC wafers with properties suitable for electronic device fabrication is now well established commercially. A critical issue for developing metal-oxide-semiconductor field effect transistor devices of SiC is the choice of dielectric materials for surface passivation...

  14. Particle precipitation in connection with KOH etching of silicon

    DEFF Research Database (Denmark)

    Nielsen, Christian Bergenstof; Christensen, Carsten; Pedersen, Casper

    2004-01-01

    This paper considers the precipitation of iron oxide particles in connection with the KOH etching of cavities in silicon wafers. The findings presented in this paper suggest that the source to the particles is the KOH pellets used for making the etching solution. Experiments show that the precipi......This paper considers the precipitation of iron oxide particles in connection with the KOH etching of cavities in silicon wafers. The findings presented in this paper suggest that the source to the particles is the KOH pellets used for making the etching solution. Experiments show...... that the precipitation is independent of KOH etching time, but that the amount of deposited material varies with dopant type and dopant concentration. The experiments also suggest that the precipitation occurs when the silicon wafers are removed from the KOH etching solution and not during the etching procedure. When...... not removed, the iron oxide particles cause etch pits on the Si surface when later processed and exposed to phosphoric acid. It has been found that the particles can be removed in an HCl solution, but not completely in an H2SO4- H2O2 solution. The paper discusses the involved precipitation mechanism in terms...

  15. High-stability transparent amorphous oxide TFT with a silicon-doped back-channel layer

    Energy Technology Data Exchange (ETDEWEB)

    Lee, Hyoung-Rae; Park, Jea-Gun [Hanyang University, Seoul (Korea, Republic of)

    2014-10-15

    We significantly reduced various electrical instabilities of amorphous indium gallium zinc oxide thin-film transistors (TFTs) by using the co-deposition of silicon on an a-IGZO back channel. This process showed improved stability of the threshold voltage (V{sub th}) under high temperature and humidity and negative gate-bias illumination stress (NBIS) without any reduction of IDS. The enhanced stability was achieved with silicon, which has higher metal-oxide bonding strengths than gallium does. Additionally, SiO{sub x} distributed on the a-IGZO surface reduced the adsorption and the desorption of H{sub 2}O and O{sub 2}. This process is applicable to the TFT manufacturing process with a variable sputtering target.

  16. Selective tuning of high-Q silicon photonic crystal nanocavities via laser-assisted local oxidation.

    Science.gov (United States)

    Chen, Charlton J; Zheng, Jiangjun; Gu, Tingyi; McMillan, James F; Yu, Mingbin; Lo, Guo-Qiang; Kwong, Dim-Lee; Wong, Chee Wei

    2011-06-20

    We examine the cavity resonance tuning of high-Q silicon photonic crystal heterostructures by localized laser-assisted thermal oxidation using a 532 nm continuous wave laser focused to a 2.5 μm radius spot-size. The total shift is consistent with the parabolic rate law. A tuning range of up to 8.7 nm is achieved with ∼ 30 mW laser powers. Over this tuning range, the cavity Qs decreases from 3.2×10(5) to 1.2×10(5). Numerical simulations model the temperature distributions in the silicon photonic crystal membrane and the cavity resonance shift from oxidation.

  17. Complete coverage of reduced graphene oxide on silicon dioxide substrates

    International Nuclear Information System (INIS)

    Jingfeng Huang; Hu Chen; Yoong Alfred Tok Iing; Larisika, Melanie; Nowak, Christoph; Faulkner, Steve; Nimmo, Myra A.

    2014-01-01

    Reduced graphene oxide (RGO) has the advantage of an aqueous and industrial-scale production route. No other approaches can rival the RGO field effect transistor platform in terms of cost (oxide with ethanol, carbon islets are deposited preferentially at the edges of existing flakes. With a 2-h treatment, the standard deviation in electrical resistance of the treated chips can be reduced by 99.95%. Thus this process could enable RGO to be used in practical electronic devices. (special topic — international conference on nanoscience and technology, china 2013)

  18. Optical properties of uniformly sized silicon nanocrystals within a single silicon oxide layer

    Energy Technology Data Exchange (ETDEWEB)

    En Naciri, A., E-mail: aotmane.en-naciri@univ-lorraine.fr [Universite de Lorraine, LCP-A2MC, Institut Jean Barriol (France); Miska, P. [Universite de Lorraine, Institut Jean Lamour CNRS UMR 7198 (France); Keita, A.-S. [Max Planck Institute for Intelligent Systems (Germany); Battie, Y. [Universite de Lorraine, LCP-A2MC, Institut Jean Barriol (France); Rinnert, H.; Vergnat, M. [Universite de Lorraine, Institut Jean Lamour CNRS UMR 7198 (France)

    2013-04-15

    Silicon nanocrystals (Si-NC) with different sizes (2-6 nm) are synthesized by evaporation. The system is composed of a single Si-NC layer that is well controlled in size. The numerical modeling of such system, without a large size distribution, is suitable to perform easily the optical calculations. The nanocrystal size and confinement effects on the optical properties are determined by photoluminescence (PL) measurements, absorption in the UV visible range, and spectroscopic ellipsometry (SE). The optical constants and the bandgap energies are then extracted and analyzed. The dependence of the optical responses with the decrease of the size of the Si-NC occurs not only with a drastic reduction of the amplitudes of dielectric function but also by a significant expansion of the optical gap. This study supports the idea of a presence of a critical size of Si-NC for which the confinement effect becomes weak. The evolution of those bandgap energies are discussed in comparison with values reported in literature.

  19. Black silicon solar cells with black bus-bar strings

    DEFF Research Database (Denmark)

    Davidsen, Rasmus Schmidt; Tang, Peter Torben; Mizushima, Io

    2016-01-01

    We present the combination of black silicon texturing and blackened bus-bar strings as a potential method for obtaining all-black solar panels, while using conventional, front-contacted solar cells. Black silicon was realized by maskless reactive ion etching resulting in total, average reflectance...... below 0.5% across a 156x156 mm2 silicon wafer. Four different methods to obtain blackened bus-bar strings were compared with respect to reflectance, and two of these methods (i.e., oxidized copper and etched solder) were used to fabricate functional allblack solar 9-cell panels. The black bus-bars (e.......g., by oxidized copper) have a reflectance below 3% in the entire visible wavelength range. The combination of black silicon cells and blackened bus-bars results in aesthetic, all-black panels based on conventional, front-contacted solar cells without compromising efficiency....

  20. Mechanical anomaly impact on metal-oxide-semiconductor capacitors on flexible silicon fabric

    KAUST Repository

    Ghoneim, Mohamed T.

    2014-06-09

    We report the impact of mechanical anomaly on high-κ/metal-oxide-semiconductor capacitors built on flexible silicon (100) fabric. The mechanical tests include studying the effect of bending radius up to 5 mm minimum bending radius with respect to breakdown voltage and leakage current of the devices. We also report the effect of continuous mechanical stress on the breakdown voltage over extended periods of times.

  1. Silicon oxide based high capacity anode materials for lithium ion batteries

    Science.gov (United States)

    Deng, Haixia; Han, Yongbong; Masarapu, Charan; Anguchamy, Yogesh Kumar; Lopez, Herman A.; Kumar, Sujeet

    2017-03-21

    Silicon oxide based materials, including composites with various electrical conductive compositions, are formulated into desirable anodes. The anodes can be effectively combined into lithium ion batteries with high capacity cathode materials. In some formulations, supplemental lithium can be used to stabilize cycling as well as to reduce effects of first cycle irreversible capacity loss. Batteries are described with surprisingly good cycling properties with good specific capacities with respect to both cathode active weights and anode active weights.

  2. Dislocation behavior of surface-oxygen-concentration controlled Si wafers

    International Nuclear Information System (INIS)

    Asazu, Hirotada; Takeuchi, Shotaro; Sannai, Hiroya; Sudo, Haruo; Araki, Koji; Nakamura, Yoshiaki; Izunome, Koji; Sakai, Akira

    2014-01-01

    We have investigated dislocation behavior in the surface area of surface-oxygen-concentration controlled Si wafers treated by a high temperature rapid thermal oxidation (HT-RTO). The HT-RTO process allows us to precisely control the interstitial oxygen concentration ([O i ]) in the surface area of the Si wafers. Sizes of rosette patterns, generated by nano-indentation and subsequent thermal annealing at 900 °C for 1 h, were measured for the Si wafers with various [O i ]. It was found that the rosette size decreases in proportion to the − 0.25 power of [O i ] in the surface area of the Si wafers, which were higher than [O i ] of 1 × 10 17 atoms/cm 3 . On the other hand, [O i ] of lower than 1 × 10 17 atoms/cm 3 did not affect the rosette size very much. These experimental results demonstrate the ability of the HT-RTO process to suppress the dislocation movements in the surface area of the Si wafer. - Highlights: • Surface-oxygen-concentration controlled Si wafers have been made. • The oxygen concentration was controlled by high temperature rapid thermal oxidation. • Dislocation behavior in the surface area of the Si wafers has been investigated. • Rosette size decreased with increasing of interstitial oxygen atoms. • The interstitial oxygen atoms have a pinning effect of dislocations at the surface

  3. Impact of SiO2 on Al–Al thermocompression wafer bonding

    International Nuclear Information System (INIS)

    Malik, Nishant; Finstad, Terje G; Schjølberg-Henriksen, Kari; Poppe, Erik U; Taklo, Maaike M V

    2015-01-01

    Al–Al thermocompression bonding suitable for wafer level sealing of MEMS devices has been investigated. This paper presents a comparison of thermocompression bonding of Al films deposited on Si with and without a thermal oxide (SiO 2 film). Laminates of diameter 150 mm containing device sealing frames of width 200 µm were realized. The wafers were bonded by applying a bond force of 36 or 60 kN at bonding temperatures ranging from 300–550 °C for bonding times of 15, 30 or 60 min. The effects of these process variations on the quality of the bonded laminates have been studied. The bond quality was estimated by measurements of dicing yield, tensile strength, amount of cohesive fracture in Si and interfacial characterization. The mean bond strength of the tested structures ranged from 18–61 MPa. The laminates with an SiO 2 film had higher dicing yield and bond strength than the laminates without SiO 2 for a 400 °C bonding temperature. The bond strength increased with increasing bonding temperature and bond force. The laminates bonded for 30 and 60 min at 400 °C and 60 kN had similar bond strength and amount of cohesive fracture in the bulk silicon, while the laminates bonded for 15 min had significantly lower bond strength and amount of cohesive fracture in the bulk silicon. (paper)

  4. Isothermal and cyclic oxidation resistance of pack siliconized Mo–Si–B alloy

    Energy Technology Data Exchange (ETDEWEB)

    Majumdar, Sanjib, E-mail: sanjib@barc.gov.in

    2017-08-31

    Highlights: • Pack-siliconizing of Mo–Si–B alloy improves its oxidation resistance at 750, 900 and 1400 °C. • A marginal weight change of the coated alloy is detected in isothermal and cyclic oxidation tests. • Kinetics of growth of protective SiO{sub 2} scale is much faster at 1400 °C. • Self-healing SiO{sub 2} is developed at the cracks formed in MoSi{sub 2} layer during cyclic oxidation tests. - Abstract: Oxidation behaviour of MoSi{sub 2} coated Mo–9Si–8B–0.75Y (at.%) alloy has been investigated at three critical temperatures including 750, 900 and 1400 °C in static air. Thermogravimetric analysis (TGA) data indicates a remarkable improvement in the oxidation resistance of the silicide coated alloy in both isothermal and cyclic oxidation tests. The cross-sectional scanning electron microscopy and energy dispersive spectroscopic analysis reveal the occurrence of internal oxidation particularly at the crack fronts formed in the outer MoSi{sub 2} layer during thermal cycling. The dominant oxidation mechanisms at 750–900 °C and 1400 °C are identified. Development of MoB inner layer further improves the oxidation resistance of the silicide coated alloy.

  5. Tuning of structural, light emission and wetting properties of nanostructured copper oxide-porous silicon matrix formed on electrochemically etched copper-coated silicon substrates

    Science.gov (United States)

    Naddaf, M.

    2017-01-01

    Matrices of copper oxide-porous silicon nanostructures have been formed by electrochemical etching of copper-coated silicon surfaces in HF-based solution at different etching times (5-15 min). Micro-Raman, X-ray diffraction and X-ray photoelectron spectroscopy results show that the nature of copper oxide in the matrix changes from single-phase copper (I) oxide (Cu2O) to single-phase copper (II) oxide (CuO) on increasing the etching time. This is accompanied with important variation in the content of carbon, carbon hydrides, carbonyl compounds and silicon oxide in the matrix. The matrix formed at the low etching time (5 min) exhibits a single broad "blue" room-temperature photoluminescence (PL) band. On increasing the etching time, the intensity of this band decreases and a much stronger "red" PL band emerges in the PL spectra. The relative intensity of this band with respect to the "blue" band significantly increases on increasing the etching time. The "blue" and "red" PL bands are attributed to Cu2O and porous silicon of the matrix, respectively. In addition, the water contact angle measurements reveal that the hydrophobicity of the matrix surface can be tuned from hydrophobic to superhydrophobic state by controlling the etching time.

  6. Conformity and structure of titanium oxide films grown by atomic layer deposition on silicon substrates

    Energy Technology Data Exchange (ETDEWEB)

    Jogi, Indrek [University of Tartu, Institute of Experimental Physics and Technology, Taehe 4, 51010, Tartu (Estonia)], E-mail: indrek.jogi@ut.ee; Paers, Martti; Aarik, Jaan; Aidla, Aleks [University of Tartu, Institute of Physics, Riia 142, 51014, Tartu (Estonia); Laan, Matti [University of Tartu, Institute of Experimental Physics and Technology, Taehe 4, 51010, Tartu (Estonia); Sundqvist, Jonas; Oberbeck, Lars; Heitmann, Johannes [Qimonda Dresden GmbH and Co. OHG, Koenigsbruecker Strasse 180, 01099, Dresden (Germany); Kukli, Kaupo [University of Tartu, Institute of Experimental Physics and Technology, Taehe 4, 51010, Tartu (Estonia)

    2008-06-02

    Conformity and phase structure of atomic layer deposited TiO{sub 2} thin films grown on silicon substrates were studied. The films were grown using TiCl{sub 4} and Ti(OC{sub 2}H{sub 5}){sub 4} as titanium precursors in the temperature range from 125 to 500 {sup o}C. In all cases perfect conformal growth was achieved on patterned substrates with elliptical holes of 7.5 {mu}m depth and aspect ratio of about 1:40. Conformal growth was achieved with process parameters similar to those optimized for the growth on planar wafers. The dominant crystalline phase in the as-grown films was anatase, with some contribution from rutile at relatively higher temperatures. Annealing in the oxygen ambient resulted in (re)crystallization whereas the effect of annealing depended markedly on the precursors used in the deposition process. Compared to films grown from TiCl{sub 4}, the films grown from Ti(OC{sub 2}H{sub 5}){sub 4} were transformed into rutile in somewhat greater extent, whereas in terms of step coverage the films grown from Ti(OC{sub 2}H{sub 5}){sub 4} remained somewhat inferior compared to the films grown from TiCl{sub 4}.

  7. Influence of oxidation treatment on ballistic electron surface-emitting display of porous silicon

    International Nuclear Information System (INIS)

    Du, Wentao; Zhang, Xiaoning; Zhang, Yujuan; Wang, Wenjiang; Duan, Xiaotao

    2012-01-01

    Two groups of porous silicon (PS) samples are treated by rapid thermal oxidation (RTO) and electrochemical oxidation (ECO), respectively. Scanning electron microscopy images show that PS samples are segmented into two layers. Oxidized film layer is formed on the top surface of PS samples treated by RTO while at the bottom of PS samples treated by ECO. Both ECO and RTO treatment can make emission current density, diode current density, and emission efficiency of PS increase with the bias voltage increasing. The emission current density and the field emission enhancement factor β of PS sample treated by RTO are larger than that treated by ECO. The Fowler–Nordheim curves of RTO and ECO samples are linear which indicates that high electric field exists on the oxidized layer and field emission occurs whether PS is treated by RTO or ECO.

  8. High resolution medium energy ion scattering study of silicon oxidation and oxy nitridation

    International Nuclear Information System (INIS)

    Gusev, E.P.; Lu, H.C.; Garfunkel, E.; Gustafsson, T.

    1998-01-01

    Full text: Silicon oxide is likely to remain the material of choice for gate oxides in microelectronics for the foreseeable future. As device become ever smaller and faster, the thickness of these layers in commercial products is predicted to be less than 50 Angstroms in just a few years. An understanding of such devices will therefore likely to be based on microscopic concepts and should now be investigated by atomistic techniques. With medium energy ion scattering (MEIS) using an electrostatic energy analyzer, depth profiling of thin (<60 Angstroms) silicon oxide films on Si(100) with 3 - 5 Angstroms depth resolution in the near region has been done. The growth mechanism of thin oxide films on Si(100) has been studied, using sequential oxygen isotope exposures. It is found that the oxide films are stoichiometric to within approx. 10 Angstroms of the interface. It is also found that the oxidation reactions occur at the surface, in the transition region and at interface, with only the third region being included in the conventional (Deal-Grove) model for oxide formation. Nitrogen is sometimes added to gate oxides, as it has been found empirically that his improves some of the electrical properties. The role, location and even the amount of nitrogen that exists in such films are poorly understood, and represent interesting analytical challenges. MEIS data will be presented that address these questions, measured for a number of different processing conditions. We have recently demonstrated how to perform nitrogen nano-engineering in such ultrathin gate dielectrics, and these results will also be discussed

  9. Fabrication of novel AFM probe with high-aspect-ratio ultra-sharp three-face silicon nitride tips

    NARCIS (Netherlands)

    Vermeer, Rolf; Berenschot, Johan W.; Sarajlic, Edin; Tas, Niels Roelof; Jansen, Henricus V.

    In this paper we present the wafer-scale fabrication of molded AFM probes with high aspect ratio ultra-sharp three-plane silicon nitride tips. Using $\\langle$111$\\rangle$ silicon wafers a dedicated process is developed to fabricate molds in the silicon wafer that have a flat triangular bottom

  10. The processing and potential applications of porous silicon

    Energy Technology Data Exchange (ETDEWEB)

    Syyuan Shieh.

    1992-07-01

    Stability of a cylindrical pore under the influence of surface energy is important for porous silicon (PS) processing in the integrated circuit industry. Once the zig-zag cylindrical pores of porous silicon or oxidized porous silicon (OPS) are unstable and breakup into rows of isolated spherical pores, oxidation of PS and densification/nitridation of OPS become difficult. Swing to difficulty transport of reactant gas (O{sub 2}, NH{sub 3}) or the trapped gas (for densification of OPS). A first order analysis of the stability of a cylindrical pore or cylinder is considered first. Growth of small sinusoidal perturbations by viscous flow or evaporation/condensation result in dependence of perturbation growth rate on perturbation wavelength. Rapid thermal oxidation (RTO) of porous silicon is proposed as an alternative for the tedious two-step 300 and 800C oxidation process. Transmission electron microscopy, energy dispersive spectroscopy ESCA are used for quality control. Also, rapid thermal nitridation of oxidized porous silicon in ammonia is proposed to enhance OPS resistance to HF solution. Pores breakup of OPS results in a trapped gas problem during densification. Wet helium is proposed as OPS densification ambient gas to shorten densification time. Finally, PS is proposed to be an extrinsic gettering center in silicon wafers. The suppression of oxidation-induced stacking faults is used to demonstrate the gettering ability. Possible mechanism is discussed.

  11. The processing and potential applications of porous silicon

    Energy Technology Data Exchange (ETDEWEB)

    Shieh, Syyuan [Univ. of California, Berkeley, CA (United States)

    1992-07-01

    Stability of a cylindrical pore under the influence of surface energy is important for porous silicon (PS) processing in the integrated circuit industry. Once the zig-zag cylindrical pores of porous silicon or oxidized porous silicon (OPS) are unstable and breakup into rows of isolated spherical pores, oxidation of PS and densification/nitridation of OPS become difficult. Swing to difficulty transport of reactant gas (O2, NH3) or the trapped gas (for densification of OPS). A first order analysis of the stability of a cylindrical pore or cylinder is considered first. Growth of small sinusoidal perturbations by viscous flow or evaporation/condensation result in dependence of perturbation growth rate on perturbation wavelength. Rapid thermal oxidation (RTO) of porous silicon is proposed as an alternative for the tedious two-step 300 and 800C oxidation process. Transmission electron microscopy, energy dispersive spectroscopy ESCA are used for quality control. Also, rapid thermal nitridation of oxidized porous silicon in ammonia is proposed to enhance OPS resistance to HF solution. Pores breakup of OPS results in a trapped gas problem during densification. Wet helium is proposed as OPS densification ambient gas to shorten densification time. Finally, PS is proposed to be an extrinsic gettering center in silicon wafers. The suppression of oxidation-induced stacking faults is used to demonstrate the gettering ability. Possible mechanism is discussed.

  12. Selective etching of n-type silicon in pn junction structure in hydrofluoric acid and its application in silicon nanowire fabrication

    International Nuclear Information System (INIS)

    Wang Huiquan; Jin Zhonghe; Zheng Yangming; Ma Huilian; Wang Yuelin; Li Tie

    2008-01-01

    Boron is selectively implanted on the surface of an n-type silicon wafer to form a p-type area surrounded by an n-type area. The wafer is then put into a buffered oxide etch solution. It is found that the n-type area can be selectively etched without illumination, with an etching rate lower than 1 nm min -1 , while the p-type area can be selectively etched under illumination with a much higher etching rate. The possible mechanism of the etching phenomenon is discussed. A simple fabrication process of silicon nanowires is proposed according to the above phenomenon. In this process only traditional micro-electromechanical system technology is used. Dimensions of the fabricated nanowire can be controlled well. A 50 nm wide and 50 nm thick silicon nanowire has been formed using this method

  13. Temperature dependence of nickel oxide effect on the optoelectronic properties of porous silicon

    Energy Technology Data Exchange (ETDEWEB)

    Riahi, R., E-mail: riahirim01@gmail.com [Laboratory of Semiconductors, Nanostructures and Advanced Technology (LSNTA), Research and Technology Center of Energy, Tourist Road Soliman, BP 95, 2050 Hammam-Lif (Tunisia); Faculty of Sciences Tunis–El Manar University (Tunisia); Derbali, L. [Laboratory of Semiconductors, Nanostructures and Advanced Technology (LSNTA), Research and Technology Center of Energy, Tourist Road Soliman, BP 95, 2050 Hammam-Lif (Tunisia); Ouertani, B. [Laboratory of Semiconductors, Nanostructures and Advanced Technology (LSNTA), Research and Technology Center of Energy, Tourist Road Soliman, BP 95, 2050 Hammam-Lif (Tunisia); Higher Institute of Environment Science and Technology of Borj-Cedria (Tunisia); Ezzaouia, H. [Laboratory of Semiconductors, Nanostructures and Advanced Technology (LSNTA), Research and Technology Center of Energy, Tourist Road Soliman, BP 95, 2050 Hammam-Lif (Tunisia)

    2017-05-15

    Highlights: • The treatment of porous silicon (PS) with nickel oxide (NiO) decreases the reflectivity significantly. • FTIR analysis showed a substitution of Si−H bonds to Si−O−Si and Si−O−Ni after the thermal annealing. • Annealing the treated NiO/PS at 400 °C leads to a noticeable improvement of the photoluminescence (PL) intensity. • A blueshift was obtained in the PL spectra due to the decrease of silicon nanocrystallites size after exceeding 400 °C. - Abstract: This paper investigates the effect of Nickel oxide (NiO) on the structural and optical properties of porous silicon (PS). Our investigations showed an obvious improvement of porous silicon optoelectronique properties after coating the PS with NiO thin film as a passivating process. The as-prepared NiO/PS thin film was subjected to a thermal annealing to study the effect of temperature on the efficiency of this treatment. The deposition of NiO onto the porous silicon layer was performed using the spray pyrolysis method. The surface modification of the as-prepared NiO/PS samples was investigated after annealing at various temperatures, using an infrared furnace, ranging between 300 °C and 600 °C. The X-ray Diffraction results showed that obtained films show cubic structure with preferred (200) plane orientation. We found an obvious dependence of the PS nanocrystallites size (nc-Si) to the annealing temperature. Photoluminescence (PL) is directly related to the electronic structure and transitions. The characteristic change of the band gap with decrease in size of the nanostructures can be pointed out by the observed blue shift in the photoluminescence spectra. Nickel oxide treatment of Porous silicon led to a significant increase of photoluminescence with a resulting blue-shift at higher annealing temperature. The surface morphology was examined by scanning electron microscope (SEM), and FTIR spectroscopy was used to study the chemical composition of the films. Moreover, the total

  14. Temperature dependence of nickel oxide effect on the optoelectronic properties of porous silicon

    International Nuclear Information System (INIS)

    Riahi, R.; Derbali, L.; Ouertani, B.; Ezzaouia, H.

    2017-01-01

    Highlights: • The treatment of porous silicon (PS) with nickel oxide (NiO) decreases the reflectivity significantly. • FTIR analysis showed a substitution of Si−H bonds to Si−O−Si and Si−O−Ni after the thermal annealing. • Annealing the treated NiO/PS at 400 °C leads to a noticeable improvement of the photoluminescence (PL) intensity. • A blueshift was obtained in the PL spectra due to the decrease of silicon nanocrystallites size after exceeding 400 °C. - Abstract: This paper investigates the effect of Nickel oxide (NiO) on the structural and optical properties of porous silicon (PS). Our investigations showed an obvious improvement of porous silicon optoelectronique properties after coating the PS with NiO thin film as a passivating process. The as-prepared NiO/PS thin film was subjected to a thermal annealing to study the effect of temperature on the efficiency of this treatment. The deposition of NiO onto the porous silicon layer was performed using the spray pyrolysis method. The surface modification of the as-prepared NiO/PS samples was investigated after annealing at various temperatures, using an infrared furnace, ranging between 300 °C and 600 °C. The X-ray Diffraction results showed that obtained films show cubic structure with preferred (200) plane orientation. We found an obvious dependence of the PS nanocrystallites size (nc-Si) to the annealing temperature. Photoluminescence (PL) is directly related to the electronic structure and transitions. The characteristic change of the band gap with decrease in size of the nanostructures can be pointed out by the observed blue shift in the photoluminescence spectra. Nickel oxide treatment of Porous silicon led to a significant increase of photoluminescence with a resulting blue-shift at higher annealing temperature. The surface morphology was examined by scanning electron microscope (SEM), and FTIR spectroscopy was used to study the chemical composition of the films. Moreover, the total

  15. Pyroelectricity of silicon-doped hafnium oxide thin films

    Science.gov (United States)

    Jachalke, Sven; Schenk, Tony; Park, Min Hyuk; Schroeder, Uwe; Mikolajick, Thomas; Stöcker, Hartmut; Mehner, Erik; Meyer, Dirk C.

    2018-04-01

    Ferroelectricity in hafnium oxide thin films is known to be induced by various doping elements and in solid-solution with zirconia. While a wealth of studies is focused on their basic ferroelectric properties and memory applications, thorough studies of the related pyroelectric properties and their application potential are only rarely found. This work investigates the impact of Si doping on the phase composition and ferro- as well as pyroelectric properties of thin film capacitors. Dynamic hysteresis measurements and the field-free Sharp-Garn method were used to correlate the reported orthorhombic phase fractions with the remanent polarization and pyroelectric coefficient. Maximum values of 8.21 µC cm-2 and -46.2 µC K-1 m-2 for remanent polarization and pyroelectric coefficient were found for a Si content of 2.0 at%, respectively. Moreover, temperature-dependent measurements reveal nearly constant values for the pyroelectric coefficient and remanent polarization over the temperature range of 0 ° C to 170 ° C , which make the material a promising candidate for IR sensor and energy conversion applications beyond the commonly discussed use in memory applications.

  16. Optimization of oxidation processes to improve crystalline silicon solar cell emitters

    Directory of Open Access Journals (Sweden)

    L. Shen

    2014-02-01

    Full Text Available Control of the oxidation process is one key issue in producing high-quality emitters for crystalline silicon solar cells. In this paper, the oxidation parameters of pre-oxidation time, oxygen concentration during pre-oxidation and pre-deposition and drive-in time were optimized by using orthogonal experiments. By analyzing experimental measurements of short-circuit current, open circuit voltage, series resistance and solar cell efficiency in solar cells with different sheet resistances which were produced by using different diffusion processes, we inferred that an emitter with a sheet resistance of approximately 70 Ω/□ performed best under the existing standard solar cell process. Further investigations were conducted on emitters with sheet resistances of approximately 70 Ω/□ that were obtained from different preparation processes. The results indicate that emitters with surface phosphorus concentrations between 4.96 × 1020 cm−3 and 7.78 × 1020 cm−3 and with junction depths between 0.46 μm and 0.55 μm possessed the best quality. With no extra processing, the final preparation of the crystalline silicon solar cell efficiency can reach 18.41%, which is an increase of 0.4%abs compared to conventional emitters with 50 Ω/□ sheet resistance.

  17. The kinetics and properties of thermal oxidation of silicon in TCA-O/sub 2/

    International Nuclear Information System (INIS)

    Ahmed, W.; Ahmed, E.

    1993-01-01

    The oxidation of silicon using dry O/sub 2/ is now well established as a key process for the fabrication of electronic devices in the semiconductor industry. However, this process is complicated by its sensitivity to impurities which reduce device yields. HCl can be added to O/sub 2/ to remove these impurities but due to its highly corrosive nature a safer and cleaner alternative such as trichloroethane (TCA) is desirable. In this paper, the thermal oxidation of silicon using a mixture of TCA-O/sub 2/ has been investigated in a large scale industrial system. The growth kinetics and the properties of these films have been studies and compared to oxides produced from dry 2. The addition of TCA generates HCl in situ, enhances the oxidation rate by approximately 54% nd improves the electrical properties. It was found that a 1 mol.% mixture gives the optimum process. An analysis of the data suggests that a liner parabolic growth model is applicable and provides a valuable insight into the physical phenomena governing this important process. (author)

  18. Fluorinated alkyne-derived monolayers on oxide-free silicon nanowires via one-step hydrosilylation

    International Nuclear Information System (INIS)

    Nguyen Minh, Quyen; Pujari, Sidharam P.; Wang, Bin; Wang, Zhanhua; Haick, Hossam; Zuilhof, Han; Rijn, Cees J.M. van

    2016-01-01

    Highlights: • Oxide-free H-terminated silicon nanowires undergo efficient surface modification by reaction with fluorinated 1-alkynes (HC≡C−(CH 2 ) 6 C 8 H 17−x F x ; x = 0–17). • These surface-modified Si NWs are chemically stable under range of conditions (including acid, base). • The surface coating yields efficient electrical passivation as demonstrated by a near-zero electrochemical activity of the surface. - Abstract: Passivation of oxide-free silicon nanowires (Si NWs) by the formation of high-quality fluorinated 1-hexadecyne-derived monolayers with varying fluorine content has been investigated. Alkyl chain monolayers (C 16 H 30−x F x ) with a varying number of fluorine substituents (x = 0, 1, 3, 9, 17) were attached onto hydrogen-terminated silicon (Si−H) surfaces with an effective one-step hydrosilylation. This surface chemistry gives well-defined monolayers on nanowires that have a cylindrical core–shell structure, as characterized by X-ray photoelectron spectroscopy (XPS), Fourier transform infrared spectroscopy (FT-IR) and static contact angle (SCA) analysis. The monolayers were stable under acidic and basic conditions, as well as under extreme conditions (such as UV exposure), and provide excellent surface passivation, which opens up applications in the fields of field effect transistors, optoelectronics and especially for disease diagnosis.

  19. Effect of rapid oxidation on optical and electrical properties of silicon nanowires obtained by chemical etching

    Science.gov (United States)

    Karyaoui, M.; Bardaoui, A.; Ben Rabha, M.; Harmand, J. C.; Amlouk, M.

    2012-05-01

    In the present work, we report the investigation of passivated silicon nanowires (SiNWs) having an average radius of 3.7 μm, obtained by chemical etching of p-type silicon (p-Si). The surface passivation of the SiNWs was performed through a rapid oxidation conducted under a controlled atmosphere at different temperatures and durations. The morphology of the SiNWs was examined using a scanning electron microscope (SEM) that revealed a wave-like structure of dense and vertically aligned one-dimensional silicon nanostructures. On the other hand, optical and electrical characterizations of the SiNWs were studied using a UV-Vis-NIR spectrometer, the Fourier transform infrared spectroscopy (FTIR) and I-V measurements. The reflectance of SiNWs has been dropped to approximately 2% in comparison to that of bare p-Si. This low reflectance slightly increased after carrying out the rapid thermal annealing. The observed behavior was attributed to the formation of a SiO2 layer, as confirmed by FTIR measurements. Finally, the electrical measurements have shown that the rapid oxidation, at certain conditions, contributes to the improvement of the electrical responses of the SiNWs, which can be of great interest for photovoltaic applications.

  20. Fluorinated alkyne-derived monolayers on oxide-free silicon nanowires via one-step hydrosilylation

    Energy Technology Data Exchange (ETDEWEB)

    Nguyen Minh, Quyen [Laboratory of Organic Chemistry, Wageningen University, Stippeneng 4, 6708 WE Wageningen (Netherlands); Nanosens, IJsselkade 7, 7201 HB Zutphen (Netherlands); Pujari, Sidharam P. [Laboratory of Organic Chemistry, Wageningen University, Stippeneng 4, 6708 WE Wageningen (Netherlands); Wang, Bin [The Department of Chemical Engineering and Russell Berrie Nanotechnology Institute, Technion – Israel Institute of Technology, Haifa 3200003 (Israel); Wang, Zhanhua [Laboratory of Organic Chemistry, Wageningen University, Stippeneng 4, 6708 WE Wageningen (Netherlands); Haick, Hossam [The Department of Chemical Engineering and Russell Berrie Nanotechnology Institute, Technion – Israel Institute of Technology, Haifa 3200003 (Israel); Zuilhof, Han [Laboratory of Organic Chemistry, Wageningen University, Stippeneng 4, 6708 WE Wageningen (Netherlands); Rijn, Cees J.M. van, E-mail: cees.vanrijn@wur.nl [Laboratory of Organic Chemistry, Wageningen University, Stippeneng 4, 6708 WE Wageningen (Netherlands)

    2016-11-30

    Highlights: • Oxide-free H-terminated silicon nanowires undergo efficient surface modification by reaction with fluorinated 1-alkynes (HC≡C−(CH{sub 2}){sub 6}C{sub 8}H{sub 17−x}F{sub x}; x = 0–17). • These surface-modified Si NWs are chemically stable under range of conditions (including acid, base). • The surface coating yields efficient electrical passivation as demonstrated by a near-zero electrochemical activity of the surface. - Abstract: Passivation of oxide-free silicon nanowires (Si NWs) by the formation of high-quality fluorinated 1-hexadecyne-derived monolayers with varying fluorine content has been investigated. Alkyl chain monolayers (C{sub 16}H{sub 30−x}F{sub x}) with a varying number of fluorine substituents (x = 0, 1, 3, 9, 17) were attached onto hydrogen-terminated silicon (Si−H) surfaces with an effective one-step hydrosilylation. This surface chemistry gives well-defined monolayers on nanowires that have a cylindrical core–shell structure, as characterized by X-ray photoelectron spectroscopy (XPS), Fourier transform infrared spectroscopy (FT-IR) and static contact angle (SCA) analysis. The monolayers were stable under acidic and basic conditions, as well as under extreme conditions (such as UV exposure), and provide excellent surface passivation, which opens up applications in the fields of field effect transistors, optoelectronics and especially for disease diagnosis.

  1. Wafer scale integration of catalyst dots into nonplanar microsystems

    DEFF Research Database (Denmark)

    Gjerde, Kjetil; Kjelstrup-Hansen, Jakob; Gammelgaard, Lauge

    2007-01-01

    In order to successfully integrate bottom-up fabricated nanostructures such as carbon nanotubes or silicon, germanium, or III-V nanowires into microelectromechanical systems on a wafer scale, reliable ways of integrating catalyst dots are needed. Here, four methods for integrating sub-100-nm...... diameter nickel catalyst dots on a wafer scale are presented and compared. Three of the methods are based on a p-Si layer utilized as an in situ mask, an encapsulating layer, and a sacrificial window mask, respectively. All methods enable precise positioning of nickel catalyst dots at the end...

  2. Black Silicon Solar Cells with Black Ribbons

    DEFF Research Database (Denmark)

    Davidsen, Rasmus Schmidt; Tang, Peter Torben; Mizushima, Io

    2016-01-01

    We present the combination of mask-less reactive ion etch (RIE) texturing and blackened interconnecting ribbons as a method for obtaining all-black solar panels, while using conventional, front-contacted solar cells. Black silicon made by mask-less reactive ion etching has total, average...... in the range 15.7-16.3%. The KOH-textured reference cell had an efficiency of 17.9%. The combination of black Si and black interconnecting ribbons may result in aesthetic, all-black panels based on conventional, front-contacted silicon solar cells....... reflectance below 0.5% across a 156x156 mm2 silicon (Si) wafer. Black interconnecting ribbons were realized by oxidizing copper resulting in reflectance below 3% in the visible wavelength range. Screen-printed Si solar cells were realized on 156x156 mm2 black Si substrates with resulting efficiencies...

  3. Formation and electrical characteristics of silicon dioxide layers by use of nitric acid oxidation method

    International Nuclear Information System (INIS)

    Imal, S.; Takahashi, M.; Matsuba, K.; Asuha; Ishikawa, Y.; Kobayashi, Hikaru

    2005-01-01

    SiO 2 /Si structure can be formed at low temperatures by use of nitric acid (HNO 3 ) oxidation of Si (NAOS) method. When Si wafers are immersed in ∼ 40 wt% HNO 3 solutions at 108 deg C, ∼ 1 nm SiO 2 layers are formed. The subsequent immersion in 68 wt% HNO 3 (i.e., azeotropic mixture of HNO 3 with water) at 121 deg C increases the SiO 2 thickness. The 3,5 nm-thick SiO 2 layers produced by this two-step NAOS method possess a considerably low leakage current density (e.g. 1 x 10 2 A/cmi 2 at the forward gate bias, V G , of 1.5 V), in spite of the low temperature oxidation, and further decreased (e.g., 8 x 10 4 A/cm 2 at V G = 1.5 V) by post-metallization annealing at 250 deg C in hydrogen atmosphere. In order to increase the SiO 2 thickness, a bias voltage is applied during the NAOS method. When 10 V is applied to Si with respect to a Pt counter electrode both immersed in 1 M HNO 3 solutions at 25 deg C, SiO 2 layers with 8 nm thickness can be formed for 1 h(Authors)

  4. Self-limiting and complete oxidation of silicon nanostructures produced by laser ablation in water

    Energy Technology Data Exchange (ETDEWEB)

    Vaccaro, L.; Messina, F.; Camarda, P.; Gelardi, F. M.; Cannas, M., E-mail: marco.cannas@unipa.it [Dipartimento di Fisica e Chimica, Università di Palermo, Via Archirafi 36, I-90123 Palermo (Italy); Popescu, R.; Schneider, R.; Gerthsen, D. [Laboratory for Electron Microscopy, Karlsruhe Institute of Technology, Engesserstrasse 7, 76131 Karlsruhe (Germany)

    2016-07-14

    Oxidized Silicon nanomaterials produced by 1064 nm pulsed laser ablation in deionized water are investigated. High-resolution transmission electron microscopy coupled with energy dispersive X-ray spectroscopy allows to characterize the structural and chemical properties at a sub-nanometric scale. This analysis clarifies that laser ablation induces both self-limiting and complete oxidation processes which produce polycrystalline Si surrounded by a layer of SiO{sub 2} and amorphous fully oxidized SiO{sub 2}, respectively. These nanostructures exhibit a composite luminescence spectrum which is investigated by time-resolved spectroscopy with a tunable laser excitation. The origin of the observed luminescence bands agrees with the two structural typologies: Si nanocrystals emit a μs-decaying red band; defects of SiO{sub 2} give rise to a ns-decaying UV band and two overlapping blue bands with lifetime in the ns and ms timescale.

  5. Fabrication and evaluation of series-triple quantum dots by thermal oxidation of silicon nanowire

    International Nuclear Information System (INIS)

    Uchida, Takafumi; Jo, Mingyu; Tsurumaki-Fukuchi, Atsushi; Arita, Masashi; Takahashi, Yasuo; Fujiwara, Akira

    2015-01-01

    Series-connected triple quantum dots were fabricated by a simple two-step oxidation technique using the pattern-dependent oxidation of a silicon nanowire and an additional oxidation of the nanowire through the gap of the fine gates attached to the nanowire. The characteristics of multi-dot single-electron devices are obtained. The formation of each quantum dot beneath an attached gate is confirmed by analyzing the electrical characteristics and by evaluating the gate capacitances between all pairings of gates and quantum dots. Because the gate electrode is automatically attached to each dot, the device structure benefits from scalability. This technique promises integrability of multiple quantum dots with individual control gates

  6. Control of the optical properties of silicon and chromium mixed oxides deposited by reactive magnetron sputtering

    International Nuclear Information System (INIS)

    Vergara, L.; Galindo, R. Escobar; Martinez, R.; Sanchez, O.; Palacio, C.; Albella, J.M.

    2011-01-01

    The development of mixed-oxide thin films allows obtaining materials with better properties than those of the different binary oxides, which makes them suitable for a great number of applications in different fields, such as tribology, optics or microelectronics. In this paper we investigate the deposition of mixed chromium and silicon oxides deposited by reactive magnetron sputtering with a view to use them as optical coatings with an adjustable refractive index. These films have been characterized by means of Rutherford backscattering spectrometry, Auger electron spectroscopy, X-ray diffraction, scanning electron microscopy, Fourier-transform infrared spectroscopy and spectroscopic ellipsometry so as to determine how the deposition conditions influence the characteristics of the material. We have found that the deposition parameter whose influence determines the properties of the films to a greater extent is the amount of oxygen in the reactive sputtering gas.

  7. A highly sensitive and durable electrical sensor for liquid ethanol using thermally-oxidized mesoporous silicon

    Science.gov (United States)

    Harraz, Farid A.; Ismail, Adel A.; Al-Sayari, S. A.; Al-Hajry, A.; Al-Assiri, M. S.

    2016-12-01

    A capacitive detection of liquid ethanol using reactive, thermally oxidized films constructed from electrochemically synthesized porous silicon (PSi) is demonstrated. The sensor elements are fabricated as meso-PSi (pore sizes hydrophobic PSi surface exhibited almost a half sensitivity of the thermal oxide sensor. The response to water is achieved only at the oxidized surface and found to be ∼one quarter of the ethanol sensitivity, dependent on parameters such as vapor pressure and surface tension. The capacitance response retains ∼92% of its initial value after continuous nine cyclic runs and the sensors presumably keep long-term stability after three weeks storage, demonstrating excellent durability and storage stability. The observed behavior in current system is likely explained by the interface interaction due to dipole moment effect. The results suggest that the current sensor structure and design can be easily made to produce notably higher sensitivities for reversible detection of various analytes.

  8. Wafer-Level Vacuum Packaging of Smart Sensors

    Directory of Open Access Journals (Sweden)

    Allan Hilton

    2016-10-01

    Full Text Available The reach and impact of the Internet of Things will depend on the availability of low-cost, smart sensors—“low cost” for ubiquitous presence, and “smart” for connectivity and autonomy. By using wafer-level processes not only for the smart sensor fabrication and integration, but also for packaging, we can further greatly reduce the cost of sensor components and systems as well as further decrease their size and weight. This paper reviews the state-of-the-art in the wafer-level vacuum packaging technology of smart sensors. We describe the processes needed to create the wafer-scale vacuum microchambers, focusing on approaches that involve metal seals and that are compatible with the thermal budget of complementary metal-oxide semiconductor (CMOS integrated circuits. We review choices of seal materials and structures that are available to a device designer, and present techniques used for the fabrication of metal seals on device and window wafers. We also analyze the deposition and activation of thin film getters needed to maintain vacuum in the ultra-small chambers, and the wafer-to-wafer bonding processes that form the hermetic seal. We discuss inherent trade-offs and challenges of each seal material set and the corresponding bonding processes. Finally, we identify areas for further research that could help broaden implementations of the wafer-level vacuum packaging technology.

  9. Wafer-Level Vacuum Packaging of Smart Sensors.

    Science.gov (United States)

    Hilton, Allan; Temple, Dorota S

    2016-10-31

    The reach and impact of the Internet of Things will depend on the availability of low-cost, smart sensors-"low cost" for ubiquitous presence, and "smart" for connectivity and autonomy. By using wafer-level processes not only for the smart sensor fabrication and integration, but also for packaging, we can further greatly reduce the cost of sensor components and systems as well as further decrease their size and weight. This paper reviews the state-of-the-art in the wafer-level vacuum packaging technology of smart sensors. We describe the processes needed to create the wafer-scale vacuum microchambers, focusing on approaches that involve metal seals and that are compatible with the thermal budget of complementary metal-oxide semiconductor (CMOS) integrated circuits. We review choices of seal materials and structures that are available to a device designer, and present techniques used for the fabrication of metal seals on device and window wafers. We also analyze the deposition and activation of thin film getters needed to maintain vacuum in the ultra-small chambers, and the wafer-to-wafer bonding processes that form the hermetic seal. We discuss inherent trade-offs and challenges of each seal material set and the corresponding bonding processes. Finally, we identify areas for further research that could help broaden implementations of the wafer-level vacuum packaging technology.

  10. Seedless electroplating on patterned silicon

    NARCIS (Netherlands)

    Vargas Llona, Laura Dolores; Jansen, Henricus V.; Elwenspoek, Michael Curt

    2006-01-01

    Nickel thin films have been electrodeposited without the use of an additional seed layer, on highly doped silicon wafers. These substrates conduct sufficiently well to allow deposition using a peripherical electrical contact on the wafer. Films 2 μm thick have been deposited using a nickel sulfamate

  11. Thermal stress during RTP processes and its possible effect on the light induced degradation in Cz-Si wafers

    Science.gov (United States)

    Kouhlane, Yacine; Bouhafs, Djoudi; Khelifati, Nabil; Guenda, Abdelkader; Demagh, Nacer-Eddine; Demagh, Assia; Pfeiffer, Pierre; Mezghiche, Salah; Hetatache, Warda; Derkaoui, Fahima; Nasraoui, Chahinez; Nwadiaru, Ogechi Vivian

    2018-04-01

    In this study, the carrier lifetime variation of p-type boron-doped Czochralski silicon (Cz-Si) wafers was investigated after a direct rapid thermal processing (RTP). Two wafers were passivated by silicon nitride (SiNx:H) layers, deposited by a PECVD system on both surfaces. Then the wafers were subjected to an RTP cycle at a peak temperature of 620 °C. The first wafer was protected (PW) from the direct radiative heating of the RTP furnace by placing the wafer between two as-cut Cz-Si shield wafers during the heat processing. The second wafer was not protected (NPW) and followed the same RTP cycle procedure. The carrier lifetime τ eff was measured using the QSSPC technique before and after illumination for 5 h duration at 0.5 suns. The immediate results of the measured lifetime (τ RTP ) after the RTP process have shown a regeneration in the lifetime of the two wafers with the PW wafer exhibiting an important enhancement in τ RTP as compared to the NPW wafer. The QSSPC measurements have indicated a good stable lifetime (τ d ) and a weak degradation effect was observed in the case of the PW wafer as compared to their initial lifetime value. Interferometry technique analyses have shown an enhancement in the surface roughness for the NPW wafer as compared to the protected one. Additionally, to improve the correlation between the RTP heat radiation stress and the carrier lifetime behavior, a simulation of the thermal stress and temperature profile using the finite element method on the wafers surface at RTP peak temperature of 620 °C was performed. The results confirm the reduction of the thermal stress with less heat losses for the PW wafer. Finally, the proposed method can lead to improving the lifetime of wafers by an RTP process at minimum energy costs.

  12. Pull-test adhesion measurements of diamondlike carbon films on silicon carbide, silicon nitride, aluminum oxide, and zirconium oxide

    International Nuclear Information System (INIS)

    Erck, R.A.; Nichols, F.A.; Dierks, J.F.

    1994-01-01

    Hydrogenated amorphous carbon or diamondlike carbon (DLC) films were formed by 400 eV methane (CH 4 ) ion bombardment of various smooth and rough ceramics, as well as ceramics coated with a layer of Si or Ti. Adhesion was measured by a bonded-pin method. Excellent adhesion was measured for smooth SiC and Si 3 N 4 , but adhesion of DLC to smooth Al 2 O 3 and ZrO 2 was negligible. The use of a Si bonding interlayer produced good adhesion to all the substrates, but a Ti layer was ineffective due to poor bonding between the DLC film and Ti. Bulk thermodynamic calculations are not directly applicable to bonding at the interface because the interface is two dimensional and the compositions of interfacial phases are generally not known. If the standard enthalpy ΔH degree for the reaction between CH 4 and the substrate material is calculated under the assumption that a carbide phase is produced, a relationship is seen between the reaction enthalpy and the relative adhesion. Large positive enthalpies are associated with poor adhesion; negative or small positive enthalpies are associated with good adhesion. This relation between enthalpy and adhesion was also observed for DLC deposited on Si. The lack of adhesion to the Ti was attributed to inadvertent formation of a surface oxide layer that rendered the enthalpy for the reaction with CH 4 positive

  13. Cost-Efficient Wafer-Level Capping for MEMS and Imaging Sensors by Adhesive Wafer Bonding

    Directory of Open Access Journals (Sweden)

    Simon J. Bleiker

    2016-10-01

    Full Text Available Device encapsulation and packaging often constitutes a substantial part of the fabrication cost of micro electro-mechanical systems (MEMS transducers and imaging sensor devices. In this paper, we propose a simple and cost-effective wafer-level capping method that utilizes a limited number of highly standardized process steps as well as low-cost materials. The proposed capping process is based on low-temperature adhesive wafer bonding, which ensures full complementary metal-oxide-semiconductor (CMOS compatibility. All necessary fabrication steps for the wafer bonding, such as cavity formation and deposition of the adhesive, are performed on the capping substrate. The polymer adhesive is deposited by spray-coating on the capping wafer containing the cavities. Thus, no lithographic patterning of the polymer adhesive is needed, and material waste is minimized. Furthermore, this process does not require any additional fabrication steps on the device wafer, which lowers the process complexity and fabrication costs. We demonstrate the proposed capping method by packaging two different MEMS devices. The two MEMS devices include a vibration sensor and an acceleration switch, which employ two different electrical interconnection schemes. The experimental results show wafer-level capping with excellent bond quality due to the re-flow behavior of the polymer adhesive. No impediment to the functionality of the MEMS devices was observed, which indicates that the encapsulation does not introduce significant tensile nor compressive stresses. Thus, we present a highly versatile, robust, and cost-efficient capping method for components such as MEMS and imaging sensors.

  14. (Preoxidation cleaning optimization for crystalline silicon)

    Energy Technology Data Exchange (ETDEWEB)

    1991-01-01

    A series of controlled experiments has been performed in Sandia's Photovoltaic Device Fabrication Laboratory to evaluate the effect of various chemical surface treatments on the recombination lifetime of crystalline silicon wafers subjected to a high-temperature dry oxidation. From this series of experiments we have deduced a relatively simple yet effective cleaning sequence. We have also evaluated the effect of different chemical damage-removal etches for improving the recombination lifetime and surface smoothness of mechanically lapped wafers. This paper presents the methodology used, the experimental results obtained, and our experience with using this process on a continuing basis over a period of many months. 7 refs., 4 figs., 1 tab.

  15. Silicon improves seed germination and alleviates oxidative stress of bud seedlings in tomato under water deficit stress.

    Science.gov (United States)

    Shi, Yu; Zhang, Yi; Yao, Hejin; Wu, Jiawen; Sun, Hao; Gong, Haijun

    2014-05-01

    The beneficial effects of silicon on plant growth and development under drought have been widely reported. However, little information is available on the effects of silicon on seed germination under drought. In this work, the effects of exogenous silicon (0.5 mM) on the seed germination and tolerance performance of tomato (Solanum lycopersicum L.) bud seedlings under water deficit stress simulated by 10% (w/v) polyethylene glycol (PEG-6000) were investigated in four cultivars ('Jinpengchaoguan', 'Zhongza No.9', 'Houpi L402' and 'Oubao318'). The results showed that the seed germination percentage was notably decreased in the four cultivars under water stress, and it was significantly improved by added silicon. Compared with the non-silicon treatment, silicon addition increased the activities of superoxide dismutase (SOD) and catalase (CAT), and decreased the production of superoxide anion (O2·) and hydrogen peroxide (H2O2) in the radicles of bud seedlings under water stress. Addition of silicon decreased the total phenol concentrations in radicles under water stress, which might contribute to the decrease of peroxidase (POD) activity, as observed in the in vivo and in vitro experiments. The decrease of POD activity might contribute to a less accumulation of hydroxyl radical (·OH) under water stress. Silicon addition also decreased the concentrations of malondialdehyde (MDA) in the radicles under stress, indicating decreased lipid peroxidation. These results suggest that exogenous silicon could improve seed germination and alleviate oxidative stress to bud seedling of tomato by enhancing antioxidant defense. The positive effects of silicon observed in a silicon-excluder also suggest the active involvement of silicon in biochemical processes in plants. Copyright © 2014 Elsevier Masson SAS. All rights reserved.

  16. Pull-test adhesion measurements of diamondlike carbon films on silicon carbide, silicon nitride, aluminum oxide, and zirconium oxide

    Energy Technology Data Exchange (ETDEWEB)

    Erck, R.A.; Nichols, F.A. [Argonne National Lab., IL (United States); Dierks, J.F. [North Dakota State Univ., Fargo, ND (United States)

    1993-10-01

    Hydrogenated amorphous carbon films or diamondlike carbon (DLC) films were formed by ion-beam deposition of 400 eV methane (CH{sub 4}) ions on several smooth and rough ceramics, as well as on ceramics coated with a layer of Si and Ti. Adhesion was measured by the pin-pull method. Excellent adhesion was measured for smooth SiC and Si{sub 3}N{sub 4}, but adhesion of DLC to Al{sub 2}O{sub 3} and ZrO{sub 2} was negligible. The use of a Si bonding interlayer produced good adhesion to all the substrates, but a Ti layer was ineffective because bonding between the DLC film and Ti was poor. The presence of surface roughness appeared to greatly increase the measured adhesion in all cases. Bulk thermodynamic calculations are not directly applicable to bonding at the interface. If the standard enthalpy of formation for reaction between CH{sub 4} and substrate is calculated assumpting a carbide or carbon phase is produced, a relation is seen between reaction enthalpy and relative adhesion. Large positive enthalpies are associated with poor adhesion; negative or small positive enthalpies are associated with good adhesion. This relation between enthalpy and adhesion was also observed for DLC deposited on Si. Lack of adhesion to Ti was attributed to inadvertent formation of a surface oxide layer that rendered the enthalpy for reaction with CH{sub 4} strongly positive and similar in magnitude to that for Al{sub 2}O{sub 3} and ZrO{sub 2}.

  17. High-aspect-ratio, silicon oxide-enclosed pillar structures in microfluidic liquid chromatography.

    Science.gov (United States)

    Taylor, Lisa C; Lavrik, Nickolay V; Sepaniak, Michael J

    2010-11-15

    The present paper discusses the ability to separate chemical species using high-aspect-ratio, silicon oxide-enclosed pillar arrays. These miniaturized chromatographic systems require smaller sample volumes, experience less flow resistance, and generate superior separation efficiency over traditional packed bed liquid chromatographic columns, improvements controlled by the increased order and decreased pore size of the systems. In our distinctive fabrication sequence, plasma-enhanced chemical vapor deposition (PECVD) of silicon oxide is used to alter the surface and structural properties of the pillars for facile surface modification while improving the pillar mechanical stability and increasing surface area. The separation behavior of model compounds within our pillar systems indicated an unexpected hydrophobic-like separation mechanism. The effects of organic modifier, ionic concentration, and pressure-driven flow rate were studied. A decrease in the organic content of the mobile phase increased peak resolution while detrimentally effecting peak shape. A resolution of 4.7 (RSD = 3.7%) was obtained for nearly perfect Gaussian shaped peaks, exhibiting plate heights as low as 1.1 and 1.8 μm for fluorescein and sulforhodamine B, respectively. Contact angle measurements and DART mass spectrometry analysis indicate that our employed elastomeric soft bonding technique modifies pillar properties, creating a fortuitous stationary phase. This discovery provides evidence supporting the ability to easily functionalize PECVD oxide surfaces by gas-phase reactions.

  18. Thermal radiative near field transport between vanadium dioxide and silicon oxide across the metal insulator transition

    Energy Technology Data Exchange (ETDEWEB)

    Menges, F.; Spieser, M.; Riel, H.; Gotsmann, B., E-mail: bgo@zurich.ibm.com [IBM Research-Zurich, Säumerstrasse 4, CH-8803 Rüschlikon (Switzerland); Dittberner, M. [IBM Research-Zurich, Säumerstrasse 4, CH-8803 Rüschlikon (Switzerland); Photonics Laboratory, ETH Zurich, 8093 Zurich (Switzerland); Novotny, L. [Photonics Laboratory, ETH Zurich, 8093 Zurich (Switzerland); Passarello, D.; Parkin, S. S. P. [IBM Almaden Research Center, 650 Harry Road, San Jose, California 95120 (United States)

    2016-04-25

    The thermal radiative near field transport between vanadium dioxide and silicon oxide at submicron distances is expected to exhibit a strong dependence on the state of vanadium dioxide which undergoes a metal-insulator transition near room temperature. We report the measurement of near field thermal transport between a heated silicon oxide micro-sphere and a vanadium dioxide thin film on a titanium oxide (rutile) substrate. The temperatures of the 15 nm vanadium dioxide thin film varied to be below and above the metal-insulator-transition, and the sphere temperatures were varied in a range between 100 and 200 °C. The measurements were performed using a vacuum-based scanning thermal microscope with a cantilevered resistive thermal sensor. We observe a thermal conductivity per unit area between the sphere and the film with a distance dependence following a power law trend and a conductance contrast larger than 2 for the two different phase states of the film.

  19. Transformational silicon electronics

    KAUST Repository

    Rojas, Jhonathan Prieto

    2014-02-25

    In today\\'s traditional electronics such as in computers or in mobile phones, billions of high-performance, ultra-low-power devices are neatly integrated in extremely compact areas on rigid and brittle but low-cost bulk monocrystalline silicon (100) wafers. Ninety percent of global electronics are made up of silicon. Therefore, we have developed a generic low-cost regenerative batch fabrication process to transform such wafers full of devices into thin (5 μm), mechanically flexible, optically semitransparent silicon fabric with devices, then recycling the remaining wafer to generate multiple silicon fabric with chips and devices, ensuring low-cost and optimal utilization of the whole substrate. We show monocrystalline, amorphous, and polycrystalline silicon and silicon dioxide fabric, all from low-cost bulk silicon (100) wafers with the semiconductor industry\\'s most advanced high-κ/metal gate stack based high-performance, ultra-low-power capacitors, field effect transistors, energy harvesters, and storage to emphasize the effectiveness and versatility of this process to transform traditional electronics into flexible and semitransparent ones for multipurpose applications. © 2014 American Chemical Society.

  20. Reaction analysis of initial oxidation of silicon by UV-light-excited ozone and the application to rapid and uniform SiO2 film growth

    International Nuclear Information System (INIS)

    Tosaka, Aki; Nonaka, Hidehiko; Ichimura, Shingo; Nishiguchi, Tetsuya

    2007-01-01

    UV-light-excited O 3 prepared by irradiation of nearly 100% pure O 3 with a KrF excimer laser (λ=248 nm, irradiated area=30x10 mm 2 ) was utilized for low-temperature Si oxidation. The initial oxidation rate was determined, and the activation energy was shown to be almost zero (0.049 eV). To clarify the optimum oxidation conditions, the dependence of the SiO 2 film growth rate on the total photon number and the photon density was investigated. The evolution of O 3 density after UV-light irradiation was experimentally measured, and the O( 1 D) density change is discussed. O( 1 D) density changes are successfully explained by using a second-order reaction model, indicating that a pulse supply of oxygen atoms is essential in the initial oxidation process. The uniform oxidation of 8 in. Si wafer has been carried out using a wafer-transfer type chamber by irradiating the wafer with KrF excimer laser light expanded linearly to the wafer width by a concave lens

  1. Characterizing SOI Wafers By Use Of AOTF-PHI

    Science.gov (United States)

    Cheng, Li-Jen; Li, Guann-Pyng; Zang, Deyu

    1995-01-01

    Developmental nondestructive method of characterizing layers of silicon-on-insulator (SOI) wafer involves combination of polarimetric hyperspectral imaging by use of acousto-optical tunable filters (AOTF-PHI) and computational resources for extracting pertinent data on SOI wafers from polarimetric hyperspectral images. Offers high spectral resolution and both ease and rapidity of optical-wavelength tuning. Further efforts to implement all of processing of polarimetric spectral image data in special-purpose hardware for sake of procesing speed. Enables characterization of SOI wafers in real time for online monitoring and adjustment of production. Also accelerates application of AOTF-PHI to other applications in which need for high-resolution spectral imaging, both with and without polarimetry.

  2. Interface bonding in silicon oxide nanocontacts: interaction potentials and force measurements

    Science.gov (United States)

    Wierez-Kien, M.; Craciun, A. D.; Pinon, A. V.; Le Roux, S.; Gallani, J. L.; Rastei, M. V.

    2018-04-01

    The interface bonding between two silicon-oxide nanoscale surfaces has been studied as a function of atomic nature and size of contacting asperities. The binding forces obtained using various interaction potentials are compared with experimental force curves measured in vacuum with an atomic force microscope. In the limit of small nanocontacts (typically contact area which is altered by stretching speeds. The mean unbinding force is found to decrease as the contact spends time in the attractive regime. This contact weakening is featured by a negative aging coefficient which broadens and shifts the thermal-induced force distribution at low stretching speeds.

  3. Optical study of planar waveguides based on oxidized porous silicon impregnated with laser dyes

    Energy Technology Data Exchange (ETDEWEB)

    Chouket, A. [Unite de recherche de Spectroscopie Raman, Departement de Physique, Faculte des Sciences de Tunis, Elmanar 2092, Tunis (Tunisia); Charrier, J. [Laboratoire d' Optronique CNRS-UMR FOTON 6082, Universite de Rennes 1, ENSSAT-6 rue de Kerampont, BP 80518, 22305 Lannion Cedex (France); Elhouichet, H. [Unite de recherche de Spectroscopie Raman, Departement de Physique, Faculte des Sciences de Tunis, Elmanar 2092, Tunis (Tunisia)], E-mail: habib.elhouichet@fst.rnu.tn; Oueslati, M. [Unite de recherche de Spectroscopie Raman, Departement de Physique, Faculte des Sciences de Tunis, Elmanar 2092, Tunis (Tunisia)

    2009-05-15

    Oxidized porous silicon optical planar waveguides were elaborated and impregnated with rhodamine B and rhodamine 6G. The waveguiding, absorption, and photoluminescence properties of these impregnated waveguides were studied. Successful impregnation of the structure with laser dyes is shown from photoluminescence and reflectivity measurements. Furthermore, the reflectivity spectra prove the homogenous incorporation of both dye molecules inside the pores of the matrices. The refractive indices of waveguide layers were determined before and after dye impregnation to indicate the conservation of guiding conditions. The optical losses in the visible wavelengths are studied as a function of dye concentration. The dye absorption is the main reason for these losses.

  4. Electronic detection of surface plasmon polaritons by metal-oxide-silicon capacitor

    Directory of Open Access Journals (Sweden)

    Robert E. Peale

    2016-09-01

    Full Text Available An electronic detector of surface plasmon polaritons (SPPs is reported. SPPs optically excited on a metal surface using a prism coupler are detected by using a close-coupled metal-oxide-silicon (MOS capacitor. Incidence-angle dependence is explained by Fresnel transmittance calculations, which also are used to investigate the dependence of photo-response on structure dimensions. Electrodynamic simulations agree with theory and experiment and additionally provide spatial intensity distributions on and off the SPP excitation resonance. Experimental dependence of the photoresponse on substrate carrier type, carrier concentration, and back-contact biasing is qualitatively explained by simple theory of MOS capacitors.

  5. Atomic force microscopy-based repeated machining theory for nanochannels on silicon oxide surfaces

    Energy Technology Data Exchange (ETDEWEB)

    Wang, Z.Q., E-mail: wangzhiqian@sia.cn [State Key Laboratory of Robotics, Shenyang Institute of Automation, CAS, Shenyang 110016 (China); Graduate University of the Chinese Academy of Sciences, Beijing 100049 (China); Jiao, N.D. [State Key Laboratory of Robotics, Shenyang Institute of Automation, CAS, Shenyang 110016 (China); Tung, S. [Department of Mechanical Engineering, University of Arkansas, Fayetteville, AR 72701 (United States); Dong, Z.L. [State Key Laboratory of Robotics, Shenyang Institute of Automation, CAS, Shenyang 110016 (China)

    2011-02-01

    The atomic force microscopy (AFM)-based repeated nanomachining of nanochannels on silicon oxide surfaces is investigated both theoretically and experimentally. The relationships of the initial nanochannel depth vs. final nanochannel depth at a normal force are systematically studied. Using the derived theory and simulation results, the final nanochannel depth can be predicted easily. Meanwhile, if a nanochannel with an expected depth needs to be machined, a right normal force can be selected simply and easily in order to decrease the wear of the AFM tip. The theoretical analysis and simulation results can be effectively used for AFM-based fabrication of nanochannels.

  6. Quasimetallic silicon micromachined photonic crystals

    International Nuclear Information System (INIS)

    Temelkuran, B.; Bayindir, Mehmet; Ozbay, E.; Kavanaugh, J. P.; Sigalas, M. M.; Tuttle, G.

    2001-01-01

    We report on fabrication of a layer-by-layer photonic crystal using highly doped silicon wafers processed by semiconductor micromachining techniques. The crystals, built using (100) silicon wafers, resulted in an upper stop band edge at 100 GHz. The transmission and defect characteristics of these structures were found to be analogous to metallic photonic crystals. We also investigated the effect of doping concentration on the defect characteristics. The experimental results agree well with predictions of the transfer matrix method simulations

  7. On the Origin of Light Emission in Silicon Rich Oxide Obtained by Low-Pressure Chemical Vapor Deposition

    OpenAIRE

    Aceves-Mijares, M.; González-Fernández, A. A.; López-Estopier, R.; Luna-López, A.; Berman-Mendoza, D.; Morales, A.; Falcony, C.; Domínguez, C.; Murphy-Arteaga, R.

    2012-01-01

    Silicon Rich Oxide (SRO) has been considered as a material to overcome the drawbacks of silicon to achieve optical functions. Various techniques can be used to produce it, including Low-Pressure Chemical Vapor Deposition (LPCVD). In this paper, a brief description of the studies carried out and discussions of the results obtained on electro-, cathode-, and photoluminescence properties of SRO prepared by LPCVD and annealed at 1,100°C are presented. The experimental results lead us to accept th...

  8. Proposed method of assembly for the BCD silicon strip vertex detector modules

    International Nuclear Information System (INIS)

    Lindenmeyer, C.

    1989-01-01

    The BCD Silicon strip Vertex Detector is constructed of 10 identical central region modules and 18 similar forward region modules. This memo describes a method of assembling these modules from individual silicon wafers. Each wafer is fitted with associated front end electronics and cables and has been tested to insure that only good wafers reach the final assembly stage. 5 figs

  9. ZnO transparent conductive oxide for thin film silicon solar cells

    Science.gov (United States)

    Söderström, T.; Dominé, D.; Feltrin, A.; Despeisse, M.; Meillaud, F.; Bugnon, G.; Boccard, M.; Cuony, P.; Haug, F.-J.; Faÿ, S.; Nicolay, S.; Ballif, C.

    2010-03-01

    There is general agreement that the future production of electric energy has to be renewable and sustainable in the long term. Photovoltaic (PV) is booming with more than 7GW produced in 2008 and will therefore play an important role in the future electricity supply mix. Currently, crystalline silicon (c-Si) dominates the market with a share of about 90%. Reducing the cost per watt peak and energy pay back time of PV was the major concern of the last decade and remains the main challenge today. For that, thin film silicon solar cells has a strong potential because it allies the strength of c-Si (i.e. durability, abundancy, non toxicity) together with reduced material usage, lower temperature processes and monolithic interconnection. One of the technological key points is the transparent conductive oxide (TCO) used for front contact, barrier layer or intermediate reflector. In this paper, we report on the versatility of ZnO grown by low pressure chemical vapor deposition (ZnO LP-CVD) and its application in thin film silicon solar cells. In particular, we focus on the transparency, the morphology of the textured surface and its effects on the light in-coupling for micromorph tandem cells in both the substrate (n-i-p) and superstrate (p-i-n) configurations. The stabilized efficiencies achieved in Neuchâtel are 11.2% and 9.8% for p-i-n (without ARC) and n-i-p (plastic substrate), respectively.

  10. Room temperature photoluminescence in the visible range from silicon nanowires grown by a solid-state reaction

    International Nuclear Information System (INIS)

    Anguita, J V; Sharma, P; Henley, S J; Silva, S R P

    2009-01-01

    The solid-liquid-solid method (also known as the solid-state method) is used to produce silicon nanowires at the core of silica nanowires with a support catalyst layer structure of nickel and titanium layers sputtered on oxide-coated silicon wafers. This silane-free process is low cost and large-area compatible. Using electron microscopy and Raman spectroscopy we deduce that the wires have crystalline silicon cores. The nanowires show photoluminescence in the visible range (orange), and we investigate the origin of this band. We further show that the nanowires form a random mesh that acts as an efficient optical trap, giving rise to an optically absorbing medium.

  11. Room temperature photoluminescence in the visible range from silicon nanowires grown by a solid-state reaction

    Science.gov (United States)

    Anguita, J. V.; Sharma, P.; Henley, S. J.; Silva, S. R. P.

    2009-11-01

    The solid-liquid-solid method (also known as the solid-state method) is used to produce silicon nanowires at the core of silica nanowires with a support catalyst layer structure of nickel and titanium layers sputtered on oxide-coated silicon wafers. This silane-free process is low cost and large-area compatible. Using electron microscopy and Raman spectroscopy we deduce that the wires have crystalline silicon cores. The nanowires show photoluminescence in the visible range (orange), and we investigate the origin of this band. We further show that the nanowires form a random mesh that acts as an efficient optical trap, giving rise to an optically absorbing medium.

  12. Materials preparation and fabrication of pyroelectric polymer/silicon MOSFET detector arrays. Final report

    International Nuclear Information System (INIS)

    Bloomfield, P.

    1992-01-01

    The authors have delivered several 64-element linear arrays of pyroelectric elements fully integrated on silicon wafers with MOS readout devices. They have delivered detailed drawings of the linear arrays to LANL. They have processed a series of two inch wafers per submitted design. Each two inch wafer contains two 64 element arrays. After spin-coating copolymer onto the arrays, vacuum depositing the top electrodes, and polarizing the copolymer films so as to make them pyroelectrically active, each wafer was split in half. The authors developed a thicker oxide coating separating the extended gate electrode (beneath the polymer detector) from the silicon. This should reduce its parasitic capacitance and hence improve the S/N. They provided LANL three processed 64 element sensor arrays. Each array was affixed to a connector panel and selected solder pads of the common ground, the common source voltage supply connections, the 64 individual drain connections, and the 64 drain connections (for direct pyroelectric sensing response rather than the MOSFET action) were wire bonded to the connector panel solder pads. This entails (64 + 64 + 1 + 1) = 130 possible bond connections per 64 element array. This report now details the processing steps and the progress of the individual wafers as they were carried through from beginning to end

  13. Low-temperature Au/a-Si wafer bonding

    International Nuclear Information System (INIS)

    Jing, Errong; Xiong, Bin; Wang, Yuelin

    2011-01-01

    The Si/SiO 2 /Ti/Au–Au/Ti/a-Si/SiO 2 /Si bonding structure, which can also be used for the bonding of non-silicon material, was investigated for the first time in this paper. The bond quality test showed that the bond yield, bond repeatability and average shear strength are higher for this bonding structure. The interfacial microstructure analysis indicated that the Au-induced crystallization of the amorphous silicon process leads to big Si grains extending across the bond interface and Au filling the other regions of the bond interface, which result into a strong and void-free bond interface. In addition, the Au-induced crystallization reaction leads to a change in the IR images of the bond interface. Therefore, the IR microscope can be used to evaluate and compare the different bond strengths qualitatively. Furthermore, in order to verify the superiority of the bonding structure, the Si/SiO 2 /Ti/Au–a-Si/SiO 2 /Si (i.e. no Ti/Au layer on the a-Si surface) and Si/SiO 2 /Ti/Au–Au/Ti/SiO 2 /Si bonding structures (i.e. Au thermocompression bonding) were also investigated. For the Si/SiO 2 /Ti/Au–a-Si/SiO 2 /Si bonding structure, the poor bond quality is due to the native oxide layer on the a-Si surface, and for the Si/SiO 2 /Ti/Au–Au/Ti/SiO 2 /Si bonding structure, the poor bond quality is caused by the wafer surface roughness which prevents intimate contact and limits the interdiffusion at the bond interface.

  14. Self-assisted GaAs nanowires with selectable number density on Silicon without oxide layer

    International Nuclear Information System (INIS)

    Bietti, S; Somaschini, C; Esposito, L; Sanguinetti, S; Frigeri, C; Fedorov, A; Geelhaar, L

    2014-01-01

    We present the growth of self-assisted GaAs nanowires (NWs) with selectable number density on bare Si(1 1 1), not covered by the silicon oxide. We determine the number density of the NWs by initially self-assembling GaAs islands on whose top a single NW is nucleated. The number density of the initial GaAs base islands can be tuned by droplet epitaxy and the same degree of control is then transferred to the NWs. This procedure is completely performed during a single growth in an ultra-high vacuum environment and requires neither an oxide layer covering the substrate, nor any pre-patterning technique. (paper)

  15. Effect of grain alignment on interface trap density of thermally oxidized aligned-crystalline silicon films

    Science.gov (United States)

    Choi, Woong; Lee, Jung-Kun; Findikoglu, Alp T.

    2006-12-01

    The authors report studies of the effect of grain alignment on interface trap density of thermally oxidized aligned-crystalline silicon (ACSi) films by means of capacitance-voltage (C-V) measurements. C-V curves were measured on metal-oxide-semiconductor (MOS) capacitors fabricated on ⟨001⟩-oriented ACSi films on polycrystalline substrates. From high-frequency C-V curves, the authors calculated a decrease of interface trap density from 2×1012to1×1011cm-2eV-1 as the grain mosaic spread in ACSi films improved from 13.7° to 6.5°. These results demonstrate the effectiveness of grain alignment as a process technique to achieve significantly enhanced performance in small-grained (⩽1μm ) polycrystalline Si MOS-type devices.

  16. Down-conversion luminescence from (Ce, Yb) co-doped oxygen-rich silicon oxides

    International Nuclear Information System (INIS)

    Heng, C. L.; Wang, T.; Su, W. Y.; Wu, H. C.; Yin, P. G.; Finstad, T. G.

    2016-01-01

    We have studied down-conversion photoluminescence (PL) from (Ce, Yb) co-doped “oxygen rich” silicon oxide films prepared by sputtering and annealing. The Ce"3"+ ∼510 nm PL is sensitive to the Ce concentration of the films and is much stronger for 3 at. % Ce than for 2 at. % Ce after annealing at 1200 °C. The PL emission and excitation spectroscopy results indicate that the excitation of Yb"3"+ is mainly through an energy transfer from Ce"3"+ to Yb"3"+, oxide defects also play a role in the excitation of Yb"3"+ after lower temperature (∼800 °C) annealing. The Ce"3"+ 510 nm photon excites mostly only one Yb"3"+ 980 nm photon. Temperature-dependent PL measurements suggest that the energy transfer from Ce"3"+ to Yb"3"+ is partly thermally activated.

  17. Charge separation technique for metal-oxide-silicon capacitors in the presence of hydrogen deactivated dopants

    International Nuclear Information System (INIS)

    Witczak, Steven C.; Winokur, Peter S.; Lacoe, Ronald C.; Mayer, Donald C.

    2000-01-01

    An improved charge separation technique for metal-oxide-silicon (MOS) capacitors is presented which accounts for the deactivation of substrate dopants by hydrogen at elevated irradiation temperatures or small irradiation biases. Using high-frequency capacitance-voltage (C-V) measurements, radiation-induced inversion voltage shifts are separated into components due to oxide trapped charge, interface traps and deactivated dopants, where the latter is computed from a reduction in Si capacitance. In the limit of no radiation-induced dopant deactivation, this approach reduces to the standard midgap charge separation technique used widely for the analysis of room-temperature irradiations. The technique is demonstrated on a p-type MOS capacitor irradiated with 60 Co γ-rays at 100 C and zero bias, where the dopant deactivation is significant

  18. The fabrication of highly ordered block copolymer micellar arrays: control of the separation distances of silicon oxide dots

    Science.gov (United States)

    Yoo, Hana; Park, Soojin

    2010-06-01

    We demonstrate the fabrication of highly ordered silicon oxide dotted arrays prepared from polydimethylsiloxane (PDMS) filled nanoporous block copolymer (BCP) films and the preparation of nanoporous, flexible Teflon or polyimide films. Polystyrene-block-poly(2-vinylpyridine) (PS-b-P2VP) films were annealed in toluene vapor to enhance the lateral order of micellar arrays and were subsequently immersed in alcohol to produce nano-sized pores, which can be used as templates for filling a thin layer of PDMS. When a thin layer of PDMS was spin-coated onto nanoporous BCP films and thermally annealed at a certain temperature, the PDMS was drawn into the pores by capillary action. PDMS filled BCP templates were exposed to oxygen plasma environments in order to fabricate silicon oxide dotted arrays. By addition of PS homopolymer to PS-b-P2VP copolymer, the separation distances of micellar arrays were tuned. As-prepared silicon oxide dotted arrays were used as a hard master for fabricating nanoporous Teflon or polyimide films by spin-coating polymer precursor solutions onto silicon patterns and peeling off. This simple process enables us to fabricate highly ordered nanoporous BCP templates, silicon oxide dots, and flexible nanoporous polymer patterns with feature size of sub-20 nm over 5 cm × 5 cm.

  19. The fabrication of highly ordered block copolymer micellar arrays: control of the separation distances of silicon oxide dots

    Energy Technology Data Exchange (ETDEWEB)

    Yoo, Hana; Park, Soojin, E-mail: spark@unist.ac.kr [Interdisciplinary School of Green Energy, Ulsan National Institute of Science and Technology, Banyeon-ri 100, Ulsan 689-798 (Korea, Republic of)

    2010-06-18

    We demonstrate the fabrication of highly ordered silicon oxide dotted arrays prepared from polydimethylsiloxane (PDMS) filled nanoporous block copolymer (BCP) films and the preparation of nanoporous, flexible Teflon or polyimide films. Polystyrene-block-poly(2-vinylpyridine) (PS-b-P2VP) films were annealed in toluene vapor to enhance the lateral order of micellar arrays and were subsequently immersed in alcohol to produce nano-sized pores, which can be used as templates for filling a thin layer of PDMS. When a thin layer of PDMS was spin-coated onto nanoporous BCP films and thermally annealed at a certain temperature, the PDMS was drawn into the pores by capillary action. PDMS filled BCP templates were exposed to oxygen plasma environments in order to fabricate silicon oxide dotted arrays. By addition of PS homopolymer to PS-b-P2VP copolymer, the separation distances of micellar arrays were tuned. As-prepared silicon oxide dotted arrays were used as a hard master for fabricating nanoporous Teflon or polyimide films by spin-coating polymer precursor solutions onto silicon patterns and peeling off. This simple process enables us to fabricate highly ordered nanoporous BCP templates, silicon oxide dots, and flexible nanoporous polymer patterns with feature size of sub-20 nm over 5 cm x 5 cm.

  20. Towards large size substrates for III-V co-integration made by direct wafer bonding on Si

    Directory of Open Access Journals (Sweden)

    N. Daix

    2014-08-01

    Full Text Available We report the first demonstration of 200 mm InGaAs-on-insulator (InGaAs-o-I fabricated by the direct wafer bonding technique with a donor wafer made of III-V heteroepitaxial structure grown on 200 mm silicon wafer. The measured threading dislocation density of the In0.53Ga0.47As (InGaAs active layer is equal to 3.5 × 109 cm−2, and it does not degrade after the bonding and the layer transfer steps. The surface roughness of the InGaAs layer can be improved by chemical-mechanical-polishing step, reaching values as low as 0.4 nm root-mean-square. The electron Hall mobility in 450 nm thick InGaAs-o-I layer reaches values of up to 6000 cm2/Vs, and working pseudo-MOS transistors are demonstrated with an extracted electron mobility in the range of 2000–3000 cm2/Vs. Finally, the fabrication of an InGaAs-o-I substrate with the active layer as thin as 90 nm is achieved with a Buried Oxide of 50 nm. These results open the way to very large scale production of III-V-o-I advanced substrates for future CMOS technology nodes.

  1. Towards large size substrates for III-V co-integration made by direct wafer bonding on Si

    Energy Technology Data Exchange (ETDEWEB)

    Daix, N., E-mail: dai@zurich.ibm.com; Uccelli, E.; Czornomaz, L.; Caimi, D.; Rossel, C.; Sousa, M.; Siegwart, H.; Marchiori, C.; Fompeyrine, J. [IBM Research - Zürich, Säumerstrasse 4, CH-8803 Rüschlikon (Switzerland); Hartmann, J. M. [CEA, LETI 17, rue des Martyrs, F-38054 Grenoble (France); Shiu, K.-T.; Cheng, C.-W.; Krishnan, M.; Lofaro, M.; Kobayashi, M.; Sadana, D. [IBM T. J. Watson Research Center, 1101 Kitchawan Rd., Route 134 Yorktown Heights, New York 10598 (United States)

    2014-08-01

    We report the first demonstration of 200 mm InGaAs-on-insulator (InGaAs-o-I) fabricated by the direct wafer bonding technique with a donor wafer made of III-V heteroepitaxial structure grown on 200 mm silicon wafer. The measured threading dislocation density of the In{sub 0.53}Ga{sub 0.47}As (InGaAs) active layer is equal to 3.5 × 10{sup 9} cm{sup −2}, and it does not degrade after the bonding and the layer transfer steps. The surface roughness of the InGaAs layer can be improved by chemical-mechanical-polishing step, reaching values as low as 0.4 nm root-mean-square. The electron Hall mobility in 450 nm thick InGaAs-o-I layer reaches values of up to 6000 cm{sup 2}/Vs, and working pseudo-MOS transistors are demonstrated with an extracted electron mobility in the range of 2000–3000 cm{sup 2}/Vs. Finally, the fabrication of an InGaAs-o-I substrate with the active layer as thin as 90 nm is achieved with a Buried Oxide of 50 nm. These results open the way to very large scale production of III-V-o-I advanced substrates for future CMOS technology nodes.

  2. Towards large size substrates for III-V co-integration made by direct wafer bonding on Si

    Science.gov (United States)

    Daix, N.; Uccelli, E.; Czornomaz, L.; Caimi, D.; Rossel, C.; Sousa, M.; Siegwart, H.; Marchiori, C.; Hartmann, J. M.; Shiu, K.-T.; Cheng, C.-W.; Krishnan, M.; Lofaro, M.; Kobayashi, M.; Sadana, D.; Fompeyrine, J.

    2014-08-01

    We report the first demonstration of 200 mm InGaAs-on-insulator (InGaAs-o-I) fabricated by the direct wafer bonding technique with a donor wafer made of III-V heteroepitaxial structure grown on 200 mm silicon wafer. The measured threading dislocation density of the In0.53Ga0.47As (InGaAs) active layer is equal to 3.5 × 109 cm-2, and it does not degrade after the bonding and the layer transfer steps. The surface roughness of the InGaAs layer can be improved by chemical-mechanical-polishing step, reaching values as low as 0.4 nm root-mean-square. The electron Hall mobility in 450 nm thick InGaAs-o-I layer reaches values of up to 6000 cm2/Vs, and working pseudo-MOS transistors are demonstrated with an extracted electron mobility in the range of 2000-3000 cm2/Vs. Finally, the fabrication of an InGaAs-o-I substrate with the active layer as thin as 90 nm is achieved with a Buried Oxide of 50 nm. These results open the way to very large scale production of III-V-o-I advanced substrates for future CMOS technology nodes.

  3. Silicon carbide: A unique platform for metal-oxide-semiconductor physics

    Energy Technology Data Exchange (ETDEWEB)

    Liu, Gang [Institute for Advanced Materials, Devices and Nanotechnology, Rutgers University, Piscataway, New Jersey 08854 (United States); Tuttle, Blair R. [Department of Physics and Astronomy, Vanderbilt University, Nashville, Tennessee 37235 (United States); Dhar, Sarit [Department of Physics, Auburn University, Auburn, Alabama 36849 (United States)

    2015-06-15

    A sustainable energy future requires power electronics that can enable significantly higher efficiencies in the generation, distribution, and usage of electrical energy. Silicon carbide (4H-SiC) is one of the most technologically advanced wide bandgap semiconductor that can outperform conventional silicon in terms of power handling, maximum operating temperature, and power conversion efficiency in power modules. While SiC Schottky diode is a mature technology, SiC power Metal Oxide Semiconductor Field Effect Transistors are relatively novel and there is large room for performance improvement. Specifically, major initiatives are under way to improve the inversion channel mobility and gate oxide stability in order to further reduce the on-resistance and enhance the gate reliability. Both problems relate to the defects near the SiO{sub 2}/SiC interface, which have been the focus of intensive studies for more than a decade. Here we review research on the SiC MOS physics and technology, including its brief history, the state-of-art, and the latest progress in this field. We focus on the two main scientific problems, namely, low channel mobility and bias temperature instability. The possible mechanisms behind these issues are discussed at the device physics level as well as the atomic scale, with the support of published physical analysis and theoretical studies results. Some of the most exciting recent progress in interface engineering for improving the channel mobility and fundamental understanding of channel transport is reviewed.

  4. Increasing the efficiency of silicon heterojunction solar cells and modules by light soaking

    KAUST Repository

    Kobayashi, Eiji; De Wolf, Stefaan; Levrat, Jacques; Descoeudres, Antoine; Despeisse, Matthieu; Haug, Franz-Josef; Ballif, Christophe

    2017-01-01

    Silicon heterojunction solar cells use crystalline silicon (c-Si) wafers as optical absorbers and employ bilayers of doped/intrinsic hydrogenated amorphous silicon (a-Si:H) to form passivating contacts. Recently, we demonstrated that such solar

  5. Metal/silicon Interfaces and Their Oxidation Behavior - Photoemission Spectroscopy Analysis.

    Science.gov (United States)

    Yeh, Jyh-Jye

    Synchrotron radiation photoemission spectroscopy was used to study Ni/Si and Au/Si interface properties on the atomic scale at room temperature, after high temperature annealing and after oxygen exposures. Room temperature studies of metal/Si interfaces provide background for an understanding of the interface structure after elevated temperature annealing. Oxidation studies of Si surfaces covered with metal overlayers yield insight about the effect of metal atoms in the Si oxidation mechanisms and are useful in the identification of subtle differences in bonding relations between atoms at the metal/Si interfaces. Core level and valence band spectra with variable surface sensitivities were used to study the interactions between metal, Si, and oxygen for metal coverages and oxide thickness in the monolayer region. Interface morphology at the initial stage of metal/Si interface formation and after oxidation was modeled on the basis of the evolutions of metal and Si signals at different probing depths in the photoemission experiment. Both Ni/Si and Au/Si interfaces formed at room temperature have a diffusive region at the interface. This is composed of a layer of metal-Si alloy, formed by Si outdiffusion into the metal overlayer, above a layer of interstitial metal atoms in the Si substrate. Different atomic structures of these two regions at Ni/Si interface can account for the two different growth orientations of epitaxial Ni disilicides on the Si(111) surface after thermal annealing. Annealing the Au/Si interface at high temperature depletes all the Au atoms except for one monolayer of Au on the Si(111) surface. These phenomena are attributed to differences in the metal-Si chemical bonding relations associated with specific atomic structures. After oxygen exposures, both the Ni disilicide surface and Au covered Si surfaces (with different coverages and surface orderings) show silicon in higher oxidation states, in comparison to oxidized silicon on a clean surface

  6. Characterization of 10 μm thick porous silicon dioxide obtained by complex oxidation process for RF application

    International Nuclear Information System (INIS)

    Park, Jeong-Yong; Lee, Jong-Hyun

    2003-01-01

    This paper proposes a 10 μm thick oxide layer structure, which can be used as a substrate for RF circuits. The structure has been fabricated by anodic reaction and complex oxidation, which is a combined process of low temperature thermal oxidation (500 deg. C, for 1 h at H 2 O/O 2 ) and a rapid thermal oxidation (RTO) process (1050 deg. C, for 1 min). The electrical characteristics of oxidized porous silicon layer (OPSL) were almost the same as those of standard thermal silicon dioxide. The leakage current through the OPSL of 10 μm was about 100-500 pA in the range of 0-50 V. The average value of breakdown field was about 3.9 MV cm -1 . From the X-ray photo-electron spectroscopy (XPS) analysis, surface and internal oxide films of OPSL, prepared by complex process were confirmed to be completely oxidized and also the role of RTO process was important for the densification of porous silicon layer (PSL) oxidized at a lower temperature. For the RF-test of Si substrate with thick silicon dioxide layer, we have fabricated high performance passive devices such as coplanar waveguide (CPW) on OPSL substrate. The insertion loss of CPW on OPSL prepared by complex oxidation process was -0.39 dB at 4 GHz and similar to that of CPW on OPSL prepared by a temperature of 1050 deg. C (1 h at H 2 O/O 2 ). Also the return loss of CPW on OPSL prepared by complex oxidation process was -23 dB at 10 GHz, which is similar to that of CPW on OPSL prepared by high temperature

  7. Hydrogen incorporation and radiation induced dynamics in metal-oxide-silicon structures. A study using nuclear reaction analysis

    International Nuclear Information System (INIS)

    Briere, M.A.

    1993-07-01

    Resonant nuclear reaction analysis, using the 1 H( 15 N, αγ) 12 C reaction at 6.4 MeV, has been successfully applied to the investigation of hydrogen incorporation and radiation induced migration in metal-oxide-silicon structures. A preliminary study of the influence of processing parameters on the H content of thermal oxides, with and without gate material present, has been performed. It is found that the dominant source of hydrogen in Al gate devices and dry oxides is often contamination, likely in the form of adsorbed water vapor, formed upon exposure to room air after removal from the oxidation furnace. Concentrations of hydrogen in the bulk oxide as high as 3 10 20 cm -3 (Al gate), and as low as 1 10 18 cm -3 (poly Si-gate) have been observed. Hydrogen accumulation at the Si-SiO 2 interface has been reproducibly demonstrated for as-oxidized samples, as well as for oxides exposed to H 2 containing atmospheres during subsequent thermal processing. The migration of hydrogen, from the bulk oxide to the silicon-oxide interface during NRA, has been observed and intensively investigated. A direct correlation between the hydrogen content of the bulk oxide and the radiation generated oxide charges and interface states is presented. These data provide strong support for the important role of hydrogen in determining the radiation sensitivity of electronic devices. (orig.)

  8. Induced nano-scale self-formed metal-oxide interlayer in amorphous silicon tin oxide thin film transistors.

    Science.gov (United States)

    Liu, Xianzhe; Xu, Hua; Ning, Honglong; Lu, Kuankuan; Zhang, Hongke; Zhang, Xiaochen; Yao, Rihui; Fang, Zhiqiang; Lu, Xubing; Peng, Junbiao

    2018-03-07

    Amorphous Silicon-Tin-Oxide thin film transistors (a-STO TFTs) with Mo source/drain electrodes were fabricated. The introduction of a ~8 nm MoO x interlayer between Mo electrodes and a-STO improved the electron injection in a-STO TFT. Mo adjacent to the a-STO semiconductor mainly gets oxygen atoms from the oxygen-rich surface of a-STO film to form MoO x interlayer. The self-formed MoO x interlayer acting as an efficient interface modification layer could conduce to the stepwise internal transport barrier formation while blocking Mo atoms diffuse into a-STO layer, which would contribute to the formation of ohmic contact between Mo and a-STO film. It can effectively improve device performance, reduce cost and save energy for the realization of large-area display with high resolution in future.

  9. Novel Size and Surface Oxide Effects in Silicon Nanowires as Lithium Battery Anodes

    KAUST Repository

    McDowell, Matthew T.

    2011-09-14

    With its high specific capacity, silicon is a promising anode material for high-energy lithium-ion batteries, but volume expansion and fracture during lithium reaction have prevented implementation. Si nanostructures have shown resistance to fracture during cycling, but the critical effects of nanostructure size and native surface oxide on volume expansion and cycling performance are not understood. Here, we use an ex situ transmission electron microscopy technique to observe the same Si nanowires before and after lithiation and have discovered the impacts of size and surface oxide on volume expansion. For nanowires with native SiO2, the surface oxide can suppress the volume expansion during lithiation for nanowires with diameters <∼50 nm. Finite element modeling shows that the oxide layer can induce compressive hydrostatic stress that could act to limit the extent of lithiation. The understanding developed herein of how volume expansion and extent of lithiation can depend on nanomaterial structure is important for the improvement of Si-based anodes. © 2011 American Chemical Society.

  10. Design and Fabrication of Silicon-on-Silicon-Carbide Substrates and Power Devices for Space Applications

    Directory of Open Access Journals (Sweden)

    Gammon P.M.

    2017-01-01

    Full Text Available A new generation of power electronic semiconductor devices are being developed for the benefit of space and terrestrial harsh-environment applications. 200-600 V lateral transistors and diodes are being fabricated in a thin layer of silicon (Si wafer bonded to silicon carbide (SiC. This novel silicon-on-silicon-carbide (Si/SiC substrate solution promises to combine the benefits of silicon-on-insulator (SOI technology (i.e device confinement, radiation tolerance, high and low temperature performance with that of SiC (i.e. high thermal conductivity, radiation hardness, high temperature performance. Details of a process are given that produces thin films of silicon 1, 2 and 5 μm thick on semi-insulating 4H-SiC. Simulations of the hybrid Si/SiC substrate show that the high thermal conductivity of the SiC offers a junction-to-case temperature ca. 4× less that an equivalent SOI device; reducing the effects of self-heating, and allowing much greater power density. Extensive electrical simulations are used to optimise a 600 V laterally diffused metal-oxide-semiconductor field-effect transistor (LDMOSFET implemented entirely within the silicon thin film, and highlight the differences between Si/SiC and SOI solutions.

  11. Iron oxide shell coating on nano silicon prepared from the sand for lithium-ion battery application

    Science.gov (United States)

    Furquan, Mohammad; Vijayalakshmi, S.; Mitra, Sagar

    2018-05-01

    Elemental silicon, due to its high specific capacity (4200 mAh g-1) and non-toxicity is expected to be an attractive anode material for Li-ion battery. But its huge expansion volume (> 300 %) during charging of battery, leads to pulverization and cracking in the silicon particles and causes sudden failure of the Li-ion battery. In this work, we have designed yolk-shell type morphology of silicon, prepared from carbon coated silicon nanoparticles soaked in aqueous solution of ferric nitrate and potassium hydroxide. The soaked silicon particles were dried and finally calcined at 800 °C for 30 minutes. The product obtained is deprived of carbon and has a kind of yolk-shell morphology of nano silicon with iron oxide coating (Si@Iron oxide). This material has been tested for half-cell lithium-ion battery configuration. The discharge capacity is found to be ≈ 600 mAh g-1 at a current rate of 1.0 A g-1 for 200 cycles. It has shown a stable performance as anode for Li-ion battery application.

  12. Addressable Inverter Matrix Tests Integrated-Circuit Wafer

    Science.gov (United States)

    Buehler, Martin G.

    1988-01-01

    Addressing elements indirectly through shift register reduces number of test probes. With aid of new technique, complex test structure on silicon wafer tested with relatively small number of test probes. Conserves silicon area by reduction of area devoted to pads. Allows thorough evaluation of test structure characteristics and of manufacturing process parameters. Test structure consists of shift register and matrix of inverter/transmission-gate cells connected to two-by-ten array of probe pads. Entire pattern contained in square area having only 1.6-millimeter sides. Shift register is conventional static CMOS device using inverters and transmission gates in master/slave D flip-flop configuration.

  13. High performance multilayered nano-crystalline silicon/silicon-oxide light-emitting diodes on glass substrates

    Energy Technology Data Exchange (ETDEWEB)

    Darbari, S; Shahmohammadi, M; Mortazavi, M; Mohajerzadeh, S [Thin Film and Nano-Electronic Laboratory, School of ECE, University of Tehran, Tehran (Iran, Islamic Republic of); Abdi, Y [Nano-Physics Research Laboratory, Department of Physics, University of Tehran, Tehran (Iran, Islamic Republic of); Robertson, M; Morrison, T, E-mail: mohajer@ut.ac.ir [Department of Physics, Acadia University, Wolfville, NS (Canada)

    2011-09-16

    A low-temperature hydrogenation-assisted sequential deposition and crystallization technique is reported for the preparation of nano-scale silicon quantum dots suitable for light-emitting applications. Radio-frequency plasma-enhanced deposition was used to realize multiple layers of nano-crystalline silicon while reactive ion etching was employed to create nano-scale features. The physical characteristics of the films prepared using different plasma conditions were investigated using scanning electron microscopy, transmission electron microscopy, room temperature photoluminescence and infrared spectroscopy. The formation of multilayered structures improved the photon-emission properties as observed by photoluminescence and a thin layer of silicon oxy-nitride was then used for electrical isolation between adjacent silicon layers. The preparation of light-emitting diodes directly on glass substrates has been demonstrated and the electroluminescence spectrum has been measured.

  14. Electron-spin-resonance study of radiation-induced paramagnetic defects in oxides grown on (100) silicon substrates

    International Nuclear Information System (INIS)

    Kim, Y.Y.; Lenahan, P.M.

    1988-01-01

    We have used electron-spin resonance to investigate radiation-induced point defects in Si/SiO 2 structures with (100) silicon substrates. We find that the radiation-induced point defects are quite similar to defects generated in Si/SiO 2 structures grown on (111) silicon substrates. In both cases, an oxygen-deficient silicon center, the E' defect, appears to be responsible for trapped positive charge. In both cases trivalent silicon (P/sub b/ centers) defects are primarily responsible for radiation-induced interface states. In earlier electron-spin-resonance studies of unirradiated (100) substrate capacitors two types of P/sub b/ centers were observed; in oxides prepared in three different ways only one of these centers, the P/sub b/ 0 defect, is generated in large numbers by ionizing radiation

  15. Silicon hybrid integration

    International Nuclear Information System (INIS)

    Li Xianyao; Yuan Taonu; Shao Shiqian; Shi Zujun; Wang Yi; Yu Yude; Yu Jinzhong

    2011-01-01

    Recently,much attention has concentrated on silicon based photonic integrated circuits (PICs), which provide a cost-effective solution for high speed, wide bandwidth optical interconnection and optical communication.To integrate III-V compounds and germanium semiconductors on silicon substrates,at present there are two kinds of manufacturing methods, i.e., heteroepitaxy and bonding. Low-temperature wafer bonding which can overcome the high growth temperature, lattice mismatch,and incompatibility of thermal expansion coefficients during heteroepitaxy, has offered the possibility for large-scale heterogeneous integration. In this paper, several commonly used bonding methods are reviewed, and the future trends of low temperature wafer bonding envisaged. (authors)

  16. On the Origin of Light Emission in Silicon Rich Oxide Obtained by Low-Pressure Chemical Vapor Deposition

    Directory of Open Access Journals (Sweden)

    M. Aceves-Mijares

    2012-01-01

    Full Text Available Silicon Rich Oxide (SRO has been considered as a material to overcome the drawbacks of silicon to achieve optical functions. Various techniques can be used to produce it, including Low-Pressure Chemical Vapor Deposition (LPCVD. In this paper, a brief description of the studies carried out and discussions of the results obtained on electro-, cathode-, and photoluminescence properties of SRO prepared by LPCVD and annealed at 1,100°C are presented. The experimental results lead us to accept that SRO emission properties are due to oxidation state nanoagglomerates rather than to nanocrystals. The emission mechanism is similar to Donor-Acceptor decay in semiconductors, and a wide emission spectrum, from 450 to 850 nm, has been observed. The results show that emission is a function of both silicon excess in the film and excitation energy. As a result different color emissions can be obtained by selecting the suitable excitation energy.

  17. Silicon oxynitride films deposited by reactive high power impulse magnetron sputtering using nitrous oxide as a single-source precursor

    Energy Technology Data Exchange (ETDEWEB)

    Hänninen, Tuomas, E-mail: tuoha@ifm.liu.se; Schmidt, Susann; Jensen, Jens; Hultman, Lars; Högberg, Hans [Thin Film Physics Division, Department of Physics, Chemistry, and Biology (IFM), Linköping University, Linköping SE-581 83 (Sweden)

    2015-09-15

    Silicon oxynitride thin films were synthesized by reactive high power impulse magnetron sputtering of silicon in argon/nitrous oxide plasmas. Nitrous oxide was employed as a single-source precursor supplying oxygen and nitrogen for the film growth. The films were characterized by elastic recoil detection analysis, x-ray photoelectron spectroscopy, x-ray diffraction, x-ray reflectivity, scanning electron microscopy, and spectroscopic ellipsometry. Results show that the films are silicon rich, amorphous, and exhibit a random chemical bonding structure. The optical properties with the refractive index and the extinction coefficient correlate with the film elemental composition, showing decreasing values with increasing film oxygen and nitrogen content. The total percentage of oxygen and nitrogen in the films is controlled by adjusting the gas flow ratio in the deposition processes. Furthermore, it is shown that the film oxygen-to-nitrogen ratio can be tailored by the high power impulse magnetron sputtering-specific parameters pulse frequency and energy per pulse.

  18. Integrated optical MEMS using through-wafer vias and bump-bonding.

    Energy Technology Data Exchange (ETDEWEB)

    McCormick, Frederick Bossert; Frederick, Scott K.

    2008-01-01

    This LDRD began as a three year program to integrate through-wafer vias, micro-mirrors and control electronics with high-voltage capability to yield a 64 by 64 array of individually controllable micro-mirrors on 125 or 250 micron pitch with piston, tip and tilt movement. The effort was a mix of R&D and application. Care was taken to create SUMMiT{trademark} (Sandia's ultraplanar, multilevel MEMS technology) compatible via and mirror processes, and the ultimate goal was to mate this MEMS fabrication product to a complementary metal-oxide semiconductor (CMOS) electronics substrate. Significant progress was made on the via and mirror fabrication and design, the attach process development as well as the electronics high voltage (30 volt) and control designs. After approximately 22 months, the program was ready to proceed with fabrication and integration of the electronics, final mirror array, and through wafer vias to create a high resolution OMEMS array with individual mirror electronic control. At this point, however, mission alignment and budget constraints reduced the last year program funding and redirected the program to help support the through-silicon via work in the Hyper-Temporal Sensors (HTS) Grand Challenge (GC) LDRD. Several months of investigation and discussion with the HTS team resulted in a revised plan for the remaining 10 months of the program. We planned to build a capability in finer-pitched via fabrication on thinned substrates along with metallization schemes and bonding techniques for very large arrays of high density interconnects (up to 2000 x 2000 vias). Through this program, Sandia was able to build capability in several different conductive through wafer via processes using internal and external resources, MEMS mirror design and fabrication, various bonding techniques for arrayed substrates, and arrayed electronics control design with high voltage capability.

  19. Effect of the temperature and dew point of the decarburization process on the oxide subscale of a 3% silicon steel

    Energy Technology Data Exchange (ETDEWEB)

    Cesar, Maria das Gracas M.M. E-mail: gracamelo@acesita.com.br; Mantel, Marc J

    2003-01-01

    The oxide subscale formed on the decarburization annealing of 3% Si-Fe was investigated using microscopy and spectroscopy techniques. It was found that the morphology as well as the molecular structure of the subscale are affected by temperature and dew point. The results suggest that there is an optimum level of internal oxidation and an optimum fayalite/silica ratio in the subscale to achieve a oriented grain silicon steel having a continuous and smooth ceramic film and low core loss.

  20. Characterization of Interface State in Silicon Carbide Metal Oxide Semiconductor Capacitors

    Science.gov (United States)

    Kao, Wei-Chieh

    Silicon carbide (SiC) has always been considered as an excellent material for high temperature and high power devices. Since SiC is the only compound semiconductor whose native oxide is silicon dioxide (SiO2), it puts SiC in a unique position. Although SiC metal oxide semiconductor (MOS) technology has made significant progress in recent years, there are still a number of issues to be overcome before more commercial SiC devices can enter the market. The prevailing issues surrounding SiC MOSFET devices are the low channel mobility, the low quality of the oxide layer and the high interface state density at the SiC/SiO2 interface. Consequently, there is a need for research to be performed in order to have a better understanding of the factors causing the poor SiC/SiO2 interface properties. In this work, we investigated the generation lifetime in SiC materials by using the pulsed metal oxide semiconductor (MOS) capacitor method and measured the interface state density distribution at the SiC/SiO2 interface by using the conductance measurement and the high-low frequency capacitance technique. These measurement techniques have been performed on n-type and p-type SiC MOS capacitors. In the course of our investigation, we observed fast interface states at semiconductor-dielectric interfaces in SiC MOS capacitors that underwent three different interface passivation processes, such states were detected in the nitrided samples but not observed in PSG-passivated samples. This result indicate that the lack of fast states at PSG-passivated interface is one of the main reasons for higher channel mobility in PSG MOSFETs. In addition, the effect of mobile ions in the oxide on the response time of interface states has been investigated. In the last chapter we propose additional methods of investigation that can help elucidate the origin of the particular interface states, enabling a more complete understanding of the SiC/SiO2 material system.