WorldWideScience

Sample records for on-chip cooling capability

  1. VLSI Design of SVM-Based Seizure Detection System With On-Chip Learning Capability.

    Science.gov (United States)

    Feng, Lichen; Li, Zunchao; Wang, Yuanfa

    2018-02-01

    Portable automatic seizure detection system is very convenient for epilepsy patients to carry. In order to make the system on-chip trainable with high efficiency and attain high detection accuracy, this paper presents a very large scale integration (VLSI) design based on the nonlinear support vector machine (SVM). The proposed design mainly consists of a feature extraction (FE) module and an SVM module. The FE module performs the three-level Daubechies discrete wavelet transform to fit the physiological bands of the electroencephalogram (EEG) signal and extracts the time-frequency domain features reflecting the nonstationary signal properties. The SVM module integrates the modified sequential minimal optimization algorithm with the table-driven-based Gaussian kernel to enable efficient on-chip learning. The presented design is verified on an Altera Cyclone II field-programmable gate array and tested using the two publicly available EEG datasets. Experiment results show that the designed VLSI system improves the detection accuracy and training efficiency.

  2. Heat management in integrated circuits on-chip and system-level monitoring and cooling

    CERN Document Server

    Ogrenci-Memik, Seda

    2016-01-01

    This essential overview covers the subject of thermal monitoring and management in integrated circuits. Specifically, it focuses on devices and materials that are intimately integrated on-chip (as opposed to in-package or on-board) for the purposes of thermal monitoring and thermal management.

  3. An Ultra-Low Power CMOS Image Sensor with On-Chip Energy Harvesting and Power Management Capability

    Directory of Open Access Journals (Sweden)

    Ismail Cevik

    2015-03-01

    Full Text Available An ultra-low power CMOS image sensor with on-chip energy harvesting and power management capability is introduced in this paper. The photodiode pixel array can not only capture images but also harvest solar energy. As such, the CMOS image sensor chip is able to switch between imaging and harvesting modes towards self-power operation. Moreover, an on-chip maximum power point tracking (MPPT-based power management system (PMS is designed for the dual-mode image sensor to further improve the energy efficiency. A new isolated P-well energy harvesting and imaging (EHI pixel with very high fill factor is introduced. Several ultra-low power design techniques such as reset and select boosting techniques have been utilized to maintain a wide pixel dynamic range. The chip was designed and fabricated in a 1.8 V, 1P6M 0.18 µm CMOS process. Total power consumption of the imager is 6.53 µW for a 96 × 96 pixel array with 1 V supply and 5 fps frame rate. Up to 30 μW of power could be generated by the new EHI pixels. The PMS is capable of providing 3× the power required during imaging mode with 50% efficiency allowing energy autonomous operation with a 72.5% duty cycle.

  4. An ultra-low power CMOS image sensor with on-chip energy harvesting and power management capability.

    Science.gov (United States)

    Cevik, Ismail; Huang, Xiwei; Yu, Hao; Yan, Mei; Ay, Suat U

    2015-03-06

    An ultra-low power CMOS image sensor with on-chip energy harvesting and power management capability is introduced in this paper. The photodiode pixel array can not only capture images but also harvest solar energy. As such, the CMOS image sensor chip is able to switch between imaging and harvesting modes towards self-power operation. Moreover, an on-chip maximum power point tracking (MPPT)-based power management system (PMS) is designed for the dual-mode image sensor to further improve the energy efficiency. A new isolated P-well energy harvesting and imaging (EHI) pixel with very high fill factor is introduced. Several ultra-low power design techniques such as reset and select boosting techniques have been utilized to maintain a wide pixel dynamic range. The chip was designed and fabricated in a 1.8 V, 1P6M 0.18 µm CMOS process. Total power consumption of the imager is 6.53 µW for a 96 × 96 pixel array with 1 V supply and 5 fps frame rate. Up to 30 μW of power could be generated by the new EHI pixels. The PMS is capable of providing 3× the power required during imaging mode with 50% efficiency allowing energy autonomous operation with a 72.5% duty cycle.

  5. Component Cooling Heat Exchanger Heat Transfer Capability Operability Monitoring

    International Nuclear Information System (INIS)

    Mihalina, M.; Djetelic, N.

    2010-01-01

    The ultimate heat sink (UHS) is of highest importance for nuclear power plant safe and reliable operation. The most important component in line from safety-related heat sources to the ultimate heat sink water body is a component cooling heat exchanger (CC Heat Exchanger). The Component Cooling Heat Exchanger has a safety-related function to transfer the heat from the Component Cooling (CC) water system to the Service Water (SW) system. SW systems throughout the world have been the root of many plant problems because the water source, usually river, lake, sea or cooling pond, are conductive to corrosion, erosion, biofouling, debris intrusion, silt, sediment deposits, etc. At Krsko NPP, these problems usually cumulate in the summer period from July to August, with higher Sava River (service water system) temperatures. Therefore it was necessary to continuously evaluate the CC Heat Exchanger operation and confirm that the system would perform its intended function in accordance with the plant's design basis, given as a minimum heat transfer rate in the heat exchanger design specification sheet. The Essential Service Water system at Krsko NPP is an open cycle cooling system which transfers heat from safety and non-safety-related systems and components to the ultimate heat sink the Sava River. The system is continuously in operation in all modes of plant operation, including plant shutdown and refueling. However, due to the Sava River impurities and our limited abilities of the water treatment, the system is subject to fouling, sedimentation buildup, corrosion and scale formation, which could negatively impact its performance being unable to satisfy its safety related post accident heat removal function. Low temperature difference and high fluid flows make it difficult to evaluate the CC Heat Exchanger due to its specific design. The important effects noted are measurement uncertainties, nonspecific construction, high heat transfer capacity, and operational specifics (e

  6. Determination of the replacement cooling tower capability at the ETRR-2 research reactor

    International Nuclear Information System (INIS)

    El-Din El-Morshdy, S.

    2004-01-01

    The ETRR-2 replacement cooling tower capability has been evaluated by the thermal acceptance test performed in June 2003. All instruments used were calibrated prior to the test. The measured data are collected at regular intervals in accordance with the acceptance test code for water cooling towers of the cooling tower institute recommendations. Both the characteristic curve and the performance curve methods were used to evaluate the tower capability. The test results yield a tower capability of about 105% and so the tower is thermally accepted. (orig.)

  7. A study of the external cooling capability for the prevention of reactor vessel failure

    Energy Technology Data Exchange (ETDEWEB)

    Chang, S H; Baek, W P; Moon, S K; Yang, S H; Kim, S H [Korea Advanced Institute of Science Technology, Daejeon (Korea, Republic of)

    1994-07-15

    This study (a 3-year program) aims to perform a comprehensive assessment of the feasibility of external vessel flooding with respect to advanced pressurized water reactor plants to be built in Korea. During the first year, review of the relevant phenomena and preliminary assessment of the concept have been performed. Also performed is a review of heat transfer correlations for the computer program that will be developed for assessment of the cooling capability of external vessel flooding. Important phenomena that determine the cooling capability of external vessel flooding are (a) the initial transient before formation of molten corium pool, (b) natural convection of in-vessel molten corium pool, (c) radiative heat exchange between the molten corium pool and the upper vessel structures, (d) thermal hydraulics outside the vessel, (e) structural integrity consideration, and (f) long-term phenomena. The adoption of the concept should be decided by considering several factors such as (a) vessel submergence procedure, (b) cooling requirements, (c) vessel design features, (d) steam production, (e) instrumentation needs, and (f) an overall accident management strategy. The external vessel cooling concept looks to be promising. However, further study is required for a reliable decision making. Several correlations are available for the prediction of cooling capability of the present concept. However, it is difficult to define a sufficiently reliable set of correlations; sensitivity studies would be required in assessing the cooling capability with the computer program.

  8. Heat removal capability of core-catcher with inclined cooling channels

    International Nuclear Information System (INIS)

    Suzuki, Y.; Tahara, M.; Kurita, T.; Hamazaki, R.; Morooka, S.

    2009-01-01

    A core-catcher is one of the mitigation systems that provide functions of molten corium cooling and stabilization during a severe accident. Toshiba has been developing a compact core-catcher to be placed at the lower drywell floor in the containment vessel for the next generation BWR as well as near term ABWR. This paper presents the evaluation of heat removal capability of the core-catcher with inclined cooling channels, our verification status and plan. The heat removal capability of the core-catcher is analyzed by using the newly developed two-phase flow analysis code which incorporates drift flux parameters for inclined channels and the CHF correlation obtained from SULTAN tests. Effects of geometrical parameters such as the inclination and the gap size of the cooling channel on the heat removal capability are also evaluated. These results show that the core-catcher has sufficient capability to cool the molten corium during a severe accident. Based on the analysis, it has been shown that the core-catcher has an efficient capability of heat removal to cool the molten corium. (author)

  9. Validation of Heat Transfer and Film Cooling Capabilities of the 3-D RANS Code TURBO

    Science.gov (United States)

    Shyam, Vikram; Ameri, Ali; Chen, Jen-Ping

    2010-01-01

    The capabilities of the 3-D unsteady RANS code TURBO have been extended to include heat transfer and film cooling applications. The results of simulations performed with the modified code are compared to experiment and to theory, where applicable. Wilcox s k-turbulence model has been implemented to close the RANS equations. Two simulations are conducted: (1) flow over a flat plate and (2) flow over an adiabatic flat plate cooled by one hole inclined at 35 to the free stream. For (1) agreement with theory is found to be excellent for heat transfer, represented by local Nusselt number, and quite good for momentum, as represented by the local skin friction coefficient. This report compares the local skin friction coefficients and Nusselt numbers on a flat plate obtained using Wilcox's k-model with the theory of Blasius. The study looks at laminar and turbulent flows over an adiabatic flat plate and over an isothermal flat plate for two different wall temperatures. It is shown that TURBO is able to accurately predict heat transfer on a flat plate. For (2) TURBO shows good qualitative agreement with film cooling experiments performed on a flat plate with one cooling hole. Quantitatively, film effectiveness is under predicted downstream of the hole.

  10. Feasibility study of self sustaining capability on water cooled thorium reactors for different power reactors

    International Nuclear Information System (INIS)

    Permana, S.; Takaki, N.; Sekimoto, H.

    2007-01-01

    Thorium fuel cycle can maintain the sustainable system of the reactor for self sustaining system for future sustainable development in the world. Some characteristics of thorium cycle show some advantages in relation to higher breeding capability, higher performance of burn-up and more proliferation resistant. Several investigations was performed to improve the breeding capability which is essential for maintaining the fissile sustainability during reactor operation in thermal reactor such as Shippingport reactor and molten salt breeder reactor (MSBR) project. The preliminary study of breeding capability on water cooled thorium reactor has been investigated for various power output. The iterative calculation system is employed by coupling the equilibrium fuel cycle burn-up calculation and cell calculation of PIJ module of SRAC2000. In this calculation, 1238 fission products and 129 heavy nuclides are employed. In the cell calculation, 26 heavy metals and 66 fission products and 1 pseudo FP are employed. The employed nuclear data library was JENDL 3.2. The reactor is fueled by 2 33U-Th Oxide and it has used the light water coolant as moderator. Some characteristics such as conversion ratio and void reactivity coefficient performances are evaluated for the systems. The moderator to fuel ratio (MFR) values and average burnups are studied for survey parameter. The parametric survey for different power outputs are employed from 10 MWt to 3000 MWt for evaluating the some characteristics of core size and leakage effects to the spectra profile, required enrichment, breeding capability, fissile inventory condition, and void reactivity coefficient. Different power outputs are employed in order to evaluate its effect to the required enrichment for criticality, breeding capability, void reactivity and fissile inventory accumulation. The obtained value of the conversion ratios is evaluated by using the equilibrium atom composition. The conversion ratio is employed based on the

  11. Study on decay heat removal capability of reactor vessel auxiliary cooling system

    International Nuclear Information System (INIS)

    Nishi, Y.; Kinoshita, I.

    1991-01-01

    The reactor vessel auxiliary cooling system (RVACS) is a simple, Passive decay heat removal system for an LMFBR. However, the heat removal capacity of this system is small compared to that of an immersed type of decay heat exchanger. In this study, a high-porosity porous body is proposed to enhance the RVACS's heat transfer performance to improve its applicability. The objectives of this study are to propose a new method which is able to use thermal radiation effectively, to confirm its heat removal capability and to estimate its applicability limit of RVACS for an LMFBR. Heat transfer tests were conducted in an experimental facility with a 3.5 m heat transfer height to evaluate the heat transfer performance of the high-porosity porous body. Using the experimental results, plant transient analyses were performed for a 300 MWe pool type LMFBR under a Total Black Out (TBO) condition to confirm the heat removal capability. Furthermore, the relationship between heat removal capability and thermal output of a reactor were evaluated using a simple parameter model

  12. A study of the external cooling capability for the prevention of reactor vessel failure

    Energy Technology Data Exchange (ETDEWEB)

    Chang, S H; Baek, W P; Moon, S K; Yang, S H; Kim, S H [Korea Advanced Institute of Science and Technology, Taejon (Korea, Republic of)

    1995-07-15

    This study (a 3-year program) aims to perform a comprehensive assessment of the feasibility of external vessel flooding with respect to advanced pressurized water reactor plants to be built in Korea. During the second year, appropriate correlations have been chosen to describe the phenomena resulted from the external flooding on the basis of review works. Also performed is to develop the computer program using the chosen correlations and to accomplish the thermal analysis for assessment of the cooling capability of external flooding. Accomplished works for second year are as follows. Review of analytical and experimental works related to the external flooding are performed, appropriate correlations are chosen to describe the phenomena resulted from the external flooding on the basis of first and second year review works. A computer program is also developed to predict the temperature distribution of reactor vessel lower head. Thermal analyses are performed to judge the feasibility of external flooding using developed computer program.

  13. Preliminary Analysis on Decay Heat Removal Capability of Helium Cooled Solid Breeder Test Blanket Module

    International Nuclear Information System (INIS)

    Ahn, Mu Young; Cho, Seung Yon; Kim, Duck Hoi; Lee, Eun Seok; Kim, Hyung Seok; Suh, Jae Seung; Yun, Sung Hwan; Cho, Nam Zin

    2007-01-01

    One of the main ITER goals is to test and validate design concepts of tritium breeding blankets relevant to DEMO or fusion power plants. Korea Helium-Cooled Solid Breeder (HCSB) Test Blanket Module (TBM) has been developed with overall objectives of achieving this goal. The TBM employs high pressure helium to cool down the First Wall (FW), Side Wall (SW) and Breeding Zone (BZ). Therefore, safety consideration is a part of the design process. Each ITER Party performing the TBM program is requested to reach a similar level of confidence in the TBM safety analysis. To meet ITER's request, Failure Mode and Effects Analysis (FMEA) studies have been performed on the TBM to identify the Postulated Initial Event (PIE). Although FMEA on the KO TBM has not been completed, in-vessel, in-box and ex-vessel Loss Of Coolant Accident (LOCA) are considered as enveloping cases of PIE in general. In this paper, accidental analyses for the three selected LOCA were performed to investigate the decay heat removal capability of the TBM. To simulate transient thermo-hydraulic behavior of the TBM for the selected scenarios, RELAP5/MOD3.2 code was used

  14. The heat removal capability of actively cooled plasma-facing components for the ITER divertor

    Science.gov (United States)

    Missirlian, M.; Richou, M.; Riccardi, B.; Gavila, P.; Loarer, T.; Constans, S.

    2011-12-01

    Non-destructive examination followed by high-heat-flux testing was performed for different small- and medium-scale mock-ups; this included the most recent developments related to actively cooled tungsten (W) or carbon fibre composite (CFC) armoured plasma-facing components. In particular, the heat-removal capability of these mock-ups manufactured by European companies with all the main features of the ITER divertor design was investigated both after manufacturing and after thermal cycling up to 20 MW m-2. Compliance with ITER requirements was explored in terms of bonding quality, heat flux performances and operational compatibility. The main results show an overall good heat-removal capability after the manufacturing process independent of the armour-to-heat sink bonding technology and promising behaviour with respect to thermal fatigue lifetime under heat flux up to 20 MW m-2 for the CFC-armoured tiles and 15 MW m-2 for the W-armoured tiles, respectively.

  15. The heat removal capability of actively cooled plasma-facing components for the ITER divertor

    International Nuclear Information System (INIS)

    Missirlian, M; Richou, M; Loarer, T; Riccardi, B; Gavila, P; Constans, S

    2011-01-01

    Non-destructive examination followed by high-heat-flux testing was performed for different small- and medium-scale mock-ups; this included the most recent developments related to actively cooled tungsten (W) or carbon fibre composite (CFC) armoured plasma-facing components. In particular, the heat-removal capability of these mock-ups manufactured by European companies with all the main features of the ITER divertor design was investigated both after manufacturing and after thermal cycling up to 20 MW m - 2. Compliance with ITER requirements was explored in terms of bonding quality, heat flux performances and operational compatibility. The main results show an overall good heat-removal capability after the manufacturing process independent of the armour-to-heat sink bonding technology and promising behaviour with respect to thermal fatigue lifetime under heat flux up to 20 MW m - 2 for the CFC-armoured tiles and 15 MW m - 2 for the W-armoured tiles, respectively.

  16. Tunable on chip optofluidic laser

    DEFF Research Database (Denmark)

    Bakal, Avraham; Vannahme, Christoph; Kristensen, Anders

    2016-01-01

    On chip tunable laser is demonstrated by realizing a microfluidic droplet array. The periodicity is controlled by the pressure applied to two separate inlets, allowing to tune the lasing frequency over a broad spectral range.......On chip tunable laser is demonstrated by realizing a microfluidic droplet array. The periodicity is controlled by the pressure applied to two separate inlets, allowing to tune the lasing frequency over a broad spectral range....

  17. Analysis of Time-Dependent Tritium Breeding Capability of Water Cooled Ceramic Breeder Blanket for CFETR

    Science.gov (United States)

    Gao, Fangfang; Zhang, Xiaokang; Pu, Yong; Zhu, Qingjun; Liu, Songlin

    2016-08-01

    Attaining tritium self-sufficiency is an important mission for the Chinese Fusion Engineering Testing Reactor (CFETR) operating on a Deuterium-Tritium (D-T) fuel cycle. It is necessary to study the tritium breeding ratio (TBR) and breeding tritium inventory variation with operation time so as to provide an accurate data for dynamic modeling and analysis of the tritium fuel cycle. A water cooled ceramic breeder (WCCB) blanket is one candidate of blanket concepts for the CFETR. Based on the detailed 3D neutronics model of CFETR with the WCCB blanket, the time-dependent TBR and tritium surplus were evaluated by a coupling calculation of the Monte Carlo N-Particle Transport Code (MCNP) and the fusion activation code FISPACT-2007. The results indicated that the TBR and tritium surplus of the WCCB blanket were a function of operation time and fusion power due to the Li consumption in breeder and material activation. In addition, by comparison with the results calculated by using the 3D neutronics model and employing the transfer factor constant from 1D to 3D, it is noted that 1D analysis leads to an over-estimation for the time-dependent tritium breeding capability when fusion power is larger than 1000 MW. supported by the National Magnetic Confinement Fusion Science Program of China (Nos. 2013GB108004, 2015GB108002, and 2014GB119000), and by National Natural Science Foundation of China (No. 11175207)

  18. Research on enhancement of natural circulation capability in lead–bismuth alloy cooled reactor by using gas-lift pump

    Energy Technology Data Exchange (ETDEWEB)

    Zuo, Juanli, E-mail: Jenyzuo@163.com; Tian, Wenxi, E-mail: wxtian@mail.xjtu.edu.cn; Chen, Ronghua, E-mail: ronghua.chen@stu.xjtu.edu.cn; Qiu, Suizheng; Su, Guanghui, E-mail: ghsu@mail.xjtu.edu.cn

    2013-10-15

    Highlights: • The gas-lift pump has been adopted to enhance the natural circulation capability. • LENAC code is developed in my study. • The calculation results by LENAC code show good agreement with experiment results. • Gas mass flow rate, bubble diameter, rising pipe length are important parameters. -- Abstract: The gas-lift pump has been adopted to enhance the natural circulation capability in the type of lead–bismuth alloy cooled reactors such as Accelerator Driven System (ADS) and Liquid–metal Fast Reactor (LMFR). The natural circulation ability and the system safety are obviously influenced by the two phase flow characteristics of liquid metal–inert gas. In this study, LENAC (LEad bismuth alloy NAtural Circulation capability) code has been developed to evaluate the natural circulation capability of lead–bismuth cooled ADS with gas-lift pump. The drift flow theory, void fraction prediction model and friction pressure drop prediction model have been incorporated into LENAC code. The calculation results by LENAC code show good agreement with experiment results of CIRCulation Experiment (CIRCE) facility. The effects of the gas mass flow rate, void fraction, gas quality, bubble diameter and the rising pipe height or the potential difference between heat exchanger and reactor core on natural circulation capability of gas-lift pump have been analyzed. The results showed that in bubbly flow pattern, for a fixed value of gas mass flow rate, the natural circulation capability increased with the decrease of the bubble diameter. In the bubbly flow, slug flow, churn flow and annular flow pattern, with the gas mass flow rate increasing, the natural circulation capability initially increased and then declined. And the flow parameters influenced the thermal hydraulic characteristics of the reactor core significantly. The present work is helpful for revealing the law of enhancing the natural circulation capability by gas-lift pump, and providing theoretical

  19. Assessment of the transmutation capability an accelerator driven system cooled by lead bismuth eutectic alloy

    International Nuclear Information System (INIS)

    Bianchi, F.; Peluso, V.; Calabrese; Chen, X.; Maschek, W.

    2007-01-01

    1. PURPOSE The reduction of long-lived fission products (LLFP) and minor actinides (MA) is a key point for the public acceptability and economy of nuclear energy. In principle, any nuclear fast reactor is able to burn and transmute MA, but the amount of MA content has to be limited a few percent, having unfavourable consequences on the coolant void reactivity, Doppler effect, and delayed neutron fraction, and therefore on the dynamic behaviour and control. Accelerator Driven Systems (ADS) are instead able to safely burn and/or transmute a large quantity of actinides and LLFP, as they do not rely on delayed neutrons for control or power change and the reactivity feedbacks have very little importance during accidents. Such systems are very innovative being based on the coupling of an accelerator with a subcritical system by means of a target system, where the neutronic source needed to maintain the neutron reaction chain is produced by spallation reactions. To this end the PDS-XADS (Preliminary Design Studies on an experimental Accelerator Driven System) project was funded by the European Community in the 5th Framework Program in order both to demonstrate the feasibility of the coupling between an accelerator and a sub-critical core loaded with standard MOX fuel and to investigate the transmutation capability in order to achieve values suitable for an Industrial Scale Transmuter. This paper summarizes and compares the results of neutronic calculations aimed at evaluating the transmutation capability of cores cooled by Lead-Bismuth Eutectic alloy and loaded with assemblies based on (Pu, Am, Cm) oxide dispersed in a molybdenum metal (CERMET) or magnesia (CERCER) matrices. It also describes the constraints considered in the design of such cores and describes the thermo-mechanical behaviour of these innovative fuels along the cycle. 2. DESCRIPTION OF THE WORK: The U-free composite fuels (CERMET and CERCER) were selected for this study, being considered at European level

  20. Debris filtering efficiency and its effect on long term cooling capability

    International Nuclear Information System (INIS)

    Jung, Min-Su; Kim, Kyu-Tae

    2013-01-01

    the containment sump into the reactor core on the long term cooling (LTC) capability after a loss of coolant accident (LOCA) was evaluated, which indicates that the debris-filter capability of the P-grid and G-grid designs may not have a detrimental effect on the LTC capability after a LOCA only if the sump mesh size is smaller than 2.54 mm in diameter

  1. Feasibility study on novel room air conditioner with natural cooling capability

    International Nuclear Information System (INIS)

    Han, Zongwei; Liu, Qiankun; Zhang, Yanqing; Zhang, Shuwei; Liu, Jiangzhen; Li, Weiliang

    2016-01-01

    Highlights: • A novel heat pipe combined evaporative cooling room air conditioner is constructed. • The mathematical model of the air conditioner is established. • The reliability of the model is verified by experiments. • The performance of the novel and conventional air conditioner is compared. • The applicability of the novel air conditioner in different areas is investigated. - Abstract: In order to improve the energy efficiency of room air conditioners, this paper proposed a new air conditioner that combined evaporative cooling technology, separate type heat pipe technology, and vapour compression refrigeration technology (called “combined air conditioner”). The mathematical model of the air conditioner was established and its reliability was verified by experiments. Based on the model, the simulation of the operating performance of the combined air conditioner and a conventional air conditioner was studied in typical climate regions during the cooling period, with the following results: In cold and dry areas like Shenyang, compared with the conventional air conditioner, the average cooling coefficient of performance (COP) of the combined air conditioner was increased by 27.40%. As the climate gradually became warmer and humidity gradually increased, the running time of the heat pipe cooling mode was gradually reduced, and then the energy-saving effect of the combined air conditioner became worse. For example, in the hot and humid Guangzhou, the energy saving rate was only 11.81%. Therefore, it was found that the combined air conditioner had good energy-saving potential in cold and dry areas.

  2. Anti-seismic air condition's cooling capability increase of the second control area

    International Nuclear Information System (INIS)

    Pan Qiang

    2008-01-01

    Secondary area (SCA) air-conditioning system is an important ventilation system in plant. It should achieve the indoor temperature controllable. To resolve the problem of cooling capacity insufficiency, on the basis of ventilation and refrigeration theory, the thesis analyzes the design modification plan. (author)

  3. Evaluation of the gravity-injection capability for core cooling after a loss-of-SDC event

    International Nuclear Information System (INIS)

    Seul, Kwang Won; Bang, Young Seok; Kim, Hho Jung

    1999-01-01

    In order to evaluate the gravity-drain capability to maintain core cooling after a loss-of-shutdown-cooling event during shutdown operation, the plant conditions of the Young Gwang Units 3 and 4 were reviewed. The six cases of possible gravity-drain paths using the water of the refueling water storage tank (RWST) were identified and the thermal hydraulic analyses were performed using RELAP5/MOD3.2 code. The core cooling capability was dependent on the gravity-drain paths and the drain rate. In the cases with the injection path and opening on the different leg side, the system was well depressurized after gravity-injection and the core boiling was successfully prevented for a long-term transient. However, in the cases with the injection path and opening on the cold leg side, the core coolant continued boiling although the system pressure remains atmospheric after gravity-injection because the cold water injected from the RWST was bypassed the core region. In the cases with the higher pressurizer opening than the RWST water level, the system was also pressurized by the water-hold in the pressurizer and the core was uncovered because the gravity-injection from the RWST stopped due to the high system pressure. In addition, from the sensitivity study on the gravity-injection flow rates, it was found that about 54 kg/s of RWST drain rate was required to maintain the core cooling. Those analysis results would provide useful information to operators coping with the event

  4. Evaluation for In-Vessel Retention Capabilities with In-Vessel Injection and External Reactor Vessel Cooling

    Energy Technology Data Exchange (ETDEWEB)

    Lee, Jeong Seong; Ryu, In Chul; Moon, Young Tae [KEPCO Engineering and Construction Co. Ltd., Deajeon (Korea, Republic of)

    2016-10-15

    If the accident has not progressed to the point of substantial changes in the core geometry, establishing adequate cooling is as straightforward as re-establishing flow through the reactor core. However, if the accident has progressed to the point where the core geometry is substantially altered as a result of material melting and relocation, as was the case in the TMI-2 accident, the means of cooling the debris are not as straightforward. From this time on, the reactor core was either completely or nearly covered by water, with high pressure injection flow initiated shortly after three hours into the accident. However, the core debris was not coolable in this configuration and a substantial quantity of molten core material drained into the bypass region, with approximately twenty metric tons of molten debris draining into the reactor pressure vessel (RPV) lower head. Hence, the core configuration developed at approximately three hours into the accident was not coolable, even submerged in water. The purpose of this paper is to evaluate in-vessel retention capabilities with in-vessel injection (IVI) and external reactor vessel cooling (ERVC) available in a reactor application by using the integrated severe accident analysis code. The MAAP5 models were improved to facilitate evaluation of the in-vessel retention capability of APR1400. In-vessel retention capabilities have been analyzed for the APR1400 using the MAAP5.03 code. The results show that in-vessel retention is feasible when in-vessel injection is initiated within a relatively short time frame under the simulation condition used in the present study.

  5. Evaluation for In-Vessel Retention Capabilities with In-Vessel Injection and External Reactor Vessel Cooling

    International Nuclear Information System (INIS)

    Lee, Jeong Seong; Ryu, In Chul; Moon, Young Tae

    2016-01-01

    If the accident has not progressed to the point of substantial changes in the core geometry, establishing adequate cooling is as straightforward as re-establishing flow through the reactor core. However, if the accident has progressed to the point where the core geometry is substantially altered as a result of material melting and relocation, as was the case in the TMI-2 accident, the means of cooling the debris are not as straightforward. From this time on, the reactor core was either completely or nearly covered by water, with high pressure injection flow initiated shortly after three hours into the accident. However, the core debris was not coolable in this configuration and a substantial quantity of molten core material drained into the bypass region, with approximately twenty metric tons of molten debris draining into the reactor pressure vessel (RPV) lower head. Hence, the core configuration developed at approximately three hours into the accident was not coolable, even submerged in water. The purpose of this paper is to evaluate in-vessel retention capabilities with in-vessel injection (IVI) and external reactor vessel cooling (ERVC) available in a reactor application by using the integrated severe accident analysis code. The MAAP5 models were improved to facilitate evaluation of the in-vessel retention capability of APR1400. In-vessel retention capabilities have been analyzed for the APR1400 using the MAAP5.03 code. The results show that in-vessel retention is feasible when in-vessel injection is initiated within a relatively short time frame under the simulation condition used in the present study

  6. Analysis of emergency core cooling capability of direct vessel vertical injection using CFX

    International Nuclear Information System (INIS)

    Yoon, Sang H.; Yu, Yong H.; Suh, Kune Y.

    2003-01-01

    More reliable and efficient safety injection system is of utmost importance in the design of advanced reactors such as the APR1400 (Advanced Power Reactor 1400 MWe). In this work, a new idea is proposed to inject the Emergency Core Cooling (ECC) water utilizing a dedicated nozzle with a vertically downward elbow. The Direct Vessel Injection (DVI) system is located horizontally above the cold leg in the APR1400. However, the horizontal injection method may not always satisfy the ECC penetration requirement into the core on account of rather involved multidimensional thermal and hydraulic phenomena occurring in the annular reactor downcomer such as bypass, impingement, entrainment and sweepout, condensation oscillation, etc. Thus, a novel concept is called for from the reactor safety point of view. The Direct Vessel Vertical Injection (DVVI) system is one of these efforts to penetrate as much the ECC water through the downcomer into the core as is practically achievable. The DVVI system can increase the momentum of the downward flow, thus minimizing the effect of water impingement on the core barrel and the direct bypass though the break. To support the claim of increased downward momentum of flow in the DVVI system, computational fluid dynamics analyses were performed using CFX. The new concept of the DVVI system, which can certainly help increase the core thermal margin, is found to be more efficient than DVI. If the structural problem in the manufacturing process is properly solved, this concept can safely be applied in the advanced nuclear reactor design

  7. Breeding capability and void reactivity analysis of heavy-water-cooled thorium reactor

    International Nuclear Information System (INIS)

    Permana, Sidik; Takaki, Naoyuki; Sekimoto, Hiroshi

    2008-01-01

    The fuel breeding and void reactivity coefficient of thorium reactors have been investigated using heavy water as coolant for several parametric surveys on moderator-to-fuel ratio (MFR) and burnup. The equilibrium fuel cycle burnup calculation has been performed, which is coupled with the cell calculation for this evaluation. The η of 233 U shows its superiority over other fissile nuclides in the surveyed MFR ranges and always stays higher than 2.1, which indicates that the reactor has a breeding condition for a wide range of MFR. A breeding condition with a burnup comparable to that of a standard PWR or higher can be achieved by adopting a larger pin gap (1-6 mm), and a pin gap of about 2 mm can be used to achieve a breeding ratio (BR) of 1.1. A feasible design region of the reactors, which fulfills the breeding condition and negative void reactivity coefficient, has been found. A heavy-water-cooled PWR-type Th- 233 U fuel reactor can be designed as a breeder reactor with negative void coefficient. (author)

  8. On-chip photonic interconnects a computer architect's perspective

    CERN Document Server

    Nitta, Christopher J; Akella, Venkatesh

    2013-01-01

    As the number of cores on a chip continues to climb, architects will need to address both bandwidth and power consumption issues related to the interconnection network. Electrical interconnects are not likely to scale well to a large number of processors for energy efficiency reasons, and the problem is compounded by the fact that there is a fixed total power budget for a die, dictated by the amount of heat that can be dissipated without special (and expensive) cooling and packaging techniques. Thus, there is a need to seek alternatives to electrical signaling for on-chip interconnection appli

  9. Photonic network-on-chip design

    CERN Document Server

    Bergman, Keren; Biberman, Aleksandr; Chan, Johnnie; Hendry, Gilbert

    2013-01-01

    This book provides a comprehensive synthesis of the theory and practice of photonic devices for networks-on-chip. It outlines the issues in designing photonic network-on-chip architectures for future many-core high performance chip multiprocessors. The discussion is built from the bottom up: starting with the design and implementation of key photonic devices and building blocks, reviewing networking and network-on-chip theory and existing research, and finishing with describing various architectures, their characteristics, and the impact they will have on a computing system. After acquainting

  10. On-chip power delivery and management

    CERN Document Server

    Vaisband, Inna P; Popovich, Mikhail; Mezhiba, Andrey V; Köse, Selçuk; Friedman, Eby G

    2016-01-01

    This book describes methods for distributing power in high speed, high complexity integrated circuits with power levels exceeding many tens of watts and power supplies below a volt. It provides a broad and cohesive treatment of power delivery and management systems and related design problems, including both circuit network models and design techniques for on-chip decoupling capacitors, providing insight and intuition into the behavior and design of on-chip power distribution systems. Organized into subareas to provide a more intuitive flow to the reader, this fourth edition adds more than a hundred pages of new content, including inductance models for interdigitated structures, design strategies for multi-layer power grids, advanced methods for efficient power grid design and analysis, and methodologies for simultaneously placing on-chip multiple power supplies and decoupling capacitors. The emphasis of this additional material is on managing the complexity of on-chip power distribution networks.

  11. 60 GHz system-on-chip (SoC) with built-in memory and an on-chip antenna

    KAUST Repository

    Ghaffar, Farhan A.; Arsalan, Muhammad; Cheema, Hammad; Salama, Khaled N.; Shamim, Atif

    2014-01-01

    A novel 60 GHz transmitter SoC with an on-chip antenna and integrated memory in CMOS 65 nm technology is presented in this paper. This highly integrated transmitter design can support a data rate of 2 GBPS with a transmission range of 1 m. The transmitter consists of a fundamental frequency 60 GHz PLL which covers the complete ISM band. The modulator following the PLL can support both BPSK and OOK modulation schemes. Both stored data on the integrated memory or directly from an external source can be transmitted. A tapered slot on chip antenna is integrated with the power amplifier to complete the front end of the transmitter design. Size of the complete transmitter with on-chip antenna is only 1.96 mm × 1.96 mm. The core circuits consume less than 100 mW of power. The high data rate capability of the design makes it extremely suitable for bandwidth hungry applications such as unencrypted HD video streaming and transmission.

  12. 60 GHz system-on-chip (SoC) with built-in memory and an on-chip antenna

    KAUST Repository

    Ghaffar, Farhan A.

    2014-04-01

    A novel 60 GHz transmitter SoC with an on-chip antenna and integrated memory in CMOS 65 nm technology is presented in this paper. This highly integrated transmitter design can support a data rate of 2 GBPS with a transmission range of 1 m. The transmitter consists of a fundamental frequency 60 GHz PLL which covers the complete ISM band. The modulator following the PLL can support both BPSK and OOK modulation schemes. Both stored data on the integrated memory or directly from an external source can be transmitted. A tapered slot on chip antenna is integrated with the power amplifier to complete the front end of the transmitter design. Size of the complete transmitter with on-chip antenna is only 1.96 mm × 1.96 mm. The core circuits consume less than 100 mW of power. The high data rate capability of the design makes it extremely suitable for bandwidth hungry applications such as unencrypted HD video streaming and transmission.

  13. Operating characteristics of a single-stage Stirling cryocooler capable of providing 700 W cooling power at 77 K

    Science.gov (United States)

    Xu, Ya; Sun, Daming; Qiao, Xin; Yu, Yan S. W.; Zhang, Ning; Zhang, Jie; Cai, Yachao

    2017-04-01

    High cooling capacity Stirling cryocooler generally has hundreds to thousands watts of cooling power at liquid nitrogen temperature. It is promising in boil-off gas (BOG) recondensation and high temperature superconducting (HTS) applications. A high cooling capacity Stirling cryocooler driven by a crank-rod mechanism was developed and studied systematically. The pressure and frequency characteristics of the cryocooler, the heat rejection from the ambient heat exchanger, and the cooling performance are studied under different charging pressure. Energy conversion and distribution in the cryocooler are analyzed theoretically. With an electric input power of 10.9 kW and a rotating speed of 1450 r/min of the motor, a cooling power of 700 W at 77 K and a relative Carnot efficiency of 18.2% of the cryocooler have been achieved in the present study, and the corresponding pressure ratio in the compression space reaches 2.46.

  14. A VLSI System-on-Chip for Particle Detectors

    CERN Document Server

    AUTHOR|(CDS)2078019

    In this thesis I present a System-on-Chip (SoC) I designed to oer a self- contained, compact data acquisition platform for micromegas detector mon- itoring. I carried on my work within the RD-51 collab oration of CERN. With a companion ADC, my architecture is capable to acquire the signal from a detector electro de, pro cess the data and p erform monitoring tests. The SoC is built around on a custom 8-bit micropro cessor with internal mem- ory resources and emb eds the p eripherals to b e interf...

  15. Variation Tolerant On-Chip Interconnects

    CERN Document Server

    Nigussie, Ethiopia Enideg

    2012-01-01

    This book presents design techniques, analysis and implementation of high performance and power efficient, variation tolerant on-chip interconnects.  Given the design paradigm shift to multi-core, interconnect-centric designs and the increase in sources of variability and their impact in sub-100nm technologies, this book will be an invaluable reference for anyone concerned with the design of next generation, high-performance electronics systems. Provides comprehensive, circuit-level explanation of high-performance, energy-efficient, variation-tolerant on-chip interconnect; Describes design techniques to mitigate problems caused by variation; Includes techniques for design and implementation of self-timed on-chip interconnect, delay variation insensitive communication protocols, high speed signaling techniques and circuits, bit-width independent completion detection and process, voltage and temperature variation tolerance.                          

  16. Analysis Of The Heat Exchanger Capability At One Line Cooling System Operation Mode Of The RSG-GAS

    International Nuclear Information System (INIS)

    Dibyo, Sukmanto; Kuntoro, Iman

    2000-01-01

    In the frame of minimizing the operation lost of the RSG-GAS reactor, operation using one line cooling system at certain power range is being evaluated. Analysis the performance of cooling system for determining maximum power should be carried out. Analysis was carried out based on heat exchanger calculation using actual operation data. Constraints imposed to the analysis are that inlet cooling system to the reactor core shall be less than 42 o C. The result shows that by using one line of primary and secondary coolant flow of 1780 m exp. 3/hr and 2000 m 3 /hr and secondary coolant temperature from the cooling tower of 38 o C, the primary coolant to the core will be reach 42 o C if reactor operated at power of 16 MW

  17. Cytostretch, an Organ-on-Chip Platform

    NARCIS (Netherlands)

    Gaio, N.; van Meer, B.; Quiros Solano, W.F.; Bergers, L.; van de Stolpe, A; Mummery, CL; Sarro, P.M.; Dekker, R.

    2016-01-01

    Organ-on-Chips (OOCs) are micro-fabricated devices which are used to culture cells in order to mimic functional units of human organs. The devices are designed to simulate the physiological environment of tissues in vivo. Cells in some types of OOCs can be stimulated in situ by electrical and/or

  18. On-chip mode division multiplexing technologies

    DEFF Research Database (Denmark)

    Ding, Yunhong; Frellsen, Louise Floor; Guan, Xiaowei

    2016-01-01

    Space division multiplexing (SDM) is currently widely investigated in order to provide enhanced capacity thanks to the utilization of space as a new degree of multiplexing freedom in both optical fiber communication and on-chip interconnects. Basic components allowing the processing of spatial...... photonic integrated circuit mode (de) multiplexer for few-mode fibers (FMFs)....

  19. Assessment on the Reactor Containment Cooling Capability of Kori Unit 1 Under LOCA Conditions with Loss of Offsite Power

    International Nuclear Information System (INIS)

    Lee, Jin Yong; Park, Jong Woon; Kim, Hyeong Taek

    2006-01-01

    The fan cooler system is designed to remove heat from containment under postulated accident conditions. During a postulated LOCA concurrent with a Loss of Offsite Power (LOOP), the Component Cooling Water (CCW) pumps that supply cooling water to the fan cooler and the fan that supplies containment air to the fan cooler will temporarily lose power. Then, the high temperature steam in the containment atmosphere will pass over the fan cooler tubing without forced cooling water flow. In that case, boiling may occur in the fan cooler tubes causing steam bubbles to form and pass into the attached CCW piping creating steam voids. Prior to the CCW pumps restart, the presence of steam and subcooled water can induce the potential for water hammer. As the CCW pumps restart, the accumulated steam condenses and the pumped water can produce a water hammer when the void closes. The hydrodynamic loads caused by such a water hammer event could challenge the integrity and the function of the fan cooler and associated CCW system. With respect to this phenomena, the United States Nuclear Regulatory Commission (USNRC) issued the Generic Letter (GL) 96-06, which requests an assessment of the possibility of boiling and water hammer in the cooling water system. The objectives of this study are to develop a analysis method for predicting the thermal hydraulic status of containment fan cooler and then to assess the containment fan cooler of Kori Unit 1 using the developed model under a LOCA with LOOP

  20. Microengineered physiological biomimicry: organs-on-chips.

    Science.gov (United States)

    Huh, Dongeun; Torisawa, Yu-suke; Hamilton, Geraldine A; Kim, Hyun Jung; Ingber, Donald E

    2012-06-21

    Microscale engineering technologies provide unprecedented opportunities to create cell culture microenvironments that go beyond current three-dimensional in vitro models by recapitulating the critical tissue-tissue interfaces, spatiotemporal chemical gradients, and dynamic mechanical microenvironments of living organs. Here we review recent advances in this field made over the past two years that are focused on the development of 'Organs-on-Chips' in which living cells are cultured within microfluidic devices that have been microengineered to reconstitute tissue arrangements observed in living organs in order to study physiology in an organ-specific context and to develop specialized in vitro disease models. We discuss the potential of organs-on-chips as alternatives to conventional cell culture models and animal testing for pharmaceutical and toxicology applications. We also explore challenges that lie ahead if this field is to fulfil its promise to transform the future of drug development and chemical safety testing.

  1. On-Chip Microwave Quantum Hall Circulator

    Directory of Open Access Journals (Sweden)

    A. C. Mahoney

    2017-01-01

    Full Text Available Circulators are nonreciprocal circuit elements that are integral to technologies including radar systems, microwave communication transceivers, and the readout of quantum information devices. Their nonreciprocity arises from the interference of microwaves over the centimeter scale of the signal wavelength, in the presence of bulky magnetic media that breaks time-reversal symmetry. Here, we realize a completely passive on-chip microwave circulator with size 1/1000th the wavelength by exploiting the chiral, “slow-light” response of a two-dimensional electron gas in the quantum Hall regime. For an integrated GaAs device with 330  μm diameter and about 1-GHz center frequency, a nonreciprocity of 25 dB is observed over a 50-MHz bandwidth. Furthermore, the nonreciprocity can be dynamically tuned by varying the voltage at the port, an aspect that may enable reconfigurable passive routing of microwave signals on chip.

  2. 4 K to 20 K rotational-cooling magnetic refrigerator capable of 1-mW to >1-W operation

    International Nuclear Information System (INIS)

    Barclay, J.A.

    1980-02-01

    The low-temperature, magnetic entropy of certain single-crystal paramagnetic materials, such as DyPO 4 , changes dramatically as the crystal rotates in a magnetic field. A new magnetic refrigerator design based on the anisotropic nature of such materials is presented. The key advantages of the rotational-cooling concept are (1) a single, rotary motion is required, (2) magnetic field shaping is not a problem because the entire working material is in a constant field, and (3) the refrigerator can be smaller than comparable magnetic refrigerators because the working material is entirely inside the magnet at all times. The main disadvantage of the rotational-cooling concept is that small-dimension single crystals are required

  3. Routing algorithms in networks-on-chip

    CERN Document Server

    Daneshtalab, Masoud

    2014-01-01

    This book provides a single-source reference to routing algorithms for Networks-on-Chip (NoCs), as well as in-depth discussions of advanced solutions applied to current and next generation, many core NoC-based Systems-on-Chip (SoCs). After a basic introduction to the NoC design paradigm and architectures, routing algorithms for NoC architectures are presented and discussed at all abstraction levels, from the algorithmic level to actual implementation.  Coverage emphasizes the role played by the routing algorithm and is organized around key problems affecting current and next generation, many-core SoCs. A selection of routing algorithms is included, specifically designed to address key issues faced by designers in the ultra-deep sub-micron (UDSM) era, including performance improvement, power, energy, and thermal issues, fault tolerance and reliability.   ·         Provides a comprehensive overview of routing algorithms for Networks-on-Chip and NoC-based, manycore systems; ·         Describe...

  4. On-chip antenna: Practical design and characterization considerations

    KAUST Repository

    Shamim, Atif; Salama, Khaled N.; Sedky, S.; Soliman, E. A.

    2012-01-01

    This paper highlights the challenges of an emergent field, namely, on-chip antenna design. Consistent with the RF System-on-Chip (SoC) concept, co-design strategy for circuits and on-chip antennas is described. A number of design and layout issues, arising from the highly integrated nature of this kind of systems, are discussed. The characterization difficulties related to on-chip antennas radiation properties are also highlighted. Finally, a novel on-wafer test fixture is proposed to measure the gain and radiation pattern of the on-chip antennas in the anechoic chamber.

  5. On-chip antenna: Practical design and characterization considerations

    KAUST Repository

    Shamim, Atif

    2012-07-28

    This paper highlights the challenges of an emergent field, namely, on-chip antenna design. Consistent with the RF System-on-Chip (SoC) concept, co-design strategy for circuits and on-chip antennas is described. A number of design and layout issues, arising from the highly integrated nature of this kind of systems, are discussed. The characterization difficulties related to on-chip antennas radiation properties are also highlighted. Finally, a novel on-wafer test fixture is proposed to measure the gain and radiation pattern of the on-chip antennas in the anechoic chamber.

  6. A comparison of the heat transfer capabilities of two manufacturing methods for high heat flux water-cooled devices

    International Nuclear Information System (INIS)

    McKoon, R.H.

    1986-10-01

    An experimental program was undertaken to compare the heat transfer characteristics of water-cooled copper devices manufactured via conventional drilled passage construction and via a technique whereby molten copper is cast over a network of preformed cooling tubes. Two similar test blocks were constructed; one using the drilled passage technique, the other via casting copper over Monel pipe. Each test block was mounted in a vacuum system and heated uniformly on the top surface using a swept electron beam. From the measured absorbed powers and resultant temperatures, an overall heat transfer coefficient was calculated. The maximum heat transfer coefficient calculated for the case of the drilled passage test block was 2534 Btu/hr/ft 2 / 0 F. This corresponded to an absorbed power density of 320 w/cm 2 and resulted in a maximum recorded copper temperature of 346 0 C. Corresponding figures for the cast test block were 363 Btu/hr/ft 2 / 0 F, 91 w/cm 2 , and 453 0 C

  7. Technology for On-Chip Qubit Control with Microfabricated Surface Ion Traps

    Energy Technology Data Exchange (ETDEWEB)

    Highstrete, Clark [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States). Quantum Information Sciences Dept.; Scott, Sean Michael [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States). RF/Optoelectronics Dept.; Nordquist, Christopher D. [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States). RF/Optoelectronics Dept.; Sterk, Jonathan David [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States). Photonic Microsystem Technologies Dept.; Maunz, Peter Lukas Wilhelm [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States). Photonic Microsystem Technologies Dept.; Tigges, Christopher P. [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States). Photonic Microsystem Technologies Dept.; Blain, Matthew Glenn [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States). Photonic Microsystem Technologies Dept.; Heller, Edwin J. [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States). Microsystems Integration Dept.; Stevens, James E. [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States). MESAFab Operations 2 Dept.

    2013-11-01

    Trapped atomic ions are a leading physical system for quantum information processing. However, scalability and operational fidelity remain limiting technical issues often associated with optical qubit control. One promising approach is to develop on-chip microwave electronic control of ion qubits based on the atomic hyperfine interaction. This project developed expertise and capabilities at Sandia toward on-chip electronic qubit control in a scalable architecture. The project developed a foundation of laboratory capabilities, including trapping the 171Yb+ hyperfine ion qubit and developing an experimental microwave coherent control capability. Additionally, the project investigated the integration of microwave device elements with surface ion traps utilizing Sandia’s state-of-the-art MEMS microfabrication processing. This effort culminated in a device design for a multi-purpose ion trap experimental platform for investigating on-chip microwave qubit control, laying the groundwork for further funded R&D to develop on-chip microwave qubit control in an architecture that is suitable to engineering development.

  8. On-chip generation of heralded photon-number states

    Science.gov (United States)

    Vergyris, Panagiotis; Meany, Thomas; Lunghi, Tommaso; Sauder, Gregory; Downes, James; Steel, M. J.; Withford, Michael J.; Alibart, Olivier; Tanzilli, Sébastien

    2016-10-01

    Beyond the use of genuine monolithic integrated optical platforms, we report here a hybrid strategy enabling on-chip generation of configurable heralded two-photon states. More specifically, we combine two different fabrication techniques, i.e., non-linear waveguides on lithium niobate for efficient photon-pair generation and femtosecond-laser-direct-written waveguides on glass for photon manipulation. Through real-time device manipulation capabilities, a variety of path-coded heralded two-photon states can be produced, ranging from product to entangled states. Those states are engineered with high levels of purity, assessed by fidelities of 99.5 ± 8% and 95.0 ± 8%, respectively, obtained via quantum interferometric measurements. Our strategy therefore stands as a milestone for further exploiting entanglement-based protocols, relying on engineered quantum states, and enabled by scalable and compatible photonic circuits.

  9. Computer System Design System-on-Chip

    CERN Document Server

    Flynn, Michael J

    2011-01-01

    The next generation of computer system designers will be less concerned about details of processors and memories, and more concerned about the elements of a system tailored to particular applications. These designers will have a fundamental knowledge of processors and other elements in the system, but the success of their design will depend on the skills in making system-level tradeoffs that optimize the cost, performance and other attributes to meet application requirements. This book provides a new treatment of computer system design, particularly for System-on-Chip (SOC), which addresses th

  10. On-chip digital power supply control for system-on-chip applications

    NARCIS (Netherlands)

    Meijer, M.; Pineda de Gyvez, J.; Otten, R.H.J.M.

    2005-01-01

    The authors presented an on-chip, fully-digital, power-supply control system. The scheme consists of two independent control loops that regulate power supply variations due to semiconductor process spread, temperature, and chip's workload. Smart power-switches working as linear voltage regulators

  11. Efficient on-chip hotspot removal combined solution of thermoelectric cooler and mini-channel heat sink

    International Nuclear Information System (INIS)

    Hao, Xiaohong; Peng, Bei; Xie, Gongnan; Chen, Yi

    2016-01-01

    Highlights: • A combined solution of thermoelectric cooler (TEC) and mini-channel heat sink to remove the hotspot of the chip has been proposed. • The TEC's mathematical model is established to assess its work performance. • A comparative study on the proposed efficient On-Chip Hotspot Removal Combined Solution. - Abstract: Hotspot will significantly degrade the reliability and performance of the electronic equipment. The efficient removal of hotspot can make the temperature distribution uniform, and ensure the reliable operation of the electronic equipment. This study proposes a combined solution of thermoelectric cooler (TEC) and mini-channel heat sink to remove the hotspot of the chip in the electronic equipment. Firstly, The TEC's mathematical model is established to assess its work performance under different boundary conditions. Then, the hotspot removal capability of the TEC is discussed for different cooling conditions, which has shown that the combined equipment has better hotspot removal capability compared with others. Finally, A TEC is employed to investigate the hotspot removal capacity of the combined solution, and the results have indicated that it can effectively remove hotspot in the diameter of 0.5 mm, the power density of 600W/cm 2 when its working current is 3A and heat transfer thermal resistance is 0 K/W.

  12. Silicon Nanophotonics for Many-Core On-Chip Networks

    Science.gov (United States)

    Mohamed, Moustafa

    Number of cores in many-core architectures are scaling to unprecedented levels requiring ever increasing communication capacity. Traditionally, architects follow the path of higher throughput at the expense of latency. This trend has evolved into being problematic for performance in many-core architectures. Moreover, the trends of power consumption is increasing with system scaling mandating nontraditional solutions. Nanophotonics can address these problems, offering benefits in the three frontiers of many-core processor design: Latency, bandwidth, and power. Nanophotonics leverage circuit-switching flow control allowing low latency; in addition, the power consumption of optical links is significantly lower compared to their electrical counterparts at intermediate and long links. Finally, through wave division multiplexing, we can keep the high bandwidth trends without sacrificing the throughput. This thesis focuses on realizing nanophotonics for communication in many-core architectures at different design levels considering reliability challenges that our fabrication and measurements reveal. First, we study how to design on-chip networks for low latency, low power, and high bandwidth by exploiting the full potential of nanophotonics. The design process considers device level limitations and capabilities on one hand, and system level demands in terms of power and performance on the other hand. The design involves the choice of devices, designing the optical link, the topology, the arbitration technique, and the routing mechanism. Next, we address the problem of reliability in on-chip networks. Reliability not only degrades performance but can block communication. Hence, we propose a reliability-aware design flow and present a reliability management technique based on this flow to address reliability in the system. In the proposed flow reliability is modeled and analyzed for at the device, architecture, and system level. Our reliability management technique is

  13. On-chip photonic particle sensor

    Science.gov (United States)

    Singh, Robin; Ma, Danhao; Agarwal, Anu; Anthony, Brian

    2018-02-01

    We propose an on-chip photonic particle sensor design that can perform particle sizing and counting for various environmental applications. The sensor is based on micro photonic ring resonators that are able to detect the presence of the free space particles through the interaction with their evanescent electric field tail. The sensor can characterize a wide range of the particle size ranging from a few nano meters to micron ( 1 micron). The photonic platform offers high sensitivity, compactness, fast response of the device. Further, FDTD simulations are performed to analyze different particle-light interactions. Such a compact and portable platform, packaged with integrated photonic circuit provides a useful sensing modality in space shuttle and environmental applications.

  14. Development of a system code with CFD capability for analyzing turbulent mixed convection in gas-cooled reactors

    International Nuclear Information System (INIS)

    Kim, Hyeon Il

    2010-02-01

    convection regime, and (4) recently conducted experiments in a deteriorated turbulent heat transfer regime. The validation proved that the Launder-Sharma model can supply improved solutions and much better knowledge about not only the wall temperature but also the heat transfer phenomena in turbulent mixed convection regime, the DTHT, compared to that offered by a single-dimensional empirical correlation. A set of modules to provide Computational Fluid Dynamics (CFD) capability being able to handle multi-dimensional heat transfer is incorporated into a system code for GCRs, GAMMA+, by adopting the Launder-Sharma model of turbulence. We implemented the model into the original system code based on the same schemes, that is, the Implicit Continuous fluid Eulerian (ICE) scheme in a staggered mesh layout, and Newton linearization as constructed in the original code in such a way that the model did not interfere with the numerical stability. The extended code, GAMMA T , was successfully verified and validated in that the model was well formulated with a firmly established numerical foundation through comparisons with an available set of data covering turbulent forced convection regime. The GAMMA T code showed strong potential for future use as a robust integrated system code with the capability of multi-scale analysis in it

  15. On-Chip Bondwire Magnetics with Ferrite-Epoxy Glob Coating for Power Systems on Chip

    Directory of Open Access Journals (Sweden)

    Jian Lu

    2008-01-01

    Full Text Available A novel concept of on-chip bondwire inductors and transformers with ferrite epoxy glob coating is proposed to offer a cost effective approach realizing power systems on chip (SOC. We have investigated the concept both experimentally and with finite element modeling. A Q factor of 30–40 is experimentally demonstrated for the bondwire inductors which represents an improvement by a factor of 3–30 over the state-of-the-art MEMS micromachined inductors. Transformer parameters including self- and mutual inductance and coupling factors are extracted from both modeled and measured S-parameters. More importantly, the bondwire magnetic components can be easily integrated into SOC manufacturing processes with minimal changes and open enormous possibilities for realizing cost-effective, high-current, high-efficiency power SOCs.

  16. Application of analytical capability to predict rapid cladding cooling and quench during the blowdown phase of a large break loss-of-coolant accident

    International Nuclear Information System (INIS)

    Aksan, S.N.; Tolman, E.L.; Nelson, R.A.

    1983-01-01

    Large-break Experiments L2-2 and L2-3 conducted in the Loss-of-Fluid Test (LOFT) facility experienced core-wide rapid quenches early in the blowdown transients. To further investigate rapid cladding quenches, separate effects experiments using Semiscale solid-type electric heater rods were conducted in the LOFT Test Support Facility (LTSF) over a wide range of inlet coolant conditions. The analytical capability to predict the cladding temperature response from selected LTSF experiments estimated to bound the hydraulic conditions causing the LOFT early blowdown quenches was investigated using the RELAP4 computer code and was shown to be acceptable over the film boiling cooldown phase. This analytical capability was then used to investigate the behavior of nuclear fuel rods under the same hydraulic conditions. The calculations show that, under rapid cooling conditions, the behaviors of nuclear and electrical heater rods are significantly different because the nuclear rods are conduction limited, while the electrical rods are convection limited

  17. Energy Model of Networks-on-Chip and a Bus

    NARCIS (Netherlands)

    Wolkotte, P.T.; Smit, Gerardus Johannes Maria; Kavaldjiev, N.K.; Becker, Jens E.; Becker, Jürgen; Nurmi, J.; Takala, J.; Hamalainen, T.D.

    2005-01-01

    A Network-on-Chip (NoC) is an energy-efficient onchip communication architecture for Multi-Processor Systemon-Chip (MPSoC) architectures. In earlier papers we proposed two Network-on-Chip architectures based on packet-switching and circuit-switching. In this paper we derive an energy model for both

  18. Modelling, Synthesis, and Configuration of Networks-on-Chips

    DEFF Research Database (Denmark)

    Stuart, Matthias Bo

    This thesis presents three contributions in two different areas of network-on-chip and system-on-chip research: Application modelling and identifying and solving different optimization problems related to two specific network-on-chip architectures. The contribution related to application modelling...... is an analytical method for deriving the worst-case traffic pattern caused by an application and the cache-coherence protocol in a cache-coherent shared-memory system. The contributions related to network-on-chip optimization problems consist of two parts: The development and evaluation of six heuristics...... for solving the network synthesis problem in the MANGO network-on-chip, and the identification and formalization of the ReNoC configuration problem together with three heuristics for solving it....

  19. On-chip particle trapping and manipulation

    Science.gov (United States)

    Leake, Kaelyn Danielle

    The ability to control and manipulate the world around us is human nature. Humans and our ancestors have used tools for millions of years. Only in recent years have we been able to control objects at such small levels. In order to understand the world around us it is frequently necessary to interact with the biological world. Optical trapping and manipulation offer a non-invasive way to move, sort and interact with particles and cells to see how they react to the world around them. Optical tweezers are ideal in their abilities but they require large, non-portable, and expensive setups limiting how and where we can use them. A cheap portable platform is required in order to have optical manipulation reach its full potential. On-chip technology offers a great solution to this challenge. We focused on the Liquid-Core Anti-Resonant Reflecting Optical Waveguide (liquid-core ARROW) for our work. The ARROW is an ideal platform, which has anti-resonant layers which allow light to be guided in liquids, allowing for particles to easily be manipulated. It is manufactured using standard silicon manufacturing techniques making it easy to produce. The planner design makes it easy to integrate with other technologies. Initially I worked to improve the ARROW chip by reducing the intersection losses and by reducing the fluorescence and background on the ARROW chip. The ARROW chip has already been used to trap and push particles along its channel but here I introduce several new methods of particle trapping and manipulation on the ARROW chip. Traditional two beam traps use two counter propagating beams. A trapping scheme that uses two orthogonal beams which counter to first instinct allow for trapping at their intersection is introduced. This scheme is thoroughly predicted and analyzed using realistic conditions. Simulations of this method were done using a program which looks at both the fluidics and optical sources to model complex situations. These simulations were also used to

  20. On-chip sample preparation for complete blood count from raw blood.

    Science.gov (United States)

    Nguyen, John; Wei, Yuan; Zheng, Yi; Wang, Chen; Sun, Yu

    2015-03-21

    This paper describes a monolithic microfluidic device capable of on-chip sample preparation for both RBC and WBC measurements from whole blood. For the first time, on-chip sample processing (e.g. dilution, lysis, and filtration) and downstream single cell measurement were fully integrated to enable sample preparation and single cell analysis from whole blood on a single device. The device consists of two parallel sub-systems that perform sample processing and electrical measurements for measuring RBC and WBC parameters. The system provides a modular environment capable of handling solutions of various viscosities by adjusting the length of channels and precisely controlling mixing ratios, and features a new 'offset' filter configuration for increased duration of device operation. RBC concentration, mean corpuscular volume (MCV), cell distribution width, WBC concentration and differential are determined by electrical impedance measurement. Experimental characterization of over 100,000 cells from 10 patient blood samples validated the system's capability for performing on-chip raw blood processing and measurement.

  1. SVM classifier on chip for melanoma detection.

    Science.gov (United States)

    Afifi, Shereen; GholamHosseini, Hamid; Sinha, Roopak

    2017-07-01

    Support Vector Machine (SVM) is a common classifier used for efficient classification with high accuracy. SVM shows high accuracy for classifying melanoma (skin cancer) clinical images within computer-aided diagnosis systems used by skin cancer specialists to detect melanoma early and save lives. We aim to develop a medical low-cost handheld device that runs a real-time embedded SVM-based diagnosis system for use in primary care for early detection of melanoma. In this paper, an optimized SVM classifier is implemented onto a recent FPGA platform using the latest design methodology to be embedded into the proposed device for realizing online efficient melanoma detection on a single system on chip/device. The hardware implementation results demonstrate a high classification accuracy of 97.9% and a significant acceleration factor of 26 from equivalent software implementation on an embedded processor, with 34% of resources utilization and 2 watts for power consumption. Consequently, the implemented system meets crucial embedded systems constraints of high performance and low cost, resources utilization and power consumption, while achieving high classification accuracy.

  2. Biosensors-on-chip: a topical review

    International Nuclear Information System (INIS)

    Chen, Sensen; Shamsi, Mohtashim H

    2017-01-01

    This review will examine the integration of two fields that are currently at the forefront of science, i.e. biosensors and microfluidics. As a lab-on-a-chip (LOC) technology, microfluidics has been enriched by the integration of various detection tools for analyte detection and quantitation. The application of such microfluidic platforms is greatly increased in the area of biosensors geared towards point-of-care diagnostics. Together, the merger of microfluidics and biosensors has generated miniaturized devices for sample processing and sensitive detection with quantitation. We believe that microfluidic biosensors (biosensors-on-chip) are essential for developing robust and cost effective point-of-care diagnostics. This review is relevant to a variety of disciplines, such as medical science, clinical diagnostics, LOC technologies including MEMs/NEMs, and analytical science. Specifically, this review will appeal to scientists working in the two overlapping fields of biosensors and microfluidics, and will also help new scientists to find their directions in developing point-of-care devices. (topical review)

  3. Cytostretch, an Organ-on-Chip Platform

    Directory of Open Access Journals (Sweden)

    Nikolas Gaio

    2016-07-01

    Full Text Available Organ-on-Chips (OOCs are micro-fabricated devices which are used to culture cells in order to mimic functional units of human organs. The devices are designed to simulate the physiological environment of tissues in vivo. Cells in some types of OOCs can be stimulated in situ by electrical and/or mechanical actuators. These actuations can mimic physiological conditions in real tissue and may include fluid or air flow, or cyclic stretch and strain as they occur in the lung and heart. These conditions similarly affect cultured cells and may influence their ability to respond appropriately to physiological or pathological stimuli. To date, most focus has been on devices specifically designed to culture just one functional unit of a specific organ: lung alveoli, kidney nephrons or blood vessels, for example. In contrast, the modular Cytostretch membrane platform described here allows OOCs to be customized to different OOC applications. The platform utilizes silicon-based micro-fabrication techniques that allow low-cost, high-volume manufacturing. We describe the platform concept and its modules developed to date. Membrane variants include membranes with (i through-membrane pores that allow biological signaling molecules to pass between two different tissue compartments; (ii a stretchable micro-electrode array for electrical monitoring and stimulation; (iii micro-patterning to promote cell alignment; and (iv strain gauges to measure changes in substrate stress. This paper presents the fabrication and the proof of functionality for each module of the Cytostretch membrane. The assessment of each additional module demonstrate that a wide range of OOCs can be achieved.

  4. On-chip nanofluidic integration of acoustic sensors towards high Q in liquid

    Science.gov (United States)

    Liang, Ji; Liu, Zifeng; Zhang, Hongxiang; Liu, Bohua; Zhang, Menglun; Zhang, Hao; Pang, Wei

    2017-11-01

    This paper reports an on-chip acoustic sensor comprising a piston-mode film bulk acoustic resonator and a monolithically integrated nanochannel. The resonator with the channel exhibits a resonance frequency (f) of 2.5 GHz and a quality (Q) factor of 436 in deionized water. The f × Q product is as high as 1.1 × 1012, which is the highest among all the acoustic wave sensors in the liquid phase. The sensor consumes 2 pl liquid volume and thus greatly saves the precious assays in biomedical testing. The Q factor is investigated, and real-time viscosity tests of glucose solution are demonstrated. The highly miniaturized and integrated sensor is capable to be arrayed with readout-circuitry, which opens an avenue for portable applications and lab-on-chip systems.

  5. Crosstalk in modern on-chip interconnects a FDTD approach

    CERN Document Server

    Kaushik, B K; Patnaik, Amalendu

    2016-01-01

    The book provides accurate FDTD models for on-chip interconnects, covering most recent advancements in materials and design. Furthermore, depending on the geometry and physical configurations, different electrical equivalent models for CNT and GNR based interconnects are presented. Based on the electrical equivalent models the performance comparison among the Cu, CNT and GNR-based interconnects are also discussed in the book. The proposed models are validated with the HSPICE simulations. The book introduces the current research scenario in the modeling of on-chip interconnects. It presents the structure, properties, and characteristics of graphene based on-chip interconnects and the FDTD modeling of Cu based on-chip interconnects. The model considers the non-linear effects of CMOS driver as well as the transmission line effects of interconnect line that includes coupling capacitance and mutual inductance effects. In a more realistic manner, the proposed model includes the effect of width-dependent MFP of the ...

  6. Error Control for Network-on-Chip Links

    CERN Document Server

    Fu, Bo

    2012-01-01

    As technology scales into nanoscale regime, it is impossible to guarantee the perfect hardware design. Moreover, if the requirement of 100% correctness in hardware can be relaxed, the cost of manufacturing, verification, and testing will be significantly reduced. Many approaches have been proposed to address the reliability problem of on-chip communications. This book focuses on the use of error control codes (ECCs) to improve on-chip interconnect reliability. Coverage includes detailed description of key issues in NOC error control faced by circuit and system designers, as well as practical error control techniques to minimize the impact of these errors on system performance. Provides a detailed background on the state of error control methods for on-chip interconnects; Describes the use of more complex concatenated codes such as Hamming Product Codes with Type-II HARQ, while emphasizing integration techniques for on-chip interconnect links; Examines energy-efficient techniques for integrating multiple error...

  7. Reliability, Availability and Serviceability of Networks-on-Chip

    CERN Document Server

    Cota, Érika; Soares Lubaszewski, Marcelo

    2012-01-01

    This book presents an overview of the issues related to the test, diagnosis and fault-tolerance of Network on Chip-based systems. It is the first book dedicated to the quality aspects of NoC-based systems and will serve as an invaluable reference to the problems, challenges, solutions, and trade-offs related to designing and implementing state-of-the-art, on-chip communication architectures.

  8. The study of capability natural uranium as fuel cycle input for long life gas cooled fast reactors with helium as coolant

    Energy Technology Data Exchange (ETDEWEB)

    Ariani, Menik, E-mail: menikariani@gmail.com; Satya, Octavianus Cakra; Monado, Fiber [Department of Physics, Faculty of Mathematics and Natural Sciences, Sriwijaya University, jl Palembang-Prabumulih km 32 Indralaya OganIlir, South of Sumatera (Indonesia); Su’ud, Zaki [Nuclear and Biophysics Research Division, Faculty of Mathematics and Natural Sciences, Bandung Institute of Technology, jlGanesha 10, Bandung (Indonesia); Sekimoto, Hiroshi [CRINES, Tokyo Institute of Technology, 2-12-11N1-17 Ookayama, Meguro-Ku, Tokyo (Japan)

    2016-03-11

    The objective of the present research is to assess the feasibility design of small long-life Gas Cooled Fast Reactor with helium as coolant. GCFR included in the Generation-IV reactor systems are being developed to provide sustainable energy resources that meet future energy demand in a reliable, safe, and proliferation-resistant manner. This reactor can be operated without enrichment and reprocessing forever, once it starts. To obtain the capability of consuming natural uranium as fuel cycle input modified CANDLE burn-up scheme was adopted in this system with different core design. This study has compared the core with three designs of core reactors with the same thermal power 600 MWth. The fuel composition each design was arranged by divided core into several parts of equal volume axially i.e. 6, 8 and 10 parts related to material burn-up history. The fresh natural uranium is initially put in region 1, after one cycle of 10 years of burn-up it is shifted to region 2 and the region 1 is filled by fresh natural uranium fuel. This concept is basically applied to all regions, i.e. shifted the core of the region (i) into region (i+1) region after the end of 10 years burn-up cycle. The calculation results shows that for the burn-up strategy on “Region-8” and “Region-10” core designs, after the reactors start-up the operation furthermore they only needs natural uranium supply to the next life operation until one period of refueling (10 years).

  9. On-chip photonic microsystem for optical signal processing based on silicon and silicon nitride platforms

    Science.gov (United States)

    Li, Yu; Li, Jiachen; Yu, Hongchen; Yu, Hai; Chen, Hongwei; Yang, Sigang; Chen, Minghua

    2018-04-01

    The explosive growth of data centers, cloud computing and various smart devices is limited by the current state of microelectronics, both in terms of speed and heat generation. Benefiting from the large bandwidth, promising low power consumption and passive calculation capability, experts believe that the integrated photonics-based signal processing and transmission technologies can break the bottleneck of microelectronics technology. In recent years, integrated photonics has become increasingly reliable and access to the advanced fabrication process has been offered by various foundries. In this paper, we review our recent works on the integrated optical signal processing system. We study three different kinds of on-chip signal processors and use these devices to build microsystems for the fields of microwave photonics, optical communications and spectrum sensing. The microwave photonics front receiver was demonstrated with a signal processing range of a full-band (L-band to W-band). A fully integrated microwave photonics transceiver without the on-chip laser was realized on silicon photonics covering the signal frequency of up 10 GHz. An all-optical orthogonal frequency division multiplexing (OFDM) de-multiplier was also demonstrated and used for an OFDM communication system with the rate of 64 Gbps. Finally, we show our work on the monolithic integrated spectrometer with a high resolution of about 20 pm at the central wavelength of 1550 nm. These proposed on-chip signal processing systems potential applications in the fields of radar, 5G wireless communication, wearable devices and optical access networks.

  10. Wake on LAN over Internet as web service system on chip

    OpenAIRE

    Maciá Pérez, Francisco; Gil Martínez-Abarca, Juan Antonio; Ramos Morillo, Héctor; Mora Gimeno, Francisco José; Marcos Jorquera, Diego; Gilart Iglesias, Virgilio

    2009-01-01

    In this paper we introduce a System on Chip (SoC) designed to run a particular Web Service (WS) in an Application-Specific Integrated Circuit (ASIC). The system has been designed devoid of processor and software and conceived as a hardware pattern for a trouble-free design of network services offered as WS in Service-Oriented Architecture (SOA). Therefore, the chip is not only able to act as SOAP Service Provider but, it is also capable of registering the service on its own in an external Bro...

  11. Identification of microfluidic two-phase flow patterns in lab-on-chip devices.

    Science.gov (United States)

    Yang, Zhaochu; Dong, Tao; Halvorsen, Einar

    2014-01-01

    This work describes a capacitive sensor for identification of microfluidic two-phase flow in lab-on-chip devices. With interdigital electrodes and thin insulation layer utilized, this sensor is capable of being integrated with the microsystems easily. Transducing principle and design considerations are presented with respect to the microfluidic gas/liquid flow patterns. Numerical simulation results verify the operational principle. And the factors affecting the performance of the sensor are discussed. Besides, a feasible process flow for the fabrication is also proposed.

  12. Embedded 3D Graphics Core for FPGA-based System-on-Chip Applications

    DEFF Research Database (Denmark)

    Holten-Lund, Hans Erik

    2005-01-01

    This paper presents a 3D graphics accelerator core for an FPGA based system, and illustrates how to build a System-on-Chip containing a Xilinx MicroBlaze soft-core CPU and our 3D graphics accelerator core. The system is capable of running uClinux and hardware accelerated 3D graphics applications......, and the video display which periodically reads from memory to display the final rendered graphics. The graphics core uses internal scratch-pad memory to reduce its external bandwidth requirement, this is achieved by implementing a tile-based rendering algorithm. Reduced external bandwidth means that the power...

  13. A numerical simulation of the piston cooling in view of consumption capabilities and enhanced power density; Numerische Simulation der Kolbenkuehlung im Hinblick auf Verbrauchspotentiale und erhoehte Leistungsdichte

    Energy Technology Data Exchange (ETDEWEB)

    Lutz, Johannes [BMW Group, Muenchen (Germany)

    2012-11-01

    To meet stringent emission regulations and high power requirements, peak cylinder pressures and specific power of petrol engines have increased dramatically in recent years. Nevertheless, regarding customer expectations and in the interest of driving dynamics, modern engines should still adhere to the established wide speed range, resulting in higher thermal loading of in-cylinder components such as piston. To ensure durability and reliability, it is vital for piston cooling concepts to keep maximum temperatures securely below an acceptable limit. In addition, reducing piston cooling at part load can help to gain efficiency and decrease fuel consumption. These exacting demands on the cooling concept require an exact analysis of thermal boundary conditions and their influence on the piston temperature. While good verified models for the combustion simulation already exist, the thermal cooling boundaries involve a greater level of uncertainty. The reason for this lies in the inadequately investigated heat transfer conditions on the piston undercrown and the running surface at present, due to complex fluid dynamics of the oil jet cooling and strong ring movements during a load cycle. This study refines the thermal boundary conditions and leads to precise knowledge of the transient and averaged heat flow through the piston and the cylinder liner. Based on these results, optimized cooling strategies to gain efficiency can be developed with the help of well validated one dimensional thermal engine models. (orig.)

  14. Effect of on-chip filter on Coulomb blockade thermometer

    International Nuclear Information System (INIS)

    Roschier, L; Penttilä, J S; Gunnarsson, D; Prunnila, M; Meschke, M; Savin, A

    2012-01-01

    Coulomb Blockade Thermometer (CBT) is a primary thermometer based on electric conductance of normal tunnel junction arrays. One limitation for CBT use at the lowest temperatures has been due to environmental noise heating. To improve on this limitation, we have done measurements on CBT sensors fabricated with different on-chip filtering structures in a dilution refrigerator with a base temperature of 10 mK. The CBT sensors were produced with a wafer scale tunnel junction process. We present how the different on-chip filtering schemes affect the limiting saturation temperatures and show that CBT sensors with proper on-chip filtering work at temperatures below 20 mK and are tolerant to noisy environment.

  15. Designing network on-chip architectures in the nanoscale era

    CERN Document Server

    Flich, Jose

    2010-01-01

    Going beyond isolated research ideas and design experiences, Designing Network On-Chip Architectures in the Nanoscale Era covers the foundations and design methods of network on-chip (NoC) technology. The contributors draw on their own lessons learned to provide strong practical guidance on various design issues.Exploring the design process of the network, the first part of the book focuses on basic aspects of switch architecture and design, topology selection, and routing implementation. In the second part, contributors discuss their experiences in the industry, offering a roadmap to recent p

  16. Scalable on-chip quantum state tomography

    Science.gov (United States)

    Titchener, James G.; Gräfe, Markus; Heilmann, René; Solntsev, Alexander S.; Szameit, Alexander; Sukhorukov, Andrey A.

    2018-03-01

    Quantum information systems are on a path to vastly exceed the complexity of any classical device. The number of entangled qubits in quantum devices is rapidly increasing, and the information required to fully describe these systems scales exponentially with qubit number. This scaling is the key benefit of quantum systems, however it also presents a severe challenge. To characterize such systems typically requires an exponentially long sequence of different measurements, becoming highly resource demanding for large numbers of qubits. Here we propose and demonstrate a novel and scalable method for characterizing quantum systems based on expanding a multi-photon state to larger dimensionality. We establish that the complexity of this new measurement technique only scales linearly with the number of qubits, while providing a tomographically complete set of data without a need for reconfigurability. We experimentally demonstrate an integrated photonic chip capable of measuring two- and three-photon quantum states with statistical reconstruction fidelity of 99.71%.

  17. Operating Modes and Cooling Capabilities of the 3-Stage ADR Developed for the Soft-X-Ray Spectrometer Instrument on Astro-H

    Science.gov (United States)

    Shirron, Peter J.; Kimball, Mark O.; James, Bryan L.; Muench, Theo; DiPirro, Michael J.; Letmate, Richard V.; Sampson, Michael A.; Bialas, Tom G.; Sneiderman, Gary A.; Porter, Frederick S.; hide

    2015-01-01

    A 3-stage adiabatic demagnetization refrigerator (ADR) is used on the Soft X-ray Spectrometer instrument on Astro-H to cool a 6x6 array of x-ray microcalorimeters to 50 mK. The ADR is supported by a cryogenic system consisting of a superfluid helium tank, a 4.5 K Joule-Thomson (JT) cryocooler, and additional 2-stage Stirling cryocoolers that pre-cool the JT cooler and cool radiation shields within the cryostat. The ADR is configured so that it can use either the liquid helium or the JT cryocooler as its heat sink, giving the instrument an unusual degree of tolerance for component failures or degradation in the cryogenic system. The flight detector assembly, ADR and dewar were integrated into the flight dewar in early 2014, and have since been extensively characterized and calibrated. This paper summarizes the operation and performance of the ADR in all of its operating modes

  18. Design of Networks-on-Chip for Real-Time Multi-Processor Systems-on-Chip

    DEFF Research Database (Denmark)

    Sparsø, Jens

    2012-01-01

    This paper addresses the design of networks-on-chips for use in multi-processor systems-on-chips - the hardware platforms used in embedded systems. These platforms typically have to guarantee real-time properties, and as the network is a shared resource, it has to provide service guarantees...... (bandwidth and/or latency) to different communication flows. The paper reviews some past work in this field and the lessons learned, and the paper discusses ongoing research conducted as part of the project "Time-predictable Multi-Core Architecture for Embedded Systems" (T-CREST), supported by the European...

  19. Power and Thermal Management of System-on-Chip

    DEFF Research Database (Denmark)

    Liu, Wei

    , are necessary at the chip design level. In this work, we investigate the power and thermal management of System-on- Chips (SoCs). Thermal analysis is performed in a SPICE simulation approach based on the electrical-thermal analogy. We investigate the impact of inter- connects on heat distribution...

  20. Exploration within the Network-on-Chip Paradigm

    NARCIS (Netherlands)

    Wolkotte, P.T.

    2009-01-01

    A general purpose processor used to consist of a single processing core, which performed and controlled all tasks on the chip. Its functionality and maximum clock frequency grew steadily over the years. Due to the continuous increase of the number of transistors available on-chip and the operational

  1. Design of an on-chip reflectance map

    NARCIS (Netherlands)

    Terwisscha van Scheltinga, Jeroen; Smit, Jaap; Bosma, Marco

    1995-01-01

    A reflectance map design is described which uses a minimal amount of memory for the table, in order to be applicable as an on-chip shader. The shader is designed for use with the volumetric super resolution hardware, which performs shading at supersampled locations. However, the design may be used

  2. Nano lab-on-chip systems for biomedical and environmental ...

    African Journals Online (AJOL)

    In recent years, nano lab-on-chip (NLOC) has emerged as a powerful tool for biosensing and an active area of research particularly in DNA genetic and genetic related investigations. Compared with conventional sensing techniques, distinctive advantages of using NLOC for biomedicine and other related area include ...

  3. On-chip integrated lasers for biophotonic applications

    DEFF Research Database (Denmark)

    Mappes, Timo; Wienhold, Tobias; Bog, Uwe

    Meeting the need of biomedical users, we develop disposable Lab-on-a-Chip systems based on commercially available polymers. We are combining passive microfluidics with active optical elements on-chip by integrating multiple solid-state and liquid-core lasers. While covering a wide range of laser ...

  4. INFLUENCE OF COOLING CONDITIONS AND THE SIZE OF STOCK MATERIAL DURING CASTING OF TOOL STEEL ON CAPABILITY TO THE SUBSEQUENT THERMAL HARD-FACING

    Directory of Open Access Journals (Sweden)

    V. N. Fedulov

    2016-01-01

    Full Text Available Influence of cooling conditions and the size of stock material of instrumental steel 4H5MF1S on сability to surface hardening after high-temperature tempering at 500–650 °C is investigated. Comparison with hardening of forgings is given.

  5. Comparison of a Ring On-Chip Network and a Code-Division Multiple-Access On-Chip Network

    Directory of Open Access Journals (Sweden)

    Xin Wang

    2007-01-01

    Full Text Available Two network-on-chip (NoC designs are examined and compared in this paper. One design applies a bidirectional ring connection scheme, while the other design applies a code-division multiple-access (CDMA connection scheme. Both of the designs apply globally asynchronous locally synchronous (GALS scheme in order to deal with the issue of transferring data in a multiple-clock-domain environment of an on-chip system. The two NoC designs are compared with each other by their network structures, data transfer principles, network node structures, and their asynchronous designs. Both the synchronous and the asynchronous designs of the two on-chip networks are realized using a hardware-description language (HDL in order to make the entire designs suit the commonly used synchronous design tools and flow. The performance estimation and comparison of the two NoC designs which are based on the HDL realizations are addressed. By comparing the two NoC designs, the advantages and disadvantages of applying direct connection and CDMA connection schemes in an on-chip communication network are discussed.

  6. On-chip detection of gel transition temperature using a novel micro-thermomechanical method.

    Directory of Open Access Journals (Sweden)

    Tsenguun Byambadorj

    Full Text Available We present a new thermomechanical method and a platform to measure the phase transition temperature at microscale. A thin film metal sensor on a membrane simultaneously measures both temperature and mechanical strain of the sample during heating and cooling cycles. This thermomechanical principle of operation is described in detail. Physical hydrogel samples are prepared as a disc-shaped gels (200 μm thick and 1 mm diameter and placed between an on-chip heater and sensor devices. The sol-gel transition temperature of gelatin solution at various concentrations, used as a model physical hydrogel, shows less than 3% deviation from in-depth rheological results. The developed thermomechanical methodology is promising for precise characterization of phase transition temperature of thermogels at microscale.

  7. On-chip immunoelectrophoresis of extracellular vesicles released from human breast cancer cells.

    Directory of Open Access Journals (Sweden)

    Takanori Akagi

    Full Text Available Extracellular vesicles (EVs including exosomes and microvesicles have attracted considerable attention in the fields of cell biology and medicine. For a better understanding of EVs and further exploration of their applications, the development of analytical methods for biological nanovesicles has been required. In particular, considering the heterogeneity of EVs, methods capable of measuring individual vesicles are desired. Here, we report that on-chip immunoelectrophoresis can provide a useful method for the differential protein expression profiling of individual EVs. Electrophoresis experiments were performed on EVs collected from the culture supernatant of MDA-MB-231 human breast cancer cells using a measurement platform comprising a microcapillary electrophoresis chip and a laser dark-field microimaging system. The zeta potential distribution of EVs that reacted with an anti-human CD63 (exosome and microvesicle marker antibody showed a marked positive shift as compared with that for the normal immunoglobulin G (IgG isotype control. Thus, on-chip immunoelectrophoresis could sensitively detect the over-expression of CD63 glycoproteins on EVs. Moreover, to explore the applicability of on-chip immunoelectrophoresis to cancer diagnosis, EVs collected from the blood of a mouse tumor model were analyzed by this method. By comparing the zeta potential distributions of EVs after their immunochemical reaction with normal IgG, and the anti-human CD63 and anti-human CD44 (cancer stem cell marker antibodies, EVs of tumor origin circulating in blood were differentially detected in the real sample. The result indicates that the present method is potentially applicable to liquid biopsy, a promising approach to the low-invasive diagnosis of cancer.

  8. On-chip Mach-Zehnder interferometer for OCT systems

    Science.gov (United States)

    van Leeuwen, Ton G.; Akca, Imran B.; Angelou, Nikolaos; Weiss, Nicolas; Hoekman, Marcel; Leinse, Arne; Heideman, Rene G.

    2018-04-01

    By using integrated optics, it is possible to reduce the size and cost of a bulky optical coherence tomography (OCT) system. One of the OCT components that can be implemented on-chip is the interferometer. In this work, we present the design and characterization of a Mach-Zehnder interferometer consisting of the wavelength-independent splitters and an on-chip reference arm. The Si3N4 was chosen as the material platform as it can provide low losses while keeping the device size small. The device was characterized by using a home-built swept source OCT system. A sensitivity value of 83 dB, an axial resolution of 15.2 μm (in air) and a depth range of 2.5 mm (in air) were all obtained.

  9. Transient produced because of the loss or reduction of the CNA-I UK system cooling capability incompatible with power operation with RELAP5/MOD3

    International Nuclear Information System (INIS)

    Ventura, Mirta A.

    2002-01-01

    The accidental sequences corresponding to the initiating events associated to T15 group are modeled. This group is defined in the Probabilistic Risk Assessment final report. The code used was RELAP5/MOD3. The representative event of the group is the complete loss of UK system, the complementary safety cooling system of the CNA-I. The transient determined from different availability conditions of systems involved in the event is analyzed. Besides the initiating event, the results coming from the event tree heading failures are also studied. Finally, the sequences corresponding to safe shutdown of the plant, and the sequences involved in core damage are determined. (author)

  10. On-chip dual comb source for spectroscopy

    OpenAIRE

    Dutt, Avik; Joshi, Chaitanya; Ji, Xingchen; Cardenas, Jaime; Okawachi, Yoshitomo; Luke, Kevin; Gaeta, Alexander L.; Lipson, Michal

    2016-01-01

    Dual-comb spectroscopy is a powerful technique for real-time, broadband optical sampling of molecular spectra which requires no moving components. Recent developments with microresonator-based platforms have enabled frequency combs at the chip scale. However, the need to precisely match the resonance wavelengths of distinct high-quality-factor microcavities has hindered the development of an on-chip dual comb source. Here, we report the first simultaneous generation of two microresonator comb...

  11. On-chip Magnetic Separation and Cell Encapsulation in Droplets

    Science.gov (United States)

    Chen, A.; Byvank, T.; Bharde, A.; Miller, B. L.; Chalmers, J. J.; Sooryakumar, R.; Chang, W.-J.; Bashir, R.

    2012-02-01

    The demand for high-throughput single cell assays is gaining importance because of the heterogeneity of many cell suspensions, even after significant initial sorting. These suspensions may display cell-to-cell variability at the gene expression level that could impact single cell functional genomics, cancer, stem-cell research and drug screening. The on-chip monitoring of individual cells in an isolated environment could prevent cross-contamination, provide high recovery yield and ability to study biological traits at a single cell level These advantages of on-chip biological experiments contrast to conventional methods, which require bulk samples that provide only averaged information on cell metabolism. We report on a device that integrates microfluidic technology with a magnetic tweezers array to combine the functionality of separation and encapsulation of objects such as immunomagnetically labeled cells or magnetic beads into pico-liter droplets on the same chip. The ability to control the separation throughput that is independent of the hydrodynamic droplet generation rate allows the encapsulation efficiency to be optimized. The device can potentially be integrated with on-chip labeling and/or bio-detection to become a powerful single-cell analysis device.

  12. On-chip microsystems in silicon: opportunities and limitations

    Science.gov (United States)

    Wolffenbuttel, R. F.

    1996-03-01

    Integrated on-chip micro-instrumentation systems in silicon are complete data acquisition systems on a single chip. This concept has appeared to be the ultimate solution in many applications, as it enables in principle the metamorphosis of a basic sensing element, affected with many shortcomings, into an on-chip data acquisition unit that provides an output digital data stream in a standard format not corrupted by sensor non-idealities. Market acceptance would be maximum, as no special knowledge about the internal operation is required, self-test and self-calibration can be included and the dimensions are not different from those of the integrated circuit. The various aspects that are relevant in estimating the constraints for successful implementation of the integrated silicon smart sensor will be outlined in comparison with the properties of more conventional sensor fabrication technologies. It will be shown that the acceptance of on-chip functional integration in an application depends primarily on the added value in terms of improved specification or functionality that the resulting device provides in that application. The economic viability is therefore decisive rather than the technological constraints. This is in contrast to the traditional technology push prevailing in sensor research over market pull mechanisms.

  13. An Energy-Efficient Reconfigurable Circuit Switched Network-on-Chip

    NARCIS (Netherlands)

    Wolkotte, P.T.; Smit, Gerardus Johannes Maria; Rauwerda, G.K.; Smit, L.T.

    Network-on-Chip (NoC) is an energy-efficient on-chip communication architecture for multi-tile System-on-Chip (SoC) architectures. The SoC architecture, including its run-time software, can replace inflexible ASICs for future ambient systems. These ambient systems have to be flexible as well as

  14. Microfluidic organ-on-chip technology for blood-brain barrier research

    NARCIS (Netherlands)

    van der Helm, Marieke Willemijn; van der Meer, Andries Dirk; Eijkel, Jan C.T.; van den Berg, Albert; Segerink, Loes Irene

    2016-01-01

    Organs-on-chips are a new class of microengineered laboratory models that combine several of the advantages of current in vivo and in vitro models. In this review, we summarize the advances that have been made in the development of organ-on-chip models of the blood-brain barrier (BBBs-on-chips) and

  15. An FPGA design flow for reconfigurable network-based multi-processor systems on chip

    NARCIS (Netherlands)

    Kumar, A.; Hansson, M.A; Huisken, J.; Corporaal, H.

    2007-01-01

    Multi-processor systems on chip (MPSoC) platforms are becoming increasingly more heterogeneous and are shifting towards a more communication-centric methodology. Networks on chip (NoC) have emerged as the design paradigm for scalable on-chip communication architectures. As the system complexity

  16. Improved color metrics in solid-state lighting via utilization of on-chip quantum dots

    Science.gov (United States)

    Mangum, Benjamin D.; Landes, Tiemo S.; Theobald, Brian R.; Kurtin, Juanita N.

    2017-02-01

    While Quantum Dots (QDs) have found commercial success in display applications, there are currently no widely available solid state lighting products making use of QD nanotechnology. In order to have real-world success in today's lighting market, QDs must be capable of being placed in on-chip configurations, as remote phosphor configurations are typically much more expensive. Here we demonstrate solid-state lighting devices made with on-chip QDs. These devices show robust reliability under both dry and wet high stress conditions. High color quality lighting metrics can easily be achieved using these narrow, tunable QD downconverters: CRI values of Ra > 90 as well as R9 values > 80 are readily available when combining QDs with green phosphors. Furthermore, we show that QDs afford a 15% increase in overall efficiency compared to traditional phosphor downconverted SSL devices. The fundamental limit of QD linewidth is examined through single particle QD emission studies. Using standard Cd-based QD synthesis, it is found that single particle linewidths of 20 nm FWHM represent a lower limit to the narrowness of QD emission in the near term.

  17. Laser Doppler Blood Flow Imaging Using a CMOS Imaging Sensor with On-Chip Signal Processing

    Directory of Open Access Journals (Sweden)

    Cally Gill

    2013-09-01

    Full Text Available The first fully integrated 2D CMOS imaging sensor with on-chip signal processing for applications in laser Doppler blood flow (LDBF imaging has been designed and tested. To obtain a space efficient design over 64 × 64 pixels means that standard processing electronics used off-chip cannot be implemented. Therefore the analog signal processing at each pixel is a tailored design for LDBF signals with balanced optimization for signal-to-noise ratio and silicon area. This custom made sensor offers key advantages over conventional sensors, viz. the analog signal processing at the pixel level carries out signal normalization; the AC amplification in combination with an anti-aliasing filter allows analog-to-digital conversion with a low number of bits; low resource implementation of the digital processor enables on-chip processing and the data bottleneck that exists between the detector and processing electronics has been overcome. The sensor demonstrates good agreement with simulation at each design stage. The measured optical performance of the sensor is demonstrated using modulated light signals and in vivo blood flow experiments. Images showing blood flow changes with arterial occlusion and an inflammatory response to a histamine skin-prick demonstrate that the sensor array is capable of detecting blood flow signals from tissue.

  18. A full on-chip CMOS low-dropout voltage regulator with VCCS compensation

    Energy Technology Data Exchange (ETDEWEB)

    Gao Leisheng; Zhou Yumei; Wu Bin; Jiang Jianhua, E-mail: gaoleisheng@ime.ac.c [Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029 (China)

    2010-08-15

    A full on-chip CMOS low-dropout (LDO) voltage regulator with high PSR is presented. Instead of relying on the zero generated by the load capacitor and its equivalent series resistance, the proposed LDO generates a zero by voltage-controlled current sources for stability. The compensating capacitor for the proposed scheme is only 0.18 pF, which is much smaller than the capacitor of the conventional compensation scheme. The full on-chip LDO was fabricated in commercial 0.35 {mu}m CMOS technology. The active chip area of the LDO (including the bandgap voltage reference) is 400 x 270 {mu}m{sup 2}. Experimental results show that the PSR of the LDO is -58.7 dB at a frequency of 10 Hz and -20 dB at a frequency of 1 MHz. The proposed LDO is capable of sourcing an output current up to 50 mA. (semiconductor integrated circuits)

  19. A full on-chip CMOS low-dropout voltage regulator with VCCS compensation

    International Nuclear Information System (INIS)

    Gao Leisheng; Zhou Yumei; Wu Bin; Jiang Jianhua

    2010-01-01

    A full on-chip CMOS low-dropout (LDO) voltage regulator with high PSR is presented. Instead of relying on the zero generated by the load capacitor and its equivalent series resistance, the proposed LDO generates a zero by voltage-controlled current sources for stability. The compensating capacitor for the proposed scheme is only 0.18 pF, which is much smaller than the capacitor of the conventional compensation scheme. The full on-chip LDO was fabricated in commercial 0.35 μm CMOS technology. The active chip area of the LDO (including the bandgap voltage reference) is 400 x 270 μm 2 . Experimental results show that the PSR of the LDO is -58.7 dB at a frequency of 10 Hz and -20 dB at a frequency of 1 MHz. The proposed LDO is capable of sourcing an output current up to 50 mA. (semiconductor integrated circuits)

  20. Laser doppler blood flow imaging using a CMOS imaging sensor with on-chip signal processing.

    Science.gov (United States)

    He, Diwei; Nguyen, Hoang C; Hayes-Gill, Barrie R; Zhu, Yiqun; Crowe, John A; Gill, Cally; Clough, Geraldine F; Morgan, Stephen P

    2013-09-18

    The first fully integrated 2D CMOS imaging sensor with on-chip signal processing for applications in laser Doppler blood flow (LDBF) imaging has been designed and tested. To obtain a space efficient design over 64 × 64 pixels means that standard processing electronics used off-chip cannot be implemented. Therefore the analog signal processing at each pixel is a tailored design for LDBF signals with balanced optimization for signal-to-noise ratio and silicon area. This custom made sensor offers key advantages over conventional sensors, viz. the analog signal processing at the pixel level carries out signal normalization; the AC amplification in combination with an anti-aliasing filter allows analog-to-digital conversion with a low number of bits; low resource implementation of the digital processor enables on-chip processing and the data bottleneck that exists between the detector and processing electronics has been overcome. The sensor demonstrates good agreement with simulation at each design stage. The measured optical performance of the sensor is demonstrated using modulated light signals and in vivo blood flow experiments. Images showing blood flow changes with arterial occlusion and an inflammatory response to a histamine skin-prick demonstrate that the sensor array is capable of detecting blood flow signals from tissue.

  1. High-performance, scalable optical network-on-chip architectures

    Science.gov (United States)

    Tan, Xianfang

    The rapid advance of technology enables a large number of processing cores to be integrated into a single chip which is called a Chip Multiprocessor (CMP) or a Multiprocessor System-on-Chip (MPSoC) design. The on-chip interconnection network, which is the communication infrastructure for these processing cores, plays a central role in a many-core system. With the continuously increasing complexity of many-core systems, traditional metallic wired electronic networks-on-chip (NoC) became a bottleneck because of the unbearable latency in data transmission and extremely high energy consumption on chip. Optical networks-on-chip (ONoC) has been proposed as a promising alternative paradigm for electronic NoC with the benefits of optical signaling communication such as extremely high bandwidth, negligible latency, and low power consumption. This dissertation focus on the design of high-performance and scalable ONoC architectures and the contributions are highlighted as follow: 1. A micro-ring resonator (MRR)-based Generic Wavelength-routed Optical Router (GWOR) is proposed. A method for developing any sized GWOR is introduced. GWOR is a scalable non-blocking ONoC architecture with simple structure, low cost and high power efficiency compared to existing ONoC designs. 2. To expand the bandwidth and improve the fault tolerance of the GWOR, a redundant GWOR architecture is designed by cascading different type of GWORs into one network. 3. The redundant GWOR built with MRR-based comb switches is proposed. Comb switches can expand the bandwidth while keep the topology of GWOR unchanged by replacing the general MRRs with comb switches. 4. A butterfly fat tree (BFT)-based hybrid optoelectronic NoC (HONoC) architecture is developed in which GWORs are used for global communication and electronic routers are used for local communication. The proposed HONoC uses less numbers of electronic routers and links than its counterpart of electronic BFT-based NoC. It takes the advantages of

  2. Deterministic analyze of the 'loss of the UK system' (complementary circuits of the assured cooling capability) APS sequence, in the CAN-I

    International Nuclear Information System (INIS)

    Ventura, Mirta A.

    2004-01-01

    The accidental sequences corresponding to the initiating events associated to T15 group are modeled. This group is defined in the Probabilistic Risk Assessment final report. The code used was RELAP5/MOD3. The representative event of the group is the complete loss of UK system, the complementary safety cooling system of the CNA-I. The transient determined from different availability conditions of systems involved in the event is analyzed. Besides the initiating event, the results coming from the event tree heading failures are also studied. Finally, the sequences corresponding to safe shutdown of the plant, and the sequences involved in core damage are determined. Except a case, the results agree with the event tree foresighted in the APS. This suggests a more detailed study in order to discern if it is a modeling problem or if it is a physics phenomenon no considered in the APS. (author)

  3. Nuclear demagnetisation cooling of a nanoelectronic device

    Science.gov (United States)

    Jones, Alex; Bradley, Ian; Guénault, Tony; Gunnarsson, David; Haley, Richard; Holt, Stephen; Pashkin, Yuri; Penttilä, Jari; Prance, Jonathan; Prunnila, Mika; Roschier, Leif

    We present a new technique for on-chip cooling of electrons in a nanostructure: nuclear demagnetisation of on-chip, thin-film copper refrigerant. We are motivated by the potential improvement in the operation of nanoelectronic devices below 10 mK . At these temperatures, weak electron-phonon coupling hinders traditional cooling, yet here gives the advantage of thermal isolation between the environment and the on-chip electrons, enabling cooling significantly below the base temperature of the host lattice. To demonstrate this we electroplate copper onto the metallic islands of a Coulomb blockade thermometer (CBT), and hence provide a direct thermal link between the cooled copper nuclei and the device electrons. The CBT provides primary thermometry of its internal electron temperature, and we use this to monitor the cooling. Using an optimised demagnetisation profile we observe the electrons being cooled from 9 mK to 4 . 5 mK , and remaining below 5 mK for an experimentally useful time of 1200 seconds. We also suggest how this technique can be used to achieve sub- 1 mK electron temperatures without the use of elaborate bulk demagnetisation stages.

  4. A viable on-chip FPGA configuration memory scrubbing approach for CBM-ToF

    Energy Technology Data Exchange (ETDEWEB)

    Oancea, Andrei-Dumitru; Stuellein, Christian; Manz, Sebastian; Gebelein, Jano; Kebschull, Udo [Infrastruktur und Rechnersysteme in der Informationsverarbeitung (IRI), Goethe-Universitaet, Senckenberganlage 31, 60325 Frankfurt am Main (Germany); Collaboration: CBM-Collaboration

    2015-07-01

    The ToF Detector of the CBM Experiment will be equipped with FPGA-based read-out boards (ROBs). These ROBs will be operated in a radiation environment, and therefore need a mitigation mechanism against soft errors in the SRAM-based configuration memories of the FPGAs. The proposed approach combines intrinsic on-chip single upset correction with extrinsic selective frame scrubbing for multiple-bit upsets. The slow control is realized using the GBT-SCA, which is capable of handling interrupts. This enables the new approach of event-driven configuration frame correction. While conventional blind scrubbing leads to a continuous load on the control path, the selective frame scrubbing reduces this load to a minimum. For verification purposes, radiation tests with a proton beam were performed at COSY, Juelich. The occurred soft errors were classified into single and multiple- bit upsets, enabling an estimation of the rate at which extrinsic intervention is necessary.

  5. Time-Predictable Communication on a Time-Division Multiplexing Network-on-Chip Multicore

    DEFF Research Database (Denmark)

    Sørensen, Rasmus Bo

    This thesis presents time-predictable inter-core communication on a multicore platform with a time-division multiplexing (TDM) network-on-chip (NoC) for hard real-time systems. The thesis is structured as a collection of papers that contribute within the areas of: reconfigurable TDM NoCs, static...... TDM scheduling, and time-predictable inter-core communication. More specifically, the work presented in this thesis investigates the interaction between hardware and software involved in time-predictable inter-core communication on the multicore platform. The thesis presents: a new generation...... of the Argo NoC network interface (NI) that supports instantaneous reconfiguration, a TDM traffic scheduler that generates virtual circuit (VC) configurations for the Argo NoC, and software functions for two types of intercore communication. The new generation of the Argo NoC adds the capability...

  6. Biosensors in Health Care: The Milestones Achieved in Their Development towards Lab-on-Chip-Analysis

    Directory of Open Access Journals (Sweden)

    Suprava Patel

    2016-01-01

    Full Text Available Immense potentiality of biosensors in medical diagnostics has driven scientists in evolution of biosensor technologies and innovating newer tools in time. The cornerstone of the popularity of biosensors in sensing wide range of biomolecules in medical diagnostics is due to their simplicity in operation, higher sensitivity, ability to perform multiplex analysis, and capability to be integrated with different function by the same chip. There remains a huge challenge to meet the demands of performance and yield to its simplicity and affordability. Ultimate goal stands for providing point-of-care testing facility to the remote areas worldwide, particularly the developing countries. It entails continuous development in technology towards multiplexing ability, fabrication, and miniaturization of biosensor devices so that they can provide lab-on-chip-analysis systems to the community.

  7. Custom Topology Generation for Network-on-Chip

    DEFF Research Database (Denmark)

    Stuart, Matthias Bo; Sparsø, Jens

    2007-01-01

    This paper compares simulated annealing and tabu search for generating custom topologies for applications with periodic behaviour executing on a network-on-chip. The approach differs from previous work by starting from a fixed mapping of IP-cores to routers and performing design space exploration...... around an initial topology. The tabu search has been modified from its normally encountered form to allow easier escaping from local minima. A number of synthetic benchmarks are used for tuning the parameters of both heuristics and for testing the quality of the solutions each heuristic produces...

  8. A Time-predictable Memory Network-on-Chip

    DEFF Research Database (Denmark)

    Schoeberl, Martin; Chong, David VH; Puffitsch, Wolfgang

    2014-01-01

    To derive safe bounds on worst-case execution times (WCETs), all components of a computer system need to be time-predictable: the processor pipeline, the caches, the memory controller, and memory arbitration on a multicore processor. This paper presents a solution for time-predictable memory...... arbitration and access for chip-multiprocessors. The memory network-on-chip is organized as a tree with time-division multiplexing (TDM) of accesses to the shared memory. The TDM based arbitration completely decouples processor cores and allows WCET analysis of the memory accesses on individual cores without...

  9. Multicore systems on-chip practical software/hardware design

    CERN Document Server

    Abdallah, Abderazek Ben

    2013-01-01

    System on chips designs have evolved from fairly simple unicore, single memory designs to complex heterogeneous multicore SoC architectures consisting of a large number of IP blocks on the same silicon. To meet high computational demands posed by latest consumer electronic devices, most current systems are based on such paradigm, which represents a real revolution in many aspects in computing.The attraction of multicore processing for power reduction is compelling. By splitting a set of tasks among multiple processor cores, the operating frequency necessary for each core can be reduced, allowi

  10. System on chip module configured for event-driven architecture

    Science.gov (United States)

    Robbins, Kevin; Brady, Charles E.; Ashlock, Tad A.

    2017-10-17

    A system on chip (SoC) module is described herein, wherein the SoC modules comprise a processor subsystem and a hardware logic subsystem. The processor subsystem and hardware logic subsystem are in communication with one another, and transmit event messages between one another. The processor subsystem executes software actors, while the hardware logic subsystem includes hardware actors, the software actors and hardware actors conform to an event-driven architecture, such that the software actors receive and generate event messages and the hardware actors receive and generate event messages.

  11. Advancing Software Development for a Multiprocessor System-on-Chip

    Directory of Open Access Journals (Sweden)

    Stephen Bique

    2007-06-01

    Full Text Available A low-level language is the right tool to develop applications for some embedded systems. Notwithstanding, a high-level language provides a proper environment to develop the programming tools. The target device is a system-on-chip consisting of an array of processors with only local communication. Applications include typical streaming applications for digital signal processing. We describe the hardware model and stress the advantages of a flexible device. We introduce IDEA, a graphical integrated development environment for an array. A proper foundation for software development is a UML and standard programming abstractions in object-oriented languages.

  12. Self-powered integrated systems-on-chip (energy chip)

    KAUST Repository

    Hussain, Muhammad Mustafa

    2010-04-23

    In today\\'s world, consumer driven technology wants more portable electronic gadgets to be developed, and the next big thing in line is self-powered handheld devices. Therefore to reduce the power consumption as well as to supply sufficient power to run those devices, several critical technical challenges need to be overcome: a. Nanofabrication of macro/micro systems which incorporates the direct benefit of light weight (thus portability), low power consumption, faster response, higher sensitivity and batch production (low cost). b. Integration of advanced nano-materials to meet the performance/cost benefit trend. Nano-materials may offer new functionalities that were previously underutilized in the macro/micro dimension. c. Energy efficiency to reduce power consumption and to supply enough power to meet that low power demand. We present a pragmatic perspective on a self-powered integrated System on Chip (SoC). We envision the integrated device will have two objectives: low power consumption/dissipation and on-chip power generation for implementation into handheld or remote technologies for defense, space, harsh environments and medical applications. This paper provides insight on materials choices, intelligent circuit design, and CMOS compatible integration.

  13. 3D Printing of Organs-On-Chips

    Science.gov (United States)

    Yi, Hee-Gyeong; Lee, Hyungseok; Cho, Dong-Woo

    2017-01-01

    Organ-on-a-chip engineering aims to create artificial living organs that mimic the complex and physiological responses of real organs, in order to test drugs by precisely manipulating the cells and their microenvironments. To achieve this, the artificial organs should to be microfabricated with an extracellular matrix (ECM) and various types of cells, and should recapitulate morphogenesis, cell differentiation, and functions according to the native organ. A promising strategy is 3D printing, which precisely controls the spatial distribution and layer-by-layer assembly of cells, ECMs, and other biomaterials. Owing to this unique advantage, integration of 3D printing into organ-on-a-chip engineering can facilitate the creation of micro-organs with heterogeneity, a desired 3D cellular arrangement, tissue-specific functions, or even cyclic movement within a microfluidic device. Moreover, fully 3D-printed organs-on-chips more easily incorporate other mechanical and electrical components with the chips, and can be commercialized via automated massive production. Herein, we discuss the recent advances and the potential of 3D cell-printing technology in engineering organs-on-chips, and provides the future perspectives of this technology to establish the highly reliable and useful drug-screening platforms. PMID:28952489

  14. 3D Printing of Organs-On-Chips.

    Science.gov (United States)

    Yi, Hee-Gyeong; Lee, Hyungseok; Cho, Dong-Woo

    2017-01-25

    Organ-on-a-chip engineering aims to create artificial living organs that mimic the complex and physiological responses of real organs, in order to test drugs by precisely manipulating the cells and their microenvironments. To achieve this, the artificial organs should to be microfabricated with an extracellular matrix (ECM) and various types of cells, and should recapitulate morphogenesis, cell differentiation, and functions according to the native organ. A promising strategy is 3D printing, which precisely controls the spatial distribution and layer-by-layer assembly of cells, ECMs, and other biomaterials. Owing to this unique advantage, integration of 3D printing into organ-on-a-chip engineering can facilitate the creation of micro-organs with heterogeneity, a desired 3D cellular arrangement, tissue-specific functions, or even cyclic movement within a microfluidic device. Moreover, fully 3D-printed organs-on-chips more easily incorporate other mechanical and electrical components with the chips, and can be commercialized via automated massive production. Herein, we discuss the recent advances and the potential of 3D cell-printing technology in engineering organs-on-chips, and provides the future perspectives of this technology to establish the highly reliable and useful drug-screening platforms.

  15. 3D Printing of Organs-On-Chips

    Directory of Open Access Journals (Sweden)

    Hee-Gyeong Yi

    2017-01-01

    Full Text Available Organ-on-a-chip engineering aims to create artificial living organs that mimic the complex and physiological responses of real organs, in order to test drugs by precisely manipulating the cells and their microenvironments. To achieve this, the artificial organs should to be microfabricated with an extracellular matrix (ECM and various types of cells, and should recapitulate morphogenesis, cell differentiation, and functions according to the native organ. A promising strategy is 3D printing, which precisely controls the spatial distribution and layer-by-layer assembly of cells, ECMs, and other biomaterials. Owing to this unique advantage, integration of 3D printing into organ-on-a-chip engineering can facilitate the creation of micro-organs with heterogeneity, a desired 3D cellular arrangement, tissue-specific functions, or even cyclic movement within a microfluidic device. Moreover, fully 3D-printed organs-on-chips more easily incorporate other mechanical and electrical components with the chips, and can be commercialized via automated massive production. Herein, we discuss the recent advances and the potential of 3D cell-printing technology in engineering organs-on-chips, and provides the future perspectives of this technology to establish the highly reliable and useful drug-screening platforms.

  16. A Miniaturized On-Chip Colorimeter for Detecting NPK Elements.

    Science.gov (United States)

    Liu, Rui-Tao; Tao, Lu-Qi; Liu, Bo; Tian, Xiang-Guang; Mohammad, Mohammad Ali; Yang, Yi; Ren, Tian-Ling

    2016-08-04

    Recently, precision agriculture has become a globally attractive topic. As one of the most important factors, the soil nutrients play an important role in estimating the development of precision agriculture. Detecting the content of nitrogen, phosphorus and potassium (NPK) elements more efficiently is one of the key issues. In this paper, a novel chip-level colorimeter was fabricated to detect the NPK elements for the first time. A light source-microchannel photodetector in a sandwich structure was designed to realize on-chip detection. Compared with a commercial colorimeter, all key parts are based on MEMS (Micro-Electro-Mechanical System) technology so that the volume of this on-chip colorimeter can be minimized. Besides, less error and high precision are achieved. The cost of this colorimeter is two orders of magnitude less than that of a commercial one. All these advantages enable a low-cost and high-precision sensing operation in a monitoring network. The colorimeter developed herein has bright prospects for environmental and biological applications.

  17. Self-powered integrated systems-on-chip (energy chip)

    Science.gov (United States)

    Hussain, M. M.; Fahad, H.; Rojas, J.; Hasan, M.; Talukdar, A.; Oommen, J.; Mink, J.

    2010-04-01

    In today's world, consumer driven technology wants more portable electronic gadgets to be developed, and the next big thing in line is self-powered handheld devices. Therefore to reduce the power consumption as well as to supply sufficient power to run those devices, several critical technical challenges need to be overcome: a. Nanofabrication of macro/micro systems which incorporates the direct benefit of light weight (thus portability), low power consumption, faster response, higher sensitivity and batch production (low cost). b. Integration of advanced nano-materials to meet the performance/cost benefit trend. Nano-materials may offer new functionalities that were previously underutilized in the macro/micro dimension. c. Energy efficiency to reduce power consumption and to supply enough power to meet that low power demand. We present a pragmatic perspective on a self-powered integrated System on Chip (SoC). We envision the integrated device will have two objectives: low power consumption/dissipation and on-chip power generation for implementation into handheld or remote technologies for defense, space, harsh environments and medical applications. This paper provides insight on materials choices, intelligent circuit design, and CMOS compatible integration.

  18. On-Chip Correlator for Passive Wireless SAW Multisensor Systems

    Directory of Open Access Journals (Sweden)

    Liqiang Xie

    2016-01-01

    Full Text Available For decoding the asynchronous superposition of response signals from different sensors, it is a challenge to achieve correlation in a code division multiplexing (CDM based passive wireless surface acoustic wave (SAW multisensor system. Therefore, an on-chip correlator scheme is developed in this paper. In contrast to conventional CDM-based systems, this novel scheme enables the correlations to be operated at the SAW sensors, instead of the reader. Thus, the response signals arriving at the reader are the result of cross-correlation on the chips. It is then easy for the reader to distinguish the sensor that is matched with the interrogating signal. The operation principle, signal analysis, and simulation of the novel scheme are described in the paper. The simulation results show the response signals from the correlations of the sensors. A clear spike pulse is presented in the response signals, when a sensor code is matched with the interrogating code. Simulations verify the feasibility of the on-chip correlator concept.

  19. On-chip enucleation of an oocyte by untethered microrobots

    International Nuclear Information System (INIS)

    Ichikawa, Akihiko; Sakuma, Shinya; Sugita, Masakuni; Shoda, Tatsuro; Tamakoshi, Takahiro; Arai, Fumihito; Akagi, Satoshi

    2014-01-01

    We propose a novel on-chip enucleation of an oocyte with zona pellucida by using a combination of untethered microrobots. To achieve enucleation within the closed space of a microfluidic chip, two microrobots, a microknife and a microgripper were integrated into the microfluidic chip. These microrobots were actuated by an external magnetic force produced by permanent magnets placed on the robotic stage. The tip of the microknife was designed by considering the biological geometric feature of an oocyte, i.e. the oocyte has a polar body in maturation stage II. Moreover, the microknife was fabricated by using grayscale lithography, which allows fabrication of three-dimensional microstructures. The microgripper has a gripping function that is independent of the driving mechanism. On-chip enucleation was demonstrated, and the enucleated oocytes are spherical, indicating that the cell membrane of the oocytes remained intact. To confirm successful enucleation using this method, we investigated the viability of oocytes after enucleation. The results show that the production rate, i.e. the ratio between the number of oocytes that reach the blastocyst stage and the number of bovine oocytes after nucleus transfer, is 100%. The technique will contribute to complex cell manipulation such as cell surgery in lab-on-a-chip devices. (paper)

  20. Synthesis of on-chip control circuits for mVLSI biochips

    DEFF Research Database (Denmark)

    Potluri, Seetal; Schneider, Alexander Rüdiger; Hørslev-Petersen, Martin

    2017-01-01

    them to laboratory environments. To address this issue, researchers have proposed methods to reduce the number of offchip pressure sources, through integration of on-chip pneumatic control logic circuits fabricated using three-layer monolithic membrane valve technology. Traditionally, mVLSI biochip......-chip control circuit design and (iii) the integration of on-chip control in the placement and routing design tasks. In this paper we present a design methodology for logic synthesis and physical synthesis of mVLSI biochips that use on-chip control. We show how the proposed methodology can be successfully...... applied to generate biochip layouts with integrated on-chip pneumatic control....

  1. Cooling techniques

    International Nuclear Information System (INIS)

    Moeller, S.P.

    1994-01-01

    After an introduction to the general concepts of cooling of charged particle beams, some specific cooling methods are discussed, namely stochastic, electron and laser cooling. The treatment concentrates on the physical ideas of the cooling methods and only very crude derivations of cooling times are given. At the end three other proposed cooling schemes are briefly discussed. (orig.)

  2. Lab-on-chip components for molecular detection

    Science.gov (United States)

    Adam, Tijjani; Dhahi, Th S.; Mohammed, Mohammed; Hashim, U.; Noriman, N. Z.; Dahham, Omar S.

    2017-09-01

    We successfully fabricated Lab on chip components and integrated for possible use in biomedical application. The sensor was fabricated by using conventional photolithography method integrated with PDMS micro channels for smooth delivery of sample to the sensing domain. The sensor was silanized and aminated with 3-Aminopropyl triethoxysilane (APTES) to functionalize the surface with biomolecules and create molecular binding chemistry. The resulting Si-O-Si- components were functionalized with oligonucleotides probe of HPV, which interacted with the single stranded HPV DNA target to create a field across on the device. The fabrication, immobilization and hybridization processes were characterized with current voltage (I-V) characterization (KEITHLEY, 6487). The sensor show selectivity for the HPV DNA target in a linear range from concentration 0.1 nM to 1 µM. This strategy presented a simple, rapid and sensitive platform for HPV detection and would become a powerful tool for pathogenic microorganisms screening in clinical diagnosis.

  3. Various on-chip sensors with microfluidics for biological applications.

    Science.gov (United States)

    Lee, Hun; Xu, Linfeng; Koh, Domin; Nyayapathi, Nikhila; Oh, Kwang W

    2014-09-12

    In this paper, we review recent advances in on-chip sensors integrated with microfluidics for biological applications. Since the 1990s, much research has concentrated on developing a sensing system using optical phenomena such as surface plasmon resonance (SPR) and surface-enhanced Raman scattering (SERS) to improve the sensitivity of the device. The sensing performance can be significantly enhanced with the use of microfluidic chips to provide effective liquid manipulation and greater flexibility. We describe an optical image sensor with a simpler platform for better performance over a larger field of view (FOV) and greater depth of field (DOF). As a new trend, we review consumer electronics such as smart phones, tablets, Google glasses, etc. which are being incorporated in point-of-care (POC) testing systems. In addition, we discuss in detail the current optical sensing system integrated with a microfluidic chip.

  4. Various On-Chip Sensors with Microfluidics for Biological Applications

    Directory of Open Access Journals (Sweden)

    Hun Lee

    2014-09-01

    Full Text Available In this paper, we review recent advances in on-chip sensors integrated with microfluidics for biological applications. Since the 1990s, much research has concentrated on developing a sensing system using optical phenomena such as surface plasmon resonance (SPR and surface-enhanced Raman scattering (SERS to improve the sensitivity of the device. The sensing performance can be significantly enhanced with the use of microfluidic chips to provide effective liquid manipulation and greater flexibility. We describe an optical image sensor with a simpler platform for better performance over a larger field of view (FOV and greater depth of field (DOF. As a new trend, we review consumer electronics such as smart phones, tablets, Google glasses, etc. which are being incorporated in point-of-care (POC testing systems. In addition, we discuss in detail the current optical sensing system integrated with a microfluidic chip.

  5. Network on chip master control board for neutron acquisition

    International Nuclear Information System (INIS)

    Ruiz-Martinez, E.; Mary, T.; Mutti, P.; Ratel, J.; Rey, F.

    2012-01-01

    The acquisition master control board is designed to assemble the various acquisition modes in use at the Institut Laue-Langevin (ILL). The main goal is to make the card common for all the ILL's instruments in a simple, modular and open way, giving the possibility to add new functionalities in order to follow the evolving demand. It has been necessary to define a central element to provide synchronization to the rest of the units. The backbone of the proposed acquisition control system is the denominated master acquisition board. The master board consists on a VME64X configurable high density I/O connection carrier board based on the latest Xilinx Virtex-6T FPGA. The internal architecture of the FPGA is designed as a Network on Chip (NoC) approach. The complete system also includes a display board and n histogram modules for live display of the data from the detectors. (authors)

  6. On-chip RF-to-optical transducer

    DEFF Research Database (Denmark)

    Simonsen, Anders; Tsaturyan, Yeghishe; Seis, Yannick

    2016-01-01

    these diverse systems, plus technologies that utilize them, and the mature toolbox of optical techniques that routinely operates at the quantum limit. In a previous work [1], we demonstrated such a bridge by realizing simultaneous coupling between an electronic LC circuit and a quantum-noise limited optical...... noise temperatures far below the actual temperature of the mechanical element. On-chip integration of the electrical, mechanical and optical elements is necessary for an implementation of the transduction scheme that is viable for commercial applications. Reliable assembly of a strongly coupled...... electromechanical device, and inclusion of an optical cavity for enhanced optical readout, are key features of the new platform. Both can be achieved with standard cleanroom fabrication techniques. We will furthermore present ongoing work to couple our transducer to an RF or microwave antenna, for low...

  7. Near-Field, On-Chip Optical Brownian Ratchets.

    Science.gov (United States)

    Wu, Shao-Hua; Huang, Ningfeng; Jaquay, Eric; Povinelli, Michelle L

    2016-08-10

    Nanoparticles in aqueous solution are subject to collisions with solvent molecules, resulting in random, Brownian motion. By breaking the spatiotemporal symmetry of the system, the motion can be rectified. In nature, Brownian ratchets leverage thermal fluctuations to provide directional motion of proteins and enzymes. In man-made systems, Brownian ratchets have been used for nanoparticle sorting and manipulation. Implementations based on optical traps provide a high degree of tunability along with precise spatiotemporal control. Here, we demonstrate an optical Brownian ratchet based on the near-field traps of an asymmetrically patterned photonic crystal. The system yields over 25 times greater trap stiffness than conventional optical tweezers. Our technique opens up new possibilities for particle manipulation in a microfluidic, lab-on-chip environment.

  8. Cache-aware network-on-chip for chip multiprocessors

    Science.gov (United States)

    Tatas, Konstantinos; Kyriacou, Costas; Dekoulis, George; Demetriou, Demetris; Avraam, Costas; Christou, Anastasia

    2009-05-01

    This paper presents the hardware prototype of a Network-on-Chip (NoC) for a chip multiprocessor that provides support for cache coherence, cache prefetching and cache-aware thread scheduling. A NoC with support to these cache related mechanisms can assist in improving systems performance by reducing the cache miss ratio. The presented multi-core system employs the Data-Driven Multithreading (DDM) model of execution. In DDM thread scheduling is done according to data availability, thus the system is aware of the threads to be executed in the near future. This characteristic of the DDM model allows for cache aware thread scheduling and cache prefetching. The NoC prototype is a crossbar switch with output buffering that can support a cache-aware 4-node chip multiprocessor. The prototype is built on the Xilinx ML506 board equipped with a Xilinx Virtex-5 FPGA.

  9. A Hardware Framework for on-Chip FPGA Acceleration

    DEFF Research Database (Denmark)

    Lomuscio, Andrea; Cardarilli, Gian Carlo; Nannarelli, Alberto

    2016-01-01

    In this work, we present a new framework to dynamically load hardware accelerators on reconfigurable platforms (FPGAs). Provided a library of application-specific processors, we load on-the-fly the specific processor in the FPGA, and we transfer the execution from the CPU to the FPGA-based accele......In this work, we present a new framework to dynamically load hardware accelerators on reconfigurable platforms (FPGAs). Provided a library of application-specific processors, we load on-the-fly the specific processor in the FPGA, and we transfer the execution from the CPU to the FPGA......-based accelerator. Results show that significant speed-up can be obtained by the proposed acceleration framework on system-on-chips where reconfigurable fabric is placed next to the CPUs. The speed-up is due to both the intrinsic acceleration in the application-specific processors, and to the increased parallelism....

  10. On-Chip generation of polymer microcapsules through droplet coalescence

    Science.gov (United States)

    Eqbal, Md Danish; Gundabala, Venkat; Gundabala lab Team

    Alginate microbeads and microcapsules have numerous applications in drug delivery, tissue engineering and other biomedical areas due to their unique properties. Microcapsules with liquid core are of particular interest in the area of cell encapsulation. Various methods such as coacervation, emulsification, micro-nozzle, etc. exist for the generation of microbeads and microcapsules. However, these methods have several drawbacks like coagulation, non-uniformity, and polydispersity. In this work we present a method for complete on chip generation of alginate microcapsules (single core as well as double core) through the use of droplet merging technique. For this purpose, a combined Coflow and T-junction configuration is implemented in a hybrid glass-PDMS (Polydimethylsiloxane) microfluidic device. Efficient generation is achieved through precise matching of the generation rates of the coalescing drops. Through this approach, microcapsules with intact single and double (liquid) cores surrounded by alginate shell have been successfully generated and characterized.

  11. Endocrine system on chip for a diabetes treatment model.

    Science.gov (United States)

    Nguyen, Dao Thi Thuy; van Noort, Danny; Jeong, In-Kyung; Park, Sungsu

    2017-02-21

    The endocrine system is a collection of glands producing hormones which, among others, regulates metabolism, growth and development. One important group of endocrine diseases is diabetes, which is caused by a deficiency or diminished effectiveness of endogenous insulin. By using a microfluidic perfused 3D cell-culture chip, we developed an 'endocrine system on chip' to potentially be able to screen drugs for the treatment of diabetes by measuring insulin release over time. Insulin-secreting β-cells are located in the pancreas, while L-cells, located in the small intestines, stimulate insulin secretion. Thus, we constructed a co-culture of intestinal-pancreatic cells to measure the effect of glucose on the production of glucagon-like peptide-1 (GLP-1) from the L-cell line (GLUTag) and insulin from the pancreatic β-cell line (INS-1). After three days of culture, both cell lines formed aggregates, exhibited 3D cell morphology, and showed good viability (>95%). We separately measured the dynamic profile of GLP-1 and insulin release at glucose concentrations of 0.5 and 20 mM, as well as the combined effect of GLP-1 on insulin production at these glucose concentrations. In response to glucose stimuli, GLUTag and INS-1 cells produced higher amounts of GLP-1 and insulin, respectively, compared to a static 2D cell culture. INS-1 combined with GLUTag cells exhibited an even higher insulin production in response to glucose stimulation. At higher glucose concentrations, the diabetes model on chip showed faster saturation of the insulin level. Our results suggest that the endocrine system developed in this study is a useful tool for observing dynamical changes in endocrine hormones (GLP-1 and insulin) in a glucose-dependent environment. Moreover, it can potentially be used to screen GLP-1 analogues and natural insulin and GLP-1 stimulants for diabetes treatment.

  12. Capability Paternalism

    NARCIS (Netherlands)

    Claassen, R.J.G.|info:eu-repo/dai/nl/269266224

    A capability approach prescribes paternalist government actions to the extent that it requires the promotion of specific functionings, instead of the corresponding capabilities. Capability theorists have argued that their theories do not have much of these paternalist implications, since promoting

  13. Optimizing the on-chip communication architecture of low power Systems-on-Chip in Deep Sub-Micron technology

    OpenAIRE

    Leroy, Anthony

    2006-01-01

    Ce mémoire traite des systèmes intégrés sur puce (System-on-Chip) à faible consommation d'énergie tels que ceux qui seront utilisés dans les équipements portables de future génération (ordinateurs de poche (PDA), téléphones mobiles). S'agissant d'équipements alimentés par des batteries, la consommation énergétique est un problème critique. Ces plateformes contiendront probablement une douzaine de coeurs de processeur et une quantité importante de mémoire embarquée. Une architecture de communi...

  14. Superconducting Switch for Fast On-Chip Routing of Quantum Microwave Fields

    Science.gov (United States)

    Pechal, M.; Besse, J.-C.; Mondal, M.; Oppliger, M.; Gasparinetti, S.; Wallraff, A.

    2016-08-01

    A switch capable of routing microwave signals at cryogenic temperatures is a desirable component for state-of-the-art experiments in many fields of applied physics, including but not limited to quantum-information processing, communication, and basic research in engineered quantum systems. Conventional mechanical switches provide low insertion loss but disturb operation of dilution cryostats and the associated experiments by heat dissipation. Switches based on semiconductors or microelectromechanical systems have a lower thermal budget but are not readily integrated with current superconducting circuits. Here we design and test an on-chip switch built by combining tunable transmission-line resonators with microwave beam splitters. The device is superconducting and as such dissipates a negligible amount of heat. It is compatible with current superconducting circuit fabrication techniques, operates with a bandwidth exceeding 100 MHz, is capable of handling photon fluxes on the order of 1 05 μ s-1 , equivalent to powers exceeding -90 dBm , and can be switched within approximately 6-8 ns. We successfully demonstrate operation of the device in the quantum regime by integrating it on a chip with a single-photon source and using it to route nonclassical itinerant microwave fields at the single-photon level.

  15. Electroforming of Bi(1-x)Sb(x) nanowires for high-efficiency micro-thermoelectric cooling devices on a chip.

    Energy Technology Data Exchange (ETDEWEB)

    Overmyer, Donald L.; Webb, Edmund Blackburn, III (,; ); Siegal, Michael P.; Yelton, William Graham

    2006-11-01

    Active cooling of electronic systems for space-based and terrestrial National Security missions has demanded use of Stirling, reverse-Brayton, closed Joule-Thompson, pulse tube and more elaborate refrigeration cycles. Such cryocoolers are large systems that are expensive, demand large powers, often contain moving parts and are difficult to integrate with electronic systems. On-chip, solid-state, active cooling would greatly enhance the capabilities of future systems by reducing the size, cost and inefficiencies compared to existing solutions. We proposed to develop the technology for a thermoelectric cooler capable of reaching 77K by replacing bulk thermoelectric materials with arrays of Bi{sub 1-x}Sb{sub x} nanowires. Furthermore, the Sandia-developed technique we will use to produce the oriented nanowires occurs at room temperature and can be applied directly to a silicon substrate. Key obstacles include (1) optimizing the Bi{sub 1-x}Sb{sub x} alloy composition for thermoelectric properties; (2) increasing wire aspect ratios to 3000:1; and (3) increasing the array density to {ge} 10{sup 9} wires/cm{sup 2}. The primary objective of this LDRD was to fabricate and test the thermoelectric properties of arrays of Bi{sub 1-x}Sb{sub x} nanowires. With this proof-of-concept data under our belts we are positioned to engage National Security systems customers to invest in the integration of on-chip thermoelectric coolers for future missions.

  16. A scalable single-chip multi-processor architecture with on-chip RTOS kernel

    NARCIS (Netherlands)

    Theelen, B.D.; Verschueren, A.C.; Reyes Suarez, V.V.; Stevens, M.P.J.; Nunez, A.

    2003-01-01

    Now that system-on-chip technology is emerging, single-chip multi-processors are becoming feasible. A key problem of designing such systems is the complexity of their on-chip interconnects and memory architecture. It is furthermore unclear at what level software should be integrated. An example of a

  17. On-chip network interfaces supporting automatic burst write creation, posted writes and read prefetch

    NARCIS (Netherlands)

    Stefan, R.; Windt, de J.; Goossens, K.G.W.

    2010-01-01

    Networks-on-Chip are seen as a scalable solution for facilitating the development of Systems-on-Chip with an increasing number of IP cores. Many studies already address the implementation details of such networks and a large effort has been invested in optimizing the routing strategy and the

  18. Avoiding Message-Dependent Deadlock in Network-Based Systems on Chip

    NARCIS (Netherlands)

    Hansson, A.; Goossens, K.; Rãdulescu, A.

    2007-01-01

    Networks on chip (NoCs) are an essential component of systems on chip (SoCs) and much research is devoted to deadlock avoidance in NoCs. Prior work focuses on the router network while protocol interactions between NoC and intellectual property (IP) modules are not considered. These interactions

  19. Co-design of on-chip antennas and circuits for a UNII band monolithic transceiver

    KAUST Repository

    Shamim, Atif; Arsalan, Muhammad; Roy, L; Salama, Khaled N.

    2012-01-01

    with two on-chip antennas. Both antennas are characterized for their radiation properties through an on-wafer custom measurement setup. The strategy to co-design on-chip antennas with circuits, resultant trade-offs and measurement challenges have also been

  20. A survey of research and practices of network-on-chip

    DEFF Research Database (Denmark)

    Bjerregaard, Tobias; Mahadevan, Shankar

    2006-01-01

    The scaling of microchip technologies has enabled large scale systems-on-chip (SoC). Network-on-chip (NoC) research addresses global communication in SoC, involving (i) a move from computation-centric to communication-centric design and (ii) the implementation of scalable communication structures...

  1. On-chip photonic integrated circuit structures for millimeter and terahertz wave signal generation

    NARCIS (Netherlands)

    Gordón, C.; Guzmán, R. C.; Corral, V.; Carpintero, G.; Leijtens, X.

    2015-01-01

    We present two different on-chip photonic integrated circuit (PIC) structures for continuous-wave generation of millimeter and terahertz waves, each one using a different approach. One approach is the optical heterodyne method, using an on-chip arrayed waveguide grating laser (OC-AWGL) which is

  2. An FPGA bridge preserving traffing quality of service for on-chip network-based systems

    NARCIS (Netherlands)

    Nejad, A.B.; Escudero Martinez, M.; Goossens, K.G.W.

    2011-01-01

    FPGA prototyping of recent large Systems on Chip (SoCs) is very challenging due to the resource limitation of a single FPGA. Moreover, having external access to SoCs for verification and debug purposes is essential. In this paper, we suggest to partition a network-on-chip (NoC) based system into

  3. On-chip graphene electrode, methods of making, and methods of use

    KAUST Repository

    Nayak, Pranati

    2018-01-25

    Embodiments of the present disclosure provide a device including an on-chip electrode platform including one or more three dimensional laser scribed graphene electrodes, methods of making the on-chip electrode platform, methods of analyzing (e.g., detecting, quantifying, and the like) chemicals and biochemicals, and the like.

  4. Microfluidic organ-on-chip technology for blood-brain barrier research.

    Science.gov (United States)

    van der Helm, Marinke W; van der Meer, Andries D; Eijkel, Jan C T; van den Berg, Albert; Segerink, Loes I

    2016-01-01

    Organs-on-chips are a new class of microengineered laboratory models that combine several of the advantages of current in vivo and in vitro models. In this review, we summarize the advances that have been made in the development of organ-on-chip models of the blood-brain barrier (BBBs-on-chips) and the challenges that are still ahead. The BBB is formed by specialized endothelial cells and separates blood from brain tissue. It protects the brain from harmful compounds from the blood and provides homeostasis for optimal neuronal function [corrected]. Studying BBB function and dysfunction is important for drug development and biomedical research. Microfluidic BBBs-on-chips enable real-time study of (human) cells in an engineered physiological microenvironment, for example incorporating small geometries and fluid flow as well as sensors. Examples of BBBs-on-chips in literature already show the potential of more realistic microenvironments and the study of organ-level functions. A key challenge in the field of BBB-on-chip development is the current lack of standardized quantification of parameters such as barrier permeability and shear stress. This limits the potential for direct comparison of the performance of different BBB-on-chip models to each other and existing models. We give recommendations for further standardization in model characterization and conclude that the rapidly emerging field of BBB-on-chip models holds great promise for further studies in BBB biology and drug development.

  5. On-chip dual-comb source for spectroscopy.

    Science.gov (United States)

    Dutt, Avik; Joshi, Chaitanya; Ji, Xingchen; Cardenas, Jaime; Okawachi, Yoshitomo; Luke, Kevin; Gaeta, Alexander L; Lipson, Michal

    2018-03-01

    Dual-comb spectroscopy is a powerful technique for real-time, broadband optical sampling of molecular spectra, which requires no moving components. Recent developments with microresonator-based platforms have enabled frequency combs at the chip scale. However, the need to precisely match the resonance wavelengths of distinct high quality-factor microcavities has hindered the development of on-chip dual combs. We report the simultaneous generation of two microresonator combs on the same chip from a single laser, drastically reducing experimental complexity. We demonstrate broadband optical spectra spanning 51 THz and low-noise operation of both combs by deterministically tuning into soliton mode-locked states using integrated microheaters, resulting in narrow (lasers or microwave oscillators. We demonstrate high signal-to-noise ratio absorption spectroscopy spanning 170 nm using the dual-comb source over a 20-μs acquisition time. Our device paves the way for compact and robust spectrometers at nanosecond time scales enabled by large beat-note spacings (>1 GHz).

  6. Multimedia Terminal System-on-Chip Design and Simulation

    Directory of Open Access Journals (Sweden)

    Barbieri Ivano

    2005-01-01

    Full Text Available This paper proposes a design approach based on integrated architectural and system-on-chip (SoC simulations. The main idea is to have an efficient framework for the design and the evaluation of multimedia terminals, allowing a fast system simulation with a definable degree of accuracy. The design approach includes the simulation of very long instruction word (VLIW digital signal processors (DSPs, the utilization of a device multiplexing the media streams, and the emulation of the real-time media acquisition. This methodology allows the evaluation of both the multimedia algorithm implementations and the hardware platform, giving feedback on the complete SoC including the interaction between modules and conflicts in accessing either the bus or shared resources. An instruction set architecture (ISA simulator and an SoC simulation environment compose the integrated framework. In order to validate this approach, the evaluation of an audio-video multiprocessor terminal is presented, and the complete simulation test results are reported.

  7. A multilevel Lab on chip platform for DNA analysis.

    Science.gov (United States)

    Marasso, Simone Luigi; Giuri, Eros; Canavese, Giancarlo; Castagna, Riccardo; Quaglio, Marzia; Ferrante, Ivan; Perrone, Denis; Cocuzza, Matteo

    2011-02-01

    Lab-on-chips (LOCs) are critical systems that have been introduced to speed up and reduce the cost of traditional, laborious and extensive analyses in biological and biomedical fields. These ambitious and challenging issues ask for multi-disciplinary competences that range from engineering to biology. Starting from the aim to integrate microarray technology and microfluidic devices, a complex multilevel analysis platform has been designed, fabricated and tested (All rights reserved-IT Patent number TO2009A000915). This LOC successfully manages to interface microfluidic channels with standard DNA microarray glass slides, in order to implement a complete biological protocol. Typical Micro Electro Mechanical Systems (MEMS) materials and process technologies were employed. A silicon/glass microfluidic chip and a Polydimethylsiloxane (PDMS) reaction chamber were fabricated and interfaced with a standard microarray glass slide. In order to have a high disposable system all micro-elements were passive and an external apparatus provided fluidic driving and thermal control. The major microfluidic and handling problems were investigated and innovative solutions were found. Finally, an entirely automated DNA hybridization protocol was successfully tested with a significant reduction in analysis time and reagent consumption with respect to a conventional protocol.

  8. On-chip microwave circulators using quantum Hall plasmonics

    Science.gov (United States)

    Mahoney, Alice; Colless, James; Pauka, Sebastian; Hornibrook, John; Doherty, Andrew; Reilly, David; Peeters, Lucas; Fox, Eli; Goldhaber-Gordon, David; Kou, Xuefeng; Pan, Lei; Wang, Kang; Watson, John; Gardner, Geoffrey; Manfra, Michael

    Circulators are directional circuit elements integral to technologies including radar systems, microwave communication transceivers and the readout of quantum information devices. Their non-reciprocity commonly arises from the interference of microwaves over the centimetre-scale of the signal wavelength in the presence of bulky magnetic media that breaks time-reversal symmetry. We present a completely passive on-chip microwave circulator with size 1/1000th the wavelength by exploiting the chiral, `slow-light' response of a GaAs/AlGaAs 2-dimensional electron gas in the quantum Hall regime. Further, by implementing this circulator design on a thin film of a magnetic topological insulator (Cr0.12(Bi0.26Sb0.62)2Te3), we show that similar non-reciprocity can be achieved at zero magnetic field. This additional mode of operation serves as a non-invasive probe of edge states in the quantum anomalous Hall effect, while also extending the possibility for integration with superconducting devices.

  9. An electrochemical pumping system for on-chip gradient generation.

    Science.gov (United States)

    Xie, Jun; Miao, Yunan; Shih, Jason; He, Qing; Liu, Jun; Tai, Yu-Chong; Lee, Terry D

    2004-07-01

    Within the context of microfluidic systems, it has been difficult to devise pumping systems that can deliver adequate flow rates at high pressure for applications such as HPLC. An on-chip electrochemical pumping system based on electrolysis that offers certain advantages over designs that utilize electroosmotic driven flow has been fabricated and tested. The pump was fabricated on both silicon and glass substrates using photolithography. The electrolysis electrodes were formed from either platinum or gold, and SU8, an epoxy-based photoresist, was used to form the pump chambers. A glass cover plate and a poly(dimethylsiloxane) (PDMS) gasket were used to seal the chambers. Filling of the chambers was accomplished by using a syringe to inject liquid via filling ports, which were later sealed using a glass cover plate. The current supplied to the electrodes controlled the rate of gas formation and, thus, the resulting fluid flow rate. At low backpressures, flow rates >1 microL/min have been demonstrated using polymer electrospray nozzle, we have confirmed the successful generation of a solvent gradient via a mass spectrometer.

  10. Hardware implementation of on -chip learning using re configurable FPGAS

    International Nuclear Information System (INIS)

    Kelash, H.M.; Sorour, H.S; Mahmoud, I.I.; Zaki, M; Haggag, S.S.

    2009-01-01

    The multilayer perceptron (MLP) is a neural network model that is being widely applied in the solving of diverse problems. A supervised training is necessary before the use of the neural network.A highly popular learning algorithm called back-propagation is used to train this neural network model. Once trained, the MLP can be used to solve classification problems. An interesting method to increase the performance of the model is by using hardware implementations. The hardware can do the arithmetical operations much faster than software. In this paper, a design and implementation of the sequential mode (stochastic mode) of backpropagation algorithm with on-chip learning using field programmable gate arrays (FPGA) is presented, a pipelined adaptation of the on-line back propagation algorithm (BP) is shown.The hardware implementation of forward stage, backward stage and update weight of backpropagation algorithm is also presented. This implementation is based on a SIMD parallel architecture of the forward propagation the diagnosis of the multi-purpose research reactor of Egypt accidents is used to test the proposed system

  11. Co-design of on-chip antennas and circuits for a UNII band monolithic transceiver

    KAUST Repository

    Shamim, Atif

    2012-07-28

    The surge of highly integrated and multifunction wireless devices has necessitated the designers to think outside the box for solutions that are unconventional. The new trends have provided the impetus for low cost and compact RF System-on-Chip (SoC) approaches [1]. The major advantages of SoC are miniaturization and cost reduction. A major bottleneck to the true realization of monolithic RF SoC transceivers is the implementation of on-chip antennas with circuitry. Though complete integrated transceivers with on-chip antennas have been demonstrated, these designs are generally for high frequencies. Moreover, they either use non-standard CMOS processes or additional fabrication steps to enhance the antenna efficiency, which in turn adds to the cost of the system [2-3]. Another challenge related to the on-chip antennas is the characterization of their radiation properties. Most of the recently reported work (summarized in Table I) shows that very few on-chip antennas are characterized. Our previous work [4], demonstrated a Phase Lock Loop (PLL) based transmitter (TX) with an on-chip antenna. However, the radiation from the on-chip antenna experienced strong interference due to 1) some active circuitry on one side of the chip and 2) the PCB used to mount the chip in the anechoic chamber. This paper presents, for the first time, a complete 5.2 GHz (UNII band) transceiver with separate TX and receiver (RX) antennas. To the author\\'s best knowledge, its size of 3 mm2 is the smallest reported for a UNII band transceiver with two on-chip antennas. Both antennas are characterized for their radiation properties through an on-wafer custom measurement setup. The strategy to co-design on-chip antennas with circuits, resultant trade-offs and measurement challenges have also been discussed. © 2010 IEEE.

  12. Systems-on-chip approach for real-time simulation of wheel-rail contact laws

    Science.gov (United States)

    Mei, T. X.; Zhou, Y. J.

    2013-04-01

    This paper presents the development of a systems-on-chip approach to speed up the simulation of wheel-rail contact laws, which can be used to reduce the requirement for high-performance computers and enable simulation in real time for the use of hardware-in-loop for experimental studies of the latest vehicle dynamic and control technologies. The wheel-rail contact laws are implemented using a field programmable gate array (FPGA) device with a design that substantially outperforms modern general-purpose PC platforms or fixed architecture digital signal processor devices in terms of processing time, configuration flexibility and cost. In order to utilise the FPGA's parallel-processing capability, the operations in the contact laws algorithms are arranged in a parallel manner and multi-contact patches are tackled simultaneously in the design. The interface between the FPGA device and the host PC is achieved by using a high-throughput and low-latency Ethernet link. The development is based on FASTSIM algorithms, although the design can be adapted and expanded for even more computationally demanding tasks.

  13. Introduction to Open Core Protocol Fastpath to System-on-Chip Design

    CERN Document Server

    Schwaderer, W David

    2012-01-01

    This book introduces Open Core Protocol (OCP), not as a conventional hardware communications protocol but as a meta-protocol: a means for describing and capturing the communications requirements of an IP core, and mapping them to a specific set of signals with known semantics.  Readers will learn the capabilities of OCP as a semiconductor hardware interface specification that allows different System-On-Chip (SoC) cores to communicate.  The OCP methodology presented enables intellectual property designers to design core interfaces in standard ways. This facilitates reusing OCP-compliant cores across multiple SoC designs which, in turn, drastically reduces design times, support costs, and overall cost for electronics/SoCs. Provides a comprehensive introduction to Open Core Protocol, which is more accessible than the full specification; Designed as a hands-on, how-to guide to semiconductor design; Includes numerous, real “usage examples” which are not available in the full specification; Integrates coverag...

  14. Analog Multilayer Perceptron Circuit with On-chip Learning: Portable Electronic Nose

    Science.gov (United States)

    Pan, Chih-Heng; Tang, Kea-Tiong

    2011-09-01

    This article presents an analog multilayer perceptron (MLP) neural network circuit with on-chip back propagation learning. This low power and small area analog MLP circuit is proposed to implement as a classifier in an electronic nose (E-nose). Comparing with the E-nose using microprocessor or FPGA as a classifier, the E-nose applying analog circuit as a classifier can be faster and much smaller, demonstrate greater power efficiency and be capable of developing a portable E-nose [1]. The system contains four inputs, four hidden neurons, and only one output neuron; this simple structure allows the circuit to have a smaller area and less power consumption. The circuit is fabricated using TSMC 0.18 μm 1P6M CMOS process with 1.8 V supply voltage. The area of this chip is 1.353×1.353 mm2 and the power consumption is 0.54 mW. Post-layout simulations show that the proposed analog MLP circuit can be successively trained to identify three kinds of fruit odors.

  15. On-chip ultra-thin layer chromatography and surface enhanced Raman spectroscopy.

    Science.gov (United States)

    Chen, Jing; Abell, Justin; Huang, Yao-wen; Zhao, Yiping

    2012-09-07

    We demonstrate that silver nanorod (AgNR) array substrates can be used for on-chip separation and detection of chemical mixtures by combining ultra-thin layer chromatography (UTLC) and surface enhanced Raman spectroscopy (SERS). The UTLC-SERS plate consists of an AgNR array fabricated by oblique angle deposition. The capability of the AgNR substrates to separate the different compounds in a mixture was explored using a mixture of four dyes and a mixture of melamine and Rhodamine 6G at varied concentrations with different mobile phase solvents. After UTLC separation, spatially-resolved SERS spectra were collected along the mobile phase development direction and the intensities of specific SERS peaks from each component were used to generate chromatograms. The AgNR substrates demonstrate the potential for separating the test dyes with plate heights as low as 9.6 μm. The limits of detection are between 10(-5)-10(-6) M. Furthermore, we show that the coupling of UTLC with SERS improves the SERS detection specificity, as small amounts of target analytes can be separated from the interfering background components.

  16. Applications of holographic on-chip microscopy (Conference Presentation)

    Science.gov (United States)

    Ozcan, Aydogan

    2017-02-01

    My research focuses on the use of computation/algorithms to create new optical microscopy, sensing, and diagnostic techniques, significantly improving existing tools for probing micro- and nano-objects while also simplifying the designs of these analysis tools. In this presentation, I will introduce a set of computational microscopes which use lens-free on-chip imaging to replace traditional lenses with holographic reconstruction algorithms. Basically, 3D images of specimens are reconstructed from their "shadows" providing considerably improved field-of-view (FOV) and depth-of-field, thus enabling large sample volumes to be rapidly imaged, even at nanoscale. These new computational microscopes routinely generate benefit of this technology is that it lends itself to field-portable and cost-effective designs which easily integrate with smartphones to conduct giga-pixel tele-pathology and microscopy even in resource-poor and remote settings where traditional techniques are difficult to implement and sustain, thus opening the door to various telemedicine applications in global health. Through the development of similar computational imagers, I will also report the discovery of new 3D swimming patterns observed in human and animal sperm. One of this newly discovered and extremely rare motion is in the form of "chiral ribbons" where the planar swings of the sperm head occur on an osculating plane creating in some cases a helical ribbon and in some others a twisted ribbon. Shedding light onto the statistics and biophysics of various micro-swimmers' 3D motion, these results provide an important example of how biomedical imaging significantly benefits from emerging computational algorithms/theories, revolutionizing existing tools for observing various micro- and nano-scale phenomena in innovative, high-throughput, and yet cost-effective ways.

  17. 3D on-chip microscopy of optically cleared tissue

    Science.gov (United States)

    Zhang, Yibo; Shin, Yoonjung; Sung, Kevin; Yang, Sam; Chen, Harrison; Wang, Hongda; Teng, Da; Rivenson, Yair; Kulkarni, Rajan P.; Ozcan, Aydogan

    2018-02-01

    Traditional pathology relies on tissue biopsy, micro-sectioning, immunohistochemistry and microscopic imaging, which are relatively expensive and labor-intensive, and therefore are less accessible in resource-limited areas. Low-cost tissue clearing techniques, such as the simplified CLARITY method (SCM), are promising to potentially reduce the cost of disease diagnosis by providing 3D imaging and phenotyping of thicker tissue samples with simpler preparation steps. However, the mainstream imaging approach for cleared tissue, fluorescence microscopy, suffers from high-cost, photobleaching and signal fading. As an alternative approach to fluorescence, here we demonstrate 3D imaging of SCMcleared tissue using on-chip holography, which is based on pixel-super-resolution and multi-height phase recovery algorithms to digitally compute the sample's amplitude and phase images at various z-slices/depths through the sample. The tissue clearing procedures and the lens-free imaging system were jointly optimized to find the best illumination wavelength, tissue thickness, staining solution pH, and the number of hologram heights to maximize the imaged tissue volume, minimize the amount of acquired data, while maintaining a high contrast-to-noise ratio for the imaged cells. After this optimization, we achieved 3D imaging of a 200-μm thick cleared mouse brain tissue over a field-of-view of based microscope (20× 0.75NA). Moreover, the lens-free microscope achieves an order-of-magnitude better data efficiency compared to its lens-based counterparts for volumetric imaging of samples. The presented low-cost and high-throughput lens-free tissue imaging technique enabled by CLARITY can be used in various biomedical applications in low-resource-settings.

  18. Improved On-Chip Measurement of Delay in an FPGA or ASIC

    Science.gov (United States)

    Chen, Yuan; Burke, Gary; Sheldon, Douglas

    2007-01-01

    An improved design has been devised for on-chip-circuitry for measuring the delay through a chain of combinational logic elements in a field-programmable gate array (FPGA) or application-specific integrated circuit (ASIC). In the improved design, the delay chain does not include input and output buffers and is not configured as an oscillator. Instead, the delay chain is made part of the signal chain of an on-chip pulse generator. The duration of the pulse is measured on-chip and taken to equal the delay.

  19. A system-level multiprocessor system-on-chip modeling framework

    DEFF Research Database (Denmark)

    Virk, Kashif Munir; Madsen, Jan

    2004-01-01

    We present a system-level modeling framework to model system-on-chips (SoC) consisting of heterogeneous multiprocessors and network-on-chip communication structures in order to enable the developers of today's SoC designs to take advantage of the flexibility and scalability of network-on-chip and...... SoC design. We show how a hand-held multimedia terminal, consisting of JPEG, MP3 and GSM applications, can be modeled as a multiprocessor SoC in our framework....

  20. Scalable fabrication of high-power graphene micro-supercapacitors for flexible and on-chip energy storage

    Science.gov (United States)

    El-Kady, Maher F.; Kaner, Richard B.

    2013-02-01

    The rapid development of miniaturized electronic devices has increased the demand for compact on-chip energy storage. Microscale supercapacitors have great potential to complement or replace batteries and electrolytic capacitors in a variety of applications. However, conventional micro-fabrication techniques have proven to be cumbersome in building cost-effective micro-devices, thus limiting their widespread application. Here we demonstrate a scalable fabrication of graphene micro-supercapacitors over large areas by direct laser writing on graphite oxide films using a standard LightScribe DVD burner. More than 100 micro-supercapacitors can be produced on a single disc in 30 min or less. The devices are built on flexible substrates for flexible electronics and on-chip uses that can be integrated with MEMS or CMOS in a single chip. Remarkably, miniaturizing the devices to the microscale results in enhanced charge-storage capacity and rate capability. These micro-supercapacitors demonstrate a power density of ~200 W cm-3, which is among the highest values achieved for any supercapacitor.

  1. Plasmonic nanoparticles-decorated diatomite biosilica: extending the horizon of on-chip chromatography and label-free biosensing.

    Science.gov (United States)

    Kong, Xianming; Li, Erwen; Squire, Kenny; Liu, Ye; Wu, Bo; Cheng, Li-Jing; Wang, Alan X

    2017-11-01

    Diatomite consists of fossilized remains of ancient diatoms and is a type of naturally abundant photonic crystal biosilica with multiple unique physical and chemical functionalities. In this paper, we explored the fluidic properties of diatomite as the matrix for on-chip chromatography and, simultaneously, the photonic crystal effects to enhance the plasmonic resonances of metallic nanoparticles for surface-enhanced Raman scattering (SERS) biosensing. The plasmonic nanoparticle-decorated diatomite biosilica provides a lab-on-a-chip capability to separate and detect small molecules from mixture samples with ultra-high detection sensitivity down to 1 ppm. We demonstrate the significant potential for biomedical applications by screening toxins in real biofluid, achieving simultaneous label-free biosensing of phenethylamine and miR21cDNA in human plasma with unprecedented sensitivity and specificity. To the best of our knowledge, this is the first time demonstration to detect target molecules from real biofluids by on-chip chromatography-SERS techniques. © 2017 Wiley-VCH Verlag GmbH & Co. KGaA, Weinheim.

  2. Design of a 40-nm CMOS integrated on-chip oscilloscope for 5-50 GHz spin wave characterization

    Science.gov (United States)

    Egel, Eugen; Csaba, György; Dietz, Andreas; Breitkreutz-von Gamm, Stephan; Russer, Johannes; Russer, Peter; Kreupl, Franz; Becherer, Markus

    2018-05-01

    Spin wave (SW) devices are receiving growing attention in research as a strong candidate for low power applications in the beyond-CMOS era. All SW applications would require an efficient, low power, on-chip read-out circuitry. Thus, we provide a concept for an on-chip oscilloscope (OCO) allowing parallel detection of the SWs at different frequencies. The readout system is designed in 40-nm CMOS technology and is capable of SW device characterization. First, the SWs are picked up by near field loop antennas, placed below yttrium iron garnet (YIG) film, and amplified by a low noise amplifier (LNA). Second, a mixer down-converts the radio frequency (RF) signal of 5 - 50 GHz to lower intermediate frequencies (IF) around 10 - 50 MHz. Finally, the IF signal can be digitized and analyzed regarding the frequency, amplitude and phase variation of the SWs. The power consumption and chip area of the whole OCO are estimated to 166.4 mW and 1.31 mm2, respectively.

  3. Capability ethics

    OpenAIRE

    Robeyns, Ingrid

    2012-01-01

    textabstractThe capability approach is one of the most recent additions to the landscape of normative theories in ethics and political philosophy. Yet in its present stage of development, the capability approach is not a full-blown normative theory, in contrast to utilitarianism, deontological theories, virtue ethics, or pragmatism. As I will argue in this chapter, at present the core of the capability approach is an account of value, which together with some other (more minor) normative comm...

  4. Essential issues in SOC design designing complex systems-on-chip

    CERN Document Server

    Lin, Youn-long Steve

    2007-01-01

    Covers issues related to system-on-chip (SoC) design. This book covers IP development, verification, integration, chip implementation, testing and software. It contains valuable academic and industrial examples for those involved with the design of complex SOCs.

  5. Implementation of Guaranteed Services in the MANGO Clockless Network-on-Chip

    DEFF Research Database (Denmark)

    Bjerregaard, Tobias; Sparsø, Jens

    2006-01-01

    (clockless implementation, standard socket access points, and guaranteed communication services) make MANGO suitable for a modular SoC design flow is explained. Among the advantages of using clockless circuit techniques are inherent global timing closure, low forward latency in pipelines, and zero dynamic......Shared, segmented, on-chip interconnection networks, known as networks-on-chip (NoC), may become the preferred way of interconnecting intellectual property (IP) cores in future giga-scale system-on-chip (SoC) designs. A NoC can provide the required communication bandwidth while accommodating...... the effects of scaling microchip technologies. Equally important, a NoC facilitates a truly modular and scalable design flow. The MANGO (message-passing asynchronous network-on-chip providing guaranteed services over open core protocol (OCP) interfaces) NoC is presented, and how its key characteristics...

  6. Direct quantification of transendothelial electrical resistance in organs-on-chips

    NARCIS (Netherlands)

    van der Helm, Marieke Willemijn; Odijk, Mathieu; Frimat, Jean-Philippe; van der Meer, Andries Dirk; Eijkel, Jan C.T.; van den Berg, Albert; Segerink, Loes Irene

    2016-01-01

    Measuring transendothelial or transepithelial electrical resistance (TEER) is a widely used method to monitor cellular barrier tightness in organs-on-chips. Unfortunately, integrated electrodes close to the cellular barrier hamper visual inspection of the cells or require specialized cleanroom

  7. Optical chromatography using a photonic crystal fiber with on-chip fluorescence excitation

    CSIR Research Space (South Africa)

    Ashok, AC

    2010-03-01

    Full Text Available The authors describe the realization of integrated optical chromatography, in conjunction with on-chip fluorescence excitation, in a monolithically fabricated poly-dimethylsiloxane (PDMS) microfluidic chip. The unique endlessly-single-mode guiding...

  8. On-chip RF-to-optical transducer (Conference Presentation)

    Science.gov (United States)

    Simonsen, Anders; Tsaturyan, Yeghishe; Seis, Yannick; Schmid, Silvan; Schliesser, Albert; Polzik, Eugene S.

    2016-04-01

    Recent advances in the fabrication of nano- and micromechanical elements enable the realization of high-quality mechanical resonators with masses so small that the forces from optical photons can have a significant impact on their motion. This facilitates a strong interaction between mechanical motion and light, or phonons and photons. This interaction is the corner stone of the field of optomechanics and allows, for example, for ultrasensitive detection and manipulation of mechanical motion using laser light. Remarkably, today these techniques can be extended into the quantum regime, in which fundamental fluctuations of light and mechanics govern the system's behavior. Micromechanical elements can also interact strongly with other physical systems, which is the central aspect of many micro-electro-mechanical based sensors. Micromechanical elements can therefore act as a bridge between these diverse systems, plus technologies that utilize them, and the mature toolbox of optical techniques that routinely operates at the quantum limit. In a previous work [1], we demonstrated such a bridge by realizing simultaneous coupling between an electronic LC circuit and a quantum-noise limited optical interferometer. The coupling was mediated by a mechanical oscillator forming a mechanically compliant capacitor biased with a DC voltage. The latter enhances the electromechanical interaction all the way to the strong coupling regime. That scheme allowed optical detection of electronic signals with effective noise temperatures far below the actual temperature of the mechanical element. On-chip integration of the electrical, mechanical and optical elements is necessary for an implementation of the transduction scheme that is viable for commercial applications. Reliable assembly of a strongly coupled electromechanical device, and inclusion of an optical cavity for enhanced optical readout, are key features of the new platform. Both can be achieved with standard cleanroom fabrication

  9. Runtime adaptive multi-processor system-on-chip: RAMPSoC

    OpenAIRE

    Göhringer, D.; Hübner, M.; Schatz, V.; Becker, J.

    2008-01-01

    Current trends in high performance computing show, that the usage of multiprocessor systems on chip are one approach for the requirements of computing intensive applications. The multiprocessor system on chip (MPSoC) approaches often provide a static and homogeneous infrastructure of networked microprocessor on the chip die. A novel idea in this research area is to introduce the dynamic adaptivity of reconfigurable hardware in order to provide a flexible heterogeneous set of processing elemen...

  10. Dynamic Capabilities

    DEFF Research Database (Denmark)

    Grünbaum, Niels Nolsøe; Stenger, Marianne

    2013-01-01

    The findings reveal a positive relationship between dynamic capabilities and innovation performance in the case enterprises, as we would expect. It was, however, not possible to establish a positive relationship between innovation performance and profitability. Nor was there any positive...... relationship between dynamic capabilities and profitability....

  11. Capability ethics

    NARCIS (Netherlands)

    I.A.M. Robeyns (Ingrid)

    2012-01-01

    textabstractThe capability approach is one of the most recent additions to the landscape of normative theories in ethics and political philosophy. Yet in its present stage of development, the capability approach is not a full-blown normative theory, in contrast to utilitarianism, deontological

  12. Cooling towers

    International Nuclear Information System (INIS)

    Boernke, F.

    1975-01-01

    The need for the use of cooling systems in power plant engineering is dealt with from the point of view of a non-polluting form of energy production. The various cooling system concepts up to the modern natural-draught cooling towers are illustrated by examples. (TK/AK) [de

  13. Gossiping Capabilities

    DEFF Research Database (Denmark)

    Mogensen, Martin; Frey, Davide; Guerraoui, Rachid

    Gossip-based protocols are now acknowledged as a sound basis to implement collaborative high-bandwidth content dissemination: content location is disseminated through gossip, the actual contents being subsequently pulled. In this paper, we present HEAP, HEterogeneity Aware gossip Protocol, where...... nodes dynamically adjust their contribution to gossip dissemination according to their capabilities. Using a continuous, itself gossip-based, approximation of relative capabilities, HEAP dynamically leverages the most capable nodes by (a) increasing their fanouts (while decreasing by the same proportion...... declare a high capability in order to augment their perceived quality without contributing accordingly. We evaluate HEAP in the context of a video streaming application on a 236 PlanetLab nodes testbed. Our results shows that HEAP improves the quality of the streaming by 25% over a standard gossip...

  14. Efficient On-chip Optical Microresonator for Optical Comb Generation: Design and Fabrication

    Science.gov (United States)

    Han, Kyunghun

    An optical frequency comb is a series of equally spaced frequency components. It has gained much attention since Nobel physics prize was awarded John L. Hall and Theodor W. Hansch for their contribution to the optical frequency comb technique in 2005. The optical frequency comb has been extensively studied because of its precision as a tool for spectroscopy, and is now widely used in bio- and chemical sensors, optical clocks, mode-locked dark pulse generation, soliton generation, and optical communication. Recently, thanks to the developments in nanotechnology, the optical frequency comb generation is made possible at a chip-scale level with microresonators. However, because the threshold power of the optical frequency comb generation is beyond the capability of the on-chip laser source, efficient microresonator is required. Here, we demonstrate an ultra-compact and highly efficient strip-slot direct mode coupler, aiming to achieve slotted silicon microresonator cladded with nonlinear polymer Poly-DDMEBT in SOI platform. As an application of the strip-slot direct mode coupling, a double slot fiber-to-chip edge coupler is demonstrated showing 2 dB insertion loss reduction compared to the conventional single tip edge coupler. For silicon nitride platform, we investigated evanescent wave coupling of microresonator, focusing on bus waveguide geometry optimization. The optimized waveguide width offers an efficient excitation of a fundamental mode in the resonator waveguide. This investigation can benefit low threshold comb generation by enhancing the extinction ratio. We experimentally demonstrated the high Q-factor micro-ring resonator with intrinsic Q of 12.6 million as well as the single FSR comb generation with 63 mW.

  15. A Spacecraft Housekeeping System-on-Chip in a Radiation Hardened Structured ASIC

    Science.gov (United States)

    Suarez, George; DuMonthier, Jeffrey J.; Sheikh, Salman S.; Powell, Wesley A.; King, Robyn L.

    2012-01-01

    Housekeeping systems are essential to health monitoring of spacecraft and instruments. Typically, sensors are distributed across various sub-systems and data is collected using components such as analog-to-digital converters, analog multiplexers and amplifiers. In most cases programmable devices are used to implement the data acquisition control and storage, and the interface to higher level systems. Such discrete implementations require additional size, weight, power and interconnect complexity versus an integrated circuit solution, as well as the qualification of multiple parts. Although commercial devices are readily available, they are not suitable for space applications due the radiation tolerance and qualification requirements. The Housekeeping System-o n-A-Chip (HKSOC) is a low power, radiation hardened integrated solution suitable for spacecraft and instrument control and data collection. A prototype has been designed and includes a wide variety of functions including a 16-channel analog front-end for driving and reading sensors, analog-to-digital and digital-to-analog converters, on-chip temperature sensor, power supply current sense circuits, general purpose comparators and amplifiers, a 32-bit processor, digital I/O, pulse-width modulation (PWM) generators, timers and I2C master and slave serial interfaces. In addition, the device can operate in a bypass mode where the processor is disabled and external logic is used to control the analog and mixed signal functions. The device is suitable for stand-alone or distributed systems where multiple chips can be deployed across different sub-systems as intelligent nodes with computing and processing capabilities.

  16. On-Chip Microfluidic Components for In Situ Analysis, Separation, and Detection of Amino Acids

    Science.gov (United States)

    Zheng, Yun; Getty, Stephanie; Dworkin, Jason; Balvin, Manuel; Kotecki, Carl

    2013-01-01

    The Astrobiology Analytical Laboratory at GSFC has identified amino acids in meteorites and returned cometary samples by using liquid chromatography-electrospray ionization time-of-flight mass spectrometry (LCMS). These organic species are key markers for life, having the property of chirality that can be used to distinguish biological from non-biological amino acids. One of the critical components in the benchtop instrument is liquid chromatography (LC) analytical column. The commercial LC analytical column is an over- 250-mm-long and 4.6-mm-diameter stainless steel tube filled with functionized microbeads as stationary phase to separate the molecular species based on their chemistry. Miniaturization of this technique for spaceflight is compelling for future payloads for landed missions targeting astrobiology objectives. A commercial liquid chromatography analytical column consists of an inert cylindrical tube filled with a stationary phase, i.e., microbeads, that has been functionalized with a targeted chemistry. When analyte is sent through the column by a pressurized carrier fluid (typically a methanol/ water mixture), compounds are separated in time due to differences in chemical interactions with the stationary phase. Different species of analyte molecules will interact more strongly with the column chemistry, and will therefore take longer to traverse the column. In this way, the column will separate molecular species based on their chemistry. A lab-on-chip liquid analysis tool was developed. The microfluidic analytical column is capable of chromatographically separating biologically relevant classes of molecules based on their chemistry. For this analytical column, fabrication, low leak rate, and stationary phase incorporation of a serpentine microchannel were demonstrated that mimic the dimensions of a commercial LC column within a 5 10 1 mm chip. The microchannel in the chip has a 75- micrometer-diameter oval-shaped cross section. The serpentine

  17. On-chip generation of high-dimensional entangled quantum states and their coherent control.

    Science.gov (United States)

    Kues, Michael; Reimer, Christian; Roztocki, Piotr; Cortés, Luis Romero; Sciara, Stefania; Wetzel, Benjamin; Zhang, Yanbing; Cino, Alfonso; Chu, Sai T; Little, Brent E; Moss, David J; Caspani, Lucia; Azaña, José; Morandotti, Roberto

    2017-06-28

    Optical quantum states based on entangled photons are essential for solving questions in fundamental physics and are at the heart of quantum information science. Specifically, the realization of high-dimensional states (D-level quantum systems, that is, qudits, with D > 2) and their control are necessary for fundamental investigations of quantum mechanics, for increasing the sensitivity of quantum imaging schemes, for improving the robustness and key rate of quantum communication protocols, for enabling a richer variety of quantum simulations, and for achieving more efficient and error-tolerant quantum computation. Integrated photonics has recently become a leading platform for the compact, cost-efficient, and stable generation and processing of non-classical optical states. However, so far, integrated entangled quantum sources have been limited to qubits (D = 2). Here we demonstrate on-chip generation of entangled qudit states, where the photons are created in a coherent superposition of multiple high-purity frequency modes. In particular, we confirm the realization of a quantum system with at least one hundred dimensions, formed by two entangled qudits with D = 10. Furthermore, using state-of-the-art, yet off-the-shelf telecommunications components, we introduce a coherent manipulation platform with which to control frequency-entangled states, capable of performing deterministic high-dimensional gate operations. We validate this platform by measuring Bell inequality violations and performing quantum state tomography. Our work enables the generation and processing of high-dimensional quantum states in a single spatial mode.

  18. Smartphone-based biosensing platform evolution: implementation of electrochemical analysis capabilities

    DEFF Research Database (Denmark)

    Patou, François; Dimaki, Maria; Svendsen, Winnie Edith

    2016-01-01

    Lab-on-Chip technologies offer great opportunities for the democratization of in-vitro medical diagnostics to the consumer-market. Despite the limitations set by the strict instrumentation and control requirements of certain families of these devices, new solutions are emerging. Smartphones now...... routinely demonstrate their potential as an interface of choice for operating complex, instrumented Lab-on-Chips. The sporadic nature of home-based in-vitro medical diagnostics testing calls for the development of systems capable of evolving with new applications or new technologies for Lab-on-Chip devices....... We present in this work how we evolved the first generation of a smartphone/Lab-on-Chip platform designed for evolvability. We demonstrate how reengineering efforts can be confined to the mobile-software layer and illustrate some of the benefits of building evolvable systems. We implement...

  19. A Low-Power Integrated Humidity CMOS Sensor by Printing-on-Chip Technology

    Directory of Open Access Journals (Sweden)

    Chang-Hung Lee

    2014-05-01

    Full Text Available A low-power, wide-dynamic-range integrated humidity sensing chip is implemented using a printable polymer sensing material with an on-chip pulse-width-modulation interface circuit. By using the inkjet printing technique, poly(3,4-ethylene-dioxythiophene/polystyrene sulfonate that has humidity sensing features can be printed onto the top metal layer of a 0.35 μm CMOS IC. The developed printing-on-chip humidity sensor achieves a heterogeneous three dimensional sensor system-on-chip architecture. The humidity sensing of the implemented printing-on-chip sensor system is experimentally tested. The sensor shows a sensitivity of 0.98% to humidity in the atmosphere. The maximum dynamic range of the readout circuit is 9.8 MΩ, which can be further tuned by the frequency of input signal to fit the requirement of the resistance of printed sensor. The power consumption keeps only 154 μW. This printing-on-chip sensor provides a practical solution to fulfill an ultra-small integrated sensor for the applications in miniaturized sensing systems.

  20. A low-power integrated humidity CMOS sensor by printing-on-chip technology.

    Science.gov (United States)

    Lee, Chang-Hung; Chuang, Wen-Yu; Cowan, Melissa A; Wu, Wen-Jung; Lin, Chih-Ting

    2014-05-23

    A low-power, wide-dynamic-range integrated humidity sensing chip is implemented using a printable polymer sensing material with an on-chip pulse-width-modulation interface circuit. By using the inkjet printing technique, poly(3,4-ethylene-dioxythiophene)/polystyrene sulfonate that has humidity sensing features can be printed onto the top metal layer of a 0.35 μm CMOS IC. The developed printing-on-chip humidity sensor achieves a heterogeneous three dimensional sensor system-on-chip architecture. The humidity sensing of the implemented printing-on-chip sensor system is experimentally tested. The sensor shows a sensitivity of 0.98% to humidity in the atmosphere. The maximum dynamic range of the readout circuit is 9.8 MΩ, which can be further tuned by the frequency of input signal to fit the requirement of the resistance of printed sensor. The power consumption keeps only 154 μW. This printing-on-chip sensor provides a practical solution to fulfill an ultra-small integrated sensor for the applications in miniaturized sensing systems.

  1. Capability approach

    DEFF Research Database (Denmark)

    Jensen, Niels Rosendal; Kjeldsen, Christian Christrup

    Lærebogen er den første samlede danske præsentation af den af Amartya Sen og Martha Nussbaum udviklede Capability Approach. Bogen indeholder en præsentation og diskussion af Sen og Nussbaums teoretiske platform. I bogen indgår eksempler fra såvel uddannelse/uddannelsespolitik, pædagogik og omsorg....

  2. On-chip spin-controlled orbital angular momentum directional coupling

    Science.gov (United States)

    Xie, Zhenwei; Lei, Ting; Si, Guangyuan; Du, Luping; Lin, Jiao; Min, Changjun; Yuan, Xiaocong

    2018-01-01

    Optical vortex beams have many potential applications in the particle trapping, quantum encoding, optical orbital angular momentum (OAM) communications and interconnects. However, the on-chip compact OAM detection is still a big challenge. Based on a holographic configuration and a spin-dependent structure design, we propose and demonstrate an on-chip spin-controlled OAM-mode directional coupler, which can couple the OAM signal to different directions due to its topological charge. While the directional coupling function can be switched on/off by altering the spin of incident beam. Both simulation and experimental measurements verify the validity of the proposed approach. This work would benefit the on-chip OAM devices for optical communications and high dimensional quantum coding/decoding in the future.

  3. Low-cost low-power UHF RFID tag with on-chip antenna

    Energy Technology Data Exchange (ETDEWEB)

    Xi Jingtian; Yan Na; Che Wenyi; Xu Conghui; Wang Xiao; Yang Yuqing; Jian Hongyan; Min Hao, E-mail: jtxi@fudan.edu.c [State Key Laboratory of ASIC and System, Auto-ID Laboratory, Fudan University, Shanghai 201203 (China)

    2009-07-15

    This paper presents an EPC Class 1 Generation 2 compatible tag with on-chip antenna implemented in the SMIC 0.18 {mu}m standard CMOS process. The UHF tag chip includes an RF/analog front-end, a digital baseband, and a 640-bit EEPROM memory. The on-chip antenna is optimized based on a novel parasitic-aware model. The rectifier is optimized to achieve a power conversion efficiency up to 40% by applying a self-bias feedback and threshold compensation techniques. A good match between the tag circuits and the on-chip antenna is realized by adjusting the rectifier input impedance. Measurements show that the presented tag can achieve a communication range of 1 cm with 1 W reader output power using a 1 x 1 cm{sup 2} single-turn loop reader antenna.

  4. A Performance Analytical Strategy for Network-on-Chip Router with Input Buffer Architecture

    Directory of Open Access Journals (Sweden)

    WANG, J.

    2012-11-01

    Full Text Available In this paper, a performance analytical strategy is proposed for Network-on-Chip router with input buffer architecture. First, an analytical model is developed based on semi-Markov process. For the non-work-conserving router with small buffer size, the model can be used to analyze the schedule delay and the average service time for each buffer when given the related parameters. Then, the packet average delay in router is calculated by using the model. Finally, we validate the effectiveness of our strategy by simulation. By comparing our analytical results to simulation results, we show that our strategy successfully captures the Network-on-Chip router performance and it performs better than the state-of-art technology. Therefore, our strategy can be used as an efficiency performance analytical tool for Network-on-Chip design.

  5. CMOS On-Chip Optoelectronic Neural Interface Device with Integrated Light Source for Optogenetics

    International Nuclear Information System (INIS)

    Sawadsaringkarn, Y; Kimura, H; Maezawa, Y; Nakajima, A; Kobayashi, T; Sasagawa, K; Noda, T; Tokuda, T; Ohta, J

    2012-01-01

    A novel optoelectronic neural interface device is proposed for target applications in optogenetics for neural science. The device consists of a light emitting diode (LED) array implemented on a CMOS image sensor for on-chip local light stimulation. In this study, we designed a suitable CMOS image sensor equipped with on-chip electrodes to drive the LEDs, and developed a device structure and packaging process for LED integration. The prototype device produced an illumination intensity of approximately 1 mW with a driving current of 2.0 mA, which is expected to be sufficient to activate channelrhodopsin (ChR2). We also demonstrated the functions of light stimulation and on-chip imaging using a brain slice from a mouse as a target sample.

  6. Scalable Motion Estimation Processor Core for Multimedia System-on-Chip Applications

    Science.gov (United States)

    Lai, Yeong-Kang; Hsieh, Tian-En; Chen, Lien-Fei

    2007-04-01

    In this paper, we describe a high-throughput and scalable motion estimation processor architecture for multimedia system-on-chip applications. The number of processing elements (PEs) is scalable according to the variable algorithm parameters and the performance required for different applications. Using the PE rings efficiently and an intelligent memory-interleaving organization, the efficiency of the architecture can be increased. Moreover, using efficient on-chip memories and a data management technique can effectively decrease the power consumption and memory bandwidth. Techniques for reducing the number of interconnections and external memory accesses are also presented. Our results demonstrate that the proposed scalable PE-ringed architecture is a flexible and high-performance processor core in multimedia system-on-chip applications.

  7. Spray cooling

    International Nuclear Information System (INIS)

    Rollin, Philippe.

    1975-01-01

    Spray cooling - using water spraying in air - is surveyed as a possible system for make-up (peak clipping in open circuit) or major cooling (in closed circuit) of the cooling water of the condensers in thermal power plants. Indications are given on the experiments made in France and the systems recently developed in USA, questions relating to performance, cost and environmental effects of spray devices are then dealt with [fr

  8. Low-Noise CMOS Circuits for On-Chip Signal Processing in Focal-Plane Arrays

    Science.gov (United States)

    Pain, Bedabrata

    The performance of focal-plane arrays can be significantly enhanced through the use of on-chip signal processing. Novel, in-pixel, on-focal-plane, analog signal-processing circuits for high-performance imaging are presented in this thesis. The presence of a high background-radiation is a major impediment for infrared focal-plane array design. An in-pixel, background-suppression scheme, using dynamic analog current memory circuit, is described. The scheme also suppresses spatial noise that results from response non-uniformities of photo-detectors, leading to background limited infrared detector readout performance. Two new, low-power, compact, current memory circuits, optimized for operation at ultra-low current levels required in infrared-detection, are presented. The first one is a self-cascading current memory that increases the output impedance, and the second one is a novel, switch feed-through reducing current memory, implemented using error-current feedback. This circuit can operate with a residual absolute -error of less than 0.1%. The storage-time of the memory is long enough to also find applications in neural network circuits. In addition, a voltage-mode, accurate, low-offset, low-power, high-uniformity, random-access sample-and-hold cell, implemented using a CCD with feedback, is also presented for use in background-suppression and neural network applications. A new, low noise, ultra-low level signal readout technique, implemented by individually counting photo-electrons within the detection pixel, is presented. The output of each unit-cell is a digital word corresponding to the intensity of the photon flux, and the readout is noise free. This technique requires the use of unit-cell amplifiers that feature ultra-high-gain, low-power, self-biasing capability and noise in sub-electron levels. Both single-input and differential-input implementations of such amplifiers are investigated. A noise analysis technique is presented for analyzing sampled

  9. All-MXene (2D titanium carbide) solid-state microsupercapacitors for on-chip energy storage

    KAUST Repository

    Peng, You-Yu

    2016-08-01

    On-chip energy storage is a rapidly evolving research topic, opening doors for integration of batteries and supercapacitors at microscales on rigid and flexible platforms. Recently, a new class of two-dimensional (2D) transition metal carbides and nitrides (so-called MXenes) has shown great promise in electrochemical energy storage applications. Here, we report the fabrication of all-MXene (Ti3C2Tx) solid-state interdigital microsupercapacitors by employing a solution spray-coating, followed by a photoresist-free direct laser cutting method. Our prototype devices consisted of two layers of Ti3C2Tx with two different flake sizes. The bottom layer was stacked large-size MXene flakes (typical lateral dimensions of 3-6 μm) serving mainly as current collectors. The top layer was made of small-size MXene flakes (~1 μm) with a large number of defects and edges as the electroactive layer responsible for energy storage. Compared to Ti3C2Tx micro-supercapacitors with platinum current collectors, the all-MXene devices exhibited much lower contact resistance, higher capacitances and better rate-capabilities. The areal and volumetric capacitances of ~27 mF cm-2 and ~337 F cm-3, respectively, at a scan rate of 20 mV s-1 were achieved. The devices also demonstrated their excellent cyclic stability, with 100% capacitance retention after 10,000 cycles at a scan rate of 50 mV s-1. This study opens up a plethora of possible designs for high-performance on-chip devices employing different chemistries, flake sizes and morphologies of MXenes and their heterostructures.

  10. All-MXene (2D titanium carbide) solid-state microsupercapacitors for on-chip energy storage

    KAUST Repository

    Peng, You-Yu; Akuzum, Bilen; Kurra, Narendra; Zhao, Meng-Qiang; Alhabeb, Mohamed; Anasori, Babak; Kumbur, Emin Caglan; Alshareef, Husam N.; Ger, Ming-Der; Gogotsi, Yury

    2016-01-01

    On-chip energy storage is a rapidly evolving research topic, opening doors for integration of batteries and supercapacitors at microscales on rigid and flexible platforms. Recently, a new class of two-dimensional (2D) transition metal carbides and nitrides (so-called MXenes) has shown great promise in electrochemical energy storage applications. Here, we report the fabrication of all-MXene (Ti3C2Tx) solid-state interdigital microsupercapacitors by employing a solution spray-coating, followed by a photoresist-free direct laser cutting method. Our prototype devices consisted of two layers of Ti3C2Tx with two different flake sizes. The bottom layer was stacked large-size MXene flakes (typical lateral dimensions of 3-6 μm) serving mainly as current collectors. The top layer was made of small-size MXene flakes (~1 μm) with a large number of defects and edges as the electroactive layer responsible for energy storage. Compared to Ti3C2Tx micro-supercapacitors with platinum current collectors, the all-MXene devices exhibited much lower contact resistance, higher capacitances and better rate-capabilities. The areal and volumetric capacitances of ~27 mF cm-2 and ~337 F cm-3, respectively, at a scan rate of 20 mV s-1 were achieved. The devices also demonstrated their excellent cyclic stability, with 100% capacitance retention after 10,000 cycles at a scan rate of 50 mV s-1. This study opens up a plethora of possible designs for high-performance on-chip devices employing different chemistries, flake sizes and morphologies of MXenes and their heterostructures.

  11. Advanced Technology for Ultra-Low Power System-on-Chip (SoC)

    Science.gov (United States)

    2017-06-01

    was proposed for lower power applications with Ioff=10pA/μm and VDD=0.5V. In this project, the optimized structure shows great potential in both Lg...AFRL-RY-WP-TR-2017-0115 ADVANCED TECHNOLOGY FOR ULTRA-LOW POWER SYSTEM-ON-CHIP (SoC) Jason Woo, Weicong Li, and Peng Lu University of California...September 2015 – 31 March 2017 4. TITLE AND SUBTITLE ADVANCED TECHNOLOGY FOR ULTRA-LOW POWER SYSTEM-ON- CHIP (SoC) 5a. CONTRACT NUMBER FA8650-15-1-7574 5b

  12. CMOS capacitive sensors for lab-on-chip applications a multidisciplinary approach

    CERN Document Server

    Ghafar-Zadeh, Ebrahim

    2010-01-01

    The main components of CMOS capacitive biosensors including sensing electrodes, bio-functionalized sensing layer, interface circuitries and microfluidic packaging are verbosely explained in chapters 2-6 after a brief introduction on CMOS based LoCs in Chapter 1. CMOS Capacitive Sensors for Lab-on-Chip Applications is written in a simple pedagogical way. It emphasises practical aspects of fully integrated CMOS biosensors rather than mathematical calculations and theoretical details. By using CMOS Capacitive Sensors for Lab-on-Chip Applications, the reader will have circuit design methodologies,

  13. Optical and Electric Multifunctional CMOS Image Sensors for On-Chip Biosensing Applications

    Directory of Open Access Journals (Sweden)

    Kiyotaka Sasagawa

    2010-12-01

    Full Text Available In this review, the concept, design, performance, and a functional demonstration of multifunctional complementary metal-oxide-semiconductor (CMOS image sensors dedicated to on-chip biosensing applications are described. We developed a sensor architecture that allows flexible configuration of a sensing pixel array consisting of optical and electric sensing pixels, and designed multifunctional CMOS image sensors that can sense light intensity and electric potential or apply a voltage to an on-chip measurement target. We describe the sensors’ architecture on the basis of the type of electric measurement or imaging functionalities.

  14. Autonomic networking-on-chip bio-inspired specification, development, and verification

    CERN Document Server

    Cong-Vinh, Phan

    2011-01-01

    Despite the growing mainstream importance and unique advantages of autonomic networking-on-chip (ANoC) technology, Autonomic Networking-On-Chip: Bio-Inspired Specification, Development, and Verification is among the first books to evaluate research results on formalizing this emerging NoC paradigm, which was inspired by the human nervous system. The FIRST Book to Assess Research Results, Opportunities, & Trends in ""BioChipNets"" The third book in the Embedded Multi-Core Systems series from CRC Press, this is an advanced technical guide and reference composed of contributions from prominent re

  15. Fabrication and characterization of on-chip optical nonlinear chalcogenide nanofiber devices.

    Science.gov (United States)

    Zhang, Qiming; Li, Ming; Hao, Qiang; Deng, Dinghuan; Zhou, Hui; Zeng, Heping; Zhan, Li; Wu, Xiang; Liu, Liying; Xu, Lei

    2010-11-15

    Chalcogenide (As(2)S(3)) nanofibers as narrow as 200 nm in diameter are drawn by the fiber pulling method, are successfully embedded in SU8 polymer, and form on-chip waveguides and high-Q microknot resonators (Q = 3.9 × 10(4)) with smooth cleaved end faces. Resonance tuning of resonators is realized by localized laser irradiation. Strong supercontinuum generation with a bandwidth of 500 nm is achieved in a 7-cm-long on-chip chalcogenide waveguide. Our result provides a method for the development of compact, high-optical-quality, and robust photonic devices.

  16. ENTREPRENEURIAL CAPABILITIES

    DEFF Research Database (Denmark)

    Rasmussen, Lauge Baungaard; Nielsen, Thorkild

    2003-01-01

    The aim of this article is to analyse entrepreneurship from an action research perspective. What is entrepreneurship about? Which are the fundamental capabilities and processes of entrepreneurship? To answer these questions the article includes a case study of a Danish entrepreneur and his networ....... Finally, the article discuss, how more long term action research methods could be integrated into the entrepreneurial processes and the possible impacts of such an implementation?...

  17. On-chip enzymatic microbiofuel cell-powered integrated circuits.

    Science.gov (United States)

    Mark, Andrew G; Suraniti, Emmanuel; Roche, Jérôme; Richter, Harald; Kuhn, Alexander; Mano, Nicolas; Fischer, Peer

    2017-05-16

    A variety of diagnostic and therapeutic medical technologies rely on long term implantation of an electronic device to monitor or regulate a patient's condition. One proposed approach to powering these devices is to use a biofuel cell to convert the chemical energy from blood nutrients into electrical current to supply the electronics. We present here an enzymatic microbiofuel cell whose electrodes are directly integrated into a digital electronic circuit. Glucose oxidizing and oxygen reducing enzymes are immobilized on microelectrodes of an application specific integrated circuit (ASIC) using redox hydrogels to produce an enzymatic biofuel cell, capable of harvesting electrical power from just a single droplet of 5 mM glucose solution. Optimisation of the fuel cell voltage and power to match the requirements of the electronics allow self-powered operation of the on-board digital circuitry. This study represents a step towards implantable self-powered electronic devices that gather their energy from physiological fluids.

  18. Fiber Bragg grating sensor interrogators on chip: challenges and opportunities

    Science.gov (United States)

    Marin, Yisbel; Nannipieri, Tiziano; Oton, Claudio J.; Di Pasquale, Fabrizio

    2017-04-01

    In this paper we present an overview of the current efforts towards integration of Fiber Bragg Grating (FBG) sensor interrogators. Different photonic integration platforms will be discussed, including monolithic planar lightwave circuit technology, silicon on insulator (SOI), indium phosphide (InP) and gallium arsenide (GaAs) material platforms. Also various possible techniques for wavelength metering and methods for FBG multiplexing will be discussed and compared in terms of resolution, dynamic performance, multiplexing capabilities and reliability. The use of linear filters, array waveguide gratings (AWG) as multiple linear filters and AWG based centroid signal processing techniques will be addressed as well as interrogation techniques based on tunable micro-ring resonators and Mach-Zehnder interferometers (MZI) for phase sensitive detection. The paper will also discuss the challenges and perspectives of photonic integration to address the increasing requirements of several industrial applications.

  19. An Active Plasmonic to Explore on-Chip Sensing Applications

    Directory of Open Access Journals (Sweden)

    Nan-Fu Chiu

    2016-06-01

    Full Text Available We report the influence of top emission and transparent organic electroluminescence (OEL devices on the color tunability, viewing angle and enhancement light efficiency by surface plasmon grating coupled emission (SPGCE, the effects of coupled active SPPs on the metal nano-grating with organic material interface by cross-coupled into far-field space. Owing to the narrow band emission from the SPGCE, one can observe clear color changes at a certain viewing angle with different permittivities. The experimental and theoretical results showed that OEL-SPGCE at different pitch can match a linear shifting of momentum (DK of about 4.8 mm-1 per 100 nm pitch size. The color changes from -1.1 degree (water, -.07 degree (glucose 10 %, -2.5 degree (glucose 20 %, to 6 degree (glucose 40 % with the increasing permittivities. The OEL-SPGCE biosensor is proposed for the development of novel devices, which is expected to improve the capability of electroluminescent bio-plasmonic resonance measurement devices in the future.

  20. Self-Powered Functional Device Using On-Chip Power Generation

    KAUST Repository

    Hussain, Muhammad Mustafa

    2012-01-26

    An apparatus, system, and method for a self-powered device using on-chip power generation. In some embodiments, the apparatus includes a substrate, a power generation module on the substrate, and a power storage module on the substrate. The power generation module may include a thermoelectric generator made of bismuth telluride.

  1. MEMS-based wavelength and orbital angular momentum demultiplexer for on-chip applications

    DEFF Research Database (Denmark)

    Lyubopytov, Vladimir; Porfirev, Alexey P.; Gurbatov, Stanislav O.

    2017-01-01

    Summary form only given. We demonstrate a new tunable MEMS-based WDM&OAM Fabry-Pérot filter for simultaneous wavelength (WDM) and Orbital Angular Momentum (OAM) (de)multiplexing. The WDM&OAM filter is suitable for dense on-chip integration and dedicated for the next generation of optical...

  2. A Network Traffic Generator Model for Fast Network-on-Chip Simulation

    DEFF Research Database (Denmark)

    Mahadevan, Shankar; Angiolini, Frederico; Storgaard, Michael

    2005-01-01

    For Systems-on-Chip (SoCs) development, a predominant part of the design time is the simulation time. Performance evaluation and design space exploration of such systems in bit- and cycle-true fashion is becoming prohibitive. We propose a traffic generation (TG) model that provides a fast...

  3. Standardized and modular microfluidic platform for fast lab on chip system development

    NARCIS (Netherlands)

    Dekker, Stefan; van den Berg, Albert; Odijk, Mathieu; Lee, Abraham; DeVoe, Don

    2017-01-01

    This paper reports a modular microfluidic system with standardized parts, enabling rapid prototyping of lab on chip systems. Herewith contributing to the technology transfer from academy to industry. The use of standardized parts also makes it possible to design a microfluidic systems in a top down

  4. Computational On-Chip Imaging of Nanoparticles and Biomolecules using Ultraviolet Light

    KAUST Repository

    Daloglu, Mustafa Ugur; Ray, Aniruddha; Gorocs, Zoltan; Xiong, Matthew; Malik, Ravinder; Bitan, Gal; McLeod, Euan; Ozcan, Aydogan

    2017-01-01

    wavelength (UV) of 266 nm. The increased forward scattering from nanoscale objects at this short wavelength has enabled us to detect individual sub-30 nm nanoparticles over a large field-of-view of >16 mm2 using an on-chip imaging platform, where the sample

  5. Two-Dimensional Programmable Manipulation of Magnetic Nanoparticles on-Chip

    DEFF Research Database (Denmark)

    Sarella, Anandakumar; Torti, Andrea; Donolato, Marco

    2014-01-01

    A novel device is designed for on-chip selective trap and two-dimensional remote manipulation of single and multiple fluid-borne magnetic particles using field controlled magnetic domain walls in circular nanostructures. The combination of different ring-shaped nanostructures and field sequences ...

  6. A low-cost 2D fluorescence detection system for mm sized beads on-chip

    NARCIS (Netherlands)

    Segerink, Loes Irene; Koster, Maarten J.; Sprenkels, A.J.; van den Berg, Albert

    2012-01-01

    In this paper we describe a compact fluorescence detection system for on-chip analysis of beads, comprising a low-cost optical HD-DVD pickup. The complete system consists of a fluorescence detection unit, a control unit and a microfluidic chip containing microchannels and optical markers. With these

  7. On-chip COMA cache-coherence protocol for microgrids of microthreaded cores

    NARCIS (Netherlands)

    Zhang, L.; Jesshope, C.

    2008-01-01

    This paper describes an on-chip COMA cache coherency protocol to support the microthread model of concurrent program composition. The model gives a sound basis for building multi-core computers as it captures concurrency, abstracts communication and identifies resources, such as processor groups

  8. Advanced Nanofabrication Process Development for Self-Powered System-on-Chip

    KAUST Repository

    Rojas, Jhonathan Prieto

    2010-01-01

    In summary, by using a novel sustainable energy component and scalable nano-patterning for logic and computing module, this work has successfully collected the essential base knowledge and joined two different elements that synergistically will contribute for the future implementation of a Self-Powered System-on-Chip.

  9. DAEDALUS: System-Level Design Methodology for Streaming Multiprocessor Embedded Systems on Chips

    NARCIS (Netherlands)

    Stefanov, T.; Pimentel, A.; Nikolov, H.; Ha, S.; Teich, J.

    2017-01-01

    The complexity of modern embedded systems, which are increasingly based on heterogeneous multiprocessor system-on-chip (MPSoC) architectures, has led to the emergence of system-level design. To cope with this design complexity, system-level design aims at raising the abstraction level of the design

  10. Global On-Chip Differential Interconnects with Optimally-Placed Twists

    NARCIS (Netherlands)

    Mensink, E.; Schinkel, Daniel; Klumperink, Eric A.M.; van Tuijl, Adrianus Johannes Maria; Nauta, Bram

    2005-01-01

    Global on-chip communication is receiving quite some attention as global interconnects are rapidly becoming a speed, power and reliability bottleneck for digital CMOS systems. Recently, we proposed a bus-transceiver test chip in 0.13 μm CMOS using 10 mm long uninterrupted differential interconnects

  11. Self-Powered Functional Device Using On-Chip Power Generation

    KAUST Repository

    Hussain, Muhammad Mustafa

    2012-01-01

    An apparatus, system, and method for a self-powered device using on-chip power generation. In some embodiments, the apparatus includes a substrate, a power generation module on the substrate, and a power storage module on the substrate. The power generation module may include a thermoelectric generator made of bismuth telluride.

  12. On-Chip Manipulation of Protein-Coated Magnetic Beads via Domain-Wall Conduits

    DEFF Research Database (Denmark)

    Donolato, Marco; Vavassori, Paolo; Gobbi, Marco

    2010-01-01

    Geometrically constrained magnetic domain walls (DWs) in magnetic nanowires can be manipulated at the nanometer scale. The inhomogeneous magnetic stray field generated by a DW can capture a magnetic nanoparticle in solution. On-chip nanomanipulation of individual magnetic beads coated with proteins...

  13. On-chip single photon filtering and multiplexing in hybrid quantum photonic circuits.

    Science.gov (United States)

    Elshaari, Ali W; Zadeh, Iman Esmaeil; Fognini, Andreas; Reimer, Michael E; Dalacu, Dan; Poole, Philip J; Zwiller, Val; Jöns, Klaus D

    2017-08-30

    Quantum light plays a pivotal role in modern science and future photonic applications. Since the advent of integrated quantum nanophotonics different material platforms based on III-V nanostructures-, colour centers-, and nonlinear waveguides as on-chip light sources have been investigated. Each platform has unique advantages and limitations; however, all implementations face major challenges with filtering of individual quantum states, scalable integration, deterministic multiplexing of selected quantum emitters, and on-chip excitation suppression. Here we overcome all of these challenges with a hybrid and scalable approach, where single III-V quantum emitters are positioned and deterministically integrated in a complementary metal-oxide-semiconductor-compatible photonic circuit. We demonstrate reconfigurable on-chip single-photon filtering and wavelength division multiplexing with a foot print one million times smaller than similar table-top approaches, while offering excitation suppression of more than 95 dB and efficient routing of single photons over a bandwidth of 40 nm. Our work marks an important step to harvest quantum optical technologies' full potential.Combining different integration platforms on the same chip is currently one of the main challenges for quantum technologies. Here, Elshaari et al. show III-V Quantum Dots embedded in nanowires operating in a CMOS compatible circuit, with controlled on-chip filtering and tunable routing.

  14. Power Efficient Gigabit Communication Over Capacitively Driven RC-Limited On-Chip Interconnects

    NARCIS (Netherlands)

    Mensink, E.; Schinkel, Daniel; Klumperink, Eric A.M.; van Tuijl, Adrianus Johannes Maria; Nauta, Bram

    2010-01-01

    Abstract—This paper presents a set of circuit techniques to achieve high data rate point-to-point communication over long on-chip RC-limited wire-pairs. The ideal line termination impedances for a flat transfer function with linear phase (pure delay) are derived, using an s-parameter wire-pair

  15. Synthesis and Layout of an Asynchronous Network-on-Chip using Standard EDA Tools

    DEFF Research Database (Denmark)

    Müller, Christoph; Kasapaki, Evangelia; Sørensen, Rasmus Bo

    2014-01-01

    is the key role that clock signals play in specifying time-constraints for the synthesis. In this paper explain how we handled the synthesis and layout of an asynchronous network-on-chip for a multi-core platform. Focus is on the design process while the actual NOC-design and its performance are presented...

  16. A Statically Scheduled Time-Division-Multiplexed Network-on-Chip for Real-Time Systems

    DEFF Research Database (Denmark)

    Schoeberl, Martin; Brandner, Florian; Sparsø, Jens

    2012-01-01

    This paper explores the design of a circuit-switched network-on-chip (NoC) based on time-division-multiplexing (TDM) for use in hard real-time systems. Previous work has primarily considered application-specific systems. The work presented here targets general-purpose hardware platforms. We...

  17. An On-Chip interconnect and protocol stack for multiple communication paradigms and programming models

    NARCIS (Netherlands)

    Hansson, A.; Goossens, Kees

    2009-01-01

    A growing number of applications, with diverse requirements, are integrated on the same System on Chip (SoC) in the form of hardware and software Intellectual Property (IP). The diverse requirements, coupled with the IPs being developed by unrelated design teams, lead to multiple communication

  18. An on-chip interconnect and protocol stack for multiple communication paradigms and programming models

    NARCIS (Netherlands)

    Hansson, M.A.; Goossens, K.G.W.

    2009-01-01

    A growing number of applications, with diverse requirements, are integrated on the same System on Chip (SoC) in the form of hardware and software Intellectual Property (IP). The diverse requirements, coupled with the IPs being developed by unrelated design teams, lead to multiple communication

  19. Integrated lab-on-chip biosensing systems based on magnetic particle actuation : a comprehensive review

    NARCIS (Netherlands)

    Reenen, van A.; Jong, de A.M.; Toonder, den J.M.J.; Prins, M.W.J.

    2014-01-01

    The demand for easy to use and cost effective medical technologies inspires scientists to develop inno-vative lab-on-chip technologies for in-vitro diagnostic testing. To fulfill the medical needs, the tests should be rapid, sensitive, quantitative, miniaturizable, and need to integrate all steps

  20. Dynamic magnetic particle actuation for integrated lab-on-chip biosensing

    NARCIS (Netherlands)

    Jong, de A.M.; Reenen, van A.; Prins, M.W.J.

    2014-01-01

    The demand for easy to use and cost effective medical technologies inspires scientists to develop innovative lab-on-chip technologies for in-vitro diagnostic testing. We study the use of magnetic particles actuated by magnetic fields to perform different microfluidic handling steps of an integrated

  1. Vertical Integration of System-on-Chip Concepts in the Digital Design Curriculum

    Science.gov (United States)

    Tang, Ying; Head, L. M.; Ramachandran, R. P.; Chatman, L. M.

    2011-01-01

    The rapid evolution of System-on-Chip (SoC) challenges academic curricula to keep pace with multidisciplinary/interdisciplinary system thinking. This paper presents a curricular prototype that cuts across artificial course boundaries and provides a meaningful exploration of diverse facets of SoC design. Specifically, experimental contents of a…

  2. Cache aware mapping of streaming apllications on a multiprocessor system-on-chip

    NARCIS (Netherlands)

    Moonen, A.J.M.; Bekooij, M.J.G.; Berg, van den R.M.J.; Meerbergen, van J.; Sciuto, D.; Peng, Z.

    2008-01-01

    Efficient use of the memory hierarchy is critical for achieving high performance in a multiprocessor system- on-chip. An external memory that is shared between processors is a bottleneck in current and future systems. Cache misses and a large cache miss penalty contribute to a low processor

  3. On-chip measurement of the Brownian relaxation frequency of magnetic beads using magnetic tunneling junctions

    DEFF Research Database (Denmark)

    Donolato, M.; Sogne, E.; Dalslet, Bjarke Thomas

    2011-01-01

    We demonstrate the detection of the Brownian relaxation frequency of 250 nm diameter magnetic beads using a lab-on-chip platform based on current lines for exciting the beads with alternating magnetic fields and highly sensitive magnetic tunnel junction (MTJ) sensors with a superparamagnetic free...

  4. Nanotechnology and the Developing World: Lab-on-Chip Technology for Health and Environmental Applications

    Science.gov (United States)

    Mehta, Michael D.

    2008-01-01

    This article argues that advances in nanotechnology in general, and lab-on-chip technology in particular, have the potential to benefit the developing world in its quest to control risks to human health and the environment. Based on the "risk society" thesis of Ulrich Beck, it is argued that the developed world must realign its science and…

  5. System-on-Chip Integration of a New Electromechanical Impedance Calculation Method for Aircraft Structure Health Monitoring

    Directory of Open Access Journals (Sweden)

    Daniel Medale

    2012-10-01

    Full Text Available The work reported on this paper describes a new methodology implementation for active structural health monitoring of recent aircraft parts made from carbon-fiber-reinforced polymer. This diagnosis is based on a new embedded method that is capable of measuring the local high frequency impedance spectrum of the structure through the calculation of the electro-mechanical impedance of a piezoelectric patch pasted non-permanently onto its surface. This paper involves both the laboratory based E/M impedance method development, its implementation into a CPU with limited resources as well as a comparison with experimental testing data needed to demonstrate the feasibility of flaw detection on composite materials and answer the question of the method reliability. The different development steps are presented and the integration issues are discussed. Furthermore, we present the unique advantages that the reconfigurable electronics through System-on-Chip (SoC technology brings to the system scaling and flexibility. At the end of this article, we demonstrate the capability of a basic network of sensors mounted onto a real composite aircraft part specimen to capture its local impedance spectrum signature and to diagnosis different delamination sizes using a comparison with a baseline.

  6. System-on-chip integration of a new electromechanical impedance calculation method for aircraft structure health monitoring.

    Science.gov (United States)

    Boukabache, Hamza; Escriba, Christophe; Zedek, Sabeha; Medale, Daniel; Rolet, Sebastien; Fourniols, Jean Yves

    2012-10-11

    The work reported on this paper describes a new methodology implementation for active structural health monitoring of recent aircraft parts made from carbon-fiber-reinforced polymer. This diagnosis is based on a new embedded method that is capable of measuring the local high frequency impedance spectrum of the structure through the calculation of the electro-mechanical impedance of a piezoelectric patch pasted non-permanently onto its surface. This paper involves both the laboratory based E/M impedance method development, its implementation into a CPU with limited resources as well as a comparison with experimental testing data needed to demonstrate the feasibility of flaw detection on composite materials and answer the question of the method reliability. The different development steps are presented and the integration issues are discussed. Furthermore, we present the unique advantages that the reconfigurable electronics through System-on-Chip (SoC) technology brings to the system scaling and flexibility. At the end of this article, we demonstrate the capability of a basic network of sensors mounted onto a real composite aircraft part specimen to capture its local impedance spectrum signature and to diagnosis different delamination sizes using a comparison with a baseline.

  7. Organs-on-Chips in Drug Development: The Importance of Involving Stakeholders in Early Health Technology Assessment

    NARCIS (Netherlands)

    Middelkamp, Heleen H.T.; van der Meer, Andries Dirk; Hummel, J. Marjan; Stamatialis, Dimitrios; Mummery, Christine Lindsay; Passier, Petrus Christianus Johannes Josephus; IJzerman, Maarten Joost

    2016-01-01

    Organs-on-chips are three-dimensional, microfluidic cell culture systems that simulate the function of tissues and organ subunits. Organ-on-chip systems are expected to contribute to drug candidate screening and the reduction of animal tests in preclinical drug development and may increase

  8. Experimental evaluation of cooling efficiency of the high performance cooling device

    Science.gov (United States)

    Nemec, Patrik; Malcho, Milan

    2016-06-01

    This work deal with experimental evaluation of cooling efficiency of cooling device capable transfer high heat fluxes from electric elements to the surrounding. The work contain description of cooling device, working principle of cooling device, construction of cooling device. Experimental part describe the measuring method of device cooling efficiency evaluation. The work results are presented in graphic visualization of temperature dependence of the contact area surface between cooling device evaporator and electronic components on the loaded heat of electronic components in range from 250 to 740 W and temperature dependence of the loop thermosiphon condenser surface on the loaded heat of electronic components in range from 250 to 740 W.

  9. Experimental evaluation of cooling efficiency of the high performance cooling device

    Energy Technology Data Exchange (ETDEWEB)

    Nemec, Patrik, E-mail: patrik.nemec@fstroj.uniza.sk; Malcho, Milan, E-mail: milan.malcho@fstroj.uniza.sk [University of Žilina, Faculty of Mechanical Engineering, Department of Power Engineering, Univerzitna 1, 010 26 Žilina (Slovakia)

    2016-06-30

    This work deal with experimental evaluation of cooling efficiency of cooling device capable transfer high heat fluxes from electric elements to the surrounding. The work contain description of cooling device, working principle of cooling device, construction of cooling device. Experimental part describe the measuring method of device cooling efficiency evaluation. The work results are presented in graphic visualization of temperature dependence of the contact area surface between cooling device evaporator and electronic components on the loaded heat of electronic components in range from 250 to 740 W and temperature dependence of the loop thermosiphon condenser surface on the loaded heat of electronic components in range from 250 to 740 W.

  10. Ventilative Cooling

    DEFF Research Database (Denmark)

    Heiselberg, Per Kvols; Kolokotroni, Maria

    This report, by venticool, summarises the outcome of the work of the initial working phase of IEA ECB Annex 62 Ventilative Cooling and is based on the findings in the participating countries. It presents a summary of the first official Annex 62 report that describes the state-of-the-art of ventil......This report, by venticool, summarises the outcome of the work of the initial working phase of IEA ECB Annex 62 Ventilative Cooling and is based on the findings in the participating countries. It presents a summary of the first official Annex 62 report that describes the state......-of-the-art of ventilative cooling potentials and limitations, its consideration in current energy performance regulations, available building components and control strategies and analysis methods and tools. In addition, the report provides twenty six examples of operational buildings using ventilative cooling ranging from...

  11. Cooling Tower Overhaul of Secondary Cooling System in HANARO

    Energy Technology Data Exchange (ETDEWEB)

    Park, Young Chul; Lee, Young Sub; Jung, Hoan Sung; Lim, In Chul [KAERI, Daejeon (Korea, Republic of)

    2007-07-01

    HANARO, an open-tank-in-pool type research reactor of 30 MWth power in Korea, has been operating normally since its initial criticality in February, 1995. For the last about ten years, A cooling tower of a secondary cooling system has been operated normally in HANARO. Last year, the cooling tower has been overhauled for preservative maintenance including fills, eliminators, wood support, water distribution system, motors, driving shafts, gear reducers, basements, blades and etc. This paper describes the results of the overhaul. As results, it is confirmed that the cooling tower maintains a good operability through a filed test. And a cooling capability will be tested when a wet bulb temperature is maintained about 28 .deg. C in summer and the reactor is operated with the full power.

  12. Cooling towers

    International Nuclear Information System (INIS)

    Korik, L.; Burger, R.

    1992-01-01

    What is the effect of 0.6C (1F) temperature rise across turbines, compressors, or evaporators? Enthalpy charts indicate for every 0.6C (1F) hotter water off the cooling tower will require an additional 2 1/2% more energy cost. Therefore, running 2.2C (4F) warmer due to substandard cooling towers could result in a 10% penalty for overcoming high heads and temperatures. If it costs $1,250,000.00 a year to operate the system, $125,000.00 is the energy penalty for hotter water. This paper investigates extra fuel costs involved in maintaining design electric production with cooling water 0.6C (1F) to 3C (5.5F) hotter than design. If design KWH cannot be maintained, paper will calculate dollar loss of saleable electricity. The presentation will conclude with examining the main causes of deficient cold water production. State-of-the-art upgrading and methodology available to retrofit existing cooling towers to optimize lower cooling water temperatures will be discussed

  13. ASIC design of a digital fuzzy system on chip for medical diagnostic applications.

    Science.gov (United States)

    Roy Chowdhury, Shubhajit; Roy, Aniruddha; Saha, Hiranmay

    2011-04-01

    The paper presents the ASIC design of a digital fuzzy logic circuit for medical diagnostic applications. The system on chip under consideration uses fuzzifier, memory and defuzzifier for fuzzifying the patient data, storing the membership function values and defuzzifying the membership function values to get the output decision. The proposed circuit uses triangular trapezoidal membership functions for fuzzification patients' data. For minimizing the transistor count, the proposed circuit uses 3T XOR gates and 8T adders for its design. The entire work has been carried out using TSMC 0.35 µm CMOS process. Post layout TSPICE simulation of the whole circuit indicates a delay of 31.27 ns and the average power dissipation of the system on chip is 123.49 mW which indicates a less delay and less power dissipation than the comparable embedded systems reported earlier.

  14. Debugging systems-on-chip communication-centric and abstraction-based techniques

    CERN Document Server

    Vermeulen, Bart

    2014-01-01

    This book describes an approach and supporting infrastructure to facilitate debugging the silicon implementation of a System-on-Chip (SOC), allowing its associated product to be introduced into the market more quickly.  Readers learn step-by-step the key requirements for debugging a modern, silicon SOC implementation, nine factors that complicate this debugging task, and a new debug approach that addresses these requirements and complicating factors.  The authors’ novel communication-centric, scan-based, abstraction-based, run/stop-based (CSAR) debug approach is discussed in detail, showing how it helps to meet debug requirements and address the nine, previously identified factors that complicate debugging silicon implementations of SOCs. The authors also derive the debug infrastructure requirements to support debugging of a silicon implementation of an SOC with their CSAR debug approach. This debug infrastructure consists of a generic on-chip debug architecture, a configurable automated design-for-debug ...

  15. On-Chip SDM Switching for Unicast, Multicast and Traffic Grooming in Data Center Networks

    DEFF Research Database (Denmark)

    Kamchevska, Valerija; Ding, Yunhong; Dalgaard, Kjeld

    2017-01-01

    This paper reports on the use of a novel photonic integrated circuit that facilitates multicast and grooming in an optical data center architecture. The circuit allows for on-chip spatial multiplexing and demultiplexing as well as fiber core switching. Using this device, we experimentally verify...... that multicast and/or grooming can be successfully performed along the full range of output ports, for different group size and different power ratio. Moreover, we experimentally demonstrate SDM transmission and 5 Tbit/s switching using the on-chip fiber switch with integrated fan-in/fan-out devices and achieve...... errorfree performance (BER≤10-9) for a network scenario including simultaneous unicast/multicast switching and traffic grooming....

  16. Core-shell magnetic nanoparticles for on-chip RF inductors

    KAUST Repository

    Koh, Kisik

    2013-01-01

    FeNi3 based core-shell magnetic nanoparticles are demonstrated as the magnetic core material for on-chip, radio frequency (RF) inductors. FeNi3 nanoparticles with 50-150 nm in diameter with 15-20 nm-thick SiO2 coating are chemically synthesized and deposited on a planar inductor as the magnetic core to enhance both inductance (L) and quality factor (Q) of the inductor. Experimentally, the ferromagnetic resonant frequency of the on-chip inductors based on FeNi3 core-shell nanoparticles has been shown to be over several GHz. A post-CMOS process has been developed to integrate the magnetic nanoparticles to a planar inductor and inductance enhancements up to 50% of the original magnitude with slightly enhanced Q-factor up to 1 GHz have been achieved. © 2013 IEEE.

  17. Pattern manipulation via on-chip phase modulation between orbital angular momentum beams

    International Nuclear Information System (INIS)

    Li, Huanlu; Strain, Michael J.; Meriggi, Laura; Sorel, Marc; Chen, Lifeng; Zhu, Jiangbo; Cicek, Kenan; Wang, Jianwei; Thompson, Mark G.; Cai, Xinlun; Yu, Siyuan

    2015-01-01

    An integrated approach to thermal modulation of relative phase between two optical vortices with opposite chirality has been demonstrated on a silicon-on-insulator substrate. The device consists of a silicon-integrated optical vortex emitter and a phase controlled 3 dB coupler. The relative phase between two optical vortices can be actively modulated on chip by applying a voltage on the integrated heater. The phase shift is shown to be linearly proportional to applied electrical power, and the rotation angle of the interference pattern is observed to be inversely proportional to topological charge. This scheme can be used in lab-on-chip, communications and sensing applications. It can be intentionally implemented with other modulation elements to achieve more complicated applications

  18. System-Level Design Methodologies for Networked Multiprocessor Systems-on-Chip

    DEFF Research Database (Denmark)

    Virk, Kashif Munir

    2008-01-01

    is the first such attempt in the published literature. The second part of the thesis deals with the issues related to the development of system-level design methodologies for networked multiprocessor systems-on-chip at various levels of design abstraction with special focus on the modeling and design...... at the system-level. The multiprocessor modeling framework is then extended to include models of networked multiprocessor systems-on-chip which is then employed to model wireless sensor networks both at the sensor node level as well as the wireless network level. In the third and the final part, the thesis...... to the transaction-level model. The thesis, as a whole makes contributions by describing a design methodology for networked multiprocessor embedded systems at three layers of abstraction from system-level through transaction-level to the cycle accurate level as well as demonstrating it practically by implementing...

  19. Modeling, analysis and optimization of network-on-chip communication architectures

    CERN Document Server

    Ogras, Umit Y

    2013-01-01

    Traditionally, design space exploration for Systems-on-Chip (SoCs) has focused on the computational aspects of the problem at hand. However, as the number of components on a single chip and their performance continue to increase, the communication architecture plays a major role in the area, performance and energy consumption of the overall system. As a result, a shift from computation-based to communication-based design becomes mandatory. Towards this end, network-on-chip (NoC) communication architectures have emerged recently as a promising alternative to classical bus and point-to-point communication architectures. This book explores outstanding research problems related to modeling, analysis and optimization of NoC communication architectures. More precisely, we present novel design methodologies, software tools and FPGA prototypes to aid the design of application-specific NoCs.

  20. Bioprinting and Organ-on-Chip Applications Towards Personalized Medicine for Bone Diseases.

    Science.gov (United States)

    Arrigoni, Chiara; Gilardi, Mara; Bersini, Simone; Candrian, Christian; Moretti, Matteo

    2017-06-01

    The skeleton supports and confers structure to the whole body but several pathological and traumatic conditions affect the bone tissue. Most of those pathological conditions are specific and different among different patients, such as bone defects due to traumatic injuries or bone remodeling alterations due to congenital diseases. In this context, the development of personalized therapies would be highly desirable. In recent years the advent of innovative techniques like bioprinting and microfluidic organ-on-chip raised hopes of achieving key tools helping the application of personalized therapies for bone diseases. In this review we will illustrate the latest progresses in the bioprinting of personalized bone grafts and generation of patient-specific bone-on-chip devices, describing current approaches and limitations and possible future improvements for more effective personalized bone grafts and disease models.

  1. On-chip high-voltage generator design design methodology for charge pumps

    CERN Document Server

    Tanzawa, Toru

    2016-01-01

    This book provides various design techniques for switched-capacitor on-chip high-voltage generators, including charge pump circuits, regulators, level shifters, references, and oscillators.  Readers will see these techniques applied to system design in order to address the challenge of how the on-chip high-voltage generator is designed for Flash memories, LCD drivers, and other semiconductor devices to optimize the entire circuit area and power efficiency with a low voltage supply, while minimizing the cost.  This new edition includes a variety of useful updates, including coverage of power efficiency and comprehensive optimization methodologies for DC-DC voltage multipliers, modeling of extremely low voltage Dickson charge pumps, and modeling and optimum design of AC-DC switched-capacitor multipliers for energy harvesting and power transfer for RFID.

  2. A Fully Integrated Humidity Sensor System-on-Chip Fabricated by Micro-Stamping Technology

    Science.gov (United States)

    Huang, Che-Wei; Huang, Yu-Jie; Lu, Shey-Shi; Lin, Chih-Ting

    2012-01-01

    A fully integrated humidity sensor chip was designed, implemented, and tested. Utilizing the micro-stamping technology, the pseudo-3D sensor system-on-chip (SSoC) architecture can be implemented by stacking sensing materials directly on the top of a CMOS-fabricated chip. The fabricated sensor system-on-chip (2.28 mm × 2.48 mm) integrated a humidity sensor, an interface circuit, a digital controller, and an On-Off Keying (OOK) wireless transceiver. With low power consumption, i.e., 750 μW without RF operation, the sensitivity of developed sensor chip was experimentally verified in the relative humidity (RH) range from 32% to 60%. The response time of the chip was also experimentally verified to be within 5 seconds from RH 36% to RH 64%. As a consequence, the implemented humidity SSoC paves the way toward the an ultra-small sensor system for various applications.

  3. Widely Tunable On-Chip Microwave Circulator for Superconducting Quantum Circuits

    Science.gov (United States)

    Chapman, Benjamin J.; Rosenthal, Eric I.; Kerckhoff, Joseph; Moores, Bradley A.; Vale, Leila R.; Mates, J. A. B.; Hilton, Gene C.; Lalumière, Kevin; Blais, Alexandre; Lehnert, K. W.

    2017-10-01

    We report on the design and performance of an on-chip microwave circulator with a widely (GHz) tunable operation frequency. Nonreciprocity is created with a combination of frequency conversion and delay, and requires neither permanent magnets nor microwave bias tones, allowing on-chip integration with other superconducting circuits without the need for high-bandwidth control lines. Isolation in the device exceeds 20 dB over a bandwidth of tens of MHz, and its insertion loss is small, reaching as low as 0.9 dB at select operation frequencies. Furthermore, the device is linear with respect to input power for signal powers up to hundreds of fW (≈103 circulating photons), and the direction of circulation can be dynamically reconfigured. We demonstrate its operation at a selection of frequencies between 4 and 6 GHz.

  4. On-chip integration of a superconducting microwave circulator and a Josephson parametric amplifier

    Science.gov (United States)

    Rosenthal, Eric I.; Chapman, Benjamin J.; Moores, Bradley A.; Kerckhoff, Joseph; Malnou, Maxime; Palken, D. A.; Mates, J. A. B.; Hilton, G. C.; Vale, L. R.; Ullom, J. N.; Lehnert, K. W.

    Recent progress in microwave amplification based on parametric processes in superconducting circuits has revolutionized the measurement of feeble microwave signals. These devices, which operate near the quantum limit, are routinely used in ultralow temperature cryostats to: readout superconducting qubits, search for axionic dark matter, and characterize astrophysical sensors. However, these amplifiers often require ferrite circulators to separate incoming and outgoing traveling waves. For this reason, measurement efficiency and scalability are limited. In order to facilitate the routing of quantum signals we have created a superconducting, on-chip microwave circulator without permanent magnets. We integrate our circulator on-chip with a Josephson parametric amplifier for the purpose of near quantum-limited directional amplification. In this talk I will present a design overview and preliminary measurements.

  5. Recent advances in graphene-based planar micro-supercapacitors for on-chip energy storage

    Institute of Scientific and Technical Information of China (English)

    Zhong-Shuai Wu; Xinliang Feng; Hui-Ming Cheng

    2014-01-01

    The current development trend towards miniaturized portable electronic devices has signiicantly increased the demand for ultrathin, lexible and sustainable on-chip micro-supercapacitors that have enormous potential to complement, or even to replace, micro-bateries and electrolytic capacitors. In this regard,graphene-based micro-supercapacitors with a planar geometry are promising micro-electrochemical energy-storage devices that can take full advantage of planar coniguration and unique features of graphene.his review summarizes the latest advances in on-chip graphene-based planar interdigital micro-supercapacitors, from the history of their development, representative graphene-based materials(graphene sheets, graphene quantum dots and graphene hybrids) for their manufacture, typical microfabrication strategies(photolithography techniques, electrochemical methods, laser writing, etc.),electrolyte(aqueous, organic, ionic and gel), to device coniguration(symmetric and asymmetric). Finally,the perspectives and possible development directions of future graphene-based micro-supercapacitors are briely discussed.

  6. Sequential and selective localized optical heating in water via on-chip dielectric nanopatterning.

    Science.gov (United States)

    Morsy, Ahmed M; Biswas, Roshni; Povinelli, Michelle L

    2017-07-24

    We study the use of nanopatterned silicon membranes to obtain optically-induced heating in water. We show that by varying the detuning between an absorptive optical resonance of the patterned membrane and an illumination laser, both the magnitude and response time of the temperature rise can be controlled. This allows for either sequential or selective heating of different patterned areas on chip. We obtain a steady-state temperature of approximately 100 °C for a 805.5nm CW laser power density of 66 µW/μm 2 and observe microbubble formation. The ability to spatially and temporally control temperature on the microscale should enable the study of heat-induced effects in a variety of chemical and biological lab-on-chip applications.

  7. On-chip electrochromic micro display for a disposable bio-sensor chip

    Science.gov (United States)

    Zhu, Yanjun; Tsukamoto, Takashiro; Tanaka, Shuji

    2017-12-01

    This paper reports an on-chip electrochromic micro display made of polyaniline (PANi) which can be easily made on a CMOS chip. Micro-patterned PANi thin films were selectively deposited on pre-patterned microelectrodes by using electrodeposition. The optimum conditions for deposition and electrochromism were investigated. An 8-pixel on-chip micro display was made on a Si chip. The color of each PANi film could be independently but simultaneously controlled, which means any 1-byte digital data could be displayed on the display. The PANi display had a response time as fast as about 100 ms, which means the transfer data rate was as fast as 80 bits per second.

  8. Soft error evaluation and vulnerability analysis in Xilinx Zynq-7010 system-on chip

    Energy Technology Data Exchange (ETDEWEB)

    Du, Xuecheng; He, Chaohui; Liu, Shuhuan, E-mail: liushuhuan@mail.xjtu.edu.cn; Zhang, Yao; Li, Yonghong; Xiong, Ceng; Tan, Pengkang

    2016-09-21

    Radiation-induced soft errors are an increasingly important threat to the reliability of modern electronic systems. In order to evaluate system-on chip's reliability and soft error, the fault tree analysis method was used in this work. The system fault tree was constructed based on Xilinx Zynq-7010 All Programmable SoC. Moreover, the soft error rates of different components in Zynq-7010 SoC were tested by americium-241 alpha radiation source. Furthermore, some parameters that used to evaluate the system's reliability and safety were calculated using Isograph Reliability Workbench 11.0, such as failure rate, unavailability and mean time to failure (MTTF). According to fault tree analysis for system-on chip, the critical blocks and system reliability were evaluated through the qualitative and quantitative analysis.

  9. Pattern manipulation via on-chip phase modulation between orbital angular momentum beams

    Energy Technology Data Exchange (ETDEWEB)

    Li, Huanlu [Department of Electrical and Electronic Engineering, University of Bristol, University Walk, Bristol BS8 1TR (United Kingdom); School of Engineering, University of Glasgow, Rankine Building, Oakfield Avenue, Glasgow G12 8LP (United Kingdom); Strain, Michael J. [School of Engineering, University of Glasgow, Rankine Building, Oakfield Avenue, Glasgow G12 8LP (United Kingdom); Wolfson Centre, Institute of Photonics, University of Strathclyde, 106 Rottenrow East, Glasgow G4 0NW (United Kingdom); Meriggi, Laura; Sorel, Marc [School of Engineering, University of Glasgow, Rankine Building, Oakfield Avenue, Glasgow G12 8LP (United Kingdom); Chen, Lifeng; Zhu, Jiangbo; Cicek, Kenan [Department of Electrical and Electronic Engineering, University of Bristol, University Walk, Bristol BS8 1TR (United Kingdom); Wang, Jianwei; Thompson, Mark G. [Centre for Quantum Photonics, H. H. Wills Physics Laboratory and Department of Electrical and Electronic Engineering, University of Bristol, Bristol BS8 1UB (United Kingdom); Cai, Xinlun, E-mail: caixlun5@mail.sysu.edu.cn [Centre for Quantum Photonics, H. H. Wills Physics Laboratory and Department of Electrical and Electronic Engineering, University of Bristol, Bristol BS8 1UB (United Kingdom); State Key Laboratory of Optoelectronic Materials and Technologies and School of Physics and Engineering, Sun Yat-sen University, Guangzhou 510275 (China); Yu, Siyuan, E-mail: s.yu@bristol.ac.uk [Department of Electrical and Electronic Engineering, University of Bristol, University Walk, Bristol BS8 1TR (United Kingdom); State Key Laboratory of Optoelectronic Materials and Technologies and School of Physics and Engineering, Sun Yat-sen University, Guangzhou 510275 (China)

    2015-08-03

    An integrated approach to thermal modulation of relative phase between two optical vortices with opposite chirality has been demonstrated on a silicon-on-insulator substrate. The device consists of a silicon-integrated optical vortex emitter and a phase controlled 3 dB coupler. The relative phase between two optical vortices can be actively modulated on chip by applying a voltage on the integrated heater. The phase shift is shown to be linearly proportional to applied electrical power, and the rotation angle of the interference pattern is observed to be inversely proportional to topological charge. This scheme can be used in lab-on-chip, communications and sensing applications. It can be intentionally implemented with other modulation elements to achieve more complicated applications.

  10. Laser subtractive-additive-welding microfabrication for Lab-On-Chip (LOC) applications

    Science.gov (United States)

    Jonušauskas, Linas; RekštytÄ--, Sima; Buivydas, Ričardas; Butkus, Simas; Paipulas, Domas; Gadonas, Roaldas; Juodkazis, Saulius; Malinauskas, Mangirdas

    2017-02-01

    An approach employing ultrafast laser hybrid microfabrication combining ablation, 3D nanolithography and welding is proposed for the realization of Lab-On-Chip (LOC) device. The same laser setup is shown to be suitable for fabricating microgrooves in glass slabs, polymerization of fine meshes inside them, and, lastly, sealing the whole chip with cover glass into one monolithic piece. The created micro fluidic device proved its particle sorting function by separating 1 μm and 10 μm polystyrene spheres from a mixture. Next, a lens adapter for a cell phone's camera was manufactured via thermal extrusion 3D printing technique which allowed to achieve sufficient magnification to clearly resolve <10 μm features. All together shows fs-laser microfabrication technology as a flexible and versatile tool for study and manufacturing of Lab-On-Chip devices.

  11. On-chip signal amplification of magnetic bead-based immunoassay by aviating magnetic bead chains.

    Science.gov (United States)

    Jalal, Uddin M; Jin, Gyeong Jun; Eom, Kyu Shik; Kim, Min Ho; Shim, Joon S

    2017-11-06

    In this work, a Lab-on-a-Chip (LOC) platform is used to electromagnetically actuate magnetic bead chains for an enhanced immunoassay. Custom-made electromagnets generate a magnetic field to form, rotate, lift and lower the magnetic bead chains (MBCs). The cost-effective, disposable LOC platform was made with a polymer substrate and an on-chip electrochemical sensor patterned via the screen-printing process. The movement of the MBCs is controlled to improve the electrochemical signal up to 230% when detecting beta-type human chorionic gonadotropin (β-hCG). Thus, the proposed on-chip MBC-based immunoassay is applicable for rapid, qualitative electrochemical point-of-care (POC) analysis. Copyright © 2017 Elsevier B.V. All rights reserved.

  12. Non-Magnetic On-Chip Resonant Acousto-Optic Isolator at 780 nm

    Science.gov (United States)

    2017-08-04

    actuator on a piezoelectric substrate. We fabricated the device using only CMOS-compatible dielectric materials with the assistance of e- beam...on-chip, without the use of magnetic fields or magneto-optical materials. Our technical approach was to employ momentum-conservation in photon-phonon...interactions to break the propagation symmetry of light using a unidirectional acoustic pump. This acoustic wave was transduced using an RF-driven SAW

  13. On-chip photonic memory elements employing phase-change materials.

    Science.gov (United States)

    Rios, Carlos; Hosseini, Peiman; Wright, C David; Bhaskaran, Harish; Pernice, Wolfram H P

    2014-03-05

    Phase-change materials integrated into nanophotonic circuits provide a flexible way to realize tunable optical components. Relying on the enormous refractive-index contrast between the amorphous and crystalline states, such materials are promising candidates for on-chip photonic memories. Nonvolatile memory operation employing arrays of microring resonators is demonstrated as a route toward all-photonic chipscale information processing. © 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  14. A passive on-chip, superconducting circulator using rings of tunnel junctions

    OpenAIRE

    Müller, Clemens; Guan, Shengwei; Vogt, Nicolas; Cole, Jared H.; Stace, Thomas M.

    2017-01-01

    We present the design of a passive, on-chip microwave circulator based on a ring of superconducting tunnel junctions. We investigate two distinct physical realisations, based on either Josephson junctions (JJ) or quantum phase slip elements (QPS), with microwave ports coupled either capacitively (JJ) or inductively (QPS) to the ring structure. A constant bias applied to the center of the ring provides the symmetry breaking (effective) magnetic field, and no microwave or rf bias is required. W...

  15. An integrated lab-on-chip for rapid identification and simultaneous differentiation of tropical pathogens.

    Directory of Open Access Journals (Sweden)

    Jeslin J L Tan

    Full Text Available Tropical pathogens often cause febrile illnesses in humans and are responsible for considerable morbidity and mortality. The similarities in clinical symptoms provoked by these pathogens make diagnosis difficult. Thus, early, rapid and accurate diagnosis will be crucial in patient management and in the control of these diseases. In this study, a microfluidic lab-on-chip integrating multiplex molecular amplification and DNA microarray hybridization was developed for simultaneous detection and species differentiation of 26 globally important tropical pathogens. The analytical performance of the lab-on-chip for each pathogen ranged from 102 to 103 DNA or RNA copies. Assay performance was further verified with human whole blood spiked with Plasmodium falciparum and Chikungunya virus that yielded a range of detection from 200 to 4×105 parasites, and from 250 to 4×107 PFU respectively. This lab-on-chip was subsequently assessed and evaluated using 170 retrospective patient specimens in Singapore and Thailand. The lab-on-chip had a detection sensitivity of 83.1% and a specificity of 100% for P. falciparum; a sensitivity of 91.3% and a specificity of 99.3% for P. vivax; a positive 90.0% agreement and a specificity of 100% for Chikungunya virus; and a positive 85.0% agreement and a specificity of 100% for Dengue virus serotype 3 with reference methods conducted on the samples. Results suggested the practicality of an amplification microarray-based approach in a field setting for high-throughput detection and identification of tropical pathogens.

  16. Experimental realization of an on-chip all-optical analogue to electromagnetically induced transparency.

    Science.gov (United States)

    Xu, Qianfan; Sandhu, Sunil; Povinelli, Michelle L; Shakya, Jagat; Fan, Shanhui; Lipson, Michal

    2006-03-31

    We provide the first experimental observation of structure tuning of the electromagnetically induced transparency-like spectrum in integrated on-chip optical resonator systems. The system consists of coupled silicon ring resonators with 10 microm diameter on silicon, where the coherent interference between the two coupled resonators is tuned. We measured a transparency-resonance mode with a quality factor of 11,800.

  17. Advances in piezoelectric thin films for acoustic biosensors, acoustofluidics and lab-on-chip applications

    OpenAIRE

    Fu, Yong Qing; Luo, Jack; Nguyen, Nam-Trung; Walton, Anthony; Flewitt, Andrew; Zu, Xiao-Tao; Li, Yifan; McHale, Glen; Matthews, Allan; Iborra, Enrique; Du, Hejun; Milne, William

    2017-01-01

    Recently, piezoelectric thin films including zinc oxide (ZnO) and aluminium nitride (AlN) have found a broad range of lab-on-chip applications such as biosensing, particle/cell concentrating, sorting/patterning, pumping, mixing, nebulisation and jetting. Integrated acoustic wave sensing/microfluidic devices have been fabricated by depositing these piezoelectric films onto a number of substrates such as silicon, ceramics, diamond, quartz, glass, and more recently also polymer, metallic foils a...

  18. Legal Protection on IP Cores for System-on-Chip Designs

    Science.gov (United States)

    Kinoshita, Takahiko

    The current semiconductor industry has shifted from vertical integrated model to horizontal specialization model in term of integrated circuit manufacturing. In this circumstance, IP cores as solutions for System-on-Chip (SoC) have become increasingly important for semiconductor business. This paper examines to what extent IP cores of SoC effectively can be protected by current intellectual property system including integrated circuit layout design law, patent law, design law, copyright law and unfair competition prevention act.

  19. Evaluation of on-chip micro antennas for in vivo dosimetry application

    International Nuclear Information System (INIS)

    Villani, Giulio; Bose, Rajiv; Gabrielli, Alessandro

    2011-01-01

    The design, fabrication and evaluation of a set of micro antennas (ANTs) on chip is described. The size of the ANTs is 2 and has been chosen with a view to the development of a monolithic implantable sensor for in vivo dosimetry which is the ultimate focus of this project. Three different designs are currently being investigated, with a view to evaluate their RF performances in the communication-standard Medical Implant Communication Service (MICS) frequency band.

  20. Active 2D materials for on-chip nanophotonics and quantum optics

    Directory of Open Access Journals (Sweden)

    Shiue Ren-Jye

    2017-03-01

    Full Text Available Two-dimensional materials have emerged as promising candidates to augment existing optical networks for metrology, sensing, and telecommunication, both in the classical and quantum mechanical regimes. Here, we review the development of several on-chip photonic components ranging from electro-optic modulators, photodetectors, bolometers, and light sources that are essential building blocks for a fully integrated nanophotonic and quantum photonic circuit.

  1. Cooling tower

    Energy Technology Data Exchange (ETDEWEB)

    Norbaeck, P; Heneby, H

    1976-01-22

    Cooling towers to be transported on road vehicles as a unit are not allowed to exceed certain dimensions. In order to improve the efficiency of such a cooling tower (of cross-flow design and box-type body) with given dimensions, it is proposed to arrange at least one of the scrubbing bodies displaceable within a module or box. Then it can be moved out of the casing into working position, thereby increasing the front surface available for the inlet of air (and with it the efficiency) by nearly a factor of two.

  2. Alternating Current-Dielectrophoresis Collection and Chaining of Phytoplankton on Chip: Comparison of Individual Species and Artificial Communities

    Directory of Open Access Journals (Sweden)

    Coralie Siebman

    2017-01-01

    Full Text Available The capability of alternating current (AC dielectrophoresis (DEP for on-chip capture and chaining of the three species representative of freshwater phytoplankton was evaluated. The effects of the AC field intensity, frequency and duration on the chaining efficiency and chain lengths of green alga Chlamydomonas reinhardtii, cyanobacterium Synechocystis sp. and diatom Cyclotella meneghiniana were characterized systematically. C. reinhardtii showed an increase of the chaining efficiency from 100 Hz to 500 kHz at all field intensities; C. meneghiniana presented a decrease of chaining efficiency from 100 Hz to 1 kHz followed by a significant increase from 1 kHz to 500 kHz, while Synechocystis sp. exhibited low chaining tendency at all frequencies and all field intensities. The experimentally-determined DEP response and cell alignment of each microorganism were in agreement with their effective polarizability. Mixtures of cells in equal proportion or 10-times excess of Synechocystis sp. showed important differences in terms of chaining efficiency and length of the chains compared with the results obtained when the cells were alone in suspension. While a constant degree of chaining was observed with the mixture of C. reinhardtii and C. meneghiniana, the presence of Synechocystis sp. in each mixture suppressed the formation of chains for the two other phytoplankton species. All of these results prove the potential of DEP to discriminate different phytoplankton species depending on their effective polarizability and to enable their manipulation, such as specific collection or separation in freshwater.

  3. All-electronic droplet generation on-chip with real-time feedback control for EWOD digital microfluidics.

    Science.gov (United States)

    Gong, Jian; Kim, Chang-Jin C J

    2008-06-01

    Electrowetting-on-dielectric (EWOD) actuation enables digital (or droplet) microfluidics where small packets of liquids are manipulated on a two-dimensional surface. Due to its mechanical simplicity and low energy consumption, EWOD holds particular promise for portable systems. To improve volume precision of the droplets, which is desired for quantitative applications such as biochemical assays, existing practices would require near-perfect device fabrication and operation conditions unless the droplets are generated under feedback control by an extra pump setup off of the chip. In this paper, we develop an all-electronic (i.e., no ancillary pumping) real-time feedback control of on-chip droplet generation. A fast voltage modulation, capacitance sensing, and discrete-time PID feedback controller are integrated on the operating electronic board. A significant improvement is obtained in the droplet volume uniformity, compared with an open loop control as well as the previous feedback control employing an external pump. Furthermore, this new capability empowers users to prescribe the droplet volume even below the previously considered minimum, allowing, for example, 1 : x (x < 1) mixing, in comparison to the previously considered n : m mixing (i.e., n and m unit droplets).

  4. ALL-ELECTRONIC DROPLET GENERATION ON-CHIP WITH REAL-TIME FEEDBACK CONTROL FOR EWOD DIGITIAL MICROFLUIDICS

    Science.gov (United States)

    Gong, Jian; Kim, Chang-Jin “CJ”

    2009-01-01

    Electrowetting-on-dielectric (EWOD) actuation enables digital (or droplet) microfluidics where small packets of liquids are manipulated on a two-dimensional surface. Due to its mechanical simplicity and low energy consumption, EWOD holds particular promise for portable systems. To improve volume precision of the droplets, which is desired for quantitative applications such as biochemical assays, existing practices would require near-perfect device fabricaion and operation conditions unless the droplets are generated under feedback control by an extra pump setup off of the chip. In this paper, we develop an all-electronic (i.e., no ancillary pumping) real-time feedback control of on-chip droplet generation. A fast voltage modulation, capacitance sensing, and discrete-time PID feedback controller are integrated on the operating electronic board. A significant improvement is obtained in the droplet volume uniformity, compared with an open loop control as well as the previous feedback control employing an external pump. Furthermore, this new capability empowers users to prescribe the droplet volume even below the previously considered minimum, allowing, for example, 1:x (x < 1) mixing, in comparison to the previously considered n:m mixing (i.e., n and m unit droplets). PMID:18497909

  5. MHTGR inherent heat transfer capability

    International Nuclear Information System (INIS)

    Berkoe, J.M.

    1992-01-01

    This paper reports on the Commercial Modular High Temperature Gas-Cooled Reactor (MHTGR) which achieves improved reactor safety performance and reliability by utilizing a completely passive natural convection cooling system called the RCCS to remove decay heat in the event that all active cooling systems fail to operate. For the highly improbable condition that the RCCS were to become non-functional following a reactor depressurization event, the plant would be forced to rely upon its inherent thermo-physical characteristics to reject decay heat to the surrounding earth and ambient environment. A computational heat transfer model was created to simulate such a scenario. Plant component temperature histories were computed over a period of 20 days into the event. The results clearly demonstrate the capability of the MHTGR to maintain core integrity and provide substantial lead time for taking corrective measures

  6. On-chip plasmon-induced transparency based on plasmonic coupled nanocavities.

    Science.gov (United States)

    Zhu, Yu; Hu, Xiaoyong; Yang, Hong; Gong, Qihuang

    2014-01-17

    On-chip plasmon-induced transparency offers the possibility of realization of ultrahigh-speed information processing chips. Unfortunately, little experimental progress has been made to date because it is difficult to obtain on-chip plasmon-induced transparency using only a single meta-molecule in plasmonic circuits. Here, we report a simple and efficient strategy to realize on-chip plasmon-induced transparency in a nanoscale U-shaped plasmonic waveguide side-coupled nanocavity pair. High tunability in the transparency window is achieved by covering the pair with different organic polymer layers. It is possible to realize ultrafast all-optical tunability based on pump light-induced refractive index change of a graphene cover layer. Compared with previous reports, the overall feature size of the plasmonic nanostructure is reduced by more than three orders of magnitude, while ultrahigh tunability of the transparency window is maintained. This work also provides a superior platform for the study of the various physical effects and phenomena of nonlinear optics and quantum optics.

  7. Blood cleaner on-chip design for artificial human kidney manipulation

    Directory of Open Access Journals (Sweden)

    Suwanpayak N

    2011-05-01

    Full Text Available N Suwanpayak1, MA Jalil2, MS Aziz3, FD Ismail3, J Ali3, PP Yupapin11Nanoscale Science and Engineering Research Alliance (N'SERA, Advanced Research Center for Photonics, Faculty of Science, King Mongkut's Institute of Technology, Ladkrabang, Bangkok, Thailand; 2Ibnu Sina Institute of Fundamental Science Studies (IIS, 3Institute of Advanced Photonics Science, Nanotechnology Research Alliance, Universiti Teknologi Malaysia, Johor Bahru, MalaysiaAbstract: A novel design of a blood cleaner on-chip using an optical waveguide known as a PANDA ring resonator is proposed. By controlling some suitable parameters, the optical vortices (gradient optical fields/wells can be generated and used to form the trapping tools in the same way as optical tweezers. In operation, the trapping force is formed by the combination between the gradient field and scattering photons by using the intense optical vortices generated within the PANDA ring resonator. This can be used for blood waste trapping and moves dynamically within the blood cleaner on-chip system (artificial kidney, and is performed within the wavelength routers. Finally, the blood quality test is exploited by the external probe before sending to the destination. The advantage of the proposed kidney on-chip system is that the unwanted substances can be trapped and filtered from the artificial kidney, which can be available for blood cleaning applications.Keywords: optical trapping, blood dialysis, blood cleaner, human kidney manipulation

  8. Electromagnetic design methods in systems-on-chip: integrated filters for wireless CMOS RFICs

    International Nuclear Information System (INIS)

    Contopanagos, Harry

    2005-01-01

    We present general methods for designing on-chip CMOS passives and utilizing these integrated elements to design on-chip CMOS filters for wireless communications. These methods rely on full-wave electromagnetic numerical calculations that capture all the physics of the underlying foundry technologies. This is especially crucial for deep sub-micron CMOS technologies as it is important to capture the physical effects of finite (and mediocre) Q-factors limited by material losses and constraints on expensive die area, low self-resonance frequencies and dual parasitics that are particularly prevalent in deep sub-micron CMOS processes (65 nm-0.18 μm. We use these integrated elements in an ideal synthesis of a Bluetooth/WLAN pass-band filter in single-ended or differential architectures, and show the significant deviations of the on-chip filter response from the ideal one. We identify which elements in the filter circuit need to maximize their Q-factors and which Q-factors do not affect the filter performance. This saves die area, and predicts the FET parameters (especially transconductances) and negative-resistance FET topologies that have to be integrated in the filter to restore its performance. (invited paper)

  9. On-chip steering of entangled photons in nonlinear photonic crystals.

    Science.gov (United States)

    Leng, H Y; Yu, X Q; Gong, Y X; Xu, P; Xie, Z D; Jin, H; Zhang, C; Zhu, S N

    2011-08-16

    One promising technique for working toward practical photonic quantum technologies is to implement multiple operations on a monolithic chip, thereby improving stability, scalability and miniaturization. The on-chip spatial control of entangled photons will certainly benefit numerous applications, including quantum imaging, quantum lithography, quantum metrology and quantum computation. However, external optical elements are usually required to spatially control the entangled photons. Here we present the first experimental demonstration of on-chip spatial control of entangled photons, based on a domain-engineered nonlinear photonic crystal. We manipulate the entangled photons using the inherent properties of the crystal during the parametric downconversion, demonstrating two-photon focusing and beam-splitting from a periodically poled lithium tantalate crystal with a parabolic phase profile. These experimental results indicate that versatile and precise spatial control of entangled photons is achievable. Because they may be operated independent of any bulk optical elements, domain-engineered nonlinear photonic crystals may prove to be a valuable ingredient in on-chip integrated quantum optics.

  10. Gain-Enhanced On-Chip Antenna Utilizing Artificial Magnetic Conductor Reflecting Surface at 94 GHz

    KAUST Repository

    Nafe, Mahmoud

    2015-01-01

    In this work, the use of specially patterned reflecting surfaces for improving on- chip antenna performance is investigated. By using a periodic metallic surface on top of a grounded substrate, the structure can mimic the behavior of a perfect mag- netic conductor, hence called Artificial Magnetic Conductor (AMC) surface. Unlike conventional ground plane reflecting surfaces, AMC surfaces generally enhance the radiation and impedance characteristics of close-by antennas. Based on this property, a ring-based AMC reflecting surface has been designed in the oxide layer for on-chip antennas operating at 94 GHz. Furthermore, a folded dipole antenna with its associ- ated planar feeding structures has been optimized and integrated with the developed ring-based AMC surface. The proposed design is then fabricated at KAUST clean- room facilities. Prototype characterization showed very promising results with good correlation to simulations, with the antenna exhibiting an impedance bandwidth of 10% (90-100 GHz) and peak gain of -1.4 dBi, which is the highest gain reported for on-chip antennas at this frequency band without the use of any external o↵-chip components or post-fabrication steps.

  11. Towards a Generic and Adaptive System-On-Chip Controller for Space Exploration Instrumentation

    Science.gov (United States)

    Iturbe, Xabier; Keymeulen, Didier; Yiu, Patrick; Berisford, Dan; Hand, Kevin; Carlson, Robert; Ozer, Emre

    2015-01-01

    This paper introduces one of the first efforts conducted at NASA’s Jet Propulsion Laboratory (JPL) to develop a generic System-on-Chip (SoC) platform to control science instruments that are proposed for future NASA missions. The SoC platform is named APEX-SoC, where APEX stands for Advanced Processor for space Exploration, and is based on a hybrid Xilinx Zynq that combines an FPGA and an ARM Cortex-A9 dual-core processor on a single chip. The Zynq implements a generic and customizable on-chip infrastructure that can be reused with a variety of instruments, and it has been coupled with a set of off-chip components that are necessary to deal with the different instruments. We have taken JPL’s Compositional InfraRed Imaging Spectrometer (CIRIS), which is proposed for NASA icy moons missions, as a use-case scenario to demonstrate that the entire data processing, control and interface of an instrument can be implemented on a single device using the on-chip infrastructure described in this paper. We show that the performance results achieved in this preliminary version of the instrumentation controller are sufficient to fulfill the science requirements demanded to the CIRIS instrument in future NASA missions, such as Europa.

  12. Design of a CMOS integrated on-chip oscilloscope for spin wave characterization

    Directory of Open Access Journals (Sweden)

    Eugen Egel

    2017-05-01

    Full Text Available Spin waves can perform some optically-inspired computing algorithms, e.g. the Fourier transform, directly than it is done with the CMOS logic. This article describes a new approach for on-chip characterization of spin wave based devices. The readout circuitry for the spin waves is simulated with 65-nm CMOS technology models. Commonly used circuits for Radio Frequency (RF receivers are implemented to detect a sinusoidal ultra-wideband (5-50 GHz signal with an amplitude of at least 15 μV picked up by a loop antenna. First, the RF signal is amplified by a Low Noise Amplifier (LNA. Then, it is down-converted by a mixer to Intermediate Frequency (IF. Finally, an Operational Amplifier (OpAmp brings the IF signal to higher voltages (50-300 mV. The estimated power consumption and the required area of the readout circuit is approximately 55.5 mW and 0.168 mm2, respectively. The proposed On-Chip Oscilloscope (OCO is highly suitable for on-chip spin wave characterization regarding the frequency, amplitude change and phase information. It offers an integrated low power alternative to current spin wave detecting systems.

  13. On-chip growth of semiconductor metal oxide nanowires for gas sensors: A review

    Directory of Open Access Journals (Sweden)

    Chu Manh Hung

    2017-09-01

    Full Text Available Semiconductor metal oxide nanowires (SMO-NWs show great potential for novel gas sensor applications because of their distinct properties, such as a high surface area to volume aspect ratio, high crystallinity and perfect pathway for electron transfer (length of NW. SMO-NW sensors can be configured as resistors or field-effect transistors for gas detection and different configurations, such as a single NW, multiple NWs, and networked NW films, have been established. Surface-functionalizing NWs with catalyst elements and self-heating NWs provide additional advantages for highly selective and low-power consumption gas sensors. However, an appropriate design of SMO-NWs is of practical importance in enhancing the gas-sensing performance of SMO-NW sensors. The on-chip growth of SMO-NWs possesses many advantages which can thus be effectively used for the large-scale fabrication of SMO-NW sensors with improved gas response and stability. This review aims to provide up-to-date information on the on-chip fabrication of SnO2, ZnO, WO3, CuO, and other SMO-NW sensors. It also discusses a variety of promising approaches that help advance the on-chip fabrication of SMO-NW-based gas sensors and other NW-based devices.

  14. Electromagnetic design methods in systems-on-chip: integrated filters for wireless CMOS RFICs

    Energy Technology Data Exchange (ETDEWEB)

    Contopanagos, Harry [Institute for Microelectronics, NCSR ' Demokritos' , PO Box 60228, GR-153 10 Aghia Paraskevi, Athens (Greece)

    2005-01-01

    We present general methods for designing on-chip CMOS passives and utilizing these integrated elements to design on-chip CMOS filters for wireless communications. These methods rely on full-wave electromagnetic numerical calculations that capture all the physics of the underlying foundry technologies. This is especially crucial for deep sub-micron CMOS technologies as it is important to capture the physical effects of finite (and mediocre) Q-factors limited by material losses and constraints on expensive die area, low self-resonance frequencies and dual parasitics that are particularly prevalent in deep sub-micron CMOS processes (65 nm-0.18 {mu}m. We use these integrated elements in an ideal synthesis of a Bluetooth/WLAN pass-band filter in single-ended or differential architectures, and show the significant deviations of the on-chip filter response from the ideal one. We identify which elements in the filter circuit need to maximize their Q-factors and which Q-factors do not affect the filter performance. This saves die area, and predicts the FET parameters (especially transconductances) and negative-resistance FET topologies that have to be integrated in the filter to restore its performance. (invited paper)

  15. Integration of microcoils for on-chip immunosensors based on magnetic nanoparticles capture

    Directory of Open Access Journals (Sweden)

    Olivier Lefebvre

    2017-04-01

    Full Text Available Immunoassays using magnetic nanoparticles (MNP are generally performed under the control of permanent magnet close to the micro-tube of reaction. Using a magnet gives a powerful method for driving MNP but remains unreliable or insufficient for a fully integrated immunoassay on lab-on-chip. The aim of this study is to develop a novel lab-on-chip concept for high efficient immunoassays to detect ovalbumin (Biodefense model molecule with microcoils employed for trapping MNP during the biofunctionalization steps. The objectives are essentially to optimize their efficiency for biological recognition by assuring a better bioactivity (antibodies-ovalbumin, and detect small concentrations of the targeted protein (~10 pg/mL. In this work, we studied the response of immunoassays complex function of ovalbumin concentration. The impact of MNP diameter in the biografting protocol was studied and permitted to choose a convenient MNP size for efficient biorecognition. We realized different immunoassays by controlling MNP in test tube and in microfluidic device using a permanent magnet. The comparison between these two experiments allows us to highlight an improvement of the limit of detection in microfluidic conditions by controlling MNP trapping with a magnet. Keywords: Bacteria, Lab-on-chip, ELISA, Magnetic nanoparticles, Ovalbumin, Microcoils, Fluorescent microscopy

  16. Manually operatable on-chip bistable pneumatic microstructures for microfluidic manipulations.

    Science.gov (United States)

    Chen, Arnold; Pan, Tingrui

    2014-09-07

    Bistable microvalves are of particular interest because of their distinct nature of requiring energy consumption only during the transition between the open and closed states. This characteristic can be highly advantageous in reducing the number of external inputs and the complexity of control circuitries since microfluidic devices as contemporary lab-on-a-chip platforms are transferring from research settings to low-resource environments with high integrability and a small form factor. In this paper, we first present manually operatable, on-chip bistable pneumatic microstructures (BPMs) for microfluidic manipulation. The structural design and operation of the BPM devices can be readily integrated into any pneumatically powered microfluidic network consisting of pneumatic and fluidic channels. It is mainly composed of a vacuum activation chamber (VAC) and a pressure release chamber (PRC), of which users have direct control through finger pressing to switch either to the bistable vacuum state (VS) or the atmospheric state (AS). We have integrated multiple BPM devices into a 4-to-1 microfluidic multiplexor to demonstrate on-chip digital flow switching from different sources. Furthermore, we have shown its clinical relevance in a point-of-care diagnostic chip that processes blood samples to identify the distinct blood types (A/B/O) on-chip.

  17. A Router Architecture for Connection-Oriented Service Guarantees in the MANGO Clockless Network-on-Chip

    DEFF Research Database (Denmark)

    Bjerregaard, Tobias; Sparsø, Jens

    2005-01-01

    On-chip networks for future system-on-chip designs need simple, high performance implementations. In order to promote system-level integrity, guaranteed services (GS) need to be provided. We propose a network-on-chip (NoC) router architecture to support this, and demonstrate with a CMOS standard...... cell design. Our implementation is based on clockless circuit techniques, and thus inherently supports a modular, GALS-oriented design flow. Our router exploits virtual channels to provide connection-oriented GS, as well as connection-less best-effort (BE) routing. The architecture is highly flexible...

  18. Adaptive Code Division Multiple Access Protocol for Wireless Network-on-Chip Architectures

    Science.gov (United States)

    Vijayakumaran, Vineeth

    Massive levels of integration following Moore's Law ushered in a paradigm shift in the way on-chip interconnections were designed. With higher and higher number of cores on the same die traditional bus based interconnections are no longer a scalable communication infrastructure. On-chip networks were proposed enabled a scalable plug-and-play mechanism for interconnecting hundreds of cores on the same chip. Wired interconnects between the cores in a traditional Network-on-Chip (NoC) system, becomes a bottleneck with increase in the number of cores thereby increasing the latency and energy to transmit signals over them. Hence, there has been many alternative emerging interconnect technologies proposed, namely, 3D, photonic and multi-band RF interconnects. Although they provide better connectivity, higher speed and higher bandwidth compared to wired interconnects; they also face challenges with heat dissipation and manufacturing difficulties. On-chip wireless interconnects is one other alternative proposed which doesn't need physical interconnection layout as data travels over the wireless medium. They are integrated into a hybrid NOC architecture consisting of both wired and wireless links, which provides higher bandwidth, lower latency, lesser area overhead and reduced energy dissipation in communication. However, as the bandwidth of the wireless channels is limited, an efficient media access control (MAC) scheme is required to enhance the utilization of the available bandwidth. This thesis proposes using a multiple access mechanism such as Code Division Multiple Access (CDMA) to enable multiple transmitter-receiver pairs to send data over the wireless channel simultaneously. It will be shown that such a hybrid wireless NoC with an efficient CDMA based MAC protocol can significantly increase the performance of the system while lowering the energy dissipation in data transfer. In this work it is shown that the wireless NoC with the proposed CDMA based MAC protocol

  19. Stochastic cooling

    International Nuclear Information System (INIS)

    Bisognano, J.; Leemann, C.

    1982-03-01

    Stochastic cooling is the damping of betatron oscillations and momentum spread of a particle beam by a feedback system. In its simplest form, a pickup electrode detects the transverse positions or momenta of particles in a storage ring, and the signal produced is amplified and applied downstream to a kicker. The time delay of the cable and electronics is designed to match the transit time of particles along the arc of the storage ring between the pickup and kicker so that an individual particle receives the amplified version of the signal it produced at the pick-up. If there were only a single particle in the ring, it is obvious that betatron oscillations and momentum offset could be damped. However, in addition to its own signal, a particle receives signals from other beam particles. In the limit of an infinite number of particles, no damping could be achieved; we have Liouville's theorem with constant density of the phase space fluid. For a finite, albeit large number of particles, there remains a residue of the single particle damping which is of practical use in accumulating low phase space density beams of particles such as antiprotons. It was the realization of this fact that led to the invention of stochastic cooling by S. van der Meer in 1968. Since its conception, stochastic cooling has been the subject of much theoretical and experimental work. The earliest experiments were performed at the ISR in 1974, with the subsequent ICE studies firmly establishing the stochastic cooling technique. This work directly led to the design and construction of the Antiproton Accumulator at CERN and the beginnings of p anti p colliding beam physics at the SPS. Experiments in stochastic cooling have been performed at Fermilab in collaboration with LBL, and a design is currently under development for a anti p accumulator for the Tevatron

  20. Nanofabrication for On-Chip Optical Levitation, Atom-Trapping, and Superconducting Quantum Circuits

    Science.gov (United States)

    Norte, Richard Alexander

    Researchers have spent decades refining and improving their methods for fabricating smaller, finer-tuned, higher-quality nanoscale optical elements with the goal of making more sensitive and accurate measurements of the world around them using optics. Quantum optics has been a well-established tool of choice in making these increasingly sensitive measurements which have repeatedly pushed the limits on the accuracy of measurement set forth by quantum mechanics. A recent development in quantum optics has been a creative integration of robust, high-quality, and well-established macroscopic experimental systems with highly-engineerable on-chip nanoscale oscillators fabricated in cleanrooms. However, merging large systems with nanoscale oscillators often require them to have extremely high aspect-ratios, which make them extremely delicate and difficult to fabricate with an experimentally reasonable repeatability, yield and high quality. In this work we give an overview of our research, which focused on microscopic oscillators which are coupled with macroscopic optical cavities towards the goal of cooling them to their motional ground state in room temperature environments. The quality factor of a mechanical resonator is an important figure of merit for various sensing applications and observing quantum behavior. We demonstrated a technique for pushing the quality factor of a micromechanical resonator beyond conventional material and fabrication limits by using an optical field to stiffen and trap a particular motional mode of a nanoscale oscillator. Optical forces increase the oscillation frequency by storing most of the mechanical energy in a nearly loss-less optical potential, thereby strongly diluting the effects of material dissipation. By placing a 130 nm thick SiO2 pendulum in an optical standing wave, we achieve an increase in the pendulum center-of-mass frequency from 6.2 to 145 kHz. The corresponding quality factor increases 50-fold from its intrinsic value to

  1. Dynamic On-Chip micro Temperature and Flow Sensor for miniaturized lab-on-a-chip instruments

    Data.gov (United States)

    National Aeronautics and Space Administration — The purpose of this project is to design, fabricate, and characterize a Dynamic On-Chip Flow and Temperature Sensor (DOCFlaTS) to mature and enable miniaturized...

  2. Laser Light-field Fusion for Wide-field Lensfree On-chip Phase Contrast Microscopy of Nanoparticles

    Science.gov (United States)

    Kazemzadeh, Farnoud; Wong, Alexander

    2016-12-01

    Wide-field lensfree on-chip microscopy, which leverages holography principles to capture interferometric light-field encodings without lenses, is an emerging imaging modality with widespread interest given the large field-of-view compared to lens-based techniques. In this study, we introduce the idea of laser light-field fusion for lensfree on-chip phase contrast microscopy for detecting nanoparticles, where interferometric laser light-field encodings acquired using a lensfree, on-chip setup with laser pulsations at different wavelengths are fused to produce marker-free phase contrast images of particles at the nanometer scale. As a proof of concept, we demonstrate, for the first time, a wide-field lensfree on-chip instrument successfully detecting 300 nm particles across a large field-of-view of ~30 mm2 without any specialized or intricate sample preparation, or the use of synthetic aperture- or shift-based techniques.

  3. A very cool cooling system

    CERN Multimedia

    Antonella Del Rosso

    2015-01-01

    The NA62 Gigatracker is a jewel of technology: its sensor, which delivers the time of the crossing particles with a precision of less than 200 picoseconds (better than similar LHC detectors), has a cooling system that might become the precursor to a completely new detector technique.   The 115 metre long vacuum tank of the NA62 experiment. The NA62 Gigatracker (GTK) is composed of a set of three innovative silicon pixel detectors, whose job is to measure the arrival time and the position of the incoming beam particles. Installed in the heart of the NA62 detector, the silicon sensors are cooled down (to about -20 degrees Celsius) by a microfluidic silicon device. “The cooling system is needed to remove the heat produced by the readout chips the silicon sensor is bonded to,” explains Alessandro Mapelli, microsystems engineer working in the Physics department. “For the NA62 Gigatracker we have designed a cooling plate on top of which both the silicon sensor and the...

  4. Cooling pancakes

    International Nuclear Information System (INIS)

    Bond, J.R.; Wilson, J.R.

    1984-01-01

    In theories of galaxy formation with a damping cut-off in the density fluctuation spectrum, the first non-linear structures to form are Zeldovich pancakes in which dissipation separates gas from any collisionless dark matter then present. One-dimensional numerical simulations of the collapse, shock heating, and subsequent thermal evolution of pancakes are described. Neutrinos (or any other cool collisionless particles) are followed by direct N-body methods and the gas by Eulerian hydrodynamics with conduction as well as cooling included. It is found that the pressure is relatively uniform within the shocked region and approximately equals the instantaneous ram pressure acting at the shock front. An analytic theory based upon this result accurately describes the numerical calculations. (author)

  5. Cool Sportswear

    Science.gov (United States)

    1982-01-01

    New athletic wear design based on the circulating liquid cooling system used in the astronaut's space suits, allows athletes to perform more strenuous activity without becoming overheated. Techni-Clothes gear incorporates packets containing a heat-absorbing gel that slips into an insulated pocket of the athletic garment and is positioned near parts of the body where heat transfer is most efficient. A gel packet is good for about one hour. Easily replaced from a supply of spares in an insulated container worn on the belt. The products, targeted primarily for runners and joggers and any other athlete whose performance may be affected by hot weather, include cooling headbands, wrist bands and running shorts with gel-pack pockets.

  6. Cooling systems

    International Nuclear Information System (INIS)

    Coutant, C.C.

    1978-01-01

    Progress on the thermal effects project is reported with regard to physiology and distribution of Corbicula; power plant effects studies on burrowing mayfly populations; comparative thermal responses of largemouth bass from northern and southern populations; temperature selection by striped bass in Cherokee Reservoir; fish population studies; and predictive thermoregulation by fishes. Progress is also reported on the following; cause and ecological ramifications of threadfin shad impingement; entrainment project; aquaculture project; pathogenic amoeba project; and cooling tower drift project

  7. A Lab-on-Chip Design for Miniature Autonomous Bio-Chemoprospecting Planetary Rovers

    Science.gov (United States)

    Santoli, S.

    The performance of the so-called ` Lab-on-Chip ' devices, featuring micrometre size components and employed at present for carrying out in a very fast and economic way the extremely high number of sequence determinations required in genomic analyses, can be largely improved as to further size reduction, decrease of power consumption and reaction efficiency through development of nanofluidics and of nano-to-micro inte- grated systems. As is shown, such new technologies would lead to robotic, fully autonomous, microwatt consumption and complete ` laboratory on a chip ' units for accurate, fast and cost-effective astrobiological and planetary exploration missions. The theory and the manufacturing technologies for the ` active chip ' of a miniature bio/chemoprospecting planetary rover working on micro- and nanofluidics are investigated. The chip would include micro- and nanoreactors, integrated MEMS (MicroElectroMechanical System) components, nanoelectronics and an intracavity nanolaser for highly accurate and fast chemical analysis as an application of such recently introduced solid state devices. Nano-reactors would be able to strongly speed up reaction kinetics as a result of increased frequency of reactive collisions. The reaction dynamics may also be altered with respect to standard macroscopic reactors. A built-in miniature telemetering unit would connect a network of other similar rovers and a central, ground-based or orbiting control unit for data collection and transmission to an Earth-based unit through a powerful antenna. The development of the ` Lab-on-Chip ' concept for space applications would affect the economy of space exploration missions, as the rover's ` Lab-on-Chip ' development would link space missions with the ever growing terrestrial market and business concerning such devices, largely employed in modern genomics and bioinformatics, so that it would allow the recoupment of space mission costs.

  8. All-Digital Time-Domain CMOS Smart Temperature Sensor with On-Chip Linearity Enhancement.

    Science.gov (United States)

    Chen, Chun-Chi; Chen, Chao-Lieh; Lin, Yi

    2016-01-30

    This paper proposes the first all-digital on-chip linearity enhancement technique for improving the accuracy of the time-domain complementary metal-oxide semiconductor (CMOS) smart temperature sensor. To facilitate on-chip application and intellectual property reuse, an all-digital time-domain smart temperature sensor was implemented using 90 nm Field Programmable Gate Arrays (FPGAs). Although the inverter-based temperature sensor has a smaller circuit area and lower complexity, two-point calibration must be used to achieve an acceptable inaccuracy. With the help of a calibration circuit, the influence of process variations was reduced greatly for one-point calibration support, reducing the test costs and time. However, the sensor response still exhibited a large curvature, which substantially affected the accuracy of the sensor. Thus, an on-chip linearity-enhanced circuit is proposed to linearize the curve and achieve a new linearity-enhanced output. The sensor was implemented on eight different Xilinx FPGA using 118 slices per sensor in each FPGA to demonstrate the benefits of the linearization. Compared with the unlinearized version, the maximal inaccuracy of the linearized version decreased from 5 °C to 2.5 °C after one-point calibration in a range of -20 °C to 100 °C. The sensor consumed 95 μW using 1 kSa/s. The proposed linearity enhancement technique significantly improves temperature sensing accuracy, avoiding costly curvature compensation while it is fully synthesizable for future Very Large Scale Integration (VLSI) system.

  9. An Efficient Radio Access Control Mechanism for Wireless Network-On-Chip Architectures

    Directory of Open Access Journals (Sweden)

    Maurizio Palesi

    2015-03-01

    Full Text Available Modern systems-on-chip (SoCs today contain hundreds of cores, and this number is predicted to reach the thousands by the year 2020. As the number of communicating elements increases, there is a need for an efficient, scalable and reliable communication infrastructure. As technology geometries shrink to the deep submicron regime, however, the communication delay and power consumption of global interconnections become the major bottleneck. The network-on-chip (NoC design paradigm, based on a modular packet-switched mechanism, can address many of the on-chip communication issues, such as the performance limitations of long interconnects and integration of large number of cores on a chip. Recently, new communication technologies based on the NoC concept have emerged with the aim of improving the scalability limitations of conventional NoC-based architectures. Among them, wireless NoCs (WiNoCs use the radio medium for reducing the performance and energy penalties of long-range and multi-hop communications. As the radio medium can be accessed by a single transmitter at a time, a radio access control mechanism (RACM is needed. In this paper, we present a novel RACM, which allows one to improve both the performance and energy figures of the WiNoC. Experiments, carried out on both synthetic and real traffic scenarios, have shown the effectiveness of the proposed RACM. On average, a 30% reduction in communication delay and a 25% energy savings have been observed when the proposed RACM is applied to a known WiNoC architecture.

  10. On-chip magnetic bead-based DNA melting curve analysis using a magnetoresistive sensor

    DEFF Research Database (Denmark)

    Rizzi, Giovanni; Østerberg, Frederik Westergaard; Henriksen, Anders Dahl

    2014-01-01

    We present real-time measurements of DNA melting curves in a chip-based system that detects the amount of surface-bound magnetic beads using magnetoresistive magnetic field sensors. The sensors detect the difference between the amount of beads bound to the top and bottom sensor branches....... The beads are magnetized by the field arising from the bias current passed through the sensors. We demonstrate the first on-chip measurements of the melting of DNA hybrids upon a ramping of the temperature. This overcomes the limitation of using a single washing condition at constant temperature. Moreover...

  11. Support for Programming Models in Network-on-Chip-based Many-core Systems

    DEFF Research Database (Denmark)

    Rasmussen, Morten Sleth

    This thesis addresses aspects of support for programming models in Network-on- Chip-based many-core architectures. The main focus is to consider architectural support for a plethora of programming models in a single system. The thesis has three main parts. The first part considers parallelization...... models to be supported by a single architecture. The architecture features a specialized network interface processor which allows extensive configurability of the memory system. Based on this architecture, a detailed implementation of the cache coherent shared memory programming model is presented...

  12. A simple clockless Network-on-Chip for a commercial audio DSP chip

    DEFF Research Database (Denmark)

    Stensgaard, Mikkel Bystrup; Bjerregaard, Tobias; Sparsø, Jens

    2006-01-01

    We design a very small, packet-switched, clockless Network-on-Chip (NoC) as a replacement for the existing crossbar-based communication infrastructure in a commercial audio DSP chip. Both solutions are laid out in a 0.18 um process, and compared in terms of area, power consumption and routing...... to the existing crossbar, it allows all blocks to communicate. The total wire length is decreased by 22% which eases the layout process and makes the design less prone to routing congestion. Not least, the communicating blocks are decoupled by means of the NoC, providing a Globally-Asynchronous, Locally...

  13. An acoustic on-chip goniometer for room temperature macromolecular crystallography.

    Science.gov (United States)

    Burton, C G; Axford, D; Edwards, A M J; Gildea, R J; Morris, R H; Newton, M I; Orville, A M; Prince, M; Topham, P D; Docker, P T

    2017-12-05

    This paper describes the design, development and successful use of an on-chip goniometer for room-temperature macromolecular crystallography via acoustically induced rotations. We present for the first time a low cost, rate-tunable, acoustic actuator for gradual in-fluid sample reorientation about varying axes and its utilisation for protein structure determination on a synchrotron beamline. The device enables the efficient collection of diffraction data via a rotation method from a sample within a surface confined droplet. This method facilitates efficient macromolecular structural data acquisition in fluid environments for dynamical studies.

  14. Amplification of biological targets via on-chip culture for biosensing

    Science.gov (United States)

    Harper, Jason C.; Edwards, Thayne L.; Carson, Bryan; Finley, Melissa; Arndt, William

    2018-01-02

    The present invention, in part, relates to methods and apparatuses for on-chip amplification and/or detection of various targets, including biological targets and any amplifiable targets. In some examples, the microculture apparatus includes a single-use, normally-closed fluidic valve that is initially maintained in the closed position by a valve element bonded to an adhesive coating. The valve is opened using a magnetic force. The valve element includes a magnetic material or metal. Such apparatuses and methods are useful for in-field or real-time detection of targets, especially in limited resource settings.

  15. Magnetically engineered smart thin films: toward lab-on-chip ultra-sensitive molecular imaging.

    Science.gov (United States)

    Hassan, Muhammad A; Saqib, Mudassara; Shaikh, Haseeb; Ahmad, Nasir M; Elaissari, Abdelhamid

    2013-03-01

    Magnetically responsive engineered smart thin films of nanoferrites as contrast agent are employed to develop surface based magnetic resonance imaging to acquire simple yet fast molecular imaging. The work presented here can be of significant potential for future lab-on-chip point-of-care diagnostics from the whole blood pool on almost any substrates to reduce or even prevent clinical studies involve a living organism to enhance the non-invasive imaging to advance the '3Rs' of work in animals-replacement, refinement and reduction.

  16. On-chip spectroscopy with thermally tuned high-Q photonic crystal cavities

    Energy Technology Data Exchange (ETDEWEB)

    Liapis, Andreas C., E-mail: andreas.liapis@gmail.com; Gao, Boshen; Siddiqui, Mahmudur R. [The Institute of Optics, University of Rochester, Rochester, New York 14627 (United States); Shi, Zhimin [Department of Physics, University of South Florida, Tampa, Florida 33620 (United States); Boyd, Robert W. [The Institute of Optics, University of Rochester, Rochester, New York 14627 (United States); Department of Physics and School of Electrical Engineering and Computer Science, University of Ottawa, Ottawa, Ontario K1N 6N5 (Canada)

    2016-01-11

    Spectroscopic methods are a sensitive way to determine the chemical composition of potentially hazardous materials. Here, we demonstrate that thermally tuned high-Q photonic crystal cavities can be used as a compact high-resolution on-chip spectrometer. We have used such a chip-scale spectrometer to measure the absorption spectra of both acetylene and hydrogen cyanide in the 1550 nm spectral band and show that we can discriminate between the two chemical species even though the two materials have spectral features in the same spectral region. Our results pave the way for the development of chip-size chemical sensors that can detect toxic substances.

  17. On-chip optical filter comprising Fabri-Perot resonator structure and spectrometer

    Energy Technology Data Exchange (ETDEWEB)

    Han, Seunghoon; Horie, Yu; Faraon, Andrei; Arbabi, Amir

    2018-04-10

    An on-chip optical filter having Fabri-Perot resonators and a spectrometer may include a first sub-wavelength grating (SWG) reflecting layer and a second SWG reflecting layer facing each other. A plurality of Fabri-Perot resonators are formed by the first SWG reflecting layer and the second SWG reflecting layer facing each other. Each of the Fabri-Perot resonators may transmit light corresponding to a resonance wavelength of the Fabri-Perot resonator. The resonance wavelengths of the Fabri-Perot resonators may be determined according to duty cycles of grating patterns.

  18. Interfacing Hardware Accelerators to a Time-Division Multiplexing Network-on-Chip

    DEFF Research Database (Denmark)

    Pezzarossa, Luca; Sørensen, Rasmus Bo; Schoeberl, Martin

    2015-01-01

    This paper addresses the integration of stateless hardware accelerators into time-predictable multi-core platforms based on time-division multiplexing networks-on-chip. Stateless hardware accelerators, like floating-point units, are typically attached as co-processors to individual processors in ...... implementation. The design evaluation is carried out using the open source T-CREST multi-core platform implemented on an Altera Cyclone IV FPGA. The size of the proposed design, including a floating-point accelerator, is about two-thirds of a processor....

  19. A novel compact model for on-chip stacked transformers in RF-CMOS technology

    Science.gov (United States)

    Jun, Liu; Jincai, Wen; Qian, Zhao; Lingling, Sun

    2013-08-01

    A novel compact model for on-chip stacked transformers is presented. The proposed model topology gives a clear distinction to the eddy current, resistive and capacitive losses of the primary and secondary coils in the substrate. A method to analytically determine the non-ideal parasitics between the primary coil and substrate is provided. The model is further verified by the excellent match between the measured and simulated S -parameters on the extracted parameters for a 1 : 1 stacked transformer manufactured in a commercial RF-CMOS technology.

  20. Marker Pen Lithography for Flexible and Curvilinear On-Chip Energy Storage

    KAUST Repository

    Jiang, Qiu

    2015-07-14

    On-chip energy storage using microsupercapacitors can serve the dual role of supplementing batteries for pulse power delivery, and replacement of bulky electrolytic capacitors in ac-line filtering applications. Despite complexity and processing costs, microfabrication techniques are being employed in fabricating a great variety of microsupercapacitor devices. Here, a simple, cost-effective, and versatile strategy is proposed to fabricate flexible and curvilinear microsupercapacitors (MSCs). The protocol involves writing sacrificial ink patterns using commercial marker pens on rigid, flexible, and curvilinear substrates. It is shown that this process can be used in both lift-off and etching modes, and the possibility of multistack design of active materials using simple pen lithography is demonstrated. As a prototype, this method is used to produce conducting polymer MSCs involving both poly(3,4-ethylenedioxythiophene), polyaniline, and metal oxide (MnO2) electrode materials. Typical values of energy density in the range of 5-11 mWh cm-3 at power densities of 1-6 W cm-3 are achieved, which is comparable to thin film batteries and superior to the carbon and metal oxide based microsupercapacitors reported in the literature. The simplicity and broad scope of this innovative strategy can open up new avenues for easy and scalable fabrication of a wide variety of on-chip energy storage devices. © 2015 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim.

  1. Looking to the future of organs-on-chips: interview with Professor John Wikswo.

    Science.gov (United States)

    Wikswo, John P

    2017-06-01

    John Wikswo talks to Francesca Lake, Managing Editor: John is the founding Director of the Vanderbilt Institute for Integrative Biosystems Research and Education (VIIBRE). He is also the Gordon A Cain University Professor; a B learned Professor of Living State Physics; and a Professor of Biomedical Engineering, Molecular Physiology and Biophysics, and Physics. John earned his PhD in physics at Stanford University (CA, USA). After serving as a Research Fellow in Cardiology at Stanford, he joined the Department of Physics and Astronomy at Vanderbilt University (TN, USA), where he went on to make the first measurement of the magnetic field of an isolated nerve. He founded VIIBRE at Vanderbilt in 2001 in order to foster and enhance interdisciplinary research in the biophysical sciences, bioengineering and medicine. VIIBRE efforts have led to the development of devices integral to organ-on-chip research. He is focusing on the neurovascular unit-on-a-chip, heart-on-a-chip, a missing organ microformulator, and microfluidic pumps and valves to control and analyze organs-on-chips.

  2. Network Partitioning Domain Knowledge Multiobjective Application Mapping for Large-Scale Network-on-Chip

    Directory of Open Access Journals (Sweden)

    Yin Zhen Tei

    2014-01-01

    Full Text Available This paper proposes a multiobjective application mapping technique targeted for large-scale network-on-chip (NoC. As the number of intellectual property (IP cores in multiprocessor system-on-chip (MPSoC increases, NoC application mapping to find optimum core-to-topology mapping becomes more challenging. Besides, the conflicting cost and performance trade-off makes multiobjective application mapping techniques even more complex. This paper proposes an application mapping technique that incorporates domain knowledge into genetic algorithm (GA. The initial population of GA is initialized with network partitioning (NP while the crossover operator is guided with knowledge on communication demands. NP reduces the large-scale application mapping complexity and provides GA with a potential mapping search space. The proposed genetic operator is compared with state-of-the-art genetic operators in terms of solution quality. In this work, multiobjective optimization of energy and thermal-balance is considered. Through simulation, knowledge-based initial mapping shows significant improvement in Pareto front compared to random initial mapping that is widely used. The proposed knowledge-based crossover also shows better Pareto front compared to state-of-the-art knowledge-based crossover.

  3. HARDWARE IMPLEMENTATION OF PIPELINE BASED ROUTER DESIGN FOR ON-CHIP NETWORK

    Directory of Open Access Journals (Sweden)

    U. Saravanakumar

    2012-12-01

    Full Text Available As the feature size is continuously decreasing and integration density is increasing, interconnections have become a dominating factor in determining the overall quality of a chip. Due to the limited scalability of system bus, it cannot meet the requirement of current System-on-Chip (SoC implementations where only a limited number of functional units can be supported. Long global wires also cause many design problems, such as routing congestion, noise coupling, and difficult timing closure. Network-on-Chip (NoC architectures have been proposed to be an alternative to solve the above problems by using a packet-based communication network. In this paper, the Circuit-Switched (CS Router was designed and analysed the various parameters such as power, timing and area. The CS router has taken more number of cycles to transfer the data from source to destination. So the pipelining concept was implemented by adding registers in the CS router architecture. The proposed architecture increases the speed of operation and reduces the critical path of the circuit. The router has been implemented using Verilog HDL. The parameters area, power and timing were calculated in 130 nm CMOS technology using Synopsys tool with nominal operating voltage of 1V and packet size is 39 bits. Finally power, area and time of these two routers have been analysed and compared.

  4. On-Chip Laser-Power Delivery System for Dielectric Laser Accelerators

    Science.gov (United States)

    Hughes, Tyler W.; Tan, Si; Zhao, Zhexin; Sapra, Neil V.; Leedle, Kenneth J.; Deng, Huiyang; Miao, Yu; Black, Dylan S.; Solgaard, Olav; Harris, James S.; Vuckovic, Jelena; Byer, Robert L.; Fan, Shanhui; England, R. Joel; Lee, Yun Jo; Qi, Minghao

    2018-05-01

    We propose an on-chip optical-power delivery system for dielectric laser accelerators based on a fractal "tree-network" dielectric waveguide geometry. This system replaces experimentally demanding free-space manipulations of the driving laser beam with chip-integrated techniques based on precise nanofabrication, enabling access to orders-of-magnitude increases in the interaction length and total energy gain for these miniature accelerators. Based on computational modeling, in the relativistic regime, our laser delivery system is estimated to provide 21 keV of energy gain over an acceleration length of 192 μ m with a single laser input, corresponding to a 108-MV/m acceleration gradient. The system may achieve 1 MeV of energy gain over a distance of less than 1 cm by sequentially illuminating 49 identical structures. These findings are verified by detailed numerical simulation and modeling of the subcomponents, and we provide a discussion of the main constraints, challenges, and relevant parameters with regard to on-chip laser coupling for dielectric laser accelerators.

  5. Computational On-Chip Imaging of Nanoparticles and Biomolecules using Ultraviolet Light

    KAUST Repository

    Daloglu, Mustafa Ugur

    2017-03-09

    Significant progress in characterization of nanoparticles and biomolecules was enabled by the development of advanced imaging equipment with extreme spatial-resolution and sensitivity. To perform some of these analyses outside of well-resourced laboratories, it is necessary to create robust and cost-effective alternatives to existing high-end laboratory-bound imaging and sensing equipment. Towards this aim, we have designed a holographic on-chip microscope operating at an ultraviolet illumination wavelength (UV) of 266 nm. The increased forward scattering from nanoscale objects at this short wavelength has enabled us to detect individual sub-30 nm nanoparticles over a large field-of-view of >16 mm2 using an on-chip imaging platform, where the sample is placed at ≤0.5 mm away from the active area of an opto-electronic sensor-array, without any lenses in between. The strong absorption of this UV wavelength by biomolecules including nucleic acids and proteins has further enabled high-contrast imaging of nanoscopic aggregates of biomolecules, e.g., of enzyme Cu/Zn-superoxide dismutase, abnormal aggregation of which is linked to amyotrophic lateral sclerosis (ALS) - a fatal neurodegenerative disease. This UV-based wide-field computational imaging platform could be valuable for numerous applications in biomedical sciences and environmental monitoring, including disease diagnostics, viral load measurements as well as air- and water-quality assessment.

  6. Implantable Biomedical Signal Monitoring Using RF Energy Harvestingand On-Chip Antenna

    Directory of Open Access Journals (Sweden)

    Jiann-Shiun Yuan

    2015-08-01

    Full Text Available This paper presents the design of an energy harvesting wireless and battery-less silicon-on-chip (SoC device that can be implanted in the human body to monitor certain health conditions. The proposed architecture has been designed on TSMC 0.18μm CMOS ICs and is an integrated system with a rectenna (antenna and rectifier and transmitting circuit, all on a single chip powered by an external transmitter and that is small enough to be inserted in the human eye, heart or brain. The transmitting and receiving antennas operate in the 5.8- GHz ISM band and have a -10dB gain. The distinguishing feature of this design is the rectenna that comprises of a singlestage diode connected NMOS rectifier and a 3-D on-chip antenna that occupies only 2.5 × 1 × 2.8 mm3 of chip area and has the ability to communicate within proximity of 5 cm while giving 10% efficiency. The external source is a reader that powers up the RF rectifier in the implantable chip triggering it to start sending data back to the reader enabling an efficient method of health evaluation for the patient.

  7. DANoC: An Efficient Algorithm and Hardware Codesign of Deep Neural Networks on Chip.

    Science.gov (United States)

    Zhou, Xichuan; Li, Shengli; Tang, Fang; Hu, Shengdong; Lin, Zhi; Zhang, Lei

    2017-07-18

    Deep neural networks (NNs) are the state-of-the-art models for understanding the content of images and videos. However, implementing deep NNs in embedded systems is a challenging task, e.g., a typical deep belief network could exhaust gigabytes of memory and result in bandwidth and computational bottlenecks. To address this challenge, this paper presents an algorithm and hardware codesign for efficient deep neural computation. A hardware-oriented deep learning algorithm, named the deep adaptive network, is proposed to explore the sparsity of neural connections. By adaptively removing the majority of neural connections and robustly representing the reserved connections using binary integers, the proposed algorithm could save up to 99.9% memory utility and computational resources without undermining classification accuracy. An efficient sparse-mapping-memory-based hardware architecture is proposed to fully take advantage of the algorithmic optimization. Different from traditional Von Neumann architecture, the deep-adaptive network on chip (DANoC) brings communication and computation in close proximity to avoid power-hungry parameter transfers between on-board memory and on-chip computational units. Experiments over different image classification benchmarks show that the DANoC system achieves competitively high accuracy and efficiency comparing with the state-of-the-art approaches.

  8. Marker Pen Lithography for Flexible and Curvilinear On-Chip Energy Storage

    KAUST Repository

    Jiang, Qiu; Kurra, Narendra; Alshareef, Husam N.

    2015-01-01

    On-chip energy storage using microsupercapacitors can serve the dual role of supplementing batteries for pulse power delivery, and replacement of bulky electrolytic capacitors in ac-line filtering applications. Despite complexity and processing costs, microfabrication techniques are being employed in fabricating a great variety of microsupercapacitor devices. Here, a simple, cost-effective, and versatile strategy is proposed to fabricate flexible and curvilinear microsupercapacitors (MSCs). The protocol involves writing sacrificial ink patterns using commercial marker pens on rigid, flexible, and curvilinear substrates. It is shown that this process can be used in both lift-off and etching modes, and the possibility of multistack design of active materials using simple pen lithography is demonstrated. As a prototype, this method is used to produce conducting polymer MSCs involving both poly(3,4-ethylenedioxythiophene), polyaniline, and metal oxide (MnO2) electrode materials. Typical values of energy density in the range of 5-11 mWh cm-3 at power densities of 1-6 W cm-3 are achieved, which is comparable to thin film batteries and superior to the carbon and metal oxide based microsupercapacitors reported in the literature. The simplicity and broad scope of this innovative strategy can open up new avenues for easy and scalable fabrication of a wide variety of on-chip energy storage devices. © 2015 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim.

  9. A Fully Integrated Humidity Sensor System-on-Chip Fabricated by Micro-Stamping Technology

    Directory of Open Access Journals (Sweden)

    Chih-Ting Lin

    2012-08-01

    Full Text Available A fully integrated humidity sensor chip was designed, implemented, and tested. Utilizing the micro-stamping technology, the pseudo-3D sensor system-on-chip (SSoC architecture can be implemented by stacking sensing materials directly on the top of a CMOS-fabricated chip. The fabricated sensor system-on-chip (2.28 mm × 2.48 mm integrated a humidity sensor, an interface circuit, a digital controller, and an On-Off Keying (OOK wireless transceiver. With low power consumption, i.e., 750 μW without RF operation, the sensitivity of developed sensor chip was experimentally verified in the relative humidity (RH range from 32% to 60%. The response time of the chip was also experimentally verified to be within 5 seconds from RH 36% to RH 64%. As a consequence, the implemented humidity SSoC paves the way toward the an ultra-small sensor system for various applications.

  10. High throughput on-chip analysis of high-energy charged particle tracks using lensfree imaging

    Energy Technology Data Exchange (ETDEWEB)

    Luo, Wei; Shabbir, Faizan; Gong, Chao; Gulec, Cagatay; Pigeon, Jeremy; Shaw, Jessica; Greenbaum, Alon; Tochitsky, Sergei; Joshi, Chandrashekhar [Electrical Engineering Department, University of California, Los Angeles, California 90095 (United States); Ozcan, Aydogan, E-mail: ozcan@ucla.edu [Electrical Engineering Department, University of California, Los Angeles, California 90095 (United States); Bioengineering Department, University of California, Los Angeles, California 90095 (United States); California NanoSystems Institute (CNSI), University of California, Los Angeles, California 90095 (United States)

    2015-04-13

    We demonstrate a high-throughput charged particle analysis platform, which is based on lensfree on-chip microscopy for rapid ion track analysis using allyl diglycol carbonate, i.e., CR-39 plastic polymer as the sensing medium. By adopting a wide-area opto-electronic image sensor together with a source-shifting based pixel super-resolution technique, a large CR-39 sample volume (i.e., 4 cm × 4 cm × 0.1 cm) can be imaged in less than 1 min using a compact lensfree on-chip microscope, which detects partially coherent in-line holograms of the ion tracks recorded within the CR-39 detector. After the image capture, using highly parallelized reconstruction and ion track analysis algorithms running on graphics processing units, we reconstruct and analyze the entire volume of a CR-39 detector within ∼1.5 min. This significant reduction in the entire imaging and ion track analysis time not only increases our throughput but also allows us to perform time-resolved analysis of the etching process to monitor and optimize the growth of ion tracks during etching. This computational lensfree imaging platform can provide a much higher throughput and more cost-effective alternative to traditional lens-based scanning optical microscopes for ion track analysis using CR-39 and other passive high energy particle detectors.

  11. An Implantable Cardiovascular Pressure Monitoring System with On-Chip Antenna and RF Energy Harvesting

    Directory of Open Access Journals (Sweden)

    Yu-Chun Liu

    2015-08-01

    Full Text Available An implantable wireless system with on-chip antenna for cardiovascular pressure monitor is studied. The implantable device is operated in a batteryless manner, powered by an external radio frequency (RF power source. The received RF power level can be sensed and wirelessly transmitted along with blood pressure signal for feedback control of the external RF power. The integrated electronic system, consisting of a capacitance-to-voltage converter, an adaptive RF powering system, an RF transmitter and digital control circuitry, is simulated using a TSMC 0.18 μm CMOS technology. The implanted RF transmitter circuit is combined with a low power voltage-controlled oscillator resonating at 5.8 GHz and a power amplifier. For the design, the simulation model is setup using ADS and HFSS software. The dimension of the antenna is 1 × 0.6 × 4.8 mm3 with a 1 × 0.6 mm2 on-chip circuit which is small enough to place in human carotid artery.

  12. Six-port optical switch for cluster-mesh photonic network-on-chip

    Science.gov (United States)

    Jia, Hao; Zhou, Ting; Zhao, Yunchou; Xia, Yuhao; Dai, Jincheng; Zhang, Lei; Ding, Jianfeng; Fu, Xin; Yang, Lin

    2018-05-01

    Photonic network-on-chip for high-performance multi-core processors has attracted substantial interest in recent years as it offers a systematic method to meet the demand of large bandwidth, low latency and low power dissipation. In this paper we demonstrate a non-blocking six-port optical switch for cluster-mesh photonic network-on-chip. The architecture is constructed by substituting three optical switching units of typical Spanke-Benes network to optical waveguide crossings. Compared with Spanke-Benes network, the number of optical switching units is reduced by 20%, while the connectivity of routing path is maintained. By this way the footprint and power consumption can be reduced at the expense of sacrificing the network latency performance in some cases. The device is realized by 12 thermally tuned silicon Mach-Zehnder optical switching units. Its theoretical spectral responses are evaluated by establishing a numerical model. The experimental spectral responses are also characterized, which indicates that the optical signal-to-noise ratios of the optical switch are larger than 13.5 dB in the wavelength range from 1525 nm to 1565 nm. Data transmission experiment with the data rate of 32 Gbps is implemented for each optical link.

  13. Embedded memory design for multi-core and systems on chip

    CERN Document Server

    Mohammad, Baker

    2014-01-01

    This book describes the various tradeoffs systems designers face when designing embedded memory.  Readers designing multi-core systems and systems on chip will benefit from the discussion of different topics from memory architecture, array organization, circuit design techniques and design for test.  The presentation enables a multi-disciplinary approach to chip design, which bridges the gap between the architecture level and circuit level, in order to address yield, reliability and power-related issues for embedded memory.  ·         Provides a comprehensive overview of embedded memory design and associated challenges and choices; ·         Explains tradeoffs and dependencies across different disciplines involved with multi-core and system on chip memory design; ·         Includes detailed discussion of memory hierarchy and its impact on energy and performance; ·         Uses real product examples to demonstrate embedded memory design flow from architecture, to circuit ...

  14. Source-synchronous networks-on-chip circuit and architectural interconnect modeling

    CERN Document Server

    Mandal, Ayan; Mahapatra, Rabi

    2014-01-01

    This book describes novel methods for network-on-chip (NoC) design, using source-synchronous high-speed resonant clocks.  The authors discuss NoCs from the bottom up, providing circuit level details, before providing architectural simulations. As a result, readers will get a complete picture of how a NoC can be designed and optimized.  Using the methods described in this book, readers are enabled to design NoCs that are 5X better than existing approaches in terms of latency and throughput and can also sustain a significantly greater amount of traffic.   • Describes novel methods for high-speed network-on-chip (NoC) design; • Enables readers to understand NoC design from both circuit and architectural levels; • Provides circuit-level details of the NoC (including clocking, router design), along with a high-speed, resonant clocking style which is used in the NoC; • Includes architectural simulations of the NoC, demonstrating significantly superior performance over the state-of-the-art.

  15. Computational On-Chip Imaging of Nanoparticles and Biomolecules using Ultraviolet Light.

    Science.gov (United States)

    Daloglu, Mustafa Ugur; Ray, Aniruddha; Gorocs, Zoltan; Xiong, Matthew; Malik, Ravinder; Bitan, Gal; McLeod, Euan; Ozcan, Aydogan

    2017-03-09

    Significant progress in characterization of nanoparticles and biomolecules was enabled by the development of advanced imaging equipment with extreme spatial-resolution and sensitivity. To perform some of these analyses outside of well-resourced laboratories, it is necessary to create robust and cost-effective alternatives to existing high-end laboratory-bound imaging and sensing equipment. Towards this aim, we have designed a holographic on-chip microscope operating at an ultraviolet illumination wavelength (UV) of 266 nm. The increased forward scattering from nanoscale objects at this short wavelength has enabled us to detect individual sub-30 nm nanoparticles over a large field-of-view of >16 mm 2 using an on-chip imaging platform, where the sample is placed at ≤0.5 mm away from the active area of an opto-electronic sensor-array, without any lenses in between. The strong absorption of this UV wavelength by biomolecules including nucleic acids and proteins has further enabled high-contrast imaging of nanoscopic aggregates of biomolecules, e.g., of enzyme Cu/Zn-superoxide dismutase, abnormal aggregation of which is linked to amyotrophic lateral sclerosis (ALS) - a fatal neurodegenerative disease. This UV-based wide-field computational imaging platform could be valuable for numerous applications in biomedical sciences and environmental monitoring, including disease diagnostics, viral load measurements as well as air- and water-quality assessment.

  16. On-chip real-time single-copy polymerase chain reaction in picoliter droplets

    Energy Technology Data Exchange (ETDEWEB)

    Beer, N R; Hindson, B; Wheeler, E; Hall, S B; Rose, K A; Kennedy, I; Colston, B

    2007-04-20

    The first lab-on-chip system for picoliter droplet generation and PCR amplification with real-time fluorescence detection has performed PCR in isolated droplets at volumes 10{sup 6} smaller than commercial real-time PCR systems. The system utilized a shearing T-junction in a silicon device to generate a stream of monodisperse picoliter droplets that were isolated from the microfluidic channel walls and each other by the oil phase carrier. An off-chip valving system stopped the droplets on-chip, allowing them to be thermal cycled through the PCR protocol without droplet motion. With this system a 10-pL droplet, encapsulating less than one copy of viral genomic DNA through Poisson statistics, showed real-time PCR amplification curves with a cycle threshold of {approx}18, twenty cycles earlier than commercial instruments. This combination of the established real-time PCR assay with digital microfluidics is ideal for isolating single-copy nucleic acids in a complex environment.

  17. Priming nanoparticle-guided diagnostics and therapeutics towards human organs-on-chips microphysiological system

    Science.gov (United States)

    Choi, Jin-Ha; Lee, Jaewon; Shin, Woojung; Choi, Jeong-Woo; Kim, Hyun Jung

    2016-10-01

    Nanotechnology and bioengineering have converged over the past decades, by which the application of multi-functional nanoparticles (NPs) has been emerged in clinical and biomedical fields. The NPs primed to detect disease-specific biomarkers or to deliver biopharmaceutical compounds have beena validated in conventional in vitro culture models including two dimensional (2D) cell cultures or 3D organoid models. However, a lack of experimental models that have strong human physiological relevance has hampered accurate validation of the safety and functionality of NPs. Alternatively, biomimetic human "Organs-on-Chips" microphysiological systems have recapitulated the mechanically dynamic 3D tissue interface of human organ microenvironment, in which the transport, cytotoxicity, biocompatibility, and therapeutic efficacy of NPs and their conjugates may be more accurately validated. Finally, integration of NP-guided diagnostic detection and targeted nanotherapeutics in conjunction with human organs-on-chips can provide a novel avenue to accelerate the NP-based drug development process as well as the rapid detection of cellular secretomes associated with pathophysiological processes.

  18. Diatomite Photonic Crystals for Facile On-Chip Chromatography and Sensing of Harmful Ingredients from Food.

    Science.gov (United States)

    Kong, Xianming; Yu, Qian; Li, Erwen; Wang, Rui; Liu, Qing; Wang, Alan X

    2018-03-31

    Diatomaceous earth-otherwise called diatomite-is essentially composed of hydrated biosilica with periodic nanopores. Diatomite is derived from fossilized remains of diatom frustules and possesses photonic-crystal features. In this paper, diatomite simultaneously functions as the matrix of the chromatography plate and the substrate for surface-enhanced Raman scattering (SERS), by which the photonic crystal-features could enhance the optical field intensity. The on-chip separation performance of the device was confirmed by separating and detecting industrial dye (Sudan I) in an artificial aqueous mixture containing 4-mercaptobenzoic acid (MBA), where concentrated plasmonic Au colloid was casted onto the analyte spot for SERS measurement. The plasmonic-photonic hybrid mode between the Au nanoparticles (NP) and the diatomite layer could supply nearly 10 times the increment of SERS signal (MBA) intensity compared to the common silica gel chromatography plate. Furthermore, this lab-on-a-chip photonic crystal device was employed for food safety sensing in real samples and successfully monitored histamine in salmon and tuna. This on-chip food sensor can be used as a cheap, robust, and portable sensing platform for monitoring for histamine or other harmful ingredients at trace levels in food products.

  19. Small-scale, self-propagating combustion realized with on-chip porous silicon.

    Science.gov (United States)

    Piekiel, Nicholas W; Morris, Christopher J

    2015-05-13

    For small-scale energy applications, energetic materials represent a high energy density source that, in certain cases, can be accessed with a very small amount of energy input. Recent advances in microprocessing techniques allow for the implementation of a porous silicon energetic material onto a crystalline silicon wafer at the microscale; however, combustion at a small length scale remains to be fully investigated, particularly with regards to the limitations of increased relative heat loss during combustion. The present study explores the critical dimensions of an on-chip porous silicon energetic material (porous silicon + sodium perchlorate (NaClO4)) required to propagate combustion. We etched ∼97 μm wide and ∼45 μm deep porous silicon channels that burned at a steady rate of 4.6 m/s, remaining steady across 90° changes in direction. In an effort to minimize the potential on-chip footprint for energetic porous silicon, we also explored the minimum spacing between porous silicon channels. We demonstrated independent burning of porous silicon channels at a spacing of 0.5 m on a chip surface area of 1.65 cm(2). Smaller porous silicon channels of ∼28 μm wide and ∼14 μm deep were also utilized. These samples propagated combustion, but at times, did so unsteadily. This result may suggest that we are approaching a critical length scale for self-propagating combustion in a porous silicon energetic material.

  20. Diatomite Photonic Crystals for Facile On-Chip Chromatography and Sensing of Harmful Ingredients from Food

    Directory of Open Access Journals (Sweden)

    Xianming Kong

    2018-03-01

    Full Text Available Diatomaceous earth—otherwise called diatomite—is essentially composed of hydrated biosilica with periodic nanopores. Diatomite is derived from fossilized remains of diatom frustules and possesses photonic-crystal features. In this paper, diatomite simultaneously functions as the matrix of the chromatography plate and the substrate for surface-enhanced Raman scattering (SERS, by which the photonic crystal-features could enhance the optical field intensity. The on-chip separation performance of the device was confirmed by separating and detecting industrial dye (Sudan I in an artificial aqueous mixture containing 4-mercaptobenzoic acid (MBA, where concentrated plasmonic Au colloid was casted onto the analyte spot for SERS measurement. The plasmonic-photonic hybrid mode between the Au nanoparticles (NP and the diatomite layer could supply nearly 10 times the increment of SERS signal (MBA intensity compared to the common silica gel chromatography plate. Furthermore, this lab-on-a-chip photonic crystal device was employed for food safety sensing in real samples and successfully monitored histamine in salmon and tuna. This on-chip food sensor can be used as a cheap, robust, and portable sensing platform for monitoring for histamine or other harmful ingredients at trace levels in food products.

  1. Gain-Enhanced On-Chip Antenna Utilizing Artificial Magnetic Conductor Reflecting Surface at 94 GHz

    KAUST Repository

    Nafe, Mahmoud

    2015-08-04

    Nowadays, there is a growing demand for high frequency-bandwidth mm-wave (30-300 GHz) electronic wireless transceiver systems to support applications such as high data-rate wireless communication and high resolution imaging. Such mm-wave systems are becoming more feasible due to the extreme transistor downscaling in silicon-based integrated circuits, which enabled densely-integrated high-speed elec- tronics operating up to more than 100 GHz with low fabrication cost. To further enhance system integrability, it is required to implement all wireless system compo- nents on the chip. Presently, the last major barrier to true System-on-Chip (SoC) realization is the antenna implementation on the silicon chip. Although at mm-wave frequencies the antenna size becomes small enough to fit on chip, the antenna performance is greatly deteriorated due the high conductivity and high relative permittivity of the silicon substrate. The negative e↵ects of the silicon substrate could be avoided by using a metallic reflecting surface on top of silicon, which e↵ectively isolates the antenna from the silicon. However, this approach has the shortcoming of having to implement the antenna on the usually very thin silicon oxide layer of a typical CMOS fabrication process (10’s of μm). This forces the antenna to be in a very close proximity (less than one hundredth of a wavelength) to the reflecting surface. In this regime, the use of conventional metallic reflecting surface for silicon shielding has severe e↵ects on the antenna performance as it tends to reduce the antenna radiation resistance resulting in most of the energy being absorbed rather than radiated. In this work, the use of specially patterned reflecting surfaces for improving on- chip antenna performance is investigated. By using a periodic metallic surface on top of a grounded substrate, the structure can mimic the behavior of a perfect mag- netic conductor, hence called Artificial Magnetic Conductor (AMC) surface

  2. Cool snacks

    DEFF Research Database (Denmark)

    Grunert, Klaus G; Brock, Steen; Brunsø, Karen

    2016-01-01

    Young people snack and their snacking habits are not always healthy. We address the questions whether it is possible to develop a new snack product that adolescents will find attractive, even though it is based on ingredients as healthy as fruits and vegetables, and we argue that developing...... such a product requires an interdisciplinary effort where researchers with backgrounds in psychology, anthropology, media science, philosophy, sensory science and food science join forces. We present the COOL SNACKS project, where such a blend of competences was used first to obtain thorough insight into young...... people's snacking behaviour and then to develop and test new, healthier snacking solutions. These new snacking solutions were tested and found to be favourably accepted by young people. The paper therefore provides a proof of principle that the development of snacks that are both healthy and attractive...

  3. Cool visitors

    CERN Multimedia

    2006-01-01

    Pictured, from left to right: Tim Izo (saxophone, flute, guitar), Bobby Grant (tour manager), George Pajon (guitar). What do the LHC and a world-famous hip-hop group have in common? They are cool! On Saturday, 1st July, before their appearance at the Montreux Jazz Festival, three members of the 'Black Eyed Peas' came on a surprise visit to CERN, inspired by Dan Brown's Angels and Demons. At short notice, Connie Potter (Head of the ATLAS secretariat) organized a guided tour of ATLAS and the AD 'antimatter factory'. Still curious, lead vocalist Will.I.Am met CERN physicist Rolf Landua after the concert to ask many more questions on particles, CERN, and the origin of the Universe.

  4. A CMOS Gm-C complex filter with on-chip automatic tuning for wireless sensor network application

    International Nuclear Information System (INIS)

    Wan Chuanchuan; Li Zhiqun; Hou Ningbing

    2011-01-01

    A G m -C complex filter with on-chip automatic tuning for wireless sensor networks is designed and implemented using 0.18 μm CMOS process. This filter is synthesized from a low-pass 5th-order Chebyshev RLC ladder filter prototype by means of capacitors and fully balanced transconductors. A conventional phase-locked loop is used to realize the on-chip automatic tuning for both center frequency and bandwidth control. The filter is centered at 2 MHz with a bandwidth of 2.4 MHz. The measured results show that the filter provides more than 45 dB image rejection while the ripple in the pass-band is less than 1.2 dB. The complete filter including on-chip tuning circuit consumes 4.9 mA with 1.8 V single supply voltage. (semiconductor integrated circuits)

  5. Divertor cooling device

    International Nuclear Information System (INIS)

    Nakayama, Tadakazu; Hayashi, Katsumi; Handa, Hiroyuki

    1993-01-01

    Cooling water for a divertor cooling system cools the divertor, thereafter, passes through pipelines connecting the exit pipelines of the divertor cooling system and the inlet pipelines of a blanket cooling system and is introduced to the blanket cooling system in a vacuum vessel. It undergoes emission of neutrons, and cooling water in the divertor cooling system containing a great amount of N-16 which is generated by radioactivation of O-16 is introduced to the blanket cooling system in the vacuum vessel by way of pipelines, and after cooling, passes through exit pipelines of the blanket cooling system and is introduced to the outside of the vacuum vessel. Radiation of N-16 in the cooling water is decayed sufficiently with passage of time during cooling of the blanket, thereby enabling to decrease the amount of shielding materials such as facilities and pipelines, and ensure spaces. (N.H.)

  6. WORKSHOP: Beam cooling

    International Nuclear Information System (INIS)

    Anon.

    1994-01-01

    Cooling - the control of unruly particles to provide well-behaved beams - has become a major new tool in accelerator physics. The main approaches of electron cooling pioneered by Gersh Budker at Novosibirsk and stochastic cooling by Simon van der Meer at CERN, are now complemented by additional ideas, such as laser cooling of ions and ionization cooling of muons

  7. A high-speed on-chip pseudo-random binary sequence generator for multi-tone phase calibration

    Science.gov (United States)

    Gommé, Liesbeth; Vandersteen, Gerd; Rolain, Yves

    2011-07-01

    An on-chip reference generator is conceived by adopting the technique of decimating a pseudo-random binary sequence (PRBS) signal in parallel sequences. This is of great benefit when high-speed generation of PRBS and PRBS-derived signals is the objective. The design implemented standard CMOS logic is available in commercial libraries to provide the logic functions for the generator. The design allows the user to select the periodicity of the PRBS and the PRBS-derived signals. The characterization of the on-chip generator marks its performance and reveals promising specifications.

  8. A high-speed on-chip pseudo-random binary sequence generator for multi-tone phase calibration

    International Nuclear Information System (INIS)

    Gommé, Liesbeth; Vandersteen, Gerd; Rolain, Yves

    2011-01-01

    An on-chip reference generator is conceived by adopting the technique of decimating a pseudo-random binary sequence (PRBS) signal in parallel sequences. This is of great benefit when high-speed generation of PRBS and PRBS-derived signals is the objective. The design implemented standard CMOS logic is available in commercial libraries to provide the logic functions for the generator. The design allows the user to select the periodicity of the PRBS and the PRBS-derived signals. The characterization of the on-chip generator marks its performance and reveals promising specifications

  9. An Asynchronous Time-Division-Multiplexed Network-on-Chip for Real-Time Systems

    DEFF Research Database (Denmark)

    Kasapaki, Evangelia

    is an important part of the T-CREST paltform and used in a number of configurations. The flexible timing organization of Argo combines asynchronous routers with mesochronous NIs, which are connected to individually clocked cores, supporting a GALS system organization. The mesochronous NIs operate at the same......Multi-processor architectures using networks-on-chip (NOCs) for communication are becoming the standard approach in the development of embedded systems and general purpose platforms. Typically, multi-processor platforms follow a globally asynchronous locally synchronous (GALS) timing organization....... This thesis focuses on the design of Argo, a NOC targeted at hard real-time multi-processor platforms with a GALS timing organization. To support real-time communication, NOCs establish end-to-end connections and provide latency and throughput guarantees for these connections. Argo uses time division...

  10. On-chip plasmonic cavity-enhanced spontaneous emission rate at the zero-phonon line

    DEFF Research Database (Denmark)

    Siampour, Hamidreza; Kumar, Shailesh; Bozhevolnyi, Sergey I.

    Highly confined surface plasmon polariton (SPP) modes can be utilized to enhance light-matter interaction at the single emitter level of quantum optical systems [1-4]. Dielectric-loaded SPP waveguides (DLSPPWs) confine SPPs laterally with relatively low propagation loss, enabling to benefit both ...... and an up to 42-fold spontaneous emission rate enhancement at the zero-phonon line (a ∼7-fold resonance enhancement in addition to a ∼6-fold broadband enhancement) is achieved, revealing the potential of our approach for on-chip realization of quantum-optical networks....... from a large Purcell factor and from a large radiative efficiency (low quenching rates) [1, 2]. In this work, we present a DLSPPW-based Bragg cavity resonator to direct emission from a single diamond nitrogen vacancy (NV) center into the zero-phonon line (Fig. 1). A quality factor of ∼70 for the cavity...

  11. Structural characteristics of carbon nanofibers for on-chip interconnect applications

    International Nuclear Information System (INIS)

    Ominami, Yusuke; Ngo, Quoc; Austin, Alexander J.; Yoong, Hans; Yang, Cary Y.; Cassell, Alan M.; Cruden, Brett A.; Li Jun; Meyyappan, M.

    2005-01-01

    In this letter, we compare the structures of plasma-enhanced chemical vapor deposition of Ni-catalyzed and Pd-catalyzed carbon nanofibers (CNFs) synthesized for on-chip interconnect applications with scanning transmission electron microscopy (STEM). The Ni-catalyzed CNF has a conventional fiberlike structure and many graphitic layers that are almost parallel to the substrate at the CNF base. In contrast, the Pd-catalyzed CNF has a multiwall nanotubelike structure on the sidewall spanning the entire CNF. The microstructure observed in the Pd-catalyzed fibers at the CNF-metal interface has the potential to lower contact resistance significantly, as our electrical measurements using current-sensing atomic force microscopy indicate. A structural model is presented based on STEM image analysis

  12. Gain Enhanced On-Chip Folded Dipole Antenna Utilizing Artificial Magnetic Conductor at 94 GHz

    KAUST Repository

    Nafe, Mahmoud; Syed, Ahad; Shamim, Atif

    2017-01-01

    On-chip antennas suffer from low gain values and distorted radiation patterns due to lossy and high permittivity Si substrate. An ideal solution would be to isolate the lossy Si substrate from the antenna through a Perfect Electric Conductor (PEC) ground plane, however the typical CMOS stack up which has multiple metal layers embedded in a thin oxide layer does not permit this. In this work, an Artificial Magnetic Conductor (AMC) reflecting surface has been utilized to isolate the Si substrate from the antenna. Contrary to the previous reports, the AMC structure is completely embedded in the thin oxide layer with the ground plane above the Si substrate. In this approach, the AMC surface acts for the first time as both a reflector and a silicon shield. As a result the antenna radiation pattern is not distorted and its gain is improved by 8 dB. The fabricated prototype demonstrates good impedance and radiation characteristics.

  13. Gain Enhanced On-Chip Folded Dipole Antenna Utilizing Artificial Magnetic Conductor at 94 GHz

    KAUST Repository

    Nafe, Mahmoud

    2017-09-05

    On-chip antennas suffer from low gain values and distorted radiation patterns due to lossy and high permittivity Si substrate. An ideal solution would be to isolate the lossy Si substrate from the antenna through a Perfect Electric Conductor (PEC) ground plane, however the typical CMOS stack up which has multiple metal layers embedded in a thin oxide layer does not permit this. In this work, an Artificial Magnetic Conductor (AMC) reflecting surface has been utilized to isolate the Si substrate from the antenna. Contrary to the previous reports, the AMC structure is completely embedded in the thin oxide layer with the ground plane above the Si substrate. In this approach, the AMC surface acts for the first time as both a reflector and a silicon shield. As a result the antenna radiation pattern is not distorted and its gain is improved by 8 dB. The fabricated prototype demonstrates good impedance and radiation characteristics.

  14. Design, fabrication, and evaluation of on-chip micro-supercapacitors

    Science.gov (United States)

    Beidaghi, Majid; Chen, Wei; Wang, Chunlei

    2011-06-01

    Development of miniaturized electronic systems has stimulated the demand for miniaturized power sources that can be integrated into such systems. Among the different micro power sources micro electrochemical energy storage and conversion devices are particularly attractive because of their high efficiency and relatively high energy density. Electrochemical micro-capacitors or micro-supercapacitors offer higher power density compared to micro-batteries and micro-fuel cells. In this paper, development of on-chip micro-supercapacitors based on interdigitated C-MEMS electrode microarrays is introduced. C-MEMS electrodes are employed both as electrode material for electric double layer capacitor (EDLC) or as three dimensional (3D) current collectors of EDLC or pseudo-capacitive materials. Recent advancements in fabrication methods of C-MEMS based micro-supercapacitors are discussed and electrochemical properties of C-MEMS electrodes and it composites are reviewed.

  15. Recent advances in design and fabrication of on-chip micro-supercapacitors

    Science.gov (United States)

    Beidaghi, Majid; Wang, Chunlei

    2012-06-01

    Recent development in miniaturized electronic devices has increased the demand for power sources that are sufficiently compact and can potentially be integrated on a chip with other electronic components. Miniaturized electrochemical capacitors (EC) or micro-supercapacitors have great potential to complement or replace batteries and electrolytic capacitors in a variety of applications. Recently, we have developed several types of micro-supercapacitors with different structural designs and active materials. Carbon-Microelectromechanical Systems (C-MEMS) with three dimensional (3D) interdigital structures are employed both as electrode material for electric double layer capacitor (EDLC) or as three dimensional (3D) current collectors of pseudo-capacitive materials. More recently, we have also developed microsupercapacitor based on hybrid graphene and carbon nanotube interdigital structures. In this paper, the recent advances in design and fabrication of on-chip micro-supercapacitors are reviewed.

  16. A Very Low Cost BCH Decoder for High Immunity of On-Chip Memories

    Science.gov (United States)

    Seo, Haejun; Han, Sehwan; Heo, Yoonseok; Cho, Taewon

    BCH(Bose-Chaudhuri-Hoquenbhem) code, a type of block codes-cyclic codes, has very strong error-correcting ability which is vital for performing the error protection on the memory system. BCH code has many kinds of dual algorithms, PGZ(Pererson-Gorenstein-Zierler) algorithm out of them is advantageous in view of correcting the errors through the simple calculation in t value. However, this is problematic when this becomes 0 (divided by zero) in case ν ≠ t. In this paper, the circuit would be simplified by suggesting the multi-mode hardware architecture in preparation that v were 0~3. First, production cost would be less thanks to the smaller number of gates. Second, lessening power consumption could lengthen the recharging period. The very low cost and simple datapath make our design a good choice in small-footprint SoC(System on Chip) as ECC(Error Correction Code/Circuit) in memory system.

  17. Comprehensive Study of Microgel Electrode for On-Chip Electrophoretic Cell Sorting

    Science.gov (United States)

    Hattori, Akihiro; Yasuda, Kenji

    2010-06-01

    We have developed an on-chip cell sorting system and microgel electrode for applying electrostatic force in microfluidic pathways in the chip. The advantages of agarose electrodes are 1) current-driven electrostatic force generation, 2) stability against pH change and chemicals, and 3) no bubble formation caused by electrolysis. We examined the carrier ion type and concentration dependence of microgel electrode impedance, and found that CoCl2 has less than 1/10 of the impedance from NaCl, and the reduction of the impedance of NaCl gel electrode was plateaued at 0.5 M. The structure control of the microgel electrode exploiting the surface tension of sol-state agarose was also introduced. The addition of 1% (w/v) trehalose into the microgel electrode allowed the frozen storage of the microgel electrode chip. The experimental results demonstrate the potential of our system and microgel electrode for practical applications in microfluidic chips.

  18. On-Chip High-Finesse Fabry-Perot Microcavities for Optical Sensing and Quantum Information

    Directory of Open Access Journals (Sweden)

    Mohammad H. Bitarafan

    2017-07-01

    Full Text Available For applications in sensing and cavity-based quantum computing and metrology, open-access Fabry-Perot cavities—with an air or vacuum gap between a pair of high reflectance mirrors—offer important advantages compared to other types of microcavities. For example, they are inherently tunable using MEMS-based actuation strategies, and they enable atomic emitters or target analytes to be located at high field regions of the optical mode. Integration of curved-mirror Fabry-Perot cavities on chips containing electronic, optoelectronic, and optomechanical elements is a topic of emerging importance. Micro-fabrication techniques can be used to create mirrors with small radius-of-curvature, which is a prerequisite for cavities to support stable, small-volume modes. We review recent progress towards chip-based implementation of such cavities, and highlight their potential to address applications in sensing and cavity quantum electrodynamics.

  19. A System on Chip approach to enhanced learning in interdisciplinary robotics

    DEFF Research Database (Denmark)

    Sørensen, Anders Stengaard; Falsig, Simon

    2011-01-01

    the framework in an embedded systems course and various student projects, and have found that it greatly enhance the students abilities to control hardware from software, and dramatically reduce the time spent on software $\\leftrightarrow$ hardware interfacing. As the framework is also scalable, it can support......p, li { white-space: pre-wrap; } To sustain interdisciplinary teaching and learning in the rapidly growing and diversifying field of robotics, we have successfully employed FPGA based System on Chip (SoC) technology to provide abstraction between high level software and low level IO/ and control...... hardware. Our approach is to provides students with a simple FPGA based framework for hardware access, and hardware I/O development, which is independent of computer platform and programming language, and enable the students to add to, or change I/O hardware in accordance with their skills. We have tested...

  20. Advances in Sensors-Centric Microprocessors and System-on-Chip

    Directory of Open Access Journals (Sweden)

    Juan A. Gómez-Pulido

    2012-04-01

    Full Text Available Sensors-based systems are nowadays an extended technology for many markets due to their great potential in the collection of data from the environment and the processing of such data for different purposes. A typical example is the wireless sensor devices, where the outer temperature, humidity, luminosity and many other parameters can be acquired, measured and processed in order to build useful and fascinating applications that contribute to human welfare. In this scenario, the processing architectures of the sensors-based systems play a very important role. The requirements that are necessary for many such applications (real-time processing, low-power consumption, reduced size, reliability, security and many others means that research on advanced architectures of Microprocessors and System-on-Chips (SoC is needed to design and implement a successful product. In this sense, there are many challenges and open questions in this area that need to be addressed. [...

  1. A multi-chip data acquisition system based on a heterogeneous system-on-chip platform

    CERN Document Server

    Fiergolski, Adrian

    2017-01-01

    The Control and Readout Inner tracking BOard (CaRIBOu) is a versatile readout system targeting a multitude of detector prototypes. It profits from the heterogeneous platform of the Zynq System-on-Chip (SoC) and integrates in a monolithic device front-end FPGA resources with a back-end software running on a hard-core ARM-based processor. The user-friendly Linux terminal with the pre-installed DAQ software is combined with the efficiency and throughput of a system fully implemented in the FPGA fabric. The paper presents the design of the SoC-based DAQ system and its building blocks. It also shows examples of the achieved functionality for the CLICpix2 readout ASIC.

  2. A Scalable, Timing-Safe, Network-on-Chip Architecture with an Integrated Clock Distribution Method

    DEFF Research Database (Denmark)

    Bjerregaard, Tobias; Stensgaard, Mikkel Bystrup; Sparsø, Jens

    2007-01-01

    Growing system sizes together with increasing performance variability are making globally synchronous operation hard to realize. Mesochronous clocking constitutes a possible solution to the problems faced. The most fundamental of problems faced when communicating between mesochronously clocked re...... is based purely on local observations. It is demonstrated with a 90 nm CMOS standard cell network-on-chip design which implements completely timing-safe, global communication in a modular system......Growing system sizes together with increasing performance variability are making globally synchronous operation hard to realize. Mesochronous clocking constitutes a possible solution to the problems faced. The most fundamental of problems faced when communicating between mesochronously clocked...... regions concerns the possibility of data corruption caused by metastability. This paper presents an integrated communication and mesochronous clocking strategy, which avoids timing related errors while maintaining a globally synchronous system perspective. The architecture is scalable as timing integrity...

  3. On-Chip Single-Plasmon Nanocircuit Driven by a Self-Assembled Quantum Dot.

    Science.gov (United States)

    Wu, Xiaofei; Jiang, Ping; Razinskas, Gary; Huo, Yongheng; Zhang, Hongyi; Kamp, Martin; Rastelli, Armando; Schmidt, Oliver G; Hecht, Bert; Lindfors, Klas; Lippitz, Markus

    2017-07-12

    Quantum photonics holds great promise for future technologies such as secure communication, quantum computation, quantum simulation, and quantum metrology. An outstanding challenge for quantum photonics is to develop scalable miniature circuits that integrate single-photon sources, linear optical components, and detectors on a chip. Plasmonic nanocircuits will play essential roles in such developments. However, for quantum plasmonic circuits, integration of stable, bright, and narrow-band single photon sources in the structure has so far not been reported. Here we present a plasmonic nanocircuit driven by a self-assembled GaAs quantum dot. Through a planar dielectric-plasmonic hybrid waveguide, the quantum dot efficiently excites narrow-band single plasmons that are guided in a two-wire transmission line until they are converted into single photons by an optical antenna. Our work demonstrates the feasibility of fully on-chip plasmonic nanocircuits for quantum optical applications.

  4. Lab-On-Chip Clinorotation System for Live-Cell Microscopy Under Simulated Microgravity

    Science.gov (United States)

    Yew, Alvin G.; Atencia, Javier; Chinn, Ben; Hsieh, Adam H.

    2013-01-01

    Cells in microgravity are subject to mechanical unloading and changes to the surrounding chemical environment. How these factors jointly influence cellular function is not well understood. We can investigate their role using ground-based analogues to spaceflight, where mechanical unloading is simulated through the time-averaged nullification of gravity. The prevailing method for cellular microgravity simulation is to use fluid-filled containers called clinostats. However, conventional clinostats are not designed for temporally tracking cell response, nor are they able to establish dynamic fluid environments. To address these needs, we developed a Clinorotation Time-lapse Microscopy (CTM) system that accommodates lab-on- chip cell culture devices for visualizing time-dependent alterations to cellular behavior. For the purpose of demonstrating CTM, we present preliminary results showing time-dependent differences in cell area between human mesenchymal stem cells (hMSCs) under modeled microgravity and normal gravity.

  5. A Novel Analytical Model for Network-on-Chip using Semi-Markov Process

    Directory of Open Access Journals (Sweden)

    WANG, J.

    2011-02-01

    Full Text Available Network-on-Chip (NoC communication architecture is proposed to resolve the bottleneck of Multi-processor communication in a single chip. In this paper, a performance analytical model using Semi-Markov Process (SMP is presented to obtain the NoC performance. More precisely, given the related parameters, SMP is used to describe the behavior of each channel and the header flit routing time on each channel can be calculated by analyzing the SMP. Then, the average packet latency in NoC can be calculated. The accuracy of our model is illustrated through simulation. Indeed, the experimental results show that the proposed model can be used to obtain NoC performance and it performs better than the state-of-art models. Therefore, our model can be used as a useful tool to guide the NoC design process.

  6. On-chip synthesis of circularly polarized emission of light with integrated photonic circuits.

    Science.gov (United States)

    He, Li; Li, Mo

    2014-05-01

    The helicity of circularly polarized (CP) light plays an important role in the light-matter interaction in magnetic and quantum material systems. Exploiting CP light in integrated photonic circuits could lead to on-chip integration of novel optical helicity-dependent devices for applications ranging from spintronics to quantum optics. In this Letter, we demonstrate a silicon photonic circuit coupled with a 2D grating emitter operating at a telecom wavelength to synthesize vertically emitting, CP light from a quasi-TE waveguide mode. Handedness of the emitted circular polarized light can be thermally controlled with an integrated microheater. The compact device footprint enables a small beam diameter, which is desirable for large-scale integration.

  7. A Wireless Biomedical Signal Interface System-on-Chip for Body Sensor Networks.

    Science.gov (United States)

    Lei Wang; Guang-Zhong Yang; Jin Huang; Jinyong Zhang; Li Yu; Zedong Nie; Cumming, D R S

    2010-04-01

    Recent years have seen the rapid development of biosensor technology, system-on-chip design, wireless technology. and ubiquitous computing. When assembled into an autonomous body sensor network (BSN), the technologies become powerful tools in well-being monitoring, medical diagnostics, and personal connectivity. In this paper, we describe the first demonstration of a fully customized mixed-signal silicon chip that has most of the attributes required for use in a wearable or implantable BSN. Our intellectual-property blocks include low-power analog sensor interface for temperature and pH, a data multiplexing and conversion module, a digital platform based around an 8-b microcontroller, data encoding for spread-spectrum wireless transmission, and a RF section requiring very few off-chip components. The chip has been fully evaluated and tested by connection to external sensors, and it satisfied typical system requirements.

  8. Hybrid FDTD Analysis for Periodic On-Chip Terahertz (THZ) Structures

    Energy Technology Data Exchange (ETDEWEB)

    Hussein, Yasser A.; Spencer, James E.; /SLAC

    2005-06-07

    We present electromagnetic analysis and radiation efficiency calculations for on-chip terahertz (THz) structures based on a hybrid, finite-difference, time-domain (HFDTD) technique. The method employs the FDTD technique to calculate S-parameters for one cell of a periodic structure. The transmission ABCD matrix is then estimated and multiplied by itself n times to obtain the n-cell periodic structure ABCD parameters that are then converted back to S-parameters. Validation of the method is carried out by comparing the results of the hybrid technique with FDTD calculations of the entire periodic structure as well as with HFSS which all agree quite well. This procedure reduces the CPU-time and allows efficient design and optimization of periodic THz radiation sources. Future research will involve coupling of Maxwell's equations with a more detailed, physics-based transport model for higher-order effects.

  9. Variable-Width Datapath for On-Chip Network Static Power Reduction

    Energy Technology Data Exchange (ETDEWEB)

    Michelogiannakis, George; Shalf, John

    2013-11-13

    With the tight power budgets in modern large-scale chips and the unpredictability of application traffic, on-chip network designers are faced with the dilemma of designing for worst- case bandwidth demands and incurring high static power overheads, or designing for an average traffic pattern and risk degrading performance. This paper proposes adaptive bandwidth networks (ABNs) which divide channels and switches into lanes such that the network provides just the bandwidth necessary in each hop. ABNs also activate input virtual channels (VCs) individually and take advantage of drowsy SRAM cells to eliminate false VC activations. In addition, ABNs readily apply to silicon defect tolerance with just the extra cost for detecting faults. For application traffic, ABNs reduce total power consumption by an average of 45percent with comparable performance compared to single-lane power-gated networks, and 33percent compared to multi-network designs.

  10. On-chip, photon-number-resolving, telecommunication-band detectors for scalable photonic information processing

    Energy Technology Data Exchange (ETDEWEB)

    Gerrits, Thomas; Lita, Adriana E.; Calkins, Brice; Tomlin, Nathan A.; Fox, Anna E.; Linares, Antia Lamas; Mirin, Richard P.; Nam, Sae Woo [National Institute of Standards and Technology, Boulder, Colorado, 80305 (United States); Thomas-Peter, Nicholas; Metcalf, Benjamin J.; Spring, Justin B.; Langford, Nathan K.; Walmsley, Ian A. [Clarendon Laboratory, University of Oxford, Parks Road, Oxford OX1 3PU (United Kingdom); Gates, James C.; Smith, Peter G. R. [Optoelectronics Research Centre, University of Southampton, Highfield SO17 1BJ (United Kingdom)

    2011-12-15

    Integration is currently the only feasible route toward scalable photonic quantum processing devices that are sufficiently complex to be genuinely useful in computing, metrology, and simulation. Embedded on-chip detection will be critical to such devices. We demonstrate an integrated photon-number-resolving detector, operating in the telecom band at 1550 nm, employing an evanescently coupled design that allows it to be placed at arbitrary locations within a planar circuit. Up to five photons are resolved in the guided optical mode via absorption from the evanescent field into a tungsten transition-edge sensor. The detection efficiency is 7.2{+-}0.5 %. The polarization sensitivity of the detector is also demonstrated. Detailed modeling of device designs shows a clear and feasible route to reaching high detection efficiencies.

  11. Development of a Surface Micromachined On-Chip Flat Disk Micropump

    Directory of Open Access Journals (Sweden)

    M. I. KILANI

    2009-08-01

    Full Text Available The paper presents research progress in the development of a surface micromachined flat disk micropump which employs the viscous and centrifugal effects acting on a layer of fluid sandwiched between a rotating flat disk and a stationary plate. The pump is fabricated monolithically on-chip using Sandia’s Ultraplanar Multilevel MEMS Technology (SUMMiT™ where an electrostatic comb-drive Torsional Ratcheting Actuator (TRA drives the flat disk through a geared transmission. The paper reviews available analytical models for flow geometries similar to that of the described pump, and presents a set of experiments which depict its performance and possible failure modes. Those experiments highlight future research directions in the development of electrostatically-actuated, CMOS-compatible, surface micromachined pumps.

  12. Application of Butterfly Clos-Network in Network-on-Chip

    Directory of Open Access Journals (Sweden)

    Hui Liu

    2014-01-01

    Full Text Available This paper studied the topology of NoC (Network-on-Chip. By combining the characteristics of the Clos network and butterfly network, a new topology named BFC (Butterfly Clos-network network was proposed. This topology integrates several modules, which belongs to the same layer but different dimensions, into a new module. In the BFC network, a bidirectional link is used to complete information exchange, instead of information exchange between different layers in the original network. During the routing period, other nondestination nodes can be used as middle stages to transfer data packets to complete the routing mission. Therefore, this topology has the characteristic of multistage. Simulation analyses show that BFC inherits the rich path diversity of Clos network, and it has a better performance than butterfly network in throughput and delay in a quite congested traffic pattern.

  13. Micromachined On-Chip Dielectric Resonator Antenna Operating at 60 GHz

    KAUST Repository

    Sallam, Mai

    2015-06-01

    This paper presents a novel cylindrical Dielectric Resonator Antenna (DRA) suitable for millimeter-wave on-chip systems. The antenna was fabricated from a single high resistivity silicon wafer via micromachining technology. The new antenna was characterized using HFSS and experimentally with good agreement been found between the simulations and experiment. The proposed DRA has good radiation characteristics, where its gain and radiation efficiency are 7 dBi and 79.35%, respectively. These properties are reasonably constant over the working frequency bandwidth of the antenna. The return loss bandwidth was 2.23 GHz, which corresponds to 3.78% around 60 GHz. The antenna was primarily a broadside radiator with -15 dB cross polarization level.

  14. Router Designs for an Asynchronous Time-Division-Multiplexed Network-on-Chip

    DEFF Research Database (Denmark)

    Kasapaki, Evangelia; Sparsø, Jens; Sørensen, Rasmus Bo

    2013-01-01

    In this paper we explore the design of an asynchronous router for a time-division-multiplexed (TDM) network-on-chip (NOC) that is being developed for a multi-processor platform for hard real-time systems. TDM inherently requires a common time reference, and existing TDM-based NOC designs are either....... This adds hardware complexity and increases area and power consumption. We propose to use asynchronous routers in order to achieve a simpler, more robust and globally-asynchronous NOC, and this represents an unexplored point in the design space. The paper presents a range of alternative router designs. All...... routers have been synthesized for a 65nm CMOS technology, and the paper reports post-layout figures for area, speed and energy and compares the asynchronous designs with an existing mesochronous clocked router. The results show that an asynchronous router is 2 times smaller, marginally slower...

  15. Programming Cell Adhesion for On-Chip Sequential Boolean Logic Functions.

    Science.gov (United States)

    Qu, Xiangmeng; Wang, Shaopeng; Ge, Zhilei; Wang, Jianbang; Yao, Guangbao; Li, Jiang; Zuo, Xiaolei; Shi, Jiye; Song, Shiping; Wang, Lihua; Li, Li; Pei, Hao; Fan, Chunhai

    2017-08-02

    Programmable remodelling of cell surfaces enables high-precision regulation of cell behavior. In this work, we developed in vitro constructed DNA-based chemical reaction networks (CRNs) to program on-chip cell adhesion. We found that the RGD-functionalized DNA CRNs are entirely noninvasive when interfaced with the fluidic mosaic membrane of living cells. DNA toehold with different lengths could tunably alter the release kinetics of cells, which shows rapid release in minutes with the use of a 6-base toehold. We further demonstrated the realization of Boolean logic functions by using DNA strand displacement reactions, which include multi-input and sequential cell logic gates (AND, OR, XOR, and AND-OR). This study provides a highly generic tool for self-organization of biological systems.

  16. On-Chip High-Finesse Fabry-Perot Microcavities for Optical Sensing and Quantum Information.

    Science.gov (United States)

    Bitarafan, Mohammad H; DeCorby, Ray G

    2017-07-31

    For applications in sensing and cavity-based quantum computing and metrology, open-access Fabry-Perot cavities-with an air or vacuum gap between a pair of high reflectance mirrors-offer important advantages compared to other types of microcavities. For example, they are inherently tunable using MEMS-based actuation strategies, and they enable atomic emitters or target analytes to be located at high field regions of the optical mode. Integration of curved-mirror Fabry-Perot cavities on chips containing electronic, optoelectronic, and optomechanical elements is a topic of emerging importance. Micro-fabrication techniques can be used to create mirrors with small radius-of-curvature, which is a prerequisite for cavities to support stable, small-volume modes. We review recent progress towards chip-based implementation of such cavities, and highlight their potential to address applications in sensing and cavity quantum electrodynamics.

  17. Rights, goals, and capabilities

    NARCIS (Netherlands)

    van Hees, M.V.B.P.M

    This article analyses the relationship between rights and capabilities in order to get a better grasp of the kind of consequentialism that the capability theory represents. Capability rights have been defined as rights that have a capability as their object (rights to capabilities). Such a

  18. Graphene nanoribbon field effect transistor for nanometer-size on-chip temperature sensor

    Science.gov (United States)

    Banadaki, Yaser M.; Srivastava, Ashok; Sharifi, Safura

    2016-04-01

    Graphene has been extensively investigated as a promising material for various types of high performance sensors due to its large surface-to-volume ratio, remarkably high carrier mobility, high carrier density, high thermal conductivity, extremely high mechanical strength and high signal-to-noise ratio. The power density and the corresponding die temperature can be tremendously high in scaled emerging technology designs, urging the on-chip sensing and controlling of the generated heat in nanometer dimensions. In this paper, we have explored the feasibility of a thin oxide graphene nanoribbon (GNR) as nanometer-size temperature sensor for detecting local on-chip temperature at scaled bias voltages of emerging technology. We have introduced an analytical model for GNR FET for 22nm technology node, which incorporates both thermionic emission of high-energy carriers and band-to-band-tunneling (BTBT) of carriers from drain to channel regions together with different scattering mechanisms due to intrinsic acoustic phonons and optical phonons and line-edge roughness in narrow GNRs. The temperature coefficient of resistivity (TCR) of GNR FET-based temperature sensor shows approximately an order of magnitude higher TCR than large-area graphene FET temperature sensor by accurately choosing of GNR width and bias condition for a temperature set point. At gate bias VGS = 0.55 V, TCR maximizes at room temperature to 2.1×10-2 /K, which is also independent of GNR width, allowing the design of width-free GNR FET for room temperature sensing applications.

  19. Advanced Nanofabrication Process Development for Self-Powered System-on-Chip

    KAUST Repository

    Rojas, Jhonathan Prieto

    2010-11-01

    In this work the development of a Self-Powered System-On-Chip is explored by examining two components of process development in different perspectives. On one side, an energy component is approached from a biochemical standpoint where a Microbial Fuel Cell (MFC) is built with standard microfabrication techniques, displaying a novel electrode based on Carbon Nanotubes (CNTs). The fabrication process involves the formation of a micrometric chamber that hosts an enhanced CNT-based anode. Preliminary results are promising, showing a high current density (113.6mA/m2) compared with other similar cells. Nevertheless many improvements can be done to the main design and further characterization of the anode will give a more complete understanding and bring the device closer to a practical implementation. On a second point of view, nano-patterning through silicon nitride spacer width control is developed, aimed at producing alternative sub-100nm device fabrication with the potential of further scaling thanks to nanowire based structures. These nanostructures are formed from a nano-pattern template, by using a bottom-up fabrication scheme. Uniformity and scalability of the process are demonstrated and its potential described. An estimated area of 0.120μm2 for a 6T-SRAM (Static Random Access Memory) bitcell (6 devices) can be achieved. In summary, by using a novel sustainable energy component and scalable nano-patterning for logic and computing module, this work has successfully collected the essential base knowledge and joined two different elements that synergistically will contribute for the future implementation of a Self-Powered System-on-Chip.

  20. Renewable Heating And Cooling

    Science.gov (United States)

    Renewable heating and cooling is a set of alternative resources and technologies that can be used in place of conventional heating and cooling technologies for common applications such as water heating, space heating, space cooling and process heat.

  1. Mobile Test Capabilities

    Data.gov (United States)

    Federal Laboratory Consortium — The Electrical Power Mobile Test capabilities are utilized to conduct electrical power quality testing on aircraft and helicopters. This capability allows that the...

  2. Influence of non-edible vegetable based oil as cutting fluid on chip, surface roughness and cutting force during drilling operation of Mild Steel

    Science.gov (United States)

    Susmitha, M.; Sharan, P.; Jyothi, P. N.

    2016-09-01

    Friction between work piece-cutting tool-chip generates heat in the machining zone. The heat generated reduces the tool life, increases surface roughness and decreases the dimensional sensitiveness of work material. This can be overcome by using cutting fluids during machining. They are used to provide lubrication and cooling effects between cutting tool and work piece and cutting tool and chip during machining operation. As a result, important benefits would be achieved such longer tool life, easy chip flow and higher machining quality in the machining processes. Non-edible vegetable oils have received considerable research attention in the last decades owing to their remarkable improved tribological characteristics and due to increasing attention to environmental issues, have driven the lubricant industry toward eco friendly products from renewable sources. In the present work, different non-edible vegetable oils are used as cutting fluid during drilling of Mild steel work piece. Non-edible vegetable oils, used are Karanja oil (Honge), Neem oil and blend of these two oils. The effect of these cutting fluids on chip formation, surface roughness and cutting force are investigated and the results obtained are compared with results obtained with petroleum based cutting fluids and dry conditions.

  3. Restaurant food cooling practices.

    Science.gov (United States)

    Brown, Laura Green; Ripley, Danny; Blade, Henry; Reimann, Dave; Everstine, Karen; Nicholas, Dave; Egan, Jessica; Koktavy, Nicole; Quilliam, Daniela N

    2012-12-01

    Improper food cooling practices are a significant cause of foodborne illness, yet little is known about restaurant food cooling practices. This study was conducted to examine food cooling practices in restaurants. Specifically, the study assesses the frequency with which restaurants meet U.S. Food and Drug Administration (FDA) recommendations aimed at reducing pathogen proliferation during food cooling. Members of the Centers for Disease Control and Prevention's Environmental Health Specialists Network collected data on food cooling practices in 420 restaurants. The data collected indicate that many restaurants are not meeting FDA recommendations concerning cooling. Although most restaurant kitchen managers report that they have formal cooling processes (86%) and provide training to food workers on proper cooling (91%), many managers said that they do not have tested and verified cooling processes (39%), do not monitor time or temperature during cooling processes (41%), or do not calibrate thermometers used for monitoring temperatures (15%). Indeed, 86% of managers reported cooling processes that did not incorporate all FDA-recommended components. Additionally, restaurants do not always follow recommendations concerning specific cooling methods, such as refrigerating cooling food at shallow depths, ventilating cooling food, providing open-air space around the tops and sides of cooling food containers, and refraining from stacking cooling food containers on top of each other. Data from this study could be used by food safety programs and the restaurant industry to target training and intervention efforts concerning cooling practices. These efforts should focus on the most frequent poor cooling practices, as identified by this study.

  4. A 3Gb/s/ch Transceiver for 10-mm Uninterrupted RC-Limited Global On-Chip Interconnects

    NARCIS (Netherlands)

    Schinkel, Daniel; Mensink, E.; Klumperink, Eric A.M.; van Tuijl, Adrianus Johannes Maria; Nauta, Bram

    2006-01-01

    Abstract—Global on-chip data communication is becoming a concern as the gap between transistor speed and interconnect bandwidth increases with CMOS process scaling. Repeaters can partly bridge this gap, but the classical repeater insertion approach requires a large number of repeaters while the

  5. On-chip active gate bias circuit for MMIC amplifier applications with 100% threshold voltage variation compensation

    NARCIS (Netherlands)

    Hek, A.P. de; Busking, E.B.

    2006-01-01

    In this paper the design and performance of an on-chip active gate bias circuit for application in MMIC amplifiers, which gives 100% compensation for threshold variation and at the same time is insensitive to supply voltage variations, is discussed. Design equations have been given. In addition, the

  6. On-chip microreactor system for the production of nano-emulsion loaded liposomes: towards targeted delivery of lipophilic drugs

    NARCIS (Netherlands)

    Langelaan, M.L.P.; Emmelkamp, J.; Segers, M.J.A.; Lenting, H.B.M.

    2011-01-01

    An on-chip microreactor system for the production of novel nano-biodevices is presented. This nano-biodevice consists of a nano-emulsion loaded with lipophilic drugs, entrapped in liposomes. These nano-biodevices can be equipped with targeting molecules for higher drug efficiency. The microreactor

  7. On-chip patch antenna on InP substrate for short-range wireless communication at 140 GHz

    DEFF Research Database (Denmark)

    Dong, Yunfeng; Johansen, Tom Keinicke; Zhurbenko, Vitaliy

    2017-01-01

    This paper presents the design of an on-chip patch antenna on indium phosphide (InP) substrate for short-range wireless communication at 140 GHz. The antenna shows a simulated gain of 5.3 dBi with 23% bandwidth at 140 GHz and it can be used for either direct chip-to-chip communication or chip...

  8. Fiber free plug and play on-chip scattering cytometer module – for implementation in microfluidic point of care devices

    DEFF Research Database (Denmark)

    Jensen, Thomas Glasdam; Kutter, Jörg Peter

    2010-01-01

    In this paper, we report on recent progress toward the development of a plug and play on-chip cytometer based on light scattering. By developing a device that does not depend on the critical alignment and cumbersome handling of fragile optical fibers, we approach a device that is suitable for non...

  9. Gain enhancement of low profile on-chip dipole antenna via Artificial Magnetic Conductor at 94 GHz

    KAUST Repository

    Nafe, Mahmoud; Syed, Ahad; Shamim, Atif

    2015-01-01

    The bottleneck for realizing high efficiency System-on-Chip is integrating the antenna on the lossy silicon substrate. To shield the antenna from the silicon, a ground plane can be used. However, the ultra-thin oxide does not provide enough

  10. On-chip two-mode division multiplexing using tapered directional coupler-based mode multiplexer and demultiplexer

    DEFF Research Database (Denmark)

    Ding, Yunhong; Xu, Jing; Da Ros, Francesco

    2013-01-01

    ), and large fabrication tolerance (20 nm) are measured. An on-chip mode multiplexing experiment is carried out on the fabricated circuit with non return-to-zero (NRZ) on-off keying (OOK) signals at 40 Gbit/s. The experimental results show clear eye diagrams and moderate power penalty for both TE0 and TE1...

  11. On-chip Detection of Rolling Circle Amplified DNA Molecules from Bacillus Globigii spores and Vibrio Cholerae

    DEFF Research Database (Denmark)

    Østerberg, Frederik Westergaard; Rizzi, Giovanni; Donolato, Marco

    2014-01-01

    For the first time DNA coils formed by rolling circle amplification are quantified on-chip by Brownian relaxation measurements on magnetic nanobeads using a magnetoresistive sensor. No external magnetic fields are required besides the magnetic field arising from the current through the sensor...

  12. Cooled spool piston compressor

    Science.gov (United States)

    Morris, Brian G. (Inventor)

    1993-01-01

    A hydraulically powered gas compressor receives low pressure gas and outputs a high pressure gas. The housing of the compressor defines a cylinder with a center chamber having a cross-sectional area less than the cross-sectional area of a left end chamber and a right end chamber, and a spool-type piston assembly is movable within the cylinder and includes a left end closure, a right end closure, and a center body that are in sealing engagement with the respective cylinder walls as the piston reciprocates. First and second annual compression chambers are provided between the piston enclosures and center housing portion of the compressor, thereby minimizing the spacing between the core gas and a cooled surface of the compressor. Restricted flow passageways are provided in the piston closure members and a path is provided in the central body of the piston assembly, such that hydraulic fluid flows through the piston assembly to cool the piston assembly during its operation. The compressor of the present invention may be easily adapted for a particular application, and is capable of generating high gas pressures while maintaining both the compressed gas and the compressor components within acceptable temperature limits.

  13. Capabilities for Strategic Adaptation

    DEFF Research Database (Denmark)

    Distel, Andreas Philipp

    This dissertation explores capabilities that enable firms to strategically adapt to environmental changes and preserve competitiveness over time – often referred to as dynamic capabilities. While dynamic capabilities being a popular research domain, too little is known about what these capabiliti...

  14. On-Chip Scan-Based Test Strategy for a Dependable Many-Core Processor Using a NoC as a Test Access Mechanism

    NARCIS (Netherlands)

    Zhang, X.; Kerkhoff, Hans G.; Vermeulen, Bart

    2010-01-01

    Periodic on-chip scan-based tests have to be applied to a many-core processor SoC to improve its dependability. An infrastructural IP module has been designed and incorporated into the SoC to function as an ATE. This paper introduces the reuse of a Network-on-Chip as a test access mechanism. Since

  15. Intelligent microchip networks: an agent-on-chip synthesis framework for the design of smart and robust sensor networks

    Science.gov (United States)

    Bosse, Stefan

    2013-05-01

    Sensorial materials consisting of high-density, miniaturized, and embedded sensor networks require new robust and reliable data processing and communication approaches. Structural health monitoring is one major field of application for sensorial materials. Each sensor node provides some kind of sensor, electronics, data processing, and communication with a strong focus on microchip-level implementation to meet the goals of miniaturization and low-power energy environments, a prerequisite for autonomous behaviour and operation. Reliability requires robustness of the entire system in the presence of node, link, data processing, and communication failures. Interaction between nodes is required to manage and distribute information. One common interaction model is the mobile agent. An agent approach provides stronger autonomy than a traditional object or remote-procedure-call based approach. Agents can decide for themselves, which actions are performed, and they are capable of flexible behaviour, reacting on the environment and other agents, providing some degree of robustness. Traditionally multi-agent systems are abstract programming models which are implemented in software and executed on program controlled computer architectures. This approach does not well scale to micro-chip level and requires full equipped computers and communication structures, and the hardware architecture does not consider and reflect the requirements for agent processing and interaction. We propose and demonstrate a novel design paradigm for reliable distributed data processing systems and a synthesis methodology and framework for multi-agent systems implementable entirely on microchip-level with resource and power constrained digital logic supporting Agent-On-Chip architectures (AoC). The agent behaviour and mobility is fully integrated on the micro-chip using pipelined communicating processes implemented with finite-state machines and register-transfer logic. The agent behaviour

  16. Design and FPGA-implementation of multilayer neural networks with on-chip learning

    International Nuclear Information System (INIS)

    Haggag, S.S.M.Y

    2008-01-01

    Artificial Neural Networks (ANN) is used in many applications in the industry because of their parallel structure, high speed, and their ability to give easy solution to complicated problems. For example identifying the orange and apple in the sorting machine with neural network is easier than using image processing techniques to do the same thing. There are different software for designing, training, and testing the ANN, but in order to use the ANN in the industry, it should be implemented on hardware outside the computer. Neural networks are artificial systems inspired on the brain's cognitive behavior, which can learn tasks with some degree of complexity, such as signal processing, diagnosis, robotics, image processing, and pattern recognition. Many applications demand a high computing power and the traditional software implementation are not sufficient.This thesis presents design and FPGA implementation of Multilayer Neural Networks with On-chip learning in re-configurable hardware. Hardware implementation of neural network algorithm is very interesting due their high performance and they can easily be made parallel. The architecture proposed herein takes advantage of distinct data paths for the forward and backward propagation stages and a pipelined adaptation of the on- line backpropagation algorithm to significantly improve the performance of the learning phase. The architecture is easily scalable and able to cope with arbitrary network sizes with the same hardware. The implementation is targeted diagnosis of the Research Reactor accidents to avoid the risk of occurrence of a nuclear accident. The proposed designed circuits are implemented using Xilinx FPGA Chip XC40150xv and occupied 73% of Chip CLBs. It achieved 10.8 μs to take decision in the forward propagation compared with current software implemented of RPS which take 24 ms. The results show that the proposed architecture leads to significant speed up comparing to high end software solutions. On-chip

  17. Dynamic capabilities, Marketing Capability and Organizational Performance

    Directory of Open Access Journals (Sweden)

    Adriana Roseli Wünsch Takahashi

    2017-01-01

    Full Text Available The goal of the study is to investigate the influence of dynamic capabilities on organizational performance and the role of marketing capabilities as a mediator in this relationship in the context of private HEIs in Brazil. As a research method we carried out a survey with 316 IES and data analysis was operationalized with the technique of structural equation modeling. The results indicate that the dynamic capabilities have influence on organizational performance only when mediated by marketing ability. The marketing capability has an important role in the survival, growth and renewal on educational services offerings for HEIs in private sector, and consequently in organizational performance. It is also demonstrated that mediated relationship is more intense for HEI with up to 3,000 students and other organizational profile variables such as amount of courses, the constitution, the type of institution and type of education do not significantly alter the results.

  18. Cooled Water Production System,

    Science.gov (United States)

    The invention refers to the field of air conditioning and regards an apparatus for obtaining cooled water . The purpose of the invention is to develop...such a system for obtaining cooled water which would permit the maximum use of the cooling effect of the water -cooling tower.

  19. Process fluid cooling system

    International Nuclear Information System (INIS)

    Farquhar, N.G.; Schwab, J.A.

    1977-01-01

    A system of heat exchangers is disclosed for cooling process fluids. The system is particularly applicable to cooling steam generator blowdown fluid in a nuclear plant prior to chemical purification of the fluid in which it minimizes the potential of boiling of the plant cooling water which cools the blowdown fluid

  20. Hybrid radiator cooling system

    Science.gov (United States)

    France, David M.; Smith, David S.; Yu, Wenhua; Routbort, Jules L.

    2016-03-15

    A method and hybrid radiator-cooling apparatus for implementing enhanced radiator-cooling are provided. The hybrid radiator-cooling apparatus includes an air-side finned surface for air cooling; an elongated vertically extending surface extending outwardly from the air-side finned surface on a downstream air-side of the hybrid radiator; and a water supply for selectively providing evaporative cooling with water flow by gravity on the elongated vertically extending surface.

  1. Mimicking the Kidney: A Key Role in Organ-on-Chip Development

    Directory of Open Access Journals (Sweden)

    Roberto Paoli

    2016-07-01

    Full Text Available Pharmaceutical drug screening and research into diseases call for significant improvement in the effectiveness of current in vitro models. Better models would reduce the likelihood of costly failures at later drug development stages, while limiting or possibly even avoiding the use of animal models. In this regard, promising advances have recently been made by the so-called “organ-on-chip” (OOC technology. By combining cell culture with microfluidics, biomedical researchers have started to develop microengineered models of the functional units of human organs. With the capacity to mimic physiological microenvironments and vascular perfusion, OOC devices allow the reproduction of tissue- and organ-level functions. When considering drug testing, nephrotoxicity is a major cause of attrition during pre-clinical, clinical, and post-approval stages. Renal toxicity accounts for 19% of total dropouts during phase III drug evaluation—more than half the drugs abandoned because of safety concerns. Mimicking the functional unit of the kidney, namely the nephron, is therefore a crucial objective. Here we provide an extensive review of the studies focused on the development of a nephron-on-chip device.

  2. A new ATLAS muon CSC readout system with system on chip technology on ATCA platform

    Science.gov (United States)

    Claus, R.; ATLAS Collaboration

    2016-07-01

    The ATLAS muon Cathode Strip Chamber (CSC) back-end readout system has been upgraded during the LHC 2013-2015 shutdown to be able to handle the higher Level-1 trigger rate of 100 kHz and the higher occupancy at Run 2 luminosity. The readout design is based on the Reconfiguration Cluster Element (RCE) concept for high bandwidth generic DAQ implemented on the ATCA platform. The RCE design is based on the new System on Chip Xilinx Zynq series with a processor-centric architecture with ARM processor embedded in FPGA fabric and high speed I/O resources together with auxiliary memories to form a versatile DAQ building block that can host applications tapping into both software and firmware resources. The Cluster on Board (COB) ATCA carrier hosts RCE mezzanines and an embedded Fulcrum network switch to form an online DAQ processing cluster. More compact firmware solutions on the Zynq for G-link, S-link and TTC allowed the full system of 320 G-links from the 32 chambers to be processed by 6 COBs in one ATCA shelf through software waveform feature extraction to output 32 S-links. The full system was installed in Sept. 2014. We will present the RCE/COB design concept, the firmware and software processing architecture, and the experience from the intense commissioning towards LHC Run 2.

  3. A new ATLAS muon CSC readout system with system on chip technology on ATCA platform

    International Nuclear Information System (INIS)

    Claus, R.

    2016-01-01

    The ATLAS muon Cathode Strip Chamber (CSC) back-end readout system has been upgraded during the LHC 2013–2015 shutdown to be able to handle the higher Level-1 trigger rate of 100 kHz and the higher occupancy at Run 2 luminosity. The readout design is based on the Reconfiguration Cluster Element (RCE) concept for high bandwidth generic DAQ implemented on the ATCA platform. The RCE design is based on the new System on Chip Xilinx Zynq series with a processor-centric architecture with ARM processor embedded in FPGA fabric and high speed I/O resources together with auxiliary memories to form a versatile DAQ building block that can host applications tapping into both software and firmware resources. The Cluster on Board (COB) ATCA carrier hosts RCE mezzanines and an embedded Fulcrum network switch to form an online DAQ processing cluster. More compact firmware solutions on the Zynq for G-link, S-link and TTC allowed the full system of 320 G-links from the 32 chambers to be processed by 6 COBs in one ATCA shelf through software waveform feature extraction to output 32 S-links. The full system was installed in Sept. 2014. We will present the RCE/COB design concept, the firmware and software processing architecture, and the experience from the intense commissioning towards LHC Run 2.

  4. A new ATLAS muon CSC readout system with system on chip technology on ATCA platform

    Science.gov (United States)

    Bartoldus, R.; Claus, R.; Garelli, N.; Herbst, R. T.; Huffer, M.; Iakovidis, G.; Iordanidou, K.; Kwan, K.; Kocian, M.; Lankford, A. J.; Moschovakos, P.; Nelson, A.; Ntekas, K.; Ruckman, L.; Russell, J.; Schernau, M.; Schlenker, S.; Su, D.; Valderanis, C.; Wittgen, M.; Yildiz, S. C.

    2016-01-01

    The ATLAS muon Cathode Strip Chamber (CSC) backend readout system has been upgraded during the LHC 2013-2015 shutdown to be able to handle the higher Level-1 trigger rate of 100 kHz and the higher occupancy at Run-2 luminosity. The readout design is based on the Reconfigurable Cluster Element (RCE) concept for high bandwidth generic DAQ implemented on the Advanced Telecommunication Computing Architecture (ATCA) platform. The RCE design is based on the new System on Chip XILINX ZYNQ series with a processor-centric architecture with ARM processor embedded in FPGA fabric and high speed I/O resources. Together with auxiliary memories, all these components form a versatile DAQ building block that can host applications tapping into both software and firmware resources. The Cluster on Board (COB) ATCA carrier hosts RCE mezzanines and an embedded Fulcrum network switch to form an online DAQ processing cluster. More compact firmware solutions on the ZYNQ for high speed input and output fiberoptic links and TTC allowed the full system of 320 input links from the 32 chambers to be processed by 6 COBs in one ATCA shelf. The full system was installed in September 2014. We will present the RCE/COB design concept, the firmware and software processing architecture, and the experience from the intense commissioning for LHC Run 2.

  5. A new ATLAS muon CSC readout system with system on chip technology on ATCA platform

    International Nuclear Information System (INIS)

    Bartoldus, R.; Claus, R.; Garelli, N.; Herbst, R.T.; Huffer, M.; Kocian, M.; Ruckman, L.; Russell, J.; Su, D.; Wittgen, M.; Iakovidis, G.; Iordanidou, K.; Moschovakos, P.; Ntekas, K.; Kwan, K.; Lankford, A.J.; Nelson, A.; Schernau, M.; Schlenker, S.; Valderanis, C.

    2016-01-01

    The ATLAS muon Cathode Strip Chamber (CSC) backend readout system has been upgraded during the LHC 2013-2015 shutdown to be able to handle the higher Level-1 trigger rate of 100 kHz and the higher occupancy at Run-2 luminosity. The readout design is based on the Reconfigurable Cluster Element (RCE) concept for high bandwidth generic DAQ implemented on the Advanced Telecommunication Computing Architecture (ATCA) platform. The RCE design is based on the new System on Chip XILINX ZYNQ series with a processor-centric architecture with ARM processor embedded in FPGA fabric and high speed I/O resources. Together with auxiliary memories, all these components form a versatile DAQ building block that can host applications tapping into both software and firmware resources. The Cluster on Board (COB) ATCA carrier hosts RCE mezzanines and an embedded Fulcrum network switch to form an online DAQ processing cluster. More compact firmware solutions on the ZYNQ for high speed input and output fiberoptic links and TTC allowed the full system of 320 input links from the 32 chambers to be processed by 6 COBs in one ATCA shelf. The full system was installed in September 2014. We will present the RCE/COB design concept, the firmware and software processing architecture, and the experience from the intense commissioning for LHC Run 2

  6. System on chip thermal vacuum sensor based on standard CMOS process

    International Nuclear Information System (INIS)

    Li Jinfeng; Tang Zhenan; Wang Jiaqi

    2009-01-01

    An on-chip microelectromechanical system was fabricated in a 0.5 μm standard CMOS process for gas pressure detection. The sensor was based on a micro-hotplate (MHP) and had been integrated with a rail to rail operational amplifier and an 8-bit successive approximation register (SAR) A/D converter. A tungsten resistor was manufactured on the MHP as the sensing element, and the sacrificial layer of the sensor was made from polysilicon and etched by surface-micromachining technology. The operational amplifier was configured to make the sensor operate in constant current mode. A digital bit stream was provided as the system output. The measurement results demonstrate that the gas pressure sensitive range of the vacuum sensor extends from 1 to 10 5 Pa. In the gas pressure range from 1 to 100 Pa, the sensitivity of the sensor is 0.23 mV/ Pa, the linearity is 4.95%, and the hysteresis is 8.69%. The operational amplifier can drive 200 ω resistors distortionlessly, and the SAR A/D converter achieves a resolution of 7.4 bit with 100 kHz sample rate. The performance of the operational amplifier and the SAR A/D converter meets the requirements of the sensor system.

  7. Electrical lysis: dynamics revisited and advances in On-chip operation.

    Science.gov (United States)

    Morshed, Bashir; Shams, Maitham; Mussivand, Tofy

    2013-01-01

    Electrical lysis (EL) is the process of breaking the cell membrane to expose the internal contents under an applied high electric field. Lysis is an important phenomenon for cellular analysis, medical treatment, and biofouling control. This paper aims to review, summarize, and analyze recent advancements on EL. Major databases including PubMed, Ei Engineering Village, IEEE Xplore, and Scholars Portal were searched using relevant keywords. More than 50 articles published in English since 1997 are cited in this article. EL has several key advantages compared to other lysis techniques such as chemical, mechanical, sonication, or laser, including rapid speed of operation, ability to control, miniaturization, low cost, and low power requirement. A variety of cell types have been investigated for including protoplasts, E. coli, yeasts, blood cells, and cancer cells. EL has been developed and applied for decontamination, cytology, genetics, single-cell analysis, cancer treatment, and other applications. On-chip EL is a promising technology for multiplexed automated implementation of cell-sample preparation and processing with micro- or nanoliter reagents.

  8. On-Chip Fluorescence Switching System for Constructing a Rewritable Random Access Data Storage Device.

    Science.gov (United States)

    Nguyen, Hoang Hiep; Park, Jeho; Hwang, Seungwoo; Kwon, Oh Seok; Lee, Chang-Soo; Shin, Yong-Beom; Ha, Tai Hwan; Kim, Moonil

    2018-01-10

    We report the development of on-chip fluorescence switching system based on DNA strand displacement and DNA hybridization for the construction of a rewritable and randomly accessible data storage device. In this study, the feasibility and potential effectiveness of our proposed system was evaluated with a series of wet experiments involving 40 bits (5 bytes) of data encoding a 5-charactered text (KRIBB). Also, a flexible data rewriting function was achieved by converting fluorescence signals between "ON" and "OFF" through DNA strand displacement and hybridization events. In addition, the proposed system was successfully validated on a microfluidic chip which could further facilitate the encoding and decoding process of data. To the best of our knowledge, this is the first report on the use of DNA hybridization and DNA strand displacement in the field of data storage devices. Taken together, our results demonstrated that DNA-based fluorescence switching could be applicable to construct a rewritable and randomly accessible data storage device through controllable DNA manipulations.

  9. Decoding Network Structure in On-Chip Integrated Flow Cells with Synchronization of Electrochemical Oscillators

    Science.gov (United States)

    Jia, Yanxin; Kiss, István Z.

    2017-04-01

    The analysis of network interactions among dynamical units and the impact of the coupling on self-organized structures is a challenging task with implications in many biological and engineered systems. We explore the coupling topology that arises through the potential drops in a flow channel in a lab-on-chip device that accommodates chemical reactions on electrode arrays. The networks are revealed by analysis of the synchronization patterns with the use of an oscillatory chemical reaction (nickel electrodissolution) and are further confirmed by direct decoding using phase model analysis. In dual electrode configuration, a variety coupling schemes, (uni- or bidirectional positive or negative) were identified depending on the relative placement of the reference and counter electrodes (e.g., placed at the same or the opposite ends of the flow channel). With three electrodes, the network consists of a superposition of a localized (upstream) and global (all-to-all) coupling. With six electrodes, the unique, position dependent coupling topology resulted spatially organized partial synchronization such that there was a synchrony gradient along the quasi-one-dimensional spatial coordinate. The networked, electrode potential (current) spike generating electrochemical reactions hold potential for construction of an in-situ information processing unit to be used in electrochemical devices in sensors and batteries.

  10. Area and Power Modeling for Networks-on-Chip with Layout Awareness

    Directory of Open Access Journals (Sweden)

    Paolo Meloni

    2007-01-01

    Full Text Available Networks-on-Chip (NoCs are emerging as scalable interconnection architectures, designed to support the increasing amount of cores that are integrated onto a silicon die. Compared to traditional interconnects, however, NoCs still lack well established CAD deployment tools to tackle the large amount of available degrees of freedom, starting from the choice of a network topology. “Silicon-aware” optimization tools are now emerging in literature; they select an NoC topology taking into account the tradeoff between performance and hardware cost, that is, area and power consumption. A key requirement for the effectiveness of these tools, however, is the availability of accurate analytical models for power and area. Such models are unfortunately not as available and well understood as those for traditional communication fabrics. Further, simplistic models may turn out to be totally inaccurate when applied to wire dominated architectures; this observation demands at least for a model validation step against placed and routed devices. In this work, given an NoC reference architecture, we present a flow to devise analytical models of area occupation and power consumption of NoC switches, and propose strategies for coefficient characterization which have different tradeoffs in terms of accuracy and of modeling activity effort. The models are parameterized on several architectural, synthesis-related, and traffic variables, resulting in maximum flexibility. We finally assess the accuracy of the models, checking whether they can also be applied to placed and routed NoC blocks.

  11. Optical biosensor based on a silicon nanowire ridge waveguide for lab on chip applications

    International Nuclear Information System (INIS)

    Gamal, Rania; Ismail, Yehea; Swillam, Mohamed A

    2015-01-01

    We propose a novel sensor using a silicon nanowire ridge waveguide (SNRW). This waveguide is comprised of an array of silicon nanowires on an insulator substrate that has the envelope of a ridge waveguide. The SNRW inherently maximizes the overlap between the material-under-test and the incident light wave by introducing voids to the otherwise bulk structure. When a sensing sample is injected, the voids within the SNRW adopt the refractive index of the material-under-test. Hence, the strong contribution of the material-under-test to the overall modal effective index will greatly augment the sensitivity. Additionally, the ridge structure provides a fabrication convenience as it covers the entire substrate, ensuring that the etching process would not damage the substrate. Finite-difference time-domain simulations are conducted and showed that the percentage change in the effective index due to a 1% change in the surrounding environment is more than 170 times the change perceived in an evanescent-detection based bulk silicon ridge waveguide. Moreover, the SNRW proves to be more sensitive than recent other, non-evanescent sensors. In addition, the detection limit for this structure was revealed to be as small as 10 −8 . A compact bimodal waveguide based on SNRW is designed and tested. It delivers high sensitivity values that offer comparable performance to similar low-index light-guiding sensing configurations; however, our proposed structure has much smaller footprints and allows high dense integration for lab-on-chip applications. (paper)

  12. Integration of systems biology with organs-on-chips to humanize therapeutic development

    Science.gov (United States)

    Edington, Collin D.; Cirit, Murat; Chen, Wen Li Kelly; Clark, Amanda M.; Wells, Alan; Trumper, David L.; Griffith, Linda G.

    2017-02-01

    "Mice are not little people" - a refrain becoming louder as the gaps between animal models and human disease become more apparent. At the same time, three emerging approaches are headed toward integration: powerful systems biology analysis of cell-cell and intracellular signaling networks in patient-derived samples; 3D tissue engineered models of human organ systems, often made from stem cells; and micro-fluidic and meso-fluidic devices that enable living systems to be sustained, perturbed and analyzed for weeks in culture. Integration of these rapidly moving fields has the potential to revolutionize development of therapeutics for complex, chronic diseases, including those that have weak genetic bases and substantial contributions from gene-environment interactions. Technical challenges in modeling complex diseases with "organs on chips" approaches include the need for relatively large tissue masses and organ-organ cross talk to capture systemic effects, such that current microfluidic formats often fail to capture the required scale and complexity for interconnected systems. These constraints drive development of new strategies for designing in vitro models, including perfusing organ models, as well as "mesofluidic" pumping and circulation in platforms connecting several organ systems, to achieve the appropriate physiological relevance.

  13. Gradient-free determination of isoelectric points of proteins on chip.

    Science.gov (United States)

    Łapińska, Urszula; Saar, Kadi L; Yates, Emma V; Herling, Therese W; Müller, Thomas; Challa, Pavan K; Dobson, Christopher M; Knowles, Tuomas P J

    2017-08-30

    The isoelectric point (pI) of a protein is a key characteristic that influences its overall electrostatic behaviour. The majority of conventional methods for the determination of the isoelectric point of a molecule rely on the use of spatial gradients in pH, although significant practical challenges are associated with such techniques, notably the difficulty in generating a stable and well controlled pH gradient. Here, we introduce a gradient-free approach, exploiting a microfluidic platform which allows us to perform rapid pH change on chip and probe the electrophoretic mobility of species in a controlled field. In particular, in this approach, the pH of the electrolyte solution is modulated in time rather than in space, as in the case for conventional determinations of the isoelectric point. To demonstrate the general approachability of this platform, we have measured the isoelectric points of representative set of seven proteins, bovine serum albumin, β-lactoglobulin, ribonuclease A, ovalbumin, human transferrin, ubiquitin and myoglobin in microlitre sample volumes. The ability to conduct measurements in free solution thus provides the basis for the rapid determination of isoelectric points of proteins under a wide variety of solution conditions and in small volumes.

  14. Determination of aminoglycoside antibiotics using an on-chip microfluidic device with chemiluminescence detection

    International Nuclear Information System (INIS)

    Sierra-Rodero, M.; Fernandez-Romero, J.M.; Gomez-Hens, A.

    2012-01-01

    We describe an on-chip microflow injection (μFI) approach for the determination of aminoglycoside antibiotics using chemiluminescence (CL) detection. The method is based on the inhibition of the Cu(II)-catalyzed CL reaction of luminol and hydrogen peroxide by the aminoglycosides due to the formation of a complex between the antibiotic and Cu(II). The main features of the method include small sample volumes and a fast response. Syringe pumps were used to insert the sample and the reagents into the microfluidic device. CL was collected using a fiber optic bundle connected to a luminescence detector. All instrumental, hydrodynamic and chemical variables involved in the system were optimized using neomycin as the aminoglycoside model. Inhibition is proportional to the concentration of the antibiotics. The dynamic ranges of the calibration graphs obtained for neomycin, streptomycin and amikacin are 0.3-3.3, 0.9-13.7, and 0.8-8.5 μmol L -1 , and the detection limits are 0.09, 0.28 and 0.24 μmol L -1 , respectively. The precision of the methods, expressed as relative standard deviation, is in the range from 0.8 to 5.0 %. The method was successfully applied to the determination of neomycin in water samples, with recoveries ranging from 80 to 120 %. (author)

  15. A High-Throughput, High-Accuracy System-Level Simulation Framework for System on Chips

    Directory of Open Access Journals (Sweden)

    Guanyi Sun

    2011-01-01

    Full Text Available Today's System-on-Chips (SoCs design is extremely challenging because it involves complicated design tradeoffs and heterogeneous design expertise. To explore the large solution space, system architects have to rely on system-level simulators to identify an optimized SoC architecture. In this paper, we propose a system-level simulation framework, System Performance Simulation Implementation Mechanism, or SPSIM. Based on SystemC TLM2.0, the framework consists of an executable SoC model, a simulation tool chain, and a modeling methodology. Compared with the large body of existing research in this area, this work is aimed at delivering a high simulation throughput and, at the same time, guaranteeing a high accuracy on real industrial applications. Integrating the leading TLM techniques, our simulator can attain a simulation speed that is not slower than that of the hardware execution by a factor of 35 on a set of real-world applications. SPSIM incorporates effective timing models, which can achieve a high accuracy after hardware-based calibration. Experimental results on a set of mobile applications proved that the difference between the simulated and measured results of timing performance is within 10%, which in the past can only be attained by cycle-accurate models.

  16. New movable plate for efficient millimeter wave vertical on-chip antenna

    KAUST Repository

    Marnat, Loic; Carreno, Armando Arpys Arevalo; Conchouso Gonzalez, David; Galicia Martinez, Miguel Angel; Foulds, Ian G.; Shamim, Atif

    2013-01-01

    A new movable plate concept is presented in this paper to realize mm-wave vertical on-chip antennas through MEMS based post-processing steps in a CMOS compatible process. By virtue of its vertical position, the antenna is isolated from the lossy Si substrate and hence performs with a better efficiency as compared to the horizontal position. In addition, the movable plate concept enables polarization diversity by providing both horizontal and vertical polarizations on the same chip. Through a first iteration fractal bowtie antenna design, dual band (60 and 77 GHz) operation is demonstrated in both horizontal and vertical positions without any change in dimensions or use of switches for two different mediums (Si and air). To support the movable plate concept, the transmission line and antenna are designed on a flexible polyamide, where the former has been optimized to operate in the bent position. The design is highly suitable for compact, low cost and efficient SoC solutions. © 1963-2012 IEEE.

  17. A New ATLAS Muon CSC Readout System with System on Chip Technology on ATCA Platform

    CERN Document Server

    AUTHOR|(SzGeCERN)696050; Garelli, N.; Herbst, R.T.; Huffer, M.; Iakovidis, G.; Iordanidou, K.; Kwan, K.; Kocian, M.; Lankford, A.J.; Moschovakos, P.; Nelson, A.; Ntekas, K.; Ruckman, L.; Russell, J.; Schernau, M.; Schlenker, S.; Su, D.; Valderanis, C.; Wittgen, M.; Bartoldus, R.

    2016-01-01

    The ATLAS muon Cathode Strip Chamber (CSC) backend readout system has been upgraded during the LHC 2013-2015 shutdown to be able to handle the higher Level-1 trigger rate of 100 kHz and the higher occupancy at Run 2 luminosity. The readout design is based on the Reconfigurable Cluster Element (RCE) concept for high bandwidth generic DAQ implemented on the Advanced Telecommunication Computing Architecture (ATCA) platform. The RCE design is based on the new System on Chip XILINX ZYNQ series with a processor-centric architecture with ARM processor embedded in FPGA fabric and high speed I/O resources together with auxiliary memories to form a versatile DAQ building block that can host applications tapping into both software and firmware resources. The Cluster on Board (COB) ATCA carrier hosts RCE mezzanines and an embedded Fulcrum network switch to form an online DAQ processing cluster. More compact firmware solutions on the ZYNQ for G-link, S-link and TTC allowed the full system of 320 G-links from the 32 chambe...

  18. A new ATLAS muon CSC readout system with system on chip technology on ATCA platform

    Energy Technology Data Exchange (ETDEWEB)

    Claus, R., E-mail: claus@slac.stanford.edu

    2016-07-11

    The ATLAS muon Cathode Strip Chamber (CSC) back-end readout system has been upgraded during the LHC 2013–2015 shutdown to be able to handle the higher Level-1 trigger rate of 100 kHz and the higher occupancy at Run 2 luminosity. The readout design is based on the Reconfiguration Cluster Element (RCE) concept for high bandwidth generic DAQ implemented on the ATCA platform. The RCE design is based on the new System on Chip Xilinx Zynq series with a processor-centric architecture with ARM processor embedded in FPGA fabric and high speed I/O resources together with auxiliary memories to form a versatile DAQ building block that can host applications tapping into both software and firmware resources. The Cluster on Board (COB) ATCA carrier hosts RCE mezzanines and an embedded Fulcrum network switch to form an online DAQ processing cluster. More compact firmware solutions on the Zynq for G-link, S-link and TTC allowed the full system of 320 G-links from the 32 chambers to be processed by 6 COBs in one ATCA shelf through software waveform feature extraction to output 32 S-links. The full system was installed in Sept. 2014. We will present the RCE/COB design concept, the firmware and software processing architecture, and the experience from the intense commissioning towards LHC Run 2.

  19. A New ATLAS Muon CSC Readout System with System on Chip Technology on ATCA Platform

    CERN Document Server

    ATLAS CSC Collaboration; The ATLAS collaboration

    2016-01-01

    The ATLAS muon Cathode Strip Chamber (CSC) backend readout system has been upgrade during the LHC 2013-2015 shutdown to be able to handle the higher Level-1 trigger rate of 100 kHz and the higher occupancy at Run 2 luminosity. The readout design is based on the Reconfigurable Cluster Element (RCE) concept for high bandwidth generic DAQ implemented on the Advanced Telecommunication Computing Architecture (ATCA) platform. The RCE design is based on the new System on Chip XILINX ZYNQ series with a processor-centric architecture with ARM processor embedded in FPGA fabric and high speed I/O resources together with auxiliary memories to form a versatile DAQ building block that can host applications tapping into both software and firmware resources. The Cluster on Board (COB) ATCA carrier hosts RCE mezzanines and an embedded Fulcrum network switch to form an online DAQ processing cluster. More compact firmware solutions on the ZYNQ for G-link, S-link and TTC allowed the full system of 320 G-links from the 32 chamber...

  20. A New ATLAS Muon CSC Readout System with System on Chip Technology on ATCA Platform

    CERN Document Server

    AUTHOR|(SzGeCERN)664042

    2016-01-01

    The ATLAS muon Cathode Strip Chamber (CSC) back-end readout system has been upgraded during the LHC 2013-2015 shutdown to be able to handle the higher Level-1 trigger rate of 100 kHz and the higher occupancy at Run 2 luminosity. The readout design is based on the Reconfiguration Cluster Element (RCE) concept for high bandwidth generic DAQ implemented on the ATCA platform. The RCE design is based on the new System on Chip Xilinx Zynq series with a processor-centric architecture with ARM processor embedded in FPGA fabric and high speed I/O resources together with auxiliary memories to form a versatile DAQ building block that can host applications tapping into both software and firmware resources. The Cluster on Board (COB) ATCA carrier hosts RCE mezzanines and an embedded Fulcrum network switch to form an online DAQ processing cluster. More compact firmware solutions on the Zynq for G-link, S-link and TTC allowed the full system of 320 G-links from the 32 chambers to be processed by 6 COBs in one ATCA shelf thr...

  1. A New ATLAS Muon CSC Readout System with System on Chip Technology on ATCA Platform

    CERN Document Server

    Claus, Richard; The ATLAS collaboration

    2015-01-01

    The ATLAS muon Cathode Strip Chamber (CSC) backend readout system has been upgraded during the LHC 2013-2015 shutdown to be able to handle the higher Level-1 trigger rate of 100 kHz and the higher occupancy at Run 2 luminosity. The readout design is based on the Reconfiguration Cluster Element (RCE) concept for high bandwidth generic DAQ implemented on the ATCA platform. The RCE design is based on the new System on Chip XILINX ZYNQ series with a processor-centric architecture with ARM processor embedded in FPGA fabric and high speed I/O resources together with auxiliary memories to form a versatile DAQ building block that can host applications tapping into both software and firmware resources. The Cluster on Board (COB) ATCA carrier hosts RCE mezzanines and an embedded Fulcrum network switch to form an online DAQ processing cluster. More compact firmware solutions on the ZYNQ for G-link, S-link and TTC allowed the full system of 320 G-links from the 32 chambers to be processed by 6 COBs in one ATCA shelf thro...

  2. On-chip magnetic bead-based DNA melting curve analysis using a magnetoresistive sensor

    International Nuclear Information System (INIS)

    Rizzi, Giovanni; Østerberg, Frederik W.; Henriksen, Anders D.; Dufva, Martin; Hansen, Mikkel F.

    2015-01-01

    We present real-time measurements of DNA melting curves in a chip-based system that detects the amount of surface-bound magnetic beads using magnetoresistive magnetic field sensors. The sensors detect the difference between the amount of beads bound to the top and bottom sensor branches of the differential sensor geometry. The sensor surfaces are functionalized with wild type (WT) and mutant type (MT) capture probes, differing by a single base insertion (a single nucleotide polymorphism, SNP). Complementary biotinylated targets in suspension couple streptavidin magnetic beads to the sensor surface. The beads are magnetized by the field arising from the bias current passed through the sensors. We demonstrate the first on-chip measurements of the melting of DNA hybrids upon a ramping of the temperature. This overcomes the limitation of using a single washing condition at constant temperature. Moreover, we demonstrate that a single sensor bridge can be used to genotype a SNP. - Highlights: • We apply magnetoresistive sensors to study solid-surface hybridization kinetics of DNA. • We measure DNA melting profiles for perfectly matching DNA duplexes and for a single base mismatch. • We present a procedure to correct for temperature dependencies of the sensor output. • We reliably extract melting temperatures for the DNA hybrids. • We demonstrate direct measurement of differential binding signal for two probes on a single sensor

  3. A new equivalent circuit model for on-chip spiral transformers in CMOS RFICs

    International Nuclear Information System (INIS)

    Wei Jiaju; Wang Zhigong; Li Zhiqun; Tang Lu

    2012-01-01

    A new compact model has been introduced to model on-chip spiral transformers. Unlike conventional models, which are often a compound of two spiral inductor models (i.e., the combination of two coupled Π or 2-Π sub-circuits), our new model only uses 12 elements to model the whole structure in the form of T topology. The new model is based on the physical meaning, and the process of model derivation is also presented. In addition, a simple parameter extraction procedure is proposed to get the elements' values without any fitting and optimization. In this procedure, a new method has been developed for the parameter extraction of the ladder circuit, which is commonly used to represent the skin effect. In order to verify the model's validity and accuracy, we have compared the simulated and measured self-inductance, quality factor, coupling coefficient and insertion loss, and an excellent agreement has been found over a broad frequency range up to the resonant frequency. (semiconductor integrated circuits)

  4. Programmable System-on-Chip (PSoC) Embedded Readout Designs for Liquid Helium Level Sensors.

    Science.gov (United States)

    Parasakthi, C; Gireesan, K; Usha Rani, R; Sheela, O K; Janawadkar, M P

    2014-08-01

    This article reports the development of programmable system-on-chip (PSoC)-based embedded readout designs for liquid helium level sensors using resistive liquid vapor discriminators. The system has been built for the measurement of liquid helium level in a concave-bottomed, helmet-shaped, fiber-reinforced plastic cryostat for magnetoencephalography. This design incorporates three carbon resistors as cost-effective sensors, which are mounted at desired heights inside the cryostat and were used to infer the liquid helium level by measuring their temperature-dependent resistance. Localized electrical heating of the carbon resistors was used to discriminate whether the resistor is immersed in liquid helium or its vapor by exploiting the difference in the heat transfer rates in the two environments. This report describes a single PSoC chip for the design and development of a constant current source to drive the three carbon resistors, a multiplexer to route the sensor outputs to the analog-to-digital converter (ADC), a buffer to avoid loading of the sensors, an ADC for digitizing the data, and a display using liquid crystal display cum light-emitting diode modules. The level sensor readout designed with a single PSoC chip enables cost-effective and reliable measurement system design. © 2014 Society for Laboratory Automation and Screening.

  5. Performance analysis of general purpose and digital signal processor kernels for heterogeneous systems-on-chip

    Directory of Open Access Journals (Sweden)

    T. von Sydow

    2003-01-01

    Full Text Available Various reasons like technology progress, flexibility demands, shortened product cycle time and shortened time to market have brought up the possibility and necessity to integrate different architecture blocks on one heterogeneous System-on-Chip (SoC. Architecture blocks like programmable processor cores (DSP- and GPP-kernels, embedded FPGAs as well as dedicated macros will be integral parts of such a SoC. Especially programmable architecture blocks and associated optimization techniques are discussed in this contribution. Design space exploration and thus the choice which architecture blocks should be integrated in a SoC is a challenging task. Crucial to this exploration is the evaluation of the application domain characteristics and the costs caused by individual architecture blocks integrated on a SoC. An ATE-cost function has been applied to examine the performance of the aforementioned programmable architecture blocks. Therefore, representative discrete devices have been analyzed. Furthermore, several architecture dependent optimization steps and their effects on the cost ratios are presented.

  6. Atmel's New Rad-Hard Sparc V8 Processor 200Mhz & Low Power System on Chip

    Science.gov (United States)

    Ganry, Nicolas; Mantelet, Guy; Parkes, Steve; McClements, Chris

    2014-08-01

    The AT6981 is a new generation of processor designed for critical spaceflight applications, which combines a high-performance SPARC® V8 radiation hard processor, with enough on-chip memory for many aerospace applications and state-of-the-art SpaceWire networking technology from STAR- Dundee. The AT6981 is implemented in Atmel 90nm rad-hard technology, enabling 200 MHz operating speed for the processor with power consumption levels around 1W. This advanced technology allows strong system integration in a SoC with embedded peripherals like CAN, 1553, Ethernet, DDR and embedded memory with 1Mbytes SRAM. The device is ITAR- free and is developed in France by Atmel Aerospace having more than of 30years space experience. This paper describes this new SoC architecture and technical options considered to insure the best performances, the minimum power consumption and high reliability. This device will be available on the market in H2 2014 for evaluation with first flight models targeted end 2015.

  7. On-chip measurements of Brownian relaxation vs. concentration of 40nm magnetic beads

    DEFF Research Database (Denmark)

    Østerberg, Frederik Westergaard; Rizzi, Giovanni; Hansen, Mikkel Fougt

    2012-01-01

    We present on-chip Brownian relaxation measurements on a logarithmic dilution series of 40 nm beads dispersed in water with bead concentrations between 16 mu g/ml and 4000 mu g/ml. The measurements are performed using a planar Hall effect bridge sensor at frequencies up to 1 MHz. No external fields...... are needed as the beads are magnetized by the field generated by the applied sensor bias current. We show that the Brownian relaxation frequency can be extracted from fitting the Cole-Cole model to measurements for bead concentrations of 64 mu g/ml or higher and that the measured dynamic magnetic response...... is proportional to the bead concentration. For bead concentrations higher than or equal to 500 mu g/ml, we extract a hydrodynamic diameter of 47(1) nm for the beads, which is close to the nominal bead size of 40 nm. Furthermore, we study the signal vs. bead concentration at a fixed frequency close to the Brownian...

  8. Lithographically patterned thin activated carbon films as a new technology platform for on-chip devices.

    Science.gov (United States)

    Wei, Lu; Nitta, Naoki; Yushin, Gleb

    2013-08-27

    Continuous, smooth, visibly defect-free, lithographically patterned activated carbon films (ACFs) are prepared on the surface of silicon wafers. Depending on the synthesis conditions, porous ACFs can either remain attached to the initial substrate or be separated and transferred to another dense or porous substrate of interest. Tuning the activation conditions allows one to change the surface area and porosity of the produced carbon films. Here we utilize the developed thin ACF technology to produce prototypes of functional electrical double-layer capacitor devices. The synthesized thin carbon film electrodes demonstrated very high capacitance in excess of 510 F g(-1) (>390 F cm(-3)) at a slow cyclic voltammetry scan rate of 1 mV s(-1) and in excess of 325 F g(-1) (>250 F cm(-3)) in charge-discharge tests at an ultrahigh current density of 45,000 mA g(-1). Good stability was demonstrated after 10,000 galvanostatic charge-discharge cycles. The high values of the specific and volumetric capacitances of the selected ACF electrodes as well as the capacity retention at high current densities demonstrated great potential of the proposed technology for the fabrication of various on-chip devices, such as micro-electrochemical capacitors.

  9. Titer on chip: new analytical tool for influenza vaccine potency determination.

    Directory of Open Access Journals (Sweden)

    Laura R Kuck

    Full Text Available Titer on Chip (Flu-ToC is a new technique for quantification of influenza hemagglutinin (HA concentration. In order to evaluate the potential of this new technique, a comparison of Flu-ToC to more conventional methods was conducted using recombinant HA produced in a baculovirus expression system as a test case. Samples from current vaccine strains were collected from four different steps in the manufacturing process. A total of 19 samples were analysed by Flu-ToC (blinded, single radial immunodiffusion (SRID, an enzyme-linked immunosorbent assay (ELISA, and the purity adjusted bicinchoninic acid assay (paBCA. The results indicated reasonable linear correlation between Flu-ToC and SRID, ELISA, and paBCA, with regression slopes of log-log plots being 0.91, 1.03, and 0.91, respectively. The average ratio for HA content measured by Flu-ToC relative to SRID, ELISA, and paBCA was 83%, 147%, and 81%, respectively; indicating nearly equivalent potency determination for Flu-ToC relative to SRID and paBCA. These results, combined with demonstrated multiplexed analysis of all components within a quadrivalent formulation and robust response to HA strains over a wide time period, support the conclusion that Flu-ToC can be used as a reliable and time-saving alternative potency assay for influenza vaccines.

  10. On-Chip Production of Size-Controllable Liquid Metal Microdroplets Using Acoustic Waves.

    Science.gov (United States)

    Tang, Shi-Yang; Ayan, Bugra; Nama, Nitesh; Bian, Yusheng; Lata, James P; Guo, Xiasheng; Huang, Tony Jun

    2016-07-01

    Micro- to nanosized droplets of liquid metals, such as eutectic gallium indium (EGaIn) and Galinstan, have been used for developing a variety of applications in flexible electronics, sensors, catalysts, and drug delivery systems. Currently used methods for producing micro- to nanosized droplets of such liquid metals possess one or several drawbacks, including the lack in ability to control the size of the produced droplets, mass produce droplets, produce smaller droplet sizes, and miniaturize the system. Here, a novel method is introduced using acoustic wave-induced forces for on-chip production of EGaIn liquid-metal microdroplets with controllable size. The size distribution of liquid metal microdroplets is tuned by controlling the interfacial tension of the metal using either electrochemistry or electrocapillarity in the acoustic field. The developed platform is then used for heavy metal ion detection utilizing the produced liquid metal microdroplets as the working electrode. It is also demonstrated that a significant enhancement of the sensing performance is achieved by introducing acoustic streaming during the electrochemical experiments. The demonstrated technique can be used for developing liquid-metal-based systems for a wide range of applications. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  11. Polypyrrole Porous Micro Humidity Sensor Integrated with a Ring Oscillator Circuit on Chip

    Science.gov (United States)

    Yang, Ming-Zhi; Dai, Ching-Liang; Lu, De-Hao

    2010-01-01

    This study presents the design and fabrication of a capacitive micro humidity sensor integrated with a five-stage ring oscillator circuit on chip using the complimentary metal oxide semiconductor (CMOS) process. The area of the humidity sensor chip is about 1 mm2. The humidity sensor consists of a sensing capacitor and a sensing film. The sensing capacitor is constructed from spiral interdigital electrodes that can enhance the sensitivity of the sensor. The sensing film of the sensor is polypyrrole, which is prepared by the chemical polymerization method, and the film has a porous structure. The sensor needs a post-CMOS process to coat the sensing film. The post-CMOS process uses a wet etching to etch the sacrificial layers, and then the polypyrrole is coated on the sensing capacitor. The sensor generates a change in capacitance when the sensing film absorbs or desorbs vapor. The ring oscillator circuit converts the capacitance variation of the sensor into the oscillation frequency output. Experimental results show that the sensitivity of the humidity sensor is about 99 kHz/%RH at 25 °C. PMID:22163459

  12. A Framework for Scalable TSV Assignment and Selection in Three-Dimensional Networks-on-Chips

    Directory of Open Access Journals (Sweden)

    Amir Charif

    2017-01-01

    Full Text Available 3D integration can greatly benefit future many-cores by enabling low-latency three-dimensional Network-on-Chip (3D-NoC topologies. However, due to high cost, low yield, and frequent failures of Through-Silicon Via (TSV, 3D-NoCs are most likely to include only a few vertical connections, resulting in incomplete topologies that pose new challenges in terms of deadlock-free routing and TSV assignment. The routers of such networks require a way to locate the nodes that have vertical connections, commonly known as elevators, and select one of them in order to be able to reach other layers when necessary. In this paper, several alternative TSV selection strategies requiring a constant amount of configurable bits per router are introduced. Each proposed solution consists of a configuration algorithm, which provides each router with the necessary information to locate the elevators, and a routing algorithm, which uses this information at runtime to route packets to an elevator. Our algorithms are compared by simulation to highlight the advantages and disadvantages of each solution under various scenarios, and hardware synthesis results demonstrate the scalability of the proposed approach and its suitability for cost-oriented designs.

  13. Fully parallel write/read in resistive synaptic array for accelerating on-chip learning

    Science.gov (United States)

    Gao, Ligang; Wang, I.-Ting; Chen, Pai-Yu; Vrudhula, Sarma; Seo, Jae-sun; Cao, Yu; Hou, Tuo-Hung; Yu, Shimeng

    2015-11-01

    A neuro-inspired computing paradigm beyond the von Neumann architecture is emerging and it generally takes advantage of massive parallelism and is aimed at complex tasks that involve intelligence and learning. The cross-point array architecture with synaptic devices has been proposed for on-chip implementation of the weighted sum and weight update in the learning algorithms. In this work, forming-free, silicon-process-compatible Ta/TaO x /TiO2/Ti synaptic devices are fabricated, in which >200 levels of conductance states could be continuously tuned by identical programming pulses. In order to demonstrate the advantages of parallelism of the cross-point array architecture, a novel fully parallel write scheme is designed and experimentally demonstrated in a small-scale crossbar array to accelerate the weight update in the training process, at a speed that is independent of the array size. Compared to the conventional row-by-row write scheme, it achieves >30× speed-up and >30× improvement in energy efficiency as projected in a large-scale array. If realistic synaptic device characteristics such as device variations are taken into an array-level simulation, the proposed array architecture is able to achieve ∼95% recognition accuracy of MNIST handwritten digits, which is close to the accuracy achieved by software using the ideal sparse coding algorithm.

  14. On-chip skin color detection using a triple-well CMOS process

    Science.gov (United States)

    Boussaid, Farid; Chai, Douglas; Bouzerdoum, Abdesselam

    2004-03-01

    In this paper, a current-mode VLSI architecture enabling on read-out skin detection without the need for any on-chip memory elements is proposed. An important feature of the proposed architecture is that it removes the need for demosaicing. Color separation is achieved using the strong wavelength dependence of the absorption coefficient in silicon. This wavelength dependence causes a very shallow absorption of blue light and enables red light to penetrate deeply in silicon. A triple-well process, allowing a P-well to be placed inside an N-well, is chosen to fabricate three vertically integrated photodiodes acting as the RGB color detector for each pixel. Pixels of an input RGB image are classified as skin or non-skin pixels using a statistical skin color model, chosen to offer an acceptable trade-off between skin detection performance and implementation complexity. A single processing unit is used to classify all pixels of the input RGB image. This results in reduced mismatch and also in an increased pixel fill-factor. Furthermore, the proposed current-mode architecture is programmable, allowing external control of all classifier parameters to compensate for mismatch and changing lighting conditions.

  15. Towards on-chip integration of brain imaging photodetectors using standard CMOS process.

    Science.gov (United States)

    Kamrani, Ehsan; Lesage, Frederic; Sawan, Mohamad

    2013-01-01

    The main effects of on-chip integration on the performance and efficiency of silicon avalanche photodiode (SiAPD) and photodetector front-end is addressed in this paper based on the simulation and fabrication experiments. Two different silicon APDs are fabricated separately and also integrated with a transimpedance amplifier (TIA) front-end using standard CMOS technology. SiAPDs are designed in p+/n-well structure with guard rings realized in different shapes. The TIA front-end has been designed using distributed-gain concept combined with resistive-feedback and common-gate topology to reach low-noise and high gain-bandwidth product (GBW) characteristics. The integrated SiAPDs show higher signal-to-noise ratio (SNR), sensitivity and detection efficiency comparing to the separate SiAPDs. The integration does not show a significant effect on the gain and preserves the low power consumption. Using APDs with p-well guard-ring is preferred due to the higher observed efficiency after integration.

  16. Performance of an on-chip superconducting circulator for quantum microwave systems

    Science.gov (United States)

    Chapman, Benjamin; Rosenthal, Eric; Moores, Bradley; Kerckhoff, Joseph; Mates, J. A. B.; Hilton, G. C.; Vale, L. R.; Ullom, J. N.; LalumíEre, Kevin; Blais, Alexandre; Lehnert, K. W.

    Microwave circulators enforce a single propagation direction for signals in an electrical network. Unfortunately, commercial circulators are bulky, lossy, and cannot be integrated close to superconducting circuits because they require strong ( kOe) magnetic fields produced by permanent magnets. Here we report on the performance of an on-chip, active circulator for superconducting microwave circuits, which uses no permanent magnets. Non-reciprocity is achieved by actively modulating reactive elements around 100 MHz, giving roughly a factor of 50 in the separation between signal and control frequencies, which facilitates filtering. The circulator's active components are dynamically tunable inductors constructed with arrays of dc-SQUIDs in series. Array inductance is tuned by varying the magnetic flux through the SQUIDs with fields weaker than 1 Oe. Although the instantaneous bandwidth of the device is narrow, the operation frequency is tunable between 4 and 8 GHz. This presentation will describe the device's theory of operation and compare its measured performance to design goals. This work is supported by the ARO under contract W911NF-14-1-0079 and the National Science Foundation under Grant Number 1125844.

  17. A UHF RFID system with on-chip-antenna tag for short range communication

    International Nuclear Information System (INIS)

    Peng Qi; Zhang Chun; Zhao Xijin; Wang Zhihua

    2015-01-01

    A UHF RF identification system based on the 0.18 μm CMOS process has been developed for short range and harsh size requirement applications, which is composed of a fully integrated tag and a special reader. The whole tag chip with the antenna takes up an area of 0.36 mm 2 , which is smaller than other reported tags with an on-chip antenna (OCA) using the standard CMOS process. A self-defined protocol is proposed to reduce the power consumption, and minimize the size of the tag. The specialized SOC reader system consists of the RF transceiver, digital baseband, MCU and host interface. Its power consumption is about 500 mW. Measurement results show that the system's reading range is 2 mm with 20 dBm reader output power. With an inductive antenna printed on a paper substrate around the OCA tag, the reading range can be extended from several centimeters to meters, depending on the shape and size of the inductive antenna. (paper)

  18. Computational sensing of herpes simplex virus using a cost-effective on-chip microscope

    KAUST Repository

    Ray, Aniruddha

    2017-07-03

    Caused by the herpes simplex virus (HSV), herpes is a viral infection that is one of the most widespread diseases worldwide. Here we present a computational sensing technique for specific detection of HSV using both viral immuno-specificity and the physical size range of the viruses. This label-free approach involves a compact and cost-effective holographic on-chip microscope and a surface-functionalized glass substrate prepared to specifically capture the target viruses. To enhance the optical signatures of individual viruses and increase their signal-to-noise ratio, self-assembled polyethylene glycol based nanolenses are rapidly formed around each virus particle captured on the substrate using a portable interface. Holographic shadows of specifically captured viruses that are surrounded by these self-assembled nanolenses are then reconstructed, and the phase image is used for automated quantification of the size of each particle within our large field-of-view, ~30 mm2. The combination of viral immuno-specificity due to surface functionalization and the physical size measurements enabled by holographic imaging is used to sensitively detect and enumerate HSV particles using our compact and cost-effective platform. This computational sensing technique can find numerous uses in global health related applications in resource-limited environments.

  19. Magnetic actuator for the control and mixing of magnetic bead-based reactions on-chip.

    Science.gov (United States)

    Berenguel-Alonso, Miguel; Granados, Xavier; Faraudo, Jordi; Alonso-Chamarro, Julián; Puyol, Mar

    2014-10-01

    While magnetic bead (MB)-based bioassays have been implemented in integrated devices, their handling on-chip is normally either not optimal--i.e. only trapping is achieved, with aggregation of the beads--or requires complex actuator systems. Herein, we describe a simple and low-cost magnetic actuator to trap and move MBs within a microfluidic chamber in order to enhance the mixing of a MB-based reaction. The magnetic actuator consists of a CD-shaped plastic unit with an arrangement of embedded magnets which, when rotating, generate the mixing. The magnetic actuator has been used to enhance the amplification reaction of an enzyme-linked fluorescence immunoassay to detect Escherichia coli O157:H7 whole cells, an enterohemorrhagic strain, which have caused several outbreaks in food and water samples. A 2.7-fold sensitivity enhancement was attained with a detection limit of 603 colony-forming units (CFU) /mL, when employing the magnetic actuator.

  20. New movable plate for efficient millimeter wave vertical on-chip antenna

    KAUST Repository

    Marnat, Loic

    2013-04-01

    A new movable plate concept is presented in this paper to realize mm-wave vertical on-chip antennas through MEMS based post-processing steps in a CMOS compatible process. By virtue of its vertical position, the antenna is isolated from the lossy Si substrate and hence performs with a better efficiency as compared to the horizontal position. In addition, the movable plate concept enables polarization diversity by providing both horizontal and vertical polarizations on the same chip. Through a first iteration fractal bowtie antenna design, dual band (60 and 77 GHz) operation is demonstrated in both horizontal and vertical positions without any change in dimensions or use of switches for two different mediums (Si and air). To support the movable plate concept, the transmission line and antenna are designed on a flexible polyamide, where the former has been optimized to operate in the bent position. The design is highly suitable for compact, low cost and efficient SoC solutions. © 1963-2012 IEEE.

  1. Improving lumen maintenance by nanopore array dispersed quantum dots for on-chip light emitting diodes

    Science.gov (United States)

    Chen, Quan; Yang, Fan; Wan, Renzhuo; Fang, Dong

    2017-12-01

    The temperature stability of quantum dots (QDs), which is crucial for integrating into high power light-emitting diodes (LEDs) in the on-chip configuration, needs to be further improved. In this letter, we report warm white LEDs, where CdSe/ZnS nanoparticles were incorporated into a porous anodic alumina (PAA) matrix with a chain structure by the self-assembly method. Experiments demonstrate that the QD concentration range in toluene solvent from 1% mg/μl to 1.2% mg/μl in combination with the PAA matrix shows the best luminous property. To verify the reliability of the as-prepared device, a comparison experiment was conducted. It indicates excellent lumen maintenance of the light source and less chromaticity coordinate shift under accelerated life testing conditions. Experiments also prove that optical depreciation was only up to 4.6% of its initial value after the 1500 h aging test at the junction temperature of 76 °C.

  2. An Impedance-Based Mold Sensor with on-Chip Optical Reference

    Directory of Open Access Journals (Sweden)

    Poornachandra Papireddy Vinayaka

    2016-09-01

    Full Text Available A new miniaturized sensor system with an internal optical reference for the detection of mold growth is presented. The sensor chip comprises a reaction chamber provided with a culture medium that promotes the growth of mold species from mold spores. The mold detection is performed by measuring impedance changes with integrated electrodes fabricated inside the reaction chamber. The impedance change in the culture medium is caused by shifts in the pH (i.e., from 5.5 to 8 as the mold grows. In order to determine the absolute pH value without the need for calibration, a methyl red indicator dye has been added to the culture medium. It changes the color of the medium as the pH passes specific values. This colorimetric principle now acts as a reference measurement. It also allows the sensitivity of the impedance sensor to be established in terms of impedance change per pH unit. Major mold species that are involved in the contamination of food, paper and indoor environments, like Fusarium oxysporum, Fusarium incarnatum, Eurotium amstelodami, Aspergillus penicillioides and Aspergillus restrictus, have been successfully analyzed on-chip.

  3. Polypyrrole Porous Micro Humidity Sensor Integrated with a Ring Oscillator Circuit on Chip

    Directory of Open Access Journals (Sweden)

    De-Hao Lu

    2010-11-01

    Full Text Available This study presents the design and fabrication of a capacitive micro humidity sensor integrated with a five-stage ring oscillator circuit on chip using the complimentary metal oxide semiconductor (CMOS process. The area of the humidity sensor chip is about 1 mm2. The humidity sensor consists of a sensing capacitor and a sensing film. The sensing capacitor is constructed from spiral interdigital electrodes that can enhance the sensitivity of the sensor. The sensing film of the sensor is polypyrrole, which is prepared by the chemical polymerization method, and the film has a porous structure. The sensor needs a post-CMOS process to coat the sensing film. The post-CMOS process uses a wet etching to etch the sacrificial layers, and then the polypyrrole is coated on the sensing capacitor. The sensor generates a change in capacitance when the sensing film absorbs or desorbs vapor. The ring oscillator circuit converts the capacitance variation of the sensor into the oscillation frequency output. Experimental results show that the sensitivity of the humidity sensor is about 99 kHz/%RH at 25 °C.

  4. On-Chip Neural Data Compression Based On Compressed Sensing With Sparse Sensing Matrices.

    Science.gov (United States)

    Zhao, Wenfeng; Sun, Biao; Wu, Tong; Yang, Zhi

    2018-02-01

    On-chip neural data compression is an enabling technique for wireless neural interfaces that suffer from insufficient bandwidth and power budgets to transmit the raw data. The data compression algorithm and its implementation should be power and area efficient and functionally reliable over different datasets. Compressed sensing is an emerging technique that has been applied to compress various neurophysiological data. However, the state-of-the-art compressed sensing (CS) encoders leverage random but dense binary measurement matrices, which incur substantial implementation costs on both power and area that could offset the benefits from the reduced wireless data rate. In this paper, we propose two CS encoder designs based on sparse measurement matrices that could lead to efficient hardware implementation. Specifically, two different approaches for the construction of sparse measurement matrices, i.e., the deterministic quasi-cyclic array code (QCAC) matrix and -sparse random binary matrix [-SRBM] are exploited. We demonstrate that the proposed CS encoders lead to comparable recovery performance. And efficient VLSI architecture designs are proposed for QCAC-CS and -SRBM encoders with reduced area and total power consumption.

  5. On-Chip Sorting of Long Semiconducting Carbon Nanotubes for Multiple Transistors along an Identical Array.

    Science.gov (United States)

    Otsuka, Keigo; Inoue, Taiki; Maeda, Etsuo; Kometani, Reo; Chiashi, Shohei; Maruyama, Shigeo

    2017-11-28

    Ballistic transport and sub-10 nm channel lengths have been achieved in transistors containing one single-walled carbon nanotube (SWNT). To fill the gap between single-tube transistors and high-performance logic circuits for the replacement of silicon, large-area, high-density, and purely semiconducting (s-) SWNT arrays are highly desired. Here we demonstrate the fabrication of multiple transistors along a purely semiconducting SWNT array via an on-chip purification method. Water- and polymer-assisted burning from site-controlled nanogaps is developed for the reliable full-length removal of metallic SWNTs with the damage to s-SWNTs minimized even in high-density arrays. All the transistors with various channel lengths show large on-state current and excellent switching behavior in the off-state. Since our method potentially provides pure s-SWNT arrays over a large area with negligible damage, numerous transistors with arbitrary dimensions could be fabricated using a conventional semiconductor process, leading to SWNT-based logic, high-speed communication, and other next-generation electronic devices.

  6. On-chip bio-analyte detection utilizing the velocity of magnetic microparticles in a fluid

    KAUST Repository

    Giouroudi, Ioanna

    2011-03-22

    A biosensing principle utilizing the motion of suspended magnetic microparticles in a microfluidic system is presented. The system utilizes the innovative concept of the velocity dependence of magnetic microparticles (MPs) due to their volumetric change when analyte is attached to their surface via antibody–antigen binding. When the magnetic microparticles are attracted by a magnetic field within a microfluidic channel their velocity depends on the presence of analyte. Specifically, their velocity decreases drastically when the magnetic microparticles are covered by (nonmagnetic) analyte (LMPs) due to the increased drag force in the opposite direction to that of the magnetic force. Experiments were carried out as a proof of concept. A promising 52% decrease in the velocity of the LMPs in comparison to that of the MPs was measured when both of them were accelerated inside a microfluidic channel using an external permanent magnet. The presented biosensing methodology offers a compact and integrated solution for a new kind of on-chip analysis with potentially high sensitivity and shorter acquisition time than conventional laboratory based systems.

  7. Ultracompact on-chip photothermal power monitor based on silicon hybrid plasmonic waveguides

    Directory of Open Access Journals (Sweden)

    Wu Hao

    2017-01-01

    Full Text Available We propose and demonstrate an ultracompact on-chip photothermal power monitor based on a silicon hybrid plasmonic waveguide (HPWG, which consists of a metal strip, a silicon core, and a silicon oxide (SiO2 insulator layer between them. When light injected to an HPWG is absorbed by the metal strip, the temperature increases and the resistance of the metal strip changes accordingly due to the photothermal and thermal resistance effects of the metal. Therefore, the optical power variation can be monitored by measuring the resistance of the metal strip on the HPWG. To obtain the electrical signal for the resistance measurement conveniently, a Wheatstone bridge circuit is monolithically integrated with the HPWG on the same chip. As the HPWG has nanoscale light confinement, the present power monitor is as short as ~3 μm, which is the smallest photothermal power monitor reported until now. The compactness helps to improve the thermal efficiency and the response speed. For the present power monitor fabricated with simple fabrication processes, the measured responsivity is as high as about 17.7 mV/mW at a bias voltage of 2 V and the power dynamic range is as large as 35 dB.

  8. An On-Chip RBC Deformability Checker Significantly Improves Velocity-Deformation Correlation

    Directory of Open Access Journals (Sweden)

    Chia-Hung Dylan Tsai

    2016-10-01

    Full Text Available An on-chip deformability checker is proposed to improve the velocity–deformation correlation for red blood cell (RBC evaluation. RBC deformability has been found related to human diseases, and can be evaluated based on RBC velocity through a microfluidic constriction as in conventional approaches. The correlation between transit velocity and amount of deformation provides statistical information of RBC deformability. However, such correlations are usually only moderate, or even weak, in practical evaluations due to limited range of RBC deformation. To solve this issue, we implemented three constrictions of different width in the proposed checker, so that three different deformation regions can be applied to RBCs. By considering cell responses from the three regions as a whole, we practically extend the range of cell deformation in the evaluation, and could resolve the issue about the limited range of RBC deformation. RBCs from five volunteer subjects were tested using the proposed checker. The results show that the correlation between cell deformation and transit velocity is significantly improved by the proposed deformability checker. The absolute values of the correlation coefficients are increased from an average of 0.54 to 0.92. The effects of cell size, shape and orientation to the evaluation are discussed according to the experimental results. The proposed checker is expected to be useful for RBC evaluation in medical practices.

  9. On-chip mitochondrial assay microfluidic devices and protein nanopore/nanotube hybrid transistor

    Science.gov (United States)

    Lim, Taesun

    Tremendous efforts to understand the cause, mechanism of development and the way to treat various diseases as well as an early diagnosis have been made so far and people are still working hardly on these researches. Even now, countless people are suffering from diseases such as Alzhemer's disease, Parkinson's disease, diabetes and cancer without knowing clues to cure their diseases completely. Generally speaking, we still have a long way to go through to comprehensively figure out these our long-lasting homeworks. One of possible solutions is to merge current advanced technology and science together to find a powerful synergetic effect for a specific purpose that can be tailored depending on user's need. Here this research tried to put nanotechnology and biological science together to find a way to resolve current challenges by developing a new generation of the analytical sensing device. Mitochondrial functions and biological roles in regulating life and death control will be discussed indicating mitochondrion is a crucial organism to monitor to obtain important information regarding degenerative diseases and aging process. On-chip mitochondrial functional assay microsensor that could facilitate the mitochondrial evaluation will be extensively demonstrated and discussed in both technical and biological perspectives. The novel fusion technological approach will be demonstrated by combining artificial cell membrane with carbon nanotube electronics to interrogate interactions between biomolecules and electronic circuitries. In addition, molecular dynamics at the cell membrane could be investigated closely which can help understand the cell-cell communication and the regulation of ion transport.

  10. Fishing on chips: up-and-coming technological advances in analysis of zebrafish and Xenopus embryos.

    Science.gov (United States)

    Zhu, Feng; Skommer, Joanna; Huang, Yushi; Akagi, Jin; Adams, Dany; Levin, Michael; Hall, Chris J; Crosier, Philip S; Wlodkowic, Donald

    2014-11-01

    Biotests performed on small vertebrate model organisms provide significant investigative advantages as compared with bioassays that employ cell lines, isolated primary cells, or tissue samples. The main advantage offered by whole-organism approaches is that the effects under study occur in the context of intact physiological milieu, with all its intercellular and multisystem interactions. The gap between the high-throughput cell-based in vitro assays and low-throughput, disproportionally expensive and ethically controversial mammal in vivo tests can be closed by small model organisms such as zebrafish or Xenopus. The optical transparency of their tissues, the ease of genetic manipulation and straightforward husbandry, explain the growing popularity of these model organisms. Nevertheless, despite the potential for miniaturization, automation and subsequent increase in throughput of experimental setups, the manipulation, dispensing and analysis of living fish and frog embryos remain labor-intensive. Recently, a new generation of miniaturized chip-based devices have been developed for zebrafish and Xenopus embryo on-chip culture and experimentation. In this work, we review the critical developments in the field of Lab-on-a-Chip devices designed to alleviate the limits of traditional platforms for studies on zebrafish and clawed frog embryo and larvae. © 2014 International Society for Advancement of Cytometry. © 2014 International Society for Advancement of Cytometry.

  11. Design and Characterization of CMOS On-Chip Antennas for 60 GHz Communications

    Directory of Open Access Journals (Sweden)

    D.Titz

    2012-04-01

    Full Text Available In this paper, we present the design and the measurement of two antennas realized on a 130nm CMOS process. They both radiate in the 60 GHz band and are dedicated to Wireless Personal Area Network (WPAN applications. The antennas are manufactured within the frame of a multi-wafer project with several surrounding microelectronic circuits. The first antenna is an Inverted-F antenna (IFA. It has a maximum gain of -8 dBi and a -10 dB matching bandwidth of 20%. The second radiator is a meandered dipole. It has a maximum gain of -14 dBi and a -10 dB matching bandwidth of 10%. The challenging measurement of their reflection coefficient and their gain radiation pattern are presented. Simulated versus measured curves are analyzed. We especially demonstrate the necessity to take into account the closest microelectronic circuits of the antennas for accurate modeling of the radiating performance of 60 GHz on-chip dies.

  12. Ultrahigh-speed Si-integrated on-chip laser with tailored dynamic characteristics

    DEFF Research Database (Denmark)

    Park, Gyeong Cheol; Xue, Weiqi; Piels, Molly

    2016-01-01

    -pumped compact optical feedback structure can be realised, which together tailor the frequency response function for achieving a very high speed at low injection currents. Furthermore, light can be emitted laterally into a Si waveguide. From an 1.54-μm optically-pumped laser, a 3-dB frequency of 27 GHz...... was obtained at a pumping level corresponding to sub-mA. Using measured 3-dB frequen-cies and calculated equivalent currents, the modulation current efficiency factor (MCEF) is estimated to be 42.1 GHz/mA(1/2), which is superior among microcavity lasers. This shows a high potential for a very high speed at low......For on-chip interconnects, an ideal light source should have an ultralow energy consumption per bandwidth (operating en-ergy) as well as sufficient output power for error-free detection. Nanocavity lasers have been considered the most ideal for smaller operating energy. However, they have...

  13. Parametric dense stereovision implementation on a system-on chip (SoC).

    Science.gov (United States)

    Gardel, Alfredo; Montejo, Pablo; García, Jorge; Bravo, Ignacio; Lázaro, José L

    2012-01-01

    This paper proposes a novel hardware implementation of a dense recovery of stereovision 3D measurements. Traditionally 3D stereo systems have imposed the maximum number of stereo correspondences, introducing a large restriction on artificial vision algorithms. The proposed system-on-chip (SoC) provides great performance and efficiency, with a scalable architecture available for many different situations, addressing real time processing of stereo image flow. Using double buffering techniques properly combined with pipelined processing, the use of reconfigurable hardware achieves a parametrisable SoC which gives the designer the opportunity to decide its right dimension and features. The proposed architecture does not need any external memory because the processing is done as image flow arrives. Our SoC provides 3D data directly without the storage of whole stereo images. Our goal is to obtain high processing speed while maintaining the accuracy of 3D data using minimum resources. Configurable parameters may be controlled by later/parallel stages of the vision algorithm executed on an embedded processor. Considering hardware FPGA clock of 100 MHz, image flows up to 50 frames per second (fps) of dense stereo maps of more than 30,000 depth points could be obtained considering 2 Mpix images, with a minimum initial latency. The implementation of computer vision algorithms on reconfigurable hardware, explicitly low level processing, opens up the prospect of its use in autonomous systems, and they can act as a coprocessor to reconstruct 3D images with high density information in real time.

  14. Fully parallel write/read in resistive synaptic array for accelerating on-chip learning

    International Nuclear Information System (INIS)

    Gao, Ligang; Chen, Pai-Yu; Seo, Jae-sun; Cao, Yu; Yu, Shimeng; Wang, I-Ting; Hou, Tuo-Hung; Vrudhula, Sarma

    2015-01-01

    A neuro-inspired computing paradigm beyond the von Neumann architecture is emerging and it generally takes advantage of massive parallelism and is aimed at complex tasks that involve intelligence and learning. The cross-point array architecture with synaptic devices has been proposed for on-chip implementation of the weighted sum and weight update in the learning algorithms. In this work, forming-free, silicon-process-compatible Ta/TaO_x/TiO_2/Ti synaptic devices are fabricated, in which >200 levels of conductance states could be continuously tuned by identical programming pulses. In order to demonstrate the advantages of parallelism of the cross-point array architecture, a novel fully parallel write scheme is designed and experimentally demonstrated in a small-scale crossbar array to accelerate the weight update in the training process, at a speed that is independent of the array size. Compared to the conventional row-by-row write scheme, it achieves >30× speed-up and >30× improvement in energy efficiency as projected in a large-scale array. If realistic synaptic device characteristics such as device variations are taken into an array-level simulation, the proposed array architecture is able to achieve ∼95% recognition accuracy of MNIST handwritten digits, which is close to the accuracy achieved by software using the ideal sparse coding algorithm. (paper)

  15. The system power control unit based on the on-chip wireless communication system.

    Science.gov (United States)

    Li, Tiefeng; Ma, Caiwen; Li, WenHua

    2013-01-01

    Currently, the on-chip wireless communication system (OWCS) includes 2nd-generation (2G), 3rd-generation (3G), and long-term evolution (LTE) communication subsystems. To improve the power consumption of OWCS, a typical architecture design of system power control unit (SPCU) is given in this paper, which can not only make a 2G, a 3G, and an LTE subsystems enter sleep mode, but it can also wake them up from sleep mode via the interrupt. During the sleep mode period, either the real-time sleep timer or the global system for mobile (GSM) communication sleep timer can be used individually to arouse the corresponding subsystem. Compared to previous sole voltage supplies on the OWCS, a 2G, a 3G, or an LTE subsystem can be independently configured with three different voltages and frequencies in normal work mode. In the meantime, the voltage supply monitor, which is an important part in the SPCU, can significantly guard the voltage of OWCS in real time. Finally, the SPCU may implement dynamic voltage and frequency scaling (DVFS) for a 2G, a 3G, or an LTE subsystem, which is automatically accomplished by the hardware.

  16. The System Power Control Unit Based on the On-Chip Wireless Communication System

    Directory of Open Access Journals (Sweden)

    Tiefeng Li

    2013-01-01

    Full Text Available Currently, the on-chip wireless communication system (OWCS includes 2nd-generation (2G, 3rd-generation (3G, and long-term evolution (LTE communication subsystems. To improve the power consumption of OWCS, a typical architecture design of system power control unit (SPCU is given in this paper, which can not only make a 2G, a 3G, and an LTE subsystems enter sleep mode, but it can also wake them up from sleep mode via the interrupt. During the sleep mode period, either the real-time sleep timer or the global system for mobile (GSM communication sleep timer can be used individually to arouse the corresponding subsystem. Compared to previous sole voltage supplies on the OWCS, a 2G, a 3G, or an LTE subsystem can be independently configured with three different voltages and frequencies in normal work mode. In the meantime, the voltage supply monitor, which is an important part in the SPCU, can significantly guard the voltage of OWCS in real time. Finally, the SPCU may implement dynamic voltage and frequency scaling (DVFS for a 2G, a 3G, or an LTE subsystem, which is automatically accomplished by the hardware.

  17. Development and evaluation of a real-time fluorogenic loop-mediated isothermal amplification assay integrated on a microfluidic disc chip (on-chip LAMP) for rapid and simultaneous detection of ten pathogenic bacteria in aquatic animals.

    Science.gov (United States)

    Zhou, Qian-Jin; Wang, Lei; Chen, Jiong; Wang, Rui-Na; Shi, Yu-Hong; Li, Chang-Hong; Zhang, De-Min; Yan, Xiao-Jun; Zhang, Yan-Jun

    2014-09-01

    Rapid, low-cost, and user-friendly strategies are urgently needed for early disease diagnosis and timely treatment, particularly for on-site screening of pathogens in aquaculture. In this study, we successfully developed a real-time fluorogenic loop-mediated isothermal amplification assay integrated on a microfluidic disc chip (on-chip LAMP), which was capable of simultaneously detecting 10 pathogenic bacteria in aquatic animals, i.e., Nocardia seriolae, Pseudomonas putida, Streptococcus iniae, Vibrio alginolyticus, Vibrio anguillarum, Vibrio fluvialis, Vibrio harveyi, Vibrio parahaemolyticus, Vibrio rotiferianus, and Vibrio vulnificus. The assay provided a nearly-automated approach, with only a single pipetting step per chip for sample dispensing. This technique could achieve limits of detection (LOD) ranging from 0.40 to 6.42pg per 1.414μL reaction in less than 30 min. The robust reproducibility was demonstrated by a little variation among duplications for each bacterium with the coefficient of variation (CV) for time to positive (Tp) value less than 0.10. The clinical sensitivity and specificity of this on-chip LAMP assay in detecting field samples were 96.2% and 93.8% by comparison with conventional microbiological methods. Compared with other well-known techniques, on-chip LAMP assay provides low sample and reagent consumption, ease-of-use, accelerated analysis, multiple bacteria and on-site detection, and high reproducibility, indicating that such a technique would be applicable for on-site detection and routine monitoring of multiple pathogens in aquaculture. Copyright © 2014 Elsevier B.V. All rights reserved.

  18. Restaurant Food Cooling Practices†

    Science.gov (United States)

    BROWN, LAURA GREEN; RIPLEY, DANNY; BLADE, HENRY; REIMANN, DAVE; EVERSTINE, KAREN; NICHOLAS, DAVE; EGAN, JESSICA; KOKTAVY, NICOLE; QUILLIAM, DANIELA N.

    2017-01-01

    Improper food cooling practices are a significant cause of foodborne illness, yet little is known about restaurant food cooling practices. This study was conducted to examine food cooling practices in restaurants. Specifically, the study assesses the frequency with which restaurants meet U.S. Food and Drug Administration (FDA) recommendations aimed at reducing pathogen proliferation during food cooling. Members of the Centers for Disease Control and Prevention’s Environmental Health Specialists Network collected data on food cooling practices in 420 restaurants. The data collected indicate that many restaurants are not meeting FDA recommendations concerning cooling. Although most restaurant kitchen managers report that they have formal cooling processes (86%) and provide training to food workers on proper cooling (91%), many managers said that they do not have tested and verified cooling processes (39%), do not monitor time or temperature during cooling processes (41%), or do not calibrate thermometers used for monitoring temperatures (15%). Indeed, 86% of managers reported cooling processes that did not incorporate all FDA-recommended components. Additionally, restaurants do not always follow recommendations concerning specific cooling methods, such as refrigerating cooling food at shallow depths, ventilating cooling food, providing open-air space around the tops and sides of cooling food containers, and refraining from stacking cooling food containers on top of each other. Data from this study could be used by food safety programs and the restaurant industry to target training and intervention efforts concerning cooling practices. These efforts should focus on the most frequent poor cooling practices, as identified by this study. PMID:23212014

  19. Cooling Performance of ALIP according to the Air or Sodium Cooling Type

    Energy Technology Data Exchange (ETDEWEB)

    Ye, Huee-Youl; Yoon, Jung; Lee, Tae-Ho [Korea Atomic Energy Research Institute, Daejeon (Korea, Republic of)

    2015-05-15

    ALIP pumps the liquid sodium by Lorentz force produced by the interaction of induced current in the liquid metal and their associated magnetic field. Even though the efficiency of the ALIP is very low compared to conventional mechanical pumps, it is very useful due to the absence of moving parts, low noise and vibration level, simplicity of flow rate regulation and maintenance, and high temperature operation capability. Problems in utilization of ALIP concern a countermeasure for elevation of internal temperature of the coil due to joule heating and how to increase magnetic flux density of Na channel gap. The conventional ALIP usually used cooling methods by circulating the air or water. On the other hand, GE-Toshiba developed a double stator pump adopting the sodium-immersed self-cooled type, and it recovered the heat loss in sodium. Therefore, the station load factor of the plant could be reduced. In this study, the cooling performance with cooling types of ALIP is analyzed. We developed thermal analysis models to evaluate the cooling performance of air or sodium cooling type of ALIP. The cooling performance is analyzed for operating parameters and evaluated with cooling type. 1-D and 3-D thermal analysis model for IHTS ALIP was developed, and the cooling performance was analyzed for air or sodium cooling type. The cooling performance for air cooling type was better than sodium cooling type at higher air velocity than 0.2 m/s. Also, the air temperature of below 270 .deg. demonstrated the better cooling performance as compared to sodium.

  20. Gain enhancement of low profile on-chip dipole antenna via Artificial Magnetic Conductor at 94 GHz

    KAUST Repository

    Nafe, Mahmoud

    2015-04-13

    The bottleneck for realizing high efficiency System-on-Chip is integrating the antenna on the lossy silicon substrate. To shield the antenna from the silicon, a ground plane can be used. However, the ultra-thin oxide does not provide enough separation between the antenna and the ground plane. In this work, we demonstrate one of the highest reported gains to date for low profile 94 GHz on-chip dipole antenna while the ground plane is in the lowest metal in the oxide (M1). This is achieved by optimizing an Artificial Magnetic Conductor (AMC) structure midway the antenna and M1. The dipole antenna without the AMC has a gain of − 11 dBi while with the AMC structure a gain of + 4.8 dBi and hence achieving a gain enhancement of + 15.8 dB.

  1. A thin film approach for SiC-derived graphene as an on-chip electrode for supercapacitors

    Science.gov (United States)

    Ahmed, Mohsin; Khawaja, Mohamad; Notarianni, Marco; Wang, Bei; Goding, Dayle; Gupta, Bharati; Boeckl, John J.; Takshi, Arash; Motta, Nunzio; Saddow, Stephen E.; Iacopi, Francesca

    2015-10-01

    We designed a nickel-assisted process to obtain graphene with sheet resistance as low as 80 Ω square-1 from silicon carbide films on Si wafers with highly enhanced surface area. The silicon carbide film acts as both a template and source of graphitic carbon, while, simultaneously, the nickel induces porosity on the surface of the film by forming silicides during the annealing process which are subsequently removed. As stand-alone electrodes in supercapacitors, these transfer-free graphene-on-chip samples show a typical double-layer supercapacitive behaviour with gravimetric capacitance of up to 65 F g-1. This work is the first attempt to produce graphene with high surface area from silicon carbide thin films for energy storage at the wafer-level and may open numerous opportunities for on-chip integrated energy storage applications.

  2. Semipolar III–nitride quantum well waveguide photodetector integrated with laser diode for on-chip photonic system

    KAUST Repository

    Shen, Chao

    2017-02-28

    A high-performance waveguide photodetector (WPD) integrated with a laser diode (LD) sharing the single InGaN/GaN quantum well active region is demonstrated on a semipolar GaN substrate. The photocurrent of the integrated WPD is effectively tuned by the emitted optical power from the LD. The responsivity ranges from 0.018 to 0.051 A/W with increasing reverse bias from 0 to 10 V. The WPD shows a large 3 dB modulation bandwidth of 230 MHz. The integrated device, being used for power monitoring and on-chip communication, paves the way towards the eventual realization of a III–nitride on-chip photonic system.

  3. A thin film approach for SiC-derived graphene as an on-chip electrode for supercapacitors

    International Nuclear Information System (INIS)

    Ahmed, Mohsin; Wang, Bei; Goding, Dayle; Iacopi, Francesca; Khawaja, Mohamad; Notarianni, Marco; Takshi, Arash; Saddow, Stephen E; Gupta, Bharati; Motta, Nunzio; Boeckl, John J

    2015-01-01

    We designed a nickel-assisted process to obtain graphene with sheet resistance as low as 80 Ω square −1 from silicon carbide films on Si wafers with highly enhanced surface area. The silicon carbide film acts as both a template and source of graphitic carbon, while, simultaneously, the nickel induces porosity on the surface of the film by forming silicides during the annealing process which are subsequently removed. As stand-alone electrodes in supercapacitors, these transfer-free graphene-on-chip samples show a typical double-layer supercapacitive behaviour with gravimetric capacitance of up to 65 F g −1 . This work is the first attempt to produce graphene with high surface area from silicon carbide thin films for energy storage at the wafer-level and may open numerous opportunities for on-chip integrated energy storage applications. (paper)

  4. A deterministic guide for material and mode dependence of on-chip electro-optic modulator performance

    Science.gov (United States)

    Amin, Rubab; Suer, Can; Ma, Zhizhen; Sarpkaya, Ibrahim; Khurgin, Jacob B.; Agarwal, Ritesh; Sorger, Volker J.

    2017-10-01

    Electro-optic modulation is a key function in optical data communication and possible future optical computing engines. The performance of modulators intricately depends on the interaction between the actively modulated material and the propagating waveguide mode. While high-performing modulators were demonstrated before, the approaches were taken as ad-hoc. Here we show the first systematic investigation to incorporate a holistic analysis for high-performance and ultra-compact electro-optic modulators on-chip. We show that intricate interplay between active modulation material and optical mode plays a key role in the device operation. Based on physical tradeoffs such as index modulation, loss, optical confinement factors and slow-light effects, we find that bias-material-mode regions exist where high phase modulation and high loss (absorption) modulation is found. This work paves the way for a holistic design rule of electro-optic modulators for on-chip integration.

  5. Wide-field optical detection of nanoparticles using on-chip microscopy and self-assembled nanolenses

    Science.gov (United States)

    Mudanyali, Onur; McLeod, Euan; Luo, Wei; Greenbaum, Alon; Coskun, Ahmet F.; Hennequin, Yves; Allier, Cédric P.; Ozcan, Aydogan

    2013-03-01

    The direct observation of nanoscale objects is a challenging task for optical microscopy because the scattering from an individual nanoparticle is typically weak at optical wavelengths. Electron microscopy therefore remains one of the gold standard visualization methods for nanoparticles, despite its high cost, limited throughput and restricted field-of-view. Here, we describe a high-throughput, on-chip detection scheme that uses biocompatible wetting films to self-assemble aspheric liquid nanolenses around individual nanoparticles to enhance the contrast between the scattered and background light. We model the effect of the nanolens as a spatial phase mask centred on the particle and show that the holographic diffraction pattern of this effective phase mask allows detection of sub-100 nm particles across a large field-of-view of >20 mm2. As a proof-of-concept demonstration, we report on-chip detection of individual polystyrene nanoparticles, adenoviruses and influenza A (H1N1) viral particles.

  6. Multilayer on-chip stacked Fresnel zone plates: Hard x-ray fabrication and soft x-ray simulations

    Energy Technology Data Exchange (ETDEWEB)

    Li, Kenan; Wojcik, Michael J.; Ocola, Leonidas E.; Divan, Ralu; Jacobsen, Chris

    2015-11-01

    Fresnel zone plates are widely used as x-ray nanofocusing optics. To achieve high spatial resolution combined with good focusing efficiency, high aspect ratio nanolithography is required, and one way to achieve that is through multiple e-beam lithography writing steps to achieve on-chip stacking. A two-step writing process producing 50 nm finest zone width at a zone thickness of 1.14 µm for possible hard x-ray applications is shown here. The authors also consider in simulations the case of soft x-ray focusing where the zone thickness might exceed the depth of focus. In this case, the authors compare on-chip stacking with, and without, adjustment of zone positions and show that the offset zones lead to improved focusing efficiency. The simulations were carried out using a multislice propagation method employing Hankel transforms.

  7. Semipolar III–nitride quantum well waveguide photodetector integrated with laser diode for on-chip photonic system

    KAUST Repository

    Shen, Chao; Lee, Changmin; Stegenburgs, Edgars; Lerma, Jorge Holguin; Ng, Tien Khee; Nakamura, Shuji; DenBaars, Steven P.; Alyamani, Ahmed Y.; El-Desouki, Munir M.; Ooi, Boon S.

    2017-01-01

    A high-performance waveguide photodetector (WPD) integrated with a laser diode (LD) sharing the single InGaN/GaN quantum well active region is demonstrated on a semipolar GaN substrate. The photocurrent of the integrated WPD is effectively tuned by the emitted optical power from the LD. The responsivity ranges from 0.018 to 0.051 A/W with increasing reverse bias from 0 to 10 V. The WPD shows a large 3 dB modulation bandwidth of 230 MHz. The integrated device, being used for power monitoring and on-chip communication, paves the way towards the eventual realization of a III–nitride on-chip photonic system.

  8. Coupling of erbium dopants to yttrium orthosilicate photonic crystal cavities for on-chip optical quantum memories

    Energy Technology Data Exchange (ETDEWEB)

    Miyazono, Evan; Zhong, Tian; Craiciu, Ioana; Kindem, Jonathan M.; Faraon, Andrei, E-mail: faraon@caltech.edu [T. J. Watson Laboratory of Applied Physics, California Institute of Technology, 1200 E California Blvd, Pasadena, California 91125 (United States)

    2016-01-04

    Erbium dopants in crystals exhibit highly coherent optical transitions well suited for solid-state optical quantum memories operating in the telecom band. Here, we demonstrate coupling of erbium dopant ions in yttrium orthosilicate to a photonic crystal cavity fabricated directly in the host crystal using focused ion beam milling. The coupling leads to reduction of the photoluminescence lifetime and enhancement of the optical depth in microns-long devices, which will enable on-chip quantum memories.

  9. A new on-chip all-digital three-phase full-bridge dc/ac power inverter with feedforward and frequency control techniques.

    Science.gov (United States)

    Chen, Jiann-Jong; Kung, Che-Min

    2010-09-01

    The communication speed between components is far from satisfactory. To achieve high speed, simple control system configuration, and low cost, a new on-chip all-digital three-phase dc/ac power inverter using feedforward and frequency control techniques is proposed. The controller of the proposed power inverter, called the shift register, consists of six-stage D-latch flip-flops with a goal of achieving low-power consumption and area efficiency. Variable frequency is achieved by controlling the clocks of the shift register. One advantage regarding the data signal (D) and the common clock (CK) is that, regardless of the phase difference between the two, all of the D-latch flip-flops are capable of delaying data by one CK period. To ensure stability, the frequency of CK must be six times higher than that of D. The operation frequency of the proposed power inverter ranges from 10 Hz to 2 MHz, and the maximum output loading current is 0.8 A. The prototype of the proposed circuit has been fabricated with TSMC 0.35 μm 2P4M CMOS processes. The total chip area is 2.333 x 1.698 mm2. The three-phase dc/ac power inverter is applicable in uninterrupted power supplies, cold cathode fluorescent lamps, and motors, because of its ability to convert the dc supply voltage into the three-phase ac power sources.

  10. Status of sensor qualification for the PS module with on-chip $p_T$ discrimination for the CMS tracker phase 2 upgrade

    CERN Document Server

    AUTHOR|(CDS)2095782

    2016-01-01

    The high luminosity upgrade of the LHC is targeted to deliver 3000 fb$^{-1}$ at a luminosity of $5\\times10^{34}$cm$^{-2}$s$^{-1}$. Higher granularity, 140 collisions per bunch crossing and existing bandwidth limitations require a reduction of the amount of data at module level. New modules have binary readout, on-chip $p_{\\mathrm{ T}}$ discrimination and capabilities to provide track finding data at 40 MHz to the L1-trigger. The CMS collaboration has undertaken R&D effort to develop new planar sensors for the pixel-strip (PS) module, which has to withstand $1\\times10^{15}$ cm$^{-2}$ 1 MeV neutron equivalent fluence in the innermost layer of the tracker. The module is composed of a strip sensor and a macro pixel sensor with 100$\\mu$m $\\times$ 1.5 mm pixel size. Sensors were characterized in the laboratory and the effects of different process parameters and sensor concepts were studied. This contribution presents a new sensor prototype with n-pixels in p-bulk material in planar technology for the PS module...

  11. Applications of geological labs on chip for CO_2 storage issues

    International Nuclear Information System (INIS)

    Morais, Sandy

    2016-01-01

    CO_2 geological storage in deep saline aquifers represents a mediation solution for reducing the anthropogenic CO_2 emissions. Consequently, this kind of storage requires adequate scientific knowledge to evaluate injection scenarios, estimate reservoir capacity and assess leakage risks. In this context, we have developed and used high pressure/high temperature micro-fluidic tools to investigate the different mechanisms associated with CO_2 geological storage in deep saline aquifers. The silicon-Pyrex 2D porous networks (Geological Labs On Chips) can replicate the reservoir p,T conditions (25 ≤ T ≤ 50 C, 50 ≤ p ≤ 10 MPa), geological and topological properties. This thesis manuscript first highlights the strategies developed during this work to fabricate the GLoCs and to access to global characteristics of our porous media such as porosity and permeability, which are later compared to numerical modelling results. The carbon dioxide detection in GLoCs mimicking p,T conditions of geological reservoirs by using the direct integration of optical fiber for IR spectroscopy is presented. I then detail the strategies for following the dissolution of carbonates in GLoCs with X-rays laminography experiments.Then, the manuscript focuses on the use of GLoCs to investigate each CO_2 trapping mechanism at the pore scale. The direct optical visualization and image processing allow us to follow the evolution of the injected CO_2/aqueous phase within the reservoir, including displacement mechanisms and pore saturation levels. Eventually, I present the ongoing works such as experiments with reactive brines and hydrates formations in porous media [fr

  12. Globally Stable Microresonator Turing Pattern Formation for Coherent High-Power THz Radiation On-Chip

    Science.gov (United States)

    Huang, Shu-Wei; Yang, Jinghui; Yang, Shang-Hua; Yu, Mingbin; Kwong, Dim-Lee; Zelevinsky, T.; Jarrahi, Mona; Wong, Chee Wei

    2017-10-01

    In nonlinear microresonators driven by continuous-wave (cw) lasers, Turing patterns have been studied in the formalism of the Lugiato-Lefever equation with emphasis on their high coherence and exceptional robustness against perturbations. Destabilization of Turing patterns and the transition to spatiotemporal chaos, however, limit the available energy carried in the Turing rolls and prevent further harvest of their high coherence and robustness to noise. Here, we report a novel scheme to circumvent such destabilization, by incorporating the effect of local mode hybridizations, and we attain globally stable Turing pattern formation in chip-scale nonlinear oscillators with significantly enlarged parameter space, achieving a record-high power-conversion efficiency of 45% and an elevated peak-to-valley contrast of 100. The stationary Turing pattern is discretely tunable across 430 GHz on a THz carrier, with a fractional frequency sideband nonuniformity measured at 7.3 ×10-14 . We demonstrate the simultaneous microwave and optical coherence of the Turing rolls at different evolution stages through ultrafast optical correlation techniques. The free-running Turing-roll coherence, 9 kHz in 200 ms and 160 kHz in 20 minutes, is transferred onto a plasmonic photomixer for one of the highest-power THz coherent generations at room temperature, with 1.1% optical-to-THz power conversion. Its long-term stability can be further improved by more than 2 orders of magnitude, reaching an Allan deviation of 6 ×10-10 at 100 s, with a simple computer-aided slow feedback control. The demonstrated on-chip coherent high-power Turing-THz system is promising to find applications in astrophysics, medical imaging, and wireless communications.

  13. SuperSpec, The On-Chip Spectrometer: Improved NEP and Antenna Performance

    Science.gov (United States)

    Wheeler, Jordan; Hailey-Dunsheath, S.; Shirokoff, E.; Barry, P. S.; Bradford, C. M.; Chapman, S.; Che, G.; Doyle, S.; Glenn, J.; Gordon, S.; Hollister, M.; Kovács, A.; LeDuc, H. G.; Mauskopf, P.; McGeehan, R.; McKenney, C.; Reck, T.; Redford, J.; Ross, C.; Shiu, C.; Tucker, C.; Turner, J.; Walker, S.; Zmuidzinas, J.

    2018-05-01

    SuperSpec is a new technology for mm and sub-mm spectroscopy. It is an on-chip spectrometer being developed for multi-object, moderate-resolution (R˜ 300 ), large bandwidth survey spectroscopy of high-redshift galaxies for the 1 mm atmospheric window. This band accesses the CO ladder in the redshift range of z = 0-4 and the [CII] 158 μm line from redshift z = 5-9. SuperSpec employs a novel architecture in which detectors are coupled to a series of resonant filters along a single microwave feedline instead of using dispersive optics. This construction allows for the creation of a full spectrometer occupying only ˜ 10 cm^2 of silicon, a reduction in size of several orders of magnitude when compared to standard grating spectrometers. This small profile enables the production of future multi-beam spectroscopic instruments envisioned for the millimeter band to measure the redshifts of dusty galaxies efficiently. The SuperSpec collaboration is currently pushing toward the deployment of a SuperSpec demonstration instrument in fall of 2018. The progress with the latest SuperSpec prototype devices is presented; reporting increased responsivity via a reduced inductor volume (2.6 μm^3 ) and the incorporation of a new broadband antenna. A detector NEP of 3-4 × 10^{-18} W/Hz^{0.5} is obtained, sufficient for background-limited observation on mountaintop sites. In addition, beam maps and efficiency measurements of a new wide-band dual bow-tie slot antenna are shown.

  14. Bubble-free on-chip continuous-flow polymerase chain reaction: concept and application.

    Science.gov (United States)

    Wu, Wenming; Kang, Kyung-Tae; Lee, Nae Yoon

    2011-06-07

    Bubble formation inside a microscale channel is a significant problem in general microfluidic experiments. The problem becomes especially crucial when performing a polymerase chain reaction (PCR) on a chip which is subject to repetitive temperature changes. In this paper, we propose a bubble-free sample injection scheme applicable for continuous-flow PCR inside a glass/PDMS hybrid microfluidic chip, and attempt to provide a theoretical basis concerning bubble formation and elimination. Highly viscous paraffin oil plugs are employed in both the anterior and posterior ends of a sample plug, completely encapsulating the sample and eliminating possible nucleation sites for bubbles. In this way, internal channel pressure is increased, and vaporization of the sample is prevented, suppressing bubble formation. Use of an oil plug in the posterior end of the sample plug aids in maintaining a stable flow of a sample at a constant rate inside a heated microchannel throughout the entire reaction, as compared to using an air plug. By adopting the proposed sample injection scheme, we demonstrate various practical applications. On-chip continuous-flow PCR is performed employing genomic DNA extracted from a clinical single hair root sample, and its D1S80 locus is successfully amplified. Also, chip reusability is assessed using a plasmid vector. A single chip is used up to 10 times repeatedly without being destroyed, maintaining almost equal intensities of the resulting amplicons after each run, ensuring the reliability and reproducibility of the proposed sample injection scheme. In addition, the use of a commercially-available and highly cost-effective hot plate as a potential candidate for the heating source is investigated.

  15. Excimer laser micropatterning of freestanding thermo-responsive hydrogel layers for cells-on-chip applications

    International Nuclear Information System (INIS)

    Santaniello, Tommaso; Milani, Paolo; Lenardi, Cristina; Martello, Federico; Tocchio, Alessandro; Gassa, Federico; Webb, Patrick

    2012-01-01

    We report a novel reliable and repeatable technologic manufacturing protocol for the realization of micro-patterned freestanding hydrogel layers based on thermo-responsive poly-(N-isopropyl)acrylamide (PNIPAAm), which have potential to be employed as temperature-triggered smart surfaces for cells-on-chip applications. PNIPAAm-based films with controlled mechanical properties and different thicknesses (100–300 µm thickness) were prepared by injection compression moulding at room temperature. A 9 × 9 array of 20 µm diameter through-holes is machined by means of the KrF excimer laser on dry PNIPAAm films which are physically attached to flat polyvinyl chloride (PVC) substrates. Machining parameters, such as fluence and number of shots, are optimized in order to achieve highly resolved features. Micro-structured freestanding films are then easily obtained after hydrogels are detached from PVC by gradually promoting the film swelling in ethanol. In the PNIPAAm water-swollen state, the machined holes’ diameter approaches a slight larger value (30 µm) according to the measured hydrogel swelling ratio. Thermo-responsive behaviour and through-hole tapering characterization are carried out by metrology measurements using an optical inverted and confocal microscope setup, respectively. After the temperature of freestanding films is raised above 32 °C, we observe that the shrinkage of the whole through-hole array occurs, thus reducing the holes’ diameter to less than a half its original size (about 15 µm) as a consequence of the film dehydration. Different holes’ diameters (10 and 30 µm) are also obtained on dry hydrogel employing suitable projection masks, showing similar shrinking behaviour when hydrated and undergone thermo-response tests. Thermo-responsive PNIPAAm-based freestanding layers could then be integrated with other suitable micro-fabricated thermoplastic components in order to preliminary test their feasibility in operating as temperature

  16. Object Recognition System-on-Chip Using the Support Vector Machines

    Directory of Open Access Journals (Sweden)

    Houzet Dominique

    2005-01-01

    Full Text Available The first aim of this work is to propose the design of a system-on-chip (SoC platform dedicated to digital image and signal processing, which is tuned to implement efficiently multiply-and-accumulate (MAC vector/matrix operations. The second aim of this work is to implement a recent promising neural network method, namely, the support vector machine (SVM used for real-time object recognition, in order to build a vision machine. With such a reconfigurable and programmable SoC platform, it is possible to implement any SVM function dedicated to any object recognition problem. The final aim is to obtain an automatic reconfiguration of the SoC platform, based on the results of the learning phase on an objects' database, which makes it possible to recognize practically any object without manual programming. Recognition can be of any kind that is from image to signal data. Such a system is a general-purpose automatic classifier. Many applications can be considered as a classification problem, but are usually treated specifically in order to optimize the cost of the implemented solution. The cost of our approach is more important than a dedicated one, but in a near future, hundreds of millions of gates will be common and affordable compared to the design cost. What we are proposing here is a general-purpose classification neural network implemented on a reconfigurable SoC platform. The first version presented here is limited in size and thus in object recognition performances, but can be easily upgraded according to technology improvements.

  17. Reducing weight precision of convolutional neural networks towards large-scale on-chip image recognition

    Science.gov (United States)

    Ji, Zhengping; Ovsiannikov, Ilia; Wang, Yibing; Shi, Lilong; Zhang, Qiang

    2015-05-01

    In this paper, we develop a server-client quantization scheme to reduce bit resolution of deep learning architecture, i.e., Convolutional Neural Networks, for image recognition tasks. Low bit resolution is an important factor in bringing the deep learning neural network into hardware implementation, which directly determines the cost and power consumption. We aim to reduce the bit resolution of the network without sacrificing its performance. To this end, we design a new quantization algorithm called supervised iterative quantization to reduce the bit resolution of learned network weights. In the training stage, the supervised iterative quantization is conducted via two steps on server - apply k-means based adaptive quantization on learned network weights and retrain the network based on quantized weights. These two steps are alternated until the convergence criterion is met. In this testing stage, the network configuration and low-bit weights are loaded to the client hardware device to recognize coming input in real time, where optimized but expensive quantization becomes infeasible. Considering this, we adopt a uniform quantization for the inputs and internal network responses (called feature maps) to maintain low on-chip expenses. The Convolutional Neural Network with reduced weight and input/response precision is demonstrated in recognizing two types of images: one is hand-written digit images and the other is real-life images in office scenarios. Both results show that the new network is able to achieve the performance of the neural network with full bit resolution, even though in the new network the bit resolution of both weight and input are significantly reduced, e.g., from 64 bits to 4-5 bits.

  18. Selection of aptamers specific for glycated hemoglobin and total hemoglobin using on-chip SELEX.

    Science.gov (United States)

    Lin, Hsin-I; Wu, Ching-Chu; Yang, Ching-Hsuan; Chang, Ko-Wei; Lee, Gwo-Bin; Shiesh, Shu-Chu

    2015-01-21

    Blood glycated hemoglobin (HbA1c) levels reflecting average glucose concentrations over the past three months are fundamental for the diagnosis, monitoring, and risk assessment of diabetes. It has been hypothesized that aptamers, which are single-stranded DNAs or RNAs that demonstrate high affinity to a large variety of molecules ranging from small drugs, metabolites, or proteins, could be used for the measurement of HbA1c. Aptamers are selected through an in vitro process called systematic evolution of ligands by exponential enrichment (SELEX), and they can be chemically synthesized with high reproducibility at relatively low costs. This study therefore aimed to select HbA1c- and hemoglobin (Hb)-specific single-stranded DNA aptamers using an on-chip SELEX protocol. A microfluidic SELEX chip was developed to continuously and automatically carry out multiple rounds of SELEX to screen specific aptamers for HbA1c and Hb. HbA1c and Hb were first coated onto magnetic beads. Following several rounds of selection and enrichment with a randomized 40-mer DNA library, specific oligonucleotides were selected. The binding specificity and affinity were assessed by competitive and binding assays. Using the developed microfluidic system, the incubation and partitioning times were greatly decreased, and the entire process was shortened dramatically. Both HbA1c- and Hb-specific aptamers selected by the microfluidic system showed high specificity and affinity (dissociation constant, Kd = 7.6 ± 3.0 nM and 7.3 ± 2.2 nM for HbA1c and Hb, respectively). With further refinements in the assay, these aptamers may replace the conventional antibodies for in vitro diagnostics applications in the near future.

  19. Parametric Dense Stereovision Implementation on a System-on Chip (SoC

    Directory of Open Access Journals (Sweden)

    Pablo Montejo

    2012-02-01

    Full Text Available This paper proposes a novel hardware implementation of a dense recovery of stereovision 3D measurements. Traditionally 3D stereo systems have imposed the maximum number of stereo correspondences, introducing a large restriction on artificial vision algorithms. The proposed system-on-chip (SoC provides great performance and efficiency, with a scalable architecture available for many different situations, addressing real time processing of stereo image flow. Using double buffering techniques properly combined with pipelined processing, the use of reconfigurable hardware achieves a parametrisable SoC which gives the designer the opportunity to decide its right dimension and features. The proposed architecture does not need any external memory because the processing is done as image flow arrives. Our SoC provides 3D data directly without the storage of whole stereo images. Our goal is to obtain high processing speed while maintaining the accuracy of 3D data using minimum resources. Configurable parameters may be controlled by later/parallel stages of the vision algorithm executed on an embedded processor. Considering hardware FPGA clock of 100 MHz, image flows up to 50 frames per second (fps of dense stereo maps of more than 30,000 depth points could be obtained considering 2 Mpix images, with a minimum initial latency. The implementation of computer vision algorithms on reconfigurable hardware, explicitly low level processing, opens up the prospect of its use in autonomous systems, and they can act as a coprocessor to reconstruct 3D images with high density information in real time.

  20. Designing area optimized application-specific network-on-chip architectures while providing hard QoS guarantees.

    Directory of Open Access Journals (Sweden)

    Sajid Gul Khawaja

    Full Text Available With the increase of transistors' density, popularity of System on Chip (SoC has increased exponentially. As a communication module for SoC, Network on Chip (NoC framework has been adapted as its backbone. In this paper, we propose a methodology for designing area-optimized application specific NoC while providing hard Quality of Service (QoS guarantees for real time flows. The novelty of the proposed system lies in derivation of a Mixed Integer Linear Programming model which is then used to generate a resource optimal Network on Chip (NoC topology and architecture while considering traffic and QoS requirements. We also present the micro-architectural design features used for enabling traffic and latency guarantees and discuss how the solution adapts for dynamic variations in the application traffic. The paper highlights the effectiveness of proposed method by generating resource efficient NoC solutions for both industrial and benchmark applications. The area-optimized results are generated in few seconds by proposed technique, without resorting to heuristics, even for an application with 48 traffic flows.

  1. A piezo-ring-on-chip microfluidic device for simple and low-cost mass spectrometry interfacing.

    Science.gov (United States)

    Tsao, Chia-Wen; Lei, I-Chao; Chen, Pi-Yu; Yang, Yu-Liang

    2018-02-12

    Mass spectrometry (MS) interfacing technology provides the means for incorporating microfluidic processing with post MS analysis. In this study, we propose a simple piezo-ring-on-chip microfluidic device for the controlled spraying of MALDI-MS targets. This device uses a low-cost, commercially-available ring-shaped piezoelectric acoustic atomizer (piezo-ring) directly integrated into a polydimethylsiloxane microfluidic device to spray the sample onto the MS target substrate. The piezo-ring-on-chip microfluidic device's design, fabrication, and actuation, and its pulsatile pumping effects were evaluated. The spraying performance was examined by depositing organic matrix samples onto the MS target substrate by using both an automatic linear motion motor, and manual deposition. Matrix-assisted laser desorption/ionization mass spectrometry (MALDI-MS) was performed to analyze the peptide samples on the MALDI target substrates. Using our technique, model peptides with 10 -6 M concentration can be successfully detected. The results also indicate that the piezo-ring-on-chip approach forms finer matrix crystals and presents better MS signal uniformity with little sample consumption compared to the conventional pipetting method.

  2. Water cooling coil

    Energy Technology Data Exchange (ETDEWEB)

    Suzuki, S; Ito, Y; Kazawa, Y

    1975-02-05

    Object: To provide a water cooling coil in a toroidal nuclear fusion device, in which coil is formed into a small-size in section so as not to increase dimensions, weight or the like of machineries including the coil. Structure: A conductor arranged as an outermost layer of a multiple-wind water cooling coil comprises a hollow conductor, which is directly cooled by fluid, and as a consequence, a solid conductor disposed interiorly thereof is cooled indirectly.

  3. Building Service Provider Capabilities

    DEFF Research Database (Denmark)

    Brandl, Kristin; Jaura, Manya; Ørberg Jensen, Peter D.

    2015-01-01

    In this paper we study whether and how the interaction between clients and the service providers contributes to the development of capabilities in service provider firms. In situations where such a contribution occurs, we analyze how different types of activities in the production process...... process. We find that clients influence the development of human capital capabilities and management capabilities in reciprocally produced services. While in sequential produced services clients influence the development of organizational capital capabilities and management capital capabilities....... of the services, such as sequential or reciprocal task activities, influence the development of different types of capabilities. We study five cases of offshore-outsourced knowledge-intensive business services that are distinguished according to their reciprocal or sequential task activities in their production...

  4. The Cool Colors Project

    Science.gov (United States)

    Gov. Arnold Schwarzenegger, second from left, a sample from the Cool Colors Project, a roof product ) (Jeff Chiu - AP) more Cool Colors make the front page of The Sacramento Bee (3rd highest circulation newspaper in California) on 14 August 2006! Read the article online or as a PDF. The Cool Colors Project

  5. On-Chip Sensing of Thermoelectric Thin Film’s Merit

    OpenAIRE

    Xiao, Zhigang; Zhu, Xiaoshan

    2015-01-01

    Thermoelectric thin films have been widely explored for thermal-to-electrical energy conversion or solid-state cooling, because they can remove heat from integrated circuit (IC) chips or micro-electromechanical systems (MEMS) devices without involving any moving mechanical parts. In this paper, we report using silicon diode-based temperature sensors and specific thermoelectric devices to characterize the merit of thermoelectric thin films. The silicon diode temperature sensors and thermoelect...

  6. Numerical Simulation on Natural Convection Cooling of a FM Target

    Energy Technology Data Exchange (ETDEWEB)

    Park, Jong Pil; Park, Su Ki [KAERI, Daejeon (Korea, Republic of)

    2016-05-15

    The irradiated FM(Fission-Molly) target is unloaded from the irradiation hole during normal operation, and then cooled down in the reactor pool for a certain period of time. Therefore, it is necessary to identify the minimum decay time needed to cool down FM target sufficiently by natural convection. In the present work, numerical simulations are performed to predict cooling capability of a FM target cooled by natural convection using commercial computational fluid dynamics (CFD) code, CFX. The present study is carried out using CFD code to investigate cooling capability of a FM target cooled by natural convection. The steady state simulation as well as transient simulation is performed in the present work. Based on the transient simulation (T1), the minimum decay time that the maximum fuel temperature does not reach the design limit temperature (TONB-3 .deg. C) is around 15.60 seconds.

  7. Cooling water distribution system

    Science.gov (United States)

    Orr, Richard

    1994-01-01

    A passive containment cooling system for a nuclear reactor containment vessel. Disclosed is a cooling water distribution system for introducing cooling water by gravity uniformly over the outer surface of a steel containment vessel using an interconnected series of radial guide elements, a plurality of circumferential collector elements and collector boxes to collect and feed the cooling water into distribution channels extending along the curved surface of the steel containment vessel. The cooling water is uniformly distributed over the curved surface by a plurality of weirs in the distribution channels.

  8. Microgels produced using microfluidic on-chip polymer blending for controlled released of VEGF encoding lentivectors.

    Science.gov (United States)

    Madrigal, Justin L; Sharma, Shonit N; Campbell, Kevin T; Stilhano, Roberta S; Gijsbers, Rik; Silva, Eduardo A

    2018-03-15

    Alginate hydrogels are widely used as delivery vehicles due to their ability to encapsulate and release a wide range of cargos in a gentle and biocompatible manner. The release of encapsulated therapeutic cargos can be promoted or stunted by adjusting the hydrogel physiochemical properties. However, the release from such systems is often skewed towards burst-release or lengthy retention. To address this, we hypothesized that the overall magnitude of burst release could be adjusted by combining microgels with distinct properties and release behavior. Microgel suspensions were generated using a process we have termed on-chip polymer blending to yield composite suspensions of a range of microgel formulations. In this manner, we studied how alginate percentage and degradation relate to the release of lentivectors. Whereas changes in alginate percentage had a minimal impact on lentivector release, microgel degradation led to a 3-fold increase, and near complete release, over 10 days. Furthermore, by controlling the amount of degradable alginate present within microgels the relative rate of release can be adjusted. A degradable formulation of microgels was used to deliver vascular endothelial growth factor (VEGF)-encoding lentivectors in the chick chorioallantoic membrane (CAM) assay and yielded a proangiogenic response in comparison to the same lentivectors delivered in suspension. The utility of blended microgel suspensions may provide an especially appealing platform for the delivery of lentivectors or similarly sized therapeutics. Genetic therapeutics hold considerable potential for the treatment of diseases and disorders including ischemic cardiovascular diseases. To realize this potential, genetic vectors must be precisely and efficiently delivered to targeted regions of the body. However, conventional methods of delivery do not provide sufficient spatial and temporal control. Here, we demonstrate how alginate microgels provide a basis for developing systems for

  9. Capability Handbook- offline metrology

    DEFF Research Database (Denmark)

    Islam, Aminul; Marhöfer, David Maximilian; Tosello, Guido

    This offline metrological capability handbook has been made in relation to HiMicro Task 3.3. The purpose of this document is to assess the metrological capability of the HiMicro partners and to gather the information of all available metrological instruments in the one single document. It provides...

  10. Dynamic Capabilities and Performance

    DEFF Research Database (Denmark)

    Wilden, Ralf; Gudergan, Siegfried P.; Nielsen, Bo Bernhard

    2013-01-01

    are contingent on the competitive intensity faced by firms. Our findings demonstrate the performance effects of internal alignment between organizational structure and dynamic capabilities, as well as the external fit of dynamic capabilities with competitive intensity. We outline the advantages of PLS...

  11. Developing Alliance Capabilities

    DEFF Research Database (Denmark)

    Heimeriks, Koen H.; Duysters, Geert; Vanhaverbeke, Wim

    This paper assesses the differential performance effects of learning mechanisms on the development of alliance capabilities. Prior research has suggested that different capability levels could be identified in which specific intra-firm learning mechanisms are used to enhance a firm's alliance...

  12. Telematics Options and Capabilities

    Energy Technology Data Exchange (ETDEWEB)

    Hodge, Cabell [National Renewable Energy Laboratory (NREL), Golden, CO (United States)

    2017-09-05

    This presentation describes the data tracking and analytical capabilities of telematics devices. Federal fleet managers can use the systems to keep their drivers safe, maintain a fuel efficient fleet, ease their reporting burden, and save money. The presentation includes an example of how much these capabilities can save fleets.

  13. Cooling tower calculations

    International Nuclear Information System (INIS)

    Simonkova, J.

    1988-01-01

    The problems are summed up of the dynamic calculation of cooling towers with forced and natural air draft. The quantities and relations are given characterizing the simultaneous exchange of momentum, heat and mass in evaporative water cooling by atmospheric air in the packings of cooling towers. The method of solution is clarified in the calculation of evaporation criteria and thermal characteristics of countercurrent and cross current cooling systems. The procedure is demonstrated of the calculation of cooling towers, and correction curves and the effect assessed of the operating mode at constant air number or constant outlet air volume flow on their course in ventilator cooling towers. In cooling towers with the natural air draft the flow unevenness is assessed of water and air relative to its effect on the resulting cooling efficiency of the towers. The calculation is demonstrated of thermal and resistance response curves and cooling curves of hydraulically unevenly loaded towers owing to the water flow rate parameter graded radially by 20% along the cross-section of the packing. Flow rate unevenness of air due to wind impact on the outlet air flow from the tower significantly affects the temperatures of cooled water in natural air draft cooling towers of a design with lower demands on aerodynamics, as early as at wind velocity of 2 m.s -1 as was demonstrated on a concrete example. (author). 11 figs., 10 refs

  14. 46 CFR 92.20-50 - Heating and cooling.

    Science.gov (United States)

    2010-10-01

    ... 46 Shipping 4 2010-10-01 2010-10-01 false Heating and cooling. 92.20-50 Section 92.20-50 Shipping... AND ARRANGEMENT Accommodations for Officers and Crew § 92.20-50 Heating and cooling. (a) All manned... heating and cooling system for accommodations must be capable of maintaining a temperature of 21 °C (70 °F...

  15. FMEF/experimental capabilities

    International Nuclear Information System (INIS)

    Burgess, C.A.; Dronen, V.R.

    1981-01-01

    The Fuels and Materials Examination Facility (FMEF), under construction at the Hanford site north of Richland, Washington, will be one of the most modern facilities offering irradiated fuels and materials examination capabilities and fuel fabrication development technologies. Scheduled for completion in 1984, the FMEF will provide examination capability for fuel assemblies, fuel pins and test pins irradiated in the FFTF. Various functions of the FMEF are described, with emphasis on experimental data-gathering capabilities in the facility's Nondestructive and Destructive examination cell complex

  16. KSC Technical Capabilities Website

    Science.gov (United States)

    Nufer, Brian; Bursian, Henry; Brown, Laurette L.

    2010-01-01

    This document is the website pages that review the technical capabilities that the Kennedy Space Center (KSC) has for partnership opportunities. The purpose of this information is to make prospective customers aware of the capabilities and provide an opportunity to form relationships with the experts at KSC. The technical capabilities fall into these areas: (1) Ground Operations and Processing Services, (2) Design and Analysis Solutions, (3) Command and Control Systems / Services, (4) Materials and Processes, (5) Research and Technology Development and (6) Laboratories, Shops and Test Facilities.

  17. Laser cooling of solids

    CERN Document Server

    Petrushkin, S V

    2009-01-01

    Laser cooling is an important emerging technology in such areas as the cooling of semiconductors. The book examines and suggests solutions for a range of problems in the development of miniature solid-state laser refrigerators, self-cooling solid-state lasers and optical echo-processors. It begins by looking at the basic theory of laser cooling before considering such topics as self-cooling of active elements of solid-state lasers, laser cooling of solid-state information media of optical echo-processors, and problems of cooling solid-state quantum processors. Laser Cooling of Solids is an important contribution to the development of compact laser-powered cryogenic refrigerators, both for the academic community and those in the microelectronics and other industries. Provides a timely review of this promising field of research and discusses the fundamentals and theory of laser cooling Particular attention is given to the physics of cooling processes and the mathematical description of these processes Reviews p...

  18. Emergency reactor cooling device

    International Nuclear Information System (INIS)

    Arakawa, Ken.

    1993-01-01

    An emergency nuclear reactor cooling device comprises a water reservoir, emergency core cooling water pipelines having one end connected to a water feeding sparger, fire extinguishing facility pipelines, cooling water pressurizing pumps, a diesel driving machine for driving the pumps and a battery. In a water reservoir, cooling water is stored by an amount required for cooling the reactor upon emergency and for fire extinguishing, and fire extinguishing facility pipelines connecting the water reservoir and the fire extinguishing facility are in communication with the emergency core cooling water pipelines connected to the water feeding sparger by system connection pipelines. Pumps are operated by a diesel power generator to introduce cooling water from the reservoir to the emergency core cooling water pipelines. Then, even in a case where AC electric power source is entirely lost and the emergency core cooling system can not be used, the diesel driving machine is operated using an exclusive battery, thereby enabling to inject cooling water from the water reservoir to a reactor pressure vessel and a reactor container by the diesel drive pump. (N.H.)

  19. Development of High Performance Cooling Modules in Notebook PC's

    Science.gov (United States)

    Tanahashi, Kosei

    The CPU power consumption in Notebook PCs is increasing every year. Video chips and HDDs are also continually using larger power for higher performance. In addition, since miniaturization is desired, the mounting of components is becoming more and more dense. Accordingly, the cooling mechanisms are increasingly important. The cooling modules have to dissipate larger amounts of heat in the same environmental conditions. Therefore, high capacity cooling capabilities is needed, while low costs and high reliability must be retained. Available cooling methods include air or water cooling systems and the heat conduction method. The air cooling system is to transmit heat by a cooling fan often using a heat pipe. The water cooling one employs the water to carry heat to the back of the display, which offers a comparatively large cooling area. The heat conduction method is to transfer the heat by thermal conduction to the case. This article describes the development of new and comparatively efficient cooling devices offering low cost and high reliability for air cooling system. As one of the development techniques, the heat resistance and performance are measured for various parts and layouts. Each cooling system is evaluated in the same measurement environment. With regards to the fans, an optimal shape of the fan blades to maximize air flow is found by using CFD simulation, and prototypes were built and tested.

  20. Ultrabroadband Hybrid III-V/SOI Grating Reflector for On-chip Lasers

    DEFF Research Database (Denmark)

    Park, Gyeong Cheol; Taghizadeh, Alireza; Chung, Il-Sug

    2016-01-01

    We report on a new type of III-V/SOI grating reflector with a broad stopband of 350 nm. This reflector has promising prospects for applications in high-speed III-V/SOI vertical cavity lasers with an improved heat dissipation capability.......We report on a new type of III-V/SOI grating reflector with a broad stopband of 350 nm. This reflector has promising prospects for applications in high-speed III-V/SOI vertical cavity lasers with an improved heat dissipation capability....

  1. Resources, constraints and capabilities

    NARCIS (Netherlands)

    Dhondt, S.; Oeij, P.R.A.; Schröder, A.

    2018-01-01

    Human and financial resources as well as organisational capabilities are needed to overcome the manifold constraints social innovators are facing. To unlock the potential of social innovation for the whole society new (social) innovation friendly environments and new governance structures

  2. a Capability approach

    African Journals Online (AJOL)

    efforts towards gender equality in education as a means of achieving social justice. ... should mean that a lot of capability approach-oriented commentators are ... processes, their forms of exercising power, and their rules, unwritten cultures, ...

  3. Engineering Capabilities and Partnerships

    Science.gov (United States)

    Poulos, Steve

    2010-01-01

    This slide presentation reviews the engineering capabilities at Johnson Space Center, The presentation also reviews the partnerships that have resulted in successfully designed and developed projects that involved commercial and educational institutions.

  4. Brandishing Cyberattack Capabilities

    Science.gov (United States)

    2013-01-01

    Advertising cyberwar capabilities may be helpful. It may back up a deterrence strategy. It might dissuade other states from conventional mischief or...to enable the attack.5 Many of the instruments of the attack remain with the target system, nestled in its log files, or even in the malware itself...debat- able. Even if demonstrated, what worked yesterday may not work today. But difficult does not mean impossible. Advertising cyberwar capabilities

  5. CASL Dakota Capabilities Summary

    Energy Technology Data Exchange (ETDEWEB)

    Adams, Brian M. [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States); Simmons, Chris [Univ. of Texas, Austin, TX (United States); Williams, Brian J. [Los Alamos National Lab. (LANL), Los Alamos, NM (United States)

    2017-10-10

    The Dakota software project serves the mission of Sandia National Laboratories and supports a worldwide user community by delivering state-of-the-art research and robust, usable software for optimization and uncertainty quantification. These capabilities enable advanced exploration and riskinformed prediction with a wide range of computational science and engineering models. Dakota is the verification and validation (V&V) / uncertainty quantification (UQ) software delivery vehicle for CASL, allowing analysts across focus areas to apply these capabilities to myriad nuclear engineering analyses.

  6. Electro-mechanical control of an on-chip optical beam splitter containing an embedded quantum emitter

    Science.gov (United States)

    Bishop, Z. K.; Foster, A. P.; Royall, B.; Bentham, C.; Clarke, E.; Skolnick, M. S.; Wilson, L. R.

    2018-05-01

    We demonstrate electro-mechanical control of an on-chip GaAs optical beam splitter containing a quantum dot single-photon source. The beam splitter consists of two nanobeam waveguides, which form a directional coupler (DC). The splitting ratio of the DC is controlled by varying the out-of-plane separation of the two waveguides using electro-mechanical actuation. We reversibly tune the beam splitter between an initial state, with emission into both output arms, and a final state with photons emitted into a single output arm. The device represents a compact and scalable tuning approach for use in III-V semiconductor integrated quantum optical circuits.

  7. Electro-mechanical control of an on-chip optical beam splitter containing an embedded quantum emitter.

    Science.gov (United States)

    Bishop, Z K; Foster, A P; Royall, B; Bentham, C; Clarke, E; Skolnick, M S; Wilson, L R

    2018-05-01

    We demonstrate electro-mechanical control of an on-chip GaAs optical beam splitter containing a quantum dot single-photon source. The beam splitter consists of two nanobeam waveguides, which form a directional coupler (DC). The splitting ratio of the DC is controlled by varying the out-of-plane separation of the two waveguides using electromechanical actuation. We reversibly tune the beam splitter between an initial state, with emission into both output arms, and a final state with photons emitted into a single output arm. The device represents a compact and scalable tuning approach for use in III-V semiconductor integrated quantum optical circuits.

  8. Embedded software design and programming of multiprocessor system-on-chip simulink and system C case studies

    CERN Document Server

    Popovici, Katalin; Jerraya, Ahmed A; Wolf, Marilyn

    2010-01-01

    Current multimedia and telecom applications require complex, heterogeneous multiprocessor system on chip (MPSoC) architectures with specific communication infrastructure in order to achieve the required performance. Heterogeneous MPSoC includes different types of processing units (DSP, microcontroller, ASIP) and different communication schemes (fast links, non standard memory organization and access).Programming an MPSoC requires the generation of efficient software running on MPSoC from a high level environment, by using the characteristics of the architecture. This task is known to be tediou

  9. Design of the ANTARES LCM-DAQ board test bench using a FPGA-based system-on-chip approach

    Energy Technology Data Exchange (ETDEWEB)

    Anvar, S. [CEA Saclay, DAPNIA/SEDI, 91191 Gif-sur-Yvette Cedex (France); Kestener, P. [CEA Saclay, DAPNIA/SEDI, 91191 Gif-sur-Yvette Cedex (France)]. E-mail: pierre.kestener@cea.fr; Le Provost, H. [CEA Saclay, DAPNIA/SEDI, 91191 Gif-sur-Yvette Cedex (France)

    2006-11-15

    The System-on-Chip (SoC) approach consists in using state-of-the-art FPGA devices with embedded RISC processor cores, high-speed differential LVDS links and ready-to-use multi-gigabit transceivers allowing development of compact systems with substantial number of IO channels. Required performances are obtained through a subtle separation of tasks between closely cooperating programmable hardware logic and user-friendly software environment. We report about our experience in using the SoC approach for designing the production test bench of the off-shore readout system for the ANTARES neutrino experiment.

  10. Influence of the ambient temperature on the cooling efficiency of the high performance cooling device with thermosiphon effect

    Science.gov (United States)

    Nemec, Patrik; Malcho, Milan

    2018-06-01

    This work deal with experimental measurement and calculation cooling efficiency of the cooling device working with a heat pipe technology. The referred device in the article is cooling device capable transfer high heat fluxes from electric elements to the surrounding. The work contain description, working principle and construction of cooling device. The main factor affected the dissipation of high heat flux from electronic elements through the cooling device to the surrounding is condenser construction, its capacity and option of heat removal. Experimental part describe the measuring method cooling efficiency of the cooling device depending on ambient temperature in range -20 to 40°C and at heat load of electronic components 750 W. Measured results are compared with results calculation based on physical phenomena of boiling, condensation and natural convection heat transfer.

  11. Antennas for Terahertz Applications: Focal Plane Arrays and On-chip Non-contact Measurement Probes

    Science.gov (United States)

    Trichopoulos, Georgios C.

    . Additionally, a butterfly-shaped antenna layout is introduced that enables broadband imaging. The alternative design presented here, allows for video-rate imaging in the 0.6--1.2 THz band and maintains a small antenna footprint, resulting in densely packed FPAs. In both antenna designs, we optimize the impedance matching between the antennas and the integrated electronic devices, thus achieving optimum responsivity levels for high sensitivity and low noise performance. Subsequently, we present the design details of the first THz camera and the first THz camera images captured. With the realized THz camera, imaging of concealed objects is achieved with space. Thus, the hybrid electromagnetic model allows fast and accurate design of THz antennas and modeling of the complete THz imaging system. Finally, motivated by the novel THz antenna layouts and the quasioptical techniques, we developed a novel non-contact probe measurement method for on-chip device characterization. In the THz regime, traditional contact probes are too small and fragile, thus inhibiting accurate and reliable circuit measurements. By integrating the device under test (DUT) with THz antennas that act as the measurement probes, we may couple the incident and reflected signal from and to the network analyzer without residing to any physical connection.

  12. Radiant Floor Cooling Systems

    DEFF Research Database (Denmark)

    Olesen, Bjarne W.

    2008-01-01

    In many countries, hydronic radiant floor systems are widely used for heating all types of buildings such as residential, churches, gymnasiums, hospitals, hangars, storage buildings, industrial buildings, and smaller offices. However, few systems are used for cooling.This article describes a floor...... cooling system that includes such considerations as thermal comfort of the occupants, which design parameters will influence the cooling capacity and how the system should be controlled. Examples of applications are presented....

  13. The cooling of particle beams

    International Nuclear Information System (INIS)

    Sessler, A.M.

    1994-10-01

    A review is given of the various methods which can be employed for cooling particle beams. These methods include radiation damping, stimulated radiation damping, ionization cooling, stochastic cooling, electron cooling, laser cooling, and laser cooling with beam coupling. Laser Cooling has provided beams of the lowest temperatures, namely 1 mK, but only for ions and only for the longitudinal temperature. Recent theoretical work has suggested how laser cooling, with the coupling of beam motion, can be used to reduce the ion beam temperature in all three directions. The majority of this paper is devoted to describing laser cooling and laser cooling with beam coupling

  14. Turbine airfoil cooling system with cooling systems using high and low pressure cooling fluids

    Science.gov (United States)

    Marsh, Jan H.; Messmann, Stephen John; Scribner, Carmen Andrew

    2017-10-25

    A turbine airfoil cooling system including a low pressure cooling system and a high pressure cooling system for a turbine airfoil of a gas turbine engine is disclosed. In at least one embodiment, the low pressure cooling system may be an ambient air cooling system, and the high pressure cooling system may be a compressor bleed air cooling system. In at least one embodiment, the compressor bleed air cooling system in communication with a high pressure subsystem that may be a snubber cooling system positioned within a snubber. A delivery system including a movable air supply tube may be used to separate the low and high pressure cooling subsystems. The delivery system may enable high pressure cooling air to be passed to the snubber cooling system separate from low pressure cooling fluid supplied by the low pressure cooling system to other portions of the turbine airfoil cooling system.

  15. Power electronics cooling apparatus

    Science.gov (United States)

    Sanger, Philip Albert; Lindberg, Frank A.; Garcen, Walter

    2000-01-01

    A semiconductor cooling arrangement wherein a semiconductor is affixed to a thermally and electrically conducting carrier such as by brazing. The coefficient of thermal expansion of the semiconductor and carrier are closely matched to one another so that during operation they will not be overstressed mechanically due to thermal cycling. Electrical connection is made to the semiconductor and carrier, and a porous metal heat exchanger is thermally connected to the carrier. The heat exchanger is positioned within an electrically insulating cooling assembly having cooling oil flowing therethrough. The arrangement is particularly well adapted for the cooling of high power switching elements in a power bridge.

  16. Semioptimal practicable algorithmic cooling

    International Nuclear Information System (INIS)

    Elias, Yuval; Mor, Tal; Weinstein, Yossi

    2011-01-01

    Algorithmic cooling (AC) of spins applies entropy manipulation algorithms in open spin systems in order to cool spins far beyond Shannon's entropy bound. Algorithmic cooling of nuclear spins was demonstrated experimentally and may contribute to nuclear magnetic resonance spectroscopy. Several cooling algorithms were suggested in recent years, including practicable algorithmic cooling (PAC) and exhaustive AC. Practicable algorithms have simple implementations, yet their level of cooling is far from optimal; exhaustive algorithms, on the other hand, cool much better, and some even reach (asymptotically) an optimal level of cooling, but they are not practicable. We introduce here semioptimal practicable AC (SOPAC), wherein a few cycles (typically two to six) are performed at each recursive level. Two classes of SOPAC algorithms are proposed and analyzed. Both attain cooling levels significantly better than PAC and are much more efficient than the exhaustive algorithms. These algorithms are shown to bridge the gap between PAC and exhaustive AC. In addition, we calculated the number of spins required by SOPAC in order to purify qubits for quantum computation. As few as 12 and 7 spins are required (in an ideal scenario) to yield a mildly pure spin (60% polarized) from initial polarizations of 1% and 10%, respectively. In the latter case, about five more spins are sufficient to produce a highly pure spin (99.99% polarized), which could be relevant for fault-tolerant quantum computing.

  17. Space Logistics: Launch Capabilities

    Science.gov (United States)

    Furnas, Randall B.

    1989-01-01

    The current maximum launch capability for the United States are shown. The predicted Earth-to-orbit requirements for the United States are presented. Contrasting the two indicates the strong National need for a major increase in Earth-to-orbit lift capability. Approximate weights for planned payloads are shown. NASA is studying the following options to meet the need for a new heavy-lift capability by mid to late 1990's: (1) Shuttle-C for near term (include growth versions); and (2) the Advanced Lauching System (ALS) for the long term. The current baseline two-engine Shuttle-C has a 15 x 82 ft payload bay and an expected lift capability of 82,000 lb to Low Earth Orbit. Several options are being considered which have expanded diameter payload bays. A three-engine Shuttle-C with an expected lift of 145,000 lb to LEO is being evaluated as well. The Advanced Launch System (ALS) is a potential joint development between the Air Force and NASA. This program is focused toward long-term launch requirements, specifically beyond the year 2000. The basic approach is to develop a family of vehicles with the same high reliability as the Shuttle system, yet offering a much greater lift capability at a greatly reduced cost (per pound of payload). The ALS unmanned family of vehicles will provide a low end lift capability equivalent to Titan IV, and a high end lift capability greater than the Soviet Energia if requirements for such a high-end vehicle are defined.In conclusion, the planning of the next generation space telescope should not be constrained to the current launch vehicles. New vehicle designs will be driven by the needs of anticipated heavy users.

  18. A Low Mass On-Chip Readout Scheme for Double-Sided Silicon Strip Detectors

    Energy Technology Data Exchange (ETDEWEB)

    Irmler, C., E-mail: christian.irmler@oeaw.ac.at [HEPHY Vienna – Institute of High Energy Physics of the Austrian Academy of Sciences, Nikolsdorfer Gasse 18, A-1050 Vienna (Austria); Bergauer, T.; Frankenberger, A.; Friedl, M.; Gfall, I. [HEPHY Vienna – Institute of High Energy Physics of the Austrian Academy of Sciences, Nikolsdorfer Gasse 18, A-1050 Vienna (Austria); Higuchi, T. [University of Tokyo, Kavli Institute for Physics and Mathematics of the Universe, 5-1-5 Kashiwanoha, Kashiwa, Chiba 277-8583 (Japan); Ishikawa, A. [Tohoku University, Department of Physics, Aoba Aramaki Aoba-ku, Sendai 980-8578 (Japan); Joo, C. [Seoul National University, High Energy Physics Laboratory, 25-107 Shinlim-dong, Kwanak-gu, Seoul 151-742 (Korea, Republic of); Kah, D.H.; Kang, K.H. [Kyungpook National University, Department of Physics, 1370 Sankyuk Dong, Buk Gu, Daegu 702-701 (Korea, Republic of); Rao, K.K. [Tata Institute of Fundamental Research, Experimental High Energy Physics Group, Homi Bhabha Road, Mumbai 400 005 (India); Kato, E. [Tohoku University, Department of Physics, Aoba Aramaki Aoba-ku, Sendai 980-8578 (Japan); Mohanty, G.B. [Tata Institute of Fundamental Research, Experimental High Energy Physics Group, Homi Bhabha Road, Mumbai 400 005 (India); Negishi, K. [Tohoku University, Department of Physics, Aoba Aramaki Aoba-ku, Sendai 980-8578 (Japan); Onuki, Y.; Shimizu, N. [University of Tokyo, Department of Physics, 7-3-1 Hongo, Bunkyo-ku, Tokyo 113-0033 (Japan); Tsuboyama, T. [KEK, 1-1 Oho, Tsukuba, Ibaraki 305-0801 (Japan); Valentan, M. [HEPHY Vienna – Institute of High Energy Physics of the Austrian Academy of Sciences, Nikolsdorfer Gasse 18, A-1050 Vienna (Austria)

    2013-12-21

    B-factories like the KEKB in Tsukuba, Japan, operate at relatively low energies and thus require detectors with very low material budget in order to minimize multiple scattering. On the other hand, front-end chips with short shaping time like the APV25 have to be placed as close to the sensor strips as possible to reduce the capacitive load, which mainly determines the noise figure. In order to achieve both – minimal material budget and low noise – we developed a readout scheme for double-sided silicon detectors, where the APV25 chips are placed on a flexible circuit, which is glued onto the top side of the sensor. The bottom-side strips are connected by two flexible circuits, which are bent around the edge of the sensor. This so-called “Origami” design will be utilized to build the Silicon Vertex Detector of the Belle II experiment, which will consist of four layers made from ladders with up to five double-sided silicon strip sensors in a row. Each ladder will be supported by two ribs made of a carbon fiber and Airex foam core sandwich. The heat dissipated by the front-end chips will be removed by a highly efficient two-phase CO{sub 2} system. Thanks to the Origami concept, all APV25 chips are aligned in a row and thus can be cooled by a single thin cooling pipe per ladder. We present the concept and the assembly procedure of the Origami chip-on-sensor modules.

  19. A Low Mass On-Chip Readout Scheme for Double-Sided Silicon Strip Detectors

    International Nuclear Information System (INIS)

    Irmler, C.; Bergauer, T.; Frankenberger, A.; Friedl, M.; Gfall, I.; Higuchi, T.; Ishikawa, A.; Joo, C.; Kah, D.H.; Kang, K.H.; Rao, K.K.; Kato, E.; Mohanty, G.B.; Negishi, K.; Onuki, Y.; Shimizu, N.; Tsuboyama, T.; Valentan, M.

    2013-01-01

    B-factories like the KEKB in Tsukuba, Japan, operate at relatively low energies and thus require detectors with very low material budget in order to minimize multiple scattering. On the other hand, front-end chips with short shaping time like the APV25 have to be placed as close to the sensor strips as possible to reduce the capacitive load, which mainly determines the noise figure. In order to achieve both – minimal material budget and low noise – we developed a readout scheme for double-sided silicon detectors, where the APV25 chips are placed on a flexible circuit, which is glued onto the top side of the sensor. The bottom-side strips are connected by two flexible circuits, which are bent around the edge of the sensor. This so-called “Origami” design will be utilized to build the Silicon Vertex Detector of the Belle II experiment, which will consist of four layers made from ladders with up to five double-sided silicon strip sensors in a row. Each ladder will be supported by two ribs made of a carbon fiber and Airex foam core sandwich. The heat dissipated by the front-end chips will be removed by a highly efficient two-phase CO 2 system. Thanks to the Origami concept, all APV25 chips are aligned in a row and thus can be cooled by a single thin cooling pipe per ladder. We present the concept and the assembly procedure of the Origami chip-on-sensor modules

  20. Microfluidic photoinduced chemical oxidation for Ru(bpy)33 + chemiluminescence - A comprehensive experimental comparison with on-chip direct chemical oxidation

    Science.gov (United States)

    Kadavilpparampu, Afsal Mohammed; Al Lawati, Haider A. J.; Suliman, Fakhr Eldin O.

    2017-08-01

    For the first time, the analytical figures of merit in detection capabilities of the very less explored photoinduced chemical oxidation method for Ru(bpy)32 + CL has been investigated in detail using 32 structurally different analytes. It was carried out on-chip using peroxydisulphate and visible light and compared with well-known direct chemical oxidation approaches using Ce(IV). The analytes belong to various chemical classes such as tertiary amine, secondary amine, sulphonamide, betalactam, thiol and benzothiadiazine. Influence of detection environment on CL emission with respect to method of oxidation was evaluated by changing the buffers and pH. The photoinduced chemical oxidation exhibited more universal nature for Ru(bpy)32 + CL in detection towards selected analytes. No additional enhancers, reagents, or modification in instrumental configuration were required. Wide detectability and enhanced emission has been observed for analytes from all the chemical classes when photoinduced chemical oxidation was employed. Some of these analytes are reported for the first time under photoinduced chemical oxidation like compounds from sulphonamide, betalactam, thiol and benzothiadiazine class. On the other hand, many of the selected analytes including tertiary and secondary amines such as cetirizine, azithromycin fexofenadine and proline did not produced any analytically useful CL signal (S/N = 3 or above for 1 μgmL- 1 analyte) under chemical oxidation. The most fascinating observations was in the detection limits; for example ofloxacin was 15 times more intense with a detection limit of 5.81 × 10- 10 M compared to most lowest ever reported 6 × 10- 9 M. Earlier, penicillamine was detected at 0.1 μg mL- 1 after derivatization using photoinduced chemical oxidation, but in this study, we improved it to 5.82 ng mL- 1 without any prior derivatization. The detection limits of many other analytes were also found to be improved by several orders of magnitude under