WorldWideScience

Sample records for on-chip cooling capability

  1. On-chip magnetic cooling of a nanoelectronic device

    Science.gov (United States)

    Bradley, D. I.; Guénault, A. M.; Gunnarsson, D.; Haley, R. P.; Holt, S.; Jones, A. T.; Pashkin, Yu. A.; Penttilä, J.; Prance, J. R.; Prunnila, M.; Roschier, L.

    2017-04-01

    We demonstrate significant cooling of electrons in a nanostructure below 10 mK by demagnetisation of thin-film copper on a silicon chip. Our approach overcomes the typical bottleneck of weak electron-phonon scattering by coupling the electrons directly to a bath of refrigerated nuclei, rather than cooling via phonons in the host lattice. Consequently, weak electron-phonon scattering becomes an advant- age. It allows the electrons to be cooled for an experimentally useful period of time to temperatures colder than the dilution refrigerator platform, the incoming electrical connections, and the host lattice. There are efforts worldwide to reach sub-millikelvin electron temperatures in nanostructures to study coherent electronic phenomena and improve the operation of nanoelectronic devices. On-chip magnetic cooling is a promising approach to meet this challenge. The method can be used to reach low, local electron temperatures in other nanostructures, obviating the need to adapt traditional, large demagnetisation stages. We demonstrate the technique by applying it to a nanoelectronic primary thermometer that measures its internal electron temperature. Using an optimised demagnetisation process, we demonstrate cooling of the on-chip electrons from 9 mK to below 5 mK for over 1000 seconds.

  2. Scattering detection using a photonic-microfluidic integrated device with on-chip collection capabilities.

    Science.gov (United States)

    Watts, Benjamin R; Zhang, Zhiyi; Xu, Chang Qing; Cao, Xudong; Lin, Min

    2014-02-01

    SU-8-based photonic-microfluidic integrated devices with on-chip beam shaping and collection capabilities were demonstrated in a scattering detection and counting application. Through the proper deployment of the tailored beam geometries via the on-chip excitation optics, excellent CV values were measured for 1, 2, and 5 μm blank beads, 16.4, 11.0, and 12.5%, respectively, coupled with a simple free-space optical detection scheme. The performance of these devices was found dependent on the combination of on-chip, lens-shaped beam geometry and bead size. While very low CVs were obtained when the combination was ideal, a nonideal combination could still result in acceptable CVs for flow cytometry; the reliability was confirmed via devices being able to resolve separate populations of 2.0 and 5.0 μm beads from their mixture with low CV values of 15.9 and 18.5%, respectively. On-chip collection using integrated on-chip optical waveguides was shown to be very reliable in comparison with a free-space collection scheme, yielding a coincident rate of 94.2%. A CV as low as 19.2% was obtained from the on-chip excitation and collection of 5 μm beads when the on-chip lens-shaped beam had a 6.0-μm beam waist.

  3. INFLUENCE OF CUTTING ZONE COOLING METHOD ON CHIP FORMING CONDITIONS

    Directory of Open Access Journals (Sweden)

    E. E. Feldshtein

    2014-01-01

    Full Text Available The paper considers an influence of a cutting zone cooling method on the chip shape and thickening ratio while turning R35 steel with the hardness of НВ 1250 МРа. Cutting with various types of cooling - dry, compressed air and emulsion fog has been investigated in the paper. OPORTET RG-2 emulsol with emulsion concentration of 4% has been used as an active substation. Cutting tool is a turning cutter with a changeable square plate SNUN120408 made of Р25 hard alloy with multilayer wear-resistant coating, upper titanium nitride layer. Front plate surface is flat. Range of cutting speeds - 80-450 m/min, motions - 0,1-0,5 mm/rev, emulsion flow - 1,5-3,5 g/min and compressed air - 4,5-7,0 m3/h, cutting depth - 1,0 mm. In order to reduce a number of single investigations it is possible to use plans based on ЛПх-sequences.It has been shown that the method for cutting zone cooling exerts significant influence on conditions for chip formation. Regression equation describing influence of machining conditions on Ка-chip thickening ratio has been obtained in the paper. The range of cutting modes is extended while using emulsion fog for cooling. In the process of these modes chip is formed in the shape of short spiral fragments or elements. Favourable form of chips is ensured while using the following rate of emulsion - not more than 2 g/min. The investigations have made it possible to determine conditions required for cooling emulsion fog. In this case it has been observed minimum values in chip thickening ratio and chip shape that ensures its easy removal from cutting zone. While making dry turning values of Ка is higher not less than 15 % in comparison with other methods for cutting zone cooling.

  4. On-chip optical detection of laser cooled atoms.

    Science.gov (United States)

    Quinto-Su, P; Tscherneck, M; Holmes, M; Bigelow, N

    2004-10-18

    We have used an optical fiber based system to implement optical detection of atoms trapped on a reflective "atom-chip". A fiber pair forms an emitter-detector setup that is bonded to the atom-chip surface to optically detect and probe laser cooled atoms trapped in a surface magneto-optical trap. We demonstrate the utility of this scheme by measuring the linewidth of the Cs D2 line at different laser intensities.

  5. Experimental assessment of on-chip liquid cooling through microchannels with de-ionized water and diluted ethylene glycol

    Science.gov (United States)

    Won, Yonghyun; Kim, Sungdong; Eunkyung Kim, Sarah

    2016-06-01

    Recent progress in Si IC devices, which results in an increase in power density and decrease in device size, poses various thermal challenges owing to high heat dissipation. Therefore, conventional cooling techniques become ineffective and produce a thermal bottleneck. In this study, an on-chip liquid cooling module with microchannels and through Si via (TSV) was fabricated, and cooling characteristics were evaluated by IR measurements. Both the microchannels and TSVs were fabricated in a Si wafer by deep reactive ion etching (DRIE) and the wafer was bonded with a glass wafer by a anodic bonding. The fabricated liquid cooling sample was evaluated using two different coolants (de-ionized water and 70 wt % diluted ethylene glycol), and the effect of coolants on cooling characteristics was investigated.

  6. Heat management in integrated circuits on-chip and system-level monitoring and cooling

    CERN Document Server

    Ogrenci-Memik, Seda

    2016-01-01

    This essential overview covers the subject of thermal monitoring and management in integrated circuits. Specifically, it focuses on devices and materials that are intimately integrated on-chip (as opposed to in-package or on-board) for the purposes of thermal monitoring and thermal management.

  7. An ultra-low power CMOS image sensor with on-chip energy harvesting and power management capability.

    Science.gov (United States)

    Cevik, Ismail; Huang, Xiwei; Yu, Hao; Yan, Mei; Ay, Suat U

    2015-03-06

    An ultra-low power CMOS image sensor with on-chip energy harvesting and power management capability is introduced in this paper. The photodiode pixel array can not only capture images but also harvest solar energy. As such, the CMOS image sensor chip is able to switch between imaging and harvesting modes towards self-power operation. Moreover, an on-chip maximum power point tracking (MPPT)-based power management system (PMS) is designed for the dual-mode image sensor to further improve the energy efficiency. A new isolated P-well energy harvesting and imaging (EHI) pixel with very high fill factor is introduced. Several ultra-low power design techniques such as reset and select boosting techniques have been utilized to maintain a wide pixel dynamic range. The chip was designed and fabricated in a 1.8 V, 1P6M 0.18 µm CMOS process. Total power consumption of the imager is 6.53 µW for a 96 × 96 pixel array with 1 V supply and 5 fps frame rate. Up to 30 μW of power could be generated by the new EHI pixels. The PMS is capable of providing 3× the power required during imaging mode with 50% efficiency allowing energy autonomous operation with a 72.5% duty cycle.

  8. Organs-on-Chips with combined multi-electrode array and transepithelial electrical resistance measurement capabilities.

    Science.gov (United States)

    Maoz, Ben M; Herland, Anna; Henry, Olivier Y F; Leineweber, William D; Yadid, Moran; Doyle, John; Mannix, Robert; Kujala, Ville J; FitzGerald, Edward A; Parker, Kevin Kit; Ingber, Donald E

    2017-06-27

    Here we demonstrate that microfluidic cell culture devices, known as Organs-on-a-Chips can be fabricated with multifunctional, real-time, sensing capabilities by integrating both multi-electrode arrays (MEAs) and electrodes for transepithelial electrical resistance (TEER) measurements into the chips during their fabrication. To prove proof-of-concept, simultaneous measurements of cellular electrical activity and tissue barrier function were carried out in a dual channel, endothelialized, heart-on-a-chip device containing human cardiomyocytes and a channel-separating porous membrane covered with a primary human endothelial cell monolayer. These studies confirmed that the TEER-MEA chip can be used to simultaneously detect dynamic alterations of vascular permeability and cardiac function in the same chip when challenged with the inflammatory stimulus tumor necrosis factor alpha (TNF-α) or the cardiac targeting drug isoproterenol. Thus, this Organ Chip with integrated sensing capability may prove useful for real-time assessment of biological functions, as well as response to therapeutics.

  9. A polymer lab-on-a-chip for magnetic immunoassay with on-chip sampling and detection capabilities.

    Science.gov (United States)

    Do, Jaephil; Ahn, Chong H

    2008-04-01

    This paper presents a new polymer lab-on-a-chip for magnetic bead-based immunoassay with fully on-chip sampling and detection capabilities, which provides a smart platform of magnetic immunoassay-based lab-on-a-chip for point-of-care testing (POCT) toward biochemical hazardous agent detection, food inspection or clinical diagnostics. In this new approach, the polymer lab-on-a-chip for magnetic bead-based immunoassay consists of a magnetic bead-based separator, an interdigitated array (IDA) micro electrode, and a microfluidic system, which are fully incorporated into a lab-on-a-chip on cyclic olefin copolymer (COC). Since the polymer lab-on-a-chip was realized using low cost, high throughput polymer microfabrication techniques such as micro injection molding and hot embossing method, a disposable polymer lab-on-a-chip for the magnetic bead-based immunoassay can be successfully realized in a disposable platform. With this newly developed polymer lab-on-a-chip, an enzyme-labelled electrochemical immunoassay (ECIA) was performed using magnetic beads as the mobile solid support, and the final enzyme product produced from the ECIA was measured using chronoamperometry. A sampling and detection of as low as 16.4 ng mL(-1) of mouse IgG has been successfully performed in 35 min for the entire procedure.

  10. A Low-Power Integrated Smart Sensor with on-Chip Real-Time Image Processing Capabilities

    Directory of Open Access Journals (Sweden)

    Barbaro Massimo

    2005-01-01

    Full Text Available A low-power, CMOS retina with real-time, pixel-level processing capabilities is presented. Features extraction and edge-enhancement are implemented with fully programmable 1D Gabor convolutions. An equivalent computation rate of 3 GOPS is obtained at the cost of very low-power consumption ( W per pixel, providing real-time performances ( microseconds for overall computation, . Experimental results from the first realized prototype show a very good matching between measures and expected outputs.

  11. A Low-Power Integrated Smart Sensor with on-Chip Real-Time Image Processing Capabilities

    Science.gov (United States)

    Barbaro, Massimo; Raffo, Luigi

    2005-12-01

    A low-power, CMOS retina with real-time, pixel-level processing capabilities is presented. Features extraction and edge-enhancement are implemented with fully programmable 1D Gabor convolutions. An equivalent computation rate of 3 GOPS is obtained at the cost of very low-power consumption ([InlineEquation not available: see fulltext.][InlineEquation not available: see fulltext.]W per pixel), providing real-time performances ([InlineEquation not available: see fulltext.] microseconds for overall computation,[InlineEquation not available: see fulltext.]). Experimental results from the first realized prototype show a very good matching between measures and expected outputs.

  12. Validation of Heat Transfer and Film Cooling Capabilities of the 3-D RANS Code TURBO

    Science.gov (United States)

    Shyam, Vikram; Ameri, Ali; Chen, Jen-Ping

    2010-01-01

    The capabilities of the 3-D unsteady RANS code TURBO have been extended to include heat transfer and film cooling applications. The results of simulations performed with the modified code are compared to experiment and to theory, where applicable. Wilcox s k-turbulence model has been implemented to close the RANS equations. Two simulations are conducted: (1) flow over a flat plate and (2) flow over an adiabatic flat plate cooled by one hole inclined at 35 to the free stream. For (1) agreement with theory is found to be excellent for heat transfer, represented by local Nusselt number, and quite good for momentum, as represented by the local skin friction coefficient. This report compares the local skin friction coefficients and Nusselt numbers on a flat plate obtained using Wilcox's k-model with the theory of Blasius. The study looks at laminar and turbulent flows over an adiabatic flat plate and over an isothermal flat plate for two different wall temperatures. It is shown that TURBO is able to accurately predict heat transfer on a flat plate. For (2) TURBO shows good qualitative agreement with film cooling experiments performed on a flat plate with one cooling hole. Quantitatively, film effectiveness is under predicted downstream of the hole.

  13. NGNP: High Temperature Gas-Cooled Reactor Key Definitions, Plant Capabilities, and Assumptions

    Energy Technology Data Exchange (ETDEWEB)

    Phillip Mills

    2012-02-01

    This document is intended to provide a Next Generation Nuclear Plant (NGNP) Project tool in which to collect and identify key definitions, plant capabilities, and inputs and assumptions to be used in ongoing efforts related to the licensing and deployment of a high temperature gas-cooled reactor (HTGR). These definitions, capabilities, and assumptions are extracted from a number of sources, including NGNP Project documents such as licensing related white papers [References 1-11] and previously issued requirement documents [References 13-15]. Also included is information agreed upon by the NGNP Regulatory Affairs group's Licensing Working Group and Configuration Council. The NGNP Project approach to licensing an HTGR plant via a combined license (COL) is defined within the referenced white papers and reference [12], and is not duplicated here.

  14. Recent Advance in Thermoelectric Devices for Electronics Cooling

    Science.gov (United States)

    Wang, Peng

    Thermal management of on-chip hot spot, with a heat flux of around 1000 W/cm2, has become one of the major challenges in the development of next-generation microprocessors. Solid state thermoelectric cooler (TEC) offers great promise for hot spot thermal management because of their compact structure, fast response, high reliability, localized cooling, and high flux removal capability. To date TEC has received great attentions in electronics cooling community as one of the potential hot spot cooling solutions. In this paper, recent development and application of hot spot cooling strategies based on micro thermoelectric technologies will be reviewed and discussed, three hot spot cooling concepts, including thinfilm thermoelectric cooling, mini-contact cooling, and semiconductor selfcooling in silicon substrate and germanium substrate will be discussed. The advantages and disadvantages of these on-chip cooling solutions for high flux hot spots will be evaluated.

  15. The heat removal capability of actively cooled plasma-facing components for the ITER divertor

    Science.gov (United States)

    Missirlian, M.; Richou, M.; Riccardi, B.; Gavila, P.; Loarer, T.; Constans, S.

    2011-12-01

    Non-destructive examination followed by high-heat-flux testing was performed for different small- and medium-scale mock-ups; this included the most recent developments related to actively cooled tungsten (W) or carbon fibre composite (CFC) armoured plasma-facing components. In particular, the heat-removal capability of these mock-ups manufactured by European companies with all the main features of the ITER divertor design was investigated both after manufacturing and after thermal cycling up to 20 MW m-2. Compliance with ITER requirements was explored in terms of bonding quality, heat flux performances and operational compatibility. The main results show an overall good heat-removal capability after the manufacturing process independent of the armour-to-heat sink bonding technology and promising behaviour with respect to thermal fatigue lifetime under heat flux up to 20 MW m-2 for the CFC-armoured tiles and 15 MW m-2 for the W-armoured tiles, respectively.

  16. Analysis of Time-Dependent Tritium Breeding Capability of Water Cooled Ceramic Breeder Blanket for CFETR

    Science.gov (United States)

    Gao, Fangfang; Zhang, Xiaokang; Pu, Yong; Zhu, Qingjun; Liu, Songlin

    2016-08-01

    Attaining tritium self-sufficiency is an important mission for the Chinese Fusion Engineering Testing Reactor (CFETR) operating on a Deuterium-Tritium (D-T) fuel cycle. It is necessary to study the tritium breeding ratio (TBR) and breeding tritium inventory variation with operation time so as to provide an accurate data for dynamic modeling and analysis of the tritium fuel cycle. A water cooled ceramic breeder (WCCB) blanket is one candidate of blanket concepts for the CFETR. Based on the detailed 3D neutronics model of CFETR with the WCCB blanket, the time-dependent TBR and tritium surplus were evaluated by a coupling calculation of the Monte Carlo N-Particle Transport Code (MCNP) and the fusion activation code FISPACT-2007. The results indicated that the TBR and tritium surplus of the WCCB blanket were a function of operation time and fusion power due to the Li consumption in breeder and material activation. In addition, by comparison with the results calculated by using the 3D neutronics model and employing the transfer factor constant from 1D to 3D, it is noted that 1D analysis leads to an over-estimation for the time-dependent tritium breeding capability when fusion power is larger than 1000 MW. supported by the National Magnetic Confinement Fusion Science Program of China (Nos. 2013GB108004, 2015GB108002, and 2014GB119000), and by National Natural Science Foundation of China (No. 11175207)

  17. Design study of lead bismuth cooled fast reactors and capability of natural circulation

    Energy Technology Data Exchange (ETDEWEB)

    Oktamuliani, Sri, E-mail: srioktamuliani@ymail.com; Su’ud, Zaki, E-mail: szaki@fi.itb.ac.id [Nuclear and Reactor Physics Laboratory, FMIPA, ITB, Physics Buildings, Jl. Ganesha 10, Bandung 40132 (Indonesia)

    2015-09-30

    A preliminary study designs SPINNOR (Small Power Reactor, Indonesia, No On-Site Refueling) liquid metal Pb-Bi cooled fast reactors, fuel (U, Pu)N, 150 MWth have been performed. Neutronic calculation uses SRAC which is designed cylindrical core 2D (R-Z) 90 × 135 cm, on the core fuel composed of heterogeneous with percentage difference of PuN 10, 12, 13% and the result of calculation is effective neutron multiplication 1.0488. Power density distribution of the output SRAC is generated for thermal hydraulic calculation using Delphi based on Pascal language that have been developed. The research designed a reactor that is capable of natural circulation at inlet temperature 300 °C with variation of total mass flow rate. Total mass flow rate affect pressure drop and temperature outlet of the reactor core. The greater the total mass flow rate, the smaller the outlet temperature, but increase the pressure drop so that the chimney needed more higher to achieve natural circulation or condition of the system does not require a pump. Optimization of the total mass flow rate produces optimal reactor design on the total mass flow rate of 5000 kg/s with outlet temperature 524,843 °C but require a chimney of 6,69 meters.

  18. Microfluidic on chip viscometers.

    Science.gov (United States)

    Chevalier, J; Ayela, F

    2008-07-01

    We present the design and the process of fabrication of micromachined capillary on chip rheometers which have performed wall shear stress and shear rate measurements on silicon oil and ethanol-based nanofluids. The originality of these devices comes from the fact that local pressure drop measurements are performed inside the microchannels. Thus, the advantage over existing microviscometers is that they can be used with the fluid under test alone; no reference fluid nor posttreatment of the data are needed. Each on chip viscometer consists of anodically bonded silicon-Pyrex derivative microchannels equipped with local probes. The anodic bonding allows to reach relatively high pressure levels (up to approximately 10 bars) in the channels, and a broad range of shear stress and shear rate values is attainable. Dielectrophoretic and electrorheological effects can be highlighted by employing alternate microstripe electrodes patterned onto the inner side of the Pyrex wall.

  19. Liquid nitrogen cooled integrated power electronics module with high current carrying capability and lower on resistance

    Science.gov (United States)

    Ye, Hua; Lee, Changwoo; Simon, Randy W.; Haldar, Pradeep; Hennessy, Michael J.; Mueller, Eduard K.

    2006-11-01

    This letter presents the development of high-performance integrated cryogenic power modules, where both driver components and power metal-oxide semiconductor field-effect transistors are integrated in a single package, to be used in a 50kW prototype cryogenic inverter operating at liquid nitrogen temperature. The authors have demonstrated a compact high-voltage, cryogenic integrated power module that exhibited more than 14 times improvement in on-resistance and continuous current carrying capability exceeding 40A. The modules are designed to operate at liquid nitrogen temperature with extreme thermal cycling. The power electronic modules are necessary components that provide control and switching for second generation, yttrium barium copper oxide-based high temperature superconductor devices including cables, motors, and generators.

  20. Tunable on chip optofluidic laser

    DEFF Research Database (Denmark)

    Bakal, Avraham; Vannahme, Christoph; Kristensen, Anders

    2016-01-01

    On chip tunable laser is demonstrated by realizing a microfluidic droplet array. The periodicity is controlled by the pressure applied to two separate inlets, allowing to tune the lasing frequency over a broad spectral range.......On chip tunable laser is demonstrated by realizing a microfluidic droplet array. The periodicity is controlled by the pressure applied to two separate inlets, allowing to tune the lasing frequency over a broad spectral range....

  1. Highly-integrated lab-on-chip system for point-of-care multiparameter analysis.

    Science.gov (United States)

    Schumacher, Soeren; Nestler, Jörg; Otto, Thomas; Wegener, Michael; Ehrentreich-Förster, Eva; Michel, Dirk; Wunderlich, Kai; Palzer, Silke; Sohn, Kai; Weber, Achim; Burgard, Matthias; Grzesiak, Andrzej; Teichert, Andreas; Brandenburg, Albrecht; Koger, Birgit; Albers, Jörg; Nebling, Eric; Bier, Frank F

    2012-02-07

    A novel innovative approach towards a marketable lab-on-chip system for point-of-care in vitro diagnostics is reported. In a consortium of seven Fraunhofer Institutes a lab-on-chip system called "Fraunhofer ivD-platform" has been established which opens up the possibility for an on-site analysis at low costs. The system features a high degree of modularity and integration. Modularity allows the adaption of common and established assay types of various formats. Integration lets the system move from the laboratory to the point-of-need. By making use of the microarray format the lab-on-chip system also addresses new trends in biomedicine. Research topics such as personalized medicine or companion diagnostics show that multiparameter analyses are an added value for diagnostics, therapy as well as therapy control. These goals are addressed with a low-cost and self-contained cartridge, since reagents, microfluidic actuators and various sensors are integrated within the cartridge. In combination with a fully automated instrumentation (read-out and processing unit) a diagnostic assay can be performed in about 15 min. Via a user-friendly interface the read-out unit itself performs the assay protocol, data acquisition and data analysis. So far, example assays for nucleic acids (detection of different pathogens) and protein markers (such as CRP and PSA) have been established using an electrochemical read-out based on redoxcycling or an optical read-out based on total internal reflectance fluorescence (TIRF). It could be shown that the assay performance within the cartridge is similar to that found for the same assay in a microtiter plate. Furthermore, recent developments are the integration of sample preparation and polymerase chain reaction (PCR) on-chip. Hence, the instrument is capable of providing heating-and-cooling cycles necessary for DNA-amplification. In addition to scientific aspects also the production of such a lab-on-chip system was part of the development since

  2. Reconfigurable Networks-on-Chip

    CERN Document Server

    Chen, Sao-Jie; Tsai, Wen-Chung; Hu, Yu-Hen

    2012-01-01

    This book provides a comprehensive survey of recent progress in the design and implementation of Networks-on-Chip. It addresses a wide spectrum of on-chip communication problems, ranging from physical, network, to application layers. Specific topics that are explored in detail include packet routing, resource arbitration, error control/correction, application mapping, and communication scheduling. Additionally, a novel bi-directional communication channel NoC (BiNoC) architecture is described, with detailed explanation.   Written for practicing engineers in need of practical knowledge about the design and implementation of networks-on-chip; Includes tutorial-like details to introduce readers to a diverse range of NoC designs, as well as in-depth analysis for designers with NoC experience to explore advanced issues; Describes a variety of on-chip communication architectures, including a novel bi-directional communication channel NoC.     From the Foreword: Overall this book shows important advances over the...

  3. On-chip data communication

    NARCIS (Netherlands)

    Schinkel, Daniel

    2011-01-01

    On-chip data communication is an active research area, as interconnects are rapidly becoming a speed, power and reliability bottleneck for digital CMOS systems. Especially for global interconnects that have to span large parts of a chip, there is an increasing gap between transistor speed and interc

  4. On-chip data communication

    NARCIS (Netherlands)

    Schinkel, Daniel

    2011-01-01

    On-chip data communication is an active research area, as interconnects are rapidly becoming a speed, power and reliability bottleneck for digital CMOS systems. Especially for global interconnects that have to span large parts of a chip, there is an increasing gap between transistor speed and

  5. On-chip plasmonic spectrometer.

    Science.gov (United States)

    Tsur, Yuval; Arie, Ady

    2016-08-01

    We report a numerical and experimental study of an on-chip optical spectrometer, utilizing propagating surface plasmon polaritons in the telecom spectral range. The device is based on two holographic gratings, one for coupling, and the other for decoupling free-space radiation with the surface plasmons. This 800 μm×100 μm on-chip spectrometer resolves 17 channels spectrally separated by 3.1 nm, spanning a freely tunable spectral window, and is based on standard lithography fabrication technology. We propose two potential applications for this new device; the first employs the holographic control over the amplitude and phase of the input spectrum, for intrinsically filtering unwanted frequencies, like pump radiation in Raman spectroscopy. The second prospect utilizes the unique plasmonic field enhancement at the metal-dielectric boundary for the spectral analysis of very small samples (e.g., Mie scatterers) placed between the two gratings.

  6. Ion chromatography on-chip.

    Science.gov (United States)

    Murrihy, J P; Breadmore, M C; Tan, A; McEnery, M; Alderman, J; O'Mathuna, C; O'Neill, A P; O'Brien, P; Avdalovic, N; Haddad, P R; Glennon, J D; Advoldvic, N

    2001-07-27

    On-chip separation of inorganic anions by ion-exchange chromatography was realized. Micro separation channels were fabricated on a silicon wafer and sealed with a Pyrex cover plate using standard photolithography, wet and dry chemical etching, and anodic bonding techniques. Quaternary ammonium latex particles were employed for the first time to coat the separation channels on-chip. Owing to the narrow depths of the channels on the chip, 0.5-10 microm, there were more interactions of the analytes with the stationary phase on the chip than in a 50-microm I.D. capillary. With off-chip injection (20 nl) and UV detection, NO2-, NO3-, I-, and thiourea were separated using 1 mM KCl as the eluent. The linear ranges for NO2- and NO3- are from 5 to 1000 microM with the detection limits of 0.5 microM.

  7. Investigations on the heat transport capability of a cryogenic oscillating heat pipe and its application in achieving ultra-fast cooling rates for cell vitrification cryopreservation.

    Science.gov (United States)

    Han, Xu; Ma, Hongbin; Jiao, Anjun; Critser, John K

    2008-06-01

    Theoretically, direct vitrification of cell suspensions with relatively low concentrations ( approximately 1 M) of permeating cryoprotective agents (CPA) is suitable for cryopreservation of almost all cell types and can be accomplished by ultra-fast cooling rates that are on the order of 10(6-7) K/min. However, the methods and devices currently available for cell cryopreservation cannot achieve such high cooling rates. In this study, we constructed a novel cryogenic oscillating heat pipe (COHP) using liquid nitrogen as its working fluid and investigated its heat transport capability to assess its application for achieving ultra-fast cooling rates for cell cryopreservation. The experimental results showed that the apparent heat transfer coefficient of the COHP can reach 2 x 10(5) W/m(2).K, which is two orders of the magnitude higher than traditional heat pipes. Theoretical analyzes showed that the average local heat transfer coefficient in the thin film evaporation region of the COHP can reach 1.2 x 10(6) W/m(2).K, which is approximately 10(3) times higher than that achievable with standard pool-boiling approaches. Based on these results, a novel device design applying the COHP and microfabrication techniques is proposed and its efficiency for cell vitrification is demonstrated through numerical simulation. The estimated average cooling rates achieved through this approach is 10(6-7)K/min, which is much faster than the currently available methods and sufficient for achieving vitrification with relatively low concentrations of CPA.

  8. An Assessment of NASA Glenn's Aeroacoustic Experimental and Predictive Capabilities for Installed Cooling Fans. Part 1; Aerodynamic Performance

    Science.gov (United States)

    VanZante, Dale E.; Koch, L. Danielle; Wernet, Mark P.; Podboy, Gary G.

    2006-01-01

    Driven by the need for low production costs, electronics cooling fans have evolved differently than the bladed components of gas turbine engines which incorporate multiple technologies to enhance performance and durability while reducing noise emissions. Drawing upon NASA Glenn's experience in the measurement and prediction of gas turbine engine aeroacoustic performance, tests have been conducted to determine if these tools and techniques can be extended for application to the aerodynamics and acoustics of electronics cooling fans. An automated fan plenum installed in NASA Glenn's Acoustical Testing Laboratory was used to map the overall aerodynamic and acoustic performance of a spaceflight qualified 80 mm diameter axial cooling fan. In order to more accurately identify noise sources, diagnose performance limiting aerodynamic deficiencies, and validate noise prediction codes, additional aerodynamic measurements were recorded for two operating points: free delivery and a mild stall condition. Non-uniformities in the fan s inlet and exhaust regions captured by Particle Image Velocimetry measurements, and rotor blade wakes characterized by hot wire anemometry measurements provide some assessment of the fan aerodynamic performance. The data can be used to identify fan installation/design changes which could enlarge the stable operating region for the fan and improve its aerodynamic performance and reduce noise emissions.

  9. Operating Modes and Cooling Capabilities of the Flight ADR for the SXS Instrument on Astro-H

    Science.gov (United States)

    Shirron, Peter; Kimball, Mark; DiPirro, Michael

    2015-01-01

    The microcalorimeter array on the Soft X-ray Spectrometer instrument on Astro-H requires cooling to 50 mK, which will be accomplished by a 3-stage adiabatic demagnetization refrigerator (ADR). The ADR is surrounded by a cryogenic system consisting of a superfluid helium tank, a 4.5 K Joule-Thomson (JT) cryocooler, and additional 2-stage Stirling cryocoolers that pre-cool the JT cooler and radiation shields within the cryostat. The unique ADR design allows the instrument to meet all of its science requirements using either the stored cryogen or the JT cryocooler as its heat sink, giving the instrument an unusual degree of tolerance for component failures or degradation in the cryogenic system. The flight detector assembly, ADR and dewar were integrated in early 2014, and have since been extensively characterized and calibrated. At present, the four instruments are being integrated with the spacecraft in preparation for an early 2016 launch. This presentation summarizes the operation and performance of the ADR in all of its operating modes.

  10. Inkjet printed structures for smart lab-on-chip systems

    Science.gov (United States)

    Beckert, E.; Eberhardt, R.; Pabst, Oliver; Kemper, Falk; Shu, Zhe; Tünnermann, Andreas; Perelaer, Jolke; Schubert, Ulrich; Becker, Holger

    2013-03-01

    Inkjet printing is a digital printing technique that is capable of depositing not only inks, but functional materials onto different substrates in an additive way. In this paper, applications of inkjet printed structures for microfluidic lab-on-chip systems are discussed. Such systems are promising for different chemical or biochemical analysis tasks carried out at the Point-of-Care level and therefore due to cost reasons are often fabricated from polymers. The paper discusses inkjetprinted wiring structures and electroactive polymer (EAP) actuators for use in microfluidic lab-on-chip systems. Silver and gold wirings are shown that are fabricated by printing metal nanoparticle inks onto polymer substrates. After printing the structures are sintered using argon plasma sintering, a low-temperature sintering process that is compatible with polymer substrates. The wirings consist of several electrode like structures and contact pads and feature minimum structure sizes of approximately 70 μm. They can be used for electrodes, fluid presence detectors and localized ohmic heaters in lab-on-chip systems. Based on that an all inkjet-printed EAP actuator then is discussed. Membrane-type bending actuators generate deflections of approximately 5 μm when being driven at a resonance frequency of 1.8 kHz with 110 V. Derived from that and assuming passive valves on-chip pumping rates in the range of 0.5 ml/min can be estimated.

  11. On-Chip Detection of Cellular Activity

    Science.gov (United States)

    Almog, R.; Daniel, R.; Vernick, S.; Ron, A.; Ben-Yoav, H.; Shacham-Diamand, Y.

    The use of on-chip cellular activity monitoring for biological/chemical sensing is promising for environmental, medical and pharmaceutical applications. The miniaturization revolution in microelectronics is harnessed to provide on-chip detection of cellular activity, opening new horizons for miniature, fast, low cost and portable screening and monitoring devices. In this chapter we survey different on-chip cellular activity detection technologies based on electrochemical, bio-impedance and optical detection. Both prokaryotic and eukaryotic cell-on-chip technologies are mentioned and reviewed.

  12. Physiologically relevant organs on chips.

    Science.gov (United States)

    Yum, Kyungsuk; Hong, Soon Gweon; Healy, Kevin E; Lee, Luke P

    2014-01-01

    Recent advances in integrating microengineering and tissue engineering have generated promising microengineered physiological models for experimental medicine and pharmaceutical research. Here we review the recent development of microengineered physiological systems, or also known as "ogans-on-chips", that reconstitute the physiologically critical features of specific human tissues and organs and their interactions. This technology uses microengineering approaches to construct organ-specific microenvironments, reconstituting tissue structures, tissue-tissue interactions and interfaces, and dynamic mechanical and biochemical stimuli found in specific organs, to direct cells to assemble into functional tissues. We first discuss microengineering approaches to reproduce the key elements of physiologically important, dynamic mechanical microenvironments, biochemical microenvironments, and microarchitectures of specific tissues and organs in microfluidic cell culture systems. This is followed by examples of microengineered individual organ models that incorporate the key elements of physiological microenvironments into single microfluidic cell culture systems to reproduce organ-level functions. Finally, microengineered multiple organ systems that simulate multiple organ interactions to better represent human physiology, including human responses to drugs, is covered in this review. This emerging organs-on-chips technology has the potential to become an alternative to 2D and 3D cell culture and animal models for experimental medicine, human disease modeling, drug development, and toxicology.

  13. On-chip photonic interconnects a computer architect's perspective

    CERN Document Server

    Nitta, Christopher J; Akella, Venkatesh

    2013-01-01

    As the number of cores on a chip continues to climb, architects will need to address both bandwidth and power consumption issues related to the interconnection network. Electrical interconnects are not likely to scale well to a large number of processors for energy efficiency reasons, and the problem is compounded by the fact that there is a fixed total power budget for a die, dictated by the amount of heat that can be dissipated without special (and expensive) cooling and packaging techniques. Thus, there is a need to seek alternatives to electrical signaling for on-chip interconnection appli

  14. Asynchronous design of Networks-on-Chip

    DEFF Research Database (Denmark)

    Sparsø, Jens

    2007-01-01

    The Network-on-chip concept has evolved as a solution to a broad range of problems related to the design of complex systems-on-chip (SoC) with tenths or hundreds of (heterogeneous) IP-cores. The paper introduces the NoC concept, identifies a range of possible timing organizations (globally...

  15. Towards Dependable Network-on-Chip Architectures

    NARCIS (Netherlands)

    Chen, C.

    2015-01-01

    The aggressive semiconductor technology scaling provides the means for doubling the amount of transistors on a single chip each and every 18 months. To efficiently utilize these vast chip resources, Multi-Processor Systems on Chip (MPSoCs) integrated with a Network-on-Chip (NoC) communication infras

  16. On-Chip Random Spectrometer

    CERN Document Server

    Redding, Brandon; Sarma, Raktim

    2013-01-01

    Light scattering in disordered media has been studied extensively due to its prevalence in natural and artificial systems [1]. In the field of photonics most of the research has focused on understanding and mitigating the effects of scattering, which are often detrimental. For certain applications, however, intentionally introducing disorder can actually improve the device performance, e.g., in photovoltaics optical scattering improves the efficiency of light harvesting [2-5]. Here, we utilize multiple scattering in a random photonic structure to build a compact on-chip spectrometer. The probe signal diffuses through a scattering medium generating wavelength-dependent speckle patterns which can be used to recover the input spectrum after calibration. Multiple scattering increases the optical pathlength by folding the paths in a confined geometry, enhancing the spectral decorrelation of speckle patterns and thus increasing the spectral resolution. By designing and fabricating the spectrometer on a silicon wafe...

  17. On-chip spiral spectrometer

    CERN Document Server

    Redding, Brandon; Bromberg, Yaron; Sarma, Raktim; Cao, Hui

    2016-01-01

    We designed an on-chip spectrometer based on an evanescently-coupled multimode spiral waveguide. Interference between the modes in the waveguide forms a wavelength-dependent speckle pattern which can be used as a fingerprint to identify the input wavelength after calibration. Evanescent coupling between neighboring arms of the spiral enhances the temporal spread of light propagating through the spiral, leading to a dramatic increase in the spectral resolution. Experimentally, we demonstrated that a 250 {\\mu}m radius spiral spectrometer provides a resolution of 0.01 nm at a wavelength of 1520 nm. Spectra containing 40 independent spectral channels can be recovered simultaneously and the operation bandwidth can be increased further when measuring sparse spectra.

  18. Photonic network-on-chip design

    CERN Document Server

    Bergman, Keren; Biberman, Aleksandr; Chan, Johnnie; Hendry, Gilbert

    2013-01-01

    This book provides a comprehensive synthesis of the theory and practice of photonic devices for networks-on-chip. It outlines the issues in designing photonic network-on-chip architectures for future many-core high performance chip multiprocessors. The discussion is built from the bottom up: starting with the design and implementation of key photonic devices and building blocks, reviewing networking and network-on-chip theory and existing research, and finishing with describing various architectures, their characteristics, and the impact they will have on a computing system. After acquainting

  19. Cooling by Thermodynamic Induction

    Science.gov (United States)

    Patitsas, S. N.

    2017-03-01

    A method is described for cooling conductive channels to below ambient temperature. The thermodynamic induction principle dictates that the electrically biased channel will cool if the electrical conductance decreases with temperature. The extent of this cooling is calculated in detail for both cases of ballistic and conventional transport with specific calculations for carbon nanotubes and conventional metals, followed by discussions for semiconductors, graphene, and metal-insulator transition systems. A theorem is established for ballistic transport stating that net cooling is not possible. For conventional transport, net cooling is possible over a broad temperature range, with the range being size-dependent. A temperature clamping scheme for establishing a metastable nonequilibrium stationary state is detailed and followed with discussion of possible applications to on-chip thermoelectric cooling in integrated circuitry and quantum computer systems.

  20. Cooling by Thermodynamic Induction

    Science.gov (United States)

    Patitsas, S. N.

    2016-11-01

    A method is described for cooling conductive channels to below ambient temperature. The thermodynamic induction principle dictates that the electrically biased channel will cool if the electrical conductance decreases with temperature. The extent of this cooling is calculated in detail for both cases of ballistic and conventional transport with specific calculations for carbon nanotubes and conventional metals, followed by discussions for semiconductors, graphene, and metal-insulator transition systems. A theorem is established for ballistic transport stating that net cooling is not possible. For conventional transport, net cooling is possible over a broad temperature range, with the range being size-dependent. A temperature clamping scheme for establishing a metastable nonequilibrium stationary state is detailed and followed with discussion of possible applications to on-chip thermoelectric cooling in integrated circuitry and quantum computer systems.

  1. On-chip power delivery and management

    CERN Document Server

    Vaisband, Inna P; Popovich, Mikhail; Mezhiba, Andrey V; Köse, Selçuk; Friedman, Eby G

    2016-01-01

    This book describes methods for distributing power in high speed, high complexity integrated circuits with power levels exceeding many tens of watts and power supplies below a volt. It provides a broad and cohesive treatment of power delivery and management systems and related design problems, including both circuit network models and design techniques for on-chip decoupling capacitors, providing insight and intuition into the behavior and design of on-chip power distribution systems. Organized into subareas to provide a more intuitive flow to the reader, this fourth edition adds more than a hundred pages of new content, including inductance models for interdigitated structures, design strategies for multi-layer power grids, advanced methods for efficient power grid design and analysis, and methodologies for simultaneously placing on-chip multiple power supplies and decoupling capacitors. The emphasis of this additional material is on managing the complexity of on-chip power distribution networks.

  2. Open Tiled Manycore System-on-Chip

    OpenAIRE

    Wallentowitz, Stefan; Wagner, Philipp; Tempelmeier, Michael; Wild, Thomas; Herkersdorf, Andreas

    2013-01-01

    Manycore System-on-Chip include an increasing amount of processing elements and have become an important research topic for improvements of both hardware and software. While research can be conducted using system simulators, prototyping requires a variety of components and is very time consuming. With the Open Tiled Manycore System-on-Chip (OpTiMSoC) we aim at building such an environment for use in our and other research projects as prototyping platform. This paper describes the project goal...

  3. 60 GHz system-on-chip (SoC) with built-in memory and an on-chip antenna

    KAUST Repository

    Ghaffar, Farhan A.

    2014-04-01

    A novel 60 GHz transmitter SoC with an on-chip antenna and integrated memory in CMOS 65 nm technology is presented in this paper. This highly integrated transmitter design can support a data rate of 2 GBPS with a transmission range of 1 m. The transmitter consists of a fundamental frequency 60 GHz PLL which covers the complete ISM band. The modulator following the PLL can support both BPSK and OOK modulation schemes. Both stored data on the integrated memory or directly from an external source can be transmitted. A tapered slot on chip antenna is integrated with the power amplifier to complete the front end of the transmitter design. Size of the complete transmitter with on-chip antenna is only 1.96 mm × 1.96 mm. The core circuits consume less than 100 mW of power. The high data rate capability of the design makes it extremely suitable for bandwidth hungry applications such as unencrypted HD video streaming and transmission.

  4. A VLSI System-on-Chip for Particle Detectors

    CERN Document Server

    AUTHOR|(CDS)2078019

    In this thesis I present a System-on-Chip (SoC) I designed to oer a self- contained, compact data acquisition platform for micromegas detector mon- itoring. I carried on my work within the RD-51 collab oration of CERN. With a companion ADC, my architecture is capable to acquire the signal from a detector electro de, pro cess the data and p erform monitoring tests. The SoC is built around on a custom 8-bit micropro cessor with internal mem- ory resources and emb eds the p eripherals to b e interf...

  5. Variation Tolerant On-Chip Interconnects

    CERN Document Server

    Nigussie, Ethiopia Enideg

    2012-01-01

    This book presents design techniques, analysis and implementation of high performance and power efficient, variation tolerant on-chip interconnects.  Given the design paradigm shift to multi-core, interconnect-centric designs and the increase in sources of variability and their impact in sub-100nm technologies, this book will be an invaluable reference for anyone concerned with the design of next generation, high-performance electronics systems. Provides comprehensive, circuit-level explanation of high-performance, energy-efficient, variation-tolerant on-chip interconnect; Describes design techniques to mitigate problems caused by variation; Includes techniques for design and implementation of self-timed on-chip interconnect, delay variation insensitive communication protocols, high speed signaling techniques and circuits, bit-width independent completion detection and process, voltage and temperature variation tolerance.                          

  6. Training probabilistic VLSI models on-chip to recognise biomedical signals under hardware nonidealities.

    Science.gov (United States)

    Jiang, P C; Chen, H

    2006-01-01

    VLSI implementation of probabilistic models is attractive for many biomedical applications. However, hardware non-idealities can prevent probabilistic VLSI models from modelling data optimally through on-chip learning. This paper investigates the maximum computational errors that a probabilistic VLSI model can tolerate when modelling real biomedical data. VLSI circuits capable of achieving the required precision are also proposed.

  7. The study of capability natural uranium as fuel cycle input for long life gas cooled fast reactors with helium as coolant

    Science.gov (United States)

    Ariani, Menik; Satya, Octavianus Cakra; Monado, Fiber; Su'ud, Zaki; Sekimoto, Hiroshi

    2016-03-01

    The objective of the present research is to assess the feasibility design of small long-life Gas Cooled Fast Reactor with helium as coolant. GCFR included in the Generation-IV reactor systems are being developed to provide sustainable energy resources that meet future energy demand in a reliable, safe, and proliferation-resistant manner. This reactor can be operated without enrichment and reprocessing forever, once it starts. To obtain the capability of consuming natural uranium as fuel cycle input modified CANDLE burn-up scheme was adopted in this system with different core design. This study has compared the core with three designs of core reactors with the same thermal power 600 MWth. The fuel composition each design was arranged by divided core into several parts of equal volume axially i.e. 6, 8 and 10 parts related to material burn-up history. The fresh natural uranium is initially put in region 1, after one cycle of 10 years of burn-up it is shifted to region 2 and the region 1 is filled by fresh natural uranium fuel. This concept is basically applied to all regions, i.e. shifted the core of the region (i) into region (i+1) region after the end of 10 years burn-up cycle. The calculation results shows that for the burn-up strategy on "Region-8" and "Region-10" core designs, after the reactors start-up the operation furthermore they only needs natural uranium supply to the next life operation until one period of refueling (10 years).

  8. The study of capability natural uranium as fuel cycle input for long life gas cooled fast reactors with helium as coolant

    Energy Technology Data Exchange (ETDEWEB)

    Ariani, Menik, E-mail: menikariani@gmail.com; Satya, Octavianus Cakra; Monado, Fiber [Department of Physics, Faculty of Mathematics and Natural Sciences, Sriwijaya University, jl Palembang-Prabumulih km 32 Indralaya OganIlir, South of Sumatera (Indonesia); Su’ud, Zaki [Nuclear and Biophysics Research Division, Faculty of Mathematics and Natural Sciences, Bandung Institute of Technology, jlGanesha 10, Bandung (Indonesia); Sekimoto, Hiroshi [CRINES, Tokyo Institute of Technology, 2-12-11N1-17 Ookayama, Meguro-Ku, Tokyo (Japan)

    2016-03-11

    The objective of the present research is to assess the feasibility design of small long-life Gas Cooled Fast Reactor with helium as coolant. GCFR included in the Generation-IV reactor systems are being developed to provide sustainable energy resources that meet future energy demand in a reliable, safe, and proliferation-resistant manner. This reactor can be operated without enrichment and reprocessing forever, once it starts. To obtain the capability of consuming natural uranium as fuel cycle input modified CANDLE burn-up scheme was adopted in this system with different core design. This study has compared the core with three designs of core reactors with the same thermal power 600 MWth. The fuel composition each design was arranged by divided core into several parts of equal volume axially i.e. 6, 8 and 10 parts related to material burn-up history. The fresh natural uranium is initially put in region 1, after one cycle of 10 years of burn-up it is shifted to region 2 and the region 1 is filled by fresh natural uranium fuel. This concept is basically applied to all regions, i.e. shifted the core of the region (i) into region (i+1) region after the end of 10 years burn-up cycle. The calculation results shows that for the burn-up strategy on “Region-8” and “Region-10” core designs, after the reactors start-up the operation furthermore they only needs natural uranium supply to the next life operation until one period of refueling (10 years).

  9. Communication architectures for systems-on-chip

    CERN Document Server

    Ayala, Jose L

    2011-01-01

    A presentation of state-of-the-art approaches from an industrial applications perspective, Communication Architectures for Systems-on-Chip shows professionals, researchers, and students how to attack the problem of data communication in the manufacture of SoC architectures. With its lucid illustration of current trends and research improving the performance, quality, and reliability of transactions, this is an essential reference for anyone dealing with communication mechanisms for embedded systems, systems-on-chip, and multiprocessor architectures--or trying to overcome existing limitations.

  10. On-chip mode division multiplexing technologies

    DEFF Research Database (Denmark)

    Ding, Yunhong; Frellsen, Louise Floor; Guan, Xiaowei

    2016-01-01

    using one-dimensional (1D) photonic crystal silicon waveguides. We furthermore use the fabricated devices to demonstrate on-chip point-to-point mode division multiplexing transmission, and all-optical signal processing by mode-selective wavelength conversion. Finally, we report an efficient silicon...

  11. On-chip entangled photon source

    Energy Technology Data Exchange (ETDEWEB)

    Soh, Daniel B. S.; Bisson, Scott E.

    2016-11-22

    Various technologies pertaining to an on-chip entangled photon source are described herein. A light source is used to pump two resonator cavities that are resonant at two different respective wavelengths and two different respective polarizations. The resonator cavities are coupled to a four-wave mixing cavity that receives the light at the two wavelengths and outputs polarization-entangled photons.

  12. A solvent resistant lab-on-chip platform for radiochemistry applications.

    Science.gov (United States)

    Rensch, Christian; Lindner, Simon; Salvamoser, Ruben; Leidner, Stephanie; Böld, Christoph; Samper, Victor; Taylor, David; Baller, Marko; Riese, Stefan; Bartenstein, Peter; Wängler, Carmen; Wängler, Björn

    2014-07-21

    The application of microfluidics to the synthesis of Positron Emission Tomography (PET) tracers has been explored for more than a decade. Microfluidic benefits such as superior temperature control have been successfully applied to PET tracer synthesis. However, the design of a compact microfluidic platform capable of executing a complete PET tracer synthesis workflow while maintaining prospects for commercialization remains a significant challenge. This study uses an integral system design approach to tackle commercialization challenges such as the material to process compatibility with a path towards cost effective lab-on-chip mass manufacturing from the start. It integrates all functional elements required for a simple PET tracer synthesis into one compact radiochemistry platform. For the lab-on-chip this includes the integration of on-chip valves, on-chip solid phase extraction (SPE), on-chip reactors and a reversible fluid interface while maintaining compatibility with all process chemicals, temperatures and chip mass manufacturing techniques. For the radiochemistry device it includes an automated chip-machine interface enabling one-move connection of all valve actuators and fluid connectors. A vial-based reagent supply as well as methods to transfer reagents efficiently from the vials to the chip has been integrated. After validation of all those functional elements, the microfluidic platform was exemplarily employed for the automated synthesis of a Gastrin-releasing peptide receptor (GRP-R) binding the PEGylated Bombesin BN(7-14)-derivative ([(18)F]PESIN) based PET tracer.

  13. Technology for On-Chip Qubit Control with Microfabricated Surface Ion Traps

    Energy Technology Data Exchange (ETDEWEB)

    Highstrete, Clark [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States). Quantum Information Sciences Dept.; Scott, Sean Michael [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States). RF/Optoelectronics Dept.; Nordquist, Christopher D. [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States). RF/Optoelectronics Dept.; Sterk, Jonathan David [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States). Photonic Microsystem Technologies Dept.; Maunz, Peter Lukas Wilhelm [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States). Photonic Microsystem Technologies Dept.; Tigges, Christopher P. [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States). Photonic Microsystem Technologies Dept.; Blain, Matthew Glenn [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States). Photonic Microsystem Technologies Dept.; Heller, Edwin J. [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States). Microsystems Integration Dept.; Stevens, James E. [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States). MESAFab Operations 2 Dept.

    2013-11-01

    Trapped atomic ions are a leading physical system for quantum information processing. However, scalability and operational fidelity remain limiting technical issues often associated with optical qubit control. One promising approach is to develop on-chip microwave electronic control of ion qubits based on the atomic hyperfine interaction. This project developed expertise and capabilities at Sandia toward on-chip electronic qubit control in a scalable architecture. The project developed a foundation of laboratory capabilities, including trapping the 171Yb+ hyperfine ion qubit and developing an experimental microwave coherent control capability. Additionally, the project investigated the integration of microwave device elements with surface ion traps utilizing Sandia’s state-of-the-art MEMS microfabrication processing. This effort culminated in a device design for a multi-purpose ion trap experimental platform for investigating on-chip microwave qubit control, laying the groundwork for further funded R&D to develop on-chip microwave qubit control in an architecture that is suitable to engineering development.

  14. Modelling, Synthesis, and Configuration of Networks-on-Chips

    DEFF Research Database (Denmark)

    Stuart, Matthias Bo

    This thesis presents three contributions in two different areas of network-on-chip and system-on-chip research: Application modelling and identifying and solving different optimization problems related to two specific network-on-chip architectures. The contribution related to application modellin...... for solving the network synthesis problem in the MANGO network-on-chip, and the identification and formalization of the ReNoC configuration problem together with three heuristics for solving it....

  15. Investigations on the heat transport capability of a cryogenic oscillating heat pipe and its application in achieving ultra-fast cooling rates for cell vitrification cryopreservation☆

    OpenAIRE

    Han, Xu; Ma, Hongbin; Jiao, Anjun; Critser, John K.

    2008-01-01

    Theoretically, direct vitrification of cell suspensions with relatively low concentrations (~1 M) of permeating cryoprotective agents (CPA) is suitable for cryopreservation of almost all cell types and can be accomplished by ultra-fast cooling rates that are on the order of 106–7 K/min. However, the methods and devices currently available for cell cryopreservation cannot achieve such high cooling rates. In this study, we constructed a novel cryogenic oscillating heat pipe (COHP) using liquid ...

  16. Packetizing OCP Transactions in the MANGO Network-on-Chip

    DEFF Research Database (Denmark)

    Bjerregaard, Tobias; Sparsø, Jens

    2006-01-01

    The scaling of CMOS technology causes a widening gap between the performance of on-chip communication and computation. This calls for a communication-centric design flow. The MANGO network-on-chip architecture enables globally asynchronous locally synchronous (GALS) system-on-chip design, while...

  17. On-chip antenna: Practical design and characterization considerations

    KAUST Repository

    Shamim, Atif

    2012-07-28

    This paper highlights the challenges of an emergent field, namely, on-chip antenna design. Consistent with the RF System-on-Chip (SoC) concept, co-design strategy for circuits and on-chip antennas is described. A number of design and layout issues, arising from the highly integrated nature of this kind of systems, are discussed. The characterization difficulties related to on-chip antennas radiation properties are also highlighted. Finally, a novel on-wafer test fixture is proposed to measure the gain and radiation pattern of the on-chip antennas in the anechoic chamber.

  18. Operating Modes and Cooling Capabilities of the 3-Stage ADR Developed for the Soft-X-Ray Spectrometer Instrument on Astro-H

    Science.gov (United States)

    Shirron, Peter J.; Kimball, Mark O.; James, Bryan L.; Muench, Theo; DiPirro, Michael J.; Letmate, Richard V.; Sampson, Michael A.; Bialas, Tom G.; Sneiderman, Gary A.; Porter, Frederick S.; hide

    2015-01-01

    A 3-stage adiabatic demagnetization refrigerator (ADR) is used on the Soft X-ray Spectrometer instrument on Astro-H to cool a 6x6 array of x-ray microcalorimeters to 50 mK. The ADR is supported by a cryogenic system consisting of a superfluid helium tank, a 4.5 K Joule-Thomson (JT) cryocooler, and additional 2-stage Stirling cryocoolers that pre-cool the JT cooler and cool radiation shields within the cryostat. The ADR is configured so that it can use either the liquid helium or the JT cryocooler as its heat sink, giving the instrument an unusual degree of tolerance for component failures or degradation in the cryogenic system. The flight detector assembly, ADR and dewar were integrated into the flight dewar in early 2014, and have since been extensively characterized and calibrated. This paper summarizes the operation and performance of the ADR in all of its operating modes

  19. On-Chip Single-Photon Sifter

    CERN Document Server

    Elshaari, Ali W; Fognini, Andreas; Reimer, Michael E; Dalacu, Dan; Poole, Philip J; Zwiller, Val; Jöns, Klaus D

    2016-01-01

    Quantum states of light play a pivotal role in modern science[1] and future photonic applications[2]. While impressive progress has been made in their generation and manipulation with high fidelities, the common table-top approach is reaching its limits for practical quantum applications. Since the advent of integrated quantum nanophotonics[3] different material platforms based on III-V nanostructures-, color centers-, and nonlinear waveguides[4-8] as on-chip light sources have been investigated. Each platform has unique advantages and limitations in terms of source properties, optical circuit complexity, and scaling potentials. However, all implementations face major challenges with efficient and tunable filtering of individual quantum states[4], scalable integration and deterministic multiplexing of on-demand selected quantum emitters[9], and on-chip excitation-suppression[10]. Here we overcome all of these challenges with a novel hybrid and scalable nanofabrication approach to generate quantum light on-chi...

  20. On-Chip Microwave Quantum Hall Circulator

    Science.gov (United States)

    Mahoney, A. C.; Colless, J. I.; Pauka, S. J.; Hornibrook, J. M.; Watson, J. D.; Gardner, G. C.; Manfra, M. J.; Doherty, A. C.; Reilly, D. J.

    2017-01-01

    Circulators are nonreciprocal circuit elements that are integral to technologies including radar systems, microwave communication transceivers, and the readout of quantum information devices. Their nonreciprocity arises from the interference of microwaves over the centimeter scale of the signal wavelength, in the presence of bulky magnetic media that breaks time-reversal symmetry. Here, we realize a completely passive on-chip microwave circulator with size 1 /1000 th the wavelength by exploiting the chiral, "slow-light" response of a two-dimensional electron gas in the quantum Hall regime. For an integrated GaAs device with 330 μ m diameter and about 1-GHz center frequency, a nonreciprocity of 25 dB is observed over a 50-MHz bandwidth. Furthermore, the nonreciprocity can be dynamically tuned by varying the voltage at the port, an aspect that may enable reconfigurable passive routing of microwave signals on chip.

  1. On-chip plasmonic waveguide optical waveplate

    Science.gov (United States)

    Gao, Linfei; Huo, Yijie; Zang, Kai; Paik, Seonghyun; Chen, Yusi; Harris, James S.; Zhou, Zhiping

    2015-10-01

    Polarization manipulation is essential in almost every photonic system ranging from telecommunications to bio-sensing to quantum information. This is traditionally achieved using bulk waveplates. With the developing trend of photonic systems towards integration and miniaturization, the need for an on-chip waveguide type waveplate becomes extremely urgent. However, this is very challenging using conventional dielectric waveguides, which usually require complex 3D geometries to alter the waveguide symmetry and are also difficult to create an arbitrary optical axis. Recently, a waveguide waveplate was realized using femtosecond laser writing, but the device length is in millimeter range. Here, for the first time we propose and experimentally demonstrate an ultracompact, on-chip waveplate using an asymmetric hybrid plasmonic waveguide to create an arbitrary optical axis. The device is only in several microns length and produced in a flexible integratable IC compatible format, thus opening up the potential for integration into a broad range of systems.

  2. Microengineered physiological biomimicry: organs-on-chips.

    Science.gov (United States)

    Huh, Dongeun; Torisawa, Yu-suke; Hamilton, Geraldine A; Kim, Hyun Jung; Ingber, Donald E

    2012-06-21

    Microscale engineering technologies provide unprecedented opportunities to create cell culture microenvironments that go beyond current three-dimensional in vitro models by recapitulating the critical tissue-tissue interfaces, spatiotemporal chemical gradients, and dynamic mechanical microenvironments of living organs. Here we review recent advances in this field made over the past two years that are focused on the development of 'Organs-on-Chips' in which living cells are cultured within microfluidic devices that have been microengineered to reconstitute tissue arrangements observed in living organs in order to study physiology in an organ-specific context and to develop specialized in vitro disease models. We discuss the potential of organs-on-chips as alternatives to conventional cell culture models and animal testing for pharmaceutical and toxicology applications. We also explore challenges that lie ahead if this field is to fulfil its promise to transform the future of drug development and chemical safety testing.

  3. On-chip generation of heralded photon-number states

    Science.gov (United States)

    Vergyris, Panagiotis; Meany, Thomas; Lunghi, Tommaso; Sauder, Gregory; Downes, James; Steel, M. J.; Withford, Michael J.; Alibart, Olivier; Tanzilli, Sébastien

    2016-01-01

    Beyond the use of genuine monolithic integrated optical platforms, we report here a hybrid strategy enabling on-chip generation of configurable heralded two-photon states. More specifically, we combine two different fabrication techniques, i.e., non-linear waveguides on lithium niobate for efficient photon-pair generation and femtosecond-laser-direct-written waveguides on glass for photon manipulation. Through real-time device manipulation capabilities, a variety of path-coded heralded two-photon states can be produced, ranging from product to entangled states. Those states are engineered with high levels of purity, assessed by fidelities of 99.5 ± 8% and 95.0 ± 8%, respectively, obtained via quantum interferometric measurements. Our strategy therefore stands as a milestone for further exploiting entanglement-based protocols, relying on engineered quantum states, and enabled by scalable and compatible photonic circuits. PMID:27775062

  4. Microfabrication of human organs-on-chips.

    Science.gov (United States)

    Huh, Dongeun; Kim, Hyun Jung; Fraser, Jacob P; Shea, Daniel E; Khan, Mohammed; Bahinski, Anthony; Hamilton, Geraldine A; Ingber, Donald E

    2013-11-01

    'Organs-on-chips' are microengineered biomimetic systems containing microfluidic channels lined by living human cells, which replicate key functional units of living organs to reconstitute integrated human organ-level pathophysiology in vitro. These microdevices can be used to test efficacy and toxicity of drugs and chemicals, and to create in vitro models of human disease. Thus, they potentially represent low-cost alternatives to conventional animal models for pharmaceutical, chemical and environmental applications. Here we describe a protocol for the fabrication, microengineering and operation of these microfluidic organ-on-chip systems. First, microengineering is used to fabricate a multilayered microfluidic device that contains two parallel elastomeric microchannels separated by a thin porous flexible membrane, along with two full-height, hollow vacuum chambers on either side; this requires ∼3.5 d to complete. To create a 'breathing' lung-on-a-chip that mimics the mechanically active alveolar-capillary interface of the living human lung, human alveolar epithelial cells and microvascular endothelial cells are cultured in the microdevice with physiological flow and cyclic suction applied to the side chambers to reproduce rhythmic breathing movements. We describe how this protocol can be easily adapted to develop other human organ chips, such as a gut-on-a-chip lined by human intestinal epithelial cells that experiences peristalsis-like motions and trickling fluid flow. Also, we discuss experimental techniques that can be used to analyze the cells in these organ-on-chip devices.

  5. Routing algorithms in networks-on-chip

    CERN Document Server

    Daneshtalab, Masoud

    2014-01-01

    This book provides a single-source reference to routing algorithms for Networks-on-Chip (NoCs), as well as in-depth discussions of advanced solutions applied to current and next generation, many core NoC-based Systems-on-Chip (SoCs). After a basic introduction to the NoC design paradigm and architectures, routing algorithms for NoC architectures are presented and discussed at all abstraction levels, from the algorithmic level to actual implementation.  Coverage emphasizes the role played by the routing algorithm and is organized around key problems affecting current and next generation, many-core SoCs. A selection of routing algorithms is included, specifically designed to address key issues faced by designers in the ultra-deep sub-micron (UDSM) era, including performance improvement, power, energy, and thermal issues, fault tolerance and reliability.   ·         Provides a comprehensive overview of routing algorithms for Networks-on-Chip and NoC-based, manycore systems; ·         Describe...

  6. Operating modes and cooling capabilities of the 3-stage ADR developed for the Soft-X-ray Spectrometer instrument on Astro-H

    Science.gov (United States)

    Shirron, Peter J.; Kimball, Mark O.; James, Bryan L.; Muench, Theodore; DiPirro, Michael J.; Letmate, Richard V.; Sampson, Michael A.; Bialas, Tom G.; Sneiderman, Gary A.; Porter, Frederick S.; Kelley, Richard L.

    2016-03-01

    A 3-stage adiabatic demagnetization refrigerator (ADR) (Shirron et al., 2012) is used on the Soft X-ray Spectrometer instrument (Mitsuda et al., 2010) on Astro-H (Takahashi et al., 2010) [3] to cool a 6 × 6 array of X-ray microcalorimeters to 50 mK. The ADR is supported by a cryogenic system (Fujimoto et al., 2010) consisting of a superfluid helium tank, a 4.5 K Joule-Thomson (JT) cryocooler, and additional 2-stage Stirling cryocoolers that pre-cool the JT cooler and cool radiation shields within the cryostat. The ADR is configured so that it can use either the liquid helium or the JT cryocooler as its heat sink, giving the instrument an unusual degree of tolerance for component failures or degradation in the cryogenic system. The flight detector assembly, ADR and dewar were integrated into the flight dewar in early 2014, and have since been extensively characterized and calibrated. This paper summarizes the operation and performance of the ADR in all of its operating modes.

  7. Application of Ferrite Nanomaterial in RF On-Chip Inductors

    Directory of Open Access Journals (Sweden)

    Hua-Lin Cai

    2013-01-01

    Full Text Available Several kinds of ferrite-integrated on-chip inductors are presented. Ferrite nanomaterial applied in RF on-chip inductors is prepared and analyzed to show the properties of high permeability, high ferromagnetic resonance frequency, high resistivity, and low loss, which has the potential that will improve the performance of RF on-chip inductors. Simulations of different coil and ferrite nanomaterial parameters, inductor structures, and surrounding structures are also conducted to achieve the trend of gains of inductance and quality factor of on-chip inductors. By integrating the prepared ferrite magnetic nanomaterial to the on-chip inductors with different structures, the measurement performances show an obvious improvement even in GHz frequency range. In addition, the studies of CMOS compatible process to integrate the nanomaterial promote the widespread application of magnetic nanomaterial in RF on-chip inductors.

  8. Computer System Design System-on-Chip

    CERN Document Server

    Flynn, Michael J

    2011-01-01

    The next generation of computer system designers will be less concerned about details of processors and memories, and more concerned about the elements of a system tailored to particular applications. These designers will have a fundamental knowledge of processors and other elements in the system, but the success of their design will depend on the skills in making system-level tradeoffs that optimize the cost, performance and other attributes to meet application requirements. This book provides a new treatment of computer system design, particularly for System-on-Chip (SOC), which addresses th

  9. Silicon Nanophotonics for Many-Core On-Chip Networks

    Science.gov (United States)

    Mohamed, Moustafa

    Number of cores in many-core architectures are scaling to unprecedented levels requiring ever increasing communication capacity. Traditionally, architects follow the path of higher throughput at the expense of latency. This trend has evolved into being problematic for performance in many-core architectures. Moreover, the trends of power consumption is increasing with system scaling mandating nontraditional solutions. Nanophotonics can address these problems, offering benefits in the three frontiers of many-core processor design: Latency, bandwidth, and power. Nanophotonics leverage circuit-switching flow control allowing low latency; in addition, the power consumption of optical links is significantly lower compared to their electrical counterparts at intermediate and long links. Finally, through wave division multiplexing, we can keep the high bandwidth trends without sacrificing the throughput. This thesis focuses on realizing nanophotonics for communication in many-core architectures at different design levels considering reliability challenges that our fabrication and measurements reveal. First, we study how to design on-chip networks for low latency, low power, and high bandwidth by exploiting the full potential of nanophotonics. The design process considers device level limitations and capabilities on one hand, and system level demands in terms of power and performance on the other hand. The design involves the choice of devices, designing the optical link, the topology, the arbitration technique, and the routing mechanism. Next, we address the problem of reliability in on-chip networks. Reliability not only degrades performance but can block communication. Hence, we propose a reliability-aware design flow and present a reliability management technique based on this flow to address reliability in the system. In the proposed flow reliability is modeled and analyzed for at the device, architecture, and system level. Our reliability management technique is

  10. On-chip sample preparation for complete blood count from raw blood.

    Science.gov (United States)

    Nguyen, John; Wei, Yuan; Zheng, Yi; Wang, Chen; Sun, Yu

    2015-03-21

    This paper describes a monolithic microfluidic device capable of on-chip sample preparation for both RBC and WBC measurements from whole blood. For the first time, on-chip sample processing (e.g. dilution, lysis, and filtration) and downstream single cell measurement were fully integrated to enable sample preparation and single cell analysis from whole blood on a single device. The device consists of two parallel sub-systems that perform sample processing and electrical measurements for measuring RBC and WBC parameters. The system provides a modular environment capable of handling solutions of various viscosities by adjusting the length of channels and precisely controlling mixing ratios, and features a new 'offset' filter configuration for increased duration of device operation. RBC concentration, mean corpuscular volume (MCV), cell distribution width, WBC concentration and differential are determined by electrical impedance measurement. Experimental characterization of over 100,000 cells from 10 patient blood samples validated the system's capability for performing on-chip raw blood processing and measurement.

  11. Robust thermal control for CMOS-based lab-on-chip systems

    Science.gov (United States)

    Martinez-Quijada, Jose; Ma, Tianchi; Hall, Gordon H.; Reynolds, Matt; Sloan, David; Caverhill-Godkewitsch, Saul; Glerum, D. Moira; Sameoto, Dan; Elliott, Duncan G.; Backhouse, Christopher J.

    2015-07-01

    The need for precise temperature control at small scales has provided a formidable challenge to the lab-on-chip community. It requires, at once, good thermal conductivity for high speed operation, good thermal isolation for low power consumption and the ability to have small (mm-scale) thermally independent regions on the same substrate. Most importantly, and, in addition to these conflicting requirements, there is a need to accurately measure the temperature of the active region without the need for device-to-device calibrations. We have developed and tested a design that enables thermal control of lab-on-chip devices atop silicon substrates in a way that could be integrated with the standard methods of mass-manufacture used in the electronics industry (i.e. CMOS). This is a significant step towards a single-chip lab-on-chip solution, one in which the microfluidics, high voltage electronics, optoelectronics, instrumentation electronics, and the world-chip interface are all integrated on a single substrate with multiple, independent, thermally-controlled regions based on active heating and passive cooling.

  12. High Speed Global On-Chip Interconnects and Transceivers

    NARCIS (Netherlands)

    Mensink, E.

    2007-01-01

    The data rate of global on-chip interconnects (up to 10 mm) is limited by a large distributed resistance and capacitance. This thesis describes methods to increase the achievable data rate of global on-chip interconnects with minimal chip area and power consumption, while maintaining data integrity.

  13. Interconnects and On-Chip Data Communication Techniques

    NARCIS (Netherlands)

    Mensink, E.; Schinkel, Daniel; Klumperink, Eric A.M.; van Tuijl, Adrianus Johannes Maria

    Global on-chip communication is rapidly becoming a speed and power bottleneck in CMOS circuits. In this paper, a ‘mixed-signal’ approach is taken to analyze on-chip interconnects and it is investigated how data-rates can be improved. It is shown that complex signaling schemes such as OFDM and CDMA

  14. Thermal Management for Dependable On-Chip Systems

    OpenAIRE

    Ebi, Thomas

    2014-01-01

    This thesis addresses the dependability issues in on-chip systems from a thermal perspective. This includes an explanation and analysis of models to show the relationship between dependability and tempature. Additionally, multiple novel methods for on-chip thermal management are introduced aiming to optimize thermal properties. Analysis of the methods is done through simulation and through infrared thermal camera measurements.

  15. The ReNoC Reconfigurable Network-on-Chip

    DEFF Research Database (Denmark)

    Stuart, Matthias Bo; Stensgaard, Mikkel Bystrup; Sparsø, Jens

    2011-01-01

    This article presents a reconfigurable network-on-chip architecture called ReNoC, which is intended for use in general-purpose multiprocessor system-on-chip platforms, and which enables application-specific logical NoC topologies to be configured, thus providing both efficiency and flexibility...

  16. Energy Model of Networks-on-Chip and a Bus

    NARCIS (Netherlands)

    Wolkotte, P.T.; Smit, Gerardus Johannes Maria; Kavaldjiev, N.K.; Becker, Jens E.; Becker, Jürgen; Nurmi, J.; Takala, J.; Hamalainen, T.D.

    2005-01-01

    A Network-on-Chip (NoC) is an energy-efficient onchip communication architecture for Multi-Processor Systemon-Chip (MPSoC) architectures. In earlier papers we proposed two Network-on-Chip architectures based on packet-switching and circuit-switching. In this paper we derive an energy model for both

  17. Transient and permanent error control for networks-on-chip

    CERN Document Server

    Yu, Qiaoyan

    2012-01-01

    This book addresses reliability and energy efficiency of on-chip networks using a configurable error control coding (ECC) scheme for datalink-layer transient error management. The method can adjust both error detection and correction strengths at runtime by varying the number of redundant wires for parity-check bits. Methods are also presented to tackle joint transient and permanent error correction, exploiting the redundant resources already available on-chip. A parallel and flexible network simulator is also introduced, which facilitates examining the impact of various error control methods on network-on-chip performance. Includes a complete survey of error control methods for reliable networks-on-chip, evaluated for reliability, energy and performance metrics; Provides analysis of error control in various network-on-chip layers, as well as presentation of an innovative multi-layer error control coding technique; Presents state-of-the-art solutions to address simultaneously reliability, energy and performan...

  18. Embedded 3D Graphics Core for FPGA-based System-on-Chip Applications

    DEFF Research Database (Denmark)

    Holten-Lund, Hans Erik

    2005-01-01

    This paper presents a 3D graphics accelerator core for an FPGA based system, and illustrates how to build a System-on-Chip containing a Xilinx MicroBlaze soft-core CPU and our 3D graphics accelerator core. The system is capable of running uClinux and hardware accelerated 3D graphics applications...... consumption is reduced as well. We show how an FPGA based embedded system is capable of most tasks in a single chip solution, without requiring additional CPU or graphics chips....

  19. On-Chip Bondwire Magnetics with Ferrite-Epoxy Glob Coating for Power Systems on Chip

    Directory of Open Access Journals (Sweden)

    Jian Lu

    2008-01-01

    Full Text Available A novel concept of on-chip bondwire inductors and transformers with ferrite epoxy glob coating is proposed to offer a cost effective approach realizing power systems on chip (SOC. We have investigated the concept both experimentally and with finite element modeling. A Q factor of 30–40 is experimentally demonstrated for the bondwire inductors which represents an improvement by a factor of 3–30 over the state-of-the-art MEMS micromachined inductors. Transformer parameters including self- and mutual inductance and coupling factors are extracted from both modeled and measured S-parameters. More importantly, the bondwire magnetic components can be easily integrated into SOC manufacturing processes with minimal changes and open enormous possibilities for realizing cost-effective, high-current, high-efficiency power SOCs.

  20. On-chip phase-shifted Bragg gratings and their application for spatiotemporal transformation of Bloch surface waves

    Science.gov (United States)

    Doskolovich, Leonid L.; Bezus, Evgeni A.; Bykov, Dmitry A.; Golovastikov, Nikita V.

    2017-05-01

    In this work, we study numerically and theoretically phase-shifted Bragg gratings (PSBG) for Bloch surface waves (BSW) propagating along the interfaces between a 1D photonic crystal and a homogeneous medium. The studied on-chip structure consists of a set of dielectric ridges located on the photonic crystal surface constituting two symmetrical onchip Bragg gratings separated by a defect layer. Rigorous simulation results demonstrate that the surface wave diffraction on the proposed on-chip PSBG is close to the diffraction of plane electromagnetic waves on conventional PSBG. For the considered examples, the correlation coefficient between the spectra of conventional PSBG and on-chip PSBG exceeds 0.99 near the resonance corresponding to the excitation of the eigenmodes localized in the defect layer. Conventional PSBG are widely used for spectral filtering as well as for temporal and spatial transformations of optical pulses and beams including differentiation and integration of pulse envelope or beam profile. In the present work, we discuss the capability of on-chip PSBG to implement the operations of temporal and spatial differentiation of BSW pulses and beams. The presented examples demonstrate the possibility of using the proposed structure for high-quality differentiation. The obtained results can be applied for the design of the prospective integrated systems for on-chip alloptical analog computing.

  1. An energy-efficient Network-on-Chip for a heterogeneous tiled reconfigurable System-on-Chip

    NARCIS (Netherlands)

    Kavaldjiev, N.K.; Smit, Gerardus Johannes Maria

    This paper proposes a Network-on-Chip architecture that offers high flexibility and performance. It is used in a System-on-Chip platform for future multimedia mobile devices. The network is packet switching wormhole network with virtual-channel flow control and source routing. The initial

  2. An energy-efficient Network-on-Chip for a heterogeneous tiled reconfigurable Systems-on-Chip

    NARCIS (Netherlands)

    Kavaldjiev, N.K.; Smit, Gerardus Johannes Maria

    This paper proposes a Network-on-Chip architecture that offers high flexibility and performance. It is used in a System-on-Chip platform for future multimedia mobile devices. The network is packet switching wormhole network with virtual-channel flow control and source routing. The initial

  3. Design of Networks-on-Chip for Real-Time Multi-Processor Systems-on-Chip

    DEFF Research Database (Denmark)

    Sparsø, Jens

    2012-01-01

    This paper addresses the design of networks-on-chips for use in multi-processor systems-on-chips - the hardware platforms used in embedded systems. These platforms typically have to guarantee real-time properties, and as the network is a shared resource, it has to provide service guarantees...

  4. Evaluation of Effect of N{sub 2} Gas on the Cooling Capability of Passive Auxiliary Feedwater System (PAFS) in APR+

    Energy Technology Data Exchange (ETDEWEB)

    Cho, Yun Je; Kang, Kyong Ho; Yun, Byong Jo [Korea Atomic Energy Research Institute, Daejeon (Korea, Republic of)

    2012-05-15

    In Korea, Advanced Power Reactor Plus (APR+) has being developed by adding passive safety features to Advanced Power Reactor 1400MWe (APR1400). Passive Auxiliary Feedwater System (PAFS) is one of passive system adopted in the APR+ to replace the conventional active auxiliary feedwater system. Because PAFS removes decay heat from the reactor core, it is required to verify the performance of PAFS in postulated accidents cases. In addition, an effect of noncondensable gas on the heat removal capability of PAFS should be evaluated since the non-condensable gas may deteriorate a condensation heat transfer through the condensation heat exchanger in PAFS. In this study, the effect of N{sub 2} gas was evaluated using MARS

  5. A lab-on-chip for malaria diagnosis and surveillance.

    Science.gov (United States)

    Taylor, Brian J; Howell, Anita; Martin, Kimberly A; Manage, Dammika P; Gordy, Walter; Campbell, Stephanie D; Lam, Samantha; Jin, Albert; Polley, Spencer D; Samuel, Roshini A; Atrazhev, Alexey; Stickel, Alex J; Birungi, Josephine; Mbonye, Anthony K; Pilarski, Linda M; Acker, Jason P; Yanow, Stephanie K

    2014-05-09

    Access to timely and accurate diagnostic tests has a significant impact in the management of diseases of global concern such as malaria. While molecular diagnostics satisfy this need effectively in developed countries, barriers in technology, reagent storage, cost and expertise have hampered the introduction of these methods in developing countries. In this study a simple, lab-on-chip PCR diagnostic was created for malaria that overcomes these challenges. The platform consists of a disposable plastic chip and a low-cost, portable, real-time PCR machine. The chip contains a desiccated hydrogel with reagents needed for Plasmodium specific PCR. Chips can be stored at room temperature and used on demand by rehydrating the gel with unprocessed blood, avoiding the need for sample preparation. These chips were run on a custom-built instrument containing a Peltier element for thermal cycling and a laser/camera setup for amplicon detection. This diagnostic was capable of detecting all Plasmodium species with a limit of detection for Plasmodium falciparum of 2 parasites/μL of blood. This exceeds the sensitivity of microscopy, the current standard for diagnosis in the field, by ten to fifty-fold. In a blind panel of 188 patient samples from a hyper-endemic region of malaria transmission in Uganda, the diagnostic had high sensitivity (97.4%) and specificity (93.8%) versus conventional real-time PCR. The test also distinguished the two most prevalent malaria species in mixed infections, P. falciparum and Plasmodium vivax. A second blind panel of 38 patient samples was tested on a streamlined instrument with LED-based excitation, achieving a sensitivity of 96.7% and a specificity of 100%. These results describe the development of a lab-on-chip PCR diagnostic from initial concept to ready-for-manufacture design. This platform will be useful in front-line malaria diagnosis, elimination programmes, and clinical trials. Furthermore, test chips can be adapted to detect other

  6. Biosensors-on-chip: a topical review

    Science.gov (United States)

    Chen, Sensen; Shamsi, Mohtashim H.

    2017-08-01

    This review will examine the integration of two fields that are currently at the forefront of science, i.e. biosensors and microfluidics. As a lab-on-a-chip (LOC) technology, microfluidics has been enriched by the integration of various detection tools for analyte detection and quantitation. The application of such microfluidic platforms is greatly increased in the area of biosensors geared towards point-of-care diagnostics. Together, the merger of microfluidics and biosensors has generated miniaturized devices for sample processing and sensitive detection with quantitation. We believe that microfluidic biosensors (biosensors-on-chip) are essential for developing robust and cost effective point-of-care diagnostics. This review is relevant to a variety of disciplines, such as medical science, clinical diagnostics, LOC technologies including MEMs/NEMs, and analytical science. Specifically, this review will appeal to scientists working in the two overlapping fields of biosensors and microfluidics, and will also help new scientists to find their directions in developing point-of-care devices.

  7. On-Chip Diamond Raman Laser

    CERN Document Server

    Latawiec, Pawel; Burek, Michael J; Hausmann, Birgit J M; Bulu, Irfan; Loncar, Marko

    2015-01-01

    Synthetic single-crystal diamond has recently emerged as a promising platform for Raman lasers at exotic wavelengths due to its giant Raman shift, large transparency window and excellent thermal properties yielding a greatly enhanced figure-of-merit compared to conventional materials. To date, diamond Raman lasers have been realized using bulk plates placed inside macroscopic cavities, requiring careful alignment and resulting in high threshold powers (~W-kW). Here we demonstrate an on-chip Raman laser based on fully-integrated, high quality-factor, diamond racetrack micro-resonators embedded in silica. Pumping at telecom wavelengths, we show Stokes output discretely tunable over a ~100nm bandwidth around 2-{\\mu}m with output powers >250 {\\mu}W, extending the functionality of diamond Raman lasers to an interesting wavelength range at the edge of the mid-infrared spectrum. Continuous-wave operation with only ~85 mW pump threshold power in the feeding waveguide is demonstrated along with continuous, mode-hop-fr...

  8. Congestion Prediction Algorithm for Network on Chip

    Directory of Open Access Journals (Sweden)

    Hua Cai

    2013-07-01

    Full Text Available Network on chip (NoC traffic congestion was one of the important reasons for the data transmission performance degradation. In this paper, we presented a congestion judgment algorithm, which was based on neural network. The congestion control algorithm firstly used the hamming network to compute the NoC’s link buffer congestion state, secondly used the competitive network to find the worst congestion node, and then adopted avoiding congested node  routing policy to improve the NoC’s transmission performance. In this paper, the congestion control algorithm can make the data stream as far as possible evenly distributed in the NoC’s nodes and links and reduce the transmission resource competition. The simulation results showed that the congestion control algorithm could achieve better network throughput and average transmission delay.

  9. CMOS current-mode neural associative memory design with on-chip learning.

    Science.gov (United States)

    Wu, C Y; Lan, J F

    1996-01-01

    Based on the Grossberg mathematical model called the outstar, a modular neural net with on-chip learning and memory is designed and analyzed. The outstar is the minimal anatomy that can interpret the classical conditioning or associative memory. It can also be served as a general-purpose pattern learning device. To realize the outstar, CMOS (complimentary metal-oxide semiconductor) current-mode analog dividers are developed to implement the special memory called the ratio-type memory. Furthermore, a CMOS current-mode analog multiplier is used to implement the correlation. The implemented CMOS outstar can on-chip store the relative ratio values of the trained weights for a long time. It can also be modularized to construct general neural nets. HSPICE (a circuit simulator of Meta Software, Inc.) simulation results of the CMOS outstar circuits as associative memory and pattern learner have successfully verified their functions. The measured results of the fabricated CMOS outstar circuits have also successfully confirmed the ratio memory and on-chip learning capability of the circuits. Furthermore, it has been shown that the storage time of the ratio memory can be as long as five minutes without refreshment. Also the outstar can enhance the contrast of the stored pattern within a long period. This makes the outstar circuits quite feasible in many applications.

  10. Network-on-chip the next generation of system-on-chip integration

    CERN Document Server

    Kundu, Santanu

    2014-01-01

    ""What makes this book special as compared to the current literature in the field is that it provides a complete picture of NoC architectures. In fact, current books in the context of NoCs are usually specific and presuppose a basic knowledge of NoC architectures. Conversely, this book provides a complete guide for both unskilled readers and researchers working in the area, to acquire not only the basic concepts but also the advanced techniques for improving power, cost and performance metrics of the on-chip communication system.""-Maurizio Palesi, Kore University, Italy.

  11. On-Chip Network Design Automation with Source Routing Switches

    Institute of Scientific and Technical Information of China (English)

    MA Liwei; SUN Yihe

    2007-01-01

    Network-on-chip (NoC) is a new design paradigm for system-on-chip intraconnections in the billion-transistor era. Application specific on-chip network design is essential for NoC success in this new era.This paper presents a class of source routing switch that can be used to efficiently form arbitrary network topologies and that can be optimized for various applications. Hardware description language versions of the networks can be generated automatically for simulations and for syntheses. A series of switches and networks has been configured with their performances including latency, delay, area, and power, and analyzed theoretically and experimentally. The results show that this NoC architecture provides a large design space for application specific on-chip network designs.

  12. Error Control for Network-on-Chip Links

    CERN Document Server

    Fu, Bo

    2012-01-01

    As technology scales into nanoscale regime, it is impossible to guarantee the perfect hardware design. Moreover, if the requirement of 100% correctness in hardware can be relaxed, the cost of manufacturing, verification, and testing will be significantly reduced. Many approaches have been proposed to address the reliability problem of on-chip communications. This book focuses on the use of error control codes (ECCs) to improve on-chip interconnect reliability. Coverage includes detailed description of key issues in NOC error control faced by circuit and system designers, as well as practical error control techniques to minimize the impact of these errors on system performance. Provides a detailed background on the state of error control methods for on-chip interconnects; Describes the use of more complex concatenated codes such as Hamming Product Codes with Type-II HARQ, while emphasizing integration techniques for on-chip interconnect links; Examines energy-efficient techniques for integrating multiple error...

  13. Crosstalk in modern on-chip interconnects a FDTD approach

    CERN Document Server

    Kaushik, B K; Patnaik, Amalendu

    2016-01-01

    The book provides accurate FDTD models for on-chip interconnects, covering most recent advancements in materials and design. Furthermore, depending on the geometry and physical configurations, different electrical equivalent models for CNT and GNR based interconnects are presented. Based on the electrical equivalent models the performance comparison among the Cu, CNT and GNR-based interconnects are also discussed in the book. The proposed models are validated with the HSPICE simulations. The book introduces the current research scenario in the modeling of on-chip interconnects. It presents the structure, properties, and characteristics of graphene based on-chip interconnects and the FDTD modeling of Cu based on-chip interconnects. The model considers the non-linear effects of CMOS driver as well as the transmission line effects of interconnect line that includes coupling capacitance and mutual inductance effects. In a more realistic manner, the proposed model includes the effect of width-dependent MFP of the ...

  14. Reliability, Availability and Serviceability of Networks-on-Chip

    CERN Document Server

    Cota, Érika; Soares Lubaszewski, Marcelo

    2012-01-01

    This book presents an overview of the issues related to the test, diagnosis and fault-tolerance of Network on Chip-based systems. It is the first book dedicated to the quality aspects of NoC-based systems and will serve as an invaluable reference to the problems, challenges, solutions, and trade-offs related to designing and implementing state-of-the-art, on-chip communication architectures.

  15. Nanofluidic Lab-On-Chip Technology for DNA Identification

    Science.gov (United States)

    2013-09-30

    technical 3. DATES COVERED (From - To) May 2012 - Jun 2013 4. TITLE AND SUBTITLE 5a. CONTRACT NUMBER Nanofluidic LaB-ON-Chip Technology for DNA...AVAILABILITY STATEMENT Publicly available. 3-0/ 3/Oo3o%J - 14. ABSTRACT In this project we have investigated the potential of nanofluidic lab-on...chip nanofluidic platforms may enable rapid and inexpensive, characterization and analysis of DNA biomarkers. Advantages include overall ease of

  16. Signal processing for on-chip space division multiplexing

    DEFF Research Database (Denmark)

    Peucheret, Christophe; Ding, Yunhong; Xu, Jing;

    2015-01-01

    Our recent results on the demonstration of on-chip mode-division multiplexing are reviewed, with special emphasis on nonlinear all-optical signal processing. Mode-selective parametric processes are demonstrated in a silicon-on-insulator waveguide.......Our recent results on the demonstration of on-chip mode-division multiplexing are reviewed, with special emphasis on nonlinear all-optical signal processing. Mode-selective parametric processes are demonstrated in a silicon-on-insulator waveguide....

  17. Integrated Millimeter-Wave Antennas for On-Chip Communication

    Directory of Open Access Journals (Sweden)

    S. Zainud-Deen

    2016-03-01

    Full Text Available This paper introduces the design and analysis of circularly polarized (CP and dual-polarized on-chip microstrip antennas for wireless communication at 60 GHz. The CP on-chip antenna consists of a circular aluminum patch with two overlapped circular slots fed by the transmission line. The radiation characteristics of the CP have been analyzed using the finite integration technique and finite element method based electromagnetic solvers. The CP antenna introduces left-hand circular polarization and employs as on-chip transmitter. A design of dual-polarized on-chip microstrip antenna at 60 GHz is investigated and is employed as on-chip receiver. The dual ports of the dual polarized antenna are designed with high isolation between them in order to be used as a two on-chip receivers. The radiation characteristics of the dual-port antenna have been calculated. The effect of the separation distance between the CP-antenna and the dual-polarized antenna on the same chip has been investigated. The performance parameters like the reflection coefficient, transmission coefficient, and the transmission gain of the two antennas at different separation distances have been introduced.

  18. Cytostretch, an Organ-on-Chip Platform

    Directory of Open Access Journals (Sweden)

    Nikolas Gaio

    2016-07-01

    Full Text Available Organ-on-Chips (OOCs are micro-fabricated devices which are used to culture cells in order to mimic functional units of human organs. The devices are designed to simulate the physiological environment of tissues in vivo. Cells in some types of OOCs can be stimulated in situ by electrical and/or mechanical actuators. These actuations can mimic physiological conditions in real tissue and may include fluid or air flow, or cyclic stretch and strain as they occur in the lung and heart. These conditions similarly affect cultured cells and may influence their ability to respond appropriately to physiological or pathological stimuli. To date, most focus has been on devices specifically designed to culture just one functional unit of a specific organ: lung alveoli, kidney nephrons or blood vessels, for example. In contrast, the modular Cytostretch membrane platform described here allows OOCs to be customized to different OOC applications. The platform utilizes silicon-based micro-fabrication techniques that allow low-cost, high-volume manufacturing. We describe the platform concept and its modules developed to date. Membrane variants include membranes with (i through-membrane pores that allow biological signaling molecules to pass between two different tissue compartments; (ii a stretchable micro-electrode array for electrical monitoring and stimulation; (iii micro-patterning to promote cell alignment; and (iv strain gauges to measure changes in substrate stress. This paper presents the fabrication and the proof of functionality for each module of the Cytostretch membrane. The assessment of each additional module demonstrate that a wide range of OOCs can be achieved.

  19. Identification of microfluidic two-phase flow patterns in lab-on-chip devices.

    Science.gov (United States)

    Yang, Zhaochu; Dong, Tao; Halvorsen, Einar

    2014-01-01

    This work describes a capacitive sensor for identification of microfluidic two-phase flow in lab-on-chip devices. With interdigital electrodes and thin insulation layer utilized, this sensor is capable of being integrated with the microsystems easily. Transducing principle and design considerations are presented with respect to the microfluidic gas/liquid flow patterns. Numerical simulation results verify the operational principle. And the factors affecting the performance of the sensor are discussed. Besides, a feasible process flow for the fabrication is also proposed.

  20. Thin film magnetostrictive sensor with on-chip readout

    Science.gov (United States)

    Lu, Yong

    We report the first successful integration of magnetostrictive Metglas2605S2 (Fesb{78}Sisb9Bsb{13}) thin film sensor system on silicon with high resolution capacitive readout. A deposition process for Metglas thin film has been developed to allow easy control of thin film composition. An amorphous microstructure has been achieved over a wide temperature range, and in-situ magnetic domain alignment can be accomplished at room temperature as the film is deposited. The thin film has been characterized by Inductively Coupled Plasma (ICP) analysis for composition, X-Ray Diffraction (XRD) spectrum for microstructure, magnetization measurement for domain alignment and capacitive measurement for magnetostriction. The thin film is suitable for any magnetostrictive sensor applications, in particular, for IC compatible microsensors and microactuators. We have demonstrated the subsequent process integration with IC fabrication technology. Here, the Metglas thin film has been successfully incorporated to micromechanical structures using surface micromachining with appropriate choice of sacrificial layer and low stress mechanical layers. In addition, we present the development of a high resolution capacitive readout circuit co-integrated with the sensor. The readout circuit is based on a floating gate MOSFET configuration, requiring just a single transistor and operated at DC or low frequencies. Using the prototype developed in-house, we have successfully demonstrated a resolution capability of 10sp{-17} F, this translates to a few A in terms of cantilever beam deflection of the sensor. The floating gate readout technique is readily applicable to any capacitive sensors with a need for on-chip readout. It is also an ideal in-situ test structure for on IC chip process characterization and parameter extraction.

  1. PERFORMANCE ENHANCED ROUTER DESIGN FOR NETWORK ON CHIP

    Directory of Open Access Journals (Sweden)

    Anbu chozhan.P

    2013-04-01

    Full Text Available Network on chip is a new paradigm for on chip design that is able to sustain the communication provisions for the SoC with the desired performance. NOC applies networking methodology concepts to system on chip data transfer and it gives noticeable elevation over conventionalbus based communication. NOC router is the backbone of on chip communication which directs the flow of data. In NOC router the arbiter is used during number of inputs request for the similar out port. Arbiter generates the grant based on the priority and previous granted input. For NOC router we have design the efficient round robin arbiter and analyse the power and area. In this paper on chip router is designed with a buffering technique of FWFT based asynchronous FIFO which improves timing and reduce power consumption. The proposed design of router is simulated and synthesized in Xilinx ISE 13.2 and the source code is written in Verilog. Cadence soc encounter of technology ami035 is used to generate layout of router and RTL compiler is used to compute area, power and timing.

  2. Electroforming of Bi(1-x)Sb(x) nanowires for high-efficiency micro-thermoelectric cooling devices on a chip.

    Energy Technology Data Exchange (ETDEWEB)

    Overmyer, Donald L.; Webb, Edmund Blackburn, III (,; ); Siegal, Michael P.; Yelton, William Graham

    2006-11-01

    Active cooling of electronic systems for space-based and terrestrial National Security missions has demanded use of Stirling, reverse-Brayton, closed Joule-Thompson, pulse tube and more elaborate refrigeration cycles. Such cryocoolers are large systems that are expensive, demand large powers, often contain moving parts and are difficult to integrate with electronic systems. On-chip, solid-state, active cooling would greatly enhance the capabilities of future systems by reducing the size, cost and inefficiencies compared to existing solutions. We proposed to develop the technology for a thermoelectric cooler capable of reaching 77K by replacing bulk thermoelectric materials with arrays of Bi{sub 1-x}Sb{sub x} nanowires. Furthermore, the Sandia-developed technique we will use to produce the oriented nanowires occurs at room temperature and can be applied directly to a silicon substrate. Key obstacles include (1) optimizing the Bi{sub 1-x}Sb{sub x} alloy composition for thermoelectric properties; (2) increasing wire aspect ratios to 3000:1; and (3) increasing the array density to {ge} 10{sup 9} wires/cm{sup 2}. The primary objective of this LDRD was to fabricate and test the thermoelectric properties of arrays of Bi{sub 1-x}Sb{sub x} nanowires. With this proof-of-concept data under our belts we are positioned to engage National Security systems customers to invest in the integration of on-chip thermoelectric coolers for future missions.

  3. Waveguide coupled resonance fluorescence from on-chip quantum emitter.

    Science.gov (United States)

    Makhonin, Maxim N; Dixon, James E; Coles, Rikki J; Royall, Ben; Luxmoore, Isaac J; Clarke, Edmund; Hugues, Maxime; Skolnick, Maurice S; Fox, A Mark

    2014-12-10

    Resonantly driven quantum emitters offer a very promising route to obtain highly coherent sources of single photons required for applications in quantum information processing (QIP). Realizing this for on-chip scalable devices would be important for scientific advances and practical applications in the field of integrated quantum optics. Here we report on-chip quantum dot (QD) resonance fluorescence (RF) efficiently coupled into a single-mode waveguide, a key component of a photonic integrated circuit, with a negligible resonant laser background and show that the QD coherence is enhanced by more than a factor of 4 compared to off-resonant excitation. Single-photon behavior is confirmed under resonant excitation, and fast fluctuating charge dynamics are revealed in autocorrelation g((2)) measurements. The potential for triggered operation is verified in pulsed RF. These results pave the way to a novel class of integrated quantum-optical devices for on-chip quantum information processing with embedded resonantly driven quantum emitters.

  4. Exploring Alternative Topologies for Network-on-Chip Architectures

    Directory of Open Access Journals (Sweden)

    Shafi Patel

    2011-01-01

    Full Text Available With increase in integration density and complexity of the system-on-Chip (SOC, the conventional interconnects are not suitable to fulfill the demands. The application of traditional network technologies in the form of Network-on-Chip is a potential solution. NoC design space has many variables. Selection of a better topology results in lesser complexities and better power-efficiency. In the proposed work, key research area in Network-on-chip design targeting communication infrastructure specially focusing on optimized topology design is worked upon. The simulation is modeled using a conventional network simulator tool packet tracer 5.3, in which by selecting proposed Topology 35.7 % reduction in traversing the longest path is observed.

  5. Electron cooling

    Science.gov (United States)

    Meshkov, I.; Sidorin, A.

    2004-10-01

    The brief review of the most significant and interesting achievements in electron cooling method, which took place during last two years, is presented. The description of the electron cooling facilities-storage rings and traps being in operation or under development-is given. The applications of the electron cooling method are considered. The following modern fields of the method development are discussed: crystalline beam formation, expansion into middle and high energy electron cooling (the Fermilab Recycler Electron Cooler, the BNL cooler-recuperator, cooling with circulating electron beam, the GSI project), electron cooling in traps, antihydrogen generation, electron cooling of positrons (the LEPTA project).

  6. Stochastic Cooling

    Energy Technology Data Exchange (ETDEWEB)

    Blaskiewicz, M.

    2011-01-01

    Stochastic Cooling was invented by Simon van der Meer and was demonstrated at the CERN ISR and ICE (Initial Cooling Experiment). Operational systems were developed at Fermilab and CERN. A complete theory of cooling of unbunched beams was developed, and was applied at CERN and Fermilab. Several new and existing rings employ coasting beam cooling. Bunched beam cooling was demonstrated in ICE and has been observed in several rings designed for coasting beam cooling. High energy bunched beams have proven more difficult. Signal suppression was achieved in the Tevatron, though operational cooling was not pursued at Fermilab. Longitudinal cooling was achieved in the RHIC collider. More recently a vertical cooling system in RHIC cooled both transverse dimensions via betatron coupling.

  7. On-Chip Integration of Cell-Free Gene Expression

    Science.gov (United States)

    Buxboim, Amnon; Morpurgo, Margherita; Bar-Dagan, Maya; Frydman, Veronica; Zbaida, David; Bar-Ziv, Roy

    2006-03-01

    We present a synthetic approach for the study of gene networks in vitro which is complementary to traditional in vivo methodologies. We have developed a technology for submicron integration of functional genes and on-chip protein synthesis using a cell-free transcription/translation system. The interaction between genes is facilitated by diffusion of on-chip gene expression products from `source' genes towards `acceptor' genes. Our technology is simple and inexpensive and can serve as an improved platform for a wide variety of protein and DNA biochip applications.

  8. Entangled photons from on-chip slow light

    CERN Document Server

    Takesue, Hiroki; Kuramochi, Eiichi; Notomi, Masaya

    2014-01-01

    We report the first entanglement generation experiment using an on-chip slow light device. With highly efficient spontaneous four-wave mixing enhanced by the slow light effect in a coupled resonator optical waveguide based on a silicon photonic crystal, we generated 1.5-$\\mu$m-band high-dimensional time-bin entangled photon pairs. We undertook two-photon interference experiments and observed the coincidence fringes with visibilities $>74\\%$. The present result enables us to realize an on-chip entanglement source with a very small footprint, which is an essential function for quantum information processing based on integrated quantum photonics.

  9. Ultrasound assisted particle and cell manipulation on-chip.

    Science.gov (United States)

    Mulvana, Helen; Cochran, Sandy; Hill, Martyn

    2013-11-01

    Ultrasonic fields are able to exert forces on cells and other micron-scale particles, including microbubbles. The technology is compatible with existing lab-on-chip techniques and is complementary to many alternative manipulation approaches due to its ability to handle many cells simultaneously over extended length scales. This paper provides an overview of the physical principles underlying ultrasonic manipulation, discusses the biological effects relevant to its use with cells, and describes emerging applications that are of interest in the field of drug development and delivery on-chip. © 2013.

  10. Designing network on-chip architectures in the nanoscale era

    CERN Document Server

    Flich, Jose

    2010-01-01

    Going beyond isolated research ideas and design experiences, Designing Network On-Chip Architectures in the Nanoscale Era covers the foundations and design methods of network on-chip (NoC) technology. The contributors draw on their own lessons learned to provide strong practical guidance on various design issues.Exploring the design process of the network, the first part of the book focuses on basic aspects of switch architecture and design, topology selection, and routing implementation. In the second part, contributors discuss their experiences in the industry, offering a roadmap to recent p

  11. On-chip photonic tweezers for photonics, microfluidics, and biology

    Science.gov (United States)

    Pin, Christophe; Renaut, Claude; Tardif, Manon; Jager, Jean-Baptiste; Delamadeleine, Eric; Picard, Emmanuel; Peyrade, David; Hadji, Emmanuel; de Fornel, Frédérique; Cluzel, Benoît

    2017-04-01

    Near-field optical forces arise from evanescent electromagnetic fields and can be advantageously used for on-chip optical trapping. In this work, we investigate how evanescent fields at the surface of photonic cavities can efficiently trap micro-objects such as polystyrene particles and bacteria. We study first the influence of trapped particle's size on the trapping potential and introduce an original optofluidic near-field optical microscopy technique. Then we analyze the rotational motion of trapped clusters of microparticles and investigate their possible use as microfluidic micro-tools such as integrated micro-flow vane. Eventually, we demonstrate efficient on-chip optical trapping of various kinds of bacteria.

  12. Advances on Microsized On-Chip Lithium-Ion Batteries.

    Science.gov (United States)

    Liu, Lixiang; Weng, Qunhong; Lu, Xueyi; Sun, Xiaolei; Zhang, Lin; Schmidt, Oliver G

    2017-09-27

    Development of microsized on-chip batteries plays an important role in the design of modern micro-electromechanical systems, miniaturized biomedical sensors, and many other small-scale electronic devices. This emerging field intimately correlates with the topics of rechargeable batteries, nanomaterials, on-chip microfabrication, etc. In recent years, a number of novel designs are proposed to increase the energy and power densities per footprint area, as well as other electrochemical performances of microsized lithium-ion batteries. These advances may guide the pathway for the future development of microbatteries. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  13. Net on-chip Brillouin gain based on suspended silicon nanowires

    CERN Document Server

    Van Laer, Raphaël; Kuyken, Bart; Baets, Roel; Van Thourhout, Dries

    2015-01-01

    The century-old study of photon-phonon coupling has seen a remarkable revival in the past decade. Driven by early observations of dynamical back-action, the field progressed to ground-state cooling and the counting of individual phonons. A recent branch investigates the potential of traveling-wave, optically broadband photon-phonon interaction in silicon circuits. Here, we report continuous-wave Brillouin gain exceeding the optical losses in a series of suspended silicon beams, a step towards selective on-chip amplifiers. We obtain efficiencies up to $10^{4} \\, \\text{W}^{-1}\\text{m}^{-1}$, the highest to date in the phononic gigahertz range. We also find indications that geometric disorder poses a significant challenge towards nanoscale phonon-based technologies.

  14. Thermodynamics and efficiency of an autonomous on-chip Maxwell's demon.

    Science.gov (United States)

    Kutvonen, Aki; Koski, Jonne; Ala-Nissila, Tapio

    2016-02-18

    In his famous letter in 1870, Maxwell describes how Joule's law can be violated "only by the intelligent action of a mere guiding agent", later coined as Maxwell's demon by Lord Kelvin. In this letter we study thermodynamics of information using an experimentally feasible Maxwell's demon setup based a single electron transistor capacitively coupled to a single electron box, where both the system and the Demon can be clearly identified. Such an engineered on-chip Demon measures and performes feedback on the system, which can be observed as cooling whose efficiency can be adjusted. We present a detailed analysis of the system and the Demon, including the second law of thermodynamics for bare and coarse grained entropy production and the flow of information as well as efficiency of information production and utilization. Our results demonstrate how information thermodynamics can be used to improve functionality of modern nanoscale devices.

  15. Thermodynamics and efficiency of an autonomous on-chip Maxwell’s demon

    Science.gov (United States)

    Kutvonen, Aki; Koski, Jonne; Ala-Nissila, Tapio

    2016-01-01

    In his famous letter in 1870, Maxwell describes how Joule’s law can be violated “only by the intelligent action of a mere guiding agent”, later coined as Maxwell’s demon by Lord Kelvin. In this letter we study thermodynamics of information using an experimentally feasible Maxwell’s demon setup based a single electron transistor capacitively coupled to a single electron box, where both the system and the Demon can be clearly identified. Such an engineered on-chip Demon measures and performes feedback on the system, which can be observed as cooling whose efficiency can be adjusted. We present a detailed analysis of the system and the Demon, including the second law of thermodynamics for bare and coarse grained entropy production and the flow of information as well as efficiency of information production and utilization. Our results demonstrate how information thermodynamics can be used to improve functionality of modern nanoscale devices. PMID:26887504

  16. Microtextured Surfaces for Turbine Blade Impingement Cooling

    Science.gov (United States)

    Fryer, Jack

    2014-01-01

    Gas turbine engine technology is constantly challenged to operate at higher combustor outlet temperatures. In a modern gas turbine engine, these temperatures can exceed the blade and disk material limits by 600 F or more, necessitating both internal and film cooling schemes in addition to the use of thermal barrier coatings. Internal convective cooling is inadequate in many blade locations, and both internal and film cooling approaches can lead to significant performance penalties in the engine. Micro Cooling Concepts, Inc., has developed a turbine blade cooling concept that provides enhanced internal impingement cooling effectiveness via the use of microstructured impingement surfaces. These surfaces significantly increase the cooling capability of the impinging flow, as compared to a conventional untextured surface. This approach can be combined with microchannel cooling and external film cooling to tailor the cooling capability per the external heating profile. The cooling system then can be optimized to minimize impact on engine performance.

  17. Capability Paternalism

    NARCIS (Netherlands)

    Claassen, R.J.G.

    2014-01-01

    A capability approach prescribes paternalist government actions to the extent that it requires the promotion of specific functionings, instead of the corresponding capabilities. Capability theorists have argued that their theories do not have much of these paternalist implications, since promoting c

  18. High quantum-efficiency photon-number-resolving detector for photonic on-chip information processing

    CERN Document Server

    Calkins, Brice; Lita, Adriana E; Metcalf, Benjamin J; Kolthammer, W Steven; Linares, Antia Lamas; Spring, Justin B; Humphreys, Peter C; Mirin, Richard P; Gates, James C; Smith, Peter G R; Walmsley, Ian A; Gerrits, Thomas; Nam, Sae Woo

    2013-01-01

    The integrated optical circuit is a promising architecture for the realization of complex quantum optical states and information networks. One element that is required for many of these applications is a high-efficiency photon detector capable of photon-number discrimination. We present an integrated photonic system in the telecom band at 1550 nm based on UV-written silica-on-silicon waveguides and modified transition-edge sensors capable of number resolution and over 40% efficiency. Exploiting the mode transmission failure of these devices, we multiplex three detectors in series to demonstrate a combined 79% +/- 2% detection efficiency with a single pass, and 88% +/- 3% at the operating wavelength of an on-chip terminal reflection grating. Furthermore, our optical measurements clearly demonstrate no significant unexplained loss in this system due to scattering or reflections. This waveguide and detector design therefore allows the placement of number-resolving single-photon detectors of predictable efficienc...

  19. CMOS Image Sensor with On-Chip Image Compression: A Review and Performance Analysis

    Directory of Open Access Journals (Sweden)

    Milin Zhang

    2010-01-01

    Full Text Available Demand for high-resolution, low-power sensing devices with integrated image processing capabilities, especially compression capability, is increasing. CMOS technology enables the integration of image sensing and image processing, making it possible to improve the overall system performance. This paper reviews the current state of the art in CMOS image sensors featuring on-chip image compression. Firstly, typical sensing systems consisting of separate image-capturing unit and image-compression processing unit are reviewed, followed by systems that integrate focal-plane compression. The paper also provides a thorough review of a new design paradigm, in which image compression is performed during the image-capture phase prior to storage, referred to as compressive acquisition. High-performance sensor systems reported in recent years are also introduced. Performance analysis and comparison of the reported designs using different design paradigm are presented at the end.

  20. Single-Sided Digital Microfluidic (SDMF Devices for Effective Coolant Delivery and Enhanced Two-Phase Cooling

    Directory of Open Access Journals (Sweden)

    Sung-Yong Park

    2016-12-01

    Full Text Available Digital microfluidics (DMF driven by electrowetting-on-dielectric (EWOD has recently been attracting great attention as an effective liquid-handling platform for on-chip cooling. It enables rapid transportation of coolant liquid sandwiched between two parallel plates and drop-wise thermal rejection from a target heating source without additional mechanical components such as pumps, microchannels, and capillary wicks. However, a typical sandwiched configuration in DMF devices only allows sensible heat transfer, which seriously limits heat rejection capability, particularly for high-heat-flux thermal dissipation. In this paper, we present a single-sided digital microfluidic (SDMF device that enables not only effective liquid handling on a single-sided surface, but also two-phase heat transfer to enhance thermal rejection performance. Several droplet manipulation functions required for two-phase cooling were demonstrated, including continuous droplet injection, rapid transportation as fast as 7.5 cm/s, and immobilization on the target hot spot where heat flux is locally concentrated. Using the SDMF platform, we experimentally demonstrated high-heat-flux cooling on the hydrophilic-coated hot spot. Coolant droplets were continuously transported to the target hot spot which was mitigated below 40 K of the superheat. The effective heat transfer coefficient was stably maintained even at a high heat flux regime over ~130 W/cm2, which will allow us to develop a reliable thermal management module. Our SDMF technology offers an effective on-chip cooling approach, particularly for high-heat-flux thermal management based on two-phase heat transfer.

  1. On-chip immunoelectrophoresis of extracellular vesicles released from human breast cancer cells.

    Science.gov (United States)

    Akagi, Takanori; Kato, Kei; Kobayashi, Masashi; Kosaka, Nobuyoshi; Ochiya, Takahiro; Ichiki, Takanori

    2015-01-01

    Extracellular vesicles (EVs) including exosomes and microvesicles have attracted considerable attention in the fields of cell biology and medicine. For a better understanding of EVs and further exploration of their applications, the development of analytical methods for biological nanovesicles has been required. In particular, considering the heterogeneity of EVs, methods capable of measuring individual vesicles are desired. Here, we report that on-chip immunoelectrophoresis can provide a useful method for the differential protein expression profiling of individual EVs. Electrophoresis experiments were performed on EVs collected from the culture supernatant of MDA-MB-231 human breast cancer cells using a measurement platform comprising a microcapillary electrophoresis chip and a laser dark-field microimaging system. The zeta potential distribution of EVs that reacted with an anti-human CD63 (exosome and microvesicle marker) antibody showed a marked positive shift as compared with that for the normal immunoglobulin G (IgG) isotype control. Thus, on-chip immunoelectrophoresis could sensitively detect the over-expression of CD63 glycoproteins on EVs. Moreover, to explore the applicability of on-chip immunoelectrophoresis to cancer diagnosis, EVs collected from the blood of a mouse tumor model were analyzed by this method. By comparing the zeta potential distributions of EVs after their immunochemical reaction with normal IgG, and the anti-human CD63 and anti-human CD44 (cancer stem cell marker) antibodies, EVs of tumor origin circulating in blood were differentially detected in the real sample. The result indicates that the present method is potentially applicable to liquid biopsy, a promising approach to the low-invasive diagnosis of cancer.

  2. On-chip immunoelectrophoresis of extracellular vesicles released from human breast cancer cells.

    Directory of Open Access Journals (Sweden)

    Takanori Akagi

    Full Text Available Extracellular vesicles (EVs including exosomes and microvesicles have attracted considerable attention in the fields of cell biology and medicine. For a better understanding of EVs and further exploration of their applications, the development of analytical methods for biological nanovesicles has been required. In particular, considering the heterogeneity of EVs, methods capable of measuring individual vesicles are desired. Here, we report that on-chip immunoelectrophoresis can provide a useful method for the differential protein expression profiling of individual EVs. Electrophoresis experiments were performed on EVs collected from the culture supernatant of MDA-MB-231 human breast cancer cells using a measurement platform comprising a microcapillary electrophoresis chip and a laser dark-field microimaging system. The zeta potential distribution of EVs that reacted with an anti-human CD63 (exosome and microvesicle marker antibody showed a marked positive shift as compared with that for the normal immunoglobulin G (IgG isotype control. Thus, on-chip immunoelectrophoresis could sensitively detect the over-expression of CD63 glycoproteins on EVs. Moreover, to explore the applicability of on-chip immunoelectrophoresis to cancer diagnosis, EVs collected from the blood of a mouse tumor model were analyzed by this method. By comparing the zeta potential distributions of EVs after their immunochemical reaction with normal IgG, and the anti-human CD63 and anti-human CD44 (cancer stem cell marker antibodies, EVs of tumor origin circulating in blood were differentially detected in the real sample. The result indicates that the present method is potentially applicable to liquid biopsy, a promising approach to the low-invasive diagnosis of cancer.

  3. Research highlights: digital assays on chip.

    Science.gov (United States)

    Kim, Donghyuk; Wei, Qingshan; Kong, Janay Elise; Ozcan, Aydogan; Di Carlo, Dino

    2015-01-07

    The ability to break up a volume of fluid into smaller pieces that are confined or separated to prevent molecular communication/transport is a key capability intrinsic to microfluidic systems. This capability has been used to develop or implement digital versions of traditional molecular analysis assays, including digital PCR and digital immunoassays/ELISA. In these digital versions, the concentration of the target analyte is in a range such that, when sampled into smaller fluid volumes, either a single molecule or no molecule may be present. Subsequent amplification is sensitive enough to obtain a digital readout of the presence of these target molecules. Advantages of such approaches that are claimed include quantification without calibration and robustness to variations in reaction conditions or times because the digital readout is less sensitive to absolute signal intensity levels. Weaknesses of digital approaches include a lower dynamic range of concentrations over which the assay is sensitive, which depends on the total volume that can be analyzed. We highlight recent efforts to expand the dynamic range of digital assays based on exploiting reaction/diffusion phenomena. A side-by-side study that evaluates the strengths of digital assays reveals that the majority of these claims are supported, with specific caveats. Finally, we highlight approaches to apply digital assays to analyze new types of reactions, including the active transport of protons across membranes by ATPases at the single protein level - perhaps opening up new biophysical understanding and screening opportunities, similar to widely deployed single-molecule ion channel analysis.

  4. Comb Capacitor Structures for On-Chip Physical Uncloneable Function

    NARCIS (Netherlands)

    Roy, D.; Klootwijk, J.H.; Verhaegh, N.A.M.; Roosen, H.H.A.J.; Wolters, Robertus A.M.

    2009-01-01

    Planar inter-digitated comb capacitor structures are an excellent tool for on-chip capacitance measurement and evaluation of properties of coating layers with varying composition. These comb structures are easily fabricated in a single step in the last metallization layer of a standard IC process.

  5. Custom Topology Generation for Network-on-Chip

    DEFF Research Database (Denmark)

    Stuart, Matthias Bo; Sparsø, Jens

    2007-01-01

    This paper compares simulated annealing and tabu search for generating custom topologies for applications with periodic behaviour executing on a network-on-chip. The approach differs from previous work by starting from a fixed mapping of IP-cores to routers and performing design space exploration...

  6. Exploration within the Network-on-Chip Paradigm

    NARCIS (Netherlands)

    Wolkotte, Pascal Theodoor

    2009-01-01

    A general purpose processor used to consist of a single processing core, which performed and controlled all tasks on the chip. Its functionality and maximum clock frequency grew steadily over the years. Due to the continuous increase of the number of transistors available on-chip and the operational

  7. A virtual channel router for on-chip networks

    NARCIS (Netherlands)

    Kavaldjiev, Nikolay; Smit, Gerard J.M.; Jansen, Pierre G.

    2004-01-01

    This paper proposes an architecture of a virtual channel router for an on-chip network1. The router has simple dynamic arbitration which is deterministic and fair. We show that the size of the proposed router is reduced by 49% and the speed increases 1.4 times compared to a conventional virtual chan

  8. A virtual channel router for on-chip networks

    OpenAIRE

    Kavaldjiev, Nikolay; Smit, Gerard J.M.; Jansen, Pierre G.

    2004-01-01

    This paper proposes an architecture of a virtual channel router for an on-chip network1. The router has simple dynamic arbitration which is deterministic and fair. We show that the size of the proposed router is reduced by 49% and the speed increases 1.4 times compared to a conventional virtual channel router.

  9. Two Architectures for On-chip Virtual Channel Router

    NARCIS (Netherlands)

    Kavaldjiev, Nikolay; Smit, Gerard J.M.; Jansen, Pierre G.

    2004-01-01

    This paper compares the implementation results of two architectures for virtual channel router. Since the router is used for building an on-chip network, its small size is critical. Together with the total design area we provide information about the distribution of this area between the main router

  10. A Virtual Channel Router for On-chip Networks

    NARCIS (Netherlands)

    Kavaldjiev, Nikolay; Smit, Gerard J.M.; Jansen, Pierre G.

    2004-01-01

    This paper proposes an architecture of a virtual channel router for an on-chip network1. The router has simple dynamic arbitration which is deterministic and fair. We show that the size of the proposed router is reduced by 49% and the speed increases 1.4 times compared to a conventional virtual chan

  11. A Virtual Channel Router for On-chip Networks

    NARCIS (Netherlands)

    Kavaldjiev, N.K.; Smit, Gerardus Johannes Maria; Jansen, P.G.

    This paper proposes an architecture of a virtual channel router for an on-chip network1. The router has simple dynamic arbitration which is deterministic and fair. We show that the size of the proposed router is reduced by 49% and the speed increases 1.4 times compared to a conventional virtual

  12. Two Architectures for On-chip Virtual Channel Router

    NARCIS (Netherlands)

    Kavaldjiev, N.K.; Smit, Gerardus Johannes Maria; Jansen, P.G.

    2004-01-01

    This paper compares the implementation results of two architectures for virtual channel router. Since the router is used for building an on-chip network, its small size is critical. Together with the total design area we provide information about the distribution of this area between the main router

  13. On-chip separation and sensing systems for hydrodynamic chromatography

    NARCIS (Netherlands)

    Blom, M.T.

    2002-01-01

    The feasibility of on-chip analytical separations using planar hydrodynamic chromatography (HDC) in Pyrex-silicon and fused silica chips has been demonstrated. In order to sketch the analytical separations area in which the HDC chip has to operate, an introduction was given of important macro-scale

  14. Customizing and hardwiring on-chip interconnects in FPGAs

    NARCIS (Netherlands)

    Hur, J.Y.

    2011-01-01

    This thesis presents our investigations on how to efficiently utilize on-chip wires to improve network performance in reconfigurable hardware. A fieldprogrammable gate array (FPGA), as a key component in a modern reconfigurable platform, accommodates many-millions of wires and the on-demand

  15. Field Programmable Gate Arrays with Hardwired Networks on Chip

    NARCIS (Netherlands)

    Wahlah, M.A.

    2012-01-01

    Technology down-scaling and platform-based designs have enforced a number of application and architecture trends for system-on-chip (SOC) designs. A modern SOC is now a multi-functional machine that can execute a large number of complex applications by using tens or even hundreds of intellectual

  16. Reverse Engineering Human Pathophysiology with Organs-on-Chips.

    Science.gov (United States)

    Ingber, Donald E

    2016-03-10

    While studies of cultured cells have led to new insights into biological control, greater understanding of human pathophysiology requires the development of experimental systems that permit analysis of intercellular communications and tissue-tissue interactions in a more relevant organ context. Human organs-on-chips offer a potentially powerful new approach to confront this long-standing problem.

  17. Performance Analysis on Router Arbitration for On-chip Networking

    Directory of Open Access Journals (Sweden)

    G. Selvaraj

    2014-08-01

    Full Text Available This study is a comprehensive report on performance analyses of Round Robin and matrix arbitrations to enhance the reliability of on-chip networks. Arbiter is used in Network-on-Chip (NoC router when number of input ports requested is the same as output ports. If many inputs are requested for same output port, the matrix arbiter deals it by forming a 5×5 matrix based on input and output ports. Next, it allots the priority to the requested input ports and simultaneously generates a control signal for selecting the input port to send the packet to output port. The Robin arbiter generates the grant signal on the basis of priority allotted to the input ports. The simulation results of arbitration analysis shows that the router design of front end model consumes less power by 8% and occupies smaller area by 3% on chip. The area on chip is around 64% of available area using Round Robin arbitration compare to that of matrix arbitration. This study also implements hamming distance in order to check the error free data transmission of the NoC router.

  18. Novel on-chip spiral inductors with back hollow structure

    Science.gov (United States)

    Wang, Gang; Liu, Houfang; Li, Xiaoning; Qiu, Haochuan; Yang, Yi; Ren, Tian-Ling

    2017-01-01

    In this work, on-chip spiral inductors with back hollow structure have been prepared on the 500 μm thick silicon substrate with high resistivity (ρ > 5000Ωcm). The silicon underneath the inductor region has been completely etched by deep etching process in order to reduce the substrate eddy current losses. Several types of square spiral on-chip inductors with different metal width (w) and line spacing (s) in the case of w + s = 40μm were fabricated. The experimental results are verified by FEM simulation using HFSS software. The results show that the Q-factor and self-resonance frequency of back hollow structure inductors are both enhanced compared with the conventional inductors. Furthermore, narrower width of coils for the on-chip spiral inductors with back hollow structure can result in higher Q-factor, inductance L and self-resonance frequency, which provide some important design guides for the fabrication of the high performance on-chip inductors.

  19. Comb Capacitor Structures for On-Chip Physical Uncloneable Function

    NARCIS (Netherlands)

    Roy, D.; Klootwijk, J.H.; Verhaegh, N.A.M.; Roosen, H.H.A.J.; Wolters, R.A.M.

    2009-01-01

    Planar inter-digitated comb capacitor structures are an excellent tool for on-chip capacitance measurement and evaluation of properties of coating layers with varying composition. These comb structures are easily fabricated in a single step in the last metallization layer of a standard IC process. C

  20. Exploration within the Network-on-Chip Paradigm

    NARCIS (Netherlands)

    Wolkotte, P.T.

    2009-01-01

    A general purpose processor used to consist of a single processing core, which performed and controlled all tasks on the chip. Its functionality and maximum clock frequency grew steadily over the years. Due to the continuous increase of the number of transistors available on-chip and the operational

  1. A Light-Weight Statically Scheduled Network-on-Chip

    DEFF Research Database (Denmark)

    Sørensen, Rasmus Bo; Schoeberl, Martin; Sparsø, Jens

    2012-01-01

    This paper investigates how a light-weight, statically scheduled network-on-chip (NoC) for real-time systems can be designed and implemented. The NoC provides communication channels between all cores with equal bandwidth and latency. The design is FPGA-friendly and consumes a minimum of resources...

  2. Customizing and hardwiring on-chip interconnects in FPGAs

    NARCIS (Netherlands)

    Hur, J.Y.

    2011-01-01

    This thesis presents our investigations on how to efficiently utilize on-chip wires to improve network performance in reconfigurable hardware. A fieldprogrammable gate array (FPGA), as a key component in a modern reconfigurable platform, accommodates many-millions of wires and the on-demand reconfig

  3. On-Chip Built-in Jitter Measurement Circuit for PLL Based on Duty-Cycle Modulation Vernier Delay Line

    Institute of Scientific and Technical Information of China (English)

    YU Fei; Chung Len Lee; ZHANG Jingkai

    2007-01-01

    Phase-locked loops (PLLs) are essential wherever a local event is synchronized with a periodic external event. They are utilized as on-chip clock frequency generators to synthesize a low skew and higher internal frequency clock from an external lower frequency signal and its characterization and measurement have recently been calling for more and more attention. In this paper, a built-in on-chip circuit for measuring jitter of PLL based on a duty cycle modulation vernier delay line is proposed and demonstrated. The circuit employs two delay lines to measure the timing difference and transform the difference signal into digital words. The vernier lines are composed of delay cells whose duty cycle can be adjusted by a feedback voltage. It enables the circuit to have a self calibration capability which eliminates the mismatch problem caused by the process variation.

  4. SEMICONDUCTOR INTEGRATED CIRCUITS: A full on-chip CMOS low-dropout voltage regulator with VCCS compensation

    Science.gov (United States)

    Leisheng, Gao; Yumei, Zhou; Bin, Wu; Jianhua, Jiang

    2010-08-01

    A full on-chip CMOS low-dropout (LDO) voltage regulator with high PSR is presented. Instead of relying on the zero generated by the load capacitor and its equivalent series resistance, the proposed LDO generates a zero by voltage-controlled current sources for stability. The compensating capacitor for the proposed scheme is only 0.18 pF, which is much smaller than the capacitor of the conventional compensation scheme. The full on-chip LDO was fabricated in commercial 0.35 μm CMOS technology. The active chip area of the LDO (including the bandgap voltage reference) is 400 × 270 μm2. Experimental results show that the PSR of the LDO is -58.7 dB at a frequency of 10 Hz and -20 dB at a frequency of 1 MHz. The proposed LDO is capable of sourcing an output current up to 50 mA.

  5. A Bio-Inspired Hybrid Thermal Management Approach for Three-Dimensional Network-on-Chip Systems.

    Science.gov (United States)

    Dash, Ranjita; Risco-Martin, Jose Luis; Turuk, Ashok Kumar; Pangracious, Vinod; Ayala, Jose L; Majumdar, Amartya

    2017-05-15

    Three-dimensional network-on-chip systems are getting popular among the integrated circuit (IC) manufacturer because of reduced latency, heterogeneous integration of technologies on a single chip, high yield, and consumption of less interconnecting power. However, the addition of functional units in the Z-direction has resulted in higher on-chip temperature and appearance of local hotspots on the die. The increase in temperature degrades the performance, lifetime, reliability, and increases the maintenance cost of 3-D ICs. To keep the heat within an acceptable limit, floorplanning is the widely accepted solution. Proper arrangement of functional units across different layers can lead to uniform thermal distribution in the chip. For systems with high density of elements, few hotspots cannot be eliminated in the floorplanning approach. To overcome, liquid microchannel cooling technology has emerged as an efficient and scalable solution for 3-D network-on-chip. In this paper, we propose a novel hybrid algorithm combining both floor-planning, and liquid microchannel placement to alleviate the hotspots in high-density systems. A mathematical model is proposed to deal with heat transfer due to diffusion, and convention. The proposed approach is independent of topology. Three different topologies: 3-D stacked homogeneous mesh architecture, 3-D stacked heterogeneous mesh architecture, and 3-D stacked ciliated mesh architecture are considered to check the effectiveness of the proposed algorithm in hotspot reduction. A thermal comparison is made with and without the proposed thermal management approach for the above architectures considered. It is observed that there is a significant reduction in on-chip temperature when the proposed thermal management approach is applied.

  6. Comparison of a Ring On-Chip Network and a Code-Division Multiple-Access On-Chip Network

    Directory of Open Access Journals (Sweden)

    Xin Wang

    2007-01-01

    Full Text Available Two network-on-chip (NoC designs are examined and compared in this paper. One design applies a bidirectional ring connection scheme, while the other design applies a code-division multiple-access (CDMA connection scheme. Both of the designs apply globally asynchronous locally synchronous (GALS scheme in order to deal with the issue of transferring data in a multiple-clock-domain environment of an on-chip system. The two NoC designs are compared with each other by their network structures, data transfer principles, network node structures, and their asynchronous designs. Both the synchronous and the asynchronous designs of the two on-chip networks are realized using a hardware-description language (HDL in order to make the entire designs suit the commonly used synchronous design tools and flow. The performance estimation and comparison of the two NoC designs which are based on the HDL realizations are addressed. By comparing the two NoC designs, the advantages and disadvantages of applying direct connection and CDMA connection schemes in an on-chip communication network are discussed.

  7. An Energy-Efficient Reconfigurable Circuit Switched Network-on-Chip

    NARCIS (Netherlands)

    Wolkotte, P.T.; Smit, Gerardus Johannes Maria; Rauwerda, G.K.; Smit, L.T.

    Network-on-Chip (NoC) is an energy-efficient on-chip communication architecture for multi-tile System-on-Chip (SoC) architectures. The SoC architecture, including its run-time software, can replace inflexible ASICs for future ambient systems. These ambient systems have to be flexible as well as

  8. A system-level multiprocessor system-on-chip modeling framework

    DEFF Research Database (Denmark)

    Virk, Kashif Munir; Madsen, Jan

    2004-01-01

    We present a system-level modeling framework to model system-on-chips (SoC) consisting of heterogeneous multiprocessors and network-on-chip communication structures in order to enable the developers of today's SoC designs to take advantage of the flexibility and scalability of network-on-chip...

  9. Laser Doppler Blood Flow Imaging Using a CMOS Imaging Sensor with On-Chip Signal Processing

    Directory of Open Access Journals (Sweden)

    Cally Gill

    2013-09-01

    Full Text Available The first fully integrated 2D CMOS imaging sensor with on-chip signal processing for applications in laser Doppler blood flow (LDBF imaging has been designed and tested. To obtain a space efficient design over 64 × 64 pixels means that standard processing electronics used off-chip cannot be implemented. Therefore the analog signal processing at each pixel is a tailored design for LDBF signals with balanced optimization for signal-to-noise ratio and silicon area. This custom made sensor offers key advantages over conventional sensors, viz. the analog signal processing at the pixel level carries out signal normalization; the AC amplification in combination with an anti-aliasing filter allows analog-to-digital conversion with a low number of bits; low resource implementation of the digital processor enables on-chip processing and the data bottleneck that exists between the detector and processing electronics has been overcome. The sensor demonstrates good agreement with simulation at each design stage. The measured optical performance of the sensor is demonstrated using modulated light signals and in vivo blood flow experiments. Images showing blood flow changes with arterial occlusion and an inflammatory response to a histamine skin-prick demonstrate that the sensor array is capable of detecting blood flow signals from tissue.

  10. Laser doppler blood flow imaging using a CMOS imaging sensor with on-chip signal processing.

    Science.gov (United States)

    He, Diwei; Nguyen, Hoang C; Hayes-Gill, Barrie R; Zhu, Yiqun; Crowe, John A; Gill, Cally; Clough, Geraldine F; Morgan, Stephen P

    2013-09-18

    The first fully integrated 2D CMOS imaging sensor with on-chip signal processing for applications in laser Doppler blood flow (LDBF) imaging has been designed and tested. To obtain a space efficient design over 64 × 64 pixels means that standard processing electronics used off-chip cannot be implemented. Therefore the analog signal processing at each pixel is a tailored design for LDBF signals with balanced optimization for signal-to-noise ratio and silicon area. This custom made sensor offers key advantages over conventional sensors, viz. the analog signal processing at the pixel level carries out signal normalization; the AC amplification in combination with an anti-aliasing filter allows analog-to-digital conversion with a low number of bits; low resource implementation of the digital processor enables on-chip processing and the data bottleneck that exists between the detector and processing electronics has been overcome. The sensor demonstrates good agreement with simulation at each design stage. The measured optical performance of the sensor is demonstrated using modulated light signals and in vivo blood flow experiments. Images showing blood flow changes with arterial occlusion and an inflammatory response to a histamine skin-prick demonstrate that the sensor array is capable of detecting blood flow signals from tissue.

  11. Improved color metrics in solid-state lighting via utilization of on-chip quantum dots

    Science.gov (United States)

    Mangum, Benjamin D.; Landes, Tiemo S.; Theobald, Brian R.; Kurtin, Juanita N.

    2017-02-01

    While Quantum Dots (QDs) have found commercial success in display applications, there are currently no widely available solid state lighting products making use of QD nanotechnology. In order to have real-world success in today's lighting market, QDs must be capable of being placed in on-chip configurations, as remote phosphor configurations are typically much more expensive. Here we demonstrate solid-state lighting devices made with on-chip QDs. These devices show robust reliability under both dry and wet high stress conditions. High color quality lighting metrics can easily be achieved using these narrow, tunable QD downconverters: CRI values of Ra > 90 as well as R9 values > 80 are readily available when combining QDs with green phosphors. Furthermore, we show that QDs afford a 15% increase in overall efficiency compared to traditional phosphor downconverted SSL devices. The fundamental limit of QD linewidth is examined through single particle QD emission studies. Using standard Cd-based QD synthesis, it is found that single particle linewidths of 20 nm FWHM represent a lower limit to the narrowness of QD emission in the near term.

  12. Microfluidic integration of wirebonded microcoils for on-chip applications in nuclear magnetic resonance

    Science.gov (United States)

    Meier, Robert Ch; Höfflin, Jens; Badilita, Vlad; Wallrabe, Ulrike; Korvink, Jan G.

    2014-04-01

    We present an integrated microfluidic device for on-chip nuclear magnetic resonance (NMR) studies of microscopic samples. The devices are fabricated by means of a MEMS compatible process, which joins the automatic wirebond winding of solenoidal microcoils and the manufacturing of a complex microfluidic network using dry-photoresist lamination. The wafer-scale cleanroom process is potentially capable of mass fabrication. Since the non-invasive NMR analysis technique is rather insensitive, particularly when microscopic sample volumes are to be investigated, we also focus on the optimization of the wirebonded microcoil for this purpose. The on-chip measurement of NMR signals from a 20 nl sample are evaluated for imaging analysis of microparticles, as well as for spectroscopy. Whereas the latter revealed that the sensitivity of the MEMS microcoil is comparable with hand-wound devices and achieves a full-width-half-maximum linewidth of 8 Hz, the imaging experiment demonstrated 10 μm isotropic spatial resolution within an experiment time of 38 min for a 3D image with a field of view of 1 mm × 1 mm × 0.5 mm (500 000 voxels).

  13. Laser Doppler Blood Flow Imaging Using a CMOS Imaging Sensor with On-Chip Signal Processing

    Science.gov (United States)

    He, Diwei; Nguyen, Hoang C.; Hayes-Gill, Barrie R.; Zhu, Yiqun; Crowe, John A.; Gill, Cally; Clough, Geraldine F.; Morgan, Stephen P.

    2013-01-01

    The first fully integrated 2D CMOS imaging sensor with on-chip signal processing for applications in laser Doppler blood flow (LDBF) imaging has been designed and tested. To obtain a space efficient design over 64 × 64 pixels means that standard processing electronics used off-chip cannot be implemented. Therefore the analog signal processing at each pixel is a tailored design for LDBF signals with balanced optimization for signal-to-noise ratio and silicon area. This custom made sensor offers key advantages over conventional sensors, viz. the analog signal processing at the pixel level carries out signal normalization; the AC amplification in combination with an anti-aliasing filter allows analog-to-digital conversion with a low number of bits; low resource implementation of the digital processor enables on-chip processing and the data bottleneck that exists between the detector and processing electronics has been overcome. The sensor demonstrates good agreement with simulation at each design stage. The measured optical performance of the sensor is demonstrated using modulated light signals and in vivo blood flow experiments. Images showing blood flow changes with arterial occlusion and an inflammatory response to a histamine skin-prick demonstrate that the sensor array is capable of detecting blood flow signals from tissue. PMID:24051525

  14. Breaking the Loss Limitation of On-chip High-confinement Resonators

    CERN Document Server

    Ji, Xingchen; Roberts, Samantha P; Dutt, Avik; Cardenas, Jaime; Okawachi, Yoshitomo; Bryant, Alex; Gaeta, Alexander L; Lipson, Michal

    2016-01-01

    On-chip optical resonators have the promise of revolutionizing numerous fields including metrology and sensing; however, their optical losses have always lagged behind their larger discrete resonator counterparts based on crystalline materials and flowable glass. Silicon nitride (Si3N4) ring resonators open up capabilities for optical routing, frequency comb generation, optical clocks and high precision sensing on an integrated platform. However, simultaneously achieving high quality factor and high confinement in Si3N4 (critical for nonlinear processes for example) remains a challenge. Here, we show that addressing surface roughness enables us to overcome the loss limitations and achieve high-confinement, on-chip ring resonators with a quality factor (Q) of 37 million for a ring with 2.5 {\\mu}m width and 67 million for a ring with 10 {\\mu}m width. We show a clear systematic path for achieving these high quality factors. Furthermore, we extract the loss limited by the material absorption in our films to be 0....

  15. Capability ethics

    NARCIS (Netherlands)

    I.A.M. Robeyns (Ingrid)

    2012-01-01

    textabstractThe capability approach is one of the most recent additions to the landscape of normative theories in ethics and political philosophy. Yet in its present stage of development, the capability approach is not a full-blown normative theory, in contrast to utilitarianism, deontological

  16. Capability ethics

    NARCIS (Netherlands)

    I.A.M. Robeyns (Ingrid)

    2012-01-01

    textabstractThe capability approach is one of the most recent additions to the landscape of normative theories in ethics and political philosophy. Yet in its present stage of development, the capability approach is not a full-blown normative theory, in contrast to utilitarianism, deontological theor

  17. Capability ethics

    NARCIS (Netherlands)

    I.A.M. Robeyns (Ingrid)

    2012-01-01

    textabstractThe capability approach is one of the most recent additions to the landscape of normative theories in ethics and political philosophy. Yet in its present stage of development, the capability approach is not a full-blown normative theory, in contrast to utilitarianism, deontological theor

  18. Dynamic capabilities

    DEFF Research Database (Denmark)

    Grünbaum, Niels Nolsøe; Stenger, Marianne

    2013-01-01

    it was dominated by a lack of systematism, assessment, monitoring, marketing speculations and feasibility calculation. Furthermore, the sphere was dictated by asymmetric supplier-customer relationships and negotiation power leading, among other possible factors, to meager profitability.......The consequences of dynamic capabilities (i.e. innovation performance and profitability) is an under researched area in the growing body of literature on dynamic capabilities and innovation management. This study aims to examine the relationship between dynamic capabilities, innovation performance...... and profitability of small and medium sized manufacturing enterprises operating in volatile environments. A multi-case study design was adopted as research strategy. The findings reveal a positive relationship between dynamic capabilities and innovation performance in the case companies, as we would expect. It was...

  19. On-chip noninterference angular momentum multiplexing of broadband light.

    Science.gov (United States)

    Ren, Haoran; Li, Xiangping; Zhang, Qiming; Gu, Min

    2016-05-13

    Angular momentum division has emerged as a physically orthogonal multiplexing method in high-capacity optical information technologies. However, the typical bulky elements used for information retrieval from the overall diffracted field, based on the interference method, impose a fundamental limit toward realizing on-chip multiplexing. We demonstrate noninterference angular momentum multiplexing by using a mode-sorting nanoring aperture with a chip-scale footprint as small as 4.2 micrometers by 4.2 micrometers, where nanoring slits exhibit a distinctive outcoupling efficiency on tightly confined plasmonic modes. The nonresonant mode-sorting sensitivity and scalability of our approach enable on-chip parallel multiplexing over a bandwidth of 150 nanometers in the visible wavelength range. The results offer the possibility of ultrahigh-capacity and miniaturized nanophotonic devices harnessing angular momentum division.

  20. Power management design for lab-on-chip biosensors.

    Science.gov (United States)

    Xiaojian Yu; Moez, Kambiz; I-Chyn Wey; Jie Chen

    2016-08-01

    Over the past decades, we have witnessed the growth demands of portable lab-on-chip biosensors. These lab-on-chip devices are mostly powered by battery, and intelligent power management systems are required to provide supply voltage for different functional units on biosensors (e.g. a microfluidic control system might require higher voltage than the rest working units of biosensors). In this paper, a fully integrated multiple-stage voltage multiplier is proposed to provide high-voltage power needs. The proposed design was implemented with the IBM's 0.13um CMOS process with a maximum power efficiency of 81.02% and maximum voltage conversion efficiency of 99.8% under a supply voltage of 1.2 V.

  1. An on-chip diamond optical parametric oscillator

    CERN Document Server

    Hausmann, B J M; Venkataraman, V; Deotare, P; Loncar, M

    2013-01-01

    Efficient, on-chip optical nonlinear processes are of great interest for the development of compact, robust, low-power consuming systems for applications in spectroscopy, metrology, sensing and classical and quantum optical information processing. Diamond holds promise for these applications, owing to its exceptional properties. However, although significant progress has been made in the development of an integrated diamond photonics platform, optical nonlinearities in diamond have not been explored much apart from Raman processes in bulk samples. Here, we demonstrate optical parametric oscillations (OPO) via four wave mixing (FWM) in single crystal diamond (SCD) optical networks on-chip consisting of waveguide-coupled microring resonators. Threshold powers as low as 20mW are enabled by ultra-high quality factor (1*10^6) diamond ring resonators operating at telecom wavelengths, and up to 20 new wavelengths are generated from a single-frequency pump laser. We also report the inferred nonlinear refractive index...

  2. Phase-modulating lasers toward on-chip integration.

    Science.gov (United States)

    Kurosaka, Yoshitaka; Hirose, Kazuyoshi; Sugiyama, Takahiro; Takiguchi, Yu; Nomoto, Yoshiro

    2016-07-26

    Controlling laser-beam patterns is indispensable in modern technology, where lasers are typically combined with phase-modulating elements such as diffractive optical elements or spatial light modulators. However, the combination of separate elements is not only a challenge for on-chip miniaturisation but also hinders their integration permitting the switchable control of individual modules. Here, we demonstrate the operation of phase-modulating lasers that emit arbitrarily configurable beam patterns without requiring any optical elements or scanning devices. We introduce a phase-modulating resonator in a semiconductor laser, which allows the concurrent realisation of lasing and phase modulation. The fabricated devices are on-chip-sized, making them suitable for integration. We believe this work will provide a breakthrough in various laser applications such as switchable illumination patterns for bio-medical applications, structured illuminations, and even real three-dimensional or highly realistic displays, which cannot be realised with simple combinations of conventional devices or elements.

  3. Energy Consumption Oriented Network-on-Chip Mapping Method

    Directory of Open Access Journals (Sweden)

    Feichao Wang

    2013-12-01

    Full Text Available In this paper, mapping algorithm has been mainly studied. The main work and contribution have been generalized as follows: Through the research of existing on-chip network mapping algorithm and global optimization algorithm, a multi-step mapping algorithm for low-power consumption have been designed, which is combined with the task allocation and the task scheduling. Compared with the traditional mapping algorithm, the algorithm in this paper takes the factors of task scheduling and allocation into account, mapping algorithm has three steps: task scheduling, IP core mapping and data block mapping. The simulation results show that the mapping method in this paper can effectively reduce Network-on-Chip (NoC power consumption. 

  4. Object-Oriented System-on-Network-on-Chip Template and Implementation: H.263 Case Study

    Institute of Scientific and Technical Information of China (English)

    MA Liwei; SUN Yihe

    2008-01-01

    Network-on-chip (NoC) technology enables a new system-on-chip paradigm, the system-on-network-on-chip (SoNoC) paradigm. One of the challenges in designing application-specific networks is modeling the on-chip system behavior and determining on-chip traffic characteristics. A universal object message level model for SoNoC was defined and an object-oriented methodology was developed to imple-ment this model in hardware and software. The model supports "object to core" synthesis and "function in-voking to network" mapping. A case study of an H.263 system verifies the model and methodology. System prototypes are easily built and on-chip traffic can be observed using the SoNoC model to provide real benchmarks for on-chip network design.

  5. Performance Evaluation of CDMA Router for Network-On-Chip

    Directory of Open Access Journals (Sweden)

    Anant W. Hinganikar

    2012-06-01

    Full Text Available This paper presents the performance evaluation of router based on code division multiple access technique (CDMA for Network-on-Chip (NoC. The design is synthesized using Xilinx Virtex4 XC4VLX200 device. The functional behavior is verified using Modelsim XE III 6.2 C. The delay and throughput values are obtained for variable payload sizes. Throughput-Power and Delay-Power characteristics are also verified for NoC.

  6. Analysis and Management of Communication in On-Chip Networks

    OpenAIRE

    Jafari, Fahimeh

    2015-01-01

    Regarding the needs of low-power, high-performance embedded systems and the growing computation-intensive applications, the number of computing resources in a single chip has enormously increased. The current VLSI technology is able to support such an integration of transistors and add many computing resources such as CPU, DSP, specific IPs, etc to build a Systemon- Chip (SoC). However, interconnection between resources becomes another challenging issue which can be raised by using an on-chip...

  7. Low-cost on-chip clock jitter measurement scheme

    OpenAIRE

    Omana, Martin; Rossi, Daniele; Giaffreda, Daniele; Metra, Cecilia; Mak, T.M.; Raman, Asifur; Tam, Simon

    2014-01-01

    In this paper, we present a low-cost, on-chip clock jitter digital measurement scheme for high performance microprocessors. It enables in situ jitter measurement during the test or debug phase. It provides very high measurement resolution and accuracy, despite the possible presence of power supply noise (representing a major source of clock jitter), at low area and power costs. The achieved resolution is scalable with technology node and can in principle be increased as much as desired, at lo...

  8. Energy Consumption Oriented Network-on-Chip Mapping Method

    OpenAIRE

    Feichao Wang

    2013-01-01

    In this paper, mapping algorithm has been mainly studied. The main work and contribution have been generalized as follows: Through the research of existing on-chip network mapping algorithm and global optimization algorithm, a multi-step mapping algorithm for low-power consumption have been designed, which is combined with the task allocation and the task scheduling. Compared with the traditional mapping algorithm, the algorithm in this paper takes the factors of task scheduling and allocatio...

  9. On-Chip Power-Combining for High-Power Schottky Diode-Based Frequency Multipliers

    Science.gov (United States)

    Chattopadhyay, Goutam; Mehdi, Imran; Schlecht, Erich T.; Lee, Choonsup; Siles, Jose V.; Maestrini, Alain E.; Thomas, Bertrand; Jung, Cecile D.

    2013-01-01

    A 1.6-THz power-combined Schottky frequency tripler was designed to handle approximately 30 mW input power. The design of Schottky-based triplers at this frequency range is mainly constrained by the shrinkage of the waveguide dimensions with frequency and the minimum diode mesa sizes, which limits the maximum number of diodes that can be placed on the chip to no more than two. Hence, multiple-chip power-combined schemes become necessary to increase the power-handling capabilities of high-frequency multipliers. The design presented here overcomes difficulties by performing the power-combining directly on-chip. Four E-probes are located at a single input waveguide in order to equally pump four multiplying structures (featuring two diodes each). The produced output power is then recombined at the output using the same concept.

  10. Biosensors in Health Care: The Milestones Achieved in Their Development towards Lab-on-Chip-Analysis

    Directory of Open Access Journals (Sweden)

    Suprava Patel

    2016-01-01

    Full Text Available Immense potentiality of biosensors in medical diagnostics has driven scientists in evolution of biosensor technologies and innovating newer tools in time. The cornerstone of the popularity of biosensors in sensing wide range of biomolecules in medical diagnostics is due to their simplicity in operation, higher sensitivity, ability to perform multiplex analysis, and capability to be integrated with different function by the same chip. There remains a huge challenge to meet the demands of performance and yield to its simplicity and affordability. Ultimate goal stands for providing point-of-care testing facility to the remote areas worldwide, particularly the developing countries. It entails continuous development in technology towards multiplexing ability, fabrication, and miniaturization of biosensor devices so that they can provide lab-on-chip-analysis systems to the community.

  11. Biosensors in Health Care: The Milestones Achieved in Their Development towards Lab-on-Chip-Analysis

    Science.gov (United States)

    Patel, Suprava; Nanda, Rachita; Sahoo, Sibasish; Mohapatra, Eli

    2016-01-01

    Immense potentiality of biosensors in medical diagnostics has driven scientists in evolution of biosensor technologies and innovating newer tools in time. The cornerstone of the popularity of biosensors in sensing wide range of biomolecules in medical diagnostics is due to their simplicity in operation, higher sensitivity, ability to perform multiplex analysis, and capability to be integrated with different function by the same chip. There remains a huge challenge to meet the demands of performance and yield to its simplicity and affordability. Ultimate goal stands for providing point-of-care testing facility to the remote areas worldwide, particularly the developing countries. It entails continuous development in technology towards multiplexing ability, fabrication, and miniaturization of biosensor devices so that they can provide lab-on-chip-analysis systems to the community. PMID:27042353

  12. Time-Predictable Communication on a Time-Division Multiplexing Network-on-Chip Multicore

    DEFF Research Database (Denmark)

    Sørensen, Rasmus Bo

    This thesis presents time-predictable inter-core communication on a multicore platform with a time-division multiplexing (TDM) network-on-chip (NoC) for hard real-time systems. The thesis is structured as a collection of papers that contribute within the areas of: reconfigurable TDM NoCs, static...... of the Argo NoC network interface (NI) that supports instantaneous reconfiguration, a TDM traffic scheduler that generates virtual circuit (VC) configurations for the Argo NoC, and software functions for two types of intercore communication. The new generation of the Argo NoC adds the capability...... in terms of shortening the TDM period. The thesis identifies two types of inter-core communication that are commonly used in real-time systems: message passing and state-based communication. We implement message passing as a circular buffer with the data transfer through the NoC. The worst-case execution...

  13. On-chip High-Voltage Generator Design

    CERN Document Server

    Tanzawa, Toru

    2013-01-01

    This book describes high-voltage generator design with switched-capacitor multiplier techniques.  The author provides various design techniques for switched-capacitor on-chip high-voltage generators, including charge pump circuits, regulators, level shifters, references, and oscillators.  Readers will see these techniques applied to system design in order to address the challenge of how the on-chip high-voltage generator is designed for Flash memories, LCD drivers, and other semiconductor devices to optimize the entire circuit area and power efficiency with a low voltage supply, while minimizing the cost.   ·         Shows readers how to design charge pump circuits with lower voltage operation, higher power efficiency, and smaller circuit area; ·         Describes comprehensive circuits and systems design of on-chip high-voltage generators; ·         Covers all the component circuit blocks, including charge pumps, pump regulators, level shifters, oscillators, and references.

  14. On-chip Magnetic Separation and Cell Encapsulation in Droplets

    Science.gov (United States)

    Chen, A.; Byvank, T.; Bharde, A.; Miller, B. L.; Chalmers, J. J.; Sooryakumar, R.; Chang, W.-J.; Bashir, R.

    2012-02-01

    The demand for high-throughput single cell assays is gaining importance because of the heterogeneity of many cell suspensions, even after significant initial sorting. These suspensions may display cell-to-cell variability at the gene expression level that could impact single cell functional genomics, cancer, stem-cell research and drug screening. The on-chip monitoring of individual cells in an isolated environment could prevent cross-contamination, provide high recovery yield and ability to study biological traits at a single cell level These advantages of on-chip biological experiments contrast to conventional methods, which require bulk samples that provide only averaged information on cell metabolism. We report on a device that integrates microfluidic technology with a magnetic tweezers array to combine the functionality of separation and encapsulation of objects such as immunomagnetically labeled cells or magnetic beads into pico-liter droplets on the same chip. The ability to control the separation throughput that is independent of the hydrodynamic droplet generation rate allows the encapsulation efficiency to be optimized. The device can potentially be integrated with on-chip labeling and/or bio-detection to become a powerful single-cell analysis device.

  15. Delay Optimized Architecture for On-Chip Communication

    Institute of Scientific and Technical Information of China (English)

    Sheraz Anjum; Jie Chen; Pei-Pei Yue; Jian Liu

    2009-01-01

    Networks-on-chip (NoC), a new system on chip (SoC) paradigm, has become a great focus of research by many groups during the last few years. Among all the NoC architectures that have been proposed until now, 2D-Mesh has proved to be the best architecture for implementation due to its regular and simple intercon- nection structure. In this paper, we propose a new interconnect architecture called 2D-diagonal mesh (2DDgl-Mesh) for on-chip communication. The 2DDgl- Mesh is almost similar to traditional 2D-Mesh in aspects of cost, area, and implementation, but it can outperform the later in delay. The both architectures are compared by using NS-2 (a network simulator) and CINSIM (a component based interconnection simulator) under the same traffic models and parametric conditions. The results of comparison show that under the proposed architecture, the packets can almost always be routed to their destinations in less time. In addition, our archi- tecture can sometimes perform better than 2D-Mesh in drop ratio for special fixed traffic models.

  16. Effects of 'Cooled' Cooling Air on Pre-Swirl Nozzle Design

    Science.gov (United States)

    Scricca, J. A.; Moore, K. D.

    2006-01-01

    It is common practice to use Pre-Swirl Nozzles to facilitate getting the turbine blade cooling air onboard the rotating disk with minimum pressure loss and reduced temperature. Higher engine OPR's and expanded aircraft operating envelopes have pushed cooling air temperatures to the limits of current disk materials and are stressing the capability to cool the blade with practical levels of cooling air flow. Providing 'Cooled' Cooling Air is one approach being considered to overcome these limitations. This presentation looks at how the introduction of 'Cooled' Cooling Air impacts the design of the Pre-Swirl Nozzles, specifically in relation to the radial location of the nozzles.

  17. DEVELOPMENT OF SINGLE-PHASED WATER-COOLING RADIATOR FOR COMPUTER CHIP

    Institute of Scientific and Technical Information of China (English)

    ZENG Ping; CHENG Guangming; LIU Jiulong; YANG Zhigang; SUN Xiaofeng; PENG Taijiang

    2007-01-01

    In order to cool computer chip efficiently with the least noise, a single phase water-cooling radiator for computer chip driven by piezoelectric pump with two parallel-connection chambers is developed. The structure and work principle of this radiator is described. Material, processing method and design principles of whole radiator are also explained. Finite element analysis (FEA) software,ANSYS, is used to simulate the heat distribution in the radiator. Testing equipments for water-cooling radiator are also listed. By experimental tests, influences of flowrate inside the cooling system and fan on chip cooling are explicated. This water-cooling radiator is proved more efficient than current air-cooling radiator with comparison experiments. During cooling the heater which simulates the working of computer chip with different power, the water-cooling radiator needs shorter time to reach lower steady temperatures than current air-cooling radiator.

  18. Danish Cool

    DEFF Research Database (Denmark)

    Toft, Anne Elisabeth

    2016-01-01

    Danish Cool. Keld Helmer-Petersen, Photography and the Photobook Handout exhibition text in English and Chinese by Anne Elisabeth Toft, Curator The exhibition Danish Cool. Keld Helmer-Petersen, Photography and the Photobook presents the ground-breaking work of late Danish photographer Keld Helmer...

  19. Fiber free plug and play on-chip scattering cytometer module – for implementation in microfluidic point of care devices

    DEFF Research Database (Denmark)

    Jensen, Thomas Glasdam; Kutter, Jörg Peter

    2010-01-01

    In this paper, we report on recent progress toward the development of a plug and play on-chip cytometer based on light scattering. By developing a device that does not depend on the critical alignment and cumbersome handling of fragile optical fibers, we approach a device that is suitable for non......-expert users and Point-Of-Care (POC) applications. It has been demonstrated that this device is capable of detecting and counting particles down to 1 μm at 100 particles per second. This device only depends on a single microfluidic channel. Hence, the device is easy to implement, or to use on its own....

  20. Capability approach

    DEFF Research Database (Denmark)

    Jensen, Niels Rosendal; Kjeldsen, Christian Christrup

    Lærebogen er den første samlede danske præsentation af den af Amartya Sen og Martha Nussbaum udviklede Capability Approach. Bogen indeholder en præsentation og diskussion af Sen og Nussbaums teoretiske platform. I bogen indgår eksempler fra såvel uddannelse/uddannelsespolitik, pædagogik og omsorg....

  1. ENTREPRENEURIAL CAPABILITIES

    DEFF Research Database (Denmark)

    Rasmussen, Lauge Baungaard; Nielsen, Thorkild

    2003-01-01

    The aim of this article is to analyse entrepreneurship from an action research perspective. What is entrepreneurship about? Which are the fundamental capabilities and processes of entrepreneurship? To answer these questions the article includes a case study of a Danish entrepreneur and his networks...

  2. Optical stochastic cooling in Tevatron

    CERN Document Server

    Lebedev, V

    2012-01-01

    Intrabeam scattering is the major mechanism resulting in a growth of beam emittances and fast luminosity degradation in the Tevatron. As a result in the case of optimal collider operation only about 40% of antiprotons are used to the store end and the rest are discarded. Beam cooling is the only effective remedy to increase the particle burn rate and, consequently, the luminosity. Unfortunately neither electron nor stochastic cooling can be effective at the Tevatron energy and bunch density. Thus the optical stochastic cooling (OSC) is the only promising technology capable to cool the Tevatron beam. Possible ways of such cooling implementation in the Tevatron and advances in the OSC cooling theory are discussed in this paper. The technique looks promising and potentially can double the average Tevatron luminosity without increasing its peak value and the antiproton production.

  3. Dynamic capabilities

    DEFF Research Database (Denmark)

    Grünbaum, Niels Nolsøe; Stenger, Marianne

    2013-01-01

    and profitability of small and medium sized manufacturing enterprises operating in volatile environments. A multi-case study design was adopted as research strategy. The findings reveal a positive relationship between dynamic capabilities and innovation performance in the case companies, as we would expect. It was...... it was dominated by a lack of systematism, assessment, monitoring, marketing speculations and feasibility calculation. Furthermore, the sphere was dictated by asymmetric supplier-customer relationships and negotiation power leading, among other possible factors, to meager profitability....

  4. On-chip integrated lasers for biophotonic applications

    DEFF Research Database (Denmark)

    Mappes, Timo; Wienhold, Tobias; Bog, Uwe

    Meeting the need of biomedical users, we develop disposable Lab-on-a-Chip systems based on commercially available polymers. We are combining passive microfluidics with active optical elements on-chip by integrating multiple solid-state and liquid-core lasers. While covering a wide range of laser...... emission wavelengths, the chips have the size of microscope cover slips and use optical and fluidic interconnects only. Here, we present our latest realizations of integrated optofluidic lasers using whispering gallery mode or distributed feedback laser cavities....

  5. Multicore systems on-chip practical software/hardware design

    CERN Document Server

    Abdallah, Abderazek Ben

    2013-01-01

    System on chips designs have evolved from fairly simple unicore, single memory designs to complex heterogeneous multicore SoC architectures consisting of a large number of IP blocks on the same silicon. To meet high computational demands posed by latest consumer electronic devices, most current systems are based on such paradigm, which represents a real revolution in many aspects in computing.The attraction of multicore processing for power reduction is compelling. By splitting a set of tasks among multiple processor cores, the operating frequency necessary for each core can be reduced, allowi

  6. A Time-predictable Memory Network-on-Chip

    DEFF Research Database (Denmark)

    Schoeberl, Martin; Chong, David VH; Puffitsch, Wolfgang

    2014-01-01

    To derive safe bounds on worst-case execution times (WCETs), all components of a computer system need to be time-predictable: the processor pipeline, the caches, the memory controller, and memory arbitration on a multicore processor. This paper presents a solution for time-predictable memory...... arbitration and access for chip-multiprocessors. The memory network-on-chip is organized as a tree with time-division multiplexing (TDM) of accesses to the shared memory. The TDM based arbitration completely decouples processor cores and allows WCET analysis of the memory accesses on individual cores without...

  7. Advancing Software Development for a Multiprocessor System-on-Chip

    Directory of Open Access Journals (Sweden)

    Stephen Bique

    2007-06-01

    Full Text Available A low-level language is the right tool to develop applications for some embedded systems. Notwithstanding, a high-level language provides a proper environment to develop the programming tools. The target device is a system-on-chip consisting of an array of processors with only local communication. Applications include typical streaming applications for digital signal processing. We describe the hardware model and stress the advantages of a flexible device. We introduce IDEA, a graphical integrated development environment for an array. A proper foundation for software development is a UML and standard programming abstractions in object-oriented languages.

  8. Two-photon tomography using on-chip quantum walks

    CERN Document Server

    Titchener, James; Sukhorukov, Andrey

    2016-01-01

    We present a conceptual approach to quantum tomography based on first expanding a quantum state across extra degrees of freedom and then exploiting the introduced sparsity to perform reconstruction. We formulate its application to photonic circuits, and show that measured spatial photon correlations at the output of a specially tailored discrete-continuous quantum-walk can enable full reconstruction of any two-photon spatially entangled and mixed state at the input. This approach does not require any tunable elements, so is well suited for integration with on-chip superconducting photon detectors.

  9. Microarchitecture of network-on-chip routers a designer's perspective

    CERN Document Server

    Dimitrakopoulos, Giorgos; Seitanidis, Ioannis

    2014-01-01

    This book provides a unified overview of network-on-chip router micro-architecture, the corresponding design opportunities and challenges, and existing solutions to overcome these challenges. The discussion focuses on the heart of a NoC, the NoC router, and how it interacts with the rest of the system. Coverage includes both basic and advanced design techniques that cover the entire router design space including router organization, flow control, pipelined operation, buffering architectures, as well as allocators' structure and algorithms. Router micro-architectural options are presented in a

  10. Compact models for nanophotonic structures and on-chip interconnects

    Science.gov (United States)

    Alam, Mehboob

    Over the last few years, scaling in deep submicron technologies has shifted the paradigm from device-dominated to interconnect-dominated design methodology. Consequently, there is an increasing interest towards the miniaturization of the guiding medium in nanoscale integrated circuits by exploring plasmon-based waveguides to alleviate the scaling issues associated with today's copper interconnect. In this thesis, we seek short and long-term solutions of on-chip interconnect by developing accurate compact models of on-chip interconnects and impedance characterization of nanophotonic structures. The developed system models are compact and accurate over the operating frequency range and the adopted approach have provided many critical insights and produced many important results. This thesis first presents a new modeling strategy that represents the nanostructure by its equivalent impedance. By applying either quasistatic approximation or separately solving for voltage and current for dominant mode, we reduce the field problem to a circuit problem. The impedance expressed in terms of circuit components is dependent on the material constant as well as the operating frequency. The modeling methodology is successfully applied to nanoparticles and oscillating nanosphere. The proposed model characterizes plasmon resonance in these nanostructures, thereby providing basic building block to develop spice models of complex plasmon-based waveguide for sub-wavelength propagation. We also presented several techniques to develop compact models of on-chip interconnects and passive components for accurate estimation of power, noise and delay of high speed integrated circuits. The automated method generates reduced order models that are accurate across either a narrow or a wide-range of frequencies. The proposed methods are based on Krylov subspace method with interpolation points dynamically selected using either spline based algorithm or discrete wavelet transform. Narrow and

  11. A Time-predictable Memory Network-on-Chip

    DEFF Research Database (Denmark)

    Schoeberl, Martin; Chong, David VH; Puffitsch, Wolfgang

    2014-01-01

    To derive safe bounds on worst-case execution times (WCETs), all components of a computer system need to be time-predictable: the processor pipeline, the caches, the memory controller, and memory arbitration on a multicore processor. This paper presents a solution for time-predictable memory...... arbitration and access for chip-multiprocessors. The memory network-on-chip is organized as a tree with time-division multiplexing (TDM) of accesses to the shared memory. The TDM based arbitration completely decouples processor cores and allows WCET analysis of the memory accesses on individual cores without...

  12. Experimental evaluation of cooling efficiency of the high performance cooling device

    Science.gov (United States)

    Nemec, Patrik; Malcho, Milan

    2016-06-01

    This work deal with experimental evaluation of cooling efficiency of cooling device capable transfer high heat fluxes from electric elements to the surrounding. The work contain description of cooling device, working principle of cooling device, construction of cooling device. Experimental part describe the measuring method of device cooling efficiency evaluation. The work results are presented in graphic visualization of temperature dependence of the contact area surface between cooling device evaporator and electronic components on the loaded heat of electronic components in range from 250 to 740 W and temperature dependence of the loop thermosiphon condenser surface on the loaded heat of electronic components in range from 250 to 740 W.

  13. An integrated lab-on-chip for rapid identification and simultaneous differentiation of tropical pathogens

    National Research Council Canada - National Science Library

    Tan, Jeslin J L; Capozzoli, Monica; Sato, Mitsuharu; Watthanaworawit, Wanitda; Ling, Clare L; Mauduit, Marjorie; Malleret, Benoît; Grüner, Anne-Charlotte; Tan, Rosemary; Nosten, François H; Snounou, Georges; Rénia, Laurent; Ng, Lisa F P

    2014-01-01

    .... In this study, a microfluidic lab-on-chip integrating multiplex molecular amplification and DNA microarray hybridization was developed for simultaneous detection and species differentiation of 26...

  14. The definition of cool

    Energy Technology Data Exchange (ETDEWEB)

    Nichiporuk, A.

    2005-05-01

    A new air cooling system at Agnico-Eagle's LaRonde mine, located in the Abitibi Region of Quebec is described. The new system serves a mine operating at 7,250 plus feet level. The system is installed at the surface; it utilizes ammonia to cool water, which cools the air. The system consists of four compressors which lower the temperature of the ammonia to minus 2 degrees C. Water, which at this temperature is 14 degrees, and ammonia pass through a plate heat exchanger simultaneously, however, without coming into contact with each other. The heat transfer that occurs causes the water's temperature to drop to 2 degrees C. The total volume of water cooled is 220 litres per second. The system is capable of reducing 636,000 cfm of air from 30 degrees C to 6 degrees C, to which 214,000 cfm of non-cooled air is added. This mixture, which is maintained at approximately 8 degrees C throughout the summer season, is sent underground to the deepest parts of the mine. The system runs from June to September, depending on the weather. In the evenings, when the temperature dips to around four to five degrees C, the water is shut down and side doors are opened to prevent the water from freezing.

  15. On-Chip Reconfigurable Hardware Accelerators for Popcount Computations

    Directory of Open Access Journals (Sweden)

    Valery Sklyarov

    2016-01-01

    Full Text Available Popcount computations are widely used in such areas as combinatorial search, data processing, statistical analysis, and bio- and chemical informatics. In many practical problems the size of initial data is very large and increase in throughput is important. The paper suggests two types of hardware accelerators that are (1 designed in FPGAs and (2 implemented in Zynq-7000 all programmable systems-on-chip with partitioning of algorithms that use popcounts between software of ARM Cortex-A9 processing system and advanced programmable logic. A three-level system architecture that includes a general-purpose computer, the problem-specific ARM, and reconfigurable hardware is then proposed. The results of experiments and comparisons with existing benchmarks demonstrate that although throughput of popcount computations is increased in FPGA-based designs interacting with general-purpose computers, communication overheads (in experiments with PCI express are significant and actual advantages can be gained if not only popcount but also other types of relevant computations are implemented in hardware. The comparison of software/hardware designs for Zynq-7000 all programmable systems-on-chip with pure software implementations in the same Zynq-7000 devices demonstrates increase in performance by a factor ranging from 5 to 19 (taking into account all the involved communication overheads between the programmable logic and the processing systems.

  16. On-chip inductor above dummy metal patterns

    Science.gov (United States)

    Hsu, Heng-Ming; Hsieh, Ming-Ming

    2008-07-01

    This work characterizes the on-chip inductor above dummy metals in CMOS technology. Since the dummy pattern influences the sheet resistance in chemical-mechanical planarization (CMP) process strongly [Schindler G, Steinlesberger G, Engelhardt M, Steinhögl W. Electrical characterization of copper interconnects with end-of-roadmap feature sizes. Solid-State Electron 2003;47:1233-36; Smith S, Walton AJ, Ross AWS, Bodammer GKH, Stevenson JTM. Evaluation of sheet resistance and electrical line width measurement techniques for copper damascene interconnect. IEEE Trans Semicond Manuf 2002;15:214-22.], three test structures are fabricated to compare the inductor performances in this paper. The measurements show that the Q value degrades 15.3% and self-resonance frequency decreases 9.5% in device with dummy metal pattern. Accordingly, an equivalent circuit is proposed to analyze this behavior, the results show that the insulator capacitor plays a key role in performance degradation. Result of this study quantifies the effect of on-chip inductor above dummy pattern.

  17. On-Chip Correlator for Passive Wireless SAW Multisensor Systems

    Directory of Open Access Journals (Sweden)

    Liqiang Xie

    2016-01-01

    Full Text Available For decoding the asynchronous superposition of response signals from different sensors, it is a challenge to achieve correlation in a code division multiplexing (CDM based passive wireless surface acoustic wave (SAW multisensor system. Therefore, an on-chip correlator scheme is developed in this paper. In contrast to conventional CDM-based systems, this novel scheme enables the correlations to be operated at the SAW sensors, instead of the reader. Thus, the response signals arriving at the reader are the result of cross-correlation on the chips. It is then easy for the reader to distinguish the sensor that is matched with the interrogating signal. The operation principle, signal analysis, and simulation of the novel scheme are described in the paper. The simulation results show the response signals from the correlations of the sensors. A clear spike pulse is presented in the response signals, when a sensor code is matched with the interrogating code. Simulations verify the feasibility of the on-chip correlator concept.

  18. Lab-on-chip systems for integrated bioanalyses.

    Science.gov (United States)

    Conde, João Pedro; Madaboosi, Narayanan; Soares, Ruben R G; Fernandes, João Tiago S; Novo, Pedro; Moulas, Geraud; Chu, Virginia

    2016-06-30

    Biomolecular detection systems based on microfluidics are often called lab-on-chip systems. To fully benefit from the miniaturization resulting from microfluidics, one aims to develop 'from sample-to-answer' analytical systems, in which the input is a raw or minimally processed biological, food/feed or environmental sample and the output is a quantitative or qualitative assessment of one or more analytes of interest. In general, such systems will require the integration of several steps or operations to perform their function. This review will discuss these stages of operation, including fluidic handling, which assures that the desired fluid arrives at a specific location at the right time and under the appropriate flow conditions; molecular recognition, which allows the capture of specific analytes at precise locations on the chip; transduction of the molecular recognition event into a measurable signal; sample preparation upstream from analyte capture; and signal amplification procedures to increase sensitivity. Seamless integration of the different stages is required to achieve a point-of-care/point-of-use lab-on-chip device that allows analyte detection at the relevant sensitivity ranges, with a competitive analysis time and cost.

  19. A Survey of Network-On-Chip Tools

    Directory of Open Access Journals (Sweden)

    Ahmed Ben Achballah

    2013-10-01

    Full Text Available Nowadays System-On-Chips (SoCs have evolved considerably in term of performances, reliability and integration capacity. The last advantage has induced the growth of the number of cores or Intellectual Properties (IPs in a same chip. Unfortunately, this important number of IPs has caused a new issue which is the intra-communication between the elements of a same chip. To resolve this problem, a new paradigm has been introduced which is the Network-On-Chip (NoC. Since the introduction of the NoC paradigm in the last decade, new methodologies and approaches have been presented by research community and many of them have been adopted by industrials. The literature contains many relevant studies and surveys discussing NoC proposals and contributions. However, few of them have discussed or proposed a comparative study of NoC tools. The objective of this work is to establish a reliable survey about available design, simulation or implementation NoC tools. We collected an important amount of information and characteristics about NoC dedicated tools that we will present throughout this survey. This study is built around a respectable amount of references and we hope it will help scientists.

  20. A Miniaturized On-Chip Colorimeter for Detecting NPK Elements

    Science.gov (United States)

    Liu, Rui-Tao; Tao, Lu-Qi; Liu, Bo; Tian, Xiang-Guang; Mohammad, Mohammad Ali; Yang, Yi; Ren, Tian-Ling

    2016-01-01

    Recently, precision agriculture has become a globally attractive topic. As one of the most important factors, the soil nutrients play an important role in estimating the development of precision agriculture. Detecting the content of nitrogen, phosphorus and potassium (NPK) elements more efficiently is one of the key issues. In this paper, a novel chip-level colorimeter was fabricated to detect the NPK elements for the first time. A light source–microchannel photodetector in a sandwich structure was designed to realize on-chip detection. Compared with a commercial colorimeter, all key parts are based on MEMS (Micro-Electro-Mechanical System) technology so that the volume of this on-chip colorimeter can be minimized. Besides, less error and high precision are achieved. The cost of this colorimeter is two orders of magnitude less than that of a commercial one. All these advantages enable a low-cost and high-precision sensing operation in a monitoring network. The colorimeter developed herein has bright prospects for environmental and biological applications. PMID:27527177

  1. Lab-on-chip systems for integrated bioanalyses

    Science.gov (United States)

    Madaboosi, Narayanan; Soares, Ruben R.G.; Fernandes, João Tiago S.; Novo, Pedro; Moulas, Geraud; Chu, Virginia

    2016-01-01

    Biomolecular detection systems based on microfluidics are often called lab-on-chip systems. To fully benefit from the miniaturization resulting from microfluidics, one aims to develop ‘from sample-to-answer’ analytical systems, in which the input is a raw or minimally processed biological, food/feed or environmental sample and the output is a quantitative or qualitative assessment of one or more analytes of interest. In general, such systems will require the integration of several steps or operations to perform their function. This review will discuss these stages of operation, including fluidic handling, which assures that the desired fluid arrives at a specific location at the right time and under the appropriate flow conditions; molecular recognition, which allows the capture of specific analytes at precise locations on the chip; transduction of the molecular recognition event into a measurable signal; sample preparation upstream from analyte capture; and signal amplification procedures to increase sensitivity. Seamless integration of the different stages is required to achieve a point-of-care/point-of-use lab-on-chip device that allows analyte detection at the relevant sensitivity ranges, with a competitive analysis time and cost. PMID:27365042

  2. Self-powered integrated systems-on-chip (energy chip)

    KAUST Repository

    Hussain, Muhammad Mustafa

    2010-04-23

    In today\\'s world, consumer driven technology wants more portable electronic gadgets to be developed, and the next big thing in line is self-powered handheld devices. Therefore to reduce the power consumption as well as to supply sufficient power to run those devices, several critical technical challenges need to be overcome: a. Nanofabrication of macro/micro systems which incorporates the direct benefit of light weight (thus portability), low power consumption, faster response, higher sensitivity and batch production (low cost). b. Integration of advanced nano-materials to meet the performance/cost benefit trend. Nano-materials may offer new functionalities that were previously underutilized in the macro/micro dimension. c. Energy efficiency to reduce power consumption and to supply enough power to meet that low power demand. We present a pragmatic perspective on a self-powered integrated System on Chip (SoC). We envision the integrated device will have two objectives: low power consumption/dissipation and on-chip power generation for implementation into handheld or remote technologies for defense, space, harsh environments and medical applications. This paper provides insight on materials choices, intelligent circuit design, and CMOS compatible integration.

  3. 3D Printing of Organs-On-Chips.

    Science.gov (United States)

    Yi, Hee-Gyeong; Lee, Hyungseok; Cho, Dong-Woo

    2017-01-25

    Organ-on-a-chip engineering aims to create artificial living organs that mimic the complex and physiological responses of real organs, in order to test drugs by precisely manipulating the cells and their microenvironments. To achieve this, the artificial organs should to be microfabricated with an extracellular matrix (ECM) and various types of cells, and should recapitulate morphogenesis, cell differentiation, and functions according to the native organ. A promising strategy is 3D printing, which precisely controls the spatial distribution and layer-by-layer assembly of cells, ECMs, and other biomaterials. Owing to this unique advantage, integration of 3D printing into organ-on-a-chip engineering can facilitate the creation of micro-organs with heterogeneity, a desired 3D cellular arrangement, tissue-specific functions, or even cyclic movement within a microfluidic device. Moreover, fully 3D-printed organs-on-chips more easily incorporate other mechanical and electrical components with the chips, and can be commercialized via automated massive production. Herein, we discuss the recent advances and the potential of 3D cell-printing technology in engineering organs-on-chips, and provides the future perspectives of this technology to establish the highly reliable and useful drug-screening platforms.

  4. 3D Printing of Organs-On-Chips

    Science.gov (United States)

    Yi, Hee-Gyeong; Lee, Hyungseok; Cho, Dong-Woo

    2017-01-01

    Organ-on-a-chip engineering aims to create artificial living organs that mimic the complex and physiological responses of real organs, in order to test drugs by precisely manipulating the cells and their microenvironments. To achieve this, the artificial organs should to be microfabricated with an extracellular matrix (ECM) and various types of cells, and should recapitulate morphogenesis, cell differentiation, and functions according to the native organ. A promising strategy is 3D printing, which precisely controls the spatial distribution and layer-by-layer assembly of cells, ECMs, and other biomaterials. Owing to this unique advantage, integration of 3D printing into organ-on-a-chip engineering can facilitate the creation of micro-organs with heterogeneity, a desired 3D cellular arrangement, tissue-specific functions, or even cyclic movement within a microfluidic device. Moreover, fully 3D-printed organs-on-chips more easily incorporate other mechanical and electrical components with the chips, and can be commercialized via automated massive production. Herein, we discuss the recent advances and the potential of 3D cell-printing technology in engineering organs-on-chips, and provides the future perspectives of this technology to establish the highly reliable and useful drug-screening platforms. PMID:28952489

  5. 3D Printing of Organs-On-Chips

    Directory of Open Access Journals (Sweden)

    Hee-Gyeong Yi

    2017-01-01

    Full Text Available Organ-on-a-chip engineering aims to create artificial living organs that mimic the complex and physiological responses of real organs, in order to test drugs by precisely manipulating the cells and their microenvironments. To achieve this, the artificial organs should to be microfabricated with an extracellular matrix (ECM and various types of cells, and should recapitulate morphogenesis, cell differentiation, and functions according to the native organ. A promising strategy is 3D printing, which precisely controls the spatial distribution and layer-by-layer assembly of cells, ECMs, and other biomaterials. Owing to this unique advantage, integration of 3D printing into organ-on-a-chip engineering can facilitate the creation of micro-organs with heterogeneity, a desired 3D cellular arrangement, tissue-specific functions, or even cyclic movement within a microfluidic device. Moreover, fully 3D-printed organs-on-chips more easily incorporate other mechanical and electrical components with the chips, and can be commercialized via automated massive production. Herein, we discuss the recent advances and the potential of 3D cell-printing technology in engineering organs-on-chips, and provides the future perspectives of this technology to establish the highly reliable and useful drug-screening platforms.

  6. Maximization of imaging resolution in optical wireless sensor/lab-on-chip/SoC networks with solar cells.

    Science.gov (United States)

    Arnon, Shlomi

    2010-09-01

    The availability of sophisticated and low-cost hardware on a single chip, for example, CMOS cameras, CPU, DSP, processors and communication transceivers, optics, microfluidics, and micromechanics, has fostered the development of system-on-chip (SoC) technology, such as lab-on-chip or wireless multimedia sensor networks (WMSNs). WMSNs are networks of wirelessly interconnected devices on a chip that are able to ubiquitously retrieve multimedia content such as video from the environment and transfer it to a central location for additional processing. In this paper, we study WMSNs that include an optical wireless communication transceiver that uses light to transmit the information. One of the primary challenges in SoC design is to attain adequate resources like energy harvesting using solar cells in addition to imaging and communication capabilities, all within stringent spatial limitations while maximizing system performances. There is an inevitable trade-off between enhancing the imaging resolution and the expense of reducing communication capacity and energy harvesting capabilities, on one hand, and increasing the communication or the solar cell size to the detriment of the imaging resolution, on the other hand. We study these trade-offs, derive a mathematical model to maximize the resolution of the imaging system, and present a numerical example that demonstrates maximum imaging resolution. Our results indicate that an eighth-order polynomial with only two constants provides the required area allocation between the different functionalities.

  7. On-Chip Clonal Analysis of Glioma-Stem-Cell Motility and Therapy Resistance.

    Science.gov (United States)

    Gallego-Perez, Daniel; Chang, Lingqian; Shi, Junfeng; Ma, Junyu; Kim, Sung-Hak; Zhao, Xi; Malkoc, Veysi; Wang, Xinmei; Minata, Mutsuko; Kwak, Kwang J; Wu, Yun; Lafyatis, Gregory P; Lu, Wu; Hansford, Derek J; Nakano, Ichiro; Lee, L James

    2016-09-14

    Enhanced glioma-stem-cell (GSC) motility and therapy resistance are considered to play key roles in tumor cell dissemination and recurrence. As such, a better understanding of the mechanisms by which these cells disseminate and withstand therapy could lead to more efficacious treatments. Here, we introduce a novel micro-/nanotechnology-enabled chip platform for performing live-cell interrogation of patient-derived GSCs with single-clone resolution. On-chip analysis revealed marked intertumoral differences (>10-fold) in single-clone motility profiles between two populations of GSCs, which correlated well with results from tumor-xenograft experiments and gene-expression analyses. Further chip-based examination of the more-aggressive GSC population revealed pronounced interclonal variations in motility capabilities (up to ∼4-fold) as well as gene-expression profiles at the single-cell level. Chip-supported therapy resistance studies with a chemotherapeutic agent (i.e., temozolomide) and an oligo RNA (anti-miR363) revealed a subpopulation of CD44-high GSCs with strong antiapoptotic behavior as well as enhanced motility capabilities. The living-cell-interrogation chip platform described herein enables thorough and large-scale live monitoring of heterogeneous cancer-cell populations with single-cell resolution, which is not achievable by any other existing technology and thus has the potential to provide new insights into the cellular and molecular mechanisms modulating glioma-stem-cell dissemination and therapy resistance.

  8. Superconducting Switch for Fast On-Chip Routing of Quantum Microwave Fields

    Science.gov (United States)

    Pechal, M.; Besse, J.-C.; Mondal, M.; Oppliger, M.; Gasparinetti, S.; Wallraff, A.

    2016-08-01

    A switch capable of routing microwave signals at cryogenic temperatures is a desirable component for state-of-the-art experiments in many fields of applied physics, including but not limited to quantum-information processing, communication, and basic research in engineered quantum systems. Conventional mechanical switches provide low insertion loss but disturb operation of dilution cryostats and the associated experiments by heat dissipation. Switches based on semiconductors or microelectromechanical systems have a lower thermal budget but are not readily integrated with current superconducting circuits. Here we design and test an on-chip switch built by combining tunable transmission-line resonators with microwave beam splitters. The device is superconducting and as such dissipates a negligible amount of heat. It is compatible with current superconducting circuit fabrication techniques, operates with a bandwidth exceeding 100 MHz, is capable of handling photon fluxes on the order of 1 05 μ s-1 , equivalent to powers exceeding -90 dBm , and can be switched within approximately 6-8 ns. We successfully demonstrate operation of the device in the quantum regime by integrating it on a chip with a single-photon source and using it to route nonclassical itinerant microwave fields at the single-photon level.

  9. Ventilative Cooling

    DEFF Research Database (Denmark)

    Heiselberg, Per Kvols; Kolokotroni, Maria

    This report, by venticool, summarises the outcome of the work of the initial working phase of IEA ECB Annex 62 Ventilative Cooling and is based on the findings in the participating countries. It presents a summary of the first official Annex 62 report that describes the state-of-the-art of ventil......This report, by venticool, summarises the outcome of the work of the initial working phase of IEA ECB Annex 62 Ventilative Cooling and is based on the findings in the participating countries. It presents a summary of the first official Annex 62 report that describes the state...

  10. Synthesis of on-chip control circuits for mVLSI biochips

    DEFF Research Database (Denmark)

    Potluri, Seetal; Schneider, Alexander Rüdiger; Hørslev-Petersen, Martin

    2017-01-01

    them to laboratory environments. To address this issue, researchers have proposed methods to reduce the number of offchip pressure sources, through integration of on-chip pneumatic control logic circuits fabricated using three-layer monolithic membrane valve technology. Traditionally, mVLSI biochip...... applied to generate biochip layouts with integrated on-chip pneumatic control....

  11. Avoiding Message-Dependent Deadlock in Network-Based Systems on Chip

    NARCIS (Netherlands)

    Hansson, A.; Goossens, K.; Rãdulescu, A.

    2007-01-01

    Networks on chip (NoCs) are an essential component of systems on chip (SoCs) and much research is devoted to deadlock avoidance in NoCs. Prior work focuses on the router network while protocol interactions between NoC and intellectual property (IP) modules are not considered. These interactions intr

  12. A run-time reconfigurable Network-on-Chip for streaming DSP applications

    NARCIS (Netherlands)

    Kavaldjiev, N.K.; Kavaldjiev, Nikolay Krasimirov

    2007-01-01

    With the advance of semiconductor technology, global on-chip wiring is becoming a limiting factor for the overall performance of large System-on-Chip (SoC) designs. In this thesis we propose a global communication architecture that avoids this limitation by structuring and shortening of the global

  13. On-Chip Hydrodynamic Chromatography Separation and Detection of Nanoparticles and Biomolecules

    NARCIS (Netherlands)

    Blom, M.T.; Chmela, Emil; Oosterbroek, R.E.; Tijssen, Robert; van den Berg, Albert

    2003-01-01

    For the first time, on-chip planar hydrodynamic chromatography is combined with UV absorption detection. This technique is suitable for size characterization of synthetic polymers, biopolymers, and particles. Possible advantages of an on-chip hydrodynamic chromatography system over conventional

  14. Frequency domain processing of on-chip biphoton frequency comb

    CERN Document Server

    Jaramillo-Villegas, Jose A; Odele, Ogaga D; Leaird, Daniel E; Ou, Zhe-Yu; Qi, Minghao; Weiner, Andrew M

    2016-01-01

    Quantum information processing (QIP) promises to improve the security of our communications as well as to solve some algorithms with exponential complexity in polynomial time. Biphotons have been demonstrated as one of the most promising platforms for real implementations of QIP systems. In particular, time-bin entangled photons have been used for implementations of quantum gates which require highly stable interferometers. On the other hand, frequency-bin entanglement has been proposed to avoid the use of interferometers and the complexity of their stabilization, which potentially makes the implementation of quantum gates highly scalable. Through Fourier transform pulse shaping and electro-optic modulation, there has been a wide range of experiments that show control of entangled photons in the frequency domain. In addition, biphoton frequency combs (BFC) have also been generated using bulk optics and frequency filtering of broadband continuous biphoton spectra. However, on-chip entangled photon pair generat...

  15. Semiconductor plasmonic gas sensor using on-chip infrared spectroscopy

    Science.gov (United States)

    Elsayed, Mohamed Y.; Ismail, Yehea; Swillam, Mohamed A.

    2017-01-01

    In this paper, we take a novel approach in on-chip optical sensing of gases. Gases have conventionally been optically sensed using refractive index, which is a non-ideal method because of the difficulty in differentiating gases with very similar refractive indices. Infrared (IR) absorption spectra on the other hand have characteristic peaks in the fingerprint region that allow identifying the analyte. Highly doped n-type Indium Arsenide was used to design a plasmonic slot waveguide, and a dispersion analysis was carried out using the finite element method to study the effect of dopant concentration and waveguide geometry on the guided modes. Finite-difference time domain was used to simulate the transmission spectrum of the waveguide with air, methane and octane and the characteristic peaks in the IR spectra showed up strongly. This is a promising versatile method that can sense any IR-active gas.

  16. Various On-Chip Sensors with Microfluidics for Biological Applications

    Directory of Open Access Journals (Sweden)

    Hun Lee

    2014-09-01

    Full Text Available In this paper, we review recent advances in on-chip sensors integrated with microfluidics for biological applications. Since the 1990s, much research has concentrated on developing a sensing system using optical phenomena such as surface plasmon resonance (SPR and surface-enhanced Raman scattering (SERS to improve the sensitivity of the device. The sensing performance can be significantly enhanced with the use of microfluidic chips to provide effective liquid manipulation and greater flexibility. We describe an optical image sensor with a simpler platform for better performance over a larger field of view (FOV and greater depth of field (DOF. As a new trend, we review consumer electronics such as smart phones, tablets, Google glasses, etc. which are being incorporated in point-of-care (POC testing systems. In addition, we discuss in detail the current optical sensing system integrated with a microfluidic chip.

  17. On-chip data exchange for mode division multiplexed signals.

    Science.gov (United States)

    Ye, Mengyuan; Yu, Yu; Sun, Chunlei; Zhang, Xinliang

    2016-01-11

    Data exchange is an important function for flexible optical network, and it has been extensively investigated for the time and wavelength domains. The mode division multiplexing (MDM) has been proposed to further increase the transmission capacity by carrying information on different modes with only single wavelength carrier. We propose and experimentally demonstrate a novel on-chip data exchange circuit for the MDM signals by utilizing two micro-ring resonator (MRR) based mode converters. For demonstration, single and four wavelengths non-return-to-zero on-off-keying (NRZ-OOK) signals at 10 Gb/s carried on different modes are successfully processed, with open and clear eye diagrams. Measured bit error ratio (BER) results show reasonable power penalties. The proposed circuit can be potentially used in advanced and flexible MDM optical networks.

  18. On-chip Inter-modal Brillouin Scattering

    CERN Document Server

    Kittlaus, Eric A; Rakich, Peter T

    2016-01-01

    Stimulated Brillouin interactions mediate nonlinear coupling between photons and acoustic phonons through an optomechanical three-wave interaction. Though these nonlinearities were previously very weak in silicon photonic systems, the recent emergence of new optomechanical waveguide structures have transformed Brillouin processes into one of the strongest and most tailorable on-chip nonlinear interactions. New technologies based on Brillouin couplings have formed a basis for amplification, filtering, and nonreciprocal signal processing techniques. In this paper, we demonstrate strong guided-wave Brillouin scattering between light fields guided in distinct spatial modes of a silicon waveguide for the first time. This inter-modal coupling creates dispersive symmetry breaking between Stokes and anti-Stokes processes, permitting single-sideband amplification and wave dynamics that permit near-unity power conversion. Combining these physics with integrated mode-multiplexers enables novel device topologies and elim...

  19. An on-chip colloidal magneto-optical grating

    Science.gov (United States)

    Prikockis, M.; Wijesinghe, H.; Chen, A.; VanCourt, J.; Roderick, D.; Sooryakumar, R.

    2016-04-01

    Interacting nano- and micro-particles provide opportunities to create a wide range of useful colloidal and soft matter constructs. In this letter, we examine interacting superparamagnetic polymeric particles residing on designed permalloy (Ni0.8 Fe0.2) shapes that are subject to weak time-orbiting magnetic fields. The precessing field and magnetic barriers that ensue along the outer perimeter of the shapes allow for containment concurrent with independent field-tunable ordering of the dipole-coupled particles. These remotely activated arrays with inter-particle spacing comparable to the wavelength of light yield microscopic on-chip surface gratings for beam steering and magnetically regulated light diffraction applications.

  20. Photonic crystal biosensors towards on-chip integration.

    Science.gov (United States)

    Threm, Daniela; Nazirizadeh, Yousef; Gerken, Martina

    2012-08-01

    Photonic crystal technology has attracted large interest in the last years. The possibility to generate highly sensitive sensor elements with photonic crystal structures is very promising for medical or environmental applications. The low-cost fabrication on the mass scale is as advantageous as the compactness and reliability of photonic crystal biosensors. The possibility to integrate microfluidic channels together with photonic crystal structures allows for highly compact devices. This article reviews different types of photonic crystal sensors including 1D photonic crystal biosensors, biosensors with photonic crystal slabs, photonic crystal waveguide biosensors and biosensors with photonic crystal microcavities. Their applications in biomolecular and pathogen detection are highlighted. The sensitivities and the detection limits of the different biosensors are compared. The focus is on the possibilities to integrate photonic crystal biosensors on-chip.

  1. Spin Seebeck devices using local on-chip heating

    Energy Technology Data Exchange (ETDEWEB)

    Wu, Stephen M., E-mail: swu@anl.gov; Fradin, Frank Y.; Hoffman, Jason; Hoffmann, Axel; Bhattacharya, Anand [Materials Science Division, Argonne National Laboratory, Argonne, Illinois 60439 (United States)

    2015-05-07

    A micro-patterned spin Seebeck device is fabricated using an on-chip heater. Current is driven through a Au heater layer electrically isolated from a bilayer consisting of Fe{sub 3}O{sub 4} (insulating ferrimagnet) and a spin detector layer. It is shown that through this method it is possible to measure the longitudinal spin Seebeck effect (SSE) for small area magnetic devices, equivalent to traditional macroscopic SSE experiments. Using a lock-in detection technique, it is possible to more sensitively characterize both the SSE and the anomalous Nernst effect (ANE), as well as the inverse spin Hall effect in various spin detector materials. By using the spin detector layer as a thermometer, we can obtain a value for the temperature gradient across the device. These results are well matched to values obtained through electromagnetic/thermal modeling of the device structure and with large area spin Seebeck measurements.

  2. On-chip magnetometer for characterization of superparamagnetic nanoparticles.

    Science.gov (United States)

    Kim, Kun Woo; Reddy, Venu; Torati, Sri Ramulu; Hu, Xing Hao; Sandhu, Adarsh; Kim, Cheol Gi

    2015-02-07

    An on-chip magnetometer was fabricated by integrating a planar Hall magnetoresistive (PHR) sensor with microfluidic channels. The measured in-plane field sensitivities of an integrated PHR sensor with NiFe/Cu/IrMn trilayer structure were extremely high at 8.5 μV Oe(-1). The PHR signals were monitored during the oscillation of 35 pL droplets of magnetic nanoparticles, and reversed profiles for the positive and negative z-fields were measured, where magnitudes increased with the applied z-field strength. The measured PHR signals for 35 pL droplets of magnetic nanoparticles versus applied z-fields showed excellent agreement with magnetization curves measured by a vibrating sample magnetometer (VSM) of 3 μL volume, where a PHR voltage of 1 μV change is equivalent to 0.309 emu cc(-1) of the volume magnetization with a magnetic moment resolution of ~10(-10) emu.

  3. On-chip photonic Fourier transform with surface plasmon polaritons

    Institute of Scientific and Technical Information of China (English)

    Shan Shan Kou; Guanghui Yuan; Qian wang; Luping Du; Eugeniu Balaur; Daohua Zhang; Dingyuan Tang

    2016-01-01

    The Fourier transform (FT),a cornerstone of optical processing,enables rapid evaluation of fundamental mathematical operations,such as derivatives and integrals.Conventionally,a converging lens performs an optical FT in free space when light passes through it.The speed of the transformation is limited by the thickness and the focal length of the lens.By usingthe wave nature of surface plasmon polaritons (SPPs),here we demonstrate that the FT can be implemented in a planar configuration with a minimal propagation distance of around 10 μm,resulting in an increase of speed by four to five orders of magnitude.The photonic FT was tested by synthesizing intricate SPP waves with their Fourier components.The reduced dimensionality in the minuscule device allows the future development of an ultrafast on-chip photonic information processing platform for large-scale optical computing.

  4. Magnetic Tunnel Junction as an On-Chip Temperature Sensor.

    Science.gov (United States)

    Sengupta, Abhronil; Liyanagedera, Chamika Mihiranga; Jung, Byunghoo; Roy, Kaushik

    2017-09-18

    Temperature sensors are becoming an increasingly important component in System-on-Chip (SoC) designs with increasing transistor scaling, power density and associated heating effects. This work explores a compact nanoelectronic temperature sensor based on a Magnetic Tunnel Junction (MTJ) structure. The MTJ switches probabilistically depending on the operating temperature in the presence of thermal noise. Performance evaluation of the proposed MTJ temperature sensor, based on experimentally measured device parameters, reveals that the sensor is able to achieve a conversion rate of 2.5K samples/s with energy consumption of 8.8 nJ per conversion (1-2 orders of magnitude lower than state-of-the-art CMOS sensors) for a linear sensing regime of 200-400 K.

  5. Near-Field, On-Chip Optical Brownian Ratchets.

    Science.gov (United States)

    Wu, Shao-Hua; Huang, Ningfeng; Jaquay, Eric; Povinelli, Michelle L

    2016-08-10

    Nanoparticles in aqueous solution are subject to collisions with solvent molecules, resulting in random, Brownian motion. By breaking the spatiotemporal symmetry of the system, the motion can be rectified. In nature, Brownian ratchets leverage thermal fluctuations to provide directional motion of proteins and enzymes. In man-made systems, Brownian ratchets have been used for nanoparticle sorting and manipulation. Implementations based on optical traps provide a high degree of tunability along with precise spatiotemporal control. Here, we demonstrate an optical Brownian ratchet based on the near-field traps of an asymmetrically patterned photonic crystal. The system yields over 25 times greater trap stiffness than conventional optical tweezers. Our technique opens up new possibilities for particle manipulation in a microfluidic, lab-on-chip environment.

  6. Endocrine system on chip for a diabetes treatment model.

    Science.gov (United States)

    Nguyen, Dao Thi Thuy; van Noort, Danny; Jeong, In-Kyung; Park, Sungsu

    2017-02-21

    The endocrine system is a collection of glands producing hormones which, among others, regulates metabolism, growth and development. One important group of endocrine diseases is diabetes, which is caused by a deficiency or diminished effectiveness of endogenous insulin. By using a microfluidic perfused 3D cell-culture chip, we developed an 'endocrine system on chip' to potentially be able to screen drugs for the treatment of diabetes by measuring insulin release over time. Insulin-secreting β-cells are located in the pancreas, while L-cells, located in the small intestines, stimulate insulin secretion. Thus, we constructed a co-culture of intestinal-pancreatic cells to measure the effect of glucose on the production of glucagon-like peptide-1 (GLP-1) from the L-cell line (GLUTag) and insulin from the pancreatic β-cell line (INS-1). After three days of culture, both cell lines formed aggregates, exhibited 3D cell morphology, and showed good viability (>95%). We separately measured the dynamic profile of GLP-1 and insulin release at glucose concentrations of 0.5 and 20 mM, as well as the combined effect of GLP-1 on insulin production at these glucose concentrations. In response to glucose stimuli, GLUTag and INS-1 cells produced higher amounts of GLP-1 and insulin, respectively, compared to a static 2D cell culture. INS-1 combined with GLUTag cells exhibited an even higher insulin production in response to glucose stimulation. At higher glucose concentrations, the diabetes model on chip showed faster saturation of the insulin level. Our results suggest that the endocrine system developed in this study is a useful tool for observing dynamical changes in endocrine hormones (GLP-1 and insulin) in a glucose-dependent environment. Moreover, it can potentially be used to screen GLP-1 analogues and natural insulin and GLP-1 stimulants for diabetes treatment.

  7. Cool snacks

    DEFF Research Database (Denmark)

    Grunert, Klaus G; Brock, Steen; Brunsø, Karen

    2016-01-01

    such a product requires an interdisciplinary effort where researchers with backgrounds in psychology, anthropology, media science, philosophy, sensory science and food science join forces. We present the COOL SNACKS project, where such a blend of competences was used first to obtain thorough insight into young...

  8. Stochastic cooling

    Energy Technology Data Exchange (ETDEWEB)

    Bisognano, J.; Leemann, C.

    1982-03-01

    Stochastic cooling is the damping of betatron oscillations and momentum spread of a particle beam by a feedback system. In its simplest form, a pickup electrode detects the transverse positions or momenta of particles in a storage ring, and the signal produced is amplified and applied downstream to a kicker. The time delay of the cable and electronics is designed to match the transit time of particles along the arc of the storage ring between the pickup and kicker so that an individual particle receives the amplified version of the signal it produced at the pick-up. If there were only a single particle in the ring, it is obvious that betatron oscillations and momentum offset could be damped. However, in addition to its own signal, a particle receives signals from other beam particles. In the limit of an infinite number of particles, no damping could be achieved; we have Liouville's theorem with constant density of the phase space fluid. For a finite, albeit large number of particles, there remains a residue of the single particle damping which is of practical use in accumulating low phase space density beams of particles such as antiprotons. It was the realization of this fact that led to the invention of stochastic cooling by S. van der Meer in 1968. Since its conception, stochastic cooling has been the subject of much theoretical and experimental work. The earliest experiments were performed at the ISR in 1974, with the subsequent ICE studies firmly establishing the stochastic cooling technique. This work directly led to the design and construction of the Antiproton Accumulator at CERN and the beginnings of p anti p colliding beam physics at the SPS. Experiments in stochastic cooling have been performed at Fermilab in collaboration with LBL, and a design is currently under development for a anti p accumulator for the Tevatron.

  9. A very cool cooling system

    CERN Multimedia

    Antonella Del Rosso

    2015-01-01

    The NA62 Gigatracker is a jewel of technology: its sensor, which delivers the time of the crossing particles with a precision of less than 200 picoseconds (better than similar LHC detectors), has a cooling system that might become the precursor to a completely new detector technique.   The 115 metre long vacuum tank of the NA62 experiment. The NA62 Gigatracker (GTK) is composed of a set of three innovative silicon pixel detectors, whose job is to measure the arrival time and the position of the incoming beam particles. Installed in the heart of the NA62 detector, the silicon sensors are cooled down (to about -20 degrees Celsius) by a microfluidic silicon device. “The cooling system is needed to remove the heat produced by the readout chips the silicon sensor is bonded to,” explains Alessandro Mapelli, microsystems engineer working in the Physics department. “For the NA62 Gigatracker we have designed a cooling plate on top of which both the silicon sensor and the...

  10. Cooled particle accelerator target

    Science.gov (United States)

    Degtiarenko, Pavel V.

    2005-06-14

    A novel particle beam target comprising: a rotating target disc mounted on a retainer and thermally coupled to a first array of spaced-apart parallel plate fins that extend radially inwardly from the retainer and mesh without physical contact with a second array of spaced-apart parallel plate fins that extend radially outwardly from and are thermally coupled to a cooling mechanism capable of removing heat from said second array of spaced-apart fins and located within the first array of spaced-apart parallel fins. Radiant thermal exchange between the two arrays of parallel plate fins provides removal of heat from the rotating disc. A method of cooling the rotating target is also described.

  11. Water Cooled Mirror Design

    Energy Technology Data Exchange (ETDEWEB)

    Dale, Gregory E. [Los Alamos National Lab. (LANL), Los Alamos, NM (United States); Holloway, Michael Andrew [Los Alamos National Lab. (LANL), Los Alamos, NM (United States); Pulliam, Elias Noel [Los Alamos National Lab. (LANL), Los Alamos, NM (United States)

    2015-03-30

    This design is intended to replace the current mirror setup being used for the NorthStar Moly 99 project in order to monitor the target coupon. The existing setup has limited movement for camera alignment and is difficult to align properly. This proposed conceptual design for a water cooled mirror will allow for greater thermal transfer between the mirror and the water block. It will also improve positioning of the mirror by using flexible vacuum hosing and a ball head joint capable of a wide range of motion. Incorporating this design into the target monitoring system will provide more efficient cooling of the mirror which will improve the amount of diffraction caused by the heating of the mirror. The process of aligning the mirror for accurate position will be greatly improved by increasing the range of motion by offering six degrees of freedom.

  12. A lab-on-chip cell-based biosensor for label-free sensing of water toxicants.

    Science.gov (United States)

    Liu, F; Nordin, A N; Li, F; Voiculescu, I

    2014-04-07

    This paper presents a lab-on-chip biosensor containing an enclosed fluidic cell culturing well seeded with live cells for rapid screening of toxicants in drinking water. The sensor is based on the innovative placement of the working electrode for the electrical cell-substrate impedance sensing (ECIS) technique as the top electrode of a quartz crystal microbalance (QCM) resonator. Cell damage induced by toxic water will cause a decrease in impedance, as well as an increase in the resonant frequency. For water toxicity tests, the biosensor's unique capabilities of performing two complementary measurements simultaneously (impedance and mass-sensing) will increase the accuracy of detection while decreasing the false-positive rate. Bovine aortic endothelial cells (BAECs) were used as toxicity sensing cells. The effects of the toxicants, ammonia, nicotine and aldicarb, on cells were monitored with both the QCM and the ECIS technique. The lab-on-chip was demonstrated to be sensitive to low concentrations of toxicants. The responses of BAECs to toxic samples occurred during the initial 5 to 20 minutes depending on the type of chemical and concentrations. Testing the multiparameter biosensor with aldicarb also demonstrated the hypothesis that using two different sensors to monitor the same cell monolayer provides cross validation and increases the accuracy of detection. For low concentrations of aldicarb, the variations in impedance measurements are insignificant in comparison with the shifts of resonant frequency monitored using the QCM resonator. A highly linear correlation between signal shifts and chemical concentrations was demonstrated for each toxicant.

  13. Microarchitecture of a MultiCore SoC for Data Analysis of a Lab-on-Chip Microarray

    Directory of Open Access Journals (Sweden)

    S. Blionas

    2008-07-01

    Full Text Available This paper presents a reconfigurable architecture of a lab-on-chip (LoC microarray device capable to process data either in genotyping or in gene expression applications in a fraction of the time that is required by the usual software methods running on a standard computer. The entire LoC consists of a microfluidics part for the sample preparation and hybridization, a microsystem part including the application specific array of sensors for the electronic detection, and finally a reconfigurable processing part for the data analysis. The proposed data processing and analysis electronic module are an embedded multicore reconfigurable system-on-chip designed to analyze data from the forthcoming high-density oligonucleotide microarrays. The proposed architecture employs reconfigurable technology and has the capacity to process data from microarrays of various sizes from small size ones used in genotyping up to large-scale gene expression arrays. Additionally, the embedded processing cores feature reconfigurable circuitry for implementing the intense part of the processing, supplementing the various computational needs of the diverse applications for microarray real-time data processing and for a scalable reconfigurable architecture to handle also the future high-density microarrays.

  14. A programmable and configurable multi-port System-on-Chip for stimulating electrokinetically-driven microfluidic devices.

    Science.gov (United States)

    Lopez, Martha Salome; Gerstlauer, Andreas; Avila, Alfonso; Martinez-Chapa, Sergio O

    2011-01-01

    Recent research has demonstrated the use of microfluidic devices and electro-kinetics in areas such as medicine, genetics, embryology, epidemiology and pollution analysis, where manipulation of particles suspended in liquid media is required. Micro-fabrication technology has made it possible to increase system complexity and functionality by allowing integration of different processing and analysis stages in a single chip. However, fully integrated and autonomous microfluidic systems supporting ad-hoc stimulation have yet to be developed. This paper presents a flexible, configurable and programmable stimulator for electro-kinetically driven microfluidic devices. The stimulator is a dedicated System-on-Chip (SoC) architecture that generates sine, triangle, and sawtooth signals within a frequency range of 1 Hz to 20 MHz, capable of delivering single, dual, and superimposed waveforms, in a user defined test sequence for a selected time period. The system is designed to be integrated into complete, autonomous Lab-on-Chip, portable or implantable devices. As such, it is expected to help significantly advance current and future research on particle manipulation.

  15. Plasmonic nanoparticles-decorated diatomite biosilica: extending the horizon of on-chip chromatography and label-free biosensing.

    Science.gov (United States)

    Kong, Xianming; Li, Erwen; Squire, Kenny; Liu, Ye; Wu, Bo; Cheng, Li-Jing; Wang, Alan X

    2017-05-09

    Diatomite consists of fossilized remains of ancient diatoms and is a type of naturally abundant photonic crystal biosilica with multiple unique physical and chemical functionalities. In this paper, we explored the fluidic properties of diatomite as the matrix for on-chip chromatography and, simultaneously, the photonic crystal effects to enhance the plasmonic resonances of metallic nanoparticles for surface-enhanced Raman scattering (SERS) biosensing. The plasmonic nanoparticle-decorated diatomite biosilica provides a lab-on-a-chip capability to separate and detect small molecules from mixture samples with ultra-high detection sensitivity down to 1 ppm. We demonstrate the significant potential for biomedical applications by screening toxins in real biofluid, achieving simultaneous label-free biosensing of phenethylamine and miR21cDNA in human plasma with unprecedented sensitivity and specificity. To the best of our knowledge, this is the first time demonstration to detect target molecules from real biofluids by on-chip chromatography-SERS techniques. © 2017 Wiley-VCH Verlag GmbH & Co. KGaA, Weinheim.

  16. Cooling technique

    Energy Technology Data Exchange (ETDEWEB)

    Salamon, Todd R; Vyas, Brijesh; Kota, Krishna; Simon, Elina

    2017-01-31

    An apparatus and a method are provided. Use is made of a wick structure configured to receive a liquid and generate vapor in when such wick structure is heated by heat transferred from heat sources to be cooled off. A vapor channel is provided configured to receive the vapor generated and direct said vapor away from the wick structure. In some embodiments, heat conductors are used to transfer the heat from the heat sources to the liquid in the wick structure.

  17. On-chip integration of droplet microfluidics and nanostructure-initiator mass spectrometry for enzyme screening.

    Science.gov (United States)

    Heinemann, Joshua; Deng, Kai; Shih, Steve C C; Gao, Jian; Adams, Paul D; Singh, Anup K; Northen, Trent R

    2017-01-17

    Biological assays often require expensive reagents and tedious manipulations. These shortcomings can be overcome using digitally operated microfluidic devices that require reduced sample volumes to automate assays. One particular challenge is integrating bioassays with mass spectrometry based analysis. Towards this goal we have developed μNIMS, a highly sensitive and high throughput technique that integrates droplet microfluidics with nanostructure-initiator mass spectrometry (NIMS). Enzyme reactions are carried out in droplets that can be arrayed on discrete NIMS elements at defined time intervals for subsequent mass spectrometry analysis, enabling time resolved enzyme activity assay. We apply the μNIMS platform for kinetic characterization of a glycoside hydrolase enzyme (CelE-CMB3A), a chimeric enzyme capable of deconstructing plant hemicellulose into monosaccharides for subsequent conversion to biofuel. This study reveals NIMS nanostructures can be fabricated into arrays for microfluidic droplet deposition, NIMS is compatible with droplet and digital microfluidics, and can be used on-chip to assay glycoside hydrolase enzyme in vitro.

  18. Introduction to Open Core Protocol Fastpath to System-on-Chip Design

    CERN Document Server

    Schwaderer, W David

    2012-01-01

    This book introduces Open Core Protocol (OCP), not as a conventional hardware communications protocol but as a meta-protocol: a means for describing and capturing the communications requirements of an IP core, and mapping them to a specific set of signals with known semantics.  Readers will learn the capabilities of OCP as a semiconductor hardware interface specification that allows different System-On-Chip (SoC) cores to communicate.  The OCP methodology presented enables intellectual property designers to design core interfaces in standard ways. This facilitates reusing OCP-compliant cores across multiple SoC designs which, in turn, drastically reduces design times, support costs, and overall cost for electronics/SoCs. Provides a comprehensive introduction to Open Core Protocol, which is more accessible than the full specification; Designed as a hands-on, how-to guide to semiconductor design; Includes numerous, real “usage examples” which are not available in the full specification; Integrates coverag...

  19. Plasmonic nanograting enhanced quantum dots excitation for cellular imaging on-chip

    Science.gov (United States)

    Bhave, Gauri; Lee, Youngkyu; Chen, Peng; Zhang, John X. J.

    2015-09-01

    We present the design and integration of a two-dimensional (2D) plasmonic nanogratings structure on the electrode of colloidal quantum dot-based light-emitting diodes (QDLEDs) as a compact light source towards arrayed on-chip imaging of tumor cells. Colloidal quantum dots (QDs) were used as the emission layer due to their unique capabilities, including multicolor emission, narrow bandwidth, tunable emission wavelengths, and compatibility with silicon fabrication. The nanograting, based on a metal-dielectric-metal plasmonic waveguide, aims to enhance the light intensity through the resonant reflection of surface plasmon (SP) waves. The key parameters of plasmonic nanogratings, including periodicity, slit width, and thicknesses of the metal and dielectric layers, were designed to tailor the frequency bandgap such that it matches the wavelength of operation. We fabricated QDLEDs with the integrated nanogratings and demonstrated an increase in electroluminescence intensity, measured along the direction perpendicular to the metal electrode. We found an increase of 34.72% in QDLED electroluminescence intensity from the area of the pattern and an increase of 32.63% from the photoluminescence of QDs deposited on a metal surface. We performed ex vivo transmission-mode microscopy to evaluate the nucleus-cytoplasm ratios of MDA-MB 231 cultured breast cancer cells using QDLEDs as the light source. We showed wavelength dependent imaging of different cell components and imaging of cells at higher magnification using enhanced emission from QDLEDs with integrated plasmonic nanogratings.

  20. Non-destructive on-chip cell sorting system with real-time microscopic image processing

    Directory of Open Access Journals (Sweden)

    Ichiki Takanori

    2004-06-01

    Full Text Available Abstract Studying cell functions for cellomics studies often requires the use of purified individual cells from mixtures of various kinds of cells. We have developed a new non-destructive on-chip cell sorting system for single cell based cultivation, by exploiting the advantage of microfluidics and electrostatic force. The system consists of the following two parts: a cell sorting chip made of poly-dimethylsiloxane (PDMS on a 0.2-mm-thick glass slide, and an image analysis system with a phase-contrast/fluorescence microscope. The unique features of our system include (i identification of a target from sample cells is achieved by comparison of the 0.2-μm-resolution phase-contrast and fluorescence images of cells in the microchannel every 1/30 s; (ii non-destructive sorting of target cells in a laminar flow by application of electrostatic repulsion force for removing unrequited cells from the one laminar flow to the other; (iii the use of agar gel for electrodes in order to minimize the effect on cells by electrochemical reactions of electrodes, and (iv pre-filter, which was fabricated within the channel for removal of dust contained in a sample solution from tissue extracts. The sorting chip is capable of continuous operation and we have purified more than ten thousand cells for cultivation without damaging them. Our design has proved to be very efficient and suitable for the routine use in cell purification experiments.

  1. Towards the Use of Super-Resolution in Biomedical Systems-on-Chip

    Directory of Open Access Journals (Sweden)

    Gustavo M. Callico

    2013-08-01

    Full Text Available Super-resolution is a smart process capable of generating images with a higher resolution than the resolution of the sensor used to acquire the images. Due to this reason, it has acquired a significant relevance within the medical community during the last years, especially for those specialties closely related with the medical imaging field. However, the super-resolution algorithms used in this field are normally extremely complex and thus, they tend to be slow and difficult to be implemented in hardware. This paper proposes a new super-resolution algorithm for video sequences that, while maintaining excellent levels in the objective and subjective visual quality of the processed images, presents a reduced computational cost due to its non-iterative nature and the use of fast motion estimation techniques. Additionally, the algorithm has been successfully implemented in a low-cost hardware platform, which guarantees the viability of the proposed solution for real-time biomedical systems-on-chip.

  2. Bottom-Up Abstract Modelling of Optical Networks-on-Chip: From Physical to Architectural Layer

    Directory of Open Access Journals (Sweden)

    Alberto Parini

    2012-01-01

    Full Text Available This work presents a bottom-up abstraction procedure based on the design-flow FDTD + SystemC suitable for the modelling of optical Networks-on-Chip. In this procedure, a complex network is decomposed into elementary switching elements whose input-output behavior is described by means of scattering parameters models. The parameters of each elementary block are then determined through 2D-FDTD simulation, and the resulting analytical models are exported within functional blocks in SystemC environment. The inherent modularity and scalability of the S-matrix formalism are preserved inside SystemC, thus allowing the incremental composition and successive characterization of complex topologies typically out of reach for full-vectorial electromagnetic simulators. The consistency of the outlined approach is verified, in the first instance, by performing a SystemC analysis of a four-input, four-output ports switch and making a comparison with the results of 2D-FDTD simulations of the same device. Finally, a further complex network encompassing 160 microrings is investigated, the losses over each routing path are calculated, and the minimum amount of power needed to guarantee an assigned BER is determined. This work is a basic step in the direction of an automatic technology-aware network-level simulation framework capable of assembling complex optical switching fabrics, while at the same time assessing the practical feasibility and effectiveness at the physical/technological level.

  3. Co-design of on-chip antennas and circuits for a UNII band monolithic transceiver

    KAUST Repository

    Shamim, Atif

    2012-07-28

    The surge of highly integrated and multifunction wireless devices has necessitated the designers to think outside the box for solutions that are unconventional. The new trends have provided the impetus for low cost and compact RF System-on-Chip (SoC) approaches [1]. The major advantages of SoC are miniaturization and cost reduction. A major bottleneck to the true realization of monolithic RF SoC transceivers is the implementation of on-chip antennas with circuitry. Though complete integrated transceivers with on-chip antennas have been demonstrated, these designs are generally for high frequencies. Moreover, they either use non-standard CMOS processes or additional fabrication steps to enhance the antenna efficiency, which in turn adds to the cost of the system [2-3]. Another challenge related to the on-chip antennas is the characterization of their radiation properties. Most of the recently reported work (summarized in Table I) shows that very few on-chip antennas are characterized. Our previous work [4], demonstrated a Phase Lock Loop (PLL) based transmitter (TX) with an on-chip antenna. However, the radiation from the on-chip antenna experienced strong interference due to 1) some active circuitry on one side of the chip and 2) the PCB used to mount the chip in the anechoic chamber. This paper presents, for the first time, a complete 5.2 GHz (UNII band) transceiver with separate TX and receiver (RX) antennas. To the author\\'s best knowledge, its size of 3 mm2 is the smallest reported for a UNII band transceiver with two on-chip antennas. Both antennas are characterized for their radiation properties through an on-wafer custom measurement setup. The strategy to co-design on-chip antennas with circuits, resultant trade-offs and measurement challenges have also been discussed. © 2010 IEEE.

  4. Free Cooling-Aware Dynamic Power Management for Green Datacenters

    OpenAIRE

    Kim, Jungsoo; Ruggiero, Martino; Atienza Alonso, David

    2012-01-01

    Free cooling, i.e., directly using outside cold air and/or water to cool down datacenters, can provide significant power savings of datacenters. However, due to the limited cooling capability, which is tightly coupled with climate conditions, free cooling is currently used only in limited locations (e.g., North Europe) and periods of the year. Moreover, the applicability of free cooling is further restricted along with the conservative assumption on workload characteristics and the virtual ma...

  5. Peltier Junction heats and cools car seat

    Energy Technology Data Exchange (ETDEWEB)

    Gottschalk, M.A.

    1994-10-10

    Electrically heated seats may soon become heated and cooled seats. The design called the CCS module exploits the heat-pump capability of a class of semiconductor thermoelectric devices (TEDs) known as Peltier Junction. Every CCS module contain two TEDs. Heating and cooling occurs through convection and conduction. The heart of the system is the thermoelectric heat pump. This is originally conceived as the sole heating/cooling options for a prototype electric vehicle.

  6. On-chip dual comb source for spectroscopy

    CERN Document Server

    Dutt, Avik; Ji, Xingchen; Cardenas, Jaime; Okawachi, Yoshitomo; Luke, Kevin; Gaeta, Alexander L; Lipson, Michal

    2016-01-01

    Dual-comb spectroscopy is a powerful technique for real-time, broadband optical sampling of molecular spectra which requires no moving components. Recent developments with microresonator-based platforms have enabled frequency combs at the chip scale. However, the need to precisely match the resonance wavelengths of distinct high-quality-factor microcavities has hindered the development of an on-chip dual comb source. Here, we report the first simultaneous generation of two microresonator combs on the same chip from a single laser. The combs span a broad bandwidth of 51 THz around a wavelength of 1.56 $\\mu$m. We demonstrate low-noise operation of both frequency combs by deterministically tuning into soliton mode-locked states using integrated microheaters, resulting in narrow ($<$ 10 kHz) microwave beatnotes. We further use one mode-locked comb as a reference to probe the formation dynamics of the other comb, thus introducing a technique to investigate comb evolution without auxiliary lasers or microwave os...

  7. Multimedia Terminal System-on-Chip Design and Simulation

    Directory of Open Access Journals (Sweden)

    Barbieri Ivano

    2005-01-01

    Full Text Available This paper proposes a design approach based on integrated architectural and system-on-chip (SoC simulations. The main idea is to have an efficient framework for the design and the evaluation of multimedia terminals, allowing a fast system simulation with a definable degree of accuracy. The design approach includes the simulation of very long instruction word (VLIW digital signal processors (DSPs, the utilization of a device multiplexing the media streams, and the emulation of the real-time media acquisition. This methodology allows the evaluation of both the multimedia algorithm implementations and the hardware platform, giving feedback on the complete SoC including the interaction between modules and conflicts in accessing either the bus or shared resources. An instruction set architecture (ISA simulator and an SoC simulation environment compose the integrated framework. In order to validate this approach, the evaluation of an audio-video multiprocessor terminal is presented, and the complete simulation test results are reported.

  8. Micromechanical Characterization of Polysilicon Films through On-Chip Tests

    Directory of Open Access Journals (Sweden)

    Ramin Mirzazadeh

    2016-07-01

    Full Text Available When the dimensions of polycrystalline structures become comparable to the average grain size, some reliability issues can be reported for the moving parts of inertial microelectromechanical systems (MEMS. Not only the overall behavior of the device turns out to be affected by a large scattering, but also the sensitivity to imperfections gets enhanced. In this work, through on-chip tests, we experimentally investigate the behavior of thin polysilicon samples using standard electrostatic actuation/sensing. The discrepancy between the target and actual responses of each sample has then been exploited to identify: (i the overall stiffness of the film and, according to standard continuum elasticity, a morphology-based value of its Young’s modulus; (ii the relevant over-etch induced by the fabrication process. To properly account for the aforementioned stochastic features at the micro-scale, the identification procedure has been based on particle filtering. A simple analytical reduced-order model of the moving structure has been also developed to account for the nonlinearities in the electrical field, up to pull-in. Results are reported for a set of ten film samples of constant slenderness, and the effects of different actuation mechanisms on the identified micromechanical features are thoroughly discussed.

  9. Pipelined multiprocessor system-on-chip for multimedia

    CERN Document Server

    Javaid, Haris

    2014-01-01

    This book describes analytical models and estimation methods to enhance performance estimation of pipelined multiprocessor systems-on-chip (MPSoCs).  A framework is introduced for both design-time and run-time optimizations. For design space exploration, several algorithms are presented to minimize the area footprint of a pipelined MPSoC under a latency or a throughput constraint.  A novel adaptive pipelined MPSoC architecture is described, where idle processors are transitioned into low-power states at run-time to reduce energy consumption. Multi-mode pipelined MPSoCs are introduced, where multiple pipelined MPSoCs optimized separately are merged into a single pipelined MPSoC, enabling further reduction of the area footprint by sharing the processors and communication buffers. Readers will benefit from the authors’ combined use of analytical models, estimation methods and exploration algorithms and will be enabled to explore billions of design points in a few minutes.   ·         Describes the ...

  10. Workshop meeting report Organs-on-Chips: human disease models.

    Science.gov (United States)

    van de Stolpe, Anja; den Toonder, Jaap

    2013-09-21

    The concept of "Organs-on-Chips" has recently evolved and has been described as 3D (mini-) organs or tissues consisting of multiple and different cell types interacting with each other under closely controlled conditions, grown in a microfluidic chip, and mimicking the complex structures and cellular interactions in and between different cell types and organs in vivo, enabling the real time monitoring of cellular processes. In combination with the emerging iPSC (induced pluripotent stem cell) field this development offers unprecedented opportunities to develop human in vitro models for healthy and diseased organ tissues, enabling the investigation of fundamental mechanisms in disease development, drug toxicity screening, drug target discovery and drug development, and the replacement of animal testing. Capturing the genetic background of the iPSC donor in the organ or disease model carries the promise to move towards "in vitro clinical trials", reducing costs for drug development and furthering the concept of personalized medicine and companion diagnostics. During the Lorentz workshop (Leiden, September 2012) an international multidisciplinary group of experts discussed the current state of the art, available and emerging technologies, applications and how to proceed in the field. Organ-on-a-chip platform technologies are expected to revolutionize cell biology in general and drug development in particular.

  11. Micromechanical Characterization of Polysilicon Films through On-Chip Tests.

    Science.gov (United States)

    Mirzazadeh, Ramin; Eftekhar Azam, Saeed; Mariani, Stefano

    2016-07-28

    When the dimensions of polycrystalline structures become comparable to the average grain size, some reliability issues can be reported for the moving parts of inertial microelectromechanical systems (MEMS). Not only the overall behavior of the device turns out to be affected by a large scattering, but also the sensitivity to imperfections gets enhanced. In this work, through on-chip tests, we experimentally investigate the behavior of thin polysilicon samples using standard electrostatic actuation/sensing. The discrepancy between the target and actual responses of each sample has then been exploited to identify: (i) the overall stiffness of the film and, according to standard continuum elasticity, a morphology-based value of its Young's modulus; (ii) the relevant over-etch induced by the fabrication process. To properly account for the aforementioned stochastic features at the micro-scale, the identification procedure has been based on particle filtering. A simple analytical reduced-order model of the moving structure has been also developed to account for the nonlinearities in the electrical field, up to pull-in. Results are reported for a set of ten film samples of constant slenderness, and the effects of different actuation mechanisms on the identified micromechanical features are thoroughly discussed.

  12. Ultrasensitive interferometric on-chip microscopy of transparent objects

    Science.gov (United States)

    Terborg, Roland A.; Pello, Josselin; Mannelli, Ilaria; Torres, Juan P.; Pruneri, Valerio

    2016-01-01

    Light microscopes can detect objects through several physical processes, such as scattering, absorption, and reflection. In transparent objects, these mechanisms are often too weak, and interference effects are more suitable to observe the tiny refractive index variations that produce phase shifts. We propose an on-chip microscope design that exploits birefringence in an unconventional geometry. It makes use of two sheared and quasi-overlapped illuminating beams experiencing relative phase shifts when going through the object, and a complementary metal-oxide-semiconductor image sensor array to record the resulting interference pattern. Unlike conventional microscopes, the beams are unfocused, leading to a very large field of view (20 mm2) and detection volume (more than 0.5 cm3), at the expense of lateral resolution. The high axial sensitivity (<1 nm) achieved using a novel phase-shifting interferometric operation makes the proposed device ideal for examining transparent substrates and reading microarrays of biomarkers. This is demonstrated by detecting nanometer-thick surface modulations on glass and single and double protein layers. PMID:27386571

  13. Light interference detection on-chip by integrated SNSPD counters

    Directory of Open Access Journals (Sweden)

    Paul Cavalier

    2011-12-01

    Full Text Available A SWIFTS device (Stationary Wave Integrated Fourier Transform Spectrometer has been realized with an array of 24 Superconducting Nanowire Single Photon Detectors (SNSPD, on-chip integrated under a Si3N4 monomode rib-waveguide interferometer. Colored light around 1.55μm wavelength is introduced through end-fire coupling, producing a counter-propagative stationary interferogram over the 40nm wide, 120nm spaced, 4nm thick epi-NbN nanowire array. Modulations in the source bandwidth have been detected using individual waveguide coupled SNSPDs operating in single photon counting mode, which is a step towards light spectrum reconstruction by inverse Fourier transform of the stationary wave intensity. We report the design, fabrication process and in-situ measurement at 4.2K of light power modulation in the interferometer, obtained with variable laser wavelength. Such micro-SWIFTS configuration with 160nm sampling period over 3.84μm distance allows a spectral bandwidth of 2μm and a wavelength resolution of 170nm. The light interferences direct sampling ability is unique and raises wide interest with several potential applications like fringe-tracking, metrology, cryptography or optical tomography.

  14. ATLAS - Liquid Cooling Systems

    CERN Multimedia

    Bonneau, P.

    1998-01-01

    Photo 1 - Cooling Unit - Side View Photo 2 - Cooling Unit - Detail Manifolds Photo 3 - Cooling Unit - Rear View Photo 4 - Cooling Unit - Detail Pump, Heater and Exchanger Photo 5 - Cooling Unit - Detail Pump and Fridge Photo 6 - Cooling Unit - Front View

  15. A dry-cooled AC quantum voltmeter

    Science.gov (United States)

    Schubert, M.; Starkloff, M.; Peiselt, K.; Anders, S.; Knipper, R.; Lee, J.; Behr, R.; Palafox, L.; Böck, A. C.; Schaidhammer, L.; Fleischmann, P. M.; Meyer, H.-G.

    2016-10-01

    The paper describes a dry-cooled AC quantum voltmeter system operated up to kilohertz frequencies and 7 V rms. A 10 V programmable Josephson voltage standard (PJVS) array was installed on a pulse tube cooler (PTC) driven with a 4 kW air-cooled compressor. The operating margins at 70 GHz frequencies were investigated in detail and found to exceed 1 mA Shapiro step width. A key factor for the successful chip operation was the low on-chip power consumption of 65 mW in total. A thermal interface between PJVS chip and PTC cold stage was used to avoid a significant chip overheating. By installing the cryocooled PJVS array into an AC quantum voltmeter setup, several calibration measurements of dc standards and calibrator ac voltages up to 2 kHz frequencies were carried out to demonstrate the full functionality. The results are discussed and compared to systems with standard liquid helium cooling. For dc voltages, a direct comparison measurement between the dry-cooled AC quantum voltmeter and a liquid-helium based 10 V PJVS shows an agreement better than 1 part in 1010.

  16. A Quality-of-Service Mechanism for Interconnection Networks in System-on-Chips

    CERN Document Server

    Weber, Wolf-Dietrich; Swarbrick, Ian; Wingard, Drew

    2011-01-01

    As Moore's Law continues to fuel the ability to build ever increasingly complex system-on-chips (SoCs), achieving performance goals is rising as a critical challenge to completing designs. In particular, the system interconnect must efficiently service a diverse set of data flows with widely ranging quality-of-service (QoS) requirements. However, the known solutions for off-chip interconnects such as large-scale networks are not necessarily applicable to the on-chip environment. Latency and memory constraints for on-chip interconnects are quite different from larger-scale interconnects. This paper introduces a novel on-chip interconnect arbitration scheme. We show how this scheme can be distributed across a chip for high-speed implementation. We compare the performance of the arbitration scheme with other known interconnect arbitration schemes. Existing schemes typically focus heavily on either low latency of service for some initiators, or alternatively on guaranteed bandwidth delivery for other initiators. ...

  17. Femtosecond laser fabrication for the integration of optical sensors in microfluidic lab-on-chip devices

    NARCIS (Netherlands)

    Osellame, R.; Martinez-Vazquez, R.; Dongre, C.; Dekker, R.; Hoekstra, H.J.W.M.; Ramponi, R.; Pollnau, M.; Cerullo, G.; Corkum, P.; Silvestri, de S.; Nelson, K.A.; Riedle, E.; Schoenlein, R.W.

    2009-01-01

    Femtosecond lasers enable the fabrication of both optical waveguides and buried microfluidic channels on a glass substrate. The waveguides are used to integrate optical detection in a commercial microfluidic lab-on-chip for capillary electrophoresis.

  18. Femtosecond laser fabrication for the integration of optical sensors in microfluidic lab-on-chip devices

    NARCIS (Netherlands)

    Osellame, R.; Martinez Vazquez, R.; Dongre, C.; Dekker, R.; Hoekstra, H.J.W.M.; Pollnau, M.; Ramponi, R.; Cerullo, G.

    2008-01-01

    Femtosecond lasers enable the fabrication of both optical waveguides and buried microfluidic channels on a glass substrate. The waveguides are used to integrate optical detection in a commercial microfluidic lab-on-chip for capillary electrophoresis

  19. Implementation of Guaranteed Services in the MANGO Clockless Network-on-Chip

    DEFF Research Database (Denmark)

    Bjerregaard, Tobias; Sparsø, Jens

    2006-01-01

    the effects of scaling microchip technologies. Equally important, a NoC facilitates a truly modular and scalable design flow. The MANGO (message-passing asynchronous network-on-chip providing guaranteed services over open core protocol (OCP) interfaces) NoC is presented, and how its key characteristics......Shared, segmented, on-chip interconnection networks, known as networks-on-chip (NoC), may become the preferred way of interconnecting intellectual property (IP) cores in future giga-scale system-on-chip (SoC) designs. A NoC can provide the required communication bandwidth while accommodating...... (clockless implementation, standard socket access points, and guaranteed communication services) make MANGO suitable for a modular SoC design flow is explained. Among the advantages of using clockless circuit techniques are inherent global timing closure, low forward latency in pipelines, and zero dynamic...

  20. Simulation of Desiccant Cooling

    Directory of Open Access Journals (Sweden)

    Kamaruddin A.

    2017-06-01

    Full Text Available Desiccant cooling system has been an attractive topic for study lately, due to its environmentally friendly nature. It also consume less electricity and capable to be operated without refrigerant. A simulation study was conducted using 1.5 m long ducting equipped with one desiccant wheel, one sensible heat exchanger wheel, one evaporative cooling chamber and two blowers and one electric heater. The simulation study used 8.16 m/s primary air, the drying coefficient from desiccant wheel, k1=2.1 (1/s, mass transfer coefficient in evaporative cooling, k2=1.2 kg vapor/s, heat transfer coefficient in desiccant wheel, h1=4.5 W/m2 oC, and heat transfer coefficient in sensible heat exchanger wheel h2= 4.5 W/m2 oC. The simulation results show that the final temperature before entering into the air conditioning room was 25 oC and RH of 65 %, were in accordance with the Indonesian comfort index.

  1. Photonic-Networks-on-Chip for High Performance Radiation Survivable Multi-Core Processor Systems

    Science.gov (United States)

    2013-12-01

    TR-14-7 Photonic-Networks-on-Chip for High Performance Radiation Survivable Multi-Core Processor Systems Approved for public release...Networks-on-Chip for High Performance Radiation Survivable Multi-Core Processor Systems DTRA01-03-D-0026 Prof. Luke Lester and Prof. Ganesh...release; distribution is unlimited. The University of New Mexico has undertaken a study to determine the effects of radiation on Quantum Dot Photonic

  2. A survey of research and practices of network-on-chip

    DEFF Research Database (Denmark)

    Bjerregaard, Tobias; Mahadevan, Shankar

    2006-01-01

    The scaling of microchip technologies has enabled large scale systems-on-chip (SoC). Network-on-chip (NoC) research addresses global communication in SoC, involving (i) a move from computation-centric to communication-centric design and (ii) the implementation of scalable communication structures...... are discussed. We also evaluate performance analysis techniques. The research shows that NoC constitutes a unification of current trends of intrachip communication rather than an explicit new alternative....

  3. Solar heating and cooling.

    Science.gov (United States)

    Duffie, J A; Beckman, W A

    1976-01-16

    We have adequate theory and engineering capability to design, install, and use equipment for solar space and water heating. Energy can be delivered at costs that are competitive now with such high-cost energy sources as much fuel-generated, electrical resistance heating. The technology of heating is being improved through collector developments, improved materials, and studies of new ways to carry out the heating processes. Solar cooling is still in the experimental stage. Relatively few experiments have yielded information on solar operation of absorption coolers, on use of night sky radiation in locations with clear skies, on the combination of a solar-operated Rankine engine and a compression cooler, and on open cycle, humidification-dehumidification systems. Many more possibilities for exploration exist. Solar cooling may benefit from collector developments that permit energy delivery at higher temperatures and thus solar operation of additional kinds of cycles. Improved solar cooling capability can open up new applications of solar energy, particularly for larger buildings, and can result in markets for retrofitting existing buildings. Solar energy for buildings can, in the next decade, make a significant contribution to the national energy economy and to the pocketbooks of many individual users. very large-aggregate enterprises in manufacture, sale, and installation of solar energy equipment can result, which can involve a spectrum of large and small businesses. In our view, the technology is here or will soon be at hand; thus the basic decisions as to whether the United States uses this resource will be political in nature.

  4. Cool visitors

    CERN Multimedia

    2006-01-01

    Pictured, from left to right: Tim Izo (saxophone, flute, guitar), Bobby Grant (tour manager), George Pajon (guitar). What do the LHC and a world-famous hip-hop group have in common? They are cool! On Saturday, 1st July, before their appearance at the Montreux Jazz Festival, three members of the 'Black Eyed Peas' came on a surprise visit to CERN, inspired by Dan Brown's Angels and Demons. At short notice, Connie Potter (Head of the ATLAS secretariat) organized a guided tour of ATLAS and the AD 'antimatter factory'. Still curious, lead vocalist Will.I.Am met CERN physicist Rolf Landua after the concert to ask many more questions on particles, CERN, and the origin of the Universe.

  5. Applications of holographic on-chip microscopy (Conference Presentation)

    Science.gov (United States)

    Ozcan, Aydogan

    2017-02-01

    My research focuses on the use of computation/algorithms to create new optical microscopy, sensing, and diagnostic techniques, significantly improving existing tools for probing micro- and nano-objects while also simplifying the designs of these analysis tools. In this presentation, I will introduce a set of computational microscopes which use lens-free on-chip imaging to replace traditional lenses with holographic reconstruction algorithms. Basically, 3D images of specimens are reconstructed from their "shadows" providing considerably improved field-of-view (FOV) and depth-of-field, thus enabling large sample volumes to be rapidly imaged, even at nanoscale. These new computational microscopes routinely generate chip. The field-of-view of these computational microscopes is equal to the active-area of the sensor-array, easily reaching, for example, chips, respectively. In addition to this remarkable increase in throughput, another major benefit of this technology is that it lends itself to field-portable and cost-effective designs which easily integrate with smartphones to conduct giga-pixel tele-pathology and microscopy even in resource-poor and remote settings where traditional techniques are difficult to implement and sustain, thus opening the door to various telemedicine applications in global health. Through the development of similar computational imagers, I will also report the discovery of new 3D swimming patterns observed in human and animal sperm. One of this newly discovered and extremely rare motion is in the form of "chiral ribbons" where the planar swings of the sperm head occur on an osculating plane creating in some cases a helical ribbon and in some others a twisted ribbon. Shedding light onto the statistics and biophysics of various micro-swimmers' 3D motion, these results provide an important example of how biomedical imaging significantly benefits from emerging computational algorithms/theories, revolutionizing existing tools for observing

  6. On-chip optical trapping for atomic applications

    Science.gov (United States)

    Perez, Maximillian A.; Salim, Evan; Farkas, Daniel; Duggan, Janet; Ivory, Megan; Anderson, Dana

    2014-09-01

    To simplify applications that rely on optical trapping of cold and ultracold atoms, ColdQuanta is developing techniques to incorporate miniature optical components onto in-vacuum atom chips. The result is a hybrid atom chip that combines an in-vacuum micro-optical bench for optical control with an atom chip for magnetic control. Placing optical components on a chip inside of the vacuum system produces a compact system that can be targeted to specific experiments, in this case the generation of optical lattices. Applications that can benefit from this technology include timekeeping, inertial sensing, gravimetry, quantum information, and emulation of quantum many-body systems. ColdQuanta's GlasSi atom chip technology incorporates glass windows in the plane of a silicon atom chip. In conjunction with the in-vacuum micro-optical bench, optical lattices can be generated within a few hundred microns of an atom chip window through which single atomic lattice sites can be imaged with sub-micron spatial resolution. The result is a quantum gas microscope that allows optical lattices to be studied at the level of single lattice sites. Similar to what ColdQuanta has achieved with magneto-optical traps (MOTs) in its miniMOT system and with Bose- Einstein condensates (BECs) in its RuBECi(R) system, ColdQuanta seeks to apply the on-chip optical bench technology to studies of optical lattices in a commercially available, turnkey system. These techniques are currently being considered for lattice experiments in NASA's Cold Atom Laboratory (CAL) slated for flight on the International Space Station.

  7. 46 CFR 92.20-50 - Heating and cooling.

    Science.gov (United States)

    2010-10-01

    ... 46 Shipping 4 2010-10-01 2010-10-01 false Heating and cooling. 92.20-50 Section 92.20-50 Shipping... AND ARRANGEMENT Accommodations for Officers and Crew § 92.20-50 Heating and cooling. (a) All manned... heating and cooling system for accommodations must be capable of maintaining a temperature of 21 °C (70...

  8. Novel Self-Heated Gas Sensors Using on-Chip Networked Nanowires with Ultralow Power Consumption.

    Science.gov (United States)

    Tan, Ha Minh; Manh Hung, Chu; Ngoc, Trinh Minh; Nguyen, Hugo; Duc Hoa, Nguyen; Van Duy, Nguyen; Hieu, Nguyen Van

    2017-02-22

    The length of single crystalline nanowires (NWs) offers a perfect pathway for electron transfer, while the small diameter of the NWs hampers thermal losses to tje environment, substrate, and metal electrodes. Therefore, Joule self-heating effect is nearly ideal for operating NW gas sensors at ultralow power consumption, without additional heaters. The realization of the self-heated NW sensors using the "pick and place" approach is complex, hardly reproducible, low yield, and not applicable for mass production. Here, we present the sensing capability of the self-heated networked SnO2 NWs effectively prepared by on-chip growth. Our developed self-heated sensors exhibit a good response of 25.6 to 2.5 ppm NO2 gas, while the response to 500 ppm H2, 100 ppm NH3, 100 ppm H2S, and 500 ppm C2H5OH is very low, indicating the good selectivity of the sensors to NO2 gas. Furthermore, the detection limit is very low, down to 82 parts-per-trillion. As-obtained sensing performance under self-heating mode is nearly identical to that under external heating mode. While the power consumption under self-heating mode is extremely low, around hundreds of microwatts, as scaled-down the size of the electrode is below 10 μm. The selectivity of the sensors can be controlled simply by tuning the loading power that enables simple detection of NO2 in mixed gases. Remarkable performance together with a significantly facile fabrication process of the present sensors enhances the potential application of NW sensors in next generation technologies such as electronic noses, the Internet of Things, and smartphone sensing.

  9. On-chip generation of high-dimensional entangled quantum states and their coherent control

    Science.gov (United States)

    Kues, Michael; Reimer, Christian; Roztocki, Piotr; Cortés, Luis Romero; Sciara, Stefania; Wetzel, Benjamin; Zhang, Yanbing; Cino, Alfonso; Chu, Sai T.; Little, Brent E.; Moss, David J.; Caspani, Lucia; Azaña, José; Morandotti, Roberto

    2017-06-01

    Optical quantum states based on entangled photons are essential for solving questions in fundamental physics and are at the heart of quantum information science. Specifically, the realization of high-dimensional states (D-level quantum systems, that is, qudits, with D > 2) and their control are necessary for fundamental investigations of quantum mechanics, for increasing the sensitivity of quantum imaging schemes, for improving the robustness and key rate of quantum communication protocols, for enabling a richer variety of quantum simulations, and for achieving more efficient and error-tolerant quantum computation. Integrated photonics has recently become a leading platform for the compact, cost-efficient, and stable generation and processing of non-classical optical states. However, so far, integrated entangled quantum sources have been limited to qubits (D = 2). Here we demonstrate on-chip generation of entangled qudit states, where the photons are created in a coherent superposition of multiple high-purity frequency modes. In particular, we confirm the realization of a quantum system with at least one hundred dimensions, formed by two entangled qudits with D = 10. Furthermore, using state-of-the-art, yet off-the-shelf telecommunications components, we introduce a coherent manipulation platform with which to control frequency-entangled states, capable of performing deterministic high-dimensional gate operations. We validate this platform by measuring Bell inequality violations and performing quantum state tomography. Our work enables the generation and processing of high-dimensional quantum states in a single spatial mode.

  10. On-chip generation of high-dimensional entangled quantum states and their coherent control.

    Science.gov (United States)

    Kues, Michael; Reimer, Christian; Roztocki, Piotr; Cortés, Luis Romero; Sciara, Stefania; Wetzel, Benjamin; Zhang, Yanbing; Cino, Alfonso; Chu, Sai T; Little, Brent E; Moss, David J; Caspani, Lucia; Azaña, José; Morandotti, Roberto

    2017-06-28

    Optical quantum states based on entangled photons are essential for solving questions in fundamental physics and are at the heart of quantum information science. Specifically, the realization of high-dimensional states (D-level quantum systems, that is, qudits, with D > 2) and their control are necessary for fundamental investigations of quantum mechanics, for increasing the sensitivity of quantum imaging schemes, for improving the robustness and key rate of quantum communication protocols, for enabling a richer variety of quantum simulations, and for achieving more efficient and error-tolerant quantum computation. Integrated photonics has recently become a leading platform for the compact, cost-efficient, and stable generation and processing of non-classical optical states. However, so far, integrated entangled quantum sources have been limited to qubits (D = 2). Here we demonstrate on-chip generation of entangled qudit states, where the photons are created in a coherent superposition of multiple high-purity frequency modes. In particular, we confirm the realization of a quantum system with at least one hundred dimensions, formed by two entangled qudits with D = 10. Furthermore, using state-of-the-art, yet off-the-shelf telecommunications components, we introduce a coherent manipulation platform with which to control frequency-entangled states, capable of performing deterministic high-dimensional gate operations. We validate this platform by measuring Bell inequality violations and performing quantum state tomography. Our work enables the generation and processing of high-dimensional quantum states in a single spatial mode.

  11. On-Chip Microfluidic Components for In Situ Analysis, Separation, and Detection of Amino Acids

    Science.gov (United States)

    Zheng, Yun; Getty, Stephanie; Dworkin, Jason; Balvin, Manuel; Kotecki, Carl

    2013-01-01

    The Astrobiology Analytical Laboratory at GSFC has identified amino acids in meteorites and returned cometary samples by using liquid chromatography-electrospray ionization time-of-flight mass spectrometry (LCMS). These organic species are key markers for life, having the property of chirality that can be used to distinguish biological from non-biological amino acids. One of the critical components in the benchtop instrument is liquid chromatography (LC) analytical column. The commercial LC analytical column is an over- 250-mm-long and 4.6-mm-diameter stainless steel tube filled with functionized microbeads as stationary phase to separate the molecular species based on their chemistry. Miniaturization of this technique for spaceflight is compelling for future payloads for landed missions targeting astrobiology objectives. A commercial liquid chromatography analytical column consists of an inert cylindrical tube filled with a stationary phase, i.e., microbeads, that has been functionalized with a targeted chemistry. When analyte is sent through the column by a pressurized carrier fluid (typically a methanol/ water mixture), compounds are separated in time due to differences in chemical interactions with the stationary phase. Different species of analyte molecules will interact more strongly with the column chemistry, and will therefore take longer to traverse the column. In this way, the column will separate molecular species based on their chemistry. A lab-on-chip liquid analysis tool was developed. The microfluidic analytical column is capable of chromatographically separating biologically relevant classes of molecules based on their chemistry. For this analytical column, fabrication, low leak rate, and stationary phase incorporation of a serpentine microchannel were demonstrated that mimic the dimensions of a commercial LC column within a 5 10 1 mm chip. The microchannel in the chip has a 75- micrometer-diameter oval-shaped cross section. The serpentine

  12. On-chip RF-to-optical transducer (Conference Presentation)

    Science.gov (United States)

    Simonsen, Anders; Tsaturyan, Yeghishe; Seis, Yannick; Schmid, Silvan; Schliesser, Albert; Polzik, Eugene S.

    2016-04-01

    Recent advances in the fabrication of nano- and micromechanical elements enable the realization of high-quality mechanical resonators with masses so small that the forces from optical photons can have a significant impact on their motion. This facilitates a strong interaction between mechanical motion and light, or phonons and photons. This interaction is the corner stone of the field of optomechanics and allows, for example, for ultrasensitive detection and manipulation of mechanical motion using laser light. Remarkably, today these techniques can be extended into the quantum regime, in which fundamental fluctuations of light and mechanics govern the system's behavior. Micromechanical elements can also interact strongly with other physical systems, which is the central aspect of many micro-electro-mechanical based sensors. Micromechanical elements can therefore act as a bridge between these diverse systems, plus technologies that utilize them, and the mature toolbox of optical techniques that routinely operates at the quantum limit. In a previous work [1], we demonstrated such a bridge by realizing simultaneous coupling between an electronic LC circuit and a quantum-noise limited optical interferometer. The coupling was mediated by a mechanical oscillator forming a mechanically compliant capacitor biased with a DC voltage. The latter enhances the electromechanical interaction all the way to the strong coupling regime. That scheme allowed optical detection of electronic signals with effective noise temperatures far below the actual temperature of the mechanical element. On-chip integration of the electrical, mechanical and optical elements is necessary for an implementation of the transduction scheme that is viable for commercial applications. Reliable assembly of a strongly coupled electromechanical device, and inclusion of an optical cavity for enhanced optical readout, are key features of the new platform. Both can be achieved with standard cleanroom fabrication

  13. Fully Integrated on-Chip Switched DC–DC Converter for Battery-Powered Mixed-Signal SoCs

    Directory of Open Access Journals (Sweden)

    Heungjun Jeon

    2017-01-01

    Full Text Available This paper presents a fully integrated on-chip switched-capacitor (SC DC–DC converter that supports a programmable regulated power supply ranging from 2.6 to 3.2 V out of a 5 V input supply. The proposed 4-to-3 step-down topology utilizes two conventional 2-to-1 step-down topologies; each of them (2-to-1_up and 2-to-1_dw has a different flying capacitance to maximize the load current driving capability while minimizing the bottom-plate capacitance loss. The control circuits use a low power supply provided by a small internal low-drop output (LDO connected to the internal load voltage (VL_dw from the 2-to-1_dw, and low swing level-shifted gate-driving signals are generated using the internal load voltage (VL_dw. Therefore, the proposed implementation reduces control circuit and switching power consumptions. The programmable power supply voltage is regulated by means of a pulse frequency modulation (PFM technique with the compensated two-stage operational transconductance amplifier (OTA and the current-starved voltage controlled oscillator (VCO to maintain high efficiency over a wide range of load currents. The proposed on-chip SC DC–DC converter is designed and simulated using high-voltage 0.35 μm bipolar, complementary metal-oxide-semiconductor (CMOS and DMOS (BCDMOS technology. It achieves a peak efficiency of 74% when delivering an 8 mA load current at a 3.2 V supply voltage level, and it provides a maximum output power of 48 mW (IL = 15 mA at VL_up = 3.2 V at 70.5% efficiency. The proposed on-chip SC voltage regulator shows better efficiency than the ideal linear regulator over a wide range of output power, from 2.6 mW to 48 mW. The 18-phase interleaving technique enables the worst-case output voltage ripple to be less than 5.77% of the load voltage.

  14. An On-Chip Bus Tracer Analyzer With Amba AHB For Real Time Tracing With Lossless Data Compression For SOC

    Directory of Open Access Journals (Sweden)

    KOKA SRIKANTH

    2014-09-01

    Full Text Available The Advanced Microcontroller Bus Architecture (AMBA widely used as the on-chip bus in System-on-a-chip (SoC designs. The important aspect of a SoC is not only which components or blocks it houses, but also how they are interconnected. AMBA is a solution for the blocks to interface with each other. The biggest challenge in SoC design is in validating and testing the system. AHB Bus Tracer is a significant infrastructure that is needed to monitor the on chip-bus signals, which is vital for debugging and performance analysis and also optimizing the SOC. Basically on chip signals are difficult to observe since they are deeply embedded in a SoC and no sufficient I/O pins are required to access those signals. Therefore, we embed a bus tracer in SoC to capture the bus signals and store them. The AMBA AHB should be used to which are high bandwidth and require the high performance of a pipelined bus interface. Performance can be improved at high-frequency operation. Performance is independent of the mark-space ratio of the clock. No special considerations are required for automatic test insertion. Our aim in this project is to Design the AHB- protocol with bus tracer. For real-time tracing, we should reduce the trace size as much as possible without reducing the original data.SYS-HMRBT supports tracing after/before an event triggering, named post-triggering trace/pre-triggering trace, respectively. SYS-HMRBT runs at 500 MHz and costs 42 K gates in TSMC 0.13- m technology, indicating that it is capable of real time tracing and is very small in modern SoCs.The experimental results show that trace compression ratio reduced by 96.32%. Finally this approach was designed successfully along with MODEL SIM and synthesis using Xilinx ISE. The SoC can be verified in field-programmable gate array.

  15. Complete Muon Cooling Channel Design and Simulations

    Energy Technology Data Exchange (ETDEWEB)

    Yoshikawa, C. [MUONS Inc., Batavia; Ankenbrandt, C. [MUONS Inc., Batavia; Johnson, R. P. [MUONS Inc., Batavia; Derbenev, Y. [Jefferson Lab; Morozov, V. [Jefferson Lab; Neuffer, D. [Fermilab; Yonehara, K. [Fermilab

    2013-06-01

    While considerable progress has been made in developing promising subsystems for muon beam cooling channels to provide the extraordinary reduction of emittances, there is no end-to-end design that is capable of matching between or within the various subsystems. We present concepts to match emittances between and within muon beam cooling subsystems via the Helical Cooling Channel (HCC), which allows a general analytic approach to guide designs of transitions from one set of cooling channel parameters to another. These principles are demonstrated between segments in an existing cooling channel design, resulting in better performance (elimination of particle losses and colder muons) achieved in a channel approximately half its original length! These techniques will allow for a design of a complete cooling channel in a Muon Collider (MC) applicable to a Higgs Factory and an Energy Frontier machine.

  16. Parallel-plate lab-on-a-chip based on digital microfluidics for on-chip electrochemical analysis

    Science.gov (United States)

    Yu, Yuhua; Chen, Jianfeng; Zhou, Jia

    2014-01-01

    This paper describes an electrowetting on dielectric (EWOD) digital microfluidic-based lab-on-a-chip (LOC) integrated with on-chip electrochemical microsensor by IC compatible fabrication process, and its application for the entire online biosensing process capable of fully automatic analysis for ferrocenemethanol (FcM) and dopamine (DA). In this work, we made full use of the parallel-plate structure of the EWOD digital microfluidic device to fabricate the microfluidic module on the bottom plate and the three-microelectrode-system-integrated electrochemical cell together with patterned ground electrode on the top plate. The proposed LOC possesses the multifunction of: (1) creating, merging and transporting of microliter-level sample droplets, (2) online biosensing, and (3) droplets recycling. The three-electrode-integrated microsensor not only reveals a sensitive electrochemical detection for FcM in a wide concentration range (10 µM-1.0 mM), but also shows good stability, selectivity and reproducibility for surface-controlled detection of DA. The calibration of DA was linear for concentration from 1.0 to 50.0 µM with a high sensitivity of 2145 nA µM-1 cm-2 (R2 = 0.9933) and estimated detection limit of 0.42 µM (signal/noise ratio of 3). This work shows the promise of state-of-the-art digital microfluidic biosensors for fully automatic online bioanalysis in a future LOC to perform on-chip biomedical protocols in vitro diagnostic assays.

  17. All-MXene (2D titanium carbide) solid-state microsupercapacitors for on-chip energy storage

    KAUST Repository

    Peng, You-Yu

    2016-08-01

    On-chip energy storage is a rapidly evolving research topic, opening doors for integration of batteries and supercapacitors at microscales on rigid and flexible platforms. Recently, a new class of two-dimensional (2D) transition metal carbides and nitrides (so-called MXenes) has shown great promise in electrochemical energy storage applications. Here, we report the fabrication of all-MXene (Ti3C2Tx) solid-state interdigital microsupercapacitors by employing a solution spray-coating, followed by a photoresist-free direct laser cutting method. Our prototype devices consisted of two layers of Ti3C2Tx with two different flake sizes. The bottom layer was stacked large-size MXene flakes (typical lateral dimensions of 3-6 μm) serving mainly as current collectors. The top layer was made of small-size MXene flakes (~1 μm) with a large number of defects and edges as the electroactive layer responsible for energy storage. Compared to Ti3C2Tx micro-supercapacitors with platinum current collectors, the all-MXene devices exhibited much lower contact resistance, higher capacitances and better rate-capabilities. The areal and volumetric capacitances of ~27 mF cm-2 and ~337 F cm-3, respectively, at a scan rate of 20 mV s-1 were achieved. The devices also demonstrated their excellent cyclic stability, with 100% capacitance retention after 10,000 cycles at a scan rate of 50 mV s-1. This study opens up a plethora of possible designs for high-performance on-chip devices employing different chemistries, flake sizes and morphologies of MXenes and their heterostructures.

  18. A Low-Power Integrated Humidity CMOS Sensor by Printing-on-Chip Technology

    Directory of Open Access Journals (Sweden)

    Chang-Hung Lee

    2014-05-01

    Full Text Available A low-power, wide-dynamic-range integrated humidity sensing chip is implemented using a printable polymer sensing material with an on-chip pulse-width-modulation interface circuit. By using the inkjet printing technique, poly(3,4-ethylene-dioxythiophene/polystyrene sulfonate that has humidity sensing features can be printed onto the top metal layer of a 0.35 μm CMOS IC. The developed printing-on-chip humidity sensor achieves a heterogeneous three dimensional sensor system-on-chip architecture. The humidity sensing of the implemented printing-on-chip sensor system is experimentally tested. The sensor shows a sensitivity of 0.98% to humidity in the atmosphere. The maximum dynamic range of the readout circuit is 9.8 MΩ, which can be further tuned by the frequency of input signal to fit the requirement of the resistance of printed sensor. The power consumption keeps only 154 μW. This printing-on-chip sensor provides a practical solution to fulfill an ultra-small integrated sensor for the applications in miniaturized sensing systems.

  19. Experimental study on a transpiration cooling thermal protection system

    Institute of Scientific and Technical Information of China (English)

    2010-01-01

    Transpiration cooling thermal protection systems (TPS) are investigated for potential applications in hypersonic and re-entry vehicles,which are subjected to the severe aerodynamic heating environment. In this paper a transpiration cooling thermal protection system was designed and manufactured,and an experiment platform with radiant heating at the bottom as heat source was developed. The cooling capacity of the transpiration cooling TPS was experimentally investigated. By combining transpiration cooling method with traditional TPS,the heat load capability of the TPS can be improved. The structure temperature with active cooling applied was much lower than that without active cooling applied under the same heat load as well as the heat load increased with active cooling than the one without active cooling for the same structure temperature. The experimental results showed that at 5800 s,the temperature of inner structure was 100°C with active cooling applied compared to 500°C without active cooling applied,then the temperature increased and reached to 360°C at 8300 s. Heat load of this transpiration cooling TPS can be increased by over 70% as compared to the passion one and the cooling capability of the transpiration TPS was about 1700 kJ/kg. The results can provide fundamental data for developing the transpiration cooling TPS.

  20. Chalcogenide glass mid-infrared on-chip sensor for chemical sensing

    Science.gov (United States)

    Lin, Hongtao

    Chemical sensing in the mid-infrared (mid-IR) has been considered to be significant for molecular detection for decades, but until recently has mostly relied on benchtop spectroscopic instruments like Fourier transform infrared spectrometers, etc. Recent strides in planar photonic integration envision compact, standalone "sensor-on-a-chip" devices for molecular analysis as a potentially disruptive technology as compared to their conventional bulky counterparts. However, the difficulty of achieving adequate sensitivity in integrated optical sensors is still a key barrier towards their practical application, limited by the weak interactions between photons and molecules over the short optical path length accessible on a chip. To solve the sensitivity challenge, a novel mid-IR photothermal spectroscopic sensing technique was proposed and theoretically examined. Through dramatically amplified photothermal effects in an optical nano-cavity doubly resonant at both mid-IR pump and near infrared probe wavelengths, a device design based on nested 1-D nanobeam photonic crystal cavities is numerically analyzed to demonstrate the technique's potential for single small gas molecule detection without the need for cryogenically cooled mid-IR photo-detectors. Furthermore, since silica becomes opaque at wavelengths beyond 3.5 microm, new material platforms and fabrication techniques are needed for mid-IR on-chip chemical sensors. Chalcogenide glasses (ChG), amorphous compounds containing S, Se and Te, are ideal material choices for mid-IR chemical sensors given their broad mid-IR transparency window, large photothermal figure-of-merit, amorphous structure and low processing temperature. A ChG lift-off process and a nano-fabrication technique using focused ion beam milling have been developed to fabricate mid-IR ChG resonators and photonic crystal waveguide cavities. ChG resonators on CaF2 substrate claimed a high quality factor around 4 x 105. Using these devices, we have also

  1. Models and formal verification of multiprocessor system-on-chips

    DEFF Research Database (Denmark)

    Brekling, Aske Wiid; Hansen, Michael Reichhardt; Madsen, Jan

    2008-01-01

    In this article we develop a model for applications running on multiprocessor platforms. An application is modelled by task graphs and a multiprocessor system is modelled by a number of processing elements, each capable of executing tasks according to a given scheduling discipline. We present a d...... could verify a smart-phone application consisting of 103 tasks executing on 4 processing elements....

  2. On-chip optical phase locking of single growth monolithically integrated Slotted Fabry Perot lasers.

    Science.gov (United States)

    Morrissey, P E; Cotter, W; Goulding, D; Kelleher, B; Osborne, S; Yang, H; O'Callaghan, J; Roycroft, B; Corbett, B; Peters, F H

    2013-07-15

    This work investigates the optical phase locking performance of Slotted Fabry Perot (SFP) lasers and develops an integrated variable phase locked system on chip for the first time to our knowledge using these lasers. Stable phase locking is demonstrated between two SFP lasers coupled on chip via a variable gain waveguide section. The two lasers are biased differently, one just above the threshold current of the device with the other at three times this value. The coupling between the lasers can be controlled using the variable gain section which can act as a variable optical attenuator or amplifier depending on bias. Using this, the width of the stable phase locking region on chip is shown to be variable.

  3. On-chip cell analysis platform: Implementation of contact fluorescence microscopy in microfluidic chips

    Science.gov (United States)

    Takehara, Hiroaki; Kazutaka, Osawa; Haruta, Makito; Noda, Toshihiko; Sasagawa, Kiyotaka; Tokuda, Takashi; Ohta, Jun

    2017-09-01

    Although fluorescence microscopy is the gold standard tool for biomedical research and clinical applications, their use beyond well-established laboratory infrastructures remains limited. The present study investigated a novel on-chip cell analysis platform based on contact fluorescence microscopy and microfluidics. Combined use of a contact fluorescence imager based on complementary metal-oxide semiconductor technology and an ultra-thin glass bottom microfluidic chip enabled both to observe living cells with minimal image distortion and to ease controlling and handling of biological samples (e.g. cells and biological molecules) in the imaged area. A proof-of-concept experiment of on-chip detection of cellular response to endothelial growth factor demonstrated promising use for the recently developed on-chip cell analysis platform. Contact fluorescence microscopy has numerous desirable features including compatibility with plastic microfluidic chips and compatibility with the electrical control system, and thus will fulfill the requirements of a fully automated cell analysis system.

  4. Blood cleaner on-chip design for artificial human kidney manipulation.

    Science.gov (United States)

    Suwanpayak, N; Jalil, M A; Aziz, M S; Ismail, F D; Ali, J; Yupapin, P P

    2011-01-01

    A novel design of a blood cleaner on-chip using an optical waveguide known as a PANDA ring resonator is proposed. By controlling some suitable parameters, the optical vortices (gradient optical fields/wells) can be generated and used to form the trapping tools in the same way as optical tweezers. In operation, the trapping force is formed by the combination between the gradient field and scattering photons by using the intense optical vortices generated within the PANDA ring resonator. This can be used for blood waste trapping and moves dynamically within the blood cleaner on-chip system (artificial kidney), and is performed within the wavelength routers. Finally, the blood quality test is exploited by the external probe before sending to the destination. The advantage of the proposed kidney on-chip system is that the unwanted substances can be trapped and filtered from the artificial kidney, which can be available for blood cleaning applications.

  5. Area Analysis for On-chip Routers with Different Data-link Widths

    Institute of Scientific and Technical Information of China (English)

    ZHANG Min; LUO Feng-guang; FENG Yong-hua; HU Jia

    2006-01-01

    Compared with the traditional and inter-chip networks, on-chip networks (NoCs) have enormous wire resources which can be traded for improving other performance requirements. This means that much wider data links can be used for NoCs. This paper focuses on the area costs for on-chip routers under four different data-link widths: 8 bits, 16 bits, 128 bits, and 256 bits. Firstly, a virtual-channel based on-chip router is introduced. Secondly, the components of the router are implemented by Verilog HDL models and synthesized by Quartus II 4.0 in a FPGA device. Finally, the area costs are analyzed. It can be seen from the results that data-link width has great influence on area costs of buffers and crossbar while has no influence on area costs of arbiter.

  6. Dissecting regulatory networks in host-pathogen interaction using chIP-on-chip technology.

    Science.gov (United States)

    Sala, Claudia; Grainger, David C; Cole, Stewart T

    2009-05-08

    Understanding host-microbe interactions has been greatly enhanced by our broadening knowledge of the regulatory mechanisms at the heart of pathogenesis. The "transcriptomics" approach of measuring global gene expression has identified genes involved in bacterial pathogenesis. More recently, chromatin immunoprecipitation (ChIP) and hybridization to microarrays (chIP-on-chip) has emerged as a complementary tool that permits protein-DNA interactions to be studied in vivo. Thus, chIP-on-chip can be used to map the binding sites of transcription factors, thereby teasing apart gene regulatory networks. In this Review, we discuss the ChIP-on-chip technique and focus on its application to the study of host-pathogen interactions.

  7. AREA-EFFICIENT DESIGN OF SCHEDULER FOR ROUTING NODE OF NETWORK-ON-CHIP

    Directory of Open Access Journals (Sweden)

    Rehan Maroofi

    2011-10-01

    Full Text Available Traditional System-on-Chip (SoC design employed shared buses for data transfer among varioussubsystems. As SoCs become more complex involving a larger number of subsystems, traditional busbasedarchitecture is giving way to a new paradigm for on-chip communication. This paradigm is calledNetwork-on-Chip (NoC. A communication network of point-to-point links and routing switches is used tofacilitate communication between subsystems. The routing switch proposed in this paper consists of fourcomponents, namely the input ports, output ports, switching fabric, and scheduler. The scheduler design isdescribed in this paper. The function of the scheduler is to arbitrate between requests by data packets foruse of the switching fabric. The scheduler uses an improved round robin based arbitration algorithm. Dueto the symmetric structure of the scheduler, an area-efficient design is proposed by folding the scheduleronto itself, thereby reducing its area roughly by 50%.

  8. Simulation-based Modeling Frameworks for Networked Multi-processor System-on-Chip

    DEFF Research Database (Denmark)

    Mahadevan, Shankar

    2006-01-01

    This thesis deals with modeling aspects of multi-processor system-on-chip (MpSoC) design affected by the on-chip interconnect, also called the Network-on-Chip (NoC), at various levels of abstraction. To begin with, we undertook a comprehensive survey of research and design practices of networked Mp......SoC. The survey presents the challenges of modeling and performance analysis of the hardware and the software components used in such devices. These challenges are further exasperated in a mixed abstraction workspace, which is typical of complex MpSoC design environment. We provide two simulation-based frameworks...... and the RIPE frameworks allows easy incorporation of IP cores from either frameworks, into a new instance of the design. This could pave the way for seamless design evaluation from system-level to cycletrue abstraction in future component-based MpSoC design practice....

  9. A Performance Analytical Strategy for Network-on-Chip Router with Input Buffer Architecture

    Directory of Open Access Journals (Sweden)

    WANG, J.

    2012-11-01

    Full Text Available In this paper, a performance analytical strategy is proposed for Network-on-Chip router with input buffer architecture. First, an analytical model is developed based on semi-Markov process. For the non-work-conserving router with small buffer size, the model can be used to analyze the schedule delay and the average service time for each buffer when given the related parameters. Then, the packet average delay in router is calculated by using the model. Finally, we validate the effectiveness of our strategy by simulation. By comparing our analytical results to simulation results, we show that our strategy successfully captures the Network-on-Chip router performance and it performs better than the state-of-art technology. Therefore, our strategy can be used as an efficiency performance analytical tool for Network-on-Chip design.

  10. System-Level Design Methodologies for Networked Multiprocessor Systems-on-Chip

    DEFF Research Database (Denmark)

    Virk, Kashif Munir

    2008-01-01

    of wireless integrated sensor networks which are an emerging class of networked embedded computer systems. The work described here demonstrates how to model multiprocessor systems-on-chip at the system level by abstracting away most of the lower-level details albeit retaining the parameters most relevant......The first part of the thesis presents an overview of the existing theories and practices of modeling and simulation of multiprocessor systems-on-chip. The systematic categorization of the plethora of existing programming models at various levels of abstraction is the main contribution here which...... is the first such attempt in the published literature. The second part of the thesis deals with the issues related to the development of system-level design methodologies for networked multiprocessor systems-on-chip at various levels of design abstraction with special focus on the modeling and design...

  11. CMOS On-Chip Optoelectronic Neural Interface Device with Integrated Light Source for Optogenetics

    Science.gov (United States)

    Sawadsaringkarn, Y.; Kimura, H.; Maezawa, Y.; Nakajima, A.; Kobayashi, T.; Sasagawa, K.; Noda, T.; Tokuda, T.; Ohta, J.

    2012-03-01

    A novel optoelectronic neural interface device is proposed for target applications in optogenetics for neural science. The device consists of a light emitting diode (LED) array implemented on a CMOS image sensor for on-chip local light stimulation. In this study, we designed a suitable CMOS image sensor equipped with on-chip electrodes to drive the LEDs, and developed a device structure and packaging process for LED integration. The prototype device produced an illumination intensity of approximately 1 mW with a driving current of 2.0 mA, which is expected to be sufficient to activate channelrhodopsin (ChR2). We also demonstrated the functions of light stimulation and on-chip imaging using a brain slice from a mouse as a target sample.

  12. Liquids on-chip: direct storage and release employing micro-perforated vapor barrier films.

    Science.gov (United States)

    Czurratis, Daniel; Beyl, Yvonne; Grimm, Alexander; Brettschneider, Thomas; Zinober, Sven; Lärmer, Franz; Zengerle, Roland

    2015-07-07

    Liquids on-chip describes a reagent storage concept for disposable pressure driven Lab-on-Chip (LoC) devices, which enables liquid storage in reservoirs without additional packaging. On-chip storage of liquids can be considered as one of the major challenges for the commercial break through of polymer-based LoC devices. Especially the ability for long-term storage and reagent release on demand are the most important aspects for a fully developed technology. On-chip storage not only replaces manual pipetting, it creates numerous advantages: fully automated processing, ease of use, reduction of contamination and transportation risks. Previous concepts for on-chip storage are based on liquid packaging solutions (e.g. stick packs, blisters, glass ampoules), which implicate manufacturing complexity and additional pick and place processes. That is why we prefer on-chip storage of liquids directly in reservoirs. The liquids are collected in reservoirs, which are made of high barrier polymers or coated by selected barrier layers. Therefore, commonly used polymers for LoC applications as cyclic olefin polymer (COP) and polycarbonate (PC) were investigated in the context of novel polymer composites. To ensure long-term stability the reservoirs are sealed with a commercially available barrier film by hot embossing. The barrier film is structured by pulsed laser ablation, which installs rated break points without affecting the barrier properties. A flexible membrane is actuated through pneumatic pressure for reagent release on demand. The membrane deflection breaks the barrier film and leads to efficient cleaning of the reservoirs in order to provide the liquids for further processing.

  13. The development of advanced cooling methods for high-power electronics

    Science.gov (United States)

    Bland, T. J.; Ciaccio, M. P.; Downing, R. S.; Smith, W. G.

    1990-10-01

    Consideration is given to various technologies developed to meet the difficult cooling requirements of high-density power electronics equipment for the aerospace industry. Topics discussed include liquid impingement cooling, compact high-density cooler, integrally cooled semiconductor, high heat flux cold plane, immersion cooling, modular reflux cooler, and forced-flow two-phase cooling systems. It is concluded that the new technologies are capable of providing the temperature control necessary to maintain desired electronic reliabilities using high-conductance cooling approaches.

  14. Mobile Test Capabilities

    Data.gov (United States)

    Federal Laboratory Consortium — The Electrical Power Mobile Test capabilities are utilized to conduct electrical power quality testing on aircraft and helicopters. This capability allows that the...

  15. CMOS capacitive sensors for lab-on-chip applications a multidisciplinary approach

    CERN Document Server

    Ghafar-Zadeh, Ebrahim

    2010-01-01

    The main components of CMOS capacitive biosensors including sensing electrodes, bio-functionalized sensing layer, interface circuitries and microfluidic packaging are verbosely explained in chapters 2-6 after a brief introduction on CMOS based LoCs in Chapter 1. CMOS Capacitive Sensors for Lab-on-Chip Applications is written in a simple pedagogical way. It emphasises practical aspects of fully integrated CMOS biosensors rather than mathematical calculations and theoretical details. By using CMOS Capacitive Sensors for Lab-on-Chip Applications, the reader will have circuit design methodologies,

  16. On-chip artificial magnon-polariton device for voltage control of electromagnetically induced transparency

    Science.gov (United States)

    Kaur, Sandeep; Yao, Bimu; Gui, Yong-Sheng; Hu, Can-Ming

    2016-11-01

    We demonstrate an on-chip device utilizing the concept of an artificial cavity magnon-polariton (CMP) generated via coupling between a microwave cavity mode and the artificial magnetism dynamics of a split ring resonator. This on-chip device allows the easy tuning of the artificial CMP gap by using a DC voltage signal, which enables tuneable electrodynamically induced transparency. The high tunability of the artificial magnon-polariton system not only enables the study of phenomena associated with the classical analogues of different coupling regimes, but also may open up avenues for designing advanced microwave devices and ultra-sensitive sensors.

  17. Migration selection of strategies for parallel genetic algorithms: implementation on networks on chips

    Science.gov (United States)

    Mourelle, L.; Ferreira, R. E.; Nedjah, N.

    2010-10-01

    The aim of the work described in this article is to investigate migration strategies for the execution of parallel genetic algorithms in a multi-processor system-on-chip (MPSoC). Some multimedia and internet applications for wireless communications are using genetic algorithms and can benefit from the advantages provided by parallel processing on MPSoCs. In order to run such algorithms, we use a network-on-chip platform, which provides the interconnection network required for the communication between processors. Two migration strategies are employed in order to analyse the speedup and efficiency each one can provide, considering the communication costs they require.

  18. Millimeter Wave on Chip Antenna Using Dogbone Shape Artificial Magnetic Conductor

    Directory of Open Access Journals (Sweden)

    Guo Qing Luo

    2013-01-01

    Full Text Available An artificial magnetic conductor (AMC applied in millimeter wave on chip antenna design based on a standard 0.18 μm CMOS technology is studied. The AMC consisting of two-dimensional periodic dogbone shape elements is constructed at one metal layer of the CMOS structure. After its performance has been completely investigated, it has been used in an on chip dipole antenna design as an artificial background to enhance efficiency of the dipole antenna. The result shows that 0.72 dB gain has been achieved at 75 GHz when the AMC is constructed by a 4*6 dogbone array.

  19. Autonomic networking-on-chip bio-inspired specification, development, and verification

    CERN Document Server

    Cong-Vinh, Phan

    2011-01-01

    Despite the growing mainstream importance and unique advantages of autonomic networking-on-chip (ANoC) technology, Autonomic Networking-On-Chip: Bio-Inspired Specification, Development, and Verification is among the first books to evaluate research results on formalizing this emerging NoC paradigm, which was inspired by the human nervous system. The FIRST Book to Assess Research Results, Opportunities, & Trends in ""BioChipNets"" The third book in the Embedded Multi-Core Systems series from CRC Press, this is an advanced technical guide and reference composed of contributions from prominent re

  20. An Innovative Gas Sensor with On-Chip Reference Using Monolithic Twin Laser

    Institute of Scientific and Technical Information of China (English)

    ZHANG Yong-Gang; TIAN Zhao-Bing; ZHANG Xiao-Jun; GU Yi; LI Ai-Zhen; ZHU Xiang-Rong; ZHENG Yan-Lan; LIU Sheng

    2007-01-01

    An innovative gas sensor with on-chip reference using a monolithic twin laser is proposed. In this sensor a monolithic twin laser generates two closer laser beams with slight different wavelengths alternatively, one photodiode is used to catch both absorption and reference signals by time division multiplexing. The detection of nitrous oxide adopting this scheme using a 2.1 μm antimonide laser and an InGaAs photodiode has been demonstrated experimentally with detection limit below 1 ppm. Using this on chip reference scheme the fluctuations from the optical path and devices can be compensated effectively; the sensor system is simplified distinctly.

  1. Optical and Electric Multifunctional CMOS Image Sensors for On-Chip Biosensing Applications

    Directory of Open Access Journals (Sweden)

    Kiyotaka Sasagawa

    2010-12-01

    Full Text Available In this review, the concept, design, performance, and a functional demonstration of multifunctional complementary metal-oxide-semiconductor (CMOS image sensors dedicated to on-chip biosensing applications are described. We developed a sensor architecture that allows flexible configuration of a sensing pixel array consisting of optical and electric sensing pixels, and designed multifunctional CMOS image sensors that can sense light intensity and electric potential or apply a voltage to an on-chip measurement target. We describe the sensors’ architecture on the basis of the type of electric measurement or imaging functionalities.

  2. A Network Traffic Generator Model for Fast Network-on-Chip Simulation

    DEFF Research Database (Denmark)

    Mahadevan, Shankar; Angiolini, Frederico; Storgaard, Michael

    2005-01-01

    For Systems-on-Chip (SoCs) development, a predominant part of the design time is the simulation time. Performance evaluation and design space exploration of such systems in bit- and cycle-true fashion is becoming prohibitive. We propose a traffic generation (TG) model that provides a fast...... and effective Network-on-Chip (NoC) development and debugging environment. By capturing the type and the timestamp of communication events at the boundary of an IP core in a reference environment, the TG can subsequently emulate the core's communication behavior in different environments. Access patterns...

  3. A 77 GHz on-chip strip dipole antenna integrated with balun circuits for automotive radar

    OpenAIRE

    2012-01-01

    In this paper, design and implementation of a 77 GHz on-chip strip dipole antenna integrated with both lumped and transmission line based balun circuits are presented. The on-chip antenna is realized by using IHP’s 0.25 μm SiGe BiCMOS technology with localized back-side etch (LBE) module to decrease substrate loss. The strip dipole antenna is fed by both a lumped LC circuit and strip line tapered baluns integrated on the same substrate and occupies an area of 1x1.2 mm2 including the RF pads. ...

  4. A wearable, low-power, health-monitoring instrumentation based on a Programmable System-on-Chip.

    Science.gov (United States)

    Massot, Bertrand; Gehin, Claudine; Nocua, Ronald; Dittmar, Andre; McAdams, Eric

    2009-01-01

    Improvement in quality and efficiency of health and medicine, at home and in hospital, has become of paramount importance. The solution of this problem would require the continuous monitoring of several key patient parameters, including the assessment of autonomic nervous system (ANS) activity using non-invasive sensors, providing information for emotional, sensorial, cognitive and physiological analysis of the patient. Recent advances in embedded systems, microelectronics, sensors and wireless networking enable the design of wearable systems capable of such advanced health monitoring. The subject of this article is an ambulatory system comprising a small wrist device connected to several sensors for the detection of the autonomic nervous system activity. It affords monitoring of skin resistance, skin temperature and heart activity. It is also capable of recording the data on a removable media or sending it to computer via a wireless communication. The wrist device is based on a Programmable System-on-Chip (PSoC) from Cypress: PSoCs are mixed-signal arrays, with dynamic, configurable digital and analogical blocks and an 8-bit Microcontroller unit (MCU) core on a single chip. In this paper we present first of all the hardware and software architecture of the device, and then results obtained from initial experiments.

  5. System-on-chip integration of a new electromechanical impedance calculation method for aircraft structure health monitoring.

    Science.gov (United States)

    Boukabache, Hamza; Escriba, Christophe; Zedek, Sabeha; Medale, Daniel; Rolet, Sebastien; Fourniols, Jean Yves

    2012-10-11

    The work reported on this paper describes a new methodology implementation for active structural health monitoring of recent aircraft parts made from carbon-fiber-reinforced polymer. This diagnosis is based on a new embedded method that is capable of measuring the local high frequency impedance spectrum of the structure through the calculation of the electro-mechanical impedance of a piezoelectric patch pasted non-permanently onto its surface. This paper involves both the laboratory based E/M impedance method development, its implementation into a CPU with limited resources as well as a comparison with experimental testing data needed to demonstrate the feasibility of flaw detection on composite materials and answer the question of the method reliability. The different development steps are presented and the integration issues are discussed. Furthermore, we present the unique advantages that the reconfigurable electronics through System-on-Chip (SoC) technology brings to the system scaling and flexibility. At the end of this article, we demonstrate the capability of a basic network of sensors mounted onto a real composite aircraft part specimen to capture its local impedance spectrum signature and to diagnosis different delamination sizes using a comparison with a baseline.

  6. System-on-Chip Integration of a New Electromechanical Impedance Calculation Method for Aircraft Structure Health Monitoring

    Science.gov (United States)

    Boukabache, Hamza; Escriba, Christophe; Zedek, Sabeha; Medale, Daniel; Rolet, Sebastien; Fourniols, Jean Yves

    2012-01-01

    The work reported on this paper describes a new methodology implementation for active structural health monitoring of recent aircraft parts made from carbon-fiber-reinforced polymer. This diagnosis is based on a new embedded method that is capable of measuring the local high frequency impedance spectrum of the structure through the calculation of the electro-mechanical impedance of a piezoelectric patch pasted non-permanently onto its surface. This paper involves both the laboratory based E/M impedance method development, its implementation into a CPU with limited resources as well as a comparison with experimental testing data needed to demonstrate the feasibility of flaw detection on composite materials and answer the question of the method reliability. The different development steps are presented and the integration issues are discussed. Furthermore, we present the unique advantages that the reconfigurable electronics through System-on-Chip (SoC) technology brings to the system scaling and flexibility. At the end of this article, we demonstrate the capability of a basic network of sensors mounted onto a real composite aircraft part specimen to capture its local impedance spectrum signature and to diagnosis different delamination sizes using a comparison with a baseline. PMID:23202013

  7. System-on-Chip Integration of a New Electromechanical Impedance Calculation Method for Aircraft Structure Health Monitoring

    Directory of Open Access Journals (Sweden)

    Daniel Medale

    2012-10-01

    Full Text Available The work reported on this paper describes a new methodology implementation for active structural health monitoring of recent aircraft parts made from carbon-fiber-reinforced polymer. This diagnosis is based on a new embedded method that is capable of measuring the local high frequency impedance spectrum of the structure through the calculation of the electro-mechanical impedance of a piezoelectric patch pasted non-permanently onto its surface. This paper involves both the laboratory based E/M impedance method development, its implementation into a CPU with limited resources as well as a comparison with experimental testing data needed to demonstrate the feasibility of flaw detection on composite materials and answer the question of the method reliability. The different development steps are presented and the integration issues are discussed. Furthermore, we present the unique advantages that the reconfigurable electronics through System-on-Chip (SoC technology brings to the system scaling and flexibility. At the end of this article, we demonstrate the capability of a basic network of sensors mounted onto a real composite aircraft part specimen to capture its local impedance spectrum signature and to diagnosis different delamination sizes using a comparison with a baseline.

  8. Hybrid radiator cooling system

    Science.gov (United States)

    France, David M.; Smith, David S.; Yu, Wenhua; Routbort, Jules L.

    2016-03-15

    A method and hybrid radiator-cooling apparatus for implementing enhanced radiator-cooling are provided. The hybrid radiator-cooling apparatus includes an air-side finned surface for air cooling; an elongated vertically extending surface extending outwardly from the air-side finned surface on a downstream air-side of the hybrid radiator; and a water supply for selectively providing evaporative cooling with water flow by gravity on the elongated vertically extending surface.

  9. Kinetic characterization of on-chip DNA ligation on dendron-coated surfaces with nanoscaled lateral spacings

    Science.gov (United States)

    Kim, Eung-Sam; Lee, Namgyu; Park, Joon Won; Choi, Kwan Yong

    2013-10-01

    We analyzed the enzymatic profiles of on-chip DNA ligation as we controlled the lateral spacing of surface-immobilized DNA substrates using dendron molecules with different sizes at the nanoscale. Enzymatic on-chip DNA ligation was performed on the dendron-coated surface within 20 min with no need for post-ligation gel electrophoresis. The enzymatic DNA repair was assessed by the fluorescence intensity at the repaired DNA duplex after thermally dissociating the unligated Cy3-labeled DNA from the DNA duplex, in which the Cy3-labeled DNA was hybridized prior to the on-chip DNA ligation. The rate of the nick-sealing reaction on the 27-acid dendron surface was 3-fold higher than that on the 9-acid dendron surface, suggesting that the wider lateral spacing determined by the larger dendron molecule could facilitate the access of DNA ligase to the nick site. The performance of on-chip DNA ligation was dropped to 10% and 3% when the nick was replaced by one- and two-nucleotide-long gaps, respectively. The 5‧ terminal phosphorylation of DNA strands by polynucleotide kinase and the on-chip DNA cleavage by endonucleases were also quantitatively monitored throughout the on-chip DNA ligation on the dendron-coated surface. A better understanding of the enzymatic kinetics of on-chip DNA ligation will contribute to a more reliable performance of various on-chip DNA ligation-based assays.

  10. A power efficient 2Gb/s transceiver in 90nm CMOS for 10mm On-Chip interconnect

    NARCIS (Netherlands)

    Mensink, E.; Schinkel, D.; Klumperink, E.A.M.; Tuijl, van A.J.M.; Nauta, B.

    2007-01-01

    Global on-chip data communication is becoming a concern as the gap between transistor speed and interconnect bandwidth increases with CMOS process scaling. In this paper a low-swing transceiver for 10mm long 0.54μm wide on-chip interconnect is presented, which achieves a similar data rate as previou

  11. Organs-on-Chips in Drug Development: The Importance of Involving Stakeholders in Early Health Technology Assessment

    NARCIS (Netherlands)

    Middelkamp, Heleen H.T.; Meer, van der Andries D.; Hummel, J. Marjan; Stamatialis, Dimitrios F.; Mummery, Christine L.; Passier, Robert; IJzerman, Maarten J.

    2016-01-01

    Organs-on-chips are three-dimensional, microfluidic cell culture systems that simulate the function of tissues and organ subunits. Organ-on-chip systems are expected to contribute to drug candidate screening and the reduction of animal tests in preclinical drug development and may increase efficienc

  12. Scale formation in deluged dry cooling systems

    Energy Technology Data Exchange (ETDEWEB)

    Pratt, D.R.

    1976-05-01

    Deluging of air-cooled heat exchangers with water during warm periods holds the promise of increasing heat rejection capability and reducing the cost of dry cooling. One of the principal uncertainties in the use of the deluge concept is the tendency toward deposition of solids from the delugate. Small amounts of calcium carbonate scale may significantly reduce the cooling efficiency of a deluged system by reducing the heat transfer coefficient and interfering with delugate flow. Thus the question of delugate water quality is of major importance in evaluating scale formation and its effect on heat transfer in the deluged dry cooling system. The paper discusses, in relation to the deluged dry cooling system, the importance of scale prevention, the theory of scale formation and application of this theory to the deluged system, the problems of delugate evaporation, and delugate treatment required to prevent scaling.

  13. An on-chip Cell-SELEX process for automatic selection of high-affinity aptamers specific to different histologically classified ovarian cancer cells.

    Science.gov (United States)

    Hung, Lien-Yu; Wang, Chih-Hung; Hsu, Keng-Fu; Chou, Cheng-Yang; Lee, Gwo-Bin

    2014-10-21

    Ovarian cancer (OvCa) is the second most common type of gynecological cancer. More seriously, the prognosis for survival is relatively poor if an early OvCa diagnosis is not achieved. However, it is extremely challenging to diagnose very early stage OvCa, when treatments are the most effective, because of the lack of specific and sensitive biomarkers. Therefore, in order to achieve early detection of OvCa, screening and identifying biomarkers with high specificity and affinity are greatly needed. In this study, an integrated microfluidic system capable of performing cell-based systematic evolution of ligands by an exponential enrichment (Cell-SELEX) process was developed for automatic, high-throughput screening of multiple cell lines to competitively select aptamer-based biomarkers for OvCa. This on-chip Cell-SELEX process only required five rounds of aptamer selection, which is much faster than using a conventional SELEX process (22 rounds). Using this on-chip process, 13 aptamers specific to OvCa cells were successfully screened and three of them showed high affinity towards target cells with dissociation constants of 1.8 nM, 8.3 nM, and 1.3 nM. Analysis of stained fluorescence images and competitive testing against multiple cancer cell lines (cervical cancer, breast cancer, lung cancer, and liver cancer) were performed to verify the specificity of these selected aptamers. The results demonstrated that this developed system could perform the on-chip Cell-SELEX selection successfully and could be applied for personalized aptamer screening or targeted therapy monitoring in the near future.

  14. Dynamic capabilities, Marketing Capability and Organizational Performance

    Directory of Open Access Journals (Sweden)

    Adriana Roseli Wünsch Takahashi

    2017-01-01

    Full Text Available The goal of the study is to investigate the influence of dynamic capabilities on organizational performance and the role of marketing capabilities as a mediator in this relationship in the context of private HEIs in Brazil. As a research method we carried out a survey with 316 IES and data analysis was operationalized with the technique of structural equation modeling. The results indicate that the dynamic capabilities have influence on organizational performance only when mediated by marketing ability. The marketing capability has an important role in the survival, growth and renewal on educational services offerings for HEIs in private sector, and consequently in organizational performance. It is also demonstrated that mediated relationship is more intense for HEI with up to 3,000 students and other organizational profile variables such as amount of courses, the constitution, the type of institution and type of education do not significantly alter the results.

  15. Direct quantification of transendothelial electrical resistance in organs-on-chips

    NARCIS (Netherlands)

    Helm, van der Marinke W.; Odijk, M.; Frimat, Jean-Philippe; Meer, van der Andries D.; Eijkel, Jan C.T.; Berg, van den Albert; Segerink, Loes I.

    2016-01-01

    Measuring transendothelial or transepithelial electrical resistance (TEER) is a widely used method to monitor cellular barrier tightness in organs-on-chips. Unfortunately, integrated electrodes close to the cellular barrier hamper visual inspection of the cells or require specialized cleanroom proce

  16. Self-Powered Functional Device Using On-Chip Power Generation

    KAUST Repository

    Hussain, Muhammad Mustafa

    2012-01-26

    An apparatus, system, and method for a self-powered device using on-chip power generation. In some embodiments, the apparatus includes a substrate, a power generation module on the substrate, and a power storage module on the substrate. The power generation module may include a thermoelectric generator made of bismuth telluride.

  17. A Transceiver for High-Speed Global On-Chip Data Communication

    NARCIS (Netherlands)

    Schinkel, Daniël; Mensink, Eisse; Klumperink, Eric; Tuijl, van Ed; Nauta, Bram

    2005-01-01

    Global on-chip data communication is becoming a concern as the gap between transistor speed and interconnect bandwidth increases with CMOS process scaling. In this paper we show how a special form of equalization, pulse-width pre-emphasis, can significantly increase the data rate for a given length

  18. A survey of efficient on-chip communications for SoC

    NARCIS (Netherlands)

    Kavaldjiev, N.K.; Smit, G.J.M.

    2003-01-01

    This paper provides a survey of methods and techniques for flexible on-chip inter-processor communications for Systems-on-a-Chip (SoC) components. These devices are applied in battery-powered mobile multimedia devices. A classification is made of the most popular interconnection methods, techniques

  19. Nanotechnology and the Developing World: Lab-on-Chip Technology for Health and Environmental Applications

    Science.gov (United States)

    Mehta, Michael D.

    2008-01-01

    This article argues that advances in nanotechnology in general, and lab-on-chip technology in particular, have the potential to benefit the developing world in its quest to control risks to human health and the environment. Based on the "risk society" thesis of Ulrich Beck, it is argued that the developed world must realign its science and…

  20. An integrated lab-on-chip for rapid identification and simultaneous differentiation of tropical pathogens.

    Science.gov (United States)

    Tan, Jeslin J L; Capozzoli, Monica; Sato, Mitsuharu; Watthanaworawit, Wanitda; Ling, Clare L; Mauduit, Marjorie; Malleret, Benoît; Grüner, Anne-Charlotte; Tan, Rosemary; Nosten, François H; Snounou, Georges; Rénia, Laurent; Ng, Lisa F P

    2014-01-01

    Tropical pathogens often cause febrile illnesses in humans and are responsible for considerable morbidity and mortality. The similarities in clinical symptoms provoked by these pathogens make diagnosis difficult. Thus, early, rapid and accurate diagnosis will be crucial in patient management and in the control of these diseases. In this study, a microfluidic lab-on-chip integrating multiplex molecular amplification and DNA microarray hybridization was developed for simultaneous detection and species differentiation of 26 globally important tropical pathogens. The analytical performance of the lab-on-chip for each pathogen ranged from 102 to 103 DNA or RNA copies. Assay performance was further verified with human whole blood spiked with Plasmodium falciparum and Chikungunya virus that yielded a range of detection from 200 to 4×105 parasites, and from 250 to 4×107 PFU respectively. This lab-on-chip was subsequently assessed and evaluated using 170 retrospective patient specimens in Singapore and Thailand. The lab-on-chip had a detection sensitivity of 83.1% and a specificity of 100% for P. falciparum; a sensitivity of 91.3% and a specificity of 99.3% for P. vivax; a positive 90.0% agreement and a specificity of 100% for Chikungunya virus; and a positive 85.0% agreement and a specificity of 100% for Dengue virus serotype 3 with reference methods conducted on the samples. Results suggested the practicality of an amplification microarray-based approach in a field setting for high-throughput detection and identification of tropical pathogens.

  1. A simple clockless Network-on-Chip for a commercial audio DSP chip

    DEFF Research Database (Denmark)

    Stensgaard, Mikkel Bystrup; Bjerregaard, Tobias; Sparsø, Jens;

    2006-01-01

    We design a very small, packet-switched, clockless Network-on-Chip (NoC) as a replacement for the existing crossbar-based communication infrastructure in a commercial audio DSP chip. Both solutions are laid out in a 0.18 um process, and compared in terms of area, power consumption and routing...

  2. On-chip tunable long-period grating devices based on liquid crystal photonic bandgap fibers

    DEFF Research Database (Denmark)

    Wei, Lei; Weirich, Johannes; Alkeskjold, Thomas Tanggaard;

    2009-01-01

    We design and fabricate an on-chip tunable long-period grating device by integrating a liquid crystal photonic bandgap fiber on silicon structures. The transmission axis of the device can be electrically rotated in steps of 45° as well as switched on and off with the response time in the millisec...

  3. On-chip tunable long-period gratings in liquid crystal infiltrated photonic crystal fibers

    DEFF Research Database (Denmark)

    Wei, Lei; Weirich, Johannes; Alkeskjold, Thomas Tanggaard;

    2009-01-01

    An on-chip tunable long-period grating device in a liquid crystal infiltrated photonic crystal fiber is experimentally demonstrated. The depth and position of the notch are tuned electrically and thermally. The transmission axis can be electrically controlled as well as switched on and off....

  4. On-Chip Supercapacitor Electrode Based On Polypyrrole Deposited Into Nanoporous Au Scaffold

    Science.gov (United States)

    Lu, P.; Ohlckers, P.; Chen, X. Y.

    2016-11-01

    On-chip supercapacitors hold the potential promise for serving as the energy storage units in integrated circuit system, due to their much higher energy density in comparison with conventional dielectric capacitors, high power density and long-term cycling stability. In this study, nanoporous Au (NP-Au) film on-chip was employed as the electrode scaffold to help increase the electrolyte-accessible area for active material. Pseudo-capacitive polypyrrole (PPY) with high theoretical capacitance was deposited into the NP-Au scaffold, to construct the tailored NP-Au/PPY hybrid on-chip electrode with improved areal capacitance. Half cell test in three- electrode system revealed the improved capacitor performance of nanoporous Au supported PPY electrode, compared to the densely packed PPY nanowire film electrode on planer Au substrate (Au/PPY). The areal capacitance of 37 mF/cm2∼10 mV/s, 32 mF/cm2∼50 mV/s, 28 mF/cm2∼100 mV/s, 16 mF/cm2∼500 mV/s, were offered by NP-Au/PPY. Also, the cycling performance was enhanced via using NP-Au scaffold. The developed NP-Au/PPY on-chip electrode demonstrated herein paves a feasible pathway to employ dealloying derived porous metal as the scaffold for improving both the energy density and cycling performance for supercapacitor electrodes.

  5. Laser light-field fusion for wide-field lensfree on-chip phase contrast nanoscopy

    CERN Document Server

    Kazemzadeh, Farnoud

    2016-01-01

    Wide-field lensfree on-chip microscopy, which leverages holography principles to capture interferometric light-field encodings without lenses, is an emerging imaging modality with widespread interest given the large field-of-view compared to lens-based techniques. Nanoscopy is often synonymous with high equipment costs and limited FOV. In this study, we introduce the idea of laser light-field fusion for lensfree on-chip phase contrast nanoscopy, where interferometric laser light-field encodings acquired using an on-chip setup with laser pulsations at different wavelengths are fused to produce marker-free phase contrast images with resolving power below the pixel pitch of the sensor array as well as the wavelength of the probing light source, beyond the diffraction limit. Experimental results demonstrate, for the first time, a lensfree on-chip instrument successfully detecting 500 nm nanoparticles without any specialized or intricate sample preparation or the use of synthetic aperture- or lateral shift-based t...

  6. Static Routing in Symmetric Real-Time Network-on-Chips

    DEFF Research Database (Denmark)

    Brandner, Florian; Schoeberl, Martin

    2012-01-01

    With the rising number of cores on a single chip the question on how to organize the communication among those cores becomes more and more relevant. A common solution is to use a network-on-chip (NoC) that provides communication bandwidth, routing, and arbitration among the cores. The use of No...

  7. Nanotechnology and the Developing World: Lab-on-Chip Technology for Health and Environmental Applications

    Science.gov (United States)

    Mehta, Michael D.

    2008-01-01

    This article argues that advances in nanotechnology in general, and lab-on-chip technology in particular, have the potential to benefit the developing world in its quest to control risks to human health and the environment. Based on the "risk society" thesis of Ulrich Beck, it is argued that the developed world must realign its science and…

  8. Electrochemistry-on-chip for on-line conversions in drug metabolism studies

    NARCIS (Netherlands)

    Odijk, Mathieu; Baumann, A.; Olthuis, Wouter; van den Berg, Albert; Karst, U.

    2010-01-01

    We have designed an integrated 3-electrode electrochemical cell on-chip with high analyte conversion rates for use in drug metabolism studies. The electrochemical cell contains platinum working and counter electrodes and an iridium oxide pseudo-reference electrode. The pseudo-reference electrode has

  9. Power Efficient Gigabit Communication Over Capacitively Driven RC-Limited On-Chip Interconnects

    NARCIS (Netherlands)

    Mensink, E.; Schinkel, Daniel; Klumperink, Eric A.M.; van Tuijl, Adrianus Johannes Maria; Nauta, Bram

    2010-01-01

    Abstract—This paper presents a set of circuit techniques to achieve high data rate point-to-point communication over long on-chip RC-limited wire-pairs. The ideal line termination impedances for a flat transfer function with linear phase (pure delay) are derived, using an s-parameter wire-pair

  10. Low-Power, High-Speed Transceivers for Network-on-Chip Communication

    NARCIS (Netherlands)

    Schinkel, Daniel; Mensink, E.; Klumperink, Eric A.M.; van Tuijl, Adrianus Johannes Maria; Nauta, Bram

    Networks on chips (NoCs) are becoming popular as they provide a solution for the interconnection problems on large integrated circuits (ICs). But even in a NoC, link-power can become unacceptably high and data rates are limited when conventional data transceivers are used. In this paper, we present

  11. Ultrahigh-speed Si-integrated on-chip laser with tailored dynamic characteristics

    DEFF Research Database (Denmark)

    Park, Gyeong Cheol; Xue, Weiqi; Piels, Molly;

    2016-01-01

    For on-chip interconnects, an ideal light source should have an ultralow energy consumption per bandwidth (operating en-ergy) as well as sufficient output power for error-free detection. Nanocavity lasers have been considered the most ideal for smaller operating energy. However, they have a chall...

  12. Network Traffic Generator Model for Fast Network-on-Chip Simulation

    DEFF Research Database (Denmark)

    2008-01-01

    For Systems-on-Chip (SoCs) development, a predominant part of the design time is the simulation time. Performance evaluation and design space exploration of such systems in bit- and cycle-true fashion is becoming prohibitive. We propose a traffic generation (TG) model that provides a fast...

  13. On-chip measurement of the Brownian relaxation frequency of magnetic beads using magnetic tunneling junctions

    DEFF Research Database (Denmark)

    Donolato, M.; Sogne, E.; Dalslet, Bjarke Thomas

    2011-01-01

    We demonstrate the detection of the Brownian relaxation frequency of 250 nm diameter magnetic beads using a lab-on-chip platform based on current lines for exciting the beads with alternating magnetic fields and highly sensitive magnetic tunnel junction (MTJ) sensors with a superparamagnetic free...

  14. Highly Stable On-Chip Embedded Organic Whispering Gallery Mode Lasers

    NARCIS (Netherlands)

    Lu, Shi-Yang; Fang, Hong-Hua; Feng, Jing; Xia, Hong; Zhang, Tie-Qiang; Chen, Qi-Dai; Sun, Hong-Bo; Fang, Honghua

    2014-01-01

    Chip-embedded organic resonator is fabricated with 2,5-Bis(4-biphenylyl)thiophene (BP1T) crystals encapsulated with polydimethylsiloxane (PDMS). Whispering gallery mode lasing is demonstrated in these on-chip embedded crystalline microresonators, without decline in the spectral properties, and perfo

  15. Integrated separation and optical detection for novel on-chip chemical analysis

    Energy Technology Data Exchange (ETDEWEB)

    Warren, M.E.; Anex, D.S.; Rakestraw, D.; Gourley, P.L.

    1998-03-01

    This report represents the completion of a two years Laboratory Directed Research and Development (LDRD) program to investigate miniaturized systems for chemical detection and analysis. The future of advanced chemical detection and analysis is in miniature devices that are able to characterize increasingly complex samples, a laboratory on a chip. In this concept, chemical operations used to analyze complicated samples in a chemical laboratory sample handling, species separation, chemical derivitization and detection are incorporated into a miniature device. By using electrokinetic flow, this approach does not require pumps or valves, as fluids in microfabricated channels can be driven by externally applied voltages. This is ideal for sample handling in miniature devices. This project was to develop truly miniature on-chip optical systems based on Vertical Cavity Surface Emitting Lasers (VCSELs) and diffractive optics. These can be built into a complete system that also has on-chip electrokinetic fluid handling and chemical separation in a microfabricated column. The primary goal was the design and fabrication of an on-chip separation column with fluorescence sources and detectors that, using electrokinetic flow, can be used as the basis of an automated chemical analysis system. Secondary goals involved investigation of a dispersed fluorescence module that can be used to extend the versatility of the basic system and on chip, intracavity laser absorption as a high sensitivity detection technique.

  16. Microfluidic cytometers with integrated on-chip optical components for blood cell analysis

    Science.gov (United States)

    Zhao, Yingying; Li, Qin; Hu, Xiao-Ming

    2016-10-01

    In the last two decades, microfluidic technologies have shown the great potential in developing portable and point-of care testing blood cell analysis devices. It is challenging to integrate all free-space detecting components in a single microfluidic platform. In this paper, a microfluidic cytometer with integrated on-chip optical components was demonstrated. To facilitate on-chip detection, the device integrated optical fibers and on-chip microlens with microfluidic channels on one polydimethylsiloxane layer by standard soft photolithography. This compact design increased the sensitivity of the device and also eliminated time-consuming free-space optical alignments. Polystyrene particles, together with red blood cells and platelets, were measured in the microfluidic cytometer by small angle forward scatter. Experimental results indicated that the performance of the microfluidic device was comparable to a conventional cytometer. And it was also demonstrated its ability to detect on-chip optical signals in a highly compact, simple, truly portable and low cost format which was perfect suitable for point-of-care testing clinical hematology diagnostics.

  17. Analysis and design of an on-chip retargeting engine for IEEE 1687 networks

    NARCIS (Netherlands)

    Ibrahim, Ahmed; Kerkhoff, Hans G.

    2016-01-01

    IEEE 1687 (iJTAG) standard introduces a methodology for accessing the increasing number of embedded instruments found in modern System-on-Chips. Retargeting is defined by iJTAG as the procedure of translating instrument-level patterns to system-level scan vectors for a certain network organization.

  18. Vertical Integration of System-on-Chip Concepts in the Digital Design Curriculum

    Science.gov (United States)

    Tang, Ying; Head, L. M.; Ramachandran, R. P.; Chatman, L. M.

    2011-01-01

    The rapid evolution of System-on-Chip (SoC) challenges academic curricula to keep pace with multidisciplinary/interdisciplinary system thinking. This paper presents a curricular prototype that cuts across artificial course boundaries and provides a meaningful exploration of diverse facets of SoC design. Specifically, experimental contents of a…

  19. Overview of status and challenges of system testing on chip with embedded DRAMS

    Science.gov (United States)

    Falter, T.; Richter, D.

    2000-05-01

    The combination of logic together with DRAM as a system on chip (SOC) has many advantages for a large variety of computing and network applications. The goal of testing a system is to detect the fabrication caused faults in order to guarantee the defined quality. The increasing size of memories, shrinking dimensions, higher demands on application (frequency and temperature range) and quality cause new problems and higher costs of testing. On the other hand the pressure to serve the market with low cost products forces the test engineer to reduce test costs by reducing test times and using low cost test equipment. Different solutions are discussed in this paper in order to meet these challenges. The variety of test approaches for testing SOC with embedded DRAMs reaches from testing with completely chip external test logic, a simple on-chip test logic up to a full blown built-in self test (BIST) on chip. Which choice is the right one depends on different criteria e.g. memory size, quality demands and application of the product. As an example the modular embedded DRAM core concept from Infineon Technologies is discussed, which includes a dedicated modular test concept based on on-chip integration of a test controller.

  20. A Metaheuristic Scheduler for Time Division Multiplexed Network-on-Chip

    DEFF Research Database (Denmark)

    Sørensen, Rasmus Bo; Sparsø, Jens; Pedersen, Mark Ruvald

    2014-01-01

    This paper presents a metaheuristic scheduler for inter-processor communication in multi-processor platforms using time division multiplexed (TDM) networks on chip (NOC). Compared to previous works, the scheduler handles a broader and more general class of platforms. Another contribution, which has...

  1. CoMPSoC: a template for composable and predictable multi-processor system on chips

    NARCIS (Netherlands)

    Hansson, Andreas; Goossens, Kees; Bekooij, Marco; Huisken, Jos

    2009-01-01

    A growing number of applications, often with firm or soft real-time requirements, are integrated on the same System on Chip, in the form of either hardware or software intellectual property. The applications are started and stopped at run time, creating different use-cases. Resources, such as interc

  2. Waveguide filter-based on-chip differentiator for microwave photonic signal processing

    NARCIS (Netherlands)

    Taddei, Caterina; Nguyen, T.H.Yen; Zhuang, L.; Hoekman, M.; Leinse, Arne; Heideman, Rene; van Dijk, Paul; Roeloffzen, C.G.H.

    2013-01-01

    We propose and demonstrate a waveguide filterbased on-chip differentiator for microwave photonic signal processing. The system principle allows the operation of arbitrary-order differentiation. The realized device is constructed using the basic building blocks of photonic integrated circuits, and

  3. On-chip detection of ferromagnetic resonance of a single submicron Permalloy strip

    NARCIS (Netherlands)

    Costache, M. V.; Sladkov, M.; van der Wal, C. H.; van Wees, B. J.

    2006-01-01

    The authors measured ferromagnetic resonance of a single submicron ferromagnetic strip, embedded in an on-chip microwave transmission line device. The method used is based on detection of the oscillating magnetic flux due to the magnetization dynamics, with an inductive pickup loop. The dependence o

  4. On-chip single photon filtering and multiplexing in hybrid quantum photonic circuits.

    Science.gov (United States)

    Elshaari, Ali W; Zadeh, Iman Esmaeil; Fognini, Andreas; Reimer, Michael E; Dalacu, Dan; Poole, Philip J; Zwiller, Val; Jöns, Klaus D

    2017-08-30

    Quantum light plays a pivotal role in modern science and future photonic applications. Since the advent of integrated quantum nanophotonics different material platforms based on III-V nanostructures-, colour centers-, and nonlinear waveguides as on-chip light sources have been investigated. Each platform has unique advantages and limitations; however, all implementations face major challenges with filtering of individual quantum states, scalable integration, deterministic multiplexing of selected quantum emitters, and on-chip excitation suppression. Here we overcome all of these challenges with a hybrid and scalable approach, where single III-V quantum emitters are positioned and deterministically integrated in a complementary metal-oxide-semiconductor-compatible photonic circuit. We demonstrate reconfigurable on-chip single-photon filtering and wavelength division multiplexing with a foot print one million times smaller than similar table-top approaches, while offering excitation suppression of more than 95 dB and efficient routing of single photons over a bandwidth of 40 nm. Our work marks an important step to harvest quantum optical technologies' full potential.Combining different integration platforms on the same chip is currently one of the main challenges for quantum technologies. Here, Elshaari et al. show III-V Quantum Dots embedded in nanowires operating in a CMOS compatible circuit, with controlled on-chip filtering and tunable routing.

  5. Study of Network on Chip resources allocation for QoS Management

    Directory of Open Access Journals (Sweden)

    Abdelhamid HELALI

    2006-01-01

    Full Text Available The increasing complexity of integrated circuits and application requirements drive the research of new on-chip interconnection architectures. A network on chip draws on concepts inherited from distributed systems and computer networks subject areas to interconnect IP cores in a structured and scalable way. The main goal pursued is to achieve superior bandwidth when compared to conventional on-chip bus architectures. The complexity of Systems-on-Chip (SoC is growing; meeting real-time requirements is becoming increasingly difficult. Predictability for computation, memory and communication components are needed to build up real-time SoC. To achieve guaranteed throughput and bounded delivery delay, buffers in network interfaces (NIs must be dimensioned to hide round-trip latency and rate difference between computation and IPs communication.. It is crucial to shape these buffers according to the network requirements and to bring out the right specification before the design step to provide desired performances in the SoC. In this field this paper describes and presents a performance analyses of NoC shaped on mesh architecture. The goal of this work is to quantify buffering requirements in the NoC nodes by the analyze of some QoS metrics such as drop, compute latency, and throughput. This study presented in this paper is based on simulation approach of a mesh (4 x 4 NoC behavior under multimedia communication process with MPEG-4 (Moving Picture Experts Group flows.

  6. Boosting Local Field Enhancement by on-Chip Nanofocusing and Impedance-Matched Plasmonic Antennas

    DEFF Research Database (Denmark)

    Zenin, Vladimir A.; Andryieuski, Andrei; Malureanu, Radu

    2015-01-01

    -field enhancement that can advantageously be exploited in modern optical nanotechnologies, including signal processing, biochemical sensing, imaging, and spectroscopy. Here, we propose, analyze, and experimentally demonstrate on-chip nanofocusing followed by impedance-matched nanowire antenna excitation in the end...

  7. Low-Power, High-Speed Transceivers for Network-on-Chip Communication

    NARCIS (Netherlands)

    Schinkel, Daniel; Mensink, E.; Klumperink, Eric A.M.; van Tuijl, Adrianus Johannes Maria; Nauta, Bram

    2009-01-01

    Networks on chips (NoCs) are becoming popular as they provide a solution for the interconnection problems on large integrated circuits (ICs). But even in a NoC, link-power can become unacceptably high and data rates are limited when conventional data transceivers are used. In this paper, we present

  8. Simple and stable transendothelial electrical resistance measurement in organs-on-chips

    NARCIS (Netherlands)

    van der Helm, Marieke Willemijn; Odijk, Mathieu; Frimat, Jean-Philippe; Eijkel, Jan C.T.; van den Berg, Albert; Segerink, Loes Irene

    2015-01-01

    Measuring transendothelial electrical resistance (TEER) is a popular way to monitor cellular barrier tightness in organs-on-chips. However, in these devices integrated electrodes often block sight on the cells and the measured part often includes fluid-filled channels with variable resistance.

  9. Integration of a Pulse Generator on Chip Into a Compact Ultrawideband Antenna

    NARCIS (Netherlands)

    Vorobyov, A.V.; Bagga, S.; Yarovoy, A.G.; Haddad, S.A.P.; Serdijn, W.A.; Long, J.R.; Irahhauten, Z.; Ligthart, L.P.

    For impulse radio ultrawideband communications an “antenna plus generator” system is co-designed and an on chip generator is integrated into the antenna. This approach does away with the need for intermediate transmission lines conventionally placed between an RF device/generator and an antenna and

  10. Integration of a Pulse Generator on Chip Into a Compact Ultrawideband Antenna

    NARCIS (Netherlands)

    Vorobyov, A.V.; Bagga, S.; Yarovoy, A.G.; Haddad, S.A.P.; Serdijn, W.A.; Long, J.R.; Irahhauten, Z.; Ligthart, L.P.

    For impulse radio ultrawideband communications an “antenna plus generator” system is co-designed and an on chip generator is integrated into the antenna. This approach does away with the need for intermediate transmission lines conventionally placed between an RF device/generator and an antenna and

  11. Power Efficient Gigabit Communication Over Capacitively Driven RC-Limited On-Chip Interconnects

    NARCIS (Netherlands)

    Mensink, Eisse; Schinkel, Daniël; Klumperink, Eric A.M.; Tuijl, van Ed; Nauta, Bram

    2010-01-01

    This paper presents a set of circuit techniques to achieve high data rate point-to-point communication over long on-chip RC-limited wire-pairs. The ideal line termination impedances for a flat transfer function with linear phase (pure delay) are derived, using an s-parameter wire-pair model. It is s

  12. Synthesis and Layout of an Asynchronous Network-on-Chip using Standard EDA Tools

    DEFF Research Database (Denmark)

    Müller, Christoph; Kasapaki, Evangelia; Sørensen, Rasmus Bo

    2014-01-01

    is the key role that clock signals play in specifying time-constraints for the synthesis. In this paper explain how we handled the synthesis and layout of an asynchronous network-on-chip for a multi-core platform. Focus is on the design process while the actual NOC-design and its performance are presented...

  13. A Scheduling Discipline for Latency and Bandwidth Guarantees in Asynchronous Network-on-Chip

    DEFF Research Database (Denmark)

    Bjerregaard, Tobias; Sparsø, Jens

    2005-01-01

    Guaranteed services (GS) are important in that they provide predictability in the complex dynamics of shared communication structures. This paper discusses the implementation of GS in asynchronous Network-on-Chip. We present a novel scheduling discipline called Asynchronous Latency Guarantee (ALG...

  14. A Statically Scheduled Time-Division-Multiplexed Network-on-Chip for Real-Time Systems

    DEFF Research Database (Denmark)

    Schoeberl, Martin; Brandner, Florian; Sparsø, Jens

    2012-01-01

    This paper explores the design of a circuit-switched network-on-chip (NoC) based on time-division-multiplexing (TDM) for use in hard real-time systems. Previous work has primarily considered application-specific systems. The work presented here targets general-purpose hardware platforms. We...

  15. An On-Chip interconnect and protocol stack for multiple communication paradigms and programming models

    NARCIS (Netherlands)

    Hansson, Andreas; Goossens, Kees

    2009-01-01

    A growing number of applications, with diverse requirements, are integrated on the same System on Chip (SoC) in the form of hardware and software Intellectual Property (IP). The diverse requirements, coupled with the IPs being developed by unrelated design teams, lead to multiple communication parad

  16. The design, modeling and optimization of on-chip inductor and transformer circuits

    Science.gov (United States)

    Mohan, Sunderarajan Sunderesan

    2000-08-01

    On-chip inductors and transformers play a crucial role in radio frequency integrated circuits (RFICs). For gigahertz circuitry, these components are usually realized using bond-wires or planar on-chip spirals. Although bond wires exhibit higher quality factors (Q) than on-chip spirals, their use is constrained by the limited range of realizable inductances, large production fluctuations and large parasitic (bondpad) capacitances. On the other hand, spiral inductors exhibit good matching and are therefore attractive for commonly used differential architectures. Furthermore, they permit a large range of inductances to be realized. However, they possess smaller Q values and are more difficult to model. In this dissertation, we develop a current sheet theory based on fundamental electromagnetic principles that yields simple, accurate inductance expressions for a variety of geometries, including planar spirals that are square, hexagonal, octagonal or circular. When compared to field solver simulations and measurements over a wide design space, these expressions exhibit typical errors of 2-3%, making them ideal for use in circuit synthesis and optimization. When combined with a commonly used lumped π model, these expressions allow the engineer to explore trade-offs quickly and easily. These current sheet based expressions eliminate the need for using segmented summation methods (such as the Greenhouse approach) to evaluate the inductance of spirals. Thus, the design and optimization of on-chip spiral inductors and transformers can now be performed in a standard circuit design environment (such as SPICE). Field solvers (which are difficult to integrate into a circuit design environment) are now only needed to verify the final design. Using these newly developed inductance expressions, this thesis explores how on-chip inductors should be optimized for various circuit applications. In particular, a new design methodology is presented for enhancing the bandwidth of

  17. Microcontroller based closed-loop control of a 2D quasi-static/resonant microscanner with on-chip piezo-resistive sensor feedback

    Science.gov (United States)

    Schroedter, Richard; Schwarzenberg, Markus; Dreyhaupt, André; Barth, Robert; Sandner, Thilo; Janschek, Klaus

    2017-02-01

    In this paper we present a 2D raster scanning quasi-static/resonant micro mirror being controlled in both axes in closed-loop with on-chip piezo-resistive sensor feedback. While the resonant axis oscillates with a given frequency, the quasi-static axis allows static as well as dynamic deflection up to its eigenfrequency because of its staggered vertical comb (SVC) drive arrangement. Due to the high quality factor of the very low damped spring-masssystem, an adapted trajectory planning using jerk limitation is applied for the quasi-static axis [1]. Nevertheless, inaccuracies of the applied nonlinear micro mirror model and external disturbances lead to undesired residual oscillation in open-loop control mode. To achieve high precise and fast beam positioning, we implement a flatness-based control algorithm with feedback to on-chip piezo-resistive deflection sensors. In comparison to previous work [2, 3], we developed a micro controller setup for driving the microscanner, that is equipped with an analog Bessel filter increasing the sensor signal quality significantly. In this study we demonstrate a small size and low power micro mirror driver including high-voltage generation and a microcontroller for real-time control as well as a head circuit board for high resolution sensing. We discuss experimental results of open-loop and closed-loop control for 2D raster scanning operation. Finally, the outlook is given to the intrinsic capability to compensate temperature drifts influencing the piezo-resistive sensor signal.

  18. Liquid-Cooled Garment

    Science.gov (United States)

    1977-01-01

    A liquid-cooled bra, offshoot of Apollo moon suit technology, aids the cancer-detection technique known as infrared thermography. Water flowing through tubes in the bra cools the skin surface to improve resolution of thermograph image.

  19. Liquid metal cooling in thermal management of computer chips

    Institute of Scientific and Technical Information of China (English)

    MA Kunquan; LIU Jing

    2007-01-01

    With the rapid improvement of computer performance,tremendous heat generation in the chip becomes a major serious concern for thermal management.Meanwhile,CPU chips are becoming smaller and smaller with almost no room for the heat to escape.The total power-dissipation levels now reside on the order of 100 W with a peak power density of 400-500 W/cm2,and are still steadily climbing.As a result,it is extremely hard to attain higher performance and reliability.Because the conventional conduction and forcedair convection techniques are becoming incapable in providing adequate cooling for sophisticated electronic systems,new solutions such as liquid cooling,thermoelectric cooling,heat pipes,vapor chambers,etc.are being studied.Recently,it was realized that using a liquid metal or its alloys with a low melting point as coolant could significantly lower the chip temperature.This new generation heat transfer enhancement method raised many important fundamentals and practical issues to be solved.To accommodate to the coming endeavor in this area,this paper is dedicated to presenting an overall review on chip cooling using liquid metals or their alloys as coolant.Much more attention will be paid to the thermal properties of liquid metals with low melting points or their alloys and their potential applications in the chip cooling.Meanwhile,principles of several typical pumping methods such as mechanical,electromagnetic or peristaltic pumps will be illustrated.Some new advancement in making a liquid metal cooling device will be discussed.The liquid metal cooling is expected to open a new world for computer chip cooling because of its evident merits over traditional coolant.

  20. Data center cooling system

    Energy Technology Data Exchange (ETDEWEB)

    Chainer, Timothy J; Dang, Hien P; Parida, Pritish R; Schultz, Mark D; Sharma, Arun

    2015-03-17

    A data center cooling system may include heat transfer equipment to cool a liquid coolant without vapor compression refrigeration, and the liquid coolant is used on a liquid cooled information technology equipment rack housed in the data center. The system may also include a controller-apparatus to regulate the liquid coolant flow to the liquid cooled information technology equipment rack through a range of liquid coolant flow values based upon information technology equipment temperature thresholds.

  1. A Universal Intelligent System-on-Chip Based Sensor Interface

    Directory of Open Access Journals (Sweden)

    Gabriele Ferri

    2010-08-01

    Full Text Available The need for real-time/reliable/low-maintenance distributed monitoring systems, e.g., wireless sensor networks, has been becoming more and more evident in many applications in the environmental, agro-alimentary, medical, and industrial fields. The growing interest in technologies related to sensors is an important indicator of these new needs. The design and the realization of complex and/or distributed monitoring systems is often difficult due to the multitude of different electronic interfaces presented by the sensors available on the market. To address these issues the authors propose the concept of a Universal Intelligent Sensor Interface (UISI, a new low-cost system based on a single commercial chip able to convert a generic transducer into an intelligent sensor with multiple standardized interfaces. The device presented offers a flexible analog and/or digital front-end, able to interface different transducer typologies (such as conditioned, unconditioned, resistive, current output, capacitive and digital transducers. The device also provides enhanced processing and storage capabilities, as well as a configurable multi-standard output interface (including plug-and-play interface based on IEEE 1451.3. In this work the general concept of UISI and the design of reconfigurable hardware are presented, together with experimental test results validating the proposed device.

  2. Stochastic cooling in RHIC

    Energy Technology Data Exchange (ETDEWEB)

    Brennan,J.M.; Blaskiewicz, M. M.; Severino, F.

    2009-05-04

    After the success of longitudinal stochastic cooling of bunched heavy ion beam in RHIC, transverse stochastic cooling in the vertical plane of Yellow ring was installed and is being commissioned with proton beam. This report presents the status of the effort and gives an estimate, based on simulation, of the RHIC luminosity with stochastic cooling in all planes.

  3. Alternating Current-Dielectrophoresis Collection and Chaining of Phytoplankton on Chip: Comparison of Individual Species and Artificial Communities

    Directory of Open Access Journals (Sweden)

    Coralie Siebman

    2017-01-01

    Full Text Available The capability of alternating current (AC dielectrophoresis (DEP for on-chip capture and chaining of the three species representative of freshwater phytoplankton was evaluated. The effects of the AC field intensity, frequency and duration on the chaining efficiency and chain lengths of green alga Chlamydomonas reinhardtii, cyanobacterium Synechocystis sp. and diatom Cyclotella meneghiniana were characterized systematically. C. reinhardtii showed an increase of the chaining efficiency from 100 Hz to 500 kHz at all field intensities; C. meneghiniana presented a decrease of chaining efficiency from 100 Hz to 1 kHz followed by a significant increase from 1 kHz to 500 kHz, while Synechocystis sp. exhibited low chaining tendency at all frequencies and all field intensities. The experimentally-determined DEP response and cell alignment of each microorganism were in agreement with their effective polarizability. Mixtures of cells in equal proportion or 10-times excess of Synechocystis sp. showed important differences in terms of chaining efficiency and length of the chains compared with the results obtained when the cells were alone in suspension. While a constant degree of chaining was observed with the mixture of C. reinhardtii and C. meneghiniana, the presence of Synechocystis sp. in each mixture suppressed the formation of chains for the two other phytoplankton species. All of these results prove the potential of DEP to discriminate different phytoplankton species depending on their effective polarizability and to enable their manipulation, such as specific collection or separation in freshwater.

  4. High-resolution, on-chip RF photonic signal processor using Brillouin gain shaping and RF interference.

    Science.gov (United States)

    Choudhary, Amol; Liu, Yang; Morrison, Blair; Vu, Khu; Choi, Duk-Yong; Ma, Pan; Madden, Stephen; Marpaung, David; Eggleton, Benjamin J

    2017-07-19

    Integrated microwave photonics has strongly emerged as a next-generation technology to address limitations of conventional RF electronics for wireless communications. High-resolution RF signal processing still remains a challenge due to limitations in technology that offer sub-GHz spectral resolution, in particular at high carrier frequencies. In this paper, we present an on-chip high-resolution RF signal processor, capable of providing high-suppression spectral filtering, large phase shifts and ns-scale time delays. This was achieved through tailoring of the Brillouin gain profiles using Stokes and anti-Stokes resonances combined with RF interferometry on a low-loss photonic chip with strong opto-acoustic interactions. Using an optical power of RF signals we demonstrate, almost an order of magnitude amplification in the phase and delay compared to devices purely based upon the slow-light effect of Brillouin scattering. This concept allows for versatile and power-efficient manipulation of the amplitude and phase of RF signals on a photonic chip for applications in wireless communications including software defined radios and beam forming.

  5. All-electronic droplet generation on-chip with real-time feedback control for EWOD digital microfluidics.

    Science.gov (United States)

    Gong, Jian; Kim, Chang-Jin C J

    2008-06-01

    Electrowetting-on-dielectric (EWOD) actuation enables digital (or droplet) microfluidics where small packets of liquids are manipulated on a two-dimensional surface. Due to its mechanical simplicity and low energy consumption, EWOD holds particular promise for portable systems. To improve volume precision of the droplets, which is desired for quantitative applications such as biochemical assays, existing practices would require near-perfect device fabrication and operation conditions unless the droplets are generated under feedback control by an extra pump setup off of the chip. In this paper, we develop an all-electronic (i.e., no ancillary pumping) real-time feedback control of on-chip droplet generation. A fast voltage modulation, capacitance sensing, and discrete-time PID feedback controller are integrated on the operating electronic board. A significant improvement is obtained in the droplet volume uniformity, compared with an open loop control as well as the previous feedback control employing an external pump. Furthermore, this new capability empowers users to prescribe the droplet volume even below the previously considered minimum, allowing, for example, 1 : x (x < 1) mixing, in comparison to the previously considered n : m mixing (i.e., n and m unit droplets).

  6. ALL-ELECTRONIC DROPLET GENERATION ON-CHIP WITH REAL-TIME FEEDBACK CONTROL FOR EWOD DIGITIAL MICROFLUIDICS

    Science.gov (United States)

    Gong, Jian; Kim, Chang-Jin “CJ”

    2009-01-01

    Electrowetting-on-dielectric (EWOD) actuation enables digital (or droplet) microfluidics where small packets of liquids are manipulated on a two-dimensional surface. Due to its mechanical simplicity and low energy consumption, EWOD holds particular promise for portable systems. To improve volume precision of the droplets, which is desired for quantitative applications such as biochemical assays, existing practices would require near-perfect device fabricaion and operation conditions unless the droplets are generated under feedback control by an extra pump setup off of the chip. In this paper, we develop an all-electronic (i.e., no ancillary pumping) real-time feedback control of on-chip droplet generation. A fast voltage modulation, capacitance sensing, and discrete-time PID feedback controller are integrated on the operating electronic board. A significant improvement is obtained in the droplet volume uniformity, compared with an open loop control as well as the previous feedback control employing an external pump. Furthermore, this new capability empowers users to prescribe the droplet volume even below the previously considered minimum, allowing, for example, 1:x (x < 1) mixing, in comparison to the previously considered n:m mixing (i.e., n and m unit droplets). PMID:18497909

  7. Capabilities for Strategic Adaptation

    DEFF Research Database (Denmark)

    Distel, Andreas Philipp

    This dissertation explores capabilities that enable firms to strategically adapt to environmental changes and preserve competitiveness over time – often referred to as dynamic capabilities. While dynamic capabilities being a popular research domain, too little is known about what these capabilities...... empirical studies through the dynamic capabilities lens and develops propositions for future research. The second paper is an empirical study on the origins of firm-level absorptive capacity; it explores how organization-level antecedents, through their impact on individual-level antecedents, influence...... firms’ ability to absorb and leverage new knowledge. The third paper is an empirical study which conceptualizes top managers’ resource cognition as a managerial capability underlying firms’ resource adaptation; it empirically examines the performance implications of this capability and organizational...

  8. On-chip continuous-variable quantum entanglement

    Science.gov (United States)

    Masada, Genta; Furusawa, Akira

    2016-09-01

    Entanglement is an essential feature of quantum theory and the core of the majority of quantum information science and technologies. Quantum computing is one of the most important fruits of quantum entanglement and requires not only a bipartite entangled state but also more complicated multipartite entanglement. In previous experimental works to demonstrate various entanglement-based quantum information processing, light has been extensively used. Experiments utilizing such a complicated state need highly complex optical circuits to propagate optical beams and a high level of spatial interference between different light beams to generate quantum entanglement or to efficiently perform balanced homodyne measurement. Current experiments have been performed in conventional free-space optics with large numbers of optical components and a relatively large-sized optical setup. Therefore, they are limited in stability and scalability. Integrated photonics offer new tools and additional capabilities for manipulating light in quantum information technology. Owing to integrated waveguide circuits, it is possible to stabilize and miniaturize complex optical circuits and achieve high interference of light beams. The integrated circuits have been firstly developed for discrete-variable systems and then applied to continuous-variable systems. In this article, we review the currently developed scheme for generation and verification of continuous-variable quantum entanglement such as Einstein-Podolsky-Rosen beams using a photonic chip where waveguide circuits are integrated. This includes balanced homodyne measurement of a squeezed state of light. As a simple example, we also review an experiment for generating discrete-variable quantum entanglement using integrated waveguide circuits.

  9. An Energy-Efficient High-Throughput Mesh-Based Photonic On-Chip Interconnect for Many-Core Systems

    OpenAIRE

    Achraf Ben Ahmed; Abderazek Ben Abdallah

    2016-01-01

    Future high-performance embedded and general purpose processors and systems-on-chip are expected to combine hundreds of cores integrated together to satisfy the power and performance requirements of large complex applications. As the number of cores continues to increase, the employment of low-power and high-throughput on-chip interconnect fabrics becomes imperative. In this work, we present a novel mesh-based photonic on-chip interconnect, named PHENIC-II, for future high-performance many-co...

  10. Laser cooling of solids

    OpenAIRE

    Nemova, Galina

    2009-01-01

    Parallel to advances in laser cooling of atoms and ions in dilute gas phase, which has progressed immensely, resulting in physics Nobel prizes in 1997 and 2001, major progress has recently been made in laser cooling of solids. I compare the physical nature of the laser cooling of atoms and ions with that of the laser cooling of solids. I point out all advantages of this new and very promising area of laser physics. Laser cooling of solids (optical refrigeration) at the present time can be lar...

  11. Thermoelectric Devices Cool, Power Electronics

    Science.gov (United States)

    2009-01-01

    Nextreme Thermal Solutions Inc., based in Research Triangle Park, North Carolina, licensed thermoelectric technology from NASA s Jet Propulsion Laboratory. This has allowed the company to develop cutting edge, thin-film thermoelectric coolers that effective remove heat generated by increasingly powerful and tightly packed microchip components. These solid-state coolers are ideal solutions for applications like microprocessors, laser diodes, LEDs, and even potentially for cooling the human body. Nextreme s NASA technology has also enabled the invention of thermoelectric generators capable of powering technologies like medical implants and wireless sensor networks.

  12. Fighting Fire with Fire: Superlattice Cooling of Silicon Hotspots to Reduce Global Cooling Requirements

    Energy Technology Data Exchange (ETDEWEB)

    Biswas, S; Tiwari, M; Sherwood, T; Theogarajan, L; Chong, F T

    2010-10-05

    The running costs of data centers are dominated by the need to dissipate heat generated by thousands of server machines. Higher temperatures are undesirable as they lead to premature silicon wear-out; in fact, mean time to failure has been shown to decrease exponentially with temperature (Black's law). Although other server components also generate heat, microprocessors still dominate in most server configurations and are also the most vulnerable to wearout as the feature sizes shrink. Even as processor complexity and technology scaling have increased the average energy density inside a processor to maximally tolerable levels, modern microprocessors make extensive use of hardware structures such as the load-store queue and other CAM-based units, and the peak temperatures on chip can be much worse than even the average temperature of the chip. In recent studies, it has been shown that hot-spots inside a processor can generate {approx} 800W/cm{sup 2} heat flux whereas the average heat flux is only 10-50W/cm{sup 2}, and due to this disparity in heat generation, the temperature in hot spots may be up to 30 C more than average chip temperature. The key problem processor hot-spots create is that in order to prevent some critical hardware structures from wearing out faster, the air conditioners in a data center have to be provisioned for worst case requirements. Worse yet, air conditioner efficiencies decrease exponentially as the desired ambient temperature decreases relative to the air outside. As a result, the global cooling costs in data centers, which nearly equals the IT equipment power consumption, are directly correlated with the maximum hot spot temperatures of processors, and there is a distinct requirement for a cooling technique to mitigate hot-spots selectively so that the global air conditioners can operate at higher, more efficient, temperatures. We observe that localized cooling via superlattice microrefrigeration presents exactly this opportunity

  13. Compact high-resolution micro-spectrometer on chip: spectral calibration and first spectrum

    Science.gov (United States)

    Diard, Thomas; de la Barrière, Florence; Ferrec, Yann; Guérineau, Nicolas; Rommeluère, Sylvain; Le Coarer, Etienne; Martin, Guillermo

    2016-05-01

    Compact and hand-held spectrometers may be very interesting for the measurement of spectral signatures of chemicals or objects. To achieve this goal, ONERA and IPAG have developed a new on chip Fourier Transform Spectrometer operating in the visible spectral range with a high spectral resolution (near 2 cm-1), named visible HR SPOC (visible High Resolution Spectrometer On Chip). It is directly inspired from the MICROSPOC infrared spectrometer, studied at ONERA in the past years. This spectrometer is made of a stair-step two-wave interferometer directly glued on a CMOS detector making it a very compact prototype. After calibrating the optical path difference, measurements of experimental spectra are presented.

  14. Lab-on-chip for liquid biopsy (LoC-LB) based on dielectrophoresis.

    Science.gov (United States)

    Mathew, Bobby; Alazzam, Anas; Khashan, Saud; Abutayeh, Mohammad

    2017-03-01

    This short communication presents the proof-of-concept of a novel dielectrophoretic lab-on-chip for identifying/separating circulating tumor cells for purposes of liquid biopsy. The device consists of a polydimethylsiloxane layer, containing a microchannel, bonded on a glass substrate that holds two sets of planar interdigitated transducer electrodes. The lab-on-chip is operated at a frequency that enables dielectrophoretic force to sort cells, based on type, along the lateral direction. The operating frequency ensures attraction force toward the electrodes on cancer cells and repulsion force toward the center of the microchannel on other cells. Initial tests for demonstrating proof-of-concept have successfully identified/separated green fluorescent protein-labelled MDA-MB-231 breast cancer cells from a mixture of the same and regular blood cells suspended in low conductivity sucrose/dextrose medium.

  15. Low latency on chip communication based on hybrid NOC Architecture using X-Y router

    Directory of Open Access Journals (Sweden)

    Tejas wini Deotare

    2014-05-01

    Full Text Available On-chip co mmunication has two different type of architecture which can be classified as Bus and mesh based Networks- on-Chip (No C. Each of them has diffe rent features and applications. In this paper, we construct the hybrid architecture with using bus and mesh NOC architecture. In the hybrid architecture, heavy communication affinity IPcores are placed in the same subsystem. and this large mesh No C get partitioned into several subsystems and one on one individual IPs, so that there is the reduction in the transmission latency of NoC.Efficient partition and mapping algorith m is proposed for reduction of the latency on the hybrid NOC arch itecture.It shows that an average latency improvement of 17.6% and more can be obtained when compared with the conventional mesh No C arch itecture.

  16. ASIC design of a digital fuzzy system on chip for medical diagnostic applications.

    Science.gov (United States)

    Roy Chowdhury, Shubhajit; Roy, Aniruddha; Saha, Hiranmay

    2011-04-01

    The paper presents the ASIC design of a digital fuzzy logic circuit for medical diagnostic applications. The system on chip under consideration uses fuzzifier, memory and defuzzifier for fuzzifying the patient data, storing the membership function values and defuzzifying the membership function values to get the output decision. The proposed circuit uses triangular trapezoidal membership functions for fuzzification patients' data. For minimizing the transistor count, the proposed circuit uses 3T XOR gates and 8T adders for its design. The entire work has been carried out using TSMC 0.35 µm CMOS process. Post layout TSPICE simulation of the whole circuit indicates a delay of 31.27 ns and the average power dissipation of the system on chip is 123.49 mW which indicates a less delay and less power dissipation than the comparable embedded systems reported earlier.

  17. An on-chip coupled resonator optical waveguide single-photon buffer.

    Science.gov (United States)

    Takesue, Hiroki; Matsuda, Nobuyuki; Kuramochi, Eiichi; Munro, William J; Notomi, Masaya

    2013-01-01

    Integrated quantum optical circuits are now seen as one of the most promising approaches with which to realize single-photon quantum information processing. Many of the core elements for such circuits have been realized, including sources, gates and detectors. However, a significant missing function necessary for photonic quantum information processing on-chip is a buffer, where single photons are stored for a short period of time to facilitate circuit synchronization. Here we report an on-chip single-photon buffer based on coupled resonator optical waveguides (CROW) consisting of 400 high-Q photonic crystal line-defect nanocavities. By using the CROW, a pulsed single photon is successfully buffered for 150 ps with 50-ps tunability while maintaining its non-classical properties. Furthermore, we show that our buffer preserves entanglement by storing and retrieving one photon from a time-bin entangled state. This is a significant step towards an all-optical integrated quantum information processor.

  18. An on-chip coupled resonator optical waveguide single-photon buffer

    CERN Document Server

    Takesue, Hiroki; Kuramochi, Eiichi; Munro, Willian J; Notomi, Masaya

    2013-01-01

    Integrated quantum optical circuits are now seen as one of the most promising approaches with which to realize single photon quantum information processing. Many of the core elements for such circuits have been realized including sources, gates and detectors. However, a significant missing function necessary for photonic information processing on-chip is a buffer, where single photons are stored for a short period of time to facilitate circuit synchronization. Here we report an on-chip single photon buffer based on coupled resonator optical waveguides (CROW) consisting of 400 high-Q photonic crystal line defect nanocavities. By using the CROW, a pulsed single photon was successfully buffered for 150 ps with 50-ps tunability while maintaining its non-classical properties. Furthermore, we showed that our buffer preserves entanglement by storing and retrieving one photon from a time-bin entangled state. This is a significant step towards an all-optical integrated quantum information processor.

  19. Core-shell magnetic nanoparticles for on-chip RF inductors

    KAUST Repository

    Koh, Kisik

    2013-01-01

    FeNi3 based core-shell magnetic nanoparticles are demonstrated as the magnetic core material for on-chip, radio frequency (RF) inductors. FeNi3 nanoparticles with 50-150 nm in diameter with 15-20 nm-thick SiO2 coating are chemically synthesized and deposited on a planar inductor as the magnetic core to enhance both inductance (L) and quality factor (Q) of the inductor. Experimentally, the ferromagnetic resonant frequency of the on-chip inductors based on FeNi3 core-shell nanoparticles has been shown to be over several GHz. A post-CMOS process has been developed to integrate the magnetic nanoparticles to a planar inductor and inductance enhancements up to 50% of the original magnitude with slightly enhanced Q-factor up to 1 GHz have been achieved. © 2013 IEEE.

  20. Optical chromatography using a photonic crystal fiber with on-chip fluorescence excitation.

    Science.gov (United States)

    Ashok, P C; Marchington, R F; Mthunzi, P; Krauss, T F; Dholakia, K

    2010-03-15

    We describe the realization of integrated optical chromatography, in conjunction with on-chip fluorescence excitation, in a monolithically fabricated poly-dimethylsiloxane (PDMS) microfluidic chip. The unique endlessly-single-mode guiding property of the Photonic Crystal Fiber (PCF) facilitates simultaneous on-chip delivery of beams to perform optical sorting in conjunction with fluorescence excitation. We use soft lithography to define the chip and insert the specially capped PCF into it through a predefined fiber channel that is intrinsically aligned with the sorting channel. We compare the performance of the system to a standard ray optics model and use the system to demonstrate both size-driven and refractive index-driven separations of colloids. Finally we demonstrate a new technique of enhanced optofluidic separation of biological particles, by sorting of human kidney embryonic cells (HEK-293), internally tagged with fluorescing microspheres through phagocytocis, from those without microspheres and the separation purity is monitored using fluorescence imaging.

  1. Nature-Inspired Interconnects for Self-Assembled Large-Scale Network-on-Chip Designs

    CERN Document Server

    Teuscher, Christof

    2007-01-01

    Future nano-scale electronics built up from an Avogadro number of components needs efficient, highly scalable, and robust means of communication in order to be competitive with traditional silicon approaches. In recent years, the Networks-on-Chip (NoC) paradigm emerged as a promising solution to interconnect challenges in silicon-based electronics. Current NoC architectures are either highly regular or fully customized, both of which represent implausible assumptions for emerging bottom-up self-assembled molecular electronics that are generally assumed to have a high degree of irregularity and imperfection. Here, we pragmatically and experimentally investigate important design trade-offs and properties of an irregular, abstract, yet physically plausible 3D small-world interconnect fabric that is inspired by modern network-on-chip paradigms. We vary the framework's key parameters, such as the connectivity, the number of switch nodes, the distribution of long- versus short-range connections, and measure the net...

  2. High Performance Hybrid Two Layer Router Architecture for FPGAs Using Network On Chip

    CERN Document Server

    Ezhumalai, P; Arun, C; Sakthivel, P; Sridharan, D

    2010-01-01

    Networks on Chip is a recent solution paradigm adopted to increase the performance of Multicore designs. The key idea is to interconnect various computation modules (IP cores) in a network fashion and transport packets simultaneously across them, thereby gaining performance. In addition to improving performance by having multiple packets in flight, NoCs also present a host of other advantages including scalability, power efficiency, and component reuse through modular design. This work focuses on design and development of high performance communication architectures for FPGAs using NoCs Once completely developed, the above methodology could be used to augment the current FPGA design flow for implementing multicore SoC applications. We design and implement an NoC framework for FPGAs, MultiClock OnChip Network for Reconfigurable Systems (MoCReS). We propose a novel microarchitecture for a hybrid two layer router that supports both packetswitched communications, across its local and directional ports, as well as...

  3. Modeling, analysis and optimization of network-on-chip communication architectures

    CERN Document Server

    Ogras, Umit Y

    2013-01-01

    Traditionally, design space exploration for Systems-on-Chip (SoCs) has focused on the computational aspects of the problem at hand. However, as the number of components on a single chip and their performance continue to increase, the communication architecture plays a major role in the area, performance and energy consumption of the overall system. As a result, a shift from computation-based to communication-based design becomes mandatory. Towards this end, network-on-chip (NoC) communication architectures have emerged recently as a promising alternative to classical bus and point-to-point communication architectures. This book explores outstanding research problems related to modeling, analysis and optimization of NoC communication architectures. More precisely, we present novel design methodologies, software tools and FPGA prototypes to aid the design of application-specific NoCs.

  4. A survey of research and practices of network-on-chip

    DEFF Research Database (Denmark)

    Bjerregaard, Tobias; Mahadevan, Shankar

    2006-01-01

    The scaling of microchip technologies has enabled large scale systems-on-chip (SoC). Network-on-chip (NoC) research addresses global communication in SoC, involving (i) a move from computation-centric to communication-centric design and (ii) the implementation of scalable communication structures....... This survey presents a perspective on existing NoC research. We define the following abstractions: system, network adapter, network, and link to explain and structure the fundamental concepts. First, research relating to the actual network design is reviewed. Then system level design and modeling...... are discussed. We also evaluate performance analysis techniques. The research shows that NoC constitutes a unification of current trends of intrachip communication rather than an explicit new alternative....

  5. The Distributed Network Processor: a novel off-chip and on-chip interconnection network architecture

    CERN Document Server

    Biagioni, Andrea; Lonardo, Alessandro; Paolucci, Pier Stanislao; Perra, Mersia; Rossetti, Davide; Sidore, Carlo; Simula, Francesco; Tosoratto, Laura; Vicini, Piero

    2012-01-01

    One of the most demanding challenges for the designers of parallel computing architectures is to deliver an efficient network infrastructure providing low latency, high bandwidth communications while preserving scalability. Besides off-chip communications between processors, recent multi-tile (i.e. multi-core) architectures face the challenge for an efficient on-chip interconnection network between processor's tiles. In this paper, we present a configurable and scalable architecture, based on our Distributed Network Processor (DNP) IP Library, targeting systems ranging from single MPSoCs to massive HPC platforms. The DNP provides inter-tile services for both on-chip and off-chip communications with a uniform RDMA style API, over a multi-dimensional direct network with a (possibly) hybrid topology.

  6. On-chip high-voltage generator design design methodology for charge pumps

    CERN Document Server

    Tanzawa, Toru

    2016-01-01

    This book provides various design techniques for switched-capacitor on-chip high-voltage generators, including charge pump circuits, regulators, level shifters, references, and oscillators.  Readers will see these techniques applied to system design in order to address the challenge of how the on-chip high-voltage generator is designed for Flash memories, LCD drivers, and other semiconductor devices to optimize the entire circuit area and power efficiency with a low voltage supply, while minimizing the cost.  This new edition includes a variety of useful updates, including coverage of power efficiency and comprehensive optimization methodologies for DC-DC voltage multipliers, modeling of extremely low voltage Dickson charge pumps, and modeling and optimum design of AC-DC switched-capacitor multipliers for energy harvesting and power transfer for RFID.

  7. Monitoring CO2 invasion processes at the pore scale using geological labs on chip.

    Science.gov (United States)

    Morais, S; Liu, N; Diouf, A; Bernard, D; Lecoutre, C; Garrabos, Y; Marre, S

    2016-09-21

    In order to investigate at the pore scale the mechanisms involved during CO2 injection in a water saturated pore network, a series of displacement experiments is reported using high pressure micromodels (geological labs on chip - GLoCs) working under real geological conditions (25 < T (°C) < 75 and 4.5 < p (MPa) < 8). The experiments were focused on the influence of three experimental parameters: (i) the p, T conditions, (ii) the injection flow rates and (iii) the pore network characteristics. By using on-chip optical characterization and imaging approaches, the CO2 saturation curves as a function of either time or the number of pore volume injected were determined. Three main mechanisms were observed during CO2 injection, namely, invasion, percolation and drying, which are discussed in this paper. Interestingly, besides conventional mechanisms, two counterintuitive situations were observed during the invasion and drying processes.

  8. Pattern manipulation via on-chip phase modulation between orbital angular momentum beams

    Energy Technology Data Exchange (ETDEWEB)

    Li, Huanlu [Department of Electrical and Electronic Engineering, University of Bristol, University Walk, Bristol BS8 1TR (United Kingdom); School of Engineering, University of Glasgow, Rankine Building, Oakfield Avenue, Glasgow G12 8LP (United Kingdom); Strain, Michael J. [School of Engineering, University of Glasgow, Rankine Building, Oakfield Avenue, Glasgow G12 8LP (United Kingdom); Wolfson Centre, Institute of Photonics, University of Strathclyde, 106 Rottenrow East, Glasgow G4 0NW (United Kingdom); Meriggi, Laura; Sorel, Marc [School of Engineering, University of Glasgow, Rankine Building, Oakfield Avenue, Glasgow G12 8LP (United Kingdom); Chen, Lifeng; Zhu, Jiangbo; Cicek, Kenan [Department of Electrical and Electronic Engineering, University of Bristol, University Walk, Bristol BS8 1TR (United Kingdom); Wang, Jianwei; Thompson, Mark G. [Centre for Quantum Photonics, H. H. Wills Physics Laboratory and Department of Electrical and Electronic Engineering, University of Bristol, Bristol BS8 1UB (United Kingdom); Cai, Xinlun, E-mail: caixlun5@mail.sysu.edu.cn [Centre for Quantum Photonics, H. H. Wills Physics Laboratory and Department of Electrical and Electronic Engineering, University of Bristol, Bristol BS8 1UB (United Kingdom); State Key Laboratory of Optoelectronic Materials and Technologies and School of Physics and Engineering, Sun Yat-sen University, Guangzhou 510275 (China); Yu, Siyuan, E-mail: s.yu@bristol.ac.uk [Department of Electrical and Electronic Engineering, University of Bristol, University Walk, Bristol BS8 1TR (United Kingdom); State Key Laboratory of Optoelectronic Materials and Technologies and School of Physics and Engineering, Sun Yat-sen University, Guangzhou 510275 (China)

    2015-08-03

    An integrated approach to thermal modulation of relative phase between two optical vortices with opposite chirality has been demonstrated on a silicon-on-insulator substrate. The device consists of a silicon-integrated optical vortex emitter and a phase controlled 3 dB coupler. The relative phase between two optical vortices can be actively modulated on chip by applying a voltage on the integrated heater. The phase shift is shown to be linearly proportional to applied electrical power, and the rotation angle of the interference pattern is observed to be inversely proportional to topological charge. This scheme can be used in lab-on-chip, communications and sensing applications. It can be intentionally implemented with other modulation elements to achieve more complicated applications.

  9. A CDMA Based Scalable Hierarchical Architecture for Network-On-Chip

    Directory of Open Access Journals (Sweden)

    Mohamed A. Abd El Ghany

    2012-09-01

    Full Text Available A Scalable hierarchical architecture based Code-Division Multiple Access (CDMA is proposed for high performance Network-on-Chip (NoC. This hierarchical architecture provides the integration of a large number of IPs in a single on-chip system. The network encoding and decoding schemes for CDMA transmission are provided. The proposed CDMA NoC architecture is compared to the conventional architecture in terms of latency, area and power dissipation. The overall area required to implement the proposed CDMA NoC design is reduced by 24.2%. The design decreases the latency of the network by 40%. The total power consumption required to achieve the proposed design is also decreased by 25%.

  10. On-chip interference of single photons from an embedded quantum dot and an external laser

    Energy Technology Data Exchange (ETDEWEB)

    Prtljaga, N., E-mail: n.prtljaga@sheffield.ac.uk; Bentham, C.; O' Hara, J.; Royall, B.; Wilson, L. R.; Skolnick, M. S.; Fox, A. M. [Department of Physics and Astronomy, University of Sheffield, Sheffield S3 7RH (United Kingdom); Clarke, E. [Department of Electronic and Electrical Engineering, University of Sheffield, Sheffield S1 3JD (United Kingdom)

    2016-06-20

    In this work, we demonstrate the on-chip two-photon interference between single photons emitted by a single self-assembled InGaAs quantum dot and an external laser. The quantum dot is embedded within one arm of an air-clad directional coupler which acts as a beam-splitter for incoming light. Photons originating from an attenuated external laser are coupled to the second arm of the beam-splitter and then combined with the quantum dot photons, giving rise to two-photon quantum interference between dissimilar sources. We verify the occurrence of on-chip Hong-Ou-Mandel interference by cross-correlating the optical signal from the separate output ports of the directional coupler. This experimental approach allows us to use a classical light source (laser) to assess in a single step the overall device performance in the quantum regime and probe quantum dot photon indistinguishability on application realistic time scales.

  11. Buffer planning for application-specific networks-on-chip design

    Institute of Scientific and Technical Information of China (English)

    YIN ShouYi; LIU LeiBo; WEI ShaoJun

    2009-01-01

    Networks-on-chip (NoC) is a promising communication architecture for next generation SoC. The size of buffer used In on-chip routers impacts the silicon area and power consumption of NoC dominantly. It is important to plan the total buffer-size and each muter buffer-allocation carefully for an efficient NoC design. In this paper, we propose two buffer planning algorithms for application-specific NoC design. More precisely, given the traffic parameters and performance constraints of target application, the proposed algorithms automatically determine minimal buffer budget and assign the buffer depth for each input channel in different routers. The experimental results show that the proposed algorithms can significantly reduce total buffer usage and guarantee the performance requirements.

  12. Circuit Design of On-Chip BP Learning Neural Network with Programmable Neuron Characteristics

    Institute of Scientific and Technical Information of China (English)

    卢纯; 石秉学; 陈卢

    2000-01-01

    A circuit system of on chip BP(Back-Propagation) learning neural network with pro grammable neurons has been designed,which comprises a feedforward network,an error backpropagation network and a weight updating circuit. It has the merits of simplicity,programmability, speedness,low power-consumption and high density. A novel neuron circuit with pro grammable parameters has been proposed. It generates not only the sigmoidal function but also its derivative. HSPICE simulations are done to a neuron circuit with level 47 transistor models as a standard 1.2tμm CMOS process. The results show that both functions are matched with their respec ive ideal functions very well. The non-linear partition problem is used to verify the operation of the network. The simulation result shows the superior performance of this BP neural network with on-chip learning.

  13. Debugging systems-on-chip communication-centric and abstraction-based techniques

    CERN Document Server

    Vermeulen, Bart

    2014-01-01

    This book describes an approach and supporting infrastructure to facilitate debugging the silicon implementation of a System-on-Chip (SOC), allowing its associated product to be introduced into the market more quickly.  Readers learn step-by-step the key requirements for debugging a modern, silicon SOC implementation, nine factors that complicate this debugging task, and a new debug approach that addresses these requirements and complicating factors.  The authors’ novel communication-centric, scan-based, abstraction-based, run/stop-based (CSAR) debug approach is discussed in detail, showing how it helps to meet debug requirements and address the nine, previously identified factors that complicate debugging silicon implementations of SOCs. The authors also derive the debug infrastructure requirements to support debugging of a silicon implementation of an SOC with their CSAR debug approach. This debug infrastructure consists of a generic on-chip debug architecture, a configurable automated design-for-debug ...

  14. Ant colony optimization approach for test scheduling of system on chip

    Institute of Scientific and Technical Information of China (English)

    CHEN Ling; PAN Zhong-liang

    2009-01-01

    It is necessary to perform the test of system on chip, the test scheduling determines the test start and finishing time of every core in the system on chip such that the overall test time is minimized. A new test scheduling approach based on chaotic ant colony algorithm is presented in this paper. The optimization model of test scheduling was studied, the model uses the information such as the scale of test sets of both cores and user defined logic. An approach based on chaotic ant colony algorithm was proposed to solve the optimization model of test scheduling. The test of signal integrity faults such as crosstalk were also investigated when performing the test scheduling. Experimental results on many circuits show that the proposed approach can be used to solve test scheduling problems.

  15. On-Chip Test Infrastructure Design for Optimal Multi-Site Testing of System Chips

    CERN Document Server

    Goel, Sandeep Kumar

    2011-01-01

    Multi-site testing is a popular and effective way to increase test throughput and reduce test costs. We present a test throughput model, in which we focus on wafer testing, and consider parameters like test time, index time, abort-on-fail, and contact yield. Conventional multi-site testing requires sufficient ATE resources, such as ATE channels, to allow to test multiple SOCs in parallel. In this paper, we design and optimize on-chip DfT, in order to maximize the test throughput for a given SOC and ATE. The on-chip DfT consists of an E-RPCT wrapper, and, for modular SOCs, module wrappers and TAMs. We present experimental results for a Philips SOC and several ITC'02 SOC Test Benchmarks.

  16. Sequential and selective localized optical heating in water via on-chip dielectric nanopatterning.

    Science.gov (United States)

    Morsy, Ahmed M; Biswas, Roshni; Povinelli, Michelle L

    2017-07-24

    We study the use of nanopatterned silicon membranes to obtain optically-induced heating in water. We show that by varying the detuning between an absorptive optical resonance of the patterned membrane and an illumination laser, both the magnitude and response time of the temperature rise can be controlled. This allows for either sequential or selective heating of different patterned areas on chip. We obtain a steady-state temperature of approximately 100 °C for a 805.5nm CW laser power density of 66 µW/μm(2) and observe microbubble formation. The ability to spatially and temporally control temperature on the microscale should enable the study of heat-induced effects in a variety of chemical and biological lab-on-chip applications.

  17. Building Service Provider Capabilities

    DEFF Research Database (Denmark)

    Brandl, Kristin; Jaura, Manya; Ørberg Jensen, Peter D.

    In this paper we study whether and how the interaction between clients and the service providers contributes to the development of capabilities in service provider firms. In situations where such a contribution occurs, we analyze how different types of activities in the production process...... of the services, such as sequential or reciprocal task activities, influence the development of different types of capabilities. We study five cases of offshore-outsourced knowledge-intensive business services that are distinguished according to their reciprocal or sequential task activities in their production...... process. We find that clients influence the development of human capital capabilities and management capabilities in reciprocally produced services. While in sequential produced services clients influence the development of organizational capital capabilities and management capital capabilities....

  18. Developing Alliance Capabilities

    DEFF Research Database (Denmark)

    Heimeriks, Koen H.; Duysters, Geert; Vanhaverbeke, Wim

    capability. However, empirical testing in this field is scarce and little is known as to what extent different learning mechanisms are indeed useful in advancing a firm's alliance capability. This paper analyzes to what extent intra-firm learning mechanisms help firms develop their alliance capability......This paper assesses the differential performance effects of learning mechanisms on the development of alliance capabilities. Prior research has suggested that different capability levels could be identified in which specific intra-firm learning mechanisms are used to enhance a firm's alliance....... Differential learning may explain in what way firms yield superior returns from their alliances in comparison to competitors. The empirical results show that different learning mechanisms have different performance effects at different stages of the alliance capability development process. The main lesson from...

  19. A Complete Multi-Processor System-on-Chip FPGA-Based Emulation Framework

    OpenAIRE

    Valle, Del; Pablo, G.; Atienza, David; Magan, Ivan; Flores, Javier G.; Perez, Esther A.; Mendias, Jose M.; Benini, Luca; De Micheli, Giovanni

    2006-01-01

    With the growing complexity in consumer embedded products and the improvements in process technology, Multi-Processor System-On-Chip (MPSoC) architectures have become widespread. These new systems are very complex to design as they must execute multiple complex real-time applications (e.g. video processing, or videogames), while meeting several additional design constraints (e.g. energy consumption or time-to-market). Therefore, mechanisms to efficiently explore the different possible HW-SW d...

  20. Multifunctional System-on-Glass for Lab-on-Chip applications.

    Science.gov (United States)

    Petrucci, G; Caputo, D; Lovecchio, N; Costantini, F; Legnini, I; Bozzoni, I; Nascetti, A; de Cesare, G

    2017-07-15

    Lab-on-Chip are miniaturized systems able to perform biomolecular analysis in shorter time and with lower reagent consumption than a standard laboratory. Their miniaturization interferes with the multiple functions that the biochemical procedures require. In order to address this issue, our paper presents, for the first time, the integration on a single glass substrate of different thin film technologies in order to develop a multifunctional platform suitable for on-chip thermal treatments and on-chip detection of biomolecules. The proposed System on-Glass hosts thin metal films acting as heating sources; hydrogenated amorphous silicon diodes acting both as temperature sensors to monitor the temperature distribution and photosensors for the on-chip detection and a ground plane ensuring that the heater operation does not affect the photodiode currents. The sequence of the technological steps, the deposition temperatures of the thin films and the parameters of the photolithographic processes have been optimized in order to overcome all the issues of the technological integration. The device has been designed, fabricated and tested for the implementation of DNA amplification through the Polymerase Chain Reaction (PCR) with thermal cycling among three different temperatures on a single site. The glass has been connected to an electronic system that drives the heaters and controls the temperature and light sensors. It has been optically and thermally coupled with another glass hosting a microfluidic network made in polydimethylsiloxane that includes thermally actuated microvalves and a PCR process chamber. The successful DNA amplification has been verified off-chip by using a standard fluorometer.

  1. Thermodynamics and efficiency of an autonomous on-chip Maxwell’s demon

    OpenAIRE

    Aki Kutvonen; Jonne Koski; Tapio Ala-Nissila

    2016-01-01

    In his famous letter in 1870, Maxwell describes how Joule's law can be violated only by the intelligent action of a mere guiding agent later coined as Maxwell's demon by Lord Kelvin. In this letter we study thermodynamics of information using an experimentally feasible Maxwell's demon setup based a single electron transistor capacitively coupled to a single electron box, where both the system and the Demon can be clearly identified. Such an engineered on-chip Demon measures and performes feed...

  2. Direct quantification of transendothelial electrical resistance in organs-on-chips.

    Science.gov (United States)

    van der Helm, Marinke W; Odijk, Mathieu; Frimat, Jean-Philippe; van der Meer, Andries D; Eijkel, Jan C T; van den Berg, Albert; Segerink, Loes I

    2016-11-15

    Measuring transendothelial or transepithelial electrical resistance (TEER) is a widely used method to monitor cellular barrier tightness in organs-on-chips. Unfortunately, integrated electrodes close to the cellular barrier hamper visual inspection of the cells or require specialized cleanroom processes to fabricate see-through electrodes. Out-of-view electrodes inserted into the chip's outlets are influenced by the fluid-filled microchannels with relatively high resistance. In this case, small changes in temperature or medium composition strongly affect the apparent TEER. To solve this, we propose a simple and universally applicable method to directly determine the TEER in microfluidic organs-on-chips without the need for integrated electrodes close to the cellular barrier. Using four electrodes inserted into two channels - two on each side of the porous membrane - and six different measurement configurations we can directly derive the isolated TEER independent of channel properties. We show that this method removes large variation of non-biological origin in chips filled with culture medium. Furthermore, we demonstrate the use of our method by quantifying the TEER of a monolayer of human hCMEC/D3 cerebral endothelial cells, mimicking the blood-brain barrier inside our microfluidic organ-on-chip device. We found stable TEER values of 22 Ω cm(2)±1.3 Ω cm(2) (average ± standard error of the mean of 4 chips), comparable to other TEER values reported for hCMEC/D3 cells in well-established Transwell systems. In conclusion, we demonstrate a simple and robust way to directly determine TEER that is applicable to any organ-on-chip device with two channels separated by a membrane. This enables stable and easily applicable TEER measurements without the need for specialized cleanroom processes and with visibility on the measured cell layer.

  3. Titanium nitride based hybrid plasmonic-photonic waveguides for on-chip plasmonic interconnects

    Science.gov (United States)

    Dutta, A.; Saha, S.; Kinsey, N.; Guler, U.; Shalaev, V. M.; Boltasseva, A.

    2017-02-01

    Over the past few decades, photonic technologies have emerged as a promising technology for data communications. They offer advantages such as high data bandwidths at comparable or even lower power consumption than electronics. However, photonic integrated circuits suffer from the diffraction limit of light which is a major obstacle in achieving small device footprints and densely packed on-chip interconnects. In recent years, plasmonics has emerged as a possible solution for densely packed on-chip nanophotonic circuitry. The field of plasmonics deals with oscillations of free electrons in a metal coupled to an electromagnetic field. The large wave-vector associated with these oscillations enables light to be localized in volumes much smaller than the diffraction limit. Consequently, there have been many demonstrations of plasmonic interconnects for on-chip communications, using well known metals such as gold and silver. However these materials are not CMOS compatible and hence their use is not technologically feasible. The growing need for plasmonic materials which are robust, cost-effective, and CMOS-compatible has led to the study of alternate plasmonic materials. For the visible and near infrared ranges, transition metal nitrides have been shown to be suitable metals for plasmonic applications These materials have optical properties comparable to that of gold and are CMOS-compatible, hence, they can be easily integrated into a silicon platform for on-chip applications. In this work, we demonstrate titanium nitride based plasmonic interconnects in an all-solid state geometry which can be easily integrated on a silicon platform.

  4. An integrated lab-on-chip for rapid identification and simultaneous differentiation of tropical pathogens.

    Directory of Open Access Journals (Sweden)

    Jeslin J L Tan

    Full Text Available Tropical pathogens often cause febrile illnesses in humans and are responsible for considerable morbidity and mortality. The similarities in clinical symptoms provoked by these pathogens make diagnosis difficult. Thus, early, rapid and accurate diagnosis will be crucial in patient management and in the control of these diseases. In this study, a microfluidic lab-on-chip integrating multiplex molecular amplification and DNA microarray hybridization was developed for simultaneous detection and species differentiation of 26 globally important tropical pathogens. The analytical performance of the lab-on-chip for each pathogen ranged from 102 to 103 DNA or RNA copies. Assay performance was further verified with human whole blood spiked with Plasmodium falciparum and Chikungunya virus that yielded a range of detection from 200 to 4×105 parasites, and from 250 to 4×107 PFU respectively. This lab-on-chip was subsequently assessed and evaluated using 170 retrospective patient specimens in Singapore and Thailand. The lab-on-chip had a detection sensitivity of 83.1% and a specificity of 100% for P. falciparum; a sensitivity of 91.3% and a specificity of 99.3% for P. vivax; a positive 90.0% agreement and a specificity of 100% for Chikungunya virus; and a positive 85.0% agreement and a specificity of 100% for Dengue virus serotype 3 with reference methods conducted on the samples. Results suggested the practicality of an amplification microarray-based approach in a field setting for high-throughput detection and identification of tropical pathogens.

  5. Performance Analysis and Implementationof Predictable Streaming Applications onMultiprocessor Systems-on-Chip

    OpenAIRE

    2010-01-01

    Driven by the increasing capacity of integrated circuits, multiprocessorsystems-on-chip (MPSoCs) are widely used in modern consumer electron-ics devices. In this thesis, the performance analysis and implementationmethodologies are explored to design predictable streaming applications onMPSoCs computing platforms. The application functionality and concur-rency are described in synchronous data flow (SDF) computational models,and two state-of-the-art architecture templates are adopted as multip...

  6. An Integrated Lab-on-Chip for Rapid Identification and Simultaneous Differentiation of Tropical Pathogens

    Science.gov (United States)

    Sato, Mitsuharu; Watthanaworawit, Wanitda; Ling, Clare L.; Mauduit, Marjorie; Malleret, Benoît; Grüner, Anne-Charlotte; Tan, Rosemary; Nosten, François H.; Snounou, Georges; Rénia, Laurent; Ng, Lisa F. P.

    2014-01-01

    Tropical pathogens often cause febrile illnesses in humans and are responsible for considerable morbidity and mortality. The similarities in clinical symptoms provoked by these pathogens make diagnosis difficult. Thus, early, rapid and accurate diagnosis will be crucial in patient management and in the control of these diseases. In this study, a microfluidic lab-on-chip integrating multiplex molecular amplification and DNA microarray hybridization was developed for simultaneous detection and species differentiation of 26 globally important tropical pathogens. The analytical performance of the lab-on-chip for each pathogen ranged from 102 to 103 DNA or RNA copies. Assay performance was further verified with human whole blood spiked with Plasmodium falciparum and Chikungunya virus that yielded a range of detection from 200 to 4×105 parasites, and from 250 to 4×107 PFU respectively. This lab-on-chip was subsequently assessed and evaluated using 170 retrospective patient specimens in Singapore and Thailand. The lab-on-chip had a detection sensitivity of 83.1% and a specificity of 100% for P. falciparum; a sensitivity of 91.3% and a specificity of 99.3% for P. vivax; a positive 90.0% agreement and a specificity of 100% for Chikungunya virus; and a positive 85.0% agreement and a specificity of 100% for Dengue virus serotype 3 with reference methods conducted on the samples. Results suggested the practicality of an amplification microarray-based approach in a field setting for high-throughput detection and identification of tropical pathogens. PMID:25078474

  7. Microfluidics-Based Lab-on-Chip Systems in DNA-Based Biosensing: An Overview

    OpenAIRE

    Sabo Wada Dutse; Nor Azah Yusof

    2011-01-01

    Microfluidics-based lab-on-chip (LOC) systems are an active research area that is revolutionising high-throughput sequencing for the fast, sensitive and accurate detection of a variety of pathogens. LOCs also serve as portable diagnostic tools. The devices provide optimum control of nanolitre volumes of fluids and integrate various bioassay operations that allow the devices to rapidly sense pathogenic threat agents for environmental monitoring. LOC systems, such as microfluidic biochips, offe...

  8. Novel microfluidic platform for automated lab-on-chip testing of hypercoagulability panel.

    Science.gov (United States)

    Emani, Sirisha; Sista, Ramakrishna; Loyola, Hugo; Trenor, Cameron C; Pamula, Vamsee K; Emani, Sitaram M

    2012-12-01

    Current methods for hypercoagulability panel testing require large blood volumes and long turn-around testing times. A novel microfluidic platform has been designed to perform automated multiplexed hypercoagulability panel testing at near patient, utilizing only a single droplet of blood sample. We test the hypothesis that this novel platform could be utilized to perform specific multiplexed ELISA-based hypercoagulability panel testing for antithrombin III, protein C, protein S and factor VIII antigens, as well as anticardiolipin/human anti-β2-glycoprotein-1 IgG antibodies--on blood samples. Sandwich ELISA was modified by utilizing magnetic beads coated with specific antibodies as the solid phase using fluorescence readout. Percentage recovery was calculated using four-parameter logistic curves. On-chip ELISA with single factors was compared with multiplex factor ELISA for known concentrations of sample. Blood samples were analyzed on-chip and compared with traditional bench-top assays. Time for multiplexed performance of hypercoagulability panel ELISA on-chip with controls is 72 min. Recovery rates (range 80-120%) for known concentrations of specific factors was not significantly different when assays were performed using a single factor vs. multiplex factor analysis. Assay results were not significantly different between individual assays performed either on bench-top or on-chip with patient blood and/or plasma. Utilizing a novel digital microfluidic platform, we demonstrate the feasibility of automated hypercoagulability panel testing on small volume of plasma and whole blood patient samples with high fidelity. Further investigation is required to test the application of this novel technology at point-of-care clinical settings.

  9. Two-Dimensional Programmable Manipulation of Magnetic Nanoparticles on-Chip

    DEFF Research Database (Denmark)

    Sarella, Anandakumar; Torti, Andrea; Donolato, Marco

    2014-01-01

    A novel device is designed for on-chip selective trap and two-dimensional remote manipulation of single and multiple fluid-borne magnetic particles using field controlled magnetic domain walls in circular nanostructures. The combination of different ring-shaped nanostructures and field sequences...... allows for remote manipulation of magnetic particles with high-precision along any arbitrary pathway on a chip surface....

  10. Design of a Virtual Component Neutral Network-on-Chip Transaction Layer

    CERN Document Server

    Martin, Philippe

    2011-01-01

    Research studies have demonstrated the feasibility and advantages of Network-on-Chip (NoC) over traditional bus-based architectures but have not focused on compatibility communication standards. This paper describes a number of issues faced when designing a VC-neutral NoC, i.e. compatible with standards such as AHB 2.0, AXI, VCI, OCP, and various other proprietary protocols, and how a layered approach to communication helps solve these issues.

  11. Single-event upset (SEU) in a DRAM with on-chip error correction

    Science.gov (United States)

    Zoutendyk, J. A.; Schwartz, H. R.; Watson, R. K.; Hasnain, Z.; Nevile, L. R.

    1987-01-01

    Results are given of SEU measurements on 256K dynamic RAMs with on-chip error correction. They are claimed to be the first ever reported. A (12/8) Hamming error-correcting code was incorporated in the layout. Physical separation of the bits in each code word was used to guard against multiple bits being disrupted in any given word. Significant reduction in observed errors is reported.

  12. On-chip sub-terahertz surface plasmon polariton transmission lines with mode converter in CMOS

    Science.gov (United States)

    Liang, Yuan; Yu, Hao; Wen, Jincai; Apriyana, Anak Agung Alit; Li, Nan; Luo, Yu; Sun, Lingling

    2016-01-01

    An on-chip low-loss and high conversion efficiency plasmonic waveguide converter is demonstrated at sub-THz in CMOS. By introducing a subwavelength periodic corrugated structure onto the transmission line (T-line) implemented by a top-layer metal, surface plasmon polaritons (SPP) are established to propagate signals with strongly localized surface-wave. To match both impedance and momentum of other on-chip components with TEM-wave propagation, a mode converter structure featured by a smooth bridge between the Ground coplanar waveguide (GCPW) with 50 Ω impedance and SPP T-line is proposed. To further reduce area, the converter is ultimately simplified to a gradual increment of groove with smooth gradient. The proposed SPP T-lines with the converter is designed and fabricated in the standard 65 nm CMOS process. Both near-field simulation and measurement results show excellent conversion efficiency from quasi-TEM to SPP modes in a broadband frequency range. The converter achieves wideband impedance matching (<−9 dB) with excellent transmission efficiency (averagely −1.9 dB) from 110 GHz–325 GHz. The demonstrated compact and wideband SPP T-lines with mode converter have shown great potentials to replace existing waveguides as future on-chip THz interconnects. To the best of the author’s knowledge, this is the first time to demonstrate the (sub)-THz surface mode conversion on-chip in CMOS technology. PMID:27444782

  13. Legal Protection on IP Cores for System-on-Chip Designs

    Science.gov (United States)

    Kinoshita, Takahiko

    The current semiconductor industry has shifted from vertical integrated model to horizontal specialization model in term of integrated circuit manufacturing. In this circumstance, IP cores as solutions for System-on-Chip (SoC) have become increasingly important for semiconductor business. This paper examines to what extent IP cores of SoC effectively can be protected by current intellectual property system including integrated circuit layout design law, patent law, design law, copyright law and unfair competition prevention act.

  14. On-chip mid-infrared gas detection using chalcogenide glass waveguide

    Science.gov (United States)

    Han, Z.; Lin, P.; Singh, V.; Kimerling, L.; Hu, J.; Richardson, K.; Agarwal, A.; Tan, D. T. H.

    2016-04-01

    We demonstrate an on-chip sensor for room-temperature detection of methane gas using a broadband spiral chalcogenide glass waveguide coupled with off-chip laser and detector. The waveguide is fabricated using UV lithography patterning and lift-off after thermal evaporation. We measure the intensity change due to the presence and concentration of methane gas in the mid-infrared (MIR) range. This work provides an approach for broadband planar MIR gas sensing.

  15. CLOSED FORM MODELING OF CROSSTALK FOR DISTRIBUTED RLCG ON-CHIP INTERCONNECTS USING DIFFERENCE MODEL APPROACH

    OpenAIRE

    Rajib Kar; Vikas Maheshwari; Md. Maqbool; A. K. Mal; Bhattacharjee, A.K.

    2010-01-01

    On chip interconnect plays a dominant role on the circuit performance in both analog and digital domains. Interconnects can no longer be treated as mere delays or lumped RC networks. Crosstalk, ringing and reflections are just some of the issues that need to be addressed for the efficient design of high speed VLSI circuits. In order to accurately model these high frequency effects, inductance had been taken into consideration. Within this frequency range, the most accurate simulation model fo...

  16. Design and simulation of on-chip lossy transmission line pairs

    OpenAIRE

    Demeester, Thomas; De Zutter, Daniël

    2008-01-01

    A quasi-TM reciprocity based multi-conductor transmission line model is used to investigate the influence of the geometry on the performance of on-chip transmission line pairs for high-frequency differential signal transmission. It is shown that both the knowledge of the fundamental transmission line modes and of the internal impedance of both connected circuits, are essential for a good design.

  17. On-Chip Manipulation of Protein-Coated Magnetic Beads via Domain-Wall Conduits

    DEFF Research Database (Denmark)

    Donolato, Marco; Vavassori, Paolo; Gobbi, Marco;

    2010-01-01

    Geometrically constrained magnetic domain walls (DWs) in magnetic nanowires can be manipulated at the nanometer scale. The inhomogeneous magnetic stray field generated by a DW can capture a magnetic nanoparticle in solution. On-chip nanomanipulation of individual magnetic beads coated with proteins...... is demonstrated through the motion of geometrically constrained DWs in specially designed magnetic nanoconduits fully integrated in a lab-on-a-chip platform....

  18. Improved cooling design for high power waveguide system

    Science.gov (United States)

    Chen, W. C. J.; Hartop, R.

    1981-06-01

    Testing of X band high power components in a traveling wave resonator indicates that this improved cooling design reduces temperature in the waveguide and flange. The waveguide power handling capability and power transmission reliability is increased substantially.

  19. Cooling power of transverse thermoelectrics for cryogenic cooling

    Science.gov (United States)

    Tang, Yang; Ma, Ming; Grayson, M.

    2016-05-01

    Transverse Peltier coolers have been experimentally and theoretically studied since 1960s due to their capability of achieving cooling in a single-leg geometry. Recently proposed pxn-type transverse thermoelectrics reveal the possibility of intrinsic or undoped transverse coolers that can, in principle, function at cryogenic temperatures, which has drawn more attention to the performance of such transverse coolers. However, unlike longitudinal thermoelectrics, the equations for transverse thermoelectrics cannot be solved analytically. In this study, we therefore calculate the thermoelectric transport in transverse coolers numerically, and introduce a normalized notation, which reduces the independent parameters in the governing equations to a normalized electric field E* and a hot-side transverse figure of merit zTh, only. A numerical study of the maximum cooling temperature difference and cooling power reveals the superior performance of transverse thermoelectric coolers compared to longitudinal coolers with the same figure of merit, providing another motivation in the search for new transverse thermoelectric materials with large figure of merit.

  20. Dynamic Capabilities and Performance

    DEFF Research Database (Denmark)

    Wilden, Ralf; Gudergan, Siegfried P.; Nielsen, Bo Bernhard

    2013-01-01

    Dynamic capabilities are widely considered to incorporate those processes that enable organizations to sustain superior performance over time. In this paper, we argue theoretically and demonstrate empirically that these effects are contingent on organizational structure and the competitive...... are contingent on the competitive intensity faced by firms. Our findings demonstrate the performance effects of internal alignment between organizational structure and dynamic capabilities, as well as the external fit of dynamic capabilities with competitive intensity. We outline the advantages of PLS...

  1. CO2 cooling for HEP experiments

    CERN Document Server

    Verlaat; Van Lysebetten, A

    2008-01-01

    The new generation silicon detectors require more efficient cooling of the front-end electronics and the silicon sensors themselves. To minimize reverse annealing of the silicon sensors the cooling temperatures need to be reduced. Other important requirements of the new generation cooling systems are a reduced mass and a maintenance free operation of the hardware inside the detector. Evaporative CO2 cooling systems are ideal for this purpose as they need smaller tubes than conventional systems. The heat transfer capability of evaporative CO2 is high. CO2 is used as cooling fluid for the LHCb-VELO and the AMS-Tracker cooling systems. A special method for the fluid circulation is developed at Nikhef to get a very stable temperature of both detectors without any active components like valves or heaters inside. This method is called 2-phase Accumulator Controlled Loop (2PACL) and is a good candidate technology for the design of the future cooling systems for the Atlas and CMS upgrades.

  2. Flex: RSRE's capability computer

    Science.gov (United States)

    Foster, J. M.

    The Flex capability based computer architecture is described. It supports a multilanguage environment, and compilers for ALGOL 168 and PASCAL exist; an Ada compiler is being completed. The idea of capabilities is used on backing store as well as main store, so that all kinds of structured object which can be held in main store can also be held on any of the packing stores with the same degree of protection. Capabilities are used across a network of Flex computers, so that capabilities for data in one machine may be passed to and held in another. Flex uses true procedure values in the sense of Landin (1964).

  3. Integrated Process Capability Analysis

    Institute of Scientific and Technical Information of China (English)

    Chen; H; T; Huang; M; L; Hung; Y; H; Chen; K; S

    2002-01-01

    Process Capability Analysis (PCA) is a powerful too l to assess the ability of a process for manufacturing product that meets specific ations. The larger process capability index implies the higher process yield, a nd the larger process capability index also indicates the lower process expected loss. Chen et al. (2001) has applied indices C pu, C pl, and C pk for evaluating the process capability for a multi-process product wi th smaller-the-better, larger-the-better, and nominal-the-best spec...

  4. Design of a CMOS integrated on-chip oscilloscope for spin wave characterization

    Science.gov (United States)

    Egel, Eugen; Meier, Christian; Csaba, György; Breitkreutz-von Gamm, Stephan

    2017-05-01

    Spin waves can perform some optically-inspired computing algorithms, e.g. the Fourier transform, directly than it is done with the CMOS logic. This article describes a new approach for on-chip characterization of spin wave based devices. The readout circuitry for the spin waves is simulated with 65-nm CMOS technology models. Commonly used circuits for Radio Frequency (RF) receivers are implemented to detect a sinusoidal ultra-wideband (5-50 GHz) signal with an amplitude of at least 15 μV picked up by a loop antenna. First, the RF signal is amplified by a Low Noise Amplifier (LNA). Then, it is down-converted by a mixer to Intermediate Frequency (IF). Finally, an Operational Amplifier (OpAmp) brings the IF signal to higher voltages (50-300 mV). The estimated power consumption and the required area of the readout circuit is approximately 55.5 mW and 0.168 mm2, respectively. The proposed On-Chip Oscilloscope (OCO) is highly suitable for on-chip spin wave characterization regarding the frequency, amplitude change and phase information. It offers an integrated low power alternative to current spin wave detecting systems.

  5. Technologies for autonomous integrated lab-on-chip systems for space missions

    Science.gov (United States)

    Nascetti, A.; Caputo, D.; Scipinotti, R.; de Cesare, G.

    2016-11-01

    Lab-on-chip devices are ideal candidates for use in space missions where experiment automation, system compactness, limited weight and low sample and reagent consumption are required. Currently, however, most microfluidic systems require external desktop instrumentation to operate and interrogate the chip, thus strongly limiting their use as stand-alone systems. In order to overcome the above-mentioned limitations our research group is currently working on the design and fabrication of "true" lab-on-chip systems that integrate in a single device all the analytical steps from the sample preparation to the detection without the need for bulky external components such as pumps, syringes, radiation sources or optical detection systems. Three critical points can be identified to achieve 'true' lab-on-chip devices: sample handling, analytical detection and signal transduction. For each critical point, feasible solutions are presented and evaluated. Proposed microfluidic actuation and control is based on electrowetting on dielectrics, autonomous capillary networks and active valves. Analytical detection based on highly specific chemiluminescent reactions is used to avoid external radiation sources. Finally, the integration on the same chip of thin film sensors based on hydrogenated amorphous silicon is discussed showing practical results achieved in different sensing tasks.

  6. Integrated lab-on-chip biosensing systems based on magnetic particle actuation--a comprehensive review.

    Science.gov (United States)

    van Reenen, Alexander; de Jong, Arthur M; den Toonder, Jaap M J; Prins, Menno W J

    2014-06-21

    The demand for easy to use and cost effective medical technologies inspires scientists to develop innovative lab-on-chip technologies for point-of-care in vitro diagnostic testing. To fulfill medical needs, the tests should be rapid, sensitive, quantitative, and miniaturizable, and need to integrate all steps from sample-in to result-out. Here, we review the use of magnetic particles actuated by magnetic fields to perform the different process steps that are required for integrated lab-on-chip diagnostic assays. We discuss the use of magnetic particles to mix fluids, to capture specific analytes, to concentrate analytes, to transfer analytes from one solution to another, to label analytes, to perform stringency and washing steps, and to probe biophysical properties of the analytes, distinguishing methodologies with fluid flow and without fluid flow (stationary microfluidics). Our review focuses on efforts to combine and integrate different magnetically actuated assay steps, with the vision that it will become possible in the future to realize integrated lab-on-chip biosensing assays in which all assay process steps are controlled and optimized by magnetic forces.

  7. Blood cleaner on-chip design for artificial human kidney manipulation

    Directory of Open Access Journals (Sweden)

    Suwanpayak N

    2011-05-01

    Full Text Available N Suwanpayak1, MA Jalil2, MS Aziz3, FD Ismail3, J Ali3, PP Yupapin11Nanoscale Science and Engineering Research Alliance (N'SERA, Advanced Research Center for Photonics, Faculty of Science, King Mongkut's Institute of Technology, Ladkrabang, Bangkok, Thailand; 2Ibnu Sina Institute of Fundamental Science Studies (IIS, 3Institute of Advanced Photonics Science, Nanotechnology Research Alliance, Universiti Teknologi Malaysia, Johor Bahru, MalaysiaAbstract: A novel design of a blood cleaner on-chip using an optical waveguide known as a PANDA ring resonator is proposed. By controlling some suitable parameters, the optical vortices (gradient optical fields/wells can be generated and used to form the trapping tools in the same way as optical tweezers. In operation, the trapping force is formed by the combination between the gradient field and scattering photons by using the intense optical vortices generated within the PANDA ring resonator. This can be used for blood waste trapping and moves dynamically within the blood cleaner on-chip system (artificial kidney, and is performed within the wavelength routers. Finally, the blood quality test is exploited by the external probe before sending to the destination. The advantage of the proposed kidney on-chip system is that the unwanted substances can be trapped and filtered from the artificial kidney, which can be available for blood cleaning applications.Keywords: optical trapping, blood dialysis, blood cleaner, human kidney manipulation

  8. Low Latency Network-on-Chip Router Microarchitecture Using Request Masking Technique

    Directory of Open Access Journals (Sweden)

    Alireza Monemi

    2015-01-01

    Full Text Available Network-on-Chip (NoC is fast emerging as an on-chip communication alternative for many-core System-on-Chips (SoCs. However, designing a high performance low latency NoC with low area overhead has remained a challenge. In this paper, we present a two-clock-cycle latency NoC microarchitecture. An efficient request masking technique is proposed to combine virtual channel (VC allocation with switch allocation nonspeculatively. Our proposed NoC architecture is optimized in terms of area overhead, operating frequency, and quality-of-service (QoS. We evaluate our NoC against CONNECT, an open source low latency NoC design targeted for field-programmable gate array (FPGA. The experimental results on several FPGA devices show that our NoC router outperforms CONNECT with 50% reduction of logic cells (LCs utilization, while it works with 100% and 35%~20% higher operating frequency compared to the one- and two-clock-cycle latency CONNECT NoC routers, respectively. Moreover, the proposed NoC router achieves 2.3 times better performance compared to CONNECT.

  9. Simulation study of microstrip line in on-chip THz system

    Science.gov (United States)

    Zhang, Cong; Su, Bo; Fan, Ning; Zhang, Cunlin

    2016-11-01

    Waveguides, which can transmit high frequency electromagnetic waves, have a lot of types, such as microstrip line (MSL), coplanar waveguides (CPW), coplanar-strip-line (CPS) and so forth. In the waveguides mentioned above, CPW has the advantages of easy fabrication and superior performance. Meanwhile MSL also has many advantages such as small size, light weight and high spectral resolution, but it also shows a higher attenuation and dispersion compared with the free-space waveguides. So in on-chip terahertz system, CPW and MSL was used as waveguides to transmit terahertz waves and the HFSS software was used to simulate and analyze the transmission characteristics of the MSL and CPW based on the on-chip system researched by University of Leeds (America) and Hiroshima University (Japan). The simulation results show that the scattering parameters of the two waveguides are similar to the known literatures. Meanwhile we also have designed a new structure of MSL which is applicable for our on-chip system.

  10. Capture and On-chip analysis of Melanoma Cells Using Tunable Surface Shear forces

    Science.gov (United States)

    Tsao, Simon Chang-Hao; Vaidyanathan, Ramanathan; Dey, Shuvashis; Carrascosa, Laura G.; Christophi, Christopher; Cebon, Jonathan; Shiddiky, Muhammad J. A.; Behren, Andreas; Trau, Matt

    2016-01-01

    With new systemic therapies becoming available for metastatic melanoma such as BRAF and PD-1 inhibitors, there is an increasing demand for methods to assist with treatment selection and response monitoring. Quantification and characterisation of circulating melanoma cells (CMCs) has been regarded as an excellent non-invasive candidate but a sensitive and efficient tool to do these is lacking. Herein we demonstrate a microfluidic approach for melanoma cell capture and subsequent on-chip evaluation of BRAF mutation status. Our approach utilizes a recently discovered alternating current electrohydrodynamic (AC-EHD)-induced surface shear forces, referred to as nanoshearing. A key feature of nanoshearing is the ability to agitate fluid to encourage contact with surface-bound antibody for the cell capture whilst removing nonspecific cells from the surface. By adjusting the AC-EHD force to match the binding affinity of antibodies against the melanoma-associated chondroitin sulphate proteoglycan (MCSP), a commonly expressed melanoma antigen, this platform achieved an average recovery of 84.7% from biological samples. Subsequent staining with anti-BRAFV600E specific antibody enabled on-chip evaluation of BRAFV600E mutation status in melanoma cells. We believe that the ability of nanoshearing-based capture to enumerate melanoma cells and subsequent on-chip characterisation has the potential as a rapid screening tool while making treatment decisions.

  11. Manually operatable on-chip bistable pneumatic microstructures for microfluidic manipulations.

    Science.gov (United States)

    Chen, Arnold; Pan, Tingrui

    2014-09-07

    Bistable microvalves are of particular interest because of their distinct nature of requiring energy consumption only during the transition between the open and closed states. This characteristic can be highly advantageous in reducing the number of external inputs and the complexity of control circuitries since microfluidic devices as contemporary lab-on-a-chip platforms are transferring from research settings to low-resource environments with high integrability and a small form factor. In this paper, we first present manually operatable, on-chip bistable pneumatic microstructures (BPMs) for microfluidic manipulation. The structural design and operation of the BPM devices can be readily integrated into any pneumatically powered microfluidic network consisting of pneumatic and fluidic channels. It is mainly composed of a vacuum activation chamber (VAC) and a pressure release chamber (PRC), of which users have direct control through finger pressing to switch either to the bistable vacuum state (VS) or the atmospheric state (AS). We have integrated multiple BPM devices into a 4-to-1 microfluidic multiplexor to demonstrate on-chip digital flow switching from different sources. Furthermore, we have shown its clinical relevance in a point-of-care diagnostic chip that processes blood samples to identify the distinct blood types (A/B/O) on-chip.

  12. Monolithically Integrated Microelectromechanical Systems for On-Chip Strain Engineering of Quantum Dots.

    Science.gov (United States)

    Zhang, Yang; Chen, Yan; Mietschke, Michael; Zhang, Long; Yuan, Feifei; Abel, Stefan; Hühne, Ruben; Nielsch, Kornelius; Fompeyrine, Jean; Ding, Fei; Schmidt, Oliver G

    2016-09-14

    Elastic strain fields based on single crystal piezoelectric elements represent an effective way for engineering the quantum dot (QD) emission with unrivaled precision and technological relevance. However, pioneering researches in this direction were mainly based on bulk piezoelectric substrates, which prevent the development of chip-scale devices. Here, we present a monolithically integrated Microelectromechanical systems (MEMS) device with great potential for on-chip quantum photonic applications. High-quality epitaxial PMN-PT thin films have been grown on SrTiO3 buffered Si and show excellent piezoelectric responses. Dense arrays of MEMS with small footprints are then fabricated based on these films, forming an on-chip strain tuning platform. After transferring the QD-containing nanomembranes onto these MEMS, the nonclassical emissions (e.g., single photons) from single QDs can be engineered by the strain fields. We envision that the strain tunable QD sources on the individually addressable and monolithically integrated MEMS pave the way toward complex quantum photonic applications on chip.

  13. On-chip passive three-port circuit of all-optical ordered-route transmission

    Science.gov (United States)

    Liu, Li; Dong, Jianji; Gao, Dingshan; Zheng, Aoling; Zhang, Xinliang

    2015-05-01

    On-chip photonic circuits of different specific functions are highly desirable and becoming significant demands in all-optical communication network. Especially, the function to control the transmission directions of the optical signals in integrated circuits is a fundamental research. Previous schemes, such as on-chip optical circulators, are mostly realized by Faraday effect which suffers from material incompatibilities between semiconductors and magneto-optical materials. Achieving highly functional circuits in which light circulates in a particular direction with satisfied performances are still difficult in pure silicon photonics platform. Here, we propose and experimentally demonstrate a three-port passive device supporting optical ordered-route transmission based on silicon thermo-optic effect for the first time. By injecting strong power from only one port, the light could transmit through the three ports in a strict order (1→2, 2→3, 3→1) while be blocked in the opposite order (1→3, 3→2, 2→1). The blocking extinction ratios and operation bandwidths have been investigated in this paper. Moreover, with compact size, economic fabrication process and great extensibility, this proposed photonic integrated circuit is competitive to be applied in on-chip all-optical information processing systems, such as path priority selector.

  14. Design of a Wideband Antenna for Wireless Network-On-Chip in Multimedia Applications

    Directory of Open Access Journals (Sweden)

    Fernando Gutierrez

    2017-03-01

    Full Text Available To allow fast communication—at several Gb/s—of multimedia content among processors and memories in a multi-processor system-on-chip, a new approach is emerging in literature: Wireless Network-on-Chip (WiNoC. With reference to this scenario, this paper presents the design of the key element of the WiNoC: the antenna. Specifically, a bow-tie antenna is proposed, which operates at mm-waves and can be implemented on-chip using the top metal layer of a conventional silicon CMOS (Complementary Metal Oxide Semiconductor technology. The antenna performance is discussed in the paper and is compared to the state-of-the-art, including the zig-zag antenna topology that is typically used in literature as a reference for WiNoC. The proposed bow-tie antenna design for WiNoC stands out for its good trade-off among bandwidth, gain, size and beamwidth vs. the state-of-the-art.

  15. AREA-EFFICIENT DESIGN OF SCHEDULER FOR ROUTING NODE OF NETWORK-ON-CHIP

    Directory of Open Access Journals (Sweden)

    Rehan Maroof

    2011-09-01

    Full Text Available Traditional System-on-Chip (SoC design employed shared buses for data transfer among various subsystems. As So Cs become more complex involving a larger number of subsystems, traditional bus based architecture is giving way to a new paradigm for on-chip communication. This paradigm is called Network-on-Chip (NoC. A communication network of point-to-point links and routing switches is used to facilitate communication between subsystems. The routing switch proposed in this paper consists of four components, namely the input ports, output ports, switching fabric, and scheduler. The scheduler design is described in this paper. The function of the scheduler is to arbitrate between requests by data packets for use of the switching fabric. The scheduler uses an improved round robin based arbitration algorithm. Due to the symmetric structure of the scheduler, an area-efficient design is proposed by folding the scheduler onto itself, thereby reducing its area roughly by 50%.

  16. On-chip lysis of mammalian cells through a handheld corona device.

    Science.gov (United States)

    Escobedo, C; Bürgel, S C; Kemmerling, S; Sauter, N; Braun, T; Hierlemann, A

    2015-07-21

    On-chip lysis is required in many lab-on-chip applications involving cell studies. In these applications, the complete disruption of the cellular membrane and a high lysis yield is essential. Here, we present a novel approach to lyse cells on-chip through the application of electric discharges from a corona handheld device. The method only requires a microfluidic chip and a low-cost corona device. We demonstrate the effective lysis of BHK and eGFP HCT 116 cells in the sub-second time range using an embedded microelectrode. We also show cell lysis of non-adherent K562 leukemia cells without the use of an electrode in the chip. Cell lysis has been assessed through the use of bright-field microscopy, high-speed imaging and cell-viability fluorescence probes. The experimental results show effective cell lysis without any bubble formation or significant heating. Due to the simplicity of both the components involved and the lysis procedure, this technique offers an inexpensive lysis option with the potential for integration into lab-on-a-chip devices.

  17. On-chip steering of entangled photons in nonlinear photonic crystals.

    Science.gov (United States)

    Leng, H Y; Yu, X Q; Gong, Y X; Xu, P; Xie, Z D; Jin, H; Zhang, C; Zhu, S N

    2011-08-16

    One promising technique for working toward practical photonic quantum technologies is to implement multiple operations on a monolithic chip, thereby improving stability, scalability and miniaturization. The on-chip spatial control of entangled photons will certainly benefit numerous applications, including quantum imaging, quantum lithography, quantum metrology and quantum computation. However, external optical elements are usually required to spatially control the entangled photons. Here we present the first experimental demonstration of on-chip spatial control of entangled photons, based on a domain-engineered nonlinear photonic crystal. We manipulate the entangled photons using the inherent properties of the crystal during the parametric downconversion, demonstrating two-photon focusing and beam-splitting from a periodically poled lithium tantalate crystal with a parabolic phase profile. These experimental results indicate that versatile and precise spatial control of entangled photons is achievable. Because they may be operated independent of any bulk optical elements, domain-engineered nonlinear photonic crystals may prove to be a valuable ingredient in on-chip integrated quantum optics.

  18. Designing a WISHBONE Protocol Network Adapter for an Asynchronous Network-on-Chip

    CERN Document Server

    Soliman, Ahmed H M; El-Bably, M; Keshk, Hesham M A M

    2012-01-01

    The Scaling of microchip technologies, from micron to submicron and now to deep sub-micron (DSM) range, has enabled large scale systems-on-chip (SoC). In future deep submicron (DSM) designs, the interconnect effect will definitely dominate performance. Network-on-Chip (NoC) has become a promising solution to bus-based communication infrastructure limitations. NoC designs usually targets Application Specific Integrated Circuits (ASICs), however, the fabrication process costs a lot. Implementing a NoC on an FPGA does not only reduce the cost but also decreases programming and verification cycles. In this paper, an Asynchronous NoC has been implemented on a SPARTAN-3E\\textregistered device. The NoC supports basic transactions of both widely used on-chip interconnection standards, the Open Core Protocol (OCP) and the WISHBONE Protocol. Although, FPGA devices are synchronous in nature, it has been shown that they can be used to prototype a Global Asynchronous Local Synchronous (GALS) systems, comprising an Asynchr...

  19. Increased space-bandwidth product in pixel super-resolved lensfree on-chip microscopy

    Science.gov (United States)

    Greenbaum, Alon; Luo, Wei; Khademhosseinieh, Bahar; Su, Ting-Wei; Coskun, Ahmet F.; Ozcan, Aydogan

    2013-04-01

    Pixel-size limitation of lensfree on-chip microscopy can be circumvented by utilizing pixel-super-resolution techniques to synthesize a smaller effective pixel, improving the resolution. Here we report that by using the two-dimensional pixel-function of an image sensor-array as an input to lensfree image reconstruction, pixel-super-resolution can improve the numerical aperture of the reconstructed image by ~3 fold compared to a raw lensfree image. This improvement was confirmed using two different sensor-arrays that significantly vary in their pixel-sizes, circuit architectures and digital/optical readout mechanisms, empirically pointing to roughly the same space-bandwidth improvement factor regardless of the sensor-array employed in our set-up. Furthermore, such a pixel-count increase also renders our on-chip microscope into a Giga-pixel imager, where an effective pixel count of ~1.6-2.5 billion can be obtained with different sensors. Finally, using an ultra-violet light-emitting-diode, this platform resolves 225 nm grating lines and can be useful for wide-field on-chip imaging of nano-scale objects, e.g., multi-walled-carbon-nanotubes.

  20. Design of a CMOS integrated on-chip oscilloscope for spin wave characterization

    Directory of Open Access Journals (Sweden)

    Eugen Egel

    2017-05-01

    Full Text Available Spin waves can perform some optically-inspired computing algorithms, e.g. the Fourier transform, directly than it is done with the CMOS logic. This article describes a new approach for on-chip characterization of spin wave based devices. The readout circuitry for the spin waves is simulated with 65-nm CMOS technology models. Commonly used circuits for Radio Frequency (RF receivers are implemented to detect a sinusoidal ultra-wideband (5-50 GHz signal with an amplitude of at least 15 μV picked up by a loop antenna. First, the RF signal is amplified by a Low Noise Amplifier (LNA. Then, it is down-converted by a mixer to Intermediate Frequency (IF. Finally, an Operational Amplifier (OpAmp brings the IF signal to higher voltages (50-300 mV. The estimated power consumption and the required area of the readout circuit is approximately 55.5 mW and 0.168 mm2, respectively. The proposed On-Chip Oscilloscope (OCO is highly suitable for on-chip spin wave characterization regarding the frequency, amplitude change and phase information. It offers an integrated low power alternative to current spin wave detecting systems.

  1. Applying Partial Power-Gating to Direction-Sliced Network-on-Chip

    Directory of Open Access Journals (Sweden)

    Feng Wang

    2015-01-01

    Full Text Available Network-on-Chip (NoC is one of critical communication architectures for future many-core systems. As technology is continually scaling down, on-chip network meets the increasing leakage power crisis. As a leakage power mitigation technique, power-gating can be utilized in on-chip network to solve the crisis. However, the network performance is severely affected by the disconnection in the conventional power-gated NoC. In this paper, we propose a novel partial power-gating approach to improve the performance in the power-gated NoC. The approach mainly involves a direction-slicing scheme, an improved routing algorithm, and a deadlock recovery mechanism. In the synthetic traffic simulation, the proposed design shows favorable power-efficiency at low-load range and achieves better performance than the conventional power-gated one. For the application trace simulation, the design in the mesh/torus network consumes 15.2%/18.9% more power on average, whereas it can averagely obtain 45.0%/28.7% performance improvement compared with the conventional power-gated design. On balance, the proposed design with partial power-gating has a better tradeoff between performance and power-efficiency.

  2. Laser Light-field Fusion for Wide-field Lensfree On-chip Phase Contrast Microscopy of Nanoparticles

    Science.gov (United States)

    Kazemzadeh, Farnoud; Wong, Alexander

    2016-12-01

    Wide-field lensfree on-chip microscopy, which leverages holography principles to capture interferometric light-field encodings without lenses, is an emerging imaging modality with widespread interest given the large field-of-view compared to lens-based techniques. In this study, we introduce the idea of laser light-field fusion for lensfree on-chip phase contrast microscopy for detecting nanoparticles, where interferometric laser light-field encodings acquired using a lensfree, on-chip setup with laser pulsations at different wavelengths are fused to produce marker-free phase contrast images of particles at the nanometer scale. As a proof of concept, we demonstrate, for the first time, a wide-field lensfree on-chip instrument successfully detecting 300 nm particles across a large field-of-view of ~30 mm2 without any specialized or intricate sample preparation, or the use of synthetic aperture- or shift-based techniques.

  3. Dynamic On-Chip micro Temperature and Flow Sensor for miniaturized lab-on-a-chip instruments Project

    Data.gov (United States)

    National Aeronautics and Space Administration — The purpose of this project is to design, fabricate, and characterize a Dynamic On-Chip Flow and Temperature Sensor (DOCFlaTS) to mature and enable miniaturized...

  4. Arbitrary photonic wave plate operations on chip: realizing Hadamard, Pauli-X, and rotation gates for polarisation qubits

    National Research Council Canada - National Science Library

    Heilmann, René; Gräfe, Markus; Nolte, Stefan; Szameit, Alexander

    2014-01-01

    .... In our work we close this gap and present Hadamard, Pauli-X, and rotation gates of high fidelity for photonic polarisation qubits on chip by employing a reorientation of the optical axis of birefringent waveguides...

  5. Invited Article: Electrically tunable silicon-based on-chip microdisk resonator for integrated microwave photonic applications

    National Research Council Canada - National Science Library

    Zhang, Weifeng; Yao, Jianping

    2016-01-01

    ... difference in realizing on-chip integration of photonic systems. A microdisk resonator (MDR) with a strong capacity in trapping and storing photons is a versatile element in photonic integrated circuits...

  6. Stochastic cooling in RHIC

    Energy Technology Data Exchange (ETDEWEB)

    Brennan J. M.; Blaskiewicz, M.; Mernick, K.

    2012-05-20

    The full 6-dimensional [x,x'; y,y'; z,z'] stochastic cooling system for RHIC was completed and operational for the FY12 Uranium-Uranium collider run. Cooling enhances the integrated luminosity of the Uranium collisions by a factor of 5, primarily by reducing the transverse emittances but also by cooling in the longitudinal plane to preserve the bunch length. The components have been deployed incrementally over the past several runs, beginning with longitudinal cooling, then cooling in the vertical planes but multiplexed between the Yellow and Blue rings, next cooling both rings simultaneously in vertical (the horizontal plane was cooled by betatron coupling), and now simultaneous horizontal cooling has been commissioned. The system operated between 5 and 9 GHz and with 3 x 10{sup 8} Uranium ions per bunch and produces a cooling half-time of approximately 20 minutes. The ultimate emittance is determined by the balance between cooling and emittance growth from Intra-Beam Scattering. Specific details of the apparatus and mathematical techniques for calculating its performance have been published elsewhere. Here we report on: the method of operation, results with beam, and comparison of results to simulations.

  7. RF Calibration of On-Chip DfT Chain by DC Stimuli and Statistical Multivariate Regression Technique

    OpenAIRE

    Ramzan, Rashad; Dabrowski, Jerzy

    2015-01-01

    The problem of parameter variability in RF and analog circuits is escalating with CMOS scaling. Consequently every RF chip produced in nano-meter CMOS technologies needs to be tested. On-chip Design for Testability (DfT) features, which are meant to reduce test time and cost also suffer from parameter variability. Therefore, RF calibration of all on-chip test structures is mandatory. In this paper, Artificial Neural Networks (ANN) are employed as a multivariate regression technique to archite...

  8. An Evaluation of an Integrated On-Chip/Off-Chip Network for High-Performance Reconfigurable Computing

    OpenAIRE

    Andrew G. Schmidt; Kritikos, William V.; Shanyuan Gao; Ron Sass

    2012-01-01

    As the number of cores per discrete integrated circuit (IC) device grows, the importance of the network on chip (NoC) increases. However, the body of research in this area has focused on discrete IC devices alone which may or may not serve the high-performance computing community which needs to assemble many of these devices into very large scale, parallel computing machines. This paper describes an integrated on-chip/off-chip network that has been implemented on an a...

  9. On-chip wavelength switch based on thermally tunable discrete four-wave mixing in a silicon waveguide

    DEFF Research Database (Denmark)

    Pu, Minhao; Chen, Yaohui; Hu, Hao

    2014-01-01

    An on-chip wavelength switch is proposed based on discrete four-wave mixing in a silicon waveguide. Switching operation can be realized by thermal tuning the waveguide dispersion. We also discuss optimal dimension design concerning device performances.......An on-chip wavelength switch is proposed based on discrete four-wave mixing in a silicon waveguide. Switching operation can be realized by thermal tuning the waveguide dispersion. We also discuss optimal dimension design concerning device performances....

  10. Telematics Options and Capabilities

    Energy Technology Data Exchange (ETDEWEB)

    Hodge, Cabell [National Renewable Energy Laboratory (NREL), Golden, CO (United States)

    2017-09-05

    This presentation describes the data tracking and analytical capabilities of telematics devices. Federal fleet managers can use the systems to keep their drivers safe, maintain a fuel efficient fleet, ease their reporting burden, and save money. The presentation includes an example of how much these capabilities can save fleets.

  11. Nanofabrication for On-Chip Optical Levitation, Atom-Trapping, and Superconducting Quantum Circuits

    Science.gov (United States)

    Norte, Richard Alexander

    Researchers have spent decades refining and improving their methods for fabricating smaller, finer-tuned, higher-quality nanoscale optical elements with the goal of making more sensitive and accurate measurements of the world around them using optics. Quantum optics has been a well-established tool of choice in making these increasingly sensitive measurements which have repeatedly pushed the limits on the accuracy of measurement set forth by quantum mechanics. A recent development in quantum optics has been a creative integration of robust, high-quality, and well-established macroscopic experimental systems with highly-engineerable on-chip nanoscale oscillators fabricated in cleanrooms. However, merging large systems with nanoscale oscillators often require them to have extremely high aspect-ratios, which make them extremely delicate and difficult to fabricate with an experimentally reasonable repeatability, yield and high quality. In this work we give an overview of our research, which focused on microscopic oscillators which are coupled with macroscopic optical cavities towards the goal of cooling them to their motional ground state in room temperature environments. The quality factor of a mechanical resonator is an important figure of merit for various sensing applications and observing quantum behavior. We demonstrated a technique for pushing the quality factor of a micromechanical resonator beyond conventional material and fabrication limits by using an optical field to stiffen and trap a particular motional mode of a nanoscale oscillator. Optical forces increase the oscillation frequency by storing most of the mechanical energy in a nearly loss-less optical potential, thereby strongly diluting the effects of material dissipation. By placing a 130 nm thick SiO2 pendulum in an optical standing wave, we achieve an increase in the pendulum center-of-mass frequency from 6.2 to 145 kHz. The corresponding quality factor increases 50-fold from its intrinsic value to

  12. Radiant Floor Cooling Systems

    DEFF Research Database (Denmark)

    Olesen, Bjarne W.

    2008-01-01

    In many countries, hydronic radiant floor systems are widely used for heating all types of buildings such as residential, churches, gymnasiums, hospitals, hangars, storage buildings, industrial buildings, and smaller offices. However, few systems are used for cooling.This article describes a floor...... cooling system that includes such considerations as thermal comfort of the occupants, which design parameters will influence the cooling capacity and how the system should be controlled. Examples of applications are presented....

  13. Initial Cooling Experiment (ICE)

    CERN Multimedia

    Photographic Service

    1978-01-01

    In 1977, in a record-time of 9 months, the magnets of the g-2 experiment were modified and used to build a proton/antiproton storage ring: the "Initial Cooling Experiment" (ICE). It served for the verification of the cooling methods to be used for the "Antiproton Project". Stochastic cooling was proven the same year, electron cooling followed later. Also, with ICE the experimental lower limit for the antiproton lifetime was raised by 9 orders of magnitude: from 2 microseconds to 32 hours. For its previous life as g-2 storage ring, see 7405430. More on ICE: 7711282, 7809081, 7908242.

  14. High energy electron cooling

    Energy Technology Data Exchange (ETDEWEB)

    Parkhomchuk, V. [Budker Institute of Nuclear Physics, Novosibirsk (Russian Federation)

    1997-09-01

    High energy electron cooling requires a very cold electron beam. The questions of using electron cooling with and without a magnetic field are presented for discussion at this workshop. The electron cooling method was suggested by G. Budker in the middle sixties. The original idea of the electron cooling was published in 1966. The design activities for the NAP-M project was started in November 1971 and the first run using a proton beam occurred in September 1973. The first experiment with both electron and proton beams was started in May 1974. In this experiment good result was achieved very close to theoretical prediction for a usual two component plasma heat exchange.

  15. Power electronics cooling apparatus

    Science.gov (United States)

    Sanger, Philip Albert; Lindberg, Frank A.; Garcen, Walter

    2000-01-01

    A semiconductor cooling arrangement wherein a semiconductor is affixed to a thermally and electrically conducting carrier such as by brazing. The coefficient of thermal expansion of the semiconductor and carrier are closely matched to one another so that during operation they will not be overstressed mechanically due to thermal cycling. Electrical connection is made to the semiconductor and carrier, and a porous metal heat exchanger is thermally connected to the carrier. The heat exchanger is positioned within an electrically insulating cooling assembly having cooling oil flowing therethrough. The arrangement is particularly well adapted for the cooling of high power switching elements in a power bridge.

  16. Cell-cooling in flow cytometry by Peltier elements.

    Science.gov (United States)

    Göttlinger, C; Meyer, K L; Weichel, W; Müller, W; Raftery, B; Radbruch, A

    1986-05-01

    We have built a cooling device for cell suspensions in flow cytometry that makes use of the Peltier effect (Barnard RD, Thermo electricity in Metals and Alloys, Taylor and Francis, London; Siemens-Z 34:383-88, 1963). The prototype described here is used for cooling collection tubes during long-duration cell sorting and is capable of maintaining a temperature of 2-5 degrees C in a cell suspension of up to 3 ml. In general, Peltier element-based cooling is useful for equilibrating the temperature of small volumes of fluids. Furthermore, Peltier element-based cooling devices are easy to build and handle.

  17. Capabilities for Strategic Adaptation

    DEFF Research Database (Denmark)

    Distel, Andreas Philipp

    organizational conditions, such as organizational design, support the emergence and performance of such capabilities. In detail, the dissertation consists of three self-contained research papers. The first paper is a systematic, multilevel review of the innovation literature; it reinterprets evidence from prior...... firms’ ability to absorb and leverage new knowledge. The third paper is an empirical study which conceptualizes top managers’ resource cognition as a managerial capability underlying firms’ resource adaptation; it empirically examines the performance implications of this capability and organizational...... empirical studies through the dynamic capabilities lens and develops propositions for future research. The second paper is an empirical study on the origins of firm-level absorptive capacity; it explores how organization-level antecedents, through their impact on individual-level antecedents, influence...

  18. Elastocaloric cooling: Stretch to actively cool

    Science.gov (United States)

    Ossmer, Hinnerk; Kohl, Manfred

    2016-10-01

    The elastocaloric effect can be exploited in solid-state cooling technologies as an alternative to conventional vapour compression. Now, an elastocaloric device based on the concept of active regeneration achieves a temperature lift of 15.3 K and efficiencies competitive with other caloric-based approaches.

  19. Defence Capability Plan 2009

    Science.gov (United States)

    2009-01-01

    financed lease , or elements of both. Background Initially, an improved rotary wing training capability was to be provided under two projects – Phase 7A...Destroyer (AWD), Super Hornet and New Air Combat Capability (NACC). Through-life Support The Commonwealth seeks a ‘ turnkey ’ service providing aerial...combination: > Commercial- and/or Military-off-the-Shelf; or > open tender for ADF ownership or lease . Through-life Support Depending on the procurement (ADF

  20. Measure Guideline: Ventilation Cooling

    Energy Technology Data Exchange (ETDEWEB)

    Springer, D.; Dakin, B.; German, A.

    2012-04-01

    The purpose of this measure guideline on ventilation cooling is to provide information on a cost-effective solution for reducing cooling system energy and demand in homes located in hot-dry and cold-dry climates. This guideline provides a prescriptive approach that outlines qualification criteria, selection considerations, and design and installation procedures.

  1. The final cool down

    CERN Multimedia

    Thursday 29th May, the cool-down of the final sector (sector 4-5) of LHC has begun, one week after the start of the cool-down of sector 1-2. It will take five weeks for the sectors to be cooled from room temperature to 5 K and a further two weeks to complete the cool down to 1.9 K and the commissioning of cryogenic instrumentation, as well as to fine tune the cryogenic plants and the cooling loops of cryostats.Nearly a year and half has passed since sector 7-8 was cooled for the first time in January 2007. For Laurent Tavian, AT/CRG Group Leader, reaching the final phase of the cool down is an important milestone, confirming the basic design of the cryogenic system and the ability to operate complete sectors. “All the sectors have to operate at the same time otherwise we cannot inject the beam into the machine. The stability and reliability of the cryogenic system and its utilities are now very important. That will be the new challenge for the coming months,” he explains. The status of the cool down of ...

  2. Solar absorption cooling

    NARCIS (Netherlands)

    Kim, D.-S.

    2007-01-01

    As the world concerns more and more on global climate changes and depleting energy resources, solar cooling technology receives increasing interests from the public as an environment-friendly and sustainable alternative. However, making a competitive solar cooling machine for the market still

  3. Passive evaporative cooling

    NARCIS (Netherlands)

    Tzoulis, A.

    2011-01-01

    This "designers' manual" is made during the TIDO-course AR0531 Smart & Bioclimatic Design. Passive techniques for cooling are a great way to cope with the energy problem of the present day. This manual introduces passive cooling by evaporation. These methods have been used for many years in traditi

  4. Data center cooling method

    Energy Technology Data Exchange (ETDEWEB)

    Chainer, Timothy J.; Dang, Hien P.; Parida, Pritish R.; Schultz, Mark D.; Sharma, Arun

    2015-08-11

    A method aspect for removing heat from a data center may use liquid coolant cooled without vapor compression refrigeration on a liquid cooled information technology equipment rack. The method may also include regulating liquid coolant flow to the data center through a range of liquid coolant flow values with a controller-apparatus based upon information technology equipment temperature threshold of the data center.

  5. Liquid Cooled Garments

    Science.gov (United States)

    1979-01-01

    Astronauts working on the surface of the moon had to wear liquid-cooled garments under their space suits as protection from lunar temperatures which sometimes reach 250 degrees Fahrenheit. In community service projects conducted by NASA's Ames Research Center, the technology developed for astronaut needs has been adapted to portable cooling systems which will permit two youngsters to lead more normal lives.

  6. Solar absorption cooling

    NARCIS (Netherlands)

    Kim, D.-S.

    2007-01-01

    As the world concerns more and more on global climate changes and depleting energy resources, solar cooling technology receives increasing interests from the public as an environment-friendly and sustainable alternative. However, making a competitive solar cooling machine for the market still remain

  7. Coherent electron cooling

    Energy Technology Data Exchange (ETDEWEB)

    Litvinenko,V.

    2009-05-04

    Cooling intense high-energy hadron beams remains a major challenge in modern accelerator physics. Synchrotron radiation is still too feeble, while the efficiency of two other cooling methods, stochastic and electron, falls rapidly either at high bunch intensities (i.e. stochastic of protons) or at high energies (e-cooling). In this talk a specific scheme of a unique cooling technique, Coherent Electron Cooling, will be discussed. The idea of coherent electron cooling using electron beam instabilities was suggested by Derbenev in the early 1980s, but the scheme presented in this talk, with cooling times under an hour for 7 TeV protons in the LHC, would be possible only with present-day accelerator technology. This talk will discuss the principles and the main limitations of the Coherent Electron Cooling process. The talk will describe the main system components, based on a high-gain free electron laser driven by an energy recovery linac, and will present some numerical examples for ions and protons in RHIC and the LHC and for electron-hadron options for these colliders. BNL plans a demonstration of the idea in the near future.

  8. Modeling gasodynamic vortex cooling

    Science.gov (United States)

    Allahverdyan, A. E.; Fauve, S.

    2017-08-01

    We aim at studying gasodynamic vortex cooling in an analytically solvable, thermodynamically consistent model that can explain limitations on the cooling efficiency. To this end, we study an angular plus radial flow between two (coaxial) rotating permeable cylinders. Full account is taken of compressibility, viscosity, and heat conductivity. For a weak inward radial flow the model qualitatively describes the vortex cooling effect, in terms of both temperature and the decrease of the stagnation enthalpy, seen in short uniflow vortex (Ranque) tubes. The cooling does not result from external work and its efficiency is defined as the ratio of the lowest temperature reached adiabatically (for the given pressure gradient) to the lowest temperature actually reached. We show that for the vortex cooling the efficiency is strictly smaller than 1, but in another configuration with an outward radial flow, we find that the efficiency can be larger than 1. This is related to both the geometry and the finite heat conductivity.

  9. Hydronic rooftop cooling systems

    Science.gov (United States)

    Bourne, Richard C.; Lee, Brian Eric; Berman, Mark J.

    2008-01-29

    A roof top cooling unit has an evaporative cooling section that includes at least one evaporative module that pre-cools ventilation air and water; a condenser; a water reservoir and pump that captures and re-circulates water within the evaporative modules; a fan that exhausts air from the building and the evaporative modules and systems that refill and drain the water reservoir. The cooling unit also has a refrigerant section that includes a compressor, an expansion device, evaporator and condenser heat exchangers, and connecting refrigerant piping. Supply air components include a blower, an air filter, a cooling and/or heating coil to condition air for supply to the building, and optional dampers that, in designs that supply less than 100% outdoor air to the building, control the mixture of return and ventilation air.

  10. INITIAL COOLING EXPERIMENT (ICE)

    CERN Multimedia

    1979-01-01

    ICE was built in 1977, using the modified bending magnets of the g-2 muon storage ring (see 7405430). Its purpose was to verify the validity of stochastic and electron cooling for the antiproton project. Stochastic cooling proved a resounding success early in 1978 and the antiproton project could go ahead, now entirely based on stochastic cooling. Electron cooling was experimented with in 1979. The 26 kV equipment is housed in the cage to the left of the picture, adjacent to the "e-cooler" located in a straight section of the ring. With some modifications, the cooler was later transplanted into LEAR (Low Energy Antiproton Ring) and then, with further modifications, into the AD (Antiproton Decelerator), where it cools antiprotons to this day (2006). See also: 7711282, 7802099, 7809081.

  11. INITIAL COOLING EXPERIMENT (ICE)

    CERN Multimedia

    1978-01-01

    ICE was built in 1977, in a record time of 9 months, using the modified bending magnets of the g-2 muon storage ring. Its purpose was to verify the validity of stochastic and electron cooling for the antiproton project, to be launched in 1978. Already early in 1978, stochastic cooling proved a resounding success, such that the antiproton (p-pbar)project was entirely based on it. Tests of electron cooling followed later: protons of 46 MeV kinetic energy were cooled with an electron beam of 26 kV and 1.3 A. The cage seen prominently in the foreground houses the HV equipment, adjacent to the "cooler" installed in a straight section of the ring. With some modifications, the cooler was later transplanted into LEAR (Low Energy Antiproton Ring) and then, with further modifications, into the AD (Antiproton Decelerator), where it cools antiprotons to this day (2006). See also: 7711282, 7802099, 7908242.

  12. Structural Capability of an Organization toward Innovation Capability

    DEFF Research Database (Denmark)

    Nielsen, Susanne Balslev; Momeni, Mostafa

    2016-01-01

    competitive advantage in the organizations is the innovation capability. The innovation capability is associated with other organizational capabilities, and many organizations have focused on the need to identify innovation capabilities.This research focuses on recognition of the structural aspect...... of innovation capability and proposes a conceptual framework based on a Qualitative Meta Synthesis of academic literature on organizations innovation capability. This is proposed for the development of the concept of innovation capability in the organizations and this paper includes an expert based validation...... Capability and Structural Capability. Also, it offers the most important components and indices which directly influence and are related to the structural capability of innovation capability....

  13. Analysis of the Solar Radiation Impact on Cooling Performance of the Absorption Chiller

    Directory of Open Access Journals (Sweden)

    Fedorčák Pavol

    2014-11-01

    Full Text Available Absorption cooling at low power is a new technology which has not yet been applied to current conditioning elements. This paper analyzes the various elements of solar absorption cooling. Individual states were simulated in which working conditions were set for the capability of solar absorption cooling to balance heat loads in the room.

  14. Analysis of the Solar Radiation Impact on Cooling Performance of the Absorption Chiller

    OpenAIRE

    Fedorčák Pavol; Košičanová Danica; Nagy Richard; Mlynár Peter

    2014-01-01

    Absorption cooling at low power is a new technology which has not yet been applied to current conditioning elements. This paper analyzes the various elements of solar absorption cooling. Individual states were simulated in which working conditions were set for the capability of solar absorption cooling to balance heat loads in the room.

  15. Multiple-input multiple-output based high density on-chip optical interconnect

    Science.gov (United States)

    Shen, Po-Kuan; Xu, Xiaochuan; Hosseini, Amir; Pan, Zeyu; Chen, Ray T.

    2015-03-01

    In on-chip optical interconnect, dielectric waveguide arrays are usually designed with pitches of a few wavelengths to avoid crosstalk, which greatly limits the integration density. In this paper, we for the first time propose to use multipleinput multiple-output (MIMO), a well-known technique in wireless communication, to recover the data from entangled signals and reduce the waveguide pitch to subwavelength range. In the proposed on-chip MIMO system, there is significant coupling among the adjacent waveguides in the high density waveguide region. In order to recover signals, the N×N transmission matrix of N high-density waveguides is calculated to describe the relation between each input ports and output ports. In the receiving part, homodyne coherent receivers are used to receive the transmitted signals, and obtain the signal in phase and ?/2 out of phase with local oscillator. In the electrical signal processing, the inverse transmission matrix is utilized to recover the signals in the electronic domain. To verify the proposed on-chip MIMO, we used the INTERCONNECT package in Lumerical software to simulate a 10x10 MIMO system. The cross section of each waveguide is 500 nm x 220 nm. The spacing is 250 nm. The simulation verifies the possibility of recovering 10 Gbps data from the heavily coupled 10 waveguides with a BER better than 10-12. The minimum input optical power for a BER of 10-12 is greater than -18.1 dBm, and the maximum phase shift between input laser and local oscillator can reach to 73.5˚.

  16. Lensless high-resolution on-chip optofluidic microscopes for Caenorhabditis elegans and cell imaging.

    Science.gov (United States)

    Cui, Xiquan; Lee, Lap Man; Heng, Xin; Zhong, Weiwei; Sternberg, Paul W; Psaltis, Demetri; Yang, Changhuei

    2008-08-05

    Low-cost and high-resolution on-chip microscopes are vital for reducing cost and improving efficiency for modern biomedicine and bioscience. Despite the needs, the conventional microscope design has proven difficult to miniaturize. Here, we report the implementation and application of two high-resolution (approximately 0.9 microm for the first and approximately 0.8 microm for the second), lensless, and fully on-chip microscopes based on the optofluidic microscopy (OFM) method. These systems abandon the conventional microscope design, which requires expensive lenses and large space to magnify images, and instead utilizes microfluidic flow to deliver specimens across array(s) of micrometer-size apertures defined on a metal-coated CMOS sensor to generate direct projection images. The first system utilizes a gravity-driven microfluidic flow for sample scanning and is suited for imaging elongate objects, such as Caenorhabditis elegans; and the second system employs an electrokinetic drive for flow control and is suited for imaging cells and other spherical/ellipsoidal objects. As a demonstration of the OFM for bioscience research, we show that the prototypes can be used to perform automated phenotype characterization of different Caenorhabditis elegans mutant strains, and to image spores and single cellular entities. The optofluidic microscope design, readily fabricable with existing semiconductor and microfluidic technologies, offers low-cost and highly compact imaging solutions. More functionalities, such as on-chip phase and fluorescence imaging, can also be readily adapted into OFM systems. We anticipate that the OFM can significantly address a range of biomedical and bioscience needs, and engender new microscope applications.

  17. 3-Dimensional cell culture for on-chip differentiation of stem cells in embryoid body.

    Science.gov (United States)

    Kim, Choong; Lee, Kang Sun; Bang, Jae Hoon; Kim, Young Eyn; Kim, Min-Cheol; Oh, Kwang Wook; Lee, Soo Hyun; Kang, Ji Yoon

    2011-03-07

    This paper proposes a microfluidic device for the on-chip differentiation of an embryoid body (EB) formed in a microwell via 3-dimensional cultures of mouse embryonic carcinoma (EC) cells. The device adjusted the size of the EB by fluid volume, differentiated the EB by chemical treatment, and evaluated its effects in EC cells by on-chip immunostaining. A microfluidic resistance network was designed to control the size of the embryoid body. The duration time and flow rate into each microwell regulated the initial number of trapped cells in order to adjust the size of the EB. The docked cells were aggregated and formed a spherical EB on the non-adherent surface of the culture chip for 3 days. The EC cells in the EB were then differentiated into diverse cell lineages without attachment for an additional 4 days; meanwhile, retinoic acid (RA) was applied without serum to direct the cells into early neuronal lineage. On-chip immunostaining of the EB in the microwell with a neuronal marker was conducted to assess the differentiation-inducing ability of RA. The effect of RA on neuronal differentiation was analyzed with confocal microscopic images of the TuJ1 marker. The RA-treated cells expressed more neuronal markers and appeared as mature neuronal cells with long neurites. The fluorescence intensity of the TuJ1 in the RA-treated EB was twice that observed in the non-treated EB on day 5. It was demonstrated that the pre-screening of inducing chemicals on the early neuronal differentiation of EC cells in a single microfluidic chip was indeed feasible. This chip is expected to constitute a useful tool for assessing the early differentiation of ES cells without attachment, and is also expected to prove useful as an anti-cancer drug test platform for the cytotoxicity assay with cellular spheroids.

  18. All-Digital Time-Domain CMOS Smart Temperature Sensor with On-Chip Linearity Enhancement

    Directory of Open Access Journals (Sweden)

    Chun-Chi Chen

    2016-01-01

    Full Text Available This paper proposes the first all-digital on-chip linearity enhancement technique for improving the accuracy of the time-domain complementary metal-oxide semiconductor (CMOS smart temperature sensor. To facilitate on-chip application and intellectual property reuse, an all-digital time-domain smart temperature sensor was implemented using 90 nm Field Programmable Gate Arrays (FPGAs. Although the inverter-based temperature sensor has a smaller circuit area and lower complexity, two-point calibration must be used to achieve an acceptable inaccuracy. With the help of a calibration circuit, the influence of process variations was reduced greatly for one-point calibration support, reducing the test costs and time. However, the sensor response still exhibited a large curvature, which substantially affected the accuracy of the sensor. Thus, an on-chip linearity-enhanced circuit is proposed to linearize the curve and achieve a new linearity-enhanced output. The sensor was implemented on eight different Xilinx FPGA using 118 slices per sensor in each FPGA to demonstrate the benefits of the linearization. Compared with the unlinearized version, the maximal inaccuracy of the linearized version decreased from 5 °C to 2.5 °C after one-point calibration in a range of −20 °C to 100 °C. The sensor consumed 95 μW using 1 kSa/s. The proposed linearity enhancement technique significantly improves temperature sensing accuracy, avoiding costly curvature compensation while it is fully synthesizable for future Very Large Scale Integration (VLSI system.

  19. Holographic patterning of high-performance on-chip 3D lithium-ion microbatteries.

    Science.gov (United States)

    Ning, Hailong; Pikul, James H; Zhang, Runyu; Li, Xuejiao; Xu, Sheng; Wang, Junjie; Rogers, John A; King, William P; Braun, Paul V

    2015-05-26

    As sensors, wireless communication devices, personal health monitoring systems, and autonomous microelectromechanical systems (MEMS) become distributed and smaller, there is an increasing demand for miniaturized integrated power sources. Although thin-film batteries are well-suited for on-chip integration, their energy and power per unit area are limited. Three-dimensional electrode designs have potential to offer much greater power and energy per unit area; however, efforts to date to realize 3D microbatteries have led to prototypes with solid electrodes (and therefore low power) or mesostructured electrodes not compatible with manufacturing or on-chip integration. Here, we demonstrate an on-chip compatible method to fabricate high energy density (6.5 μWh cm(-2)⋅μm(-1)) 3D mesostructured Li-ion microbatteries based on LiMnO2 cathodes, and NiSn anodes that possess supercapacitor-like power (3,600 μW cm(-2)⋅μm(-1) peak). The mesostructured electrodes are fabricated by combining 3D holographic lithography with conventional photolithography, enabling deterministic control of both the internal electrode mesostructure and the spatial distribution of the electrodes on the substrate. The resultant full cells exhibit impressive performances, for example a conventional light-emitting diode (LED) is driven with a 500-μA peak current (600-C discharge) from a 10-μm-thick microbattery with an area of 4 mm(2) for 200 cycles with only 12% capacity fade. A combined experimental and modeling study where the structural parameters of the battery are modulated illustrates the unique design flexibility enabled by 3D holographic lithography and provides guidance for optimization for a given application.

  20. All-Digital Time-Domain CMOS Smart Temperature Sensor with On-Chip Linearity Enhancement.

    Science.gov (United States)

    Chen, Chun-Chi; Chen, Chao-Lieh; Lin, Yi

    2016-01-30

    This paper proposes the first all-digital on-chip linearity enhancement technique for improving the accuracy of the time-domain complementary metal-oxide semiconductor (CMOS) smart temperature sensor. To facilitate on-chip application and intellectual property reuse, an all-digital time-domain smart temperature sensor was implemented using 90 nm Field Programmable Gate Arrays (FPGAs). Although the inverter-based temperature sensor has a smaller circuit area and lower complexity, two-point calibration must be used to achieve an acceptable inaccuracy. With the help of a calibration circuit, the influence of process variations was reduced greatly for one-point calibration support, reducing the test costs and time. However, the sensor response still exhibited a large curvature, which substantially affected the accuracy of the sensor. Thus, an on-chip linearity-enhanced circuit is proposed to linearize the curve and achieve a new linearity-enhanced output. The sensor was implemented on eight different Xilinx FPGA using 118 slices per sensor in each FPGA to demonstrate the benefits of the linearization. Compared with the unlinearized version, the maximal inaccuracy of the linearized version decreased from 5 °C to 2.5 °C after one-point calibration in a range of -20 °C to 100 °C. The sensor consumed 95 μW using 1 kSa/s. The proposed linearity enhancement technique significantly improves temperature sensing accuracy, avoiding costly curvature compensation while it is fully synthesizable for future Very Large Scale Integration (VLSI) system.

  1. An Efficient Radio Access Control Mechanism for Wireless Network-On-Chip Architectures

    Directory of Open Access Journals (Sweden)

    Maurizio Palesi

    2015-03-01

    Full Text Available Modern systems-on-chip (SoCs today contain hundreds of cores, and this number is predicted to reach the thousands by the year 2020. As the number of communicating elements increases, there is a need for an efficient, scalable and reliable communication infrastructure. As technology geometries shrink to the deep submicron regime, however, the communication delay and power consumption of global interconnections become the major bottleneck. The network-on-chip (NoC design paradigm, based on a modular packet-switched mechanism, can address many of the on-chip communication issues, such as the performance limitations of long interconnects and integration of large number of cores on a chip. Recently, new communication technologies based on the NoC concept have emerged with the aim of improving the scalability limitations of conventional NoC-based architectures. Among them, wireless NoCs (WiNoCs use the radio medium for reducing the performance and energy penalties of long-range and multi-hop communications. As the radio medium can be accessed by a single transmitter at a time, a radio access control mechanism (RACM is needed. In this paper, we present a novel RACM, which allows one to improve both the performance and energy figures of the WiNoC. Experiments, carried out on both synthetic and real traffic scenarios, have shown the effectiveness of the proposed RACM. On average, a 30% reduction in communication delay and a 25% energy savings have been observed when the proposed RACM is applied to a known WiNoC architecture.

  2. Exploration of magnetic memory for ultra low-power systems-on-chip

    OpenAIRE

    Patrigeon, Guillaume; Senni, Sophiane; Benoit, Pascal; Torres, Lionel

    2017-01-01

    National audience; Memories are currently a real bottleneck to design high speed, low area and energy-efficient systems-on-chip (SoC). An important proportion of total power is spent on memory systems. Ultra low-power (ULP) SoC often use different memory technologies to keep the advantages of each one (area, energy consumption, latency and non-volatility), however there are still penalties and this add more complexity at every development levels. MRAM (Magnetic Random Access Memory) is seen a...

  3. Interfacing Hardware Accelerators to a Time-Division Multiplexing Network-on-Chip

    DEFF Research Database (Denmark)

    Pezzarossa, Luca; Sørensen, Rasmus Bo; Schoeberl, Martin

    2015-01-01

    This paper addresses the integration of stateless hardware accelerators into time-predictable multi-core platforms based on time-division multiplexing networks-on-chip. Stateless hardware accelerators, like floating-point units, are typically attached as co-processors to individual processors in ...... implementation. The design evaluation is carried out using the open source T-CREST multi-core platform implemented on an Altera Cyclone IV FPGA. The size of the proposed design, including a floating-point accelerator, is about two-thirds of a processor....

  4. Low-power system-on-chip implementation for respiratory rate detection and transmission.

    Science.gov (United States)

    Padasdao, Bryson; Yee, Roxanne; Boric-Lubecke, Olga

    2012-01-01

    Recent biosensors can measure respiratory rate non-invasively, but limits patient mobility or requires regular battery replacement. Respiratory effort, which can scavenge mW, may power the sensor, but requires minimal sensor power usage. This paper demonstrates feasibility of respiratory rate measurement by using a comparator instead of ADC. A low-power system-on-chip can implement respiratory rate detection and wireless data transmission with a total power consumption under 82 µW. This approach produces significant power savings, and transmission uses under 30% of total power consumption.

  5. A System on Chip approach to enhanced learning in interdisciplinary robotics

    DEFF Research Database (Denmark)

    Sørensen, Anders Stengaard; Falsig, Simon

    2011-01-01

    p, li { white-space: pre-wrap; } To sustain interdisciplinary teaching and learning in the rapidly growing and diversifying field of robotics, we have successfully employed FPGA based System on Chip (SoC) technology to provide abstraction between high level software and low level IO/ and control...... hardware. Our approach is to provides students with a simple FPGA based framework for hardware access, and hardware I/O development, which is independent of computer platform and programming language, and enable the students to add to, or change I/O hardware in accordance with their skills. We have tested...

  6. Detection of silver nanoparticles on a lab-on-chip platform.

    Science.gov (United States)

    Chua, Chun Kiang; Pumera, Martin

    2013-07-01

    The prevalent use of silver nanoparticles (AgNPs) in commercial goods has brought forth an urgent need for environmental salvation. With the global river systems being contaminated by AgNPs, fast and efficient detection systems are needed to trace the presence of AgNPs in common water to prevent detrimental effects to the public health. In this work, the detection of AgNPs via electrochemical oxidation has been achieved on a "Lab-on-chip" platform. This platform provides a fast, convenient, and portable detection system for the detection of AgNPs in common water.

  7. On-chip pretreatment of whole blood by using MEMS technology

    CERN Document Server

    Chen, Xing

    2012-01-01

    Microfabrication technology has stimulated a plurality of lab-on-a-chip research and development efforts aimed at enabling biomedical researchers and health care practitioners to manipulate and analyze complex biological fluids at the nano and microliter scale. On-chip pretreatment of whole blood is one of the hottest topics in lab-on-a-chip research since whole blood has been regarded as the most important clinical sample. Various microfluidic chips for blood sample pretreatment, such as plasma isolation, cells separation, cells lysis, gene or protein purification, etc., are described in this

  8. Support for Programming Models in Network-on-Chip-based Many-core Systems

    DEFF Research Database (Denmark)

    Rasmussen, Morten Sleth

    and scalability in an image processing application with the aim of providing insight into parallel programming issues. The second part proposes and presents the tile-based Clupea many-core architecture, which has the objective of providing configurable support for programming models to allow different programming......This thesis addresses aspects of support for programming models in Network-on- Chip-based many-core architectures. The main focus is to consider architectural support for a plethora of programming models in a single system. The thesis has three main parts. The first part considers parallelization...

  9. Low-power wireless on-chip microparticle manipulation with process variation compensation

    OpenAIRE

    Kishiwada, Yasushi; Iwasaki, Hirosuke; Ueda, Shun; Dei, Yoshiaki; Miyawaki, Yusuke; Matsuoka, Toshimasa

    2013-01-01

    A chip with which to manipulate microparticles using wireless power transfer and pulse-driven dielectrophoresis has been designed and fabricated using a 0.18-µm CMOS process. The chip enables microparticle manipulation using a 0.35-V power supply and a 10∼100kHz clock, which are generated on the chip by means of an on-chip coil, a rectifier and a ring oscillator circuit with process variation compensation circuits. The proposed process variation compensation with effective gate-width tuning a...

  10. On-Chip Microplasmas for the Detection of Radioactive Cesium Contamination in Seawater

    Directory of Open Access Journals (Sweden)

    Joshua B. Joffrion

    2017-08-01

    Full Text Available On-chip microplasmas have previously been used in designing a compact and portable device for identifying pollutants in a water sample. By exciting a liquid sample with a high energy microdischarge and recording the spectral wavelengths emitted, the individual elements in the liquid are distinguishable. In particular, this study focuses on cesium, a contaminant from nuclear incidents such as the collapse of the nuclear power plant in Fukushima, Japan. This article shows that not only can the presence of cesium be clearly determined at concentrations as low as 10 ppb, but the relative concentration contained in the sample can be determined through the discharges’ relative spectral intensity.

  11. Turbo NOC: a framework for the design of Network On Chip based turbo decoder architectures

    CERN Document Server

    Martina, Maurizio

    2009-01-01

    This work proposes a general framework for the design and simulation of network on chip based turbo decoder architectures. Several parameters in the design space are investigated, namely the network topology, the parallelism degree, the rate at which messages are sent by processing nodes over the network and the routing strategy. The main results of this analysis are: i) the most suited topologies to achieve high throughput with a limited complexity overhead are generalized de-Bruijn and generalized Kautz topologies; ii) depending on the throughput requirements different parallelism degrees, message injection rates and routing algorithms can be used to minimize the network area overhead.

  12. A Scalable, Timing-Safe, Network-on-Chip Architecture with an Integrated Clock Distribution Method

    DEFF Research Database (Denmark)

    Bjerregaard, Tobias; Stensgaard, Mikkel Bystrup; Sparsø, Jens

    2007-01-01

    Growing system sizes together with increasing performance variability are making globally synchronous operation hard to realize. Mesochronous clocking constitutes a possible solution to the problems faced. The most fundamental of problems faced when communicating between mesochronously clocked...... is based purely on local observations. It is demonstrated with a 90 nm CMOS standard cell network-on-chip design which implements completely timing-safe, global communication in a modular system...... regions concerns the possibility of data corruption caused by metastability. This paper presents an integrated communication and mesochronous clocking strategy, which avoids timing related errors while maintaining a globally synchronous system perspective. The architecture is scalable as timing integrity...

  13. A Joint-Coding Scheme With Crosstalk Avoidance in Network On Chip

    Directory of Open Access Journals (Sweden)

    Fen Ge

    2013-01-01

    Full Text Available The reliable transfer in Network on Chip can be guaranteed by crosstalk avoidance and error detection code. In this paper,we propose a joint coding scheme combined with crosstalk avoidance coding with error control coding. The Fibonacci numeral system is applied to satisfy the requirement of crosstalk avoidance coding, and the error detection is achieved by adding parity bits. We also implement the codec in register transfer level. Furthermore, the schemes of codec applying to fault-tolerant router are analyzed. The experimental result shows that "once encode, multiple decode" scheme outperforms other schemes in trade-o_ of delay, area and power.

  14. A novel compact model for on-chip stacked transformers in RF-CMOS technology

    Institute of Scientific and Technical Information of China (English)

    Liu Jun; Wen Jincai; Zhao Qian; Sun Lingling

    2013-01-01

    A novel compact model for on-chip stacked transformers is presented.The proposed model topology gives a clear distinction to the eddy current,resistive and capacitive losses of the primary and secondary coils in the substrate.A method to analytically determine the non-ideal parasitics between the primary coil and substrate is provided.The model is further verified by the excellent match between the measured and simulated S-parameters on the extracted parameters for a 1 ∶ 1 stacked transformer manufactured in a commercial RF-CMOS technology.

  15. On-Chip Integrated, Silicon–Graphene Plasmonic Schottky Photodetector with High Responsivity and Avalanche Photogain

    Science.gov (United States)

    2016-01-01

    We report an on-chip integrated metal graphene–silicon plasmonic Schottky photodetector with 85 mA/W responsivity at 1.55 μm and 7% internal quantum efficiency. This is one order of magnitude higher than metal–silicon Schottky photodetectors operated in the same conditions. At a reverse bias of 3 V, we achieve avalanche multiplication, with 0.37A/W responsivity and avalanche photogain ∼2. This paves the way to graphene integrated silicon photonics. PMID:27053042

  16. On-chip, self-detected THz dual-comb spectrometer

    CERN Document Server

    Rösch, Markus; Villares, Gustavo; Bosco, Lorenzo; Beck, Mattias; Faist, Jérôme

    2016-01-01

    We present a directly generated on-chip dual-comb source at THz frequencies. The multi-heterodyne beating signal of two free-running THz quantum cascade laser frequency combs is measured electrically using one of the combs as a detector, fully exploiting the unique characteristics of quantum cascade active regions. Up to 30 modes can be detected corresponding to a spectral bandwidth of 630 GHz, being the available bandwidth of the dual comb configuration. The multi-heterodyne signal is used to investigate the equidistance of the comb modes showing an accuracy of $10^{-12}$ at the carrier frequency of 2.5 THz.

  17. On-chip focusing in the mid-infrared: Demonstrated with ring quantum cascade lasers

    Energy Technology Data Exchange (ETDEWEB)

    Szedlak, Rolf, E-mail: rolf.szedlak@tuwien.ac.at; Schwarzer, Clemens; Zederbauer, Tobias; Detz, Hermann; Maxwell Andrews, Aaron; Schrenk, Werner; Strasser, Gottfried [Institute for Solid State Electronics and Center for Micro- and Nanostructures, Vienna University of Technology, 1040 Vienna (Austria)

    2014-04-14

    We report on collimated emission beams from substrate emitting ring quantum cascade lasers with an on-chip focusing element fabricated into the bottom side of the device. It is formed by a gradient index metamaterial layer, realized by etching subwavelength holes into the substrate. The generated optical path length difference for rays emitted under different angles from the ring waveguide flattens the wavefront and focuses the light. Our far field measurements show an increased peak intensity corresponding to 617% of the initial value without the focusing element. Far field calculations, based on a Fourier transformation of the metamaterial area, are in good agreement with our experimental data.

  18. Design verification and performance analysis of Serial AXI Links in Broadcom System-on-Chip

    OpenAIRE

    Sarai, Simran Kaur

    2014-01-01

    Design verification is an essential step in the development of any product. Also referred to as qualification testing, design verification ensures that the product as designed is the same as the product as intended. In this project, design verification and performance analysis of Thin Advanced Extensible Interface Links (T-AXI) is conducted on a Broadcom’s SoC (System on Chip). T-AXI is a Broadcom’s proprietary bus that interfaces all the subsystems on the System-onchip (SoC) to the system me...

  19. A Metaheuristic Scheduler for Time Division Multiplexed Network-on-Chip

    DEFF Research Database (Denmark)

    Sørensen, Rasmus Bo; Sparsø, Jens; Pedersen, Mark Ruvald

    This report presents a metaheuristic scheduler for inter-processor communication in multi-core platforms using time division multiplexed (TDM) networks on chip (NOC). Input to the scheduler is a specification of the target multi-core platform and a specification of the application. Compared...... that this is possible with only negligible impact on the schedule period. We evaluate the scheduler with seven different applications from the MCSL NOC benchmark suite. We observe that the metaheuristics perform better than the greedy solution. In the special case of all-to-all communication with equal bandwidths...

  20. On-Chip integration of sample pretreatment and Multiplex polymerase chain reaction (PCR) for DNA analysis

    DEFF Research Database (Denmark)

    Brivio, Monica; Snakenborg, Detlef; Søgaard, E.

    2008-01-01

    In this paper we present a modular lab-on-a-chip system for integrated sample pre-treatment (PT) by magnetophoresis and DNA amplification by polymerase chain reaction (PCR). It consists of a polymer-based microfluidic chip mounted on a custom-made thermocycler (Figure 1) and includes a simple...... and efficient method for switching the liquid flow between the PT and PCR chamber. Purification of human genomic DNA from EDTA-treated blood and multiplex PCR were successfully carried out on-chip using the developed lab-on-a-chip system....