WorldWideScience

Sample records for nanowire transistor characteristics

  1. Effects of piezoelectric potential on the transport characteristics of metal-ZnO nanowire-metal field effect transistor

    KAUST Repository

    Gao, Zhiyuan; Zhou, Jun; Gu, Yudong; Fei, Peng; Hao, Yue; Bao, Gang; Wang, Zhong Lin

    2009-01-01

    We have investigated the effects of piezoelectric potential in a ZnO nanowire on the transport characteristics of the nanowire based field effect transistor through numerical calculations and experimental observations. Under different straining

  2. Silicon nanowire transistors

    CERN Document Server

    Bindal, Ahmet

    2016-01-01

    This book describes the n and p-channel Silicon Nanowire Transistor (SNT) designs with single and dual-work functions, emphasizing low static and dynamic power consumption. The authors describe a process flow for fabrication and generate SPICE models for building various digital and analog circuits. These include an SRAM, a baseband spread spectrum transmitter, a neuron cell and a Field Programmable Gate Array (FPGA) platform in the digital domain, as well as high bandwidth single-stage and operational amplifiers, RF communication circuits in the analog domain, in order to show this technology’s true potential for the next generation VLSI. Describes Silicon Nanowire (SNW) Transistors, as vertically constructed MOS n and p-channel transistors, with low static and dynamic power consumption and small layout footprint; Targets System-on-Chip (SoC) design, supporting very high transistor count (ULSI), minimal power consumption requiring inexpensive substrates for packaging; Enables fabrication of different types...

  3. Sensing Responses Based on Transfer Characteristics of InAs Nanowire Field-Effect Transistors

    Science.gov (United States)

    Savelyev, Igor; Blumin, Marina; Wang, Shiliang; Ruda, Harry E.

    2017-01-01

    Nanowire-based field-effect transistors (FETs) have demonstrated considerable promise for a new generation of chemical and biological sensors. Indium arsenide (InAs), by virtue of its high electron mobility and intrinsic surface accumulation layer of electrons, holds properties beneficial for creating high performance sensors that can be used in applications such as point-of-care testing for patients diagnosed with chronic diseases. Here, we propose devices based on a parallel configuration of InAs nanowires and investigate sensor responses from measurements of conductance over time and FET characteristics. The devices were tested in controlled concentrations of vapour containing acetic acid, 2-butanone and methanol. After adsorption of analyte molecules, trends in the transient current and transfer curves are correlated with the nature of the surface interaction. Specifically, we observed proportionality between acetic acid concentration and relative conductance change, off current and surface charge density extracted from subthreshold behaviour. We suggest the origin of the sensing response to acetic acid as a two-part, reversible acid-base and redox reaction between acetic acid, InAs and its native oxide that forms slow, donor-like states at the nanowire surface. We further describe a simple model that is able to distinguish the occurrence of physical versus chemical adsorption by comparing the values of the extracted surface charge density. These studies demonstrate that InAs nanowires can produce a multitude of sensor responses for the purpose of developing next generation, multi-dimensional sensor applications. PMID:28714903

  4. Effects of piezoelectric potential on the transport characteristics of metal-ZnO nanowire-metal field effect transistor

    KAUST Repository

    Gao, Zhiyuan

    2009-01-01

    We have investigated the effects of piezoelectric potential in a ZnO nanowire on the transport characteristics of the nanowire based field effect transistor through numerical calculations and experimental observations. Under different straining conditions including stretching, compressing, twisting, and their combination, a piezoelectric potential is created throughout the nanowire to modulatealternate the transport property of the metal-ZnO nanowire contacts, resulting in a switch between symmetric and asymmetric contacts at the two ends, or even turning an Ohmic contact type into a diode. The commonly observed natural rectifying behavior of the as-fabricated ZnO nanowire can be attributed to the strain that was unpurposely created in the nanowire during device fabrication and material handling. This work provides further evidence on piezopotential governed electronic transport and devices, e.g., piezotronics.

  5. Analytical Model of Subthreshold Drain Current Characteristics of Ballistic Silicon Nanowire Transistors

    Directory of Open Access Journals (Sweden)

    Wanjie Xu

    2015-01-01

    Full Text Available A physically based subthreshold current model for silicon nanowire transistors working in the ballistic regime is developed. Based on the electric potential distribution obtained from a 2D Poisson equation and by performing some perturbation approximations for subband energy levels, an analytical model for the subthreshold drain current is obtained. The model is further used for predicting the subthreshold slopes and threshold voltages of the transistors. Our results agree well with TCAD simulation with different geometries and under different biasing conditions.

  6. Gate-tunable transport characteristics of Bi2S3 nanowire transistors

    Science.gov (United States)

    Kilcoyne, Colin; Ali, Ahmed H.; Alsaqqa, Ali M.; Rahman, Ajara A.; Whittaker-Brooks, Luisa; Sambandamurthy, Ganapathy

    2018-02-01

    Electrical transport and resistance noise spectroscopy measurements are performed on individual, single crystalline Bi2S3 nanowires in the field-effect geometry. The nanowires exhibit n-type conduction and device characteristics such as activation energy, ON/OFF ratio, and mobility are calculated over a temperature range of 120-320 K and at several bias values. The noise magnitude is measured between 0.01 and 5 Hz at several gate voltages as the device turns from it's OFF to ON state. The presence of mid-gap states which act as charge traps within the band gap can potentially explain the observed transport characteristics. Sulfur vacancies are the likely origin of these mid-gap states which makes Bi2S3 nanowires appealing for defect engineering as a means to enhance its optoelectronic properties and also to better understand the important role of defects in nanoscale semiconductors.

  7. Influence of surface charge on the transport characteristics of nanowire-field effect transistors in liquid environments

    Energy Technology Data Exchange (ETDEWEB)

    Nozaki, Daijiro, E-mail: daijiro.nozaki@gmail.com, E-mail: research@nano.tu-dresden.de [Institute for Materials Science and Max Bergmann Center of Biomaterials, TU Dresden, 01062 Dresden (Germany); Kunstmann, Jens [Institute for Materials Science and Max Bergmann Center of Biomaterials, TU Dresden, 01062 Dresden (Germany); Theoretical Chemistry, Department of Chemistry and Food Chemistry, TU Dresden, 01062 Dresden (Germany); Zörgiebel, Felix [Institute for Materials Science and Max Bergmann Center of Biomaterials, TU Dresden, 01062 Dresden (Germany); Center for Advancing Electronics Dresden (cfAED), TU Dresden, 01062 Dresden (Germany); Cuniberti, Gianaurelio [Institute for Materials Science and Max Bergmann Center of Biomaterials, TU Dresden, 01062 Dresden (Germany); Center for Advancing Electronics Dresden (cfAED), TU Dresden, 01062 Dresden (Germany); Dresden Center for Computational Materials Science (DCCMS), TU Dresden, 01062 Dresden (Germany)

    2015-05-18

    One dimensional nanowire field effect transistors (NW-FETs) are a promising platform for sensor applications. The transport characteristics of NW-FETs are strongly modified in liquid environment due to the charging of surface functional groups accompanied with protonation or deprotonation. In order to investigate the influence of surface charges and ionic concentrations on the transport characteristics of Schottky-barrier NW-FETs, we have combined the modified Poisson-Boltzmann theory with the Landauer-Büttiker transport formalism. For a typical device, the model is able to capture the reduction of the sensitivity of NW-FETs in ionic solutions due to the screening from counter ions as well as a local gating from surface functional groups. Our approach allows to model, to investigate, and to optimize realistic Schottky-barrier NW-FET devices in liquid environment.

  8. Modeling of subthreshold characteristics of short channel junctionless cylindrical surrounding-gate nanowire metal–oxide–silicon field effect transistors

    International Nuclear Information System (INIS)

    Jin, Xiaoshi; Liu, Xi; Lee, Jung-Hee; Lee, Jong-Ho

    2014-01-01

    A subthreshold model of short-channel junctionless field effect transistors with cylindrical surrounding-gate nanowire structure has been proposed. It was based on an approximated solution of two-dimensional Poisson's equation. The derivation of this model was introduced and the accuracy of the proposed models have been verified by comparison with both previous models and the SILVACO Atlas TCAD simulation results, which show good agreement. (paper)

  9. Individual SnO2 nanowire transistors fabricated by the gold microwire mask method

    International Nuclear Information System (INIS)

    Sun Jia; Tang Qingxin; Lu Aixia; Jiang Xuejiao; Wan Qing

    2009-01-01

    A gold microwire mask method is developed for the fabrication of transistors based on single lightly Sb-doped SnO 2 nanowires. Damage of the nanowire's surface can be avoided without any thermal annealing and surface modification, which is very convenient for the fundamental electrical and photoelectric characterization of one-dimensional inorganic nanomaterials. Transport measurements of the individual SnO 2 nanowire devices demonstrate the high-performance n-type field effect transistor characteristics without significant hysteresis in the transfer curves. The current on/off ratio and the subthreshold swing of the nanowire transistors are found to be 10 6 and 240 mV/decade, respectively.

  10. Nanowire field effect transistors principles and applications

    CERN Document Server

    Jeong, Yoon-Ha

    2014-01-01

    Nanowire Field Effect Transistor: Basic Principles and Applications” places an emphasis on the application aspects of nanowire field effect transistors (NWFET). Device physics and electronics are discussed in a compact manner, together with the p-n junction diode and MOSFET, the former as an essential element in NWFET and the latter as a general background of the FET. During this discussion, the photo-diode, solar cell, LED, LD, DRAM, flash EEPROM and sensors are highlighted to pave the way for similar applications of NWFET. Modeling is discussed in close analogy and comparison with MOSFETs. Contributors focus on processing, electrostatic discharge (ESD) and application of NWFET. This includes coverage of solar and memory cells, biological and chemical sensors, displays and atomic scale light emitting diodes. Appropriate for scientists and engineers interested in acquiring a working knowledge of NWFET as well as graduate students specializing in this subject.

  11. Effective mass approximation versus full atomistic model to calculate the output characteristics of a gate-all-around germanium nanowire field effect transistor (GAA-GeNW-FET)

    Science.gov (United States)

    Bayani, Amir Hossein; Voves, Jan; Dideban, Daryoosh

    2018-01-01

    Here, we compare the output characteristics of a gate-all-around germanium nanowire field effect transistor (GAA-GeNW-FET) with 2.36 nm2 square cross-section area using tight-binding (TB) sp3d5s∗ model (full atomistic model (FAM)) and effective mass approximation (EMA). Synopsys/QuantumWise Atomistix ToolKit (ATK) and Silvaco Atlas3D are used to consider the TB model and EMA, respectively. Results show that EMA predicted only one quantum state (QS) for quantum transport, whereas FAM predicted three QSs. A cosine function behavior is obtained by both methods for the first quantum state. The calculated bandgap value by EMA is almost twice smaller than that of the FAM. Also, a fluctuating current is predicted by both methods but in different oscillation values.

  12. Suppression of tunneling leakage current in junctionless nanowire transistors

    International Nuclear Information System (INIS)

    Lou, Haijun; Li, Dan; Dong, Yan; Lin, Xinnan; He, Jin; Yang, Shengqi; Chan, Mansun

    2013-01-01

    In this paper, the characteristics of tunneling leakage current for the dual-material gate junctionless nanowire transistor (DMG-JNT) are investigated by three-dimensional numerical simulations and compared with conventional junctionless nanowire transistor (JNT). The suppression of the tunneling leakage current on the JNT by introducing an energy band step with the DMG structure is verified and presented for the first time. The effects of channel length on the DMG-JNT and the JNT are also studied. Results showed that the tunneling leakage current of the DMG-JNT is two orders smaller than that of the JNT, and further, the DMG-JNT exhibits superior scaling capability. Two key design parameters of the DMG-JNT, control gate ratio (Ra) and work function difference (δW), have been optimized and the optimal ranges of Ra and δW are pointed out. (paper)

  13. Suppression of tunneling leakage current in junctionless nanowire transistors

    Science.gov (United States)

    Lou, Haijun; Li, Dan; Dong, Yan; Lin, Xinnan; He, Jin; Yang, Shengqi; Chan, Mansun

    2013-12-01

    In this paper, the characteristics of tunneling leakage current for the dual-material gate junctionless nanowire transistor (DMG-JNT) are investigated by three-dimensional numerical simulations and compared with conventional junctionless nanowire transistor (JNT). The suppression of the tunneling leakage current on the JNT by introducing an energy band step with the DMG structure is verified and presented for the first time. The effects of channel length on the DMG-JNT and the JNT are also studied. Results showed that the tunneling leakage current of the DMG-JNT is two orders smaller than that of the JNT, and further, the DMG-JNT exhibits superior scaling capability. Two key design parameters of the DMG-JNT, control gate ratio (Ra) and work function difference (δW), have been optimized and the optimal ranges of Ra and δW are pointed out.

  14. Improved sensing characteristics of dual-gate transistor sensor using silicon nanowire arrays defined by nanoimprint lithography

    Science.gov (United States)

    Lim, Cheol-Min; Lee, In-Kyu; Lee, Ki Joong; Oh, Young Kyoung; Shin, Yong-Beom; Cho, Won-Ju

    2017-12-01

    This work describes the construction of a sensitive, stable, and label-free sensor based on a dual-gate field-effect transistor (DG FET), in which uniformly distributed and size-controlled silicon nanowire (SiNW) arrays by nanoimprint lithography act as conductor channels. Compared to previous DG FETs with a planar-type silicon channel layer, the constructed SiNW DG FETs exhibited superior electrical properties including a higher capacitive-coupling ratio of 18.0 and a lower off-state leakage current under high-temperature stress. In addition, while the conventional planar single-gate (SG) FET- and planar DG FET-based pH sensors showed the sensitivities of 56.7 mV/pH and 439.3 mV/pH, respectively, the SiNW DG FET-based pH sensors showed not only a higher sensitivity of 984.1 mV/pH, but also a lower drift rate of 0.8% for pH-sensitivity. This demonstrates that the SiNW DG FETs simultaneously achieve high sensitivity and stability, with significant potential for future biosensing applications.

  15. Fully transparent thin-film transistor devices based on SnO2 nanowires.

    Science.gov (United States)

    Dattoli, Eric N; Wan, Qing; Guo, Wei; Chen, Yanbin; Pan, Xiaoqing; Lu, Wei

    2007-08-01

    We report on studies of field-effect transistor (FET) and transparent thin-film transistor (TFT) devices based on lightly Ta-doped SnO2 nano-wires. The nanowire-based devices exhibit uniform characteristics with average field-effect mobilities exceeding 100 cm2/V x s. Prototype nano-wire-based TFT (NW-TFT) devices on glass substrates showed excellent optical transparency and transistor performance in terms of transconductance, bias voltage range, and on/off ratio. High on-currents and field-effect mobilities were obtained from the NW-TFT devices even at low nanowire coverage. The SnO2 nanowire-based TFT approach offers a number of desirable properties such as low growth cost, high electron mobility, and optical transparency and low operation voltage, and may lead to large-scale applications of transparent electronics on diverse substrates.

  16. Deformable Organic Nanowire Field-Effect Transistors.

    Science.gov (United States)

    Lee, Yeongjun; Oh, Jin Young; Kim, Taeho Roy; Gu, Xiaodan; Kim, Yeongin; Wang, Ging-Ji Nathan; Wu, Hung-Chin; Pfattner, Raphael; To, John W F; Katsumata, Toru; Son, Donghee; Kang, Jiheong; Matthews, James R; Niu, Weijun; He, Mingqian; Sinclair, Robert; Cui, Yi; Tok, Jeffery B-H; Lee, Tae-Woo; Bao, Zhenan

    2018-02-01

    Deformable electronic devices that are impervious to mechanical influence when mounted on surfaces of dynamically changing soft matters have great potential for next-generation implantable bioelectronic devices. Here, deformable field-effect transistors (FETs) composed of single organic nanowires (NWs) as the semiconductor are presented. The NWs are composed of fused thiophene diketopyrrolopyrrole based polymer semiconductor and high-molecular-weight polyethylene oxide as both the molecular binder and deformability enhancer. The obtained transistors show high field-effect mobility >8 cm 2 V -1 s -1 with poly(vinylidenefluoride-co-trifluoroethylene) polymer dielectric and can easily be deformed by applied strains (both 100% tensile and compressive strains). The electrical reliability and mechanical durability of the NWs can be significantly enhanced by forming serpentine-like structures of the NWs. Remarkably, the fully deformable NW FETs withstand 3D volume changes (>1700% and reverting back to original state) of a rubber balloon with constant current output, on the surface of which it is attached. The deformable transistors can robustly operate without noticeable degradation on a mechanically dynamic soft matter surface, e.g., a pulsating balloon (pulse rate: 40 min -1 (0.67 Hz) and 40% volume expansion) that mimics a beating heart, which underscores its potential for future biomedical applications. © 2018 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  17. Fabrication of a Silicon Nanowire on a Bulk Substrate by Use of a Plasma Etching and Total Ionizing Dose Effects on a Gate-All-Around Field-Effect Transistor

    Science.gov (United States)

    Moon, Dong-Il; Han, Jin-Woo; Meyyappan, Meyya

    2016-01-01

    The gate all around transistor is investigated through experiment. The suspended silicon nanowire for the next generation is fabricated on bulk substrate by plasma etching method. The scallop pattern generated by Bosch process is utilized to form a floating silicon nanowire. By combining anisotropic and istropic silicon etch process, the shape of nanowire is accurately controlled. From the suspended nanowire, the gate all around transistor is demonstrated. As the silicon nanowire is fully surrounded by the gate, the device shows excellent electrostatic characteristics.

  18. Resonant tunnelling features in a suspended silicon nanowire single-hole transistor

    Energy Technology Data Exchange (ETDEWEB)

    Llobet, Jordi; Pérez-Murano, Francesc, E-mail: francesc.perez@csic.es, E-mail: z.durrani@imperial.ac.uk [Institut de Microelectrònica de Barcelona (IMB-CNM CSIC), Campus UAB, E-08193 Bellaterra, Catalonia (Spain); Krali, Emiljana; Wang, Chen; Jones, Mervyn E.; Durrani, Zahid A. K., E-mail: francesc.perez@csic.es, E-mail: z.durrani@imperial.ac.uk [Department of Electrical and Electronic Engineering, Imperial College London, South Kensington, London SW7 2AZ (United Kingdom); Arbiol, Jordi [Institució Catalana de Recerca i Estudis Avançats (ICREA) and Institut Català de Nanociència i Nanotecnologia (ICN2), Campus UAB, 08193 Bellaterra, Catalonia (Spain); CELLS-ALBA Synchrotron Light Facility, 08290 Cerdanyola, Catalonia (Spain)

    2015-11-30

    Suspended silicon nanowires have significant potential for a broad spectrum of device applications. A suspended p-type Si nanowire incorporating Si nanocrystal quantum dots has been used to form a single-hole transistor. Transistor fabrication uses a novel and rapid process, based on focused gallium ion beam exposure and anisotropic wet etching, generating <10 nm nanocrystals inside suspended Si nanowires. Electrical characteristics at 10 K show Coulomb diamonds with charging energy ∼27 meV, associated with a single dominant nanocrystal. Resonant tunnelling features with energy spacing ∼10 meV are observed, parallel to both diamond edges. These may be associated either with excited states or hole–acoustic phonon interactions, in the nanocrystal. In the latter case, the energy spacing corresponds well with reported Raman spectroscopy results and phonon spectra calculations.

  19. An innovative large scale integration of silicon nanowire-based field effect transistors

    Science.gov (United States)

    Legallais, M.; Nguyen, T. T. T.; Mouis, M.; Salem, B.; Robin, E.; Chenevier, P.; Ternon, C.

    2018-05-01

    Since the early 2000s, silicon nanowire field effect transistors are emerging as ultrasensitive biosensors while offering label-free, portable and rapid detection. Nevertheless, their large scale production remains an ongoing challenge due to time consuming, complex and costly technology. In order to bypass these issues, we report here on the first integration of silicon nanowire networks, called nanonet, into long channel field effect transistors using standard microelectronic process. A special attention is paid to the silicidation of the contacts which involved a large number of SiNWs. The electrical characteristics of these FETs constituted by randomly oriented silicon nanowires are also studied. Compatible integration on the back-end of CMOS readout and promising electrical performances open new opportunities for sensing applications.

  20. Resonant tunnelling features in a suspended silicon nanowire single-hole transistor

    International Nuclear Information System (INIS)

    Llobet, Jordi; Pérez-Murano, Francesc; Krali, Emiljana; Wang, Chen; Jones, Mervyn E.; Durrani, Zahid A. K.; Arbiol, Jordi

    2015-01-01

    Suspended silicon nanowires have significant potential for a broad spectrum of device applications. A suspended p-type Si nanowire incorporating Si nanocrystal quantum dots has been used to form a single-hole transistor. Transistor fabrication uses a novel and rapid process, based on focused gallium ion beam exposure and anisotropic wet etching, generating <10 nm nanocrystals inside suspended Si nanowires. Electrical characteristics at 10 K show Coulomb diamonds with charging energy ∼27 meV, associated with a single dominant nanocrystal. Resonant tunnelling features with energy spacing ∼10 meV are observed, parallel to both diamond edges. These may be associated either with excited states or hole–acoustic phonon interactions, in the nanocrystal. In the latter case, the energy spacing corresponds well with reported Raman spectroscopy results and phonon spectra calculations

  1. Polymer-electrolyte-gated nanowire synaptic transistors for neuromorphic applications

    Science.gov (United States)

    Zou, Can; Sun, Jia; Gou, Guangyang; Kong, Ling-An; Qian, Chuan; Dai, Guozhang; Yang, Junliang; Guo, Guang-hua

    2017-09-01

    Polymer-electrolytes are formed by dissolving a salt in polymer instead of water, the conducting mechanism involves the segmental motion-assisted diffusion of ion in the polymer matrix. Here, we report on the fabrication of tin oxide (SnO2) nanowire synaptic transistors using polymer-electrolyte gating. A thin layer of poly(ethylene oxide) and lithium perchlorate (PEO/LiClO4) was deposited on top of the devices, which was used to boost device performances. A voltage spike applied on the in-plane gate attracts ions toward the polymer-electrolyte/SnO2 nanowire interface and the ions are gradually returned after the pulse is removed, which can induce a dynamic excitatory postsynaptic current in the nanowire channel. The SnO2 synaptic transistors exhibit the behavior of short-term plasticity like the paired-pulse facilitation and self-adaptation, which is related to the electric double-effect regulation. In addition, the synaptic logic functions and the logical function transformation are also discussed. Such single SnO2 nanowire-based synaptic transistors are of great importance for future neuromorphic devices.

  2. Gas Sensors Based on Semiconducting Nanowire Field-Effect Transistors

    Directory of Open Access Journals (Sweden)

    Ping Feng

    2014-09-01

    Full Text Available One-dimensional semiconductor nanostructures are unique sensing materials for the fabrication of gas sensors. In this article, gas sensors based on semiconducting nanowire field-effect transistors (FETs are comprehensively reviewed. Individual nanowires or nanowire network films are usually used as the active detecting channels. In these sensors, a third electrode, which serves as the gate, is used to tune the carrier concentration of the nanowires to realize better sensing performance, including sensitivity, selectivity and response time, etc. The FET parameters can be modulated by the presence of the target gases and their change relate closely to the type and concentration of the gas molecules. In addition, extra controls such as metal decoration, local heating and light irradiation can be combined with the gate electrode to tune the nanowire channel and realize more effective gas sensing. With the help of micro-fabrication techniques, these sensors can be integrated into smart systems. Finally, some challenges for the future investigation and application of nanowire field-effect gas sensors are discussed.

  3. Nanowire transistors physics of devices and materials in one dimension

    CERN Document Server

    Colinge, Jean-Pierre

    2016-01-01

    From quantum mechanical concepts to practical circuit applications, this book presents a self-contained and up-to-date account of the physics and technology of nanowire semiconductor devices. It includes a unified account of the critical ideas central to low-dimensional physics and transistor physics which equips readers with a common framework and language to accelerate scientific and technological developments across the two fields. Detailed descriptions of novel quantum mechanical effects such as quantum current oscillations, the metal-to-semiconductor transition and the transition from classical transistor to single-electron transistor operation are described in detail, in addition to real-world applications in the fields of nanoelectronics, biomedical sensing techniques, and advanced semiconductor research. Including numerous illustrations to help readers understand these phenomena, this is an essential resource for researchers and professional engineers working on semiconductor devices and materials in ...

  4. ON current enhancement of nanowire Schottky barrier tunnel field effect transistors

    Science.gov (United States)

    Takei, Kohei; Hashimoto, Shuichiro; Sun, Jing; Zhang, Xu; Asada, Shuhei; Xu, Taiyu; Matsukawa, Takashi; Masahara, Meishoku; Watanabe, Takanobu

    2016-04-01

    Silicon nanowire Schottky barrier tunnel field effect transistors (NW-SBTFETs) are promising structures for high performance devices. In this study, we fabricated NW-SBTFETs to investigate the effect of nanowire structure on the device characteristics. The NW-SBTFETs were operated with a backgate bias, and the experimental results demonstrate that the ON current density is enhanced by narrowing the width of the nanowire. We confirmed using the Fowler-Nordheim plot that the drain current in the ON state mainly comprises the quantum tunneling component through the Schottky barrier. Comparison with a technology computer aided design (TCAD) simulation revealed that the enhancement is attributed to the electric field concentration at the corners of cross-section of the NW. The study findings suggest an effective approach to securing the ON current by Schottky barrier width modulation.

  5. Are Nanotube Architectures More Advantageous Than Nanowire Architectures For Field Effect Transistors?

    KAUST Repository

    Fahad, Hossain M.

    2012-06-27

    Decade long research in 1D nanowire field effect transistors (FET) shows although it has ultra-low off-state leakage current and a single device uses a very small area, its drive current generation per device is extremely low. Thus it requires arrays of nanowires to be integrated together to achieve appreciable amount of current necessary for high performance computation causing an area penalty and compromised functionality. Here we show that a FET with a nanotube architecture and core-shell gate stacks is capable of achieving the desirable leakage characteristics of the nanowire FET while generating a much larger drive current with area efficiency. The core-shell gate stacks of silicon nanotube FETs tighten the electrostatic control and enable volume inversion mode operation leading to improved short channel behavior and enhanced performance. Our comparative study is based on semi-classical transport models with quantum confinement effects which offers new opportunity for future generation high performance computation.

  6. Numerical analysis of band tails in nanowires and their effects on the performance of tunneling field-effect transistors

    Science.gov (United States)

    Tanaka, Takahisa; Uchida, Ken

    2018-06-01

    Band tails in heavily doped semiconductors are one of the important parameters that determine transfer characteristics of tunneling field-effect transistors. In this study, doping concentration and doing profile dependences of band tails in heavily doped Si nanowires were analyzed by a nonequilibrium Green function method. From the calculated band tails, transfer characteristics of nanowire tunnel field-effect transistors were numerically analyzed by Wentzel–Kramer–Brillouin approximation with exponential barriers. The calculated transfer characteristics demonstrate that the band tails induced by dopants degrade the subthreshold slopes of Si nanowires from 5 to 56 mV/dec in the worst case. On the other hand, surface doping leads to a high drain current while maintaining a small subthreshold slope.

  7. The fabrication of ZnO nanowire field-effect transistors by roll-transfer printing

    Science.gov (United States)

    Chang, Yi-Kuei; Hong, Franklin Chau-Nan

    2009-05-01

    A method with the potential to fabricate large-area nanowire field-effect transistors (NW-FETs) was demonstrated in this study. Using a high-speed roller (20-80 cm min-1), transfer printing was successfully employed to transfer vertically aligned zinc oxide (ZnO) nanowires grown on a donor substrate to a polydimethylsiloxane (PDMS) stamp and then print the ordered ZnO nanowire arrays on the received substrate for the fabrication of NW-FETs. ZnO NW-FETs fabricated by this method exhibit high performances with a threshold voltage of around 0.25 V, a current on/off ratio as high as 105, a subthreshold slope of 360 mV/dec, and a field-effect mobility of around 90 cm2 V-1 s-1. The excellent device characteristics suggest that the roll-transfer printing technique, which is compatible with the roll-to-roll (R2R) process and operated in atmosphere, has a good potential for the high-speed fabrication of large-area nanowire transistors for flexible devices and flat panel displays.

  8. The fabrication of ZnO nanowire field-effect transistors by roll-transfer printing

    International Nuclear Information System (INIS)

    Chang, Y-K; Hong, Franklin Chau-Nan

    2009-01-01

    A method with the potential to fabricate large-area nanowire field-effect transistors (NW-FETs) was demonstrated in this study. Using a high-speed roller (20-80 cm min -1 ), transfer printing was successfully employed to transfer vertically aligned zinc oxide (ZnO) nanowires grown on a donor substrate to a polydimethylsiloxane (PDMS) stamp and then print the ordered ZnO nanowire arrays on the received substrate for the fabrication of NW-FETs. ZnO NW-FETs fabricated by this method exhibit high performances with a threshold voltage of around 0.25 V, a current on/off ratio as high as 10 5 , a subthreshold slope of 360 mV/dec, and a field-effect mobility of around 90 cm 2 V -1 s -1 . The excellent device characteristics suggest that the roll-transfer printing technique, which is compatible with the roll-to-roll (R2R) process and operated in atmosphere, has a good potential for the high-speed fabrication of large-area nanowire transistors for flexible devices and flat panel displays.

  9. The fabrication of ZnO nanowire field-effect transistors by roll-transfer printing

    Energy Technology Data Exchange (ETDEWEB)

    Chang, Y-K; Hong, Franklin Chau-Nan [Department of Chemical Engineering, National Cheng Kung University, 1 University Road, Tainan 70101, Taiwan (China)], E-mail: hong@mail.ncku.edu.tw

    2009-05-13

    A method with the potential to fabricate large-area nanowire field-effect transistors (NW-FETs) was demonstrated in this study. Using a high-speed roller (20-80 cm min{sup -1}), transfer printing was successfully employed to transfer vertically aligned zinc oxide (ZnO) nanowires grown on a donor substrate to a polydimethylsiloxane (PDMS) stamp and then print the ordered ZnO nanowire arrays on the received substrate for the fabrication of NW-FETs. ZnO NW-FETs fabricated by this method exhibit high performances with a threshold voltage of around 0.25 V, a current on/off ratio as high as 10{sup 5}, a subthreshold slope of 360 mV/dec, and a field-effect mobility of around 90 cm{sup 2} V{sup -1} s{sup -1}. The excellent device characteristics suggest that the roll-transfer printing technique, which is compatible with the roll-to-roll (R2R) process and operated in atmosphere, has a good potential for the high-speed fabrication of large-area nanowire transistors for flexible devices and flat panel displays.

  10. Ballistic Spin Field Effect Transistor Based on Silicon Nanowires

    Science.gov (United States)

    Osintsev, Dmitri; Sverdlov, Viktor; Stanojevic, Zlatan; Selberherr, Siegfried

    2011-03-01

    We investigate the properties of ballistic spin field-effect transistors build on silicon nanowires. An accurate description of the conduction band based on the k . p} model is necessary in thin and narrow silicon nanostructures. The subband effective mass and subband splitting dependence on the nanowire dimensions is analyzed and used in the transport calculations. The spin transistor is formed by sandwiching the nanowire between two ferromagnetic metallic contacts. Delta-function barriers at the interfaces between the contacts and the silicon channel are introduced. The major contribution to the electric field-dependent spin-orbit interaction in confined silicon systems is due to the interface-induced inversion asymmetry which is of the Dresselhaus type. We study the current and conductance through the system for the contacts being in parallel and anti-parallel configurations. Differences between the [100] and [110] orientated structures are investigated in details. This work is supported by the European Research Council through the grant #247056 MOSILSPIN.

  11. Effect of atomic layer deposition temperature on the performance of top-down ZnO nanowire transistors

    Science.gov (United States)

    2014-01-01

    This paper studies the effect of atomic layer deposition (ALD) temperature on the performance of top-down ZnO nanowire transistors. Electrical characteristics are presented for 10-μm ZnO nanowire field-effect transistors (FETs) and for deposition temperatures in the range 120°C to 210°C. Well-behaved transistor output characteristics are obtained for all deposition temperatures. It is shown that the maximum field-effect mobility occurs for an ALD temperature of 190°C. This maximum field-effect mobility corresponds with a maximum Hall effect bulk mobility and with a ZnO film that is stoichiometric. The optimized transistors have a field-effect mobility of 10 cm2/V.s, which is approximately ten times higher than can typically be achieved in thin-film amorphous silicon transistors. Furthermore, simulations indicate that the drain current and field-effect mobility extraction are limited by the contact resistance. When the effects of contact resistance are de-embedded, a field-effect mobility of 129 cm2/V.s is obtained. This excellent result demonstrates the promise of top-down ZnO nanowire technology for a wide variety of applications such as high-performance thin-film electronics, flexible electronics, and biosensing. PMID:25276107

  12. Fabrication of double-dot single-electron transistor in silicon nanowire

    International Nuclear Information System (INIS)

    Jo, Mingyu; Kaizawa, Takuya; Arita, Masashi; Fujiwara, Akira; Ono, Yukinori; Inokawa, Hiroshi; Choi, Jung-Bum; Takahashi, Yasuo

    2010-01-01

    We propose a simple method for fabricating Si single-electron transistors (SET) with coupled dots by means of a pattern-dependent-oxidation (PADOX) method. The PADOX method is known to convert a small one-dimensional Si wire formed on a silicon-on-insulator (SOI) substrate into a SET automatically. We fabricated a double-dot Si SET when we oxidized specially designed Si nanowires formed on SOI substrates. We analyzed the measured electrical characteristics by fitting the measurement and simulation results and confirmed the double-dot formation and the position of the two dots in the Si wire.

  13. Coaxial-structured ZnO/silicon nanowires extended-gate field-effect transistor as pH sensor

    International Nuclear Information System (INIS)

    Li, Hung-Hsien; Yang, Chi-En; Kei, Chi-Chung; Su, Chung-Yi; Dai, Wei-Syuan; Tseng, Jung-Kuei; Yang, Po-Yu; Chou, Jung-Chuan; Cheng, Huang-Chung

    2013-01-01

    An extended-gate field-effect transistor (EGFET) of coaxial-structured ZnO/silicon nanowires as pH sensor was demonstrated in this paper. The oriented 1-μm-long silicon nanowires with the diameter of about 50 nm were vertically synthesized by the electroless metal deposition method at room temperature and were sequentially capped with the ZnO films using atomic layer deposition at 50 °C. The transfer characteristics (I DS –V REF ) of such ZnO/silicon nanowire EGFET sensor exhibited the sensitivity and linearity of 46.25 mV/pH and 0.9902, respectively for the different pH solutions (pH 1–pH 13). In contrast to the ZnO thin-film ones, the ZnO/silicon nanowire EGFET sensor achieved much better sensitivity and superior linearity. It was attributed to a high surface-to-volume ratio of the nanowire structures, reflecting a larger effective sensing area. The output voltage and time characteristics were also measured to indicate good reliability and durability for the ZnO/silicon nanowires sensor. Furthermore, the hysteresis was 9.74 mV after the solution was changed as pH 7 → pH 3 → pH 7 → pH 11 → pH 7. - Highlights: ► Coaxial-structured ZnO/silicon nanowire EGFET was demonstrated as pH sensor. ► EMD and ALD methods were proposed to fabricate ZnO/silicon nanowires. ► ZnO/silicon nanowire EGFET sensor achieved better sensitivity and linearity. ► ZnO/silicon nanowire EGFET sensor had good reliability and durability

  14. Mode tunable p-type Si nanowire transistor based zero drive load logic inverter.

    Science.gov (United States)

    Moon, Kyeong-Ju; Lee, Tae-Il; Lee, Sang-Hoon; Han, Young-Uk; Ham, Moon-Ho; Myoung, Jae-Min

    2012-07-25

    A design platform for a zero drive load logic inverter consisting of p-channel Si nanowire based transistors, which controlled their operating mode through an implantation into a gate dielectric layer was demonstrated. As a result, a nanowire based class D inverter having a 4.6 gain value at V(DD) of -20 V was successfully fabricated on a substrate.

  15. The influence of atmosphere on performance of pure-phase WZ and ZB InAs nanowire transistors.

    Science.gov (United States)

    Ullah, Abu Rifat; Joyce, Hannah J; Tan, Hoe; Jagadish, Chennupati; Micolich, Adam P

    2017-09-21

    We compare the characteristics of phase-pure MOCVD grown ZB and WZ InAs nanowire transistors in several atmospheres: air, dry pure N2 and O2, and N2 bubbled through liquid H2O and alcohols to identify whether phase-related structural/surface differences affect their response. Both WZ and ZB give poor gate characteristics in dry state. Adsorption of polar species reduces off-current by 2-3 orders of magnitude, increases on-off ratio and significantly reduces sub-threshold slope. The key difference is the greater sensitivity of WZ to low adsorbate level. We attribute this to facet structure and its influence on the separation between conduction electrons and surface adsorption sites. We highlight the important role adsorbed species play in nanowire device characterisation. WZ is commonly thought superior to ZB in InAs nanowire transistors. We show this is an artefact of the moderate humidity found in ambient laboratory conditions: WZ and ZB perform equally poorly in the dry gas limit yet equally well in the wet gas limit. We also highlight the vital role density-lowering disorder has in improving gate characteristics, be it stacking faults in mixed-phase WZ or surface adsorbates in pure-phase nanowires. © 2017 IOP Publishing Ltd.

  16. The influence of atmosphere on the performance of pure-phase WZ and ZB InAs nanowire transistors

    Science.gov (United States)

    Ullah, A. R.; Joyce, H. J.; Tan, H. H.; Jagadish, C.; Micolich, A. P.

    2017-11-01

    We compare the characteristics of phase-pure MOCVD grown ZB and WZ InAs nanowire transistors in several atmospheres: air, dry pure N2 and O2, and N2 bubbled through liquid H2O and alcohols to identify whether phase-related structural/surface differences affect their response. Both WZ and ZB give poor gate characteristics in dry state. Adsorption of polar species reduces off-current by 2-3 orders of magnitude, increases on-off ratio and significantly reduces sub-threshold slope. The key difference is the greater sensitivity of WZ to low adsorbate level. We attribute this to facet structure and its influence on the separation between conduction electrons and surface adsorption sites. We highlight the important role adsorbed species play in nanowire device characterisation. WZ is commonly thought superior to ZB in InAs nanowire transistors. We show this is an artefact of the moderate humidity found in ambient laboratory conditions: WZ and ZB perform equally poorly in the dry gas limit yet equally well in the wet gas limit. We also highlight the vital role density-lowering disorder has in improving gate characteristics, be it stacking faults in mixed-phase WZ or surface adsorbates in pure-phase nanowires.

  17. Direct observation of single-charge-detection capability of nanowire field-effect transistors.

    Science.gov (United States)

    Salfi, J; Savelyev, I G; Blumin, M; Nair, S V; Ruda, H E

    2010-10-01

    A single localized charge can quench the luminescence of a semiconductor nanowire, but relatively little is known about the effect of single charges on the conductance of the nanowire. In one-dimensional nanostructures embedded in a material with a low dielectric permittivity, the Coulomb interaction and excitonic binding energy are much larger than the corresponding values when embedded in a material with the same dielectric permittivity. The stronger Coulomb interaction is also predicted to limit the carrier mobility in nanowires. Here, we experimentally isolate and study the effect of individual localized electrons on carrier transport in InAs nanowire field-effect transistors, and extract the equivalent charge sensitivity. In the low carrier density regime, the electrostatic potential produced by one electron can create an insulating weak link in an otherwise conducting nanowire field-effect transistor, modulating its conductance by as much as 4,200% at 31 K. The equivalent charge sensitivity, 4 × 10(-5) e Hz(-1/2) at 25 K and 6 × 10(-5) e Hz(-1/2) at 198 K, is orders of magnitude better than conventional field-effect transistors and nanoelectromechanical systems, and is just a factor of 20-30 away from the record sensitivity for state-of-the-art single-electron transistors operating below 4 K (ref. 8). This work demonstrates the feasibility of nanowire-based single-electron memories and illustrates a physical process of potential relevance for high performance chemical sensors. The charge-state-detection capability we demonstrate also makes the nanowire field-effect transistor a promising host system for impurities (which may be introduced intentionally or unintentionally) with potentially long spin lifetimes, because such transistors offer more sensitive spin-to-charge conversion readout than schemes based on conventional field-effect transistors.

  18. Nanowire field-effect transistors for gas sensor applications

    Science.gov (United States)

    Constantinou, Marios

    Sensing BTEX (Benzene, Ethylbenzene, Toluene, Xylene) pollutants is of utmost importance to reduce health risk and ensure public safety. The lack of sensitivity and selectivity of the current gas sensors and the limited number of available technologies in the field of BTEX-sensing raises the demand for the development of high-performance gas sensors for BTEX applications. The scope of this thesis is the fabrication and characterisation of high-quality field-effect transistors (FETs), with functionalised silicon nanowires (SiNWs), for the selective sensing of benzene vs. other BTEX gases. This research addresses three main challenges in SiNW FET-sensor device development: i) controllable and reproducible assembly of high-quality SiNWs for FET sensor devices using the method of dielectrophoresis (DEP), ii) almost complete elimination of harmful hysteresis effect in the SiNW FET current-voltage characteristics induced by surface states using DMF solvent, iii) selective sensing of benzene with up to ppb range of sensitivity using calix[4]arene-derivatives. It is experimentally demonstrated that frequency-controlled DEP is a powerful tool for the selection and collection of semiconducting SiNWs with advanced electrical and morphological properties, from a poly-disperse as-synthesised NWs. The DEP assembly method also leads to a controllable and reproducible fabrication of high-quality NW-based FETs. The results highlight the superiority of DEP, performed at high signal frequencies (5-20 MHz) to selectively assemble only high-quality NWs which can respond to such high DEP frequencies. The SiNW FETs, with NWs collected at high DEP frequencies, have high mobility (≈50 cm2 V-1 s-1), low sub-threshold-swing (≈1.26 V/decade), high on-current (up to 3 mA) and high on/off ratio (106-107). The DEP NW selection is also demonstrated using an industrially scalable method, to allow establishing of NW response characteristics to different DEP frequencies in a very short time

  19. A III-V nanowire channel on silicon for high-performance vertical transistors.

    Science.gov (United States)

    Tomioka, Katsuhiro; Yoshimura, Masatoshi; Fukui, Takashi

    2012-08-09

    Silicon transistors are expected to have new gate architectures, channel materials and switching mechanisms in ten years' time. The trend in transistor scaling has already led to a change in gate structure from two dimensions to three, used in fin field-effect transistors, to avoid problems inherent in miniaturization such as high off-state leakage current and the short-channel effect. At present, planar and fin architectures using III-V materials, specifically InGaAs, are being explored as alternative fast channels on silicon because of their high electron mobility and high-quality interface with gate dielectrics. The idea of surrounding-gate transistors, in which the gate is wrapped around a nanowire channel to provide the best possible electrostatic gate control, using InGaAs channels on silicon, however, has been less well investigated because of difficulties in integrating free-standing InGaAs nanostructures on silicon. Here we report the position-controlled growth of vertical InGaAs nanowires on silicon without any buffering technique and demonstrate surrounding-gate transistors using InGaAs nanowires and InGaAs/InP/InAlAs/InGaAs core-multishell nanowires as channels. Surrounding-gate transistors using core-multishell nanowire channels with a six-sided, high-electron-mobility transistor structure greatly enhance the on-state current and transconductance while keeping good gate controllability. These devices provide a route to making vertically oriented transistors for the next generation of field-effect transistors and may be useful as building blocks for wireless networks on silicon platforms.

  20. Photo-assisted hysteresis of electronic transport for ZnO nanowire transistors

    Science.gov (United States)

    Du, Qianqian; Ye, Jiandong; Xu, Zhonghua; Zhu, Shunming; Tang, Kun; Gu, Shulin; Zheng, Youdou

    2018-03-01

    Recently, ZnO nanowire field effect transistors (FETs) have received renewed interest due to their extraordinary low dimensionality and high sensitivity to external chemical environments and illumination conditions. These prominent properties have promising potential in nanoscale chemical and photo-sensors. In this article, we have fabricated ZnO nanowire FETs and have found hysteresis behavior in their transfer characteristics. The mechanism and dynamics of the hysteresis phenomena have been investigated in detail by varying the sweeping rate and range of the gate bias with and without light irradiation. Significantly, light irradiation is of great importance on charge trapping by regulating adsorption and desorption of oxygen at the interface of ZnO/SiO2. Carriers excited by light irradiation can dramatically promote trapping/detrapping processes. With the assistance of light illumination, we have demonstrated a photon-assisted nonvolatile memory which employs the ZnO nanowire FET. The device exhibits reliable programming/erasing operations and a large on/off ratio. The proposed proto-type memory has thus provided a possible novel path for creating a memory functionality to other low-dimensional material systems.

  1. Local sensor based on nanowire field effect transistor from inhomogeneously doped silicon on insulator

    Science.gov (United States)

    Presnov, Denis E.; Bozhev, Ivan V.; Miakonkikh, Andrew V.; Simakin, Sergey G.; Trifonov, Artem S.; Krupenin, Vladimir A.

    2018-02-01

    We present the original method for fabricating a sensitive field/charge sensor based on field effect transistor (FET) with a nanowire channel that uses CMOS-compatible processes only. A FET with a kink-like silicon nanowire channel was fabricated from the inhomogeneously doped silicon on insulator wafer very close (˜100 nm) to the extremely sharp corner of a silicon chip forming local probe. The single e-beam lithographic process with a shadow deposition technique, followed by separate two reactive ion etching processes, was used to define the narrow semiconductor nanowire channel. The sensors charge sensitivity was evaluated to be in the range of 0.1-0.2 e /√{Hz } from the analysis of their transport and noise characteristics. The proposed method provides a good opportunity for the relatively simple manufacture of a local field sensor for measuring the electrical field distribution, potential profiles, and charge dynamics for a wide range of mesoscopic objects. Diagnostic systems and devices based on such sensors can be used in various fields of physics, chemistry, material science, biology, electronics, medicine, etc.

  2. Interface studies of N2 plasma-treated ZnSnO nanowire transistors using low-frequency noise measurements

    International Nuclear Information System (INIS)

    Kim, Seongmin; Janes, David B; Kim, Hwansoo; Ju, Sanghyun

    2013-01-01

    Due to the large surface-to-volume ratio of nanowires, the quality of nanowire–insulator interfaces as well as the nanowire surface characteristics significantly influence the electrical characteristics of nanowire transistors (NWTs). To improve the electrical characteristics by doping or post-processing, it is important to evaluate the interface characteristics and stability of NWTs. In this study, we have synthesized ZnSnO (ZTO) nanowires using the chemical vapor deposition method, characterized the composition of ZTO nanowires using x-ray photoelectron spectroscopy, and fabricated ZTO NWTs. We have characterized the current–voltage characteristics and low-frequency noise of ZTO NWTs in order to investigate the effects of interface states on subthreshold slope (SS) and the noise before and after N 2 plasma treatments. The as-fabricated device exhibited a SS of 0.29 V/dec and Hooge parameter of ∼1.20 × 10 −2 . Upon N 2 plasma treatment with N 2 gas flow rate of 40 sccm (20 sccm), the SS improved to 0.12 V/dec (0.21 V/dec) and the Hooge parameter decreased to ∼4.99 × 10 −3 (8.14 × 10 −3 ). The interface trap densities inferred from both SS and low-frequency noise decrease upon plasma treatment, with the highest flow rate yielding the smallest trap density. These results demonstrate that the N 2 plasma treatment decreases the interface trap states and defects on ZTO nanowires, thereby enabling the fabrication of high-quality nanowire interfaces. (paper)

  3. Performance analysis and simulation of vertical gallium nitride nanowire transistors

    Science.gov (United States)

    Witzigmann, Bernd; Yu, Feng; Frank, Kristian; Strempel, Klaas; Fatahilah, Muhammad Fahlesa; Schumacher, Hans Werner; Wasisto, Hutomo Suryo; Römer, Friedhard; Waag, Andreas

    2018-06-01

    Gallium nitride (GaN) nanowire transistors are analyzed using hydrodynamic simulation. Both p-body and n-body devices are compared in terms of threshold voltage, saturation behavior and transconductance. The calculations are calibrated using experimental data. The threshold voltage can be tuned from enhancement to depletion mode with wire doping. Surface states cause a shift of threshold voltage and saturation current. The saturation current depends on the gate design, with a composite gate acting as field plate in the p-body device. He joined Bell Laboratories, Murray Hill, NJ, as a Technical Staff Member. In October 2001, he joined the Optical Access and Transport Division, Agere Systems, Alhambra, CA. In 2004, he was appointed an Assistant Professor at ETH Zurich,. Since 2008, at the University of Kassel, Kassel, Germany, and he has been a Professor the Head of the Computational Electronics and Photonics Group, and co-director of CINSaT since 2010. His research interests include computational optoelectronics, process and device design of semiconductor photonic devices, microwave components, and electromagnetics modeling for nanophotonics. Dr. Witzigmann is a senior member of the SPIE and IEEE.

  4. Vertical architecture for enhancement mode power transistors based on GaN nanowires

    Science.gov (United States)

    Yu, F.; Rümmler, D.; Hartmann, J.; Caccamo, L.; Schimpke, T.; Strassburg, M.; Gad, A. E.; Bakin, A.; Wehmann, H.-H.; Witzigmann, B.; Wasisto, H. S.; Waag, A.

    2016-05-01

    The demonstration of vertical GaN wrap-around gated field-effect transistors using GaN nanowires is reported. The nanowires with smooth a-plane sidewalls have hexagonal geometry made by top-down etching. A 7-nanowire transistor exhibits enhancement mode operation with threshold voltage of 1.2 V, on/off current ratio as high as 108, and subthreshold slope as small as 68 mV/dec. Although there is space charge limited current behavior at small source-drain voltages (Vds), the drain current (Id) and transconductance (gm) reach up to 314 mA/mm and 125 mS/mm, respectively, when normalized with hexagonal nanowire circumference. The measured breakdown voltage is around 140 V. This vertical approach provides a way to next-generation GaN-based power devices.

  5. Importance of the Debye screening length on nanowire field effect transistor sensors.

    Science.gov (United States)

    Stern, Eric; Wagner, Robin; Sigworth, Fred J; Breaker, Ronald; Fahmy, Tarek M; Reed, Mark A

    2007-11-01

    Nanowire field effect transistors (NW-FETs) can serve as ultrasensitive detectors for label-free reagents. The NW-FET sensing mechanism assumes a controlled modification in the local channel electric field created by the binding of charged molecules to the nanowire surface. Careful control of the solution Debye length is critical for unambiguous selective detection of macromolecules. Here we show the appropriate conditions under which the selective binding of macromolecules is accurately sensed with NW-FET sensors.

  6. Silicon nanowire field-effect transistors for the detection of proteins

    Science.gov (United States)

    Madler, Carsten

    In this dissertation I present results on our efforts to increase the sensitivity and selectivity of silicon nanowire ion-sensitive field-effect transistors for the detection of biomarkers, as well as a novel method for wireless power transfer based on metamaterial rectennas for their potential use as implantable sensors. The sensing scheme is based on changes in the conductance of the semiconducting nanowires upon binding of charged entities to the surface, which induces a field-effect. Monitoring the differential conductance thus provides information of the selective binding of biological molecules of interest to previously covalently linked counterparts on the nanowire surface. In order to improve on the performance of the nanowire sensing, we devised and fabricated a nanowire Wheatstone bridge, which allows canceling out of signal drift due to thermal fluctuations and dynamics of fluid flow. We showed that balancing the bridge significantly improves the signal-to-noise ratio. Further, we demonstrated the sensing of novel melanoma biomarker TROY at clinically relevant concentrations and distinguished it from nonspecific binding by comparing the reaction kinetics. For increased sensitivity, an amplification method was employed using an enzyme which catalyzes a signal-generating reaction by changing the redox potential of a redox pair. In addition, we investigated the electric double layer, which forms around charges in an electrolytic solution. It causes electrostatic screening of the proteins of interest, which puts a fundamental limitation on the biomarker detection in solutions with high salt concentrations, such as blood. We solved the coupled Nernst-Planck and Poisson equations for the electrolyte under influence of an oscillating electric field and discovered oscillations of the counterion concentration at a characteristic frequency. In addition to exploring different methods for improved sensing capabilities, we studied an innovative method to supply power

  7. Electrical characteristics of silicon percolating nanonet-based field effect transistors in the presence of dispersion

    Science.gov (United States)

    Cazimajou, T.; Legallais, M.; Mouis, M.; Ternon, C.; Salem, B.; Ghibaudo, G.

    2018-05-01

    We studied the current-voltage characteristics of percolating networks of silicon nanowires (nanonets), operated in back-gated transistor mode, for future use as gas or biosensors. These devices featured P-type field-effect characteristics. It was found that a Lambert W function-based compact model could be used for parameter extraction of electrical parameters such as apparent low field mobility, threshold voltage and subthreshold slope ideality factor. Their variation with channel length and nanowire density was related to the change of conduction regime from direct source/drain connection by parallel nanowires to percolating channels. Experimental results could be related in part to an influence of the threshold voltage dispersion of individual nanowires.

  8. Electronic transport mechanisms in scaled gate-all-around silicon nanowire transistor arrays

    Energy Technology Data Exchange (ETDEWEB)

    Clément, N., E-mail: nicolas.clement@iemn.univ-lille1.fr, E-mail: guilhem.larrieu@laas.fr; Han, X. L. [Institute of Electronics, Microelectronics and Nanotechnology, CNRS, Avenue Poincaré, 59652 Villeneuve d' Ascq (France); Larrieu, G., E-mail: nicolas.clement@iemn.univ-lille1.fr, E-mail: guilhem.larrieu@laas.fr [Laboratory for Analysis and Architecture of Systems (LAAS), CNRS, Universite de Toulouse, 7 Avenue Colonel Roche, 31077 Toulouse (France)

    2013-12-23

    Low-frequency noise is used to study the electronic transport in arrays of 14 nm gate length vertical silicon nanowire devices. We demonstrate that, even at such scaling, the electrostatic control of the gate-all-around is sufficient in the sub-threshold voltage region to confine charges in the heart of the wire, and the extremely low noise level is comparable to that of high quality epitaxial layers. Although contact noise can already be a source of poor transistor operation above threshold voltage for few nanowires, nanowire parallelization drastically reduces its impact.

  9. High performance ring oscillators from 10-nm wide silicon nanowire field-effect transistors

    KAUST Repository

    Huang, Ruo-Gu; Tham, Douglas; Wang, Dunwei; Heath, James R.

    2011-01-01

    We explore 10-nm wide Si nanowire (SiNW) field-effect transistors (FETs) for logic applications, via the fabrication and testing of SiNW-based ring oscillators. We report on SiNW surface treatments and dielectric annealing, for producing SiNW FETs that exhibit high performance in terms of large on/off-state current ratio (~108), low drain-induced barrier lowering (~30 mV) and low subthreshold swing (~80 mV/decade). The performance of inverter and ring-oscillator circuits fabricated from these nanowire FETs are also explored. The inverter demonstrates the highest voltage gain (~148) reported for a SiNW-based NOT gate, and the ring oscillator exhibits near rail-to-rail oscillation centered at 13.4 MHz. The static and dynamic characteristics of these NW devices indicate that these SiNW-based FET circuits are excellent candidates for various high-performance nanoelectronic applications. © 2011 Tsinghua University Press and Springer-Verlag Berlin Heidelberg.

  10. High performance ring oscillators from 10-nm wide silicon nanowire field-effect transistors

    KAUST Repository

    Huang, Ruo-Gu

    2011-06-24

    We explore 10-nm wide Si nanowire (SiNW) field-effect transistors (FETs) for logic applications, via the fabrication and testing of SiNW-based ring oscillators. We report on SiNW surface treatments and dielectric annealing, for producing SiNW FETs that exhibit high performance in terms of large on/off-state current ratio (~108), low drain-induced barrier lowering (~30 mV) and low subthreshold swing (~80 mV/decade). The performance of inverter and ring-oscillator circuits fabricated from these nanowire FETs are also explored. The inverter demonstrates the highest voltage gain (~148) reported for a SiNW-based NOT gate, and the ring oscillator exhibits near rail-to-rail oscillation centered at 13.4 MHz. The static and dynamic characteristics of these NW devices indicate that these SiNW-based FET circuits are excellent candidates for various high-performance nanoelectronic applications. © 2011 Tsinghua University Press and Springer-Verlag Berlin Heidelberg.

  11. Switching Characteristics of Ferroelectric Transistor Inverters

    Science.gov (United States)

    Laws, Crystal; Mitchell, Coey; MacLeod, Todd C.; Ho, Fat D.

    2010-01-01

    This paper presents the switching characteristics of an inverter circuit using a ferroelectric field effect transistor, FeFET. The propagation delay time characteristics, phl and plh are presented along with the output voltage rise and fall times, rise and fall. The propagation delay is the time-delay between the V50% transitions of the input and output voltages. The rise and fall times are the times required for the output voltages to transition between the voltage levels V10% and V90%. Comparisons are made between the MOSFET inverter and the ferroelectric transistor inverter.

  12. Static Characteristics of the Ferroelectric Transistor Inverter

    Science.gov (United States)

    Mitchell, Cody; Laws, crystal; MacLeond, Todd C.; Ho, Fat D.

    2010-01-01

    The inverter is one of the most fundamental building blocks of digital logic, and it can be used as the foundation for understanding more complex logic gates and circuits. This paper presents the characteristics of an inverter circuit using a ferroelectric field-effect transistor. The voltage transfer characteristics are analyzed with respect to varying parameters such as supply voltage, input voltage, and load resistance. The effects of the ferroelectric layer between the gate and semiconductor are examined, and comparisons are made between the inverters using ferroelectric transistors and those using traditional MOSFETs.

  13. Functionalization and microfluidic integration of silicon nanowire biologically gated field effect transistors

    DEFF Research Database (Denmark)

    Pfreundt, Andrea

    This thesis deals with the development of a novel biosensor for the detection of biomolecules based on a silicon nanowire biologically gated field-effect transistor and its integration into a point-of-care device. The sensor and electrical on-chip integration was developed in a different project...

  14. Functionalization and microfluidic integration of silicon nanowire biologically gated field effect transistors

    DEFF Research Database (Denmark)

    Pfreundt, Andrea; Svendsen, Winnie Edith; Dimaki, Maria

    2016-01-01

    This thesis deals with the development of a novel biosensor for the detection of biomolecules based on a silicon nanowire biologically gated field-effect transistor and its integration into a point-of-care device. The sensor and electrical on-chip integration was developed in a different project...

  15. IC Compatible Wafer Level Fabrication of Silicon Nanowire Field Effect Transistors for Biosensing Applications

    NARCIS (Netherlands)

    Moh, T.S.Y.

    2013-01-01

    In biosensing, nano-devices such as Silicon Nanowire Field Effect Transistors (SiNW FETs) are promising components/sensors for ultra-high sensitive detection, especially when samples are low in concentration or a limited volume is available. Current processing of SiNW FETs often relies on expensive

  16. Vertically integrated logic circuits constructed using ZnO-nanowire-based field-effect transistors on plastic substrates.

    Science.gov (United States)

    Kang, Jeongmin; Moon, Taeho; Jeon, Youngin; Kim, Hoyoung; Kim, Sangsig

    2013-05-01

    ZnO-nanowire-based logic circuits were constructed by the vertical integration of multilayered field-effect transistors (FETs) on plastic substrates. ZnO nanowires with an average diameter of -100 nm were synthesized by thermal chemical vapor deposition for use as the channel material in FETs. The ZnO-based FETs exhibited a high I(ON)/I(OFF) of > 10(6), with the characteristic of n-type depletion modes. For vertically integrated logic circuits, three multilayer FETs were sequentially prepared. The stacked FETs were connected in series via electrodes, and C-PVPs were used for the layer-isolation material. The NOT and NAND gates exhibited large logic-swing values of -93%. These results demonstrate the feasibility of three dimensional flexible logic circuits.

  17. Transport and performance of a gate all around InAs nanowire transistor

    International Nuclear Information System (INIS)

    Alam, Khairul

    2009-01-01

    The transport physics and performance metrics of a gate all around an InAs nanowire transistor are studied using a three-dimensional quantum simulation. The transistor action of an InAs nanowire transistor occurs by modulating the transmission coefficient of the device. This action is different from a conventional metal-oxide-semiconductor field effect transistor, where the transistor action occurs by modulating the charge in the channel. The device has 82% tunneling current in the off-state and 81% thermal current in the on-state. The two current components become equal at a gate bias at which an approximate source-channel flat-band condition is achieved. Prior to this gate bias, the tunneling current dominates and the thermal current dominates beyond it. The device has an on/off current ratio of 7.84 × 10 5 and an inverse subthreshold slope of 63 mV dec −1 . The transistor operates in the quantum capacitance limit with a normalized transconductance value of 14.43 mS µm −1 , an intrinsic switching delay of 90.1675 fs, and an intrinsic unity current gain frequency of 6.8697 THz

  18. The design of a new spiking neuron using dual work function silicon nanowire transistors

    International Nuclear Information System (INIS)

    Bindal, Ahmet; Hamedi-Hagh, Sotoudeh

    2007-01-01

    A new spike neuron cell is designed using vertically grown, undoped silicon nanowire transistors. This study presents an entire design cycle from designing and optimizing vertical nanowire transistors for minimal power dissipation to realizing a neuron cell and measuring its dynamic power consumption, performance and layout area. The design cycle starts with determining individual metal gate work functions for NMOS and PMOS transistors as a function of wire radius to produce a 300 mV threshold voltage. The wire radius and effective channel length are subsequently varied to find a common body geometry for both transistors that yields smaller than 1 pA OFF current while producing maximum drive currents. A spike neuron cell is subsequently built using these transistors to measure its transient performance, power dissipation and layout area. Post-layout simulation results indicate that the neuron consumes 0.397 μW to generate a +1 V and 1.12 μW to generate a -1 V output pulse for a fan-out of five synapses at 500 MHz; the power dissipation increases by approximately 3 nW for each additional synapse at the output for generating either pulse. The neuron circuit occupies approximately 0.27 μm 2

  19. A Robust Highly Aligned DNA Nanowire Array-Enabled Lithography for Graphene Nanoribbon Transistors.

    Science.gov (United States)

    Kang, Seok Hee; Hwang, Wan Sik; Lin, Zhiqun; Kwon, Se Hun; Hong, Suck Won

    2015-12-09

    Because of its excellent charge carrier mobility at the Dirac point, graphene possesses exceptional properties for high-performance devices. Of particular interest is the potential use of graphene nanoribbons or graphene nanomesh for field-effect transistors. Herein, highly aligned DNA nanowire arrays were crafted by flow-assisted self-assembly of a drop of DNA aqueous solution on a flat polymer substrate. Subsequently, they were exploited as "ink" and transfer-printed on chemical vapor deposited (CVD)-grown graphene substrate. The oriented DNA nanowires served as the lithographic resist for selective removal of graphene, forming highly aligned graphene nanoribbons. Intriguingly, these graphene nanoribbons can be readily produced over a large area (i.e., millimeter scale) with a high degree of feature-size controllability and a low level of defects, rendering the fabrication of flexible two terminal devices and field-effect transistors.

  20. Polymer chain alignment and transistor properties of nanochannel-templated poly(3-hexylthiophene) nanowires

    Science.gov (United States)

    Oh, Seungjun; Hayakawa, Ryoma; Pan, Chengjun; Sugiyasu, Kazunori; Wakayama, Yutaka

    2016-08-01

    Nanowires of semiconducting poly(3-hexylthiophene) (P3HT) were produced by a nanochannel-template technique. Polymer chain alignment in P3HT nanowires was investigated as a function of nanochannel widths (W) and polymer chain lengths (L). We found that the ratio between chain length and channel width (L/W) was a key parameter as regards promoting polymer chain alignment. Clear dichroism was observed in polarized ultraviolet-visible (UV-Vis) absorption spectra only at a ratio of approximately L/W = 2, indicating that the L/W ratio must be optimized to achieve uniaxial chain alignment in the nanochannel direction. We speculate that an appropriate L/W ratio is effective in confining the geometries and conformations of polymer chains. This discussion was supported by theoretical simulations based on molecular dynamics. That is, the geometry of the polymer chains, including the distance and tilting angles of the chains in relation to the nanochannel surface, was dominant in determining the longitudinal alignment along the nanochannels. Thus prepared highly aligned polymer nanowire is advantageous for electrical carrier transport and has great potential for improving the device performance of field-effect transistors. In fact, a one-order improvement in carrier mobility was observed in a P3HT nanowire transistor.

  1. Robust mode space approach for atomistic modeling of realistically large nanowire transistors

    Science.gov (United States)

    Huang, Jun Z.; Ilatikhameneh, Hesameddin; Povolotskyi, Michael; Klimeck, Gerhard

    2018-01-01

    Nanoelectronic transistors have reached 3D length scales in which the number of atoms is countable. Truly atomistic device representations are needed to capture the essential functionalities of the devices. Atomistic quantum transport simulations of realistically extended devices are, however, computationally very demanding. The widely used mode space (MS) approach can significantly reduce the numerical cost, but a good MS basis is usually very hard to obtain for atomistic full-band models. In this work, a robust and parallel algorithm is developed to optimize the MS basis for atomistic nanowires. This enables engineering-level, reliable tight binding non-equilibrium Green's function simulation of nanowire metal-oxide-semiconductor field-effect transistor (MOSFET) with a realistic cross section of 10 nm × 10 nm using a small computer cluster. This approach is applied to compare the performance of InGaAs and Si nanowire n-type MOSFETs (nMOSFETs) with various channel lengths and cross sections. Simulation results with full-band accuracy indicate that InGaAs nanowire nMOSFETs have no drive current advantage over their Si counterparts for cross sections up to about 10 nm × 10 nm.

  2. Observation of diameter dependent carrier distribution in nanowire-based transistors

    Energy Technology Data Exchange (ETDEWEB)

    Schulze, A; Hantschel, T; Eyben, P; Verhulst, A S; Rooyackers, R; Vandooren, A; Mody, J; Nazir, A; Leonelli, D; Vandervorst, W, E-mail: Andreas.Schulze@imec.be [IMEC, Kapeldreef 75, 3001 Leuven (Belgium)

    2011-05-06

    The successful implementation of nanowire (NW) based field-effect transistors (FET) critically depends on quantitative information about the carrier distribution inside such devices. Therefore, we have developed a method based on high-vacuum scanning spreading resistance microscopy (HV-SSRM) which allows two-dimensional (2D) quantitative carrier profiling of fully integrated silicon NW-based tunnel-FETs (TFETs) with 2 nm spatial resolution. The key elements of our characterization procedure are optimized NW cleaving and polishing steps, the use of in-house fabricated ultra-sharp diamond tips, measurements in high vacuum and a dedicated quantification procedure accounting for the Schottky-like tip-sample contact affected by surface states. In the case of the implanted TFET source regions we find a strong NW diameter dependence of conformality, junction abruptness and gate overlap, quantitatively in agreement with process simulations. In contrast, the arsenic doped drain regions reveal an unexpected NW diameter dependent dopant deactivation. The observed lower drain doping for smaller diameters is reflected in the device characteristics by lower TFET off-currents, as measured experimentally and confirmed by device simulations.

  3. The fabrication of ZnO nanowire field-effect transistors combining dielectrophoresis and hot-pressing

    International Nuclear Information System (INIS)

    Chang, Y-K; Chau-N H, Franklin

    2009-01-01

    Zinc oxide nanowire field-effect transistors (NW-FETs) were fabricated combining the dielectrophoresis (DEP) and the hot-pressing methods. DEP was used to position both ends of the nanowires on top of the source and the drain electrodes, respectively. Hot-pressing of nanowires on the electrodes was then employed to ensure good contacts between the nanowires and the electrodes. The good device performance achieved with our method of fabrication indicates that DEP combined with hot-pressing has the potential to be applied to the fabrication of flexible electronics on a roll-to-roll basis.

  4. Vertical Silicon Nanowire Field Effect Transistors with Nanoscale Gate-All-Around

    Science.gov (United States)

    Guerfi, Youssouf; Larrieu, Guilhem

    2016-04-01

    Nanowires are considered building blocks for the ultimate scaling of MOS transistors, capable of pushing devices until the most extreme boundaries of miniaturization thanks to their physical and geometrical properties. In particular, nanowires' suitability for forming a gate-all-around (GAA) configuration confers to the device an optimum electrostatic control of the gate over the conduction channel and then a better immunity against the short channel effects (SCE). In this letter, a large-scale process of GAA vertical silicon nanowire (VNW) MOSFETs is presented. A top-down approach is adopted for the realization of VNWs with an optimum reproducibility followed by thin layer engineering at nanoscale. Good overall electrical performances were obtained, with excellent electrostatic behavior (a subthreshold slope (SS) of 95 mV/dec and a drain induced barrier lowering (DIBL) of 25 mV/V) for a 15-nm gate length. Finally, a first demonstration of dual integration of n-type and p-type VNW transistors for the realization of CMOS inverter is proposed.

  5. A radio-frequency single-electron transistor based on an InAs/InP heterostructure nanowire

    DEFF Research Database (Denmark)

    Nilsson, Henrik A.; Duty, Tim; Abay, Simon

    2008-01-01

    We demonstrate radio frequency single-electron transistors fabricated from epitaxially grown InAs/InP heterostructure nanowires. Two sets of double-barrier wires with different barrier thicknesses were grown. The wires were suspended 15 nm above a metal gate electrode. Electrical measurements...... on a high-resistance nanowire showed regularly spaced Coulomb oscillations at a gate voltage from −0.5 to at least 1.8 V. The charge sensitivity was measured to 32 µerms Hz−1/2 at 1.5 K. A low-resistance single-electron transistor showed regularly spaced oscillations only in a small gate-voltage region just...

  6. Modeling nanowire and double-gate junctionless field-effect transistors

    CERN Document Server

    Jazaeri, Farzan

    2018-01-01

    The first book on the topic, this is a comprehensive introduction to the modeling and design of junctionless field effect transistors (FETs). Beginning with a discussion of the advantages and limitations of the technology, the authors also provide a thorough overview of published analytical models for double-gate and nanowire configurations, before offering a general introduction to the EPFL charge-based model of junctionless FETs. Important features are introduced gradually, including nanowire versus double-gate equivalence, technological design space, junctionless FET performances, short channel effects, transcapacitances, asymmetric operation, thermal noise, interface traps, and the junction FET. Additional features compatible with biosensor applications are also discussed. This is a valuable resource for students and researchers looking to understand more about this new and fast developing field.

  7. Recovery Based Nanowire Field-Effect Transistor Detection of Pathogenic Avian Influenza DNA

    Science.gov (United States)

    Lin, Chih-Heng; Chu, Chia-Jung; Teng, Kang-Ning; Su, Yi-Jr; Chen, Chii-Dong; Tsai, Li-Chu; Yang, Yuh-Shyong

    2012-02-01

    Fast and accurate diagnosis is critical in infectious disease surveillance and management. We proposed a DNA recovery system that can easily be adapted to DNA chip or DNA biosensor for fast identification and confirmation of target DNA. This method was based on the re-hybridization of DNA target with a recovery DNA to free the DNA probe. Functionalized silicon nanowire field-effect transistor (SiNW FET) was demonstrated to monitor such specific DNA-DNA interaction using high pathogenic strain virus hemagglutinin 1 (H1) DNA of avian influenza (AI) as target. Specific electric changes were observed in real-time for AI virus DNA sensing and device recovery when nanowire surface of SiNW FET was modified with complementary captured DNA probe. The recovery based SiNW FET biosensor can be further developed for fast identification and further confirmation of a variety of influenza virus strains and other infectious diseases.

  8. An analytic model for gate-all-around silicon nanowire tunneling field effect transistors

    International Nuclear Information System (INIS)

    Liu Ying; He Jin; Chan Mansun; Ye Yun; Zhao Wei; Wu Wen; Deng Wan-Ling; Wang Wen-Ping; Du Cai-Xia

    2014-01-01

    An analytical model of gate-all-around (GAA) silicon nanowire tunneling field effect transistors (NW-TFETs) is developted based on the surface potential solutions in the channel direction and considering the band to band tunneling (BTBT) efficiency. The three-dimensional Poisson equation is solved to obtain the surface potential distributions in the partition regions along the channel direction for the NW-TFET, and a tunneling current model using Kane's expression is developed. The validity of the developed model is shown by the good agreement between the model predictions and the TCAD simulation results. (condensed matter: electronic structure, electrical, magnetic, and optical properties)

  9. Analysis of nanowire transistor based nitrogen dioxide gas sensor – A simulation study

    Directory of Open Access Journals (Sweden)

    Gaurav Saxena

    2015-06-01

    Full Text Available Sensors sensitivity, selectivity and stability has always been a prime design concern for gas sensors designers. Modeling and simulation of gas sensors aids the designers in improving their performance. In this paper, different routes for the modeling and simulation of a semiconducting gas sensor is presented. Subsequently, by employing one of the route, the response of Zinc Oxide nanowire transistor towards nitrogen dioxide ambient is simulated. In addition to the sensing mechanism, simulation study of gas species desorption by applying a recovery voltage is also presented.

  10. Effect of Silicon Nanowire on Crystalline Silicon Solar Cell Characteristics

    OpenAIRE

    Zahra Ostadmahmoodi Do; Tahereh Fanaei Sheikholeslami; Hassan Azarkish

    2016-01-01

    Nanowires (NWs) are recently used in several sensor or actuator devices to improve their ordered characteristics. Silicon nanowire (Si NW) is one of the most attractive one-dimensional nanostructures semiconductors because of its unique electrical and optical properties. In this paper, silicon nanowire (Si NW), is synthesized and characterized for application in photovoltaic device. Si NWs are prepared using wet chemical etching method which is commonly used as a simple and low cost method fo...

  11. Nanowire size dependence on sensitivity of silicon nanowire field-effect transistor-based pH sensor

    Science.gov (United States)

    Lee, Ryoongbin; Kwon, Dae Woong; Kim, Sihyun; Kim, Sangwan; Mo, Hyun-Sun; Kim, Dae Hwan; Park, Byung-Gook

    2017-12-01

    In this study, we investigated the effects of nanowire size on the current sensitivity of silicon nanowire (SiNW) ion-sensitive field-effect transistors (ISFETs). The changes in on-current (I on) and resistance according to pH were measured in fabricated SiNW ISFETs of various lengths and widths. As a result, it was revealed that the sensitivity expressed as relative I on change improves as the width decreases. Through technology computer-aided design (TCAD) simulation analysis, the width dependence on the relative I on change can be explained by the observation that the target molecules located at the edge region along the channel width have a stronger effect on the sensitivity as the SiNW width is reduced. Additionally, the length dependence on the sensitivity can be understood in terms of the resistance ratio of the fixed parasitic resistance, including source/drain resistance, to the varying channel resistance as a function of channel length.

  12. Unlocking the Origin of Superior Performance of a Si-Ge Core-Shell Nanowire Quantum Dot Field Effect Transistor.

    Science.gov (United States)

    Dhungana, Kamal B; Jaishi, Meghnath; Pati, Ranjit

    2016-07-13

    The sustained advancement in semiconducting core-shell nanowire technology has unlocked a tantalizing route for making next generation field effect transistor (FET). Understanding how to control carrier mobility of these nanowire channels by applying a gate field is the key to developing a high performance FET. Herein, we have identified the switching mechanism responsible for the superior performance of a Si-Ge core-shell nanowire quantum dot FET over its homogeneous Si counterpart. A quantum transport approach is used to investigate the gate-field modulated switching behavior in electronic current for ultranarrow Si and Si-Ge core-shell nanowire quantum dot FETs. Our calculations reveal that for the ON state, the gate-field induced transverse localization of the wave function restricts the carrier transport to the outer (shell) layer with the pz orbitals providing the pathway for tunneling of electrons in the channels. The higher ON state current in the Si-Ge core-shell nanowire FET is attributed to the pz orbitals that are distributed over the entire channel; in the case of Si nanowire, the participating pz orbital is restricted to a few Si atoms in the channel resulting in a smaller tunneling current. Within the gate bias range considered here, the transconductance is found to be substantially higher in the case of a Si-Ge core-shell nanowire FET than in a Si nanowire FET, which suggests a much higher mobility in the Si-Ge nanowire device.

  13. High-performance ambipolar self-assembled Au/Ag nanowire based vertical quantum dot field effect transistor.

    Science.gov (United States)

    Song, Xiaoxian; Zhang, Yating; Zhang, Haiting; Yu, Yu; Cao, Mingxuan; Che, Yongli; Wang, Jianlong; Dai, Haitao; Yang, Junbo; Ding, Xin; Yao, Jianquan

    2016-10-07

    Most lateral PbSe quantum dot field effect transistors (QD FETs) show a low on current/off current (I on/I off) ratio in charge transport measurements. A new strategy to provide generally better performance is to design PbSe QD FETs with vertical architecture, in which the structure parameters can be tuned flexibly. Here, we fabricated a novel room-temperature operated vertical quantum dot field effect transistor with a channel of 580 nm, where self-assembled Au/Ag nanowires served as source transparent electrodes and PbSe quantum dots as active channels. Through investigating the electrical characterization, the ambipolar device exhibited excellent characteristics with a high I on/I off current ratio of about 1 × 10(5) and a low sub-threshold slope (0.26 V/decade) in the p-type regime. The all-solution processing vertical architecture provides a convenient way for low cost, large-area integration of the device.

  14. In-situ doped junctionless polysilicon nanowires field effect transistors for low-cost biosensors

    Directory of Open Access Journals (Sweden)

    Azeem Zulfiqar

    2017-04-01

    Full Text Available Silicon nanowire (SiNW field effect transistor based biosensors have already been proven to be a promising tool to detect biomolecules. However, the most commonly used fabrication techniques involve expensive Silicon-On-Insulator (SOI wafers, E-beam lithography and ion-implantation steps. In the work presented here, a top down approach to fabricate SiNW junctionless field effect biosensors using novel in-situ doped polysilicon is demonstrated. The p-type polysilicon is grown with an optimum boron concentration that gives a good metal-silicon electrical contact while maintaining the doping level at a low enough level to provide a good sensitivity for the biosensor. The silicon nanowires are patterned using standard photolithography and a wet etch method. The metal contacts are made from magnetron sputtered TiW and e-beam evaporation of gold. The passivation of electrodes has been done by sputtered Si3N4 which is patterned by a lift-off process. The characterization of the critical fabrication steps is done by Secondary Ion Mass Spectroscopy (SIMS and by statistical analysis of the measurements made on the width of the SiNWs. The electrical characterization of the SiNW in air is done by sweeping the back gate voltage while keeping the source drain potential to a constant value and surface characterization is done by applying liquid gate in phosphate buffered saline (PBS solution. The fabricated SiNWs sensors functionalized with (3-aminopropyltriethoxysilane (APTES have demonstrated good sensitivity in detecting different pH buffer solutions. Keywords: In-situ doped, Polysilicon nanowire, Field effect transistor, Biosensor

  15. Detection of chemical substances in water using an oxide nanowire transistor covered with a hydrophobic nanoparticle thin film as a liquid-vapour separation filter

    Directory of Open Access Journals (Sweden)

    Taekyung Lim

    2016-08-01

    Full Text Available We have developed a method to detect the presence of small amounts of chemical substances in water, using a Al2O3 nanoparticle thin film covered with phosphonic acid (HDF-PA self-assembled monolayer. The HDF-PA self-assembled Al2O3 nanoparticle thin film acts as a liquid-vapour separation filter, allowing the passage of chemical vapour while blocking liquids. Prevention of the liquid from contacting the SnO2 nanowire and source-drain electrodes is required in order to avoid abnormal operation. Using this characteristic, the concentration of chemical substances in water could be evaluated by measuring the current changes in the SnO2 nanowire transistor covered with the HDF-PA self-assembled Al2O3 nanoparticle thin film.

  16. Highly stable field emission from ZnO nanowire field emitters controlled by an amorphous indium–gallium–zinc-oxide thin film transistor

    Science.gov (United States)

    Li, Xiaojie; Wang, Ying; Zhang, Zhipeng; Ou, Hai; She, Juncong; Deng, Shaozhi; Xu, Ningsheng; Chen, Jun

    2018-04-01

    Lowering the driving voltage and improving the stability of nanowire field emitters are essential for them to be applied in devices. In this study the characteristics of zinc oxide (ZnO) nanowire field emitter arrays (FEAs) controlled by an amorphous indium–gallium–zinc-oxide thin film transistor (a-IGZO TFT) were studied. A low driving voltage along with stabilization of the field emission current were achieved. Modulation of field emission currents up to three orders of magnitude was achieved at a gate voltage of 0–32 V for a constant anode voltage. Additionally, a-IGZO TFT control can dramatically reduce the emission current fluctuation (i.e., from 46.11 to 1.79% at an emission current of ∼3.7 µA). Both the a-IGZO TFT and ZnO nanowire FEAs were prepared on glass substrates in our research, demonstrating the feasibility of realizing large area a-IGZO TFT-controlled ZnO nanowire FEAs.

  17. Light-gated single CdSe nanowire transistor: photocurrent saturation and band gap extraction

    Energy Technology Data Exchange (ETDEWEB)

    Zhang, Yang, E-mail: yangzh08@gmail.com; Chakraborty, Ritun; Kudera, Stefan; Krahne, Roman, E-mail: roman.krahne@iit.it [Istituto Italiano di Tecnologia, Nanochemistry department (Italy)

    2015-11-15

    CdSe nanowires are popular building blocks for many optoelectronic devices mainly owing to their direct band gap in the visible range of the spectrum. Here we investigate the optoelectronic properties of single CdSe nanowires fabricated by colloidal synthesis, in terms of their photocurrent–voltage characteristics and photoconductivity spectra recorded at 300 and 18 K. The photocurrent is identified as the secondary photocurrent, which gives rise to a photoconductive gain of ∼35. We observe a saturation of the photocurrent beyond a certain voltage bias that can be related to the finite drift velocity of electrons. From the photoconductivity spectra, we determine the band gap energy of the nanowires as ∼1.728 eV, and we resolve low-energy peaks that can be associated with sub-bandgap states.Graphical Abstract.

  18. The ITO-capped WO3 nanowires biosensor based on field-effect transistor in label-free protein sensing

    International Nuclear Information System (INIS)

    Shariati, Mohsen

    2017-01-01

    The fabrication of ITO-capped WO 3 nanowires associated with their bio-sensing properties in field-effect transistor diagnostics basis as a biosensor has been reported. The bio-sensing property for manipulated nanowires elucidated that the grown nanostructures were very sensitive to protein. The ITO-capped WO 3 nanowires biosensor showed an intensive bio-sensing activity against reliable protein. Polylysine strongly charged bio-molecule was applied as model system to demonstrate the implementation of materialized biosensor. The employed sensing mechanism was 'label-free' and depended on bio-molecule's intrinsic charge. For nanowires synthesis, the vapor-liquid-solid mechanism was used. Nanowires were beyond a few hundred nanometers in lengths and around 15-20 nm in diameter, while the globe cap's size on the nanowires was around 15-25 nm. The indium tin oxide (ITO) played as catalyst in nanofabrication for WO 3 nanowires growth and had outstanding role in bio-sensing especially for bio-molecule adherence. In applied electric field presence, the fabricated device showed the great potential to enhance medical diagnostics. (orig.)

  19. Field effect transistors and phototransistors based upon p-type solution-processed PbS nanowires

    Science.gov (United States)

    Giraud, Paul; Hou, Bo; Pak, Sangyeon; Inn Sohn, Jung; Morris, Stephen; Cha, SeungNam; Kim, Jong Min

    2018-02-01

    We demonstrate the fabrication of solution processed highly crystalline p-type PbS nanowires via the oriented attachment of nanoparticles. The analysis of single nanowire field effect transistor (FET) devices revealed a hole conduction behaviour with average mobilities greater than 30 cm2 V-1 s-1, which is an order of magnitude higher than that reported to date for p-type PbS colloidal nanowires. We have investigated the response of the FETs to near-infrared light excitation and show herein that the nanowires exhibited gate-dependent photo-conductivities, enabling us to tune the device performances. The responsivity was found to be greater than 104 A W-1 together with a detectivity of 1013 Jones, which benefits from a photogating effect occurring at negative gate voltages. These encouraging detection parameters are accompanied by relatively short switching times of 15 ms at positive gate voltages, resulting from a combination of the standard photoconduction and the high crystallinity of the nanowires. Collectively, these results indicate that solution-processed PbS nanowires are promising nanomaterials for infrared photodetectors as well as p-type nanowire FETs.

  20. Single ZnO nanowire-PZT optothermal field effect transistors.

    Science.gov (United States)

    Hsieh, Chun-Yi; Lu, Meng-Lin; Chen, Ju-Ying; Chen, Yung-Ting; Chen, Yang-Fang; Shih, Wan Y; Shih, Wei-Heng

    2012-09-07

    A new type of pyroelectric field effect transistor based on a composite consisting of single zinc oxide nanowire and lead zirconate titanate (ZnO NW-PZT) has been developed. Under infrared (IR) laser illumination, the transconductance of the ZnO NW can be modulated by optothermal gating. The drain current can be increased or decreased by IR illumination depending on the polarization orientation of the Pb(Zr(0.3)Ti(0.7))O(3) (PZT) substrate. Furthermore, by combining the photocurrent behavior in the UV range and the optothermal gating effect in the IR range, the wide spectrum of response of current by light offers a variety of opportunities for nanoscale optoelectronic devices.

  1. Detection of DNA of genetically modified maize by a silicon nanowire field-effect transistor

    International Nuclear Information System (INIS)

    Pham, Van Binh; Tung Pham, Xuan Thanh; Duong Dang, Ngoc Thuy; Tuyen Le, Thi Thanh; Tran, Phu Duy; Nguyen, Thanh Chien; Nguyen, Van Quoc; Dang, Mau Chien; Tong, Duy Hien; Van Rijn, Cees J M

    2011-01-01

    A silicon nanowire field-effect transistor based sensor (SiNW-FET) has been proved to be the most sensitive and powerful device for bio-detection applications. In this paper, SiNWs were first fabricated by using our recently developed deposition and etching under angle technique (DEA), then used to build up the complete SiNW device based biosensor. The fabricated SiNW biosensor was used to detect DNA of genetically modified maize. As the DNA of the genetically modified maize has particular DNA sequences of 35S promoter, we therefore designed 21 mer DNA oligonucleotides, which are used as a receptor to capture the transferred DNA of maize. In our work, the SiNW biosensor could detect DNA of genetically modified maize with concentrations down to about 200 pM

  2. The woven fiber organic electrochemical transistors based on polypyrrole nanowires/reduced graphene oxide composites for glucose sensing.

    Science.gov (United States)

    Wang, Yuedan; Qing, Xing; Zhou, Quan; Zhang, Yang; Liu, Qiongzhen; Liu, Ke; Wang, Wenwen; Li, Mufang; Lu, Zhentan; Chen, Yuanli; Wang, Dong

    2017-09-15

    Novel woven fiber organic electrochemical transistors based on polypyrrole (PPy) nanowires and reduced graphene oxide (rGO) have been prepared. SEM revealed that the introduction of rGO nanosheets could induce the growth and increase the amount of PPy nanowires. Moreover, it could enhance the electrical performance of fiber transistors. The hybrid transistors showed high on/off ratio of 10 2 , fast switch speed, and long cycling stability. The glucose sensors based on the fiber organic electrochemical transistors have also been investigated, which exhibited outstanding sensitivity, as high as 0.773 NCR/decade, with a response time as fast as 0.5s, a linear range of 1nM to 5μM, a low detection concentration as well as good repeatability. In addition, the glucose could be selectively detected in the presence of ascorbic acid and uric acid interferences. The reliability of the proposed glucose sensor was evaluated in real samples of rabbit blood. All the results indicate that the novel fiber transistors pave the way for portable and wearable electronics devices, which have a promising future for healthcare and biological applications. Copyright © 2017 Elsevier B.V. All rights reserved.

  3. A sub k{sub B}T/q semimetal nanowire field effect transistor

    Energy Technology Data Exchange (ETDEWEB)

    Ansari, L.; Fagas, G.; Gity, F.; Greer, J. C., E-mail: Jim.Greer@Tyndall.ie [Tyndall National Institute, Lee Maltings, Dyke Parade, Cork T12 R5CP (Ireland)

    2016-08-08

    The key challenge for nanoelectronics technologies is to identify the designs that work on molecular length scales, provide reduced power consumption relative to classical field effect transistors (FETs), and that can be readily integrated at low cost. To this end, a FET is introduced that relies on the quantum effects arising for semimetals patterned with critical dimensions below 5 nm, that intrinsically has lower power requirements due to its better than a “Boltzmann tyranny” limited subthreshold swing (SS) relative to classical field effect devices, eliminates the need to form heterojunctions, and mitigates against the requirement for abrupt doping profiles in the formation of nanowire tunnel FETs. This is achieved through using a nanowire comprised of a single semimetal material while providing the equivalent of a heterojunction structure based on shape engineering to avail of the quantum confinement induced semimetal-to-semiconductor transition. Ab initio calculations combined with a non-equilibrium Green's function formalism for charge transport reveals tunneling behavior in the OFF state and a resonant conduction mechanism for the ON state. A common limitation to tunnel FET (TFET) designs is related to a low current in the ON state. A discussion relating to the semimetal FET design to overcome this limitation while providing less than 60 meV/dec SS at room temperature is provided.

  4. Analysis of surface states in ZnO nanowire field effect transistors

    International Nuclear Information System (INIS)

    Shao, Ye; Yoon, Jongwon; Kim, Hyeongnam; Lee, Takhee; Lu, Wu

    2014-01-01

    Highlights: • The electron transport in ZnO nanowire FETs is space charged limited below a trap temperature. • Metallic contacts to ZnO nanowires exhibit non-linear behavior with a Schottky barrier height of ∼0.35 eV. • The surface state density is in the range of 1.04 × 10 10 –1.24 × 10 10 /cm 2 . • The trap activation energy is ∼0.26 eV. - Abstract: Nanowires (NWs) have attracted considerable interests for scaled electronic and optoelectronic device applications. However, NW based semiconductor devices normally suffer from surface states due to the existence of dangling bonds or surface reconstruction. Because of their large surface-to-volume ratio, surface states in NWs can easily affect the metallic contacts to NWs and electron transport in NW. Here, we present ZnO NW surface analysis by performing current–voltage characterization on ZnO NW Schottky barrier field effect transistors with different metal contacts (Ti, Al, Au) at both room temperature and cryogenic temperature. Our results show that three metal contacts are all Schottky contacts to ZnO NWs due to surface states. Our further study reveals: (a) the surface states related Schottky barrier height (SBH) can be extracted from a back to back Schottky diodes model and the SBH values are in the range of 0.34–0.37 eV for three metal contacts; (b) the trap activation energy determined from the Arrhenius plots of different Schottky metal contacts is in the range of 0.23–0.29 eV, which is oxygen vacancies related; and (c) based on the space-charge-limited model, the surface state density of ZnO NW is in the range of 1.04 × 10 10 –1.24 × 10 10 /cm 2

  5. Pseudopotential-based electron quantum transport: Theoretical formulation and application to nanometer-scale silicon nanowire transistors

    Energy Technology Data Exchange (ETDEWEB)

    Fang, Jingtian, E-mail: jingtian.fang@utdallas.edu; Vandenberghe, William G.; Fu, Bo; Fischetti, Massimo V. [Department of Materials Science and Engineering, The University of Texas at Dallas, Richardson, Texas 75080 (United States)

    2016-01-21

    We present a formalism to treat quantum electronic transport at the nanometer scale based on empirical pseudopotentials. This formalism offers explicit atomistic wavefunctions and an accurate band structure, enabling a detailed study of the characteristics of devices with a nanometer-scale channel and body. Assuming externally applied potentials that change slowly along the electron-transport direction, we invoke the envelope-wavefunction approximation to apply the open boundary conditions and to develop the transport equations. We construct the full-band open boundary conditions (self-energies of device contacts) from the complex band structure of the contacts. We solve the transport equations and present the expressions required to calculate the device characteristics, such as device current and charge density. We apply this formalism to study ballistic transport in a gate-all-around (GAA) silicon nanowire field-effect transistor with a body-size of 0.39 nm, a gate length of 6.52 nm, and an effective oxide thickness of 0.43 nm. Simulation results show that this device exhibits a subthreshold slope (SS) of ∼66 mV/decade and a drain-induced barrier-lowering of ∼2.5 mV/V. Our theoretical calculations predict that low-dimensionality channels in a 3D GAA architecture are able to meet the performance requirements of future devices in terms of SS swing and electrostatic control.

  6. CMOS-compatible fabrication of top-gated field-effect transistor silicon nanowire-based biosensors

    International Nuclear Information System (INIS)

    Ginet, Patrick; Akiyama, Sho; Takama, Nobuyuki; Fujita, Hiroyuki; Kim, Beomjoon

    2011-01-01

    Field-effect transistor (FET) nanowire-based biosensors are very promising tools for medical diagnosis. In this paper, we introduce a simple method to fabricate FET silicon nanowires using only standard microelectromechanical system (MEMS) processes. The key steps of our fabrication process were a local oxidation of silicon (LOCOS) and anisotropic KOH etchings that enabled us to reduce the width of the initial silicon structures from 10 µm to 170 nm. To turn the nanowires into a FET, a top-gate electrode was patterned in gold next to them in order to apply the gate voltage directly through the investigated liquid environment. An electrical characterization demonstrated the p-type behaviour of the nanowires. Preliminary chemical sensing tested the sensitivity to pH of our device. The effect of the binding of streptavidin on biotinylated nanowires was monitored in order to evaluate their biosensing ability. In this way, streptavidin was detected down to a 100 ng mL −1 concentration in phosphate buffered saline by applying a gate voltage less than 1.2 V. The use of a top-gate electrode enabled the detection of biological species with only very low voltages that were compatible with future handheld-requiring applications. We thus demonstrated the potential of our devices and their fabrication as a solution for the mass production of efficient and reliable FET nanowire-based biological sensors

  7. Unique Characteristics of Vertical Carbon Nanotube Field-effect Transistors on Silicon

    KAUST Repository

    Li, Jingqi; Yue, Weisheng; Guo, Zaibing; Yang, Yang; Wang, Xianbin; Syed, Ahad A.; Zhang, Yafei

    2014-01-01

    A vertical carbon nanotube field-effect transistor (CNTFET) based on silicon (Si) substrate has been proposed and simulated using a semi-classical theory. A single-walled carbon nanotube (SWNT) and an n-type Si nanowire in series construct the channel of the transistor. The CNTFET presents ambipolar characteristics at positive drain voltage (Vd) and n-type characteristics at negative Vd. The current is significantly influenced by the doping level of n-Si and the SWNT band gap. The n-branch current of the ambipolar characteristics increases with increasing doping level of the n-Si while the p-branch current decreases. The SWNT band gap has the same influence on the p-branch current at a positive Vd and n-type characteristics at negative Vd. The lower the SWNT band gap, the higher the current. However, it has no impact on the n-branch current in the ambipolar characteristics. Thick oxide is found to significantly degrade the current and the subthreshold slope of the CNTFETs.

  8. Unique Characteristics of Vertical Carbon Nanotube Field-effect Transistors on Silicon

    KAUST Repository

    Li, Jingqi

    2014-07-01

    A vertical carbon nanotube field-effect transistor (CNTFET) based on silicon (Si) substrate has been proposed and simulated using a semi-classical theory. A single-walled carbon nanotube (SWNT) and an n-type Si nanowire in series construct the channel of the transistor. The CNTFET presents ambipolar characteristics at positive drain voltage (Vd) and n-type characteristics at negative Vd. The current is significantly influenced by the doping level of n-Si and the SWNT band gap. The n-branch current of the ambipolar characteristics increases with increasing doping level of the n-Si while the p-branch current decreases. The SWNT band gap has the same influence on the p-branch current at a positive Vd and n-type characteristics at negative Vd. The lower the SWNT band gap, the higher the current. However, it has no impact on the n-branch current in the ambipolar characteristics. Thick oxide is found to significantly degrade the current and the subthreshold slope of the CNTFETs.

  9. High performance Si nanowire field-effect-transistors based on a CMOS inverter with tunable threshold voltage.

    Science.gov (United States)

    Van, Ngoc Huynh; Lee, Jae-Hyun; Sohn, Jung Inn; Cha, Seung Nam; Whang, Dongmok; Kim, Jong Min; Kang, Dae Joon

    2014-05-21

    We successfully fabricated nanowire-based complementary metal-oxide semiconductor (NWCMOS) inverter devices by utilizing n- and p-type Si nanowire field-effect-transistors (NWFETs) via a low-temperature fabrication processing technique. We demonstrate that NWCMOS inverter devices can be operated at less than 1 V, a significantly lower voltage than that of typical thin-film based complementary metal-oxide semiconductor (CMOS) inverter devices. This low-voltage operation was accomplished by controlling the threshold voltage of the n-type Si NWFETs through effective management of the nanowire (NW) doping concentration, while realizing high voltage gain (>10) and ultra-low static power dissipation (≤3 pW) for high-performance digital inverter devices. This result offers a viable means of fabricating high-performance, low-operation voltage, and high-density digital logic circuits using a low-temperature fabrication processing technique suitable for next-generation flexible electronics.

  10. Size-effects in indium gallium arsenide nanowire field-effect transistors

    Energy Technology Data Exchange (ETDEWEB)

    Zota, Cezar B., E-mail: cezar.zota@eit.lth.se; Lind, E. [Department of Electrical and Information Technology, Lund University, Lund 22101 (Sweden)

    2016-08-08

    We fabricate and analyze InGaAs nanowire MOSFETs with channel widths down to 18 nm. Low-temperature measurements reveal quantized conductance due to subband splitting, a characteristic of 1D systems. We relate these features to device performance at room-temperature. In particular, the threshold voltage versus nanowire width is explained by direct observation of quantization of the first sub-band, i.e., band gap widening. An analytical effective mass quantum well model is able to describe the observed band structure. The results reveal a compromise between reliability, i.e., V{sub T} variability, and on-current, through the mean free path, in the choice of the channel material.

  11. Optimization of pH sensing using silicon nanowire field effect transistors with HfO2 as the sensing surface

    International Nuclear Information System (INIS)

    Zafar, Sufi; D'Emic, Christopher; Afzali, Ali; Fletcher, Benjamin; Zhu, Y; Ning, Tak

    2011-01-01

    Silicon nanowire field effect transistor sensors with SiO 2 /HfO 2 as the gate dielectric sensing surface are fabricated using a top down approach. These sensors are optimized for pH sensing with two key characteristics. First, the pH sensitivity is shown to be independent of buffer concentration. Second, the observed pH sensitivity is enhanced and is equal to the Nernst maximum sensitivity limit of 59 mV/pH with a corresponding subthreshold drain current change of ∼ 650%/pH. These two enhanced pH sensing characteristics are attributed to the use of HfO 2 as the sensing surface and an optimized fabrication process compatible with silicon processing technology.

  12. Optimization of pH sensing using silicon nanowire field effect transistors with HfO2 as the sensing surface.

    Science.gov (United States)

    Zafar, Sufi; D'Emic, Christopher; Afzali, Ali; Fletcher, Benjamin; Zhu, Y; Ning, Tak

    2011-10-07

    Silicon nanowire field effect transistor sensors with SiO(2)/HfO(2) as the gate dielectric sensing surface are fabricated using a top down approach. These sensors are optimized for pH sensing with two key characteristics. First, the pH sensitivity is shown to be independent of buffer concentration. Second, the observed pH sensitivity is enhanced and is equal to the Nernst maximum sensitivity limit of 59 mV/pH with a corresponding subthreshold drain current change of ∼ 650%/pH. These two enhanced pH sensing characteristics are attributed to the use of HfO(2) as the sensing surface and an optimized fabrication process compatible with silicon processing technology.

  13. Effect of Silicon Nanowire on Crystalline Silicon Solar Cell Characteristics

    Directory of Open Access Journals (Sweden)

    Zahra Ostadmahmoodi Do

    2016-06-01

    Full Text Available Nanowires (NWs are recently used in several sensor or actuator devices to improve their ordered characteristics. Silicon nanowire (Si NW is one of the most attractive one-dimensional nanostructures semiconductors because of its unique electrical and optical properties. In this paper, silicon nanowire (Si NW, is synthesized and characterized for application in photovoltaic device. Si NWs are prepared using wet chemical etching method which is commonly used as a simple and low cost method for producing nanowires of the same substrate material. The process conditions are adjusted to find the best quality of Si NWs. Morphology of Si NWs is studied using a field emission scanning electron microscopic technique. An energy dispersive X-Ray analyzer is also used to provide elemental identification and quantitative compositional information. Subsequently, Schottky type solar cell samples are fabricated on Si and Si NWs using ITO and Ag contacts. The junction properties are calculated using I-V curves in dark condition and the solar cell I-V characteristics are obtained under incident of the standardized light of AM1.5. The results for the two mentioned Schottky solar cell samples are compared and discussed. An improvement in short circuit current and efficiency of Schottky solar cell is found when Si nanowires are employed.

  14. Oxygen effect on the electrical characteristics of pentacene transistors

    International Nuclear Information System (INIS)

    Hu Yan; Dong Guifang; Hu Yuanchuan; Wang Liduo; Qiu Yong

    2006-01-01

    The effect of oxygen on the electrical characteristics of organic thin film transistors with pentacene as the active layer has been investigated. The saturation currents and mobilities of the transistors increase as the ambient oxygen concentration decreases, which is ascribed to the formation of a charge transfer complex between pentacene and O 2 . The deposition rate of the pentacene layer affects this phenomenon. The transistor with the pentacene layer deposited at a rate of 15 nm min -1 shows higher sensitivity to oxygen concentration than the device with the pentacene layer deposited at 30 nm min -1 . We suggest that when deposited at a lower rate the pentacene film is less compact, leading to easier entrance of oxygen into the charge accumulation region

  15. Noise characteristics of single-walled carbon nanotube network transistors

    International Nuclear Information System (INIS)

    Kim, Un Jeong; Kim, Kang Hyun; Kim, Kyu Tae; Min, Yo-Sep; Park, Wanjun

    2008-01-01

    The noise characteristics of randomly networked single-walled carbon nanotubes grown directly by plasma enhanced chemical vapor deposition (PECVD) are studied with field effect transistors (FETs). Due to the geometrical complexity of nanotube networks in the channel area and the large number of tube-tube/tube-metal junctions, the inverse frequency, 1/f, dependence of the noise shows a similar level to that of a single single-walled carbon nanotube transistor. Detailed analysis is performed with the parameters of number of mobile carriers and mobility in the different environment. This shows that the change in the number of mobile carriers resulting in the mobility change due to adsorption and desorption of gas molecules (mostly oxygen molecules) to the tube surface is a key factor in the 1/f noise level for carbon nanotube network transistors

  16. Silicon nanowire-based tunneling field-effect transistors on flexible plastic substrates.

    Science.gov (United States)

    Lee, Myeongwon; Koo, Jamin; Chung, Eun-Ae; Jeong, Dong-Young; Koo, Yong-Seo; Kim, Sangsig

    2009-11-11

    A technique to implement silicon nanowire (SiNW)-based tunneling field-effect transistors (TFETs) on flexible plastic substrates is developed for the first time. The p-i-n configured Si NWs are obtained from an Si wafer using a conventional top-down CMOS-compatible technology, and they are then transferred onto the plastic substrate. Based on gate-controlled band-to-band tunneling (BTBT) as their working principle, the SiNW-based TFETs show normal p-channel switching behavior with a threshold voltage of -1.86 V and a subthreshold swing of 827 mV/dec. In addition, ambipolar conduction is observed due to the presence of the BTBT between the heavily doped p+ drain and n+ channel regions, indicating that our TFETs can operate in the n-channel mode as well. Furthermore, the BTBT generation rates for both the p-channel and n-channel operating modes are nearly independent of the bending state (strain = 0.8%) of the plastic substrate.

  17. Silicon nanowire-based tunneling field-effect transistors on flexible plastic substrates

    International Nuclear Information System (INIS)

    Lee, Myeongwon; Koo, Jamin; Chung, Eun-Ae; Jeong, Dong-Young; Kim, Sangsig; Koo, Yong-Seo

    2009-01-01

    A technique to implement silicon nanowire (SiNW)-based tunneling field-effect transistors (TFETs) on flexible plastic substrates is developed for the first time. The p-i-n configured Si NWs are obtained from an Si wafer using a conventional top-down CMOS-compatible technology, and they are then transferred onto the plastic substrate. Based on gate-controlled band-to-band tunneling (BTBT) as their working principle, the SiNW-based TFETs show normal p-channel switching behavior with a threshold voltage of -1.86 V and a subthreshold swing of 827 mV/dec. In addition, ambipolar conduction is observed due to the presence of the BTBT between the heavily doped p + drain and n + channel regions, indicating that our TFETs can operate in the n-channel mode as well. Furthermore, the BTBT generation rates for both the p-channel and n-channel operating modes are nearly independent of the bending state (strain = 0.8%) of the plastic substrate.

  18. Silicon nanowire-based tunneling field-effect transistors on flexible plastic substrates

    Energy Technology Data Exchange (ETDEWEB)

    Lee, Myeongwon; Koo, Jamin; Chung, Eun-Ae; Jeong, Dong-Young; Kim, Sangsig [Department of Electrical Engineering and Institute for Nano Science, Korea University, 5-1, Anam-Dong, Seongbuk-Gu, Seoul 136-701 (Korea, Republic of); Koo, Yong-Seo, E-mail: sangsig@korea.ac.k [Department of Electrical Engineering, Seokyeong University, 16-1, Jungneung-dong, Seongbuk-gu, Seoul 136-704 (Korea, Republic of)

    2009-11-11

    A technique to implement silicon nanowire (SiNW)-based tunneling field-effect transistors (TFETs) on flexible plastic substrates is developed for the first time. The p-i-n configured Si NWs are obtained from an Si wafer using a conventional top-down CMOS-compatible technology, and they are then transferred onto the plastic substrate. Based on gate-controlled band-to-band tunneling (BTBT) as their working principle, the SiNW-based TFETs show normal p-channel switching behavior with a threshold voltage of -1.86 V and a subthreshold swing of 827 mV/dec. In addition, ambipolar conduction is observed due to the presence of the BTBT between the heavily doped p{sup +} drain and n{sup +} channel regions, indicating that our TFETs can operate in the n-channel mode as well. Furthermore, the BTBT generation rates for both the p-channel and n-channel operating modes are nearly independent of the bending state (strain = 0.8%) of the plastic substrate.

  19. Effect of traps and defects on high temperature performance of Ge channel junctionless nanowire transistors

    Directory of Open Access Journals (Sweden)

    Chuanchuan Sun

    2017-07-01

    Full Text Available We investigate the effect of traps and defects on high temperature performance of p-type germanium-on-insulator (GOI based junctionless nanowire transistors (JNTs at temperatures ranging from 300 to 450 K. Temperature dependence of the main electrical parameters, such as drive current (Ion, leakage current (Ioff, threshold voltage (Vt, transconductance (Gm and subthreshold slope (SS are extracted and compared with the reported results of conventional inversion mode (IM MOSFETs and Si based JNTs. The results show that the high interface trap density (Dit and defects can degrade high temperature reliability of GOI based JNTs significantly, in terms of Ioff, Vt variation, Gm-max and SS values. The Ioff is much more dependent on temperature than Ion and mainly affected by trap-assisted-tunneling (TAT current. The Vt variation with temperature is larger than that for IM MOSFETs and SOI based JNTs, which can be mostly attributed to the high Dit. The high Dit can also induce high SS values. The maximum Gm has a weak dependence on temperature and is significantly influenced by neutral defects scattering. Limiting the Dit and neutral defect densities is critical for the reliability of GOI based JNTs working at high temperatures.

  20. High performance non-volatile ferroelectric copolymer memory based on a ZnO nanowire transistor fabricated on a transparent substrate

    International Nuclear Information System (INIS)

    Nedic, Stanko; Welland, Mark; Tea Chun, Young; Chu, Daping; Hong, Woong-Ki

    2014-01-01

    A high performance ferroelectric non-volatile memory device based on a top-gate ZnO nanowire (NW) transistor fabricated on a glass substrate is demonstrated. The ZnO NW channel was spin-coated with a poly (vinylidenefluoride-co-trifluoroethylene) (P(VDF-TrFE)) layer acting as a top-gate dielectric without buffer layer. Electrical conductance modulation and memory hysteresis are achieved by a gate electric field induced reversible electrical polarization switching of the P(VDF-TrFE) thin film. Furthermore, the fabricated device exhibits a memory window of ∼16.5 V, a high drain current on/off ratio of ∼10 5 , a gate leakage current below ∼300 pA, and excellent retention characteristics for over 10 4 s

  1. Biosensor properties of SOI nanowire transistors with a PEALD Al{sub 2}O{sub 3} dielectric protective layer

    Energy Technology Data Exchange (ETDEWEB)

    Popov, V. P., E-mail: popov@isp.nsc.ru; Ilnitskii, M. A.; Zhanaev, E. D. [Russian Academy of Sciences, Rzhanov Institute of Semiconductor Physics, Siberian Branch (Russian Federation); Myakon’kich, A. V.; Rudenko, K. V. [Russian Academy of Sciences, Physical Technological Institute (Russian Federation); Glukhov, A. V. [Novosibirsk Semiconductor Device Plant and Design Bureau (Russian Federation)

    2016-05-15

    The properties of protective dielectric layers of aluminum oxide Al{sub 2}O{sub 3} applied to prefabricated silicon-nanowire transistor biochips by the plasma enhanced atomic layer deposition (PEALD) method before being housed are studied depending on the deposition and annealing modes. Coating the natural silicon oxide with a nanometer Al{sub 2}O{sub 3} layer insignificantly decreases the femtomole sensitivity of biosensors, but provides their stability in bioliquids. In deionized water, transistors with annealed aluminum oxide are closed due to the trapping of negative charges of <(1–10) × 10{sup 11} cm{sup −2} at surface states. The application of a positive potential to the substrate (V{sub sub} > 25 V) makes it possible to eliminate the negative charge and to perform multiple measurements in liquid at least for half a year.

  2. Effect of growth temperature on photoluminescence and piezoelectric characteristics of ZnO nanowires

    Energy Technology Data Exchange (ETDEWEB)

    Water, Walter [Institute of Electro-Optical and Materials Science, National Formosa University, Yunlin 632, Taiwan (China); Fang, T.-H. [Institute of Electro-Optical and Materials Science, National Formosa University, Yunlin 632, Taiwan (China); Institute of Mechanical and Electromechanical Engineering, National Formosa University, Yunlin 632, Taiwan (China)], E-mail: fang.tehua@msa.hinet.net; Ji, L.-W.; Lee, C.-C. [Institute of Electro-Optical and Materials Science, National Formosa University, Yunlin 632, Taiwan (China)

    2009-02-25

    ZnO nanowire arrays were synthesized on Au-coated silicon (1 0 0) substrates by using vapour-liquid-solid process in this work. The effect of growth temperatures on the crystal structure and the surface morphology of ZnO nanowires were investigated by X-ray diffraction and scanning electron microscope. The absorption and optical characteristics of the nanowires were examined by Ultraviolet/Visible spectroscopy, and photoluminescence, respectively. The photoluminescence results exhibited ZnO nanowires had an ultraviolet and blue emission at 383 and 492 nm. Then a nanogenerator with ZnO nanowire arrays was fabricated and demonstrated Schottky-like current-voltage characteristics.

  3. Controlled ion-beam transformation of silicon bipolar microwave power transistor's characteristics

    International Nuclear Information System (INIS)

    Solodukha, V.A.; Snitovskij, Yu.P.

    2015-01-01

    In this article, a method for changing the silicon bipolar microwave power transistor's characteristics in a direct and deliberate manner by modifying the chemical composition at the molybdenum - silicon boundary, the electro-physical properties of molybdenum - silicon contacts, and the electrophysical characteristics of transistor structure areas by the phosphorus ions irradiation of generated ohmic molybdenum - silicon contacts to the transistor emitters is proposed for the first time. The possibilities of this method are investigated and confirmed experimentally. (authors)

  4. The ITO-capped WO{sub 3} nanowires biosensor based on field-effect transistor in label-free protein sensing

    Energy Technology Data Exchange (ETDEWEB)

    Shariati, Mohsen [Sharif University of Technology, Institute for Nanoscience and Nanotechnology, Tehran (Iran, Islamic Republic of)

    2017-05-15

    The fabrication of ITO-capped WO{sub 3} nanowires associated with their bio-sensing properties in field-effect transistor diagnostics basis as a biosensor has been reported. The bio-sensing property for manipulated nanowires elucidated that the grown nanostructures were very sensitive to protein. The ITO-capped WO{sub 3} nanowires biosensor showed an intensive bio-sensing activity against reliable protein. Polylysine strongly charged bio-molecule was applied as model system to demonstrate the implementation of materialized biosensor. The employed sensing mechanism was 'label-free' and depended on bio-molecule's intrinsic charge. For nanowires synthesis, the vapor-liquid-solid mechanism was used. Nanowires were beyond a few hundred nanometers in lengths and around 15-20 nm in diameter, while the globe cap's size on the nanowires was around 15-25 nm. The indium tin oxide (ITO) played as catalyst in nanofabrication for WO{sub 3} nanowires growth and had outstanding role in bio-sensing especially for bio-molecule adherence. In applied electric field presence, the fabricated device showed the great potential to enhance medical diagnostics. (orig.)

  5. Non-classical logic inverter coupling a ZnO nanowire-based Schottky barrier transistor and adjacent Schottky diode.

    Science.gov (United States)

    Hosseini Shokouh, Seyed Hossein; Raza, Syed Raza Ali; Lee, Hee Sung; Im, Seongil

    2014-08-21

    On a single ZnO nanowire (NW), we fabricated an inverter-type device comprising a Schottky diode (SD) and field-effect transistor (FET), aiming at 1-dimensional (1D) electronic circuits with low power consumption. The SD and adjacent FET worked respectively as the load and driver, so that voltage signals could be easily extracted as the output. In addition, NW FET with a transparent conducting oxide as top gate turned out to be very photosensitive, although ZnO NW SD was blind to visible light. Based on this, we could achieve an array of photo-inverter cells on one NW. Our non-classical inverter is regarded as quite practical for both logic and photo-sensing due to its performance as well as simple device configuration.

  6. The impact of silicon nano-wire technology on the design of single-work-function CMOS transistors and circuits

    International Nuclear Information System (INIS)

    Bindal, Ahmet; Hamedi-Hagh, Sotoudeh

    2006-01-01

    This three-dimensional exploratory study on vertical silicon wire MOS transistors with metal gates and undoped bodies demonstrates that these transistors dissipate less power and occupy less layout area while producing comparable transient response with respect to the state-of-the-art bulk and SOI technologies. The study selects a single metal gate work function for both NMOS and PMOS transistors to alleviate fabrication difficulties and then determines a common device geometry to produce an OFF current smaller than 1 pA for each transistor. Once an optimum wire radius and effective channel length is determined, DC characteristics including threshold voltage roll-off, drain-induced barrier lowering and sub-threshold slope of each transistor are measured. Simple CMOS gates such as an inverter, two- and three-input NAND, NOR and XOR gates and a full adder, composed of the optimum NMOS and PMOS transistors, are built to measure transient performance, power dissipation and layout area. Simulation results indicate that worst-case transient time and worst-case delay are 1.63 and 1.46 ps, respectively, for a two-input NAND gate and 7.51 and 7.43 ps, respectively, for a full adder for a fan-out of six transistor gates (24 aF). Worst-case power dissipation is 62.1 nW for a two-input NAND gate and 118.1 nW for a full adder at 1 GHz for the same output capacitance. The layout areas are 0.0066 μm 2 for the two-input NAND gate and 0.049 μm 2 for the full adder circuits

  7. Controllable electrical properties of metal-doped In2O3 nanowires for high-performance enhancement-mode transistors.

    Science.gov (United States)

    Zou, Xuming; Liu, Xingqiang; Wang, Chunlan; Jiang, Ying; Wang, Yong; Xiao, Xiangheng; Ho, Johnny C; Li, Jinchai; Jiang, Changzhong; Xiong, Qihua; Liao, Lei

    2013-01-22

    In recent years, In(2)O(3) nanowires (NWs) have been widely explored in many technological areas due to their excellent electrical and optical properties; however, most of these devices are based on In(2)O(3) NW field-effect transistors (FETs) operating in the depletion mode, which induces relatively higher power consumption and fancier circuit integration design. Here, n-type enhancement-mode In(2)O(3) NW FETs are successfully fabricated by doping different metal elements (Mg, Al, and Ga) in the NW channels. Importantly, the resulting threshold voltage can be effectively modulated through varying the metal (Mg, Ga, and Al) content in the NWs. A series of scaling effects in the mobility, transconductance, threshold voltage, and source-drain current with respect to the device channel length are also observed. Specifically, a small gate delay time (0.01 ns) and high on-current density (0.9 mA/μm) are obtained at 300 nm channel length. Furthermore, Mg-doped In(2)O(3) NWs are then employed to fabricate NW parallel array FETs with a high saturation current (0.5 mA), on/off ratio (>10(9)), and field-effect mobility (110 cm(2)/V·s), while the subthreshold slope and threshold voltage do not show any significant changes. All of these results indicate the great potency for metal-doped In(2)O(3) NWs used in the low-power, high-performance thin-film transistors.

  8. Solution-Processed Donor-Acceptor Polymer Nanowire Network Semiconductors For High-Performance Field-Effect Transistors

    Science.gov (United States)

    Lei, Yanlian; Deng, Ping; Li, Jun; Lin, Ming; Zhu, Furong; Ng, Tsz-Wai; Lee, Chun-Sing; Ong, Beng S.

    2016-01-01

    Organic field-effect transistors (OFETs) represent a low-cost transistor technology for creating next-generation large-area, flexible and ultra-low-cost electronics. Conjugated electron donor-acceptor (D-A) polymers have surfaced as ideal channel semiconductor candidates for OFETs. However, high-molecular weight (MW) D-A polymer semiconductors, which offer high field-effect mobility, generally suffer from processing complications due to limited solubility. Conversely, the readily soluble, low-MW D-A polymers give low mobility. We report herein a facile solution process which transformed a lower-MW, low-mobility diketopyrrolopyrrole-dithienylthieno[3,2-b]thiophene (I) into a high crystalline order and high-mobility semiconductor for OFETs applications. The process involved solution fabrication of a channel semiconductor film from a lower-MW (I) and polystyrene blends. With the help of cooperative shifting motion of polystyrene chain segments, (I) readily self-assembled and crystallized out in the polystyrene matrix as an interpenetrating, nanowire semiconductor network, providing significantly enhanced mobility (over 8 cm2V−1s−1), on/off ratio (107), and other desirable field-effect properties that meet impactful OFET application requirements. PMID:27091315

  9. Electrical characterization of Ω-gated uniaxial tensile strained Si nanowire-array metal-oxide-semiconductor field effect transistors with - and channel orientations

    International Nuclear Information System (INIS)

    Habicht, Stefan; Feste, Sebastian; Zhao, Qing-Tai; Buca, Dan; Mantl, Siegfried

    2012-01-01

    Nanowire-array metal-oxide-semiconductor field effect transistors (MOSFETs) were fabricated along and crystal directions on (001) un-/strained silicon-on-insulator substrates. Lateral strain relaxation through patterning was employed to transform biaxial tensile strain into uniaxial tensile strain along the nanowire. Devices feature ideal subthreshold swings and maximum on-current/off-current ratios of 10 11 for n and p-type transistors on both substrates. Electron and hole mobilities were extracted by split C–V method. For p-MOSFETs an increased mobility is observed for channel direction devices compared to devices. The n-MOSFETs showed a 45% increased electron mobility compared to devices. The comparison of strained and unstrained n-MOSFETs along and clearly demonstrates improved electron mobilities for strained channels of both channel orientations.

  10. Monolithic integration of a silicon nanowire field-effect transistors array on a complementary metal-oxide semiconductor chip for biochemical sensor applications.

    Science.gov (United States)

    Livi, Paolo; Kwiat, Moria; Shadmani, Amir; Pevzner, Alexander; Navarra, Giulio; Rothe, Jörg; Stettler, Alexander; Chen, Yihui; Patolsky, Fernando; Hierlemann, Andreas

    2015-10-06

    We present a monolithic complementary metal-oxide semiconductor (CMOS)-based sensor system comprising an array of silicon nanowire field-effect transistors (FETs) and the signal-conditioning circuitry on the same chip. The silicon nanowires were fabricated by chemical vapor deposition methods and then transferred to the CMOS chip, where Ti/Pd/Ti contacts had been patterned via e-beam lithography. The on-chip circuitry measures the current flowing through each nanowire FET upon applying a constant source-drain voltage. The analog signal is digitized on chip and then transmitted to a receiving unit. The system has been successfully fabricated and tested by acquiring I-V curves of the bare nanowire-based FETs. Furthermore, the sensing capabilities of the complete system have been demonstrated by recording current changes upon nanowire exposure to solutions of different pHs, as well as by detecting different concentrations of Troponin T biomarkers (cTnT) through antibody-functionalized nanowire FETs.

  11. High-gain subnanowatt power consumption hybrid complementary logic inverter with WSe2 nanosheet and ZnO nanowire transistors on glass.

    Science.gov (United States)

    Shokouh, Seyed Hossein Hosseini; Pezeshki, Atiye; Ali Raza, Syed Raza; Lee, Hee Sung; Min, Sung-Wook; Jeon, Pyo Jin; Shin, Jae Min; Im, Seongil

    2015-01-07

    A 1D-2D hybrid complementary logic inverter comprising of ZnO nanowire and WSe2 nanosheet field-effect transistors (FETs) is fabricated on glass, which shows excellent static and dynamic electrical performances with a voltage gain of ≈60, sub-nanowatt power consumption, and at least 1 kHz inverting speed. © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  12. All-(111) surface silicon nanowire field effect transistor devices: Effects of surface preparations

    NARCIS (Netherlands)

    Masood, M.N.; Carlen, Edwin; van den Berg, Albert

    2014-01-01

    Etching/hydrogen termination of All-(111) surface silicon nanowire field effect (SiNW-FET) devices developed by conventional photolithography and plane dependent wet etchings is studied with X-ray photoelectron spectroscopy (XPS), scanning electron microscopy (SEM), atomic force microscopy (AFM) and

  13. A soft lithographic approach to fabricate InAs nanowire field-effect transistors

    DEFF Research Database (Denmark)

    Madsen, Morten; Lee, S. H.; Shin, S.-H.

    2018-01-01

    -down approach and an epitaxial layer transfer process, using MBE-grown ultrathin InAs as a source wafer. The width of the InAs nanowires was controlled using solvent-assisted nanoscale embossing (SANE), descumming, and etching processes. By optimizing these processes, NWs with a width less than 50 nm were...

  14. Solid-state diffusion as an efficient doping method for silicon nanowires and nanowire field effect transistors

    International Nuclear Information System (INIS)

    Moselund, K E; Ghoneim, H; Schmid, H; Bjoerk, M T; Loertscher, E; Karg, S; Signorello, G; Webb, D; Tschudy, M; Beyeler, R; Riel, H

    2010-01-01

    In this work we investigate doping by solid-state diffusion from a doped oxide layer, obtained by plasma-enhanced chemical vapor deposition (PECVD), as a means for selectively doping silicon nanowires (NWs). We demonstrate both n-type (phosphorous) and p-type (boron) doping up to concentrations of 10 20 cm -3 , and find that this doping mechanism is more efficient for NWs as opposed to planar substrates. We observe no diameter dependence in the range of 25 to 80 nm, which signifies that the NWs are uniformly doped. The drive-in temperature (800-950 deg. C) can be used to adjust the actual doping concentration in the range 2 x 10 18 to 10 20 cm -3 . Furthermore, we have fabricated NMOS and PMOS devices to show the versatility of this approach and the possibility of achieving segmented doping of NWs. The devices show high I on /I off ratios of around 10 7 and, especially for the PMOS, good saturation behavior and low hysteresis.

  15. Magnetic behaviour of densely packed hexagonal arrays of Ni nanowires: Influence of geometric characteristics

    International Nuclear Information System (INIS)

    Vazquez, M.; Pirota, K.; Torrejon, J.; Navas, D.; Hernandez-Velez, M.

    2005-01-01

    Densely packed arrays of magnetic nanowires with hexagonal symmetry have been prepared by electrodeposition filling of the nanopores in alumina membranes previously formed by self-assembling induced by anodization. The influence of geometrical characteristics of arrays of Ni nanowires on their hysteresis loops have been studied. These characteristics are controlled by suitable choosing of preparation parameters: nanowires diameter ranges between 18 and 80 nm for lattice parameter of hexagonal symmetry of 65 and 105 nm, while length of nanowires is taken between 500 and 2000 nm. Additionally, the temperature dependence of coercivity when applying the field parallel to the nanowires or in-plane of the membrane has been measured. All these results allows us to conclude that magnetic behaviour is determined by the balance between different energy contributions, namely, the shape anisotropy of individual nanowires, the magnetostatic interaction among nanowires (confirmed to play a decisive role), and seemingly the magnetoelastic anisotropy induced in the nanowires by the alumina matrix through temperature changes as a consequence of their different thermal expansion coefficients

  16. Piezo-phototronic Boolean logic and computation using photon and strain dual-gated nanowire transistors.

    Science.gov (United States)

    Yu, Ruomeng; Wu, Wenzhuo; Pan, Caofeng; Wang, Zhaona; Ding, Yong; Wang, Zhong Lin

    2015-02-04

    Using polarization charges created at the metal-cadmium sulfide interface under strain to gate/modulate electrical transport and optoelectronic processes of charge carriers, the piezo-phototronic effect is applied to process mechanical and optical stimuli into electronic controlling signals. The cascade nanowire networks are demonstrated for achieving logic gates, binary computations, and gated D latches to store information carried by these stimuli. © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  17. Simultaneous Detection of α-Fetoprotein and Carcinoembryonic Antigen Based on Si Nanowire Field-Effect Transistors

    Directory of Open Access Journals (Sweden)

    Kuiyu Zhu

    2015-08-01

    Full Text Available Primary hepatic carcinoma (PHC is one of the most common malignancies worldwide, resulting in death within six to 20 months. The survival rate can be improved by effective treatments when diagnosed at an early stage. The α-fetoprotein (AFP and carcinoembryonic antigen (CEA have been identified as markers that are expressed at higher levels in PHC patients. In this study, we employed silicon nanowire field-effect transistors (SiNW-FETs with polydimethylsiloxane (PDMS microfluidic channels to simultaneously detect AFP and CEA in desalted human serum. Dual-channel PDMS was first utilized for the selective modification of AFP and CEA antibodies on SiNWs, while single-channel PDMS offers faster and more sensitive detection of AFP and CEA in serum. During the SiNW modification process, 0.1% BSA was utilized to minimize nonspecific protein binding from serum. The linear dynamic ranges for the AFP and CEA detection were measured to be 500 fg/mL to 50 ng/mL and 50 fg/mL to 10 ng/mL, respectively. Our work demonstrates the promising potential of fabricated SiNW-FETs as a direct detection kit for multiple tumor markers in serum; therefore, it provides a chance for early stage diagnose and, hence, more effective treatments for PHC patients.

  18. Ultralow power complementary inverter circuits using axially doped p- and n-channel Si nanowire field effect transistors.

    Science.gov (United States)

    Van, Ngoc Huynh; Lee, Jae-Hyun; Whang, Dongmok; Kang, Dae Joon

    2016-06-09

    We have successfully synthesized axially doped p- and n-type regions on a single Si nanowire (NW). Diodes and complementary metal-oxide-semiconductor (CMOS) inverter devices using single axial p- and n-channel Si NW field-effect transistors (FETs) were fabricated. We show that the threshold voltages of both p- and n-channel Si NW FETs can be lowered to nearly zero by effectively controlling the doping concentration. Because of the high performance of the p- and n-type Si NW channel FETs, especially with regard to the low threshold voltage, the fabricated NW CMOS inverters have a low operating voltage (<3 V) while maintaining a high voltage gain (∼6) and ultralow static power dissipation (≤0.3 pW) at an input voltage of ±3 V. This result offers a viable way for the fabrication of a high-performance high-density logic circuit using a low-temperature fabrication process, which makes it suitable for flexible electronics.

  19. The field effect transistor DNA biosensor based on ITO nanowires in label-free hepatitis B virus detecting compatible with CMOS technology.

    Science.gov (United States)

    Shariati, Mohsen

    2018-05-15

    In this paper the field-effect transistor DNA biosensor for detecting hepatitis B virus (HBV) based on indium tin oxide nanowires (ITO NWs) in label free approach has been fabricated. Because of ITO nanowires intensive conductance and functional modified surface, the probe immobilization and target hybridization were increased strongly. The high resolution transmission electron microscopy (HRTEM) measurement showed that ITO nanowires were crystalline and less than 50nm in diameter. The single-stranded hepatitis B virus DNA (SS-DNA) was immobilized as probe on the Au-modified nanowires. The DNA targets were measured in a linear concentration range from 1fM to 10µM. The detection limit of the DNA biosensor was about 1fM. The time of the hybridization process for defined single strand was 90min. The switching ratio of the biosensor between "on" and "off" state was ~ 1.1 × 10 5 . For sensing the specificity of the biosensor, non-complementary, mismatch and complementary DNA oligonucleotide sequences were clearly discriminated. The HBV biosensor confirmed the highly satisfied specificity for differentiating complementary sequences from non-complementary and the mismatch oligonucleotides. The response time of the DNA sensor was 37s with a high reproducibility. The stability and repeatability of the DNA biosensor showed that the peak current of the biosensor retained 98% and 96% of its initial response for measurements after three and five weeks, respectively. Copyright © 2018 Elsevier B.V. All rights reserved.

  20. A Water-Based Silver-Nanowire Screen-Print Ink for the Fabrication of Stretchable Conductors and Wearable Thin-Film Transistors.

    Science.gov (United States)

    Liang, Jiajie; Tong, Kwing; Pei, Qibing

    2016-07-01

    A water-based silver-nanowire (AgNW) ink is formulated for screen printing. Screen-printed AgNW patterns have uniform sharp edges, ≈50 μm resolution, and electrical conductivity as high as 4.67 × 10(4) S cm(-1) . The screen-printed AgNW patterns are used to fabricate a stretchable composite conductor, and a fully printed and intrinsically stretchable thin-film transistor array is also realized. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  1. Realization of size controllable graphene micro/nanogap with a micro/nanowire mask method for organic field-effect transistors

    DEFF Research Database (Denmark)

    Liao, Zhiyu; Wan, Qing; Liu, Huixuan

    2011-01-01

    with the graphene micro/nanogap bottom electrodes. The ultrathin thickness of the graphene, combined with its good compatibility with organic semiconductors, and high electrical conductivity produced high-performance CuPc film device with mobility at 0.053 cm(2)/Vs and on/off ratio at 10(5), showing promising......A size controllable graphene micro/nanogap fabrication method using micro/nanowire as mask is presented. The gap dimension can be adjusted by the diameter of the mask wire. As a typical application, copper phthalocyanine (CuPc) film organic field-effect transistors (OFETs) were fabricated...

  2. Non-Faradaic electrical impedimetric investigation of the interfacial effects of neuronal cell growth and differentiation on silicon nanowire transistors.

    Science.gov (United States)

    Lin, Shu-Ping; Vinzons, Lester U; Kang, Yu-Shan; Lai, Tung-Yen

    2015-05-13

    Silicon nanowire field-effect transistor (SiNW FET) devices have been interfaced with cells; however, their application for noninvasive, real-time monitoring of interfacial effects during cell growth and differentiation on SiNW has not been fully explored. Here, we cultured rat adrenal pheochromocytoma (PC12) cells, a type of neural progenitor cell, directly on SiNW FET devices to monitor cell adhesion during growth and morphological changes during neuronal differentiation for a period of 5-7 d. Monitoring was performed by measuring the non-Faradaic electrical impedance of the cell-SiNW FET system using a precision LCR meter. Our SiNW FET devices exhibited changes in impedance parameters during cell growth and differentiation because of the negatively charged cell membrane, seal resistance, and membrane capacitance at the cell/SiNW interface. It was observed that during both PC12 cell growth and neuronal differentiation, the impedance magnitude increased and the phase shifted to more negative values. However, impedance changes during cell growth already plateaued 3 d after seeding, while impedance changes continued until the last observation day during differentiation. Our results also indicate that the frequency shift to above 40 kHz after growth factor induction resulted from a larger coverage of cell membrane on the SiNWs due to distinctive morphological changes according to vinculin staining. Encapsulation of PC12 cells in a hydrogel scaffold resulted in a lack of trend in impedance parameters and confirmed that impedance changes were due to the cells. Moreover, cytolysis of the differentiated PC12 cells led to significant changes in impedance parameters. Equivalent electrical circuits were used to analyze the changes in impedance values during cell growth and differentiation. The technique employed in this study can provide a platform for performing investigations of growth-factor-induced progenitor cell differentiation.

  3. Static and kinetic friction characteristics of nanowire on different substrates

    Energy Technology Data Exchange (ETDEWEB)

    Kim, Hyun-Joon [Department of Precision Mechanical Engineering, Kyungpook National University, Sangju 37224 (Korea, Republic of); Nguyen, Gia Hau; Ky, Dinh Le Cao; Tran, Da Khoa [School of Mechanical Engineering, University of Ulsan, Ulsan 44610 (Korea, Republic of); Jeon, Ki-Joon [Department of Environmental Engineering, Inha University, Incheon 22212 (Korea, Republic of); Chung, Koo-Hyun, E-mail: khchung@ulsan.ac.kr [School of Mechanical Engineering, University of Ulsan, Ulsan 44610 (Korea, Republic of)

    2016-08-30

    Highlights: • Direct measurement of kinetic friction of oxidized Si NW using AFM. • Determination of static friction of oxidized Si NW from most bent state. • Friction characteristics of oxidized Si NW on SiO{sub 2} and graphene. • Estimation of shear stress between cylindrical NW and flat substrate. • No significant dependence of shear stress on NW radius. - Abstract: Friction characteristics of nanowires (NWs), which may be used as building blocks for nano-devices, are crucial, especially for cases where contact sliding occurs during the device operation. In this work, the static and kinetic friction characteristics of oxidized Si NWs deposited on thermally grown SiO{sub 2} and chemical vapor-deposited single layer graphene were investigated using an atomic force microscope (AFM). Kinetic friction between the oxidized Si NWs and the substrates was directly measured by the AFM. Static friction was also obtained from the most bent state of the NWs using the individually determined elastic moduli of the NWs from kinetic friction experiments based on elastic beam theory. Furthermore, the shear stress between the oxidized Si NWs and the substrates was estimated based on adhesive contact theory. It was found that both static and kinetic friction increased as the radius of the NWs increased. The friction of the oxidized Si NWs on the graphene substrate was found to be smaller than that on the SiO{sub 2} substrate, which suggests that chemical vapor-deposited graphene can be used as a lubricant or as a protective layer in nano-devices to reduce friction. The shear stress estimated from the kinetic friction data between the oxidized Si NWs and the SiO{sub 2} substrate ranged from 7.5 to 12.3 MPa while that between the oxidized Si NWs and the graphene substrate ranged from 4.7 to 7.0 MPa. The result also indicated that the dependence of shear stress on the radius of the NWs was not significant. These findings may provide insight into the friction characteristics

  4. Static and kinetic friction characteristics of nanowire on different substrates

    International Nuclear Information System (INIS)

    Kim, Hyun-Joon; Nguyen, Gia Hau; Ky, Dinh Le Cao; Tran, Da Khoa; Jeon, Ki-Joon; Chung, Koo-Hyun

    2016-01-01

    Highlights: • Direct measurement of kinetic friction of oxidized Si NW using AFM. • Determination of static friction of oxidized Si NW from most bent state. • Friction characteristics of oxidized Si NW on SiO 2 and graphene. • Estimation of shear stress between cylindrical NW and flat substrate. • No significant dependence of shear stress on NW radius. - Abstract: Friction characteristics of nanowires (NWs), which may be used as building blocks for nano-devices, are crucial, especially for cases where contact sliding occurs during the device operation. In this work, the static and kinetic friction characteristics of oxidized Si NWs deposited on thermally grown SiO 2 and chemical vapor-deposited single layer graphene were investigated using an atomic force microscope (AFM). Kinetic friction between the oxidized Si NWs and the substrates was directly measured by the AFM. Static friction was also obtained from the most bent state of the NWs using the individually determined elastic moduli of the NWs from kinetic friction experiments based on elastic beam theory. Furthermore, the shear stress between the oxidized Si NWs and the substrates was estimated based on adhesive contact theory. It was found that both static and kinetic friction increased as the radius of the NWs increased. The friction of the oxidized Si NWs on the graphene substrate was found to be smaller than that on the SiO 2 substrate, which suggests that chemical vapor-deposited graphene can be used as a lubricant or as a protective layer in nano-devices to reduce friction. The shear stress estimated from the kinetic friction data between the oxidized Si NWs and the SiO 2 substrate ranged from 7.5 to 12.3 MPa while that between the oxidized Si NWs and the graphene substrate ranged from 4.7 to 7.0 MPa. The result also indicated that the dependence of shear stress on the radius of the NWs was not significant. These findings may provide insight into the friction characteristics of NWs.

  5. Electrical conductivity characteristic of TiO2 nanowires from hydrothermal method

    International Nuclear Information System (INIS)

    Othman, Mohd Azlishah; Amat, Noor Faridah; Ahmad, Badrul Hisham; Rajan, Jose

    2014-01-01

    One dimensional nanostructures of titanium dioxide (TiO 2 ) were synthesized via hydrothermal method by mixing TiO 2 as precursor in aqueous solution of NaOH as solvent. Then, heat and washing treatment was applied. Thus obtained wires had diameter ∼15 nm. TiO 2 nanowires will be used as a network in solar cell such dye-sensitized solar cell in order to improve the performance of electron movement in the device. To improve the performance of electron movement, the characteristics of TiO 2 nanowires have been analyses using field emission scanning electron microscopy (FESEM) analysis, x-ray diffractometer (XRD) analysis and brunauer emmett teller (BET) analysis. Finally, electrical conductivity of TiO 2 nanowires was determined by measuring the resistance of the TiO 2 nanowires paste on microscope glass.

  6. Characteristics of domain wall chirality and propagation in a Y-junction nanowire

    Energy Technology Data Exchange (ETDEWEB)

    Kwak, W.-Y.; Yoon, Seungha; Kwon, J.-H. [School of Materials Science and Engineering, Gwangju Institute of Science and Technology (GIST), Gwangju 61005 (Korea, Republic of); Grünberg, P. [Gruenberg Center for Magnetic Nanomaterials, Gwangju Institute of Science and Technology (GIST), Gwangju 61005 (Korea, Republic of); Cho, B. K., E-mail: chobk@gist.ac.kr [School of Materials Science and Engineering, Gwangju Institute of Science and Technology (GIST), Gwangju 61005 (Korea, Republic of); Gruenberg Center for Magnetic Nanomaterials, Gwangju Institute of Science and Technology (GIST), Gwangju 61005 (Korea, Republic of)

    2016-01-14

    Chirality-dependent propagation of transverse wall along a nanowire was investigated using a Y-junction with spin-valve structure. It was found that the Y-junction can be used for convenient and effective electric detection of transverse domain wall chirality, especially in a nanowire with sub-200 nm width, where it is difficult to electrically detect chirality using conventional artificial defect, such as a notch, due to small resistance change. Domain wall propagation path in the Y-junction was found to be determined by the wall chirality, whether clockwise or counterclockwise. Using the Y-junction nanowire, characteristics of domain wall chirality that was nucleated in a nucleation pad, attached at the end of a nanowire, were studied and found to be in good agreement with the results of theoretical simulation.

  7. Graphene field effect transistors with niobium contacts and asymmetric transfer characteristics

    International Nuclear Information System (INIS)

    Bartolomeo, Antonio Di; Romeo, Francesco; Sabatino, Paolo; Carapella, Giovanni; Iemmo, Laura; Giubileo, Filippo; Schroeder, Thomas; Lupina, Grzegorz

    2015-01-01

    We fabricate back-gated field effect transistors using niobium electrodes on mechanically exfoliated monolayer graphene and perform electrical characterization in the pressure range from atmospheric down to 10 −4 mbar. We study the effect of room temperature vacuum degassing and report asymmetric transfer characteristics with a resistance plateau in the n-branch. We show that weakly chemisorbed Nb acts as p-dopant on graphene and explain the transistor characteristics by Nb/graphene interaction with unpinned Fermi level at the interface. (paper)

  8. Three-dimensional vertical Si nanowire MOS capacitor model structure for the study of electrical versus geometrical Si nanowire characteristics

    Science.gov (United States)

    Hourdakis, E.; Casanova, A.; Larrieu, G.; Nassiopoulou, A. G.

    2018-05-01

    Three-dimensional (3D) Si surface nanostructuring is interesting towards increasing the capacitance density of a metal-oxidesemiconductor (MOS) capacitor, while keeping reduced footprint for miniaturization. Si nanowires (SiNWs) can be used in this respect. With the aim of understanding the electrical versus geometrical characteristics of such capacitors, we fabricated and studied a MOS capacitor with highly ordered arrays of vertical Si nanowires of different lengths and thermal silicon oxide dielectric, in comparison to similar flat MOS capacitors. The high homogeneity and ordering of the SiNWs allowed the determination of the single SiNW capacitance and intrinsic series resistance, as well as other electrical characteristics (density of interface states, flat-band voltage and leakage current) in relation to the geometrical characteristics of the SiNWs. The SiNW capacitors demonstrated increased capacitance density compared to the flat case, while maintaining a cutoff frequency above 1 MHz, much higher than in other reports in the literature. Finally, our model system has been shown to constitute an excellent platform for the study of SiNW capacitors with either grown or deposited dielectrics, as for example high-k dielectrics for further increasing the capacitance density. This will be the subject of future work.

  9. Influence of disorder on transfer characteristics of organic electrochemical transistors

    KAUST Repository

    Friedlein, Jacob T.; Rivnay, Jonathan; Dunlap, David H.; McCulloch, Iain; Shaheen, Sean E.; McLeod, Robert R.; Malliaras, George G.

    2017-01-01

    Organic electrochemical transistors (OECTs) are receiving a great deal of attention as transducers of biological signals due to their high transconductance. A ubiquitous property of these devices is the non-monotonic dependence of transconductance on gate voltage. However, this behavior is not described by existing models. Using OECTs made of materials with different chemical and electrical properties, we show that this behavior arises from the influence of disorder on the electronic transport properties of the organic semiconductor and occurs even in the absence of contact resistance. These results imply that the non-monotonic transconductance is an intrinsic property of OECTs and cannot be eliminated by device design or contact engineering. Finally, we present a model based on the physics of electronic conduction in disordered materials. This model fits experimental transconductance curves and describes strategies for rational material design to improve OECT performance in sensing applications.

  10. Transport Characteristics of Mesoscopic Radio-Frequency Single Electron Transistor

    International Nuclear Information System (INIS)

    Phillips, A. H.; Kirah, K.; Aly, N. A. I.; El-Sayes, H. E.

    2008-01-01

    The transport property of a quantum dot under the influence of external time-dependent field is investigated. The mesoscopic device is modelled as semiconductor quantum dot coupled weakly to superconducting leads via asymmetric double tunnel barriers of different heights. An expression for the current is deduced by using the Landauer–Buttiker formula, taking into consideration of both the Coulomb blockade effect and the magnetic field. It is found that the periodic oscillation of the current with the magnetic field is controlled by the ratio of the frequency of the applied ac-field to the electron cyclotron frequency. Our results show that the present device operates as a radio-frequency single electron transistor

  11. Influence of disorder on transfer characteristics of organic electrochemical transistors

    KAUST Repository

    Friedlein, Jacob T.

    2017-07-13

    Organic electrochemical transistors (OECTs) are receiving a great deal of attention as transducers of biological signals due to their high transconductance. A ubiquitous property of these devices is the non-monotonic dependence of transconductance on gate voltage. However, this behavior is not described by existing models. Using OECTs made of materials with different chemical and electrical properties, we show that this behavior arises from the influence of disorder on the electronic transport properties of the organic semiconductor and occurs even in the absence of contact resistance. These results imply that the non-monotonic transconductance is an intrinsic property of OECTs and cannot be eliminated by device design or contact engineering. Finally, we present a model based on the physics of electronic conduction in disordered materials. This model fits experimental transconductance curves and describes strategies for rational material design to improve OECT performance in sensing applications.

  12. Influence of disorder on transfer characteristics of organic electrochemical transistors

    Science.gov (United States)

    Friedlein, Jacob T.; Rivnay, Jonathan; Dunlap, David H.; McCulloch, Iain; Shaheen, Sean E.; McLeod, Robert R.; Malliaras, George G.

    2017-07-01

    Organic electrochemical transistors (OECTs) are receiving a great deal of attention as transducers of biological signals due to their high transconductance. A ubiquitous property of these devices is the non-monotonic dependence of transconductance on gate voltage. However, this behavior is not described by existing models. Using OECTs made of materials with different chemical and electrical properties, we show that this behavior arises from the influence of disorder on the electronic transport properties of the organic semiconductor and occurs even in the absence of contact resistance. These results imply that the non-monotonic transconductance is an intrinsic property of OECTs and cannot be eliminated by device design or contact engineering. Finally, we present a model based on the physics of electronic conduction in disordered materials. This model fits experimental transconductance curves and describes strategies for rational material design to improve OECT performance in sensing applications.

  13. Effect of liquid gate bias rising time in pH sensors based on Si nanowire ion sensitive field effect transistors

    Science.gov (United States)

    Jang, Jungkyu; Choi, Sungju; Kim, Jungmok; Park, Tae Jung; Park, Byung-Gook; Kim, Dong Myong; Choi, Sung-Jin; Lee, Seung Min; Kim, Dae Hwan; Mo, Hyun-Sun

    2018-02-01

    In this study, we investigate the effect of rising time (TR) of liquid gate bias (VLG) on transient responses in pH sensors based on Si nanowire ion-sensitive field-effect transistors (ISFETs). As TR becomes shorter and pH values decrease, the ISFET current takes a longer time to saturate to the pH-dependent steady-state value. By correlating VLG with the internal gate-to-source voltage of the ISFET, we found that this effect occurs when the drift/diffusion of mobile ions in analytes in response to VLG is delayed. This gives us useful insight on the design of ISFET-based point-of-care circuits and systems, particularly with respect to determining an appropriate rising time for the liquid gate bias.

  14. Investigation of enhancement-mode AlGaN/GaN nanowire channel high-electron-mobility transistor with oxygen-containing plasma treatment

    Science.gov (United States)

    He, Yunlong; Wang, Chong; Mi, Minhan; Zhang, Meng; Zhu, Qing; Zhang, Peng; Wu, Ji; Zhang, Hengshuang; Zheng, Xuefeng; Yang, Ling; Duan, Xiaoling; Ma, Xiaohua; Hao, Yue

    2017-05-01

    A novel enhancement-mode (E-mode) AlGaN/GaN high-electron-mobility transistor (HEMT) has been fabricated, by combining nanowire channel (NC) structure fabrication and N2O (or O2) plasma treatment. A comparison of two NC-HEMTs with different plasma treatments has been made. The NC-HEMT with N2O plasma treatment shows an output current of 610 mA/mm and a peak transconductance of 450 mS/mm. The DIBL of the NC-HEMT with N2O plasma treatment is as low as 2 mV/V, and an SS of 70 mV/decade is achieved. The device exhibits an intrinsic current gain cutoff frequency f T of 19 GHz and a maximum oscillation frequency f max of 58 GHz.

  15. Effects of irradiation on device characteristics of transistor structures based on AlGaN/GaN

    International Nuclear Information System (INIS)

    Kargin, N.I.; Gromov, D.V.; Kuznetsov, A.L.; Grekhov, M.M.

    2014-01-01

    A technologic scheme was developed, and transistor structures, based on hetero-structures AlGaN/GaN, were made. Current-voltage characteristics of the transistor structures and current-amplification and power-amplification cutoff frequencies have been presented in the paper [ru

  16. I-V Characteristics of a Static Random Access Memory Cell Utilizing Ferroelectric Transistors

    Science.gov (United States)

    Laws, Crystal; Mitchell, Cody; Hunt, Mitchell; Ho, Fat D.; MacLeod, Todd C.

    2012-01-01

    I-V characteristics for FeFET different than that of MOSFET Ferroelectric layer features hysteresis trend whereas MOSFET behaves same for both increasing and decreasing VGS FeFET I-V characteristics doesn't show dependence on VDS A Transistor with different channel length and width as well as various resistance and input voltages give different results As resistance values increased, the magnitude of the drain current decreased.

  17. Tunable field emission characteristics of ZnO nanowires coated with varied thickness of lanthanum boride thin films

    International Nuclear Information System (INIS)

    Zhao, C.X.; Li, Y.F.; Chen, Jun; Deng, S.Z.; Xu, N.S.

    2013-01-01

    Lanthanum boride (LaB x ) thin films with various thicknesses were deposited on ZnO nanowire arrays by electron beam evaporation. Field emission characteristics of ZnO nanowires show close dependence on LaB x coating thickness. The turn-on field increases with increasing LaB x coating thickness from 10 nm to 50 nm. The observed phenomena were explained by a model that the tunneling at ZnO/LaB x interface dominates the emission process. - Highlights: ► Coating thickness dependence of field emission characteristics of ZnO nanowires was observed from LaB x coated ZnO nanowires. ► More stable field emission was observed from ZnO nanowires with LaB x coating. ► A model was proposed that the tunneling at ZnO/LaB x interface dominates the emission process

  18. High mobility ZnO nanowires for terahertz detection applications

    International Nuclear Information System (INIS)

    Liu, Huiqiang; Peng, Rufang; Chu, Shijin; Chu, Sheng

    2014-01-01

    An oxide nanowire material was utilized for terahertz detection purpose. High quality ZnO nanowires were synthesized and field-effect transistors were fabricated. Electrical transport measurements demonstrated the nanowire with good transfer characteristics and fairly high electron mobility. It is shown that ZnO nanowires can be used as building blocks for the realization of terahertz detectors based on a one-dimensional plasmon detection configuration. Clear terahertz wave (∼0.3 THz) induced photovoltages were obtained at room temperature with varying incidence intensities. Further analysis showed that the terahertz photoresponse is closely related to the high electron mobility of the ZnO nanowire sample, which suggests that oxide nanoelectronics may find useful terahertz applications.

  19. Enhancing Photoresponsivity of Self-Aligned MoS2 Field-Effect Transistors by Piezo-Phototronic Effect from GaN Nanowires.

    Science.gov (United States)

    Liu, Xingqiang; Yang, Xiaonian; Gao, Guoyun; Yang, Zhenyu; Liu, Haitao; Li, Qiang; Lou, Zheng; Shen, Guozhen; Liao, Lei; Pan, Caofeng; Lin Wang, Zhong

    2016-08-23

    We report high-performance self-aligned MoS2 field-effect transistors (FETs) with enhanced photoresponsivity by the piezo-phototronic effect. The FETs are fabricated based on monolayer MoS2 with a piezoelectric GaN nanowire (NW) as the local gate, and a self-aligned process is employed to define the source/drain electrodes. The fabrication method allows the preservation of the intrinsic property of MoS2 and suppresses the scattering center density in the MoS2/GaN interface, which results in high electrical and photoelectric performances. MoS2 FETs with channel lengths of ∼200 nm have been fabricated with a small subthreshold slope of 64 mV/dec. The photoresponsivity is 443.3 A·W(-1), with a fast response and recovery time of ∼5 ms under 550 nm light illumination. When strain is introduced into the GaN NW, the photoresponsivity is further enhanced to 734.5 A·W(-1) and maintains consistent response and recovery time, which is comparable with that of the mechanical exfoliation of MoS2 transistors. The approach presented here opens an avenue to high-performance top-gated piezo-enhanced MoS2 photodetectors.

  20. Nanowire NMOS Logic Inverter Characterization.

    Science.gov (United States)

    Hashim, Yasir

    2016-06-01

    This study is the first to demonstrate characteristics optimization of nanowire N-Channel Metal Oxide Semiconductor (NW-MOS) logic inverter. Noise margins and inflection voltage of transfer characteristics are used as limiting factors in this optimization. A computer-based model used to produce static characteristics of NW-NMOS logic inverter. In this research two circuit configuration of NW-NMOS inverter was studied, in first NW-NMOS circuit, the noise margin for (low input-high output) condition was very low. For second NMOS circuit gives excellent noise margins, and results indicate that optimization depends on applied voltage to the inverter. Increasing gate to source voltage with (2/1) nanowires ratio results better noise margins. Increasing of applied DC load transistor voltage tends to increasing in decreasing noise margins; decreasing this voltage will improve noise margins significantly.

  1. Unijunction transistors

    International Nuclear Information System (INIS)

    1981-01-01

    The electrical characteristics of unijunction transistors can be modified by irradiation with electron beams in excess of 400 KeV and at a dose rate of 10 13 to 10 16 e/cm 2 . Examples are given of the effect of exposing the emitter-base junctions of transistors to such lattice defect causing radiation for a time sufficient to change the valley current of the transistor. (U.K.)

  2. Electrical characteristics of SiGe-base bipolar transistors on thin-film SOI substrates

    International Nuclear Information System (INIS)

    Liao, Shu-Hui; Chang, Shu-Tong

    2010-01-01

    This paper, based on two-dimensional simulations, provides a comprehensive analysis of the electrical characteristics of the Silicon germanium (SiGe)-base bipolar transistors on thin-film siliconon-insulator (SOI) substrates. The impact of the buried oxide thickness (T OX ), the emitter width (W E ), and the lateral distance between the edge of the intrinsic base and the reach-through region (L col ) on both the AC and DC device characteristics was analyzed in detail. Regarding the DC characteristics, the simulation results suggest that a thicker T OX gives a larger base-collector breakdown voltage (BV CEO ), whereas reducing the T OX leads to an enhanced maximum electric field at the B-C junction. As for the AC characteristics, cut-off frequency (f T ) increases slightly with increasing buried oxide thickness and finally saturates to a constant value when the buried oxide thickness is about 0.15 μm. The collector-substrate capacitance (C CS ) decreases with increasing buried oxide thickness while the maximum oscillation frequency (f max ) increases with increasing buried oxide thickness. Furthermore, the impact of self-heating effects in the device was analyzed in various areas. The thermal resistance as a function of the buried oxide thickness indicates that the thermal resistance of the SiGe-base bipolar transistor on a SOI substrate is slightly higher than that of a bulk SiGe-base bipolar transistor. The thermal resistance is reduced by ∼37.89% when the emitter width is increased by a factor of 5 for a fixed buried oxide thickness of 0.1 μm. All the results can be used to design and optimize SiGe-base bipolar transistors on SOI substrates with minimum thermal resistance to enhance device performance.

  3. Subthreshold characteristics of pentacene field-effect transistors influenced by grain boundaries.

    OpenAIRE

    Park, J.; Jeong, Y-S.; Park, K-S.; Do, L-M.; Bae, J-H.; Choi, J.S.; Pearson, C.; Petty, M.C.

    2012-01-01

    Grain boundaries in polycrystalline pentacene films significantly affect the electrical characteristics of pentacene field-effect transistors (FETs). Upon reversal of the gate voltage sweep direction, pentacene FETs exhibited hysteretic behaviours in the subthreshold region, which was more pronounced for the FET having smaller pentacene grains. No shift in the flat-band voltage of the metal-insulator-semiconductor capacitor elucidates that the observed hysteresis was mainly caused by the infl...

  4. Optical characteristics of silicon nanowires grown from tin catalyst layers on silicon coated glass

    KAUST Repository

    Ball, Jeremy

    2012-08-20

    The optical characteristics of silicon nanowires grown on Si layers on glass have been modeled using the FDTD (Finite Difference Time Domain) technique and compared with experimental results. The wires were grown by the VLS (vapour-liquid-solid) method using Sn catalyst layers and exhibit a conical shape. The resulting measured and modeled absorption, reflectance and transmittance spectra have been investigated as a function of the thickness of the underlying Si layer and the initial catalyst layer, the latter having a strong influence on wire density. High levels of absorption (>90% in the visible wavelength range) and good agreement between the modeling and experiment have been observed when the nanowires have a relatively high density of ∼4 wires/μ m2. The experimental and modeled results diverge for samples with a lower density of wire growth. The results are discussed along with some implications for solar cell fabrication. © 2012 Optical Society of America.

  5. Optical characteristics of silicon nanowires grown from tin catalyst layers on silicon coated glass

    KAUST Repository

    Ball, Jeremy; Centeno, Anthony; Mendis, Budhika G.; Reehal, H. S.; Alford, Neil

    2012-01-01

    The optical characteristics of silicon nanowires grown on Si layers on glass have been modeled using the FDTD (Finite Difference Time Domain) technique and compared with experimental results. The wires were grown by the VLS (vapour-liquid-solid) method using Sn catalyst layers and exhibit a conical shape. The resulting measured and modeled absorption, reflectance and transmittance spectra have been investigated as a function of the thickness of the underlying Si layer and the initial catalyst layer, the latter having a strong influence on wire density. High levels of absorption (>90% in the visible wavelength range) and good agreement between the modeling and experiment have been observed when the nanowires have a relatively high density of ∼4 wires/μ m2. The experimental and modeled results diverge for samples with a lower density of wire growth. The results are discussed along with some implications for solar cell fabrication. © 2012 Optical Society of America.

  6. Nanowire Lasers

    Directory of Open Access Journals (Sweden)

    Couteau C.

    2015-05-01

    Full Text Available We review principles and trends in the use of semiconductor nanowires as gain media for stimulated emission and lasing. Semiconductor nanowires have recently been widely studied for use in integrated optoelectronic devices, such as light-emitting diodes (LEDs, solar cells, and transistors. Intensive research has also been conducted in the use of nanowires for subwavelength laser systems that take advantage of their quasione- dimensional (1D nature, flexibility in material choice and combination, and intrinsic optoelectronic properties. First, we provide an overview on using quasi-1D nanowire systems to realize subwavelength lasers with efficient, directional, and low-threshold emission. We then describe the state of the art for nanowire lasers in terms of materials, geometry, andwavelength tunability.Next,we present the basics of lasing in semiconductor nanowires, define the key parameters for stimulated emission, and introduce the properties of nanowires. We then review advanced nanowire laser designs from the literature. Finally, we present interesting perspectives for low-threshold nanoscale light sources and optical interconnects. We intend to illustrate the potential of nanolasers inmany applications, such as nanophotonic devices that integrate electronics and photonics for next-generation optoelectronic devices. For instance, these building blocks for nanoscale photonics can be used for data storage and biomedical applications when coupled to on-chip characterization tools. These nanoscale monochromatic laser light sources promise breakthroughs in nanophotonics, as they can operate at room temperature, can potentially be electrically driven, and can yield a better understanding of intrinsic nanomaterial properties and surface-state effects in lowdimensional semiconductor systems.

  7. Electrical and Optical Characterization of Nanowire based Semiconductor Devices

    Science.gov (United States)

    Ayvazian, Talin

    This research project is focused on a new strategy for the creation of nanowire based semiconductor devices. The main goal is to understand and optimize the electrical and optical properties of two types of nanoscale devices; in first type lithographically patterned nanowire electrodeposition (LPNE) method has been utilized to fabricate nanowire field effect transistors (NWFET) and second type involved the development of light emitting semiconductor nanowire arrays (NWLED). Field effect transistors (NWFETs) have been prepared from arrays of polycrystalline cadmium selenide (pc-CdSe) nanowires using a back gate configuration. pc-CdSe nanowires were fabricated using the lithographically patterned nanowire electrode- position (LPNE) process on SiO2 /Si substrates. After electrodeposition, pc-CdSe nanowires were thermally annealed at 300 °C x 4 h either with or without exposure to CdCl 2 in methanol a grain growth promoter. The influence of CdCl2 treatment was to increase the mean grain diameter as determined by X-ray diffraction pattern and to convert the crystal structure from cubic to wurtzite. Transfer characteristics showed an increase of the field effect mobility (mu eff) by an order of magnitude and increase of the Ion/I off ratio by a factor of 3-4. Light emitting devices (NW-LED) based on lithographically patterned pc-CdSe nanowire arrays have been investigated. Electroluminescence (EL) spectra of CdSe nanowires under various biases exhibited broad emission spectra centered at 750 nm close to the band gap of CdSe (1.7eV). To enhance the intensity of the emitted light and the external quantum efficiency (EQE), the distance between the contacts were reduced from 5 mum to less than 1 mum which increased the efficiency by an order of magnitude. Also, increasing the annealing temperature of nanowires from 300 °C x4 h to 450 This research project is focused on a new strategy for the creation of nanowire based semiconductor devices. The main goal is to understand

  8. Trap density of states in n-channel organic transistors: variable temperature characteristics and band transport

    International Nuclear Information System (INIS)

    Cho, Joung-min; Akiyama, Yuto; Kakinuma, Tomoyuki; Mori, Takehiko

    2013-01-01

    We have investigated trap density of states (trap DOS) in n-channel organic field-effect transistors based on N,N ’-bis(cyclohexyl)naphthalene diimide (Cy-NDI) and dimethyldicyanoquinonediimine (DMDCNQI). A new method is proposed to extract trap DOS from the Arrhenius plot of the temperature-dependent transconductance. Double exponential trap DOS are observed, in which Cy-NDI has considerable deep states, by contrast, DMDCNQI has substantial tail states. In addition, numerical simulation of the transistor characteristics has been conducted by assuming an exponential trap distribution and the interface approximation. Temperature dependence of transfer characteristics are well reproduced only using several parameters, and the trap DOS obtained from the simulated characteristics are in good agreement with the assumed trap DOS, indicating that our analysis is self-consistent. Although the experimentally obtained Meyer-Neldel temperature is related to the trap distribution width, the simulation satisfies the Meyer-Neldel rule only very phenomenologically. The simulation also reveals that the subthreshold swing is not always a good indicator of the total trap amount, because it also largely depends on the trap distribution width. Finally, band transport is explored from the simulation having a small number of traps. A crossing point of the transfer curves and negative activation energy above a certain gate voltage are observed in the simulated characteristics, where the critical V G above which band transport is realized is determined by the sum of the trapped and free charge states below the conduction band edge

  9. Isolation and Identification of Post-Transcriptional Gene Silencing-Related Micro-RNAs by Functionalized Silicon Nanowire Field-effect Transistor

    Science.gov (United States)

    Chen, Kuan-I.; Pan, Chien-Yuan; Li, Keng-Hui; Huang, Ying-Chih; Lu, Chia-Wei; Tang, Chuan-Yi; Su, Ya-Wen; Tseng, Ling-Wei; Tseng, Kun-Chang; Lin, Chi-Yun; Chen, Chii-Dong; Lin, Shih-Shun; Chen, Yit-Tsong

    2015-11-01

    Many transcribed RNAs are non-coding RNAs, including microRNAs (miRNAs), which bind to complementary sequences on messenger RNAs to regulate the translation efficacy. Therefore, identifying the miRNAs expressed in cells/organisms aids in understanding genetic control in cells/organisms. In this report, we determined the binding of oligonucleotides to a receptor-modified silicon nanowire field-effect transistor (SiNW-FET) by monitoring the changes in conductance of the SiNW-FET. We first modified a SiNW-FET with a DNA probe to directly and selectively detect the complementary miRNA in cell lysates. This SiNW-FET device has 7-fold higher sensitivity than reverse transcription-quantitative polymerase chain reaction in detecting the corresponding miRNA. Next, we anchored viral p19 proteins, which bind the double-strand small RNAs (ds-sRNAs), on the SiNW-FET. By perfusing the device with synthesized ds-sRNAs of different pairing statuses, the dissociation constants revealed that the nucleotides at the 3‧-overhangs and pairings at the terminus are important for the interactions. After perfusing the total RNA mixture extracted from Nicotiana benthamiana across the device, this device could enrich the ds-sRNAs for sequence analysis. Finally, this bionanoelectronic SiNW-FET, which is able to isolate and identify the interacting protein-RNA, adds an additional tool in genomic technology for the future study of direct biomolecular interactions.

  10. Impurity Deionization Effects on Surface Recombination DC Current-Voltage Characteristics in MOS Transistors

    International Nuclear Information System (INIS)

    Chen Zuhui; Jie Binbin; Sah Chihtang

    2010-01-01

    Impurity deionization on the direct-current current-voltage characteristics from electron-hole recombination (R-DCIV) at SiO 2 /Si interface traps in MOS transistors is analyzed using the steady-state Shockley-Read-Hall recombination kinetics and the Fermi distributions for electrons and holes. Insignificant distortion is observed over 90% of the bell-shaped R-DCIV curves centered at their peaks when impurity deionization is excluded in the theory. This is due to negligible impurity deionization because of the much lower electron and hole concentrations at the interface than the impurity concentration in the 90% range. (invited papers)

  11. Direct-write fabrication of a nanoscale digital logic element on a single nanowire

    International Nuclear Information System (INIS)

    Roy, Somenath; Gao Zhiqiang

    2010-01-01

    In this paper we report on the 'direct-write' fabrication and electrical characteristics of a nanoscale logic inverter, integrating enhancement-mode (E-mode) and depletion-mode (D-mode) field-effect transistors (FETs) on a single zinc oxide (ZnO) nanowire. 'Direct-writing' of platinum metal electrodes and a dielectric layer is executed on individual single-crystalline ZnO nanowires using either a focused electron beam (FEB) or a focused ion beam (FIB). We fabricate a top-gate FET structure, in which the gate electrode wraps around the ZnO nanowire, resulting in a more efficient gate response than the conventional back-gate nanowire transistors. For E-mode device operation, the gate electrode (platinum) is deposited directly onto the ZnO nanowire by a FEB, which creates a Schottky barrier and in turn a fully depleted channel. Conversely, sandwiching an insulating layer between the FIB-deposited gate electrode and the nanowire channel makes D-mode operation possible. Integrated E- and D-mode FETs on a single nanowire exhibit the characteristics of a direct-coupled FET logic (DCFL) inverter with a high gain and noise margin.

  12. Suppression of subthreshold characteristics variation for junctionless multigate transistors using high-k spacers

    International Nuclear Information System (INIS)

    Lou, Haijun; Zhang, Baili; Li, Dan; Lin, Xinnan; He, Jin; Chan, Mansun

    2015-01-01

    In this work, the high-k spacer is proposed to suppress the subthreshold characteristics variation of junctionless multigate transistor (JMT) with non-ideal sidewall angle for the first time. It is demonstrated that the variation of subthreshold characteristics induced by the changing sidewall angle is efficiently suppressed by high-k spacers due to the enhanced corner effect through the fringe capacitance, and the electrostatic integrity of JMTs is also improved at sub-22 nm gate length. Two key parameters of high-k spacer, the thickness and length, have been optimized in terms of the suppression of subthreshold characteristics variation. Then their optimal values are proposed. The benefit of high-k spacer makes JMTs more scalable. (paper)

  13. Effect of quantum well position on the distortion characteristics of transistor laser

    Science.gov (United States)

    Piramasubramanian, S.; Ganesh Madhan, M.; Radha, V.; Shajithaparveen, S. M. S.; Nivetha, G.

    2018-05-01

    The effect of quantum well position on the modulation and distortion characteristics of a 1300 nm transistor laser is analyzed in this paper. Standard three level rate equations are numerically solved to study this characteristics. Modulation depth, second order harmonic and third order intermodulation distortion of the transistor laser are evaluated for different quantum well positions for a 900 MHz RF signal modulation. From the DC analysis, it is observed that optical power is maximum, when the quantum well is positioned near base-emitter interface. The threshold current of the device is found to increase with increasing the distance between the quantum well and the base-emitter junction. A maximum modulation depth of 0.81 is predicted, when the quantum well is placed at 10 nm from the base-emitter junction, under RF modulation. The magnitude of harmonic and intermodulation distortion are found to decrease with increasing current and with an increase in quantum well distance from the emitter base junction. A minimum second harmonic distortion magnitude of -25.96 dBc is predicted for quantum well position (230 nm) near to the base-collector interface for 900 MHz modulation frequency at a bias current of 20 Ibth. Similarly, a minimum third order intermodulation distortion of -38.2 dBc is obtained for the same position and similar biasing conditions.

  14. A Review on the Electrochemical Sensors and Biosensors Composed of Nanowires as Sensing Material

    Directory of Open Access Journals (Sweden)

    Shen-Ming Chen

    2008-01-01

    Full Text Available The development and application of nanowires for electrochemical sensors and biosensors are reviewed in this article. Next generation sensor platforms will require significant improvements in sensitivity, specificity and parallelism in order to meet the future needs in variety of fields. Sensors made of nanowires exploit some fundamental nanoscopic effect in order to meet these requirements. Nanowires are new materials, which have the characteristic of low weight with extraordinary mechanical, electrical, thermal and multifunctional properties. The advantages such as size scale, aspect ratio and other properties of nanowires are especially apparent in the use of electrical sensors such as electrochemical sensors and in the use of field-effect transistors. The preparation methods of nanowires and their properties are discussed along with their advantages towards electrochemical sensors and biosensors. Some key results from each article are summarized, relating the concept and mechanism behind each sensor, with experimental conditions as well as their behavior at different conditions.

  15. Influence of illumination on the output characteristics in pentacene thin film transistors

    Energy Technology Data Exchange (ETDEWEB)

    Lin, Yow-Jon, E-mail: rzr2390@yahoo.com.tw; Huang, Bo-Chieh

    2013-10-01

    The influence of illumination on the output characteristics of pentacene-based organic thin film transistors (OTFTs) was researched in this study. It is shown that light illumination may lead to an increase in the drain current, shifting the threshold voltage towards positive gate–source voltages. This is because of the light-induced acceptor activation, which is a new concept for illumination-dependent output characteristics of OTFTs. However, the field-effect mobility is insensitive to light illumination. It is found that electron trapping is responsible for the experimentally observed illumination-dependent output behavior of charge transport in OTFTs. - Highlights: • Light illumination may lead to an increase in the drain current. • This is because of the light-induced acceptor activation. • The field-effect mobility is insensitive to light illumination. • Electron trapping is responsible for the illumination-dependent output behavior.

  16. Current-voltage characteristics of individual conducting polymer nanotubes and nanowires

    Institute of Scientific and Technical Information of China (English)

    Long Yun-ze; Yin Zhi-Hua; Li Meng-Meng; Gu Chang-Zhi; Duvail Jean-Luc; Jin Ai-zi; Wan Mei-xiang

    2009-01-01

    We report the current-voltage (Ⅰ-Ⅴ) characteristics of individual polypyrrole nanotubes and poly(3,4-ethylenedioxythiophene) (PEDOT) nanowires in a temperature range from 300 K to 2 K. Considering the complex structures of such quasi-one-dimensional systems with an array of ordered conductive regions separated by disordered barriers, we use the extended fluctuation-induced tunneling (FIT) and thermal excitation model (Kaiser expression) to fit the temperature and electric-field dependent Ⅰ-Ⅴ curves. It is found that the Ⅰ-Ⅴ data measured at higher temperatures or higher voltages can be well fitted by the Kaiser expression. However, the low-temperature data around the zero bias clearly deviate from those obtained from this model. The deviation (or zero-bias conductance suppression)could be possibly ascribed to the occurrence of the Coulomb-gap in the density of states near the Femi level and/or the enhancement of electron-electron interaction resulting from nanosize effects, which have been revealed in the previous studies on low-temperature electronic transport in conducting polymer films, pellets and nanostructures. In addition,similar Ⅰ-Ⅴ characteristics and deviation are also observed in an isolated K0.27MnO2 nanowire.

  17. Temperature characteristics research of SOI pressure sensor based on asymmetric base region transistor

    Science.gov (United States)

    Zhao, Xiaofeng; Li, Dandan; Yu, Yang; Wen, Dianzhong

    2017-07-01

    Based on the asymmetric base region transistor, a pressure sensor with temperature compensation circuit is proposed in this paper. The pressure sensitive structure of the proposed sensor is constructed by a C-type silicon cup and a Wheatstone bridge with four piezoresistors ({R}1, {R}2, {R}3 and {R}4) locating on the edge of a square silicon membrane. The chip was designed and fabricated on a silicon on insulator (SOI) wafer by micro electromechanical system (MEMS) technology and bipolar transistor process. When the supply voltage is 5.0 V, the corresponding temperature coefficient of the sensitivity (TCS) for the sensor before and after temperature compensation are -1862 and -1067 ppm/°C, respectively. Through varying the ratio of the base region resistances {r}1 and {r}2, the TCS for the sensor with the compensation circuit is -127 ppm/°C. It is possible to use this compensation circuit to improve the temperature characteristics of the pressure sensor. Project supported by the National Natural Science Foundation of China (No. 61471159), the Natural Science Foundation of Heilongjiang Province (No. F201433), the University Nursing Program for Young Scholars with Creative Talents in Heilongjiang Province (No. 2015018), and the Special Funds for Science and Technology Innovation Talents of Harbin in China (No. 2016RAXXJ016).

  18. Application of real space Kerker method in simulating gate-all-around nanowire transistors with realistic discrete dopants*

    International Nuclear Information System (INIS)

    Li Chang-Sheng; Ma Lei; Guo Jie-Rong

    2017-01-01

    We adopt a self-consistent real space Kerker method to prevent the divergence from charge sloshing in the simulating transistors with realistic discrete dopants in the source and drain regions. The method achieves efficient convergence by avoiding unrealistic long range charge sloshing but keeping effects from short range charge sloshing. Numerical results show that discrete dopants in the source and drain regions could have a bigger influence on the electrical variability than the usual continuous doping without considering charge sloshing. Few discrete dopants and the narrow geometry create a situation with short range Coulomb screening and oscillations of charge density in real space. The dopants induced quasi-localized defect modes in the source region experience short range oscillations in order to reach the drain end of the device. The charging of the defect modes and the oscillations of the charge density are identified by the simulation of the electron density. (paper)

  19. Influence of non-adherent yeast cells on electrical characteristics of diamond-based field-effect transistors

    Czech Academy of Sciences Publication Activity Database

    Procházka, Václav; Cifra, Michal; Kulha, Pavel; Ižák, Tibor; Rezek, Bohuslav; Kromka, Alexander

    2017-01-01

    Roč. 395, Feb (2017), s. 214-219 ISSN 0169-4332 R&D Projects: GA ČR(CZ) GBP108/12/G108 Institutional support: RVO:68378271 ; RVO:67985882 Keywords : nanocrystalline diamond * yeast cells * field-effect transistor * transfer characteristics pH sensitivity Subject RIV: BO - Biophysics OBOR OECD: Biophysics Impact factor: 3.387, year: 2016

  20. High performance and transparent multilayer MoS2 transistors: Tuning Schottky barrier characteristics

    Directory of Open Access Journals (Sweden)

    Young Ki Hong

    2016-05-01

    Full Text Available Various strategies and mechanisms have been suggested for investigating a Schottky contact behavior in molybdenum disulfide (MoS2 thin-film transistor (TFT, which are still in much debate and controversy. As one of promising breakthrough for transparent electronics with a high device performance, we have realized MoS2 TFTs with source/drain electrodes consisting of transparent bi-layers of a conducting oxide over a thin film of low work function metal. Intercalation of a low work function metal layer, such as aluminum, between MoS2 and transparent source/drain electrodes makes it possible to optimize the Schottky contact characteristics, resulting in about 24-fold and 3 orders of magnitude enhancement of the field-effect mobility and on-off current ratio, respectively, as well as transmittance of 87.4 % in the visible wavelength range.

  1. High performance and transparent multilayer MoS{sub 2} transistors: Tuning Schottky barrier characteristics

    Energy Technology Data Exchange (ETDEWEB)

    Hong, Young Ki; Kwon, Junyeon; Hong, Seongin; Song, Won Geun; Liu, Na; Omkaram, Inturu; Kim, Sunkook, E-mail: kimskcnt@gmail.com, E-mail: ohms@keti.re.kr [Multi-Functional Bio/Nano Lab., Kyung Hee University, Gyeonggi 446-701 (Korea, Republic of); Yoo, Geonwook; Yoo, Byungwook; Oh, Min Suk, E-mail: kimskcnt@gmail.com, E-mail: ohms@keti.re.kr [Display Convergence Research Center, Korea Electronics Technology Institute, Gyeonggi 463-816 (Korea, Republic of); Ju, Sanghyun [Department of Physics, Kyonggi University, Suwon, Gyeonggi-Do 443-760 (Korea, Republic of)

    2016-05-15

    Various strategies and mechanisms have been suggested for investigating a Schottky contact behavior in molybdenum disulfide (MoS{sub 2}) thin-film transistor (TFT), which are still in much debate and controversy. As one of promising breakthrough for transparent electronics with a high device performance, we have realized MoS{sub 2} TFTs with source/drain electrodes consisting of transparent bi-layers of a conducting oxide over a thin film of low work function metal. Intercalation of a low work function metal layer, such as aluminum, between MoS{sub 2} and transparent source/drain electrodes makes it possible to optimize the Schottky contact characteristics, resulting in about 24-fold and 3 orders of magnitude enhancement of the field-effect mobility and on-off current ratio, respectively, as well as transmittance of 87.4 % in the visible wavelength range.

  2. Atmospheric pressure chemical vapor deposition (APCVD) grown bi-layer graphene transistor characteristics at high temperature

    KAUST Repository

    Qaisi, Ramy M.

    2014-05-15

    We report the characteristics of atmospheric chemical vapor deposition grown bilayer graphene transistors fabricated on ultra-scaled (10 nm) high-κ dielectric aluminum oxide (Al2O3) at elevated temperatures. We observed that the drive current increased by >400% as temperature increased from room temperature to 250 °C. Low gate leakage was maintained for prolonged exposure at 100 °C but increased significantly at temperatures >200 °C. These results provide important insights for considering chemical vapor deposition graphene on aluminum oxide for high temperature applications where low power and high frequency operation are required. © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  3. Atmospheric pressure chemical vapor deposition (APCVD) grown bi-layer graphene transistor characteristics at high temperature

    KAUST Repository

    Qaisi, Ramy M.; Smith, Casey; Hussain, Muhammad Mustafa

    2014-01-01

    We report the characteristics of atmospheric chemical vapor deposition grown bilayer graphene transistors fabricated on ultra-scaled (10 nm) high-κ dielectric aluminum oxide (Al2O3) at elevated temperatures. We observed that the drive current increased by >400% as temperature increased from room temperature to 250 °C. Low gate leakage was maintained for prolonged exposure at 100 °C but increased significantly at temperatures >200 °C. These results provide important insights for considering chemical vapor deposition graphene on aluminum oxide for high temperature applications where low power and high frequency operation are required. © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  4. Auger Recombination in III-Nitride Nanowires and Its Effect on Nanowire Light-Emitting Diode Characteristics

    KAUST Repository

    Guo, Wei; Zhang, Meng; Bhattacharya, Pallab; Heo, Junseok

    2011-01-01

    We have measured the Auger recombination coefficients in defect-free InGaN nanowires (NW) and InGaN/GaN dot-in-nanowire (DNW) samples grown on (001) silicon by plasma-assisted molecular beam epitaxy. The nanowires have a density of ∼1×1011 cm-2 and exhibit photoluminescence emission peak at λ ∼ 500 nm. The Auger coefficients as a function of excitation power have been derived from excitation dependent and time-resolved photoluminescence measurements over a wide range of optical excitation power density. The values of C0, defined as the Auger coefficient at low excitation, are 6.1 × 10-32 and 4.1×10-33 cm6·s-1 in the NW and DNW samples, respectively, which are in reasonably good agreement with theoretical predictions for InGaN alloy semiconductors. Light-emitting diodes made with the NW and DNW samples exhibit no efficiency droop up to an injection current density of 400 A/cm 2. © 2011 American Chemical Society.

  5. Auger Recombination in III-Nitride Nanowires and Its Effect on Nanowire Light-Emitting Diode Characteristics

    KAUST Repository

    Guo, Wei

    2011-04-13

    We have measured the Auger recombination coefficients in defect-free InGaN nanowires (NW) and InGaN/GaN dot-in-nanowire (DNW) samples grown on (001) silicon by plasma-assisted molecular beam epitaxy. The nanowires have a density of ∼1×1011 cm-2 and exhibit photoluminescence emission peak at λ ∼ 500 nm. The Auger coefficients as a function of excitation power have been derived from excitation dependent and time-resolved photoluminescence measurements over a wide range of optical excitation power density. The values of C0, defined as the Auger coefficient at low excitation, are 6.1 × 10-32 and 4.1×10-33 cm6·s-1 in the NW and DNW samples, respectively, which are in reasonably good agreement with theoretical predictions for InGaN alloy semiconductors. Light-emitting diodes made with the NW and DNW samples exhibit no efficiency droop up to an injection current density of 400 A/cm 2. © 2011 American Chemical Society.

  6. Current-voltage characteristics of the semiconductor nanowires under the metal-semiconductor-metal structure

    Science.gov (United States)

    Wen, Jing; Zhang, Xitian; Gao, Hong; Wang, Mingjiao

    2013-12-01

    We present a method to calculate the I-V characteristics of semiconductor nanowires under the metal-semiconductor-metal (MSM) structure. The carrier concentration as an important parameter is introduced into the expression of the current. The subband structure of the nanowire has been considered for associating it with the position of the Fermi level and circumventing the uncertainties of the contact areas in the contacts. The tunneling and thermionic emission currents in the two Schottky barriers at the two metal-semiconductor contacts are discussed. We find that the two barriers have different influences on the I-V characteristics of the MSM structure, one of which under the forward bias plays the role of threshold voltage if its barrier height is large and the applied voltage is small, and the other under the reverse bias controls the shapes of I-V curves. Our calculations show that the shapes of the I-V curves for the MSM structure are mainly determined by the barrier heights of the contacts and the carrier concentration. The nearly identical I-V characteristics can be obtained by using different values of the barrier heights and carrier concentration, which means that the contact type conversion can be ascribed not only to the changes of the barrier heights but also that of the carrier concentration. We also discuss the mechanisms of the ohmic-Schottky conversions and clarify the ambiguity in the literature. The possibility about the variation of the carrier concentration under the applied fields has been confirmed by experimental results.

  7. Nitrogen plasma-treated multilayer graphene-based field effect transistor fabrication and electronic characteristics

    Science.gov (United States)

    Su, Wei-Jhih; Chang, Hsuan-Chen; Honda, Shin-ichi; Lin, Pao-Hung; Huang, Ying-Sheng; Lee, Kuei-Yi

    2017-08-01

    Chemical doping with hetero-atoms is an effective method used to change the characteristics of materials. Nitrogen doping technology plays a critical role in regulating the electronic properties of graphene. Nitrogen plasma treatment was used in this work to dope nitrogen atoms to modulate multilayer graphene electrical properties. The measured I-V multilayer graphene-base field-effect transistor characteristics (GFETs) showed a V-shaped transfer curve with the hole and electron region separated from the measured current-voltage (I-V) minimum. GFETs fabricated with multilayer graphene from chemical vapor deposition (CVD) exhibited p-type behavior because of oxygen adsorption. After using different nitrogen plasma treatment times, the minimum in I-V characteristic shifted into the negative gate voltage region with increased nitrogen concentration and the GFET channel became an n-type semiconductor. GFETs could be easily fabricated using this method with potential for various applications. The GFET transfer characteristics could be tuned precisely by adjusting the nitrogen plasma treatment time.

  8. Preliminary measurements of gamma ray effects on characteristics of broad-band GaAs field-effect transistor preamplifiers

    International Nuclear Information System (INIS)

    Jackson, H.G.; Shimizu, T.T.; Leskovar, B.

    1985-01-01

    The effect of gamma radiation on electrical characteristics of cryogenically cooled broad-band low-noise microwave preamplifiers has been preliminarily evaluated. The change in the gain and noise figure of a 1-2 GHz preamplifier using GaAs microwave transistors was determined at gamma doses between 10 5 rad to 5 /times/ 10 8 rad. The gain and noise figure was measured at ambient temperatures of 300 K and 80 K. 8 refs., 2 figs

  9. Enhanced photoresponse characteristics of transistors using CVD-grown MoS2/WS2 heterostructures

    Science.gov (United States)

    Shan, Junjie; Li, Jinhua; Chu, Xueying; Xu, Mingze; Jin, Fangjun; Fang, Xuan; Wei, Zhipeng; Wang, Xiaohua

    2018-06-01

    Semiconductor heterostructures based on transition metal dichalcogenides provide a broad platform to research two-dimensional nanomaterials and design atomically thin devices for fundamental and applied interests. The MoS2/WS2 heterostructure was prepared on SiO2/Si substrate by chemical vapor deposition (CVD) in our research. And the optical properties of the heterostructure was characterized by Raman and photoluminescence (PL) spectroscopy. The similar 2 orders of magnitude decrease of PL intensity in MoS2/WS2 heterostructures was tested, which is attribute to the electrical and optical modulation effects are connected with the interfacial charge transfer between MoS2 and WS2 films. Using MoS2/WS2 heterostructure as channel material of the phototransistor, we demonstrated over 50 folds enhanced photoresponsivity of multilayer MoS2 field-effect transistor. The results indicate that the MoS2/WS2 films can be a promising heterostructure material to enhance the photoresponse characteristics of MoS2-based phototransistors.

  10. Electron transport characteristics of silicon nanowires by metal-assisted chemical etching

    Energy Technology Data Exchange (ETDEWEB)

    Qi, Yangyang; Wang, Zhen; Zhang, Mingliang; Wang, Xiaodong, E-mail: xdwang@semi.ac.cn; Ji, An; Yang, Fuhua [Engineering Research Center for Semiconductor Integrated Technology, Institute of Semiconductors, Chinese Academy of Sciences, Beijing, 100083 (China)

    2014-03-15

    The electron transport characteristics of silicon nanowires (SiNWs) fabricated by metal-assisted chemical etching with different doping concentrations were studied. By increasing the doping concentration of the starting Si wafer, the resulting SiNWs were prone to have a rough surface, which had important effects on the contact and the electron transport. A metal-semiconductor-metal model and a thermionic field emission theory were used to analyse the current-voltage (I-V) characteristics. Asymmetric, rectifying and symmetric I-V curves were obtained. The diversity of the I-V curves originated from the different barrier heights at the two sides of the SiNWs. For heavily doped SiNWs, the critical voltage was one order of magnitude larger than that of the lightly doped, and the resistance obtained by differentiating the I-V curves at large bias was also higher. These were attributed to the lower electron tunnelling possibility and higher contact barrier, due to the rough surface and the reduced doping concentration during the etching process.

  11. Electron transport characteristics of silicon nanowires by metal-assisted chemical etching

    Directory of Open Access Journals (Sweden)

    Yangyang Qi

    2014-02-01

    Full Text Available The electron transport characteristics of silicon nanowires (SiNWs fabricated by metal-assisted chemical etching with different doping concentrations were studied. By increasing the doping concentration of the starting Si wafer, the resulting SiNWs were prone to have a rough surface, which had important effects on the contact and the electron transport. A metal-semiconductor-metal model and a thermionic field emission theory were used to analyse the current-voltage (I-V characteristics. Asymmetric, rectifying and symmetric I-V curves were obtained. The diversity of the I-V curves originated from the different barrier heights at the two sides of the SiNWs. For heavily doped SiNWs, the critical voltage was one order of magnitude larger than that of the lightly doped, and the resistance obtained by differentiating the I-V curves at large bias was also higher. These were attributed to the lower electron tunnelling possibility and higher contact barrier, due to the rough surface and the reduced doping concentration during the etching process.

  12. Electron transport characteristics of silicon nanowires by metal-assisted chemical etching

    Science.gov (United States)

    Qi, Yangyang; Wang, Zhen; Zhang, Mingliang; Wang, Xiaodong; Ji, An; Yang, Fuhua

    2014-03-01

    The electron transport characteristics of silicon nanowires (SiNWs) fabricated by metal-assisted chemical etching with different doping concentrations were studied. By increasing the doping concentration of the starting Si wafer, the resulting SiNWs were prone to have a rough surface, which had important effects on the contact and the electron transport. A metal-semiconductor-metal model and a thermionic field emission theory were used to analyse the current-voltage (I-V) characteristics. Asymmetric, rectifying and symmetric I-V curves were obtained. The diversity of the I-V curves originated from the different barrier heights at the two sides of the SiNWs. For heavily doped SiNWs, the critical voltage was one order of magnitude larger than that of the lightly doped, and the resistance obtained by differentiating the I-V curves at large bias was also higher. These were attributed to the lower electron tunnelling possibility and higher contact barrier, due to the rough surface and the reduced doping concentration during the etching process.

  13. Modeling of bias-induced changes of organic field-effect transistor characteristics

    NARCIS (Netherlands)

    Sharma, A.

    2011-01-01

    Organic semiconductors offer exciting possibilities in developing new types of solar cells, photodetectors, light emitting diodes and field-effect transistors. Important advantages of organic semiconducting materials over their inorganic counterparts are their chemical tunability, their low weight,

  14. Characteristics of Reduced Graphene Oxide Quantum Dots for a Flexible Memory Thin Film Transistor.

    Science.gov (United States)

    Kim, Yo-Han; Lee, Eun Yeol; Lee, Hyun Ho; Seo, Tae Seok

    2017-05-17

    Reduced graphene oxide quantum dot (rGOQD) devices in formats of capacitor and thin film transistor (TFT) were demonstrated and examined as the first trial to achieve nonambipolar channel property. In addition, through a gold nanoparticle (Au NP) layer embedded between the rGOQD active channel and dielectric layer, memory capacitor and TFT performances were realized by capacitance-voltage (C-V) hysteresis and gate program, erase, and reprogram biases. First, capacitor structure of the rGOQD memory device was constructed to examine memory charging effect featured in hysteretic C-V behavior with a 30 nm dielectric layer of cross-linked poly(vinyl alcohol). For the intervening Au NP charging layer, self-assembled monolayer (SAM) formation of the Au NP was executed to utilize electrostatic interaction by a dip-coating process under ambient environments with a conformal fabrication uniformity. Second, the rGOQD memory TFT device was also constructed in the same format of the Au NPs SAMs on a flexible substrate. Characteristics of the rGOQD TFT output showed novel saturation curves unlike typical graphene-based TFTs. However, The rGOQD TFT device reveals relatively low on/off ratio of 10 1 and mobility of 5.005 cm 2 /V·s. For the memory capacitor, the flat-band voltage shift (ΔV FB ) was measured as 3.74 V for ±10 V sweep, and for the memory TFT, the threshold voltage shift (ΔV th ) by the Au NP charging was detected as 7.84 V. In summary, it was concluded that the rGOQD memory device could accomplish an ideal graphene-based memory performance, which could have provided a wide memory window and saturated output characteristics.

  15. Transparent p-type SnO nanowires with unprecedented hole mobility among oxide semiconductors

    KAUST Repository

    Caraveo-Frescas, J. A.

    2013-11-25

    p-type tin monoxide (SnO) nanowire field-effect transistors with stable enhancement mode behavior and record performance are demonstrated at 160 °C. The nanowire transistors exhibit the highest field-effect hole mobility (10.83 cm2 V−1 s−1) of any p-type oxide semiconductor processed at similar temperature. Compared to thin film transistors, the SnO nanowire transistors exhibit five times higher mobility and one order of magnitude lower subthreshold swing. The SnO nanowire transistors show three times lower threshold voltages (−1 V) than the best reported SnO thin film transistors and fifteen times smaller than p-type Cu 2O nanowire transistors. Gate dielectric and process temperature are critical to achieving such performance.

  16. Observation of Van Hove Singularities and Temperature Dependence of Electrical Characteristics in Suspended Carbon Nanotube Schottky Barrier Transistors

    Science.gov (United States)

    Zhang, Jian; Liu, Siyu; Nshimiyimana, Jean Pierre; Deng, Ya; Hu, Xiao; Chi, Xiannian; Wu, Pei; Liu, Jia; Chu, Weiguo; Sun, Lianfeng

    2018-06-01

    A Van Hove singularity (VHS) is a singularity in the phonon or electronic density of states of a crystalline solid. When the Fermi energy is close to the VHS, instabilities will occur, which can give rise to new phases of matter with desirable properties. However, the position of the VHS in the band structure cannot be changed in most materials. In this work, we demonstrate that the carrier densities required to approach the VHS are reached by gating in a suspended carbon nanotube Schottky barrier transistor. Critical saddle points were observed in regions of both positive and negative gate voltage, and the conductance flattened out when the gate voltage exceeded the critical value. These novel physical phenomena were evident when the temperature is below 100 K. Further, the temperature dependence of the electrical characteristics was also investigated in this type of Schottky barrier transistor.

  17. Transfer characteristics and contact resistance in Ni- and Ti-contacted graphene-based field-effect transistors

    International Nuclear Information System (INIS)

    Di Bartolomeo, A; Giubileo, F; Iemmo, L; Romeo, F; Santandrea, S; Gambardella, U

    2013-01-01

    We produced graphene-based field-effect transistors by contacting mono- and bi-layer graphene by sputtering Ni or Ti as metal electrodes. We performed electrical characterization of the devices by measuring their transfer and output characteristics. We clearly observed the presence of a double-dip feature in the conductance curve for Ni-contacted transistors, and we explain it in terms of charge transfer and graphene doping under the metal contacts. We also studied the contact resistance between the graphene and the metal electrodes with larger values of ∼30 kΩμm 2 recorded for Ti contacts. Importantly, we prove that the contact resistance is modulated by the back-gate voltage. (paper)

  18. Analysis of the Nonlinear Characteristics of Microwave Power Heterojunction Bipolar Transistors and Optoelectronic Integrated Circuits.

    Science.gov (United States)

    Samelis, Apostolos

    A physical basis for large-signal HBT modeling was established in terms of transit times using a Monte Carlo analysis of AlGaAs/GaAs and GaInP/GaAs designs. Static carriers located in the collector-subcollector interface were found to prohibit accurate evaluation of transit times from electron velocity profiles. These carriers also influence the bias dependence of device capacitances. Analytical parameter extraction techniques for DC, thermal and high frequency HBT parameters were developed and applied to HBT large-signal modeling. The "impedance block" conditioned optimization technique was introduced to facilitate parameter extraction. Physical analysis of HBTs by means of Volterra Series techniques showed that C_{bc } dominates nonlinear distortion in high gain amplifiers. Designs with that C_{bc }-V_{cb} characteristics i.e. p -n collector HBTs lead to more than 10 dB IP3 improvement over n-collector HBTs. Nonlinear current cancellation was found to improve intermodulation distortion. A Gummel -Poon-based HBT large-signal model incorporating self-heating effects was developed and applied to AlGaAs/GaAs HBTs. Maximum power drive was shown to occur using constant V _{be} father than I_ {b} bias. The device temperature of constant I_{b} biased HBTs decreases at increased rf-drive levels ensuring in this case safer device operation. A large-signal model incorporating "soft" -breakdown effects typical of InP/InGaAs HBTs was developed and found to model succesfully the power characteristics of OEICs built with them. The effective large-signal transimpedance of a cascode transimpedance preamplifier was evaluated using this model and found to degrade by 3dBOmega for a variation of P_{in} from -65 to -5 dBm. Self-bias of individual transistors was studied and found to be related to variations of the amplifier characteristics at higher rf-drive levels. The power characteristics of CE and CB AlGaAs/GaAs HBTs were investigated using an on -wafer source/load pull setup

  19. Massive transfer of vertically aligned Si nanowire array onto alien substrates and their characteristics

    International Nuclear Information System (INIS)

    Shiu, Shu-Chia; Hung, Shih-Che; Chao, Jiun-Jie; Lin, Ching-Fuh

    2009-01-01

    Si nanowires (NWs) are promising materials for future electronic, photovoltaic, and sensor applications. So far the Si NWs are mainly formed on particular substrates or at high temperatures, greatly limiting their application flexibility. Here we report a low temperature process for forming and massively transferring vertically aligned Si NWs on alien substrates with a large density of about (3-5) x 10 7 NWs/mm 2 . The X-ray diffraction spectrum reveals that the transferred NWs exhibit almost the same crystal property as the bulk Si. Our investigation further shows that the transferred NWs have exceptional optical characteristics. The transferred Si NWs of 12.14 μm exhibit the transmittance as low as 0.3% in the near infrared region and 0.07% in the visible region. The extracted absorption coefficient of Si NWs in the near infrared region is about 3 x 10 3 cm -1 , over 30 times larger than that of the bulk Si. Because of the low temperature process, it enables a large variety of alien substrates such as glass and plastics to be used. In addition, the exceptional properties of the transferred NWs offer potential applications for photovoltaic, photo-detectors, sensors, and flexible electronics.

  20. Characteristics of Novel InGaAsN Double Heterojunction Bipolar Transistors

    Energy Technology Data Exchange (ETDEWEB)

    LI,N.Y.; CHANG,PING-CHIH; BACA,ALBERT G.; LAROCHE,J.R.; REN,F.; ARMOUR,E.; SHARPS,P.R.; HOU,H.Q.

    2000-08-01

    The authors demonstrate, for the first time, both functional Pnp AlGaAs/InGaAsN/GaAs (Pnp InGaAsN) and Npn InGaP/InGaAsN/GaAs (Npn InGaAsN) double heterojunction bipolar transistors (DHBTs) using a 1.2 eV In{sub 0.03}Ga{sub 0.97}As{sub 0.99}N{sub 0.01} as the base layer for low-power electronic applications. The Pnp InGaAsN DHBT has a peak current gain ({beta}) of 25 and a low turn-on voltage (V{sub ON}) of 0.79 V. This low V{sub ON} is {approximately} 0.25 V lower than in a comparable Pnp AlGAAs/GaAs HBT. For the Npn InGaAsN DHBT, it has a low V{sub ON} of 0.81 V, which is 0.13 V lower than in an InGaP/GaAs HBT. A peak {beta} of 7 with nearly ideal I-V characteristics has been demonstrated. Since GaAs is used as the collector of both Npn and Pnp InGaAsN DHBTs, the emitter-collector breakdown voltage (BV{sub CEO}) are 10 and 12 V, respectively, consistent with the BV{sub CEO} of Npn InGaP/GaAs and Pnp AlGaAs/GaAs HBTs of comparable collector thickness and doping level. All these results demonstrate the potential of InGaAsN DHBTs as an alternative for application in low-power electronics.

  1. A study of s new power semiconductor insulated gate bipolar transistor (IGBT) characteristics and its application to automotive ignition

    International Nuclear Information System (INIS)

    Rabah, K.V.O.

    1995-05-01

    Assessment has been made of the problem of the on-resistance and temperature effects in the three power transistor combinations, such as Darlington-types or IGBT. The IGBT is a device in which the drain of the MOSFET feeds the bipolar base in monolithic (IC and Power on the same chip) to give it both the MOS and bipolar advantages. The high temperature operating characteristics of the device are discussed and compared to that of power bipolar transistor. Unlike the power bipolar transistor whose operating current density shows current crowding at above forward collector current of 4Amps and forward voltage drop above 0.4V, the IGBT is found to maintain its high current density above forward collector of current 1Amp (or a forward voltage drop above 1.2V). The results also indicate that these devices (IGBTs) can be interdigited (paralleled) without current hogging problems if the forward conduction occurs at forward voltage drops in excess of 1.2V, and this makes it the best candidate for automotive ignition power switches. (author). 20 refs, 10 figs, 1 tab

  2. Simulation of diode characteristics of carbon nanotube field-effect transistors with symmetric source and drain contacts

    KAUST Repository

    Li, Jingqi; Zhang, Xixiang

    2011-01-01

    The diode characteristics of carbon nanotube field-effect transistors (CNTFETs) with symmetric source and drain contacts have been experimentally found at zero gate voltage (Li J. et al., Appl. Phys. Lett., 92 (2008) 133111). We calculate this characteristic using a semiclassical method based on Schottky barrier transistor mechanism. The influences of metal work function, the diameter of the carbon nanotubes and the dielectric thickness on the rectification behavior have been studied. The calculation results show that the metal with a higher work function results in a better diode characteristics for a p-type CNTFET. For single-walled carbon nanotubes (SWNTs) with different band gaps, both forward current and reverse current increase with decreasing band gap, but the ratio of forward current to reverse current decreases with decreasing band gap. This result is well consistent with the experimental observations reported previously. The simulation of the dielectric thickness effect indicates that the thinner the dielectric layer, the better the rectification behavior. The CNTFETs without a bottom gate could not show the diode characteristics, which is consistent with the reported experimental observation. © 2011 Europhysics Letters Association.

  3. Simulation of diode characteristics of carbon nanotube field-effect transistors with symmetric source and drain contacts

    KAUST Repository

    Li, Jingqi

    2011-09-01

    The diode characteristics of carbon nanotube field-effect transistors (CNTFETs) with symmetric source and drain contacts have been experimentally found at zero gate voltage (Li J. et al., Appl. Phys. Lett., 92 (2008) 133111). We calculate this characteristic using a semiclassical method based on Schottky barrier transistor mechanism. The influences of metal work function, the diameter of the carbon nanotubes and the dielectric thickness on the rectification behavior have been studied. The calculation results show that the metal with a higher work function results in a better diode characteristics for a p-type CNTFET. For single-walled carbon nanotubes (SWNTs) with different band gaps, both forward current and reverse current increase with decreasing band gap, but the ratio of forward current to reverse current decreases with decreasing band gap. This result is well consistent with the experimental observations reported previously. The simulation of the dielectric thickness effect indicates that the thinner the dielectric layer, the better the rectification behavior. The CNTFETs without a bottom gate could not show the diode characteristics, which is consistent with the reported experimental observation. © 2011 Europhysics Letters Association.

  4. Diode, transistor & fet circuits manual

    CERN Document Server

    Marston, R M

    2013-01-01

    Diode, Transistor and FET Circuits Manual is a handbook of circuits based on discrete semiconductor components such as diodes, transistors, and FETS. The book also includes diagrams and practical circuits. The book describes basic and special diode characteristics, heat wave-rectifier circuits, transformers, filter capacitors, and rectifier ratings. The text also presents practical applications of associated devices, for example, zeners, varicaps, photodiodes, or LEDs, as well as it describes bipolar transistor characteristics. The transistor can be used in three basic amplifier configuration

  5. Background noise characteristics of field effect transistors for X-ray detection units

    International Nuclear Information System (INIS)

    Gostilo, V.V.

    1990-01-01

    Energy equivalent for noise of experimental samples of field-effect transistors for X-ray detection units is investigated. Resolution of 160 eV for lines of 5.9 keV is obtained in detection unit with drain feedback using the Si(Li)-detector of 25 mm 2 by square

  6. Characteristics of thin-film transistors based on silicon nitride passivation by excimer laser direct patterning

    International Nuclear Information System (INIS)

    Chen, Chao-Nan; Huang, Jung-Jie

    2013-01-01

    This study explored the removal of silicon nitride using KrF laser ablation technology with a high threshold fluence of 990 mJ/cm 2 . This technology was used for contact hole patterning to fabricate SiN x -passivation-based amorphous-silicon thin films in a transistor device. Compared to the photolithography process, laser direct patterning using KrF laser ablation technology can reduce the number of process steps by at least three. Experimental results showed that the mobility and threshold voltages of thin film transistors patterned using the laser process were 0.16 cm 2 /V-sec and 0.2 V, respectively. The device performance and the test results of gate voltage stress reliability demonstrated that laser direct patterning is a promising alternative to photolithography in the panel manufacturing of thin-film transistors for liquid crystal displays. - Highlights: ► KrF laser ablation technology is used to remove silicon nitride. ► A simple method for direct patterning contact-hole in thin-film-transistor device. ► Laser technology reduced processing by at least three steps

  7. A comparative study on electrical characteristics of 1-kV pnp and npn SiC bipolar junction transistors

    Science.gov (United States)

    Okuda, Takafumi; Kimoto, Tsunenobu; Suda, Jun

    2018-04-01

    We investigate the electrical characteristics of 1-kV pnp SiC bipolar junction transistors (BJTs) and compare them with those of npn SiC BJTs. The base resistance, current gain, and blocking capability are characterized. It is found that the base resistance of pnp SiC BJTs is two orders of magnitude lower than that of npn SiC BJTs. However, the obtained current gains are low below unity in pnp SiC BJTs, whereas npn SiC BJTs exhibit a current gain of 14 without surface passivation. The reason for the poor current gain of pnp SiC BJTs is discussed.

  8. Experimental study on short-circuit characteristics of the new protection circuit of insulated gate bipolar transistor

    International Nuclear Information System (INIS)

    Ji, In-Hwan; Choi, Young-Hwan; Ha, Min-Woo; Han, Min-Koo; Choi, Yearn-Ik

    2006-01-01

    A new protection circuit employing the collector to emitter voltage (V CE ) sensing scheme for short-circuit withstanding capability of the insulated gate bipolar transistor (IGBT) is proposed and verified by experimental results. Because the current path between the gate and collector can be successfully eliminated in the proposed protection circuit, the power consumption can be reduced and the gate input impedance can be increased. Previous study is limited to dc characteristics. However, experimental results show that the proposed protection circuit successfully reduces the over-current of main IGBT by 80.4% under the short-circuit condition

  9. Revisiting the role of trap-assisted-tunneling process on current-voltage characteristics in tunnel field-effect transistors

    Science.gov (United States)

    Omura, Yasuhisa; Mori, Yoshiaki; Sato, Shingo; Mallik, Abhijit

    2018-04-01

    This paper discusses the role of trap-assisted-tunneling process in controlling the ON- and OFF-state current levels and its impacts on the current-voltage characteristics of a tunnel field-effect transistor. Significant impacts of high-density traps in the source region are observed that are discussed in detail. With regard to recent studies on isoelectronic traps, it has been discovered that deep level density must be minimized to suppress the OFF-state leakage current, as is well known, whereas shallow levels can be utilized to control the ON-state current level. A possible mechanism is discussed based on simulation results.

  10. Characteristics of Superjunction Lateral-Double-Diffusion Metal Oxide Semiconductor Field Effect Transistor and Degradation after Electrical Stress

    Science.gov (United States)

    Lin, Jyh‑Ling; Lin, Ming‑Jang; Lin, Li‑Jheng

    2006-04-01

    The superjunction lateral double diffusion metal oxide semiconductor field effect has recently received considerable attention. Introducing heavily doped p-type strips to the n-type drift region increases the horizontal depletion capability. Consequently, the doping concentration of the drift region is higher and the conduction resistance is lower than those of conventional lateral-double-diffusion metal oxide semiconductor field effect transistors (LDMOSFETs). These characteristics may increase breakdown voltage (\\mathit{BV}) and reduce specific on-resistance (Ron,sp). In this study, we focus on the electrical characteristics of conventional LDMOSFETs on silicon bulk, silicon-on-insulator (SOI) LDMOSFETs and superjunction LDMOSFETs after bias stress. Additionally, the \\mathit{BV} and Ron,sp of superjunction LDMOSFETs with different N/P drift region widths and different dosages are discussed. Simulation tools, including two-dimensional (2-D) TSPREM-4/MEDICI and three-dimensional (3-D) DAVINCI, were employed to determine the device characteristics.

  11. Dimensional effects in semiconductor nanowires; Dimensionseffekte in Halbleiternanodraehten

    Energy Technology Data Exchange (ETDEWEB)

    Stichtenoth, Daniel

    2008-06-23

    Nanomaterials show new physical properties, which are determined by their size and morphology. These new properties can be ascribed to the higher surface to volume ratio, to quantum size effects or to a form anisotropy. They may enable new technologies. The nanowires studied in this work have a diameter of 4 to 400 nm and a length up to 100 {mu}m. The semiconductor material used is mainly zinc oxide (ZnO), zinc sulfide (ZnS) and gallium arsenide (GaAs). All nanowires were synthesized according to the vapor liquid solid mechanism, which was originally postulated for the growth of silicon whiskers. Respective modifications for the growth of compound semiconductor nanowires are discussed. Detailed luminescence studies on ZnO nanowires with different diameters show pronounced size effects which can be attributed to the origins given above. Similar to bulk material, a tuning of the material properties is often essential for a further functionalization of the nanowires. This is typical realized by doping the source material. It becomes apparent, that a controlled doping of nanowires during the growth process is not successful. Here an alternative method is chosen: the doping after the growth by ion implantation. However, the doping by ion implantation goes always along with the creation of crystal defects. The defects have to be annihilated in order to reach an activation of th introduced dopants. At high ion fluences and ion masses the sputtering of surface atoms becomes more important. This results in a characteristic change in the morphology of the nanowires. In detail, the doping of ZnO and ZnS nanowires with color centers (manganese and rare earth elements) is demonstrated. Especially, the intra 3d luminescence of manganese implanted ZnS nanostructures shows a strong dependence of the nanowire diameter and morphology. This dependence can be described by expanding Foersters model (which describes an energy transfer to the color centers) by a dimensional parameter

  12. Crystalline-like temperature dependence of the electrical characteristics in amorphous Indium-Gallium-Zinc-Oxide thin film transistors

    Science.gov (United States)

    Estrada, M.; Hernandez-Barrios, Y.; Cerdeira, A.; Ávila-Herrera, F.; Tinoco, J.; Moldovan, O.; Lime, F.; Iñiguez, B.

    2017-09-01

    A crystalline-like temperature dependence of the electrical characteristics of amorphous Indium-Gallium-Zinc-Oxide (a-IGZO) thin film transistors (TFTs) is reported, in which the drain current reduces as the temperature is increased. This behavior appears for values of drain and gate voltages above which a change in the predominant conduction mechanism occurs. After studying the possible conduction mechanisms, it was determined that, for gate and drain voltages below these values, hopping is the predominant mechanism with the current increasing with temperature, while for values above, the predominant conduction mechanism becomes percolation in the conduction band or band conduction and IDS reduces as the temperature increases. It was determined that this behavior appears, when the effect of trapping is reduced, either by varying the density of states, their characteristic energy or both. Simulations were used to further confirm the causes of the observed behavior.

  13. Effect of etching stop layer on characteristics of amorphous IGZO thin film transistor fabricated at low temperature

    Directory of Open Access Journals (Sweden)

    Xifeng Li

    2013-03-01

    Full Text Available Transparent bottom-gate amorphous Indium-Gallium-Zinc Oxide (a-IGZO thin-film transistors (TFTs had been successfully fabricated at relative low temperature. The influence of reaction gas ratio of N2O and SiH4 during the growth of etching stop layer (SiOx on the characteristics of a-IGZO TFTs was investigated. The transfer characteristics of the TFTs were changed markedly because active layer of a-IGZO films was modified by plasma in the growth process of SiOx. By optimizing the deposition parameters of etching stop layer process, a-IGZO TFTs were manufactured and exhibited good performance with a field-effect mobility of 8.5 cm2V-1s-1, a threshold voltage of 1.3 V, and good stability under gate bias stress of 20 V for 10000 s.

  14. Fabrication and Photovoltaic Characteristics of Coaxial Silicon Nanowire Solar Cells Prepared by Wet Chemical Etching

    Directory of Open Access Journals (Sweden)

    Chien-Wei Liu

    2012-01-01

    Full Text Available Nanostructured solar cells with coaxial p-n junction structures have strong potential to enhance the performances of the silicon-based solar cells. This study demonstrates a radial junction silicon nanowire (RJSNW solar cell that was fabricated simply and at low cost using wet chemical etching. Experimental results reveal that the reflectance of the silicon nanowires (SNWs declines as their length increases. The excellent light trapping was mainly associated with high aspect ratio of the SNW arrays. A conversion efficiency of ∼7.1% and an external quantum efficiency of ∼64.6% at 700 nm were demonstrated. Control of etching time and diffusion conditions holds great promise for the development of future RJSNW solar cells. Improving the electrode/RJSNW contact will promote the collection of carries in coaxial core-shell SNW array solar cells.

  15. Transparent p-type SnO nanowires with unprecedented hole mobility among oxide semiconductors

    KAUST Repository

    Caraveo-Frescas, J. A.; Alshareef, Husam N.

    2013-01-01

    p-type tin monoxide (SnO) nanowire field-effect transistors with stable enhancement mode behavior and record performance are demonstrated at 160 °C. The nanowire transistors exhibit the highest field-effect hole mobility (10.83 cm2 V−1 s−1) of any p

  16. Characteristics of voltage regulators with serial NPN transistor in the fields of medium and high energy photons

    International Nuclear Information System (INIS)

    Vukic, V.; Osmokrovic, P.

    2007-01-01

    Variation of collector - emitter dropout voltage on serial transistors of voltage regulators LM2990T-5 and LT1086CT5 were used as the parameter for detection of examined devices' radiation hardness in X and ? radiation fields. Biased voltage regulators with serial super-β transistor in the medium dose rate X radiation field had significantly different response from devices with conventional serial NPN transistor. Although unbiased components suffered greater damage in most cases, complete device failure happened only among the biased components with serial super-β transistor in Bremsstrahlung field. Mechanisms of transistors degradation in ionizing radiation fields were analysed [sr

  17. The point of practical use for the transistor circuit

    International Nuclear Information System (INIS)

    1996-01-01

    This is comprised of eight chapters and goes as follows; what is transistor? the first step for use of transistor such as connection between power and signal source, static characteristic of transistor and equivalent circuit of transistor, design of easy small-signal amplifier circuit, design for amplification of electric power and countermeasure for prevention of trouble, transistor concerned interface, transistor circuit around micro computer, transistor in active use of FET and power circuit and transistor. It has an appendix on transistor and design of bias of FET circuits like small signal transistor circuit and FET circuit.

  18. Small signal modulation characteristics of red-emitting (λ = 610 nm) III-nitride nanowire array lasers on (001) silicon

    KAUST Repository

    Jahangir, Shafat; Frost, Thomas; Hazari, Arnab; Yan, Lifan; Stark, Ethan; LaMountain, Trevor; Millunchick, Joanna M.; Ooi, Boon S.; Bhattacharya, Pallab

    2015-01-01

    The small signal modulation characteristics of an InGaN/GaN nanowire array edge- emitting laser on (001) silicon are reported. The emission wavelength is 610 nm. Lattice matched InAlN cladding layers were incorporated in the laser heterostructure for better mode confinement. The suitability of the nanowire lasers for use in plastic fiber communication systems with direct modulation is demonstrated through their modulation bandwidth of f-3dB,max = 3.1 GHz, very low values of chirp (0.8 Å) and α-parameter, and large differential gain (3.1 × 10-17 cm2).

  19. Small signal modulation characteristics of red-emitting (λ = 610 nm) III-nitride nanowire array lasers on (001) silicon

    KAUST Repository

    Jahangir, Shafat

    2015-02-16

    The small signal modulation characteristics of an InGaN/GaN nanowire array edge- emitting laser on (001) silicon are reported. The emission wavelength is 610 nm. Lattice matched InAlN cladding layers were incorporated in the laser heterostructure for better mode confinement. The suitability of the nanowire lasers for use in plastic fiber communication systems with direct modulation is demonstrated through their modulation bandwidth of f-3dB,max = 3.1 GHz, very low values of chirp (0.8 Å) and α-parameter, and large differential gain (3.1 × 10-17 cm2).

  20. Impact of rounded electrode corners on breakdown characteristics of AlGaN/GaN high-electron mobility transistors

    Science.gov (United States)

    Yamazaki, Taisei; Asubar, Joel T.; Tokuda, Hirokuni; Kuzuhara, Masaaki

    2018-05-01

    We investigated the impact of rounded electrode corners on the breakdown characteristics of AlGaN/GaN high-electron mobility transistors. For standard reference devices, catastrophic breakdown occurred predominantly near the sharp electrode corners. By introducing a rounded-electrode architecture, premature breakdown at the corners was mitigated. Moreover, the rate of breakdown voltage (V BR) degradation with an increasing gate width (W G) was significantly lower for devices with rounded corners. When W G was increased from 100 µm to 10 mm, the V BR of the reference device dropped drastically, from 1,200 to 300 V, whereas that of the rounded-electrode device only decreased to a respectable value of 730 V.

  1. Analytical model of surface potential profiles and transfer characteristics for hetero stacked tunnel field-effect transistors

    Science.gov (United States)

    Xu, Hui Fang; Sun, Wen; Han, Xin Feng

    2018-06-01

    An analytical model of surface potential profiles and transfer characteristics for hetero stacked tunnel field-effect transistors (HS-TFETs) is presented for the first time, where hetero stacked materials are composed of two different bandgaps. The bandgap of the underlying layer is smaller than that of the upper layer. Under different device parameters (upper layer thickness, underlying layer thickness, and hetero stacked materials) and temperature, the validity of the model is demonstrated by the agreement of its results with the simulation results. Moreover, the results show that the HS-TFETs can obtain predominant performance with relatively slow changes of subthreshold swing (SS) over a wide drain current range, steep average subthreshold swing, high on-state current, and large on–off state current ratio.

  2. Characteristics of dual-gate thin-film transistors for applications in digital radiology

    International Nuclear Information System (INIS)

    Waechter, D.; Huang, Z.; Zhao, W.; Blevis, I.; Rowlands, J.A.

    1996-01-01

    A large-area flat-panel detector for digital radiology is being developed. The detector uses an array of dual-gate thin-film transistors (TFTs) to read out X-ray-generated charge produced in an amorphous selenium (a-Se) layer. The TFTs use CdSe as the semiconductor and use the bottom gate for row selection. The top gate can be divided into a 'deliberate' gate, covering most of the channel length, and small 'parasitic' gates that consist of: overlap of source or drain metal over the top-gate oxide; and gap regions in the metal that are covered only by the a-Se. In this paper we present the properties of dual-gate TFTs and examine the effect of both the deliberate and parasitic gates on the detector operation. Various options for controlling the top-gate potential are analyzed and discussed. (author)

  3. Characteristics of carrier-generated field-effect transistors with pentacene/vanadium pentoxide

    International Nuclear Information System (INIS)

    Minagawa, M.; Nakai, K.; Baba, A.; Shinbo, K.; Kato, K.; Kaneko, F.; Lee, C.

    2011-01-01

    In this paper, the driving mechanism of carrier-generated organic field-effect transistors (OFETs) with pentacene and vanadium pentoxide (V 2 O 5 ) layers is discussed. In this study, large on-currents were observed in an OFET with a 35-nm V 2 O 5 layer. Devices with aluminum (Al)/pentacene/V 2 O 5 /Al layer structures were also prepared. These devices exhibited a large current density in spite of their high carrier injection barriers between each layer and the Al electrodes. Moreover, new absorption bands corresponding to the radical cation absorption of pentacene were observed within the absorption spectrum of the pentacene and V 2 O 5 mixed layers. It was inferred that the charge transfer (CT) complexes that formed at the interface between the pentacene and V 2 O 5 layers were dissociated by the applied gate voltage and that the generated holes contributed to driving the OFETs.

  4. Enhancement in the photodetection of ZnO nanowires by introducing surface-roughness-induced traps

    International Nuclear Information System (INIS)

    Park, Woojin; Jo, Gunho; Hong, Woong-Ki; Yoon, Jongwon; Choe, Minhyeok; Ji, Yongsung; Kim, Geunjin; Kahng, Yung Ho; Lee, Kwanghee; Lee, Takhee; Lee, Sangchul; Wang, Deli

    2011-01-01

    We investigated the enhanced photoresponse of ZnO nanowire transistors that was introduced with surface-roughness-induced traps by a simple chemical treatment with isopropyl alcohol (IPA). The enhanced photoresponse of IPA-treated ZnO nanowire devices is attributed to an increase in adsorbed oxygen on IPA-induced surface traps. The results of this study revealed that IPA-treated ZnO nanowire devices displayed higher photocurrent gains and faster photoswitching speed than transistors containing unmodified ZnO nanowires. Thus, chemical treatment with IPA can be a useful method for improving the photoresponse of ZnO nanowire devices.

  5. Influence of non-adherent yeast cells on electrical characteristics of diamond-based field-effect transistors

    Energy Technology Data Exchange (ETDEWEB)

    Procházka, Václav, E-mail: prochazkav@fzu.cz [Faculty of Electrical Engineering, Czech Technical University in Prague, Technická 2, 16627 Prague (Czech Republic); Institute of Physics, The Czech Academy of Sciences, Cukrovarnická 10/112, 162 00 Prague (Czech Republic); Cifra, Michal [Institute of Photonics and Electronics, The Czech Academy of Sciences, Chaberská 57, 182 51 Prague (Czech Republic); Kulha, Pavel [Faculty of Electrical Engineering, Czech Technical University in Prague, Technická 2, 16627 Prague (Czech Republic); Institute of Physics, The Czech Academy of Sciences, Cukrovarnická 10/112, 162 00 Prague (Czech Republic); Ižák, Tibor [Institute of Physics, The Czech Academy of Sciences, Cukrovarnická 10/112, 162 00 Prague (Czech Republic); Rezek, Bohuslav [Faculty of Electrical Engineering, Czech Technical University in Prague, Technická 2, 16627 Prague (Czech Republic); Institute of Physics, The Czech Academy of Sciences, Cukrovarnická 10/112, 162 00 Prague (Czech Republic); Kromka, Alexander [Institute of Physics, The Czech Academy of Sciences, Cukrovarnická 10/112, 162 00 Prague (Czech Republic); Faculty of Civil Engineering, Czech Technical University in Prague, Thákurova 7, 16629 Prague (Czech Republic)

    2017-02-15

    Highlights: • Interaction of non-adherent yeast cells with H-terminated diamond described. • Effect of cell culture solutions on H-diamond SGFET (positive potential shifts). • H-diamond sensitive to metabolic activity of yeast cells (negative potential shift). - Abstract: Diamond thin films provide unique features as substrates for cell cultures and as bio-electronic sensors. Here we employ solution-gated field effect transistors (SGFET) based on nanocrystalline diamond thin films with H-terminated surface which exhibits the sub-surface p-type conductive channel. We study an influence of yeast cells (Saccharomyces cerevisiae) on electrical characteristics of the diamond SGFETs. Two different cell culture solutions (sucrose and yeast peptone dextrose–YPD) are used, with and without the cells. We have found that transfer characteristics of the SGFETs exhibit a negative shift of the gate voltage by −26 mV and −42 mV for sucrose and YPD with cells in comparison to blank solutions without the cells. This effect is attributed to a local pH change in close vicinity of the H-terminated diamond surface due to metabolic processes of the yeast cells. The pH sensitivity of the diamond-based SGFETs, the role of cell and protein adhesion on the gate surface and the role of negative surface charge of yeast cells on the SGFETs electrical characteristics are discussed as well.

  6. Influence of non-adherent yeast cells on electrical characteristics of diamond-based field-effect transistors

    International Nuclear Information System (INIS)

    Procházka, Václav; Cifra, Michal; Kulha, Pavel; Ižák, Tibor; Rezek, Bohuslav; Kromka, Alexander

    2017-01-01

    Highlights: • Interaction of non-adherent yeast cells with H-terminated diamond described. • Effect of cell culture solutions on H-diamond SGFET (positive potential shifts). • H-diamond sensitive to metabolic activity of yeast cells (negative potential shift). - Abstract: Diamond thin films provide unique features as substrates for cell cultures and as bio-electronic sensors. Here we employ solution-gated field effect transistors (SGFET) based on nanocrystalline diamond thin films with H-terminated surface which exhibits the sub-surface p-type conductive channel. We study an influence of yeast cells (Saccharomyces cerevisiae) on electrical characteristics of the diamond SGFETs. Two different cell culture solutions (sucrose and yeast peptone dextrose–YPD) are used, with and without the cells. We have found that transfer characteristics of the SGFETs exhibit a negative shift of the gate voltage by −26 mV and −42 mV for sucrose and YPD with cells in comparison to blank solutions without the cells. This effect is attributed to a local pH change in close vicinity of the H-terminated diamond surface due to metabolic processes of the yeast cells. The pH sensitivity of the diamond-based SGFETs, the role of cell and protein adhesion on the gate surface and the role of negative surface charge of yeast cells on the SGFETs electrical characteristics are discussed as well.

  7. Screening model for nanowire surface-charge sensors in liquid

    DEFF Research Database (Denmark)

    Sørensen, Martin Hedegård; Mortensen, Asger; Brandbyge, Mads

    2007-01-01

    The conductance change of nanowire field-effect transistors is considered a highly sensitive probe for surface charge. However, Debye screening of relevant physiological liquid environments challenge device performance due to competing screening from the ionic liquid and nanowire charge carriers....

  8. Fabrication and characteristics of magnetic field sensors based on nano-polysilicon thin-film transistors

    International Nuclear Information System (INIS)

    Zhao Xiaofeng; Wen Dianzhong; Zhuang Cuicui; Cao Jingya; Wang Zhiqiang

    2013-01-01

    A magnetic field sensor based on nano-polysilicon thin films transistors (TFTs) with Hall probes is proposed. The magnetic field sensors are fabricated on 〈100〉 orientation high resistivity (ρ > 500 Ω·cm) silicon substrates by using CMOS technology, which adopt nano-polysilicon thin films with thicknesses of 90 nm and heterojunction interfaces between the nano-polysilicon thin films and the high resistivity silicon substrates as the sensing layers. The experimental results show that when V DS = 5.0 V, the magnetic sensitivities of magnetic field sensors based on nano-polysilicon TFTs with length—width ratios of 160 μm/80 μm, 320 μm/80 μm and 480 μm/80 μm are 78 mV/T, 55 mV/T and 34 mV/T, respectively. Under the same conditions, the magnetic sensitivity of the obtained magnetic field sensor is significantly improved in comparison with a Hall magnetic field sensor adopting silicon as the sensing layers. (semiconductor technology)

  9. Electrical characteristics of tunneling field-effect transistors with asymmetric channel thickness

    Science.gov (United States)

    Kim, Jungsik; Oh, Hyeongwan; Kim, Jiwon; Meyyappan, M.; Lee, Jeong-Soo

    2017-02-01

    Effects of using asymmetric channel thickness in tunneling field-effect transistors (TFET) are investigated in sub-50 nm channel regime using two-dimensional (2D) simulations. As the thickness of the source side becomes narrower in narrow-source wide-drain (NSWD) TFETs, the threshold voltage (V th) and the subthreshold swing (SS) decrease due to enhanced gate controllability of the source side. The narrow source thickness can make the band-to-band tunneling (BTBT) distance shorter and induce much higher electric field near the source junction at the on-state condition. In contrast, in a TFET with wide-source narrow-drain (WSND), the SS shows almost constant values and the V th slightly increases with narrowing thickness of the drain side. In addition, the ambipolar current can rapidly become larger with smaller thickness on the drain side because of the shorter BTBT distance and the higher electric-field at the drain junction. The on-current of the asymmetric channel TFET is lower than that of conventional TFETs due to the volume limitation of the NSWD TFET and high series resistance of the WSND TFET. The on-current is almost determined by the channel thickness of the source side.

  10. Growth and characteristics of p-type doped GaAs nanowire

    Science.gov (United States)

    Li, Bang; Yan, Xin; Zhang, Xia; Ren, Xiaomin

    2018-05-01

    The growth of p-type GaAs nanowires (NWs) on GaAs (111) B substrates by metal-organic chemical vapor deposition (MOCVD) has been systematically investigated as a function of diethyl zinc (DEZn) flow. The growth rate of GaAs NWs was slightly improved by Zn-doping and kink is observed under high DEZn flow. In addition, the I–V curves of GaAs NWs has been measured and the p-type dope concentration under the II/III ratio of 0.013 and 0.038 approximated to 1019–1020 cm‑3. Project supported by the National Natural Science Foundation of China (Nos. 61376019, 61504010, 61774021) and the Fund of State Key Laboratory of Information Photonics and Optical Communications (Beijing University of Posts and Telecommunications), China (Nos. IPOC2017ZT02, IPOC2017ZZ01).

  11. Transistor data book

    International Nuclear Information System (INIS)

    1988-03-01

    It introduces how to use this book. It lists transistor data and index, which are Type No, Cross index, Germanium PNP low power transistors, silicon NPN low power transistors, Germanium PNP high power transistors, Switching transistors, transistor arrays, Miscellaneous transistors, types with U.S military specifications, direct replacement transistors, suggested replacement transistors, schematic drawings, outline drawings, device number keys and manufacturer's logos.

  12. Highly effective field-effect mobility amorphous InGaZnO TFT mediated by directional silver nanowire arrays.

    Science.gov (United States)

    Liu, Hung-Chuan; Lai, Yi-Chun; Lai, Chih-Chung; Wu, Bing-Shu; Zan, Hsiao-Wen; Yu, Peichen; Chueh, Yu-Lun; Tsai, Chuang-Chuang

    2015-01-14

    In this work, we demonstrate sputtered amorphous indium-gallium-zinc oxide thin-film transistors (a-IGZO TFTs) with a record high effective field-effect mobility of 174 cm(2)/V s by incorporating silver nanowire (AgNW) arrays to channel electron transport. Compared to the reference counterpart without nanowires, the over 5-fold enhancement in the effective field-effect mobility exhibits clear dependence on the orientation as well as the surface coverage ratio of silver nanowires. Detailed material and device analyses reveal that during the room-temperature IGZO sputtering indium and oxygen diffuse into the nanowire matrix while the nanowire morphology and good contact between IGZO and nanowires are maintained. The unchanged morphology and good interfacial contact lead to high mobility and air-ambient-stable characteristics up to 3 months. Neither hysteresis nor degraded bias stress reliability is observed. The proposed AgNW-mediated a-IGZO TFTs are promising for development of large-scale, flexible, transparent electronics.

  13. Velocity overshoot decay mechanisms in compound semiconductor field-effect transistors with a submicron characteristic length

    International Nuclear Information System (INIS)

    Jyegal, Jang

    2015-01-01

    Velocity overshoot is a critically important nonstationary effect utilized for the enhanced performance of submicron field-effect devices fabricated with high-electron-mobility compound semiconductors. However, the physical mechanisms of velocity overshoot decay dynamics in the devices are not known in detail. Therefore, a numerical analysis is conducted typically for a submicron GaAs metal-semiconductor field-effect transistor in order to elucidate the physical mechanisms. It is found that there exist three different mechanisms, depending on device bias conditions. Specifically, at large drain biases corresponding to the saturation drain current (dc) region, the velocity overshoot suddenly begins to drop very sensitively due to the onset of a rapid decrease of the momentum relaxation time, not the mobility, arising from the effect of velocity-randomizing intervalley scattering. It then continues to drop rapidly and decays completely by severe mobility reduction due to intervalley scattering. On the other hand, at small drain biases corresponding to the linear dc region, the velocity overshoot suddenly begins to drop very sensitively due to the onset of a rapid increase of thermal energy diffusion by electrons in the channel of the gate. It then continues to drop rapidly for a certain channel distance due to the increasing thermal energy diffusion effect, and later completely decays by a sharply decreasing electric field. Moreover, at drain biases close to a dc saturation voltage, the mechanism is a mixture of the above two bias conditions. It is suggested that a large secondary-valley energy separation is essential to increase the performance of submicron devices

  14. Characteristics of Schottky-barrier source/drain metal-oxide-polycrystalline thin-film transistors on glass substrates

    International Nuclear Information System (INIS)

    Jung, Seung-Min; Cho, Won-Ju; Jung, Jong-Wan

    2012-01-01

    Polycrystalline-silicon (poly-Si) Schottky-barrier thin-film transistors (SB-TFTs) with Pt-silicided source /drain junctions were fabricated on glass substrates, and the electrical characteristics were examined. The amorphous silicon films on glass substrates were converted into high-quality poly-Si by using excimer laser annealing (ELA) and solid phase crystallization (SPC) methods. The crystallinity of poly-Si was analyzed by using scanning electron microscopy, transmission electron microscopy, and X-ray diffraction analysis. The silicidation process was optimized by measuring the electrical characteristics of the Pt-silicided Schottky diodes. The performances of Pt-silicided SB-TFTs using poly-Si films on glass substrates and crystallized by using ELA and SPC were demonstrated. The SB-TFTs using the ELA poly-Si film demonstrated better electrical performances such as higher mobility (22.4 cm 2 /Vs) and on/off current ratio (3 x 10 6 ) and lower subthreshold swing value (120 mV/dec) than the SPC poly-Si films.

  15. Electrical and optical characteristics of heterojunction devices composed of silicon nanowires and mercury selenide nanoparticle films on flexible plastics.

    Science.gov (United States)

    Yeo, Minje; Yun, Junggwon; Kim, Sangsig

    2013-09-01

    A pn heterojunction device based on p-type silicon (Si) nanowires (NWs) prepared by top-down method and n-type mercury selenide (HgSe) nanoparticles (NPs) synthesized by the colloidal method have been fabricated on a flexible plastic substrate. The synthesized HgSe NPs were analyzed through the effective mass approximation. The characteristics of the heterojunction device were examined and studied with the energy band diagram. The device showed typical diode characteristics with a turn-on voltage of 1.5 V and exhibited a high rectification ratio of 10(3) under relatively low forward bias. Under illumination of 633-nm-wavelength light, the device presented photocurrent efficiency of 117.5 and 20.1 nA/W under forward bias and reverse bias conditions, respectively. Moreover, the photocurrent characteristics of the device have been determined by bending of the plastic substrate upward and downward with strain of 0.8%. Even though the photocurrent efficiency has fluctuations during the bending cycles, the values are roughly maintained for 10(4) bending cycles. This result indicates that the fabricated heterojunction device has the potential to be applied as fundamental elements of flexible nanoelectronics.

  16. Characteristics of AlN/GaN nanowire Bragg mirror grown on (001) silicon by molecular beam epitaxy

    KAUST Repository

    Heo, Junseok; Bhattacharya, Pallab K.; Guo, Wei; Ooi, Boon S.; Zhou, Zifan

    2013-01-01

    finite difference time domain technique. Ensemble nanowire microcavities with In0.3Ga 0.7N nanowires clad by AlN/GaN DBRs have also been characterized. Room temperature emission from the microcavity exhibits considerable linewidth narrowing compared

  17. Characteristics of AlN/GaN nanowire Bragg mirror grown on (001) silicon by molecular beam epitaxy

    KAUST Repository

    Heo, Junseok

    2013-10-01

    GaN nanowires containing AlN/GaN distributed Bragg reflector (DBR) heterostructures have been grown on (001) silicon substrate by molecular beam epitaxy. A peak reflectance of 70% with normal incidence at 560 nm is derived from angle resolved reflectance measurements on the as-grown nanowire DBR array. The measured peak reflectance wavelength is significantly blue-shifted from the ideal calculated value. The discrepancy is explained by investigating the reflectance of the nanoscale DBRs with a finite difference time domain technique. Ensemble nanowire microcavities with In0.3Ga 0.7N nanowires clad by AlN/GaN DBRs have also been characterized. Room temperature emission from the microcavity exhibits considerable linewidth narrowing compared to that measured for unclad In0.3Ga0.7N nanowires. The resonant emission is characterized by a peak wavelength and linewidth of 575 nm and 39 nm, respectively. © 2013 AIP Publishing LLC.

  18. Semiconductor nanowires and templates for electronic applications

    Energy Technology Data Exchange (ETDEWEB)

    Ying, Xiang

    2009-07-15

    catalyzed germanium nanowires, a small process window has been determined where high aspect-ratio nanowires show single crystalline structure. Compositional analysis has been performed via electron energy loss spectroscopy (EELS) to monitor the presence of indium and bismuth in the nanowires. Both catalysts could be identified, validating their role as catalysts. A combined atomic force microscopy (AFM) and Raman spectroscopy characterization on single core-shell nanowires gives clear evidence of finite-size effects on the electron-phonon coupling, as well as the presence of strain. Field effect transistors were fabricated using gold, bismuth and indium catalyzed germanium nanowires. Initial room-temperature and temperature dependent transport measurements on gold and bismuth catalyzed nanowires show field effects. Indium catalyzed germanium nanowires show insulating behavior. (orig.)

  19. Length-dependent thermoelectric characteristics of silicon nanowires on plastics in a relatively low temperature regime in ambient air

    International Nuclear Information System (INIS)

    Choi, Jinyong; Cho, Kyoungah; Kim, Sangsig

    2013-01-01

    We report on the thermoelectric characteristics of p-type silicon nanowires (NWs) on plastics in the relatively low temperature regime below 47 ° C, and for temperature differences of less than 10 K in ambient air. Thermal profile images are utilized to directly determine the temperature difference in the NWs generated by Joule heating in air. The Seebeck coefficient of the NWs increases from 294 to 414 μV K −1 as the NW length varies from 40 to 280 μm. For a temperature difference of 7 K, the maximal Seebeck voltage can be estimated to be 2.7 mV for NWs with a length of 280 μm. In contrast, the output power is maximized for NWs length of 240 μm. The maximized output power obtained experimentally in this study is 2.1 pW at a temperature difference of 6 K. The thermoelectric characteristics are analyzed and discussed. (paper)

  20. Reduction of ambipolar characteristics of vertical channel tunneling field-effect transistor by using dielectric sidewall

    International Nuclear Information System (INIS)

    Park, Chun Woong; Cho, Il Hwan; Choi, Woo Young; Lee, Jong-Ho

    2013-01-01

    Ambipolar characteristics of tunneling FETs have been improved by introducing a novel structure which contains dielectric sidewall in the gate region. In the ambipolar operation mode, gate field effect on intrinsic-drain junction region can be reduced with dielectric sidewall. As a result, ambipolar state tunneling probability is decreased at the intrinsic-drain junction. Since the sidewall region is located near the drain region, tunneling probability of source-intrinsic region is not affected by dielectric sidewall. This asymmetric characteristics means only ambipolar current of tunneling FETs can be prohibited by dielectric sidewall. Reduction of ambipolar characteristic of proposed structure has been evaluated with dimension and location of dielectric sidewall. Quantitative analysis of ambipolar characteristics is also investigated with tunneling. (paper)

  1. Improvement of Electrical Characteristics and Stability of Amorphous Indium Gallium Zinc Oxide Thin Film Transistors Using Nitrocellulose Passivation Layer.

    Science.gov (United States)

    Shin, Kwan Yup; Tak, Young Jun; Kim, Won-Gi; Hong, Seonghwan; Kim, Hyun Jae

    2017-04-19

    In this research, nitrocellulose is proposed as a new material for the passivation layers of amorphous indium gallium zinc oxide thin film transistors (a-IGZO TFTs). The a-IGZO TFTs with nitrocellulose passivation layers (NC-PVLs) demonstrate improved electrical characteristics and stability. The a-IGZO TFTs with NC-PVLs exhibit improvements in field-effect mobility (μ FE ) from 11.72 ± 1.14 to 20.68 ± 1.94 cm 2 /(V s), threshold voltage (V th ) from 1.85 ± 1.19 to 0.56 ± 0.35 V, and on/off current ratio (I on/off ) from (5.31 ± 2.19) × 10 7 to (4.79 ± 1.54) × 10 8 compared to a-IGZO TFTs without PVLs, respectively. The V th shifts of a-IGZO TFTs without PVLs, with poly(methyl methacrylate) (PMMA) PVLs, and with NC-PVLs under positive bias stress (PBS) test for 10,000 s represented 5.08, 3.94, and 2.35 V, respectively. These improvements were induced by nitrogen diffusion from NC-PVLs to a-IGZO TFTs. The lone-pair electrons of diffused nitrogen attract weakly bonded oxygen serving as defect sites in a-IGZO TFTs. Consequently, the electrical characteristics are improved by an increase of carrier concentration in a-IGZO TFTs, and a decrease of defects in the back channel layer. Also, NC-PVLs have an excellent property as a barrier against ambient gases. Therefore, the NC-PVL is a promising passivation layer for next-generation display devices that simultaneously can improve electrical characteristics and stability against ambient gases.

  2. The effect of annealing ambient on the characteristics of an indium-gallium-zinc oxide thin film transistor.

    Science.gov (United States)

    Park, Soyeon; Bang, Seokhwan; Lee, Seungjun; Park, Joohyun; Ko, Youngbin; Jeon, Hyeongtag

    2011-07-01

    In this study, the effects of different annealing conditions (air, O2, N2, vacuum) on the chemical and electrical characteristics of amorphous indium-gallium-zinc oxide (a-IGZO) thin film transistors (TFT) were investigated. The contact resistance and interface properties between the IGZO film and the gate dielectric improved after an annealing treatment. However, the chemical bonds in the IGZO bulk changed under various annealing atmospheres, which, in turn, altered the characteristics of the TFTs. The TFTs annealed in vacuum and N2 ambients exhibited undesired switching properties due to the high carrier concentration (>10(17) cm(-3)) of the IGZO active layer. In contrast, the IGZO TFTs annealed in air and oxygen ambients displayed clear transfer characteristics due to an adequately adjusted carrier concentration in the operating range of the TFT. Such an optimal carrier concentration arose through the stabilization of unstable chemical bonds in the IGZO film. With regard to device performance, the TFTs annealed in O2 and air exhibited saturation mobility values of 8.29 and 7.54 cm2/Vs, on-off ratios of 7.34 x 10(8) and 3.95 x 10(8), and subthreshold swing (SS) values of 0.23 and 0.19 V/decade, respectively. Therefore, proper annealing ambients contributed to internal modifications in the IGZO structure and led to an enhancement in the oxidation state of the metal. As a result, defects such as oxygen vacancies were eliminated. Oxygen annealing is thus effective for controlling the carrier concentration of the active layer, decreasing electron traps, and enhancing TFT performance.

  3. Analysing organic transistors based on interface approximation

    International Nuclear Information System (INIS)

    Akiyama, Yuto; Mori, Takehiko

    2014-01-01

    Temperature-dependent characteristics of organic transistors are analysed thoroughly using interface approximation. In contrast to amorphous silicon transistors, it is characteristic of organic transistors that the accumulation layer is concentrated on the first monolayer, and it is appropriate to consider interface charge rather than band bending. On the basis of this model, observed characteristics of hexamethylenetetrathiafulvalene (HMTTF) and dibenzotetrathiafulvalene (DBTTF) transistors with various surface treatments are analysed, and the trap distribution is extracted. In turn, starting from a simple exponential distribution, we can reproduce the temperature-dependent transistor characteristics as well as the gate voltage dependence of the activation energy, so we can investigate various aspects of organic transistors self-consistently under the interface approximation. Small deviation from such an ideal transistor operation is discussed assuming the presence of an energetically discrete trap level, which leads to a hump in the transfer characteristics. The contact resistance is estimated by measuring the transfer characteristics up to the linear region

  4. Characteristics of CVD graphene nanoribbon formed by a ZnO nanowire hardmask

    Energy Technology Data Exchange (ETDEWEB)

    Kang, Chang Goo; Kang, Jang Won; Lee, Seung Yong; Hwang, Hyeon Jun; Lee, Young Gon; Park, Seong-Ju; Lee, Byoung Hun [School of Material Science and Engineering, Gwangju Institute of Science and Technology, Oryong-dong 1, Buk-gu, Gwangju, 500-712 (Korea, Republic of); Lee, Sang Kyung; Cho, Chun Hum [Department of Nanobio Materials and Electronics, Gwangju Institute of Science and Technology, Oryong-dong 1, Buk-gu, Gwangju, 500-712 (Korea, Republic of); Heo, Jinseong; Chung, Hyun-Jong; Yang, Heejun [Semiconductor Devices Lab, Samsung Advanced Institute of Technology, Yongin (Korea, Republic of); Seo, Sunae [Department of Physics, Sejong University, Gunja-Dong, Kwanggin-gu, Seoul (Korea, Republic of); Ko, Ki Young; Ahn, Jinho, E-mail: bhl@gist.ac.kr [Division of Materials Science and Engineering, Hanyang University, 17 Haengdang-dong, Seongdong-gu, Seoul, 133-791 (Korea, Republic of)

    2011-07-22

    A graphene nanoribbon (GNR) is an important basic structure to open a bandgap in graphene. The GNR processes reported in the literature are complex, time-consuming, and expensive; moreover, the device yield is relatively low. In this paper, a simple new process to fabricate a long and straight graphene nanoribbon with a high yield has been proposed. This process utilizes CVD graphene substrate and a ZnO nanowire as the hardmask for patterning. 8 {mu}m long and 50-100 nm wide GNRs were successfully demonstrated in high density without any trimming, and {approx} 10% device yield was realized with a top-down patterning process. After passivating the surfaces of the GNRs using a low temperature atomic layer deposition (ALD) of Al{sub 2}O{sub 3}, high performance GNR MOSFETs with symmetric drain-current-gate-voltage (I{sub d}-V{sub g}) curves were demonstrated and a field effect mobility up to {approx} 1200 cm{sup 2} V{sup -1} s{sup -1} was achieved at V{sub d} = 10 mV.

  5. Characteristics of gravure printed InGaZnO thin films as an active channel layer in thin film transistors

    International Nuclear Information System (INIS)

    Choi, Yuri; Kim, Gun Hee; Jeong, Woong Hee; Kim, Hyun Jae; Chin, Byung Doo; Yu, Jae-Woong

    2010-01-01

    Characteristics of oxide semiconductor thin film transistor prepared by gravure printing technique were studied. This device had inverted staggered structure of glass substrate/MoW/SiNx/ printed active layer. The active layer was printed with precursor of indium gallium zinc oxide solution and then annealed at 550 o C for 2 h. Influences of printing parameters (i.e. speed and force) were studied. As the gravure printing force was increased, the thickness of printed film was decreased and the refractive index of printed active layer was increased. The best printed result in our study was obtained with printing speed of 0.4 m/s, printing force of 400 N and the thickness of printed active layer was 45 nm. According to AFM image, surface of printed active layer was quite smooth and the root-mean square roughness was approximately 0.5 nm. Gravure printed active layer had a field-effect mobility of 0.81 cm 2 /Vs and an on-off current ratio was 1.36 x 10 6 .

  6. Effect of the annealing ambient on the electrical characteristics of the amorphous InGaZnO thin film transistors.

    Science.gov (United States)

    Huang, Yu-Chih; Yang, Po-Yu; Huang, Hau-Yuan; Wang, Shui-Jinn; Cheng, Huang-Chung

    2012-07-01

    The influence of the thermal annealing on the amorphous indium gallium zinc oxide (a-IGZO) thin-film transistors (TFTs) under different ambient gases has been systematically addressed. The chemical bonding states and transfer characteristics of a-IGZO TFTs show evident dependence on the annealing ambient gas. For the a-IGZO TFTs in the oxygen ambient annealing at 250 degrees C for 30 mins exhibited a maximum field effect mobility (max muFE) of 9.36 cm2/V x s, on/off current ratio of 6.12 x 10(10), and a subthreshold slope (SS) of 0.21 V/decade. Respectively, the as-deposited ones without annealing possess a max muFE of 6.61 cm2/V x s, on/off current ratio of 4.58 x 10(8), and a SS of 0.46 V/decade. In contrast, the a-IGZO TFTs annealed at 250 degrees C for 30 mins in the nitrogen ambient would be degraded to have a max muFE of 0.18 cm2/V x s, on/off current ratio of 2.22 x 10(4), and a SS of 7.37 V/decade, corresponding. It is attributed to the content of the oxygen vacancies, according the x-ray photoelectron spectroscopy (XPS) analyze of the three different samples.

  7. Influence of gate dielectric on the ambipolar characteristics of solution-processed organic field-effect transistors

    Energy Technology Data Exchange (ETDEWEB)

    Ribierre, J C; Ghosh, S; Takaishi, K; Muto, T; Aoyama, T, E-mail: jcribierre@ewha.ac.kr, E-mail: taoyama@riken.jp [Advanced Science Institute, RIKEN, 2-1 Hirosawa, Wako, Saitama 351-0198 (Japan)

    2011-05-25

    Solution-processed ambipolar organic field-effect transistors based on dicyanomethylene-substituted quinoidal quaterthiophene derivative [QQT(CN)4] are fabricated using various gate dielectric materials including cross-linked polyimide and poly-4-vinylphenol. Devices with spin-coated polymeric gate dielectric layers show a reduced hysteresis in their transfer characteristics. Among the insulating polymers examined in this study, a new fluorinated polymer with a low dielectric constant of 2.8 significantly improves both hole and electron field-effect mobilities of QQT(CN)4 thin films to values as high as 0.04 and 0.002 cm{sup 2} V{sup -1} s{sup -1}. These values are close to the best mobilities obtained in QQT(CN)4 devices fabricated on SiO{sub 2} treated with octadecyltrichlorosilane. The influence of the metal used for source/drain metal electrodes on the device performance is also investigated. Whereas best device performances are achieved with gold electrodes, more balanced electron and hole field-effect mobilities could be obtained using chromium.

  8. Investigation on the electrical characteristics of a pentacene thin-film transistor and its reliability under positive drain bias stress

    International Nuclear Information System (INIS)

    Fan, Ching-Lin; Chiu, Ping-Cheng; Lin, Yu-Zuo; Yang, Tsung-Hsien; Chiang, Chin-Yuan

    2011-01-01

    This study systematically investigates the effects of pentacene deposition rates and channel lengths on the electrical characteristics of pentacene-based organic thin-film transistors (OTFTs), and the performance degradation of OTFTs under the positive drain bias stress. With a slower deposition rate of the pentacene channel layer, the larger grain size is formed, and it improves the performance of pentacene-based OTFTs. As the channel length decreases, the threshold voltage (V TH ) shifts toward the positive direction and the field-effect mobility (µ FE ) decreases, which are due to the drain-induced barrier lowering effect and the lower mobility in the active channel near the region of source/drain electrodes, respectively. In addition, we also propose a mechanism to present the channel length dependence on the field-effect mobility. Results also show that the pentacene-based OTFTs, which are under positive drain bias stress, exhibit greater performance degradation than those under negative drain bias stress. The greater performance degradation, the decreasing I ON and the larger V TH shift are due to the greater trap state density (N trap ) created in the bulk channel by the large lateral electrical field and the carriers injected into the gate insulator by the large vertical electrical field, respectively

  9. Morphological Influence of Solution-Processed Zinc Oxide Films on Electrical Characteristics of Thin-Film Transistors

    Directory of Open Access Journals (Sweden)

    Hyeonju Lee

    2016-10-01

    Full Text Available We report on the morphological influence of solution-processed zinc oxide (ZnO semiconductor films on the electrical characteristics of ZnO thin-film transistors (TFTs. Different film morphologies were produced by controlling the spin-coating condition of a precursor solution, and the ZnO films were analyzed using atomic force microscopy, X-ray diffraction, X-ray photoemission spectroscopy, and Hall measurement. It is shown that ZnO TFTs have a superior performance in terms of the threshold voltage and field-effect mobility, when ZnO crystallites are more densely packed in the film. This is attributed to lower electrical resistivity and higher Hall mobility in a densely packed ZnO film. In the results of consecutive TFT operations, a positive shift in the threshold voltage occurred irrespective of the film morphology, but the morphological influence on the variation in the field-effect mobility was evident. The field-effect mobility in TFTs having a densely packed ZnO film increased continuously during consecutive TFT operations, which is in contrast to the mobility decrease observed in the less packed case. An analysis of the field-effect conductivities ascribes these results to the difference in energetic traps, which originate from structural defects in the ZnO films. Consequently, the morphological influence of solution-processed ZnO films on the TFT performance can be understood through the packing property of ZnO crystallites.

  10. Anomalous output characteristic shift for the n-type lateral diffused metal-oxide-semiconductor transistor with floating P-top layer

    International Nuclear Information System (INIS)

    Liu, Siyang; Zhang, Chunwei; Sun, Weifeng; Su, Wei; Wang, Shaorong; Ma, Shulang; Huang, Yu

    2014-01-01

    Anomalous output characteristic shift of the n-type lateral diffused metal-oxide-semiconductor transistor with floating P-top layer is investigated. It shows that the linear drain current has obvious decrease when the output characteristic of fresh device is measured for two consecutive times. The charge pumping experiments demonstrate that the decrease is not from hot-carrier degradation. The reduction of cross section area for the current flowing, which results from the squeezing of the depletion region surrounding the P-top layer, is responsible for the shift. Consequently, the current capability of this special device should be evaluated by the second measured output characteristic

  11. Anomalous output characteristic shift for the n-type lateral diffused metal-oxide-semiconductor transistor with floating P-top layer

    Energy Technology Data Exchange (ETDEWEB)

    Liu, Siyang; Zhang, Chunwei; Sun, Weifeng, E-mail: swffrog@seu.edu.cn [National ASIC System Engineering Research Center, Southeast University, Nanjing 210096 (China); Su, Wei; Wang, Shaorong; Ma, Shulang; Huang, Yu [CSMC Technologies Corporation, Wuxi 214061 (China)

    2014-04-14

    Anomalous output characteristic shift of the n-type lateral diffused metal-oxide-semiconductor transistor with floating P-top layer is investigated. It shows that the linear drain current has obvious decrease when the output characteristic of fresh device is measured for two consecutive times. The charge pumping experiments demonstrate that the decrease is not from hot-carrier degradation. The reduction of cross section area for the current flowing, which results from the squeezing of the depletion region surrounding the P-top layer, is responsible for the shift. Consequently, the current capability of this special device should be evaluated by the second measured output characteristic.

  12. Effect of high-energy electron beam irradiation on the device characteristics of IGZO-based transparent thin film transistors

    International Nuclear Information System (INIS)

    Moon, Hye Ji; Oh, Hye Ran; Bae, Byung Seong; Yun, Eui Jung; Ryu, Min Ki; Cho, Kyoung Ik

    2012-01-01

    In this study, we investigated the effects of high-energy electron beam irradiation (HEEBI) on the device properties of indium-gallium-zinc-oxide (IGZO)-based transparent thin film transistors (TTFTs). The developed TTFTs had a top gate structure, which used IGZO and Al 2 O 3 films for the active layer and the gate dielectric, respectively. The developed TTFTs were treated with HEEBI in air at RT at an electron beam energy of 0.8 MeV and a dose of 1 x 10 14 electrons/cm 2 . Without the HEEBI treatment, the devices operated in depletion mode with a threshold voltage (V th ) of -11.25 V, a field-effect mobility (μ FE ) of 8.71 cm 2 /Vs, an on-off ratio (I on/off ) of 1.3 x 10 8 and a sub-threshold slope (SS) of 0.3 V/decade. A huge positive-shifted V th of -1 V, a very high μ FE of 420 cm 2 /Vs, a high I on/off of 6.1 x 10 8 , and a lower SS of 0.25 V/decade were achieved for the HEEBI-treated devices, suggesting that the device characteristics of the developed TTFTs were significantly improved by the HEEBI treatment. The best device characteristics, which include I on/off of 8.1 x 10 8 , SS of 0.25 V/decade, V th of +1 V, μ FE of 8.8 cm 2 /Vs, and operation in the enhancement mode without aging, were obtained for the samples that had been annealed after HEEBI treatment. On the basis of the experimental results, we believe that HEEBI treatment can be crucial to develop IGZO-based TFTs with high performance and long-term reliability.

  13. High-temperature performance of MoS{sub 2} thin-film transistors: Direct current and pulse current-voltage characteristics

    Energy Technology Data Exchange (ETDEWEB)

    Jiang, C.; Samnakay, R.; Balandin, A. A., E-mail: balandin@ee.ucr.edu [Nano-Device Laboratory (NDL), Department of Electrical Engineering, Bourns College of Engineering, University of California—Riverside, Riverside, California 92521 (United States); Phonon Optimized Engineered Materials (POEM) Center, Materials Science and Engineering Program, University of California—Riverside, Riverside, California 92521 (United States); Rumyantsev, S. L. [Department of Electrical, Computer, and Systems Engineering, Center for Integrated Electronics, Rensselaer Polytechnic Institute, Troy, New York 12180 (United States); Ioffe Physical-Technical Institute, St. Petersburg 194021 (Russian Federation); Shur, M. S. [Department of Electrical, Computer, and Systems Engineering, Center for Integrated Electronics, Rensselaer Polytechnic Institute, Troy, New York 12180 (United States)

    2015-02-14

    We report on fabrication of MoS{sub 2} thin-film transistors (TFTs) and experimental investigations of their high-temperature current-voltage characteristics. The measurements show that MoS{sub 2} devices remain functional to temperatures of at least as high as 500 K. The temperature increase results in decreased threshold voltage and mobility. The comparison of the direct current (DC) and pulse measurements shows that the direct current sub-linear and super-linear output characteristics of MoS{sub 2} thin-films devices result from the Joule heating and the interplay of the threshold voltage and mobility temperature dependences. At temperatures above 450 K, a kink in the drain current occurs at zero gate voltage irrespective of the threshold voltage value. This intriguing phenomenon, referred to as a “memory step,” was attributed to the slow relaxation processes in thin films similar to those in graphene and electron glasses. The fabricated MoS{sub 2} thin-film transistors demonstrated stable operation after two months of aging. The obtained results suggest new applications for MoS{sub 2} thin-film transistors in extreme-temperature electronics and sensors.

  14. Failure mechanisms and electromechanical coupling in semiconducting nanowires

    Directory of Open Access Journals (Sweden)

    Peng B.

    2010-06-01

    Full Text Available One dimensional nanostructures, like nanowires and nanotubes, are increasingly being researched for the development of next generation devices like logic gates, transistors, and solar cells. In particular, semiconducting nanowires with a nonsymmetric wurtzitic crystal structure, such as zinc oxide (ZnO and gallium nitride (GaN, have drawn immense research interests due to their electromechanical coupling. The designing of the future nanowire-based devices requires component-level characterization of individual nanowires. In this paper, we present a unique experimental set-up to characterize the mechanical and electromechanical behaviour of individual nanowires. Using this set-up and complementary atomistic simulations, mechanical properties of ZnO nanowires and electromechanical properties of GaN nanowires were investigated. In ZnO nanowires, elastic modulus was found to depend on nanowire diameter decreasing from 190 GPa to 140 GPa as the wire diameter increased from 5 nm to 80 nm. Inconsistent failure mechanisms were observed in ZnO nanowires. Experiments revealed a brittle fracture, whereas simulations using a pairwise potential predicted a phase transformation prior to failure. This inconsistency is addressed in detail from an experimental as well as computational perspective. Lastly, in addition to mechanical properties, preliminary results on the electromechanical properties of gallium nitride nanowires are also reported. Initial investigations reveal that the piezoresistive and piezoelectric behaviour of nanowires is different from bulk gallium nitride.

  15. High-performance silicon nanowire bipolar phototransistors

    Science.gov (United States)

    Tan, Siew Li; Zhao, Xingyan; Chen, Kaixiang; Crozier, Kenneth B.; Dan, Yaping

    2016-07-01

    Silicon nanowires (SiNWs) have emerged as sensitive absorbing materials for photodetection at wavelengths ranging from ultraviolet (UV) to the near infrared. Most of the reports on SiNW photodetectors are based on photoconductor, photodiode, or field-effect transistor device structures. These SiNW devices each have their own advantages and trade-offs in optical gain, response time, operating voltage, and dark current noise. Here, we report on the experimental realization of single SiNW bipolar phototransistors on silicon-on-insulator substrates. Our SiNW devices are based on bipolar transistor structures with an optically injected base region and are fabricated using CMOS-compatible processes. The experimentally measured optoelectronic characteristics of the SiNW phototransistors are in good agreement with simulation results. The SiNW phototransistors exhibit significantly enhanced response to UV and visible light, compared with typical Si p-i-n photodiodes. The near infrared responsivities of the SiNW phototransistors are comparable to those of Si avalanche photodiodes but are achieved at much lower operating voltages. Compared with other reported SiNW photodetectors as well as conventional bulk Si photodiodes and phototransistors, the SiNW phototransistors in this work demonstrate the combined advantages of high gain, high photoresponse, low dark current, and low operating voltage.

  16. Variability study of Si nanowire FETs with different junction gradients

    Directory of Open Access Journals (Sweden)

    Jun-Sik Yoon

    2016-01-01

    Full Text Available Random dopant fluctuation effects of gate-all-around Si nanowire field-effect transistors (FETs are investigated in terms of different diameters and junction gradients. The nanowire FETs with smaller diameters or shorter junction gradients increase relative variations of the drain currents and the mismatch of the drain currents between source-drain and drain-source bias change in the saturation regime. Smaller diameters decreased current drivability critically compared to standard deviations of the drain currents, thus inducing greater relative variations of the drain currents. Shorter junction gradients form high potential barriers in the source-side lightly-doped extension regions at on-state, which determines the magnitude of the drain currents and fluctuates the drain currents greatly under thermionic-emission mechanism. On the other hand, longer junction gradients affect lateral field to fluctuate the drain currents greatly. These physical phenomena coincide with correlations of the variations between drain currents and electrical parameters such as threshold voltages and parasitic resistances. The nanowire FETs with relatively-larger diameters and longer junction gradients without degrading short channel characteristics are suggested to minimize the relative variations and the mismatch of the drain currents.

  17. Improvement of transistor characteristics and stability for solution-processed ultra-thin high-valence niobium doped zinc-tin oxide thin film transistors

    Energy Technology Data Exchange (ETDEWEB)

    Jeng, Jiann-Shing, E-mail: jsjeng@mail.nutn.edu.tw

    2016-08-15

    Nb-doped Zinc tin oxide (NZTO) channel materials have been prepared by solution process in combination with the spin-coating method. All NZTO thin film transistors (TFTs) are n-type enhancement-mode devices, either without or with Nb additives. High-valence niobium ion (ionic charge = +5) has a larger ionic potential and similar ionic radius to Zn{sup 2+} and Sn{sup 4+} ions. As compared with the pure ZTO device, introducing Nb{sup 5+} ions into the ZTO channel layers can improve the electrical properties and bias stability of TFTs because of the reduction of the oxygen vacancies. This study discusses the connection among the material properties of the NZTO films and the electrical performance and bias stability of NZTO TFTs and how they are influenced by the Nb/(Nb + Sn) molar ratios of NZTO films. - Highlights: • Ultra-thin high-valence niobium doped zinc-tin oxide (NZTO) thin films are prepared using a solution process. • Nb dopants in ZTO films reduce the oxygen vacancy and subgap adsorption of the ZTO films. • The Nb-doping concentration of the NZTO channel layer has a strong influence on the TFT performance.

  18. Characteristics of a single-channel superconducting flux flow transistor fabricated by an AFM modification technique

    Energy Technology Data Exchange (ETDEWEB)

    Ko, Seokcheol [Jeonnam Regional Innovation Agency, 1000 Namak-Ri, Samhyang-Myun, Muan-Gun, Jeollanam-Do 534-700 (Korea, Republic of)], E-mail: suntrac@jina.re.kr; Kim, Seong-Jong [Mokpo Maritime University, Chukkyo-Dong, Mokpo City, Cheonnam 530-729 (Korea, Republic of)

    2007-11-01

    The demand for high performance, integrity, and miniaturization in the area of electronic and mechanic devices has drawn interest in the fabrication of nanostructures. However, it is difficult to fabricate the channel with nano-scale using a conventional photography techniques. AFM anodization technique is a maskless process and effective method to overcome the difficulty in fabricating a nano-scale channel. In this paper, we first present a new fabrication of a single-channel SFFT using a selective oxidation process induced by an AFM probe. The modified channel was investigated by electron probe microanalyzer (EPMA) to find the compositional variation of the transformed region. In order to confirm the operation of a single-channel SFFT, we measured the voltage-current characteristics at the temperature of liquid nitrogen by an I-V automatic measurement system. Our results indicate that the single-channel SFFT having effect as a weak link is effectively fabricated by an AFM lithography process.

  19. Characteristics of a single-channel superconducting flux flow transistor fabricated by an AFM modification technique

    International Nuclear Information System (INIS)

    Ko, Seokcheol; Kim, Seong-Jong

    2007-01-01

    The demand for high performance, integrity, and miniaturization in the area of electronic and mechanic devices has drawn interest in the fabrication of nanostructures. However, it is difficult to fabricate the channel with nano-scale using a conventional photography techniques. AFM anodization technique is a maskless process and effective method to overcome the difficulty in fabricating a nano-scale channel. In this paper, we first present a new fabrication of a single-channel SFFT using a selective oxidation process induced by an AFM probe. The modified channel was investigated by electron probe microanalyzer (EPMA) to find the compositional variation of the transformed region. In order to confirm the operation of a single-channel SFFT, we measured the voltage-current characteristics at the temperature of liquid nitrogen by an I-V automatic measurement system. Our results indicate that the single-channel SFFT having effect as a weak link is effectively fabricated by an AFM lithography process

  20. Improvement in electrical characteristics of eco-friendly indium zinc oxide thin-film transistors by photocatalytic reaction.

    Science.gov (United States)

    Kang, Jun Ki; Park, Sung Pyo; Na, Jae Won; Lee, Jin Hyeok; Kim, Dongwoo; Kim, Hyun Jae

    2018-05-11

    Eco-friendly solution-processed oxide thin-film transistors (TFTs) were fabricated through photocatalytic reaction of titanium dioxide (PRT). The titanium dioxide (TiO 2 ) surface reacts with H 2 O under ultraviolet (UV) light irradiation and generates hydroxyl radicals (OH∙). These hydroxyl radicals accelerate the decomposition of large organic compounds such as 2-methoxyethanol (2ME; one of the representative solvents for solution-processed metal oxides), creating smaller organic molecular structures compared with 2ME. The decomposed small organic materials have low molar masses and low boiling points, which help improving electrical properties via diminishing defect sites in oxide channel layers and fabricating low temperature solution-processed oxide TFTs. As a result, the field-effect mobility improved from 4.29 to 10.24 cm 2 /V·s for IGZO TFTs and from 2.78 to 7.82 cm 2 /V·s for IZO TFTs, and the V th shift caused by positive bias stress (PBS) and negative bias illumination stress (NBIS) over 1,000 s under 5,700 lux decreased from 6.2 to 2.9 V and from 15.3 to 2.8 V, respectively. In theory, TiO 2 has a permanent photocatalytic reaction; as such, hydroxyl radicals are generated continuously under UV irradiation, improving the electrical characteristics of solution-processed IZO TFTs even after four iterations of TiO 2 recycling in this study. Thus, the PRT method provides an eco-friendly approach for high-performance solution-processed oxide TFTs.

  1. Effect of nanocomposite gate-dielectric properties on pentacene microstructure and field-effect transistor characteristics.

    Science.gov (United States)

    Lee, Wen-Hsi; Wang, Chun-Chieh

    2010-02-01

    In this study, the effect of surface energy and roughness of the nanocomposite gate dielectric on pentacene morphology and electrical properties of pentacene OTFT are reported. Nanoparticles TiO2 were added in the polyimide matrix to form a nanocomposite which has a significantly different surface characteristic from polyimide, leading to a discrepancy in the structural properties of pentacene growth. A growth mode of pentacene deposited on the nanocomposite is proposed to explain successfully the effect of surface properties of nanocomposite gate dielectric such as surface energy and roughness on the pentacene morphology and electrical properties of OTFT. To obtain the lower surface energy and smoother surface of nanocomposite gate dielectric that is responsible for the desired crystalline, microstructure of pentacene and electrical properties of device, a bottom contact OTFT-pentacene deposited on the double-layer nanocomposite gate dielectric consisting of top smoothing layer of the neat polyimide and bottom layer of (PI+ nano-TiO2 particles) nanocomposite has been successfully demonstrated to exhibit very promising performance including high current on to off ratio of about 6 x 10(5), threshold voltage of -10 V and moderately high filed mobility of 0.15 cm2V(-1)s(-1).

  2. Superconducting transistor

    International Nuclear Information System (INIS)

    Gray, K.E.

    1978-01-01

    A three film superconducting tunneling device, analogous to a semiconductor transistor, is presented, including a theoretical description and experimental results showing a current gain of four. Much larger current gains are shown to be feasible. Such a development is particularly interesting because of its novelty and the striking analogies with the semiconductor junction transistor

  3. Organic Nanowires

    DEFF Research Database (Denmark)

    Balzer, Frank; Schiek, Manuela; Al-Shamery, Katharina

    Single crystalline nanowires from fluorescing organic molecules like para-phenylenes or thiophenes are supposed to become key elements in future integrated optoelectronic devices [1]. For a sophisticated design of devices based on nanowires the basic principles of the nanowire formation have...... atomic force microscopy and from polarized far-field optical microscopy for various prototypical molecules are reproduced by electrostatic and Monte Carlo calculations. Based on the crystal structure, predictions on the growth habit from other conjugated molecules become in reach....

  4. Dimensional optimization of nanowire--complementary metal oxide--semiconductor inverter.

    Science.gov (United States)

    Hashim, Yasir; Sidek, Othman

    2013-01-01

    This study is the first to demonstrate dimensional optimization of nanowire-complementary metal-oxide-semiconductor inverter. Noise margins and inflection voltage of transfer characteristics are used as limiting factors in this optimization. Results indicate that optimization depends on both dimensions ratio and digital voltage level (Vdd). Diameter optimization reveals that when Vdd increases, the optimized value of (Dp/Dn) decreases. Channel length optimization results show that when Vdd increases, the optimized value of Ln decreases and that of (Lp/Ln) increases. Dimension ratio optimization reveals that when Vdd increases, the optimized value of Kp/Kn decreases, and silicon nanowire transistor with suitable dimensions (higher Dp and Ln with lower Lp and Dn) can be fabricated.

  5. Angular Magnetoresistance of Nanowires with Alternating Cobalt and Nickel Segments

    KAUST Repository

    Mohammed, Hanan

    2017-06-22

    Magnetization reversal in segmented Co/Ni nanowires with varying number of segments was studied using angular Magnetoresistance (MR) measurements on isolated nanowires. The MR measurements offer an insight into the pinning of domain walls within the nanowires. Angular MR measurements were performed on nanowires with two and multiple segments by varying the angle between the applied magnetic field and nanowire (−90° ≤θ≤90°). The angular MR measurements reveal that at lower values of θ the switching fields are nearly identical for the multisegmented and two-segmented nanowires, whereas at higher values of θ, a decrease in the switching field is observed in the case of two segmented nanowires. The two segmented nanowires generally exhibit a single domain wall pinning event, whereas an increased number of pinning events are characteristic of the multisegmented nanowires at higher values of θ. In-situ magnetic force microscopy substantiates reversal by domain wall nucleation and propagation in multisegmented nanowires.

  6. Angular Magnetoresistance of Nanowires with Alternating Cobalt and Nickel Segments

    KAUST Repository

    Mohammed, Hanan; Corte-Leon, H.; Ivanov, Yurii P.; Moreno, J. A.; Kazakova, O.; Kosel, Jü rgen

    2017-01-01

    Magnetization reversal in segmented Co/Ni nanowires with varying number of segments was studied using angular Magnetoresistance (MR) measurements on isolated nanowires. The MR measurements offer an insight into the pinning of domain walls within the nanowires. Angular MR measurements were performed on nanowires with two and multiple segments by varying the angle between the applied magnetic field and nanowire (−90° ≤θ≤90°). The angular MR measurements reveal that at lower values of θ the switching fields are nearly identical for the multisegmented and two-segmented nanowires, whereas at higher values of θ, a decrease in the switching field is observed in the case of two segmented nanowires. The two segmented nanowires generally exhibit a single domain wall pinning event, whereas an increased number of pinning events are characteristic of the multisegmented nanowires at higher values of θ. In-situ magnetic force microscopy substantiates reversal by domain wall nucleation and propagation in multisegmented nanowires.

  7. Synthesis of p-type GaN nanowires.

    Science.gov (United States)

    Kim, Sung Wook; Park, Youn Ho; Kim, Ilsoo; Park, Tae-Eon; Kwon, Byoung Wook; Choi, Won Kook; Choi, Heon-Jin

    2013-09-21

    GaN has been utilized in optoelectronics for two decades. However, p-type doping still remains crucial for realization of high performance GaN optoelectronics. Though Mg has been used as a p-dopant, its efficiency is low due to the formation of Mg-H complexes and/or structural defects in the course of doping. As a potential alternative p-type dopant, Cu has been recognized as an acceptor impurity for GaN. Herein, we report the fabrication of Cu-doped GaN nanowires (Cu:GaN NWs) and their p-type characteristics. The NWs were grown vertically via a vapor-liquid-solid (VLS) mechanism using a Au/Ni catalyst. Electrical characterization using a nanowire-field effect transistor (NW-FET) showed that the NWs exhibited n-type characteristics. However, with further annealing, the NWs showed p-type characteristics. A homo-junction structure (consisting of annealed Cu:GaN NW/n-type GaN thin film) exhibited p-n junction characteristics. A hybrid organic light emitting diode (OLED) employing the annealed Cu:GaN NWs as a hole injection layer (HIL) also demonstrated current injected luminescence. These results suggest that Cu can be used as a p-type dopant for GaN NWs.

  8. Synthesis and properties of silicon nanowire devices

    Science.gov (United States)

    Byon, Kumhyo

    Silicon nanowire (SiNW) is a very attractive one-dimensional material for future nanoelectronic applications. Reliable control of key field effect transistor (FET) parameters such as conductance, mobility, threshold voltage and on/off ratio is crucial to the applications of SiNW to working logic devices and integrated circuits. In this thesis, we fabricated silicon nanowire field effect transistors (SiNW FETs) and studied the dependence of their electrical transport properties upon various parameters including SiNW growth conditions, post-growth doping, and contact annealing. From these studies, we found how different processes control important FET characteristics. Key accomplishments of this thesis include p-channel enhancement mode FETs, n-channel FETs by post-growth vapor doping and high performance ambipolar devices. In the first part of this work, single crystalline SiNWs were synthesized by thermal evaporation without gold catalysts. FETs were fabricated using both as-grown SiNWs and post-growth n-doped SiNWs. FET from p-type source materials behaves as a p-channel enhancement mode FET which is predominant in logic devices due to its fast operation and low power consumption. Using bismuth vapor, the as-grown SiNWs were doped into n-type materials. The majority carriers in SiNWs can therefore be controlled by proper choice of the vapor phase dopant species. Post-growth doping using vapor phase is applicable to other nanowire systems. In the second part, high performance ambipolar FETs were fabricated. A two step annealing process was used to control the Schottky barrier between SiNW and metal contacts in order to enhance device performance. Initial p-channel SiNW FETs were converted into ambipolar SiNW FETs after contact annealing. Furthermore, significant increases in both on/off ratio and channel mobilities were achieved after contact annealing. Promising device structures to implement ambipolar devices into large scale integrated circuits were proposed

  9. Near-thermal limit gating in heavily doped III-V semiconductor nanowires using polymer electrolytes

    Science.gov (United States)

    Ullah, A. R.; Carrad, D. J.; Krogstrup, P.; Nygârd, J.; Micolich, A. P.

    2018-02-01

    Doping is a common route to reducing nanowire transistor on-resistance but it has limits. A high doping level gives significant loss in gate performance and ultimately complete gate failure. We show that electrolyte gating remains effective even when the Be doping in our GaAs nanowires is so high that traditional metal-oxide gates fail. In this regime we obtain a combination of subthreshold swing and contact resistance that surpasses the best existing p -type nanowire metal-oxide semiconductor field-effect transistors (MOSFETs). Our subthreshold swing of 75 mV/dec is within 25 % of the room-temperature thermal limit and comparable with n -InP and n -GaAs nanowire MOSFETs. Our results open a new path to extending the performance and application of nanowire transistors, and motivate further work on improved solid electrolytes for nanoscale device applications.

  10. EDITORIAL: Reigniting innovation in the transistor Reigniting innovation in the transistor

    Science.gov (United States)

    Demming, Anna

    2012-09-01

    Today the transistor is integral to the electronic circuitry that wires our lives. When Bardeen and Brattain first observed an amplified signal by connecting electrodes to a germanium crystal they saw that their 'semiconductor triode' could prove a useful alternative to the more cumbersome vacuum tubes used at the time [1]. But it was perhaps William Schottky who recognized the extent of the transistor's potential. A basic transistor has three or more terminals and current across one pair of terminals can switch or amplify current through another pair. Bardeen, Brattain and Schottky were jointly awarded a Nobel Prize in 1956 'for their researches on semiconductors and their discovery of the transistor effect' [2]. Since then many new forms of the transistor have been developed and understanding of the underlying properties is constantly advancing. In this issue Chen and Shih and colleagues at Taiwan National University and Drexel University report a pyroelectrics transistor. They show how a novel optothermal gating mechanism can modulate the current, allowing a range of developments in nanoscale optoelectronics and wireless devices [3]. The explosion of interest in nanoscale devices in the 1990s inspired electronics researchers to look for new systems that can act as transistors, such as carbon nanotube [4] and silicon nanowire [5] transistors. Generally these transistors function by raising and lowering an energy barrier of kBT -1, but researchers in the US and Canada have demonstrated that the quantum interference between two electronic pathways through aromatic molecules can also modulate the current flow [6]. The device has advantages for further miniaturization where energy dissipation in conventional systems may eventually cause complications. Interest in transistor technology has also led to advances in fabrication techniques for achieving high production quantities, such as printing [7]. Researchers in Florida in the US demonstrated field effect transistor

  11. Recent progress in photoactive organic field-effect transistors.

    Science.gov (United States)

    Wakayama, Yutaka; Hayakawa, Ryoma; Seo, Hoon-Seok

    2014-04-01

    Recent progress in photoactive organic field-effect transistors (OFETs) is reviewed. Photoactive OFETs are divided into light-emitting (LE) and light-receiving (LR) OFETs. In the first part, LE-OFETs are reviewed from the viewpoint of the evolution of device structures. Device performances have improved in the last decade with the evolution of device structures from single-layer unipolar to multi-layer ambipolar transistors. In the second part, various kinds of LR-OFETs are featured. These are categorized according to their functionalities: phototransistors, non-volatile optical memories, and photochromism-based transistors. For both, various device configurations are introduced: thin-film based transistors for practical applications, single-crystalline transistors to investigate fundamental physics, nanowires, multi-layers, and vertical transistors based on new concepts.

  12. Recent progress in photoactive organic field-effect transistors

    International Nuclear Information System (INIS)

    Wakayama, Yutaka; Hayakawa, Ryoma; Seo, Hoon-Seok

    2014-01-01

    Recent progress in photoactive organic field-effect transistors (OFETs) is reviewed. Photoactive OFETs are divided into light-emitting (LE) and light-receiving (LR) OFETs. In the first part, LE-OFETs are reviewed from the viewpoint of the evolution of device structures. Device performances have improved in the last decade with the evolution of device structures from single-layer unipolar to multi-layer ambipolar transistors. In the second part, various kinds of LR-OFETs are featured. These are categorized according to their functionalities: phototransistors, non-volatile optical memories, and photochromism-based transistors. For both, various device configurations are introduced: thin-film based transistors for practical applications, single-crystalline transistors to investigate fundamental physics, nanowires, multi-layers, and vertical transistors based on new concepts. (review)

  13. Electrical characteristics of GdTiO{sub 3} gate dielectric for amorphous InGaZnO thin-film transistors

    Energy Technology Data Exchange (ETDEWEB)

    Her, Jim-Long [Division of Natural Science, Center for General Education, Chang Gung University, Taoyuan 333, Taiwan (China); Pan, Tung-Ming, E-mail: tmpan@mail.cgu.edu.tw [Department of Electronics Engineering, Chang Gung University, Taoyuan 333, Taiwan (China); Liu, Jiang-Hung; Wang, Hong-Jun; Chen, Ching-Hung [Department of Electronics Engineering, Chang Gung University, Taoyuan 333, Taiwan (China); Koyama, Keiichi [Graduate School of Science and Engineering, Kagoshima University, Kagoshima 890-0065 (Japan)

    2014-10-31

    In this article, we studied the structural properties and electrical characteristics of GdTiO{sub 3} gate dielectric for amorphous indium–gallium–zinc oxide (a-IGZO) thin-film transistor (TFT) applications. The a-IGZO TFT device featuring the GdTiO{sub 3} gate dielectric exhibited better electrical characteristics, including a small threshold voltage of 0.14 V, a large field-effect mobility of 32.3 cm{sup 2}/V-s, a high I{sub on}/I{sub off} current ratio of 4.2 × 10{sup 8}, and a low subthreshold swing of 213 mV/decade. Furthermore, the electrical instability of GdTiO{sub 3} a-IGZO TFTs was investigated under both positive gate-bias stress (PGBS) and negative gate-bias stress (NGBS) conditions. The electron charge trapping in the gate dielectric dominates the PGBS degradation, while the oxygen vacancies control the NGBS degradation. - Highlights: • Indium–gallium–zinc oxide (a-IGZO) thin-film transistor (TFT) • Structural and electrical properties of the GdTiO{sub 3} film were studied. • a-IGZO TFT featuring GdTi{sub x}O{sub y} dielectric exhibited better electrical characteristics. • TFT instability investigated under positive and negative gate-bias stress conditions.

  14. Structural and electrical characteristics of high-κ ErTixOy gate dielectrics on InGaZnO thin-film transistors

    International Nuclear Information System (INIS)

    Chen, Fa-Hsyang; Her, Jim-Long; Shao, Yu-Hsuan; Li, Wei-Chen; Matsuda, Yasuhiro H.; Pan, Tung-Ming

    2013-01-01

    In this paper, we investigated the structural properties and electrical characteristics of high-κ ErTi x O y gate dielectrics on indium-gallium-zinc oxide thin-film transistors (IGZO TFTs). We used X-ray diffraction, X-ray photoelectron spectroscopy, and atomic force microscopy to investigate the structural and morphological features of these dielectric films after they had been subjected to annealing at various temperatures. The high-κ ErTi x O y IGZO TFT device annealed at 400 °C exhibited better electrical characteristics in terms of a large field-effect mobility (8.24 cm 2 /V-s), low threshold voltage (0.36 V), small subthreshold swing (130 mV/dec), and high I on/off ratio(3.73 × 10 6 ). These results are attributed to the reduction of the trap states and oxygen vacancies between the ErTi x O y film and IGZO active layer interface during high-temperature annealing in oxygen ambient. The reliability of voltage stress also can be improved by the oxygen annealing at 400 °C. - Highlights: • ErTi x O y InGaZnO thin-film transistors (TFT). • Structural and electrical properties of the TFT were investigated. • TFT device annealed at 400 °C exhibited better electrical characteristics. • Reliability of TFT device can be improved by annealing at 400 °C

  15. Investigations on the effects of electrode materials on the device characteristics of ferroelectric memory thin film transistors fabricated on flexible substrates

    Science.gov (United States)

    Yang, Ji-Hee; Yun, Da-Jeong; Seo, Gi-Ho; Kim, Seong-Min; Yoon, Myung-Han; Yoon, Sung-Min

    2018-03-01

    For flexible memory device applications, we propose memory thin-film transistors using an organic ferroelectric poly(vinylidene fluoride-trifluoroethylene) [P(VDF-TrFE)] gate insulator and an amorphous In-Ga-Zn-O (a-IGZO) active channel. The effects of electrode materials and their deposition methods on the characteristics of memory devices exploiting the ferroelectric field effect were investigated for the proposed ferroelectric memory thin-film transistors (Fe-MTFTs) at flat and bending states. It was found that the plasma-induced sputtering deposition and mechanical brittleness of the indium-tin oxide (ITO) markedly degraded the ferroelectric-field-effect-driven memory window and bending characteristics of the Fe-MTFTs. The replacement of ITO electrodes with metal aluminum (Al) electrodes prepared by plasma-free thermal evaporation greatly enhanced the memory device characteristics even under bending conditions owing to their mechanical ductility. Furthermore, poly(3,4-ethylenedioxythiophene)-poly(styrene sulfonate) (PEDOT:PSS) was introduced to achieve robust bending performance under extreme mechanical stress. The Fe-MTFTs using PEDOT:PSS source/drain electrodes were successfully fabricated and showed the potential for use as flexible memory devices. The suitable choice of electrode materials employed for the Fe-MTFTs is concluded to be one of the most important control parameters for highly functional flexible Fe-MTFTs.

  16. Group IV nanotube transistors for next generation ubiquitous computing

    KAUST Repository

    Fahad, Hossain M.

    2014-06-04

    Evolution in transistor technology from increasingly large power consuming single gate planar devices to energy efficient multiple gate non-planar ultra-narrow (< 20 nm) fins has enhanced the scaling trend to facilitate doubling performance. However, this performance gain happens at the expense of arraying multiple devices (fins) per operation bit, due to their ultra-narrow dimensions (width) originated limited number of charges to induce appreciable amount of drive current. Additionally arraying degrades device off-state leakage and increases short channel characteristics, resulting in reduced chip level energy-efficiency. In this paper, a novel nanotube device (NTFET) topology based on conventional group IV (Si, SiGe) channel materials is discussed. This device utilizes a core/shell dual gate strategy to capitalize on the volume-inversion properties of an ultra-thin (< 10 nm) group IV nanotube channel to minimize leakage and short channel effects while maximizing performance in an area-efficient manner. It is also shown that the NTFET is capable of providing a higher output drive performance per unit chip area than an array of gate-all-around nanowires, while maintaining the leakage and short channel characteristics similar to that of a single gate-all-around nanowire, the latter being the most superior in terms of electrostatic gate control. In the age of big data and the multitude of devices contributing to the internet of things, the NTFET offers a new transistor topology alternative with maximum benefits from performance-energy efficiency-functionality perspective. © (2014) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.

  17. Effect of the Channel Length on the Transport Characteristics of Transistors Based on Boron-Doped Graphene Ribbons

    Directory of Open Access Journals (Sweden)

    Paolo Marconcini

    2018-04-01

    Full Text Available Substitutional boron doping of devices based on graphene ribbons gives rise to a unipolar behavior, a mobility gap, and an increase of the I O N / I O F F ratio of the transistor. Here we study how this effect depends on the length of the doped channel. By means of self-consistent simulations based on a tight-binding description and a non-equilibrium Green’s function approach, we demonstrate a promising increase of the I O N / I O F F ratio with the length of the channel, as a consequence of the different transport regimes in the ON and OFF states. Therefore, the adoption of doped ribbons with longer aspect ratios could represent a significant step toward graphene-based transistors with an improved switching behavior.

  18. Transistor Effect in Improperly Connected Transistors.

    Science.gov (United States)

    Luzader, Stephen; Sanchez-Velasco, Eduardo

    1996-01-01

    Discusses the differences between the standard representation and a realistic representation of a transistor. Presents an experiment that helps clarify the explanation of the transistor effect and shows why transistors should be connected properly. (JRH)

  19. Effect of 50 MeV Li3+ ion irradiation on electrical characteristics of high speed NPN power transistor

    International Nuclear Information System (INIS)

    Dinesh, C.M.; Ramani; Radhakrishna, M.C.; Dutt, R.N.; Khan, S.A.; Kanjilal, D.

    2008-01-01

    Silicon NPN overlay RF power high speed commercial bipolar junction transistors (BJTs) find applications in military, space and communication equipments. Here we report the effect of 50 MeV Li 3+ ion irradiation in the fluence range 1 x 10 11 -1.8 x 10 12 ions cm -2 on NPN power transistor. The range (R), electronic energy loss (S e ), nuclear energy loss (S n ), total ionizing dose (TID) and total displacement damage (D d ) in the silicon target are calculated from TRIM Monte Carlo Code. Output resistance is 3.568 x 10 4 Ω for unirradiated device and it increases to 6 x 10 7 Ω as the fluence is increased from 1 x 10 11 to 1.8 x 10 12 ions cm -2 . The capacitance of the emitter-base junction of the transistor decreases and dielectric loss of the emitter-base junction increases with increase in ion fluence. The built in voltage of the unirradiated sample is 0.5 V and it shifts to 0.4 V after irradiation at fluence of 1.8 x 10 12 ions cm -2 and the corresponding doping density reduced to 5.758 x 10 16 cm -3 . The charge carrier removal rate varies linearly with the increase in ion fluence

  20. Charge pumping in InAs nanowires by surface acoustic waves

    NARCIS (Netherlands)

    Roddaro, Stefano; Strambini, Elia; Romeo, Lorenzo; Piazza, Vincenzo; Nilsson, Kristian; Samuelson, Lars; Beltram, Fabio

    2010-01-01

    We investigate the interaction between surface acoustic waves on a piezoelectric LiNbO3 substrate and charge carriers in InAs nanowire transistors. Interdigital transducers are used to excite electromechanical waves on the chip surface and their influence on the transport in the nanowire devices is

  1. Piezotronic Effect in Polarity-Controlled GaN Nanowires.

    Science.gov (United States)

    Zhao, Zhenfu; Pu, Xiong; Han, Changbao; Du, Chunhua; Li, Linxuan; Jiang, Chunyan; Hu, Weiguo; Wang, Zhong Lin

    2015-08-25

    Using high-quality and polarity-controlled GaN nanowires (NWs), we studied the piezotronic effect in crystal orientation defined wurtzite structures. By applying a normal compressive force on c-plane GaN NWs with an atomic force microscopy tip, the Schottky barrier between the Pt tip and GaN can be effectively tuned by the piezotronic effect. In contrast, the normal compressive force cannot change the electron transport characteristics in m-plane GaN NWs whose piezoelectric polarization axis is turned in the transverse direction. This observation provided solid evidence for clarifying the difference between the piezotronic effect and the piezoresistive effect. We further demonstrated a high sensitivity of the m-plane GaN piezotronic transistor to collect the transverse force. The integration of c-plane GaN and m-plane GaN indicates an overall response to an external force in any direction.

  2. On theory of single-molecule transistor

    International Nuclear Information System (INIS)

    Tran Tien Phuc

    2009-01-01

    The results of the study on single-molecule transistor are mainly investigated in this paper. The structure of constructed single-molecule transistor is similar to a conventional MOSFET. The conductive channel of the transistors is a single-molecule of halogenated benzene derivatives. The chemical simulation software CAChe was used to design and implement for the essential parameter of the molecules utilized as the conductive channel. The GUI of Matlab has been built to design its graphical interface, calculate and plot the output I-V characteristic curves for the transistor. The influence of temperature, length and width of the conductive channel, and gate voltage is considered. As a result, the simulated curves are similar to the traditional MOSFET's. The operating temperature range of the transistors is wider compared with silicon semiconductors. The supply voltage for transistors is only about 1 V. The size of transistors in this research is several nanometers.

  3. Charge transfer and partial pinning at the contacts as the origin of a double dip in the transfer characteristics of graphene-based field-effect transistors

    International Nuclear Information System (INIS)

    Di Bartolomeo, Antonio; Giubileo, Filippo; Santandrea, Salvatore; Romeo, Francesco; Citro, Roberta; Schroeder, Thomas; Lupina, Grzegorz

    2011-01-01

    We discuss the origin of an additional dip other than the charge neutrality point observed in the transfer characteristics of graphene-based field-effect transistors with a Si/SiO 2 substrate used as the back-gate. The double dip is proved to arise from charge transfer between the graphene and the metal electrodes, while charge storage at the graphene/SiO 2 interface can make it more evident. Considering a different Fermi energy from the neutrality point along the channel and partial charge pinning at the contacts, we propose a model which explains all the features observed in the gate voltage loops. We finally show that the double dip enhanced hysteresis in the transfer characteristics can be exploited to realize graphene-based memory devices.

  4. Field-effect transistors with high mobility and small hysteresis of transfer characteristics based on CH3NH3PbBr3 films

    Science.gov (United States)

    Aleshin, A. N.; Shcherbakov, I. P.; Trapeznikova, I. N.; Petrov, V. N.

    2017-12-01

    Field-effect transistor (FET) structures based on soluble organometallic perovskites, CH3NH3PbBr3, were obtained and their electrical properties were studied. FETs made of CH3NH3PbBr3 films possess current- voltage characteristics (IVs) typical for ambipolar FETs with saturation regime. The transfer characteristics of FETs based on CH3NH3PbBr3 have an insignificant hysteresis and slightly depend on voltage at the source-drain. Mobilities of charge carriers (holes) calculated from IVs of FETs based on CH3NH3PbBr3 at 300 K in saturation and weak field regimes were 5 and 2 cm2/V s, respectively, whereas electron mobility is 3 cm2/V s, which exceeds the mobility value 1 cm2/V s obtained earlier for FETs based on CH3NH3PbI3.

  5. Dual-Material Gate Approach to Suppression of Random-Dopant-Induced Characteristic Fluctuation in 16 nm Metal-Oxide-Semiconductor Field-Effect-Transistor Devices

    Science.gov (United States)

    Li, Yiming; Lee, Kuo-Fu; Yiu, Chun-Yen; Chiu, Yung-Yueh; Chang, Ru-Wei

    2011-04-01

    In this work, we explore for the first time dual-material gate (DMG) and inverse DMG devices for suppressing the random-dopant (RD)-induced characteristic fluctuation in 16 nm metal-oxide-semiconductor field-effect-transistor (MOSFET) devices. The physical mechanism of suppressing the characteristic fluctuation of DMG devices is observed and discussed. The achieved improvement in suppressing the RD-induced threshold voltage, on-state current, and off-state current fluctuations are 28, 12.3, and 59%, respectively. To further suppress the fluctuations, an approach that combines the DMG method and channel-doping-profile engineering is also advanced and explored. The results of our study show that among the suppression techniques, the use of the DMG device with an inverse lateral asymmetric channel-doping-profile has good immunity to fluctuation.

  6. Programmable automated transistor test system

    International Nuclear Information System (INIS)

    Truong, L.V.; Sundberg, G.R.

    1986-01-01

    The paper describes a programmable automated transistor test system (PATTS) and its utilization to evaluate bipolar transistors and Darlingtons, and such MOSFET and special types as can be accommodated with the PATTS base-drive. An application of a pulsed power technique at low duty cycles in a non-destructive test is used to examine the dynamic switching characteristic curves of power transistors. Data collection, manipulation, storage, and output are operator interactive but are guided and controlled by the system software. In addition a library of test data is established on disks, tapes, and hard copies for future reference

  7. Tunneling and Transport in Nanowires

    International Nuclear Information System (INIS)

    Goldman, Allen M.

    2016-01-01

    The goal of this program was to study new physical phenomena that might be relevant to the performance of conductive devices and circuits of the smallest realizable feature sizes possible using physical rather than biological techniques. Although the initial scientific work supported involved the use of scanning tunneling microscopy and spectroscopy to ascertain the statistics of the energy level distribution of randomly sized and randomly shaped quantum dots, or nano-crystals, the main focus was on the investigation of selected properties, including superconductivity, of conducting and superconducting nanowires prepared using electron-beam-lithography. We discovered a magnetic-field-restoration of superconductivity in out-of-equilibrium nanowires driven resistive by current. This phenomenon was explained by the existence of a state in which dissipation coexisted with nonvanishing superconducting order. We also produced ultra-small superconducting loops to study a predicted anomalous fluxoid quantization, but instead, found a magnetic-field-dependent, high-resistance state, rather than superconductivity. Finally, we developed a simple and controllable nanowire in an induced charged layer near the surface of a masked single-crystal insulator, SrTiO_3. The layer was induced using an electric double layer transistor employing an ionic liquid (IL). The transport properties of the induced nanowire resembled those of collective electronic transport through an array of quantum dots.

  8. Tunneling and Transport in Nanowires

    Energy Technology Data Exchange (ETDEWEB)

    Goldman, Allen M. [Univ. of Minnesota, Minneapolis, MN (United States)

    2016-08-16

    The goal of this program was to study new physical phenomena that might be relevant to the performance of conductive devices and circuits of the smallest realizable feature sizes possible using physical rather than biological techniques. Although the initial scientific work supported involved the use of scanning tunneling microscopy and spectroscopy to ascertain the statistics of the energy level distribution of randomly sized and randomly shaped quantum dots, or nano-crystals, the main focus was on the investigation of selected properties, including superconductivity, of conducting and superconducting nanowires prepared using electron-beam-lithography. We discovered a magnetic-field-restoration of superconductivity in out-of-equilibrium nanowires driven resistive by current. This phenomenon was explained by the existence of a state in which dissipation coexisted with nonvanishing superconducting order. We also produced ultra-small superconducting loops to study a predicted anomalous fluxoid quantization, but instead, found a magnetic-field-dependent, high-resistance state, rather than superconductivity. Finally, we developed a simple and controllable nanowire in an induced charged layer near the surface of a masked single-crystal insulator, SrTiO3. The layer was induced using an electric double layer transistor employing an ionic liquid (IL). The transport properties of the induced nanowire resembled those of collective electronic transport through an array of quantum dots.

  9. On the methodology of the determination of charge concentration dependent mobility from organic field-effect transistor characteristics

    Czech Academy of Sciences Publication Activity Database

    Menšík, Miroslav; Toman, Petr; Bielecka, U.; Bartkowiak, W.; Pfleger, Jiří; Paruzel, Bartosz

    2018-01-01

    Roč. 20, č. 4 (2018), s. 2308-2319 ISSN 1463-9076 R&D Projects: GA ČR(CZ) GA15-05095S; GA MŠk(CZ) LTC17029 EU Projects: European Commission(XE) MPNS COST Action MP1406 Institutional support: RVO:61389013 Keywords : field effect transistor * charge carrier mobility * conjugated polymer Subject RIV: BM - Solid Matter Physics ; Magnetism OBOR OECD: Condensed matter physics (including formerly solid state physics, supercond.) Impact factor: 4.123, year: 2016

  10. Planar-Processed Polymer Transistors.

    Science.gov (United States)

    Xu, Yong; Sun, Huabin; Shin, Eul-Yong; Lin, Yen-Fu; Li, Wenwu; Noh, Yong-Young

    2016-10-01

    Planar-processed polymer transistors are proposed where the effective charge injection and the split unipolar charge transport are all on the top surface of the polymer film, showing ideal device characteristics with unparalleled performance. This technique provides a great solution to the problem of fabrication limitations, the ambiguous operating principle, and the performance improvements in practical applications of conjugated-polymer transistors. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  11. Characteristics of sputtered Al-doped ZnO films for transparent electrodes of organic thin-film transistor

    International Nuclear Information System (INIS)

    Park, Yong Seob; Kim, Han-Ki

    2011-01-01

    Aluminum-doped ZnO (AZO) thin-films were deposited with various RF powers at room temperature by radio frequency (RF) magnetron sputtering method. The electrical properties of the AZO film were improved with the increasing RF power. These results can be explained by the improvement of the crystallinity in the AZO film. We fabricated the organic thin-film transistor (OTFT) of the bottom gate structure using pentacene active and poly-4-vinyl phenol gate dielectric layers on the indium tin oxide gate electrode, and estimated the device properties of the OTFTs including drain current-drain voltage (I D -V D ), drain current-gate voltage (I D -V G ), threshold voltage (V T ), on/off ratio and field effect mobility. The AZO film that grown at 160 W RF power exhibited low resistivity (1.54 x 10 -3 Ω.cm), high crystallinity and uniform surface morphology. The pentacene thin-film transistor using the AZO film that's fabricated at 160 W RF power exhibited good device performance such as the mobility of 0.94 cm 2 /V s and the on/off ratio of ∼ 10 5 . Consequently, the performance of the OTFT such as larger field-effect carrier mobility was determined the conductivity of the AZO source/drain (S/D) electrode. AZO films prepared at room temperature by the sputtering method are suitable for the S/D electrodes in the OTFTs.

  12. A superconducting nanowire can be modeled by using SPICE

    Science.gov (United States)

    Berggren, Karl K.; Zhao, Qing-Yuan; Abebe, Nathnael; Chen, Minjie; Ravindran, Prasana; McCaughan, Adam; Bardin, Joseph C.

    2018-05-01

    Modeling of superconducting nanowire single-photon detectors typically requires custom simulations or finite-element analysis in one or two dimensions. Here, we demonstrate two simplified one-dimensional SPICE models of a superconducting nanowire that can quickly and efficiently describe the electrical characteristics of a superconducting nanowire. These models may be of particular use in understanding alternative architectures for nanowire detectors and readouts.

  13. Electric Conductivity of Phosphorus Nanowires

    International Nuclear Information System (INIS)

    Jing-Xiang, Zhang; Hui, Li; Xue-Qing, Zhang; Kim-Meow, Liew

    2009-01-01

    We present the structures and electrical transport properties of nanowires made from different strands of phosphorus chains encapsulated in carbon nanotubes. Optimized by density function theory, our results indicate that the conductance spectra reveal an oscillation dependence on the size of wires. It can be seen from the density of states and current-voltage curves that the structure of nanowires affects their properties greatly. Among them, the DNA-like double-helical phosphorus nanowire exhibits the distinct characteristic of an approximately linear I – V relationship and has a higher conductance than others. The transport properties of phosphorus nanowires are highly correlated with their microstructures. (condensed matter: structure, mechanical and thermal properties)

  14. Enhancement of the electrical characteristics of thin-film transistors with indium-zinc-tin oxide/Ag/indium-zinc-tin oxide multilayer electrodes

    Science.gov (United States)

    Oh, Dohyun; Yun, Dong Yeol; Cho, Woon-Jo; Kim, Tae Whan

    2014-08-01

    Transparent indium-zinc-tin oxide (IZTO)-based thin-film transistors (TFTs) with IZTO/Ag/IZTO multilayer electrodes were fabricated on glass substrates using a tilted dual-target radio-frequency magnetron sputtering system. The IZTO TFTs with IZTO/Ag/IZTO multilayer electrodes exhibited a high optical transmittance in a visible region. The threshold voltage, the mobility, and the on/off-current ratio of the TFTs with IZTO/Ag/IZTO multilayer electrodes were enhanced in comparison with those of the TFTs with ITO electrodes. The source/drain contact resistance of the IZTO TFTs with IZTO/Ag/IZTO multilayer electrodes was smaller than that of the IZTO TFTs with ITO electrodes, resulting in enhancement of their electrical characteristics.

  15. AlGaN/GaN field effect transistors for power electronics—Effect of finite GaN layer thickness on thermal characteristics

    Energy Technology Data Exchange (ETDEWEB)

    Hodges, C., E-mail: chris.hodges@bristol.ac.uk; Anaya Calvo, J.; Kuball, M. [H. H. Wills Physics Laboratory, University of Bristol, Bristol BS8 1TL (United Kingdom); Stoffels, S.; Marcon, D. [IMEC, Kapeldreef 75, B3001 Leuven (Belgium)

    2013-11-11

    AlGaN/GaN heterostructure field effect transistors with a 150 nm thick GaN channel within stacked Al{sub x}Ga{sub 1−x}N layers were investigated using Raman thermography. By fitting a thermal simulation to the measured temperatures, the thermal conductivity of the GaN channel was determined to be 60 W m{sup −1} K{sup −1}, over 50% less than typical GaN epilayers, causing an increased peak channel temperature. This agrees with a nanoscale model. A low thermal conductivity AlGaN buffer means the GaN spreads heat; its properties are important for device thermal characteristics. When designing power devices with thin GaN layers, as well as electrical considerations, the reduced channel thermal conductivity must be considered.

  16. Paraffin wax passivation layer improvements in electrical characteristics of bottom gate amorphous indium–gallium–zinc oxide thin-film transistors

    International Nuclear Information System (INIS)

    Chang, Geng-Wei; Chang, Ting-Chang; Syu, Yong-En; Tsai, Tsung-Ming; Chang, Kuan-Chang; Tu, Chun-Hao; Jian, Fu-Yen; Hung, Ya-Chi; Tai, Ya-Hsiang

    2011-01-01

    In this research, paraffin wax is employed as the passivation layer of the bottom gate amorphous indium–gallium–zinc oxide thin-film transistors (a-IGZO TFTs), and it is formed by sol–gel process in the atmosphere. The high yield and low cost passivation layer of sol–gel process technology has attracted much attention for current flat-panel-display manufacturing. Comparing with passivation-free a-IGZO TFTs, passivated devices exhibit a superior stability against positive gate bias stress in different ambient gas, demonstrating that paraffin wax shows gas-resisting characteristics for a-IGZO TFTs application. Furthermore, light-induced stretch-out phenomenon for paraffin wax passivated device is suppressed. This superior stability of the passivated device was attributed to the reduced total density of states (DOS) including the interfacial and semiconductor bulk trap densities.

  17. Investigation of the evolution of nitrogen defects in flash-lamp-annealed InGaZnO films and their effects on transistor characteristics

    Science.gov (United States)

    Eom, Tae-Yil; Ahn, Chee-Hong; Kang, Jun-Gu; Saad Salman, Muhammad; Lee, Sun-Young; Kim, Yong-Hoon; Lee, Hoo-Jeong; Kang, Chan-Mo; Kang, Chiwon

    2018-06-01

    In this study, we show the evolution of nitrogen defects during a sol–gel reaction in flash-lamp-annealed InGaZnO (IGZO) films and their effects on the device characteristics of their thin-film transistors (TFTs). The flash lamp annealing (FLA) of the IGZO TFT for 16 s helps achieve a mobility of approximately 7 cm2 V‑1 s‑1. However, further extension of the annealing time results only in drastic increases in carrier concentration and off-current. The X-ray photoelectron spectroscopy (XPS) analysis of the N 1s peak unravels the presence of oxygen-vacancy-associated nitrogen defects and their evolution with annealing time, which is possibly responsible for the increase in carrier concentration.

  18. Improvement in switching characteristics and long-term stability of Zn-O-N thin-film transistors by silicon doping

    Directory of Open Access Journals (Sweden)

    Hiroshi Tsuji

    2017-06-01

    Full Text Available The effects of silicon doping on the properties of Zn-O-N (ZnON films and on the device characteristics of ZnON thin-film transistors (TFTs were investigated by co-sputtering silicon and zinc targets. Silicon doping was effective at decreasing the carrier concentration in ZnON films; therefore, the conductivity of the films can be controlled by the addition of a small amount of silicon. Doped silicon atoms also form bonds with nitrogen atoms, which suppresses nitrogen desorption from the films. Furthermore, Si-doped ZnON-TFTs are demonstrated to exhibit less negative threshold voltages, smaller subthreshold swings, and better long-term stability than non-doped ZnON-TFTs.

  19. Determination of the hole effective mass in thin silicon dioxide film by means of an analysis of characteristics of a MOS tunnel emitter transistor

    International Nuclear Information System (INIS)

    Vexler, M I; Tyaginov, S E; Shulekin, A F

    2005-01-01

    The value of m h = 0.33 m 0 has been experimentally obtained for hole effective mass in a tunnel-thin (2-3 nm) SiO 2 film. The use of this value ensures the adequate modelling of a direct-tunnelling hole current in MOS devices. For the first time, in order to determine m h , the characteristics of a MOS tunnel emitter transistor have been mathematically processed, that allows for the precise estimation of the effective oxide thickness, as the electron effective mass in SiO 2 is independently known from the literature. The formulae for simulation of currents in a tunnel MOS structure are listed along with the necessary parameter values

  20. Oxygen Partial Pressure Impact on Characteristics of Indium Titanium Zinc Oxide Thin Film Transistor Fabricated via RF Sputtering.

    Science.gov (United States)

    Hsu, Ming-Hung; Chang, Sheng-Po; Chang, Shoou-Jinn; Wu, Wei-Ting; Li, Jyun-Yi

    2017-06-26

    Indium titanium zinc oxide (InTiZnO) as the channel layer in thin film transistor (TFT) grown by RF sputtering system is proposed in this work. Optical and electrical properties were investigated. By changing the oxygen flow ratio, we can suppress excess and undesirable oxygen-related defects to some extent, making it possible to fabricate the optimized device. XPS patterns for O 1s of InTiZnO thin films indicated that the amount of oxygen vacancy was apparently declined with the increasing oxygen flow ratio. The fabricated TFTs showed a threshold voltage of -0.9 V, mobility of 0.884 cm²/Vs, on-off ratio of 5.5 × 10⁵, and subthreshold swing of 0.41 V/dec.

  1. Correlation of AlGaN/GaN high-electron-mobility transistors electroluminescence characteristics with current collapse

    Science.gov (United States)

    Ohi, Shintaro; Yamazaki, Taisei; Asubar, Joel T.; Tokuda, Hirokuni; Kuzuhara, Masaaki

    2018-02-01

    We report on the correlation between the electroluminescence and current collapse of AlGaN/GaN high-electron-mobility transistors (HEMTs). Standard passivated devices suffering from severe current collapse exhibited high-intensity whitish electroluminescence confined near the drain contact. In contrast, devices with reduced current collapse resulting from oxygen plasma treatment or GaN capping showed low-intensity reddish emission across the entire gate-drain access region. A qualitative explanation of this observed correlation between the current collapse and electroluminescence is presented. Our results demonstrate that electroluminescence analysis is a powerful tool not only for identifying high-field regions but also for assessing the degree of current collapse in AlGaN/GaN HEMTs.

  2. Characteristics in AlN/AlGaN/GaN Multilayer-Structured High-Electron-Mobility Transistors

    International Nuclear Information System (INIS)

    Gui-Zhou, Hu; Ling, Yang; Li-Yuan, Yang; Si, Quan; Shou-Gao, Jiang; Ji-Gang, Ma; Xiao-Hua, Ma; Yue, Hao

    2010-01-01

    A new multilayer-structured AlN/AlGaN/GaN heterostructure high-electron-mobility transistor (HEMT) is demonstrated. The AlN/AlGaN/GaN HEMT exhibits the maximum drain current density of 800 mA/mm and the maximum extrinsic transconductance of 170 mS/mm. Due to the increase of the distance between the gate and the two-dimensional electron-gas channel, the threshold voltage shifts slightly to the negative. The reduced drain current collapse and higher breakdown voltage are observed on this AlN/AlGaN/GaN HEMT. The current gain cut-off frequency and the maximum frequency of oscillation are 18.5 GHz and 29.0 GHz, respectively. (condensed matter: electronic structure, electrical, magnetic, and optical properties)

  3. Nanowires and nanobelts, v.2 nanowires and nanobelts of functional materials

    CERN Document Server

    Wang, Zhong Lin

    2010-01-01

    Nanowires, nanobelts, nanoribbons, nanorods ..., are a new class of quasi-one-dimensional materials that have been attracting a great research interest in the last few years. These non-carbon based materials have been demonstrated to exhibit superior electrical, optical, mechanical and thermal properties, and can be used as fundamental building blocks for nano-scale science and technology, ranging from chemical and biological sensors, field effect transistors to logic circuits. Nanocircuits built using semiconductor nanowires demonstrated were declared a ""breakthrough in science"" by Science

  4. Single InAs/GaSb nanowire low-power CMOS inverter.

    Science.gov (United States)

    Dey, Anil W; Svensson, Johannes; Borg, B Mattias; Ek, Martin; Wernersson, Lars-Erik

    2012-11-14

    III-V semiconductors have so far predominately been employed for n-type transistors in high-frequency applications. This development is based on the advantageous transport properties and the large variety of heterostructure combinations in the family of III-V semiconductors. In contrast, reports on p-type devices with high hole mobility suitable for complementary metal-oxide-semiconductor (CMOS) circuits for low-power operation are scarce. In addition, the difficulty to integrate both n- and p-type devices on the same substrate without the use of complex buffer layers has hampered the development of III-V based digital logic. Here, inverters fabricated from single n-InAs/p-GaSb heterostructure nanowires are demonstrated in a simple processing scheme. Using undoped segments and aggressively scaled high-κ dielectric, enhancement mode operation suitable for digital logic is obtained for both types of transistors. State-of-the-art on- and off-state characteristics are obtained and the individual long-channel n- and p-type transistors exhibit minimum subthreshold swings of SS = 98 mV/dec and SS = 400 mV/dec, respectively, at V(ds) = 0.5 V. Inverter characteristics display a full signal swing and maximum gain of 10.5 with a small device-to-device variability. Complete inversion is measured at low frequencies although large parasitic capacitances deform the waveform at higher frequencies.

  5. SnO2Nanowire Arrays and Electrical Properties Synthesized by Fast Heating a Mixture of SnO2and CNTs Waste Soot

    Directory of Open Access Journals (Sweden)

    Zhou Zhi-Hua

    2009-01-01

    Full Text Available Abstract SnO2nanowire arrays were synthesized by fast heating a mixture of SnO2and the carbon nanotubes waste soot by high-frequency induction heating. The resultant SnO2nanowires possess diameters from 50 to 100 nm and lengths up to tens of mircrometers. The field-effect transistors based on single SnO2nanowire exhibit that as-synthesized nanowires have better transistor performance in terms of transconductance and on/off ratio. This work demonstrates a simple technique to the growth of nanomaterials for application in future nanoelectronic devices.

  6. Quantifying signal changes in nano-wire based biosensors

    DEFF Research Database (Denmark)

    De Vico, Luca; Sørensen, Martin Hedegård; Iversen, Lars

    2011-01-01

    In this work, we present a computational methodology for predicting the change in signal (conductance sensitivity) of a nano-BioFET sensor (a sensor based on a biomolecule binding another biomolecule attached to a nano-wire field effect transistor) upon binding its target molecule. The methodolog...

  7. Improvement in interfacial characteristics of low-voltage carbon nanotube thin-film transistors with solution-processed boron nitride thin films

    Energy Technology Data Exchange (ETDEWEB)

    Jeon, Jun-Young; Ha, Tae-Jun, E-mail: taejunha0604@gmail.com

    2017-08-15

    Highlights: • We demonstrate the potential of solution-processed boron nitride (BN) thin films for nanoelectronics. • Improved interfacial characteristics reduced the leakage current by three orders of magnitude. • The BN encapsulation improves all the device key metrics of low-voltage SWCNT-TFTs. • Such improvements were achieved by reduced interaction of interfacial localized states. - Abstract: In this article, we demonstrate the potential of solution-processed boron nitride (BN) thin films for high performance single-walled carbon nanotube thin-film transistors (SWCNT-TFTs) with low-voltage operation. The use of BN thin films between solution-processed high-k dielectric layers improved the interfacial characteristics of metal-insulator-metal devices, thereby reducing the current density by three orders of magnitude. We also investigated the origin of improved device performance in SWCNT-TFTs by employing solution-processed BN thin films as an encapsulation layer. The BN encapsulation layer improves the electrical characteristics of SWCNT-TFTs, which includes the device key metrics of linear field-effect mobility, sub-threshold swing, and threshold voltage as well as the long-term stability against the aging effect in air. Such improvements can be achieved by reduced interaction of interfacial localized states with charge carriers. We believe that this work can open up a promising route to demonstrate the potential of solution-processed BN thin films on nanoelectronics.

  8. Electrical characteristics and density of states of thin-film transistors based on sol-gel derived ZnO channel layers with different annealing temperatures

    Science.gov (United States)

    Wang, S.; Mirkhani, V.; Yapabandara, K.; Cheng, R.; Hernandez, G.; Khanal, M. P.; Sultan, M. S.; Uprety, S.; Shen, L.; Zou, S.; Xu, P.; Ellis, C. D.; Sellers, J. A.; Hamilton, M. C.; Niu, G.; Sk, M. H.; Park, M.

    2018-04-01

    We report on the fabrication and electrical characterization of bottom gate thin-film transistors (TFTs) based on a sol-gel derived ZnO channel layer. The effect of annealing of ZnO active channel layers on the electrical characteristics of the ZnO TFTs was systematically investigated. Photoluminescence (PL) spectra indicate that the crystal quality of the ZnO improves with increasing annealing temperature. Both the device turn-on voltage (Von) and threshold voltage (VT) shift to a positive voltage with increasing annealing temperature. As the annealing temperature is increased, both the subthreshold slope and the interfacial defect density (Dit) decrease. The field effect mobility (μFET) increases with annealing temperature, peaking at 800 °C and decreases upon further temperature increase. An improvement in transfer and output characteristics was observed with increasing annealing temperature. However, when the annealing temperature reaches 900 °C, the TFTs demonstrate a large degradation in both transfer and output characteristics, which is possibly produced by non-continuous coverage of the film. By using the temperature-dependent field effect measurements, the localized sub-gap density of states (DOSs) for ZnO TFTs with different annealing temperatures were determined. The DOSs for the subthreshold regime decrease with increasing annealing temperature from 600 °C to 800 °C and no substantial change was observed with further temperature increase to 900 °C.

  9. Determination of bulk and interface density of states in metal oxide semiconductor thin-film transistors by using capacitance-voltage characteristics

    Science.gov (United States)

    Wei, Xixiong; Deng, Wanling; Fang, Jielin; Ma, Xiaoyu; Huang, Junkai

    2017-10-01

    A physical-based straightforward extraction technique for interface and bulk density of states in metal oxide semiconductor thin film transistors (TFTs) is proposed by using the capacitance-voltage (C-V) characteristics. The interface trap density distribution with energy has been extracted from the analysis of capacitance-voltage characteristics. Using the obtained interface state distribution, the bulk trap density has been determined. With this method, for the interface trap density, it is found that deep state density nearing the mid-gap is approximately constant and tail states density increases exponentially with energy; for the bulk trap density, it is a superposition of exponential deep states and exponential tail states. The validity of the extraction is verified by comparisons with the measured current-voltage (I-V) characteristics and the simulation results by the technology computer-aided design (TCAD) model. This extraction method uses non-numerical iteration which is simple, fast and accurate. Therefore, it is very useful for TFT device characterization.

  10. Junctionless Cooper pair transistor

    Energy Technology Data Exchange (ETDEWEB)

    Arutyunov, K. Yu., E-mail: konstantin.yu.arutyunov@jyu.fi [National Research University Higher School of Economics , Moscow Institute of Electronics and Mathematics, 101000 Moscow (Russian Federation); P.L. Kapitza Institute for Physical Problems RAS , Moscow 119334 (Russian Federation); Lehtinen, J.S. [VTT Technical Research Centre of Finland Ltd., Centre for Metrology MIKES, P.O. Box 1000, FI-02044 VTT (Finland)

    2017-02-15

    Highlights: • Junctionless Cooper pair box. • Quantum phase slips. • Coulomb blockade and gate modulation of the Coulomb gap. - Abstract: Quantum phase slip (QPS) is the topological singularity of the complex order parameter of a quasi-one-dimensional superconductor: momentary zeroing of the modulus and simultaneous 'slip' of the phase by ±2π. The QPS event(s) are the dynamic equivalent of tunneling through a conventional Josephson junction containing static in space and time weak link(s). Here we demonstrate the operation of a superconducting single electron transistor (Cooper pair transistor) without any tunnel junctions. Instead a pair of thin superconducting titanium wires in QPS regime was used. The current–voltage characteristics demonstrate the clear Coulomb blockade with magnitude of the Coulomb gap modulated by the gate potential. The Coulomb blockade disappears above the critical temperature, and at low temperatures can be suppressed by strong magnetic field.

  11. Organic electrochemical transistors

    Science.gov (United States)

    Rivnay, Jonathan; Inal, Sahika; Salleo, Alberto; Owens, Róisín M.; Berggren, Magnus; Malliaras, George G.

    2018-02-01

    Organic electrochemical transistors (OECTs) make effective use of ion injection from an electrolyte to modulate the bulk conductivity of an organic semiconductor channel. The coupling between ionic and electronic charges within the entire volume of the channel endows OECTs with high transconductance compared with that of field-effect transistors, but also limits their response time. The synthetic tunability, facile deposition and biocompatibility of organic materials make OECTs particularly suitable for applications in biological interfacing, printed logic circuitry and neuromorphic devices. In this Review, we discuss the physics and the mechanism of operation of OECTs, focusing on their identifying characteristics. We highlight organic materials that are currently being used in OECTs and survey the history of OECT technology. In addition, form factors, fabrication technologies and applications such as bioelectronics, circuits and memory devices are examined. Finally, we take a critical look at the future of OECT research and development.

  12. Organic electrochemical transistors

    KAUST Repository

    Rivnay, Jonathan

    2018-01-16

    Organic electrochemical transistors (OECTs) make effective use of ion injection from an electrolyte to modulate the bulk conductivity of an organic semiconductor channel. The coupling between ionic and electronic charges within the entire volume of the channel endows OECTs with high transconductance compared with that of field-effect transistors, but also limits their response time. The synthetic tunability, facile deposition and biocompatibility of organic materials make OECTs particularly suitable for applications in biological interfacing, printed logic circuitry and neuromorphic devices. In this Review, we discuss the physics and the mechanism of operation of OECTs, focusing on their identifying characteristics. We highlight organic materials that are currently being used in OECTs and survey the history of OECT technology. In addition, form factors, fabrication technologies and applications such as bioelectronics, circuits and memory devices are examined. Finally, we take a critical look at the future of OECT research and development.

  13. Characteristics of drain-modulated generation current in n-type metal-oxide-semiconductor field-effect transistor

    International Nuclear Information System (INIS)

    Chen Hai-Feng; Guo Li-Xin; Zheng Pu-Yang; Dong Zhao; Zhang Qian

    2015-01-01

    Drain-modulated generation current I DMG induced by interface traps in an n-type metal-oxide-semiconductor field-effect transistor (nMOSFET) is investigated. The formation of I DMG ascribes to the change of the Si surface potential φ s . This change makes the channel suffer transformation from the inversion state, depletion I state to depletion II state. The simulation result agrees with the experiment in the inversion and depletion I states. In the depletion II state, the theoretical curve goes into saturation, while the experimental curve drops quickly as V D increases. The reason for this unconformity is that the drain-to-gate voltage V DG lessens φ s around the drain corner and controls the falling edge of the I DMG curve. The experiments of gate-modulated generation and recombination currents are also applied to verify the reasonability of the mechanism. Based on this mechanism, a theoretical model of the I DMG falling edge is set up in which I DMG has an exponential attenuation relation with V DG . Finally, the critical fitting coefficient t of the experimental curves is extracted. It is found that t = 80 mV = 3kT/q. This result fully shows the accuracy of the above mechanism. (paper)

  14. pH sensing characteristics and biosensing application of solution-gated reduced graphene oxide field-effect transistors.

    Science.gov (United States)

    Sohn, Il-Yung; Kim, Duck-Jin; Jung, Jin-Heak; Yoon, Ok Ja; Thanh, Tien Nguyen; Quang, Trung Tran; Lee, Nae-Eung

    2013-07-15

    Solution-gated reduced graphene oxide field-effect transistors (R-GO FETs) were investigated for pH sensing and biochemical sensing applications. A channel of a networked R-GO film formed by self-assembly was incorporated as a sensing layer into a solution-gated FET structure for pH sensing and the detection of acetylcholine (Ach), which is a neurotransmitter in the nerve system, through enzymatic reactions. The fabricated R-GO FET was sensitive to protons (H(+)) with a pH sensitivity of 29 mV/pH in terms of the shift of the charge neutrality point (CNP), which is attributed to changes in the surface potential caused by the interaction of protons with OH surface functional groups present on the R-GO surface. The R-GO FET immobilized with acetylcholinesterase (AchE) was used to detect Ach in the concentration range of 0.1-10mM by sensing protons generated during the enzymatic reactions. The results indicate that R-GO FETs provide the capability to detect protons, demonstrating their applicability as a biosensing device for enzymatic reactions. Copyright © 2013 Elsevier B.V. All rights reserved.

  15. Bias polarity-sensitive electrical failure characteristics of ZnSe nanowire in metal–semiconductor–metal nanostructure

    Directory of Open Access Journals (Sweden)

    Yu Tan

    2014-04-01

    Full Text Available The effect of bias polarity on the electrical breakdown behavior of the single ZnSe nanowire (NW in the metal–semiconductor–metal (M–S–M nanostructure under high current density and high bias conditions has been studied in the present paper. The experimental results show that the failure of the ZnSe NW in M–S–M nanostructure was sensitive to bias polarity since the NW commonly collapsed at the negatively biased Au metal electrode due to high Joule heat produced in NW at the reversely biased Schottky barrier. Thus, the electrical breakdown behavior of the ZnSe NW was highly dominated by the cathode-controlled mode due to the high resistance of the depletion region of ZnSe NW at the reversely biased Schottky contact.

  16. Dosimetric properties of MOS transistors

    International Nuclear Information System (INIS)

    Frank, H.; Petr, I.

    1977-01-01

    The structure of MOS transistors is described and their characteristics given. The experiments performed and data in the literature show the following dosimetric properties of MOS transistors: while for low gamma doses the transistor response to exposure is linear, it shows saturation for higher doses (exceeding 10 3 Gy in tissue). The response is independent of the energy of radiation and of the dose rate (within 10 -2 to 10 5 Gy/s). The spontaneous reduction with time of the spatial charge captured by the oxide layer (fading) is small and acceptable from the point of view of dosimetry. Curves are given of isochronous annealing of the transistors following irradiation with 137 Cs and 18 MeV electrons for different voltages during irradiation. The curves show that in MOS transistors irradiated with high-energy electrons the effect of annealing is less than in transistors irradiated with 137 Cs. In view of the requirement of using higher temperatures (approx. 400 degC) for the complete ''erasing'' of the captured charge, unsealed systems must be used for dosimetric purposes. The effect was also studied of neutron radiation, proton radiation and electron radiation on the MOS transistor structure. For MOS transistor irradiation with 14 MeV neutrons from a neutron generator the response was 4% of that for gamma radiation at the same dose equivalent. The effect of proton radiation was studied as related to the changes in MOS transistor structure during space flights. The response curve shapes are similar to those of gamma radiation curves. The effect of electron radiation on the MOS structure was studied by many authors. The experiments show that for each thickness of the SiO 2 layer an electron energy exists at which the size of the charge captured in SiO 2 is the greatest. All data show that MOS transistors are promising for radiation dosimetry. The main advantage of MOS transistors as gamma dosemeters is the ease and speed of evaluation, low sensitivity to neutron

  17. Topological insulator nanowires and nanowire hetero-junctions

    Science.gov (United States)

    Deng, Haiming; Zhao, Lukas; Wade, Travis; Konczykowski, Marcin; Krusin-Elbaum, Lia

    2014-03-01

    The existing topological insulator materials (TIs) continue to present a number of challenges to complete understanding of the physics of topological spin-helical Dirac surface conduction channels, owing to a relatively large charge conduction in the bulk. One way to reduce the bulk contribution and to increase surface-to-volume ratio is by nanostructuring. Here we report on the synthesis and characterization of Sb2Te3, Bi2Te3 nanowires and nanotubes and Sb2Te3/Bi2Te3 heterojunctions electrochemically grown in porous anodic aluminum oxide (AAO) membranes with varied (from 50 to 150 nm) pore diameters. Stoichiometric rigid polycrystalline nanowires with controllable cross-sections were obtained using cell voltages in the 30 - 150 mV range. Transport measurements in up to 14 T magnetic fields applied along the nanowires show Aharonov-Bohm (A-B) quantum oscillations with periods corresponding to the nanowire diameters. All nanowires were found to exhibit sharp weak anti-localization (WAL) cusps, a characteristic signature of TIs. In addition to A-B oscillations, new quantization plateaus in magnetoresistance (MR) at low fields (< 0 . 7T) were observed. The analysis of MR as well as I - V characteristics of heterojunctions will be presented. Supported in part by NSF-DMR-1122594, NSF-DMR-1312483-MWN, and DOD-W911NF-13-1-0159.

  18. Ultrahigh Density Array of Vertically Aligned Small-molecular Organic Nanowires on Arbitrary Substrates

    Science.gov (United States)

    Starko-Bowes, Ryan; Pramanik, Sandipan

    2013-01-01

    In recent years π-conjugated organic semiconductors have emerged as the active material in a number of diverse applications including large-area, low-cost displays, photovoltaics, printable and flexible electronics and organic spin valves. Organics allow (a) low-cost, low-temperature processing and (b) molecular-level design of electronic, optical and spin transport characteristics. Such features are not readily available for mainstream inorganic semiconductors, which have enabled organics to carve a niche in the silicon-dominated electronics market. The first generation of organic-based devices has focused on thin film geometries, grown by physical vapor deposition or solution processing. However, it has been realized that organic nanostructures can be used to enhance performance of above-mentioned applications and significant effort has been invested in exploring methods for organic nanostructure fabrication. A particularly interesting class of organic nanostructures is the one in which vertically oriented organic nanowires, nanorods or nanotubes are organized in a well-regimented, high-density array. Such structures are highly versatile and are ideal morphological architectures for various applications such as chemical sensors, split-dipole nanoantennas, photovoltaic devices with radially heterostructured "core-shell" nanowires, and memory devices with a cross-point geometry. Such architecture is generally realized by a template-directed approach. In the past this method has been used to grow metal and inorganic semiconductor nanowire arrays. More recently π-conjugated polymer nanowires have been grown within nanoporous templates. However, these approaches have had limited success in growing nanowires of technologically important π-conjugated small molecular weight organics, such as tris-8-hydroxyquinoline aluminum (Alq3), rubrene and methanofullerenes, which are commonly used in diverse areas including organic displays, photovoltaics, thin film transistors

  19. Organic Field-Effect Transistors: A 3D Kinetic Monte Carlo Simulation of the Current Characteristics in Micrometer-Sized Devices

    KAUST Repository

    Li, Haoyuan

    2017-01-16

    The electrical properties of organic field-effect transistors (OFETs) are usually characterized by applying models initially developed for inorganic-based devices, which often implies the use of approximations that might be inappropriate for organic semiconductors. These approximations have brought limitations to the understanding of the device physics associated with organic materials. A strategy to overcome this issue is to establish straightforward connections between the macroscopic current characteristics and microscopic charge transport in OFETs. Here, a 3D kinetic Monte Carlo model is developed that goes beyond both the conventional assumption of zero channel thickness and the gradual channel approximation to simulate carrier transport and current. Using parallel computing and a new algorithm that significantly improves the evaluation of electric potential within the device, this methodology allows the simulation of micrometer-sized OFETs. The current characteristics of representative OFET devices are well reproduced, which provides insight into the validity of the gradual channel approximation in the case of OFETs, the impact of the channel thickness, and the nature of microscopic charge transport.

  20. Organic Field-Effect Transistors: A 3D Kinetic Monte Carlo Simulation of the Current Characteristics in Micrometer-Sized Devices

    KAUST Repository

    Li, Haoyuan; Li, Yuan; Li, Hong; Bredas, Jean-Luc

    2017-01-01

    The electrical properties of organic field-effect transistors (OFETs) are usually characterized by applying models initially developed for inorganic-based devices, which often implies the use of approximations that might be inappropriate for organic semiconductors. These approximations have brought limitations to the understanding of the device physics associated with organic materials. A strategy to overcome this issue is to establish straightforward connections between the macroscopic current characteristics and microscopic charge transport in OFETs. Here, a 3D kinetic Monte Carlo model is developed that goes beyond both the conventional assumption of zero channel thickness and the gradual channel approximation to simulate carrier transport and current. Using parallel computing and a new algorithm that significantly improves the evaluation of electric potential within the device, this methodology allows the simulation of micrometer-sized OFETs. The current characteristics of representative OFET devices are well reproduced, which provides insight into the validity of the gradual channel approximation in the case of OFETs, the impact of the channel thickness, and the nature of microscopic charge transport.

  1. Application of calendering for improving the electrical characteristics of a printed top-gate, bottom-contact organic thin film transistors

    Science.gov (United States)

    Lee, Sang Hoon; Lee, Dong Geun; Jung, Hoeryong; Lee, Sangyoon

    2018-05-01

    Interface between the channel and the gate dielectric of organic thin film transistors (OTFTs) needs to be smoothed in order to improve the electrical characteristics. In this study, an optimized calendering process was proposed to improve the surface roughness of the channel. Top-gate, bottom-contact structural p-type OTFT samples were fabricated using roll-to-roll gravure printing (source/drain, channel), spin coating (gate dielectric), and inkjet printing (gate electrode). The calendering process was optimized using the grey-based Taguchi method. The channel surface roughness and electrical characteristics of calendered and non-calendered samples were measured and compared. As a result, the average improvement in the surface roughness of the calendered samples was 26.61%. The average on–off ratio and field-effect mobility of the calendered samples were 3.574 × 104 and 0.1113 cm2 V‑1 s‑1, respectively, which correspond to the improvements of 16.72 and 10.20%, respectively.

  2. Origin of noise in liquid-gated Si nanowire troponin biosensors

    Science.gov (United States)

    Kutovyi, Y.; Zadorozhnyi, I.; Hlukhova, H.; Handziuk, V.; Petrychuk, M.; Ivanchuk, Andriy; Vitusevich, S.

    2018-04-01

    Liquid-gated Si nanowire field-effect transistor (FET) biosensors are fabricated using a complementary metal-oxide-semiconductor-compatible top-down approach. The transport and noise properties of the devices reflect the high performance of the FET structures, which allows label-free detection of cardiac troponin I (cTnI) molecules. Moreover, after removing the troponin antigens the structures demonstrate the same characteristics as before cTnI detection, indicating the reusable operation of biosensors. Our results show that the additional noise is related to the troponin molecules and has characteristics which considerably differ from those usually recorded for conventional FETs without target molecules. We describe the origin of the noise and suggest that noise spectroscopy represents a powerful tool for understanding molecular dynamic processes in nanoscale FET-based biosensors.

  3. Guided Growth of Horizontal p-Type ZnTe Nanowires

    Science.gov (United States)

    2016-01-01

    A major challenge toward large-scale integration of nanowires is the control over their alignment and position. A possible solution to this challenge is the guided growth process, which enables the synthesis of well-aligned horizontal nanowires that grow according to specific epitaxial or graphoepitaxial relations with the substrate. However, the guided growth of horizontal nanowires was demonstrated for a limited number of materials, most of which exhibit unintentional n-type behavior. Here we demonstrate the vapor–liquid–solid growth of guided horizontal ZnTe nanowires and nanowalls displaying p-type behavior on four different planes of sapphire. The growth directions of the nanowires are determined by epitaxial relations between the nanowires and the substrate or by a graphoepitaxial effect that guides their growth along nanogrooves or nanosteps along the surface. We characterized the crystallographic orientations and elemental composition of the nanowires using transmission electron microscopy and photoluminescence. The optoelectronic and electronic properties of the nanowires were studied by fabricating photodetectors and top-gate thin film transistors. These measurements showed that the guided ZnTe nanowires are p-type semiconductors and are photoconductive in the visible range. The guided growth of horizontal p-type nanowires opens up the possibility of parallel nanowire integration into functional systems with a variety of potential applications not available by other means. PMID:27885331

  4. Superconductive silicon nanowires using gallium beam lithography.

    Energy Technology Data Exchange (ETDEWEB)

    Henry, Michael David; Jarecki, Robert Leo,

    2014-01-01

    This work was an early career LDRD investigating the idea of using a focused ion beam (FIB) to implant Ga into silicon to create embedded nanowires and/or fully suspended nanowires. The embedded Ga nanowires demonstrated electrical resistivity of 5 m-cm, conductivity down to 4 K, and acts as an Ohmic silicon contact. The suspended nanowires achieved dimensions down to 20 nm x 30 nm x 10 m with large sensitivity to pressure. These structures then performed well as Pirani gauges. Sputtered niobium was also developed in this research for use as a superconductive coating on the nanowire. Oxidation characteristics of Nb were detailed and a technique to place the Nb under tensile stress resulted in the Nb resisting bulk atmospheric oxidation for up to years.

  5. Tuning electronic properties of In2O3 nanowires by doping control

    International Nuclear Information System (INIS)

    Lei, B.; Li, C.; Zhang, D.; Tang, D.; Zhou, C.

    2004-01-01

    We present two effective routes to tune the electronic properties of single-crystalline In 2 O 3 nanowires by controlling the doping. The first method involves using different O 2 concentrations during the synthesis. Lightly (heavily) doped nanowires were produced by using high (low) O 2 concentrations, respectively, as revealed by the conductances and threshold voltages of nanowire-based field-effect transistors. Our second method exploits post-synthesis baking, as baking heavily doped nanowires in ambient air led to suppressed conduction and a positive shift of the threshold voltage, whereas baking lightly doped nanowires in vacuum displayed the opposite behavior. Our approaches offer viable ways to tune the electronic properties of many nonstoichiometric metal oxide systems such as In 2 O 3 , SnO 2 , and ZnO nanowires for various applications

  6. Diagnosis of phosphorus monolayer doping in silicon based on nanowire electrical characterisation

    Science.gov (United States)

    Duffy, Ray; Ricchio, Alessio; Murphy, Ruaidhrí; Maxwell, Graeme; Murphy, Richard; Piaszenski, Guido; Petkov, Nikolay; Hydes, Alan; O'Connell, Dan; Lyons, Colin; Kennedy, Noel; Sheehan, Brendan; Schmidt, Michael; Crupi, Felice; Holmes, Justin D.; Hurley, Paul K.; Connolly, James; Hatem, Chris; Long, Brenda

    2018-03-01

    The advent of high surface-to-volume ratio devices has necessitated a revised approach to parameter extraction and process evaluation in field-effect transistor technologies. In this work, active doping concentrations are extracted from the electrical analysis of Si nanowire devices with high surface-to-volume ratios. Nanowire resistance and Si resistivity are extracted, by first extracting and subtracting out the contact resistance. Resistivity (ρ) is selected as the benchmark parameter to compare different doping processes with each other. The impacts of nanowire diameter scaling to 10 nm and of nanowire spacing scaling to resistivity and higher dopant activation, with dependencies on the nanowire width greater than on nanowire spacing. Limitations in ADP P monolayer doping with a SiO2 cap are due to the difficulties in dopant incorporation, as it is based on in-diffusion, and P atoms must overcome a potential barrier on the Si surface.

  7. Reactive diffusion and stresses in nanowires or nanorods

    International Nuclear Information System (INIS)

    Roussel, Manuel; Erdélyi, Zoltán; Schmitz, Guido

    2017-01-01

    Heterostructured nanowires are of prime interest in nowadays technology such as field-effect transistors, field emitters, batteries and solar cells. We consider their aging behavior and developed a model focusing on reactive diffusion in core-shell nanowires. A complete set of analytical equations is presented that takes into account thermodynamic driving forces, vacancy distribution, elastic stress and its plastic relaxation. This complete description of the reactive diffusion can be used in finite element simulations to investigate diffusion processes in various geometries. In order to show clearly the interplay between the cylindrical geometry, the reactive diffusion and the stresses developing in the nanowire, we investigate the formation of an intermetallic reaction product in various core-shell geometries. Emphasis is placed on showing how it is possible to control the kinetics of the reaction by applying an axial stress to the nanowires.

  8. Influence of a drain field plate on the forward blocking characteristics of an AlGaN/GaN high electron mobility transistor

    International Nuclear Information System (INIS)

    Zhao Sheng-Lei; Yue Tong; Wang Yi; Luo Jun; Mao Wei; Ma Xiao-Hua; Hao Yue; Chen Wei-Wei

    2013-01-01

    In this paper, the influence of a drain field plate (FP) on the forward blocking characteristics of an AlGaN/GaN high electron mobility transistor (HEMT) is investigated. The HEMT with only a gate FP is optimized, and breakdown voltage V BR is saturated at 1085 V for gate—drain spacing L GD ≥ 8 μm. On the basis of the HEMT with a gate FP, a drain FP is added with L GD = 10 μm. For the length of the drain FP L DF ≤ 2 μm, V BR is almost kept at 1085 V, showing no degradation. When L DF exceeds 2 μm, V BR decreases obviously as L DF increases. Moreover, the larger the L DF , the larger the decrease of V BR . It is concluded that the distance between the gate edge and the drain FP edge should be larger than a certain value to prevent the drain FP from affecting the forward blocking voltage and the value should be equal to the L GD at which V BR begins to saturate in the first structure. The electric field and potential distribution are simulated and analyzed to account for the decrease of V BR

  9. Modulation of the operational characteristics of amorphous In-Ga-Zn-O thin-film transistors by In2O3 nanoparticles

    International Nuclear Information System (INIS)

    Lee, Min-Jung; Lee, Tae Il; Park, Jee Ho; Baik, Hong Koo; Myoung, Jae-Min; Kim, Jung Han; Chae, Gee Sung; Jun, Myung Chul; Hwang, Yong Kee; Lee, Woong

    2012-01-01

    The structure of thin-film transistors (TFTs) based on amorphous In-Ga-Zn-O (a-IGZO) was modified by spin coating a suspension of In 2 O 3 nanoparticles on a SiO 2 /p ++ Si layered wafer surface prior to the deposition of IGZO layer by room-temperature sputtering. The number of particles per unit area (surface density) of the In 2 O 3 nanoparticles could be controlled by applying multiple spin coatings of the nanoparticle suspension. During the deposition of IGZO, the In 2 O 3 nanoparticles initially located on the substrate surface migrated to the top of the IGZO layer indicating that they were not embedded within the IGZO layer, but they supplied In to the IGZO layer to increase the In concentration in the channel layer. As a result, the channel characteristics of the a-IGZO TFT were modulated so that the device showed an enhanced performance as compared with the reference device prepared without the nanoparticle treatment. Such an improved device performance is attributed to the nano-scale changes in the structure of (InO) n ordering assisted by increased In concentration in the amorphous channel layer. (paper)

  10. Effects of thermal annealing on the electrical characteristics of In-Ga-Zn-O thin-film transistors with Al2O3 gate dielectric

    International Nuclear Information System (INIS)

    Zhang, Wen-Peng; Chen, Sun; Qian, Shi-Bing; Ding, Shi-Jin

    2015-01-01

    We studied how the performance of In–Ga–Zn–O (IGZO) thin film transistors (TFTs) with Al 2 O 3 gate insulator was affected by post-fabrication annealing temperature and annealing time. At a fixed annealing time of 2 min, the IGZO TFT exhibited the best transfer and output characteristics in the case of 300 °C in N 2 atmosphere, which is attributed to the achievement of appropriate carrier concentration and Hall mobility in the IGZO film. Further, it was found that both of the carrier concentration and Hall mobility in the IGZO film increased with the increment of annealing temperature. For the annealing temperature of 300 °C, the performance of the IGZO TFT was further improved by extending annealing time to 5 min, i.e., the field effect mobility, sub-threshold swing and on/off current ratio were 11.6 cm 2 /(V · s), 0.42 V dec −1 and 10 6 , respectively. The underlying mechanism was discussed. (paper)

  11. Nanowire-based gas sensors

    NARCIS (Netherlands)

    Chen, X.; Wong, C.K.Y.; Yuan, C.A.; Zhang, G.

    2013-01-01

    Gas sensors fabricated with nanowires as the detecting elements are powerful due to their many improved characteristics such as high surface-to-volume ratios, ultrasensitivity, higher selectivity, low power consumption, and fast response. This paper gives an overview on the recent process of the

  12. Programmable, automated transistor test system

    Science.gov (United States)

    Truong, L. V.; Sundburg, G. R.

    1986-01-01

    A programmable, automated transistor test system was built to supply experimental data on new and advanced power semiconductors. The data will be used for analytical models and by engineers in designing space and aircraft electric power systems. A pulsed power technique was used at low duty cycles in a nondestructive test to examine the dynamic switching characteristic curves of power transistors in the 500 to 1000 V, 10 to 100 A range. Data collection, manipulation, storage, and output are operator interactive but are guided and controlled by the system software.

  13. Modeling of planar carbon nanotube field effect transistor and three dimensional simulation of current-voltage characteristics

    International Nuclear Information System (INIS)

    Dinh Sy Hien; Nguyen Thi Luong; Thi Tran Anh Tuan; Dinh Viet Nga

    2009-01-01

    We provide a CNTFET model with planar geometry. Planar CNTFETs constitute the majority of devices fabricated to date, mostly due to their relative simplicity and moderate compatibility with existing manufacturing technologies. We explore the possibilities of using non-equilibrium Green function method to get I-V characteristics for CNTFETs. This simulator also includes a graphic user interface (GUI) of Matlab that enables parameter entry, calculation control, intuitive display of calculation results, and in-situ data analysis methods. In this paper, we review the capabilities of simulator, and give examples of typical CNTFET 3D simulations. The I-V characteristics of CNTFET are also presented.

  14. Artificial neural systems using memristive synapses and nano-crystalline silicon thin-film transistors

    Science.gov (United States)

    Cantley, Kurtis D.

    Future computer systems will not rely solely on digital processing of inputs from well-defined data sets. They will also be required to perform various computational tasks using large sets of ill-defined information from the complex environment around them. The most efficient processor of this type of information known today is the human brain. Using a large number of primitive elements (˜1010 neurons in the neocortex) with high parallel connectivity (each neuron has ˜104 synapses), brains have the remarkable ability to recognize and classify patterns, predict outcomes, and learn from and adapt to incredibly diverse sets of problems. A reasonable goal in the push to increase processing power of electronic systems would thus be to implement artificial neural networks in hardware that are compatible with today's digital processors. This work focuses on the feasibility of utilizing non-crystalline silicon devices in neuromorphic electronics. Hydrogenated amorphous silicon (a-Si:H) nanowire transistors with Schottky barrier source/drain junctions, as well as a-Si:H/Ag resistive switches are fabricated and characterized. In the transistors, it is found that the on-current scales linearly with the effective width W eff of the channel nanowire array down to at least 20 nm. The solid-state electrolyte resistive switches (memristors) are shown to exhibit the proper current-voltage hysteresis. SPICE models of similar devices are subsequently developed to investigate their performance in neural circuits. The resulting SPICE simulations demonstrate spiking properties and synaptic learning rules that are incredibly similar to those in biology. Specifically, the neuron circuits can be designed to mimic the firing characteristics of real neurons, and Hebbian learning rules are investigated. Finally, some applications are presented, including associative learning analogous to the classical conditioning experiments originally performed by Pavlov, and frequency and pattern

  15. Effect of hydrofluoric acid concentration on the evolution of photoluminescence characteristics in porous silicon nanowires prepared by Ag-assisted electroless etching method

    KAUST Repository

    Najar, Adel; Anjum, Dalaver H.; Hedhili, Mohamed N.; Ng, Tien Khee; Ooi, Boon S.; Ben Slimane, Ahmed; Sougrat, Rachid

    2012-01-01

    We report on the structural and optical properties of porous silicon nanowires (PSiNWs) fabricated using silver (Ag) ions assisted electroless etching method. Silicon nanocrystallites with sizes <5 nm embedded in amorphous silica have been

  16. Electrical Control of g-Factor in a Few-Hole Silicon Nanowire MOSFET.

    Science.gov (United States)

    Voisin, B; Maurand, R; Barraud, S; Vinet, M; Jehl, X; Sanquer, M; Renard, J; De Franceschi, S

    2016-01-13

    Hole spins in silicon represent a promising yet barely explored direction for solid-state quantum computation, possibly combining long spin coherence, resulting from a reduced hyperfine interaction, and fast electrically driven qubit manipulation. Here we show that a silicon-nanowire field-effect transistor based on state-of-the-art silicon-on-insulator technology can be operated as a few-hole quantum dot. A detailed magnetotransport study of the first accessible hole reveals a g-factor with unexpectedly strong anisotropy and gate dependence. We infer that these two characteristics could enable an electrically driven g-tensor-modulation spin resonance with Rabi frequencies exceeding several hundred mega-Hertz.

  17. Silicon nanowire arrays as learning chemical vapour classifiers

    International Nuclear Information System (INIS)

    Niskanen, A O; Colli, A; White, R; Li, H W; Spigone, E; Kivioja, J M

    2011-01-01

    Nanowire field-effect transistors are a promising class of devices for various sensing applications. Apart from detecting individual chemical or biological analytes, it is especially interesting to use multiple selective sensors to look at their collective response in order to perform classification into predetermined categories. We show that non-functionalised silicon nanowire arrays can be used to robustly classify different chemical vapours using simple statistical machine learning methods. We were able to distinguish between acetone, ethanol and water with 100% accuracy while methanol, ethanol and 2-propanol were classified with 96% accuracy in ambient conditions.

  18. Transport Phenomena in Nanowires, Nanotubes, and Other Low-Dimensional Systems

    KAUST Repository

    Montes, Enrique

    2017-01-01

    Nanoscale materials are not new in either nature or physics. However, the recent technological improvements have given scientists new tools to understand and quantify phenomena that occur naturally due to quantum confinement effects. In general, these phenomena induce remarkable optical, magnetic, and electronic properties in nanoscale materials in contrast to their bulk counterpart. In addition, scientists have recently developed the necessary tools to control and exploit these properties in electronic devices, in particular field effect transistors, magnetic memories, and gas sensors. In the present thesis we implement theoretical and computational tools for analyzing the ground state and electronic transport properties of nanoscale materials and their performance in electronic devices. The ground state properties are studied within density functional theory using the SIESTA code, whereas the transport properties are investigated using the non-equilibrium Green\\'s functions formalism implemented in the SMEAGOL code. First we study Si-based systems, as Si nanowires are believed to be important building blocks of the next generation of electronic devices. We derive the electron transport properties of Si nanowires connected to Au electrodes and their dependence on the nanowire growth direction, diameter, and length. At equilibrium Au-nanowire distance we find strong electronic coupling between electrodes and nanowire, resulting in low contact resistance. For the tunneling regime, the decay of the conductance with the nanowire length is rationalized using the complex band structure. The nanowires grown along the (110) direction show the smallest decay and the largest conductance and current. Due to the high spin coherence in Si, Si nanowires represent an interesting platform for spin devices. Therefore, we built a magnetic tunneling junction by connecting a (110) Si nanowire to ferromagnetic Fe electrodes. We have find a substantial low bias magnetoresistance of

  19. Effects of Si3N4 passivation on the dc and RF characteristics of metamorphic high-electron-mobility transistors depending on the gate-recess structures

    International Nuclear Information System (INIS)

    Oh, J H; Han, M; Baek, Y H; Moon, S W; Rhee, J K; Kim, S D

    2009-01-01

    Effects of the Si 3 N 4 passivation on the dc and RF characteristics of a 0.1 µm metamorphic high-electron-mobility transistor (HEMT) are investigated for narrow and wide gate-recess structures. Maximum drain-source saturation current (I dss,max ) and maximum extrinsic transconductance (g m,max ) are reduced by ∼14.8 and ∼11.6%, respectively, in the wide gate-recess structure after the passivation; on the other hand, only ∼5.7 and ∼4.9% reductions are measured from I dss,max and g m,max , respectively, in the narrow gate-recess structure. We examine the passivation-induced degradation by using a modified charge control model assuming the charged surface states on the Si 3 N 4 interface and a comparative study of the hydrodynamic device simulation with the experimental measurement. From the analysis, it is proposed that the difference of degradation in two different gate structures is due to an approximately three times higher charged surface state density of ∼4.5 × 10 11 cm −2 in the wide gate-recess structure than ∼1.6 × 10 11 cm −2 in the narrow gate-recess structure. The cut-off frequency (f T ) of the wide gate-recess structure also exhibits a greater reduction of ∼14.5%, while the f T of the narrow gate-recess structure is reduced by only ∼6.6% after the passivation. This is mainly due to the passivation-induced surface states of a higher density in the wide gate-recess structure. A great increase of the gate-to-drain parasitic capacitance in the wide gate-recess structure makes a major contribution to ∼13.5% degradation of the maximum frequency of oscillation

  20. Interface characteristics of spin-on-dielectric SiO{sub x}-buffered passivation layers for AlGaN/GaN high electron mobility transistors

    Energy Technology Data Exchange (ETDEWEB)

    Ko, Pil-Seok; Park, Kyoung-Seok; Yoon, Yeo-Chang [Division of Electronics and Electrical Engineering, Dongguk University, 100-715 Seoul (Korea, Republic of); Sheen, Mi-Hyang [Department of Materials Science Engineering, Seoul National University, 151-742 Seoul (Korea, Republic of); Kim, Sam-Dong, E-mail: samdong@dongguk.edu [Division of Electronics and Electrical Engineering, Dongguk University, 100-715 Seoul (Korea, Republic of)

    2015-08-31

    To reveal the cause for significant enhancement of dc current performance of the AlGaN/GaN high electron mobility transistors (HEMTs) with the spin-on-dielectric (SOD) SiO{sub x}-buffered passivation structure compared to the conventional Si{sub 3}N{sub 4} passivation deposited by plasma-enhanced vapor deposition (PECVD), we characterized the passivation interfaces using the cross-sectional transmission electron microscopy, cathodoluminescence, capacitance–voltage (C–V) characterizations, and Hall-effect measurements. The interface state density of PECVD Si{sub 3}N{sub 4} passivation was in the range of 10{sup 12}–10{sup 13} cm{sup −2} eV{sup −1}, which is one-order higher than that of the SOD (10{sup 11}–10{sup 12} cm{sup −2} eV{sup −1}) as measured by C–V measurements from the metal–insulator–semiconductor capacitors. Higher density of effective oxide charge density (especially dominant contribution of ionic mobile charge) was also derived from the PECVD Si{sub 3}N{sub 4} passivation. A well-resolved reduction of the electron Hall mobility of the Si{sub 3}N{sub 4} passivation compared to that of the perhydropolysilazane SOD passivation, which can be due to the higher-density interface states and trap charges, can answer the relative dc current collapse of our HEMT devices. - Highlights: • Spin-on-dielectric (SOD)-buffered passivation for AlGaN/GaN HEMTs • Characterize the charge density and interface states using the C–V measurements • SOD-buffered passivation minimizes surface states at the interface. • DC performance of SOD-buffered structure is due to the interface characteristics.

  1. High mobility and quantum well transistors design and TCAD simulation

    CERN Document Server

    Hellings, Geert

    2013-01-01

    For many decades, the semiconductor industry has miniaturized transistors, delivering increased computing power to consumers at decreased cost. However, mere transistor downsizing does no longer provide the same improvements. One interesting option to further improve transistor characteristics is to use high mobility materials such as germanium and III-V materials. However, transistors have to be redesigned in order to fully benefit from these alternative materials. High Mobility and Quantum Well Transistors: Design and TCAD Simulation investigates planar bulk Germanium pFET technology in chapters 2-4, focusing on both the fabrication of such a technology and on the process and electrical TCAD simulation. Furthermore, this book shows that Quantum Well based transistors can leverage the benefits of these alternative materials, since they confine the charge carriers to the high-mobility material using a heterostructure. The design and fabrication of one particular transistor structure - the SiGe Implant-Free Qu...

  2. Design and Characterisation of III-V Semiconductor Nanowire Lasers

    Science.gov (United States)

    Saxena, Dhruv

    The development of small, power-efficient lasers underpins many of the technologies that we utilise today. Semiconductor nanowires are promising for miniaturising lasers to even smaller dimensions. III-V semiconductors, such as Gallium Arsenide (GaAs) and Indium Phosphide (InP), are the most widely used materials for optoelectronic devices and so the development of nanowire lasers based on these materials is expected to have technologically significant outcomes. This PhD dissertation presents a comprehensive study of the design of III-V semiconductor nanowire lasers, with bulk and quantum confined active regions. Based on the design, various III-V semiconductor nanowire lasers are demonstrated, namely, GaAs nanowire lasers, GaAs/AlGaAs multi-quantum well (MQW) nanowire lasers and InP nanowire lasers. These nanowire lasers are shown to operate at room temperature, have low thresholds, and lase from different transverse modes. The structural and optoelectronic quality of nanowire lasers are characterised via electron microscopy and photoluminescence spectroscopic techniques. Lasing is characterised in all these devices by optical pumping. The lasing characteristics are analysed by rate equation modelling and the lasing mode(s) in these devices is characterised by threshold gain modelling, polarisation measurements and Fourier plane imaging. Firstly, GaAs nanowire lasers that operate at room temperature are demonstrated. This is achieved by determining the optimal nanowire diameter to reduce threshold gain and by passivating nanowires to improve their quantum efficiency (QE). High-quality surface passivated GaAs nanowires of suitable diameters are grown. The growth procedure is tailored to improve both QE and structural uniformity of nanowires. Room-temperature lasing is demonstrated from individual nanowires and lasing is characterised to be from TM01 mode by threshold gain modelling. To lower threshold even further, nanowire lasers with GaAs/AlGaAs coaxial multi

  3. Understanding InP Nanowire Array Solar Cell Performance by Nanoprobe-Enabled Single Nanowire Measurements.

    Science.gov (United States)

    Otnes, Gaute; Barrigón, Enrique; Sundvall, Christian; Svensson, K Erik; Heurlin, Magnus; Siefer, Gerald; Samuelson, Lars; Åberg, Ingvar; Borgström, Magnus T

    2018-05-09

    III-V solar cells in the nanowire geometry might hold significant synthesis-cost and device-design advantages as compared to thin films and have shown impressive performance improvements in recent years. To continue this development there is a need for characterization techniques giving quick and reliable feedback for growth development. Further, characterization techniques which can improve understanding of the link between nanowire growth conditions, subsequent processing, and solar cell performance are desired. Here, we present the use of a nanoprobe system inside a scanning electron microscope to efficiently contact single nanowires and characterize them in terms of key parameters for solar cell performance. Specifically, we study single as-grown InP nanowires and use electron beam induced current characterization to understand the charge carrier collection properties, and dark current-voltage characteristics to understand the diode recombination characteristics. By correlating the single nanowire measurements to performance of fully processed nanowire array solar cells, we identify how the performance limiting parameters are related to growth and/or processing conditions. We use this understanding to achieve a more than 7-fold improvement in efficiency of our InP nanowire solar cells, grown from a different seed particle pattern than previously reported from our group. The best cell shows a certified efficiency of 15.0%; the highest reported value for a bottom-up synthesized InP nanowire solar cell. We believe the presented approach have significant potential to speed-up the development of nanowire solar cells, as well as other nanowire-based electronic/optoelectronic devices.

  4. Magnetic and superconducting nanowires

    DEFF Research Database (Denmark)

    Piraux, L.; Encinas, A.; Vila, L.

    2005-01-01

    magnetic and superconducting nanowires. Using different approaches entailing measurements on both single wires and arrays, numerous interesting physical properties have been identified in relation to the nanoscopic dimensions of these materials. Finally, various novel applications of the nanowires are also...

  5. Vertical nanowire architectures

    DEFF Research Database (Denmark)

    Vlad, A.; Mátéfl-Tempfli, M.; Piraux, L.

    2010-01-01

    Nanowires and statistics: A statistical process for reading ultradense arrays of nanostructured materials is presented (see image). The experimental realization is achieved through selective nanowire growth using porous alumina templates. The statistical patterning approach is found to provide ri...

  6. Long term stability of nanowire nanoelectronics in physiological environments.

    Science.gov (United States)

    Zhou, Wei; Dai, Xiaochuan; Fu, Tian-Ming; Xie, Chong; Liu, Jia; Lieber, Charles M

    2014-03-12

    Nanowire nanoelectronic devices have been exploited as highly sensitive subcellular resolution detectors for recording extracellular and intracellular signals from cells, as well as from natural and engineered/cyborg tissues, and in this capacity open many opportunities for fundamental biological research and biomedical applications. Here we demonstrate the capability to take full advantage of the attractive capabilities of nanowire nanoelectronic devices for long term physiological studies by passivating the nanowire elements with ultrathin metal oxide shells. Studies of Si and Si/aluminum oxide (Al2O3) core/shell nanowires in physiological solutions at 37 °C demonstrate long-term stability extending for at least 100 days in samples coated with 10 nm thick Al2O3 shells. In addition, investigations of nanowires configured as field-effect transistors (FETs) demonstrate that the Si/Al2O3 core/shell nanowire FETs exhibit good device performance for at least 4 months in physiological model solutions at 37 °C. The generality of this approach was also tested with in studies of Ge/Si and InAs nanowires, where Ge/Si/Al2O3 and InAs/Al2O3 core/shell materials exhibited stability for at least 100 days in physiological model solutions at 37 °C. In addition, investigations of hafnium oxide-Al2O3 nanolaminated shells indicate the potential to extend nanowire stability well beyond 1 year time scale in vivo. These studies demonstrate that straightforward core/shell nanowire nanoelectronic devices can exhibit the long term stability needed for a range of chronic in vivo studies in animals as well as powerful biomedical implants that could improve monitoring and treatment of disease.

  7. Analog performance of vertical nanowire TFETs as a function of temperature and transport mechanism

    Science.gov (United States)

    Martino, Marcio Dalla Valle; Neves, Felipe; Ghedini Der Agopian, Paula; Martino, João Antonio; Vandooren, Anne; Rooyackers, Rita; Simoen, Eddy; Thean, Aaron; Claeys, Cor

    2015-10-01

    The goal of this work is to study the analog performance of tunnel field effect transistors (TFETs) and its susceptibility to temperature variation and to different dominant transport mechanisms. The experimental input characteristic of nanowire TFETs with different source compositions (100% Si and Si1-xGex) has been presented, leading to the extraction of the Activation Energy for each bias condition. These first results have been connected to the prevailing transport mechanism for each configuration, namely band-to-band tunneling (BTBT) or trap assisted tunneling (TAT). Afterward, this work analyzes the analog behavior, with the intrinsic voltage gain calculated in terms of Early voltage, transistor efficiency, transconductance and output conductance. Comparing the results for devices with different source compositions, it is interesting to note how the analog trends vary depending on the source characteristics and the prevailing transport mechanisms. This behavior results in a different suitability analysis depending on the working temperature. In other words, devices with full-Silicon source and non-abrupt junction profile present the worst intrinsic voltage gain at room temperature, but the best results for high temperatures. This was possible since, among the 4 studied devices, this configuration was the only one with a positive intrinsic voltage gain dependence on the temperature variation.

  8. High-performance integrated field-effect transistor-based sensors

    Energy Technology Data Exchange (ETDEWEB)

    Adzhri, R., E-mail: adzhri@gmail.com [Institute of Nano Electronic Engineering (INEE), Universiti Malaysia Perlis (UniMAP), Kangar, Perlis (Malaysia); Md Arshad, M.K., E-mail: mohd.khairuddin@unimap.edu.my [Institute of Nano Electronic Engineering (INEE), Universiti Malaysia Perlis (UniMAP), Kangar, Perlis (Malaysia); School of Microelectronic Engineering (SoME), Universiti Malaysia Perlis (UniMAP), Kangar, Perlis (Malaysia); Gopinath, Subash C.B., E-mail: subash@unimap.edu.my [Institute of Nano Electronic Engineering (INEE), Universiti Malaysia Perlis (UniMAP), Kangar, Perlis (Malaysia); School of Bioprocess Engineering (SBE), Universiti Malaysia Perlis (UniMAP), Arau, Perlis (Malaysia); Ruslinda, A.R., E-mail: ruslinda@unimap.edu.my [Institute of Nano Electronic Engineering (INEE), Universiti Malaysia Perlis (UniMAP), Kangar, Perlis (Malaysia); Fathil, M.F.M., E-mail: faris.fathil@gmail.com [Institute of Nano Electronic Engineering (INEE), Universiti Malaysia Perlis (UniMAP), Kangar, Perlis (Malaysia); Ayub, R.M., E-mail: ramzan@unimap.edu.my [Institute of Nano Electronic Engineering (INEE), Universiti Malaysia Perlis (UniMAP), Kangar, Perlis (Malaysia); Nor, M. Nuzaihan Mohd, E-mail: m.nuzaihan@unimap.edu.my [Institute of Nano Electronic Engineering (INEE), Universiti Malaysia Perlis (UniMAP), Kangar, Perlis (Malaysia); Voon, C.H., E-mail: chvoon@unimap.edu.my [Institute of Nano Electronic Engineering (INEE), Universiti Malaysia Perlis (UniMAP), Kangar, Perlis (Malaysia)

    2016-04-21

    Field-effect transistors (FETs) have succeeded in modern electronics in an era of computers and hand-held applications. Currently, considerable attention has been paid to direct electrical measurements, which work by monitoring changes in intrinsic electrical properties. Further, FET-based sensing systems drastically reduce cost, are compatible with CMOS technology, and ease down-stream applications. Current technologies for sensing applications rely on time-consuming strategies and processes and can only be performed under recommended conditions. To overcome these obstacles, an overview is presented here in which we specifically focus on high-performance FET-based sensor integration with nano-sized materials, which requires understanding the interaction of surface materials with the surrounding environment. Therefore, we present strategies, material depositions, device structures and other characteristics involved in FET-based devices. Special attention was given to silicon and polyaniline nanowires and graphene, which have attracted much interest due to their remarkable properties in sensing applications. - Highlights: • Performance of FET-based biosensors for the detection of biomolecules is presented. • Silicon nanowire, polyaniline and graphene are the highlighted nanoscaled materials as sensing transducers. • The importance of surface material interaction with the surrounding environment is discussed. • Different device structure architectures for ease in fabrication and high sensitivity of sensing are presented.

  9. High-performance integrated field-effect transistor-based sensors

    International Nuclear Information System (INIS)

    Adzhri, R.; Md Arshad, M.K.; Gopinath, Subash C.B.; Ruslinda, A.R.; Fathil, M.F.M.; Ayub, R.M.; Nor, M. Nuzaihan Mohd; Voon, C.H.

    2016-01-01

    Field-effect transistors (FETs) have succeeded in modern electronics in an era of computers and hand-held applications. Currently, considerable attention has been paid to direct electrical measurements, which work by monitoring changes in intrinsic electrical properties. Further, FET-based sensing systems drastically reduce cost, are compatible with CMOS technology, and ease down-stream applications. Current technologies for sensing applications rely on time-consuming strategies and processes and can only be performed under recommended conditions. To overcome these obstacles, an overview is presented here in which we specifically focus on high-performance FET-based sensor integration with nano-sized materials, which requires understanding the interaction of surface materials with the surrounding environment. Therefore, we present strategies, material depositions, device structures and other characteristics involved in FET-based devices. Special attention was given to silicon and polyaniline nanowires and graphene, which have attracted much interest due to their remarkable properties in sensing applications. - Highlights: • Performance of FET-based biosensors for the detection of biomolecules is presented. • Silicon nanowire, polyaniline and graphene are the highlighted nanoscaled materials as sensing transducers. • The importance of surface material interaction with the surrounding environment is discussed. • Different device structure architectures for ease in fabrication and high sensitivity of sensing are presented.

  10. Towards low-dimensional hole systems in Be-doped GaAs nanowires

    DEFF Research Database (Denmark)

    Ullah, A. R.; Gluschke, J. G.; Jeppesen, Peter Krogstrup

    2017-01-01

    -gates produced using GaAs nanowires with three different Be-doping densities and various AuBe contact processing recipes. We show that contact annealing only brings small improvements for the moderately doped devices under conditions of lower anneal temperature and short anneal time. We only obtain good......GaAs was central to the development of quantum devices but is rarely used for nanowire-based quantum devices with InAs, InSb and SiGe instead taking the leading role. p-type GaAs nanowires offer a path to studying strongly confined 0D and 1D hole systems with strong spin–orbit effects, motivating...... our development of nanowire transistors featuring Be-doped p-type GaAs nanowires, AuBe alloy contacts and patterned local gate electrodes towards making nanowire-based quantum hole devices. We report on nanowire transistors with traditional substrate back-gates and EBL-defined metal/oxide top...

  11. GaN Nanowire Devices: Fabrication and Characterization

    Science.gov (United States)

    Scott, Reum

    The development of microelectronics in the last 25 years has been characterized by an exponential increase of the bit density in integrated circuits (ICs) with time. Scaling solid-state devices improves cost, performance, and power; as such, it is of particular interest for companies, who gain a market advantage with the latest technology. As a result, the microelectronics industry has driven transistor feature size scaling from 10 μm to ~30 nm during the past 40 years. This trend has persisted for 40 years due to optimization, new processing techniques, device structures, and materials. But when noting processor speeds from the 1970's to 2009 and then again in 2010, the implication would be that the trend has ceased. To address the challenge of shrinking the integrated circuit (IC), current research is centered on identifying new materials and devices that can supplement and/or potentially supplant it. Bottom-up methods tailor nanoscale building blocks---atoms, molecules, quantum dots, and nanowires (NWs)---to be used to overcome these limitations. The Group IIIA nitrides (InN, AlN, and GaN) possess appealing properties such as a direct band gap spanning the whole solar spectrum, high saturation velocity, and high breakdown electric field. As a result nanostructures and nanodevices made from GaN and related nitrides are suitable candidates for efficient nanoscale UV/ visible light emitters, detectors, and gas sensors. To produce devices with such small structures new fabrication methods must be implemented. Devices composed of GaN nanowires were fabricated using photolithography and electron beam lithography. The IV characteristics of these devices were noted under different illuminations and the current tripled from 4.8*10-7 A to 1.59*10 -6 A under UV light which persisted for at least 5hrs.

  12. Nanowire FET Based Neural Element for Robotic Tactile Sensing Skin

    Directory of Open Access Journals (Sweden)

    William Taube Navaraj

    2017-09-01

    Full Text Available This paper presents novel Neural Nanowire Field Effect Transistors (υ-NWFETs based hardware-implementable neural network (HNN approach for tactile data processing in electronic skin (e-skin. The viability of Si nanowires (NWs as the active material for υ-NWFETs in HNN is explored through modeling and demonstrated by fabricating the first device. Using υ-NWFETs to realize HNNs is an interesting approach as by printing NWs on large area flexible substrates it will be possible to develop a bendable tactile skin with distributed neural elements (for local data processing, as in biological skin in the backplane. The modeling and simulation of υ-NWFET based devices show that the overlapping areas between individual gates and the floating gate determines the initial synaptic weights of the neural network - thus validating the working of υ-NWFETs as the building block for HNN. The simulation has been further extended to υ-NWFET based circuits and neuronal computation system and this has been validated by interfacing it with a transparent tactile skin prototype (comprising of 6 × 6 ITO based capacitive tactile sensors array integrated on the palm of a 3D printed robotic hand. In this regard, a tactile data coding system is presented to detect touch gesture and the direction of touch. Following these simulation studies, a four-gated υ-NWFET is fabricated with Pt/Ti metal stack for gates, source and drain, Ni floating gate, and Al2O3 high-k dielectric layer. The current-voltage characteristics of fabricated υ-NWFET devices confirm the dependence of turn-off voltages on the (synaptic weight of each gate. The presented υ-NWFET approach is promising for a neuro-robotic tactile sensory system with distributed computing as well as numerous futuristic applications such as prosthetics, and electroceuticals.

  13. Surface roughness induced electron mobility degradation in InAs nanowires

    International Nuclear Information System (INIS)

    Wang Fengyun; Yip, Sen Po; Han, Ning; Fok, KitWa; Lin, Hao; Hou, Jared J; Dong, Guofa; Hung, Tak Fu; Chan, K S; Ho, Johnny C

    2013-01-01

    In this work, we present a study of the surface roughness dependent electron mobility in InAs nanowires grown by the nickel-catalyzed chemical vapor deposition method. These nanowires have good crystallinity, well-controlled surface morphology without any surface coating or tapering and an excellent peak field-effect mobility up to 15 000 cm 2 V −1 s −1 when configured into back-gated field-effect nanowire transistors. Detailed electrical characterizations reveal that the electron mobility degrades monotonically with increasing surface roughness and diameter scaling, while low-temperature measurements further decouple the effects of surface/interface traps and phonon scattering, highlighting the dominant impact of surface roughness scattering on the electron mobility for miniaturized and surface disordered nanowires. All these factors suggest that careful consideration of nanowire geometries and surface condition is required for designing devices with optimal performance. (paper)

  14. Colour tuneable light-emitting transistor

    Energy Technology Data Exchange (ETDEWEB)

    Feldmeier, Eva J.; Melzer, Christian; Seggern, Heinz von [Electronic Materials Department, Institute of Materials Science, Technische Universitaet Darmstadt (Germany)

    2010-07-01

    In recent years the interest in ambipolar organic light-emitting field-effect transistors has increased steadily as the devices combine switching behaviour of transistors with light emission. Usually, small molecules and polymers with a band gap in the visible spectral range serve as semiconducting materials. Mandatory remain balanced injection and transport properties for both charge carrier types to provide full control of the spatial position of the recombination zone of electrons and holes in the transistor channel via the applied voltages. As will be presented here, the spatial control of the recombination zone opens new possibilities towards light-emitting devices with colour tuneable emission. In our contribution an organic light-emitting field-effect transistors is presented whose emission colour can be changed by the applied voltages. The organic top-contact field-effect transistor is based on a parallel layer stack of acenes serving as organic transport and emission layers. The transistor displays ambipolar characteristics with a narrow recombination zone within the transistor channel. During operation the recombination zone can be moved by a proper change in the drain and gate bias from one organic semiconductor layer to another one inducing a change in the emission colour. In the presented example the emission maxima can be switched from 530 nm to 580 nm.

  15. Doped Organic Transistors.

    Science.gov (United States)

    Lüssem, Björn; Keum, Chang-Min; Kasemann, Daniel; Naab, Ben; Bao, Zhenan; Leo, Karl

    2016-11-23

    Organic field-effect transistors hold the promise of enabling low-cost and flexible electronics. Following its success in organic optoelectronics, the organic doping technology is also used increasingly in organic field-effect transistors. Doping not only increases device performance, but it also provides a way to fine-control the transistor behavior, to develop new transistor concepts, and even improve the stability of organic transistors. This Review summarizes the latest progress made in the understanding of the doping technology and its application to organic transistors. It presents the most successful doping models and an overview of the wide variety of materials used as dopants. Further, the influence of doping on charge transport in the most relevant polycrystalline organic semiconductors is reviewed, and a concise overview on the influence of doping on transistor behavior and performance is given. In particular, recent progress in the understanding of contact doping and channel doping is summarized.

  16. SOI Transistor measurement techniques using body contacted transistors

    International Nuclear Information System (INIS)

    Worley, E.R.; Williams, R.

    1989-01-01

    Measurements of body contacted SOI transistors are used to isolate parameters of the back channel and island edge transistor. Properties of the edge and back channel transistor have been measured before and after X-ray irradiation (ARACOR). The unique properties of the edge transistor are shown to be a result of edge geometry as confirmed by a two dimensional transistor simulator

  17. Atomic-Resolution Spectrum Imaging of Semiconductor Nanowires.

    Science.gov (United States)

    Zamani, Reza R; Hage, Fredrik S; Lehmann, Sebastian; Ramasse, Quentin M; Dick, Kimberly A

    2018-03-14

    Over the past decade, III-V heterostructure nanowires have attracted a surge of attention for their application in novel semiconductor devices such as tunneling field-effect transistors (TFETs). The functionality of such devices critically depends on the specific atomic arrangement at the semiconductor heterointerfaces. However, most of the currently available characterization techniques lack sufficient spatial resolution to provide local information on the atomic structure and composition of these interfaces. Atomic-resolution spectrum imaging by means of electron energy-loss spectroscopy (EELS) in the scanning transmission electron microscope (STEM) is a powerful technique with the potential to resolve structure and chemical composition with sub-angstrom spatial resolution and to provide localized information about the physical properties of the material at the atomic scale. Here, we demonstrate the use of atomic-resolution EELS to understand the interface atomic arrangement in three-dimensional heterostructures in semiconductor nanowires. We observed that the radial interfaces of GaSb-InAs heterostructure nanowires are atomically abrupt, while the axial interface in contrast consists of an interfacial region where intermixing of the two compounds occurs over an extended spatial region. The local atomic configuration affects the band alignment at the interface and, hence, the charge transport properties of devices such as GaSb-InAs nanowire TFETs. STEM-EELS thus represents a very promising technique for understanding nanowire physical properties, such as differing electrical behavior across the radial and axial heterointerfaces of GaSb-InAs nanowires for TFET applications.

  18. Fabrication of multilayer nanowires

    Energy Technology Data Exchange (ETDEWEB)

    Kaur, Jasveer, E-mail: kaurjasveer89@gmail.com; Singh, Avtar; Kumar, Davinder [Department of Physics, Punjabi University Patiala, 147002, Punjab (India); Thakur, Anup; Kaur, Raminder, E-mail: raminder-k-saini@yahoo.com [Department of Basic and Applied Sciences, Punjabi University Patiala, 147002, Punjab (India)

    2016-05-06

    Multilayer nanowires were fabricated by potentiostate ectrodeposition template synthesis method into the pores of polycarbonate membrane. In present work layer by layer deposition of two different metals Ni and Cu in polycarbonate membrane having pore size of 600 nm were carried out. It is found that the growth of nanowires is not constant, it varies with deposition time. Scanning electron microscopy (SEM) is used to study the morphology of fabricated multilayer nanowires. An energy dispersive X-ray spectroscopy (EDS) results confirm the composition of multilayer nanowires. The result shows that multilayer nanowires formed is dense.

  19. Fabrication of multilayer nanowires

    International Nuclear Information System (INIS)

    Kaur, Jasveer; Singh, Avtar; Kumar, Davinder; Thakur, Anup; Kaur, Raminder

    2016-01-01

    Multilayer nanowires were fabricated by potentiostate ectrodeposition template synthesis method into the pores of polycarbonate membrane. In present work layer by layer deposition of two different metals Ni and Cu in polycarbonate membrane having pore size of 600 nm were carried out. It is found that the growth of nanowires is not constant, it varies with deposition time. Scanning electron microscopy (SEM) is used to study the morphology of fabricated multilayer nanowires. An energy dispersive X-ray spectroscopy (EDS) results confirm the composition of multilayer nanowires. The result shows that multilayer nanowires formed is dense.

  20. Si/Ge hetero-structure nanotube tunnel field effect transistor

    KAUST Repository

    Hanna, A. N.

    2015-01-07

    We discuss the physics of conventional channel material (silicon/germanium hetero-structure) based transistor topology mainly core/shell (inner/outer) gated nanotube vs. gate-all-around nanowire architecture for tunnel field effect transistor application. We show that nanotube topology can result in higher performance through higher normalized current when compared to nanowire architecture at Vdd-=-1-V due to the availability of larger tunneling cross section and lower Shockley-Reed-Hall recombination. Both architectures are able to achieve sub 60-mV/dec performance for more than five orders of magnitude of drain current. This enables the nanotube configuration achieving performance same as the nanowire architecture even when Vdd is scaled down to 0.5-V.

  1. Si/Ge hetero-structure nanotube tunnel field effect transistor

    KAUST Repository

    Hanna, A. N.; Hussain, Muhammad Mustafa

    2015-01-01

    We discuss the physics of conventional channel material (silicon/germanium hetero-structure) based transistor topology mainly core/shell (inner/outer) gated nanotube vs. gate-all-around nanowire architecture for tunnel field effect transistor application. We show that nanotube topology can result in higher performance through higher normalized current when compared to nanowire architecture at Vdd-=-1-V due to the availability of larger tunneling cross section and lower Shockley-Reed-Hall recombination. Both architectures are able to achieve sub 60-mV/dec performance for more than five orders of magnitude of drain current. This enables the nanotube configuration achieving performance same as the nanowire architecture even when Vdd is scaled down to 0.5-V.

  2. Effects of Deposition Temperature on the Device Characteristics of Oxide Thin-Film Transistors Using In-Ga-Zn-O Active Channels Prepared by Atomic-Layer Deposition.

    Science.gov (United States)

    Yoon, Sung-Min; Seong, Nak-Jin; Choi, Kyujeong; Seo, Gi-Ho; Shin, Woong-Chul

    2017-07-12

    We demonstrated the physical and electrical properties of the In-Ga-Zn-O (IGZO) thin films prepared by atomic-layer deposition (ALD) method and investigated the effects of the ALD temperature. The film composition (atomic ratio of In:Ga:Zn) and film density were examined to be 1:1:3 and 5.9 g/cm 3 , respectively, for all the temperature conditions. The optical band gaps decreased from 3.81 to 3.21 eV when the ALD temperature increased from 130 to 170 °C. The amounts of oxygen-related defects such as oxygen vacancies increased with increasing the ALD temperature. It was found from the in situ temperature-dependent electrical conductivity measurements that the electronic natures including the defect structures and conduction mechanism of the IGZO thin films prepared at different temperatures showed marked variations. The carrier mobilities in the saturation regions (μ sat 's) for the fabricated thin film transistors (TFTs) using the IGZO channel layers were estimated to be 6.1 to 14.8 cm 2 V -1 s -1 with increasing the ALD temperature from 130 to 170 °C. Among the devices, when the ALD temperature was controlled to be 150 °C, the IGZO TFTs showed the best performance, which resulted from the fact that the amounts of oxygen vacancies and interstitial defects could be appropriately modulated at this condition. Consequently, the μ sat , subthreshold swing, and on/off ratio for the TFT using the IGZO channel prepared at 150 °C showed 10.4 cm 2 V -1 s -1 , 90 mV/dec, and 2 × 10 9 , respectively. The threshold voltage shifts of this device could also be effectively reduced to be 0.6 and -3.2 V under the positive-bias and negative-bias-illumination stress conditions. These obtained characteristics can be comparable to those for the sputter-deposited IGZO TFTs.

  3. Nanowire Growth for Photovoltaics

    DEFF Research Database (Denmark)

    Holm, Jeppe Vilstrup

    Solar cells commercial success is based on an efficiency/cost calculation. Nanowire solar cells is one of the foremost candidates to implement third generation photo voltaics, which are both very efficient and cheap to produce. This thesis is about our progress towards commercial nanowire solar...... cells. Resonance effects between the light and nanowire causes an inherent concentration of the sunlight into the nanowires, and means that a sparse array of nanowires (less than 5% of the area) can absorb all the incoming light. The resonance effects, as well as a graded index of refraction, also traps...... the light. The concentration and light trapping means that single junction nanowire solar cells have a higher theoretical maximum efficiency than equivalent planar solar cells. We have demonstrated the built-in light concentration of nanowires, by growing, contacting and characterizing a solar cell...

  4. Scalable fabrication of self-aligned graphene transistors and circuits on glass.

    Science.gov (United States)

    Liao, Lei; Bai, Jingwei; Cheng, Rui; Zhou, Hailong; Liu, Lixin; Liu, Yuan; Huang, Yu; Duan, Xiangfeng

    2012-06-13

    Graphene transistors are of considerable interest for radio frequency (rf) applications. High-frequency graphene transistors with the intrinsic cutoff frequency up to 300 GHz have been demonstrated. However, the graphene transistors reported to date only exhibit a limited extrinsic cutoff frequency up to about 10 GHz, and functional graphene circuits demonstrated so far can merely operate in the tens of megahertz regime, far from the potential the graphene transistors could offer. Here we report a scalable approach to fabricate self-aligned graphene transistors with the extrinsic cutoff frequency exceeding 50 GHz and graphene circuits that can operate in the 1-10 GHz regime. The devices are fabricated on a glass substrate through a self-aligned process by using chemical vapor deposition (CVD) grown graphene and a dielectrophoretic assembled nanowire gate array. The self-aligned process allows the achievement of unprecedented performance in CVD graphene transistors with a highest transconductance of 0.36 mS/μm. The use of an insulating substrate minimizes the parasitic capacitance and has therefore enabled graphene transistors with a record-high extrinsic cutoff frequency (> 50 GHz) achieved to date. The excellent extrinsic cutoff frequency readily allows configuring the graphene transistors into frequency doubling or mixing circuits functioning in the 1-10 GHz regime, a significant advancement over previous reports (∼20 MHz). The studies open a pathway to scalable fabrication of high-speed graphene transistors and functional circuits and represent a significant step forward to graphene based radio frequency devices.

  5. Ion-step method for surface potential sensing of silicon nanowires

    NARCIS (Netherlands)

    Chen, S.; van Nieuwkasteele, Jan William; van den Berg, Albert; Eijkel, Jan C.T.

    2016-01-01

    This paper presents a novel stimulus-response method for surface potential sensing of silicon nanowire (Si NW) field-effect transistors. When an "ion-step" from low to high ionic strength is given as a stimulus to the gate oxide surface, an increase of double layer capacitance is therefore expected.

  6. Specific and reversible immobilization of histidine-tagged proteins on functionalized silicon nanowires

    DEFF Research Database (Denmark)

    Liu, Yi-Chi; Rieben, Nathalie Ines; Iversen, Lars

    2010-01-01

    Silicon nanowire (Si NW)-based field effect transistors (FETs) have shown great potential as biosensors (bioFETs) for ultra-sensitive and label-free detection of biomolecular interactions. Their sensitivity depends not only on the device properties, but also on the function of the biological reco...

  7. 3D NANOTUBE FIELD EFFECT TRANSISTORS FOR HYBRID HIGH-PERFORMANCE AND LOW-POWER OPERATION WITH HIGH CHIP-AREA EFFICIENCY

    KAUST Repository

    Fahad, Hossain M.

    2014-03-01

    Information anytime and anywhere has ushered in a new technological age where massive amounts of ‘big data’ combined with self-aware and ubiquitous interactive computing systems is shaping our daily lives. As society gravitates towards a smart living environment and a sustainable future, the demand for faster and more computationally efficient electronics will continue to rise. Keeping up with this demand requires extensive innovation at the transistor level, which is at the core of all electronics. Up until recently, classical silicon transistor technology has traditionally been weary of disruptive innovation. But with the aggressive scaling trend, there has been two dramatic changes to the transistor landscape. The first was the re-introduction of metal/high-K gate stacks with strain engineering in the 45 nm technology node, which enabled further scaling on silicon to smaller nodes by alleviating the problem of gate leakage and improving the channel mobility. The second innovation was the use of non-planar 3D silicon fins as opposed to classical planar architectures for stronger electrostatic control leading to significantly lower off-state leakage and other short-channel effects. Both these innovations have prolonged the life of silicon based electronics by at least another 1-2 decades. The next generation 14 nm technology node will utilize silicon fin channels that have gate lengths of 14 nm and fin thicknesses of 7 nm. These dimensions are almost at the extreme end of current lithographic capabilities. Moreover, as fins become smaller, the parasitic capacitances and resistances increase significantly resulting in degraded performance. It is of popular consensus that the next evolutionary step in transistor technology is in the form of gate-all-around silicon nanowires (GAA NWFETs), which offer the tightest electrostatic configuration leading to the lowest possible leakage and short channel characteristics in over-the-barrier type devices. However, to keep

  8. Substrate and Mg doping effects in GaAs nanowires

    Directory of Open Access Journals (Sweden)

    Perumal Kannappan

    2017-10-01

    Full Text Available Mg doping of GaAs nanowires has been established as a viable alternative to Be doping in order to achieve p-type electrical conductivity. Although reports on the optical properties are available, few reports exist about the physical properties of intermediate-to-high Mg doping in GaAs nanowires grown by molecular beam epitaxy (MBE on GaAs(111B and Si(111 substrates. In this work, we address this topic and present further understanding on the fundamental aspects. As the Mg doping was increased, structural and optical investigations revealed: i a lower influence of the polytypic nature of the GaAs nanowires on their electronic structure; ii a considerable reduction of the density of vertical nanowires, which is almost null for growth on Si(111; iii the occurrence of a higher WZ phase fraction, in particular for growth on Si(111; iv an increase of the activation energy to release the less bound carrier in the radiative state from nanowires grown on GaAs(111B; and v a higher influence of defects on the activation of nonradiative de-excitation channels in the case of nanowires only grown on Si(111. Back-gate field effect transistors were fabricated with individual nanowires and the p-type electrical conductivity was measured with free hole concentration ranging from 2.7 × 1016 cm−3 to 1.4 × 1017 cm−3. The estimated electrical mobility was in the range ≈0.3–39 cm2/Vs and the dominant scattering mechanism is ascribed to the WZ/ZB interfaces. Electrical and optical measurements showed a lower influence of the polytypic structure of the nanowires on their electronic structure. The involvement of Mg in one of the radiative transitions observed for growth on the Si(111 substrate is suggested.

  9. Orientation Effects in Ballistic High-Strained P-type Si Nanowire FETs

    Directory of Open Access Journals (Sweden)

    Hong Yu

    2009-04-01

    Full Text Available In order to design and optimize high-sensitivity silicon nanowire-field-effect transistor (SiNW FET pressure sensors, this paper investigates the effects of channel orientations and the uniaxial stress on the ballistic hole transport properties of a strongly quantized SiNW FET placed near the high stress regions of the pressure sensors. A discrete stress-dependent six-band k.p method is used for subband structure calculation, coupled to a two-dimensional Poisson solver for electrostatics. A semi-classical ballistic FET model is then used to evaluate the ballistic current-voltage characteristics of SiNW FETs with and without strain. Our results presented here indicate that [110] is the optimum orientation for the p-type SiNW FETs and sensors. For the ultra-scaled 2.2 nm square SiNW, due to the limit of strong quantum confinement, the effect of the uniaxial stress on the magnitude of ballistic drive current is too small to be considered, except for the [100] orientation. However, for larger 5 nm square SiNW transistors with various transport orientations, the uniaxial tensile stress obviously alters the ballistic performance, while the uniaxial compressive stress slightly changes the ballistic hole current. Furthermore, the competition of injection velocity and carrier density related to the effective hole masses is found to play a critical role in determining the performance of the nanotransistors.

  10. Fe nanoparticle tailored poly(N-methyl pyrrole) nanowire matrix: a CHEMFET study from the perspective of discrimination among electron donating analytes

    International Nuclear Information System (INIS)

    Datta, K; Rushi, A; Shirsat, M; Mulchandani, A; Ghosh, P

    2015-01-01

    Back-gated chemically sensitive field effect transistor (CHEMFET) platforms have been developed with electrochemically synthesized poly(N-methyl pyrrole) nanowires by a templateless route. The nanowire matrix has been tailored with Fe nanoparticles to probe their effect in enhancing the sensing capabilities of the nanowire platform, and further to see if the inculcation of Fe nanoparticles is helpful to enhance the screening capability of the sensor among electron donating analytes. A noticeable difference in the sensing behaviour of the CHEMFET sensor was observed when it was exposed to three different analytes—ammonia, phosphine and carbon monoxide. FET transfer characteristics were instrumental in the corroboration of the experimental validations. The observations have been rationalized considering the simultaneous modulation of the work functions of Fe and polymeric material. The real time behaviour of the sensor shows that the sensor platform is readily capable of sensing the validated analytes at a ppb level of concentration with good response and recovery behaviour. The best response could be observed for ammonia with an Fe nanoparticle tailored polymeric matrix, with a sensitivity of ∼31.58% and excellent linearity (R 2 = 0.985) in a concentration window of 0.05 ppm to 1 ppm. (paper)

  11. Electrical characteristics of vapor deposited amorphous MoS2 two-terminal structures and back gate thin film transistors with Al, Au, Cu and Ni-Au contacts

    International Nuclear Information System (INIS)

    Kouvatsos, Dimitrios N.; Papadimitropoulos, Georgios; Spiliotis, Thanassis; Vasilopoulou, Maria; Davazoglou, Dimitrios; Barreca, Davide; Gasparotto, Alberto

    2015-01-01

    Amorphous molybdenum sulphide (a-MoS 2 ) thin films were deposited at near room temperature on oxidized silicon substrates and were electrically characterized with the use of two-terminal structures and of back-gated thin film transistors utilizing the substrate silicon as gate. Current-voltage characteristics were extracted for various metals used as pads, showing significant current variations attributable to different metal-sulphide interface properties and contact resistances, while the effect of a forming gas anneal was determined. With the use of heavily doped silicon substrates and aluminum backside deposition, thin film transistor (TFT) structures with the a-MoS 2 film as active layer were fabricated and characterized. Transfer characteristics showing a gate field effect, despite a leakage often present, were extracted for these devices, indicating that high mobility devices can be fabricated. SEM and EDXA measurements were also performed in an attempt to clarify issues related to material properties and fabrication procedures, so as to achieve a reliable and optimized a-MoS 2 TFT fabrication process. (copyright 2015 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim)

  12. Light-effect transistor (LET with multiple independent gating controls for optical logic gates and optical amplification

    Directory of Open Access Journals (Sweden)

    Jason eMarmon

    2016-03-01

    Full Text Available Modern electronics are developing electronic-optical integrated circuits, while their electronic backbone, e.g. field-effect transistors (FETs, remains the same. However, further FET down scaling is facing physical and technical challenges. A light-effect transistor (LET offers electronic-optical hybridization at the component level, which can continue Moore’s law to quantum region without requiring a FET’s fabrication complexity, e.g. physical gate and doping, by employing optical gating and photoconductivity. Multiple independent gates are therefore readily realized to achieve unique functionalities without increasing chip space. Here we report LET device characteristics and novel digital and analog applications, such as optical logic gates and optical amplification. Prototype CdSe-nanowire-based LETs show output and transfer characteristics resembling advanced FETs, e.g. on/off ratios up to ~1.0x106 with a source-drain voltage of ~1.43 V, gate-power of ~260 nW, and subthreshold swing of ~0.3 nW/decade (excluding losses. Our work offers new electronic-optical integration strategies and electronic and optical computing approaches.

  13. A Steep-Slope Transistor Combining Phase-Change and Band-to-Band-Tunneling to Achieve a sub-Unity Body Factor.

    Science.gov (United States)

    Vitale, Wolfgang A; Casu, Emanuele A; Biswas, Arnab; Rosca, Teodor; Alper, Cem; Krammer, Anna; Luong, Gia V; Zhao, Qing-T; Mantl, Siegfried; Schüler, Andreas; Ionescu, A M

    2017-03-23

    Steep-slope transistors allow to scale down the supply voltage and the energy per computed bit of information as compared to conventional field-effect transistors (FETs), due to their sub-60 mV/decade subthreshold swing at room temperature. Currently pursued approaches to achieve such a subthermionic subthreshold swing consist in alternative carrier injection mechanisms, like quantum mechanical band-to-band tunneling (BTBT) in Tunnel FETs or abrupt phase-change in metal-insulator transition (MIT) devices. The strengths of the BTBT and MIT have been combined in a hybrid device architecture called phase-change tunnel FET (PC-TFET), in which the abrupt MIT in vanadium dioxide (VO 2 ) lowers the subthreshold swing of strained-silicon nanowire TFETs. In this work, we demonstrate that the principle underlying the low swing in the PC-TFET relates to a sub-unity body factor achieved by an internal differential gate voltage amplification. We study the effect of temperature on the switching ratio and the swing of the PC-TFET, reporting values as low as 4.0 mV/decade at 25 °C, 7.8 mV/decade at 45 °C. We discuss how the unique characteristics of the PC-TFET open new perspectives, beyond FETs and other steep-slope transistors, for low power electronics, analog circuits and neuromorphic computing.

  14. Ambipolar organic tri-gate transistor for low-power complementary electronics

    NARCIS (Netherlands)

    Torricelli, F.; Ghittorelli, M.; Smits, E.C.P.; Roelofs, C.; Janssen, R.A.J.; Gelinck, G.H.; Kovács-Vajna, Z.M.; Cantatore, E.

    2016-01-01

    Ambipolar transistors typically suffer from large off-current inherently due to ambipolar conduction. Using a tri-gate transistor it is shown that it is possible to electrostatically switch ambipolar polymer transistors from ambipolar to unipolar mode. In unipolar mode, symmetric characteristics

  15. From nanodiamond to nanowires.

    Energy Technology Data Exchange (ETDEWEB)

    Barnard, A.; Materials Science Division

    2005-01-01

    Recent advances in the fabrication and characterization of semiconductor and metallic nanowires are proving very successful in meeting the high expectations of nanotechnologists. Although the nanoscience surrounding sp{sup 3} bonded carbon nanotubes has continued to flourish over recent years the successful synthesis of the sp{sup 3} analogue, diamond nanowires, has been limited. This prompts questions as to whether diamond nanowires are fundamentally unstable. By applying knowledge obtained from examining the structural transformations in nanodiamond, a framework for analyzing the structure and stability of diamond nanowires may be established. One possible framework will be discussed here, supported by results of ab initio density functional theory calculations used to study the structural relaxation of nanodiamond and diamond nanowires. The results show that the structural stability and electronic properties of diamond nanowires are dependent on the surface morphology, crystallographic direction of the principal axis, and the degree of surface hydrogenation.

  16. Rapid determination of nanowires electrical properties using a dielectrophoresis-well based system

    Science.gov (United States)

    Constantinou, Marios; Hoettges, Kai F.; Krylyuk, Sergiy; Katz, Michael B.; Davydov, Albert; Rigas, Grigorios-Panagiotis; Stolojan, Vlad; Hughes, Michael P.; Shkunov, Maxim

    2017-03-01

    The use of high quality semiconducting nanomaterials for advanced device applications has been hampered by the unavoidable growth variability of electrical properties of one-dimensional nanomaterials, such as nanowires and nanotubes, thus highlighting the need for the characterization of efficient semiconducting nanomaterials. In this study, we demonstrate a low-cost, industrially scalable dielectrophoretic (DEP) nanowire assembly method for the rapid analysis of the electrical properties of inorganic single crystalline nanowires, by identifying key features in the DEP frequency response spectrum from 1 kHz to 20 MHz in just 60 s. Nanowires dispersed in anisole were characterized using a three-dimensional DEP chip (3DEP), and the resultant spectrum demonstrated a sharp change in nanowire response to DEP signal in 1-20 MHz frequency range. The 3DEP analysis, directly confirmed by field-effect transistor data, indicates that nanowires of higher quality are collected at high DEP signal frequency range above 10 MHz, whereas lower quality nanowires, with two orders of magnitude lower current per nanowire, are collected at lower DEP signal frequencies. These results show that the 3DEP platform can be used as a very efficient characterization tool of the electrical properties of rod-shaped nanoparticles to enable dielectrophoretic selective deposition of nanomaterials with superior conductivity properties.

  17. The Bipolar Field-Effect Transistor: XIII. Physical Realizations of the Transistor and Circuits (One-Two-MOS-Gates on Thin-Thick Pure-Impure Base)

    International Nuclear Information System (INIS)

    Sah, C.-T.; Jie Binbin

    2009-01-01

    This paper reports the physical realization of the Bipolar Field-Effect Transistor (BiFET) and its one-transistor basic building block circuits. Examples are given for the one and two MOS gates on thin and thick, pure and impure base, with electron and hole contacts, and the corresponding theoretical current-voltage characteristics previously computed by us, without generation-recombination-trapping-tunneling of electrons and holes. These examples include the one-MOS-gate on semi-infinite thick impure base transistor (the bulk transistor) and the impurethin-base Silicon-on-Insulator (SOI) transistor and the two-MOS-gates on thin base transistors (the FinFET and the Thin Film Transistor TFT). Figures are given with the cross-section views containing the electron and hole concentration and current density distributions and trajectories and the corresponding DC current-voltage characteristics.

  18. Mapping the Coulomb Environment in Interference-Quenched Ballistic Nanowires.

    Science.gov (United States)

    Gutstein, D; Lynall, D; Nair, S V; Savelyev, I; Blumin, M; Ercolani, D; Ruda, H E

    2018-01-10

    The conductance of semiconductor nanowires is strongly dependent on their electrostatic history because of the overwhelming influence of charged surface and interface states on electron confinement and scattering. We show that InAs nanowire field-effect transistor devices can be conditioned to suppress resonances that obscure quantized conduction thereby revealing as many as six sub-bands in the conductance spectra as the Fermi-level is swept across the sub-band energies. The energy level spectra extracted from conductance, coupled with detailed modeling shows the significance of the interface state charge distribution revealing the Coulomb landscape of the nanowire device. Inclusion of self-consistent Coulomb potentials, the measured geometrical shape of the nanowire, the gate geometry and nonparabolicity of the conduction band provide a quantitative and accurate description of the confinement potential and resulting energy level structure. Surfaces of the nanowire terminated by HfO 2 are shown to have their interface donor density reduced by a factor of 30 signifying the passivating role played by HfO 2 .

  19. Simulation of a spintronic transistor: A study of its performance

    International Nuclear Information System (INIS)

    Pela, R.R.; Teles, L.K.

    2009-01-01

    We study theoretically the magnetic bipolar transistor, and compare its performance with common bipolar transistor. We present not only the simulation results for the characteristic curves, but also other relevant parameters related with its performance, such as: the current amplification factor, the open-loop gain, the hybrid parameters and the cutoff frequency. We noted that the spin-charge coupling introduces new phenomena that enrich the functionality characteristics of the magnetic bipolar transistor. Among other things, it has an adjustable band structure, which may be modified during the device operation; it exhibits the already known spin-voltaic effect. On the other hand, we observed that it is necessary a large g-factor to analyze the influence of the field B over the transistor. Nevertheless, we consider the magnetic bipolar transistor as a promising device for spintronic applications

  20. Physical and electrical characteristics of AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors with rare earth Er2O3 as a gate dielectric

    International Nuclear Information System (INIS)

    Lin, Ray-Ming; Chu, Fu-Chuan; Das, Atanu; Liao, Sheng-Yu; Chou, Shu-Tsun; Chang, Liann-Be

    2013-01-01

    In this study, the rare earth erbium oxide (Er 2 O 3 ) was deposited using an electron beam onto an AlGaN/GaN heterostructure to fabricate metal-oxide-semiconductor high-electron-mobility transistors (MOS–HEMTs) that exhibited device performance superior to that of a conventional HEMT. Under similar bias conditions, the gate leakage currents of these MOS–HEMT devices were four orders of magnitude lower than those of conventional Schottky gate HEMTs. The measured sub-threshold swing (SS) and the effective trap state density (N t ) of the MOS–HEMT were 125 mV/decade and 4.3 × 10 12 cm −2 , respectively. The dielectric constant of the Er 2 O 3 layer in this study was 14, as determined through capacitance–voltage measurements. In addition, the gate–source reverse breakdown voltage increased from –166 V for the conventional HEMT to –196 V for the Er 2 O 3 MOS–HEMT. - Highlights: ► GaN/AlGaN/Er 2 O 3 metal-oxide semiconductor high electron mobility transistor ► Physical and electrical characteristics are presented. ► Electron beam evaporated Er 2 O 3 with excellent surface roughness ► Device exhibits reduced gate leakage current and improved I ON /I OFF ratio

  1. Decoupling single nanowire mobilities limited by surface scattering and bulk impurity scattering

    International Nuclear Information System (INIS)

    Khanal, D. R.; Levander, A. X.; Wu, J.; Yu, K. M.; Liliental-Weber, Z.; Walukiewicz, W.; Grandal, J.; Sanchez-Garcia, M. A.; Calleja, E.

    2011-01-01

    We demonstrate the isolation of two free carrier scattering mechanisms as a function of radial band bending in InN nanowires via universal mobility analysis, where effective carrier mobility is measured as a function of effective electric field in a nanowire field-effect transistor. Our results show that Coulomb scattering limits effective mobility at most effective fields, while surface roughness scattering only limits mobility under very high internal electric fields. High-energy α particle irradiation is used to vary the ionized donor concentration, and the observed decrease in mobility and increase in donor concentration are compared to Hall effect results of high-quality InN thin films. Our results show that for nanowires with relatively high doping and large diameters, controlling Coulomb scattering from ionized dopants should be given precedence over surface engineering when seeking to maximize nanowire mobility.

  2. Large-area fabrication of patterned ZnO-nanowire arrays using light stamping lithography.

    Science.gov (United States)

    Hwang, Jae K; Cho, Sangho; Seo, Eun K; Myoung, Jae M; Sung, Myung M

    2009-12-01

    We demonstrate selective adsorption and alignment of ZnO nanowires on patterned poly(dimethylsiloxane) (PDMS) thin layers with (aminopropyl)siloxane self-assembled monolayers (SAMs). Light stamping lithography (LSL) was used to prepare patterned PDMS thin layers as neutral passivation regions on Si substrates. (3-Aminopropyl)triethoxysilane-based SAMs were selectively formed only on regions exposing the silanol groups of the Si substrates. The patterned positively charged amino groups define and direct the selective adsorption of ZnO nanowires with negative surface charges in the protic solvent. This procedure can be adopted in automated printing machines that generate patterned ZnO-nanowire arrays on large-area substrates. To demonstrate its usefulness, the LSL method was applied to prepare ZnO-nanowire transistor arrays on 4-in. Si wafers.

  3. Electronic properties of GaAs, InAs and InP nanowires studied by terahertz spectroscopy

    International Nuclear Information System (INIS)

    Joyce, Hannah J; Docherty, Callum J; Lloyd-Hughes, James; Herz, Laura M; Johnston, Michael B; Gao Qiang; Tan, H Hoe; Jagadish, Chennupati

    2013-01-01

    We have performed a comparative study of ultrafast charge carrier dynamics in a range of III–V nanowires using optical pump–terahertz probe spectroscopy. This versatile technique allows measurement of important parameters for device applications, including carrier lifetimes, surface recombination velocities, carrier mobilities and donor doping levels. GaAs, InAs and InP nanowires of varying diameters were measured. For all samples, the electronic response was dominated by a pronounced surface plasmon mode. Of the three nanowire materials, InAs nanowires exhibited the highest electron mobilities of 6000 cm 2 V −1 s −1 , which highlights their potential for high mobility applications, such as field effect transistors. InP nanowires exhibited the longest carrier lifetimes and the lowest surface recombination velocity of 170 cm s −1 . This very low surface recombination velocity makes InP nanowires suitable for applications where carrier lifetime is crucial, such as in photovoltaics. In contrast, the carrier lifetimes in GaAs nanowires were extremely short, of the order of picoseconds, due to the high surface recombination velocity, which was measured as 5.4 × 10 5   cm s −1 . These findings will assist in the choice of nanowires for different applications, and identify the challenges in producing nanowires suitable for future electronic and optoelectronic devices. (paper)

  4. Nanowire Photovoltaic Devices

    Science.gov (United States)

    Forbes, David

    2015-01-01

    Firefly Technologies, in collaboration with the Rochester Institute of Technology and the University of Wisconsin-Madison, developed synthesis methods for highly strained nanowires. Two synthesis routes resulted in successful nanowire epitaxy: direct nucleation and growth on the substrate and a novel selective-epitaxy route based on nanolithography using diblock copolymers. The indium-arsenide (InAs) nanowires are implemented in situ within the epitaxy environment-a significant innovation relative to conventional semiconductor nanowire generation using ex situ gold nanoparticles. The introduction of these nanoscale features may enable an intermediate band solar cell while simultaneously increasing the effective absorption volume that can otherwise limit short-circuit current generated by thin quantized layers. The use of nanowires for photovoltaics decouples the absorption process from the current extraction process by virtue of the high aspect ratio. While no functional solar cells resulted from this effort, considerable fundamental understanding of the nanowire epitaxy kinetics and nanopatterning process was developed. This approach could, in principle, be an enabling technology for heterointegration of dissimilar materials. The technology also is applicable to virtual substrates. Incorporating nanowires onto a recrystallized germanium/metal foil substrate would potentially solve the problem of grain boundary shunting of generated carriers by restricting the cross-sectional area of the nanowire (tens of nanometers in diameter) to sizes smaller than the recrystallized grains (0.5 to 1 micron(exp 2).

  5. Functionalised Silver Nanowire Structures

    International Nuclear Information System (INIS)

    Andrew, Piers; Ilie, Adelina

    2007-01-01

    Crystalline silver nanowires 60-100 nm in diameter and tens of micrometres in length have been fabricated using a low temperature, solution synthesis technique. We explore the potential of this method to produce functional nanowire structures using two different strategies to attach active molecules to the nanowires: adsorption and displacement. Initially, as-produced silver nanowires capped with a uniaxial-growth-inducing polymer layer were functionalised by solution adsorption of a semiconducting conjugated polymer to generate fluorescent nanowire structures. The influence of nanowire surface chemistry was investigated by displacing the capping polymer with an alkanethiol self-assembled monolayer, followed by solution adsorption functionalisation. The success of molecular attachment was monitored by electron microscopy, absorption and fluorescence spectroscopy and confocal fluorescence microscopy. We examined how the optical properties of such adsorbed molecules are affected by the metallic nanowires, and observed transfer of excitation energy between dye molecules mediated by surface plasmons propagating on the nanowires. Non-contact dynamic force microscopy measurements were used to map the work-function of individual wires, revealing inhomogeneity of the polymer surface coverage

  6. Stability of Organic Nanowires

    DEFF Research Database (Denmark)

    Balzer, F.; Schiek, M.; Wallmann, I.

    2011-01-01

    The morphological stability of organic nanowires over time and under thermal load is of major importance for their use in any device. In this study the growth and stability of organic nanowires from a naphthyl end-capped thiophene grown by organic molecular beam deposition is investigated via ato...

  7. Plasmonic engineering of metal-oxide nanowire heterojunctions in integrated nanowire rectification units

    Energy Technology Data Exchange (ETDEWEB)

    Lin, Luchan; Zhou, Y. Norman, E-mail: liulei@tsinghua.edu.cn, E-mail: nzhou@uwaterloo.ca [Department of Mechanical Engineering, State Key Laboratory of Tribology, Tsinghua University, Beijing 100084 (China); Centre for Advanced Materials Joining, University of Waterloo, Waterloo, Ontario N2L 3G1 (Canada); Zou, Guisheng; Liu, Lei, E-mail: liulei@tsinghua.edu.cn, E-mail: nzhou@uwaterloo.ca [Department of Mechanical Engineering, State Key Laboratory of Tribology, Tsinghua University, Beijing 100084 (China); Duley, Walt W. [Centre for Advanced Materials Joining, University of Waterloo, Waterloo, Ontario N2L 3G1 (Canada); Department of Physics and Astronomy, University of Waterloo, Waterloo, Ontario N2L 3G1 (Canada)

    2016-05-16

    We show that irradiation with femtosecond laser pulses can produce robust nanowire heterojunctions in coupled non-wetting metal-oxide Ag-TiO{sub 2} structures. Simulations indicate that joining arises from the effect of strong plasmonic localization in the region of the junction. Strong electric field effects occur in both Ag and TiO{sub 2} resulting in the modification of both surfaces and an increase in wettability of TiO{sub 2}, facilitating the interconnection of Ag and TiO{sub 2} nanowires. Irradiation leads to the creation of a thin layer of highly defected TiO{sub 2} in the contact region between the Ag and TiO{sub 2} nanowires. The presence of this layer allows the formation of a heterojunction and offers the possibility of engineering the electronic characteristics of interfacial structures. Rectifying junctions with single and bipolar properties have been generated in Ag-TiO{sub 2} nanowire circuits incorporating asymmetrical and symmetrical interfacial structures, respectively. This fabrication technique should be applicable for the interconnection of other heterogeneous metal-oxide nanowire components and demonstrates that femtosecond laser irradiation enables interfacial engineering for electronic applications of integrated nanowire structures.

  8. Synthesis of uniform CdS nanowires in high yield and its single nanowire electrical property

    International Nuclear Information System (INIS)

    Yan Shancheng; Sun Litao; Qu Peng; Huang Ninping; Song Yinchen; Xiao Zhongdang

    2009-01-01

    Large-scale high quality CdS nanowires with uniform diameter were synthesized by using a rapid and simple solvothermal route. Field emission scan electron microscopy (FESEM) and transmission electron microscopy (TEM) images show that the CdS nanowires have diameter of about 26 nm and length up to several micrometres. High resolution TEM (HRTEM) study indicates the single-crystalline nature of CdS nanowires with an oriented growth along the c-axis direction. The optical properties of the products were characterized by UV-vis absorption spectra, photoluminescence spectra and Raman spectra. The resistivity, electron concentration and electron mobility of single NW are calculated by fitting the symmetric I-V curves measured on single NW by the metal-semiconductor-metal model based on thermionic field emission theory. - Graphical abstract: Large-scale high quality CdS nanowires (NWs) with uniform diameter were synthesized by using a rapid and simple solvothermal route. The reaction time is reduced to 2 h, comparing to other synthesis which needed long reaction time up to 12 h. In addition, the as-prepared CdS nanowires have more uniform diameter and high yield. More importantly, the I-V curve of present single CdS nanowire has a good symmetric characteristic as expected by the theory.

  9. Plasmonic engineering of metal-oxide nanowire heterojunctions in integrated nanowire rectification units

    Science.gov (United States)

    Lin, Luchan; Zou, Guisheng; Liu, Lei; Duley, Walt W.; Zhou, Y. Norman

    2016-05-01

    We show that irradiation with femtosecond laser pulses can produce robust nanowire heterojunctions in coupled non-wetting metal-oxide Ag-TiO2 structures. Simulations indicate that joining arises from the effect of strong plasmonic localization in the region of the junction. Strong electric field effects occur in both Ag and TiO2 resulting in the modification of both surfaces and an increase in wettability of TiO2, facilitating the interconnection of Ag and TiO2 nanowires. Irradiation leads to the creation of a thin layer of highly defected TiO2 in the contact region between the Ag and TiO2 nanowires. The presence of this layer allows the formation of a heterojunction and offers the possibility of engineering the electronic characteristics of interfacial structures. Rectifying junctions with single and bipolar properties have been generated in Ag-TiO2 nanowire circuits incorporating asymmetrical and symmetrical interfacial structures, respectively. This fabrication technique should be applicable for the interconnection of other heterogeneous metal-oxide nanowire components and demonstrates that femtosecond laser irradiation enables interfacial engineering for electronic applications of integrated nanowire structures.

  10. Silicon heterojunction transistor

    International Nuclear Information System (INIS)

    Matsushita, T.; Oh-uchi, N.; Hayashi, H.; Yamoto, H.

    1979-01-01

    SIPOS (Semi-insulating polycrystalline silicon) which is used as a surface passivation layer for highly reliable silicon devices constitutes a good heterojunction for silicon. P- or B-doped SIPOS has been used as the emitter material of a heterojunction transistor with the base and collector of silicon. An npn SIPOS-Si heterojunction transistor showing 50 times the current gain of an npn silicon homojunction transistor has been realized by high-temperature treatments in nitrogen and low-temperature annealing in hydrogen or forming gas

  11. Triggering the Electrolyte-Gated Organic Field-Effect Transistor output characteristics through gate functionalization using diazonium chemistry: Application to biodetection of 2,4-dichlorophenoxyacetic acid.

    Science.gov (United States)

    Nguyen, T T K; Nguyen, T N; Anquetin, G; Reisberg, S; Noël, V; Mattana, G; Touzeau, J; Barbault, F; Pham, M C; Piro, B

    2018-04-26

    We investigated an Electrolyte-Gated Organic Field-Effect transistor based on poly(N-alkyldiketopyrrolo-pyrrole dithienylthieno[3,2-b]thiophene) as organic semiconductor whose gate electrode was functionalized by electrografting a functional diazonium salt capable to bind an antibody specific to 2,4-dichlorophenoxyacetic acid (2,4-D), an herbicide well-known to be a soil and water pollutant. Molecular docking computations were performed to design the functional diazonium salt to rationalize the antibody capture on the gate surface. Sensing of 2,4-D was performed through a displacement immunoassay. The limit of detection was estimated at around 2.5 fM. Copyright © 2018 Elsevier B.V. All rights reserved.

  12. Ensemble Monte Carlo particle investigation of hot electron induced source-drain burnout characteristics of GaAs field-effect transistors

    Science.gov (United States)

    Moglestue, C.; Buot, F. A.; Anderson, W. T.

    1995-08-01

    The lattice heating rate has been calculated for GaAs field-effect transistors of different source-drain channel design by means of the ensemble Monte Carlo particle model. Transport of carriers in the substrate and the presence of free surface charges are also included in our simulation. The actual heat generation was obtained by accounting for the energy exchanged with the lattice of the semiconductor during phonon scattering. It was found that the maximum heating rate takes place below the surface near the drain end of the gate. The results correlate well with a previous hydrodynamic energy transport estimate of the electronic energy density, but shifted slightly more towards the drain. These results further emphasize the adverse effects of hot electrons on the Ohmic contacts.

  13. Long-term stability assessment of AlGaN/GaN field effect transistors modified with peptides: Device characteristics vs. surface properties

    Energy Technology Data Exchange (ETDEWEB)

    Rohrbaugh, Nathaniel; Bryan, Isaac; Bryan, Zachary; Collazo, Ramon; Ivanisevic, Albena, E-mail: ivanisevic@ncsu.edu [Department of Materials Science and Engineering, North Carolina State University, Raleigh, NC 27695 (United States)

    2015-09-15

    AlGaN/GaN Field Effect Transistors (FETs) are promising biosensing devices. Functionalization of these devices is explored in this study using an in situ approach with phosphoric acid etchant and a phosphonic acid derivative. Devices are terminated on peptides and soaked in water for up to 168 hrs to examine FETs for both device responses and surface chemistry changes. Measurements demonstrated threshold voltage shifting after the functionalization and soaking processes, but demonstrated stable FET behavior throughout. X-ray photoelectron spectroscopy and atomic force microscopy confirmed peptides attachment to device surfaces before and after water soaking. Results of this work point to the stability of peptide coated functionalized AlGaN/GaN devices in solution and support further research of these devices as disposable, long term, in situ biosensors.

  14. The effect of varied pH on the luminescence characteristics of antibody-mercaptoacetic acid conjugated ZnS nanowires

    Science.gov (United States)

    Chaudhry, Madeeha; Rehman, Malik Abdul; Gul, Asghari; Qamar, Raheel; Bhatti, Arshad Saleem

    2017-11-01

    We demonstrate here that the effect of varied pH of the media on the photoluminescence (PL) properties of mercaptoacetic acid (MAA) and digoxin antibody (Ab) conjugated zinc sulphide (ZnS) nanowires. The charge-transfer kinetics from MAA to ZnS and vice versa showed a profound effect on the luminescence of ZnS defect states. The PL intensity of the ZnS defect states showed strong dependence on the value of pH with respect to the pKa of MAA. The carboxyl and thiol group of MAA in the protonated (pH pKa) states resulted in the quenched PL intensity. While for pH ∼ pKa, the PL intensity was regained as there was equal probability of both protonated and deprotonated carboxyl and thiol groups. These findings indicated that pH of the environment is a key parameter for the use of MAA-Ab conjugated ZnS nanowires as an optical biomarker.

  15. Gibbs–Thomson Effect in Planar Nanowires: Orientation and Doping Modulated Growth

    KAUST Repository

    Shen, Youde; Chen, Renjie; Yu, Xuechao; Wang, Qijie; Jungjohann, Katherine L.; Dayeh, Shadi A.; Wu, Tao

    2016-01-01

    Epitaxy-enabled bottom-up synthesis of self-assembled planar nanowires via the vapor-liquid-solid mechanism is an emerging and promising approach toward large-scale direct integration of nanowire-based devices without postgrowth alignment. Here, by examining large assemblies of indium tin oxide nanowires on yttria-stabilized zirconia substrate, we demonstrate for the first time that the growth dynamics of planar nanowires follows a modified version of the Gibbs-Thomson mechanism, which has been known for the past decades to govern the correlations between thermodynamic supersaturation, growth speed, and nanowire morphology. Furthermore, the substrate orientation strongly influences the growth characteristics of epitaxial planar nanowires as opposed to impact at only the initial nucleation stage in the growth of vertical nanowires. The rich nanowire morphology can be described by a surface-energy-dependent growth model within the Gibbs-Thomson framework, which is further modulated by the tin doping concentration. Our experiments also reveal that the cutoff nanowire diameter depends on the substrate orientation and decreases with increasing tin doping concentration. These results enable a deeper understanding and control over the growth of planar nanowires, and the insights will help advance the fabrication of self-assembled nanowire devices. © 2016 American Chemical Society.

  16. Gibbs–Thomson Effect in Planar Nanowires: Orientation and Doping Modulated Growth

    KAUST Repository

    Shen, Youde

    2016-06-02

    Epitaxy-enabled bottom-up synthesis of self-assembled planar nanowires via the vapor-liquid-solid mechanism is an emerging and promising approach toward large-scale direct integration of nanowire-based devices without postgrowth alignment. Here, by examining large assemblies of indium tin oxide nanowires on yttria-stabilized zirconia substrate, we demonstrate for the first time that the growth dynamics of planar nanowires follows a modified version of the Gibbs-Thomson mechanism, which has been known for the past decades to govern the correlations between thermodynamic supersaturation, growth speed, and nanowire morphology. Furthermore, the substrate orientation strongly influences the growth characteristics of epitaxial planar nanowires as opposed to impact at only the initial nucleation stage in the growth of vertical nanowires. The rich nanowire morphology can be described by a surface-energy-dependent growth model within the Gibbs-Thomson framework, which is further modulated by the tin doping concentration. Our experiments also reveal that the cutoff nanowire diameter depends on the substrate orientation and decreases with increasing tin doping concentration. These results enable a deeper understanding and control over the growth of planar nanowires, and the insights will help advance the fabrication of self-assembled nanowire devices. © 2016 American Chemical Society.

  17. Wurtzite InP nanowire arrays grown by selective area MOCVD

    International Nuclear Information System (INIS)

    Chu, Hyung-Joon; Stewart, Lawrence; Yeh, Ting-Wei; Dapkus, P.D.

    2010-01-01

    InP nanowires are a unique material phase because this normally zincblende material forms in the wurtzite crystal structure below a critical diameter owing to the contribution of sidewalls to the total formation energy. This may allow control of the carrier transport and optical properties of InP nanowires for applications such as nano scale transistors, lasers and detectors. In this work, we describe the fabrication of InP nanowire arrays by selective area growth using MOCVD in the diameter range where the wurtzite structure is formed. The spatial growth rate in selective area growth is modeled by a diffusion model for the precursors. The proposed model achieves an average error of 9%. Electron microscopy shows that the grown InP nanowires are in the wurtzite crystal phase with many stacking faults. The threshold diameter of the crystal phase transition of InP nanowires is larger than the thermodynamic estimation. In order to explain this tendency, we propose a surface kinetics model based on a 2 x 2 reconstruction. This model can explain the increased tendency for wurtzite nanowire formation on InP (111)A substrates and the preferred growth direction of binary III-V compound semiconductor nanowires. (copyright 2010 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim) (orig.)

  18. Organic electrochemical transistors

    KAUST Repository

    Rivnay, Jonathan; Inal, Sahika; Salleo, Alberto; Owens, Ró isí n M.; Berggren, Magnus; Malliaras, George G.

    2018-01-01

    Organic electrochemical transistors (OECTs) make effective use of ion injection from an electrolyte to modulate the bulk conductivity of an organic semiconductor channel. The coupling between ionic and electronic charges within the entire volume

  19. Vertical organic transistors.

    Science.gov (United States)

    Lüssem, Björn; Günther, Alrun; Fischer, Axel; Kasemann, Daniel; Leo, Karl

    2015-11-11

    Organic switching devices such as field effect transistors (OFETs) are a key element of future flexible electronic devices. So far, however, a commercial breakthrough has not been achieved because these devices usually lack in switching speed (e.g. for logic applications) and current density (e.g. for display pixel driving). The limited performance is caused by a combination of comparatively low charge carrier mobilities and the large channel length caused by the need for low-cost structuring. Vertical Organic Transistors are a novel technology that has the potential to overcome these limitations of OFETs. Vertical Organic Transistors allow to scale the channel length of organic transistors into the 100 nm regime without cost intensive structuring techniques. Several different approaches have been proposed in literature, which show high output currents, low operation voltages, and comparatively high speed even without sub-μm structuring technologies. In this review, these different approaches are compared and recent progress is highlighted.

  20. High Accuracy Transistor Compact Model Calibrations

    Energy Technology Data Exchange (ETDEWEB)

    Hembree, Charles E. [Sandia National Laboratories (SNL-NM), Albuquerque, NM (United States); Mar, Alan [Sandia National Laboratories (SNL-NM), Albuquerque, NM (United States); Robertson, Perry J. [Sandia National Laboratories (SNL-NM), Albuquerque, NM (United States)

    2015-09-01

    Typically, transistors are modeled by the application of calibrated nominal and range models. These models consists of differing parameter values that describe the location and the upper and lower limits of a distribution of some transistor characteristic such as current capacity. Correspond- ingly, when using this approach, high degrees of accuracy of the transistor models are not expected since the set of models is a surrogate for a statistical description of the devices. The use of these types of models describes expected performances considering the extremes of process or transistor deviations. In contrast, circuits that have very stringent accuracy requirements require modeling techniques with higher accuracy. Since these accurate models have low error in transistor descriptions, these models can be used to describe part to part variations as well as an accurate description of a single circuit instance. Thus, models that meet these stipulations also enable the calculation of quantifi- cation of margins with respect to a functional threshold and uncertainties in these margins. Given this need, new model high accuracy calibration techniques for bipolar junction transis- tors have been developed and are described in this report.

  1. Flexible Proton-Gated Oxide Synaptic Transistors on Si Membrane.

    Science.gov (United States)

    Zhu, Li Qiang; Wan, Chang Jin; Gao, Ping Qi; Liu, Yang Hui; Xiao, Hui; Ye, Ji Chun; Wan, Qing

    2016-08-24

    Ion-conducting materials have received considerable attention for their applications in fuel cells, electrochemical devices, and sensors. Here, flexible indium zinc oxide (InZnO) synaptic transistors with multiple presynaptic inputs gated by proton-conducting phosphorosilicate glass-based electrolyte films are fabricated on ultrathin Si membranes. Transient characteristics of the proton gated InZnO synaptic transistors are investigated, indicating stable proton-gating behaviors. Short-term synaptic plasticities are mimicked on the proposed proton-gated synaptic transistors. Furthermore, synaptic integration regulations are mimicked on the proposed synaptic transistor networks. Spiking logic modulations are realized based on the transition between superlinear and sublinear synaptic integration. The multigates coupled flexible proton-gated oxide synaptic transistors may be interesting for neuroinspired platforms with sophisticated spatiotemporal information processing.

  2. The use of 2N3055 transistor as photosensory in solarymeter

    International Nuclear Information System (INIS)

    Bintoro; Sastroamidjojo, M.S.A.

    1981-01-01

    The characteristics of 2N3055 type transistor used for solarymeters sensor. It can be seen that transistor sensor has more response time. The response to against arrival solar intensity is linear. It can be used for solarymeter sensor after calibrated with pyranometer reference, but not so sensitive for 500 nanometer wavelength. It can be concluded that 2N3055 transistor made by Motrola than the made by R.C.A. because the 2N3055 transistor is more wide and more accurate than the R.C.A. transistor. (author tr.)

  3. Effect of defect creation and migration on hump characteristics of a-InGaZnO thin film transistors under long-term drain bias stress with light illumination

    Science.gov (United States)

    Cho, Yong-Jung; Kim, Woo-Sic; Lee, Yeol-Hyeong; Park, Jeong Ki; Kim, Geon Tae; Kim, Ohyun

    2018-06-01

    We investigated the mechanism of formation of the hump that occurs in the current-voltage I-V characteristics of amorphous InGaZnO (a-IGZO) thin film transistors (TFTs) that are exposed to long-term drain bias stress under illumination. Transfer characteristics showed two-stage degradation under the stress. At the beginning of the stress, the I-V characteristics shifted in the negative direction with a degradation of subthreshold slope, but the hump phenomenon developed over time in the I-V characteristics. The development of the hump was related to creation of defects, especially ionized oxygen vacancies which act as shallow donor-like states near the conduction-band minimum in a-IGZO. To further investigate the hump phenomenon we measured a capacitance-voltage C-V curve and performed two-dimensional device simulation. Stretched-out C-V for the gate-to-drain capacitance and simulated electric field distribution which exhibited large electric field near the drain side of TFT indicated that VO2+ were generated near the drain side of TFT, but the hump was not induced when VO2+ only existed near the drain side. Therefore, the degradation behavior under DBITS occurred because VO2+ were created near the drain side, then were migrated to the source side of the TFT.

  4. Enhanced two dimensional electron gas transport characteristics in Al2O3/AlInN/GaN metal-oxide-semiconductor high-electron-mobility transistors on Si substrate

    International Nuclear Information System (INIS)

    Freedsman, J. J.; Watanabe, A.; Urayama, Y.; Egawa, T.

    2015-01-01

    The authors report on Al 2 O 3 /Al 0.85 In 0.15 N/GaN Metal-Oxide-Semiconductor High-Electron-Mobility Transistor (MOS-HEMT) on Si fabricated by using atomic layer deposited Al 2 O 3 as gate insulator and passivation layer. The MOS-HEMT with the gate length of 2 μm exhibits excellent direct-current (dc) characteristics with a drain current maximum of 1270 mA/mm at a gate bias of 3 V and an off-state breakdown voltage of 180 V for a gate-drain spacing of 4 μm. Also, the 1 μm-gate MOS-HEMT shows good radio-frequency (rf) response such as current gain and maximum oscillation cut-off frequencies of 10 and 34 GHz, respectively. The capacitance-voltage characteristics at 1 MHz revealed significant increase in two-dimensional electron gas (2DEG) density for the MOS-HEMT compared to conventional Schottky barrier HEMTs. Analyses using drain-source conductivity measurements showed improvements in 2DEG transport characteristics for the MOS-HEMT. The enhancements in dc and rf performances of the Al 2 O 3 /Al 0.85 In 0.15 N/GaN MOS-HEMT are attributed to the improvements in 2DEG characteristics

  5. The Complete Semiconductor Transistor and Its Incomplete Forms

    International Nuclear Information System (INIS)

    Jie Binbin; Sah, C.-T.

    2009-01-01

    This paper describes the definition of the complete transistor. For semiconductor devices, the complete transistor is always bipolar, namely, its electrical characteristics contain both electron and hole currents controlled by their spatial charge distributions. Partially complete or incomplete transistors, via coined names or/and designed physical geometries, included the 1949 Shockley p/n junction transistor (later called Bipolar Junction Transistor, BJT), the 1952 Shockley unipolar 'field-effect' transistor (FET, later called the p/n Junction Gate FET or JGFET), as well as the field-effect transistors introduced by later investigators. Similarities between the surface-channel MOS-gate FET (MOSFET) and the volume-channel BJT are illustrated. The bipolar currents, identified by us in a recent nanometer FET with 2-MOS-gates on thin and nearly pure silicon base, led us to the recognition of the physical makeup and electrical current and charge compositions of a complete transistor and its extension to other three or more terminal signal processing devices, and also the importance of the terminal contacts.

  6. Silicon nanowire hybrid photovoltaics

    KAUST Repository

    Garnett, Erik C.; Peters, Craig; Brongersma, Mark; Cui, Yi; McGehee, Mike

    2010-01-01

    Silicon nanowire Schottky junction solar cells have been fabricated using n-type silicon nanowire arrays and a spin-coated conductive polymer (PEDOT). The polymer Schottky junction cells show superior surface passivation and open-circuit voltages compared to standard diffused junction cells with native oxide surfaces. External quantum efficiencies up to 88% were measured for these silicon nanowire/PEDOT solar cells further demonstrating excellent surface passivation. This process avoids high temperature processes which allows for low-cost substrates to be used. © 2010 IEEE.

  7. Silicon nanowire hybrid photovoltaics

    KAUST Repository

    Garnett, Erik C.

    2010-06-01

    Silicon nanowire Schottky junction solar cells have been fabricated using n-type silicon nanowire arrays and a spin-coated conductive polymer (PEDOT). The polymer Schottky junction cells show superior surface passivation and open-circuit voltages compared to standard diffused junction cells with native oxide surfaces. External quantum efficiencies up to 88% were measured for these silicon nanowire/PEDOT solar cells further demonstrating excellent surface passivation. This process avoids high temperature processes which allows for low-cost substrates to be used. © 2010 IEEE.

  8. Nanotubes and nanowires

    Indian Academy of Sciences (India)

    Unknown

    junction nanotubes by the pyrolysis of appropriate organic precursors. ... By making use of carbon nanotubes, nanowires of metals, metal ..... The use of activated carbon in place of ..... required for the complete removal of the carbon template.

  9. Porous Silicon Nanowires

    Science.gov (United States)

    Qu, Yongquan; Zhou, Hailong; Duan, Xiangfeng

    2011-01-01

    In this minreview, we summarize recent progress in the synthesis, properties and applications of a new type of one-dimensional nanostructures — single crystalline porous silicon nanowires. The growth of porous silicon nanowires starting from both p- and n-type Si wafers with a variety of dopant concentrations can be achieved through either one-step or two-step reactions. The mechanistic studies indicate the dopant concentration of Si wafers, oxidizer concentration, etching time and temperature can affect the morphology of the as-etched silicon nanowires. The porous silicon nanowires are both optically and electronically active and have been explored for potential applications in diverse areas including photocatalysis, lithium ion battery, gas sensor and drug delivery. PMID:21869999

  10. Study on characteristics of a double-conductible channel organic thin-film transistor with an ultra-thin hole-blocking layer

    International Nuclear Information System (INIS)

    Guang-Cai, Yuan; Zheng, Xu; Su-Ling, Zhao; Fu-Jun, Zhang; Xue-Yan, Tian; Xu-Rong, Xu; Na, Xu

    2009-01-01

    The properties of top-contact organic thin-film transistors (TC-OTFTs) using ultra-thin 2, 9-dimethyl-4, 7-diphenyl-1, 10-phenanthroline (BCP) as a hole-blocking interlayer have been improved significantly and a BCP interlayer was inserted into the middle of the pentacene active layer. This paper obtains a fire-new transport mode of an OTFT device with double-conductible channels. The accumulation and transfer of the hole carriers are limited by the BCP interlayer in the vertical region of the channel. A huge amount of carriers is located not only at the interface between pentacene and the gate insulator, but also at the two interfaces of pentacene/BCP interlayer and pentacene/gate insulator, respectively. The results suggest that the BCP interlayer may be useful to adjust the hole accumulation and transfer, and can increase the hole mobility and output current of OTFTs. The TC-OTFTs with a BCP interlayer at V DS = −20 V showed excellent hole mobility μFE and threshold voltage V TH of 0.58 cm 2 /(V·s) and −4.6 V, respectively

  11. Biofunctionalized Magnetic Nanowires

    KAUST Repository

    Kosel, Jurgen

    2013-12-19

    Magnetic nanowires can be used as an alternative method overcoming the limitations of current cancer treatments that lack specificity and are highly cytotoxic. Nanowires are developed so that they selectively attach to cancer cells via antibodies, potentially destroying them when a magnetic field induces their vibration. This will transmit a mechanical force to the targeted cells, which is expected to induce apoptosis on the cancer cells.

  12. Biofunctionalized Magnetic Nanowires

    KAUST Repository

    Kosel, Jü rgen; Ravasi, Timothy; Contreras Gerenas, Maria Fernanda

    2013-01-01

    Magnetic nanowires can be used as an alternative method overcoming the limitations of current cancer treatments that lack specificity and are highly cytotoxic. Nanowires are developed so that they selectively attach to cancer cells via antibodies, potentially destroying them when a magnetic field induces their vibration. This will transmit a mechanical force to the targeted cells, which is expected to induce apoptosis on the cancer cells.

  13. Effect of initial material on the electrolytic parameters of field-effect transistors

    International Nuclear Information System (INIS)

    Antonov, A.V.; Sinitsyn, V.N.; Fursov, V.V.

    1978-01-01

    The effect of initial material parameters upon the main electric characteristics of field transistors at room and optimum (170 deg C) temperatures is studied. For that purpose, the values of parasitic resistances rsub(s), specific resistances rho and steepness S of field transistors, depending on temperature and electrical conditions were measured. The output volt-ampere characteristics of the transistors at room and optimum temperatures are given. An analysis of the results obtained permits to conclude that there is an unambiguous relationship between rho and rsub(s). Impact ionization is shown to occur for field transistors with lower rho at lower drain voltage. When manufacturing field transistors designed for operation at low temperatures, one should remember that a minimum rho may restrict maximum possible steepness. When designing field transistors with optimum noise characteristics, one should variate not only such material parameters as mobility and carrier density, but also select optimum geometry

  14. Taxel-addressable matrix of vertical nanowire piezotronic transistors

    Science.gov (United States)

    Wang, Zhong Lin; Wu, Wenzhuo; Wen, Xiaonan

    2015-05-05

    A tactile sensing matrix includes a substrate, a first plurality of elongated electrode structures, a plurality of vertically aligned piezoelectric members, an insulating layer infused into the piezoelectric members and a second plurality of elongated electrode structures. The first plurality of elongated electrode structures is disposed on the substrate along a first orientation. The vertically aligned piezoelectric members is disposed on the first plurality of elongated electrode structures and form a matrix having columns of piezoelectric members disposed along the first orientation and rows of piezoelectric members disposed along a second orientation that is transverse to the first orientation. The second plurality of elongated electrode structures is disposed on the insulating layer along the second orientation. The elongated electrode structures form a Schottky contact with the piezoelectric members. When pressure is applied to the piezoelectric members, current flow therethrough is modulated.

  15. Organic semiconductors for organic field-effect transistors

    International Nuclear Information System (INIS)

    Yamashita, Yoshiro

    2009-01-01

    The advantages of organic field-effect transistors (OFETs), such as low cost, flexibility and large-area fabrication, have recently attracted much attention due to their electronic applications. Practical transistors require high mobility, large on/off ratio, low threshold voltage and high stability. Development of new organic semiconductors is key to achieving these parameters. Recently, organic semiconductors have been synthesized showing comparable mobilities to amorphous-silicon-based FETs. These materials make OFETs more attractive and their applications have been attempted. New organic semiconductors resulting in high-performance FET devices are described here and the relationship between transistor characteristics and chemical structure is discussed. (topical review)

  16. Organic semiconductors for organic field-effect transistors

    Directory of Open Access Journals (Sweden)

    Yoshiro Yamashita

    2009-01-01

    Full Text Available The advantages of organic field-effect transistors (OFETs, such as low cost, flexibility and large-area fabrication, have recently attracted much attention due to their electronic applications. Practical transistors require high mobility, large on/off ratio, low threshold voltage and high stability. Development of new organic semiconductors is key to achieving these parameters. Recently, organic semiconductors have been synthesized showing comparable mobilities to amorphous-silicon-based FETs. These materials make OFETs more attractive and their applications have been attempted. New organic semiconductors resulting in high-performance FET devices are described here and the relationship between transistor characteristics and chemical structure is discussed.

  17. Radiation Effects in III-V Nanowire Devices

    Science.gov (United States)

    2016-09-01

    fabrication of an in-plane nanowire (NW) GaAs metal-oxide-semiconductor field- effect transistor (MOSFET) by focused -ion beam (FIB) etching and chemical...8725 John J. Kingman Road, MS 6201 Fort Belvoir, VA 22060-6201 T E C H N IC A L R E P O R T DTRA-TR-16-94 Radiation Effects in III-V...5f. WORK UNIT NUMBER 7. PERFORMING ORGANIZATION NAME(S) AND ADDRESS(ES) 8. PERFORMING ORGANIZATION REPORT NUMBER 9. SPONSORING / MONITORING AGENCY

  18. A Highly Responsive Silicon Nanowire/Amplifier MOSFET Hybrid Biosensor

    Science.gov (United States)

    2015-07-21

    Hybrid Biosensor Jieun Lee1,2, Jaeman Jang1, Bongsik Choi1, Jinsu Yoon1, Jee-Yeon Kim3, Yang-Kyu Choi3, Dong Myong Kim1, Dae Hwan Kim1 & Sung-Jin Choi1...This study demonstrates a hybrid biosensor comprised of a silicon nanowire (SiNW) integrated with an amplifier MOSFET to improve the current response...of field-effect-transistor (FET)-based biosensors . The hybrid biosensor is fabricated using conventional CMOS technology, which has the potential

  19. Nanowire structures and electrical devices

    Science.gov (United States)

    Bezryadin, Alexey; Remeika, Mikas

    2010-07-06

    The present invention provides structures and devices comprising conductive segments and conductance constricting segments of a nanowire, such as metallic, superconducting or semiconducting nanowire. The present invention provides structures and devices comprising conductive nanowire segments and conductance constricting nanowire segments having accurately selected phases including crystalline and amorphous states, compositions, morphologies and physical dimensions, including selected cross sectional dimensions, shapes and lengths along the length of a nanowire. Further, the present invention provides methods of processing nanowires capable of patterning a nanowire to form a plurality of conductance constricting segments having selected positions along the length of a nanowire, including conductance constricting segments having reduced cross sectional dimensions and conductance constricting segments comprising one or more insulating materials such as metal oxides.

  20. Electron irradiation of power transistors

    International Nuclear Information System (INIS)

    Hower, P.L.; Fiedor, R.J.

    1982-01-01

    A method for reducing storage time and gain parameters in a semiconductor transistor includes the step of subjecting the transistor to electron irradiation of a dosage determined from measurements of the parameters of a test batch of transistors. Reduction of carrier lifetime by proton bombardment and gold doping is mentioned as an alternative to electron irradiation. (author)

  1. Enhanced two dimensional electron gas transport characteristics in Al{sub 2}O{sub 3}/AlInN/GaN metal-oxide-semiconductor high-electron-mobility transistors on Si substrate

    Energy Technology Data Exchange (ETDEWEB)

    Freedsman, J. J., E-mail: freedy54@gmail.com; Watanabe, A.; Urayama, Y. [Research Center for Nano-Devices and Advanced Materials, Nagoya Institute of Technology, Gokiso-cho, Showa-ku, Nagoya 466 8555 (Japan); Egawa, T., E-mail: egawa.takashi@nitech.ac.jp [Research Center for Nano-Devices and Advanced Materials, Nagoya Institute of Technology, Gokiso-cho, Showa-ku, Nagoya 466 8555 (Japan); Innovation Center for Multi-Business of Nitride Semiconductors, Nagoya Institute of Technology, Gokiso-cho, Showa-ku, Nagoya 466 8555 (Japan)

    2015-09-07

    The authors report on Al{sub 2}O{sub 3}/Al{sub 0.85}In{sub 0.15}N/GaN Metal-Oxide-Semiconductor High-Electron-Mobility Transistor (MOS-HEMT) on Si fabricated by using atomic layer deposited Al{sub 2}O{sub 3} as gate insulator and passivation layer. The MOS-HEMT with the gate length of 2 μm exhibits excellent direct-current (dc) characteristics with a drain current maximum of 1270 mA/mm at a gate bias of 3 V and an off-state breakdown voltage of 180 V for a gate-drain spacing of 4 μm. Also, the 1 μm-gate MOS-HEMT shows good radio-frequency (rf) response such as current gain and maximum oscillation cut-off frequencies of 10 and 34 GHz, respectively. The capacitance-voltage characteristics at 1 MHz revealed significant increase in two-dimensional electron gas (2DEG) density for the MOS-HEMT compared to conventional Schottky barrier HEMTs. Analyses using drain-source conductivity measurements showed improvements in 2DEG transport characteristics for the MOS-HEMT. The enhancements in dc and rf performances of the Al{sub 2}O{sub 3}/Al{sub 0.85}In{sub 0.15}N/GaN MOS-HEMT are attributed to the improvements in 2DEG characteristics.

  2. Measuring thermal conductivity of polystyrene nanowires using the dual-cantilever technique.

    Science.gov (United States)

    Canetta, Carlo; Guo, Samuel; Narayanaswamy, Arvind

    2014-10-01

    Thermal conductance measurements are performed on individual polystyrene nanowires using a novel measurement technique in which the wires are suspended between two bi-material microcantilever sensors. The nanowires are fabricated via electrospinning process. Thermal conductivity of the nanowire samples is found to be between 6.6 and 14.4 W m(-1) K(-1) depending on sample, a significant increase above typical bulk conductivity values for polystyrene. The high strain rates characteristic of electrospinning are believed to lead to alignment of molecular polymer chains, and hence the increase in thermal conductivity, along the axis of the nanowire.

  3. Thermal-treatment effect on the photoluminescence and gas-sensing properties of tungsten oxide nanowires

    International Nuclear Information System (INIS)

    Sun, Shibin; Chang, Xueting; Li, Zhenjiang

    2010-01-01

    Single-crystalline non-stoichiometric tungsten oxide nanowires were initially prepared using a simple solvothermal method. High resolution transmission electron microscopy (HRTEM) investigations indicate that the tungsten oxide nanowires exhibit various crystal defects, including stacking faults, dislocations, and vacancies. A possible defect-induced mechanism was proposed to account for the temperature-dependent morphological evolution of the tungsten oxide nanowires under thermal processing. Due to the high specific surface areas and non-stoichiometric crystal structure, the original tungsten oxide nanowires were highly sensitive to ppm level ethanol at room temperature. Thermal treatment under dry air condition was found to deteriorate the selectivity of room-temperature tungsten oxide sensors, and 400 o C may be considered as the top temperature limit in sensor applications for the solvothermally-prepared nanowires. The photoluminescence (PL) characteristics of tungsten oxide nanowires were also strongly influenced by thermal treatment.

  4. Thermal-treatment effect on the photoluminescence and gas-sensing properties of tungsten oxide nanowires

    Energy Technology Data Exchange (ETDEWEB)

    Sun, Shibin [College of Electromechanical Engineering, Qingdao University of Science and Technology, Qingdao 266061, Shandong (China); Chang, Xueting [Institute of Materials Science and Engineering, Ocean University of China, Qingdao 266100, Shandong (China); Li, Zhenjiang, E-mail: zjli126@126.com [College of Electromechanical Engineering, Qingdao University of Science and Technology, Qingdao 266061, Shandong (China)

    2010-09-15

    Single-crystalline non-stoichiometric tungsten oxide nanowires were initially prepared using a simple solvothermal method. High resolution transmission electron microscopy (HRTEM) investigations indicate that the tungsten oxide nanowires exhibit various crystal defects, including stacking faults, dislocations, and vacancies. A possible defect-induced mechanism was proposed to account for the temperature-dependent morphological evolution of the tungsten oxide nanowires under thermal processing. Due to the high specific surface areas and non-stoichiometric crystal structure, the original tungsten oxide nanowires were highly sensitive to ppm level ethanol at room temperature. Thermal treatment under dry air condition was found to deteriorate the selectivity of room-temperature tungsten oxide sensors, and 400 {sup o}C may be considered as the top temperature limit in sensor applications for the solvothermally-prepared nanowires. The photoluminescence (PL) characteristics of tungsten oxide nanowires were also strongly influenced by thermal treatment.

  5. Study of residual gas adsorption on GaN nanowire arrays photocathode

    Energy Technology Data Exchange (ETDEWEB)

    Xia, Sihao; Liu, Lei, E-mail: liu1133_cn@sina.com.cn; Diao, Yu; Kong, Yike

    2017-05-01

    Highlights: • H{sub 2}O is more easily to absorb on the nanowire surface. • The work function increase after residual gas adsorption. • Bandgaps of the nanowire increase slightly. • Absorption coefficient is reduced and moves to higher energy side. - Abstract: In order to find out the influences of residual gas on GaN nanowire arrays photocathode, the optoelectronic properties of adsorption system are calculated on the basis of first principles. Results suggest that the residual gas adsorption will increase the work function and introduce a dipole moment with a direction from the nanowire to the adsorbates. The surface structures are changed and electrons transfer from nanowire to gas molecule. The bandgaps are enhanced after adsorption. Besides, the peak of absorption coefficients is reduced and moves to higher energy side. It is discovered that residual gas will drastically degrade the characteristics and lifetime of GaN nanowire arrays photocathode.

  6. Electrodeposition at room temperature of amorphous silicon and germanium nanowires in ionic liquid

    Energy Technology Data Exchange (ETDEWEB)

    Martineau, F; Namur, K; Mallet, J; Delavoie, F; Troyon, M; Molinari, M [Laboratoire de Microscopies et d' Etude de Nanostructures (LMEN EA3799), Universite de Reims Champagne Ardennes (URCA), Reims Cedex 2 (France); Endres, F, E-mail: michael.molinari@univ-reims.fr [Institute of Particle Technology, Chair of Interface Processes, Clausthal University of Technology, D-36678 Clausthal-Zellerfeld (Germany)

    2009-11-15

    The electrodeposition at room temperature of silicon and germanium nanowires from the air- and water-stable ionic liquid 1-butyl-1-methylpyrrolidinium bis(trifluoromethanesulfonyl)imide (P{sub 1,4}) containing SiCl{sub 4} as Si source or GeCl{sub 4} as Ge source is investigated by cyclic voltammetry. By using nanoporous polycarbonate membranes as templates, it is possible to reproducibly grow pure silicon and germanium nanowires of different diameters. The nanowires are composed of pure amorphous silicon or germanium. The nanowires have homogeneous cylindrical shape with a roughness of a few nanometres on the wire surfaces. The nanowires' diameters and lengths well match with the initial membrane characteristics. Preliminary photoluminescence experiments exhibit strong emission in the near infrared for the amorphous silicon nanowires.

  7. Field Emission of ITO-Coated Vertically Aligned Nanowire Array.

    KAUST Repository

    Lee, Changhwa

    2010-04-29

    An indium tin oxide (ITO)-coated vertically aligned nanowire array is fabricated, and the field emission characteristics of the nanowire array are investigated. An array of vertically aligned nanowires is considered an ideal structure for a field emitter because of its parallel orientation to the applied electric field. In this letter, a vertically aligned nanowire array is fabricated by modified conventional UV lithography and coated with 0.1-μm-thick ITO. The turn-on electric field intensity is about 2.0 V/μm, and the field enhancement factor, β, is approximately 3,078 when the gap for field emission is 0.6 μm, as measured with a nanomanipulator in a scanning electron microscope.

  8. Fabrication and PL of Al-doped gallium nitride nanowires

    International Nuclear Information System (INIS)

    Zhou Shaomin

    2006-01-01

    Mass Al-doped GaN nanowires with an average diameter of about 50 nm and lengths up to several millimeters are fabricated by a CVD approach. The as-fabricated products have a single crystal phase and grow along the direction. The growth of Al-doped GaN nanowires is suggested for quasi-vapor-solid mechanism (QVSM). In particular, for as large-scale GaN nanowires, a novel strong ultraviolet PL spectrum (from 3.3 to 3.7 eV) appears with a doping Al where the Al-doped GaN nanowires are found to be responsible for the different characteristics; the PL mechanism is explained in detail

  9. Field Emission of ITO-Coated Vertically Aligned Nanowire Array.

    KAUST Repository

    Lee, Changhwa; Lee, Seokwoo; Lee, Seung S

    2010-01-01

    An indium tin oxide (ITO)-coated vertically aligned nanowire array is fabricated, and the field emission characteristics of the nanowire array are investigated. An array of vertically aligned nanowires is considered an ideal structure for a field emitter because of its parallel orientation to the applied electric field. In this letter, a vertically aligned nanowire array is fabricated by modified conventional UV lithography and coated with 0.1-μm-thick ITO. The turn-on electric field intensity is about 2.0 V/μm, and the field enhancement factor, β, is approximately 3,078 when the gap for field emission is 0.6 μm, as measured with a nanomanipulator in a scanning electron microscope.

  10. Effect of hydrofluoric acid concentration on the evolution of photoluminescence characteristics in porous silicon nanowires prepared by Ag-assisted electroless etching method

    KAUST Repository

    Najar, Adel

    2012-01-01

    We report on the structural and optical properties of porous silicon nanowires (PSiNWs) fabricated using silver (Ag) ions assisted electroless etching method. Silicon nanocrystallites with sizes <5 nm embedded in amorphous silica have been observed from PSiNW samples etched using the optimum hydrofluoric acid (HF) concentration. The strongest photoluminescence (PL) signal has been measured from samples etched with 4.8 M of HF, beyond which a significant decreasing in PL emission intensity has been observed. A qualitative model is proposed for the formation of PSiNWs in the presence of Ag catalyst. This model affirms our observations in PL enhancement for samples etched using HF <4.8 M and the eventual PL reduction for samples etched beyond 4.8 M of HF concentration. The enhancement in PL signals has been associated to the formation of PSiNWs and the quantum confinement effect in the Si nanocrystallites. Compared to PSiNWs without Si-O x, the HF treated samples exhibited significant blue PL peak shift of 100 nm. This effect has been correlated to the formation of defect states in the surface oxide. PSiNWs fabricated using the electroless etching method can find useful applications in optical sensors and as anti-reflection layer in silicon-based solar cells. © 2012 American Institute of Physics.

  11. Performance Enhancement of Power Transistors and Radiation effect

    International Nuclear Information System (INIS)

    Hassn, Th.A.A.

    2012-01-01

    The main objective of this scientific research is studying the characteristic of bipolar junction transistor device and its performance under radiation fields and temperature effect as a control element in many power circuits. In this work we present the results of experimental measurements and analytical simulation of gamma – radiation effects on the electrical characteristics and operation of power transistor types 2N3773, 2N3055(as complementary silicon power transistor are designed for general-purpose switching and amplifier applications), three samples of each type were irradiated by gamma radiation with doses, 1 K rad, 5 K rad, 10 K rad, 30 K rad, and 10 Mrad, the experimental data are utilized to establish an analytical relation between the total absorbed dose of gamma irradiation and corresponding to effective density of generated charge in the internal structure of transistor, the electrical parameters which can be measured to estimate the generated defects in the power transistor are current gain, collector current and collected emitter leakage current , these changes cause the circuit to case proper functioning. Collector current and transconductance of each device are calibrated as a function of irradiated dose. Also the threshold voltage and transistor gain can be affected and also calibrated as a function of dose. A silicon NPN power transistor type 2N3773 intended for general purpose applications, were used in this work. It was designed for medium current and high power circuits. Performance and characteristic were discusses under temperature and gamma radiation doses. Also the internal junction thermal system of the transistor represented in terms of a junction thermal resistance (Rjth). The thermal resistance changed by ΔRjth, due to the external intended, also due to the gamma doses intended. The final result from the model analysis reveals that the emitter-bias configuration is quite stable by resistance ratio RB/RE. Also the current

  12. Accelerating the life of transistors

    International Nuclear Information System (INIS)

    Qi Haochun; Lü Changzhi; Zhang Xiaoling; Xie Xuesong

    2013-01-01

    Choosing small and medium power switching transistors of the NPN type in a 3DK set as the study object, the test of accelerating life is conducted in constant temperature and humidity, and then the data are statistically analyzed with software developed by ourselves. According to degradations of such sensitive parameters as the reverse leakage current of transistors, the lifetime order of transistors is about more than 10 4 at 100 °C and 100% relative humidity (RH) conditions. By corrosion fracture of transistor outer leads and other failure modes, with the failure truncated testing, the average lifetime rank of transistors in different distributions is extrapolated about 10 3 . Failure mechanism analyses of degradation of electrical parameters, outer lead fracture and other reasons that affect transistor lifetime are conducted. The findings show that the impact of external stress of outer leads on transistor reliability is more serious than that of parameter degradation. (semiconductor devices)

  13. Overview of one transistor type of hybrid organic ferroelectric non-volatile memory

    Institute of Scientific and Technical Information of China (English)

    Young; Tea; Chun; Daping; Chu

    2015-01-01

    Organic ferroelectric memory devices based on field effect transistors that can be configured between two stable states of on and off have been widely researched as the next generation data storage media in recent years.This emerging type of memory devices can lead to a new instrument system as a potential alternative to previous non-volatile memory building blocks in future processing units because of their numerous merits such as cost-effective process,simple structure and freedom in substrate choices.This bi-stable non-volatile memory device of information storage has been investigated using several organic or inorganic semiconductors with organic ferroelectric polymer materials.Recent progresses in this ferroelectric memory field,hybrid system have attracted a lot of attention due to their excellent device performance in comparison with that of all organic systems.In this paper,a general review of this type of ferroelectric non-volatile memory is provided,which include the device structure,organic ferroelectric materials,electrical characteristics and working principles.We also present some snapshots of our previous study on hybrid ferroelectric memories including our recent work based on zinc oxide nanowire channels.

  14. Vertical organic transistors

    International Nuclear Information System (INIS)

    Lüssem, Björn; Günther, Alrun; Fischer, Axel; Kasemann, Daniel; Leo, Karl

    2015-01-01

    Organic switching devices such as field effect transistors (OFETs) are a key element of future flexible electronic devices. So far, however, a commercial breakthrough has not been achieved because these devices usually lack in switching speed (e.g. for logic applications) and current density (e.g. for display pixel driving). The limited performance is caused by a combination of comparatively low charge carrier mobilities and the large channel length caused by the need for low-cost structuring. Vertical Organic Transistors are a novel technology that has the potential to overcome these limitations of OFETs. Vertical Organic Transistors allow to scale the channel length of organic transistors into the 100 nm regime without cost intensive structuring techniques. Several different approaches have been proposed in literature, which show high output currents, low operation voltages, and comparatively high speed even without sub-μm structuring technologies. In this review, these different approaches are compared and recent progress is highlighted. (topical review)

  15. Photosensitive graphene transistors.

    Science.gov (United States)

    Li, Jinhua; Niu, Liyong; Zheng, Zijian; Yan, Feng

    2014-08-20

    High performance photodetectors play important roles in the development of innovative technologies in many fields, including medicine, display and imaging, military, optical communication, environment monitoring, security check, scientific research and industrial processing control. Graphene, the most fascinating two-dimensional material, has demonstrated promising applications in various types of photodetectors from terahertz to ultraviolet, due to its ultrahigh carrier mobility and light absorption in broad wavelength range. Graphene field effect transistors are recognized as a type of excellent transducers for photodetection thanks to the inherent amplification function of the transistors, the feasibility of miniaturization and the unique properties of graphene. In this review, we will introduce the applications of graphene transistors as photodetectors in different wavelength ranges including terahertz, infrared, visible, and ultraviolet, focusing on the device design, physics and photosensitive performance. Since the device properties are closely related to the quality of graphene, the devices based on graphene prepared with different methods will be addressed separately with a view to demonstrating more clearly their advantages and shortcomings in practical applications. It is expected that highly sensitive photodetectors based on graphene transistors will find important applications in many emerging areas especially flexible, wearable, printable or transparent electronics and high frequency communications. © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  16. Ultradense, Deep Subwavelength Nanowire Array Photovoltaics As Engineered Optical Thin Films

    KAUST Repository

    Tham, Douglas; Heath, James R.

    2010-01-01

    A photovoltaic device comprised of an array of 20 nm wide, 32 nm pitch array of silicon nanowires is modeled as an optical material. The nanowire array (NWA) has characteristic device features that are deep in the subwavelength regime for light

  17. Anisotropic transport properties of quasiballistic InAs nanowires under high magnetic field

    Science.gov (United States)

    Vigneau, Florian; Zeng, Zaiping; Escoffier, Walter; Caroff, Philippe; Leturcq, Renaud; Niquet, Yann-Michel; Raquet, Bertrand; Goiran, Michel

    2018-03-01

    The magnetoconductance of a long channel InAs nanowire based field effect transistor in the quasiballistic regime under large magnetic field is investigated. The quasi-1D nanowire is fully characterized by a bias voltage spectroscopy and measurements under magnetic field up to 50 T applied either perpendicular or parallel to the nanowire axis lifting the spin and orbital degeneracies of the subbands. Under normal magnetic field, the conductance shows quantized steps due to the backscattering reduction and a decrease due to depopulation of the 1D modes. Under axial magnetic field, a quasioscillatory behavior is evidenced due to the coupling of the magnetic field with the angular momentum of the wave function. In addition the formation of cyclotron orbits is highlighted under high magnetic field. The experimental results are compared with theoretical calculation of the 1D band structure and related parameters.

  18. Effect of hydrogen on the device performance and stability characteristics of amorphous InGaZnO thin-film transistors with a SiO2/SiNx/SiO2 buffer

    Science.gov (United States)

    Han, Ki-Lim; Ok, Kyung-Chul; Cho, Hyeon-Su; Oh, Saeroonter; Park, Jin-Seong

    2017-08-01

    We investigate the influence of the multi-layered buffer consisting of SiO2/SiNx/SiO2 on amorphous InGaZnO (a-IGZO) thin-film transistors (TFTs). The multi-layered buffer inhibits permeation of water from flexible plastic substrates and prevents degradation of overlying organic layers. The a-IGZO TFTs with a multi-layered buffer suffer less positive bias temperature stress instability compared to the device with a single SiO2 buffer layer after annealing at 250 °C. Hydrogen from the SiNx layer diffuses into the active layer and reduces electron trapping at loosely bound oxygen defects near the SiO2/a-IGZO interface. Quantitative analysis shows that a hydrogen density of 1.85 × 1021 cm-3 is beneficial to reliability. However, the multi-layered buffer device annealed at 350 °C resulted in conductive characteristics due to the excess carrier concentration from the higher hydrogen density of 2.12 × 1021 cm-3.

  19. Structural and electrical characteristics of high-κ Er2O3 and Er2TiO5 gate dielectrics for a-IGZO thin-film transistors.

    Science.gov (United States)

    Chen, Fa-Hsyang; Her, Jim-Long; Shao, Yu-Hsuan; Matsuda, Yasuhiro H; Pan, Tung-Ming

    2013-01-08

    In this letter, we investigated the structural and electrical characteristics of high-κ Er2O3 and Er2TiO5 gate dielectrics on the amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistor (TFT) devices. Compared with the Er2O3 dielectric, the a-IGZO TFT device incorporating an Er2TiO5 gate dielectric exhibited a low threshold voltage of 0.39 V, a high field-effect mobility of 8.8 cm2/Vs, a small subthreshold swing of 143 mV/decade, and a high Ion/Ioff current ratio of 4.23 × 107, presumably because of the reduction in the oxygen vacancies and the formation of the smooth surface roughness as a result of the incorporation of Ti into the Er2TiO5 film. Furthermore, the reliability of voltage stress can be improved using an Er2TiO5 gate dielectric.

  20. The impact of non-uniform channel layer growth on device characteristics in state of the Art Si/SiGe/Si p-metal oxide semiconductor field effect transistors

    International Nuclear Information System (INIS)

    Chang, A.C.K.; Ross, I.M.; Norris, D.J.; Cullis, A.G.; Tang, Y.T.; Cerrina, C.; Evans, A.G.R.

    2006-01-01

    In this study we have highlighted the effect of non-uniform channel layer growth by the direct correlation of the microstructure and electrical characteristics in state-of-the-art pseudomorphic Si/SiGe p-channel metal oxide semiconductor field effect transistor devices fabricated on Si. Two nominally identical sets of devices from adjacent locations of the same wafer were found to have radically different distributions in gate threshold voltages. Due to the close proximity and narrow gate length of the devices, focused ion beam milling was used to prepare a number of thin cross-sections from each of the two regions for subsequent analysis using transmission electron microscopy. It was found that devices from the region giving a very narrow range of gate threshold voltages exhibited a uniform microstructure in general agreement with the intended growth parameters. However, in the second region, which showed a large spread in the gate threshold voltages, profound anomalies in the microstructure were observed. These anomalies consisted of fluctuations in the quality and thickness of the SiGe strained layers. The non-uniform growth of the strained SiGe layer clearly accounted for the poorly controlled threshold voltages of these devices. The results emphasize the importance of good layer growth uniformity to ensure optimum device yield

  1. Investigations on highly stable thermal characteristics of a dilute In0.2Ga0.8AsSb/GaAs doped-channel field-effect transistor

    International Nuclear Information System (INIS)

    Su, Ke-Hua; Hsu, Wei-Chou; Hu, Po-Jung; Lee, Ching-Sung; Wu, Yue-Han; Chang, Li; Hsiao, Ru-Shang; Chen, Jenn-Fang; Chi, Tung-Wei

    2008-01-01

    This work reports for the first time a novel In 0.2 Ga 0.8 AsSb/GaAs heterostructure doped-channel field-effect transistor (DCFET) grown by the molecular beam epitaxy system. The interfacial quality within the InGaAsSb/GaAs quantum well of the DCFET device has been effectively improved by introducing surfactant-like Sb atoms during the growth of the Si-doped InGaAs channel layer. The improved device characteristics include the peak extrinsic transconductance (g m,max ) of 161.5 mS mm −1 , the peak drain–source saturation current density (I DSS,max ) of 230 mA mm −1 , the gate–voltage swing (GVS) of 1.65 V, the cutoff frequency (f T ) of 12.5 GHz and the maximum oscillation frequency (f max ) of 25 GHz at 300 K with the gate dimensions of 1.2 × 200 µm 2 . The proposed design has also shown a stable thermal threshold coefficient (∂V th /∂T) of −0.7 mV K −1

  2. Metal nanoparticle film-based room temperature Coulomb transistor.

    Science.gov (United States)

    Willing, Svenja; Lehmann, Hauke; Volkmann, Mirjam; Klinke, Christian

    2017-07-01

    Single-electron transistors would represent an approach to developing less power-consuming microelectronic devices if room temperature operation and industry-compatible fabrication were possible. We present a concept based on stripes of small, self-assembled, colloidal, metal nanoparticles on a back-gate device architecture, which leads to well-defined and well-controllable transistor characteristics. This Coulomb transistor has three main advantages. By using the scalable Langmuir-Blodgett method, we combine high-quality chemically synthesized metal nanoparticles with standard lithography techniques. The resulting transistors show on/off ratios above 90%, reliable and sinusoidal Coulomb oscillations, and room temperature operation. Furthermore, this concept allows for versatile tuning of the device properties such as Coulomb energy gap and threshold voltage, as well as period, position, and strength of the oscillations.

  3. Metal nanoparticle film–based room temperature Coulomb transistor

    Science.gov (United States)

    Willing, Svenja; Lehmann, Hauke; Volkmann, Mirjam; Klinke, Christian

    2017-01-01

    Single-electron transistors would represent an approach to developing less power–consuming microelectronic devices if room temperature operation and industry-compatible fabrication were possible. We present a concept based on stripes of small, self-assembled, colloidal, metal nanoparticles on a back-gate device architecture, which leads to well-defined and well-controllable transistor characteristics. This Coulomb transistor has three main advantages. By using the scalable Langmuir-Blodgett method, we combine high-quality chemically synthesized metal nanoparticles with standard lithography techniques. The resulting transistors show on/off ratios above 90%, reliable and sinusoidal Coulomb oscillations, and room temperature operation. Furthermore, this concept allows for versatile tuning of the device properties such as Coulomb energy gap and threshold voltage, as well as period, position, and strength of the oscillations. PMID:28740864

  4. Controlling charge current through a DNA based molecular transistor

    Energy Technology Data Exchange (ETDEWEB)

    Behnia, S., E-mail: s.behnia@sci.uut.ac.ir; Fathizadeh, S.; Ziaei, J.

    2017-01-05

    Molecular electronics is complementary to silicon-based electronics and may induce electronic functions which are difficult to obtain with conventional technology. We have considered a DNA based molecular transistor and study its transport properties. The appropriate DNA sequence as a central chain in molecular transistor and the functional interval for applied voltages is obtained. I–V characteristic diagram shows the rectifier behavior as well as the negative differential resistance phenomenon of DNA transistor. We have observed the nearly periodic behavior in the current flowing through DNA. It is reported that there is a critical gate voltage for each applied bias which above it, the electrical current is always positive. - Highlights: • Modeling a DNA based molecular transistor and studying its transport properties. • Choosing the appropriate DNA sequence using the quantum chaos tools. • Choosing the functional interval for voltages via the inverse participation ratio tool. • Detecting the rectifier and negative differential resistance behavior of DNA.

  5. Modelling transport in single electron transistor

    International Nuclear Information System (INIS)

    Dinh Sy Hien; Huynh Lam Thu Thao; Le Hoang Minh

    2009-01-01

    We introduce a model of single electron transistor (SET). Simulation programme of SET is used as the exploratory tool in order to gain better understanding of process and device physics. This simulator includes a graphic user interface (GUI) in Matlab. The SET was simulated using GUI in Matlab to get current-voltage (I-V) characteristics. In addition, effects of device capacitance, bias, temperature on the I-V characteristics were obtained. In this work, we review the capabilities of the simulator of the SET. Typical simulations of the obtained I-V characteristics of the SET are presented.

  6. Optimizing switching frequency of the soliton transistor by numerical simulation

    Energy Technology Data Exchange (ETDEWEB)

    Izadyar, S., E-mail: S_izadyar@yahoo.co [Department of Electronics, Khaje Nasir Toosi University of Technology, Shariati Ave., Tehran (Iran, Islamic Republic of); Niazzadeh, M.; Raissi, F. [Department of Electronics, Khaje Nasir Toosi University of Technology, Shariati Ave., Tehran (Iran, Islamic Republic of)

    2009-10-15

    In this paper, by numerical simulations we have examined different ways to increase the soliton transistor's switching frequency. Speed of the solitons in a soliton transistor depends on various parameters such as the loss of the junction, the applied bias current, and the transmission line characteristics. Three different ways have been examined; (i) decreasing the size of the transistor without losing transistor effect. (ii) Decreasing the amount of loss of the junction to increase the soliton speed. (iii) Optimizing the bias current to obtain maximum possible speed. We have obtained the shortest possible length to have at least one working soliton inside the transistor. The dimension of the soliton can be decreased by changing the inductance of the transmission line, causing a further decrease in the size of the transistor, however, a trade off between the size and the inductance is needed to obtain the optimum switching speed. Decreasing the amount of loss can be accomplished by increasing the characteristic tunneling resistance of the device, however, a trade off is again needed to make soliton and antisoliton annihilation possible. By increasing the bias current, the forces acting the solitons increases and so does their speed. Due to nonuniform application of bias current a self induced magnetic field is created which can result in creation of unwanted solitons. Optimum bias current application can result in larger bias currents and larger soliton speed. Simulations have provided us with such an arrangement of bias current paths.

  7. Optimizing switching frequency of the soliton transistor by numerical simulation

    International Nuclear Information System (INIS)

    Izadyar, S.; Niazzadeh, M.; Raissi, F.

    2009-01-01

    In this paper, by numerical simulations we have examined different ways to increase the soliton transistor's switching frequency. Speed of the solitons in a soliton transistor depends on various parameters such as the loss of the junction, the applied bias current, and the transmission line characteristics. Three different ways have been examined; (i) decreasing the size of the transistor without losing transistor effect. (ii) Decreasing the amount of loss of the junction to increase the soliton speed. (iii) Optimizing the bias current to obtain maximum possible speed. We have obtained the shortest possible length to have at least one working soliton inside the transistor. The dimension of the soliton can be decreased by changing the inductance of the transmission line, causing a further decrease in the size of the transistor, however, a trade off between the size and the inductance is needed to obtain the optimum switching speed. Decreasing the amount of loss can be accomplished by increasing the characteristic tunneling resistance of the device, however, a trade off is again needed to make soliton and antisoliton annihilation possible. By increasing the bias current, the forces acting the solitons increases and so does their speed. Due to nonuniform application of bias current a self induced magnetic field is created which can result in creation of unwanted solitons. Optimum bias current application can result in larger bias currents and larger soliton speed. Simulations have provided us with such an arrangement of bias current paths.

  8. EDITORIAL: Nanowires for energy Nanowires for energy

    Science.gov (United States)

    LaPierre, Ray; Sunkara, Mahendra

    2012-05-01

    This special issue of Nanotechnology focuses on studies illustrating the application of nanowires for energy including solar cells, efficient lighting and water splitting. Over the next three decades, nanotechnology will make significant contributions towards meeting the increased energy needs of the planet, now known as the TeraWatt challenge. Nanowires in particular are poised to contribute significantly in this development as presented in the review by Hiralal et al [1]. Nanowires exhibit light trapping properties that can act as a broadband anti-reflection coating to enhance the efficiency of solar cells. In this issue, Li et al [2] and Wang et al [3] present the optical properties of silicon nanowire and nanocone arrays. In addition to enhanced optical properties, core-shell nanowires also have the potential for efficient charge carrier collection across the nanowire diameter as presented in the contribution by Yu et al [4] for radial junction a-Si solar cells. Hybrid approaches that combine organic and inorganic materials also have potential for high efficiency photovoltaics. A Si-based hybrid solar cell is presented by Zhang et al [5] with a photoconversion efficiency of over 7%. The quintessential example of hybrid solar cells is the dye-sensitized solar cell (DSSC) where an organic absorber (dye) coats an inorganic material (typically a ZnO nanostructure). Herman et al [6] present a method of enhancing the efficiency of a DSSC by increasing the hetero-interfacial area with a unique hierarchical weeping willow ZnO structure. The increased surface area allows for higher dye loading, light harvesting, and reduced charge recombination through direct conduction along the ZnO branches. Another unique ZnO growth method is presented by Calestani et al [7] using a solution-free and catalyst-free approach by pulsed electron deposition (PED). Nanowires can also make more efficient use of electrical power. Light emitting diodes, for example, will eventually become the

  9. The Self- and Directed Assembly of Nanowires

    Science.gov (United States)

    Smith, Benjamin David

    nanowires rapidly sedimented due to gravity onto a glass cover slip to concentrate and form a dense film. Particles and assemblies were imaged using inverted optical microscopy. We quantitatively analyzed the images and movies captured in order to track and classify particles and classify the overall arrays formed. We then correlated how particle characteristics, e.g., materials, size, segmentation, etc. changed the ordering and alignment observed. With that knowledge, we hope to be able to form new and interesting structures. We began our studies by examining the assembly of single component nanowires. Chapter 2 describes this work, in which solid Au nanowires measuring 2-7 mum in length and 290 nm in diameter self-assembled into smectic rows. By both experiment and theory, we determined that these rows formed due to a balance of electrostatic repulsions and van der Waals attractions. Final assemblies were stable for at least several days. Monte Carlo methods were used to simulate assemblies and showed structures that mirrored those experimentally observed. Simulations indicated that the smectic phase was preferred over others, i.e., nematic, when an additional small charge was added to the ends of the nanowires. Our particles have rough tips, which might create these additional electrostatic repulsions. To increase the particle and array complexity, two-component, metallic nanowire assembly was explored in Chapter 3. We examined numerous types of nanowires by changing the segment length, ratio, and material, the nanowire length, the surface coating, and the presence of small third segments. These segmented nanowires were generally Au-Ag and also ordered into smectic rows. Segmented wires arranged in rows, however, can be aligned in two possible ways with respect to a neighboring particle. The Au segments on neighboring particles can be oriented in the same direction or opposed to each other. Orientation was quantified in terms of an order parameter that took into account

  10. Optimization of Nanowire-Resistance Load Logic Inverter.

    Science.gov (United States)

    Hashim, Yasir; Sidek, Othman

    2015-09-01

    This study is the first to demonstrate characteristics optimization of nanowire resistance load inverter. Noise margins and inflection voltage of transfer characteristics are used as limiting factors in this optimization. Results indicate that optimization depends on resistance value. Increasing of load resistor tends to increasing in noise margins until saturation point, increasing load resistor after this point will not improve noise margins significantly.

  11. Ionic screening effect on low-frequency drain current fluctuations in liquid-gated nanowire FETs

    International Nuclear Information System (INIS)

    Lu, Ming-Pei; Vire, Eric; Montès, Laurent

    2015-01-01

    The ionic screening effect plays an important role in determining the fundamental surface properties within liquid–semiconductor interfaces. In this study, we investigated the characteristics of low-frequency drain current noise in liquid-gated nanowire (NW) field effect transistors (FETs) to obtain physical insight into the effect of ionic screening on low-frequency current fluctuation. When the NW FET was operated close to the gate voltage corresponding to the maximum transconductance, the magnitude of the low-frequency noise for the NW exposed to a low-ionic-strength buffer (0.001 M) was approximately 70% greater than that when exposed to a high-ionic-strength buffer (0.1 M). We propose a noise model, considering the charge coupling efficiency associated with the screening competition between the electrolyte buffer and the NW, to describe the ionic screening effect on the low-frequency drain current noise in liquid-gated NW FET systems. This report not only provides a physical understanding of the ionic screening effect behind the low-frequency current noise in liquid-gated FETs but also offers useful information for developing the technology of NW FETs with liquid-gated architectures for application in bioelectronics, nanosensors, and hybrid nanoelectronics. (paper)

  12. Photoconductivity, pH Sensitivity, Noise, and Channel Length Effects in Si Nanowire FET Sensors

    Science.gov (United States)

    Gasparyan, Ferdinand; Zadorozhnyi, Ihor; Khondkaryan, Hrant; Arakelyan, Armen; Vitusevich, Svetlana

    2018-03-01

    Silicon nanowire (NW) field-effect transistor (FET) sensors of various lengths were fabricated. Transport properties of Si NW FET sensors were investigated involving noise spectroscopy and current-voltage (I-V) characterization. The static I-V dependencies demonstrate the high quality of fabricated silicon FETs without leakage current. Transport and noise properties of NW FET structures were investigated under different light illumination conditions, as well as in sensor configuration in an aqueous solution with different pH values. Furthermore, we studied channel length effects on the photoconductivity, noise, and pH sensitivity. The magnitude of the channel current is approximately inversely proportional to the length of the current channel, and the pH sensitivity increases with the increase of channel length approaching the Nernst limit value of 59.5 mV/pH. We demonstrate that dominant 1/f-noise can be screened by the generation-recombination plateau at certain pH of the solution or external optical excitation. The characteristic frequency of the generation-recombination noise component decreases with increasing of illumination power. Moreover, it is shown that the measured value of the slope of 1/f-noise spectral density dependence on the current channel length is 2.7 which is close to the theoretically predicted value of 3.

  13. Lasing and ion beam doping of semiconductor nanowires

    Energy Technology Data Exchange (ETDEWEB)

    Geburt, Sebastian

    2013-01-31

    Semiconductor nanowires exhibit extraordinary optical properties like highly localized light emission, efficient waveguiding and light amplification. Even the stimulation of laser oscillations can be achieved at optical pumping, making nanowires promising for optoelectronic applications. For successful integration into future devices, three major key challenges have to be faced: (1) the understanding of the fundamental properties, (2) the modification of the emission characteristics and (3) the investigation of the efficiency-limiting factors. All key challenges are addressed in this thesis: (1) The fundamental properties of CdS nanowire have been investigated to uncover the size limits for photonic nanowire lasers. Laser oscillations were observed at room temperature and the emission characteristics were correlated to the morphology, which allowed the determination of a minimum diameter and length necessary for lasing. (2) The emission characteristics of ZnO nanowires have been successfully modified by ion beam doping with Co. The structural investigations revealed a good recovery of the ion induced damage in the crystal lattice. Optical activation of the implanted Co ions was achieved and an intense intra-3d-emission confirmed successful modification. (3) The temporal decay of excited luminescence centers strongly depends on the interplay of luminescent ions and defects, thus offering an approach to investigate the efficiency-limiting processes. Mn implanted ZnS nanowires were investigated, as the temporal decay of the incorporated Mn ions can be described by a Foerster energy transfer model modified for nanostructures. The defect concentration was varied systematically by several approaches and the model could successfully fit the transients in all cases. The emission properties of Tb implanted ZnS nanowires were investigated and the temporal decay of the intra-4f-emission could also be fitted by the model, proving its accuracy for an additional element.

  14. Lasing and ion beam doping of semiconductor nanowires

    International Nuclear Information System (INIS)

    Geburt, Sebastian

    2013-01-01

    Semiconductor nanowires exhibit extraordinary optical properties like highly localized light emission, efficient waveguiding and light amplification. Even the stimulation of laser oscillations can be achieved at optical pumping, making nanowires promising for optoelectronic applications. For successful integration into future devices, three major key challenges have to be faced: (1) the understanding of the fundamental properties, (2) the modification of the emission characteristics and (3) the investigation of the efficiency-limiting factors. All key challenges are addressed in this thesis: (1) The fundamental properties of CdS nanowire have been investigated to uncover the size limits for photonic nanowire lasers. Laser oscillations were observed at room temperature and the emission characteristics were correlated to the morphology, which allowed the determination of a minimum diameter and length necessary for lasing. (2) The emission characteristics of ZnO nanowires have been successfully modified by ion beam doping with Co. The structural investigations revealed a good recovery of the ion induced damage in the crystal lattice. Optical activation of the implanted Co ions was achieved and an intense intra-3d-emission confirmed successful modification. (3) The temporal decay of excited luminescence centers strongly depends on the interplay of luminescent ions and defects, thus offering an approach to investigate the efficiency-limiting processes. Mn implanted ZnS nanowires were investigated, as the temporal decay of the incorporated Mn ions can be described by a Foerster energy transfer model modified for nanostructures. The defect concentration was varied systematically by several approaches and the model could successfully fit the transients in all cases. The emission properties of Tb implanted ZnS nanowires were investigated and the temporal decay of the intra-4f-emission could also be fitted by the model, proving its accuracy for an additional element.

  15. Subthreshold currents in CMOS transistors made on oxygen-implanted silicon

    International Nuclear Information System (INIS)

    Foster, D.J.

    1983-01-01

    Kinks have been observed in subthreshold current plots of mesa-shaped n-channel transistors made on oxygen-implanted silicon substrates. The kinks represent additional current flow and are due to overlapping fields from the gate electrode causing early corner inversion and to a Qsub(ss) side-wall effect. Subthreshold currents in n-channel transistors are dominated by the two effects which, as a consequence, reduce threshold voltages especially in narrow n-channel transistors. The subthreshold characteristics of p-channel transistors were not affected in the same way. (author)

  16. Effect of the nanowire diameter on the linearity of the response of GaN-based heterostructured nanowire photodetectors

    Science.gov (United States)

    Spies, Maria; Polaczyński, Jakub; Ajay, Akhil; Kalita, Dipankar; Luong, Minh Anh; Lähnemann, Jonas; Gayral, Bruno; den Hertog, Martien I.; Monroy, Eva

    2018-06-01

    Nanowire photodetectors are investigated because of their compatibility with flexible electronics, or for the implementation of on-chip optical interconnects. Such devices are characterized by ultrahigh photocurrent gain, but their photoresponse scales sublinearly with the optical power. Here, we present a study of single-nanowire photodetectors displaying a linear response to ultraviolet illumination. Their structure consists of a GaN nanowire incorporating an AlN/GaN/AlN heterostructure, which generates an internal electric field. The activity of the heterostructure is confirmed by the rectifying behavior of the current–voltage characteristics in the dark, as well as by the asymmetry of the photoresponse in magnitude and linearity. Under reverse bias (negative bias on the GaN cap segment), the detectors behave linearly with the impinging optical power when the nanowire diameter is below a certain threshold (≈80 nm), which corresponds to the total depletion of the nanowire stem due to the Fermi level pinning at the sidewalls. In the case of nanowires that are only partially depleted, their nonlinearity is explained by a nonlinear variation of the diameter of their central conducting channel under illumination.

  17. Mesoscopic photon heat transistor

    DEFF Research Database (Denmark)

    Ojanen, T.; Jauho, Antti-Pekka

    2008-01-01

    We show that the heat transport between two bodies, mediated by electromagnetic fluctuations, can be controlled with an intermediate quantum circuit-leading to the device concept of a mesoscopic photon heat transistor (MPHT). Our theoretical analysis is based on a novel Meir-Wingreen-Landauer-typ......We show that the heat transport between two bodies, mediated by electromagnetic fluctuations, can be controlled with an intermediate quantum circuit-leading to the device concept of a mesoscopic photon heat transistor (MPHT). Our theoretical analysis is based on a novel Meir......-Wingreen-Landauer-type of conductance formula, which gives the photonic heat current through an arbitrary circuit element coupled to two dissipative reservoirs at finite temperatures. As an illustration we present an exact solution for the case when the intermediate circuit can be described as an electromagnetic resonator. We discuss...

  18. Light-effect transistor (LET) with multiple independent gating controls for optical logic gates and optical amplification

    Science.gov (United States)

    Marmon, Jason; Rai, Satish; Wang, Kai; Zhou, Weilie; Zhang, Yong

    The pathway for CMOS technology beyond the 5-nm technology node remains unclear for both physical and technological reasons. A new transistor paradigm is required. A LET (Marmon et. al., Front. Phys. 2016, 4, No. 8) offers electronic-optical hybridization at the component level, and is capable of continuing Moore's law to the quantum scale. A LET overcomes a FET's fabrication complexity, e.g., physical gate and doping, by employing optical gating and photoconductivity, while multiple independent, optical gates readily realize unique functionalities. We report LET device characteristics and novel digital and analog applications, such as optical logic gates and optical amplification. Prototype CdSe-nanowire-based LETs, incorporating an M-S-M structure, show output and transfer characteristics resembling advanced FETs, e.g., on/off ratios up to 106 with a source-drain voltage of 1.43V, gate-power of 260nW, and a subthreshold swing of 0.3nW/decade (excluding losses). A LET has potential for high-switching (THz) speeds and extremely low-switching energies (aJ) in the ballistic transport region. Our work offers new electronic-optical integration strategies for high speed and low energy computing approaches, which could potentially be extended to other materials and devices.

  19. Fabrication of a vertical channel field effect transistor and a study of its electrical performances

    International Nuclear Information System (INIS)

    Bhuiyan, A.S.

    1983-01-01

    A vertical channel field effect transistor on silicon was fabricated by diffusion technique and its electrical characteristics were studied as a function of voltage and temperature. It was found that this transistor has relatively high breakdown voltage of 65 volts for drain source and of 7.5 volts for gate source terminals. (author)

  20. Phase diagrams of diluted transverse Ising nanowire

    Energy Technology Data Exchange (ETDEWEB)

    Bouhou, S.; Essaoudi, I. [Laboratoire de Physique des Matériaux et Modélisation, des Systèmes, (LP2MS), Unité Associée au CNRST-URAC 08, University of Moulay Ismail, Physics Department, Faculty of Sciences, B.P. 11201 Meknes (Morocco); Ainane, A., E-mail: ainane@pks.mpg.de [Laboratoire de Physique des Matériaux et Modélisation, des Systèmes, (LP2MS), Unité Associée au CNRST-URAC 08, University of Moulay Ismail, Physics Department, Faculty of Sciences, B.P. 11201 Meknes (Morocco); Max-Planck-Institut für Physik Complexer Systeme, Nöthnitzer Str. 38 D-01187 Dresden (Germany); Saber, M. [Laboratoire de Physique des Matériaux et Modélisation, des Systèmes, (LP2MS), Unité Associée au CNRST-URAC 08, University of Moulay Ismail, Physics Department, Faculty of Sciences, B.P. 11201 Meknes (Morocco); Max-Planck-Institut für Physik Complexer Systeme, Nöthnitzer Str. 38 D-01187 Dresden (Germany); Ahuja, R. [Condensed Matter Theory Group, Department of Physics and Astronomy, Uppsala University, 75120 Uppsala (Sweden); Dujardin, F. [Laboratoire de Chimie et Physique des Milieux Complexes (LCPMC), Institut de Chimie, Physique et Matériaux (ICPM), 1 Bd. Arago, 57070 Metz (France)

    2013-06-15

    In this paper, the phase diagrams of diluted Ising nanowire consisting of core and surface shell coupling by J{sub cs} exchange interaction are studied using the effective field theory with a probability distribution technique, in the presence of transverse fields in the core and in the surface shell. We find a number of characteristic phenomena. In particular, the effect of concentration c of magnetic atoms, the exchange interaction core/shell, the exchange in surface and the transverse fields in core and in surface shell of phase diagrams are investigated. - Highlights: ► We use the EFT to investigate the phase diagrams of Ising transverse nanowire. ► Ferrimagnetic and ferromagnetic cases are investigated. ► The effects of the dilution and the transverse fields in core and shell are studied. ► Behavior of the transition temperature with the exchange interaction is given.

  1. Phase diagrams of diluted transverse Ising nanowire

    International Nuclear Information System (INIS)

    Bouhou, S.; Essaoudi, I.; Ainane, A.; Saber, M.; Ahuja, R.; Dujardin, F.

    2013-01-01

    In this paper, the phase diagrams of diluted Ising nanowire consisting of core and surface shell coupling by J cs exchange interaction are studied using the effective field theory with a probability distribution technique, in the presence of transverse fields in the core and in the surface shell. We find a number of characteristic phenomena. In particular, the effect of concentration c of magnetic atoms, the exchange interaction core/shell, the exchange in surface and the transverse fields in core and in surface shell of phase diagrams are investigated. - Highlights: ► We use the EFT to investigate the phase diagrams of Ising transverse nanowire. ► Ferrimagnetic and ferromagnetic cases are investigated. ► The effects of the dilution and the transverse fields in core and shell are studied. ► Behavior of the transition temperature with the exchange interaction is given

  2. SNSPD with parallel nanowires (Conference Presentation)

    Science.gov (United States)

    Ejrnaes, Mikkel; Parlato, Loredana; Gaggero, Alessandro; Mattioli, Francesco; Leoni, Roberto; Pepe, Giampiero; Cristiano, Roberto

    2017-05-01

    Superconducting nanowire single-photon detectors (SNSPDs) have shown to be promising in applications such as quantum communication and computation, quantum optics, imaging, metrology and sensing. They offer the advantages of a low dark count rate, high efficiency, a broadband response, a short time jitter, a high repetition rate, and no need for gated-mode operation. Several SNSPD designs have been proposed in literature. Here, we discuss the so-called parallel nanowires configurations. They were introduced with the aim of improving some SNSPD property like detection efficiency, speed, signal-to-noise ratio, or photon number resolution. Although apparently similar, the various parallel designs are not the same. There is no one design that can improve the mentioned properties all together. In fact, each design presents its own characteristics with specific advantages and drawbacks. In this work, we will discuss the various designs outlining peculiarities and possible improvements.

  3. Modeling of charge transport in ion bipolar junction transistors.

    Science.gov (United States)

    Volkov, Anton V; Tybrandt, Klas; Berggren, Magnus; Zozoulenko, Igor V

    2014-06-17

    Spatiotemporal control of the complex chemical microenvironment is of great importance to many fields within life science. One way to facilitate such control is to construct delivery circuits, comprising arrays of dispensing outlets, for ions and charged biomolecules based on ionic transistors. This allows for addressability of ionic signals, which opens up for spatiotemporally controlled delivery in a highly complex manner. One class of ionic transistors, the ion bipolar junction transistors (IBJTs), is especially attractive for these applications because these transistors are functional at physiological conditions and have been employed to modulate the delivery of neurotransmitters to regulate signaling in neuronal cells. Further, the first integrated complementary ionic circuits were recently developed on the basis of these ionic transistors. However, a detailed understanding of the device physics of these transistors is still lacking and hampers further development of components and circuits. Here, we report on the modeling of IBJTs using Poisson's and Nernst-Planck equations and the finite element method. A two-dimensional model of the device is employed that successfully reproduces the main characteristics of the measurement data. On the basis of the detailed concentration and potential profiles provided by the model, the different modes of operation of the transistor are analyzed as well as the transitions between the different modes. The model correctly predicts the measured threshold voltage, which is explained in terms of membrane potentials. All in all, the results provide the basis for a detailed understanding of IBJT operation. This new knowledge is employed to discuss potential improvements of ion bipolar junction transistors in terms of miniaturization and device parameters.

  4. Temperature dependent IDS–VGS characteristics of an N-channel Si tunneling field-effect transistor with a germanium source on Si(110) substrate

    International Nuclear Information System (INIS)

    Liu Yan; Yan Jing; Wang Hongjuan; Han Genquan

    2014-01-01

    We fabricated n-type Si-based TFETs with a Ge source on Si(110) substrate. The temperature dependent I DS –V GS characteristics of a TFET formed on Si(110) are investigated in the temperature range of 210 to 300 K. A study of the temperature dependence of I Leakage indicates that I Leakage is mainly dominated by the Shockley-Read-Hall (SRH) generation—recombination current of the n + drain—Si substrate junction. I ON increases monotonically with temperature, which is attributed to a reduction of the bandgap at the tunneling junction and an enhancement of band-to-band tunneling rate. The subthreshold swing S for trap assisted tunneling (TAT) current and band-to-band tunneling (BTBT) current shows the different temperature dependence. The subthreshold swing S for the TAT current degrades with temperature, while the S for BTBT current is temperature independent. (semiconductor devices)

  5. Intrinsically stretchable and healable semiconducting polymer for organic transistors.

    Science.gov (United States)

    Oh, Jin Young; Rondeau-Gagné, Simon; Chiu, Yu-Cheng; Chortos, Alex; Lissel, Franziska; Wang, Ging-Ji Nathan; Schroeder, Bob C; Kurosawa, Tadanori; Lopez, Jeffrey; Katsumata, Toru; Xu, Jie; Zhu, Chenxin; Gu, Xiaodan; Bae, Won-Gyu; Kim, Yeongin; Jin, Lihua; Chung, Jong Won; Tok, Jeffrey B-H; Bao, Zhenan

    2016-11-17

    Thin-film field-effect transistors are essential elements of stretchable electronic devices for wearable electronics. All of the materials and components of such transistors need to be stretchable and mechanically robust. Although there has been recent progress towards stretchable conductors, the realization of stretchable semiconductors has focused mainly on strain-accommodating engineering of materials, or blending of nanofibres or nanowires into elastomers. An alternative approach relies on using semiconductors that are intrinsically stretchable, so that they can be fabricated using standard processing methods. Molecular stretchability can be enhanced when conjugated polymers, containing modified side-chains and segmented backbones, are infused with more flexible molecular building blocks. Here we present a design concept for stretchable semiconducting polymers, which involves introducing chemical moieties to promote dynamic non-covalent crosslinking of the conjugated polymers. These non-covalent crosslinking moieties are able to undergo an energy dissipation mechanism through breakage of bonds when strain is applied, while retaining high charge transport abilities. As a result, our polymer is able to recover its high field-effect mobility performance (more than 1 square centimetre per volt per second) even after a hundred cycles at 100 per cent applied strain. Organic thin-film field-effect transistors fabricated from these materials exhibited mobility as high as 1.3 square centimetres per volt per second and a high on/off current ratio exceeding a million. The field-effect mobility remained as high as 1.12 square centimetres per volt per second at 100 per cent strain along the direction perpendicular to the strain. The field-effect mobility of damaged devices can be almost fully recovered after a solvent and thermal healing treatment. Finally, we successfully fabricated a skin-inspired stretchable organic transistor operating under deformations that might be

  6. Impact of doped boron concentration in emitter on high- and low-dose-rate damage in lateral PNP transistors

    International Nuclear Information System (INIS)

    Zheng Yuzhan; Lu Wu; Ren Diyuan; Wang Yiyuan; Wang Zhikuan; Yang Yonghui

    2010-01-01

    The characteristics of radiation damage under a high or low dose rate in lateral PNP transistors with a heavily or lightly doped emitter is investigated. Experimental results show that as the total dose increases, the base current of transistors would increase and the current gain decreases. Furthermore, more degradation has been found in lightly-doped PNP transistors, and an abnormal effect is observed in heavily doped transistors. The role of radiation defects, especially the double effects of oxide trapped charge, is discussed in heavily or lightly doped transistors. Finally, through comparison between the high- and low-dose-rate response of the collector current in heavily doped lateral PNP transistors, the abnormal effect can be attributed to the annealing of the oxide trapped charge. The response of the collector current, in heavily doped PNP transistors under high- and low-dose-rate irradiation is described in detail. (semiconductor integrated circuits)

  7. The Electrostatically Formed Nanowire: A Novel Platform for Gas-Sensing Applications

    Directory of Open Access Journals (Sweden)

    Gil Shalev

    2017-02-01

    Full Text Available The electrostatically formed nanowire (EFN gas sensor is based on a multiple-gate field-effect transistor with a conducting nanowire, which is not defined physically; rather, the nanowire is defined electrostatically post-fabrication, by using appropriate biasing of the different surrounding gates. The EFN is fabricated by using standard silicon processing technologies with relaxed design rules and, thereby, supports the realization of a low-cost and robust gas sensor, suitable for mass production. Although the smallest lithographic definition is higher than half a micrometer, appropriate tuning of the biasing of the gates concludes a conducting channel with a tunable diameter, which can transform the conducting channel into a nanowire with a diameter smaller than 20 nm. The tunable size and shape of the nanowire elicits tunable sensing parameters, such as sensitivity, limit of detection, and dynamic range, such that a single EFN gas sensor can perform with high sensitivity and a broad dynamic range by merely changing the biasing configuration. The current work reviews the design of the EFN gas sensor, its fabrication considerations and process flow, means of electrical characterization, and preliminary sensing performance at room temperature, underlying the unique and advantageous tunable capability of the device.

  8. Electronic transport in narrow-gap semiconductor nanowires

    Energy Technology Data Exchange (ETDEWEB)

    Bloemers, Christian

    2012-10-19

    from the field-effect measurements due to the influence of surface states. The homogeneity in transport characteristics of the InN nanowires allowed for an accurate analysis of the diameter dependence of the nanowire resistivity. The effect of donor deactivation has been found to increase the resistivity of InN nanowires with small diameters. Furthermore, a quantum confinement effect has been observed in GaAs/InAs core/shell nanowires. For very low shell thicknesses below 10 nm a drastic resistivity increase has been found. Simulations with a self consistent Schroedinger-Poisson solver confirmed the interpretation in terms of quantum confinement. A further major topic of this work has been the analysis of phase coherent transport at low temperatures. In particular, universal conductance fluctuations have been analyzed and a consistent method to determine the phase coherence length quantitatively has been developed. In addition, transport measurements on GaAs/InAs core/shell nanowires with a magnetic field applied parallel to the wire axis demonstrated Aharonov-Bohm-type conductance oscillations. An explanation in terms of coherent angular momentum quantum states in the conductive InAs shell has been developed to interpret these oscillations. To conclude, both room temperature and low temperature measurements allowed gaining insights into basic classical as well as quantum transport properties of nanowires. In the face of a future application of nanowires in quantum information processing or their use in so-called phase-based switching devices, valuable information is provided within this work. Furthermore, the room temperature results show that for application of nanowires in electronic devices, both the crystal structure and the surface conditions have to be controlled. Here, it will be inevitable for future progress to achieve a controlled passivation of the wire surfaces for defined and stable surface conditions. Furthermore, a more detailed investigation of the

  9. Electronic transport in narrow-gap semiconductor nanowires

    International Nuclear Information System (INIS)

    Bloemers, Christian

    2012-01-01

    from the field-effect measurements due to the influence of surface states. The homogeneity in transport characteristics of the InN nanowires allowed for an accurate analysis of the diameter dependence of the nanowire resistivity. The effect of donor deactivation has been found to increase the resistivity of InN nanowires with small diameters. Furthermore, a quantum confinement effect has been observed in GaAs/InAs core/shell nanowires. For very low shell thicknesses below 10 nm a drastic resistivity increase has been found. Simulations with a self consistent Schroedinger-Poisson solver confirmed the interpretation in terms of quantum confinement. A further major topic of this work has been the analysis of phase coherent transport at low temperatures. In particular, universal conductance fluctuations have been analyzed and a consistent method to determine the phase coherence length quantitatively has been developed. In addition, transport measurements on GaAs/InAs core/shell nanowires with a magnetic field applied parallel to the wire axis demonstrated Aharonov-Bohm-type conductance oscillations. An explanation in terms of coherent angular momentum quantum states in the conductive InAs shell has been developed to interpret these oscillations. To conclude, both room temperature and low temperature measurements allowed gaining insights into basic classical as well as quantum transport properties of nanowires. In the face of a future application of nanowires in quantum information processing or their use in so-called phase-based switching devices, valuable information is provided within this work. Furthermore, the room temperature results show that for application of nanowires in electronic devices, both the crystal structure and the surface conditions have to be controlled. Here, it will be inevitable for future progress to achieve a controlled passivation of the wire surfaces for defined and stable surface conditions. Furthermore, a more detailed investigation of the

  10. Temperature Effects on The Electrical Characteristics of In0.15Ga0.85As Pseudomorphic High-Electron-Mobility Transistors

    Directory of Open Access Journals (Sweden)

    BECHLAGHEM Fatima Zohra

    2017-10-01

    Full Text Available Nowadays, GaAs-based HEMTs and pseudomorphic HEMTs are speedily replacing conventional MESFET technology in military and commercial applications including, communication, radar and automotive technologies having need of high gain, and low noise figures especially at millimeter-wave frequencies. In this work, a short gate length pseudomorphic HEMT "p-HEMT" on GaAs substrate is treated. As temperature dependence study is a very important part of the complete characterization on active devices, the impact of temperature variation on the electrical properties of our 30nm short gate length pseudomorphic high-electron mobility In0.15Ga0.85As device is investigated. All our static DC device characteristics and RF response have been obtained using a device simulator that is Silvaco software to examine temperature impact on our device output current, transconductance and cutoff frequency. The 30nm gate pseudomorphic HEMT reported here exhibit superior DC and RF performances, Our results reveals a maximum drain-source current IDS up to 537.16 mA/mm, a peak extrinsic transconductance Gm of 345.4 mS/mm, a cutoff frequency Ft of 285.9 GHz, and a maximum frequency Fmax of 1580 GHz at room temperature.

  11. Dosimetric properties of MOS transistors

    International Nuclear Information System (INIS)

    Peter, I.; Frank, G.

    1977-01-01

    The performance of MOS transistors as gamma detectors has been tested. The dosimeter sensitivity has proved to be independent on the doses ranging from 10 3 to 10 6 R, and gamma energy of 137 Cs, 60 Co - sources and 5 - 18 MeV electrons. Fading of the space charge trapped by the SiO 2 layer of the transistor has appeared to be neglegible at room temperature after 400 hrs. The isochronous annealing in the temperature range of 40-260 deg C had a more substantial effect on the space charge of the transistor irradiated with 18 MeV electrons than on the 137 Cs gamma-irradiated transistors. This proved a repeated use of γ-dosemeters. MOS transistors are concluded to be promising for gamma dosimetry [ru

  12. Long Silver Nanowires Synthesis by Pulsed Electrodeposition

    Directory of Open Access Journals (Sweden)

    M.R. Batevandi

    2015-09-01

    Full Text Available Silver nanowires were pulse electrodeposited into nanopore anodic alumina oxide templates. The effects of continuous and pulse electrodeposition waveform on the microstructure properties of the nanowire arrays were studied. It is seen that the microstructure of nanowire is depend to pulse condition. The off time duration of pulse waveform enables to control the growth direction of Ag nanowires.

  13. Copper vanadate nanowires-based MIS capacitors: Synthesis, characterization, and their electrical charge storage applications

    KAUST Repository

    Shahid, Muhammad

    2013-07-14

    Copper vanadate (CVO) nanowires were grown on Si/SiO2 substrates by thermal annealing technique. A thin film of a CVO precursor at 550 C under an ambient atmosphere could also be prepared. The electrical properties of the nanowires embedded in the dielectrical layer were examined by capacitance-voltage (C-V) measurements. The C-V curves for Au/CVO nanowires embedded in an hafnium oxide layer/SiO2/p-Si capacitor at 298 K showed a clockwise hysteresis loop when the gate bias was swept cyclically. The hysteresis characteristics were studied further at different frequencies, which clearly indicated that the traps in the nanowires have a large charging-discharging time and thus the as-synthesized nanowires can be utilized for electrical charge storage devices. © 2013 Springer Science+Business Media Dordrecht.

  14. Bismuth nanowire growth under low deposition rate and its ohmic contact free of interface damage

    Directory of Open Access Journals (Sweden)

    Ye Tian

    2012-03-01

    Full Text Available High quality bismuth (Bi nanowire and its ohmic contact free of interface damage are quite desired for its research and application. In this paper, we propose one new way to prepare high-quality single crystal Bi nanowires at a low deposition rate, by magnetron sputtering method without the assistance of template or catalyst. The slow deposition growth mechanism of Bi nanowire is successfully explained by an anisotropic corner crossing effect, which is very different from existing explanations. A novel approach free of interface damage to ohmic contact of Bi nanowire is proposed and its good electrical conductivity is confirmed by I-V characteristic measurement. Our method provides a quick and convenient way to produce high-quality Bi nanowires and construct ohmic contact for desirable devices.

  15. Atomic characterization of Au clusters in vapor-liquid-solid grown silicon nanowires

    International Nuclear Information System (INIS)

    Chen, Wanghua; Roca i Cabarrocas, Pere; Pareige, Philippe; Castro, Celia; Xu, Tao; Grandidier, Bruno; Stiévenard, Didier

    2015-01-01

    By correlating atom probe tomography with other conventional microscope techniques (scanning electron microscope, scanning transmission electron microscope, and scanning tunneling microscopy), the distribution and composition of Au clusters in individual vapor-liquid-solid grown Si nanowires is investigated. Taking advantage of the characteristics of atom probe tomography, we have developed a sample preparation method by inclining the sample at certain angle to characterize the nanowire sidewall without using focused ion beam. With three-dimensional atomic scale reconstruction, we provide direct evidence of Au clusters tending to remain on the nanowire sidewall rather than being incorporated into the Si nanowires. Based on the composition measurement of Au clusters (28% ± 1%), we have demonstrated the supersaturation of Si atoms in Au clusters, which supports the hypothesis that Au clusters are formed simultaneously during nanowire growth rather than during the cooling process

  16. Atomic characterization of Au clusters in vapor-liquid-solid grown silicon nanowires

    Energy Technology Data Exchange (ETDEWEB)

    Chen, Wanghua; Roca i Cabarrocas, Pere [Laboratoire de Physique des Interfaces et Couches Minces (LPICM), UMR 7647, CNRS, Ecole Polytechnique, 91128 Palaiseau (France); Pareige, Philippe; Castro, Celia [Groupe de Physique des Matériaux (GPM), Université et INSA de Rouen, UMR 6634, CNRS, Av. de l' Université, BP 12, 76801 Saint Etienne du Rouvray (France); Xu, Tao; Grandidier, Bruno; Stiévenard, Didier [Institut d' Electronique et de Microélectronique et de Nanotechnologies (IEMN), UMR 8520, CNRS, Département ISEN, 41 bd Vauban, 59046 Lille Cedex (France)

    2015-09-14

    By correlating atom probe tomography with other conventional microscope techniques (scanning electron microscope, scanning transmission electron microscope, and scanning tunneling microscopy), the distribution and composition of Au clusters in individual vapor-liquid-solid grown Si nanowires is investigated. Taking advantage of the characteristics of atom probe tomography, we have developed a sample preparation method by inclining the sample at certain angle to characterize the nanowire sidewall without using focused ion beam. With three-dimensional atomic scale reconstruction, we provide direct evidence of Au clusters tending to remain on the nanowire sidewall rather than being incorporated into the Si nanowires. Based on the composition measurement of Au clusters (28% ± 1%), we have demonstrated the supersaturation of Si atoms in Au clusters, which supports the hypothesis that Au clusters are formed simultaneously during nanowire growth rather than during the cooling process.

  17. Characterization of silver-gallium nanowires for force and mass sensing applications

    International Nuclear Information System (INIS)

    Biedermann, Laura B; Reifenberger, Ronald G; Tung, Ryan C; Raman, Arvind; Yazdanpanah, Mehdi M; Cohn, Robert W

    2010-01-01

    We investigate the mechanical properties of cantilevered silver-gallium (Ag 2 Ga) nanowires using laser Doppler vibrometry. From measurements of the resonant frequencies and associated operating deflection shapes, we demonstrate that these Ag 2 Ga nanowires behave as ideal Euler-Bernoulli beams. Furthermore, radial asymmetries in these nanowires are detected through high resolution measurements of the vibration spectra. These crystalline nanowires possess many ideal characteristics for nanoscale force and mass sensing, including small spring constants (as low as 10 -4 N m -1 ), high frequency bandwidth with resonance frequencies in the 0.02-10 MHz range, small suspended mass (picograms), and relatively high Q-factors (∼2-50) under ambient conditions. We evaluate the utility of Ag 2 Ga nanowires for nanocantilever applications, including ultrasmall mass and high frequency bandwidth piconewton force detection.

  18. Chirality-Discriminated Conductivity of Metal-Amino Acid Biocoordination Polymer Nanowires.

    Science.gov (United States)

    Zheng, Jianzhong; Wu, Yijin; Deng, Ke; He, Meng; He, Liangcan; Cao, Jing; Zhang, Xugang; Liu, Yaling; Li, Shunxing; Tang, Zhiyong

    2016-09-27

    Biocoordination polymer (BCP) nanowires are successfully constructed through self-assembly of chiral cysteine amino acids and Cd cations in solution. The varied chirality of cysteine is explored to demonstrate the difference of BCP nanowires in both morphology and structure. More interestingly and surprisingly, the electrical property measurement reveals that, although all Cd(II)/cysteine BCP nanowires behave as semiconductors, the conductivity of the Cd(II)/dl-cysteine nanowires is 4 times higher than that of the Cd(II)/l-cysteine or Cd(II)/d-cysteine ones. The origin of such chirality-discriminated characteristics registered in BCP nanowires is further elucidated by theoretical calculation. These findings demonstrate that the morphology, structure, and property of BCP nanostructures could be tuned by the chirality of the bridging ligands, which will shed light on the comprehension of chirality transcription as well as construction of chirality-regulated functional materials.

  19. Copper vanadate nanowires-based MIS capacitors: synthesis, characterization, and their electrical charge storage applications

    Energy Technology Data Exchange (ETDEWEB)

    Shahid, Muhammad, E-mail: shahid@skku.edu [King Abdullah University of Science and Technology, Material Science and Engineering (Saudi Arabia); Nafady, Ayman [King Saud University, Department of Chemistry, College of Science (Saudi Arabia); Shakir, Imran; Rana, Usman Ali; Sarfraz, Mansoor [King Saud University, Sustainable Energy Technologies (SET) Center, College of Engineering (Saudi Arabia); Warsi, Muhammad Farooq [The Islamia University of Bahawalpur, Department of Chemistry (Pakistan); Hussain, Rafaqat [Universiti Teknologi Malaysia, Ibnu Sina Institute for Fundamental Science Studies (Malaysia); Ashiq, Muhammad Naeem [Bahauddin Zakaryia University, Institute of Chemical Sciences (Pakistan)

    2013-08-15

    Copper vanadate (CVO) nanowires were grown on Si/SiO{sub 2} substrates by thermal annealing technique. A thin film of a CVO precursor at 550 Degree-Sign C under an ambient atmosphere could also be prepared. The electrical properties of the nanowires embedded in the dielectrical layer were examined by capacitance-voltage (C-V) measurements. The C-V curves for Au/CVO nanowires embedded in an hafnium oxide layer/SiO{sub 2}/p-Si capacitor at 298 K showed a clockwise hysteresis loop when the gate bias was swept cyclically. The hysteresis characteristics were studied further at different frequencies, which clearly indicated that the traps in the nanowires have a large charging-discharging time and thus the as-synthesized nanowires can be utilized for electrical charge storage devices.

  20. Copper vanadate nanowires-based MIS capacitors: Synthesis, characterization, and their electrical charge storage applications

    KAUST Repository

    Shahid, Muhammad; Nafady, Ayman; Shakir, Imran; Rana, Usman Ali; Sarfraz, Mansoor M.; Warsi, Muhammad Farooq; Hussain, Rafaqat; Ashiq, Muhammad Naeem

    2013-01-01

    Copper vanadate (CVO) nanowires were grown on Si/SiO2 substrates by thermal annealing technique. A thin film of a CVO precursor at 550 C under an ambient atmosphere could also be prepared. The electrical properties of the nanowires embedded in the dielectrical layer were examined by capacitance-voltage (C-V) measurements. The C-V curves for Au/CVO nanowires embedded in an hafnium oxide layer/SiO2/p-Si capacitor at 298 K showed a clockwise hysteresis loop when the gate bias was swept cyclically. The hysteresis characteristics were studied further at different frequencies, which clearly indicated that the traps in the nanowires have a large charging-discharging time and thus the as-synthesized nanowires can be utilized for electrical charge storage devices. © 2013 Springer Science+Business Media Dordrecht.

  1. Ambipolar phosphorene field effect transistor.

    Science.gov (United States)

    Das, Saptarshi; Demarteau, Marcel; Roelofs, Andreas

    2014-11-25

    In this article, we demonstrate enhanced electron and hole transport in few-layer phosphorene field effect transistors (FETs) using titanium as the source/drain contact electrode and 20 nm SiO2 as the back gate dielectric. The field effect mobility values were extracted to be ∼38 cm(2)/Vs for electrons and ∼172 cm(2)/Vs for the holes. On the basis of our experimental data, we also comprehensively discuss how the contact resistances arising due to the Schottky barriers at the source and the drain end effect the different regime of the device characteristics and ultimately limit the ON state performance. We also propose and implement a novel technique for extracting the transport gap as well as the Schottky barrier height at the metal-phosphorene contact interface from the ambipolar transfer characteristics of the phosphorene FETs. This robust technique is applicable to any ultrathin body semiconductor which demonstrates symmetric ambipolar conduction. Finally, we demonstrate a high gain, high noise margin, chemical doping free, and fully complementary logic inverter based on ambipolar phosphorene FETs.

  2. Aging of Organic Nanowires

    DEFF Research Database (Denmark)

    Balzer, Frank; Schiek, Manuela; Osadnik, Andreas

    2012-01-01

    Organic semiconductors formed by epitaxial growth from small molecules such as the para-phenylenes or squaraines promise a vast application potential as the active ingredient in electric and optoelectronic devices. Their self-organization into organic nanowires or "nanofibers" adds a peculiar...... attribute, making them especially interesting for light generation in OLEDs and for light-harvesting devices such as solar cells. Functionalization of the molecules allows the customization of optical and electrical properties. However, aging of the wires might lead to a considerable decrease in device...... performance over time. In this study the morphological stability of organic nanoclusters and nanowires from the methoxy functionalized quaterphenylene, 4,4'''dimethoxy-1,1':4',1''4'',1'''-quaterphenylene (MOP4), is investigated in detail. Aging experiments conducted by atomic force microscopy under ambient...

  3. Spin Hall effect transistor

    Czech Academy of Sciences Publication Activity Database

    Wunderlich, Joerg; Park, B.G.; Irvine, A.C.; Zarbo, Liviu; Rozkotová, E.; Němec, P.; Novák, Vít; Sinova, Jairo; Jungwirth, Tomáš

    2010-01-01

    Roč. 330, č. 6012 (2010), s. 1801-1804 ISSN 0036-8075 R&D Projects: GA AV ČR KAN400100652; GA MŠk LC510 EU Projects: European Commission(XE) 215368 - SemiSpinNet Grant - others:AV ČR(CZ) AP0801 Program:Akademická prémie - Praemium Academiae Institutional research plan: CEZ:AV0Z10100521 Keywords : spin Hall effect * spintronics * spin transistor Subject RIV: BM - Solid Matter Physics ; Magnetism Impact factor: 31.364, year: 2010

  4. Characterization of Nanowire Photodetectors

    Science.gov (United States)

    2016-11-28

    characterization system and picosecond pulsed laser source will be used to provide deeper insight into the fast charge carrier dynamics in the GaAsSb and...value of the current fluctuations for a particular frequency, f is the effective measurement bandwidth at the discrete frequency point, and IDS is...GaAsSb CS nanowires. The best fit of the spectra with the simulation carried out using Matlab revealed flicker noise at lower frequency having 1/f

  5. A deep etching mechanism for trench-bridging silicon nanowires.

    Science.gov (United States)

    Tasdemir, Zuhal; Wollschläger, Nicole; Österle, Werner; Leblebici, Yusuf; Alaca, B Erdem

    2016-03-04

    Introducing a single silicon nanowire with a known orientation and dimensions to a specific layout location constitutes a major challenge. The challenge becomes even more formidable, if one chooses to realize the task in a monolithic fashion with an extreme topography, a characteristic of microsystems. The need for such a monolithic integration is fueled by the recent surge in the use of silicon nanowires as functional building blocks in various electromechanical and optoelectronic applications. This challenge is addressed in this work by introducing a top-down, silicon-on-insulator technology. The technology provides a pathway for obtaining well-controlled silicon nanowires along with the surrounding microscale features up to a three-order-of-magnitude scale difference. A two-step etching process is developed, where the first shallow etch defines a nanoscale protrusion on the wafer surface. After applying a conformal protection on the protrusion, a deep etch step is carried out forming the surrounding microscale features. A minimum nanowire cross-section of 35 nm by 168 nm is demonstrated in the presence of an etch depth of 10 μm. Nanowire cross-sectional features are characterized via transmission electron microscopy and linked to specific process steps. The technology allows control on all dimensional aspects along with the exact location and orientation of the silicon nanowire. The adoption of the technology in the fabrication of micro and nanosystems can potentially lead to a significant reduction in process complexity by facilitating direct access to the nanowire during surface processes such as contact formation and doping.

  6. A deep etching mechanism for trench-bridging silicon nanowires

    International Nuclear Information System (INIS)

    Tasdemir, Zuhal; Alaca, B Erdem; Wollschläger, Nicole; Österle, Werner; Leblebici, Yusuf

    2016-01-01

    Introducing a single silicon nanowire with a known orientation and dimensions to a specific layout location constitutes a major challenge. The challenge becomes even more formidable, if one chooses to realize the task in a monolithic fashion with an extreme topography, a characteristic of microsystems. The need for such a monolithic integration is fueled by the recent surge in the use of silicon nanowires as functional building blocks in various electromechanical and optoelectronic applications. This challenge is addressed in this work by introducing a top-down, silicon-on-insulator technology. The technology provides a pathway for obtaining well-controlled silicon nanowires along with the surrounding microscale features up to a three-order-of-magnitude scale difference. A two-step etching process is developed, where the first shallow etch defines a nanoscale protrusion on the wafer surface. After applying a conformal protection on the protrusion, a deep etch step is carried out forming the surrounding microscale features. A minimum nanowire cross-section of 35 nm by 168 nm is demonstrated in the presence of an etch depth of 10 μm. Nanowire cross-sectional features are characterized via transmission electron microscopy and linked to specific process steps. The technology allows control on all dimensional aspects along with the exact location and orientation of the silicon nanowire. The adoption of the technology in the fabrication of micro and nanosystems can potentially lead to a significant reduction in process complexity by facilitating direct access to the nanowire during surface processes such as contact formation and doping. (paper)

  7. A deep etching mechanism for trench-bridging silicon nanowires

    Science.gov (United States)

    Tasdemir, Zuhal; Wollschläger, Nicole; Österle, Werner; Leblebici, Yusuf; Erdem Alaca, B.

    2016-03-01

    Introducing a single silicon nanowire with a known orientation and dimensions to a specific layout location constitutes a major challenge. The challenge becomes even more formidable, if one chooses to realize the task in a monolithic fashion with an extreme topography, a characteristic of microsystems. The need for such a monolithic integration is fueled by the recent surge in the use of silicon nanowires as functional building blocks in various electromechanical and optoelectronic applications. This challenge is addressed in this work by introducing a top-down, silicon-on-insulator technology. The technology provides a pathway for obtaining well-controlled silicon nanowires along with the surrounding microscale features up to a three-order-of-magnitude scale difference. A two-step etching process is developed, where the first shallow etch defines a nanoscale protrusion on the wafer surface. After applying a conformal protection on the protrusion, a deep etch step is carried out forming the surrounding microscale features. A minimum nanowire cross-section of 35 nm by 168 nm is demonstrated in the presence of an etch depth of 10 μm. Nanowire cross-sectional features are characterized via transmission electron microscopy and linked to specific process steps. The technology allows control on all dimensional aspects along with the exact location and orientation of the silicon nanowire. The adoption of the technology in the fabrication of micro and nanosystems can potentially lead to a significant reduction in process complexity by facilitating direct access to the nanowire during surface processes such as contact formation and doping.

  8. Self-Consistent Study of Conjugated Aromatic Molecular Transistors

    International Nuclear Information System (INIS)

    Jing, Wang; Yun-Ye, Liang; Hao, Chen; Peng, Wang; Note, R.; Mizuseki, H.; Kawazoe, Y.

    2010-01-01

    We study the current through conjugated aromatic molecular transistors modulated by a transverse field. The self-consistent calculation is realized with density function theory through the standard quantum chemistry software Gaussian03 and the non-equilibrium Green's function formalism. The calculated I – V curves controlled by the transverse field present the characteristics of different organic molecular transistors, the transverse field effect of which is improved by the substitutions of nitrogen atoms or fluorine atoms. On the other hand, the asymmetry of molecular configurations to the axis connecting two sulfur atoms is in favor of realizing the transverse field modulation. Suitably designed conjugated aromatic molecular transistors possess different I – V characteristics, some of them are similar to those of metal-oxide-semiconductor field-effect transistors (MOSFET). Some of the calculated molecular devices may work as elements in graphene electronics. Our results present the richness and flexibility of molecular transistors, which describe the colorful prospect of next generation devices. (condensed matter: electronic structure, electrical, magnetic, and optical properties)

  9. The SERS and TERS effects obtained by gold droplets on top of Si nanowires.

    Science.gov (United States)

    Becker, M; Sivakov, V; Andrä, G; Geiger, R; Schreiber, J; Hoffmann, S; Michler, J; Milenin, A P; Werner, P; Christiansen, S H

    2007-01-01

    We show that hemispherical gold droplets on top of silicon nanowires when grown by the vapor-liquid-solid (VLS) mechanism, can produce a significant enhancement of Raman scattered signals. Signal enhancement for a few or even just single gold droplets is demonstrated by analyzing the enhanced Raman signature of malachite green molecules. For this experiment, trenches (approximately 800 nm wide) were etched in a silicon-on-insulator (SOI) wafer along crystallographic directions that constitute sidewalls ({110} surfaces) suitable for the growth of silicon nanowires in directions with the intention that the gold droplets on the silicon nanowires can meet somewhere in the trench when growth time is carefully selected. Another way to realize gold nanostructures in close vicinity is to attach a silicon nanowire with a gold droplet onto an atomic force microscopy (AFM) tip and to bring this tip toward another gold-coated AFM tip where malachite green molecules were deposited prior to the measurements. In both experiments, signal enhancement of characteristic Raman bands of malachite green molecules was observed. This indicates that silicon nanowires with gold droplets atop can act as efficient probes for tip-enhanced Raman spectroscopy (TERS). In our article, we show that a nanowire TERS probe can be fabricated by welding nanowires with gold droplets to AFM tips in a scanning electron microscope (SEM). TERS tips made from nanowires could improve the spatial resolution of Raman spectroscopy so that measurements on the nanometer scale are possible.

  10. Controlled surface diffusion in plasma-enhanced chemical vapor deposition of GaN nanowires

    International Nuclear Information System (INIS)

    Hou, W C; Hong, Franklin Chau-Nan

    2009-01-01

    This study investigates the growth of GaN nanowires by controlling the surface diffusion of Ga species on sapphire in a plasma-enhanced chemical vapor deposition (CVD) system. Under nitrogen-rich growth conditions, Ga has a tendency to adsorb on the substrate surface diffusing to nanowires to contribute to their growth. The significance of surface diffusion on the growth of nanowires is dependent on the environment of the nanowire on the substrate surface as well as the gas phase species and compositions. Under nitrogen-rich growth conditions, the growth rate is strongly dependent on the surface diffusion of gallium, but the addition of 5% hydrogen in nitrogen plasma instantly diminishes the surface diffusion effect. Gallium desorbs easily from the surface by reaction with hydrogen. On the other hand, under gallium-rich growth conditions, nanowire growth is shown to be dominated by the gas phase deposition, with negligible contribution from surface diffusion. This is the first study reporting the inhibition of surface diffusion effects by hydrogen addition, which can be useful in tailoring the growth and characteristics of nanowires. Without any evidence of direct deposition on the nanowire surface, gallium and nitrogen are shown to dissolve into the catalyst for growing the nanowires at 900 deg. C.

  11. Nano-soldering of magnetically aligned three-dimensional nanowire networks

    International Nuclear Information System (INIS)

    Gao Fan; Gu Zhiyong

    2010-01-01

    It is extremely challenging to fabricate 3D integrated nanostructures and hybrid nanoelectronic devices. In this paper, we report a simple and efficient method to simultaneously assemble and solder nanowires into ordered 3D and electrically conductive nanowire networks. Nano-solders such as tin were fabricated onto both ends of multi-segmented nanowires by a template-assisted electrodeposition method. These nanowires were then self-assembled and soldered into large-scale 3D network structures by magnetic field assisted assembly in a liquid medium with a high boiling point. The formation of junctions/interconnects between the nanowires and the scale of the assembly were dependent on the solder reflow temperature and the strength of the magnetic field. The size of the assembled nanowire networks ranged from tens of microns to millimeters. The electrical characteristics of the 3D nanowire networks were measured by regular current-voltage (I-V) measurements using a probe station with micropositioners. Nano-solders, when combined with assembling techniques, can be used to efficiently connect and join nanowires with low contact resistance, which are very well suited for sensor integration as well as nanoelectronic device fabrication.

  12. Quantum transport in semiconductor nanowires

    NARCIS (Netherlands)

    Van Dam, J.

    2006-01-01

    This thesis describes a series of experiments aimed at understanding the low-temperature electrical transport properties of semiconductor nanowires. The semiconductor nanowires (1-100 nm in diameter) are grown from nanoscale gold particles via a chemical process called vapor-liquid-solid (VLS)

  13. Research Update: Nanoscale electrochemical transistors in correlated oxides

    Directory of Open Access Journals (Sweden)

    Teruo Kanki

    2017-04-01

    Full Text Available Large reversible changes of the electronic transport properties of solid-state oxide materials induced by electrochemical fields have received much attention as a new research avenue in iontronics. In this research update, dramatic transport changes in vanadium dioxide (VO2 nanowires were demonstrated by electric field-induced hydrogenation at room temperature through the nanogaps separated by humid air in a field-effect transistor structure with planar-type gates. This unique structure allowed us to investigate hydrogen intercalation and diffusion behavior in VO2 channels with respect to both time and space. Our results will contribute to further strategic researches to examine fundamental chemical and physical properties of devices and develop iontronic applications, as well as offering new directions to explore emerging functions for sensing, energy, and neuromorphologic devices combining ionic and electronic behaviors in solid-state materials.

  14. Physical limits of silicon transistors and circuits

    International Nuclear Information System (INIS)

    Keyes, Robert W

    2005-01-01

    A discussion on transistors and electronic computing including some history introduces semiconductor devices and the motivation for miniaturization of transistors. The changing physics of field-effect transistors and ways to mitigate the deterioration in performance caused by the changes follows. The limits of transistors are tied to the requirements of the chips that carry them and the difficulties of fabricating very small structures. Some concluding remarks about transistors and limits are presented

  15. Fast switching of bistable magnetic nanowires through collective spin reversal

    Science.gov (United States)

    Vindigni, Alessandro; Rettori, Angelo; Bogani, Lapo; Caneschi, Andrea; Gatteschi, Dante; Sessoli, Roberta; Novak, Miguel A.

    2005-08-01

    The use of magnetic nanowires as memory units is made possible by the exponential divergence of the characteristic time for magnetization reversal at low temperature, but the slow relaxation makes the manipulation of the frozen magnetic states difficult. We suggest that finite-size segments can show a fast switching if collective reversal of the spins is taken into account. This mechanism gives rise at low temperatures to a scaling law for the dynamic susceptibility that has been experimentally observed for the dilute molecular chain Co(hfac)2NitPhOMe. These results suggest a possible way of engineering nanowires for fast switching of the magnetization.

  16. Novel mechanical behaviors of wurtzite CdSe nanowires

    Energy Technology Data Exchange (ETDEWEB)

    Fu, Bing [Shanghai Normal University, Department of Physics (China); Chen, Li [MCPHS University, School of Arts and Sciences (United States); Xie, Yiqun; Feng, Jie; Ye, Xiang, E-mail: yexiang@shnu.edu.cn [Shanghai Normal University, Department of Physics (China)

    2015-09-15

    As an important semiconducting nanomaterial, CdSe nanowires have attracted much attention. Although many studies have been conducted in the electronic and optical properties of CdSe NWs, the mechanical properties of Wurtzite (WZ) CdSe nanowires remain unclear. Using molecular dynamics simulations, we have studied the tensile mechanical properties and behaviors of [0001]-oriented Wurtzite CdSe nanowires. By monitoring the stretching processes of CdSe nanowires, three distinct structures are found: the WZ wire, a body-centered tetragonal structure with four-atom rings (denoted as BCT-4), and a structure that consists of ten-atom rings with two four-atom rings (denoted as TAR-4) which is observed for the first time. Not only the elastic tensile characteristics are highly reversible under unloading, but a reverse transition between TAR-4 and BCT-4 is also observed. The stretching processes also have a strong dependence on temperature. A tubular structure similar to carbon nanotubes is observed at 150 K, a single-atom chain is formed at 300, 350 and 450 K, and a double-atom chain is found at 600 K. Our findings on tensile mechanical properties of WZ CdSe nanowires does not only provide inspiration to future study on other properties of CdSe nanomaterials but also help design and build efficient nanoscale devices.

  17. Copper atomic-scale transistors.

    Science.gov (United States)

    Xie, Fangqing; Kavalenka, Maryna N; Röger, Moritz; Albrecht, Daniel; Hölscher, Hendrik; Leuthold, Jürgen; Schimmel, Thomas

    2017-01-01

    We investigated copper as a working material for metallic atomic-scale transistors and confirmed that copper atomic-scale transistors can be fabricated and operated electrochemically in a copper electrolyte (CuSO 4 + H 2 SO 4 ) in bi-distilled water under ambient conditions with three microelectrodes (source, drain and gate). The electrochemical switching-on potential of the atomic-scale transistor is below 350 mV, and the switching-off potential is between 0 and -170 mV. The switching-on current is above 1 μA, which is compatible with semiconductor transistor devices. Both sign and amplitude of the voltage applied across the source and drain electrodes ( U bias ) influence the switching rate of the transistor and the copper deposition on the electrodes, and correspondingly shift the electrochemical operation potential. The copper atomic-scale transistors can be switched using a function generator without a computer-controlled feedback switching mechanism. The copper atomic-scale transistors, with only one or two atoms at the narrowest constriction, were realized to switch between 0 and 1 G 0 ( G 0 = 2e 2 /h; with e being the electron charge, and h being Planck's constant) or 2 G 0 by the function generator. The switching rate can reach up to 10 Hz. The copper atomic-scale transistor demonstrates volatile/non-volatile dual functionalities. Such an optimal merging of the logic with memory may open a perspective for processor-in-memory and logic-in-memory architectures, using copper as an alternative working material besides silver for fully metallic atomic-scale transistors.

  18. Two-Dimensional Modeling of Aluminum Gallium Nitride/Gallium Nitride High Electron Mobility Transistor

    National Research Council Canada - National Science Library

    Holmes, Kenneth

    2002-01-01

    Gallium Nitride (GaN) High Electron Mobility Transistors (HEMT's) are microwave power devices that have the performance characteristics to improve the capabilities of current and future Navy radar and communication systems...

  19. A high current, high speed pulser using avalanche transistors

    International Nuclear Information System (INIS)

    Hosono, Yoneichi; Hasegawa, Ken-ichi

    1985-01-01

    A high current, high speed pulser for the beam pulsing of a linear accelerator is described. It uses seven avalanche transistors in cascade. Design of a trigger circuit to obtain fast rise time is discussed. The characteristics of the pulser are : (a) Rise time = 0.9 ns (FWHM) and (d) Life time asymptotically equals 2000 -- 3000 hr (at 50 Hz). (author)

  20. Hole-dominated transport in InSb nanowires grown on high-quality InSb films

    Energy Technology Data Exchange (ETDEWEB)

    Algarni, Zaina; George, David; Singh, Abhay; Lin, Yuankun; Philipose, U., E-mail: usha.philipose@unt.edu [University of North Texas, Department of Physics (United States)

    2016-12-15

    We have developed an effective strategy for synthesizing p-type indium antimonide (InSb) nanowires on a thin film of InSb grown on glass substrate. The InSb films were grown by a chemical reaction between Sb{sub 2}S{sub 3} and In and were characterized by structural, compositional, and optical studies. Scanning electron microscopy (SEM) and atomic force microscopy (AFM) studies reveal that the surface of the substrate is covered with a polycrystalline InSb film comprised of sub-micron sized InSb islands. Energy dispersive X-ray (EDX) results show that the film is stoichiometric InSb. The optical constants of the InSb film, characterized using a variable-angle spectroscopic ellipsometer (VASE) shows a maximum value for refractive index at 3.7 near 1.8 eV, and the extinction coefficient (k) shows a maximum value 3.3 near 4.1 eV. InSb nanowires were subsequently grown on the InSb film with 20 nm sized Au nanoparticles functioning as the metal catalyst initiating nanowire growth. The InSb nanowires with diameters in the range of 40–60 nm exhibit good crystallinity and were found to be rich in Sb. High concentrations of anions in binary semiconductors are known to introduce acceptor levels within the band gap. This un-intentional doping of the InSb nanowire resulting in hole-dominated transport in the nanowires is demonstrated by the fabrication of a p-channel nanowire field effect transistor. The hole concentration and field effect mobility are estimated to be ≈1.3 × 10{sup 17} cm{sup −3} and 1000 cm{sup 2} V{sup −1} s{sup −1}, respectively, at room temperature, values that are particularly attractive for the technological implications of utilizing p-InSb nanowires in CMOS electronics.

  1. Hole-dominated transport in InSb nanowires grown on high-quality InSb films

    Science.gov (United States)

    Algarni, Zaina; George, David; Singh, Abhay; Lin, Yuankun; Philipose, U.

    2016-12-01

    We have developed an effective strategy for synthesizing p-type indium antimonide (InSb) nanowires on a thin film of InSb grown on glass substrate. The InSb films were grown by a chemical reaction between S b 2 S 3 and I n and were characterized by structural, compositional, and optical studies. Scanning electron microscopy (SEM) and atomic force microscopy (AFM) studies reveal that the surface of the substrate is covered with a polycrystalline InSb film comprised of sub-micron sized InSb islands. Energy dispersive X-ray (EDX) results show that the film is stoichiometric InSb. The optical constants of the InSb film, characterized using a variable-angle spectroscopic ellipsometer (VASE) shows a maximum value for refractive index at 3.7 near 1.8 eV, and the extinction coefficient (k) shows a maximum value 3.3 near 4.1 eV. InSb nanowires were subsequently grown on the InSb film with 20 nm sized Au nanoparticles functioning as the metal catalyst initiating nanowire growth. The InSb nanowires with diameters in the range of 40-60 nm exhibit good crystallinity and were found to be rich in Sb. High concentrations of anions in binary semiconductors are known to introduce acceptor levels within the band gap. This un-intentional doping of the InSb nanowire resulting in hole-dominated transport in the nanowires is demonstrated by the fabrication of a p-channel nanowire field effect transistor. The hole concentration and field effect mobility are estimated to be ≈1.3 × 1017 cm-3 and 1000 cm2 V-1 s-1, respectively, at room temperature, values that are particularly attractive for the technological implications of utilizing p-InSb nanowires in CMOS electronics.

  2. Fabrication of Nano-Micro Hybrid Structures by Replication and Surface Treatment of Nanowires

    Directory of Open Access Journals (Sweden)

    Yeonho Jeong

    2017-07-01

    Full Text Available Nanowire structures have attracted attention in various fields, since new characteristics could be acquired in minute regions. Especially, Anodic Aluminum Oxide (AAO is widely used in the fabrication of nanostructures, which has many nanosized pores and well-organized nano pattern. Using AAO as a template for replication, nanowires with a very high aspect ratio can be fabricated. Herein, we propose a facile method to fabricate a nano-micro hybrid structure using nanowires replicated from AAO, and surface treatment. A polymer resin was coated between Polyethylene terephthalate (PET and the AAO filter, roller pressed, and UV-cured. After the removal of aluminum by using NaOH solution, the nanowires aggregated to form a micropattern. The resulting structure was subjected to various surface treatments to investigate the surface behavior and wettability. As opposed to reported data, UV-ozone treatment can enhance surface hydrophobicity because the UV energy affects the nanowire surface, thus altering the shape of the aggregated nanowires. The hydrophobicity of the surface could be further improved by octadecyltrichlorosilane (OTS coating immediately after UV-ozone treatment. We thus demonstrated that the nano-micro hybrid structure could be formed in the middle of nanowire replication, and then, the shape and surface characteristics could be controlled by surface treatment.

  3. Charge-density depinning at metal contacts of graphene field-effect transistors

    OpenAIRE

    Nouchi, Ryo; Tanigaki, Katsumi

    2010-01-01

    An anomalous distortion is often observed in the transfer characteristics of graphene field-effect transistors. We fabricate graphene transistors with ferromagnetic metal electrodes, which reproducibly display distorted transfer characteristics, and show that the distortion is caused by metal-graphene contacts with no charge-density pinning effect. The pinning effect, where the gate voltage cannot tune the charge density of graphene at the metal electrodes, has been experimentally observed; h...

  4. Transistor and integrated circuit manufacture

    International Nuclear Information System (INIS)

    Colman, D.

    1978-01-01

    This invention relates to the manufacture of transistors and integrated circuits by ion bombardment techniques and is particularly, but not exclusively, of value in the manufacture of so-called integrated injection logic circuitry. (author)

  5. High transconductance organic electrochemical transistors

    Science.gov (United States)

    Khodagholy, Dion; Rivnay, Jonathan; Sessolo, Michele; Gurfinkel, Moshe; Leleux, Pierre; Jimison, Leslie H.; Stavrinidou, Eleni; Herve, Thierry; Sanaur, Sébastien; Owens, Róisín M.; Malliaras, George G.

    2013-07-01

    The development of transistors with high gain is essential for applications ranging from switching elements and drivers to transducers for chemical and biological sensing. Organic transistors have become well-established based on their distinct advantages, including ease of fabrication, synthetic freedom for chemical functionalization, and the ability to take on unique form factors. These devices, however, are largely viewed as belonging to the low-end of the performance spectrum. Here we present organic electrochemical transistors with a transconductance in the mS range, outperforming transistors from both traditional and emerging semiconductors. The transconductance of these devices remains fairly constant from DC up to a frequency of the order of 1 kHz, a value determined by the process of ion transport between the electrolyte and the channel. These devices, which continue to work even after being crumpled, are predicted to be highly relevant as transducers in biosensing applications.

  6. Organic tunnel field effect transistors

    KAUST Repository

    Tietze, Max Lutz; Lussem, Bjorn; Liu, Shiyi

    2017-01-01

    Various examples are provided for organic tunnel field effect transistors (OTFET), and methods thereof. In one example, an OTFET includes a first intrinsic layer (i-layer) of organic semiconductor material disposed over a gate insulating layer

  7. High transconductance organic electrochemical transistors

    Science.gov (United States)

    Khodagholy, Dion; Rivnay, Jonathan; Sessolo, Michele; Gurfinkel, Moshe; Leleux, Pierre; Jimison, Leslie H.; Stavrinidou, Eleni; Herve, Thierry; Sanaur, Sébastien; Owens, Róisín M.; Malliaras, George G.

    2013-01-01

    The development of transistors with high gain is essential for applications ranging from switching elements and drivers to transducers for chemical and biological sensing. Organic transistors have become well-established based on their distinct advantages, including ease of fabrication, synthetic freedom for chemical functionalization, and the ability to take on unique form factors. These devices, however, are largely viewed as belonging to the low-end of the performance spectrum. Here we present organic electrochemical transistors with a transconductance in the mS range, outperforming transistors from both traditional and emerging semiconductors. The transconductance of these devices remains fairly constant from DC up to a frequency of the order of 1 kHz, a value determined by the process of ion transport between the electrolyte and the channel. These devices, which continue to work even after being crumpled, are predicted to be highly relevant as transducers in biosensing applications. PMID:23851620

  8. Transistor and integrated circuit manufacture

    Energy Technology Data Exchange (ETDEWEB)

    Colman, D

    1978-09-27

    This invention relates to the manufacture of transistors and integrated circuits by ion bombardment techniques and is particularly, but not exclusively, of value in the manufacture of so-called integrated injection logic circuitry.

  9. Planar transistors and impatt diodes with ion implantation

    International Nuclear Information System (INIS)

    Dorendorf, H.; Glawischnig, H.; Grasser, L.; Hammerschmitt, J.

    1975-03-01

    Low frequency planar npn and pnp transistors have been developed in which the base and emitter have been fabricated using ion implantation of boron and phosphorus by a drive-in diffusion. Electrical parameters of the transistors are comparable with conventionally produced transistors; the noise figure was improved and production tolerances were significantly reduced. Silicon-impatt diodes for the microwave range were also fabricated with implanted pn junctions and tested for their high frequency characteristics. These diodes, made in an improved upside down technology, delivered output power up to 40 mW (burn out power) at 30 GHz. Reverse leakage current and current carrying capability of these diodes were comparable to diffused structures. (orig.) 891 ORU 892 MB [de

  10. Parametrization of the radiation induced leakage current increase of NMOS transistors

    CERN Document Server

    Backhaus, Malte

    2017-01-13

    The increase of the leakage current of NMOS transistors during exposure to ionizing radiation is known and well studied. Radiation hardness by design techniques have been developed to mitigate this effect and have been successfully used. More recent developments in smaller feature size technologies do not make use of these techniques due to their drawbacks in terms of logic density and requirement of dedicated libraries. During operation the resulting increase of the supply current is a serious challenge and needs to be considered during the system design. A simple parametrization of the leakage current of NMOS transistors as a function of total ionizing dose is presented. The parametrization uses a transistor transfer characteristics of the parasitic transistor along the shallow trench isolation to describe the leakage current of the nominal transistor. Together with a parametrization of the number of positive charges trapped in the silicon dioxide and number of activated interface traps in the silicon to si...

  11. Complementary Self-Biased Logics Based on Single-Electron Transistor (SET)/CMOS Hybrid Process

    Science.gov (United States)

    Song, Ki-Whan; Lee, Yong Kyu; Sim, Jae Sung; Kim, Kyung Rok; Lee, Jong Duk; Park, Byung-Gook; You, Young Sub; Park, Joo-On; Jin, You Seung; Kim, Young-Wug

    2005-04-01

    We propose a complementary self-biasing method which enables the single-electron transistor (SET)/complementary metal-oxide semiconductor (CMOS) hybrid multi-valued logics (MVLs) to operate well at high temperatures, where the peak-to-valley current ratio (PVCR) of the Coulomb oscillation markedly decreases. The new architecture is implemented with a few transistors by utilizing the phase control capability of the sidewall depletion gates in dual-gate single-electron transistors (DGSETs). The suggested scheme is evaluated by a SPICE simulation with an analytical DGSET model. Furthermore, we have developed a new process technology for the SET/CMOS hybrid systems. We have confirmed that both of the fabricated devices, namely, SET and CMOS transistors, exhibit the ideal characteristics for the complementary self-biasing scheme: the SET shows clear Coulomb oscillations with a 100 mV period and the CMOS transistors show a high voltage gain.

  12. Cylindrical Field Effect Transistor: A Full Volume Inversion Device

    KAUST Repository

    Fahad, Hossain M.

    2010-12-01

    The increasing demand for high performance as well as low standby power devices has been the main reason for the aggressive scaling of conventional CMOS transistors. Current devices are at the 32nm technology node. However, due to physical limitations as well as increase in short-channel effects, leakage, power dissipation, this scaling trend cannot continue and will eventually hit a barrier. In order to overcome this, alternate device topologies have to be considered altogether. Extensive research on ultra thin body double gate FETs and gate all around nanowire FETs has shown a lot of promise. Under strong inversion, these devices have demonstrated increased performance over their bulk counterparts. This is mainly attributed to full carrier inversion in the body. However, these devices are still limited by lithographic and processing challenges making them unsuitable for commercial production. This thesis explores a unique device structure called the CFET (Cylindrical Field Effect Transistors) which also like the above, relies on complete inversion of carriers in the body/bulk. Using dual gates; an outer and an inner gate, full-volume inversion is possible with benefits such as enhanced drive currents, high Ion/Ioff ratios and reduced short channel effects.

  13. Synthesis, formation mechanism and sensing properties of WO3 hydrate nanowire netted-spheres

    International Nuclear Information System (INIS)

    Yan, Aihua; Xie, Changsheng; Zeng, Dawen; Cai, Shuizhou; Hu, Mulin

    2010-01-01

    Tungsten oxide hydrate nanowire netted-spheres were successfully synthesized in the glycol solution using a facile solvothermal approach. The nanowires with uniform diameter of 4-6 nm are actually a kind of tungsten oxide hydrate/surfactant hybrid materials. The influence of surfactant, solvent, time and temperature on tailoring morphology was investigated in detail. The possible formation process of WO 3 hydrate nanowire netted-sphere was proposed. Sensing properties of such WO 3 hydrate sensor show that the desirable sensing characteristics towards 100 ppm ammonia gas at 320 o C were obtained, such as rapid response (18.3 s), high sensitivity, good reproducibility and stability.

  14. Emergence of Quantum Phase-Slip Behaviour in Superconducting NbN Nanowires: DC Electrical Transport and Fabrication Technologies

    Directory of Open Access Journals (Sweden)

    Nicolas G. N. Constantino

    2018-06-01

    Full Text Available Superconducting nanowires undergoing quantum phase-slips have potential for impact in electronic devices, with a high-accuracy quantum current standard among a possible toolbox of novel components. A key element of developing such technologies is to understand the requirements for, and control the production of, superconducting nanowires that undergo coherent quantum phase-slips. We present three fabrication technologies, based on using electron-beam lithography or neon focussed ion-beam lithography, for defining narrow superconducting nanowires, and have used these to create nanowires in niobium nitride with widths in the range of 20–250 nm. We present characterisation of the nanowires using DC electrical transport at temperatures down to 300 mK. We demonstrate that a range of different behaviours may be obtained in different nanowires, including bulk-like superconducting properties with critical-current features, the observation of phase-slip centres and the observation of zero conductance below a critical voltage, characteristic of coherent quantum phase-slips. We observe critical voltages up to 5 mV, an order of magnitude larger than other reports to date. The different prominence of quantum phase-slip effects in the various nanowires may be understood as arising from the differing importance of quantum fluctuations. Control of the nanowire properties will pave the way for routine fabrication of coherent quantum phase-slip nanowire devices for technology applications.

  15. Superconductivity in nanowires

    CERN Document Server

    Bezryadin, Alexey

    2012-01-01

    The importance and actuality of nanotechnology is unabated and will be for years to come. A main challenge is to understand the various properties of certain nanostructures, and how to generate structures with specific properties for use in actual applications in Electrical Engineering and Medicine.One of the most important structures are nanowires, in particular superconducting ones. They are highly promising for future electronics, transporting current without resistance and at scales of a few nanometers. To fabricate wires to certain defined standards however, is a major challenge, and so i

  16. Optical Binding of Nanowires

    Czech Academy of Sciences Publication Activity Database

    Simpson, Stephen Hugh; Zemánek, Pavel; Marago, O.M.; Jones, P.H.; Hanna, S.

    2017-01-01

    Roč. 17, č. 6 (2017), s. 3485-3492 ISSN 1530-6984 R&D Projects: GA ČR GB14-36681G Grant - others:AV ČR(CZ) CNR-16-12 Program:Bilaterální spolupráce Institutional support: RVO:68081731 Keywords : optical binding nanowires * Brownian motion * self-organization * non-equilibrium thermodynamics * non-equilibrium steady state * spin-orbit coupling * emergent phenomena Subject RIV: BH - Optics, Masers, Lasers OBOR OECD: Optics (including laser optics and quantum optics) Impact factor: 12.712, year: 2016

  17. Contact planarization of ensemble nanowires

    Science.gov (United States)

    Chia, A. C. E.; LaPierre, R. R.

    2011-06-01

    The viability of four organic polymers (S1808, SC200, SU8 and Cyclotene) as filling materials to achieve planarization of ensemble nanowire arrays is reported. Analysis of the porosity, surface roughness and thermal stability of each filling material was performed. Sonication was used as an effective method to remove the tops of the nanowires (NWs) to achieve complete planarization. Ensemble nanowire devices were fully fabricated and I-V measurements confirmed that Cyclotene effectively planarizes the NWs while still serving the role as an insulating layer between the top and bottom contacts. These processes and analysis can be easily implemented into future characterization and fabrication of ensemble NWs for optoelectronic device applications.

  18. Directional and dynamic modulation of the optical emission of an individual GaAs nanowire using surface acoustic waves.

    Science.gov (United States)

    Kinzel, Jörg B; Rudolph, Daniel; Bichler, Max; Abstreiter, Gerhard; Finley, Jonathan J; Koblmüller, Gregor; Wixforth, Achim; Krenner, Hubert J

    2011-04-13

    We report on optical experiments performed on individual GaAs nanowires and the manipulation of their temporal emission characteristics using a surface acoustic wave. We find a pronounced, characteristic suppression of the emission intensity for the surface acoustic wave propagation aligned with the axis of the nanowire. Furthermore, we demonstrate that this quenching is dynamical as it shows a pronounced modulation as the local phase of the surface acoustic wave is tuned. These effects are strongly reduced for a surface acoustic wave applied in the direction perpendicular to the axis of the nanowire due to their inherent one-dimensional geometry. We resolve a fully dynamic modulation of the nanowire emission up to 678 MHz not limited by the physical properties of the nanowires.

  19. Axial Ge/Si nanowire heterostructure tunnel FETs

    Energy Technology Data Exchange (ETDEWEB)

    Picraux, Sanuel T [Los Alamos National Laboratory; Daych, Shadi A [Los Alamos National Laboratory

    2010-01-01

    The vapor-liquid-solid (VLS) growth of semiconductor nanowires allows doping and composition modulation along their axis and the realization of axial 1 D heterostructures. This provides additional flexibility in energy band-edge engineering along the transport direction which is difficult to attain by planar materials growth and processing techniques. We report here on the design, growth, fabrication, and characterization of asymmetric heterostructure tunnel field-effect transistors (HTFETs) based on 100% compositionally modulated Si/Ge axial NWs for high on-current operation and low ambipolar transport behavior. We discuss the optimization of band-offsets and Schottky barrier heights for high performance HTFETs and issues surrounding their experimental realization. Our HTFET devices with 10 nm PECVD SiN{sub x} gate dielectric resulted in a measured current drive exceeding 100 {mu}A/{mu}m (I/{pi}D) and 10{sup 5} I{sub on}/I{sub off} ratios.

  20. Interactions between semiconductor nanowires and living cells.

    Science.gov (United States)

    Prinz, Christelle N

    2015-06-17

    Semiconductor nanowires are increasingly used for biological applications and their small dimensions make them a promising tool for sensing and manipulating cells with minimal perturbation. In order to interface cells with nanowires in a controlled fashion, it is essential to understand the interactions between nanowires and living cells. The present paper reviews current progress in the understanding of these interactions, with knowledge gathered from studies where living cells were interfaced with vertical nanowire arrays. The effect of nanowires on cells is reported in terms of viability, cell-nanowire interface morphology, cell behavior, changes in gene expression as well as cellular stress markers. Unexplored issues and unanswered questions are discussed.