Sample records for CONVERTIDORES ANALOGICO-NUMERICOS (analog-to-digital converters)
from WorldWideScience.org

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1

Modelo para Tiempos de Arribo de Tareas en Tiempo Real Concurrentes/ Arrival Times Model for Concurrent Real-time Tasks


2009-06-01

Un Sistema en Tiempo Real (STR) implantado en una computadora digital, interactúa con el mundo físico a través de acondicionamientos de variables (sensores, actuadores convertidores Analógico/Digital A/D y Digital/Analógico D/A) y procesa sus peticiones mediante tareas concurrentes con restricciones temporales. En general cada una de las variables del proceso dinámico (entradas, salidas y estados) es relacionada con una Tarea en Tiempo Real específica; si se trata

Scientific Electronic Library Online (Spanish)

2

Top-Down Design of a xDSL 14-bit 4MSh ZA Modulator in Digital CMOS Technology

Río Fernández, Rocío del ; Rosa Utrera, José Manuel de la ; Medeiro, Fernando ; Pérez Verdú, Belén ; Rodríguez Vázquez, Angel

This paper describes the design of a Sigma-Delta modulator aimed for A/D conversion in xDSL applications, featuring 14-bit@4Msample/s in a 0.35μm mainstream digital CMOS technology. Architecture selection, modulator sizingand cell sizing tasks where supported by a CAD methodology, thus allowing us ...

DRIVER (Spanish)

3

Top-Down Design of a xDSL 14-bit 4MSh ZA Modulator in Digital CMOS Technology

Río Fernández, Rocío del; Rosa Utrera, José Manuel de la; Medeiro, Fernando; Pérez Verdú, Belén; Rodríguez Vázquez, Angel
2001-03-01

Digital.CSIC (Spain)

4

Systematic Design of CMOS Switched-Current Bandpass Sigma-Delta Modulators for Digital Communication Chips

Rosa Utrera, José Manuel de la ; Pérez Verdú, Belén ; Rodríguez Vázquez, Angel

Systematic Design of CMOS Switched-Current Bandpass Sigma-Delta Modulators for Digital Communication Chips gives a systematic methodology for designing ΣΔ Modulators (ΣΔMs), specially those of the bandpass type, realized in digital CMOS technologies by using switched-current (SI) circuits. For this ...

DRIVER (Spanish)

5

Systematic Design of CMOS Switched-Current Bandpass Sigma-Delta Modulators for Digital Communication Chips

Rosa Utrera, José Manuel de la; Pérez Verdú, Belén; Rodríguez Vázquez, Angel
2002-01-01

Digital.CSIC (Spain)

6

Simulation-based High-level Synthesis of Pipeline Analog-to-Digital Converters

Ruiz Amaya, Jesús ; Rosa Utrera, José Manuel de la ; Delgado Restituto, Manuel

This paper presents a toolbox for thetime-domain simulation and optimization-basedhigh-level synthesis of pipeline analog-to-digital converters in MATLAB®. Behavioral models of building blocks, including their critical error mechanisms, are described and incorporated into SIMULINK® as C-compiled S...

DRIVER (Spanish)

7

Simulation-based High-level Synthesis of Pipeline Analog-to-Digital Converters

Ruiz Amaya, Jesús; Rosa Utrera, José Manuel de la; Delgado Restituto, Manuel
2004-11-01

Digital.CSIC (Spain)

8

Resonation-based Cascade ΣΔ Modulator for Broadband Low-Voltage A/D Conversion

Morgado, Alonso ; Río Fernández, Rocío del ; Rosa Utrera, José Manuel de la

This letter presents a novel cascade ΣΔ modulator architecture that employs inter-stage resonation to increase its effective resolution compared to traditional cascades while presenting very relaxed output swing requirements and, subsequently, high robustness to non-linearities of the amplifiers. In...

DRIVER (Spanish)

9

Resonation-based Cascade ΣΔ Modulator for Broadband Low-Voltage A/D Conversion

Morgado, Alonso; Río Fernández, Rocío del; Rosa Utrera, José Manuel de la
2008-01-01

Digital.CSIC (Spain)

10

MATLAB/SIMULINK-Based High-Level Synthesis of Discrete-Time and Continuous-Time Sigma-Delta Modulators

Ruiz Amaya, Jesús ; Rosa Utrera, José Manuel de la ; Medeiro, Fernando ; Fernández, Francisco V. ; Río Fernández, Rocío del

This paper describes a tool that combines an accurate SIMULINK-based time-domain behavioural simulator with a statistical optimizer for the automated high-level synthesis of ΣΔ Modulators (ΣΔMs). The combination of high accuracy, short CPU time and interoperability of differentcircuit models togeth...

DRIVER (Spanish)

11

MATLAB/SIMULINK-Based High-Level Synthesis of Discrete-Time and Continuous-Time Sigma-Delta Modulators

Ruiz Amaya, Jesús; Rosa Utrera, José Manuel de la; Medeiro, Fernando; Fernández, Francisco V.; Río Fernández, Rocío del; Pérez Verdú, Belén; Rodríguez Vázquez, Angel
2004-03-01

Digital.CSIC (Spain)

12

Highly Linear 2,5-V CMOS ΣΔ Modulator for ADSL+

Río Fernández, Rocío del ; Rosa Utrera, José Manuel de la ; Pérez Verdú, Belén ; Delgado Restituto, Manuel

We present a 90-dB spurious-free dynamic range sigma–delta modulator (ΣΔM) for asymmetric digital subscriber line applications (both ADSL and ADSL+), with up to a 4.4-MS/s digital output rate. It uses a cascade (MASH) multibit architecture and has been implemented in a 2.5-V supply, 0.25μm CMOS proc...

DRIVER (Spanish)

13

Highly Linear 2,5-V CMOS ΣΔ Modulator for ADSL+

Río Fernández, Rocío del; Rosa Utrera, José Manuel de la; Pérez Verdú, Belén; Delgado Restituto, Manuel; Domínguez Castro, Rafael; Medeiro, Fernando; Rodríguez Vázquez, Angel
2008-01-01

Digital.CSIC (Spain)

14

Frontiers of CMOS Sigma-Delta Converters - Part2: Continuout-Time Sigma-Delta Converters

Rodríguez Vázquez, Angel ; Rosa Utrera, José Manuel de la

Sigma-delta converters are very well suited for the implementation of analog front-ends in CMOS SoCs. Owing to different advances on both architectures and circuit techniques, these converters are today employed for applications spanning a very wide frequency interval, from instrumentation to teleco...

DRIVER (Spanish)

15

Frontiers of CMOS Sigma-Delta Converters - Part2: Continuout-Time Sigma-Delta Converters

Rodríguez Vázquez, Angel; Rosa Utrera, José Manuel de la
2005-01-01

Digital.CSIC (Spain)

16

Design Considerations for an Automotive Sensor Interface Sigma-Delta Modulator

Medeiro, Fernando ; Rosa Utrera, José Manuel de la ; Río Fernández, Rocío del ; Pérez Verdú, Belén ; Rodríguez Vázquez, Angel

EU IST Project 2001-34283/TAMES-2Spanish MCyT Project TIC2001-0929/ADAVERE. | The Sigma-Delta Modulator presented in this paper contains a programmable-gain input inferface to accommodate the output signal level of a variety of automotive sensors. We show that this characteristic can be efficiently...

DRIVER (Spanish)

17

Design Considerations for an Automotive Sensor Interface Sigma-Delta Modulator

Medeiro, Fernando; Rosa Utrera, José Manuel de la; Río Fernández, Rocío del; Pérez Verdú, Belén; Rodríguez Vázquez, Angel
2003-05-01

Digital.CSIC (Spain)

18

CMOS Sigma-Delta Converters - From Basics to State-of-the-Art: Session 1.b

Río Fernández, Rocío del ; Pérez Verdú, Belén ; Rosa Utrera, José Manuel de la

The RaMSiS Group (Radio And Mixed Signal Integrated Systems) of the Royal Institute of Technology Stockholm (KTH) and the Institute of Microelectronics of Seville (IMSE-CNM) of the Spanish Microelectronics Centre (CSIC).

DRIVER (Spanish)

19

CMOS Sigma-Delta Converters - From Basics to State-of-the-Art: Session 1.b

Río Fernández, Rocío del; Pérez Verdú, Belén; Rosa Utrera, José Manuel de la
2007-04-01

Digital.CSIC (Spain)

20

CMOS Sigma-Delta Converters - From Basics to State of the Art: Session 2

Río Fernández, Rocío del ; Pérez Verdú, Belén ; Rosa Utrera, José Manuel de la

The RaMSiS Group (Radio And Mixed Signal Integrated Systems) of the Royal Institute of Technology Stockholm (KTH) and the Institute of Microelectronics of Seville (IMSE-CNM) of the Spanish Microelectronics Centre (CSIC).

DRIVER (Spanish)

21

CMOS Sigma-Delta Converters - From Basics to State of the Art: Session 2

Río Fernández, Rocío del; Pérez Verdú, Belén; Rosa Utrera, José Manuel de la
2007-04-01

Digital.CSIC (Spain)

22

CMOS Design of a Current-Mode Multiplier/Divider Circuit with Applications to Fuzzy Controllers

Baturone, M.ª Iluminada; Sánchez-Solano, Santiago; Huertas, José Luis
2000-06-01

Digital.CSIC (Spain)

23

CMOS Cascade Sigma-Delta Modulators for Sensors and Telecom: Error Analysis and Practical Design.

Río Fernández, Rocío del ; Medeiro, Fernando ; Pérez Verdú, Belén ; Rosa Utrera, José Manuel de la ; Rodríguez Vázquez, Angel

Peer reviewed

DRIVER (Spanish)

24

CMOS Cascade Sigma-Delta Modulators for Sensors and Telecom: Error Analysis and Practical Design.

Río Fernández, Rocío del; Medeiro, Fernando; Pérez Verdú, Belén; Rosa Utrera, José Manuel de la; Rodríguez Vázquez, Angel
2006-01-01

Digital.CSIC (Spain)

25

Behavioral Modeling, Simulation and High-Level Synthesis of Pipeline A/D Converters

Ruiz Amaya, Jesús ; Rosa Utrera, José Manuel de la ; Delgado Restituto, Manuel ; Rodríguez Vázquez, Angel

This paper presents a MATLAB® toolbox for the time-domain simulation and high-level sizing of pipeline analog-to-digital converters. SIMULINK® C-coded S-functions are used to describe the behavioral models of all building blocks, including their main circuit errors. This approach significantly speed...

DRIVER (Spanish)

26

Behavioral Modeling, Simulation and High-Level Synthesis of Pipeline A/D Converters

Ruiz Amaya, Jesús; Rosa Utrera, José Manuel de la; Delgado Restituto, Manuel; Rodríguez Vázquez, Angel
2005-05-01

Digital.CSIC (Spain)

27

Bandpass Sigma-Delta Modulators: Principles, Architecture and Circuits

Rodríguez Vázquez, Angel ; Rosa Utrera, José Manuel de la

Peer reviewed

DRIVER (Spanish)

28

Bandpass Sigma-Delta Modulators: Principles, Architecture and Circuits

Rodríguez Vázquez, Angel; Rosa Utrera, José Manuel de la
2002-05-01

Digital.CSIC (Spain)

29

BandPass Sigma-Delta Analog-to-Digital Converters

Rosa Utrera, José Manuel de la ; Pérez Verdú, Belén ; Medeiro, Fernando ; Río Fernández, Rocío del ; Rodríguez Vázquez, Angel

The principle of ΣΔ Modulation (ΣΔM) is extended in BPΣΔMs to bandpass signals, especially but not only, with a narrow bandwidth. Thus, BPΣΔMshave much in common with their lowpass counterparts - whose properties have been covered in previous Chapters of this book. However, there are some issues wh...

DRIVER (Spanish)

30

BandPass Sigma-Delta Analog-to-Digital Converters

Rosa Utrera, José Manuel de la; Pérez Verdú, Belén; Medeiro, Fernando; Río Fernández, Rocío del; Rodríguez Vázquez, Angel
2003-01-01

Digital.CSIC (Spain)

31

Analysis of Error Mechanisms in Switched-Current Sigma-Delta Modulators

Rosa Utrera, José Manuel de la ; Pérez Verdú, Belén ; Medeiro, Fernando ; Río Fernández, Rocío del ; Rodríguez Vázquez, Angel

This paper presents a systematic analysis of the major switched-current (SI) errors and their influence on the performance degradation of ΣΔ Modulators (ΣΔMs). The study is presented in a hierarchical systematic way. First, the physical mechanisms behind SI errors are explained and a precise mode...

DRIVER (Spanish)

32

Analysis of Error Mechanisms in Switched-Current Sigma-Delta Modulators

Rosa Utrera, José Manuel de la; Pérez Verdú, Belén; Medeiro, Fernando; Río Fernández, Rocío del; Rodríguez Vázquez, Angel
2004-01-01

Digital.CSIC (Spain)

33

An Embedded 12-bit 80MS/s A/D/A Interface for Power-Line Communications in 0.13μm Pure Digital CMOS Technology

Delgado Restituto, Manuel ; Ruiz Amaya, Jesús ; Rosa Utrera, José Manuel de la ; Fernández-Bootello, Juan Francisco

This paper presents an embedded interface, comprising both A/D and D/A converters, which has been implemented in a 0.13μm pure digital CMOS technology. The interface is integratedin a system for high-performance broad-band power-line communications. The A/D converter uses a pipelined structure, whe...

DRIVER (Spanish)

34

An Embedded 12-bit 80MS/s A/D/A Interface for Power-Line Communications in 0.13μm Pure Digital CMOS Technology

Delgado Restituto, Manuel; Ruiz Amaya, Jesús; Rosa Utrera, José Manuel de la; Fernández-Bootello, Juan Francisco; Díez, Leila; Río Fernández, Rocío del; Rodríguez Vázquez, Angel
2005-05-01

Digital.CSIC (Spain)

35

A new cascade ΣΔ modulator for low-voltage wideband applications

Morgado, Alonso ; Río Fernández, Rocío del ; Rosa Utrera, José Manuel de la

A new cascade ΣΔ modulator architecture with unity signal transfer function is presented, which avoids the need for digital filtering in the error cancellation logic. The combination of these two aspects makes it highly tolerant to noise leakages, very robust to nonlinearities of the circuitry and e...

DRIVER (Spanish)

36

A new cascade ΣΔ modulator for low-voltage wideband applications

Morgado, Alonso; Río Fernández, Rocío del; Rosa Utrera, José Manuel de la
2007-08-01

Digital.CSIC (Spain)

37

A Triple-Mode Reconfigurable Sigma-Delta Modulator for Multi-Standard Wireless Applications

Morgado, Alonso ; Río Fernández, Rocío del ; Rosa Utrera, José Manuel de la

This paper presents the implementation and experimental characterization of a reconfigurable ΣΔ modulator intendedfor multi-mode wireless receivers that is capable to perform the analog-to-digital conversion for GSM, Bluetooth, and UMTS standards. The ΣΔ modulator reconfiguresits cascade topology ...

DRIVER (Spanish)

38

A Triple-Mode Reconfigurable Sigma-Delta Modulator for Multi-Standard Wireless Applications

Morgado, Alonso; Río Fernández, Rocío del; Rosa Utrera, José Manuel de la
2008-03-01

Digital.CSIC (Spain)

39

A Portable Readout System for Microstrip Silicon Sensors (ALIBAVA)

Marco Hernández, Ricardo; Alibava Collaboration
2009-06-03

Digital.CSIC (Spain)

40

A New High-Level Synthesis Methodology of Cascaded Continuous-Time ΣΔ Modulators

Tortosa, Ramón ; Rosa Utrera, José Manuel de la ; Fernández, Francisco V. ; Rodríguez Vázquez, Angel

This brief presents an efficient method for synthesizing cascaded sigma–delta modulators implemented with continuous-time circuits. It is based on the direct synthesis of the whole cascaded architecture in the continuous-time domain instead of using a discrete-to-continuous time transformation as ha...

DRIVER (Spanish)

41

A New High-Level Synthesis Methodology of Cascaded Continuous-Time ΣΔ Modulators

Tortosa, Ramón; Rosa Utrera, José Manuel de la; Fernández, Francisco V.; Rodríguez Vázquez, Angel
2006-08-01

Digital.CSIC (Spain)

42

A High-Performance Sigma-Delta ADC for ADSL Applications in 0.35μm CMOS Digital Technology

Río Fernández, Rocío del ; Rosa Utrera, José Manuel de la ; Medeiro, Fernando ; Pérez Verdú, Belén ; Rodríguez Vázquez, Angel

We present a Sigma-Delta modulator designed for ADSL applications in a 0.3Sμm CMOS pure digital technology. It employs a 4th-order 3-stage cascade architecture including both single-bit and multi-bit quantizers with programmable resolution, which allows us to use only 16 oversampling ratio. Especial...

DRIVER (Spanish)

43

A High-Performance Sigma-Delta ADC for ADSL Applications in 0.35μm CMOS Digital Technology

Río Fernández, Rocío del; Rosa Utrera, José Manuel de la; Medeiro, Fernando; Pérez Verdú, Belén; Rodríguez Vázquez, Angel
2001-09-01

Digital.CSIC (Spain)

44

A CMOS 110-dB@40-kS/s Programmable-Gain, Chopper-Stabilized Third-Order 2-1 Cascade Sigma-Delta Modulator for Low-Power, High-Linearity Automotive Sensor ASICs

Rosa Utrera, José Manuel de la ; Escalera, Sara ; Pérez Verdú, Belén ; Medeiro, Fernando ; Guerra, Oscar

This paper describes a 0.35-μm CMOS chopper-stabilized switched-capacitor 2-1 cascade ΣΔ modulator for automotive sensor interfaces. The modulator architecture has been selected from an exhaustive comparison among multiple topologies in terms of resolution, speed andpower dissipation. To obtain a b...

DRIVER (Spanish)

45

A CMOS 110-dB@40-kS/s Programmable-Gain, Chopper-Stabilized Third-Order 2-1 Cascade Sigma-Delta Modulator for Low-Power, High-Linearity Automotive Sensor ASICs

Rosa Utrera, José Manuel de la; Escalera, Sara; Pérez Verdú, Belén; Medeiro, Fernando; Guerra, Oscar; Río Fernández, Rocío del; Rodríguez Vázquez, Angel
2005-11-01

Digital.CSIC (Spain)

46

A 14-bit 4-MS/s Multi-bit Cascade Sigma-Delta Modulator in CMOS 0.35-um Digital Technology

Río Fernández, Rocío del ; Medeiro, Fernando ; Rosa Utrera, José Manuel de la ; Pérez Verdú, Belén ; Rodríguez Vázquez, Angel

This paper presents a 4th-order 3-stage cascade SD modulator that achieves 14-bit dynamic range at 4MS/s using low oversampling ratio. It includes a programmable multi-bit quantizer in the last stage, providing 2-, 3-, or 4-bit internal resolution. The modulator is implemented with fully-differentia...

DRIVER (Spanish)

47

A 14-bit 4-MS/s Multi-bit Cascade Sigma-Delta Modulator in CMOS 0.35-um Digital Technology

Río Fernández, Rocío del; Medeiro, Fernando; Rosa Utrera, José Manuel de la; Pérez Verdú, Belén; Rodríguez Vázquez, Angel
2000-11-01

Digital.CSIC (Spain)

48

A 12-bit CMOS Current Steering D/A Converter for Embedded Systems

Ruiz Amaya, Jesús ; Delgado Restituto, Manuel ; Fernández-Bootello, Juan Francisco ; Brandano, Davide ; Castro López, Rafael

This paper describes the design of a 12-bit digital-to-analog converter for a wireline modem chip implemented in a 0.13μm digital CMOS technology. Transistor-level simulations from extracted layout at the nominal modem data rate of 8OMS/s show an Spurious-Free Dynamic-Range (SFDR) better than 62dB a...

DRIVER (Spanish)

49

A 0.35μm CMOS 17-bit@40kS/s Sensor A/D Interface Based on a Programmable-Gain Cascade 2-1 ΣΔ Modulator

García-González, José Manuel ; Escalera, Sara ; Rosa Utrera, José Manuel de la ; Guerra, Oscar ; Medeiro, Fernando

This paper describes the design and electrical implementation of an A/D interface for sensor applications realized in a 0.35μm standardCMOS technology. The circuit is composed of a low-noise instrumentation preamplifier and a SC cascade (2-1) ΣΔ modulator. The preamplifier, based on hybrid Nested-M...

DRIVER (Spanish)

50

A 0.35μm CMOS 17-bit@40kS/s Sensor A/D Interface Based on a Programmable-Gain Cascade 2-1 ΣΔ Modulator

García-González, José Manuel; Escalera, Sara; Rosa Utrera, José Manuel de la; Guerra, Oscar; Medeiro, Fernando; Río Fernández, Rocío del; Pérez Verdú, Belén; Rodríguez Vázquez, Angel
2004-05-01

Digital.CSIC (Spain)

51

A 0.13μm CMOS Current Steering D/A Converter for PLC and VDSL Applications

Ruiz Amaya, Jesús ; Fernández-Bootello, Juan Francisco ; Rosa Utrera, José Manuel de la ; Delgado Restituto, Manuel

This paper describes the design of a 12-bit80MS/s Digital-to-Analog converter implemented in a 0.13μm CMOS logic technology. The design has been computer-aided by a developed toolbox for the simulation and verification of Nyquist-Rate Analog-to-Digital and Digital-to-Analog converters in MATLAB. Th...

DRIVER (Spanish)

52

A 0.13μm CMOS Current Steering D/A Converter for PLC and VDSL Applications

Ruiz Amaya, Jesús; Fernández-Bootello, Juan Francisco; Rosa Utrera, José Manuel de la; Delgado Restituto, Manuel
2005-11-01

Digital.CSIC (Spain)

53

Digital read-out integrated circuit for the digital reading of high-speed image sensors

Serra Graells, Francisco; Margarit Taule, Josep M.; Teres Teres, Lluis
2009-11-19

Digital.CSIC (Spain)