Multiple time scale chaos in a Schmitt trigger circuit
Carroll, Thomas L.
German National Library of Science and Technology (GetInfo) (German)
Magnetically and optoelectronically isolated trigger for pulse-power applications
Yu, Yi; Wen, Yi-Zhi; Yu, Chang-Xuan
ESD protection design for low trigger voltage and high latch-up immunity
Jen-Chou Tseng,; Chung-Ti Hsu,; Chia-Ku Tsai,
Design of Asynchronous Circuits for High Soft Error Tolerance in Deep Submicrometer CMOS Circuits
Weidong Kuang,; Peiyi Zhao,; Yuan, J.S.
Circuit and Latch Capable of Masking Soft Errors with Schmitt Trigger
Sasaki, Yoichi; Ito, Hideo; Namba, Kazuteru
Area-Efficient ESD-Transient Detection Circuit With Smaller Capacitance for On-Chip Power-Rail ESD Protection in CMOS ICs
Shih-Hung Chen,; Ming-Dou Ker,
A novel SOI IGBT for Power-Rail ESD clamp circuit
Jing Zhu,; Qinsong Qian,; Weifeng Sun,
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