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Sample records for mum cmos serializer

  1. CMOS serial link for fully duplexed data communication

    Science.gov (United States)

    Lee, Kyeongho; Kim, Sungjoon; Ahn, Gijung; Jeong, Deog-Kyoon

    1995-04-01

    This paper describes a CMOS serial link allowing fully duplexed 500 Mbaud serial data communication. The CMOS serial link is a robust and low-cost solution to high data rate requirements. A central charge pump PLL for generating multiphase clocks for oversampling is shared by several serial link channels. Fully duplexed serial data communication is realized in the bidirectional bridge by separating incoming data from the mixed signal on the cable end. The digital PLL accomplishes process-independent data recovery by using a low-ratio oversampling, a majority voting, and a parallel data recovery scheme. Mostly, digital approach could extend its bandwidth further with scaled CMOS technology. A single channel serial link and a charge pump PLL are integrated in a test chip using 1.2 micron CMOS process technology. The test chip confirms upto 500 Mbaud unidirectional mode operation and 320 Mbaud fully duplexed mode operation with pseudo random data patterns.

  2. Characterization of 13 and 30 mum thick hydrogenated amorphous silicon diodes deposited over CMOS integrated circuits for particle detection application

    CERN Document Server

    Despeisse, M; Commichau, S C; Dissertori, G; Garrigos, A; Jarron, P; Miazza, C; Moraes, D; Shah, A; Wyrsch, N; Viertel, Gert M; 10.1016/j.nima.2003.11.022

    2004-01-01

    We present the experimental results obtained with a novel monolithic silicon pixel detector which consists in depositing a n-i-p hydrogenated amorphous silicon (a-Si:H) diode straight above the readout ASIC (this technology is called Thin Film on ASIC, TFA). The characterization has been performed on 13 and 30mum thick a-Si:H films deposited on top of an ASIC containing a linear array of high- speed low-noise transimpedance amplifiers designed in a 0.25mum CMOS technology. Experimental results presented have been obtained with a 600nm pulsed laser. The results of charge collection efficiency and charge collection speed of these structures are discussed.

  3. A 32-channel, 025 mum CMOS ASIC for the readout of the silicon drift detectors of the ALICE experiment

    CERN Document Server

    Mazza, G; Anghinolfi, F; Martínez, M I; Rivetti, A; Rotondo, F

    2004-01-01

    In this paper we present a 32 channel ASIC prototype for the readout of the silicon drift detectors (SDDs) of the ALICE experiment. The ASIC integrates on the same substrate 32 transimpedance amplifiers, a 32 x 256 cell analogue memory and 16 successive approximation 10 bit A/D converters. The circuit amplifies and samples at 40 MS/s the input signal in a continuous way. When an external trigger signal validates the acquisition, the sampling is stopped and the data are digitized at lower speed (0.5 MS/s). The chip has been designed and fabricated in a commercial 0.25 mum CMOS technology. It has been extensively tested both on a bench and connected with a detector in several beam tests. In this paper both design issues and test results are presented. The radiation tolerance of the design has been increased by special layout techniques. Total dose irradiation tests are also presented.

  4. 5-Gb/s 0.18-{mu}m CMOS 2:1 multiplexer with integrated clock extraction

    Energy Technology Data Exchange (ETDEWEB)

    Zhang Changchun; Wang Zhigong; Shi Si; Miao Peng [Institute of RF- and OE-ICs, Southeast University, Nanjing 210096 (China); Tian Ling, E-mail: zgwang@seu.edu.c [School of Science and Engineering, Southeast University, Nanjing 210096 (China)

    2009-09-15

    A 5-Gb/s 2:1 MUX (multiplexer) with an on-chip integrated clock extraction circuit which possesses the function of automatic phase alignment (APA), has been designed and fabricated in SMIC's 0.18 {mu}m CMOS technology. The chip area is 670 x 780 {mu}m{sup 2}. At a single supply voltage of 1.8 V, the total power consumption is 112 mW with an input sensitivity of less than 50 mV and an output single-ended swing of above 300 mV. The measurement results show that the IC can work reliably at any input data rate between 1.8 and 2.6 Gb/s with no need for external components, reference clock, or phase alignment between data and clock. It can be used in a parallel optic-fiber data interconnecting system.

  5. Design and implementation of an IEEE 802.11 baseband OFDM transceiver in 0.18 {mu}m CMOS

    Energy Technology Data Exchange (ETDEWEB)

    Wu Bin; Zhou Yumei; Zhu Yongxu; Zhang Zhengdong; Cai Jingjing, E-mail: wubin@ime.ac.cn [Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029 (China)

    2011-05-15

    An SISO IEEE 802.11 baseband OFDM transceiver ASIC is implemented. The chip can support all of the SISO IEEE 802.11 work modes by optimizing the key module and sharing the module between the transmitter and receiver. The area and power are decreased greatly compared with other designs. The baseband prototype has been verified under the WLAN baseband test equipment and through transferring the video. The 0.18 {mu}m 1P/6M CMOS technology layout is finished and the chip is fabricated in SMIC, which occupies a 2.6 x 2.6 mm{sup 2} area and consumes 83 mW under typical work modes. (semiconductor integrated circuits)

  6. A high-speed low-noise transimpedance amplifier in a 025 mum CMOS technology

    CERN Document Server

    Anelli, G; Casagrande, L; Despeisse, Matthieu; Jarron, Pierre; Pelloux, Nicolas; Saramad, Shahyar

    2003-01-01

    We present the simulated and measured performance of a transimpedance amplifier designed in a quarter micron CMOS process. Containing only NMOS and PMOS devices, this amplifier can be integrated in any submicron CMOS process. The main feature of this design is the use of a transistor in the feedback path instead of a resistor. The circuit has been optimized for reading signals coming from silicon strip detectors with few pF input capacitance. For an input charge of 4fC, an input capacitance of 4pF and a transresistance of 135kOmega, we have measured an output pulse fall time of 3ns and an Equivalent Noise Charge (ENC) of around 350 electrons rms. In view of the operation of the chip at cryogenic temperatures, measurements at 130K have also been carried out, showing an overall improvement in the performance of the chip. Fall times down to 1.5ns have been measured. An integrated circuit containing 32 channels has been designed and wire bonded to a silicon strip detector and successfully used for the constructio...

  7. Gamma and Proton-Induced Dark Current Degradation of 5T CMOS Pinned Photodiode 0.18 mu{m} CMOS Image Sensors

    Science.gov (United States)

    Martin, E.; Nuns, T.; David, J.-P.; Gilard, O.; Vaillant, J.; Fereyre, P.; Prevost, V.; Boutillier, M.

    2014-02-01

    The radiation tolerance of a 0.18 μm technology CMOS commercial image sensor has been evaluated with Co60 and proton irradiations. The effects of protons on the hot pixels and dynamic bias and duty cycle conditions during gamma irradiations are studied.

  8. Wideband pulse amplifier with 8 GHz GBW product in a 0.35 {mu}m CMOS technology for the integrated camera of the Cherenkov Telescope Array

    Energy Technology Data Exchange (ETDEWEB)

    Gascon, D; Sanuy, A; Ribo, M [Dept. AM i Dept.ECM, Institut de Ciencies del Cosmos (ICC), Universitat de Barcelona, Marti i Franques 1, E08028, Barcelona (Spain); Delagnes, E; Glicenstein, J-F [IRFU/DSM/CEA, CE-Saclay, Bat. 141 SEN Saclay, F-91191, Gif-sur-Yvette (France); Sieiro, X [Departament d' Electronica, Universitat de Barcelona, Marti i Franques 1, E08028, Barcelona (Spain); Feinstein, F; Vorobiov, S [LPTA, Universite Montpellier II and IN2P3/CNRS, Montpellier (France); Nayman, P; Toussenel, F; Tavernet, J-P; Vincent, P, E-mail: gascon@ecm.ub.es [LPNHE, Universite Paris VI and IN2P3/CNRS, Paris (France)

    2010-12-15

    A fully differential wideband amplifier for the camera of the Cherenkov Telescope Array (CTA) is presented. This amplifier would be part of a new ASIC, developed by the NECTAr collaboration, performing the digitization at 1 GS/s with a dynamic range of 16 bits. Input amplifiers must have a voltage gain up to 20 V/V and a bandwidth of 400 MHz. Being impossible to design a fully differential operational amplifier with an 8 GHz GBW product in a 0.35{mu}m CMOS technology, an alternative implementation based on HF linearised transconductors is explored. Test results show that the required GBW product is achieved, with a linearity error smaller than 1% for a differential output voltage range up to 1 Vpp, and smaller than 3% for 2 Vpp.

  9. Performance and Irradiation Tests of the 0.3$\\mu$m CMOS TDC for the ATLAS MDT

    OpenAIRE

    Arai, Y; Fukuda, M; Emura, T

    1999-01-01

    ATLAS Muon TDC test-element group chip (AMTTEG) was developed and tested to confirm the performance of critical circuits of the TDC and measure radiation tolerance of the process. The chip was fabricated in a 0.3 mm CMOS Gate-Array technology. Measurements of critical elements of the chip such as the PLL, and data buffering circuits demonstrated adequate performance. The effect of gamma-ray irradiation, using a Co60 source, and neutron irradiation, using PROSPERO reactor in France, were also ...

  10. A high-speed low-noise transimpedance amplifier in a 0.25 {mu}m CMOS technology

    Energy Technology Data Exchange (ETDEWEB)

    Anelli, Giovanni E-mail: giovanni.anelli@cern.ch; Borer, Kurt; Casagrande, Luca; Despeisse, Matthieu; Jarron, Pierre; Pelloux, Nicolas; Saramad, Shahyar

    2003-10-11

    We present the simulated and measured performance of a transimpedance amplifier designed in a quarter micron CMOS process. Containing only NMOS and PMOS devices, this amplifier can be integrated in any submicron CMOS process. The main feature of this design is the use of a transistor in the feedback path instead of a resistor. The circuit has been optimized for reading signals coming from silicon strip detectors with few pF input capacitance. For an input charge of 4 fC, an input capacitance of 4 pF and a transresistance of 135 k{omega}, we have measured an output pulse fall time of 3 ns and an Equivalent Noise Charge (ENC) of around 350 electrons rms. In view of the operation of the chip at cryogenic temperatures, measurements at 130 K have also been carried out, showing an overall improvement in the performance of the chip. Fall times down to 1.5 ns have been measured. An integrated circuit containing 32 channels has been designed and wire bonded to a silicon strip detector and successfully used for the construction of a high-intensity proton beam hodoscope for the NA60 experiment. The chip has been laid out using special techniques to improve its radiation tolerance, and it has been irradiated up to 10 Mrd (SiO{sub 2}) without any degradation in the performance.

  11. CMOS continuous-time adaptive equalizers for high-speed serial links

    CERN Document Server

    Gimeno Gasca, Cecilia; Aldea Chagoyen, Concepción

    2015-01-01

    This book introduces readers to the design of adaptive equalization solutions integrated in standard CMOS technology for high-speed serial links. Since continuous-time equalizers offer various advantages as an alternative to discrete-time equalizers at multi-gigabit rates, this book provides a detailed description of continuous-time adaptive equalizers design - both at transistor and system levels-, their main characteristics and performances. The authors begin with a complete review and analysis of the state of the art of equalizers for wireline applications, describing why they are necessary, their types, and their main applications. Next, theoretical fundamentals of continuous-time adaptive equalizers are explored. Then, new structures are proposed to implement the different building blocks of the adaptive equalizer: line equalizer, loop-filters, power comparator, etc.  The authors demonstrate the design of a complete low-power, low-voltage, high-speed, continuous-time adaptive equalizer. Finally, a cost-...

  12. A low power CMOS 3.3 Gbps continuous-time adaptive equalizer for serial link

    International Nuclear Information System (INIS)

    Ju Hao; Zhou Yumei; Zhao Jianzhong

    2011-01-01

    This paper describes using a high-speed continuous-time analog adaptive equalizer as the front-end of a receiver for a high-speed serial interface, which is compliant with many serial communication specifications such as USB2.0, PCI-E2.0 and Rapid IO. The low and high frequency loops are merged to decrease the effect of delay between the two paths, in addition, the infinite input impedance facilitates the cascade stages in order to improve the high frequency boosting gain. The implemented circuit architecture could facilitate the wide frequency range from 1 to 3.3 Gbps with different length FR4-PCB traces, which brings as much as 25 dB loss. The replica control circuits are injected to provide a convenient way to regulate common-mode voltage for full differential operation. In addition, AC coupling is adopted to suppress the common input from the forward stage. A prototype chip was fabricated in 0.18-μm 1P6M mixed-signal CMOS technology. The actual area is 0.6 x 0.57 mm 2 and the analog equalizer operates up to 3.3 Gbps over FR4-PCB trace with 25 dB loss. The overall power dissipation is approximately 23.4 mW. (semiconductor integrated circuits)

  13. A low power CMOS 3.3 Gbps continuous-time adaptive equalizer for serial link

    Science.gov (United States)

    Hao, Ju; Yumei, Zhou; Jianzhong, Zhao

    2011-09-01

    This paper describes using a high-speed continuous-time analog adaptive equalizer as the front-end of a receiver for a high-speed serial interface, which is compliant with many serial communication specifications such as USB2.0, PCI-E2.0 and Rapid IO. The low and high frequency loops are merged to decrease the effect of delay between the two paths, in addition, the infinite input impedance facilitates the cascade stages in order to improve the high frequency boosting gain. The implemented circuit architecture could facilitate the wide frequency range from 1 to 3.3 Gbps with different length FR4-PCB traces, which brings as much as 25 dB loss. The replica control circuits are injected to provide a convenient way to regulate common-mode voltage for full differential operation. In addition, AC coupling is adopted to suppress the common input from the forward stage. A prototype chip was fabricated in 0.18-μm 1P6M mixed-signal CMOS technology. The actual area is 0.6 × 0.57 mm2 and the analog equalizer operates up to 3.3 Gbps over FR4-PCB trace with 25 dB loss. The overall power dissipation is approximately 23.4 mW.

  14. A fully integrated UHF RFID reader SoC for handheld applications in the 0.18 {mu}m CMOS process

    Energy Technology Data Exchange (ETDEWEB)

    Wang Jingchao; Zhang Chun; Wang Zhihua, E-mail: wangjc@gmail.co [Institute of Microelectronics, Tsinghua University, Beijing 100084 (China)

    2010-08-15

    A low cost fully integrated single-chip UHF radio frequency identification (RFID) reader SoC for short distance handheld applications is presented. The SoC integrates all building blocks-including an RF transceiver, a PLL frequency synthesizer, a digital baseband and an MCU-in a 0.18 {mu}m CMOS process. A high-linearity RX front-end is designed to handle the large self-interferer. A class-E power amplifier with high power efficiency is also integrated to fulfill the function of a UHF passive RFID reader. The measured maximum output power of the transmitter is 20.28 dBm and the measured receiver sensitivity is -60 dBm. The digital baseband including MCU core consumes 3.91 mW with a clock of 10 MHz and the analog part including power amplifier consumes 368.4 mW. The chip has a die area of 5.1 x 3.8 mm{sup 2} including pads. (semiconductor integrated circuits)

  15. A 3.1-4.8 GHz transmitter with a high frequency divider in 0.18 {mu}m CMOS for OFDM-UWB

    Energy Technology Data Exchange (ETDEWEB)

    Zheng Renliang; Ren Junyan; Li Wei; Li Ning, E-mail: jyren@fudan.edu.c [Micro/Nano Science and Innovation Platform, State Key Laboratory of ASIC and System, Fudan University, Shanghai 201203 (China)

    2009-12-15

    A fully integrated low power RF transmitter for a WiMedia 3.1-4.8 GHz multiband orthogonal frequency division multiplexing ultra-wideband system is presented. With a separate transconductance stage, the quadrature up-conversion modulator achieves high linearity with low supply voltage. The co-design of different resonant frequencies of the modulator and the differential to single (D2S) converter ensures in-band gain flatness. By means of a series inductor peaking technique, the D2S converter obtains 9 dB more gain without extra power consumption. A divided-by-2 divider is used for carrier signal generation. The measurement results show an output power between -10.7 and -3.1 dBm with 7.6 dB control range, an OIP3 up to 12 dBm, a sideband rejection of 35 dBc and a carrier rejection of 30 dBc. The ESD protected chip is fabricated in the Jazz 0.18 {mu}m RF CMOS process with an area of 1.74 mm{sup 2} and only consumes 32 mA current (at 1.8 V) including the test associated parts. (semiconductor integrated circuits)

  16. A 2.5-Gb/s fully-integrated, low-power clock and recovery circuit in 0.18-{mu}m CMOS

    Energy Technology Data Exchange (ETDEWEB)

    Zhang Changchun; Wang Zhigong; Shi Si; Guo Yufeng, E-mail: zgwang@seu.edu.c [Institute of RF- and OE-ICs, Southeast University, Nanjing 210096 (China)

    2010-03-15

    Based on the devised system-level design methodology, a 2.5-Gb/s monolithic bang-bang phase-locked clock and data recovery (CDR) circuit has been designed and fabricated in SMIC's 0.18-{mu}m CMOS technology. The Pottbaecker phase frequency detector and a differential 4-stage inductorless ring VCO are adopted, where an additional current source is added to the VCO cell to improve the linearity of the VCO characteristic. The CDR has an active area of 340 x 440 {mu}m{sup 2}, and consumes apower of only about 60 mW from a 1.8 V supply voltage, with an input sensitivity of less than 25 mV, and an output single-ended swing of more than 300 mV It has a pull-in range of 800 MHz, and a phase noise of -111.54 dBc/Hz at 10 kHz offset. The CDR works reliably at any input data rate between 1.8 Gb/s and 2.6 Gb/s without any need for reference clock, off-chip tuning, or external components. (semiconductor integrated circuits)

  17. A fractional-N frequency synthesizer-based multi-standard I/Q carrier generation system in 0.13 {mu}m CMOS

    Energy Technology Data Exchange (ETDEWEB)

    Lou Wenfeng; Geng Zhiqing; Feng Peng; Wu Nanjian, E-mail: nanjian@semi.ac.cn [Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083 (China)

    2011-06-15

    This paper proposes a sigma-delta fractional-N frequency synthesizer-based multi-standard I/Q carrier generation system. With reasonable frequency planning, the system can be used in multi-standard wireless communication applications (GSM, WCDMA, GPRS, TD-SCDMA, WLAN (802.11a/b/g)). The implementation is achieved by a 0.13 {mu}m RF CMOS process. The measured results demonstrate that three quadrature VCOs (QVCO) continuously cover the frequency from 3.1 to 6.1 GHz (65.2%), and through the successive divide-by-2 prescalers to achieve the frequency from 0.75 to 6.1 GHz continuously. The chip was fully integrated with the exception of an off-chip filter. The entire chip area is only 3.78 mm{sup 2}, and the system consumes a 21.7 mA - 1.2 V supply without output buffers. The lock-in time of the PLL frequency synthesizer is less than 4 {mu}s over the entire frequency range with a direct frequency presetting technique and the auxiliary non-volatile memory (NVM) can store the digital configuration signal of the system, including presetting signals to avoid the calibration process case by case. (semiconductor integrated circuits)

  18. A monolithic 3.1-4.8 GHz MB-OFDM UWB transceiver in 0.18-{mu}m CMOS

    Energy Technology Data Exchange (ETDEWEB)

    Zheng Renliang; Jiang Xudong; Yao Wang; Yang Guang; Yin Jiangwei; Zheng Jianqin; Ren Junyan; Li Wei; Li Ning, E-mail: jyren@fudan.edu.c [State Key Laboratory of ASIC and System, Fudan University, Shanghai 201203 (China)

    2010-06-15

    A monolithic RF transceiver for an MB-OFDM UWB system in 3.1-4.8 GHz is presented. The transceiver adopts direct-conversion architecture and integrates all building blocks including a gain controllable wideband LNA, a I/Q merged quadrature mixer, a fifth-order Gm-C bi-quad Chebyshev LPF/VGA, a fast-settling frequency synthesizer with a poly-phase filter, a linear broadband up-conversion quadrature modulator, an active D2S converter and a variable-gain power amplifier. The ESD protected transceiver is fabricated in Jazz Semiconductor's 0.18-{mu}m RF CMOS with an area of 6.1 mm{sup 2} and draws a total current of 221 mA from 1.8-V supply. The receiver achieves a maximum voltage gain of 68 dB with a control range of 42 dB in 6 dB/step, noise figures of 5.5-8.8 dB for three sub-bands, and an in-band/out-band IIP3 better than -4 dBm/+9 dBm. The transmitter achieves an output power ranging from -10.7 to -3 dBm with gain control, an output P{sub 1dB} better than -7.7 dBm, a sideband rejection about 32.4 dBc, and LO suppression of 31.1 dBc. The hopping time among sub-bands is less than 2.05 ns. (semiconductor integrated circuits)

  19. A digital calibration technique for an ultra high-speed wide-bandwidth folding and interpolating analog-to-digital converter in 0.18-{mu}m CMOS technology

    Energy Technology Data Exchange (ETDEWEB)

    Yu Jinshan; Zhang Ruitao; Zhang Zhengping; Wang Yonglu; Zhu Can; Zhang Lei; Yu Zhou; Han Yong, E-mail: yujinshan@yeah.net [National Laboratory of Analog IC' s, Chongqing 400060 (China)

    2011-01-15

    A digital calibration technique for an ultra high-speed folding and interpolating analog-to-digital converter in 0.18-{mu}m CMOS technology is presented. The similar digital calibration techniques are taken for high 3-bit flash converter and low 5-bit folding and interpolating converter, which are based on well-designed calibration reference, calibration DAC and comparators. The spice simulation and the measured results show the ADC produces 5.9 ENOB with calibration disabled and 7.2 ENOB with calibration enabled for high-frequency wide-bandwidth analog input. (semiconductor integrated circuits)

  20. 5.2-GHz RF Power Harvester in 0.18-/spl mu/m CMOS for Implantable Intraocular Pressure Monitoring

    KAUST Repository

    Ouda, Mahmoud H.

    2013-04-17

    A first fully integrated 5.2-GHz CMOS-based RF power harvester with an on-chip antenna is presented in this paper. The design is optimized for sensors implanted inside the eye to wirelessly monitor the intraocular pressure of glaucoma patients. It includes a five-stage RF rectifier with an on-chip antenna, a dc voltage limiter, two voltage sensors, a low dropout voltage regulator, and MOSCAP based on-chip storage. The chip has been designed and fabricated in a standard 0.18-μm CMOS technology. To emulate the eye environment in measurements, a custom test setup is developed that comprises Plexiglass cavities filled with saline solution. Measurements in this setup show that the proposed chip can be charged to 1 V wirelessly from a 5-W transmitter 3 cm away from the harvester chip. The energy that is stored on the 5-nF on-chip MOSCAP when charged to 1 V is 2.5 nJ, which is sufficient to drive an arbitrary 100-μW load for 9 μs at regulated 0.8 V. Simulated efficiency of the rectifier is 42% at -7 dBm of input power.

  1. A 5 Gb/s CMOS adaptive equalizer for serial link

    Science.gov (United States)

    Wu, Hongbing; Wang, Jingyu; Liu, Hongxia

    2018-04-01

    A 5 Gb/s adaptive equalizer with a new adaptation scheme is presented here by using 0.13 μm CMOS process. The circuit consists of the combination of equalizer amplifier, limiter amplifier and adaptation loop. The adaptive algorithm exploits both the low frequency gain loop and the equalizer loop to minimize the inter-symbol interference (ISI) for a variety of cable characteristics. In addition, an offset cancellation loop is used to alleviate the offset influence of the signal path. The adaptive equalizer core occupies an area of 0.3567 mm2 and consumes a power consumption of 81.7 mW with 1.8 V power supply. Experiment results demonstrate that the equalizer could compensate for a designed cable loss with 0.23 UI peak-to-peak jitter. Project supported by the National Natural Science Foundation of China (No. 61376099), the Foundation for Fundamental Research of China (No. JSZL2016110B003), and the Major Fundamental Research Program of Shaanxi (No. 2017ZDJC-26).

  2. A tale behind Mum Effect

    Directory of Open Access Journals (Sweden)

    Sakgasit Ramingwong

    2013-01-01

    Full Text Available Mum effect is a situation when one or more project stakeholders decide to withhold critical information for particular reasons. In software project where most of the production is intangible, the seriousness of this challenge increases exponentially. There have been reports indicating that mum effect can surface during any phase of development and ultimately lead to disaster in software projects. Mum effect can be influenced by several factors such as organizational and national cultures. This research investigates potential mum effect scenarios and reveals specific reasons which induce this challenge among information technology practitioners.

  3. From VHF to UHF CMOS-MEMS Monolithically Integrated Resonators

    DEFF Research Database (Denmark)

    Teva, Jordi; Berini, Abadal Gabriel; Uranga, A.

    2008-01-01

    This paper presents the design, fabrication and characterization of microresonators exhibiting resonance frequencies in the VHF and UHF bands, fabricated using the available layers of the standard and commercial CMOS technology, AMS-0.35mum. The resonators are released in a post-CMOS process cons...

  4. Characterization of an x-ray hybrid CMOS detector with low interpixel capacitive crosstalk

    OpenAIRE

    Griffith, Christopher V.; Bongiorno, Stephen D.; Burrows, David N.; Falcone, Abraham D.; Prieskorn, Zachary R.

    2012-01-01

    We present the results of x-ray measurements on a hybrid CMOS detector that uses a H2RG ROIC and a unique bonding structure. The silicon absorber array has a 36{\\mu}m pixel size, and the readout array has a pitch of 18{\\mu}m; but only one readout circuit line is bonded to each 36x36{\\mu}m absorber pixel. This unique bonding structure gives the readout an effective pitch of 36{\\mu}m. We find the increased pitch between readout bonds significantly reduces the interpixel capacitance of the CMOS ...

  5. Batch Processing of CMOS Compatible Feedthroughs

    DEFF Research Database (Denmark)

    Rasmussen, F.E.; Heschel, M.; Hansen, Ole

    2003-01-01

    . The feedthrough technology employs a simple solution to the well-known CMOS compatibility issue of KOH by protecting the CMOS side of the wafer using sputter deposited TiW/Au. The fabricated feedthroughs exhibit excellent electrical performance having a serial resistance of 40 mOmega and a parasitic capacitance...... of 2.5 pF. (C) 2003 Elsevier Science B.V. All rights reserved....

  6. A CMOS Image Sensor With In-Pixel Buried-Channel Source Follower and Optimized Row Selector

    NARCIS (Netherlands)

    Chen, Y.; Wang, X.; Mierop, A.J.; Theuwissen, A.J.P.

    2009-01-01

    This paper presents a CMOS imager sensor with pinned-photodiode 4T active pixels which use in-pixel buried-channel source followers (SFs) and optimized row selectors. The test sensor has been fabricated in a 0.18-mum CMOS process. The sensor characterization was carried out successfully, and the

  7. CMOS circuits manual

    CERN Document Server

    Marston, R M

    1995-01-01

    CMOS Circuits Manual is a user's guide for CMOS. The book emphasizes the practical aspects of CMOS and provides circuits, tables, and graphs to further relate the fundamentals with the applications. The text first discusses the basic principles and characteristics of the CMOS devices. The succeeding chapters detail the types of CMOS IC, including simple inverter, gate and logic ICs and circuits, and complex counters and decoders. The last chapter presents a miscellaneous collection of two dozen useful CMOS circuits. The book will be useful to researchers and professionals who employ CMOS circu

  8. Recent developments with CMOS SSPM photodetectors

    Energy Technology Data Exchange (ETDEWEB)

    Stapels, Christopher J. [Radiation Monitoring Devices, Inc., Watertown, MA (United States)], E-mail: CStapels@RMDInc.com; Barton, Paul [University of Michigan, Ann Arbor, MI (United States); Johnson, Erik B. [Radiation Monitoring Devices, Inc., Watertown, MA (United States); Wehe, David K. [University of Michigan, Ann Arbor, MI (United States); Dokhale, Purushottam; Shah, Kanai [Radiation Monitoring Devices, Inc., Watertown, MA (United States); Augustine, Frank L. [Augustine Engineering, Encinitas, CA (United States); Christian, James F. [Radiation Monitoring Devices, Inc., Watertown, MA (United States)

    2009-10-21

    Experiments and simulations using various solid-state photomultiplier (SSPM) designs have been performed to evaluate pixel layouts and explore design choices. SPICE simulations of a design for position-sensing SSPMs showed charge division in the resistor network, and anticipated timing performance of the device. The simulation results predict good position information for resistances in the range of 1-5 k{omega} and 150-{omega} preamplifier input impedance. Back-thinning of CMOS devices can possibly increase the fill factor to 100%, improve spectral sensitivity, and allow for the deposition of anti-reflective coatings after fabrication. We report initial results from back illuminating a CMOS SSPM, and single Geiger-mode avalanche photodiode (GPD) pixels, thinned to 50 {mu}m.

  9. Beyond CMOS nanodevices 2

    CERN Document Server

    Balestra, Francis

    2014-01-01

    This book offers a comprehensive review of the state-of-the-art in innovative Beyond-CMOS nanodevices for developing novel functionalities, logic and memories dedicated to researchers, engineers and students. The book will particularly focus on the interest of nanostructures and nanodevices (nanowires, small slope switches, 2D layers, nanostructured materials, etc.) for advanced More than Moore (RF-nanosensors-energy harvesters, on-chip electronic cooling, etc.) and Beyond-CMOS logic and memories applications.

  10. Beyond CMOS nanodevices 1

    CERN Document Server

    Balestra, Francis

    2014-01-01

    This book offers a comprehensive review of the state-of-the-art in innovative Beyond-CMOS nanodevices for developing novel functionalities, logic and memories dedicated to researchers, engineers and students.  It particularly focuses on the interest of nanostructures and nanodevices (nanowires, small slope switches, 2D layers, nanostructured materials, etc.) for advanced More than Moore (RF-nanosensors-energy harvesters, on-chip electronic cooling, etc.) and Beyond-CMOS logic and memories applications

  11. Development of Single-Event Upset hardened programmable logic devices in deep submicron CMOS; Developpement de circuits logiques programmables resistants aux aleas logiques en technologie CMOS submicrometrique

    Energy Technology Data Exchange (ETDEWEB)

    Bonacini, S

    2007-11-15

    The electronics associated to the particle detectors of the Large Hadron Collider (LHC), under construction at CERN, will operate in a very harsh radiation environment. Commercial Off-The-Shelf (COTS) components cannot be used in the vicinity of particle collision due to their poor radiation tolerance. This thesis is a contribution to the effort to cover the need for radiation-tolerant SEU-robust (Single Event Upset) programmable components for application in high energy physics experiments. Two components are under development: a Programmable Logic Device (PLD) and a Field-Programmable Gate Array (FPGA). The PLD is a fuse-based, 10-input, 8-I/O general architecture device in 0.25 {mu}m CMOS technology. The FPGA under development is a 32*32 logic block array, equivalent to {approx} 25 k gates, in 0.13 {mu}m CMOS. The irradiation test results obtained in the CMOS 0.25 {mu}m technology demonstrate good robustness of the circuit up to an LET (Linear Energy Transfer) of 79.6 cm{sup 2}*MeV/mg, which make it suitable for the target environment. The CMOS 0.13 {mu}m circuit has showed robustness to an LET of 37.4 cm{sup 2}*MeV/mg in the static test mode and has increased sensitivity in the dynamic test mode. This work focused also on the research for an SEU-robust register in both the mentioned technologies. The SEU-robust register is employed as a user data flip-flop in the FPGA and PLD designs and as a configuration cell as well in the FPGA design.

  12. Developments in Serials: 1977

    Science.gov (United States)

    James, John R.

    1978-01-01

    Discusses issues and developments relating to several aspects of serials, including economics and acquisitions; bibliographic control; automation; education; serials literature and bibliographies; and copyrights. A bibliography is included. (Author/MBR)

  13. Decreasing Serial Cost Sharing

    DEFF Research Database (Denmark)

    Hougaard, Jens Leth; Østerdal, Lars Peter

    The increasing serial cost sharing rule of Moulin and Shenker [Econometrica 60 (1992) 1009] and the decreasing serial rule of de Frutos [Journal of Economic Theory 79 (1998) 245] have attracted attention due to their intuitive appeal and striking incentive properties. An axiomatic characterization...... of the increasing serial rule was provided by Moulin and Shenker [Journal of Economic Theory 64 (1994) 178]. This paper gives an axiomatic characterization of the decreasing serial rule...

  14. Decreasing serial cost sharing

    DEFF Research Database (Denmark)

    Hougaard, Jens Leth; Østerdal, Lars Peter Raahave

    2009-01-01

    The increasing serial cost sharing rule of Moulin and Shenker (Econometrica 60:1009-1037, 1992) and the decreasing serial rule of de Frutos (J Econ Theory 79:245-275, 1998) are known by their intuitive appeal and striking incentive properties. An axiomatic characterization of the increasing serial...... rule was provided by Moulin and Shenker (J Econ Theory 64:178-201, 1994). This paper gives an axiomatic characterization of the decreasing serial rule....

  15. An ultra-low-power CMOS temperature sensor for RFID applications

    Energy Technology Data Exchange (ETDEWEB)

    Xu Conghui; Gao Peijun; Che Wenyi; Tan Xi; Yan Na; Min Hao, E-mail: yanna@fudan.edu.c [State Key Laboratory of ASIC and System, Fudan University, Shanghai 201203 (China)

    2009-04-15

    An ultra-low-power CMOS temperature sensor with analog-to-digital readout circuitry for RFID applications was implemented in a 0.18-mum CMOS process. To achieve ultra-low power consumption, an error model is proposed and the corresponding novel temperature sensor front-end with a new double-measure method is presented. Analog-to-digital conversion is accomplished by a sigma-delta converter. The complete system consumes only 26 muA and 1.8 V for continuous operation and achieves an accuracy of +-0.65 deg. C from -20 to 120 deg. C after calibration at one temperature.

  16. Development of CMOS Imager Block for Capsule Endoscope

    International Nuclear Information System (INIS)

    Shafie, S; Fodzi, F A M; Tung, L Q; Lioe, D X; Halin, I A; Hasan, W Z W; Jaafar, H

    2014-01-01

    This paper presents the development of imager block to be associated in a capsule endoscopy system. Since the capsule endoscope is used to diagnose gastrointestinal diseases, the imager block must be in small size which is comfortable for the patients to swallow. In this project, a small size 1.5 V button battery is used as the power supply while the voltage supply requirements for other components such as microcontroller and CMOS image sensor are higher. Therefore, a voltage booster circuit is proposed to boost up the voltage supply from 1.5 V to 3.3 V. A low power microcontroller is used to generate control pulses for the CMOS image sensor and to convert the 8-bits parallel data output to serial data to be transmitted to the display panel. The results show that the voltage booster circuit was able to boost the voltage supply from 1.5 V to 3.3 V. The microcontroller precisely controls the CMOS image sensor to produce parallel data which is then serialized again by the microcontroller. The serial data is then successfully translated to 2fps image and displayed on computer.

  17. CMOS dot matrix microdisplay

    Science.gov (United States)

    Venter, Petrus J.; Bogalecki, Alfons W.; du Plessis, Monuko; Goosen, Marius E.; Nell, Ilse J.; Rademeyer, P.

    2011-03-01

    Display technologies always seem to find a wide range of interesting applications. As devices develop towards miniaturization, niche applications for small displays may emerge. While OLEDs and LCDs dominate the market for small displays, they have some shortcomings as relatively expensive technologies. Although CMOS is certainly not the dominating semiconductor for photonics, its widespread use, favourable cost and robustness present an attractive potential if it could find application in the microdisplay environment. Advances in improving the quantum efficiency of avalanche electroluminescence and the favourable spectral characteristics of light generated through the said mechanism may afford CMOS the possibility to be used as a display technology. This work shows that it is possible to integrate a fully functional display in a completely standard CMOS technology mainly geared towards digital design while using light sources completely compatible with the process and without any post processing required.

  18. Wideband CMOS receivers

    CERN Document Server

    Oliveira, Luis

    2015-01-01

    This book demonstrates how to design a wideband receiver operating in current mode, in which the noise and non-linearity are reduced, implemented in a low cost single chip, using standard CMOS technology.  The authors present a solution to remove the transimpedance amplifier (TIA) block and connect directly the mixer’s output to a passive second-order continuous-time Σ∆ analog to digital converter (ADC), which operates in current-mode. These techniques enable the reduction of area, power consumption, and cost in modern CMOS receivers.

  19. THE 3 MU-M SPECTRA OF CANDIDATE CARBON STARS

    NARCIS (Netherlands)

    GROENEWEGEN, MAT; DEJONG, T; GEBALLE, TR

    We have searched for the 3.1 mum absorption feature, a well-known characteristic of optical carbon stars, in a sample of sixteen candidate carbon stars, most of which have very red colors and some of which have no optical counterparts. The sample was selected on the basis of similarity of LRS

  20. CMOS/SOS processing

    Science.gov (United States)

    Ramondetta, P.

    1980-01-01

    Report describes processes used in making complementary - metal - oxide - semiconductor/silicon-on-sapphire (CMOS/SOS) integrated circuits. Report lists processing steps ranging from initial preparation of sapphire wafers to final mapping of "good" and "bad" circuits on a wafer.

  1. Design and fabrication of a 025 mum Rad-Hard ASIC for ALICE ITS data acquisition system

    CERN Document Server

    Falchieri, D; Gandolfi, E

    2003-01-01

    This paper explains the design and the realization of a digital Rad- Hard chip. The design is a part of the Large Hadron Collider (LHC), A Large Ion Collider Experiment (ALICE) at CERN. The chip has been designed in VHDL-Verilog language and implemented in 0.25 mum CMOS 3- metal Rad-Hard CERN library. It is composed of 10 kgates, 84 I/O pads out of the 100 total pads, it is clocked at 40MHz, it is pad-limited and the whole die area is 4 multiplied by 4mm **2. The chip has been tested over 20 packaged samples and it has been proved that 12 out of 20 chips work well.

  2. Design and analysis of a highly-integrated CMOS power amplifier for RFID readers

    Energy Technology Data Exchange (ETDEWEB)

    Gao Tongqiang [Department of Electronics, Tsinghua University, Beijing 100084 (China); Zhang Chun; Chi Baoyong; Wang Zhihua, E-mail: gtq03@mails.tsinghua.edu.c [Institute of Microelectronics, Tsinghua University, Beijing 100084 (China)

    2009-06-01

    To implement a fully-integrated on-chip CMOS power amplifier (PA) for RFID readers, the resonant frequency of each matching network is derived in detail. The highlight of the design is the adoption of a bonding wire as the output-stage inductor. Compared with the on-chip inductors in a CMOS process, the merit of the bondwire inductor is its high quality factor, leading to a higher output power and efficiency. The disadvantage of the bondwire inductor is that it is hard to control. A highly integrated class-E PA is implemented with 0.18-mum CMOS process. It can provide a maximum output power of 20 dBm and a 1 dB output power of 14.5 dBm. The maximum power-added efficiency (PAE) is 32.1%. Also, the spectral performance of the PA is analyzed for the specified RFID protocol.

  3. CMOS analog circuit design

    CERN Document Server

    Allen, Phillip E

    1987-01-01

    This text presents the principles and techniques for designing analog circuits to be implemented in a CMOS technology. The level is appropriate for seniors and graduate students familiar with basic electronics, including biasing, modeling, circuit analysis, and some familiarity with frequency response. Students learn the methodology of analog integrated circuit design through a hierarchically-oriented approach to the subject that provides thorough background and practical guidance for designing CMOS analog circuits, including modeling, simulation, and testing. The authors' vast industrial experience and knowledge is reflected in the circuits, techniques, and principles presented. They even identify the many common pitfalls that lie in the path of the beginning designer--expert advice from veteran designers. The text mixes the academic and practical viewpoints in a treatment that is neither superficial nor overly detailed, providing the perfect balance.

  4. A high speed serializer ASIC for ATLAS Liquid Argon calorimeter upgrade

    CERN Document Server

    Liu, T; The ATLAS collaboration

    2011-01-01

    The current front-end electronics of the ATLAS Liquid Argon calorimeters need to be upgraded to sustain the higher radiation levels and data rates expected at the upgraded LHC machine (HL-LHC), which will have 5 times more luminosity than the LHC in its ultimate configuration. This upgrade calls for an optical link system of 100 Gbps per front-end board (FEB). A high speed, low power, radiation tolerant serializer is the critical component in this system. In this paper, we present the design and test results of a single channel 16:1 serializer and the design of a double-channel 16:1 serializer. Both designs are based on a commercial 0.25 μm silicon-on-sapphire CMOS technology. The single channel serializer consists of a serializing unit, a PLL clock generator and a line driver implemented in current mode logic (CML). The serializing unit multiplexes 16 bit parallel LVDS data into 1-bit width serial CMOS data. The serializing unit is composed of a cascade of 2:1 multiplexing circuits based on static D-flip-fl...

  5. CMOS-compatible high-voltage integrated circuits

    Energy Technology Data Exchange (ETDEWEB)

    Parpia, Z

    1988-01-01

    Considerable savings in cost and development time can be achieved if high-voltage ICs (HVICs) are fabricated in an existing low-voltage process. In this thesis, the feasibility of fabricating HVICs in a standard CMOS process is investigated. The high-voltage capabilities of an existing 5-{mu}m CMOS process are first studied. High-voltage n- and p-channel transistors with breakdown voltages of 50 and 190 V, respectively, were fabricated without any modifications to the process under consideration. SPICE models for these transistors are developed, and their accuracy verified by comparison with experimental results. In addition, the effect of the interconnect metallization on the high-voltage performance of these devices is also examined. Polysilicon field plates are found to be effective in preventing premature interconnect induced breakdown in these devices. A novel high-voltage transistor structure, the insulated base transistor (IBT), based on a merged MOS-bipolar concept, is proposed and implemented. In order to enhance the high-voltage device capabilities, an improved CMOS-compatible HVIC process using junction isolation is developed.

  6. CRNL library serials list

    International Nuclear Information System (INIS)

    Alburger, T.P.

    1982-04-01

    A list of 1900 serial publications (periodicals, society transactions and proceedings, annuals and directories, indexes, newspapers, etc.) is presented with volumes and years held by the Main Library. This library is the largest in AECL as well as one of the largest scientific and technical libraries in North America, and functions as a Canadian resource for nuclear information. A main alphabetical list is followed by broad subject field lists representing research interests, and lists of abstract and index serials, general bibliographic serials, conference indexes, press releases, English translations, and original language journals

  7. A 16:1 Serializer ASIC for Data Transmission at 5 Gbps

    CERN Document Server

    Gong, D; The ATLAS collaboration

    2010-01-01

    A high speed, low power 16:1 serializer has been developed with a commercial 0.25 μm silicon-on-sapphire CMOS technology. The serializer operates from 4.0 to 5.7 Gbps. Total jitter is 62 ps and the eye openning of the bathtub curve is 122 ps at bit rate error of 10-12 at 5 Gbps. Power consumption is 463 mW at 5 Gbps. A proton beam test indicates the serializer is suitable for applications in high energy physics experiments.

  8. Playing at Serial Acquisitions

    NARCIS (Netherlands)

    J.T.J. Smit (Han); T. Moraitis (Thras)

    2010-01-01

    textabstractBehavioral biases can result in suboptimal acquisition decisions-with the potential for errors exacerbated in consolidating industries, where consolidators design serial acquisition strategies and fight escalating takeover battles for platform companies that may determine their future

  9. Classifying serial killers.

    Science.gov (United States)

    Promish, D I; Lester, D

    1999-11-08

    We attempted to match the appearance and demeanor of 27 serial killers to the postmortem 'signatures' found on their victims' bodies. Our results suggest that a link may exist between postmortem signatures and two complementary appearance-demeanor types.

  10. Structured Analog CMOS Design

    CERN Document Server

    Stefanovic, Danica

    2008-01-01

    Structured Analog CMOS Design describes a structured analog design approach that makes it possible to simplify complex analog design problems and develop a design strategy that can be used for the design of large number of analog cells. It intentionally avoids treating the analog design as a mathematical problem, developing a design procedure based on the understanding of device physics and approximations that give insight into parameter interdependences. The proposed transistor-level design procedure is based on the EKV modeling approach and relies on the device inversion level as a fundament

  11. A capacitor-free CMOS LDO regulator with AC-boosting and active-feedback frequency compensation

    Energy Technology Data Exchange (ETDEWEB)

    Zhou Qianneng; Wang Yongsheng; Lai Fengchang, E-mail: qianneng@hit.edu.c [Microelectronics Center, Harbin Institute of Technology, Harbin 150001 (China)

    2009-04-15

    A capacitor-free CMOS low-dropout (LDO) regulator for system-on-chip (SoC) applications is presented. By adopting AC-boosting and active-feedback frequency compensation (ACB-AFFC), the proposed LDO regulator, which is independent of an off-chip capacitor, provides high closed-loop stability. Moreover, a slew rate enhancement circuit is adopted to increase the slew rate and decrease the output voltage dips when the load current is suddenly switched from low to high. The LDO regulator is designed and fabricated in a 0.6 mum CMOS process. The active silicon area is only 770 x 472 mum{sup 2}. Experimental results show that the total error of the output voltage due to line variation is less than +-0.197%. The load regulation is only 0.35 mV/mA when the load current changes from 0 to 100 mA.

  12. The Windows serial port programming handbook

    CERN Document Server

    Bai, Ying

    2004-01-01

    The fundamentals of serial port communications. Serial port programming in ANSI C and Assembly languages for MS-DOS. Serial ports interface developed in VC++ 6.0. Serial port programming in Visual Basic. Serial port programming in LabVIEW. Serial port programming in MATLAB. Serial port programming in Smalltalk. Serial port programming in Java.

  13. High-Speed, Radiation-Tolerant Laser Drivers in 0.13 $\\mu$m CMOS Technology for HEP Applications

    CERN Document Server

    AUTHOR|(CDS)2073369; Moreira, Paulo; Calvo, Daniela; De Remigis, Paolo; Olantera, Lauri; Soos, Csaba; Troska, Jan; Wyllie, Ken

    2014-01-01

    The gigabit laser driver (GBLD) and low-power GBLD (LpGBLD) are two radiation-tolerant laser drivers designed to drive laser diodes at data rates up to 4.8 Gb/s. They have been designed in the framework of the gigabit-transceiver (GBT) and versatile-link projects to provide fast optical links capable of operation in the radiation environment of future high-luminosity high-energy physics experiments. The GBLD provides laser bias and modulation currents up to 43 mA and 24 mA, respectively. It can thus be used to drive vertical cavity surface emitting laser (VCSEL) and edge-emitting laser diodes. A pre-emphasis circuit, which can provide up to 12 mA in 70 ps pulses, has also been implemented to compensate for high external capacitive loads. The current driving capabilities of the LpGBLD are 2 times smaller that those of the GBLD as it has been optimized to drive VCSELs in order to minimize the power consumption. Both application-specific integrated circuits are designed in 0.13 m commercial complementary metal-o...

  14. Contact CMOS imaging of gaseous oxygen sensor array.

    Science.gov (United States)

    Daivasagaya, Daisy S; Yao, Lei; Yi Yung, Ka; Hajj-Hassan, Mohamad; Cheung, Maurice C; Chodavarapu, Vamsy P; Bright, Frank V

    2011-10-01

    We describe a compact luminescent gaseous oxygen (O 2 ) sensor microsystem based on the direct integration of sensor elements with a polymeric optical filter and placed on a low power complementary metal-oxide semiconductor (CMOS) imager integrated circuit (IC). The sensor operates on the measurement of excited-state emission intensity of O 2 -sensitive luminophore molecules tris(4,7-diphenyl-1,10-phenanthroline) ruthenium(II) ([Ru(dpp) 3 ] 2+ ) encapsulated within sol-gel derived xerogel thin films. The polymeric optical filter is made with polydimethylsiloxane (PDMS) that is mixed with a dye (Sudan-II). The PDMS membrane surface is molded to incorporate arrays of trapezoidal microstructures that serve to focus the optical sensor signals on to the imager pixels. The molded PDMS membrane is then attached with the PDMS color filter. The xerogel sensor arrays are contact printed on top of the PDMS trapezoidal lens-like microstructures. The CMOS imager uses a 32 × 32 (1024 elements) array of active pixel sensors and each pixel includes a high-gain phototransistor to convert the detected optical signals into electrical currents. Correlated double sampling circuit, pixel address, digital control and signal integration circuits are also implemented on-chip. The CMOS imager data is read out as a serial coded signal. The CMOS imager consumes a static power of 320 µW and an average dynamic power of 625 µW when operating at 100 Hz sampling frequency and 1.8 V DC. This CMOS sensor system provides a useful platform for the development of miniaturized optical chemical gas sensors.

  15. A CMOS Morlet Wavelet Generator

    Directory of Open Access Journals (Sweden)

    A. I. Bautista-Castillo

    2017-04-01

    Full Text Available The design and characterization of a CMOS circuit for Morlet wavelet generation is introduced. With the proposed Morlet wavelet circuit, it is possible to reach a~low power consumption, improve standard deviation (σ control and also have a small form factor. A prototype in a double poly, three metal layers, 0.5 µm CMOS process from MOSIS foundry was carried out in order to verify the functionality of the proposal. However, the design methodology can be extended to different CMOS processes. According to the performance exhibited by the circuit, may be useful in many different signal processing tasks such as nonlinear time-variant systems.

  16. CMOS-MEMS prestress vertical cantilever resonator with electrostatic driving and piezoresistive sensing

    Energy Technology Data Exchange (ETDEWEB)

    Chiou, J-C; Shieh, L-J; Lin, Y-J [Department of Electrical and Control Engineering, National Chiao Tung University, Hsin-Chu, Taiwan (China)], E-mail: chiou@mail.nctu.edu.tw, E-mail: ljs.ece93g@nctu.edu.tw, E-mail: yjlin@mail.nctu.edu.tw

    2008-10-21

    This paper presents a CMOS-MEMS prestress vertical comb-drive resonator with a piezoresistive sensor to detect its static and dynamic response. The proposed resonator consists of a set of comb fingers fabricated along with a composite beam. One end of the composite beam is clamped to the anchor, while the other is elevated by residual stress. Actuation occurs when the electrostatic force, induced by the fringe effect, pulls the composite beam downwards to the substrate. The initial tip height at the free end of the resonator due to residual stress is approximately 60 {mu}m. A piezoresistor is designed to sense the vertical deflection and vibration of the resonator. The relative change in the resistance of the piezoresistor ({delta}R/R) is about 0.52% when a voltage of 100 V is applied in static mode. The first resonant frequency of the device is 14.5 kHz, and the quality factor is around 36 in air. The device is fabricated through TSMC 0.35 {mu}m 2p4m CMOS process and post-CMOS process.

  17. Serial interprocessor communications system

    International Nuclear Information System (INIS)

    Labiak, W.; Siemens, P.; Bailey, C.

    1980-01-01

    A serial communications system based on the EIA RS232-C standard with modem control lines has been developed. The DLV11-E interface is used for this purpose. All handshaking is done with the modem control lines. This allows totally independent full duplex communication. The message format consists of eight bit data with odd parity and a sixteen bit checksum on the whole message. All communications are fully interrupt driven. A program was written to load a program into a remote LSI-11 using the serial line without bootstrap ROM

  18. Electrical Interconnections Through CMOS Wafers

    DEFF Research Database (Denmark)

    Rasmussen, Frank Engel

    2003-01-01

    Chips with integrated vias are currently the ultimate miniaturizing solution for 3D packaging of microsystems. Previously the application of vias has almost exclusively been demonstrated within MEMS technology, and only a few of these via technologies have been CMOS compatible. This thesis...... describes the development of vias through a silicon wafer containing Complementary Metal-Oxide Semiconductor (CMOS) circuitry. Two via technologies have been developed and fabricated in blank silicon wafers; one based on KOH etching of wafer through-holes and one based on DRIE of wafer through......-holes. The most promising of these technologies --- the DRIE based process --- has been implemented in CMOS wafers containing hearing aid amplifiers. The main challenges in the development of a CMOS compatible via process depend on the chosen process for etching of wafer through-holes. In the case of KOH etching...

  19. Selection and Serial Entrepreneurs

    DEFF Research Database (Denmark)

    Chen, Jing

    2013-01-01

    There is substantial evidence that serial entrepreneurs outperform de novo entrepreneurs. But is this positive association between prior experience and performance the result of learning by doing or of selection on ability? This paper proposes a strategy that combines the fixed-effects model and IV...... when the analysis focuses on founding new startups in sectors closely related to entrepreneurs' previous ventures....

  20. Selection and Serial Entrepreneurs

    DEFF Research Database (Denmark)

    Chen, Jing

    2011-01-01

    Although it has been broadly evidenced that entrepreneurial experience plays a substantial role in the emergence of serial entrepreneurship, the debate is still going on about whether this relationship should be attributed to learning by doing or instead be explained by selection on ability. This...

  1. Serial private infrastructures

    NARCIS (Netherlands)

    van den Berg, V.A.C.

    2013-01-01

    This paper investigates private supply of two congestible infrastructures that are serial, where the consumer has to use both in order to consume. Four market structures are analysed: a monopoly and 3 duopolies that differ in how firms interact. It is well known that private supply leads too high

  2. Stress in Harmonic Serialism

    Science.gov (United States)

    Pruitt, Kathryn Ringler

    2012-01-01

    This dissertation proposes a model of word stress in a derivational version of Optimality Theory (OT) called Harmonic Serialism (HS; Prince and Smolensky 1993/2004, McCarthy 2000, 2006, 2010a). In this model, the metrical structure of a word is derived through a series of optimizations in which the "best" metrical foot is chosen…

  3. Suicide in serial killers.

    Science.gov (United States)

    Lester, David; White, John

    2010-02-01

    In a sample of 248 killers of two victims in America from 1900 to 2005, obtained from an encyclopedia of serial killers by Newton (2006), those completing suicide did not differ in sex, race, or the motive for the killing from those who were arrested.

  4. 32 x 16 CMOS smart pixel array for optical interconnects

    Science.gov (United States)

    Kim, Jongwoo; Guilfoyle, Peter S.; Stone, Richard V.; Hessenbruch, John M.; Choquette, Kent D.; Kiamilev, Fouad E.

    2000-05-01

    Free space optical interconnects can increase throughput capacities and eliminate much of the energy consumption required for `all electronic' systems. High speed optical interconnects can be achieved by integrating optoelectronic devices with conventional electronics. Smart pixel arrays have been developed which use optical interconnects. An individual smart pixel cell is composed of a vertical cavity surface emitting laser (VCSEL), a photodetector, an optical receiver, a laser driver, and digital logic circuitry. Oxide-confined VCSELs are being developed to operate at 850 nm with a threshold current of approximately 1 mA. Multiple quantum well photodetectors are being fabricated from AlGaAs for use with the 850 nm VCSELs. The VCSELs and photodetectors are being integrated with complementary metal oxide semiconductor (CMOS) circuitry using flip-chip bonding. CMOS circuitry is being integrated with a 32 X 16 smart pixel array. The 512 smart pixels are serially linked. Thus, an entire data stream may be clocked through the chip and output electrically by the last pixel. Electrical testing is being performed on the CMOS smart pixel array. Using an on-chip pseudo random number generator, a digital data sequence was cycled through the chip verifying operation of the digital circuitry. Although, the prototype chip was fabricated in 1.2 micrometers technology, simulations have demonstrated that the array can operate at 1 Gb/s per pixel using 0.5 micrometers technology.

  5. Antioxidative Potential of a Streptomyces sp. MUM292 Isolated from Mangrove Soil

    Directory of Open Access Journals (Sweden)

    Loh Teng-Hern Tan

    2018-01-01

    Full Text Available Mangrove derived microorganisms constitute a rich bioresource for bioprospecting of bioactive natural products. This study explored the antioxidant potentials of Streptomyces bacteria derived from mangrove soil. Based on 16S rRNA phylogenetic analysis, strain MUM292 was identified as the genus Streptomyces. Strain MUM292 showed the highest 16S rRNA gene sequence similarity of 99.54% with S. griseoruber NBRC12873T. Furthermore, strain MUM292 was also characterized and showed phenotypic characteristics consistent with Streptomyces bacteria. Fermentation and extraction were performed to obtain the MUM292 extract containing the secondary metabolites of strain MUM292. The extract displayed promising antioxidant activities, including DPPH, ABTS, and superoxide radical scavenging and also metal-chelating activities. The process of lipid peroxidation in lipid-rich product was also retarded by MUM292 extract and resulted in reduced MDA production. The potential bioactive constituents of MUM292 extract were investigated using GC-MS and preliminary detection showed the presence of pyrazine, pyrrole, cyclic dipeptides, and phenolic compound in MUM292 extract. This work demonstrates that Streptomyces MUM292 can be a potential antioxidant resource for food and pharmaceutical industries.

  6. Malaysian Serials: Issues and Problems.

    Science.gov (United States)

    Bahri, Che Norma

    This paper analyzes the issues and problems while looking at the trends and developments of serials publishing in Malaysia. The first section provides background; topics addressed include the country and people of Malaysia, the history of serials publishing in Malaysia, categories and formats of serials publishing, academic publications,…

  7. A 1.5 Gb/s monolithically integrated optical receiver in the standard CMOS process

    Energy Technology Data Exchange (ETDEWEB)

    Xiao Xindong; Mao Luhong; Yu Changliang; Zhang Shilin; Xie Sheng, E-mail: xxd@tju.edu.c [School of Electronic Information Engineering, Tianjin University, Tianjin 300072 (China)

    2009-12-15

    A monolithically integrated optical receiver, including the photodetector, has been realized in Chartered 0.35 {mu}m EEPROM CMOS technology for 850 nm optical communication. The optical receiver consists of a differential photodetector, a differential transimpedance amplifier, three limiting amplifiers and an output circuit. The experiment results show that the receiver achieves an 875 MHz 3 dB bandwidth, and a data rate of 1.5 Gb/s is achieved at a bit-error-rate of 10{sup -9}. The chip dissipates 60 mW under a single 3.3 V supply. (semiconductor integrated circuits)

  8. THEORY OF MUM FOR METAL SPHERICAL ROTOR WITH CONTACTLESS SUSPENSION

    Institute of Scientific and Technical Information of China (English)

    He Xiaoxia; Gao Zhongyu; Wang Yongliang

    2004-01-01

    Based on the motion equations of an unbalanced spherical rotor with contactless suspension,three methods of MUM (mass unbalance measurement) are put forward to measure the total mass unbalance,radical mass unbalance and radical mass unbalance of the rotor.Total mass unbalance is obtained when the unbalanced rotor plays as a simple pendulum in static situation.The pendulant period and pendulant midpoint indicate magnitude and direction of total mass unbalance of the rotor respectively.Analysis of the motion equations by using the averaging method yields that the rotor will do a special side oscillation when an auxiliary system makes the rotor spin about its pole axis which is orientating toward the local vertical.The radical mass unbalance can be obtained by building a proper displacement sensor to sense the amplitude of the side oscillation.Necessary analysis of the motion equations also shows that when the rotor spins at a small angular velocity and the rotary axis is perpendicular to the vertical,the pole axis of the rotor will precess slowly about the vertical by virtue of the axial mass unbalance.The axial mass unbalance can be estimated from the time history of the spin vector of the rotor.Finally,measurement precision of the three methods is compared and how the external torque affects the measurement precision for the three methods are examined.

  9. Delaware's first serial killer.

    Science.gov (United States)

    Inguito, G B; Sekula-Perlman, A; Lynch, M J; Callery, R T

    2000-11-01

    The violent murder of Shirley Ellis on November 29, 1987, marked the beginning of the strange and terrible tale of Steven Bryan Pennell's reign as the state of Delaware's first convicted serial killer. Three more bodies followed the first victim, and all had been brutally beaten and sadistically tortured. The body of a fifth woman has never been found. State and county police collaborated with the FBI to identify and hunt down their suspect, forming a task force of over 100 officers and spending about one million dollars. Through their knowledge and experience with other serial killers, the FBI was able to make an amazingly accurate psychological profile of Delaware's serial killer. After months of around-the-clock surveillance, Steven Pennell was arrested on November 29, 1988, one year to the day after the first victim was found. Pennell was found guilty in the deaths of the first two victims on November 29, 1989, and plead no contest to the murder of two others on October 30, 1991. Still maintaining his innocence, he asked for the death penalty so that he could spare his family further agony. Steven Pennell was executed by lethal injection on March 15, 1992.

  10. Large area CMOS image sensors

    International Nuclear Information System (INIS)

    Turchetta, R; Guerrini, N; Sedgwick, I

    2011-01-01

    CMOS image sensors, also known as CMOS Active Pixel Sensors (APS) or Monolithic Active Pixel Sensors (MAPS), are today the dominant imaging devices. They are omnipresent in our daily life, as image sensors in cellular phones, web cams, digital cameras, ... In these applications, the pixels can be very small, in the micron range, and the sensors themselves tend to be limited in size. However, many scientific applications, like particle or X-ray detection, require large format, often with large pixels, as well as other specific performance, like low noise, radiation hardness or very fast readout. The sensors are also required to be sensitive to a broad spectrum of radiation: photons from the silicon cut-off in the IR down to UV and X- and gamma-rays through the visible spectrum as well as charged particles. This requirement calls for modifications to the substrate to be introduced to provide optimized sensitivity. This paper will review existing CMOS image sensors, whose size can be as large as a single CMOS wafer, and analyse the technical requirements and specific challenges of large format CMOS image sensors.

  11. Electromagnetic design methods in systems-on-chip: integrated filters for wireless CMOS RFICs

    Energy Technology Data Exchange (ETDEWEB)

    Contopanagos, Harry [Institute for Microelectronics, NCSR ' Demokritos' , PO Box 60228, GR-153 10 Aghia Paraskevi, Athens (Greece)

    2005-01-01

    We present general methods for designing on-chip CMOS passives and utilizing these integrated elements to design on-chip CMOS filters for wireless communications. These methods rely on full-wave electromagnetic numerical calculations that capture all the physics of the underlying foundry technologies. This is especially crucial for deep sub-micron CMOS technologies as it is important to capture the physical effects of finite (and mediocre) Q-factors limited by material losses and constraints on expensive die area, low self-resonance frequencies and dual parasitics that are particularly prevalent in deep sub-micron CMOS processes (65 nm-0.18 {mu}m. We use these integrated elements in an ideal synthesis of a Bluetooth/WLAN pass-band filter in single-ended or differential architectures, and show the significant deviations of the on-chip filter response from the ideal one. We identify which elements in the filter circuit need to maximize their Q-factors and which Q-factors do not affect the filter performance. This saves die area, and predicts the FET parameters (especially transconductances) and negative-resistance FET topologies that have to be integrated in the filter to restore its performance. (invited paper)

  12. Absorbed dose by a CMOS in radiotherapy

    International Nuclear Information System (INIS)

    Borja H, C. G.; Valero L, C. Y.; Guzman G, K. A.; Banuelos F, A.; Hernandez D, V. M.; Vega C, H. R.; Paredes G, L. C.

    2011-10-01

    Absorbed dose by a complementary metal oxide semiconductor (CMOS) circuit as part of a pacemaker, has been estimated using Monte Carlo calculations. For a cancer patient who is a pacemaker carrier, scattered radiation could damage pacemaker CMOS circuits affecting patient's health. Absorbed dose in CMOS circuit due to scattered photons is too small and therefore is not the cause of failures in pacemakers, but neutron calculations shown an absorbed dose that could cause damage in CMOS due to neutron-hydrogen interactions. (Author)

  13. 21 CFR 516.31 - Scope of MUMS-drug exclusive marketing rights.

    Science.gov (United States)

    2010-04-01

    ... 21 Food and Drugs 6 2010-04-01 2010-04-01 false Scope of MUMS-drug exclusive marketing rights. 516... SERVICES (CONTINUED) ANIMAL DRUGS, FEEDS, AND RELATED PRODUCTS NEW ANIMAL DRUGS FOR MINOR USE AND MINOR SPECIES Designation of a Minor Use or Minor Species New Animal Drug § 516.31 Scope of MUMS-drug exclusive...

  14. CMOS Integrated Carbon Nanotube Sensor

    International Nuclear Information System (INIS)

    Perez, M. S.; Lerner, B.; Boselli, A.; Lamagna, A.; Obregon, P. D. Pareja; Julian, P. M.; Mandolesi, P. S.; Buffa, F. A.

    2009-01-01

    Recently carbon nanotubes (CNTs) have been gaining their importance as sensors for gases, temperature and chemicals. Advances in fabrication processes simplify the formation of CNT sensor on silicon substrate. We have integrated single wall carbon nanotubes (SWCNTs) with complementary metal oxide semiconductor process (CMOS) to produce a chip sensor system. The sensor prototype was designed and fabricated using a 0.30 um CMOS process. The main advantage is that the device has a voltage amplifier so the electrical measure can be taken and amplified inside the sensor. When the conductance of the SWCNTs varies in response to media changes, this is observed as a variation in the output tension accordingly.

  15. CMOS MEMS Fabrication Technologies and Devices

    Directory of Open Access Journals (Sweden)

    Hongwei Qu

    2016-01-01

    Full Text Available This paper reviews CMOS (complementary metal-oxide-semiconductor MEMS (micro-electro-mechanical systems fabrication technologies and enabled micro devices of various sensors and actuators. The technologies are classified based on the sequence of the fabrication of CMOS circuitry and MEMS elements, while SOI (silicon-on-insulator CMOS MEMS are introduced separately. Introduction of associated devices follows the description of the respective CMOS MEMS technologies. Due to the vast array of CMOS MEMS devices, this review focuses only on the most typical MEMS sensors and actuators including pressure sensors, inertial sensors, frequency reference devices and actuators utilizing different physics effects and the fabrication processes introduced. Moreover, the incorporation of MEMS and CMOS is limited to monolithic integration, meaning wafer-bonding-based stacking and other integration approaches, despite their advantages, are excluded from the discussion. Both competitive industrial products and state-of-the-art research results on CMOS MEMS are covered.

  16. Analisis Pengaruh Lingkungan Kerja dan Pemberian Kompensasi terhadap Kinerja Karyawan CV Mum Indonesia

    Directory of Open Access Journals (Sweden)

    Jerry M. Logahan

    2012-05-01

    Full Text Available Mum CV is a company engaged in the sale of bread. To increase sales of bread (performance it needs to investigate the influence of work environment and compensation of employees. The method of analysis used in this study is descriptive, Pearson Regression, and Multiple Regression. The data were obtained from the employees performance by completing the questionnaires provided using Likert scale which was useful to determine the level of disagreement questions on the questionnaires. Results achieved in this study are the work environment has no significant influence on employees performance in CV Mum Indonesia, amounting to 0,068. Compensation has significant, no influence on employees performance in CV Mum Indonesia that is equal to 0,580 and there is a significant effect of 33.6%. Work environment and compensation have a significant impact on employees performance in CV Mum Indonesia. It is equal to 0,580 and there is a significant effect of 33.6%.

  17. Neutron absorbed dose in a pacemaker CMOS

    International Nuclear Information System (INIS)

    Borja H, C. G.; Guzman G, K. A.; Valero L, C.; Banuelos F, A.; Hernandez D, V. M.; Vega C, H. R.; Paredes G, L.

    2012-01-01

    The neutron spectrum and the absorbed dose in a Complementary Metal Oxide Semiconductor (CMOS), has been estimated using Monte Carlo methods. Eventually a person with a pacemaker becomes an oncology patient that must be treated in a linear accelerator. Pacemaker has integrated circuits as CMOS that are sensitive to intense and pulsed radiation fields. Above 7 MV therapeutic beam is contaminated with photoneutrons that could damage the CMOS. Here, the neutron spectrum and the absorbed dose in a CMOS cell was calculated, also the spectra were calculated in two point-like detectors in the room. Neutron spectrum in the CMOS cell shows a small peak between 0.1 to 1 MeV and a larger peak in the thermal region, joined by epithermal neutrons, same features were observed in the point-like detectors. The absorbed dose in the CMOS was 1.522 x 10 -17 Gy per neutron emitted by the source. (Author)

  18. Neutron absorbed dose in a pacemaker CMOS

    Energy Technology Data Exchange (ETDEWEB)

    Borja H, C. G.; Guzman G, K. A.; Valero L, C.; Banuelos F, A.; Hernandez D, V. M.; Vega C, H. R. [Universidad Autonoma de Zacatecas, Unidad Academica de Estudios Nucleares, Cipres No. 10, Fracc. La Penuela, 98068 Zacatecas (Mexico); Paredes G, L., E-mail: fermineutron@yahoo.com [ININ, Carretera Mexico-Toluca s/n, 52750 Ocoyoacac, Estado de Mexico (Mexico)

    2012-06-15

    The neutron spectrum and the absorbed dose in a Complementary Metal Oxide Semiconductor (CMOS), has been estimated using Monte Carlo methods. Eventually a person with a pacemaker becomes an oncology patient that must be treated in a linear accelerator. Pacemaker has integrated circuits as CMOS that are sensitive to intense and pulsed radiation fields. Above 7 MV therapeutic beam is contaminated with photoneutrons that could damage the CMOS. Here, the neutron spectrum and the absorbed dose in a CMOS cell was calculated, also the spectra were calculated in two point-like detectors in the room. Neutron spectrum in the CMOS cell shows a small peak between 0.1 to 1 MeV and a larger peak in the thermal region, joined by epithermal neutrons, same features were observed in the point-like detectors. The absorbed dose in the CMOS was 1.522 x 10{sup -17} Gy per neutron emitted by the source. (Author)

  19. CMOS test and evaluation a physical perspective

    CERN Document Server

    Bhushan, Manjul

    2015-01-01

    This book extends test structure applications described in Microelectronic Test Struc­tures for CMOS Technology (Springer 2011) to digital CMOS product chips. Intended for engineering students and professionals, this book provides a single comprehensive source for evaluating CMOS technology and product test data from a basic knowledge of the physical behavior of the constituent components. Elementary circuits that exhibit key properties of complex CMOS chips are simulated and analyzed, and an integrated view of design, test and characterization is developed. Appropriately designed circuit monitors embedded in the CMOS chip serve to correlate CMOS technology models and circuit design tools to the hardware and also aid in test debug. Impact of silicon process variability, reliability, and power and performance sensitivities to a range of product application conditions are described. Circuit simulations exemplify the methodologies presented, and problems are included at the end of the chapters.

  20. Analog filters in nanometer CMOS

    CERN Document Server

    Uhrmann, Heimo; Zimmermann, Horst

    2014-01-01

    Starting from the basics of analog filters and the poor transistor characteristics in nanometer CMOS 10 high-performance analog filters developed by the authors in 120 nm and 65 nm CMOS are described extensively. Among them are gm-C filters, current-mode filters, and active filters for system-on-chip realization for Bluetooth, WCDMA, UWB, DVB-H, and LTE applications. For the active filters several operational amplifier designs are described. The book, furthermore, contains a review of the newest state of research on low-voltage low-power analog filters. To cover the topic of the book comprehensively, linearization issues and measurement methods for the characterization of advanced analog filters are introduced in addition. Numerous elaborate illustrations promote an easy comprehension. This book will be of value to engineers and researchers in industry as well as scientists and Ph.D students at universities. The book is also recommendable to graduate students specializing on nanoelectronics, microelectronics ...

  1. CMOS Analog IC Design: Fundamentals

    OpenAIRE

    Bruun, Erik

    2018-01-01

    This book is intended for use as the main textbook for an introductory course in CMOS analog integrated circuit design. It is aimed at electronics engineering students who have followed basic courses in mathematics, physics, circuit theory, electronics and signal processing. It takes the students directly from a basic level to a level where they can start working on simple analog IC design projects or continue their studies using more advanced textbooks in the field. A distinct feature of thi...

  2. Investigation of antioxidative and anticancer potentials of Streptomyces sp. MUM256 isolated from Malaysia mangrove soil

    Directory of Open Access Journals (Sweden)

    Tan Loh eTeng Hern

    2015-11-01

    Full Text Available A Streptomyces strain, MUM256 was isolated from Tanjung Lumpur mangrove soil in Malaysia. Characterization of the strain showed that it has properties consistent with those of the members of the genus Streptomyces. In order to explore the potential bioactivities, extract of the fermented broth culture of MUM256 was prepared with organic solvent extraction method. DPPH and SOD activity were utilized to examine the antioxidant capacity and the results have revealed the potency of MUM256 in superoxide anion scavenging activity in dose-dependent manner. The cytotoxicity of MUM256 extract was determined using cell viability assay against 8 different panels of human cancer cell lines. Among all the tested cancer cells, HCT116 was the most sensitive toward the extract treatment. At the highest concentration of tested extract, the result showed 2.3, 2.0 and 1.8 folds higher inhibitory effect against HCT116, HT29 and Caco-2 respectively when compared to normal cell line. This result has demonstrated that MUM256 extract was selectively cytotoxic towards colon cancer cell lines. In order to determine the constituents responsible for its bioactivities, the extract was then subjected to chemical analysis using GC-MS. The analysis resulted in the identification of chemical constituents including phenolic and pyrrolopyrazine compounds which may responsible for antioxidant and anticancer activities observed. Based on the findings of this study, the presence of bioactive constituents in MUM256 extract could be a potential source for the development of antioxidative and chemopreventive agents.

  3. Improvement to the signaling interface for CMOS pixel sensors

    Energy Technology Data Exchange (ETDEWEB)

    Shi, Zhan, E-mail: sz1134@163.com [Dalian University of Technology, No.2 Linggong Road, 116024 Dalian (China); Tang, Zhenan, E-mail: tangza@dlut.edu.cn [Dalian University of Technology, No.2 Linggong Road, 116024 Dalian (China); Feng, Chong [Dalian University of Technology, No.2 Linggong Road, 116024 Dalian (China); Dalian Minzu University, No.18 Liaohe West Road, 116600 Dalian (China); Cai, Hong [Dalian University of Technology, No.2 Linggong Road, 116024 Dalian (China)

    2016-10-01

    The development of the readout speed of CMOS pixel sensors (CPS) is motivated by the demanding requirements of future high energy physics (HEP) experiments. As the interface between CPS and the data acquisition (DAQ) system, which inputs clock from the DAQ system and outputs data from CPS, the signaling interface should also be improved in terms of data rates. Meanwhile, the power consumption of the signaling interface should be maintained as low as possible. Consequently, a reduced swing differential signaling (RSDS) driver was adopted instead of a low-voltage differential signaling (LVDS) driver to transmit data from CPS to the DAQ system. In order to increase the capability of data rates, a serial source termination technique was employed. A LVDS/RSDS receiver was employed for transmitting clock from the DAQ system to CPS. A new method of generating hysteresis and a special current comparator were used to achieve a higher speed with lower power consumption. The signaling interface was designed and submitted for fabrication in a 0.18 µm CMOS image sensor (CIS) process. Measurement results indicate that the RSDS driver and the LVDS receiver can operate correctly at a data rate of 2 Gb/s with a power consumption of 19.1 mW.

  4. High-voltage CMOS detectors

    International Nuclear Information System (INIS)

    Ehrler, F.; Blanco, R.; Leys, R.; Perić, I.

    2016-01-01

    High-voltage CMOS (HVCMOS) pixel sensors are depleted active pixel sensors implemented in standard commercial CMOS processes. The sensor element is the n-well/p-substrate diode. The sensor electronics are entirely placed inside the n-well which is at the same time used as the charge collection electrode. High voltage is used to deplete the part of the substrate around the n-well. HVCMOS sensors allow implementation of complex in-pixel electronics. This, together with fast signal collection, allows a good time resolution, which is required for particle tracking in high energy physics. HVCMOS sensors will be used in Mu3e experiment at PSI and are considered as an option for both ATLAS and CLIC (CERN). Radiation tolerance and time walk compensation have been tested and results are presented. - Highlights: • High-voltage CMOS sensors will be used in Mu3e experiment at PSI (Switzerland). • HVCMOS sensors are considered as an option for ATLAS (LHC/CERN) and CLIC (CERN). • Efficiency of more than 95% (99%) has been measured with (un-)irradiated chips. • The time resolution measured in the beam tests is nearly 100 ns. • We plan to improve time resolution and efficiency by using high-resistive substrate.

  5. High-voltage CMOS detectors

    Energy Technology Data Exchange (ETDEWEB)

    Ehrler, F., E-mail: felix.ehrler@student.kit.edu; Blanco, R.; Leys, R.; Perić, I.

    2016-07-11

    High-voltage CMOS (HVCMOS) pixel sensors are depleted active pixel sensors implemented in standard commercial CMOS processes. The sensor element is the n-well/p-substrate diode. The sensor electronics are entirely placed inside the n-well which is at the same time used as the charge collection electrode. High voltage is used to deplete the part of the substrate around the n-well. HVCMOS sensors allow implementation of complex in-pixel electronics. This, together with fast signal collection, allows a good time resolution, which is required for particle tracking in high energy physics. HVCMOS sensors will be used in Mu3e experiment at PSI and are considered as an option for both ATLAS and CLIC (CERN). Radiation tolerance and time walk compensation have been tested and results are presented. - Highlights: • High-voltage CMOS sensors will be used in Mu3e experiment at PSI (Switzerland). • HVCMOS sensors are considered as an option for ATLAS (LHC/CERN) and CLIC (CERN). • Efficiency of more than 95% (99%) has been measured with (un-)irradiated chips. • The time resolution measured in the beam tests is nearly 100 ns. • We plan to improve time resolution and efficiency by using high-resistive substrate.

  6. CMOS optimization for radiation hardness

    International Nuclear Information System (INIS)

    Derbenwick, G.F.; Fossum, J.G.

    1975-01-01

    Several approaches to the attainment of radiation-hardened MOS circuits have been investigated in the last few years. These have included implanting the SiO 2 gate insulator with aluminum, using chrome-aluminum layered gate metallization, using Al 2 O 3 as the gate insulator, and optimizing the MOS fabrication process. Earlier process optimization studies were restricted primarily to p-channel devices operating with negative gate biases. Since knowledge of the hardness dependence upon processing and design parameters is essential in producing hardened integrated circuits, a comprehensive investigation of the effects of both process and design optimization on radiation-hardened CMOS integrated circuits was undertaken. The goals are to define and establish a radiation-hardened processing sequence for CMOS integrated circuits and to formulate quantitative relationships between process and design parameters and the radiation hardness. Using these equations, the basic CMOS design can then be optimized for radiation hardness and some understanding of the basic physics responsible for the radiation damage can be gained. Results are presented

  7. Serial Network Flow Monitor

    Science.gov (United States)

    Robinson, Julie A.; Tate-Brown, Judy M.

    2009-01-01

    Using a commercial software CD and minimal up-mass, SNFM monitors the Payload local area network (LAN) to analyze and troubleshoot LAN data traffic. Validating LAN traffic models may allow for faster and more reliable computer networks to sustain systems and science on future space missions. Research Summary: This experiment studies the function of the computer network onboard the ISS. On-orbit packet statistics are captured and used to validate ground based medium rate data link models and enhance the way that the local area network (LAN) is monitored. This information will allow monitoring and improvement in the data transfer capabilities of on-orbit computer networks. The Serial Network Flow Monitor (SNFM) experiment attempts to characterize the network equivalent of traffic jams on board ISS. The SNFM team is able to specifically target historical problem areas including the SAMS (Space Acceleration Measurement System) communication issues, data transmissions from the ISS to the ground teams, and multiple users on the network at the same time. By looking at how various users interact with each other on the network, conflicts can be identified and work can begin on solutions. SNFM is comprised of a commercial off the shelf software package that monitors packet traffic through the payload Ethernet LANs (local area networks) on board ISS.

  8. Absorbed dose by a CMOS in radiotherapy

    Energy Technology Data Exchange (ETDEWEB)

    Borja H, C. G.; Valero L, C. Y.; Guzman G, K. A.; Banuelos F, A.; Hernandez D, V. M.; Vega C, H. R. [Universidad Autonoma de Zacatecas, Unidad Academica de Estudios Nucleares, Calle Cipres No. 10, Fracc. La Penuela, 98068 Zacatecas (Mexico); Paredes G, L. C., E-mail: candy_borja@hotmail.com [ININ, Carretera Mexico-Toluca s/n, 52750 Ocoyoacac, Estado de Mexico (Mexico)

    2011-10-15

    Absorbed dose by a complementary metal oxide semiconductor (CMOS) circuit as part of a pacemaker, has been estimated using Monte Carlo calculations. For a cancer patient who is a pacemaker carrier, scattered radiation could damage pacemaker CMOS circuits affecting patient's health. Absorbed dose in CMOS circuit due to scattered photons is too small and therefore is not the cause of failures in pacemakers, but neutron calculations shown an absorbed dose that could cause damage in CMOS due to neutron-hydrogen interactions. (Author)

  9. Microelectronic test structures for CMOS technology

    CERN Document Server

    Ketchen, Mark B

    2011-01-01

    Microelectronic Test Structures for CMOS Technology and Products addresses the basic concepts of the design of test structures for incorporation within test-vehicles, scribe-lines, and CMOS products. The role of test structures in the development and monitoring of CMOS technologies and products has become ever more important with the increased cost and complexity of development and manufacturing. In this timely volume, IBM scientists Manjul Bhushan and Mark Ketchen emphasize high speed characterization techniques for digital CMOS circuit applications and bridging between circuit performance an

  10. A high speed serializer ASIC for ATLAS Liquid Argon calorimeter upgrade

    CERN Document Server

    Liu, T; The ATLAS collaboration

    2014-01-01

    We have been developing a serializer application-specific integrated circuit (ASIC) based on a commercial 0.25-μm silicon-on-sapphire (SOS) CMOS technology for the ATLAS liquid argon calorimeter front-end electronics upgrade. The first prototype, a 5 Gbps 16:1 serializer has been designed, fabricated, and tested in lab environment and in 200 MeV proton beam. The test results indicate that the first prototype meets the design goals. The second prototype, a double-lane, 8 Gbps per lane serializer is under development. The post layout simulation indicates that 8 Gbps is achievable. In this paper we present the design and the test results of the first prototype and the design and status of the second prototype.

  11. Update on the high speed serializer ASIC development for ATLAS Liquid Argon calorimeter upgrade

    CERN Document Server

    Liu, T; The ATLAS collaboration

    2011-01-01

    We have been developing a serializer application-specific integrated circuit (ASIC) based on a commercial 0.25-μm silicon-on-sapphire (SOS) CMOS technology for the ATLAS liquid argon calorimeter front-end electronics upgrade. The first prototype, a 5 Gbps 16:1 serializer has been designed, fabricated, and tested in lab environment and in a 200 MeV proton beam. The test results indicate that the first prototype meets the design goals. The second prototype, a double-lane, 8 Gbps per lane serializer is under development. The post-layout simulation indicates that 8 Gbps is achievable. In this paper we present the design and the test results of the first prototype and the design and status of the second prototype.

  12. A Serializer ASIC for High Speed Data Transmission in Cryogenic and HiRel Environment

    CERN Document Server

    Liu, T; The ATLAS collaboration

    2010-01-01

    A high speed 16:1 serializer ASIC has been developed using a commercial 0.25 μm silicon-on-sapphire CMOS technology. At room temperature the ASIC operates from 4.0 to 5.7 Gbps with power consumption of 463 mW. The total jitter is 62 ps at the bit error rate of 10-12 at 5 Gbps. A 200-MeV proton beam test indicates that the ASIC is suitable for high energy physics applications. A liquid nitrogen temperature test indicates that the ASIC may be used at cryogenic temperature applications. The reliability of the serializer at liquid nitrogen temperature is to be studied. A 6-lane serializer array with 10 Gbps/lane with redundancy capability is under development.

  13. A Low-Power CMOS Front-End for Photoplethysmographic Signal Acquisition With Robust DC Photocurrent Rejection.

    Science.gov (United States)

    Wong, A K Y; Kong-Pang Pun; Yuan-Ting Zhang; Ka Nang Leung

    2008-12-01

    A micro-power CMOS front-end, consisting of a transimpedance amplifier (TIA) and an ultralow cutoff frequency lowpass filter for the acquisition of photoplethysmographic signal (PPG) is presented. Robust DC photocurrent rejection for the pulsed signal source is achieved through a sample-and-hold stage in the feed-forward signal path and an error amplifier in the feedback path. Ultra-low cutoff frequency of the filter is achieved with a proposed technique that incorporates a pair of current-steering transistors that increases the effective filter capacitance. The design was realized in a 0.35-mum CMOS technology. It consumes 600 muW at 2.5 V, rejects DC photocurrent ranged from 100 nA to 53.6 muA, and achieves lower-band and upper-band - 3-dB cutoff frequencies of 0.46 and 2.8 Hz, respectively.

  14. CMOS Imaging of Temperature Effects on Pin-Printed Xerogel Sensor Microarrays.

    Science.gov (United States)

    Lei Yao; Ka Yi Yung; Chodavarapu, Vamsy P; Bright, Frank V

    2011-04-01

    In this paper, we study the effect of temperature on the operation and performance of a xerogel-based sensor microarrays coupled to a complementary metal-oxide semiconductor (CMOS) imager integrated circuit (IC) that images the photoluminescence response from the sensor microarray. The CMOS imager uses a 32 × 32 (1024 elements) array of active pixel sensors and each pixel includes a high-gain phototransistor to convert the detected optical signals into electrical currents. A correlated double sampling circuit and pixel address/digital control/signal integration circuit are also implemented on-chip. The CMOS imager data are read out as a serial coded signal. The sensor system uses a light-emitting diode to excite target analyte responsive organometallic luminophores doped within discrete xerogel-based sensor elements. As a proto type, we developed a 3 × 3 (9 elements) array of oxygen (O2) sensors. Each group of three sensor elements in the array (arranged in a column) is designed to provide a different and specific sensitivity to the target gaseous O2 concentration. This property of multiple sensitivities is achieved by using a mix of two O2 sensitive luminophores in each pin-printed xerogel sensor element. The CMOS imager is designed to be low noise and consumes a static power of 320.4 μW and an average dynamic power of 624.6 μW when operating at 100-Hz sampling frequency and 1.8-V dc power supply.

  15. Streptomyces sp. MUM212 as a Source of Antioxidants with Radical Scavenging and Metal Chelating Properties

    Directory of Open Access Journals (Sweden)

    Loh Teng-Hern Tan

    2017-05-01

    Full Text Available Reactive oxygen species and other radicals potentially cause oxidative damage to proteins, lipids, and DNA which may ultimately lead to various complications including mutations, carcinogenesis, neurodegeneration, cardiovascular disease, aging, and inflammatory disease. Recent reports demonstrate that Streptomyces bacteria produce metabolites with potent antioxidant activity that may be developed into therapeutic drugs to combat oxidative stress. This study shows that Streptomyces sp. MUM212 which was isolated from mangrove soil in Kuala Selangor, Malaysia, could be a potential source of antioxidants. Strain MUM212 was characterized and determined as belonging to the genus Streptomyces using 16S rRNA gene phylogenetic analysis. The MUM212 extract demonstrated significant antioxidant activity through DPPH, ABTS and superoxide radical scavenging assays and also metal-chelating activity of 22.03 ± 3.01%, 61.52 ± 3.13%, 37.47 ± 1.79%, and 41.98 ± 0.73% at 4 mg/mL, respectively. Moreover, MUM212 extract was demonstrated to inhibit lipid peroxidation up to 16.72 ± 2.64% at 4 mg/mL and restore survival of Vero cells from H2O2-induced oxidative damages. The antioxidant activities from the MUM212 extract correlated well with its total phenolic contents; and this in turn was in keeping with the gas chromatography–mass spectrometry analysis which revealed the presence of phenolic compounds that could be responsible for the antioxidant properties of the extract. Other chemical constituents detected included hydrocarbons, alcohols and cyclic dipeptides which may have contributed to the overall antioxidant capacity of MUM212 extract. As a whole, strain MUM212 seems to have potential as a promising source of novel molecules for future development of antioxidative therapeutic agents against oxidative stress-related diseases.

  16. Photoresponse analysis of the CMOS photodiodes for CMOS x-ray image sensor

    International Nuclear Information System (INIS)

    Kim, Young Soo; Ha, Jang Ho; Kim, Han Soo; Yeo, Sun Mok

    2012-01-01

    Although in the short term CMOS active pixel sensors (APSs) cannot compete with the conventionally used charge coupled devices (CCDs) for high quality scientific imaging, recent development in CMOS APSs indicate that CMOS performance level of CCDs in several domains. CMOS APSs possess thereby a number of advantages such as simpler driving requirements and low power operation. CMOS image sensors can be processed in standard CMOS technologies and the potential of on-chip integration of analog and digital circuitry makes them more suitable for several vision systems where system cost is of importance. Moreover, CMOS imagers can directly benefit from on-going technological progress in the field of CMOS technologies. Due to these advantages, the CMOS APSs are currently being investigated actively for various applications such as star tracker, navigation camera and X-ray imaging etc. In most detection systems, it is thought that the sensor is most important, since this decides the signal and noise level. So, in CMOS APSs, the pixel is very important compared to other functional blocks. In order to predict the performance of such image sensor, a detailed understanding of the photocurrent generation in the photodiodes that comprise the CMOS APS is required. In this work, we developed the analytical model that can calculate the photocurrent generated in CMOS photodiode comprising CMOS APSs. The photocurrent calculations and photo response simulations with respect to the wavelength of the incident photon were performed using this model for four types of photodiodes that can be fabricated in standard CMOS process. n + /p - sub and n + /p - epi/p - sub photodiode show better performance compared to n - well/p - sub and n - well/p - epi/p - sub due to the wider depletion width. Comparing n + /p - sub and n + /p - epi/p - sub photodiode, n + /p - sub has higher photo-responsivity in longer wavelength because of the higher electron diffusion current

  17. JPL CMOS Active Pixel Sensor Technology

    Science.gov (United States)

    Fossum, E. R.

    1995-01-01

    This paper will present the JPL-developed complementary metal- oxide-semiconductor (CMOS) active pixel sensor (APS) technology. The CMOS APS has achieved performance comparable to charge coupled devices, yet features ultra low power operation, random access readout, on-chip timing and control, and on-chip analog to digital conversion. Previously published open literature will be reviewed.

  18. Edge-TCT measurements on irradiated HV CMOS sensors

    CERN Document Server

    Weisser, Constantin

    2014-01-01

    Passive $100 \\times 100 \\,\\mu$m test diodes in an unirradiated and an irradiated HV2FEI4v3 HV-CMOS silicon sensor were analysed using the edge TCT technique. To integrate the sensor into the setup a PCB was designed to extract the signals, a cooling mechanism was constructed and the system housed in a shielding box. The observed signal had fast and slow contributions, that were interpreted as drift and diffusion. The former peaked in a region, that was interpreted as the depletion region, while the latter peaked further in the bulk material. Raising the bias voltage increased the depth of the former region, while pushing the latter region further into the bulk. The irradiated sample lost signal strength mainly in its slow part compared to the unirradiated sample, while its quick signal remained largely unaffected. As only the signal interpreted as drift is fast enough to be useful in LHC operation the investigated sensors could be considered radiation hard for this purpose. This gives further promise to ...

  19. Hybrid CMOS/Molecular Integrated Circuits

    Science.gov (United States)

    Stan, M. R.; Rose, G. S.; Ziegler, M. M.

    CMOS silicon technologies are likely to run out of steam in the next 10-15 years despite revolutionary advances in the past few decades. Molecular and other nanoscale technologies show significant promise but it is unlikely that they will completely replace CMOS, at least in the near term. This chapter explores opportunities for using CMOS and nanotechnology to enhance and complement each other in hybrid circuits. As an example of such a hybrid CMOS/nano system, a nanoscale programmable logic array (PLA) based on majority logic is described along with its supplemental CMOS circuitry. It is believed that such systems will be able to sustain the historical advances in the semiconductor industry while addressing manufacturability, yield, power, cost, and performance challenges.

  20. Optoelectronic circuits in nanometer CMOS technology

    CERN Document Server

    Atef, Mohamed

    2016-01-01

    This book describes the newest implementations of integrated photodiodes fabricated in nanometer standard CMOS technologies. It also includes the required fundamentals, the state-of-the-art, and the design of high-performance laser drivers, transimpedance amplifiers, equalizers, and limiting amplifiers fabricated in nanometer CMOS technologies. This book shows the newest results for the performance of integrated optical receivers, laser drivers, modulator drivers and optical sensors in nanometer standard CMOS technologies. Nanometer CMOS technologies rapidly advanced, enabling the implementation of integrated optical receivers for high data rates of several Giga-bits per second and of high-pixel count optical imagers and sensors. In particular, low cost silicon CMOS optoelectronic integrated circuits became very attractive because they can be extensively applied to short-distance optical communications, such as local area network, chip-to-chip and board-to-board interconnects as well as to imaging and medical...

  1. CMOS foveal image sensor chip

    Science.gov (United States)

    Bandera, Cesar (Inventor); Scott, Peter (Inventor); Sridhar, Ramalingam (Inventor); Xia, Shu (Inventor)

    2002-01-01

    A foveal image sensor integrated circuit comprising a plurality of CMOS active pixel sensors arranged both within and about a central fovea region of the chip. The pixels in the central fovea region have a smaller size than the pixels arranged in peripheral rings about the central region. A new photocharge normalization scheme and associated circuitry normalizes the output signals from the different size pixels in the array. The pixels are assembled into a multi-resolution rectilinear foveal image sensor chip using a novel access scheme to reduce the number of analog RAM cells needed. Localized spatial resolution declines monotonically with offset from the imager's optical axis, analogous to biological foveal vision.

  2. Assessing Students' Understanding of Macroevolution: Concerns regarding the validity of the MUM

    Science.gov (United States)

    Novick, Laura R.; Catley, Kefyn M.

    2012-11-01

    In a recent article, Nadelson and Southerland (2010. Development and preliminary evaluation of the Measure of Understanding of Macroevolution: Introducing the MUM. The Journal of Experimental Education, 78, 151-190) reported on their development of a multiple-choice concept inventory intended to assess college students' understanding of macroevolutionary concepts, the Measure of Understanding Macroevolution (MUM). Given that the only existing evolution inventories assess understanding of natural selection, a microevolutionary concept, a valid assessment of students' understanding of macroevolution would be a welcome and necessary addition to the field of science education. Although the conceptual framework underlying Nadelson and Southerland's test is promising, we believe the test has serious shortcomings with respect to validity evidence for the construct being tested. We argue and provide evidence that these problems are serious enough that the MUM should not be used in its current form to measure students' understanding of macroevolution.

  3. Union Listing via OCLC's Serials Control Subsystem.

    Science.gov (United States)

    O'Malley, Terrence J.

    1984-01-01

    Describes library use of Conversion of Serials Project's (CONSER) online national machine-readable database for serials to create online union lists of serials via OCLC's Serial Control Subsystem. Problems in selection of appropriate, accurate, and authenticated records and prospects for the future are discussed. Twenty sources and sample records…

  4. A CMOS silicon spin qubit

    Science.gov (United States)

    Maurand, R.; Jehl, X.; Kotekar-Patil, D.; Corna, A.; Bohuslavskyi, H.; Laviéville, R.; Hutin, L.; Barraud, S.; Vinet, M.; Sanquer, M.; de Franceschi, S.

    2016-11-01

    Silicon, the main constituent of microprocessor chips, is emerging as a promising material for the realization of future quantum processors. Leveraging its well-established complementary metal-oxide-semiconductor (CMOS) technology would be a clear asset to the development of scalable quantum computing architectures and to their co-integration with classical control hardware. Here we report a silicon quantum bit (qubit) device made with an industry-standard fabrication process. The device consists of a two-gate, p-type transistor with an undoped channel. At low temperature, the first gate defines a quantum dot encoding a hole spin qubit, the second one a quantum dot used for the qubit read-out. All electrical, two-axis control of the spin qubit is achieved by applying a phase-tunable microwave modulation to the first gate. The demonstrated qubit functionality in a basic transistor-like device constitutes a promising step towards the elaboration of scalable spin qubit geometries in a readily exploitable CMOS platform.

  5. A low-power CMOS readout IC design for bolometer applications

    Science.gov (United States)

    Galioglu, Arman; Abbasi, Shahbaz; Shafique, Atia; Ceylan, Ömer; Yazici, Melik; Kaynak, Mehmet; Durmaz, Emre C.; Arsoy, Elif Gul; Gurbuz, Yasar

    2017-02-01

    A prototype of a readout IC (ROIC) designed for use in high temperature coefficient of resistance (TCR) SiGe microbolometers is presented. The prototype ROIC architecture implemented is based on a bridge with active and blind bolometer pixels with a capacitive transimpedance amplifier (CTIA) input stage and column parallel integration with serial readout. The ROIC is designed for use in high (>= 4 %/K) TCR and high detector resistance Si/SiGe microbolometers with 17x17 μm2 pixel sizes in development. The prototype has been designed and fabricated in 0.25- μm SiGe:C BiCMOS process.

  6. Carbon Nanotube Integration with a CMOS Process

    Science.gov (United States)

    Perez, Maximiliano S.; Lerner, Betiana; Resasco, Daniel E.; Pareja Obregon, Pablo D.; Julian, Pedro M.; Mandolesi, Pablo S.; Buffa, Fabian A.; Boselli, Alfredo; Lamagna, Alberto

    2010-01-01

    This work shows the integration of a sensor based on carbon nanotubes using CMOS technology. A chip sensor (CS) was designed and manufactured using a 0.30 μm CMOS process, leaving a free window on the passivation layer that allowed the deposition of SWCNTs over the electrodes. We successfully investigated with the CS the effect of humidity and temperature on the electrical transport properties of SWCNTs. The possibility of a large scale integration of SWCNTs with CMOS process opens a new route in the design of more efficient, low cost sensors with high reproducibility in their manufacture. PMID:22319330

  7. CMOS sensors for atmospheric imaging

    Science.gov (United States)

    Pratlong, Jérôme; Burt, David; Jerram, Paul; Mayer, Frédéric; Walker, Andrew; Simpson, Robert; Johnson, Steven; Hubbard, Wendy

    2017-09-01

    Recent European atmospheric imaging missions have seen a move towards the use of CMOS sensors for the visible and NIR parts of the spectrum. These applications have particular challenges that are completely different to those that have driven the development of commercial sensors for applications such as cell-phone or SLR cameras. This paper will cover the design and performance of general-purpose image sensors that are to be used in the MTG (Meteosat Third Generation) and MetImage satellites and the technology challenges that they have presented. We will discuss how CMOS imagers have been designed with 4T pixel sizes of up to 250 μm square achieving good charge transfer efficiency, or low lag, with signal levels up to 2M electrons and with high line rates. In both devices a low noise analogue read-out chain is used with correlated double sampling to suppress the readout noise and give a maximum dynamic range that is significantly larger than in standard commercial devices. Radiation hardness is a particular challenge for CMOS detectors and both of these sensors have been designed to be fully radiation hard with high latch-up and single-event-upset tolerances, which is now silicon proven on MTG. We will also cover the impact of ionising radiation on these devices. Because with such large pixels the photodiodes have a large open area, front illumination technology is sufficient to meet the detection efficiency requirements but with thicker than standard epitaxial silicon to give improved IR response (note that this makes latch up protection even more important). However with narrow band illumination reflections from the front and back of the dielectric stack on the top of the sensor produce Fabry-Perot étalon effects, which have been minimised with process modifications. We will also cover the addition of precision narrow band filters inside the MTG package to provide a complete imaging subsystem. Control of reflected light is also critical in obtaining the

  8. Serial murder: An unusual stereotype.

    Science.gov (United States)

    Sane, Mandar R; Mugadlimath, Anand B; Farooqui, Jamebaseer M; Janagond, Anand B; Mishra, Pradeep K

    2017-12-01

    Serial murders attract attention from the media, mental health experts, academia, and the general public. We present a case of serial murders that took place in a limited area and which caused public anxiety and anguish in central India. All the victims were homeless beggars, who were bludgeoned to death (crush injury). Individual murders were initially investigated by different police stations; fortunately, since they sent all the bodies to a common autopsy centre, a forensic pathologist was able to link all the cases, the first person to do so. This emphasises the need for sharing information among police stations and autopsy centres.

  9. MUM ENHANCERS are important for seed coat mucilage production and mucilage secretory cell differentiation in Arabidopsis thaliana.

    Science.gov (United States)

    Arsovski, Andrej A; Villota, Maria M; Rowland, Owen; Subramaniam, Rajagopal; Western, Tamara L

    2009-01-01

    Pollination triggers not only embryo development but also the differentiation of the ovule integuments to form a specialized seed coat. The mucilage secretory cells of the Arabidopsis thaliana seed coat undergo a complex differentiation process in which cell growth is followed by the synthesis and secretion of pectinaceous mucilage. A number of genes have been identified affecting mucilage secretory cell differentiation, including MUCILAGE-MODIFIED4 (MUM4). mum4 mutants produce a reduced amount of mucilage and cloning of MUM4 revealed that it encodes a UDP-L-rhamnose synthase that is developmentally up-regulated to provide rhamnose for mucilage pectin synthesis. To identify additional genes acting in mucilage synthesis and secretion, a screen for enhancers of the mum4 phenotype was performed. Eight mum enhancers (men) have been identified, two of which result from defects in known mucilage secretory cell genes (MUM2 and MYB61). Our results show that, in a mum4 background, mutations in MEN1, MEN4, and MEN5 lead to further reductions in mucilage compared to mum4 single mutants, suggesting that they are involved in mucilage synthesis or secretion. Conversely, mutations in MEN2 and MEN6 appear to affect mucilage release rather than quantity. With the exception of men4, whose single mutant exhibits reduced mucilage, none of these genes have a single mutant phenotype, suggesting that they would not have been identified outside the compromised mum4 background.

  10. 21 CFR 516.29 - Termination of MUMS-drug designation.

    Science.gov (United States)

    2010-04-01

    ... (CONTINUED) ANIMAL DRUGS, FEEDS, AND RELATED PRODUCTS NEW ANIMAL DRUGS FOR MINOR USE AND MINOR SPECIES Designation of a Minor Use or Minor Species New Animal Drug § 516.29 Termination of MUMS-drug designation. (a... exclusive marketing rights under this subpart. (d) FDA may terminate designation if it independently...

  11. Iterative development of MobileMums: a physical activity intervention for women with young children

    Directory of Open Access Journals (Sweden)

    Fjeldsoe Brianna S

    2012-12-01

    Full Text Available Abstract Background To describe the iterative development process and final version of ‘MobileMums’: a physical activity intervention for women with young children ( Methods MobileMums development followed the five steps outlined in the mHealth development and evaluation framework: 1 conceptualization (critique of literature and theory; 2 formative research (focus groups, n= 48; 3 pre-testing (qualitative pilot of intervention components, n= 12; 4 pilot testing (pilot RCT, n= 88; and, 5 qualitative evaluation of the refined intervention (n= 6. Results Key findings identified throughout the development process that shaped the MobileMums program were the need for: behaviour change techniques to be grounded in Social Cognitive Theory; tailored SMS content; two-way SMS interaction; rapport between SMS sender and recipient; an automated software platform to generate and send SMS; and, flexibility in location of a face-to-face delivered component. Conclusions The final version of MobileMums is flexible and adaptive to individual participant’s physical activity goals, expectations and environment. MobileMums is being evaluated in a community-based randomised controlled efficacy trial (ACTRN12611000481976.

  12. Giving Feedback: Development of Scales for the Mum Effect, Discomfort Giving Feedback, and Feedback Medium Preference

    Science.gov (United States)

    Cox, Susie S.; Marler, Laura E.; Simmering, Marcia J.; Totten, Jeff W.

    2011-01-01

    Research in organizational behavior and human resources promotes the view that it is critical for managers to provide accurate feedback to employees, yet little research addresses rater tendencies (i.e., the "mum effect") and attitudes that influence how performance feedback is given. Because technology has changed the nature of…

  13. 21 CFR 516.30 - Annual reports for a MUMS-designated drug.

    Science.gov (United States)

    2010-04-01

    ... status or results of such studies; (b) A description of the investigational plan for the coming year, as well as any anticipated difficulties in development, testing, and marketing; and (c) A brief discussion of any changes that may affect the MUMS-designated drug status of the product. For example...

  14. A 6-9 GHz 5-band CMOS synthesizer for MB-OFDM UWB

    Energy Technology Data Exchange (ETDEWEB)

    Chen Pufeng; Li Zhiqiang; Wang Xiaosong; Zhang Haiying; Ye Tianchun, E-mail: chenpufeng@ime.ac.c [Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029 (China)

    2010-07-15

    An ultra-wideband frequency synthesizer is designed to generate carrier frequencies for 5 bands distributed from 6 to 9 GHz with less than 3 ns switching time. It incorporates two phase-locked loops and one single-sideband (SSB) mixer. A 2-to-1 multiplexer with high linearity is proposed. A modified wideband SSB mixer, quadrature VCO, and layout techniques are also employed. The synthesizer is fabricated in a 0.18 {mu}m CMOS process and operates at 1.5-1.8 V while consuming 40 mA current. The measured phase noise is -128 dBc/Hz at 10 MHz offset, and the sideband rejection is -22 dBc at 7.656 GHz.

  15. A fast-hopping 3-band CMOS frequency synthesizer for MB-OFDM UWB system

    Energy Technology Data Exchange (ETDEWEB)

    Zheng Yongzheng; Xia Lingli; Li Weinan; Huang Yumei; Hong Zhiliang, E-mail: yumeihuang@fudan.edu.c [State Key Laboratory of ASIC and System, Fudan University, Shanghai 201203 (China)

    2009-09-15

    A fast-hopping 3-band (mode 1) multi-band orthogonal frequency division multiplexing ultra-wideband frequency synthesizer is presented. This synthesizer uses two phase-locked loops for generating steady frequencies and one quadrature single-sideband mixer for frequency shifting and quadrature frequency generation. The generated carriers can hop among 3432 MHz, 3960 MHz, and 4488 MHz. Implemented in a 0.13 {mu}m CMOS process, this fully integrated synthesizer consumes 27 mA current from a 1.2 V supply. Measurement shows that the out-of-band spurious tones are below -50 dBc, while the in-band spurious tones are below -34 dBc. The measured hopping time is below 2 ns. The core die area is 1.0 x 1.8 mm{sup 2}.

  16. A CMOS variable gain amplifier for PHENIX electromagnetic calorimeter and RICH energy measurements

    Energy Technology Data Exchange (ETDEWEB)

    Wintenberg, A.L.; Simpson, M.L.; Young, G.R. [Oak Ridge National Lab., TN (United States); Palmer, R.L.; Moscone, C.G.; Jackson, R.G. [Tennessee Univ., Knoxville, TN (United States)

    1996-12-31

    A variable gain amplifier (VGA) has been developed equalizing the gains of integrating amplifier channels used with multiple photomultiplier tubes operating from common high-voltage supplies. The PHENIX lead-scintillator electromagnetic calorimeter will operate in that manner, and gain equalization is needed to preserve the dynamic range of the analog memory and ADC following the integrating amplifier. The VGA is also needed for matching energy channel gains prior to forming analog sums for trigger purposes. The gain of the VGA is variable over a 3:1 range using a 5-bit digital control, and the risetime is held between 15 and 23 ns using switched compensation in the VGA. An additional feature is gated baseline restoration. Details of the design and results from several prototype devices fabricated in 1.2-{mu}m Orbit CMOS are presented.

  17. Analysis and simulation of HV-CMOS assemblies for the CLIC vertex detector

    CERN Document Server

    Buckland, Matthew Daniel

    2017-01-01

    One of the design concepts currently under study for the vertex detector at the proposed Compact Linear Collider is a High-Voltage CMOS sensor, fabricated in a commercial 180 nm technology, capacitively coupled to a hybrid readout chip. Tests of the assemblies were carried out at the CERN SPS using 120 GeV/c pions, covering incident angles ranging from 0$^\\circ$ to 80$^\\circ$. The measurements have shown an excellent tracking performance with an efficiency above 99.7% and a spatial resolution of 5–7 $\\mu$m over the tested angular range. These results were then compared to TCAD simulations carried out using simulations, showing a good agreement for the current-voltage, breakdown and charge collection properties. The simulations have also been used to optimise future sensor design.

  18. Mums 4 Mums: structured telephone peer-support for women experiencing postnatal depression. Pilot and exploratory RCT of its clinical and cost effectiveness

    Directory of Open Access Journals (Sweden)

    McKenzie-McHarg Kirstie

    2011-03-01

    Full Text Available Abstract Background Postnatal depression (PND can be experienced by 13% of women who give birth, and such women often exhibit disabling symptoms, which can have a negative effect on the mother and infant relationship, with significant consequences in terms of the child's later capacity for affect regulation. Research has shown that providing support to mothers experiencing PND can help reduce their depressive symptoms and improve their coping strategies. The Mums4Mums study aims to evaluate the impact of telephone peer-support for women experiencing PND. Methods/Design The study design adopts the MRC framework for the development and evaluation of complex interventions. Health visitors in Warwickshire and Coventry Primary Care Trusts are screening potential participants at the 8-week postnatal check using either the Edinburgh Postnatal Depression Scale (EPDS > = 10 or the three Whooley questions recommended by NICE (http://guidance.nice.org.uk/CG45. The Mums4Mums telephone support intervention is being delivered by trained peer-supporters over a period of four months. The primary outcome is depressive symptomatology as measured by the Edinburgh Postnatal Depression Scale. Secondary outcomes include mother-child interaction, dyadic adjustment, parenting sense of competence scale, and self-efficacy. Maternal perceptions of the telephone peer-support are being assessed using semi-structured interviews following the completion of the intervention. Discussion The proposed study will develop current innovative work in peer-led support interventions and telecare by applying existing expertise to a new domain (i.e. PND, testing the feasibility of a peer-led telephone intervention for mothers living with PND, and developing the relationship between the lay and clinical communities. The intervention will potentially benefit a significant number of patients and support a future application for a larger study to undertake a full evaluation of the clinical

  19. Ultralow-loss CMOS copper plasmonic waveguides

    DEFF Research Database (Denmark)

    Fedyanin, Dmitry Yu.; Yakubovsky, Dmitry I.; Kirtaev, Roman V.

    2016-01-01

    with microelectronics manufacturing technologies. This prevents plasmonic components from integration with both silicon photonics and silicon microelectronics. Here, we demonstrate ultralow-loss copper plasmonic waveguides fabricated in a simple complementary metal-oxide semiconductor (CMOS) compatible process, which...

  20. Latch-up in CMOS integrated circuits

    International Nuclear Information System (INIS)

    Estreich, D.B.; Dutton, R.W.

    1978-04-01

    An analysis is presented of latch-up in CMOS integrated circuits. A latch-up prediction algorithm has been developed and used to evaluate methods to control latch-up. Experimental verification of the algorithm is demonstrated

  1. Nanometer CMOS ICs from basics to ASICs

    CERN Document Server

    J M Veendrick, Harry

    2017-01-01

    This textbook provides a comprehensive, fully-updated introduction to the essentials of nanometer CMOS integrated circuits. It includes aspects of scaling to even beyond 12nm CMOS technologies and designs. It clearly describes the fundamental CMOS operating principles and presents substantial insight into the various aspects of design implementation and application. Coverage includes all associated disciplines of nanometer CMOS ICs, including physics, lithography, technology, design, memories, VLSI, power consumption, variability, reliability and signal integrity, testing, yield, failure analysis, packaging, scaling trends and road blocks. The text is based upon in-house Philips, NXP Semiconductors, Applied Materials, ASML, IMEC, ST-Ericsson, TSMC, etc., courseware, which, to date, has been completed by more than 4500 engineers working in a large variety of related disciplines: architecture, design, test, fabrication process, packaging, failure analysis and software.

  2. A 16:1 Serializer ASIC for Data Transmission at 5 Gbps

    CERN Document Server

    Gong, D; The ATLAS collaboration

    2010-01-01

    A high speed, low power 16:1 serializer is developed using a commercial 0.25 μm silicon-on-sapphire CMOS technology. It operates from 4.0 to 5.8 Gbps in the lab test. Its total jitter is measured to be 62 ps and the bathtub scan demonstrates a 122 ps opening at BER of less than 10-12 level at 5 Gbps. The measured power consumption is 507 mW at this data rate. A proton test of this chip is scheduled in June and test results will be discussed when available.

  3. Variationen und ihre Kompensation in CMOS Digitalschaltungen

    OpenAIRE

    Baumann, Thomas

    2010-01-01

    Variationen bei der Herstellung und während des Betriebs von CMOS Schaltungen beeinflussen deren Geschwindigkeit und erschweren die Verifikation der in der Spezifikation zugesicherten Eigenschaften. In dieser Arbeit wird eine abstraktionsebenenübergreifende Vorgehensweise zur Abschätzung des Einflusses von Prozess- und betriebsbedingten Umgebungsvariationen auf die Geschwindigkeit einer Schaltung vorgestellt. Neben Untersuchungen der Laufzeitsensitivität in low-power CMOS Technologien von...

  4. Fabrication of CMOS-compatible nanopillars for smart bio-mimetic CMOS image sensors

    KAUST Repository

    Saffih, Faycal; Elshurafa, Amro M.; Mohammad, Mohammad Ali; Nelson-Fitzpatrick, Nathan E.; Evoy, S.

    2012-01-01

    . The fabrication of the nanopillars was carried out keeping the CMOS process in mind to ultimately obtain a CMOS-compatible process. This work serves as an initial step in the ultimate objective of integrating photo-sensors based on these nanopillars seamlessly

  5. Imaging system design and image interpolation based on CMOS image sensor

    Science.gov (United States)

    Li, Yu-feng; Liang, Fei; Guo, Rui

    2009-11-01

    An image acquisition system is introduced, which consists of a color CMOS image sensor (OV9620), SRAM (CY62148), CPLD (EPM7128AE) and DSP (TMS320VC5509A). The CPLD implements the logic and timing control to the system. SRAM stores the image data, and DSP controls the image acquisition system through the SCCB (Omni Vision Serial Camera Control Bus). The timing sequence of the CMOS image sensor OV9620 is analyzed. The imaging part and the high speed image data memory unit are designed. The hardware and software design of the image acquisition and processing system is given. CMOS digital cameras use color filter arrays to sample different spectral components, such as red, green, and blue. At the location of each pixel only one color sample is taken, and the other colors must be interpolated from neighboring samples. We use the edge-oriented adaptive interpolation algorithm for the edge pixels and bilinear interpolation algorithm for the non-edge pixels to improve the visual quality of the interpolated images. This method can get high processing speed, decrease the computational complexity, and effectively preserve the image edges.

  6. Photoresponse analysis of the CMOS photodiodes for CMOS x-ray image sensor

    Energy Technology Data Exchange (ETDEWEB)

    Kim, Young Soo; Ha, Jang Ho; Kim, Han Soo; Yeo, Sun Mok [Korea Atomic Energy Research Institute, Daejeon (Korea, Republic of)

    2012-11-15

    Although in the short term CMOS active pixel sensors (APSs) cannot compete with the conventionally used charge coupled devices (CCDs) for high quality scientific imaging, recent development in CMOS APSs indicate that CMOS performance level of CCDs in several domains. CMOS APSs possess thereby a number of advantages such as simpler driving requirements and low power operation. CMOS image sensors can be processed in standard CMOS technologies and the potential of on-chip integration of analog and digital circuitry makes them more suitable for several vision systems where system cost is of importance. Moreover, CMOS imagers can directly benefit from on-going technological progress in the field of CMOS technologies. Due to these advantages, the CMOS APSs are currently being investigated actively for various applications such as star tracker, navigation camera and X-ray imaging etc. In most detection systems, it is thought that the sensor is most important, since this decides the signal and noise level. So, in CMOS APSs, the pixel is very important compared to other functional blocks. In order to predict the performance of such image sensor, a detailed understanding of the photocurrent generation in the photodiodes that comprise the CMOS APS is required. In this work, we developed the analytical model that can calculate the photocurrent generated in CMOS photodiode comprising CMOS APSs. The photocurrent calculations and photo response simulations with respect to the wavelength of the incident photon were performed using this model for four types of photodiodes that can be fabricated in standard CMOS process. n{sup +}/p{sup -}sub and n{sup +}/p{sup -}epi/p{sup -}sub photodiode show better performance compared to n{sup -}well/p{sup -}sub and n{sup -}well/p{sup -}epi/p{sup -}sub due to the wider depletion width. Comparing n{sup +}/p{sup -}sub and n{sup +}/p{sup -}epi/p{sup -}sub photodiode, n{sup +}/p{sup -}sub has higher photo-responsivity in longer wavelength because of

  7. A Demonstrator Analog Signal Processing Circuit in a Radiation Hard SOI-CMOS Technology

    CERN Multimedia

    2002-01-01

    % RD-9 A Demonstrator Analog Signal Processing Circuit in a Radiation Hard SOI-CMOS Technology \\\\ \\\\Radiation hardened SOI-CMOS (Silicon-On-Insulator, Complementary Metal-Oxide- \\linebreak Semiconductor planar microelectronic circuit technology) was a likely candidate technology for mixed analog-digital signal processing electronics in experiments at the future high luminosity hadron colliders. We have studied the analog characteristics of circuit designs realized in the Thomson TCS radiation hard technologies HSOI3-HD. The feature size of this technology was 1.2 $\\mu$m. We have irradiated several devices up to 25~Mrad and 3.10$^{14}$ neutrons cm$^{-2}$. Gain, noise characteristics and speed have been measured. Irradiation introduces a degradation which in the interesting bandwidth of 0.01~MHz~-~1~MHz is less than 40\\%. \\\\ \\\\Some specific SOI phenomena have been studied in detail, like the influence on the noise spectrum of series resistence in the thin silicon film that constitutes the body of the transistor...

  8. A high efficiency PWM CMOS class-D audio power amplifier

    Energy Technology Data Exchange (ETDEWEB)

    Zhu Zhangming; Liu Lianxi; Yang Yintang [Institute of Microelectronics, Xidian University, Xi' an 710071 (China); Lei Han, E-mail: zmyh@263.ne [Xi' an Power-Rail Micro Co., Ltd, Xi' an 710075 (China)

    2009-02-15

    Based on the difference close-loop feedback technique and the difference pre-amp, a high efficiency PWM CMOS class-D audio power amplifier is proposed. A rail-to-rail PWM comparator with window function has been embedded in the class-D audio power amplifier. Design results based on the CSMC 0.5 mum CMOS process show that the max efficiency is 90%, the PSRR is -75 dB, the power supply voltage range is 2.5-5.5 V, the THD+N in 1 kHz input frequency is less than 0.20%, the quiescent current in no load is 2.8 mA, and the shutdown current is 0.5 muA. The active area of the class-D audio power amplifier is about 1.47 x 1.52 mm{sup 2}. With the good performance, the class-D audio power amplifier can be applied to several audio power systems.

  9. A 3.1-4.8 GHz CMOS receiver for MB-OFDM UWB

    Energy Technology Data Exchange (ETDEWEB)

    Yang Guang; Yao Wang; Yin Jiangwei; Zheng Renliang; Li Wei; Li Ning; Ren Junyan, E-mail: w-li@fudan.edu.c [State Key Laboratory of ASIC and System, Fudan University, Shanghai 201203 (China)

    2009-01-15

    An integrated fully differential ultra-wideband CMOS receiver for 3.1-4.8 GHz MB-OFDM systems is presented. A gain controllable low noise amplifier and a merged quadrature mixer are integrated as the RF front-end. Five order Gm-C type low pass filters and VGAs are also integrated for both I and Q IF paths in the receiver. The ESD protected chip is fabricated in a Jazz 0.18 mum RF CMOS process and achieves a maximum total voltage gain of 65 dB, an AGC range of 45 dB with about 6 dB/step, an averaged total noise figure of 6.4 to 8.8 dB over 3 bands and an in-band IIP3 of -5.1 dBm. The receiver occupies 2.3 mm{sup 2} and consumes 110 mA from a 1.8 V supply including test buffers and a digital module.

  10. A full on-chip CMOS low-dropout voltage regulator with VCCS compensation

    Energy Technology Data Exchange (ETDEWEB)

    Gao Leisheng; Zhou Yumei; Wu Bin; Jiang Jianhua, E-mail: gaoleisheng@ime.ac.c [Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029 (China)

    2010-08-15

    A full on-chip CMOS low-dropout (LDO) voltage regulator with high PSR is presented. Instead of relying on the zero generated by the load capacitor and its equivalent series resistance, the proposed LDO generates a zero by voltage-controlled current sources for stability. The compensating capacitor for the proposed scheme is only 0.18 pF, which is much smaller than the capacitor of the conventional compensation scheme. The full on-chip LDO was fabricated in commercial 0.35 {mu}m CMOS technology. The active chip area of the LDO (including the bandgap voltage reference) is 400 x 270 {mu}m{sup 2}. Experimental results show that the PSR of the LDO is -58.7 dB at a frequency of 10 Hz and -20 dB at a frequency of 1 MHz. The proposed LDO is capable of sourcing an output current up to 50 mA. (semiconductor integrated circuits)

  11. An RF power amplifier with inter-metal-shuffled capacitor for inter-stage matching in a digital CMOS process

    Energy Technology Data Exchange (ETDEWEB)

    Feng Xiaoxing; Zhang Xing; Ge Binjie; Wang Xin' an, E-mail: wangxa@szpku.edu.c [Key Laboratory of Integrated Microsystems, Shenzhen Graduate School of Peking University, Shenzhen 518055 (China)

    2009-06-01

    One challenge of the implementation of fully-integrated RF power amplifiers into a deep submicro digital CMOS process is that no capacitor is available, especially no high density capacitor. To address this problem, a two-stage class-AB power amplifier with inter-stage matching realized by an inter-metal coupling capacitor is designed in a 180-nm digital CMOS process. This paper compares three structures of inter-metal coupling capacitors with metal-insulator-metal (MIM) capacitor regarding their capacitor density. Detailed simulations are carried out for the leakage, the voltage dependency, the temperature dependency, and the quality factor between an inter-metal shuffled (IMS) capacitor and an MIM capacitor. Finally, an IMS capacitor is chosen to perform the inter-stage matching. The techniques are validated via the design and implement of a two-stage class-AB RF power amplifier for an UHF RFID application. The PA occupies 370 x 200 mum{sup 2} without pads in the 180-nm digital CMOS process and outputs 21.1 dBm with 40% drain efficiency and 28.1 dB power gain at 915 MHz from a single 3.3 V power supply.

  12. Tevatron serial data repeater system

    International Nuclear Information System (INIS)

    Ducar, R.J.

    1981-01-01

    A ten megabit per second serial data repeater system has been developed for the 6.28km Tevatron accelerator. The repeaters are positioned at each of the thirty service buildings and accommodate control and abort system communications as well as distribution of the Tevatron time and energy clocks. The repeaters are transparent to the particular protocol of the transmissions. Serial data are encoded locally as unipolar two volt signals employing the self-clocking Manchester Bi-Phase code. The repeaters modulate the local signals to low-power bursts of 50 MHz rf carrier for the 260m transmission between service buildings. The repeaters also demodulate the transmission and restructure the data for local utilization. The employment of frequency discrimination techniques yields high immunity to the characteristic noise spectrum

  13. Nanoflow electrospinning serial femtosecond crystallography

    Energy Technology Data Exchange (ETDEWEB)

    Sierra, Raymond G.; Laksmono, Hartawan [SLAC National Accelerator Laboratory, Menlo Park, CA 94025 (United States); Kern, Jan [Lawrence Berkeley National Laboratory, Berkeley, CA 94720 (United States); SLAC National Accelerator Laboratory, Menlo Park, CA 94025 (United States); Tran, Rosalie; Hattne, Johan [Lawrence Berkeley National Laboratory, Berkeley, CA 94720 (United States); Alonso-Mori, Roberto [SLAC National Accelerator Laboratory, Menlo Park, CA 94025 (United States); Lassalle-Kaiser, Benedikt [Lawrence Berkeley National Laboratory, Berkeley, CA 94720 (United States); Glöckner, Carina; Hellmich, Julia [Technische Universität Berlin, Strasse des 17 Juni 135, 10623 Berlin (Germany); Schafer, Donald W. [SLAC National Accelerator Laboratory, Menlo Park, CA 94025 (United States); Echols, Nathaniel; Gildea, Richard J.; Grosse-Kunstleve, Ralf W. [Lawrence Berkeley National Laboratory, Berkeley, CA 94720 (United States); Sellberg, Jonas [SLAC National Accelerator Laboratory, Menlo Park, CA 94025 (United States); Stockholm University, S-106 91 Stockholm (Sweden); McQueen, Trevor A. [Stanford University, Stanford, CA 94025 (United States); Fry, Alan R.; Messerschmidt, Marc M.; Miahnahri, Alan; Seibert, M. Marvin; Hampton, Christina Y.; Starodub, Dmitri; Loh, N. Duane; Sokaras, Dimosthenis; Weng, Tsu-Chien [SLAC National Accelerator Laboratory, Menlo Park, CA 94025 (United States); Zwart, Petrus H. [Lawrence Berkeley National Laboratory, Berkeley, CA 94720 (United States); Glatzel, Pieter [European Synchrotron Radiation Facility, Grenoble (France); Milathianaki, Despina; White, William E. [SLAC National Accelerator Laboratory, Menlo Park, CA 94025 (United States); Adams, Paul D. [Lawrence Berkeley National Laboratory, Berkeley, CA 94720 (United States); Williams, Garth J.; Boutet, Sébastien [SLAC National Accelerator Laboratory, Menlo Park, CA 94025 (United States); Zouni, Athina [Technische Universität Berlin, Strasse des 17 Juni 135, 10623 Berlin (Germany); Messinger, Johannes [Umeå Universitet, Umeå (Sweden); Sauter, Nicholas K. [Lawrence Berkeley National Laboratory, Berkeley, CA 94720 (United States); Bergmann, Uwe [SLAC National Accelerator Laboratory, Menlo Park, CA 94025 (United States); Yano, Junko; Yachandra, Vittal K. [Lawrence Berkeley National Laboratory, Berkeley, CA 94720 (United States); Bogan, Michael J., E-mail: mbogan@slac.stanford.edu [SLAC National Accelerator Laboratory, Menlo Park, CA 94025 (United States); SLAC National Accelerator Laboratory, Menlo Park, CA 94025 (United States)

    2012-11-01

    A low flow rate liquid microjet method for delivery of hydrated protein crystals to X-ray lasers is presented. Linac Coherent Light Source data demonstrates serial femtosecond protein crystallography with micrograms, a reduction of sample consumption by orders of magnitude. An electrospun liquid microjet has been developed that delivers protein microcrystal suspensions at flow rates of 0.14–3.1 µl min{sup −1} to perform serial femtosecond crystallography (SFX) studies with X-ray lasers. Thermolysin microcrystals flowed at 0.17 µl min{sup −1} and diffracted to beyond 4 Å resolution, producing 14 000 indexable diffraction patterns, or four per second, from 140 µg of protein. Nanoflow electrospinning extends SFX to biological samples that necessitate minimal sample consumption.

  14. Nanoflow electrospinning serial femtosecond crystallography

    International Nuclear Information System (INIS)

    Sierra, Raymond G.; Laksmono, Hartawan; Kern, Jan; Tran, Rosalie; Hattne, Johan; Alonso-Mori, Roberto; Lassalle-Kaiser, Benedikt; Glöckner, Carina; Hellmich, Julia; Schafer, Donald W.; Echols, Nathaniel; Gildea, Richard J.; Grosse-Kunstleve, Ralf W.; Sellberg, Jonas; McQueen, Trevor A.; Fry, Alan R.; Messerschmidt, Marc M.; Miahnahri, Alan; Seibert, M. Marvin; Hampton, Christina Y.; Starodub, Dmitri; Loh, N. Duane; Sokaras, Dimosthenis; Weng, Tsu-Chien; Zwart, Petrus H.; Glatzel, Pieter; Milathianaki, Despina; White, William E.; Adams, Paul D.; Williams, Garth J.; Boutet, Sébastien; Zouni, Athina; Messinger, Johannes; Sauter, Nicholas K.; Bergmann, Uwe; Yano, Junko; Yachandra, Vittal K.; Bogan, Michael J.

    2012-01-01

    A low flow rate liquid microjet method for delivery of hydrated protein crystals to X-ray lasers is presented. Linac Coherent Light Source data demonstrates serial femtosecond protein crystallography with micrograms, a reduction of sample consumption by orders of magnitude. An electrospun liquid microjet has been developed that delivers protein microcrystal suspensions at flow rates of 0.14–3.1 µl min −1 to perform serial femtosecond crystallography (SFX) studies with X-ray lasers. Thermolysin microcrystals flowed at 0.17 µl min −1 and diffracted to beyond 4 Å resolution, producing 14 000 indexable diffraction patterns, or four per second, from 140 µg of protein. Nanoflow electrospinning extends SFX to biological samples that necessitate minimal sample consumption

  15. Serial killer: il database mondiale

    Directory of Open Access Journals (Sweden)

    Gaetano parente

    2016-07-01

    Full Text Available The complex and multisided study of serial killers is partly made difficult by the current level of progress that has led these deviant people to evolve in relation to the aspects of shrewdness (concerning the staging and mobility. Despite the important work of some scholars who proposed important theories, all this shows that, concerning serial murders, it is still particularly frequent not to pay attention to links among homicides committed by the same person but in different parts of the world. It is therefore crucial to develop a worldwide database that allows all police forces to access information collected on crime scenes of murders which are particularly absurd and committed without any apparent reason. It will then be up to the profiler, through ad hoc and technologically advanced tools, to collect this information on the crime scene that would be made available to all police forces thanks to the worldwide database.

  16. Neutron absorbed dose in a pacemaker CMOS

    Energy Technology Data Exchange (ETDEWEB)

    Borja H, C. G.; Guzman G, K. A.; Valero L, C. Y.; Banuelos F, A.; Hernandez D, V. M.; Vega C, H. R. [Universidad Autonoma de Zacatecas, Unidad Academica de Estudios Nucleares, Calle Cipres No. 10, Fracc. La Penuela, 98068 Zacatecas (Mexico); Paredes G, L., E-mail: candy_borja@hotmail.com [ININ, Carretera Mexico-Toluca s/n, 52750 Ocoyoacac, Estado de Mexico (Mexico)

    2011-11-15

    The absorbed dose due to neutrons by a Complementary Metal Oxide Semiconductor (CMOS) has been estimated using Monte Carlo methods. Eventually a person with a pacemaker becomes a patient that must be treated by radiotherapy with a linear accelerator; the pacemaker has integrated circuits as CMOS that are sensitive to intense and pulsed radiation fields. When the Linac is working in Bremsstrahlung mode an undesirable neutron field is produced due to photoneutron reactions; these neutrons could damage the CMOS putting the patient at risk during the radiotherapy treatment. In order to estimate the neutron dose in the CMOS a Monte Carlo calculation was carried out where a full radiotherapy vault room was modeled with a W-made spherical shell in whose center was located the source term of photoneutrons produced by a Linac head operating in Bremsstrahlung mode at 18 MV. In the calculations a phantom made of tissue equivalent was modeled while a beam of photoneutrons was applied on the phantom prostatic region using a field of 10 x 10 cm{sup 2}. During simulation neutrons were isotropically transported from the Linac head to the phantom chest, here a 1 {theta} x 1 cm{sup 2} cylinder made of polystyrene was modeled as the CMOS, where the neutron spectrum and the absorbed dose were estimated. Main damages to CMOS are by protons produced during neutron collisions protective cover made of H-rich materials, here the neutron spectrum that reach the CMOS was calculated showing a small peak around 0.1 MeV and a larger peak in the thermal region, both connected through epithermal neutrons. (Author)

  17. Serial Austen. Mashingups with Zombies

    Directory of Open Access Journals (Sweden)

    Eleonora Federici

    2017-01-01

    Full Text Available Jane Austen sells. She sells in all possible ways, her novels have been adapted for the cinema and the stage, they have been rewritten as comics and graphic novels. Jane austen is a cultural icon. The interest in her life is so strong that many biographies have been written in order to recover new facts and details. The places where she has lived and the places depicted in her novels have become tourist sites for literary pilgrims. Austen is a cross-over phenomenon, with regency costume balls recreated in her name and an endless proliferation of her works in all media. My essay will investigate Jane Austen and Seth Grahame-Smith’s Pride and Prejudice and Zombies (2009, a mash-up novel which has become a real cultural phenomenon of the last decade and will demonstrate how it can be considered a serial narrative. If as Henry Jenkins asserts, seriality implies the unfolding of a story over time through a process of “chunking” (that is creating meaningful parts of the same story and of “dispersal” (that is breaking the story into more parts and in more genres and media, mash-ups seems to do this.  Austen’s story remains as a “story hook” which pushes the reader to come back to different products for a continuation of the same story. So, if on the one hand, seriality occurs within the same text, the story-telling of Austen’s stories across genres and media is part of a seriality process.

  18. Notorious Cases of Serial Killers

    Directory of Open Access Journals (Sweden)

    Iosub Elena-Cătălina

    2014-05-01

    Full Text Available The reconstruction of a death scene provides an overall picture of the crime and will indicate the murder as an event or one of a series of events and also the criminal. But when the criminal is declared a serial killer, many questions are raised up. How could a person kill some else without a reason or why people react in such a disorganized way and become so brutal or what made them act like that and so many questions with also so many answers. This project explains the psychology of a murderer, his own way of thinking and acting by presuming that we may accurately discover what is in their minds when they kill. It is about a very complex issue regarding murder investigations, biological factors and psychological profile of a serial killer. Dealing with this problem we will at last reach to the question that could solve finally the puzzle: ―Are serial murderers distorted reflections of society's own values?

  19. Serial murder by healthcare professionals.

    Science.gov (United States)

    Yorker, Beatrice Crofts; Kizer, Kenneth W; Lampe, Paula; Forrest, A R W; Lannan, Jacquetta M; Russell, Donna A

    2008-01-01

    The prosecution of Charles Cullen, a nurse who killed at least 40 patients over a 16-year period, highlights the need to better understand the phenomenon of serial murder by healthcare professionals. The authors conducted a LexisNexis search which yielded 90 criminal prosecutions of healthcare providers that met inclusion criteria for serial murder of patients. In addition we reviewed epidemiologic studies, toxicology evidence, and court transcripts, to provide data on healthcare professionals who have been prosecuted between 1970 and 2006. Fifty-four of the 90 have been convicted; 45 for serial murder, four for attempted murder, and five pled guilty to lesser charges. Twenty-four more have been indicted and are either awaiting trial or the outcome has not been published. The other 12 prosecutions had a variety of legal outcomes. Injection was the main method used by healthcare killers followed by suffocation, poisoning, and tampering with equipment. Prosecutions were reported from 20 countries with 40% taking place in the United States. Nursing personnel comprised 86% of the healthcare providers prosecuted; physicians 12%, and 2% were allied health professionals. The number of patient deaths that resulted in a murder conviction is 317 and the number of suspicious patient deaths attributed to the 54 convicted caregivers is 2113. These numbers are disturbing and demand that systemic changes in tracking adverse patient incidents associated with presence of a specific healthcare provider be implemented. Hiring practices must shift away from preventing wrongful discharge or denial of employment lawsuits to protecting patients from employees who kill.

  20. Proton and gamma -Rays Irradiation-Induced Dark Current Random Telegraph Signal in a 0.18-mu{{m}} CMOS Image Sensor

    Science.gov (United States)

    Martin, E.; Nuns, T.; Virmontois, C.; David, J.-P.; Gilard, O.

    2013-08-01

    The dark current random telegraph signal (RTS) behavior has been studied in a five-transistor-per-pixel (5T) pinned photodiode 0.18-μm COTS active pixel sensor (APS). Several devices, irradiated using protons and gamma rays, have been studied in order to assess the ionizing and displacement damage effects. The influence of the proton energy, fluence, ionizing dose and applied bias during irradiation on the number of RTS pixels, the number of discrete levels, maximum transition amplitude, and mean switching time constants is investigated.

  1. 5.2-GHz RF Power Harvester in 0.18-/spl mu/m CMOS for Implantable Intraocular Pressure Monitoring

    KAUST Repository

    Ouda, Mahmoud H.; Arsalan, Muhammad; Marnat, Loic; Salama, Khaled N.; Shamim, Atif

    2013-01-01

    . To emulate the eye environment in measurements, a custom test setup is developed that comprises Plexiglass cavities filled with saline solution. Measurements in this setup show that the proposed chip can be charged to 1 V wirelessly from a 5-W transmitter 3

  2. Decal electronics for printed high performance cmos electronic systems

    KAUST Repository

    Hussain, Muhammad Mustafa; Sevilla, Galo Torres; Cordero, Marlon Diaz; Kutbee, Arwa T.

    2017-01-01

    High performance complementary metal oxide semiconductor (CMOS) electronics are critical for any full-fledged electronic system. However, state-of-the-art CMOS electronics are rigid and bulky making them unusable for flexible electronic applications

  3. CMOS Thermal Ox and Diffusion Furnace: Tystar Tytan 2000

    Data.gov (United States)

    Federal Laboratory Consortium — Description:CORAL Names: CMOS Wet Ox, CMOS Dry Ox, Boron Doping (P-type), Phos. Doping (N-Type)This four-stack furnace bank is used for the thermal growth of silicon...

  4. Design of a 2.4-GHz CMOS monolithic fractional-N frequency synthesizer

    Science.gov (United States)

    Shu, Keliu

    The wireless communication technology and market have been growing rapidly since a decade ago. The high demand market is a driving need for higher integration in the wireless transceivers. The trend is to achieve low-cost, small form factor and low power consumption. With the ever-reducing feature size, it is becoming feasible to integrate the RF front-end together with the baseband in the low-cost CMOS technology. The frequency synthesizer is a key building block in the RF front-end of the transceivers. It is used as a local oscillator for frequency translation and channel selection. The design of a 2.4-GHz low-power frequency synthesizer in 0.35mum CMOS is a challenging task mainly due to the high-speed prescaler. In this dissertation, a brief review of conventional PLL and frequency synthesizers is provided. Design techniques of a 2.4-GHz monolithic SigmaDelta fractional-N frequency synthesizer are investigated. Novel techniques are proposed to tackle the speed and integration bottlenecks of high-frequency PLL. A low-power and inherently glitch-free phase-switching prescaler and an on-chip loop filter with capacitance multiplier are developed. Compared with the existing and popular dual-path topology, the proposed loop filter reduces circuit complexity and its power consumption and noise are negligible. Furthermore, a third-order three-level digital SigmaDelta modulator topology is employed to reduce the phase noise generated by the modulator. Suitable PFD and charge-pump designs are employed to reduce their nonlinearity effects and thus minimize the folding of the SigmaDelta modulator-shaped phase noise. A prototype of the fractional-N synthesizer together with some standalone building blocks is designed and fabricated in TSMC 0.35mum CMOS through MOSIS. The prototype frequency synthesizer and standalone prescaler and loop filter are characterized. The feasibility and practicality of the proposed prescaler and loop filter are experimentally verified.

  5. Resistor Extends Life Of Battery In Clocked CMOS Circuit

    Science.gov (United States)

    Wells, George H., Jr.

    1991-01-01

    Addition of fixed resistor between battery and clocked complementary metal oxide/semiconductor (CMOS) circuit reduces current drawn from battery. Basic idea to minimize current drawn from battery by operating CMOS circuit at lowest possible current consistent with use of simple, fixed off-the-shelf components. Prolongs lives of batteries in such low-power CMOS circuits as watches and calculators.

  6. A Standard CMOS Humidity Sensor without Post-Processing

    OpenAIRE

    Nizhnik, Oleg; Higuchi, Kohei; Maenaka, Kazusuke

    2011-01-01

    A 2 ?W power dissipation, voltage-output, humidity sensor accurate to 5% relative humidity was developed using the LFoundry 0.15 ?m CMOS technology without post-processing. The sensor consists of a woven lateral array of electrodes implemented in CMOS top metal, a Intervia Photodielectric 8023?10 humidity-sensitive layer, and a CMOS capacitance to voltage converter.

  7. Technology CAD for germanium CMOS circuit

    Energy Technology Data Exchange (ETDEWEB)

    Saha, A.R. [Department of Electronics and ECE, IIT Kharagpur, Kharagpur-721302 (India)]. E-mail: ars.iitkgp@gmail.com; Maiti, C.K. [Department of Electronics and ECE, IIT Kharagpur, Kharagpur-721302 (India)

    2006-12-15

    Process simulation for germanium MOSFETs (Ge-MOSFETs) has been performed in 2D SILVACO virtual wafer fabrication (VWF) suite towards the technology CAD for Ge-CMOS process development. Material parameters and mobility models for Germanium were incorporated in simulation via C-interpreter function. We also report on the device design issues along with the DC and RF characterization of the bulk Ge-MOSFETs, AC parameter extraction and circuit simulation of Ge-CMOS. Simulation results are compared with bulk-Si devices. Simulations predict a cut-off frequency, f {sub T} of about 175 GHz for Ge-MOSFETs compared to 70 GHz for a similar gate-length Si MOSFET. For a single stage Ge-CMOS inverter circuit, a GATE delay of 0.6 ns is predicted.

  8. Technology CAD for germanium CMOS circuit

    International Nuclear Information System (INIS)

    Saha, A.R.; Maiti, C.K.

    2006-01-01

    Process simulation for germanium MOSFETs (Ge-MOSFETs) has been performed in 2D SILVACO virtual wafer fabrication (VWF) suite towards the technology CAD for Ge-CMOS process development. Material parameters and mobility models for Germanium were incorporated in simulation via C-interpreter function. We also report on the device design issues along with the DC and RF characterization of the bulk Ge-MOSFETs, AC parameter extraction and circuit simulation of Ge-CMOS. Simulation results are compared with bulk-Si devices. Simulations predict a cut-off frequency, f T of about 175 GHz for Ge-MOSFETs compared to 70 GHz for a similar gate-length Si MOSFET. For a single stage Ge-CMOS inverter circuit, a GATE delay of 0.6 ns is predicted

  9. Ion traps fabricated in a CMOS foundry

    Energy Technology Data Exchange (ETDEWEB)

    Mehta, K. K.; Ram, R. J. [Department of Electrical Engineering and Computer Science, Massachusetts Institute of Technology, Cambridge, Massachusetts 02139 (United States); Eltony, A. M.; Chuang, I. L. [Center for Ultracold Atoms, Research Laboratory of Electronics and Department of Physics, Massachusetts Institute of Technology, Cambridge, Massachusetts 02139 (United States); Bruzewicz, C. D.; Sage, J. M., E-mail: jsage@ll.mit.edu; Chiaverini, J., E-mail: john.chiaverini@ll.mit.edu [Lincoln Laboratory, Massachusetts Institute of Technology, Lexington, Massachusetts 02420 (United States)

    2014-07-28

    We demonstrate trapping in a surface-electrode ion trap fabricated in a 90-nm CMOS (complementary metal-oxide-semiconductor) foundry process utilizing the top metal layer of the process for the trap electrodes. The process includes doped active regions and metal interconnect layers, allowing for co-fabrication of standard CMOS circuitry as well as devices for optical control and measurement. With one of the interconnect layers defining a ground plane between the trap electrode layer and the p-type doped silicon substrate, ion loading is robust and trapping is stable. We measure a motional heating rate comparable to those seen in surface-electrode traps of similar size. This demonstration of scalable quantum computing hardware utilizing a commercial CMOS process opens the door to integration and co-fabrication of electronics and photonics for large-scale quantum processing in trapped-ion arrays.

  10. Serial powering optimization for CMS and ATLAS pixel detectors within RD53 collaboration for HL-LHC: system level simulations and testing

    CERN Document Server

    Orfanelli, Stella; Hamer, Matthias; Hinterkeuser, F; Karagounis, M; Pradas Luengo, Alvaro; Marconi, Sara; Ruini, Daniele

    2017-01-01

    Serial powering is the baseline choice for low mass power distribution for the CMS and ATLAS HL-LHC pixel detectors. Two 2.0 A Shunt-LDO regulators are integrated in a prototype pixel chip implemented in 65-nm CMOS technology and used to provide constant supply voltages to its power domains from a constant input current. Performance results from testing prototype Shunt-LDO regulators are shown, including their behaviour after x-ray irradiation. The system level simulation studies, which had been performed with a detailed regulator design in a serially powered topology, have been validated.

  11. Serial position learning in honeybees.

    Directory of Open Access Journals (Sweden)

    Randolf Menzel

    Full Text Available Learning of stimulus sequences is considered as a characteristic feature of episodic memory since it contains not only a particular item but also the experience of preceding and following events. In sensorimotor tasks resembling navigational performance, the serial order of objects is intimately connected with spatial order. Mammals and birds develop episodic(-like memory in serial spatio-temporal tasks, and the honeybee learns spatio-temporal order when navigating between the nest and a food source. Here I examine the structure of the bees' memory for a combined spatio-temporal task. I ask whether discrimination and generalization are based solely on simple forms of stimulus-reward learning or whether they require sequential configurations. Animals were trained to fly either left or right in a continuous T-maze. The correct choice was signaled by the sequence of colors (blue, yellow at four positions in the access arm. If only one of the possible 4 signals is shown (either blue or yellow, the rank order of position salience is 1, 2 and 3 (numbered from T-junction. No learning is found if the signal appears at position 4. If two signals are shown, differences at positions 1 and 2 are learned best, those at position 3 at a low level, and those at position 4 not at all. If three or more signals are shown these results are corroborated. This salience rank order again appeared in transfer tests, but additional configural phenomena emerged. Most of the results can be explained with a simple model based on the assumption that the four positions are equipped with different salience scores and that these add up independently. However, deviations from the model are interpreted by assuming stimulus configuration of sequential patterns. It is concluded that, under the conditions chosen, bees rely most strongly on memories developed during simple forms of associative reward learning, but memories of configural serial patterns contribute, too.

  12. Nanoflow electrospinning serial femtosecond crystallography

    Science.gov (United States)

    Sierra, Raymond G.; Laksmono, Hartawan; Kern, Jan; Tran, Rosalie; Hattne, Johan; Alonso-Mori, Roberto; Lassalle-Kaiser, Benedikt; Glöckner, Carina; Hellmich, Julia; Schafer, Donald W.; Echols, Nathaniel; Gildea, Richard J.; Grosse-Kunstleve, Ralf W.; Sellberg, Jonas; McQueen, Trevor A.; Fry, Alan R.; Messerschmidt, Marc M.; Miahnahri, Alan; Seibert, M. Marvin; Hampton, Christina Y.; Starodub, Dmitri; Loh, N. Duane; Sokaras, Dimosthenis; Weng, Tsu-Chien; Zwart, Petrus H.; Glatzel, Pieter; Milathianaki, Despina; White, William E.; Adams, Paul D.; Williams, Garth J.; Boutet, Sébastien; Zouni, Athina; Messinger, Johannes; Sauter, Nicholas K.; Bergmann, Uwe; Yano, Junko; Yachandra, Vittal K.; Bogan, Michael J.

    2012-01-01

    An electrospun liquid microjet has been developed that delivers protein microcrystal suspensions at flow rates of 0.14–3.1 µl min−1 to perform serial femtosecond crystallography (SFX) studies with X-ray lasers. Thermolysin microcrystals flowed at 0.17 µl min−1 and diffracted to beyond 4 Å resolution, producing 14 000 indexable diffraction patterns, or four per second, from 140 µg of protein. Nanoflow electrospinning extends SFX to biological samples that necessitate minimal sample consumption. PMID:23090408

  13. CMOS circuit design, layout and simulation

    CERN Document Server

    Baker, R Jacob

    2010-01-01

    The Third Edition of CMOS Circuit Design, Layout, and Simulation continues to cover the practical design of both analog and digital integrated circuits, offering a vital, contemporary view of a wide range of analog/digital circuit blocks including: phase-locked-loops, delta-sigma sensing circuits, voltage/current references, op-amps, the design of data converters, and much more. Regardless of one's integrated circuit (IC) design skill level, this book allows readers to experience both the theory behind, and the hands-on implementation of, complementary metal oxide semiconductor (CMOS) IC design via detailed derivations, discussions, and hundreds of design, layout, and simulation examples.

  14. CMOS Compressed Imaging by Random Convolution

    OpenAIRE

    Jacques, Laurent; Vandergheynst, Pierre; Bibet, Alexandre; Majidzadeh, Vahid; Schmid, Alexandre; Leblebici, Yusuf

    2009-01-01

    We present a CMOS imager with built-in capability to perform Compressed Sensing. The adopted sensing strategy is the random Convolution due to J. Romberg. It is achieved by a shift register set in a pseudo-random configuration. It acts as a convolutive filter on the imager focal plane, the current issued from each CMOS pixel undergoing a pseudo-random redirection controlled by each component of the filter sequence. A pseudo-random triggering of the ADC reading is finally applied to comp...

  15. Integrated 60GHz RF beamforming in CMOS

    CERN Document Server

    Yu, Yikun; van Roermund, Arthur H M

    2011-01-01

    ""Integrated 60GHz RF Beamforming in CMOS"" describes new concepts and design techniques that can be used for 60GHz phased array systems. First, general trends and challenges in low-cost high data-rate 60GHz wireless system are studied, and the phased array technique is introduced to improve the system performance. Second, the system requirements of phase shifters are analyzed, and different phased array architectures are compared. Third, the design and implementation of 60GHz passive and active phase shifters in a CMOS technology are presented. Fourth, the integration of 60GHz phase shifters

  16. Challenges & Roadmap for Beyond CMOS Computing Simulation.

    Energy Technology Data Exchange (ETDEWEB)

    Rodrigues, Arun F. [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States); Frank, Michael P. [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States)

    2017-12-01

    Simulating HPC systems is a difficult task and the emergence of “Beyond CMOS” architectures and execution models will increase that difficulty. This document presents a “tutorial” on some of the simulation challenges faced by conventional and non-conventional architectures (Section 1) and goals and requirements for simulating Beyond CMOS systems (Section 2). These provide background for proposed short- and long-term roadmaps for simulation efforts at Sandia (Sections 3 and 4). Additionally, a brief explanation of a proof-of-concept integration of a Beyond CMOS architectural simulator is presented (Section 2.3).

  17. Radiation-hardened bulk CMOS technology

    International Nuclear Information System (INIS)

    Dawes, W.R. Jr.; Habing, D.H.

    1979-01-01

    The evolutionary development of a radiation-hardened bulk CMOS technology is reviewed. The metal gate hardened CMOS status is summarized, including both radiation and reliability data. The development of a radiation-hardened bulk silicon gate process which was successfully implemented to a commercial microprocessor family and applied to a new, radiation-hardened, LSI standard cell family is also discussed. The cell family is reviewed and preliminary characterization data is presented. Finally, a brief comparison of the various radiation-hardened technologies with regard to performance, reliability, and availability is made

  18. Neutron radiography with sub-15 {mu}m resolution through event centroiding

    Energy Technology Data Exchange (ETDEWEB)

    Tremsin, Anton S., E-mail: ast@ssl.berkeley.edu [Space Sciences Laboratory, University of California at Berkeley, Berkeley, CA 94720 (United States); McPhate, Jason B.; Vallerga, John V.; Siegmund, Oswald H.W. [Space Sciences Laboratory, University of California at Berkeley, Berkeley, CA 94720 (United States); Bruce Feller, W. [NOVA Scientific, Inc. 10 Picker Road, Sturbridge, MA 01566 (United States); Lehmann, Eberhard; Kaestner, Anders; Boillat, Pierre; Panzner, Tobias; Filges, Uwe [Spallation Neutron Source Division, Paul Scherrer Institute, CH-5232 Villigen (Switzerland)

    2012-10-01

    Conversion of thermal and cold neutrons into a strong {approx}1 ns electron pulse with an absolute neutron detection efficiency as high as 50-70% makes detectors with {sup 10}B-doped Microchannel Plates (MCPs) very attractive for neutron radiography and microtomography applications. The subsequent signal amplification preserves the location of the event within the MCP pore (typically 6-10 {mu}m in diameter), providing the possibility to perform neutron counting with high spatial resolution. Different event centroiding techniques of the charge landing on a patterned anode enable accurate reconstruction of the neutron position, provided the charge footprints do not overlap within the time required for event processing. The new fast 2 Multiplication-Sign 2 Timepix readout with >1.2 kHz frame rates provides the unique possibility to detect neutrons with sub-15 {mu}m resolution at several MHz/cm{sup 2} counting rates. The results of high resolution neutron radiography experiments presented in this paper, demonstrate the sub-15 {mu}m resolution capability of our detection system. The high degree of collimation and cold spectrum of ICON and BOA beamlines combined with the high spatial resolution and detection efficiency of MCP-Timepix detectors are crucial for high contrast neutron radiography and microtomography with high spatial resolution. The next generation of Timepix electronics with sparsified readout should enable counting rates in excess of 10{sup 7} n/cm{sup 2}/s taking full advantage of high beam intensity of present brightest neutron imaging facilities.

  19. On the integration of ultrananocrystalline diamond (UNCD with CMOS chip

    Directory of Open Access Journals (Sweden)

    Hongyi Mi

    2017-03-01

    Full Text Available A low temperature deposition of high quality ultrananocrystalline diamond (UNCD film onto a finished Si-based CMOS chip was performed to investigate the compatibility of the UNCD deposition process with CMOS devices for monolithic integration of MEMS on Si CMOS platform. DC and radio-frequency performances of the individual PMOS and NMOS devices on the CMOS chip before and after the UNCD deposition were characterized. Electrical characteristics of CMOS after deposition of the UNCD film remained within the acceptable ranges, namely showing small variations in threshold voltage Vth, transconductance gm, cut-off frequency fT and maximum oscillation frequency fmax. The results suggest that low temperature UNCD deposition is compatible with CMOS to realize monolithically integrated CMOS-driven MEMS/NEMS based on UNCD.

  20. SMALL SERIAL AND SERIAL PRODUCTION MANAGEMENT IN UNSTABLE DEMAND ENVIROUMENT

    Directory of Open Access Journals (Sweden)

    Tsomaeva I. V.

    2014-03-01

    Full Text Available The work presents the methodological approach to production program of the enterprise serial engineering for the current period in the conditions of uncertainty of demand. Here are two problems with this. The first is connected with the formation of the production program of the next quarter, year. Objective could be to stochastic programming, but this task is difficult. Therefore, in this paper we proposed a simple solution. On the basis of statistical historical information about the deviation of actual sales data products from predicted by Monte Carlo generated a lot of production programs. Fixed worst key performance (sales, profit etc. The difference between the values of the planned target and the settlement defines stochastic reserve, to be established at the expense of additional innovations. The second problem is connected with the formation of the production program production in the planned month, taking into account the creation of stocks of production in the conditions when for a short period of time is difficult to build a pattern of change in the quantity demanded by month for serial production, as in some months of the year the products are not produced nor sold. To justify the level of inventories of finished products is information on deviations from the fact plan for past periods. Built function of frequency distribution of the values of deviations. This allows you to further build the methodology for determining the level of production (taking into account the reserves and sales of products that deliver maximum economic effect from the sales in the conditions of a random process of realization of production.

  1. Low noise monolithic CMOS front end electronics

    International Nuclear Information System (INIS)

    Lutz, G.; Bergmann, H.; Holl, P.; Manfredi, P.F.

    1987-01-01

    Design considerations for low noise charge measurement and their application in CMOS electronics are described. The amplifier driver combination whose noise performance has been measured in detail as well as the analog multiplexing silicon strip detector readout electronics are designed with low power consumption and can be operated in pulsed mode so as to reduce heat dissipation even further in many applications. (orig.)

  2. CMOS VHF transconductance-C lowpass filter

    NARCIS (Netherlands)

    Nauta, Bram

    1990-01-01

    Experimental results of a VHF CMOS transconductance-C lowpass filter are described. The filter is built with transconductors as published earlier. The cutoff frequency can be tuned from 22 to 98 MHz and the measured filter response is very close to the ideal response

  3. CMOS switched current phase-locked loop

    NARCIS (Netherlands)

    Leenaerts, D.M.W.; Persoon, G.G.; Putter, B.M.

    1997-01-01

    The authors present an integrated circuit realisation of a switched current phase-locked loop (PLL) in standard 2.4 µm CMOS technology. The centre frequency is tunable to 1 MHz at a clock frequency of 5.46 MHz. The PLL has a measured maximum phase error of 21 degrees. The chip consumes

  4. RF Circuit Design in Nanometer CMOS

    NARCIS (Netherlands)

    Nauta, Bram

    2007-01-01

    With CMOS technology entering the nanometer regime, the design of analog and RF circuits is complicated by low supply voltages, very non-linear (and nonquadratic) devices and large 1/f noise. At the same time, circuits are required to operate over increasingly wide bandwidths to implement modern

  5. CMOS digital integrated circuits a first course

    CERN Document Server

    Hawkins, Charles; Zarkesh-Ha, Payman

    2016-01-01

    This book teaches the fundamentals of modern CMOS technology and covers equal treatment to both types of MOSFET transistors that make up computer circuits; power properties of logic circuits; physical and electrical properties of metals; introduction of timing circuit electronics and introduction of layout; real-world examples and problem sets.

  6. A 24GHz Radar Receiver in CMOS

    NARCIS (Netherlands)

    Kwok, K.C.

    2015-01-01

    This thesis investigates the system design and circuit implementation of a 24GHz-band short-range radar receiver in CMOS technology. The propagation and penetration properties of EM wave offer the possibility of non-contact based remote sensing and through-the-wall imaging of distance stationary or

  7. Toward CMOS image sensor based glucose monitoring.

    Science.gov (United States)

    Devadhasan, Jasmine Pramila; Kim, Sanghyo

    2012-09-07

    Complementary metal oxide semiconductor (CMOS) image sensor is a powerful tool for biosensing applications. In this present study, CMOS image sensor has been exploited for detecting glucose levels by simple photon count variation with high sensitivity. Various concentrations of glucose (100 mg dL(-1) to 1000 mg dL(-1)) were added onto a simple poly-dimethylsiloxane (PDMS) chip and the oxidation of glucose was catalyzed with the aid of an enzymatic reaction. Oxidized glucose produces a brown color with the help of chromogen during enzymatic reaction and the color density varies with the glucose concentration. Photons pass through the PDMS chip with varying color density and hit the sensor surface. Photon count was recognized by CMOS image sensor depending on the color density with respect to the glucose concentration and it was converted into digital form. By correlating the obtained digital results with glucose concentration it is possible to measure a wide range of blood glucose levels with great linearity based on CMOS image sensor and therefore this technique will promote a convenient point-of-care diagnosis.

  8. Fully CMOS-compatible titanium nitride nanoantennas

    Energy Technology Data Exchange (ETDEWEB)

    Briggs, Justin A., E-mail: jabriggs@stanford.edu [Department of Applied Physics, Stanford University, 348 Via Pueblo Mall, Stanford, California 94305 (United States); Department of Materials Science and Engineering, Stanford University, 496 Lomita Mall, Stanford, California 94305 (United States); Naik, Gururaj V.; Baum, Brian K.; Dionne, Jennifer A. [Department of Materials Science and Engineering, Stanford University, 496 Lomita Mall, Stanford, California 94305 (United States); Petach, Trevor A.; Goldhaber-Gordon, David [Department of Physics, Stanford University, 382 Via Pueblo Mall, Stanford, California 94305 (United States)

    2016-02-01

    CMOS-compatible fabrication of plasmonic materials and devices will accelerate the development of integrated nanophotonics for information processing applications. Using low-temperature plasma-enhanced atomic layer deposition (PEALD), we develop a recipe for fully CMOS-compatible titanium nitride (TiN) that is plasmonic in the visible and near infrared. Films are grown on silicon, silicon dioxide, and epitaxially on magnesium oxide substrates. By optimizing the plasma exposure per growth cycle during PEALD, carbon and oxygen contamination are reduced, lowering undesirable loss. We use electron beam lithography to pattern TiN nanopillars with varying diameters on silicon in large-area arrays. In the first reported single-particle measurements on plasmonic TiN, we demonstrate size-tunable darkfield scattering spectroscopy in the visible and near infrared regimes. The optical properties of this CMOS-compatible material, combined with its high melting temperature and mechanical durability, comprise a step towards fully CMOS-integrated nanophotonic information processing.

  9. Criminal psychological profiling of serial arson crimes.

    Science.gov (United States)

    Kocsis, Richard N; Cooksey, Ray W

    2002-12-01

    The practice of criminal psychological profiling is frequently cited as being applicable to serial arson crimes. Despite this claim, there does not appear to be any empirical research that examines serial arson offence behaviors in the context of profiling. This study seeks to develop an empirical model of serial arsonist behaviors that can be systematically associated with probable offender characteristics. Analysis has produced a model of offence behaviors that identify four discrete behavior patterns, all of which share a constellation of common nondiscriminatory behaviors. The inherent behavioral themes of each of these patterns are explored with discussion of their broader implications for our understanding of serial arson and directions for future research.

  10. CMOS-compatible spintronic devices: a review

    Science.gov (United States)

    Makarov, Alexander; Windbacher, Thomas; Sverdlov, Viktor; Selberherr, Siegfried

    2016-11-01

    For many decades CMOS devices have been successfully scaled down to achieve higher speed and increased performance of integrated circuits at lower cost. Today’s charge-based CMOS electronics encounters two major challenges: power dissipation and variability. Spintronics is a rapidly evolving research and development field, which offers a potential solution to these issues by introducing novel ‘more than Moore’ devices. Spin-based magnetoresistive random-access memory (MRAM) is already recognized as one of the most promising candidates for future universal memory. Magnetic tunnel junctions, the main elements of MRAM cells, can also be used to build logic-in-memory circuits with non-volatile storage elements on top of CMOS logic circuits, as well as versatile compact on-chip oscillators with low power consumption. We give an overview of CMOS-compatible spintronics applications. First, we present a brief introduction to the physical background considering such effects as magnetoresistance, spin-transfer torque (STT), spin Hall effect, and magnetoelectric effects. We continue with a comprehensive review of the state-of-the-art spintronic devices for memory applications (STT-MRAM, domain wall-motion MRAM, and spin-orbit torque MRAM), oscillators (spin torque oscillators and spin Hall nano-oscillators), logic (logic-in-memory, all-spin logic, and buffered magnetic logic gate grid), sensors, and random number generators. Devices with different types of resistivity switching are analyzed and compared, with their advantages highlighted and challenges revealed. CMOS-compatible spintronic devices are demonstrated beginning with predictive simulations, proceeding to their experimental confirmation and realization, and finalized by the current status of application in modern integrated systems and circuits. We conclude the review with an outlook, where we share our vision on the future applications of the prospective devices in the area.

  11. CMOS MEMS capacitive absolute pressure sensor

    International Nuclear Information System (INIS)

    Narducci, M; Tsai, J; Yu-Chia, L; Fang, W

    2013-01-01

    This paper presents the design, fabrication and characterization of a capacitive pressure sensor using a commercial 0.18 µm CMOS (complementary metal–oxide–semiconductor) process and postprocess. The pressure sensor is capacitive and the structure is formed by an Al top electrode enclosed in a suspended SiO 2 membrane, which acts as a movable electrode against a bottom or stationary Al electrode fixed on the SiO 2 substrate. Both the movable and fixed electrodes form a variable parallel plate capacitor, whose capacitance varies with the applied pressure on the surface. In order to release the membranes the CMOS layers need to be applied postprocess and this mainly consists of four steps: (1) deposition and patterning of PECVD (plasma-enhanced chemical vapor deposition) oxide to protect CMOS pads and to open the pressure sensor top surface, (2) etching of the sacrificial layer to release the suspended membrane, (3) deposition of PECVD oxide to seal the etching holes and creating vacuum inside the gap, and finally (4) etching of the passivation oxide to open the pads and allow electrical connections. This sensor design and fabrication is suitable to obey the design rules of a CMOS foundry and since it only uses low-temperature processes, it allows monolithic integration with other types of CMOS compatible sensors and IC (integrated circuit) interface on a single chip. Experimental results showed that the pressure sensor has a highly linear sensitivity of 0.14 fF kPa −1 in the pressure range of 0–300 kPa. (paper)

  12. “Suicide Heights”: Council Estates As Sites Of Entrapment And Resistance In Hello Mum

    Directory of Open Access Journals (Sweden)

    Sebnem Toplu

    2014-02-01

    Full Text Available Council estates have been contestable social spaces of contemporary urban life in metropolitan cities like London and the marginalizing spatial experience they provide for the “working class” has been a problematic topic for many disciplines like architecture, sociology, psychology and literature. Considering the significance of space for the body in literary works, this essay analyses the black British woman writer Bernardine Evaristo’s fifth work, Hello Mum, a short-fiction, which revolves primarily around a fourteen-year-old black teenager Jerome’s tragic experience in a council estate in London. In this essay, scrutinizing Bernardine Evaristo’s novella Hello Mum and inhabiting a council estate as a challenging spatial experience, I suggest the teenager victim Jerome’s narrative reveals a kind of physical and psychological entrapment and resistance to the dominant ideology of the council estates, offers an alternative perception for the black people who are obliged to live in such marginalized places.

  13. Diode-pumped laser amplifiers: application to 0.946 {mu}m Nd:YAG

    Energy Technology Data Exchange (ETDEWEB)

    Barnes, Norman P [NASA Langley Research Center, Hampton, VA 23681 (United States); Axenson, Theresa J [Science and Technology Corporation, 10 Basil Sawyer Drive, Hampton, VA 23666 (United States); Jr, Donald J Reichle [NASA Langley Research Center, Hampton, VA 23681 (United States); Walsh, Brian M [NASA Langley Research Center, Hampton, VA 23681 (United States)

    2003-03-14

    A diode-pumped laser amplifier model is derived from first principles and applied to a Nd:YAG amplifier operating on the {sup 4}F{sub 3/2} to {sup 4}I{sub 9/2} transition at 0.946 {mu}m. The effects of amplified spontaneous emission are included in the model and the addition of this effect is shown to produce better agreement with the data. The amplifier model includes effects of the transverse and longitudinal variation of the pump beam, transverse and longitudinal variation of the probe beam, and multiple passes of the probe beam. Experimental results obtained with a quasi four-level Nd:YAG amplifier operating at 0.946 {mu}m are used to validate the model. The amplifier was evaluated as a function of the pump energy, the probe energy, the probe beam radius, the pulse repetition frequency and the temperature. For all of the experimental conditions, the experimental results and the model agree.

  14. A CMOS 0.13 mu m, 5-Gb/s laser driver for high energy physics applications

    CERN Document Server

    Mazza, G; Moreira, P; Rivetti, A; Soos, C; Troska, J; Wyllie, K

    2012-01-01

    The GigaBit Laser Driver (GBLD) is a radiation tolerant ASIC designed to drive both edge emitting lasers and VCSELs at data rates up to 5 Gb/s. It is part of the GigaBit Transceiver (GBT) and Versatile Link projects, which are designing a bi-directional optical data transmission system capable of operating in the radiation environment of a typical HEP experiment. The GBLD can provide laser diode modulation currents up to 24 mA and laser bias currents up to 43 mA. Pre- and de-emphasis functions are implemented to compensate for high external capacitive loads and asymmetric laser response. The chip, designed in a 0.13 $\\mu$m CMOS technology, is powered by a single 2.5 V power supply and can be programmed via an $I2C$ interface.

  15. A 900 MHz, 21 dBm CMOS linear power amplifier with 35% PAE for RFID readers

    Energy Technology Data Exchange (ETDEWEB)

    Han Kefeng; Cao Shengguo; Tan Xi; Yan Na; Wang Junyu; Tang Zhangwen; Min Hao, E-mail: tanxi@fudan.edu.cn [State Key Laboratory of ASIC and System, Fudan University, Shanghai 201203 (China)

    2010-12-15

    A two-stage differential linear power amplifier (PA) fabricated by 0.18 {mu}m CMOS technology is presented. An output matching and harmonic termination network is exploited to enhance the output power, efficiency and harmonic performance. Measurements show that the designed PA reaches a saturated power of 21.1 dBm and the peak power added efficiency (PAE) is 35.4%, the power gain is 23.3 dB from a power supply of 1.8 V and the harmonics are well controlled. The total area with ESD protected PAD is 1.2 x 0.55 mm{sup 2}. System measurements also show that this power amplifier meets the design specifications and can be applied for RFID reader. (semiconductor integrated circuits)

  16. Scientific and Technical Serials Holdings Optimization in an Inefficient Market: A LSU Serials Redesign Project Exercise.

    Science.gov (United States)

    Bensman, Stephen J.; Wilder, Stanley J.

    1998-01-01

    Analyzes the structure of the library market for scientific and technical (ST) serials. Describes an exercise aimed at a theoretical reconstruction of the ST-serials holdings of Louisiana State University (LSU) Libraries. Discusses the set definitions, measures, and algorithms necessary in the design of a computer program to appraise ST serials.…

  17. Serial Position Functions in General Knowledge

    Science.gov (United States)

    Kelley, Matthew R.; Neath, Ian; Surprenant, Aimée M.

    2015-01-01

    Serial position functions with marked primacy and recency effects are ubiquitous in episodic memory tasks. The demonstrations reported here explored whether bow-shaped serial position functions would be observed when people ordered exemplars from various categories along a specified dimension. The categories and dimensions were: actors and age;…

  18. The Serial Murderer's Motivations: An Interdisciplinary Review.

    Science.gov (United States)

    DeHart, Dana D.; Mahoney, John M.

    1994-01-01

    Defines serial killer as individual who murders two or more victims over an extended period of time, ranging from days to years, with the crimes often being sexually motivated. Reviews existing motivational theories of serial murder and proposes additional explications from range of disciplines. Presents suggestions for future research and…

  19. Modus operandi of female serial killers.

    Science.gov (United States)

    Wilson, W; Hilton, T

    1998-04-01

    The modus operandi of female serial killers was examined from a chronology of 58 cases in America and 47 cases in 17 other countries, compiled over 25-year intervals. Female serial killers in other countries accounted for a disproportionately greater number of victims, but those in America managed a longer killing career when associated with a low profile modus operandi.

  20. Female serial killing: review and case report.

    Science.gov (United States)

    Frei, Andreas; Völlm, Birgit; Graf, Marc; Dittmann, Volker

    2006-01-01

    Single homicide committed by women is rare. Serial killing is very infrequent, and the perpetrators are usually white, intelligent males with sadistic tendencies. Serial killing by women has, however, also been described. To conduct a review of published literature on female serial killers and consider its usefulness in assessing a presenting case. A literature review was conducted, after searching EMBASE, MEDLINE and PsycINFO. The presenting clinical case is described in detail in the context of the literature findings. Results The literature search revealed few relevant publications. Attempts to categorize the phenomenon of female serial killing according to patterns of and motives for the homicides have been made by some authors. The most common motive identified was material gain or similar extrinsic gratification while the 'hedonistic' sadistic or sexual serial killer seems to be extremely rare in women. There is no consistent theory of serial killing by women, but psychopathic personality traits and abusive childhood experiences have consistently been observed. The authors' case did not fit the description of a 'typical' female serial killer. In such unusual circumstances as serial killing by a woman, detailed individual case formulation is required to make sense of the psychopathology in each case. Publication of cases in scientific journals should be encouraged to advance our understanding of this phenomenon. Copyright (c) 2006 John Wiley & Sons, Ltd.

  1. Reframing Serial Murder Within Empirical Research.

    Science.gov (United States)

    Gurian, Elizabeth A

    2017-04-01

    Empirical research on serial murder is limited due to the lack of consensus on a definition, the continued use of primarily descriptive statistics, and linkage to popular culture depictions. These limitations also inhibit our understanding of these offenders and affect credibility in the field of research. Therefore, this comprehensive overview of a sample of 508 cases (738 total offenders, including partnered groups of two or more offenders) provides analyses of solo male, solo female, and partnered serial killers to elucidate statistical differences and similarities in offending and adjudication patterns among the three groups. This analysis of serial homicide offenders not only supports previous research on offending patterns present in the serial homicide literature but also reveals that empirically based analyses can enhance our understanding beyond traditional case studies and descriptive statistics. Further research based on these empirical analyses can aid in the development of more accurate classifications and definitions of serial murderers.

  2. A Serializer ASIC at 5 Gbps for Detector Front-end Electronics Readout

    CERN Document Server

    Gong, D; The ATLAS collaboration; Liu, T; Xiang, A; Ye, J

    2010-01-01

    High speed and ultra low power serial data transmission over fiber optics plays an essential roll in detector front-end electronics readout for experiments at the LHC. The ATLAS Liquid Argon Calorimeter front-end readout upgrade for the sLHC calls for an optical link system with a data bandwidth of 100 Gbps per each front-end board (FEB), a factor of 62 increase compared with the present optical link system. The transmitter of this optical link will have to withstand the radiation environment where the front-end crates are situated, and stay within the current power dissipation budget limited by the present FEB cooling capacity. To meet these challenges, we developed a 16:1 serializer based on a commercial 0.25 μm silicon-on-sapphire (SOS) CMOS technology. This serializer, designed to work at 5 Gbps, is a key component in an optical link system. Test results of this ASIC will be reported. A system design for the 100 Gbps optical link system will also be presented, with discussions about key components identi...

  3. Post-CMOS selective electroplating technique for the improvement of CMOS-MEMS accelerometers

    International Nuclear Information System (INIS)

    Liu, Yu-Chia; Tsai, Ming-Han; Fang, Weileun; Tang, Tsung-Lin

    2011-01-01

    This study presents a simple approach to improve the performance of the CMOS-MEMS capacitive accelerometer by means of the post-CMOS metal electroplating process. The metal layer can be selectively electroplated on the MEMS structures at low temperature and the thickness of the metal layer can be easily adjusted by this process. Thus the performance of the capacitive accelerometer (i.e. sensitivity, noise floor and the minimum detectable signal) can be improved. In application, the proposed accelerometers have been implemented using (1) the standard CMOS 0.35 µm 2P4M process by CMOS foundry, (2) Ti/Au seed layers deposition/patterning by MEMS foundry and (3) in-house post-CMOS electroplating and releasing processes. Measurements indicate that the sensitivity is improved 2.85-fold, noise is decreased near 1.7-fold and the minimum detectable signal is improved from 1 to 0.2 G after nickel electroplating. Moreover, unwanted structure deformation due to the temperature variation is significantly suppressed by electroplated nickel.

  4. Serial killers with military experience: applying learning theory to serial murder.

    Science.gov (United States)

    Castle, Tammy; Hensley, Christopher

    2002-08-01

    Scholars have endeavored to study the motivation and causality behind serial murder by researching biological, psychological, and sociological variables. Some of these studies have provided support for the relationship between these variables and serial murder. However, the study of serial murder continues to be an exploratory rather than explanatory research topic. This article examines the possible link between serial killers and military service. Citing previous research using social learning theory for the study of murder, this article explores how potential serial killers learn to reinforce violence, aggression, and murder in military boot camps. As with other variables considered in serial killer research, military experience alone cannot account for all cases of serial murder. Future research should continue to examine this possible link.

  5. Distributed CMOS Bidirectional Amplifiers Broadbanding and Linearization Techniques

    CERN Document Server

    El-Khatib, Ziad; Mahmoud, Samy A

    2012-01-01

    This book describes methods to design distributed amplifiers useful for performing circuit functions such as duplexing, paraphrase amplification, phase shifting power splitting and power combiner applications.  A CMOS bidirectional distributed amplifier is presented that combines for the first time device-level with circuit-level linearization, suppressing the third-order intermodulation distortion. It is implemented in 0.13μm RF CMOS technology for use in highly linear, low-cost UWB Radio-over-Fiber communication systems. Describes CMOS distributed amplifiers for optoelectronic applications such as Radio-over-Fiber systems, base station transceivers and picocells; Presents most recent techniques for linearization of CMOS distributed amplifiers; Includes coverage of CMOS I-V transconductors, as well as CMOS on-chip inductor integration and modeling; Includes circuit applications for UWB Radio-over-Fiber networks.

  6. An Implantable CMOS Amplifier for Nerve Signals

    DEFF Research Database (Denmark)

    Nielsen, Jannik Hammel; Lehmann, Torsten

    2001-01-01

    In this paper, a low noise high gain CMOS amplifier for minute nerve signals is presented. By using a mixture of weak- and strong inversion transistors, optimal noise suppression in the amplifier is achieved. A continuous-time offset-compensation technique is utilized in order to minimize impact...... on the amplifier input nodes. The method for signal recovery from noisy nerve signals is presented. A prototype amplifier is realized in a standard digital 0.5 μm CMOS single poly, n-well process. The prototype amplifier features a gain of 80 dB over a 3.6 kHz bandwidth, a CMRR of more than 87 dB and a PSRR...

  7. Desenvolvimento de uma matriz de portas CMOS

    OpenAIRE

    Jose Geraldo Mendes Taveira

    1991-01-01

    Resumo: É apresentado o projeto de uma matriz deportas CMOS. O capítulo 11 descreve as etapas de projeto, incluindo desde a escolha da topologia das células internas e de interface, o projeto e a simulação elétrica, até a geração do lay-out. Ocaprtulo III apresenta o projeto dos circuitos de aplicação, incluídos para permitir a validação da matriz. Os circuitos de apl icação são : Oscilador em anel e comparador de códigos. A matriz foi difundida no Primeiro Projeto Multi-Usuário CMOS Brasile...

  8. CMOS SPDT switch for WLAN applications

    International Nuclear Information System (INIS)

    Bhuiyan, M A S; Reaz, M B I; Rahman, L F; Minhad, K N

    2015-01-01

    WLAN has become an essential part of our today's life. The advancement of CMOS technology let the researchers contribute low power, size and cost effective WLAN devices. This paper proposes a single pole double through transmit/receive (T/R) switch for WLAN applications in 0.13 μm CMOS technology. The proposed switch exhibit 1.36 dB insertion loss, 25.3 dB isolation and 24.3 dBm power handling capacity. Moreover, it only dissipates 786.7 nW power per cycle. The switch utilizes only transistor aspect ratio optimization and resistive body floating technique to achieve such desired performance. In this design the use of bulky inductor and capacitor is avoided to evade imposition of unwanted nonlinearities to the communication signal. (paper)

  9. Cmos spdt switch for wlan applications

    Science.gov (United States)

    Bhuiyan, M. A. S.; Reaz, M. B. I.; Rahman, L. F.; Minhad, K. N.

    2015-04-01

    WLAN has become an essential part of our today's life. The advancement of CMOS technology let the researchers contribute low power, size and cost effective WLAN devices. This paper proposes a single pole double through transmit/receive (T/R) switch for WLAN applications in 0.13 μm CMOS technology. The proposed switch exhibit 1.36 dB insertion loss, 25.3 dB isolation and 24.3 dBm power handling capacity. Moreover, it only dissipates 786.7 nW power per cycle. The switch utilizes only transistor aspect ratio optimization and resistive body floating technique to achieve such desired performance. In this design the use of bulky inductor and capacitor is avoided to evade imposition of unwanted nonlinearities to the communication signal.

  10. Serial powering of pixel modules

    International Nuclear Information System (INIS)

    Stockmanns, Tobias; Fischer, Peter; Huegging, Fabian; Peric, Ivan; Runolfsson, O.; Wermes, Norbert

    2003-01-01

    Modern pixel detectors for the next generation of high-energy collider experiments like LHC use readout electronics in deep sub-micron technology. Chips in this technology need a low supply voltage of 2-2.5 V alongside high current consumption to achieve the desired performance. The high supply current leads to significant voltage drops in the long and low mass supply cables so that voltage fluctuations at the chips are induced, when the supply current changes. This problem scales with the number of modules when connected in parallel to the power supplies. An alternative powering scheme connects several modules in series resulting in a higher supply voltage but a lower current consumption of the chain and therefore a much lower voltage drop in the cables. In addition the amount of cables needed to supply the detector is vastly reduced. The concept and features of serial powering are presented and studies of the implementation of this technology as an alternative for the ATLAS pixel detector are shown. In particular, it is shown that the potential risk of powering in series can be addressed and eliminated

  11. Serial powering of pixel modules

    CERN Document Server

    Stockmanns, Tobias; Hügging, Fabian Georg; Peric, I; Runólfsson, O; Wermes, Norbert

    2003-01-01

    Modern pixel detectors for the next generation of high-energy collider experiments like LHC use readout electronics in deep sub- micron technology. Chips in this technology need a low supply voltage of 2-2.5 V alongside high current consumption to achieve the desired performance. The high supply current leads to significant voltage drops in the long and low mass supply cables so that voltage fluctuations at the chips are induced, when the supply current changes. This problem scales with the number of modules when connected in parallel to the power supplies. An alternative powering scheme connects several modules in series resulting in a higher supply voltage but a lower current consumption of the chain and therefore a much lower voltage drop in the cables. In addition the amount of cables needed to supply the detector is vastly reduced. The concept and features of serial powering are presented and studies of the implementation of this technology as an alternative for the ATLAS pixel detector are shown. In par...

  12. Registration of Large Motion Blurred CMOS Images

    Science.gov (United States)

    2017-08-28

    raju@ee.iitm.ac.in - Institution : Indian Institute of Technology (IIT) Madras, India - Mailing Address : Room ESB 307c, Dept. of Electrical ...AFRL-AFOSR-JP-TR-2017-0066 Registration of Large Motion Blurred CMOS Images Ambasamudram Rajagopalan INDIAN INSTITUTE OF TECHNOLOGY MADRAS Final...NUMBER 5f.  WORK UNIT NUMBER 7. PERFORMING ORGANIZATION NAME(S) AND ADDRESS(ES) INDIAN INSTITUTE OF TECHNOLOGY MADRAS SARDAR PATEL ROAD Chennai, 600036

  13. The CMOS Integration of a Power Inverter

    OpenAIRE

    Mannarino, Eric Francis

    2016-01-01

    Due to their falling costs, the use of renewable energy systems is expanding around the world. These systems require the conversion of DC power into grid-synchronous AC power. Currently, the inverters that carry out this task are built using discrete transistors. TowerJazz Semiconductor Corp. has created a commercial CMOS process that allows for blocking voltages of up to 700 V, effectively removing the barrier to integrating power inverters onto a single chip. This thesis explores this proce...

  14. Advanced CMOS Radiation Effects Testing and Analysis

    Science.gov (United States)

    Pellish, J. A.; Marshall, P. W.; Rodbell, K. P.; Gordon, M. S.; LaBel, K. A.; Schwank, J. R.; Dodds, N. A.; Castaneda, C. M.; Berg, M. D.; Kim, H. S.; hide

    2014-01-01

    Presentation at the annual NASA Electronic Parts and Packaging (NEPP) Program Electronic Technology Workshop (ETW). The material includes an update of progress in this NEPP task area over the past year, which includes testing, evaluation, and analysis of radiation effects data on the IBM 32 nm silicon-on-insulator (SOI) complementary metal oxide semiconductor (CMOS) process. The testing was conducted using test vehicles supplied by directly by IBM.

  15. Plasmonic Modulator Using CMOS Compatible Material Platform

    DEFF Research Database (Denmark)

    Babicheva, Viktoriia; Kinsey, Nathaniel; Naik, Gururaj V.

    2014-01-01

    In this work, a design of ultra-compact plasmonic modulator is proposed and numerically analyzed. The device l ayout utilizes alternative plas monic materials such as tr ansparent conducting oxides and titanium nitride which potentially can be applied for CMOS compatible process. The modulation i...... for integration with existing insulator-metal-insu lator plasmonic waveguides as well as novel photonic/electronic hybrid circuits...

  16. Ultra-low Voltage CMOS Cascode Amplifier

    OpenAIRE

    Lehmann, Torsten; Cassia, Marco

    2000-01-01

    In this paper, we design a folded cascode operational transconductance amplifier in a standard CMOS process, which has a measured 69 dB DC gain, a 2 MHz bandwidth and compatible input- and output voltage levels at a 1 V power supply. This is done by a novel Current Driven Bulk (CDB) technique, which reduces the MOST threshold voltage by forcing a constant current though the transistor bulk terminal. We also look at limitations and improvements of this CDB technique.

  17. Aging sensor for CMOS memory cells

    OpenAIRE

    Santos, Hugo Fernandes da Silva

    2016-01-01

    Dissertação de Mestrado, Engenharia e Tecnologia, Instituto Superior de Engenharia, Universidade do Algarve, 2016 As memórias Complementary Metal Oxide Semiconductor (CMOS) ocupam uma percentagem de área significativa nos circuitos integrados e, com o desenvolvimento de tecnologias de fabrico a uma escala cada vez mais reduzida, surgem problemas de performance e de fiabilidade. Efeitos como o BTI (Bias Thermal Instability), TDDB (Time Dependent Dielectric Breakdown), HCI (Hot Carrier Injec...

  18. Ultra-low Voltage CMOS Cascode Amplifier

    DEFF Research Database (Denmark)

    Lehmann, Torsten; Cassia, Marco

    2000-01-01

    In this paper, we design a folded cascode operational transconductance amplifier in a standard CMOS process, which has a measured 69 dB DC gain, a 2 MHz bandwidth and compatible input- and output voltage levels at a 1 V power supply. This is done by a novel Current Driven Bulk (CDB) technique......, which reduces the MOST threshold voltage by forcing a constant current though the transistor bulk terminal. We also look at limitations and improvements of this CDB technique....

  19. Real-time reconfigurable devices implemented in UV-light programmable floating-gate CMOS

    Energy Technology Data Exchange (ETDEWEB)

    Aunet, Snorre

    2002-06-01

    This dissertation describes using theory, computer simulations and laboratory measurements a new class of real time reconfigurable UV-programmable floating-gate circuits operating with current levels typically in the pA to {mu}A range, implemented in a standard double-poly CMOS technology. A new design method based on using the same basic two-MOSFET circuits extensively is proposed, meant for improving the opportunities to make larger FGUVMOS circuitry than previously reported. By using the same basic circuitry extensively, instead of different circuitry for basic digital functions, the goal is to ease UV-programming and test and save circuitry on chip and I/O-pads. Matching of circuitry should also be improved by using this approach. Compact circuitry can be made, reducing wiring and active components. Compared to earlier FGUVMOS approaches the number of transistors for implementing the CARRY' of a FULL-ADDER is reduced from 22 to 2. A complete FULL-ADDER can be implemented using only 8 transistors. 2-MOSFET circuits able to implement CARRY', NOR, NAND and INVERT functions are demonstrated by measurements on chip, working with power supply voltages ranging from 800 mV down to 93 mV. An 8-transistor FULL-ADDER might use 2500 times less energy than a FULL-ADDER implemented using standard cells in the same 0.6 {mu}m CMOS technology while running at 1 MHz. The circuits are also shown to be a new class of linear threshold elements, which is the basic building blocks of neural networks. Theory is developed as a help in the design of floating-gate circuits.

  20. CMOS Imaging of Pin-Printed Xerogel-Based Luminescent Sensor Microarrays.

    Science.gov (United States)

    Yao, Lei; Yung, Ka Yi; Khan, Rifat; Chodavarapu, Vamsy P; Bright, Frank V

    2010-12-01

    We present the design and implementation of a luminescence-based miniaturized multisensor system using pin-printed xerogel materials which act as host media for chemical recognition elements. We developed a CMOS imager integrated circuit (IC) to image the luminescence response of the xerogel-based sensor array. The imager IC uses a 26 × 20 (520 elements) array of active pixel sensors and each active pixel includes a high-gain phototransistor to convert the detected optical signals into electrical currents. The imager includes a correlated double sampling circuit and pixel address/digital control circuit; the image data is read-out as coded serial signal. The sensor system uses a light-emitting diode (LED) to excite the target analyte responsive luminophores doped within discrete xerogel-based sensor elements. As a prototype, we developed a 4 × 4 (16 elements) array of oxygen (O 2 ) sensors. Each group of 4 sensor elements in the array (arranged in a row) is designed to provide a different and specific sensitivity to the target gaseous O 2 concentration. This property of multiple sensitivities is achieved by using a strategic mix of two oxygen sensitive luminophores ([Ru(dpp) 3 ] 2+ and ([Ru(bpy) 3 ] 2+ ) in each pin-printed xerogel sensor element. The CMOS imager consumes an average power of 8 mW operating at 1 kHz sampling frequency driven at 5 V. The developed prototype system demonstrates a low cost and miniaturized luminescence multisensor system.

  1. A CMOS frontend chip for implantable neural recording with wide voltage supply range

    International Nuclear Information System (INIS)

    Liu Jialin; Zhang Xu; Hu Xiaohui; Li Peng; Liu Ming; Chen Hongda; Guo Yatao; Li Bin

    2015-01-01

    A design for a CMOS frontend integrated circuit (chip) for neural signal acquisition working at wide voltage supply range is presented in this paper. The chip consists of a preamplifier, a serial instrumental amplifier (IA) and a cyclic analog-to-digital converter (CADC). The capacitive-coupled and capacitive-feedback topology combined with MOS-bipolar pseudo-resistor element is adopted in the preamplifier to create a −3 dB upper cut-off frequency less than 1 Hz without using a ponderous discrete device. A dual-amplifier instrumental amplifier is used to provide a low output impedance interface for ADC as well as to boost the gain. The preamplifier and the serial instrumental amplifier together provide a midband gain of 45.8 dB and have an input-referred noise of 6.7 μV rms integrated from 1 Hz to 5 kHz. The ADC digitizes the amplified signal at 12-bits precision with a highest sampling rate of 130 kS/s. The measured effective number of bits (ENOB) of the ADC is 8.7 bits. The entire circuit draws 165 to 216 μA current from the supply voltage varied from 1.34 to 3.3 V. The prototype chip is fabricated in the 0.18-μm CMOS process and occupies an area of 1.23 mm 2 (including pads). In-vitro recording was successfully carried out by the proposed frontend chip. (paper)

  2. A CMOS frontend chip for implantable neural recording with wide voltage supply range

    Science.gov (United States)

    Jialin, Liu; Xu, Zhang; Xiaohui, Hu; Yatao, Guo; Peng, Li; Ming, Liu; Bin, Li; Hongda, Chen

    2015-10-01

    A design for a CMOS frontend integrated circuit (chip) for neural signal acquisition working at wide voltage supply range is presented in this paper. The chip consists of a preamplifier, a serial instrumental amplifier (IA) and a cyclic analog-to-digital converter (CADC). The capacitive-coupled and capacitive-feedback topology combined with MOS-bipolar pseudo-resistor element is adopted in the preamplifier to create a -3 dB upper cut-off frequency less than 1 Hz without using a ponderous discrete device. A dual-amplifier instrumental amplifier is used to provide a low output impedance interface for ADC as well as to boost the gain. The preamplifier and the serial instrumental amplifier together provide a midband gain of 45.8 dB and have an input-referred noise of 6.7 μVrms integrated from 1 Hz to 5 kHz. The ADC digitizes the amplified signal at 12-bits precision with a highest sampling rate of 130 kS/s. The measured effective number of bits (ENOB) of the ADC is 8.7 bits. The entire circuit draws 165 to 216 μA current from the supply voltage varied from 1.34 to 3.3 V. The prototype chip is fabricated in the 0.18-μm CMOS process and occupies an area of 1.23 mm2 (including pads). In-vitro recording was successfully carried out by the proposed frontend chip. Project supported by the National Natural Science Foundation of China (Nos. 61474107, 61372060, 61335010, 61275200, 61178051) and the Key Program of the Chinese Academy of Sciences (No. KJZD-EW-L11-01).

  3. MEMS capacitive pressure sensor monolithically integrated with CMOS readout circuit by using post CMOS processes

    Science.gov (United States)

    Jang, Munseon; Yun, Kwang-Seok

    2017-12-01

    In this paper, we presents a MEMS pressure sensor integrated with a readout circuit on a chip for an on-chip signal processing. The capacitive pressure sensor is formed on a CMOS chip by using a post-CMOS MEMS processes. The proposed device consists of a sensing capacitor that is square in shape, a reference capacitor and a readout circuitry based on a switched-capacitor scheme to detect capacitance change at various environmental pressures. The readout circuit was implemented by using a commercial 0.35 μm CMOS process with 2 polysilicon and 4 metal layers. Then, the pressure sensor was formed by wet etching of metal 2 layer through via hole structures. Experimental results show that the MEMS pressure sensor has a sensitivity of 11 mV/100 kPa at the pressure range of 100-400 kPa.

  4. CMOS image sensors: State-of-the-art

    Science.gov (United States)

    Theuwissen, Albert J. P.

    2008-09-01

    This paper gives an overview of the state-of-the-art of CMOS image sensors. The main focus is put on the shrinkage of the pixels : what is the effect on the performance characteristics of the imagers and on the various physical parameters of the camera ? How is the CMOS pixel architecture optimized to cope with the negative performance effects of the ever-shrinking pixel size ? On the other hand, the smaller dimensions in CMOS technology allow further integration on column level and even on pixel level. This will make CMOS imagers even smarter that they are already.

  5. Development of a Depleted Monolithic CMOS Sensor in a 150 nm CMOS Technology for the ATLAS Inner Tracker Upgrade

    CERN Document Server

    Wang, T.

    2017-01-01

    The recent R&D focus on CMOS sensors with charge collection in a depleted zone has opened new perspectives for CMOS sensors as fast and radiation hard pixel devices. These sensors, labelled as depleted CMOS sensors (DMAPS), have already shown promising performance as feasible candidates for the ATLAS Inner Tracker (ITk) upgrade, possibly replacing the current passive sensors. A further step to exploit the potential of DMAPS is to investigate the suitability of equipping the outer layers of the ATLAS ITk upgrade with fully monolithic CMOS sensors. This paper presents the development of a depleted monolithic CMOS pixel sensor designed in the LFoundry 150 nm CMOS technology, with the focus on design details and simulation results.

  6. The Productivity Advantage of Serial Entrepreneurs

    DEFF Research Database (Denmark)

    Shaw, Kathryn L.; Sørensen, Anders

    Serial entrepreneurs, who open more than one business, are found to have higher sales and higher productivity than novice entrepreneurs, who open one business. Using panel data on entrepreneurs and their firms from Denmark for 2001-2013, the serial entrepreneur has 67% higher sales than the novice......, but also opens firms that are larger in terms of the initial capital and labor, and thus is 39% more productive. There are subsets of firms that perform especially well – serial entrepreneurs that hold a portfolio of overlapping ongoing firms perform the best, as do those that open as limited liability...

  7. The American Serialization of Lord Jim

    Directory of Open Access Journals (Sweden)

    Stephen Donovan

    2017-12-01

    Full Text Available This essay presents the discovery of the American serialization of Joseph Conrad’s Lord Jim in New York’s Evening Telegram in 1903. This ‘lost’ serialization, it argues, invites a new perspective on Conrad’s early career by foregrounding the role of newspaper serialization and syndication in establishing his literary standing. After surveying the principal differences in the respective reading experiences of the periodical versus the book, it concludes by proposing that the prominence of women among Conrad’s first audiences requires us to reassess the basis for his success in North America and elsewhere.

  8. A 1.2 Gb/s Data Transmission Unit in CMOS 0.18 μm technology for the ALICE Inner Tracking System front-end ASIC

    Science.gov (United States)

    Mazza, G.; Aglieri Rinella, G.; Benotto, F.; Corrales Morales, Y.; Kugathasan, T.; Lattuca, A.; Lupi, M.; Ravasenga, I.

    2017-02-01

    The upgrade of the ALICE Inner Tracking System is based on a Monolithic Active Pixel Sensor and ASIC designed in a CMOS 0.18 μ m process. In order to provide the required output bandwidth (1.2 Gb/s for the inner layers and 400 Mb/s for the outer ones) on a single high speed serial link, a custom Data Transmission Unit (DTU) has been developed in the same process. The DTU includes a clock multiplier PLL, a double data rate serializer and a pseudo-LVDS driver with pre-emphasis and is designed to be SEU tolerant.

  9. Some Considerations on Seriality and Synchronicity

    OpenAIRE

    Elena Nechita

    2010-01-01

    This paper presents an overview of the results that have been obtained lately on seriality and synchronicity and their link, in the light of the new theories and within the frame of complexity science.

  10. Some Considerations on Seriality and Synchronicity

    Directory of Open Access Journals (Sweden)

    Elena Nechita

    2010-01-01

    Full Text Available This paper presents an overview of the results that have been obtained lately on seriality and synchronicity and their link, in the light of the new theories and within the frame of complexity science.

  11. BioCMOS Interfaces and Co-Design

    CERN Document Server

    Carrara, Sandro

    2013-01-01

    The application of CMOS circuits and ASIC VLSI systems to problems in medicine and system biology has led to the emergence of Bio/CMOS Interfaces and Co-Design as an exciting and rapidly growing area of research. The mutual inter-relationships between VLSI-CMOS design and the biophysics of molecules interfacing with silicon and/or onto metals has led to the emergence of the interdisciplinary engineering approach to Bio/CMOS interfaces. This new approach, facilitated by 3D circuit design and nanotechnology, has resulted in new concepts and applications for VLSI systems in the bio-world. This book offers an invaluable reference to the state-of-the-art in Bio/CMOS interfaces. It describes leading-edge research in the field of CMOS design and VLSI development for applications requiring integration of biological molecules onto the chip. It provides multidisciplinary content ranging from biochemistry to CMOS design in order to address Bio/CMOS interface co-design in bio-sensing applications.

  12. Cryo-CMOS Circuits and Systems for Quantum Computing Applications

    NARCIS (Netherlands)

    Patra, B; Incandela, R.M.; van Dijk, J.P.G.; Homulle, H.A.R.; Song, Lin; Shahmohammadi, M.; Staszewski, R.B.; Vladimirescu, A.; Babaie, M.; Sebastiano, F.; Charbon, E.E.E.

    2018-01-01

    A fault-tolerant quantum computer with millions of quantum bits (qubits) requires massive yet very precise control electronics for the manipulation and readout of individual qubits. CMOS operating at cryogenic temperatures down to 4 K (cryo-CMOS) allows for closer system integration, thus promising

  13. High performance flexible CMOS SOI FinFETs

    KAUST Repository

    Fahad, Hossain M.; Sevilla, Galo T.; Ghoneim, Mohamed T.; Hussain, Muhammad Mustafa

    2014-01-01

    We demonstrate the first ever CMOS compatible soft etch back based high performance flexible CMOS SOI FinFETs. The move from planar to non-planar FinFETs has enabled continued scaling down to the 14 nm technology node. This has been possible due

  14. First principle leakage current reduction technique for CMOS devices

    CSIR Research Space (South Africa)

    Tsague, HD

    2015-12-01

    Full Text Available This paper presents a comprehensive study of leakage reduction techniques applicable to CMOS based devices. In the process, mathematical equations that model the power-performance trade-offs in CMOS logic circuits are presented. From those equations...

  15. ENHANCED HEALING OF 30-MU-M GORE-TEX PTFE MICROARTERIAL PROSTHESES BY ALCOHOL-PRETREATMENT

    NARCIS (Netherlands)

    VANDERLEI, B; STRONCK, JW; WILDEVUUR, CRH

    1991-01-01

    Polytetrafluoroethylene (PTFE) microvascular prostheses with a fibril length of 30-mu-m were pretreated with alcohol (n = 18), implanted into the abdominal aorta of rats and were evaluated at 1 day (n = 3), 1 week (n = 3), 3 weeks (n = 6) and 6 weeks (n = 6) to determine whether alcohol-pretreatment

  16. Which Photodiode to Use: A Comparison of CMOS-Compatible Structures.

    Science.gov (United States)

    Murari, Kartikeya; Etienne-Cummings, Ralph; Thakor, Nitish; Cauwenberghs, Gert

    2009-07-01

    While great advances have been made in optimizing fabrication process technologies for solid state image sensors, the need remains to be able to fabricate high quality photosensors in standard CMOS processes. The quality metrics depend on both the pixel architecture and the photosensitive structure. This paper presents a comparison of three photodiode structures in terms of spectral sensitivity, noise and dark current. The three structures are n(+)/p-sub, n-well/p-sub and p(+)/n-well/p-sub. All structures were fabricated in a 0.5 mum 3-metal, 2-poly, n-well process and shared the same pixel and readout architectures. Two pixel structures were fabricated-the standard three transistor active pixel sensor, where the output depends on the photodiode capacitance, and one incorporating an in-pixel capacitive transimpedance amplifier where the output is dependent only on a designed feedback capacitor. The n-well/p-sub diode performed best in terms of sensitivity (an improvement of 3.5 x and 1.6 x over the n(+)/p-sub and p(+)/n-well/p-sub diodes, respectively) and signal-to-noise ratio (1.5 x and 1.2 x improvement over the n(+)/p-sub and p(+)/n-well/p-sub diodes, respectively) while the p(+)/n-well/p-sub diode had the minimum (33% compared to other two structures) dark current for a given sensitivity.

  17. 1-Gb/s zero-pole cancellation CMOS transimpedance amplifier for Gigabit Ethernet applications

    Energy Technology Data Exchange (ETDEWEB)

    Huang Beiju; Zhang Xu; Chen Hongda, E-mail: bjhuang@semi.ac.c [State Key Laboratory of Integrated Optoelectronics, Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083 (China)

    2009-10-15

    A zero-pole cancellation transimpedance amplifier (TIA) has been realized in 0.35 {mu}m RF CMOS technology for Gigabit Ethernet applications. The TIA exploits a zero-pole cancellation configuration to isolate the input parasitic capacitance including photodiode capacitance from bandwidth deterioration. Simulation results show that the proposed TIA has a bandwidth of 1.9 GHz and a transimpedance gain of 65 dB{center_dot}{Omega} for 1.5 pF photodiode capacitance, with a gain-bandwidth product of 3.4 THz{center_dot}{Omega}. Even with 2 pF photodiode capacitance, the bandwidth exhibits a decline of only 300 MHz, confirming the mechanism of the zero-pole cancellation configuration. The input resistance is 50 {Omega}, and the average input noise current spectral density is 9.7 pA/{radical}Hz. Testing results shows that the eye diagram at 1 Gb/s is wide open. The chip dissipates 17 mW under a single 3.3 V supply.

  18. Social cognitive mediators of the effect of the MobileMums intervention on physical activity.

    Science.gov (United States)

    Fjeldsoe, Brianna S; Miller, Yvette D; Marshall, Alison L

    2013-07-01

    To explore whether improvements in physical activity following the MobileMums intervention were mediated by changes in Social Cognitive Theory (SCT) constructs targeted in the intervention (barrier self efficacy, goal setting skills, outcome expectancy, social support, and perceived environmental opportunity for exercise). This paper also examined if the mediating constructs differed between initial (baseline to 6 weeks) and overall (baseline to 13 weeks) changes in physical activity. Secondary analysis of data from a randomized controlled trial involving 88 postnatal women (Exercise frequency was assessed using the Australian Women's Activity Survey and frequency of moderate-to-vigorous physical activity (MVPA) was assessed using a single-item question. Initial improvements in goal-setting skills mediated the relationship between experimental condition and initial changes in MVPA, αβ (95% CI) = 0.23(0.01, 0.59), and Walking for Exercise, αβ (95% CI) = 0.34(0.06, 0.73). Initial improvements in barrier self efficacy mediated the relationship between experimental condition and initial change in MVPA, αβ (95% CI) = 0.36(0.12, 0.65), but not Walking for Exercise. None of the SCT outcomes significantly mediated the relationship between experimental condition and overall (baseline to 13 weeks) change in frequency of MVPA or Walking for Exercise. Future interventions with postnatal women using SCT should target barrier self-efficacy and goal setting skills in order to increase physical activity. PsycINFO Database Record (c) 2013 APA, all rights reserved.

  19. Variation-aware advanced CMOS devices and SRAM

    CERN Document Server

    Shin, Changhwan

    2016-01-01

    This book provides a comprehensive overview of contemporary issues in complementary metal-oxide semiconductor (CMOS) device design, describing how to overcome process-induced random variations such as line-edge-roughness, random-dopant-fluctuation, and work-function variation, and the applications of novel CMOS devices to cache memory (or Static Random Access Memory, SRAM). The author places emphasis on the physical understanding of process-induced random variation as well as the introduction of novel CMOS device structures and their application to SRAM. The book outlines the technical predicament facing state-of-the-art CMOS technology development, due to the effect of ever-increasing process-induced random/intrinsic variation in transistor performance at the sub-30-nm technology nodes. Therefore, the physical understanding of process-induced random/intrinsic variations and the technical solutions to address these issues plays a key role in new CMOS technology development. This book aims to provide the reade...

  20. Simulations of depleted CMOS sensors for high-radiation environments

    CERN Document Server

    Liu, J.; Bhat, S.; Breugnon, P.; Caicedo, I.; Chen, Z.; Degerli, Y.; Godiot-Basolo, S.; Guilloux, F.; Hemperek, T.; Hirono, T.; Hügging, F.; Krüger, H.; Moustakas, K.; Pangaud, P.; Rozanov, A.; Rymaszewski, P.; Schwemling, P.; Wang, M.; Wang, T.; Wermes, N.; Zhang, L.

    2017-01-01

    After the Phase II upgrade for the Large Hadron Collider (LHC), the increased luminosity requests a new upgraded Inner Tracker (ITk) for the ATLAS experiment. As a possible option for the ATLAS ITk, a new pixel detector based on High Voltage/High Resistivity CMOS (HV/HR CMOS) technology is under study. Meanwhile, a new CMOS pixel sensor is also under development for the tracker of Circular Electron Position Collider (CEPC). In order to explore the sensor electric properties, such as the breakdown voltage and charge collection efficiency, 2D/3D Technology Computer Aided Design (TCAD) simulations have been performed carefully for the above mentioned both of prototypes. In this paper, the guard-ring simulation for a HV/HR CMOS sensor developed for the ATLAS ITk and the charge collection efficiency simulation for a CMOS sensor explored for the CEPC tracker will be discussed in details. Some comparisons between the simulations and the latest measurements will also be addressed.

  1. Decal electronics for printed high performance cmos electronic systems

    KAUST Repository

    Hussain, Muhammad Mustafa

    2017-11-23

    High performance complementary metal oxide semiconductor (CMOS) electronics are critical for any full-fledged electronic system. However, state-of-the-art CMOS electronics are rigid and bulky making them unusable for flexible electronic applications. While there exist bulk material reduction methods to flex them, such thinned CMOS electronics are fragile and vulnerable to handling for high throughput manufacturing. Here, we show a fusion of a CMOS technology compatible fabrication process for flexible CMOS electronics, with inkjet and conductive cellulose based interconnects, followed by additive manufacturing (i.e. 3D printing based packaging) and finally roll-to-roll printing of packaged decal electronics (thin film transistors based circuit components and sensors) focusing on printed high performance flexible electronic systems. This work provides the most pragmatic route for packaged flexible electronic systems for wide ranging applications.

  2. Broadband image sensor array based on graphene-CMOS integration

    Science.gov (United States)

    Goossens, Stijn; Navickaite, Gabriele; Monasterio, Carles; Gupta, Shuchi; Piqueras, Juan José; Pérez, Raúl; Burwell, Gregory; Nikitskiy, Ivan; Lasanta, Tania; Galán, Teresa; Puma, Eric; Centeno, Alba; Pesquera, Amaia; Zurutuza, Amaia; Konstantatos, Gerasimos; Koppens, Frank

    2017-06-01

    Integrated circuits based on complementary metal-oxide-semiconductors (CMOS) are at the heart of the technological revolution of the past 40 years, enabling compact and low-cost microelectronic circuits and imaging systems. However, the diversification of this platform into applications other than microcircuits and visible-light cameras has been impeded by the difficulty to combine semiconductors other than silicon with CMOS. Here, we report the monolithic integration of a CMOS integrated circuit with graphene, operating as a high-mobility phototransistor. We demonstrate a high-resolution, broadband image sensor and operate it as a digital camera that is sensitive to ultraviolet, visible and infrared light (300-2,000 nm). The demonstrated graphene-CMOS integration is pivotal for incorporating 2D materials into the next-generation microelectronics, sensor arrays, low-power integrated photonics and CMOS imaging systems covering visible, infrared and terahertz frequencies.

  3. Characterization of active CMOS sensors for capacitively coupled pixel detectors

    Energy Technology Data Exchange (ETDEWEB)

    Hirono, Toko; Gonella, Laura; Janssen, Jens; Hemperek, Tomasz; Huegging, Fabian; Krueger, Hans; Wermes, Norbert [Institute of Physics, University of Bonn (Germany); Peric, Ivan [Institut fuer Prozessdatenverarbeitung und Elektronik, Karlsruher Institut fuer Technologie, Karlsruhe (Germany)

    2015-07-01

    Active CMOS pixel sensor is one of the most attractive candidates for detectors of upcoming particle physics experiments. In contrast to conventional sensors of hybrid detectors, signal processing circuit can be integrated in the active CMOS sensor. The characterization and optimization of the pixel circuit are indispensable to obtain a good performance from the sensors. The prototype chips of the active CMOS sensor were fabricated in the AMS 180nm and L-Foundry 150 nm CMOS processes, respectively a high voltage and high resistivity technology. Both chips have a charge sensitive amplifier and a comparator in each pixel. The chips are designed to be glued to the FEI4 pixel readout chip. The signals from 3 pixels of the prototype chips are capacitively coupled to the FEI4 input pads. We have performed lab tests and test beams to characterize the prototypes. In this presentation, the measurement results of the active CMOS prototype sensors are shown.

  4. An Implantable CMOS Amplifier for Nerve Signals

    DEFF Research Database (Denmark)

    Nielsen, Jannik Hammel; Lehmann, Torsten

    2003-01-01

    In this paper, a low noise high gain CMOS amplifier for minute nerve signals is presented. The amplifier is constructed in a fully differential topology to maximize noise rejection. By using a mixture of weak- and strong inversion transistors, optimal noise suppression in the amplifier is achieved....... A continuous-time current-steering offset-compensation technique is utilized in order to minimize the noise contribution and to minimize dynamic impact on the amplifier input nodes. The method for signal recovery from noisy nerve signals is presented. A prototype amplifier is realized in a standard digital 0...

  5. CMOS current controlled fully balanced current conveyor

    International Nuclear Information System (INIS)

    Wang Chunhua; Zhang Qiujing; Liu Haiguang

    2009-01-01

    This paper presents a current controlled fully balanced second-generation current conveyor circuit (CF-BCCII). The proposed circuit has the traits of fully balanced architecture, and its X-Y terminals are current controllable. Based on the CFBCCII, two biquadratic universal filters are also proposed as its applications. The CFBCCII circuits and the two filters were fabricated with chartered 0.35-μm CMOS technology; with ±1.65 V power supply voltage, the total power consumption of the CFBCCII circuit is 3.6 mW. Comparisons between measured and HSpice simulation results are also given.

  6. CMOS Current-mode Operational Amplifier

    DEFF Research Database (Denmark)

    Kaulberg, Thomas

    1992-01-01

    current-mode feedback amplifier or a constant bandwidth in a transimpedance feedback amplifier. The amplifier is found to have a gain bandwidth product of 8 MHz, an offset current of 0.8 ¿A (signal-range ±700¿A) and a (theoretically) unlimited slew-rate. The amplifier is realized in a standard CMOS 2......A fully differential-input differential-output current-mode operational amplifier (COA) is described. The amplifier utilizes three second generation current-conveyors (CCII) as the basic building blocks. It can be configured to provide either a constant gain-bandwidth product in a fully balanced...

  7. A CMOS current-mode operational amplifier

    DEFF Research Database (Denmark)

    Kaulberg, Thomas

    1993-01-01

    current-mode feedback amplifier or a constant bandwidth in a transimpedance feedback amplifier. The amplifier is found to have a gain-bandwidth product of 3 MHz, an offset current of 0.8 μA (signal range ±700 μA), and a (theoretically) unlimited slew rate. The amplifier is realized in a standard CMOS 2......A fully differential-input, differential-output, current-mode operational amplifier (COA) is described. The amplifier utilizes three second-generation current conveyors (CCIIs) as the basic building blocks. It can be configured to provide either a constant gain-bandwidth product in a fully balanced...

  8. Radiation-hardened CMOS integrated circuits

    International Nuclear Information System (INIS)

    Pikor, A.; Reiss, E.M.

    1980-01-01

    Substantial effort has been directed at radiation-hardening CMOS integrated circuits using various oxide processes. While most of these integrated circuits have been successful in demonstrating megarad hardness, further investigations have shown that the 'wet-oxide process' is most compatible with the RCA CD4000 Series process. This article describes advances in the wet-oxide process that have resulted in multimegarad hardness and yield to MIL-M-38510 screening requirements. The implementation of these advances into volume manufacturing is geared towards supplying devices for aerospace requirements such as the Defense Meterological Satellite program (DMSP) and the Global Positioning Satellite (GPS). (author)

  9. Monolithic CMOS imaging x-ray spectrometers

    Science.gov (United States)

    Kenter, Almus; Kraft, Ralph; Gauron, Thomas; Murray, Stephen S.

    2014-07-01

    The Smithsonian Astrophysical Observatory (SAO) in collaboration with SRI/Sarnoff is developing monolithic CMOS detectors optimized for x-ray astronomy. The goal of this multi-year program is to produce CMOS x-ray imaging spectrometers that are Fano noise limited over the 0.1-10keV energy band while incorporating the many benefits of CMOS technology. These benefits include: low power consumption, radiation "hardness", high levels of integration, and very high read rates. Small format test devices from a previous wafer fabrication run (2011-2012) have recently been back-thinned and tested for response below 1keV. These devices perform as expected in regards to dark current, read noise, spectral response and Quantum Efficiency (QE). We demonstrate that running these devices at rates ~> 1Mpix/second eliminates the need for cooling as shot noise from any dark current is greatly mitigated. The test devices were fabricated on 15μm, high resistivity custom (~30kΩ-cm) epitaxial silicon and have a 16 by 192 pixel format. They incorporate 16μm pitch, 6 Transistor Pinned Photo Diode (6TPPD) pixels which have ~40μV/electron sensitivity and a highly parallel analog CDS signal chain. Newer, improved, lower noise detectors have just been fabricated (October 2013). These new detectors are fabricated on 9μm epitaxial silicon and have a 1k by 1k format. They incorporate similar 16μm pitch, 6TPPD pixels but have ~ 50% higher sensitivity and much (3×) lower read noise. These new detectors have undergone preliminary testing for functionality in Front Illuminated (FI) form and are presently being prepared for back thinning and packaging. Monolithic CMOS devices such as these, would be ideal candidate detectors for the focal planes of Solar, planetary and other space-borne x-ray astronomy missions. The high through-put, low noise and excellent low energy response, provide high dynamic range and good time resolution; bright, time varying x-ray features could be temporally and

  10. Nano-CMOS gate dielectric engineering

    CERN Document Server

    Wong, Hei

    2011-01-01

    According to Moore's Law, not only does the number of transistors in an integrated circuit double every two years, but transistor size also decreases at a predictable rate. At the rate we are going, the downsizing of CMOS transistors will reach the deca-nanometer scale by 2020. Accordingly, the gate dielectric thickness will be shrunk to less than half-nanometer oxide equivalent thickness (EOT) to maintain proper operation of the transistors, leaving high-k materials as the only viable solution for such small-scale EOT. This comprehensive, up-to-date text covering the physics, materials, devic

  11. CMOS biomicrosystems where electronics meets biology

    CERN Document Server

    2011-01-01

    "The book will address the-state-of-the-art in integrated Bio-Microsystems that integrate microelectronics with fluidics, photonics, and mechanics. New exciting opportunities in emerging applications that will take system performance beyond offered by traditional CMOS based circuits are discussed in detail. The book is a must for anyone serious about microelectronics integration possibilities for future technologies. The book is written by top notch international experts in industry and academia. The intended audience is practicing engineers with electronics background that want to learn about integrated microsystems. The book will be also used as a recommended reading and supplementary material in graduate course curriculum"--

  12. A capacitive CMOS-MEMS sensor designed by multi-physics simulation for integrated CMOS-MEMS technology

    Science.gov (United States)

    Konishi, Toshifumi; Yamane, Daisuke; Matsushima, Takaaki; Masu, Kazuya; Machida, Katsuyuki; Toshiyoshi, Hiroshi

    2014-01-01

    This paper reports the design and evaluation results of a capacitive CMOS-MEMS sensor that consists of the proposed sensor circuit and a capacitive MEMS device implemented on the circuit. To design a capacitive CMOS-MEMS sensor, a multi-physics simulation of the electromechanical behavior of both the MEMS structure and the sensing LSI was carried out simultaneously. In order to verify the validity of the design, we applied the capacitive CMOS-MEMS sensor to a MEMS accelerometer implemented by the post-CMOS process onto a 0.35-µm CMOS circuit. The experimental results of the CMOS-MEMS accelerometer exhibited good agreement with the simulation results within the input acceleration range between 0.5 and 6 G (1 G = 9.8 m/s2), corresponding to the output voltages between 908.6 and 915.4 mV, respectively. Therefore, we have confirmed that our capacitive CMOS-MEMS sensor and the multi-physics simulation will be beneficial method to realize integrated CMOS-MEMS technology.

  13. Broad ion beam serial section tomography

    Energy Technology Data Exchange (ETDEWEB)

    Winiarski, B., E-mail: b.winiarski@manchester.ac.uk [School of Materials, University of Manchester, Manchester M13 9PL (United Kingdom); Materials Division, National Physical Laboratory, Teddington TW11 0LW (United Kingdom); Gholinia, A. [School of Materials, University of Manchester, Manchester M13 9PL (United Kingdom); Mingard, K.; Gee, M. [Materials Division, National Physical Laboratory, Teddington TW11 0LW (United Kingdom); Thompson, G.E.; Withers, P.J. [School of Materials, University of Manchester, Manchester M13 9PL (United Kingdom)

    2017-01-15

    Here we examine the potential of serial Broad Ion Beam (BIB) Ar{sup +} ion polishing as an advanced serial section tomography (SST) technique for destructive 3D material characterisation for collecting data from volumes with lateral dimensions significantly greater than 100 µm and potentially over millimetre sized areas. Further, the associated low level of damage introduced makes BIB milling very well suited to 3D EBSD acquisition with very high indexing rates. Block face serial sectioning data registration schemes usually assume that the data comprises a series of parallel, planar slices. We quantify the variations in slice thickness and parallelity which can arise when using BIB systems comparing Gatan PECS and Ilion BIB systems for large volume serial sectioning and 3D-EBSD data acquisition. As a test case we obtain 3D morphologies and grain orientations for both phases of a WC-11%wt. Co hardmetal. In our case we have carried out the data acquisition through the manual transfer of the sample between SEM and BIB which is a very slow process (1–2 slice per day), however forthcoming automated procedures will markedly speed up the process. We show that irrespective of the sectioning method raw large area 2D-EBSD maps are affected by distortions and artefacts which affect 3D-EBSD such that quantitative analyses and visualisation can give misleading and erroneous results. Addressing and correcting these issues will offer real benefits when large area (millimetre sized) automated serial section BIBS is developed. - Highlights: • In this work we examine how microstructures can be reconstructed in three-dimensions (3D) by serial argon broad ion beam (BIB) milling, enabling much larger volumes (>250×250×100µm{sup 3}) to be acquired than by serial section focused ion beam-scanning electron microscopy (FIB-SEM). • The associated low level of damage introduced makes BIB milling very well suited to 3D-EBSD acquisition with very high indexing rates. • We explore

  14. [The serial murder: a few theoretical perspectives].

    Science.gov (United States)

    Leistedt, S; Linkowski, P

    2011-01-01

    Despite numbers of publications and effort to try to establish the definition, the classification, the epidemiology, the clinical aspects and the psychopathology of serial killers, a universal consensus seems to say the least. Crime, though reduced in some countries, appears to impact more and more consistent worldwide, generating controversial ideas and a multitude of possible explanations. The serial killer usually presents as a caucasian man, aged between 20 and 40 years, often embedded socially and in his family, but with serious psychiatric, personal and especially family history. Usually acting alone, the serial killer plans a crime well in advance, but sometimes within the scope of impulsivity for a minority, the victim not being previously selected. In the latter case, an actual mental illness like psychosis is found. It is clear from numerous psychopathological studies conducted so far that most serial killers are defined as psychopathic sexual sadists, whose childhood was difficult, if not flouted, punctuated by physical and psychological violence situations. In addition, pervasive fantasies combined with thoughts of death, sex and violence are as much in common with the original acts of which they are the instigators. Beyond a relentless media that is constantly watering the public with stories and pictures depicting them as such, serial killers remain an enigma. We can therefore attempt to answer the various questions raised by this phenomenon, the way these people operate and how we can curb the rise, thanks to the neurobiological and neurophysiological approaches that science offers us.

  15. A Biologically Inspired CMOS Image Sensor

    CERN Document Server

    Sarkar, Mukul

    2013-01-01

    Biological systems are a source of inspiration in the development of small autonomous sensor nodes. The two major types of optical vision systems found in nature are the single aperture human eye and the compound eye of insects. The latter are among the most compact and smallest vision sensors. The eye is a compound of individual lenses with their own photoreceptor arrays.  The visual system of insects allows them to fly with a limited intelligence and brain processing power. A CMOS image sensor replicating the perception of vision in insects is discussed and designed in this book for industrial (machine vision) and medical applications. The CMOS metal layer is used to create an embedded micro-polarizer able to sense polarization information. This polarization information is shown to be useful in applications like real time material classification and autonomous agent navigation. Further the sensor is equipped with in pixel analog and digital memories which allow variation of the dynamic range and in-pixel b...

  16. A new CMOS Hall angular position sensor

    Energy Technology Data Exchange (ETDEWEB)

    Popovic, R.S.; Drljaca, P. [Swiss Federal Inst. of Tech., Lausanne (Switzerland); Schott, C.; Racz, R. [SENTRON AG, Zug (Switzerland)

    2001-06-01

    The new angular position sensor consists of a combination of a permanent magnet attached to a shaft and of a two-axis magnetic sensor. The permanent magnet produces a magnetic field parallel with the magnetic sensor plane. As the shaft rotates, the magnetic field also rotates. The magnetic sensor is an integrated combination of a CMOS Hall integrated circuit and a thin ferromagnetic disk. The CMOS part of the system contains two or more conventional Hall devices positioned under the periphery of the disk. The ferromagnetic disk converts locally a magnetic field parallel with the chip surface into a field perpendicular to the chip surface. Therefore, a conventional Hall element can detect an external magnetic field parallel with the chip surface. As the direction of the external magnetic field rotates in the chip plane, the output voltage of the Hall element varies as the cosine of the rotation angle. By placing the Hall elements at the appropriate places under the disk periphery, we may obtain the cosine signals shifted by 90 , 120 , or by any other angle. (orig.)

  17. CMOS latch-up analysis and prevention

    International Nuclear Information System (INIS)

    Shafer, B.D.

    1975-06-01

    An analytical model is presented which develops relationships between ionization rates, minority carrier lifetimes, and latch-up in bulk CMOS integrated circuits. The basic mechanism for latch-up is the SCR action reported by Gregory and Shafer. The SCR is composed of a vertical NPN transistor formed by the N-channel source diffusion, the P-Well, and the N-substrate. The second part of the SCR is the lateral PNP transistor made up of the P-channel source diffusion, the N-substrate, and P-Well. It is shown that the NPN transistor turns on due to photocurrent-induced lateral voltage drops in the base of the transistor. The gain of this double diffused transistor has been shown to be as high as 100. Therefore, the transistor action of this device produces a much larger current flow in the substrate. This transistor current adds to that produced by the P-Well diode photocurrent in the substrate. It is found that the combined flow of current in the substrate forward biases the base emitter junction of the PNP device long before this could occur due to the P-Well photocurrent alone. The analysis indicated that a CD4007A CMOS device biased in the normal mode of operation should latch at about 2 . 10 8 rads/sec. Experimental results produced latch-up at 1 to 3 . 10 8 rads/sec. (U.S.)

  18. Planar pixel sensors in commercial CMOS technologies

    Energy Technology Data Exchange (ETDEWEB)

    Gonella, Laura; Hemperek, Tomasz; Huegging, Fabian; Krueger, Hans; Wermes, Norbert [Physikalisches Institut der Universitaet Bonn, Nussallee 12, 53115 Bonn (Germany); Macchiolo, Anna [Max-Planck-Institut fuer Physik, Foehringer Ring 6, 80805 Muenchen (Germany)

    2015-07-01

    For the upgrade of the ATLAS experiment at the high luminosity LHC, an all-silicon tracker is foreseen to cope with the increased rate and radiation levels. Pixel and strip detectors will have to cover an area of up to 200m2. To produce modules in high number at reduced costs, new sensor and bonding technologies have to be investigated. Commercial CMOS technologies on high resistive substrates can provide significant advantages in this direction. They offer cost effective, large volume sensor production. In addition to this, production is done on 8'' wafers allowing wafer-to-wafer bonding to the electronics, an interconnection technology substantially cheaper than the bump bonding process used for hybrid pixel detectors at the LHC. Both active and passive n-in-p pixel sensor prototypes have been submitted in a 150 nm CMOS technology on a 2kΩ cm substrate. The passive sensor design will be used to characterize sensor properties and to investigate wafer-to-wafer bonding technologies. This first prototype is made of a matrix of 36 x 16 pixels of size compatible with the FE-I4 readout chip (i.e. 50 μm x 250 μm). Results from lab characterization of this first submission are shown together with TCAD simulations. Work towards a full size FE-I4 sensor for wafer-to-wafer bonding is discussed.

  19. Serial Expression Analysis: a web tool for the analysis of serial gene expression data

    Science.gov (United States)

    Nueda, Maria José; Carbonell, José; Medina, Ignacio; Dopazo, Joaquín; Conesa, Ana

    2010-01-01

    Serial transcriptomics experiments investigate the dynamics of gene expression changes associated with a quantitative variable such as time or dosage. The statistical analysis of these data implies the study of global and gene-specific expression trends, the identification of significant serial changes, the comparison of expression profiles and the assessment of transcriptional changes in terms of cellular processes. We have created the SEA (Serial Expression Analysis) suite to provide a complete web-based resource for the analysis of serial transcriptomics data. SEA offers five different algorithms based on univariate, multivariate and functional profiling strategies framed within a user-friendly interface and a project-oriented architecture to facilitate the analysis of serial gene expression data sets from different perspectives. SEA is available at sea.bioinfo.cipf.es. PMID:20525784

  20. Digital column readout architecture for the ATLAS pixel 025 mum front end IC

    CERN Document Server

    Mandelli, E; Blanquart, L; Comes, G; Denes, P; Einsweiler, Kevin F; Fischer, P; Marchesini, R; Meddeler, G; Peric, I

    2002-01-01

    A fast low noise, limited power, radiation-hard front-end chip was developed for reading out the Atlas Pixel Silicon Detector. As in the past prototypes, every chip is used to digitize and read out charge and time information from hits on each one of its 2880 inputs. The basic column readout architecture idea was adopted and modified to allow a safe transition to quarter micron technology. Each pixel cell, organized in a 160 multiplied by 18 matrix, can be independently enabled and configured in order to optimize the analog signal response and to prevent defective pixels from saturating the readout. The digital readout organizes hit data coming from each column, with respect to time, and output them on a low-level serial interface. A considerable effort was made to design state machines free of undefined states, where single-point defects and charge deposited by heavy ions in the silicon could have led to unpredicted forbidden states. 7 Refs.

  1. The Saccharomyces cerevisiae MUM2 gene interacts with the DNA replication machinery and is required for meiotic levels of double strand breaks.

    Science.gov (United States)

    Davis, L; Barbera, M; McDonnell, A; McIntyre, K; Sternglanz, R; Jin , Q; Loidl, J; Engebrecht, J

    2001-01-01

    The Saccharomyces cerevisiae MUM2 gene is essential for meiotic, but not mitotic, DNA replication and thus sporulation. Genetic interactions between MUM2 and a component of the origin recognition complex and polymerase alpha-primase suggest that MUM2 influences the function of the DNA replication machinery. Early meiotic gene expression is induced to a much greater extent in mum2 cells than in meiotic cells treated with the DNA synthesis inhibitor hydroxyurea. This result indicates that the mum2 meiotic arrest is downstream of the arrest induced by hydroxyurea and suggests that DNA synthesis is initiated in the mutant. Genetic analyses indicate that the recombination that occurs in mum2 mutants is dependent on the normal recombination machinery and on synaptonemal complex components and therefore is not a consequence of lesions created by incompletely replicated DNA. Both meiotic ectopic and allelic recombination are similarly reduced in the mum2 mutant, and the levels are consistent with the levels of meiosis-specific DSBs that are generated. Cytological analyses of mum2 mutants show that chromosome pairing and synapsis occur, although at reduced levels compared to wild type. Given the near-wild-type levels of meiotic gene expression, pairing, and synapsis, we suggest that the reduction in DNA replication is directly responsible for the reduced level of DSBs and meiotic recombination. PMID:11238403

  2. Stochastic modeling of a serial killer.

    Science.gov (United States)

    Simkin, M V; Roychowdhury, V P

    2014-08-21

    We analyze the time pattern of the activity of a serial killer, who during 12 years had murdered 53 people. The plot of the cumulative number of murders as a function of time is of "Devil's staircase" type. The distribution of the intervals between murders (step length) follows a power law with the exponent of 1.4. We propose a model according to which the serial killer commits murders when neuronal excitation in his brain exceeds certain threshold. We model this neural activity as a branching process, which in turn is approximated by a random walk. As the distribution of the random walk return times is a power law with the exponent 1.5, the distribution of the inter-murder intervals is thus explained. We illustrate analytical results by numerical simulation. Time pattern activity data from two other serial killers further substantiate our analysis. Copyright © 2014 Elsevier Ltd. All rights reserved.

  3. All-CMOS night vision viewer with integrated microdisplay

    Science.gov (United States)

    Goosen, Marius E.; Venter, Petrus J.; du Plessis, Monuko; Faure, Nicolaas M.; Janse van Rensburg, Christo; Rademeyer, Pieter

    2014-02-01

    The unrivalled integration potential of CMOS has made it the dominant technology for digital integrated circuits. With the advent of visible light emission from silicon through hot carrier electroluminescence, several applications arose, all of which rely upon the advantages of mature CMOS technologies for a competitive edge in a very active and attractive market. In this paper we present a low-cost night vision viewer which employs only standard CMOS technologies. A commercial CMOS imager is utilized for near infrared image capturing with a 128x96 pixel all-CMOS microdisplay implemented to convey the image to the user. The display is implemented in a standard 0.35 μm CMOS process, with no process alterations or post processing. The display features a 25 μm pixel pitch and a 3.2 mm x 2.4 mm active area, which through magnification presents the virtual image to the user equivalent of a 19-inch display viewed from a distance of 3 meters. This work represents the first application of a CMOS microdisplay in a low-cost consumer product.

  4. Converting serial networks to Ethernet communications

    Energy Technology Data Exchange (ETDEWEB)

    Rosado, Elroy [Freewave Technologies, Inc., Boulder, CO (United States). Latin America

    2008-07-01

    Many oil and gas producers and pipeline companies find themselves in an awkward position. They have invested millions of dollars in legacy serial communications systems and in most cases, millions more in older SCADA remote terminal units and electronic flow meters. There is a desire throughout most of the industry to convert these systems to Ethernet. This presentation will explore how Ethernet protocol offers advantages over the older serial communications in terms of peer to peer communication, faster polling cycles, and the ability to poll multiple devices at the same time. (author)

  5. Multistage parallel-serial time averaging filters

    International Nuclear Information System (INIS)

    Theodosiou, G.E.

    1980-01-01

    Here, a new time averaging circuit design, the 'parallel filter' is presented, which can reduce the time jitter, introduced in time measurements using counters of large dimensions. This parallel filter could be considered as a single stage unit circuit which can be repeated an arbitrary number of times in series, thus providing a parallel-serial filter type as a result. The main advantages of such a filter over a serial one are much less electronic gate jitter and time delay for the same amount of total time uncertainty reduction. (orig.)

  6. Serial position effects in mild cognitive impairment.

    Science.gov (United States)

    Howieson, Diane B; Mattek, Nora; Seeyle, Adriana M; Dodge, Hiroko H; Wasserman, Dara; Zitzelberger, Tracy; Jeffrey, Kaye

    2011-03-01

    Mild cognitive impairment (MCI) is often associated with the preclinical phase of Alzheimer's disease (AD). Special scoring of word-list recall data for serial position has been suggested to improve discrimination of normal aging from dementia. We examined serial position effects in word-list recall for MCI participants compared to Alzheimer patients and controls. Individuals with MCI, like Alzheimer patients, had a diminished primacy effect in recalling words from a list. No alternative scoring system was better than standard scoring of word-list recall in distinguishing MCI patients from controls. Retention weighted scoring improved the discrimination of MCI and AD groups.

  7. CMOS-NEMS Copper Switches Monolithically Integrated Using a 65 nm CMOS Technology

    Directory of Open Access Journals (Sweden)

    Jose Luis Muñoz-Gamarra

    2016-02-01

    Full Text Available This work demonstrates the feasibility to obtain copper nanoelectromechanical (NEMS relays using a commercial complementary metal oxide semiconductor (CMOS technology (ST 65 nm following an intra CMOS-MEMS approach. We report experimental demonstration of contact-mode nano-electromechanical switches obtaining low operating voltage (5.5 V, good ION/IOFF (103 ratio, abrupt subthreshold swing (4.3 mV/decade and minimum dimensions (3.50 μm × 100 nm × 180 nm, and gap of 100 nm. With these dimensions, the operable Cell area of the switch will be 3.5 μm (length × 0.2 μm (100 nm width + 100 nm gap = 0.7 μm2 which is the smallest reported one using a top-down fabrication approach.

  8. Development of a CMOS process using high energy ion implantation

    International Nuclear Information System (INIS)

    Stolmeijer, A.

    1986-01-01

    The main interest of this thesis is the use of complementary metal oxide semiconductors (CMOS) in electronic technology. Problems in developing a CMOS process are mostly related to the isolation well of p-n junctions. It is shown that by using high energy ion implantation, it is possible to reduce lateral dimensions to obtain a rather high packing density. High energy ion implantation is also presented as a means of simplifying CMOS processing, since extended processing steps at elevated temperatures are superfluous. Process development is also simplified. (Auth.)

  9. Prevention of CMOS latch-up by gold doping

    International Nuclear Information System (INIS)

    Dawes, W.R.; Derbenwick, G.F.

    1976-01-01

    CMOS integrated circuits fabricated with the bulk silicon technology typically exhibit latch-up effects in either an ionizing radiation environment or an overvoltage stress condition. The latch-up effect has been shown to arise from regenerative switching, analogous to an SCR, in the adjacent parasitic bipolar transistors formed during the fabrication of a bulk CMOS device. Once latch-up has been initiated, it is usually self-sustaining and eventually destructive. Naturally, the circuit is inoperative during latch-up. This paper discusses a generic process technique that prevents the latch-up mechanism in CMOS devices

  10. CMOS analog integrated circuit design technology; CMOS anarogu IC sekkei gijutsu

    Energy Technology Data Exchange (ETDEWEB)

    Fujimoto, H.; Fujisawa, A. [Fuji Electric Co. Ltd., Tokyo (Japan)

    2000-08-10

    In the field of the LSI (large scale integrated circuit) in rapid progress toward high integration and advanced functions, CAD (computer-aided design) technology has become indispensable to LSI development within a short period. Fuji Electric has developed design technologies and automatic design system to develop high-quality analog ICs (integrated circuits), including power supply ICs. within a short period. This paper describes CMOS (complementary metal-oxide semiconductor) analog macro cell, circuit simulation, automatic routing, and backannotation technologies. (author)

  11. The eyeball killer: serial killings with postmortem globe enucleation.

    Science.gov (United States)

    Coyle, Julie; Ross, Karen F; Barnard, Jeffrey J; Peacock, Elizabeth; Linch, Charles A; Prahlow, Joseph A

    2015-05-01

    Although serial killings are relatively rare, they can be the cause of a great deal of anxiety while the killer remains at-large. Despite the fact that the motivations for serial killings are typically quite complex, the psychological analysis of a serial killer can provide valuable insight into how and why certain individuals become serial killers. Such knowledge may be instrumental in preventing future serial killings or in solving ongoing cases. In certain serial killings, the various incidents have a variety of similar features. Identification of similarities between separate homicidal incidents is necessary to recognize that a serial killer may be actively killing. In this report, the authors present a group of serial killings involving three prostitutes who were shot to death over a 3-month period. Scene and autopsy findings, including the unusual finding of postmortem enucleation of the eyes, led investigators to recognize the serial nature of the homicides. © 2015 American Academy of Forensic Sciences.

  12. Fabrication of CMOS-compatible nanopillars for smart bio-mimetic CMOS image sensors

    KAUST Repository

    Saffih, Faycal

    2012-06-01

    In this paper, nanopillars with heights of 1μm to 5μm and widths of 250nm to 500nm have been fabricated with a near room temperature etching process. The nanopillars were achieved with a continuous deep reactive ion etching technique and utilizing PMMA (polymethylmethacrylate) and Chromium as masking layers. As opposed to the conventional Bosch process, the usage of the unswitched deep reactive ion etching technique resulted in nanopillars with smooth sidewalls with a measured surface roughness of less than 40nm. Moreover, undercut was nonexistent in the nanopillars. The proposed fabrication method achieves etch rates four times faster when compared to the state-of-the-art, leading to higher throughput and more vertical side walls. The fabrication of the nanopillars was carried out keeping the CMOS process in mind to ultimately obtain a CMOS-compatible process. This work serves as an initial step in the ultimate objective of integrating photo-sensors based on these nanopillars seamlessly along with the controlling transistors to build a complete bio-inspired smart CMOS image sensor on the same wafer. © 2012 IEEE.

  13. Parametric generation of high-energy 14.5-fs light pulses at 1.5 mum.

    Science.gov (United States)

    Nisoli, M; Stagira, S; De Silvestri, S; Svelto, O; Valiulis, G; Varanavicius, A

    1998-04-15

    High-energy light pulses that are tunable from 1.1 to 2.6 mum, with a duration as short as 14.5 fs were generated in a type II phase-matching beta-BaB(2)O(4) traveling-wave parametric converter pumped by 18-fs pulses obtained from a Ti:sapphire laser with chirped-pulse amplification, followed by a hollow-fiber compressor.

  14. Multielement X-ray row detector on GaAs with spatial resolution of 108 {mu}m

    Energy Technology Data Exchange (ETDEWEB)

    Dvoryankin, V.F.; Dikaev, Yu.M. E-mail: ymd289@ire216.msk.ru; Krikunov, A.I.; Panova, T.M.; Telegin, A.A

    2004-09-21

    The multielement X-ray row detector with pitch of 108 {mu}m was made on epitaxial GaAs (p{sup +}-n-n'-n{sup +}) structures by isotropic etching in solution HCl-KBrO{sub 3}-H{sub 2}O. Separation of signals from the near-by detectors is achieved by built-in guard ring on each pixel. The spatial response of the detectors was evaluated.

  15. A CMOS G{sub m}-C complex filter with on-chip automatic tuning for wireless sensor network application

    Energy Technology Data Exchange (ETDEWEB)

    Wan Chuanchuan; Li Zhiqun; Hou Ningbing, E-mail: zhiqunli@seu.edu.cn [Institute of RF- and OE-ICs, Southeast University, Nanjing 210096 (China)

    2011-05-15

    A G{sub m}-C complex filter with on-chip automatic tuning for wireless sensor networks is designed and implemented using 0.18 {mu}m CMOS process. This filter is synthesized from a low-pass 5th-order Chebyshev RLC ladder filter prototype by means of capacitors and fully balanced transconductors. A conventional phase-locked loop is used to realize the on-chip automatic tuning for both center frequency and bandwidth control. The filter is centered at 2 MHz with a bandwidth of 2.4 MHz. The measured results show that the filter provides more than 45 dB image rejection while the ripple in the pass-band is less than 1.2 dB. The complete filter including on-chip tuning circuit consumes 4.9 mA with 1.8 V single supply voltage. (semiconductor integrated circuits)

  16. The CMOS integration of a power inverter

    Science.gov (United States)

    Mannarino, Eric Francis

    Due to their falling costs, the use of renewable energy systems is expanding around the world. These systems require the conversion of DC power into grid-synchronous AC power. Currently, the inverters that carry out this task are built using discrete transistors. TowerJazz Semiconductor Corp. has created a commercial CMOS process that allows for blocking voltages of up to 700 V, effectively removing the barrier to integrating power inverters onto a single chip. This thesis explores this process using two topologies. The first is a cell-based switched-capacitor topology first presented by Ke Zou. The second is a novel topology that explores the advantage of using a bused input-output system, as in digital electronics. Simulations run on both topologies confirm the high-efficiency demonstrated in Zou’s process as well as the advantage the bus-based system has in output voltage levels.

  17. Floating Gate CMOS Dosimeter With Frequency Output

    Science.gov (United States)

    Garcia-Moreno, E.; Isern, E.; Roca, M.; Picos, R.; Font, J.; Cesari, J.; Pineda, A.

    2012-04-01

    This paper presents a gamma radiation dosimeter based on a floating gate sensor. The sensor is coupled with a signal processing circuitry, which furnishes a square wave output signal, the frequency of which depends on the total dose. Like any other floating gate dosimeter, it exhibits zero bias operation and reprogramming capabilities. The dosimeter has been designed in a standard 0.6 m CMOS technology. The whole dosimeter occupies a silicon area of 450 m250 m. The initial sensitivity to a radiation dose is Hz/rad, and to temperature and supply voltage is kHz/°C and 0.067 kHz/mV, respectively. The lowest detectable dose is less than 1 rad.

  18. Recalling visual serial order for verbal sequences

    NARCIS (Netherlands)

    Logie, R.H.; Saito, S.; Morita, A.; Varma, S.; Norris, D.

    2016-01-01

    We report three experiments in which participants performed written serial recall of visually presented verbal sequences with items varying in visual similarity. In Experiments 1 and 2 native speakers of Japanese recalled visually presented Japanese Kanji characters. In Experiment 3, native speakers

  19. Serial analysis of gene expression (SAGE)

    NARCIS (Netherlands)

    van Ruissen, Fred; Baas, Frank

    2007-01-01

    In 1995, serial analysis of gene expression (SAGE) was developed as a versatile tool for gene expression studies. SAGE technology does not require pre-existing knowledge of the genome that is being examined and therefore SAGE can be applied to many different model systems. In this chapter, the SAGE

  20. Facial rejuvenation: Serial fat graft transfer

    African Journals Online (AJOL)

    Saad Mohamed Saad Ibrahiem

    2016-02-01

    Feb 1, 2016 ... This a clinical study carried out to test the aesthetic outcome of serial injection of the cryo-preserved fat cells for both aesthetic and reconstructive purposes. Methods: Clinical ..... ucts, devices, or drugs mentioned in this manuscript that might create a ... Adipose stem cells and regenerative medicine. 7th ed.

  1. Advances in Serials Management. Volume 6.

    Science.gov (United States)

    Hepfer, Cindy, Ed.; Gammon, Julia, Ed.; Malinowski, Teresa, Ed.

    In order to further discussion and support constructive change, this volume presents the following eight papers on various dimensions of serials management: (1) "CD-ROMs, Surveys, and Sales: The OSA [Optical Society of America] Experience" (Frank E. Harris and Alan Tourtlotte); (2) "Management and Integration of Electronic Journals into the…

  2. CMOS image sensor with contour enhancement

    Science.gov (United States)

    Meng, Liya; Lai, Xiaofeng; Chen, Kun; Yuan, Xianghui

    2010-10-01

    Imitating the signal acquisition and processing of vertebrate retina, a CMOS image sensor with bionic pre-processing circuit is designed. Integration of signal-process circuit on-chip can reduce the requirement of bandwidth and precision of the subsequent interface circuit, and simplify the design of the computer-vision system. This signal pre-processing circuit consists of adaptive photoreceptor, spatial filtering resistive network and Op-Amp calculation circuit. The adaptive photoreceptor unit with a dynamic range of approximately 100 dB has a good self-adaptability for the transient changes in light intensity instead of intensity level itself. Spatial low-pass filtering resistive network used to mimic the function of horizontal cell, is composed of the horizontal resistor (HRES) circuit and OTA (Operational Transconductance Amplifier) circuit. HRES circuit, imitating dendrite of the neuron cell, comprises of two series MOS transistors operated in weak inversion region. Appending two diode-connected n-channel transistors to a simple transconductance amplifier forms the OTA Op-Amp circuit, which provides stable bias voltage for the gate of MOS transistors in HRES circuit, while serves as an OTA voltage follower to provide input voltage for the network nodes. The Op-Amp calculation circuit with a simple two-stage Op-Amp achieves the image contour enhancing. By adjusting the bias voltage of the resistive network, the smoothing effect can be tuned to change the effect of image's contour enhancement. Simulations of cell circuit and 16×16 2D circuit array are implemented using CSMC 0.5μm DPTM CMOS process.

  3. A Multipurpose CMOS Platform for Nanosensing

    Directory of Open Access Journals (Sweden)

    Alberto Bonanno

    2016-11-01

    Full Text Available This paper presents a customizable sensing system based on functionalized nanowires (NWs assembled onto complementary metal oxide semiconductor (CMOS technology. The Micro-for-Nano (M4N chip integrates on top of the electronics an array of aluminum microelectrodes covered with gold by means of a customized electroless plating process. The NW assembly process is driven by an array of on-chip dielectrophoresis (DEP generators, enabling a custom layout of different nanosensors on the same microelectrode array. The electrical properties of each assembled NW are singularly sensed through an in situ CMOS read-out circuit (ROC that guarantees a low noise and reliable measurement. The M4N chip is directly connected to an external microcontroller for configuration and data processing. The processed data are then redirected to a workstation for real-time data visualization and storage during sensing experiments. As proof of concept, ZnO nanowires have been integrated onto the M4N chip to validate the approach that enables different kind of sensing experiments. The device has been then irradiated by an external UV source with adjustable power to measure the ZnO sensitivity to UV-light exposure. A maximum variation of about 80% of the ZnO-NW resistance has been detected by the M4N system when the assembled 5 μ m × 500 nm single ZnO-NW is exposed to an estimated incident radiant UV-light flux in the range of 1 nW–229 nW. The performed experiments prove the efficiency of the platform conceived for exploiting any kind of material that can change its capacitance and/or resistance due to an external stimulus.

  4. A Multipurpose CMOS Platform for Nanosensing.

    Science.gov (United States)

    Bonanno, Alberto; Sanginario, Alessandro; Marasso, Simone L; Miccoli, Beatrice; Bejtka, Katarzyna; Benetto, Simone; Demarchi, Danilo

    2016-11-30

    This paper presents a customizable sensing system based on functionalized nanowires (NWs) assembled onto complementary metal oxide semiconductor (CMOS) technology. The Micro-for-Nano (M4N) chip integrates on top of the electronics an array of aluminum microelectrodes covered with gold by means of a customized electroless plating process. The NW assembly process is driven by an array of on-chip dielectrophoresis (DEP) generators, enabling a custom layout of different nanosensors on the same microelectrode array. The electrical properties of each assembled NW are singularly sensed through an in situ CMOS read-out circuit (ROC) that guarantees a low noise and reliable measurement. The M4N chip is directly connected to an external microcontroller for configuration and data processing. The processed data are then redirected to a workstation for real-time data visualization and storage during sensing experiments. As proof of concept, ZnO nanowires have been integrated onto the M4N chip to validate the approach that enables different kind of sensing experiments. The device has been then irradiated by an external UV source with adjustable power to measure the ZnO sensitivity to UV-light exposure. A maximum variation of about 80% of the ZnO-NW resistance has been detected by the M4N system when the assembled 5 μ m × 500 nm single ZnO-NW is exposed to an estimated incident radiant UV-light flux in the range of 1 nW-229 nW. The performed experiments prove the efficiency of the platform conceived for exploiting any kind of material that can change its capacitance and/or resistance due to an external stimulus.

  5. CMOS front ends for millimeter wave wireless communication systems

    CERN Document Server

    Deferm, Noël

    2015-01-01

    This book focuses on the development of circuit and system design techniques for millimeter wave wireless communication systems above 90GHz and fabricated in nanometer scale CMOS technologies. The authors demonstrate a hands-on methodology that was applied to design six different chips, in order to overcome a variety of design challenges. Behavior of both actives and passives, and how to design them to achieve high performance is discussed in detail. This book serves as a valuable reference for millimeter wave designers, working at both the transistor level and system level.   Discusses advantages and disadvantages of designing wireless mm-wave communication circuits and systems in CMOS; Analyzes the limitations and pitfalls of building mm-wave circuits in CMOS; Includes mm-wave building block and system design techniques and applies these to 6 different CMOS chips; Provides guidelines for building measurement setups to evaluate high-frequency chips.  

  6. CMOS Enabled Microfluidic Systems for Healthcare Based Applications.

    Science.gov (United States)

    Khan, Sherjeel M; Gumus, Abdurrahman; Nassar, Joanna M; Hussain, Muhammad M

    2018-04-01

    With the increased global population, it is more important than ever to expand accessibility to affordable personalized healthcare. In this context, a seamless integration of microfluidic technology for bioanalysis and drug delivery and complementary metal oxide semiconductor (CMOS) technology enabled data-management circuitry is critical. Therefore, here, the fundamentals, integration aspects, and applications of CMOS-enabled microfluidic systems for affordable personalized healthcare systems are presented. Critical components, like sensors, actuators, and their fabrication and packaging, are discussed and reviewed in detail. With the emergence of the Internet-of-Things and the upcoming Internet-of-Everything for a people-process-data-device connected world, now is the time to take CMOS-enabled microfluidics technology to as many people as possible. There is enormous potential for microfluidic technologies in affordable healthcare for everyone, and CMOS technology will play a major role in making that happen. © 2018 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  7. CMOS Active Pixel Sensor Technology and Reliability Characterization Methodology

    Science.gov (United States)

    Chen, Yuan; Guertin, Steven M.; Pain, Bedabrata; Kayaii, Sammy

    2006-01-01

    This paper describes the technology, design features and reliability characterization methodology of a CMOS Active Pixel Sensor. Both overall chip reliability and pixel reliability are projected for the imagers.

  8. Design of CMOS imaging system based on FPGA

    Science.gov (United States)

    Hu, Bo; Chen, Xiaolai

    2017-10-01

    In order to meet the needs of engineering applications for high dynamic range CMOS camera under the rolling shutter mode, a complete imaging system is designed based on the CMOS imaging sensor NSC1105. The paper decides CMOS+ADC+FPGA+Camera Link as processing architecture and introduces the design and implementation of the hardware system. As for camera software system, which consists of CMOS timing drive module, image acquisition module and transmission control module, the paper designs in Verilog language and drives it to work properly based on Xilinx FPGA. The ISE 14.6 emulator ISim is used in the simulation of signals. The imaging experimental results show that the system exhibits a 1280*1024 pixel resolution, has a frame frequency of 25 fps and a dynamic range more than 120dB. The imaging quality of the system satisfies the requirement of the index.

  9. CMOS Enabled Microfluidic Systems for Healthcare Based Applications

    KAUST Repository

    Khan, Sherjeel M.; Gumus, Abdurrahman; Nassar, Joanna M.; Hussain, Muhammad Mustafa

    2018-01-01

    With the increased global population, it is more important than ever to expand accessibility to affordable personalized healthcare. In this context, a seamless integration of microfluidic technology for bioanalysis and drug delivery and complementary metal oxide semiconductor (CMOS) technology enabled data-management circuitry is critical. Therefore, here, the fundamentals, integration aspects, and applications of CMOS-enabled microfluidic systems for affordable personalized healthcare systems are presented. Critical components, like sensors, actuators, and their fabrication and packaging, are discussed and reviewed in detail. With the emergence of the Internet-of-Things and the upcoming Internet-of-Everything for a people-process-data-device connected world, now is the time to take CMOS-enabled microfluidics technology to as many people as possible. There is enormous potential for microfluidic technologies in affordable healthcare for everyone, and CMOS technology will play a major role in making that happen.

  10. CMOS Enabled Microfluidic Systems for Healthcare Based Applications

    KAUST Repository

    Khan, Sherjeel M.

    2018-02-27

    With the increased global population, it is more important than ever to expand accessibility to affordable personalized healthcare. In this context, a seamless integration of microfluidic technology for bioanalysis and drug delivery and complementary metal oxide semiconductor (CMOS) technology enabled data-management circuitry is critical. Therefore, here, the fundamentals, integration aspects, and applications of CMOS-enabled microfluidic systems for affordable personalized healthcare systems are presented. Critical components, like sensors, actuators, and their fabrication and packaging, are discussed and reviewed in detail. With the emergence of the Internet-of-Things and the upcoming Internet-of-Everything for a people-process-data-device connected world, now is the time to take CMOS-enabled microfluidics technology to as many people as possible. There is enormous potential for microfluidic technologies in affordable healthcare for everyone, and CMOS technology will play a major role in making that happen.

  11. A Single-Transistor Active Pixel CMOS Image Sensor Architecture

    International Nuclear Information System (INIS)

    Zhang Guo-An; He Jin; Zhang Dong-Wei; Su Yan-Mei; Wang Cheng; Chen Qin; Liang Hai-Lang; Ye Yun

    2012-01-01

    A single-transistor CMOS active pixel image sensor (1 T CMOS APS) architecture is proposed. By switching the photosensing pinned diode, resetting and selecting can be achieved by diode pull-up and capacitive coupling pull-down of the source follower. Thus, the reset and selected transistors can be removed. In addition, the reset and selected signal lines can be shared to reduce the metal signal line, leading to a very high fill factor. The pixel design and operation principles are discussed in detail. The functionality of the proposed 1T CMOS APS architecture has been experimentally verified using a fabricated chip in a standard 0.35 μm CMOS AMIS technology

  12. Depleted CMOS pixels for LHC proton–proton experiments

    International Nuclear Information System (INIS)

    Wermes, N.

    2016-01-01

    While so far monolithic pixel detectors have remained in the realm of comparatively low rate and radiation applications outside LHC, new developments exploiting high resistivity substrates with three or four well CMOS process options allow reasonably large depletion depths and full CMOS circuitry in a monolithic structure. This opens up the possibility to target CMOS pixel detectors also for high radiation pp-experiments at the LHC upgrade, either in a hybrid-type fashion or even fully monolithic. Several pixel matrices have been prototyped with high ohmic substrates, high voltage options, and full CMOS electronics. They were characterized in the lab and in test beams. An overview of the necessary development steps and different approaches as well as prototype results are presented in this paper.

  13. CMOS Electrochemical Instrumentation for Biosensor Microsystems: A Review

    Directory of Open Access Journals (Sweden)

    Haitao Li

    2016-12-01

    Full Text Available Modern biosensors play a critical role in healthcare and have a quickly growing commercial market. Compared to traditional optical-based sensing, electrochemical biosensors are attractive due to superior performance in response time, cost, complexity and potential for miniaturization. To address the shortcomings of traditional benchtop electrochemical instruments, in recent years, many complementary metal oxide semiconductor (CMOS instrumentation circuits have been reported for electrochemical biosensors. This paper provides a review and analysis of CMOS electrochemical instrumentation circuits. First, important concepts in electrochemical sensing are presented from an instrumentation point of view. Then, electrochemical instrumentation circuits are organized into functional classes, and reported CMOS circuits are reviewed and analyzed to illuminate design options and performance tradeoffs. Finally, recent trends and challenges toward on-CMOS sensor integration that could enable highly miniaturized electrochemical biosensor microsystems are discussed. The information in the paper can guide next generation electrochemical sensor design.

  14. Determination of motive of serial invaders as a stage of serial murders investigation

    Directory of Open Access Journals (Sweden)

    Davydov A.B.

    2017-04-01

    Full Text Available the article discusses the existing classification of motives of serial murderers. The author provides the classification, which is based on the technique of extreme meanings offered by D.A. Leontyev.

  15. A novel CMOS SRAM feedback element for SEU environments

    International Nuclear Information System (INIS)

    Verghese, S.; Wortman, J.J.; Kerns, S.E.

    1987-01-01

    A hardened CMOS SRAM has been proposed which utilizes a leaky polysilicon Schottky diode placed in the feedback path to attain the SEU immunity of resistor-coupled SRAMs while improving the access speed of the cell. Novel polysilicon hybrid Schottky-resistor structures which emulate the leaky diodes have been designed and fabricated. The elements' design criteria and methods of fulfilling them are presented along with a practical implementation scheme for CMOS SRAM cells

  16. Design of CMOS CFOA Based on Pseudo Operational Transconductance Amplifier

    OpenAIRE

    Hassan Jassim Motlak

    2015-01-01

    A novel design technique employing CMOS Current Feedback Operational Amplifier (CFOA) is presented. The feature of consumption very low power in designing pseudo-OTA is used to decreasing the total power consumption of the proposed CFOA. This design approach applies pseudo-OTA as input stage cascaded with buffer stage. Moreover, the DC input offset voltage and harmonic distortion (HD) of the proposed CFOA are very low values compared with the conventional CMOS CFOA due to...

  17. CMOS Image Sensors: Electronic Camera On A Chip

    Science.gov (United States)

    Fossum, E. R.

    1995-01-01

    Recent advancements in CMOS image sensor technology are reviewed, including both passive pixel sensors and active pixel sensors. On- chip analog to digital converters and on-chip timing and control circuits permit realization of an electronic camera-on-a-chip. Highly miniaturized imaging systems based on CMOS image sensor technology are emerging as a competitor to charge-coupled devices for low cost uses.

  18. Poly-SiGe for MEMS-above-CMOS sensors

    CERN Document Server

    Gonzalez Ruiz, Pilar; Witvrouw, Ann

    2014-01-01

    Polycrystalline SiGe has emerged as a promising MEMS (Microelectromechanical Systems) structural material since it provides the desired mechanical properties at lower temperatures compared to poly-Si, allowing the direct post-processing on top of CMOS. This CMOS-MEMS monolithic integration can lead to more compact MEMS with improved performance. The potential of poly-SiGe for MEMS above-aluminum-backend CMOS integration has already been demonstrated. However, aggressive interconnect scaling has led to the replacement of the traditional aluminum metallization by copper (Cu) metallization, due to its lower resistivity and improved reliability. Poly-SiGe for MEMS-above-CMOS sensors demonstrates the compatibility of poly-SiGe with post-processing above the advanced CMOS technology nodes through the successful fabrication of an integrated poly-SiGe piezoresistive pressure sensor, directly fabricated above 0.13 m Cu-backend CMOS. Furthermore, this book presents the first detailed investigation on the influence o...

  19. Advancement of CMOS Doping Technology in an External Development Framework

    Science.gov (United States)

    Jain, Amitabh; Chambers, James J.; Shaw, Judy B.

    2011-01-01

    The consumer appetite for a rich multimedia experience drives technology development for mobile hand-held devices and the infrastructure to support them. Enhancements in functionality, speed, and user experience are derived from advancements in CMOS technology. The technical challenges in developing each successive CMOS technology node to support these enhancements have become increasingly difficult. These trends have motivated the CMOS business towards a collaborative approach based on strategic partnerships. This paper describes our model and experience of CMOS development, based on multi-dimensional industrial and academic partnerships. We provide to our process equipment, materials, and simulation partners, as well as to our silicon foundry partners, the detailed requirements for future integrated circuit products. This is done very early in the development cycle to ensure that these requirements can be met. In order to determine these fundamental requirements, we rely on a strategy that requires strong interaction between process and device simulation, physical and chemical analytical methods, and research at academic institutions. This learning is shared with each project partner to address integration and manufacturing issues encountered during CMOS technology development from its inception through product ramp. We utilize TI's core strengths in physical analysis, unit processes and integration, yield ramp, reliability, and product engineering to support this technological development. Finally, this paper presents examples of the advancement of CMOS doping technology for the 28 nm node and beyond through this development model.

  20. Design optimization of radiation-hardened CMOS integrated circuits

    International Nuclear Information System (INIS)

    1975-01-01

    Ionizing-radiation-induced threshold voltage shifts in CMOS integrated circuits will drastically degrade circuit performance unless the design parameters related to the fabrication process are properly chosen. To formulate an approach to CMOS design optimization, experimentally observed analytical relationships showing strong dependences between threshold voltage shifts and silicon dioxide thickness are utilized. These measurements were made using radiation-hardened aluminum-gate CMOS inverter circuits and have been corroborated by independent data taken from MOS capacitor structures. Knowledge of these relationships allows one to define ranges of acceptable CMOS design parameters based upon radiation-hardening capabilities and post-irradiation performance specifications. Furthermore, they permit actual design optimization of CMOS integrated circuits which results in optimum pre- and post-irradiation performance with respect to speed, noise margins, and quiescent power consumption. Theoretical and experimental results of these procedures, the applications of which can mean the difference between failure and success of a CMOS integrated circuit in a radiation environment, are presented

  1. Serial position markers in space: visuospatial priming of serial order working memory retrieval.

    Directory of Open Access Journals (Sweden)

    Maya De Belder

    Full Text Available Most general theories on serial order working memory (WM assume the existence of position markers that are bound to the to-be-remembered items to keep track of the serial order. So far, the exact cognitive/neural characteristics of these markers have remained largely underspecified, while direct empirical evidence for their existence is mostly lacking. In the current study we demonstrate that retrieval from verbal serial order WM can be facilitated or hindered by spatial cuing: begin elements of a verbal WM sequence are retrieved faster after cuing the left side of space, while end elements are retrieved faster after cuing the right side of space. In direct complement to our previous work--where we showed the reversed impact of WM retrieval on spatial processing--we argue that the current findings provide us with a crucial piece of evidence suggesting a direct and functional involvement of space in verbal serial order WM. We outline the idea that serial order in verbal WM is coded within a spatial coordinate system with spatial attention being involved when searching through WM, and we discuss how this account can explain several hallmark observations related to serial order WM.

  2. An RF energy harvester system using UHF micropower CMOS rectifier based on a diode connected CMOS transistor.

    Science.gov (United States)

    Shokrani, Mohammad Reza; Khoddam, Mojtaba; Hamidon, Mohd Nizar B; Kamsani, Noor Ain; Rokhani, Fakhrul Zaman; Shafie, Suhaidi Bin

    2014-01-01

    This paper presents a new type diode connected MOS transistor to improve CMOS conventional rectifier's performance in RF energy harvester systems for wireless sensor networks in which the circuits are designed in 0.18  μm TSMC CMOS technology. The proposed diode connected MOS transistor uses a new bulk connection which leads to reduction in the threshold voltage and leakage current; therefore, it contributes to increment of the rectifier's output voltage, output current, and efficiency when it is well important in the conventional CMOS rectifiers. The design technique for the rectifiers is explained and a matching network has been proposed to increase the sensitivity of the proposed rectifier. Five-stage rectifier with a matching network is proposed based on the optimization. The simulation results shows 18.2% improvement in the efficiency of the rectifier circuit and increase in sensitivity of RF energy harvester circuit. All circuits are designed in 0.18 μm TSMC CMOS technology.

  3. Efficient Long Wave IR Laser from Ho:YAG 2 {mu}m Pumped ZnGeP{sub 2} Optical Parametric Oscillator

    Energy Technology Data Exchange (ETDEWEB)

    Li-Gang,; Bao-Quan, Yao; Xiao-Ming, Duan; Guo-Li, Zhu; Yue-Zhu, Wang; You-Lun, Ju [National Key Laboratory of Tunable Laser Technology, Harbin Institute of Technology, Harbin 150001 (China)

    2010-01-15

    An efficient high power long wave infrared laser based on ZnGeP{sub 2} optical parametric oscillator pumped by a 2.09 {mu}m Tm:YLF/Ho:YAG laser at 10KHz pulse repetition rate is reported. The pump to idler conversion efficiency is 8% at 15.6 W Ho pump power level and a quantum efficiency of 31 % when the 1'idler wavelength is tuned at 8.08 {mu}m. The wavelength tuning range from 8-9.1 {mu}m is also achieved by rotating the ZGP crystal. (fundamental areas of phenomenology(including applications))

  4. A High-Voltage SOI CMOS Exciter Chip for a Programmable Fluidic Processor System.

    Science.gov (United States)

    Current, K W; Yuk, K; McConaghy, C; Gascoyne, P R C; Schwartz, J A; Vykoukal, J V; Andrews, C

    2007-06-01

    waveform frequency is about 200 Hz; and standard 5-V CMOS logic data communication rate is variable up to 250 kHz. This HV demonstration chip is fabricated in a 130-V 1.0-mum SOI CMOS fabrication technology, dissipates a maximum of 1.87 W, and is about 10.4 mm x 8.2 mm.

  5. An eight channel low-noise CMOS readout circuit for silicon detectors with on-chip front-end FET

    International Nuclear Information System (INIS)

    Fiorini, C.; Porro, M.

    2006-01-01

    We propose a CMOS readout circuit for the processing of signals from multi-channel silicon detectors to be used in X-ray spectroscopy and γ-ray imaging applications. The circuit is composed by eight channels, each one featuring a low-noise preamplifier, a 6th-order semigaussian shaping amplifier with four selectable peaking times, from 1.8 up to 6 μs, a peak stretcher and a discriminator. The circuit is conceived to be used with silicon detectors with a front-end FET integrated on the detector chips itself, like silicon drift detectors with JFET and pixel detectors with DEPMOS. The integrated time constants used for the shaping are implemented by means of an RC-cell, based on the technique of demagnification of the current flowing in a resistor R by means of the use of current mirrors. The eight analog channels of the chip are multiplexed to a single analog output. A suitable digital section provides self-resetting of each channel and trigger output and is able to set independent thresholds on the analog channels by means of a programmable serial register and 3-bit DACs. The circuit has been realized in the 0.35 μm CMOS AMS technology. In this work, the main features of the circuit are presented along with the experimental results of its characterization

  6. An Investigation of Selective College and University Libraries' Serial Arrangement.

    Science.gov (United States)

    Kesler, Elizabeth Gates; Teborek, Gay

    Data from a survey on serials arrangement procedures and policies at academic libraries was used by the University of Rhode Island (URI) Library in changing current serials policies. Ten libraries, four of which have similar serial holdings and user populations to URI, responded to a questionnaire. Information was obtained on classification versus…

  7. Sensing the Opaque : Seriality and the Aesthetics of Televisual Form

    NARCIS (Netherlands)

    Dasgupta, S.; Kelleter, F.

    2017-01-01

    Recent work on TV seriality focuses on the deference of meaning through narrative extension. Contemporary seriality, it has been argued, exploits this expanding textuality to construct complicated narratives that tip the pleasures of seriality toward detecting the meaning of the plot's

  8. Serial Millisecond Crystallography of Membrane Proteins.

    Science.gov (United States)

    Jaeger, Kathrin; Dworkowski, Florian; Nogly, Przemyslaw; Milne, Christopher; Wang, Meitian; Standfuss, Joerg

    2016-01-01

    Serial femtosecond crystallography (SFX) at X-ray free-electron lasers (XFELs) is a powerful method to determine high-resolution structures of pharmaceutically relevant membrane proteins. Recently, the technology has been adapted to carry out serial millisecond crystallography (SMX) at synchrotron sources, where beamtime is more abundant. In an injector-based approach, crystals grown in lipidic cubic phase (LCP) or embedded in viscous medium are delivered directly into the unattenuated beam of a microfocus beamline. Pilot experiments show the application of microjet-based SMX for solving the structure of a membrane protein and compatibility of the method with de novo phasing. Planned synchrotron upgrades, faster detectors and software developments will go hand-in-hand with developments at free-electron lasers to provide a powerful methodology for solving structures from microcrystals at room temperature, ligand screening or crystal optimization for time-resolved studies with minimal or no radiation damage.

  9. Serial SPECT in children with partial epilepsy

    International Nuclear Information System (INIS)

    Hosoya, Machiko; Ushiku, Hideo

    1995-01-01

    We performed serial single-photon emission CT (SPECT) with N-isopropyl-p-( 123 I)-Iodoamphetamine to measure the regional cerebral blood flow (rCBF) in 15 children with partial epilepsy. SPECT showed focal changes in 14 cases. Ten cases had abnormalities in the initial SPECT and another four cases in the second test. The cases with normal rCBF in initial SPECT had been tested in an early phase after the onset, and then decreased rCBF were observed in the second SPECT. The cases with both abnormal rCBF in the initial SPECT and improved rCBF in the second SPECT showed good prognosis in clinico-electrophysiological evolutions. In cases with abnormal changes of rCBF in the second SPECT, clinical prognosis was found to be not so good. These findings suggest that serial SPECT may be used to follow the course of epilepsy. (author)

  10. [Personality disorders, psychopathy and serial killers].

    Science.gov (United States)

    Morana, Hilda C P; Stone, Michael H; Abdalla-Filho, Elias

    2006-10-01

    To illustrate the basic characteristics of several specific personality disorders, focusing mainly in antisocial personality disorder. The differences between antisocial personality disorder and psychopathy are highlighted. Serial killers and its psychopathic aspects are also discussed. A bibliographic review was completed in order to outline convergences and divergences among different authors about this controversial issue, especially those concerning the possibility of treatment. While anti-social personality disorder is a medical diagnosis, the term "psychopathy" (which belongs to the sphere of forensic psychiatry) may be understood as a "legal diagnosis". It is not still possible to identify an effective treatment for serial killers. Personality disorders, especially of the antisocial type, still represent a formidable challenge to forensic psychiatry today. Questions as yet unanswered include the best and most humane place for patients with this condition and the nature of a standardised treatment recommendation.

  11. A Survey of Electronic Serials Managers Reveals Diversity in Practice

    Directory of Open Access Journals (Sweden)

    Laura Costello

    2014-09-01

    Full Text Available A Review of: Branscome, B. A. (2013. Management of electronic serials in academic libraries: The results of an online survey. Serials Review, 39(4, 216-226. http://dx.doi.org/10.1016/j.serrev.2013.10.004 Abstract Objective – To examine industry standards for the management of electronic serials and measure the adoption of electronic serials over print. Design – Survey questionnaire. Setting – Email lists aimed at academic librarians working in serials management. Subjects – 195 self-selected subscribers to serials email lists. Methods – The author created a 20 question survey that consisted primarily of closed-ended questions pertaining to the collection demographics, staff, budget, and tools of serials management groups in academic libraries. The survey was conducted via Survey Monkey and examined using the analytical features of the tool. Participants remained anonymous and the survey questions did not ask them to reveal identifiable information about their libraries. Main Results – Collection demographics questions revealed that 78% of surveyed librarians estimated that print-only collections represented 40% or fewer of their serials holdings. The author observed diversity in the factors that influence print to digital transitions in academic libraries. However 71.5% of participants indicated that publisher technology support like IP authentication was required before adopting digital subscriptions. A lack of standardization also marked serials workflows, department responsibilities, and department titles. The author did not find a correlation between serials budget and the enrollment size of the institution. Participants reported that they used tools from popular serials management vendors like Serials Solutions, Innovative Interfaces, EBSCO, and Ex Libris, but most indicated that they used more than one tool for serials management. Participants specified 52 unique serials management products used in their libraries. Conclusion

  12. Fungal myositis in children: serial ultrasonographic findings

    Energy Technology Data Exchange (ETDEWEB)

    Kwon, Jung Hwa; Lee, Hee Jung; Choi, Jin Soo [Keimyung University School of Medicine, Daegu (Korea, Republic of)

    2003-08-01

    To evaluate serial ultrasonographic findings of fungal myositis in children. Eleven lesions caused by fungal myositis and occurring in six children were included in this study. Eight lesions in five children were histopathologically proven and the other three were clinically diagnosed. Serial ultrasonographic findings were retrospectively evaluated in terms of size, location, margin, internal echotexture and adjacent cortical change occurring during the follow-up period ranging from five days to two months. Three patients (50%) had multiple lesions. The sites of involvment were the thigh (n=4), calf (n=3), chest wall (n=2), abdominal wall (n=1) and forearm (n=1). Initially, diffuse muscular swelling was revealed, with ill-defined hypoechoic lesions confined to the muscle layer (n=8). Follow-up examination of eight lesions over a period of 5-10 days showed that round central echogenic lesions were surrounded by previous slightly echogenic lesions (n=6, 75%). Long-term follow-up of five lesions over a two-month period revealed periosteal thickening in one case (20%), and the peristence of echogenic solid nodules in four (80%). Pathologic examination showed that the central lesions correlated with a fungus ball and the peripheral slightly echogenic lesions corresponded to hematoma and necrosis. Serial ultrasonographic findings of fungal myositis in children revealed relatively constant features in each case. In particular, the findings of muscular necrosis and a fungus ball over a period of 5-14 days were thought to be characteristic.

  13. Fungal myositis in children: serial ultrasonographic findings

    International Nuclear Information System (INIS)

    Kwon, Jung Hwa; Lee, Hee Jung; Choi, Jin Soo

    2003-01-01

    To evaluate serial ultrasonographic findings of fungal myositis in children. Eleven lesions caused by fungal myositis and occurring in six children were included in this study. Eight lesions in five children were histopathologically proven and the other three were clinically diagnosed. Serial ultrasonographic findings were retrospectively evaluated in terms of size, location, margin, internal echotexture and adjacent cortical change occurring during the follow-up period ranging from five days to two months. Three patients (50%) had multiple lesions. The sites of involvment were the thigh (n=4), calf (n=3), chest wall (n=2), abdominal wall (n=1) and forearm (n=1). Initially, diffuse muscular swelling was revealed, with ill-defined hypoechoic lesions confined to the muscle layer (n=8). Follow-up examination of eight lesions over a period of 5-10 days showed that round central echogenic lesions were surrounded by previous slightly echogenic lesions (n=6, 75%). Long-term follow-up of five lesions over a two-month period revealed periosteal thickening in one case (20%), and the peristence of echogenic solid nodules in four (80%). Pathologic examination showed that the central lesions correlated with a fungus ball and the peripheral slightly echogenic lesions corresponded to hematoma and necrosis. Serial ultrasonographic findings of fungal myositis in children revealed relatively constant features in each case. In particular, the findings of muscular necrosis and a fungus ball over a period of 5-14 days were thought to be characteristic

  14. Comparative study of etched enamel and dentin for the adhesion of composite resins with the Er:YAG 2,94 {mu}m laser and CO{sub 2} 9,6 {mu}m laser: morphological (SEM) and tensile bond strength analysis; Estudo comparativo do condicionamento do esmalte e dentina para a adesao de resinas compostas com os lasers Er:YAG 2,94 {mu}m e com o laser CO{sub 2} de 9,6 {mu}m: analise morfologica e de resistencia a tracao

    Energy Technology Data Exchange (ETDEWEB)

    Marraccini, Tarso Mugnai

    2002-07-01

    The aim of this study was to evaluate and compare the tensile bond strength of a composite resin adhered to the enamel and dentin which have received superficial irradiation with an Er:YAG laser (2.94 {mu}m) or with CO{sub 2} laser ( 9.6 {mu}m) and later on etched with the phosphoric acid at 35%. After the use of the adhesive system, resin cones were made on the etched surfaces by both lasers and tensile bond strength tests were performed. All samples were observed at the SEM - there was an increase of the degree of fusion and resolidification in the irradiated enamel and dentin samples with the CO{sub 2} laser (9.6 {mu}m), creating a vitrified layer with tiny craters. With the Er:YAG laser (2.94 {mu}m) there were typical morphological explosive microablation with the exposition of the tubules in the dentin.The surface acquired by the association of the CO{sub 2} laser ( 9.6 {mu}m) plus acid etching no longer presented the aspect of fusion being this layer completely removed. There were statistical significant differences among ali three methods of etching in the treatment of the enamel and dentin surface. The tensile bond strength test showed that etching of these enamel and dentin surfaces with acid exclusively (control group) presented great values, surpassing the values of the etching acquired with the Er:YAG laser (2.94 {mu}) plus acid or the CO{sub 2} laser (9.6 {mu}m) plus acid. With the parameters used in this experiment the Er:YAG laser (2.94 {mu}m) showed to be more effective than the CO{sub 2} laser (9.6 {mu}m) for the hard dental surfaces etching procedure. (author)

  15. Development of a Self Aligned CMOS Process for Flash Lamp Annealed Polycrystalline Silicon TFTs

    Science.gov (United States)

    Bischoff, Paul

    The emerging active matrix liquid crystal (AMLCD) display market requires a high performing semiconductor material to meet rising standards of operation. Currently amorphous silicon (a-Si) dominates the market but it does not have the required mobility for it to be used in AMLCD manufacturing. Other materials have been developed including crystallizing a-Si into poly-silicon. A new approach to crystallization through the use of flash lamp annealing (FLA) decreases manufacturing time and greatly improves carrier mobility. Previous work on FLA silicon for the use in CMOS transistors revealed significant lateral dopant diffusion into the channel greatly increasing the minimum channel length required for a working device. This was further confounded by the gate overlap due to misalignment during lithography patterning steps. Through the use of furnace dopant activation instead of FLA dopant activation and a self aligned gate the minimum size transistor can be greatly reduced. A new lithography mask and process flow were developed for the furnace annealing and self aligned gate. Fabrication of the self aligned devices resulted in oxidation of the Molybdenum self aligned gate. Further development is needed to successfully manufacture these devices. Non-self aligned transistors were made simultaneously with self aligned devices and used the furnace activation. These devices showed an increase in sheet resistance from 250 O to 800 O and lower mobility from 380 to 40.2 V/cm2s. The lower mobility can be contributed to an increase in implanted trap density indicating furnace annealing is an inferior activation method over FLA. The minimum transistor size however was reduced from 20 to 5 mum. With improvements in the self aligned process high performing small devices can be manufactured.

  16. From animal cruelty to serial murder: applying the graduation hypothesis.

    Science.gov (United States)

    Wright, Jeremy; Hensley, Christopher

    2003-02-01

    Although serial murder has been recorded for centuries, limited academic attention has been given to this important topic. Scholars have attempted to examine the causality and motivations behind the rare phenomenon of serial murder. However, scant research exists which delves into the childhood characteristics of serial murderers. Using social learning theory, some of these studies present supporting evidence for a link between childhood animal cruelty and adult aggression toward humans. Based on five case studies of serial murderers, we contribute to the existing literature by exploring the possible link between childhood cruelty toward animals and serial murder with the application of the graduation hypothesis.

  17. Simulation of SEU transients in CMOS ICs

    International Nuclear Information System (INIS)

    Kaul, N.; Bhuva, B.L.; Kerns, S.E.

    1991-01-01

    This paper reports that available analytical models of the number of single-event-induced errors (SEU) in combinational logic systems are not easily applicable to real integrated circuits (ICs). An efficient computer simulation algorithm set, SITA, predicts the vulnerability of data stored in and processed by complex combinational logic circuits to SEU. SITA is described in detail to allow researchers to incorporate it into their error analysis packages. Required simulation algorithms are based on approximate closed-form equations modeling individual device behavior in CMOS logic units. Device-level simulation is used to estimate the probability that ion-device interactions produce erroneous signals capable of propagating to a latch (or n output node), and logic-level simulation to predict the spread of such erroneous, latched information through the IC. Simulation results are compared to those from SPICE for several circuit and logic configurations. SITA results are comparable to this established circuit-level code, and SITA can analyze circuits with state-of-the-art device densities (which SPICE cannot). At all IC complexity levels, SITAS offers several factors of 10 savings in simulation time over SPICE

  18. Fast Hopping Frequency Generation in Digital CMOS

    CERN Document Server

    Farazian, Mohammad; Gudem, Prasad S

    2013-01-01

    Overcoming the agility limitations of conventional frequency synthesizers in multi-band OFDM ultra wideband is a key research goal in digital technology. This volume outlines a frequency plan that can generate all the required frequencies from a single fixed frequency, able to implement center frequencies with no more than two levels of SSB mixing. It recognizes the need for future synthesizers to bypass on-chip inductors and operate at low voltages to enable the increased integration and efficiency of networked appliances. The author examines in depth the architecture of the dividers that generate the necessary frequencies from a single base frequency and are capable of establishing a fractional division ratio.   Presenting the first CMOS inductorless single PLL 14-band frequency synthesizer for MB-OFDMUWB makes this volume a key addition to the literature, and with the synthesizer capable of arbitrary band-hopping in less than two nanoseconds, it operates well within the desired range on a 1.2-volt power s...

  19. Electrothermal frequency references in standard CMOS

    CERN Document Server

    Kashmiri, S Mahdi

    2013-01-01

    This book describes an alternative method of accurate on-chip frequency generation in standard CMOS IC processes. This method exploits the thermal-diffusivity of silicon, the rate at which heat diffuses through a silicon substrate.  This is the first book describing thermal-diffusivity-based frequency references, including the complete theoretical methodology supported by practical realizations that prove the feasibility of the method.  Coverage also includes several circuit and system-level solutions for the analog electronic circuit design challenges faced.   ·         Surveys the state-of-the-art in all-silicon frequency references; ·         Examines the thermal properties of silicon as a solution for the challenge of on-chip accurate frequency generation; ·         Uses simplified modeling approaches that allow an electronics engineer easily to simulate the electrothermal elements; ·         Follows a top-down methodology in circuit design, in which system-level des...

  20. A New CMOS Posicast Pre-shaper for Vibration Reduction of CMOS Op-Amps

    Science.gov (United States)

    Rasoulzadeh, M.; Ghaznavi-Ghoushchi, M. B.

    2010-06-01

    Posicast-based control is a widely used method in vibration reduction of lightly damped oscillatory systems especially in mechanical fields. The target systems to apply Posicast method are the systems which are excited by pulse inputs. Using the Posicast idea, the input pulse is reshaped into a new pulse, which is called Posicast pulse. Applying the generated Posicast pulse reduces the undesired oscillatory manner of under-test systems. In this paper, a fully CMOS Pulse pre-shaper circuit for realization of Posicast command is proposed. Our design is based on delay-and-add approach for the incoming pulses. The delay is done via a modified Schmitt Trigger-like circuit. The adder circuit is implemented by a simple non-binary analog adder terminated by a passive element. Our proposed design has a reasonable flexibility in configuration of time delay and amplitude of the desired pulse-like shapes. The delay is controlled via the delay unit and the pre-shaped pulse's amplitudes are controlled by an analog adder unit. The overall system has 18 MOS transistors, one small capacitor, and one resistor. To verify the effectiveness of the recommended method, it is experienced on a real CMOS Op-Amp. HSPICE simulation results, on 0.25u technology, show a significant reduction on overshoot and settling time of the under-test Op-Amp. The mentioned reduction is more than 95% in overshoot and more than 60% in settling time of the system.

  1. Integration of Solar Cells on Top of CMOS Chips - Part II: CIGS Solar Cells

    NARCIS (Netherlands)

    Lu, J.; Liu, Wei; Kovalgin, Alexeij Y.; Sun, Yun; Schmitz, Jurriaan

    2011-01-01

    We present the monolithic integration of deepsubmicrometer complementary metal–oxide–semiconductor (CMOS) microchips with copper indium gallium (di)selenide (CIGS) solar cells. Solar cells are manufactured directly on unpackaged CMOS chips. The microchips maintain comparable electronic performance,

  2. Radiation Induced Fault Analysis for Wide Temperature BiCMOS Circuits, Phase I

    Data.gov (United States)

    National Aeronautics and Space Administration — State of the art Radiation Hardened by Design (RHBD) techniques do not account for wide temperature variations in BiCMOS process. Silicon-Germanium BiCMOS process...

  3. CMOS Compatibility of a Micromachining Process Developed for Semiconductor Neural Probe

    National Research Council Canada - National Science Library

    An, S

    2001-01-01

    .... Test transistor patterns generated using standard CMOS fabrication line were exposed to a post-CMOS probe making process including dielectric deposition, gold metalization and the dry etching step...

  4. CMOS Imaging Sensor Technology for Aerial Mapping Cameras

    Science.gov (United States)

    Neumann, Klaus; Welzenbach, Martin; Timm, Martin

    2016-06-01

    In June 2015 Leica Geosystems launched the first large format aerial mapping camera using CMOS sensor technology, the Leica DMC III. This paper describes the motivation to change from CCD sensor technology to CMOS for the development of this new aerial mapping camera. In 2002 the DMC first generation was developed by Z/I Imaging. It was the first large format digital frame sensor designed for mapping applications. In 2009 Z/I Imaging designed the DMC II which was the first digital aerial mapping camera using a single ultra large CCD sensor to avoid stitching of smaller CCDs. The DMC III is now the third generation of large format frame sensor developed by Z/I Imaging and Leica Geosystems for the DMC camera family. It is an evolution of the DMC II using the same system design with one large monolithic PAN sensor and four multi spectral camera heads for R,G, B and NIR. For the first time a 391 Megapixel large CMOS sensor had been used as PAN chromatic sensor, which is an industry record. Along with CMOS technology goes a range of technical benefits. The dynamic range of the CMOS sensor is approx. twice the range of a comparable CCD sensor and the signal to noise ratio is significantly better than with CCDs. Finally results from the first DMC III customer installations and test flights will be presented and compared with other CCD based aerial sensors.

  5. Characterization of active CMOS pixel sensors on high resistive substrate

    Energy Technology Data Exchange (ETDEWEB)

    Hirono, Toko; Hemperek, Tomasz; Huegging, Fabian; Krueger, Hans; Rymaszewski, Piotr; Wermes, Norbert [Physikalisches Institut, Universitaet Bonn, Bonn (Germany)

    2016-07-01

    Active CMOS pixel sensors are very attractive as radiation imaging pixel detector because they do not need cost-intensive fine pitch bump bonding. High radiation tolerance and time resolution are required to apply those sensors to upcoming particle physics experiments. To achieve these requirements, the active CMOS pixel sensors were developed on high resistive substrates. Signal charges are collected faster by drift in high resistive substrates than in standard low resistive substrates yielding also a higher radiation tolerance. A prototype of the active CMOS pixel sensor has been fabricated in the LFoundry 150 nm CMOS process on 2 kΩcm substrate. This prototype chip was thinned down to 300 μm and the backside has been processed and can contacted by an aluminum contact. The breakdown voltage is around -115 V, and the depletion width has been measured to be as large as 180 μm at a bias voltage of -110 V. Gain and noise of the readout circuitry agree with the designed values. Performance tests in the lab and test beam have been done before and after irradiation with X-rays and neutrons. In this presentation, the measurement results of the active CMOS prototype sensors are shown.

  6. VLSI scaling methods and low power CMOS buffer circuit

    International Nuclear Information System (INIS)

    Sharma Vijay Kumar; Pattanaik Manisha

    2013-01-01

    Device scaling is an important part of the very large scale integration (VLSI) design to boost up the success path of VLSI industry, which results in denser and faster integration of the devices. As technology node moves towards the very deep submicron region, leakage current and circuit reliability become the key issues. Both are increasing with the new technology generation and affecting the performance of the overall logic circuit. The VLSI designers must keep the balance in power dissipation and the circuit's performance with scaling of the devices. In this paper, different scaling methods are studied first. These scaling methods are used to identify the effects of those scaling methods on the power dissipation and propagation delay of the CMOS buffer circuit. For mitigating the power dissipation in scaled devices, we have proposed a reliable leakage reduction low power transmission gate (LPTG) approach and tested it on complementary metal oxide semiconductor (CMOS) buffer circuit. All simulation results are taken on HSPICE tool with Berkeley predictive technology model (BPTM) BSIM4 bulk CMOS files. The LPTG CMOS buffer reduces 95.16% power dissipation with 84.20% improvement in figure of merit at 32 nm technology node. Various process, voltage and temperature variations are analyzed for proving the robustness of the proposed approach. Leakage current uncertainty decreases from 0.91 to 0.43 in the CMOS buffer circuit that causes large circuit reliability. (semiconductor integrated circuits)

  7. Design and Fabrication of Vertically-Integrated CMOS Image Sensors

    Science.gov (United States)

    Skorka, Orit; Joseph, Dileepan

    2011-01-01

    Technologies to fabricate integrated circuits (IC) with 3D structures are an emerging trend in IC design. They are based on vertical stacking of active components to form heterogeneous microsystems. Electronic image sensors will benefit from these technologies because they allow increased pixel-level data processing and device optimization. This paper covers general principles in the design of vertically-integrated (VI) CMOS image sensors that are fabricated by flip-chip bonding. These sensors are composed of a CMOS die and a photodetector die. As a specific example, the paper presents a VI-CMOS image sensor that was designed at the University of Alberta, and fabricated with the help of CMC Microsystems and Micralyne Inc. To realize prototypes, CMOS dies with logarithmic active pixels were prepared in a commercial process, and photodetector dies with metal-semiconductor-metal devices were prepared in a custom process using hydrogenated amorphous silicon. The paper also describes a digital camera that was developed to test the prototype. In this camera, scenes captured by the image sensor are read using an FPGA board, and sent in real time to a PC over USB for data processing and display. Experimental results show that the VI-CMOS prototype has a higher dynamic range and a lower dark limit than conventional electronic image sensors. PMID:22163860

  8. CMOS Cell Sensors for Point-of-Care Diagnostics

    Science.gov (United States)

    Adiguzel, Yekbun; Kulah, Haluk

    2012-01-01

    The burden of health-care related services in a global era with continuously increasing population and inefficient dissipation of the resources requires effective solutions. From this perspective, point-of-care diagnostics is a demanded field in clinics. It is also necessary both for prompt diagnosis and for providing health services evenly throughout the population, including the rural districts. The requirements can only be fulfilled by technologies whose productivity has already been proven, such as complementary metal-oxide-semiconductors (CMOS). CMOS-based products can enable clinical tests in a fast, simple, safe, and reliable manner, with improved sensitivities. Portability due to diminished sensor dimensions and compactness of the test set-ups, along with low sample and power consumption, is another vital feature. CMOS-based sensors for cell studies have the potential to become essential counterparts of point-of-care diagnostics technologies. Hence, this review attempts to inform on the sensors fabricated with CMOS technology for point-of-care diagnostic studies, with a focus on CMOS image sensors and capacitance sensors for cell studies. PMID:23112587

  9. Implementation of a Multichannel Serial Data Streaming Algorithm using the Xilinx Serial RapidIO Solution

    Science.gov (United States)

    Doxley, Charles A.

    2016-01-01

    In the current world of applications that use reconfigurable technology implemented on field programmable gate arrays (FPGAs), there is a need for flexible architectures that can grow as the systems evolve. A project has limited resources and a fixed set of requirements that development efforts are tasked to meet. Designers must develop robust solutions that practically meet the current customer demands and also have the ability to grow for future performance. This paper describes the development of a high speed serial data streaming algorithm that allows for transmission of multiple data channels over a single serial link. The technique has the ability to change to meet new applications developed for future design considerations. This approach uses the Xilinx Serial RapidIO LOGICORE Solution to implement a flexible infrastructure to meet the current project requirements with the ability to adapt future system designs.

  10. Highly strained InGaAs/GaAs quantum wells emitting beyond 1.2 {mu}m

    Energy Technology Data Exchange (ETDEWEB)

    Sharma, T.K.; Zorn, M.; Zeimer, U.; Kissel, H.; Bugge, F.; Weyers, M. [Ferdinand-Braun-Institut fuer Hoechstfrequenztechnik, Gustav-Kirchhoff-Str. 4, 12489 Berlin (Germany)

    2005-09-01

    Highly strained In{sub x}Ga{sub 1-x}As quantum wells (QWs) with GaAs barriers emitting around 1.2 {mu}m are grown on GaAs substrates by metal organic vapour phase epitaxy (MOVPE) at low growth temperatures using conventional precursors. The effects of growth temperature, V/III ratio and growth rate on QW composition and luminescence properties are studied. The variation of indium incorporation with V/III ratio at a growth temperature of 510 C is found to be opposite to the results reported for 700 C. By an appropriate choice of the growth parameters, we could extend the room temperature photoluminescence (PL) wavelength of InGaAs/GaAs QWs up to about 1.24 {mu}m which corresponds to an average indium content of 41% in the QW. The results of the growth study were applied to broad area laser diodes emitting at 1193 nm with low threshold current densities. (copyright 2005 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim) (orig.)

  11. Evaluation of 'Just4Mums' - A community based healthy eating and physical activity course for obese pregnant women.

    Science.gov (United States)

    Olander, Ellinor K; Atkinson, Lou; French, David P

    2014-07-01

    Current NICE guidelines state that women in England need to be supported regarding eating healthily and being physically active during pregnancy. In response to these guidelines, the Just4Mums service was developed - a free six week community-based course for obese (BMI⩾30) pregnant women. The service encouraged a healthy weight gain in pregnancy through the provision of information on healthy eating and opportunities to be physically active. The aim of this evaluation was to provide preliminary evidence on efficacy. Participants' were assessed at the beginning and end of the course, in terms of healthy eating and physical activity (PA) behaviour, mental well-being, and mediating variables (i.e. intentions, self-efficacy and attitudes towards healthy eating and PA). Thirty-four out of 60 women (57%) women completed the course. There were few differences between those women who completed and did not complete the course. After attending the service, the intention-to-treat analysis showed an improvement in healthy eating (higher intake of fruit and vegetables, lower intake of fast food), no change in PA, reduction in sedentary behaviour and an improvement in mental well-being. Participants also increased their attitude, intention and self-efficacy towards engaging in PA and intention to eat fruit and vegetables. These findings suggest that women who completed the Just4Mums service improved their health behaviours. More research is needed to identify why so many women dropped out of the service. Copyright © 2014.

  12. Focusing X-rays to a 1-{mu}m spot using elastically bent, graded multilayer coated mirrors

    Energy Technology Data Exchange (ETDEWEB)

    Underwood, J.H.; Thompson, A.C.; Kortright, J.B. [Ernest Orlando Lawrence Berkeley National Lab., CA (United States)] [and others

    1997-04-01

    In the x-ray fluorescent microprobe at beamline 10.3.1, the ALS bending magnet source is demagnified by a factor of several hundred using a pair of mirrors arranged in the Kirkpatrick-Baez (K-B) configuration. These are coated with multilayers to increase reflectivity and limit the pass band of the x-rays striking the sample. The x-rays excite characteristic fluorescent x-rays of elements in the sample, which are analyzed by an energy dispersive Si-Li detector, for a sensitive assay of the elemental content. By scanning the focal spot the spatial distribution of the elements is determined; the spatial resolution depends on the size of this spot. When spherical mirrors are used, the spatial resolution is limited by aberrations to 5 or 10 {mu}m. This has been improved to 1 {mu}m through the use of an elliptical mirror formed by elastically bending a plane mirror of uniform width and thickness with the optimum combination of end couples.

  13. Internet Cognitive Behavioral Therapy for Women With Postnatal Depression: A Randomized Controlled Trial of MumMoodBooster.

    Science.gov (United States)

    Milgrom, Jeannette; Danaher, Brian G; Gemmill, Alan W; Holt, Charlene; Holt, Christopher J; Seeley, John R; Tyler, Milagra S; Ross, Jessica; Ericksen, Jennifer

    2016-03-07

    There are few published controlled trials examining the efficacy of Internet-based treatment for postnatal depression (PND) and none that assess diagnostic status (clinical remission) as the primary outcome. This is despite the need to improve treatment uptake and accessibility because fewer than 50% of postnatally depressed women seek help, even when identified as depressed. In a randomized controlled trial (RCT), we aimed to test the efficacy of a 6-session Internet intervention (the MumMoodBooster program, previously evaluated in a feasibility trial) in a sample of postnatal women with a clinical diagnosis of depression. The MumMoodBooster program is a cognitive behavioral therapy (CBT) intervention, is highly interactive, includes a partner website, and was supported by low-intensity telephone coaching. This was a parallel 2-group RCT (N=43) comparing the Internet CBT treatment (n=21) to treatment as usual (n=22). At baseline and at 12 weeks after enrollment, women's diagnostic status was assessed by telephone with the Standardized Clinical Interview for DSM-IV (SCID-IV) and symptom severity with the Beck Depression Inventory (BDI-II). Depression symptoms were measured repeatedly throughout the study period with the Patient Health Questionnaire (PHQ-9). At the end of the study, 79% (15/19) of women who received the Internet CBT treatment no longer met diagnostic criteria for depression on the SCID-IV (these outcome data were missing for 2 intervention participants). This contrasted with only 18% (4/22) remission in the treatment as usual condition. Depression scores on the BDI-II showed a large effect favoring the intervention group (d=.83, 95% CI 0.20-1.45). Small to medium effects were found on the PHQ-9 and on measures of anxiety and stress. Adherence to the program was very good with 86% (18/21) of users completing all sessions; satisfaction with the program was rated 3.1 out of 4 on average. Our results suggest that our Internet CBT program, Mum

  14. Development of 40 channel waveform sampling CMOS ASIC board for Positron Emission Tomography

    International Nuclear Information System (INIS)

    Shimazoe, Kenji; Yeol, Yeom-Jung; Minamikawa, Yasuhiro; Tomida, Yuki; Takahashi, Hiroyuki; Fujita, Kaoru; Nakazawa, Masaharu; Murayama, Hideo

    2007-01-01

    We have designed and fabricated 10 channel/6-bit waveform sampling ASICs using ROHM 0.35 μm CMOS technology. This chip was designed for GSO-APD γ-ray detector and provides a function of 'waveform recording' at a sampling frequency of 100 MHz. This chip has 10 channel inputs and each channel has preamp/variable gain amplifier/6-bit folding ADC. The folding ADC greatly reduces the number of comparators and the power consumption of the chip. This chip provides a full function of recording a transient behavior of detector charge signals for each pulse. Self-trigger function is equipped with the system and this will enable simultaneous record of all input waveforms. Each channel has 64 words FIFO where each waveform data are stored. Stored data are converted to serial data and passed to an FPGA where we can implement a detailed signal processing. This chip is operated at 3.3 V and the power consumption is 1.2 W/chip. We have developed a data acquisition board using four bare chips. This board has 40 input channels and we plan to use this board for APD-based DOI-PET detector system which utilizes several different crystals to recognize depth positions by the difference in their decay times

  15. CASTOR a VLSI CMOS mixed analog-digital circuit for low noise multichannel counting applications

    International Nuclear Information System (INIS)

    Comes, G.; Loddo, F.; Hu, Y.; Kaplon, J.; Ly, F.; Turchetta, R.; Bonvicini, V.; Vacchi, A.

    1996-01-01

    In this paper we present the design and first experimental results of a VLSI mixed analog-digital 1.2 microns CMOS circuit (CASTOR) for multichannel radiation detectors applications demanding low noise amplification and counting of radiation pulses. This circuit is meant to be connected to pixel-like detectors. Imaging can be obtained by counting the number of hits in each pixel during a user-controlled exposure time. Each channel of the circuit features an analog and a digital part. In the former one, a charge preamplifier is followed by a CR-RC shaper with an output buffer and a threshold discriminator. In the digital part, a 16-bit counter is present together with some control logic. The readout of the counters is done serially on a common tri-state output. Daisy-chaining is possible. A 4-channel prototype has been built. This prototype has been optimised for use in the digital radiography Syrmep experiment at the Elettra synchrotron machine in Trieste (Italy): its main design parameters are: shaping time of about 850 ns, gain of 190 mV/fC and ENC (e - rms)=60+17 C (pF). The counting rate per channel, limited by the analog part, can be as high as about 200 kHz. Characterisation of the circuit and first tests with silicon microstrip detectors are presented. They show the circuit works according to design specification and can be used for imaging applications. (orig.)

  16. 77 FR 26787 - Certain CMOS Image Sensors and Products Containing Same; Notice of Receipt of Complaint...

    Science.gov (United States)

    2012-05-07

    ... INTERNATIONAL TRADE COMMISSION [Docket No. 2895] Certain CMOS Image Sensors and Products.... International Trade Commission has received a complaint entitled Certain CMOS Image Sensors and Products... importation, and the sale within the United States after importation of certain CMOS image sensors and...

  17. Avalanche-mode silicon LEDs for monolithic optical coupling in CMOS technology

    NARCIS (Netherlands)

    Dutta, Satadal

    2017-01-01

    Complementary Metal-Oxide-Semiconductor (CMOS) integrated circuit (IC) technology is the most commercially successful platform in modern electronic and control systems. So called "smart power" technologies such as Bipolar CMOS DMOS (BCD), combine the computational power of CMOS with high voltage

  18. Electromagnetic Investigation of a CMOS MEMS Inductive Microphone

    Directory of Open Access Journals (Sweden)

    Farès TOUNSI

    2009-09-01

    Full Text Available This paper presents a detailed electromagnetic modeling for a new structure of a monolithic CMOS micromachined inductive microphone. We have shown, that the use of an alternative current (AC in the primary fixed inductor results in a substantially higher induced voltage in the secondary inductor comparing to the case when a direct current (DC is used. The expected increase of the induced voltage can be expressed by a voltage ratio of AC and DC solutions that is in the range of 3 to 6. A prototype fabrication of this microphone has been realized using a combination of standard CMOS 0.6 µm process with a CMOS-compatible post-process consisting in a bulk micromachining technology. The output voltage of the electrodynamic microphone that achieves the µV range can be increased by the use of the symmetric dual-layer spiral inductor structure.

  19. Small Pixel Hybrid CMOS X-ray Detectors

    Science.gov (United States)

    Hull, Samuel; Bray, Evan; Burrows, David N.; Chattopadhyay, Tanmoy; Falcone, Abraham; Kern, Matthew; McQuaide, Maria; Wages, Mitchell

    2018-01-01

    Concepts for future space-based X-ray observatories call for a large effective area and high angular resolution instrument to enable precision X-ray astronomy at high redshift and low luminosity. Hybrid CMOS detectors are well suited for such high throughput instruments, and the Penn State X-ray detector lab, in collaboration with Teledyne Imaging Sensors, has recently developed new small pixel hybrid CMOS X-ray detectors. These prototype 128x128 pixel devices have 12.5 micron pixel pitch, 200 micron fully depleted depth, and include crosstalk eliminating CTIA amplifiers and in-pixel correlated double sampling (CDS) capability. We report on characteristics of these new detectors, including the best read noise ever measured for an X-ray hybrid CMOS detector, 5.67 e- (RMS).

  20. Low-voltage CMOS operational amplifiers theory, design and implementation

    CERN Document Server

    Sakurai, Satoshi

    1995-01-01

    Low-Voltage CMOS Operational Amplifiers: Theory, Design and Implementation discusses both single and two-stage architectures. Opamps with constant-gm input stage are designed and their excellent performance over the rail-to-rail input common mode range is demonstrated. The first set of CMOS constant-gm input stages was introduced by a group from Technische Universiteit, Delft and Universiteit Twente, the Netherlands. These earlier versions of circuits are discussed, along with new circuits developed at the Ohio State University. The design, fabrication (MOSIS Tiny Chips), and characterization of the new circuits are now complete. Basic analog integrated circuit design concepts should be understood in order to fully appreciate the work presented. However, the topics are presented in a logical order and the circuits are explained in great detail, so that Low-Voltage CMOS Operational Amplifiers can be read and enjoyed by those without much experience in analog circuit design. It is an invaluable reference boo...

  1. A CMOS Humidity Sensor for Passive RFID Sensing Applications

    Science.gov (United States)

    Deng, Fangming; He, Yigang; Zhang, Chaolong; Feng, Wei

    2014-01-01

    This paper presents a low-cost low-power CMOS humidity sensor for passive RFID sensing applications. The humidity sensing element is implemented in standard CMOS technology without any further post-processing, which results in low fabrication costs. The interface of this humidity sensor employs a PLL-based architecture transferring sensor signal processing from the voltage domain to the frequency domain. Therefore this architecture allows the use of a fully digital circuit, which can operate on ultra-low supply voltage and thus achieves low-power consumption. The proposed humidity sensor has been fabricated in the TSMC 0.18 μm CMOS process. The measurements show this humidity sensor exhibits excellent linearity and stability within the relative humidity range. The sensor interface circuit consumes only 1.05 μW at 0.5 V supply voltage and reduces it at least by an order of magnitude compared to previous designs. PMID:24841250

  2. High-speed nonvolatile CMOS/MNOS RAM

    International Nuclear Information System (INIS)

    Derbenwick, G.F.; Dodson, W.D.; Sokel, R.J.

    1979-01-01

    A bulk silicon technology for a high-speed static CMOS/MNOS RAM has been developed. Radiation-hardened, high voltage CMOS circuits have been fabricated for the memory array driving circuits and the enhancement-mode p-channel MNOS memory transistors have been fabricated using a native tunneling oxide with a 45 nm CVD Si 3 N 4 insulator deposited at 750 0 C. Read cycle times less than 350 ns and write cycle times of 1 μs are projected for the final 1Kx1 design. The CMOS circuits provide adequate speed for the write and read cycles and minimize the standby power dissipation. Retention times well in excess of 30 min are projected

  3. A CMOS Humidity Sensor for Passive RFID Sensing Applications

    Directory of Open Access Journals (Sweden)

    Fangming Deng

    2014-05-01

    Full Text Available This paper presents a low-cost low-power CMOS humidity sensor for passive RFID sensing applications. The humidity sensing element is implemented in standard CMOS technology without any further post-processing, which results in low fabrication costs. The interface of this humidity sensor employs a PLL-based architecture transferring sensor signal processing from the voltage domain to the frequency domain. Therefore this architecture allows the use of a fully digital circuit, which can operate on ultra-low supply voltage and thus achieves low-power consumption. The proposed humidity sensor has been fabricated in the TSMC 0.18 μm CMOS process. The measurements show this humidity sensor exhibits excellent linearity and stability within the relative humidity range. The sensor interface circuit consumes only 1.05 µW at 0.5 V supply voltage and reduces it at least by an order of magnitude compared to previous designs.

  4. A CMOS humidity sensor for passive RFID sensing applications.

    Science.gov (United States)

    Deng, Fangming; He, Yigang; Zhang, Chaolong; Feng, Wei

    2014-05-16

    This paper presents a low-cost low-power CMOS humidity sensor for passive RFID sensing applications. The humidity sensing element is implemented in standard CMOS technology without any further post-processing, which results in low fabrication costs. The interface of this humidity sensor employs a PLL-based architecture transferring sensor signal processing from the voltage domain to the frequency domain. Therefore this architecture allows the use of a fully digital circuit, which can operate on ultra-low supply voltage and thus achieves low-power consumption. The proposed humidity sensor has been fabricated in the TSMC 0.18 μm CMOS process. The measurements show this humidity sensor exhibits excellent linearity and stability within the relative humidity range. The sensor interface circuit consumes only 1.05 µW at 0.5 V supply voltage and reduces it at least by an order of magnitude compared to previous designs.

  5. VHF NEMS-CMOS piezoresistive resonators for advanced sensing applications

    Science.gov (United States)

    Arcamone, Julien; Dupré, Cécilia; Arndt, Grégory; Colinet, Eric; Hentz, Sébastien; Ollier, Eric; Duraffourg, Laurent

    2014-10-01

    This work reports on top-down nanoelectromechanical resonators, which are among the smallest resonators listed in the literature. To overcome the fact that their electromechanical transduction is intrinsically very challenging due to their very high frequency (100 MHz) and ultimate size (each resonator is a 1.2 μm long, 100 nm wide, 20 nm thick silicon beam with 100 nm long and 30 nm wide piezoresistive lateral nanowire gauges), they have been monolithically integrated with an advanced fully depleted SOI CMOS technology. By advantageously combining the unique benefits of nanomechanics and nanoelectronics, this hybrid NEMS-CMOS device paves the way for novel breakthrough applications, such as NEMS-based mass spectrometry or hybrid NEMS/CMOS logic, which cannot be fully implemented without this association.

  6. A current mode feed-forward gain control system for a 0.8 V CMOS hearing aid

    Energy Technology Data Exchange (ETDEWEB)

    Li Fanyang; Yang Haigang; Liu Fei; Yin Tao, E-mail: yanghg@mail.ie.ac.cn [Institute of Electronics, Chinese Academy of Sciences, Beijing 100080 (China)

    2011-06-15

    A current mode feed-forward gain control (CMFGC) technique is presented, which is applied in the front-end system of a hearing aid chip. Compared with conventional automatic gain control (AGC), CMFGC significantly improves the total harmonic distortion (THD) by digital gain control. To attain the digital gain control codes according to the extremely weak output signal from the microphone, a rectifier and a state controller implemented in current mode are proposed. A prototype chip has been designed based on a 0.13 {mu}m standard CMOS process. The measurement results show that the supply voltage can be as low as 0.6 V. And with the 0.8 V supply voltage, the THD is improved and below 0.06% (-64 dB) at the output level of 500 mV{sub p-p}, yet the power consumption is limited to 40 {mu}W. In addition, the input referred noise is only 4 {mu}V{sub rms} and the maximum gain is maintained at 33 dB. (semiconductor integrated circuits)

  7. Full on-chip and area-efficient CMOS LDO with zero to maximum load stability using adaptive frequency compensation

    Energy Technology Data Exchange (ETDEWEB)

    Ma Haifeng; Zhou Feng, E-mail: fengzhou@fudan.edu.c [State Key Laboratory of ASIC and System, Fudan University, Shanghai 201203 (China)

    2010-01-15

    A full on-chip and area-efficient low-dropout linear regulator (LDO) is presented. By using the proposed adaptive frequency compensation (AFC) technique, full on-chip integration is achieved without compromising the LDO's stability in the full output current range. Meanwhile, the use of a compact pass transistor (the compact pass transistor serves as the gain fast roll-off output stage in the AFC technique) has enabled the LDO to be very area-efficient. The proposed LDO is implemented in standard 0.35 {mu}m CMOS technology and occupies an active area as small as 220 x 320 {mu}m{sup 2}, which is a reduction to 58% compared to state-of-the-art designs using technologies with the same feature size. Measurement results show that the LDO can deliver 0-60 mA output current with 54 {mu}A quiescent current consumption and the regulated output voltage is 1.8 V with an input voltage range from 2 to 3.3 V. (semiconductor integrated circuits)

  8. Energy Information Data Base: serial titles

    International Nuclear Information System (INIS)

    1980-06-01

    The Department of Energy Technical Information Center (TIC) is responsible for creating bibliographic data bases that are used in the announcement and retrieval of publications dealing with all phases of energy. The TIC interactive information processing system makes use of a number of computerized authorities so that consistency can be maintained and indexes can be produced. One such authority is the Energy Information Data Base: Serial Titles. This authority contains the full and abbreviated journal title, country of publication, CODEN, and certain codes. This revision replaces previous revisions of this document

  9. Serials collection management in recessionary times

    CERN Document Server

    Lawson, Karen G

    2015-01-01

    Strategic planning, collaboration, continual stewardship, best practices, and re-engineering can provide librarians with a toolkit of innovative strategies that meets the worst of economic times with bold, persistent experimentation. This book covers the implications for libraries of a broad range of technological and economic challenges. These challenges include the fallout from the global economic crisis, the positioning of usage statistics, the advent of open access scholarship, database management, responding to budgetary constrictions and general access to serials. Taken as a whole, this

  10. Inverse Kinematics of a Serial Robot

    Directory of Open Access Journals (Sweden)

    Amici Cinzia

    2016-01-01

    Full Text Available This work describes a technique to treat the inverse kinematics of a serial manipulator. The inverse kinematics is obtained through the numerical inversion of the Jacobian matrix, that represents the equation of motion of the manipulator. The inversion is affected by numerical errors and, in different conditions, due to the numerical nature of the solver, it does not converge to a reasonable solution. Thus a soft computing approach is adopted to mix different traditional methods to obtain an increment of algorithmic convergence.

  11. Rapid serial visual presentation design for cognition

    CERN Document Server

    Spence, Robert

    2013-01-01

    A powerful new image presentation technique has evolved over the last twenty years, and its value demonstrated through its support of many and varied common tasks. Conceptually, Rapid Serial Visual Presentation (RSVP) is basically simple, exemplified in the physical world by the rapid riffling of the pages of a book in order to locate a known image. Advances in computation and graphics processing allow RSVP to be applied flexibly and effectively to a huge variety of common tasks such as window shopping, video fast-forward and rewind, TV channel selection and product browsing. At its heart is a

  12. CAR-T cells are serial killers.

    Science.gov (United States)

    Davenport, Alexander J; Jenkins, Misty R; Ritchie, David S; Prince, H Miles; Trapani, Joseph A; Kershaw, Michael H; Darcy, Phillip K; Neeson, Paul J

    2015-12-01

    Chimeric antigen receptor (CAR) T cells have enjoyed unprecedented clinical success against haematological malignancies in recent years. However, several aspects of CAR T cell biology remain unknown. We recently compared CAR and T cell receptor (TCR)-based killing in the same effector cell and showed that CAR T cells can not only efficiently kill single tumor targets, they can also kill multiple tumor targets in a sequential manner. Single and serial killing events were not sustained long term due to CAR down-regulation after 20 hours.

  13. Personality disorders, psychopathy and serial killers

    OpenAIRE

    Morana, Hilda C P; Stone, Michael H; Abdalla-Filho, Elias

    2006-01-01

    OBJETIVO: Apresentar as características básicas dos diversos transtornos específicos de personalidade, mas centrando-se no transtorno de personalidade anti-social, fazendo sua diferenciação com psicopatia. O estudo ainda se propõe a abordar a figura do serial killer, apontando a presença de aspectos psicopáticos no homicídio seriado. MÉTODO: Uma revisão bibliográfica foi feita no sentido de se abordar convergências e divergências entre diversos autores sobre um assunto tão polêmico, sobretudo...

  14. 3.6 AND 4.5 {mu}m PHASE CURVES AND EVIDENCE FOR NON-EQUILIBRIUM CHEMISTRY IN THE ATMOSPHERE OF EXTRASOLAR PLANET HD 189733b

    Energy Technology Data Exchange (ETDEWEB)

    Knutson, Heather A. [Division of Geological and Planetary Sciences, California Institute of Technology, Pasadena, CA 91125 (United States); Lewis, Nikole; Showman, Adam P. [Department of Planetary Sciences and Lunar and Planetary Laboratory, University of Arizona, Tucson, AZ 85721 (United States); Fortney, Jonathan J.; Laughlin, Gregory [Department of Astronomy and Astrophysics, University of California, Santa Cruz, CA 95064 (United States); Burrows, Adam [Department of Astrophysical Sciences, Princeton University, Princeton, NJ 08544 (United States); Cowan, Nicolas B. [CIERA, Northwestern University, Evanston, IL 60208 (United States); Agol, Eric [Department of Astronomy, University of Washington, Seattle, WA 98195 (United States); Aigrain, Suzanne [Sub-department of Astrophysics, Department of Physics, University of Oxford, Oxford OX1 3RH (United Kingdom); Charbonneau, David; Desert, Jean-Michel [Harvard-Smithsonian Center for Astrophysics, 60 Garden St., Cambridge, MA 02138 (United States); Deming, Drake [Department of Astronomy, University of Maryland, College Park, MD 20742 (United States); Henry, Gregory W. [Center of Excellence in Information Systems, Tennessee State University, 3500 John A. Merritt Blvd., Box 9501, Nashville, TN 37209 (United States); Langton, Jonathan, E-mail: hknutson@caltech.edu [Department of Physics, Principia College, 1 Maybeck Place, Elsah, IL 62028 (United States)

    2012-07-20

    We present new, full-orbit observations of the infrared phase variations of the canonical hot Jupiter HD 189733b obtained in the 3.6 and 4.5 {mu}m bands using the Spitzer Space Telescope. When combined with previous phase curve observations at 8.0 and 24 {mu}m, these data allow us to characterize the exoplanet's emission spectrum as a function of planetary longitude and to search for local variations in its vertical thermal profile and atmospheric composition. We utilize an improved method for removing the effects of intrapixel sensitivity variations and robustly extracting phase curve signals from these data, and we calculate our best-fit parameters and uncertainties using a wavelet-based Markov Chain Monte Carlo analysis that accounts for the presence of time-correlated noise in our data. We measure a phase curve amplitude of 0.1242% {+-} 0.0061% in the 3.6 {mu}m band and 0.0982% {+-} 0.0089% in the 4.5 {mu}m band, corresponding to brightness temperature contrasts of 503 {+-} 21 K and 264 {+-} 24 K, respectively. We find that the times of minimum and maximum flux occur several hours earlier than predicted for an atmosphere in radiative equilibrium, consistent with the eastward advection of gas by an equatorial super-rotating jet. The locations of the flux minima in our new data differ from our previous observations at 8 {mu}m, and we present new evidence indicating that the flux minimum observed in the 8 {mu}m is likely caused by an overshooting effect in the 8 {mu}m array. We obtain improved estimates for HD 189733b's dayside planet-star flux ratio of 0.1466% {+-} 0.0040% in the 3.6 {mu}m band and 0.1787% {+-} 0.0038% in the 4.5 {mu}m band, corresponding to brightness temperatures of 1328 {+-} 11 K and 1192 {+-} 9 K, respectively; these are the most accurate secondary eclipse depths obtained to date for an extrasolar planet. We compare our new dayside and nightside spectra for HD 189733b to the predictions of one-dimensional radiative transfer models

  15. E-Beam Effects on CMOS Active Pixel Sensors

    International Nuclear Information System (INIS)

    Kang, Dong Ook; Jo, Gyu Seong; Kim, Hyeon Daek; Kim, Hyunk Taek; Kim, Jong Yeol; Kim, Chan Kyu

    2011-01-01

    Three different CMOS active pixel structures manufactured in a deep submicron process have been evaluated with electron beam. The devices were exposed to 1 MeV electron beam up to 5kGy. Dark current increased after E-beam irradiation differently at each pixel structure. Dark current change is dependent on CMOS pixel structures. CMOS image sensors are now good candidates in demanding applications such as medical image sensor, particle detection and space remote sensing. In these situations, CISs are exposed to high doses of radiation. In fact radiation is known to generate trapped charge in CMOS oxides. It can lead to threshold voltage shifts and current leakages in MOSFETs and dark current increase in photodiodes. We studied ionizing effects in three types of CMOS APSs fabricated by 0.25 CMOS process. The devices were irradiated by a Co 60 source up to 50kGy. All irradiation took place at room temperature. The dark current in the three different pixels exhibits increase with electron beam exposure. From the above figure, the change of dark current is dependent on the pixel structure. Double junction structure has shown relatively small increase of dark current after electron beam irradiation. The dark current in the three different pixels exhibits increase with electron beam exposure. The contribution of the total ionizing dose to the dark current increase is small here, since the devices were left unbiased during the electron beam irradiation. Radiation hardness in dependent on the pixel structures. Pixel2 is relatively vulnerable to radiation exposure. Pixel3 has radiation hardened structure

  16. An introduction to deep submicron CMOS for vertex applications

    CERN Document Server

    Campbell, M; Cantatore, E; Faccio, F; Heijne, Erik H M; Jarron, P; Santiard, Jean-Claude; Snoeys, W; Wyllie, K

    2001-01-01

    Microelectronics has become a key enabling technology in the development of tracking detectors for High Energy Physics. Deep submicron CMOS is likely to be extensively used in all future tracking systems. Radiation tolerance in the Mrad region has been achieved and complete readout chips comprising many millions of transistors now exist. The choice of technology is dictated by market forces but the adoption of deep submicron CMOS for tracking applications still poses some challenges. The techniques used are reviewed and some of the future challenges are discussed.

  17. CMOS voltage references an analytical and practical perspective

    CERN Document Server

    Kok, Chi-Wah

    2013-01-01

    A practical overview of CMOS circuit design, this book covers the technology, analysis, and design techniques of voltage reference circuits.  The design requirements covered follow modern CMOS processes, with an emphasis on low power, low voltage, and low temperature coefficient voltage reference design. Dedicating a chapter to each stage of the design process, the authors have organized the content to give readers the tools they need to implement the technologies themselves. Readers will gain an understanding of device characteristics, the practical considerations behind circuit topology,

  18. A 205GHz Amplifier in 90nm CMOS Technology

    Science.gov (United States)

    2017-03-01

    10.5dB power gain, Psat of -1.6dBm, and P1dB ≈ -5.8dBm in a standard 90nm CMOS process. Moreover, the design employs internal (layout-based) /external...other advantages, such as low- cost , reliability, and mixed-mode analog/digital chips, intensifying its usage in the mm-wave band [5]. CMOS has several... disadvantages at the higher frequency range with the worst case scenario happening when the device operates near its fmax. This is chiefly due to

  19. Single-chip RF communications systems in CMOS

    DEFF Research Database (Denmark)

    Olesen, Ole

    1997-01-01

    The paper describes the state of the art of the Nordic mobile communication project ConFront. This is a cooperation project with 3 Nordic universities and local industry. The ultimate goal is to make a CMOS one-chip mobile phone.......The paper describes the state of the art of the Nordic mobile communication project ConFront. This is a cooperation project with 3 Nordic universities and local industry. The ultimate goal is to make a CMOS one-chip mobile phone....

  20. Large Format CMOS-based Detectors for Diffraction Studies

    Science.gov (United States)

    Thompson, A. C.; Nix, J. C.; Achterkirchen, T. G.; Westbrook, E. M.

    2013-03-01

    Complementary Metal Oxide Semiconductor (CMOS) devices are rapidly replacing CCD devices in many commercial and medical applications. Recent developments in CMOS fabrication have improved their radiation hardness, device linearity, readout noise and thermal noise, making them suitable for x-ray crystallography detectors. Large-format (e.g. 10 cm × 15 cm) CMOS devices with a pixel size of 100 μm × 100 μm are now becoming available that can be butted together on three sides so that very large area detector can be made with no dead regions. Like CCD systems our CMOS systems use a GdOS:Tb scintillator plate to convert stopping x-rays into visible light which is then transferred with a fiber-optic plate to the sensitive surface of the CMOS sensor. The amount of light per x-ray on the sensor is much higher in the CMOS system than a CCD system because the fiber optic plate is only 3 mm thick while on a CCD system it is highly tapered and much longer. A CMOS sensor is an active pixel matrix such that every pixel is controlled and readout independently of all other pixels. This allows these devices to be readout while the sensor is collecting charge in all the other pixels. For x-ray diffraction detectors this is a major advantage since image frames can be collected continuously at up 20 Hz while the crystal is rotated. A complete diffraction dataset can be collected over five times faster than with CCD systems with lower radiation exposure to the crystal. In addition, since the data is taken fine-phi slice mode the 3D angular position of diffraction peaks is improved. We have developed a cooled 6 sensor CMOS detector with an active area of 28.2 × 29.5 cm with 100 μm × 100 μm pixels and a readout rate of 20 Hz. The detective quantum efficiency exceeds 60% over the range 8-12 keV. One, two and twelve sensor systems are also being developed for a variety of scientific applications. Since the sensors are butt able on three sides, even larger systems could be built at

  1. Two CMOS BGR using CM and DTMOST techniques

    International Nuclear Information System (INIS)

    Mohd-Yasin, F.; Teh, Y.K.; Choong, F.; Reaz, M.B.I.

    2009-06-01

    Two CMOS BGR using current mode (0.044mm 2 ) and Dynamic Threshold MOST (0.017mm 2 ) techniques are designed on CMOS 0.18μm process. On-wafer measurement shows both circuits have minimum operating V DD 1.28V at 25 o C; taking 2.1μA and 0.5μA (maximum current 3.1μA and 1.1μA) and output voltage of 514mV and 457mV. Both circuits could support V DD range up to 4V required by passive UHF RFID. (author)

  2. Large Format CMOS-based Detectors for Diffraction Studies

    International Nuclear Information System (INIS)

    Thompson, A C; Westbrook, E M; Nix, J C; Achterkirchen, T G

    2013-01-01

    Complementary Metal Oxide Semiconductor (CMOS) devices are rapidly replacing CCD devices in many commercial and medical applications. Recent developments in CMOS fabrication have improved their radiation hardness, device linearity, readout noise and thermal noise, making them suitable for x-ray crystallography detectors. Large-format (e.g. 10 cm × 15 cm) CMOS devices with a pixel size of 100 μm × 100 μm are now becoming available that can be butted together on three sides so that very large area detector can be made with no dead regions. Like CCD systems our CMOS systems use a GdOS:Tb scintillator plate to convert stopping x-rays into visible light which is then transferred with a fiber-optic plate to the sensitive surface of the CMOS sensor. The amount of light per x-ray on the sensor is much higher in the CMOS system than a CCD system because the fiber optic plate is only 3 mm thick while on a CCD system it is highly tapered and much longer. A CMOS sensor is an active pixel matrix such that every pixel is controlled and readout independently of all other pixels. This allows these devices to be readout while the sensor is collecting charge in all the other pixels. For x-ray diffraction detectors this is a major advantage since image frames can be collected continuously at up 20 Hz while the crystal is rotated. A complete diffraction dataset can be collected over five times faster than with CCD systems with lower radiation exposure to the crystal. In addition, since the data is taken fine-phi slice mode the 3D angular position of diffraction peaks is improved. We have developed a cooled 6 sensor CMOS detector with an active area of 28.2 × 29.5 cm with 100 μm × 100 μm pixels and a readout rate of 20 Hz. The detective quantum efficiency exceeds 60% over the range 8-12 keV. One, two and twelve sensor systems are also being developed for a variety of scientific applications. Since the sensors are butt able on three sides, even larger systems could be built at

  3. Application of CMOS Technology to Silicon Photomultiplier Sensors

    Science.gov (United States)

    D’Ascenzo, Nicola; Zhang, Xi; Xie, Qingguo

    2017-01-01

    We use the 180 nm GLOBALFOUNDRIES (GF) BCDLite CMOS process for the production of a silicon photomultiplier prototype. We study the main characteristics of the developed sensor in comparison with commercial SiPMs obtained in custom technologies and other SiPMs developed with CMOS-compatible processes. We support our discussion with a transient modeling of the detection process of the silicon photomultiplier as well as with a series of static and dynamic experimental measurements in dark and illuminated environments. PMID:28946675

  4. Linear CMOS RF power amplifiers a complete design workflow

    CERN Document Server

    Ruiz, Hector Solar

    2013-01-01

    The work establishes the design flow for the optimization of linear CMOS power amplifiers from the first steps of the design to the final IC implementation and tests. The authors also focuses on design guidelines of the inductor's geometrical characteristics for power applications and covers their measurement and characterization. Additionally, a model is proposed which would facilitate designs in terms of transistor sizing, required inductor quality factors or minimum supply voltage. The model considers limitations that CMOS processes can impose on implementation. The book also provides diffe

  5. CMOS sigma-delta converters practical design guide

    CERN Document Server

    De la Rosa, Jose M

    2013-01-01

    A comprehensive overview of Sigma-Delta Analog-to-Digital Converters (ADCs) and a practical guide to their design in nano-scale CMOS for optimal performance. This book presents a systematic and comprehensive compilation of sigma-delta converter operating principles, the new advances in architectures and circuits, design methodologies and practical considerations - going from system-level specifications to silicon integration, packaging and measurements, with emphasis on nanometer CMOS implementation. The book emphasizes practical design issues - from high-level behavioural modelling i

  6. CMOS-compatible photonic devices for single-photon generation

    Directory of Open Access Journals (Sweden)

    Xiong Chunle

    2016-09-01

    Full Text Available Sources of single photons are one of the key building blocks for quantum photonic technologies such as quantum secure communication and powerful quantum computing. To bring the proof-of-principle demonstration of these technologies from the laboratory to the real world, complementary metal–oxide–semiconductor (CMOS-compatible photonic chips are highly desirable for photon generation, manipulation, processing and even detection because of their compactness, scalability, robustness, and the potential for integration with electronics. In this paper, we review the development of photonic devices made from materials (e.g., silicon and processes that are compatible with CMOS fabrication facilities for the generation of single photons.

  7. Galileo - The Serial-Production AIT Challenge

    Science.gov (United States)

    Ragnit, Ulrike; Brunner, Otto

    2008-01-01

    The Galileo Project is one of the most demanding projects of ESA, being Europe's autarkic navigation system and a constellation composed of 30 satellites. This presentation points out the different phases of the project up to the full operational capability and the corresponding launch options with respect to launch vehicles as well as launch configurations. One of the biggest challenges is to set up a small serial 'production line' for the overall integration and test campaign of satellites. This production line demands an optimization of all relevant tasks, taking into account also backup and recovery actions. A comprehensive AIT concept is required, reflecting a tightly merged facility layout and work flow design. In addition a common data management system is needed to handle all spacecraft related documentation and to have a direct input-out flow for all activities, phases and positions at the same time. Process optimization is a well known field of engineering in all small high tech production lines, nevertheless serial production of satellites are still not the daily task in space business and therefore new concepts have to be put in place. Therefore, and in order to meet the satellites overall system optimization, a thorough interface between unit/subsystem manufacturing and satellite AIT must be realized to ensure a smooth flow and to avoid any process interruption, which would directly lead to a schedule impact.

  8. Spatial serial order processing in schizophrenia.

    Science.gov (United States)

    Fraser, David; Park, Sohee; Clark, Gina; Yohanna, Daniel; Houk, James C

    2004-10-01

    The aim of this study was to examine serial order processing deficits in 21 schizophrenia patients and 16 age- and education-matched healthy controls. In a spatial serial order working memory task, one to four spatial targets were presented in a randomized sequence. Subjects were required to remember the locations and the order in which the targets were presented. Patients showed a marked deficit in ability to remember the sequences compared with controls. Increasing the number of targets within a sequence resulted in poorer memory performance for both control and schizophrenia subjects, but the effect was much more pronounced in the patients. Targets presented at the end of a long sequence were more vulnerable to memory error in schizophrenia patients. Performance deficits were not attributable to motor errors, but to errors in target choice. The results support the idea that the memory errors seen in schizophrenia patients may be due to saturating the working memory network at relatively low levels of memory load.

  9. Serial position curves in free recall.

    Science.gov (United States)

    Laming, Donald

    2010-01-01

    The scenario for free recall set out in Laming (2009) is developed to provide models for the serial position curves from 5 selected sets of data, for final free recall, and for multitrial free recall. The 5 sets of data reflect the effects of rate of presentation, length of list, delay of recall, and suppression of rehearsal. Each model accommodates the serial position curve for first recalls (where those data are available) as well as that for total recalls. Both curves are fit with the same parameter values, as also (with 1 exception) are all of the conditions compared within each experiment. The distributions of numbers of recalls are also examined and shown to have variances increased above what would be expected if successive recalls were independent. This is taken to signify that, in those experiments in which rehearsals were not recorded, the retrieval of words for possible recall follows the same pattern that is observed following overt rehearsal, namely, that retrieval consists of runs of consecutive elements from memory. Finally, 2 sets of data are examined that the present approach cannot accommodate. It is argued that the problem with these data derives from an interaction between the patterns of (covert) rehearsal and the parameters of list presentation.

  10. Malingering, coaching, and the serial position effect.

    Science.gov (United States)

    Suhr, Julie A

    2002-01-01

    The normal pattern of performance on list-learning tasks is to recall more words from the beginning (primacy) and end (recency) of the list. This pattern is also seen in patients with closed head injury, but malingerers tend to recall less words from the beginning of word lists, leading to a suppressed primacy effect. The present study examined this pattern on both learning trials and delayed recall of the Auditory Verbal Learning Test (AVLT) in 34 persons performing with normal effort, 38 naive malingerers, 33 warned malingerers, and 29 head-injured patients. Both malingering groups had lower scores on the primacy portion of the list during learning trials, while normals and head-injured patients had normal serial position curves. During delayed recall, normals and head-injured patients did better than the two malingering groups on middle and recency portions of the list. Findings suggest that the serial position effect during learning trials may be a useful pattern of performance to watch for when suspicious of malingering.

  11. Rapid-Sequence Serial Sexual Homicides.

    Science.gov (United States)

    Schlesinger, Louis B; Ramirez, Stephanie; Tusa, Brittany; Jarvis, John P; Erdberg, Philip

    2017-03-01

    Serial sexual murderers have been described as committing homicides in a methodical manner, taking substantial time between offenses to elude the authorities. The results of our study of the temporal patterns (i.e., the length of time between homicides) of a nonrandom national sample of 44 serial sexual murderers and their 201 victims indicate that this representation may not always be accurate. Although 25 offenders (56.8%) killed with longer than a 14-day period between homicides, a sizeable subgroup was identified: 19 offenders (43.2%) who committed homicides in rapid-sequence fashion, with fewer than 14 days between all or some of the murders. Six offenders (13.6%) killed all their victims in one rapid-sequence, spree-like episode, with homicides just days apart or sometimes two murders in the same day. Thirteen offenders (29.5%) killed in one or two rapid-sequence clusters (i.e., more than one murder within a 14-day period, as well as additional homicides with greater than 14 days between each). The purpose of our study was to describe this subgroup of rapid-sequence offenders who have not been identified until now. These findings argue for accelerated forensic assessments of dangerousness and public safety when a sexual murder is detected. Psychiatric disorders with rapidly occurring symptom patterns, or even atypical mania or mood dysregulation, may serve as exemplars for understanding this extraordinary group of offenders. © 2017 American Academy of Psychiatry and the Law.

  12. A Nordic project on high speed low power design in sub-micron CMOS technology for mobile phones

    DEFF Research Database (Denmark)

    Olesen, Ole

    circuit design is based on state-of-the-art CMOS technology (0.5µm and below) including circuits operating at 2GHz. CMOS technology is chosen, since a CMOS implementation is likely to be significantly cheaper than a bipolar or a BiCMOS solution, and it offers the possibility to integrate the predominantly...

  13. CMOS capacitive sensors for lab-on-chip applications a multidisciplinary approach

    CERN Document Server

    Ghafar-Zadeh, Ebrahim

    2010-01-01

    The main components of CMOS capacitive biosensors including sensing electrodes, bio-functionalized sensing layer, interface circuitries and microfluidic packaging are verbosely explained in chapters 2-6 after a brief introduction on CMOS based LoCs in Chapter 1. CMOS Capacitive Sensors for Lab-on-Chip Applications is written in a simple pedagogical way. It emphasises practical aspects of fully integrated CMOS biosensors rather than mathematical calculations and theoretical details. By using CMOS Capacitive Sensors for Lab-on-Chip Applications, the reader will have circuit design methodologies,

  14. A 128 x 128 CMOS Active Pixel Image Sensor for Highly Integrated Imaging Systems

    Science.gov (United States)

    Mendis, Sunetra K.; Kemeny, Sabrina E.; Fossum, Eric R.

    1993-01-01

    A new CMOS-based image sensor that is intrinsically compatible with on-chip CMOS circuitry is reported. The new CMOS active pixel image sensor achieves low noise, high sensitivity, X-Y addressability, and has simple timing requirements. The image sensor was fabricated using a 2 micrometer p-well CMOS process, and consists of a 128 x 128 array of 40 micrometer x 40 micrometer pixels. The CMOS image sensor technology enables highly integrated smart image sensors, and makes the design, incorporation and fabrication of such sensors widely accessible to the integrated circuit community.

  15. CAMAC serial highway interface for the LSI-11

    International Nuclear Information System (INIS)

    Lau, N.H.

    1980-01-01

    A CAMAC Serial Highway Interface has been designed for the Local Control and Instrumentation System of the Mirror Fusion Test Facility. There are over 50 distinguishable systems in the facility, each of which consists of the LSI-11 computer, fiber optic communication links, and the CAMAC system. The LSI-11 computer includes a 32k memory, serial modem interface and the CAMAC Serial Highway Interface

  16. Implementation of Serial and Parallel Bubble Sort on Fpga

    OpenAIRE

    Purnomo, Dwi Marhaendro Jati; Arinaldi, Ahmad; Priyantini, Dwi Teguh; Wibisono, Ari; Febrian, Andreas

    2016-01-01

    Sorting is common process in computational world. Its utilization are on many fields from research to industry. There are many sorting algorithm in nowadays. One of the simplest yet powerful is bubble sort. In this study, bubble sort is implemented on FPGA. The implementation was taken on serial and parallel approach. Serial and parallel bubble sort then compared by means of its memory, execution time, and utility which comprises slices and LUTs. The experiments show that serial bubble sort r...

  17. SERIAL TELEVISI DEXTER SEBAGAI ANAKRONISME DALAM SASTRA POPULER

    OpenAIRE

    Ida Rochani Adi

    2014-01-01

    In the popular literature context, this study aims to investigate: (1) how the formulation of the characterization of Dexter in the television serial Dexter violates the tradition of literary characterization, and (2) how the formula of moral values is dramatized through Dexter, who is a sociopath, psychopath, serial killer, and person without moral. The research object was the television serial Dexter, which ranks five in popularity in the world. The data were collected by documenting 84 epi...

  18. Representation of the serial killer on the Italian Internet.

    Science.gov (United States)

    Villano, P; Bastianoni, P; Melotti, G

    2001-10-01

    The representation of serial killers was examined from the analysis of 317 Web pages in the Italian language to study how the psychological profiles of serial killers are described on the Italian Internet. The correspondence analysis of the content of these Web pages shows that in Italy the serial killer is associated with words such as "monster" and "horror," which suggest and imply psychological perversion and aberrant acts. These traits are peculiar for the Italian scenario.

  19. A Serializer ASIC for High Speed Data Transmission in Cryogenic and HiRel Environment

    CERN Document Server

    Liu, T; The ATLAS collaboration

    2010-01-01

    A low power 16:1 serializer (called LOCs1), operates from 4.0 to 5.8 Gb/s, has been developed using a commercial 0.25 μm silicon-on-sapphire CMOS technology. LOCs1 is the first step towards an optical link for the readout upgrade of the Liquid Argon Calorimeter (LAr) in ATLAS for the super LHC. This optical link needs to operate at 100 Gb/s for one front-end board (FEB) over a 12-way fiber ribbon, with 20% redundant channels to improve system reliability in the radiation environment of the LHC. There are 1524 FEBs so the total data bandwidth will be over 150 Tb/s. LOCs1 is also a candidate for another optical link system proposed to readout the experimental data in the large Liquid Argon Time Projection Chamber (LArTPC) for the Long Baseline Neutrino Experiment (LBNE). In this application the transmitting side of the link will operate inside a cryostat at 89 K. In this paper we present the test results of LOCs1, both in room temperature and at liquid nitrogen temperature of 77 K. A proton irradiation of LOCs...

  20. Establishment and characterization of a unique 1 {mu}m diameter liver-derived progenitor cell line

    Energy Technology Data Exchange (ETDEWEB)

    Aravalli, Rajagopal N., E-mail: arava001@umn.edu [Department of Radiology, University of Minnesota Medical School, Minneapolis, MN 55455 (United States); Behnan Sahin, M. [Department of Medicine, University of Minnesota Medical School, Minneapolis, MN 55455 (United States); Cressman, Erik N.K. [Department of Radiology, University of Minnesota Medical School, Minneapolis, MN 55455 (United States); Steer, Clifford J., E-mail: steer001@umn.edu [Department of Medicine, University of Minnesota Medical School, Minneapolis, MN 55455 (United States); Department of Genetics, Cell Biology, and Development, University of Minnesota Medical School, Minneapolis, MN 55455 (United States)

    2010-01-01

    Liver-derived progenitor cells (LDPCs) are recently identified novel stem/progenitor cells from healthy, unmanipulated adult rat livers. They are distinct from other known liver stem/progenitor cells such as the oval cells. In this study, we have generated a LDPC cell line RA1 by overexpressing the simian virus 40 (SV40) large T antigen (TAg) in primary LDPCs. This cell line was propagated continuously for 55 passages in culture, after which it became senescent. Interestingly, following transformation with SV40 TAg, LDPCs decreased in size significantly and the propagating cells measured 1 {mu}m in diameter. RA1 cells proliferated in vitro with a doubling time of 5-7 days, and expressed cell surface markers of LDPCs. In this report, we describe the characterization of this novel progenitor cell line that might serve as a valuable model to study liver cell functions and stem cell origin of liver cancers.

  1. IMPLEMENTATION OF SERIAL AND PARALLEL BUBBLE SORT ON FPGA

    Directory of Open Access Journals (Sweden)

    Dwi Marhaendro Jati Purnomo

    2016-06-01

    Full Text Available Sorting is common process in computational world. Its utilization are on many fields from research to industry. There are many sorting algorithm in nowadays. One of the simplest yet powerful is bubble sort. In this study, bubble sort is implemented on FPGA. The implementation was taken on serial and parallel approach. Serial and parallel bubble sort then compared by means of its memory, execution time, and utility which comprises slices and LUTs. The experiments show that serial bubble sort required smaller memory as well as utility compared to parallel bubble sort. Meanwhile, parallel bubble sort performed faster than serial bubble sort

  2. A psychological profile of a serial killer: a case report.

    Science.gov (United States)

    Dogra, T D; Leenaars, Antoon A; Chadha, R K; Manju, Mehta; Lalwani, Sanjeev; Sood, Mamta; Lester, David; Raina, Anupuma; Behera, C

    2012-01-01

    Serial killers have always fascinated society. A serial killer is typically defined as a perpetrator who murders three or more people over a period of time. Most reported cases of serial killers come from the United States and Canada. In India, there are few reported cases. We present, to the best of our knowledge, the first Indian case in the literature. The present case is of a 28-year-old man, Surinder Koli. The Department of Forensic Medicine & Toxicology, All India Institute of Medical Sciences, New Delphi handled the forensic study. We present a most unique psychological investigation into the mind of a serial killer.

  3. Malignant sex and aggression: an overview of serial sexual homicide.

    Science.gov (United States)

    Myers, W C; Reccoppa, L; Burton, K; McElroy, R

    1993-01-01

    Serial murderers have attracted considerable attention in the popular press and criminal justice field, but scientific literature about these individuals is limited. This article provides an overview, from a psychiatric perspective, of serial sexual homicide, one type of serial killing. Characteristics of this type of murder and of these offenders are discussed. Defining qualities and diagnoses applicable to serial sexual killers are reviewed. Various etiologic theories are discussed, with emphasis on the role of fantasy and psychodynamic explanations. Governmental agencies involved in combating this type of crime, along with the role of mental health professionals in criminal profiling, are presented. Finally, the authors explore the reaction of society to this phenomenon.

  4. Interaction of 0.53 {mu}m laser pulse with millimeter-scale plasmas generated by gasbag target

    Energy Technology Data Exchange (ETDEWEB)

    Li Zhichao; Guo Liang [CAS Key Laboratory of Basic Plasma Physics, and Department of Modern Physics, University of Science and Technology of China, Hefei, Anhui (China); Research Center of Laser Fusion, China Academy of Engineering Physics, Mianyang, Sichuan (China); Zheng Jian; Yuan Peng [CAS Key Laboratory of Basic Plasma Physics, and Department of Modern Physics, University of Science and Technology of China, Hefei, Anhui (China); Jiang Xiaohua; Wang Zhebin; Yang Dong; Zhang Huan; Li Sanwei; Yin Qiang; Zhu Fanghua; Peng Xiaoshi; Wang Feng; Yuan Zheng; Chen Li; Liu Shenye; Jiang Shaoen; Ding Yongkun [Research Center of Laser Fusion, China Academy of Engineering Physics, Mianyang, Sichuan (China); Shao Ping [Shanghai Institute of Optics and Fine Mechanics, CAS, Shanghai (China)

    2012-06-15

    Detailed research on the interaction of a 0.53 {mu}m laser pulse with millimeter-scale plasmas produced by a gasbag target on the Shengguang-II facility is presented. The x-ray pinhole images confirm that millimeter-scale plasmas are generated and the x-ray framing images show a temporal window of 0.6-1.1 ns during which the millimeter-scale plasmas exist. The electron temperature is measured with a collective Thomson scattering system, providing 0.64 keV for C{sub 5}H{sub 12} and 1.8 keV for Xe plasmas. The electron density is inferred from the stimulated Raman scattering spectra. The experimental spectra show large differences for C{sub 5}H{sub 12}- and Xe-filled gasbags. A one-dimensional code based upon steady-state, kinetic linear theory is applied to calculate the stimulated Raman scattering spectra. Excellent agreement between the calculated and experimental results shows that the plasma parameters, especially the electron density and the temperature, dominate the disruption behavior of stimulated Raman scattering. The results also indicate that stimulated Raman scattering is probably located within specific region of the gasbag. The time-integrated reflectivity of both the stimulated Raman and Brillouin scattering is at a low level, even in the conditions of high laser intensity (1.5 Multiplication-Sign 10{sup 15} W/cm{sup 2}) and no beam-smoothing. The experimental results are promising for future ignition experiments with a 0.53 {mu}m laser as the driver.

  5. Monolithic integration of micromachined sensors and CMOS circuits based on SOI technologies

    International Nuclear Information System (INIS)

    Yu Xiaomei; Tang Yaquan; Zhang Haitao

    2008-01-01

    This note presents a novel way to monolithically integrate micro-cantilever sensors and signal conditioning circuits by combining SOI CMOS and SOI micromachining technologies. In order to improve the sensor performance and reduce the system volume, an integrated sensor system composed of a piezoresistive cantilever array, a temperature-compensation current reference, a digitally controlled multiplexer and an instrument amplifier is designed and finally fabricated. A post-SOI CMOS process is developed to realize the integrated sensor system which is based on a standard CMOS process with one more mask to define the cantilever structure at the end of the process. Measurements on the finished SOI CMOS devices and circuits show that the integration process has good compatibility both for the cantilever sensors and for the CMOS circuits, and the SOI CMOS integration process can decrease about 25% sequences compared with the bulk silicon CMOS process. (note)

  6. Woody Allen, serial schlemiel ?

    Directory of Open Access Journals (Sweden)

    Frédérique Brisset

    2011-04-01

    Full Text Available Woody Allen a développé au fil des années une persona cinématographique de schlemiel new-yorkais aisément reconnaissable par le spectateur. Elle marque nombre de ses films, qu’il y apparaisse en tant qu’acteur ou y dirige des substituts comédiens comme déclinaisons de lui-même. Si cette figure prototypique est le fondement de la sérialité dans sa filmographie, il est des traits stylistiques qui en portent trace tout au long de son œuvre : la récurrence annuelle de ses réalisations, la signature formelle symbolisée par ses génériques à la typographie singulière, le rythme de ses dialogues ponctués d’interjections et l’usage de l’autocitation sont autant de procédés qui marquent son cinéma d’un sceau très personnel. Ils fonctionnent comme des clins d’œil au spectateur qui reçoit dès lors LE Woody Allen millésimé comme une invitation à retrouver son microcosme. Ainsi la sérialité se pose comme à la fois initiale et conséquentielle de son système filmique, processus de création unique dans le cinéma américain.Woody Allen has long constructed a cinematographic persona of schlemiel New- Yorker that the audience can easily identify. It impacts most of his films, whether he stars in them or directs “substitute” actors to impersonate his character. If this prototypical figure is the basis of seriality in his cinematography, serial stylistic features can also be found all along his career: the annual recurrence of his productions, the formal signature symbolised by the typography of his singular credit titles, his rhythmical interjection-punctuated dialogues and the use of self-quotation imprint a very personal seal upon his movies. They all work as a recognition signals for the audience who thus receive THE Woody Allen vintage as an invitation to re-enter his microcosm. Seriality is then both initial and consequential to his cinematographic system, a unique creative process in American film history.

  7. Serial binary interval ratios improve rhythm reproduction.

    Science.gov (United States)

    Wu, Xiang; Westanmo, Anders; Zhou, Liang; Pan, Junhao

    2013-01-01

    Musical rhythm perception is a natural human ability that involves complex cognitive processes. Rhythm refers to the organization of events in time, and musical rhythms have an underlying hierarchical metrical structure. The metrical structure induces the feeling of a beat and the extent to which a rhythm induces the feeling of a beat is referred to as its metrical strength. Binary ratios are the most frequent interval ratio in musical rhythms. Rhythms with hierarchical binary ratios are better discriminated and reproduced than rhythms with hierarchical non-binary ratios. However, it remains unclear whether a superiority of serial binary over non-binary ratios in rhythm perception and reproduction exists. In addition, how different types of serial ratios influence the metrical strength of rhythms remains to be elucidated. The present study investigated serial binary vs. non-binary ratios in a reproduction task. Rhythms formed with exclusively binary (1:2:4:8), non-binary integer (1:3:5:6), and non-integer (1:2.3:5.3:6.4) ratios were examined within a constant meter. The results showed that the 1:2:4:8 rhythm type was more accurately reproduced than the 1:3:5:6 and 1:2.3:5.3:6.4 rhythm types, and the 1:2.3:5.3:6.4 rhythm type was more accurately reproduced than the 1:3:5:6 rhythm type. Further analyses showed that reproduction performance was better predicted by the distribution pattern of event occurrences within an inter-beat interval, than by the coincidence of events with beats, or the magnitude and complexity of interval ratios. Whereas rhythm theories and empirical data emphasize the role of the coincidence of events with beats in determining metrical strength and predicting rhythm performance, the present results suggest that rhythm processing may be better understood when the distribution pattern of event occurrences is taken into account. These results provide new insights into the mechanisms underlining musical rhythm perception.

  8. Serial binary interval ratios improve rhythm reproduction

    Directory of Open Access Journals (Sweden)

    Xiang eWu

    2013-08-01

    Full Text Available Musical rhythm perception is a natural human ability that involves complex cognitive processes. Rhythm refers to the organization of events in time, and musical rhythms have an underlying hierarchical metrical structure. The metrical structure induces the feeling of a beat and the extent to which a rhythm induces the feeling of a beat is referred to as its metrical strength. Binary ratios are the most frequent interval ratio in musical rhythms. Rhythms with hierarchical binary ratios are better discriminated and reproduced than rhythms with hierarchical non-binary ratios. However, it remains unclear whether a superiority of serial binary over non-binary ratios in rhythm perception and reproduction exists. In addition, how different types of serial ratios influence the metrical strength of rhythms remains to be elucidated. The present study investigated serial binary vs. non-binary ratios in a reproduction task. Rhythms formed with exclusively binary (1:2:4:8, non-binary integer (1:3:5:6, and non-integer (1:2.3:5.3:6.4 ratios were examined within a constant meter. The results showed that the 1:2:4:8 rhythm type was more accurately reproduced than the 1:3:5:6 and 1:2.3:5.3:6.4 rhythm types, and the 1:2.3:5.3:6.4 rhythm type was more accurately reproduced than the 1:3:5:6 rhythm type. Further analyses showed that reproduction performance was better predicted by the distribution pattern of event occurrences within an inter-beat interval, than by the coincidence of events with beats, or the magnitude and complexity of interval ratios. Whereas rhythm theories and empirical data emphasize the role of the coincidence of events with beats in determining metrical strength and predicting rhythm performance, the present results suggest that rhythm processing may be better understood when the distribution pattern of event occurrences is taken into account. These results provide new insights into the mechanisms underlining musical rhythm perception.

  9. Thermal-Diffusivity-Based Frequency References in Standard CMOS

    NARCIS (Netherlands)

    Kashmiri, S.M.

    2012-01-01

    In recent years, a lot of research has been devoted to the realization of accurate integrated frequency references. A thermal-diffusivity-based (TD) frequency reference provides an alternative method of on-chip frequency generation in standard CMOS technology. A frequency-locked loop locks the

  10. Photon imaging using post-processed CMOS chips

    NARCIS (Netherlands)

    Melai, J.

    2010-01-01

    This thesis presents our work on an integrated photon detector made by post-processing of CMOS sensor arrays. The aim of the post-processing is to combine all elements of the detector into a single monolithic device. These elements include a photocathode to convert photon radiation into electronic

  11. CMOS technology and current-feedback op-amps

    DEFF Research Database (Denmark)

    Bruun, Erik

    1993-01-01

    Some of the problems related to the application of CMOS technology to current-feedback operational amplifiers (CFB op-amps) are identified. Problems caused by the low device transconductance and by the absence of matching between p-channel and n-channel transistors are examined, and circuit...

  12. Integrated imaging sensor systems with CMOS active pixel sensor technology

    Science.gov (United States)

    Yang, G.; Cunningham, T.; Ortiz, M.; Heynssens, J.; Sun, C.; Hancock, B.; Seshadri, S.; Wrigley, C.; McCarty, K.; Pain, B.

    2002-01-01

    This paper discusses common approaches to CMOS APS technology, as well as specific results on the five-wire programmable digital camera-on-a-chip developed at JPL. The paper also reports recent research in the design, operation, and performance of APS imagers for several imager applications.

  13. Research-grade CMOS image sensors for demanding space applications

    Science.gov (United States)

    Saint-Pé, Olivier; Tulet, Michel; Davancens, Robert; Larnaudie, Franck; Magnan, Pierre; Corbière, Franck; Martin-Gonthier, Philippe; Belliot, Pierre

    2017-11-01

    Imaging detectors are key elements for optical instruments and sensors on board space missions dedicated to Earth observation (high resolution imaging, atmosphere spectroscopy...), Solar System exploration (micro cameras, guidance for autonomous vehicle...) and Universe observation (space telescope focal planes, guiding sensors...). This market has been dominated by CCD technology for long. Since the mid- 90s, CMOS Image Sensors (CIS) have been competing with CCDs for more and more consumer domains (webcams, cell phones, digital cameras...). Featuring significant advantages over CCD sensors for space applications (lower power consumption, smaller system size, better radiations behaviour...), CMOS technology is also expanding in this field, justifying specific R&D and development programs funded by national and European space agencies (mainly CNES, DGA, and ESA). All along the 90s and thanks to their increasingly improving performances, CIS have started to be successfully used for more and more demanding applications, from vision and control functions requiring low-level performances to guidance applications requiring medium-level performances. Recent technology improvements have made possible the manufacturing of research-grade CIS that are able to compete with CCDs in the high-performances arena. After an introduction outlining the growing interest of optical instruments designers for CMOS image sensors, this talk will present the existing and foreseen ways to reach high-level electro-optics performances for CIS. The developments of CIS prototypes built using an imaging CMOS process and of devices based on improved designs will be presented.

  14. A CMOS rail-to-rail linear VI-converter

    NARCIS (Netherlands)

    Vervoort, P.P.; Vervoort, P.P.; Wassenaar, R.F.

    1995-01-01

    A linear CMOS VI-converter operating in strong inversion with a common-mode input range from the negative to the positive supply rail is presented. The circuit consists of three linear VI-converters based on the difference of squares principle. Two of these perform the actual V to I conversion,

  15. An efficient CMOS bridging fault simulator with SPICE accuracy

    NARCIS (Netherlands)

    Di, C.; Jess, J.A.G.

    1996-01-01

    This paper presents an alternative modeling and simulation method for CMOS bridging faults. The significance of the method is the introduction of a set of generic-bridge tables which characterize the bridged outputs for each bridge and a set of generic-cell tables which characterize how each cell

  16. Characterisation of a CMOS charge transfer device for TDI imaging

    International Nuclear Information System (INIS)

    Rushton, J.; Holland, A.; Stefanov, K.; Mayer, F.

    2015-01-01

    The performance of a prototype true charge transfer imaging sensor in CMOS is investigated. The finished device is destined for use in TDI applications, especially Earth-observation, and to this end radiation tolerance must be investigated. Before this, complete characterisation is required. This work starts by looking at charge transfer inefficiency and then investigates responsivity using mean-variance techniques

  17. Radiation response of high speed CMOS integrated circuits

    International Nuclear Information System (INIS)

    Yue, H.; Davison, D.; Jennings, R.F.; Lothongkam, P.; Rinerson, D.; Wyland, D.

    1987-01-01

    This paper studies the total dose and dose rate radiation response of the FCT family of high speed CMOS integrated circuits. Data taken on the devices is used to establish the dominant failure modes, and this data is further analyzed using one-sided tolerance factors for normal distribution statistical analysis

  18. A toroidal inductor integrated in a standard CMOS process

    DEFF Research Database (Denmark)

    Vandi, Luca; Andreani, Pietro; Temporiti, Enrico

    2007-01-01

    This paper presents a toroidal inductor integrated in a standard 0.13 um CMOS process. Finite-elements preliminary simulations are provided to prove the validity of the concept. In order to extract fundamental parameters by means of direct calculations, two different and well-known approaches...

  19. Design for manufacturability and yield for nano-scale CMOS

    CERN Document Server

    Chiang, Charles C

    2007-01-01

    Talks about the various aspects of manufacturability and yield in a nano-CMOS process and how to address each aspect at the proper design step starting with the design and layout of standard cells. This book is suitable for practicing IC designer and for graduate students intent on having a career in IC design or in EDA tool development.

  20. Monolithic active pixel sensors (MAPS) in a VLSI CMOS technology

    CERN Document Server

    Turchetta, R; Manolopoulos, S; Tyndel, M; Allport, P P; Bates, R; O'Shea, V; Hall, G; Raymond, M

    2003-01-01

    Monolithic Active Pixel Sensors (MAPS) designed in a standard VLSI CMOS technology have recently been proposed as a compact pixel detector for the detection of high-energy charged particle in vertex/tracking applications. MAPS, also named CMOS sensors, are already extensively used in visible light applications. With respect to other competing imaging technologies, CMOS sensors have several potential advantages in terms of low cost, low power, lower noise at higher speed, random access of pixels which allows windowing of region of interest, ability to integrate several functions on the same chip. This brings altogether to the concept of 'camera-on-a-chip'. In this paper, we review the use of CMOS sensors for particle physics and we analyse their performances in term of the efficiency (fill factor), signal generation, noise, readout speed and sensor area. In most of high-energy physics applications, data reduction is needed in the sensor at an early stage of the data processing before transfer of the data to ta...

  1. First experimental results on CMOS Integrated Nickel Electroplated Resonators

    DEFF Research Database (Denmark)

    Yalcinkaya, Arda Deniz; Hansen, Ole

    2004-01-01

    This paper presents experimental results on MEMS metallic add-on post-fabrication effects on complementary metal oxide semiconductor (CMOS) transistors. Two versions of add-on processing, that use either e-beam evaporation or magnetron sputtering, are compared through investigation of the electri...

  2. High performance flexible CMOS SOI FinFETs

    KAUST Repository

    Fahad, Hossain M.

    2014-06-01

    We demonstrate the first ever CMOS compatible soft etch back based high performance flexible CMOS SOI FinFETs. The move from planar to non-planar FinFETs has enabled continued scaling down to the 14 nm technology node. This has been possible due to the reduction in off-state leakage and reduced short channel effects on account of the superior electrostatic charge control of multiple gates. At the same time, flexible electronics is an exciting expansion opportunity for next generation electronics. However, a fully integrated low-cost system will need to maintain ultra-large-scale-integration density, high performance and reliability - same as today\\'s traditional electronics. Up until recently, this field has been mainly dominated by very weak performance organic electronics enabled by low temperature processes, conducive to low melting point plastics. Now however, we show the world\\'s highest performing flexible version of 3D FinFET CMOS using a state-of-the-art CMOS compatible fabrication technique for high performance ultra-mobile consumer applications with stylish design. © 2014 IEEE.

  3. CMOS-based avalanche photodiodes for direct particle detection

    International Nuclear Information System (INIS)

    Stapels, Christopher J.; Squillante, Michael R.; Lawrence, William G.; Augustine, Frank L.; Christian, James F.

    2007-01-01

    Active Pixel Sensors (APSs) in complementary metal-oxide-semiconductor (CMOS) technology are augmenting Charge-Coupled Devices (CCDs) as imaging devices and cameras in some demanding optical imaging applications. Radiation Monitoring Devices are investigating the APS concept for nuclear detection applications and has successfully migrated avalanche photodiode (APD) pixel fabrication to a CMOS environment, creating pixel detectors that can be operated with internal gain as proportional detectors. Amplification of the signal within the diode allows identification of events previously hidden within the readout noise of the electronics. Such devices can be used to read out a scintillation crystal, as in SPECT or PET, and as direct-conversion particle detectors. The charge produced by an ionizing particle in the epitaxial layer is collected by an electric field within the diode in each pixel. The monolithic integration of the readout circuitry with the pixel sensors represents an improved design compared to the current hybrid-detector technology that requires wire or bump bonding. In this work, we investigate designs for CMOS APD detector elements and compare these to typical values for large area devices. We characterize the achievable detector gain and the gain uniformity over the active area. The excess noise in two different pixel structures is compared. The CMOS APD performance is demonstrated by measuring the energy spectra of X-rays from 55 Fe

  4. Temperature Sensors Integrated into a CMOS Image Sensor

    NARCIS (Netherlands)

    Abarca Prouza, A.N.; Xie, S.; Markenhof, Jules; Theuwissen, A.J.P.

    2017-01-01

    In this work, a novel approach is presented for measuring relative temperature variations inside the pixel array of a CMOS image sensor itself. This approach can give important information when compensation for dark (current) fixed pattern noise (FPN) is needed. The test image sensor consists of

  5. High-temperature complementary metal oxide semiconductors (CMOS)

    International Nuclear Information System (INIS)

    McBrayer, J.D.

    1979-10-01

    Silicon CMOS devices were studied, tested, and evaluated at high temperatures to determine processing, geometric, operating characteristics, and stability parameters. After more than 1000 hours at 300 0 C, most devices showed good stability, reliability, and operating characteristics. Processing and geometric parameters were evaluated and optimization steps discussed

  6. A CMOS image sensor with row and column profiling means

    NARCIS (Netherlands)

    Xie, N.; Theuwissen, A.J.P.; Wang, X.; Leijtens, J.A.P.; Hakkesteegt, H.; Jansen, H.

    2008-01-01

    This paper describes the implementation and firstmeasurement results of a new way that obtains row and column profile data from a CMOS Image Sensor, which is developed for a micro-Digital Sun Sensor (μDSS).The basic profiling action is achieved by the pixels with p-type MOS transistors which realize

  7. CMOS Active-Pixel Image Sensor With Simple Floating Gates

    Science.gov (United States)

    Fossum, Eric R.; Nakamura, Junichi; Kemeny, Sabrina E.

    1996-01-01

    Experimental complementary metal-oxide/semiconductor (CMOS) active-pixel image sensor integrated circuit features simple floating-gate structure, with metal-oxide/semiconductor field-effect transistor (MOSFET) as active circuit element in each pixel. Provides flexibility of readout modes, no kTC noise, and relatively simple structure suitable for high-density arrays. Features desirable for "smart sensor" applications.

  8. Design of a CMOS temperature sensor with current output

    NARCIS (Netherlands)

    Kolling, A.; Kölling, Arjan; Bak, Frans; Bergveld, Piet; Seevinck, E.; Seevinck, Evert

    1990-01-01

    In this paper a CMOS temperature-to-current converter is presented of which the output current is the difference between a PTC current and an NTC current. The PTC current is derived from a PTAT cell, while the NTC current is derived from a threshold voltage reference source. It is shown that this

  9. A CMOS four-quadrant analog current multiplier

    NARCIS (Netherlands)

    Wiegerink, Remco J.

    1991-01-01

    A CMOS four-quadrant analog current multiplier is described. The circuit is based on the square-law characteristic of an MOS transistor and is insensitive to temperature and process variations. The circuit is insensitive to the body effect so it is not necessary to place transistors in individual

  10. KANBAN allocation in a serial suply chain

    Directory of Open Access Journals (Sweden)

    Guillermo Andrés Sánchez C.

    2012-06-01

    Full Text Available The aim of this project is to simulate a Kanban system using N stages with the objective of maintaining an acceptable throughput and mean system time. The document shows the production systems where Kanban is applicable and what the potential benefits are. A serial of simulations will be done using a demand given by a poison distribution with rate λ ^ ext. The simulation aimed to find the best number of withdrawal Kanban on all stages when the values of μ (for exponential distribution of the process and λ ^ ext increase and decrease. At the end of this simulation, the best way to allocate the withdrawal Kanban over N stages with the objective of maintaining acceptable throughput and mean system time will be clearer thus the conclusions of this work will be done.

  11. Serial CT scannings in herpes simplex encephalitis

    Energy Technology Data Exchange (ETDEWEB)

    Fukushima, M.; Sawada, T.; Kuriyama, Y.; Kinugawa, H.; Yamaguchi, T. (National Cardivascular Center, Osaka (Japan))

    1981-10-01

    Two patients with serologically confirmed herpes simplex encephalitis were studied by serial CT scannings. Case 1, a 60-year-old woman, was admitted to National Cardiovascular Center because of headache, fever, and attacks of Jacksonian seizure. Case 2, a 54-year-old man, was admitted because of fever, consciousness disturbance and right hemiparesis. Pleocytosis (mainly lymphocytes) and elevation of protein content in cerebrospinal fluid were observed in both cases. Both patients presented ''das apallische Syndrom'' one month after admission. The diagnosis of herpes simplex encephalitis was confirmed by typical clinical courses and by greater than fourfold rises in serum antibody titer for herpes simplex virus as well as that in cerebrospinal fluid in case 1. Characteristic CT findings observed in these two cases were summarized as follows: Within a week after the onset, no obvious abnormalities could be detected on CT scans (Case 1). Two weeks after the onset, a large low-density area appeared in the left temporal lobe and in the contralateral insular cortex with midline shift toward the right side (Case 2). One month later, an ill-defined linear and ring-like high-density area (Case 1), or a well-defined high-density area (Case 2), that was enhanced after contrast administration, was observed in the large low-density area in the temporal lobe. These findings were considered as characteristic for hemorrhagic encephalitis. These high-density areas disappeared two months later, however, widespread and intensified low-density areas still remained. In both cases, the basal ganglia and thalamus were completely spared on CT scans. From these observations, it can be concluded that serial CT scannings are quite useful for diagnosis of herpes simplex encephalitis.

  12. Viscous hydrophilic injection matrices for serial crystallography

    Directory of Open Access Journals (Sweden)

    Gabriela Kovácsová

    2017-07-01

    Full Text Available Serial (femtosecond crystallography at synchrotron and X-ray free-electron laser (XFEL sources distributes the absorbed radiation dose over all crystals used for data collection and therefore allows measurement of radiation damage prone systems, including the use of microcrystals for room-temperature measurements. Serial crystallography relies on fast and efficient exchange of crystals upon X-ray exposure, which can be achieved using a variety of methods, including various injection techniques. The latter vary significantly in their flow rates – gas dynamic virtual nozzle based injectors provide very thin fast-flowing jets, whereas high-viscosity extrusion injectors produce much thicker streams with flow rates two to three orders of magnitude lower. High-viscosity extrusion results in much lower sample consumption, as its sample delivery speed is commensurate both with typical XFEL repetition rates and with data acquisition rates at synchrotron sources. An obvious viscous injection medium is lipidic cubic phase (LCP as it is used for in meso membrane protein crystallization. However, LCP has limited compatibility with many crystallization conditions. While a few other viscous media have been described in the literature, there is an ongoing need to identify additional injection media for crystal embedding. Critical attributes are reliable injection properties and a broad chemical compatibility to accommodate samples as heterogeneous and sensitive as protein crystals. Here, the use of two novel hydrogels as viscous injection matrices is described, namely sodium carboxymethyl cellulose and the thermo-reversible block polymer Pluronic F-127. Both are compatible with various crystallization conditions and yield acceptable X-ray background. The stability and velocity of the extruded stream were also analysed and the dependence of the stream velocity on the flow rate was measured. In contrast with previously characterized injection media, both new

  13. Serial CT scannings in herpes simplex encephalitis

    International Nuclear Information System (INIS)

    Fukushima, Masashi; Sawada, Tohru; Kuriyama, Yoshihiro; Kinugawa, Hidekazu; Yamaguchi, Takenori

    1981-01-01

    Two patients with serologically confirmed herpes simplex encephalitis were studied by serial CT scannings. Case 1, a 60-year-old woman, was admitted to National Cardiovascular Center because of headache, fever, and attacks of Jacksonian seizure. Case 2, a 54-year-old man, was admitted because of fever, consciousness disturbance and right hemipare sis. Pleocytosis (mainly lymphocytes) and elevation of protein content in cerebrospinal fluid were observed in both cases. Both patients presented ''das apallische Syndrom'' one month after admission. The diagnosis of herpes simplex encephalitis was confirmed by typical clinical courses and by greater than fourfold rises in serum antibody titer for herpes simplex virus as well as that in cerebrospinal fluid in case 1. Characteristic CT findings observed in these two cases were summarized as follows: Within a week after the onset, no obvious abnormalities could be detected on CT scans (Case 1). Two weeks after the onset, a large low-density area appeared in the left temporal lobe and in the contralateral insular cortex with midline shift toward the right side (Case 2). One month later, an ill-defined linear and ring-like high-density area (Case 1), or a well-defined high-density area (Case 2), that was enhanced after contrast administration, was observed in the large low-density area in the temporal lobe. These findings were considered as characteristic for hemorrhagic encephalitis. These high-density areas disappeared two months later, however, widespread and intensified low-density areas still remained. In both cases, the basal ganglia and thalamus were completely spared on CT scans. From these observations, it can be concluded that serial CT scannings are quite useful for diagnosis of herpes simplex encephalitis. (author)

  14. Handbook of serial communications interfaces a comprehensive compendium of serial digital input/output (I/O) standards

    CERN Document Server

    Frenzel, Louis

    2015-01-01

    This book catalogs the most popular and commonly used serial-port interfaces and provides details on the specifications and the latest standards, enabling you to select an interface for a new design or verify that an interface is working correctly. Each chapter is based on a different interface and is written in an easy to follow, standard format. With this book you will learn: The most widely used serial interfacesHow to select the best serial interface for a specific application or designThe trade-offs between data rate and distance (length or range)The operation and benefits of serial

  15. A novel multi-actuation CMOS RF MEMS switch

    Science.gov (United States)

    Lee, Chiung-I.; Ko, Chih-Hsiang; Huang, Tsun-Che

    2008-12-01

    This paper demonstrates a capacitive shunt type RF MEMS switch, which is actuated by electro-thermal actuator and electrostatic actuator at the same time, and than latching the switching status by electrostatic force only. Since thermal actuators need relative low voltage compare to electrostatic actuators, and electrostatic force needs almost no power to maintain the switching status, the benefits of the mechanism are very low actuation voltage and low power consumption. Moreover, the RF MEMS switch has considered issues for integrated circuit compatible in design phase. So the switch is fabricated by a standard 0.35um 2P4M CMOS process and uses wet etching and dry etching technologies for postprocess. This compatible ability is important because the RF characteristics are not only related to the device itself. If a packaged RF switch and a packaged IC wired together, the parasitic capacitance will cause the problem for optimization. The structure of the switch consists of a set of CPW transmission lines and a suspended membrane. The CPW lines and the membrane are in metal layers of CMOS process. Besides, the electro-thermal actuators are designed by polysilicon layer of the CMOS process. So the RF switch is only CMOS process layers needed for both electro-thermal and electrostatic actuations in switch. The thermal actuator is composed of a three-dimensional membrane and two heaters. The membrane is a stacked step structure including two metal layers in CMOS process, and heat is generated by poly silicon resistors near the anchors of membrane. Measured results show that the actuation voltage of the switch is under 7V for electro-thermal added electrostatic actuation.

  16. Photon detection with CMOS sensors for fast imaging

    International Nuclear Information System (INIS)

    Baudot, J.; Dulinski, W.; Winter, M.; Barbier, R.; Chabanat, E.; Depasse, P.; Estre, N.

    2009-01-01

    Pixel detectors employed in high energy physics aim to detect single minimum ionizing particle with micrometric positioning resolution. Monolithic CMOS sensors succeed in this task thanks to a low equivalent noise charge per pixel of around 10 to 15 e - , and a pixel pitch varying from 10 to a few 10 s of microns. Additionally, due to the possibility for integration of some data treatment in the sensor itself, readout times of 100μs have been reached for 100 kilo-pixels sensors. These aspects of CMOS sensors are attractive for applications in photon imaging. For X-rays of a few keV, the efficiency is limited to a few % due to the thin sensitive volume. For visible photons, the back-thinned version of CMOS sensor is sensitive to low intensity sources, of a few hundred photons. When a back-thinned CMOS sensor is combined with a photo-cathode, a new hybrid detector results (EBCMOS) and operates as a fast single photon imager. The first EBCMOS was produced in 2007 and demonstrated single photon counting with low dark current capability in laboratory conditions. It has been compared, in two different biological laboratories, with existing CCD-based 2D cameras for fluorescence microscopy. The current EBCMOS sensitivity and frame rate is comparable to existing EMCCDs. On-going developments aim at increasing this frame rate by, at least, an order of magnitude. We report in conclusion, the first test of a new CMOS sensor, LUCY, which reaches 1000 frames per second.

  17. An RF Energy Harvester System Using UHF Micropower CMOS Rectifier Based on a Diode Connected CMOS Transistor

    Directory of Open Access Journals (Sweden)

    Mohammad Reza Shokrani

    2014-01-01

    Full Text Available This paper presents a new type diode connected MOS transistor to improve CMOS conventional rectifier's performance in RF energy harvester systems for wireless sensor networks in which the circuits are designed in 0.18 μm TSMC CMOS technology. The proposed diode connected MOS transistor uses a new bulk connection which leads to reduction in the threshold voltage and leakage current; therefore, it contributes to increment of the rectifier’s output voltage, output current, and efficiency when it is well important in the conventional CMOS rectifiers. The design technique for the rectifiers is explained and a matching network has been proposed to increase the sensitivity of the proposed rectifier. Five-stage rectifier with a matching network is proposed based on the optimization. The simulation results shows 18.2% improvement in the efficiency of the rectifier circuit and increase in sensitivity of RF energy harvester circuit. All circuits are designed in 0.18 μm TSMC CMOS technology.

  18. Short- and long-term memory contributions to immediate serial recognition: evidence from serial position effects.

    Science.gov (United States)

    Purser, Harry; Jarrold, Christopher

    2010-04-01

    A long-standing body of research supports the existence of separable short- and long-term memory systems, relying on phonological and semantic codes, respectively. The aim of the current study was to measure the contribution of long-term knowledge to short-term memory performance by looking for evidence of phonologically and semantically coded storage within a short-term recognition task, among developmental samples. Each experimental trial presented 4-item lists. In Experiment 1 typically developing children aged 5 to 6 years old showed evidence of phonologically coded storage across all 4 serial positions, but evidence of semantically coded storage at Serial Positions 1 and 2. In a further experiment, a group of individuals with Down syndrome was investigated as a test case that might be expected to use semantic coding to support short-term storage, but these participants showed no evidence of semantically coded storage and evidenced phonologically coded storage only at Serial Position 4, suggesting that individuals with Down syndrome have a verbal short-term memory capacity of 1 item. Our results suggest that previous evidence of semantic effects on "short-term memory performance" does not reflect semantic coding in short-term memory itself, and provide an experimental method for researchers wishing to take a relatively pure measure of verbal short-term memory capacity, in cases where rehearsal is unlikely.

  19. Utilization of serial resources in libraries of selected tertiary ...

    African Journals Online (AJOL)

    Information Impact: Journal of Information and Knowledge Management ... security personnel for adequate monitoring of the serial materials, as well as the need for authors and stakeholders in education to donate more serial materials in order to enrich the collections in the library and enhance academic performance.

  20. The Effect of Concurrent Semantic Categorization on Delayed Serial Recall

    Science.gov (United States)

    Acheson, Daniel J.; MacDonald, Maryellen C.; Postle, Bradley R.

    2011-01-01

    The influence of semantic processing on the serial ordering of items in short-term memory was explored using a novel dual-task paradigm. Participants engaged in 2 picture-judgment tasks while simultaneously performing delayed serial recall. List material varied in the presence of phonological overlap (Experiments 1 and 2) and in semantic content…

  1. Effects of Serial Rehearsal Training on Memory Search

    Science.gov (United States)

    McCauley, Charley; And Others

    1976-01-01

    Half the subjects were trained to use a serial rehearsal strategy during target set storage and half were given no strategy training. The results indicate that the rate of memory search is IQ-related, and that serial rehearsal training facilitates memory search when rehearsal is covert. (Author/BW)

  2. Indexing Serialized Fiction: May the Force Be with You.

    Science.gov (United States)

    Barr, Melissa M.

    The adult novel offers indexers an unusual opportunity to create a serialized fiction index. This research paper involved designing and creating a Character Index, Thesaurus, Glossary, and Abstract (with descriptors) for 21 novels based on the "Star Wars" movies. The novels are an unusual example of serialized fiction featuring main…

  3. Infants' Memory Processing of a Serial List: List Length Effects.

    Science.gov (United States)

    Gulya, Michele; Sweeney, Becky; Rovee-Collier, Carolyn

    1999-01-01

    Three experiments demonstrated that increasing the length of a mobile serial list impaired 6-month olds' memory for serial order. Findings indicated that the primacy effect was absent on a 24-hour delayed recognition test and was exhibited on a reactivation test, adding to growing evidence that young infants possess two functionally distinct…

  4. Antisocial personality disorder, sexual sadism, malignant narcissism, and serial murder.

    Science.gov (United States)

    Geberth, V J; Turco, R N

    1997-01-01

    This paper examines the research on serial murder and its relationship to antisocial personality disorder and sexual sadism. The concept of malignant narcissism is also discussed. Case studies of serial killers are examined regarding the nature of sexual violation and crime scene behavior.

  5. Highlights in radiation measuring technique's - Serial Micro Channel SMC 2100

    International Nuclear Information System (INIS)

    Kandler, M.; Hoffmann, Ch.

    2002-01-01

    The Serial Micro Channel SMC 2100 offers an ''intelligent stand alone'' electronics for the radiation measuring technique's. First it is designed of being connected to a serial interface RS232 of a PC. With a RS485 serial interface on a PC, a network structure can be generated. It has all functional modules which are necessary for the measurement of detector signals. Hence it is possible to directly connect any detector for radiation measurement to a PC, laptop, or notebook. All variations can be operated without PC support too. It has a modular structure and consists of two blocks, the functional modules and the basic modules. The Serial Micro Channel SMC 2100 may be directly coupled to a detector, which therefore makes the realisation of an ''intelligent radiation detector'' with serial link RS232 or RS485. (orig.)

  6. Serial Entrepreneurship, Learning by Doing and Self-selection

    DEFF Research Database (Denmark)

    Rocha, Vera; Carneiro, Anabela; Varum, Celeste

    2015-01-01

    of the person-specific effect, using information on individuals’ past histories in paid employment, confirm that serial entrepreneurs exhibit, on average, a larger person-specific effect than non-serial business owners. Moreover, ignoring serial entrepreneurs’ self-selection overestimates learning by doing......It remains a question whether serial entrepreneurs typically perform better than their novice counterparts owing to learning by doing effects or mostly because they are a selected sample of higher-than-average ability entrepreneurs. This paper tries to unravel these two effects by exploring a novel...... empirical strategy based on continuous time duration models with selection. We use a large longitudinal matched employer-employee dataset that allows us to identify about 220,000 individuals who have left their first entrepreneurial experience, out of which over 35,000 became serial entrepreneurs. We...

  7. SERIAL TELEVISI DEXTER SEBAGAI ANAKRONISME DALAM SASTRA POPULER

    Directory of Open Access Journals (Sweden)

    Ida Rochani Adi

    2014-06-01

    Full Text Available In the popular literature context, this study aims to investigate: (1 how the formulation of the characterization of Dexter in the television serial Dexter violates the tradition of literary characterization, and (2 how the formula of moral values is dramatized through Dexter, who is a sociopath, psychopath, serial killer, and person without moral. The research object was the television serial Dexter, which ranks five in popularity in the world. The data were collected by documenting 84 episodes of the serial having been broadcast since 2006. They were analyzed by means of content analysis and qualitative descriptive techniques. Based on the findings, the conclusions are as follows. First, there is a violation or anachronism of characterization through the main character in the serial. Second, the dramatized moral values still contain conventional values although they are in different forms.

  8. Research and Development of Monolithic Active Pixel Sensors for the Detection of the Elementary Particles; Recherche et developpement de capteurs actifs monolithiques CMOS pour la detection de particules elementaires

    Energy Technology Data Exchange (ETDEWEB)

    Li, Y

    2007-09-15

    In order to develop high spatial resolution and readout speed vertex detectors for the future International Linear Collider (ILC), fast CMOS Monolithic Active Pixel Sensors (MAPS) are studied on this work. Two prototypes of MAPS, MIMOSA 8 and MIMOSA 16, based on the same micro-electronic architecture were developed in CMOS processes with different thickness of epitaxial layer. The size of pixel matrix is 32 x 128: 8 columns of the pixel array are readout directly with analog outputs and the other 24 columns are connected to the column level auto-zero discriminators. The Correlated Double Sampling (CDS) structures are successfully implemented inside pixel and discriminator. The photo diode type pixels with different diode sizes are used in these prototypes. With a {sup 55}Fe X-ray radioactive source, the important parameters, such as Temporal Noise, Fixed Pattern Noise (FPN), Signal-to-Noise Ratio (SNR), Charge-to-Voltage conversion Factor (CVF) and Charge Collection Efficiency (CCE), are studied as function of readout speed and diode size. For MIMOSA 8, the effect of fast neutrons irradiation is also. Two beam tests campaigns were made: at DESY with a 5 GeV electrons beam and at CERN with a 180 GeV pions beam. Detection Efficiency and Spatial Resolution are studied in function of the discriminator threshold. For these two parameters, the influences of diode size and SNR of the central pixel of a cluster are also discussed. In order to improve the spatial resolution of the digital outputs, a very compact (25 {mu}m x 1 mm) and low consumption (300 {mu}W) column level ADC is designed in AMS 0.35 {mu}m OPTO process. Based on successive approximation architecture, the auto-offset cancellation structure is integrated. A new column level auto-zero discriminator using static latch is also designed. (author)

  9. Chemical mechanical polisher technology for 300mm/0.18-0.13{mu}m semiconductor devices; 300mm/0.18-0.-0.13{mu}m sedai no CMP gijutsu

    Energy Technology Data Exchange (ETDEWEB)

    Tsujimura, M.; Kobayashi, F. [Ebara Corp., Tokyo (Japan)

    1998-10-20

    Described herein are problems involved in, and development points and measures for chemical mechanical polisher (CMP) technology for the generation of 300mm/0.18 to 0.13{mu}m semiconductor devices. Ebara has developed a CMP system for 300mm devices for I300I and Selete (semiconductor high-technologies). The polishing process conditions are set for the time being based on those for the 200mm devices, and the driver and machine structures are set at 2.25 times larger than those for the 200mm devices. Its space requirement is compacter at 1.3 times increase. The company has adopted a concept of `dry-in and dry-out,` which is not common for a CMP. This needs integration of the washer with the polisher, and aerodynamic designs for dust-free conditions. These are already developed for the 200mm devices, and applicable to the 300mm devices without causing any problem. The special chamber for the conventional CMP can be dispensed with, reducing cost. Expendables, such as slurry pad, are being developed to double their service lives and halve their consumption. 8 figs.

  10. CMOS VLSI Active-Pixel Sensor for Tracking

    Science.gov (United States)

    Pain, Bedabrata; Sun, Chao; Yang, Guang; Heynssens, Julie

    2004-01-01

    An architecture for a proposed active-pixel sensor (APS) and a design to implement the architecture in a complementary metal oxide semiconductor (CMOS) very-large-scale integrated (VLSI) circuit provide for some advanced features that are expected to be especially desirable for tracking pointlike features of stars. The architecture would also make this APS suitable for robotic- vision and general pointing and tracking applications. CMOS imagers in general are well suited for pointing and tracking because they can be configured for random access to selected pixels and to provide readout from windows of interest within their fields of view. However, until now, the architectures of CMOS imagers have not supported multiwindow operation or low-noise data collection. Moreover, smearing and motion artifacts in collected images have made prior CMOS imagers unsuitable for tracking applications. The proposed CMOS imager (see figure) would include an array of 1,024 by 1,024 pixels containing high-performance photodiode-based APS circuitry. The pixel pitch would be 9 m. The operations of the pixel circuits would be sequenced and otherwise controlled by an on-chip timing and control block, which would enable the collection of image data, during a single frame period, from either the full frame (that is, all 1,024 1,024 pixels) or from within as many as 8 different arbitrarily placed windows as large as 8 by 8 pixels each. A typical prior CMOS APS operates in a row-at-a-time ( grolling-shutter h) readout mode, which gives rise to exposure skew. In contrast, the proposed APS would operate in a sample-first/readlater mode, suppressing rolling-shutter effects. In this mode, the analog readout signals from the pixels corresponding to the windows of the interest (which windows, in the star-tracking application, would presumably contain guide stars) would be sampled rapidly by routing them through a programmable diagonal switch array to an on-chip parallel analog memory array. The

  11. High-Voltage-Input Level Translator Using Standard CMOS

    Science.gov (United States)

    Yager, Jeremy A.; Mojarradi, Mohammad M.; Vo, Tuan A.; Blalock, Benjamin J.

    2011-01-01

    proposed integrated circuit would translate (1) a pair of input signals having a low differential potential and a possibly high common-mode potential into (2) a pair of output signals having the same low differential potential and a low common-mode potential. As used here, "low" and "high" refer to potentials that are, respectively, below or above the nominal supply potential (3.3 V) at which standard complementary metal oxide/semiconductor (CMOS) integrated circuits are designed to operate. The input common-mode potential could lie between 0 and 10 V; the output common-mode potential would be 2 V. This translation would make it possible to process the pair of signals by use of standard 3.3-V CMOS analog and/or mixed-signal (analog and digital) circuitry on the same integrated-circuit chip. A schematic of the circuit is shown in the figure. Standard 3.3-V CMOS circuitry cannot withstand input potentials greater than about 4 V. However, there are many applications that involve low-differential-potential, high-common-mode-potential input signal pairs and in which standard 3.3-V CMOS circuitry, which is relatively inexpensive, would be the most appropriate circuitry for performing other functions on the integrated-circuit chip that handles the high-potential input signals. Thus, there is a need to combine high-voltage input circuitry with standard low-voltage CMOS circuitry on the same integrated-circuit chip. The proposed circuit would satisfy this need. In the proposed circuit, the input signals would be coupled into both a level-shifting pair and a common-mode-sensing pair of CMOS transistors. The output of the level-shifting pair would be fed as input to a differential pair of transistors. The resulting differential current output would pass through six standoff transistors to be mirrored into an output branch by four heterojunction bipolar transistors. The mirrored differential current would be converted back to potential by a pair of diode-connected transistors

  12. Improved Space Object Orbit Determination Using CMOS Detectors

    Science.gov (United States)

    Schildknecht, T.; Peltonen, J.; Sännti, T.; Silha, J.; Flohrer, T.

    2014-09-01

    CMOS-sensors, or in general Active Pixel Sensors (APS), are rapidly replacing CCDs in the consumer camera market. Due to significant technological advances during the past years these devices start to compete with CCDs also for demanding scientific imaging applications, in particular in the astronomy community. CMOS detectors offer a series of inherent advantages compared to CCDs, due to the structure of their basic pixel cells, which each contains their own amplifier and readout electronics. The most prominent advantages for space object observations are the extremely fast and flexible readout capabilities, feasibility for electronic shuttering and precise epoch registration, and the potential to perform image processing operations on-chip and in real-time. The major challenges and design drivers for ground-based and space-based optical observation strategies have been analyzed. CMOS detector characteristics were critically evaluated and compared with the established CCD technology, especially with respect to the above mentioned observations. Similarly, the desirable on-chip processing functionalities which would further enhance the object detection and image segmentation were identified. Finally, we simulated several observation scenarios for ground- and space-based sensor by assuming different observation and sensor properties. We will introduce the analyzed end-to-end simulations of the ground- and space-based strategies in order to investigate the orbit determination accuracy and its sensitivity which may result from different values for the frame-rate, pixel scale, astrometric and epoch registration accuracies. Two cases were simulated, a survey using a ground-based sensor to observe objects in LEO for surveillance applications, and a statistical survey with a space-based sensor orbiting in LEO observing small-size debris in LEO. The ground-based LEO survey uses a dynamical fence close to the Earth shadow a few hours after sunset. For the space-based scenario

  13. Applications of Si/SiGe heterostructures to CMOS devices

    International Nuclear Information System (INIS)

    Sidek, R.M.

    1999-03-01

    For more than two decades, advances in MOSFETs used in CMOS VLSI applications have been made through scaling to ever smaller dimensions for higher packing density, faster circuit speed and lower power dissipation. As scaling now approaches nanometer regime, the challenge for further scaling becomes greater in terms of technology as well as device reliability. This work presents an alternative approach whereby non-selectively grown Si/SiGe heterostructure system is used to improve device performance or to relax the technological challenge. SiGe is considered to be of great potential because of its promising properties and its compatibility with Si, the present mainstream material in microelectronics. The advantages of introducing strained SiGe in CMOS technology are examined through two types of device structure. A novel structure has been fabricated in which strained SiGe is incorporated in the source/drain of P-MOSFETs. Several advantages of the Si/SiGe source/drain P-MOSFETs over Si devices are experimentally, demonstrated for the first time. These include reduction in off-state leakage and punchthrough susceptibility, degradation of parasitic bipolar transistor (PBT) action, suppression of CMOS latchup and suppression of PBT-induced breakdown. The improvements due to the Si/SiGe heterojunction are supported by numerical simulations. The second device structure makes use of Si/SiGe heterostructure as a buried channel to enhance the hole mobility of P-MOSFETs. The increase in the hole mobility will benefit the circuit speed and device packing density. Novel fabrication processes have been developed to integrate non-selective Si/SiGe MBE layers into self-aligned PMOS and CMOS processes based on Si substrate. Low temperature processes have been employed including the use of low-pressure chemical vapor deposition oxide and plasma anodic oxide. Low field mobilities, μ 0 are extracted from the transfer characteristics, Id-Vg of SiGe channel P-MOSFETs with various Ge

  14. Measurement of cluster elongation and charge in a pixel detector of 10~$\\mu$m pitch at sub-GeV energies

    OpenAIRE

    Adamus, M.; Ciborowski, J.; Maczewski, L.; Luzniak, P.

    2011-01-01

    We present measurements of elongation and cluster charge using MIMOSA-18 MAPS pixel matrix with 10 $\\mu$m pixel pitch, using electron test beams of energies ranging from 15 to 500 MeV. We observe energy dependence of cluster charge and elongation for large incident angles.

  15. Task based synthesis of serial manipulators

    Directory of Open Access Journals (Sweden)

    Sarosh Patel

    2015-05-01

    Full Text Available Computing the optimal geometric structure of manipulators is one of the most intricate problems in contemporary robot kinematics. Robotic manipulators are designed and built to perform certain predetermined tasks. There is a very close relationship between the structure of the manipulator and its kinematic performance. It is therefore important to incorporate such task requirements during the design and synthesis of the robotic manipulators. Such task requirements and performance constraints can be specified in terms of the required end-effector positions, orientations and velocities along the task trajectory. In this work, we present a comprehensive method to develop the optimal geometric structure (DH parameters of a non-redundant six degree of freedom serial manipulator from task descriptions. In this work we define, develop and test a methodology to design optimal manipulator configurations based on task descriptions. This methodology is devised to investigate all possible manipulator configurations that can satisfy the task performance requirements under imposed joint constraints. Out of all the possible structures, the structures that can reach all the task points with the required orientations are selected. Next, these candidate structures are tested to see whether they can attain end-effector velocities in arbitrary directions within the user defined joint constraints, so that they can deliver the best kinematic performance. Additionally least power consuming configurations are also identified.

  16. Serial neuroradiological studies in focal cerebritis

    International Nuclear Information System (INIS)

    Hatta, S.; Mochizuki, H.; Kuru, Y.; Miwa, H.; Kondo, T.; Mori, H.; Mizuno, Y.

    1994-01-01

    We report serial neuroradiological studies in a patient with focal cerebritis in the head of the left caudate nucleus. On the day after the onset of symptoms, CT showed an ill-defined low density lesion. The lack of contrast enhancement appeared to be the most important finding for differentiating focal cerebritis from an encapsulated brain abscess or a tumour. MRI two days later revealed the centre of the lesion to be of slightly low intensity on T1-weighted inversion recovery (IR) images and very low intensity on T2-weighted spin echo images, which appeared to correspond to the early cerebritis stage of experimentally induced cerebritis and brain abscess. Ten days after the onset of symptoms, CT revealed a thin ring of enhancement in the head of the caudate nucleus, and a similar small ring was seen in the hypothalamus 16 days after the onset, corresponding to the late cerebritis stage. MRI nine days later revealed ill-defined high signal lesions within the involved area on the T1-weighted IR images. To our knowledge, this is the first published MRI documentation of the early cerebritis stage developing into an encapsulated brain abscess. The mechanisms underlying of these radiographic changes are discussed. (orig.)

  17. Mārketinga komunikāciju analīze uzņēmumā SIA "Adidas Baltics".

    OpenAIRE

    Zvīnis, Gusts Gustavs

    2017-01-01

    Bakalaura darba tēma ir “Mārketinga komunikāciju analīze uzņēmumā Sia “adidas Baltics” Darba mērķis ir pamatojoties uz apkopoto teorētiskās daļas informāciju par mārketinga komunikāciju veidiem un to plānošanu , analizēt uzņēmuma Sia “adidas Baltics” mārketinga komunikāciju efektivitāti Latvijas tirgū, rezultātā izstrādājot rekomendācijas uzņēmuma Sia “adidas Baltics” mārketinga komunikāciju efektivitātes palielināšanai. Bakalaura darbs sastāv no ievada, piecām nodaļām, secinājumiem un prie...

  18. Franšīzes izmantošana uzņēmumā McDonald’s.

    OpenAIRE

    Žučkova, Alina

    2012-01-01

    Bakalaura darba tēma ir „Franšīzes izmantošanas uzņēmumā McDonald’s”. Bakalaura darbs sastāv no četrām nodaļām. Pirmās nodaļas saturs ir balstīts uz franšīzes teorētiskā raksturojuma analīzi. Tas sevī ietver gan franšīzes būtību un principus, gan franšīzes attīstību un tās veidus, gan franšīzes iedalījumu pēc formas, kā arī franšīzes devēja un franšīzes ņēmēja ieguvumu un zaudējumu apskatu. Otrajā nodaļā tiek apskatīta Latvijas likumdošanas bāze, kas ir saistīta ar franšīzi. Tre...

  19. Freeform Compliant CMOS Electronic Systems for Internet of Everything Applications

    KAUST Repository

    Shaikh, Sohail F.

    2017-01-17

    The state-of-the-art electronics technology has been an integral part of modern advances. The prevalent rise of the mobile device and computational technology in the age of information technology offers exciting applications that are attributed to sophisticated, enormously reliable, and most mature CMOS-based electronics. We are accustomed to high performance, cost-effective, multifunctional, and energy-efficient scaled electronics. However, they are rigid, bulky, and brittle. The convolution of flexibility and stretchability in electronics for emerging Internet of Everything application can unleash smart application horizon in unexplored areas, such as robotics, healthcare, smart cities, transport, and entertainment systems. While flexible and stretchable device themes are being remarkably chased, the realization of the fully compliant electronic system is unaddressed. Integration of data processing, storage, communication, and energy management devices complements a compliant system. Here, a comprehensive review is presented on necessity and design criteria for freeform (physically flexible and stretchable) compliant high-performance CMOS electronic systems.

  20. Nanometer CMOS Sigma-Delta Modulators for Software Defined Radio

    CERN Document Server

    Morgado, Alonso; Rosa, José M

    2012-01-01

    This book presents innovative solutions for the implementation of Sigma-Delta Modulation (SDM) based Analog-to-Digital Conversion (ADC), required for the next generation of wireless hand-held terminals. These devices will be based on the so-called multistandard transceiver chipsets, integrated in nanometer CMOS technologies. One of the most challenging and critical parts in such transceivers is the analog-digital interface, because of the assorted signal bandwidths and dynamic ranges that can be required to handle the A/D conversion for several operation modes.   This book describes new adaptive and reconfigurable SDM ADC topologies, circuit strategies and synthesis methods, specially suited for multi-standard wireless telecom systems and future Software-defined-radios (SDRs) integrated in nanoscale CMOS. It is a practical book, going from basic concepts to the frontiers of SDM architectures and circuit implementations, which are explained in a didactical and systematic way. It gives a comprehensive overview...

  1. Micromachined high-performance RF passives in CMOS substrate

    International Nuclear Information System (INIS)

    Li, Xinxin; Ni, Zao; Gu, Lei; Wu, Zhengzheng; Yang, Chen

    2016-01-01

    This review systematically addresses the micromachining technologies used for the fabrication of high-performance radio-frequency (RF) passives that can be integrated into low-cost complementary metal-oxide semiconductor (CMOS)-grade (i.e. low-resistivity) silicon wafers. With the development of various kinds of post-CMOS-compatible microelectromechanical systems (MEMS) processes, 3D structural inductors/transformers, variable capacitors, tunable resonators and band-pass/low-pass filters can be compatibly integrated into active integrated circuits to form monolithic RF system-on-chips. By using MEMS processes, including substrate modifying/suspending and LIGA-like metal electroplating, both the highly lossy substrate effect and the resistive loss can be largely eliminated and depressed, thereby meeting the high-performance requirements of telecommunication applications. (topical review)

  2. Future challenges in single event effects for advanced CMOS technologies

    International Nuclear Information System (INIS)

    Guo Hongxia; Wang Wei; Luo Yinhong; Zhao Wen; Guo Xiaoqiang; Zhang Keying

    2010-01-01

    SEE have became a substantial Achilles heel for the reliability of space-based advanced CMOS technologies with features size downscaling. Future space and defense systems require identification and understanding of single event effects to develop hardening approaches for advanced technologies, including changes in device geometry and materials affect energy deposition, charge collection,circuit upset, parametric degradation devices. Topics covered include the impact of technology scaling on radiation response, including single event transients in high speed digital circuits, evidence for single event effects caused by proton direct ionization, and the impact for SEU induced by particle energy effects and indirect ionization. The single event effects in CMOS replacement technologies are introduced briefly. (authors)

  3. A CMOS integrated timing discriminator circuit for fast scintillation counters

    International Nuclear Information System (INIS)

    Jochmann, M.W.

    1998-01-01

    Based on a zero-crossing discriminator using a CR differentiation network for pulse shaping, a new CMOS integrated timing discriminator circuit is proposed for fast (t r ≥ 2 ns) scintillation counters at the cooler synchrotron COSY-Juelich. By eliminating the input signal's amplitude information by means of an analog continuous-time divider, a normalized pulse shape at the zero-crossing point is gained over a wide dynamic input amplitude range. In combination with an arming comparator and a monostable multivibrator this yields in a highly precise timing discriminator circuit, that is expected to be useful in different time measurement applications. First measurement results of a CMOS integrated logarithmic amplifier, which is part of the analog continuous-time divider, agree well with the corresponding simulations. Moreover, SPICE simulations of the integrated discriminator circuit promise a time walk well below 200 ps (FWHM) over a 40 dB input amplitude dynamic range

  4. PERFORMANCE OF LEAKAGE POWER MINIMIZATION TECHNIQUE FOR CMOS VLSI TECHNOLOGY

    Directory of Open Access Journals (Sweden)

    T. Tharaneeswaran

    2012-06-01

    Full Text Available Leakage power of CMOS VLSI Technology is a great concern. To reduce leakage power in CMOS circuits, a Leakage Power Minimiza-tion Technique (LPMT is implemented in this paper. Leakage cur-rents are monitored and compared. The Comparator kicks the charge pump to give body voltage (Vbody. Simulations of these circuits are done using TSMC 0.35µm technology with various operating temper-atures. Current steering Digital-to-Analog Converter (CSDAC is used as test core to validate the idea. The Test core (eg.8-bit CSDAC had power consumption of 347.63 mW. LPMT circuit alone consumes power of 6.3405 mW. This technique results in reduction of leakage power of 8-bit CSDAC by 5.51mW and increases the reliability of test core. Mentor Graphics ELDO and EZ-wave are used for simulations.

  5. Pixel front-end development in 65 nm CMOS technology

    International Nuclear Information System (INIS)

    Havránek, M; Hemperek, T; Kishishita, T; Krüger, H; Wermes, N

    2014-01-01

    Luminosity upgrade of the LHC (HL-LHC) imposes severe constraints on the detector tracking systems in terms of radiation hardness and capability to cope with higher hit rates. One possible way of keeping track with increasing luminosity is the usage of more advanced technologies. Ultra deep sub-micron CMOS technologies allow a design of complex and high speed electronics with high integration density. In addition, these technologies are inherently radiation hard. We present a prototype of analog pixel front-end integrated circuit designed in 65 nm CMOS technology with applications oriented towards the ATLAS Pixel Detector upgrade. The aspects of ultra deep sub-micron design and performance of the analog pixel front-end circuits will be discussed

  6. An improved standard total dose test for CMOS space electronics

    International Nuclear Information System (INIS)

    Fleetwood, D.M.; Winokur, P.S.; Riewe, L.C.; Pease, R.L.

    1989-01-01

    The postirradiation response of hardened and commercial CMOS devices is investigated as a function of total dose, dose rate, and annealing time and temperature. Cobalt-60 irradiation at ≅ 200 rad(SiO 2 )/s followed by a 1-week 100 degrees C biased anneal and testing is shown to be an effective screen of hardened devices for space use. However, a similar screen and single-point test performed after Co-60 irradiation and elevated temperature anneal cannot be generally defined for commercial devices. In the absence of detailed knowledge about device and circuit radiation response, a two-point standard test is proposed to ensure space surviability of CMOS circuits: a Co-60 irradiation and test to screen against oxide-trapped charge related failures, and an additional rebound test to screen against interface-trap related failures. Testing implications for bipolar technologies are also discussed

  7. Latch-up control in CMOS integrated circuits

    International Nuclear Information System (INIS)

    Ochoa, A. Jr.; Estreich, D.B.; Dawes, W.R. Jr.

    1979-01-01

    The potential for latch-up, a pnpn self-sustaining low impedance state, is inherent in standard bulk CMOS structures. Under normal bias, the parasitic SCR is in its blocking state, but if subjected to a high-voltage spike or if exposed to an ionizing environment, triggering may occur. Prevention of latch-up has been achieved by lifetime control methods such as gold doping or neutron irradiation and by modifying the structure with buried layers. Smaller, next-generation CMOS designs will enhance parasitic action making the problem a concern for other than military or space applications alone. Latch-up control methods presently employed are surveyed. Their adaptability to VSLI designs is analyzed

  8. SEU-hardened design for shift register in CMOS APS

    International Nuclear Information System (INIS)

    Meng Liya; Liu Zedong; Hu Dajiang; Wang Qingxiang

    2012-01-01

    The inverter-based quasi-static shift register in CMOS APS, which is used in ionizing radiation environment, is susceptible to single event upset (SEU), thus affecting the CMOS active pixel sensor (APS) working. The analysis of the SEU for inverter-based quasi-static shift register concludes that the most sensitive node to single event transient (SET) exists in the input of inverter, and the threshold voltage and capacitance of input node of inverter determine the capability of anti-SEU. A new method was proposed, which replaced the inverter with Schmitt trigger in shift register. Because there is a hysteresis on voltage transfer characteristic of Schmitt trigger, there is high flip threshold, thus better capability of anti-SEU can be achieved. Simulation results show that the anti-SEU capability of Schmitt trigger is 10 times more than that of inverter. (authors)

  9. Wide modulation bandwidth terahertz detection in 130 nm CMOS technology

    Science.gov (United States)

    Nahar, Shamsun; Shafee, Marwah; Blin, Stéphane; Pénarier, Annick; Nouvel, Philippe; Coquillat, Dominique; Safwa, Amr M. E.; Knap, Wojciech; Hella, Mona M.

    2016-11-01

    Design, manufacturing and measurements results for silicon plasma wave transistors based wireless communication wideband receivers operating at 300 GHz carrier frequency are presented. We show the possibility of Si-CMOS based integrated circuits, in which by: (i) specific physics based plasma wave transistor design allowing impedance matching to the antenna and the amplifier, (ii) engineering the shape of the patch antenna through a stacked resonator approach and (iii) applying bandwidth enhancement strategies to the design of integrated broadband amplifier, we achieve an integrated circuit of the 300 GHz carrier frequency receiver for wireless wideband operation up to/over 10 GHz. This is, to the best of our knowledge, the first demonstration of low cost 130 nm Si-CMOS technology, plasma wave transistors based fast/wideband integrated receiver operating at 300 GHz atmospheric window. These results pave the way towards future large scale (cost effective) silicon technology based terahertz wireless communication receivers.

  10. Smart CMOS image sensor for lightning detection and imaging.

    Science.gov (United States)

    Rolando, Sébastien; Goiffon, Vincent; Magnan, Pierre; Corbière, Franck; Molina, Romain; Tulet, Michel; Bréart-de-Boisanger, Michel; Saint-Pé, Olivier; Guiry, Saïprasad; Larnaudie, Franck; Leone, Bruno; Perez-Cuevas, Leticia; Zayer, Igor

    2013-03-01

    We present a CMOS image sensor dedicated to lightning detection and imaging. The detector has been designed to evaluate the potentiality of an on-chip lightning detection solution based on a smart sensor. This evaluation is performed in the frame of the predevelopment phase of the lightning detector that will be implemented in the Meteosat Third Generation Imager satellite for the European Space Agency. The lightning detection process is performed by a smart detector combining an in-pixel frame-to-frame difference comparison with an adjustable threshold and on-chip digital processing allowing an efficient localization of a faint lightning pulse on the entire large format array at a frequency of 1 kHz. A CMOS prototype sensor with a 256×256 pixel array and a 60 μm pixel pitch has been fabricated using a 0.35 μm 2P 5M technology and tested to validate the selected detection approach.

  11. A passive CMOS pixel sensor for the high luminosity LHC

    Energy Technology Data Exchange (ETDEWEB)

    Daas, Michael; Gonella, Laura; Hemperek, Tomasz; Huegging, Fabian; Janssen, Jens; Krueger, Hans; Pohl, David-Leon; Wermes, Norbert [Physikalisches Institut der Universitaet Bonn (Germany); Macchiolo, Anna [Max-Planck-Institut fuer Physik, Muenchen (Germany)

    2016-07-01

    The high luminosity upgrade for the Large Hadron Collider at CERN requires a new inner tracking detector for the ATLAS experiment. About 200 m{sup 2} of silicon detectors are needed demanding new, low cost hybridization- and sensor technologies. One promising approach is to use commercial CMOS technologies to produce the passive sensor for a hybrid pixel detector design. In this talk a fully functional prototype of a 300 μm thick, backside biased CMOS pixel sensor in 150 nm LFoundry technology is presented. The sensor is bump bonded to the ATLAS FE-I4 with AC and DC coupled pixels. Results like leakage current, noise performance, and charge collection efficiency are presented and compared to the actual ATLAS pixel sensor design.

  12. A back-illuminated megapixel CMOS image sensor

    Science.gov (United States)

    Pain, Bedabrata; Cunningham, Thomas; Nikzad, Shouleh; Hoenk, Michael; Jones, Todd; Wrigley, Chris; Hancock, Bruce

    2005-01-01

    In this paper, we present the test and characterization results for a back-illuminated megapixel CMOS imager. The imager pixel consists of a standard junction photodiode coupled to a three transistor-per-pixel switched source-follower readout [1]. The imager also consists of integrated timing and control and bias generation circuits, and provides analog output. The analog column-scan circuits were implemented in such a way that the imager could be configured to run in off-chip correlated double-sampling (CDS) mode. The imager was originally designed for normal front-illuminated operation, and was fabricated in a commercially available 0.5 pn triple-metal CMOS-imager compatible process. For backside illumination, the imager was thinned by etching away the substrate was etched away in a post-fabrication processing step.

  13. Nanocantilever based mass sensor integrated with cmos circuitry

    DEFF Research Database (Denmark)

    Davis, Zachary James; Abadal, G.; Campabadal, F.

    2003-01-01

    We have demonstrated the successful integration of a cantilever based mass detector with standard CMOS circuitry. The purpose of the circuitry is to facilitate the readout of the cantilever's deflection in order to measure resonant frequency shifts of the cantilever. The principle and design...... of the mass detector are presented showing that miniaturization of such cantilever based resonant devices leads to highly sensitive mass sensors, which have the potential to detect single molecules. The design of the readout circuitry used for the first electrical characterization of an integrated cantilever...... with CMOS circuitry is demonstrated. The electrical characterization of the device shows that the resonant behavior of the cantilever depends on the applied voltages, which corresponds to theory....

  14. Experimental research on transient ionizing radiation effects of CMOS microcontroller

    International Nuclear Information System (INIS)

    Jin Xiaoming; Fan Ruyu; Chen Wei; Wang Guizhen; Lin Dongsheng; Yang Shanchao; Bai Xiaoyan

    2010-01-01

    This paper presents an experimental test system of CMOS microcontroller EE80C196KC20. Based on this system, the transient ionizing radiation effects on microcontroller were investigated using 'Qiangguang-I' accelerator. The gamma pulse width was 20 ns and the dose rate (for the Si atom) was in the range of 6.7 x 10 6 to 2.0 x 10 8 Gy/s in the experimental study. The disturbance and latchup effects were observed at different dose rate levels. Latchup threshold of the microcontroller was obtained. Disturbance interval and the system power supply current have a relationship with the dose rate level. The transient ionizing radiation induces photocurrent in the PN junctions that are inherent in CMOS circuits. The photocurrent is responsible for the electrical and functional degradation. (authors)

  15. Performance of a Fast Binary Readout CMOS Active Pixel Sensor Chip Designed for Charged Particle Detection

    Science.gov (United States)

    Deerli, Yavuz; Besanon, Marc; Besson, Auguste; Claus, Gilles; Deptuch, Grzegorz; Dulinski, Wojciech; Fourches, Nicolas; Goffe, Mathieu; Himmi, Abdelkader; Li, Yan; Lutz, Pierre; Orsini, Fabienne; Szelezniak, Michal

    2006-12-01

    We report on the performance of the MIMOSA8 (HiMAPS1) chip. The chip is a 128times32 pixels array where 24 columns have discriminated binary outputs and eight columns analog test outputs. Offset correction techniques are used extensively in this chip to overcome process related mismatches. The array is divided in four blocks of pixels with different conversion factors and is controlled by a serially programmable sequencer. MIMOSA8 is a representative of the CMOS sensors development option considered as a promising candidate for the Vertex Detector of the future International Linear Collider (ILC). The readout technique, implemented on the chip, combines high spatial resolution capabilities with high processing readout speed. Data acquisition, providing control of the chip and signal buffering and linked to a VME system, was made on the eight analog outputs. Analog data, without and with a 55Fe X-ray source, were acquired and processed using off-line analysis software. From the reconstruction of pixel clusters, built around a central pixel, we deduce that the charge spread is limited to the closest 25 pixels and almost all the available charge is collected. The position of the total charge collection peak (and subsequently the charge-to-voltage conversion factor) stays unaffected when the clock frequency is increased even up to 150 MHz (13.6 mus readout time per frame). The discriminators, placed in the readout chain, have proved to be fully functional. Beam tests have been made with high energy electrons at DESY (Germany) to study detection efficiency. The results prove that MIMOSA8 is the first and fastest successful monolithic active pixel sensor with on-chip signal discrimination for detection of MIPs

  16. A BiCMOS Binary Hysteresis Chaos Generator

    Science.gov (United States)

    Ahmadi, S.; Newcomb, R. W.

    A previous op-amp RC circuit which was proven to give chaotic signals is converted to a BiCMOS design more suitable to integrated circuit realization. The structure results from a degree two differential equation which includes binary hysteresis as its nonlinearity. The circuit is realized by differential (voltage to current) pairs feeding two capacitors, which carry the dynamics, with the key component being a (voltage to current) binary hysteresis circuit due to Linares.

  17. Tin (Sn) for enhancing performance in silicon CMOS

    KAUST Repository

    Hussain, Aftab M.; Fahad, Hossain M.; Singh, Nirpendra; Sevilla, Galo T.; Schwingenschlö gl, Udo; Hussain, Muhammad Mustafa

    2013-01-01

    We study a group IV element: tin (Sn) by integrating it into silicon lattice, to enhance the performance of silicon CMOS. We have evaluated the electrical properties of the SiSn lattice by performing simulations using First-principle studies, followed by experimental device fabrication and characterization. We fabricated high-κ/metal gate based Metal-Oxide-Semiconductor capacitors (MOSCAPs) using SiSn as channel material to study the impact of Sn integration into silicon. © 2013 IEEE.

  18. Simulation of design dependent failure exposure levels for CMOS ICs

    International Nuclear Information System (INIS)

    Kaul, N.; Bhuva, B.L.; Rangavajjhala, V.; van der Molen, H.; Kerns, S.E.

    1990-01-01

    The total dose exposure of CMOS ICs introduces bias-dependent parameter shifts in individual devices. The bias dependency of individual parameter shifts of devices cause different designs to behave differently under identical testing conditions. This paper studies the effect of design and bias on the radiation tolerance of ICs and presents an automated design tool that produces different designs for a logic function, and presents important parameters of each design to circuit designer for trade off analysis

  19. Integrated CMOS sensor technologies for the CLIC tracker

    CERN Document Server

    AUTHOR|(SzGeCERN)754303

    2017-01-01

    Integrated technologies are attractive candidates for an all silicon tracker at the proposed future multi-TeV linear e+e- collider CLIC. In this context CMOS circuitry on a high resistivity epitaxial layer has been studied using the ALICE Investigator test-chip. Test-beam campaigns have been performed to study the Investigator performance and a Technology Computer Aided Design based simulation chain has been developed to further explore the sensor technology.

  20. Accelerated life testing effects on CMOS microcircuit characteristics, phase 1

    Science.gov (United States)

    Maximow, B.

    1976-01-01

    An accelerated life test of sufficient duration to generate a minimum of 50% cumulative failures in lots of CMOS devices was conducted to provide a basis for determining the consistency of activation energy at 250 C. An investigation was made to determine whether any thresholds were exceeded during the high temperature testing, which could trigger failure mechanisms unique to that temperature. The usefulness of the 250 C temperature test as a predictor of long term reliability was evaluated.

  1. Tin (Sn) for enhancing performance in silicon CMOS

    KAUST Repository

    Hussain, Aftab M.

    2013-10-01

    We study a group IV element: tin (Sn) by integrating it into silicon lattice, to enhance the performance of silicon CMOS. We have evaluated the electrical properties of the SiSn lattice by performing simulations using First-principle studies, followed by experimental device fabrication and characterization. We fabricated high-κ/metal gate based Metal-Oxide-Semiconductor capacitors (MOSCAPs) using SiSn as channel material to study the impact of Sn integration into silicon. © 2013 IEEE.

  2. Design and Characterization of Vertical Mesh Capacitors in Standard CMOS

    DEFF Research Database (Denmark)

    Christensen, Kåre Tais

    2001-01-01

    This paper shows how good RF capacitors can be made in a standard digital CMOS process. The capacitors which are also well suited for binary weighted switched capacitor banks show very good RF performance: Q-values of 57 at 4.0 GHz, a density of 0.27 fF/μ2, 2.2 μm wide shielded unit capacitors, 6...

  3. Scaling limits and reliability of SOI CMOS technology

    International Nuclear Information System (INIS)

    Ioannou, D E

    2005-01-01

    As bulk and PD-SOI CMOS approach their scaling limit (at gate length of around 50 nm), there is a renewed interest on FD-SOI because of its potential for continued scalability beyond this limit. In this review the performance and reliability of extremely scaled FD transistors are discussed and an attempt is made to identify critical areas for further research. (invited paper)

  4. PORNOGRAFI DALAM SERIAL ANIME ANAK (ANALISIS SEMIOTIKA DALAM SERIAL CRAYON SHIN CHAN

    Directory of Open Access Journals (Sweden)

    - Sangidun

    2017-01-01

    Full Text Available Crayon Shin Chan, a Japanese two-dimension animation series broadcast in one of private Indonesian TVs, is categorized into child’s program since it is broadcast at child’s prime time, Sunday 08.30 a.m. In spite of its broadcast time, this series consist of symbols directed not for children, such as some acts that are not appropriate to be done by children, especially in Indonesia. Moreover, adult symbols of sex are also found in the program. For this reason it will be interesting to analyze it using semiotic analysis. Semiotics is the study of symbol and its meaning which its principle concept is that both signifier and signified consist of symbols and are related to denotation and connotation.   Crayon Shin Chan merupakan serial animasi dua dimensi yang tayang di salah satu stasiun televisi swasta di Indonesia. Ini merupakan produk animasi 2 dimensi yang diimpor dari Jepang. Di Indonesia, serial ini masuk dalam kategori acara anak. Hal ini dapat dilihat dari jam penayangannya yang merupakan waktu prime time bagi anak, yakni pada hari minggu pukul 08.30. Akan tetapi, pada serial ini banyak simbol-simbol yang mengarah pada tayangan yang bukan untuk anak-anak, yakni adeganadegan yang tidak pantas dilakukan oleh anak khususnya di Indonesia. Serta adanya pula simbol-simbol yang mengarah pada tayangan berbau dewasa. Tentu akan menarik jika tayangan ini diteliti menggunakan analisis semiotika. Semiotika sendiri merupakan kajian ilmu mengenai tanda dan makna. Yang pada prinsipnya, konsep penting seperti penanda (signifier dan petanda (signified sama-sama terdiri dari tanda dan terkait dengan denotasi dan konotasi.

  5. PERFORMANCE OF DIFFERENT CMOS LOGIC STYLES FOR LOW POWER AND HIGH SPEED

    OpenAIRE

    Sreenivasa Rao.Ijjada; Ayyanna.G; G.Sekhar Reddy; Dr.V.Malleswara Rao

    2011-01-01

    Designing high-speed low-power circuits with CMOS technology has been a major research problem for many years. Several logic families have been proposed and used to improve circuit performance beyond that of conventional static CMOS family. Fast circuit families are becoming attractive in deep sub micron technologies since the performance benefits obtained from process scaling are decreasing as feature size decreases. This paper presents CMOS differential circuit families such as Dual rail do...

  6. Self-calibrated humidity sensor in CMOS without post-processing.

    Science.gov (United States)

    Nizhnik, Oleg; Higuchi, Kohei; Maenaka, Kazusuke

    2012-01-01

    A 1.1 μW power dissipation, voltage-output humidity sensor with 10% relative humidity accuracy was developed in the LFoundry 0.15 μm CMOS technology without post-processing. The sensor consists of a woven lateral array of electrodes implemented in CMOS top metal, a humidity-sensitive layer of Intervia Photodielectric 8023D-10, a CMOS capacitance to voltage converter, and the self-calibration circuitry.

  7. Self-Calibrated Humidity Sensor in CMOS without Post-Processing

    OpenAIRE

    Nizhnik, Oleg; Higuchi, Kohei; Maenaka, Kazusuke

    2011-01-01

    A 1.1 μW power dissipation, voltage-output humidity sensor with 10% relative humidity accuracy was developed in the LFoundry 0.15 μm CMOS technology without post-processing. The sensor consists of a woven lateral array of electrodes implemented in CMOS top metal, a humidity-sensitive layer of Intervia Photodielectric 8023D-10, a CMOS capacitance to voltage converter, and the self-calibration circuitry.

  8. Single photon detection and localization accuracy with an ebCMOS camera

    Energy Technology Data Exchange (ETDEWEB)

    Cajgfinger, T. [CNRS/IN2P3, Institut de Physique Nucléaire de Lyon, Villeurbanne F-69622 (France); Dominjon, A., E-mail: agnes.dominjon@nao.ac.jp [Université de Lyon, Université de Lyon 1, Lyon 69003 France. (France); Barbier, R. [CNRS/IN2P3, Institut de Physique Nucléaire de Lyon, Villeurbanne F-69622 (France); Université de Lyon, Université de Lyon 1, Lyon 69003 France. (France)

    2015-07-01

    The CMOS sensor technologies evolve very fast and offer today very promising solutions to existing issues facing by imaging camera systems. CMOS sensors are very attractive for fast and sensitive imaging thanks to their low pixel noise (1e-) and their possibility of backside illumination. The ebCMOS group of IPNL has produced a camera system dedicated to Low Light Level detection and based on a 640 kPixels ebCMOS with its acquisition system. After reminding the principle of detection of an ebCMOS and the characteristics of our prototype, we confront our camera to other imaging systems. We compare the identification efficiency and the localization accuracy of a point source by four different photo-detection devices: the scientific CMOS (sCMOS), the Charge Coupled Device (CDD), the Electron Multiplying CCD (emCCD) and the Electron Bombarded CMOS (ebCMOS). Our ebCMOS camera is able to identify a single photon source in less than 10 ms with a localization accuracy better than 1 µm. We report as well efficiency measurement and the false positive identification of the ebCMOS camera by identifying more than hundreds of single photon sources in parallel. About 700 spots are identified with a detection efficiency higher than 90% and a false positive percentage lower than 5. With these measurements, we show that our target tracking algorithm can be implemented in real time at 500 frames per second under a photon flux of the order of 8000 photons per frame. These results demonstrate that the ebCMOS camera concept with its single photon detection and target tracking algorithm is one of the best devices for low light and fast applications such as bioluminescence imaging, quantum dots tracking or adaptive optics.

  9. Transtornos de personalidade, psicopatia e serial killers Personality disorders, psychopathy and serial killers

    Directory of Open Access Journals (Sweden)

    Hilda C P Morana

    2006-10-01

    Full Text Available OBJETIVO: Apresentar as características básicas dos diversos transtornos específicos de personalidade, mas centrando-se no transtorno de personalidade anti-social, fazendo sua diferenciação com psicopatia. O estudo ainda se propõe a abordar a figura do serial killer, apontando a presença de aspectos psicopáticos no homicídio seriado. MÉTODO: Uma revisão bibliográfica foi feita no sentido de se abordar convergências e divergências entre diversos autores sobre um assunto tão polêmico, sobretudo quanto à viabilidade de tratamento dessa clientela forense. RESULTADOS: Enquanto o transtorno de personalidade anti-social é um diagnóstico médico, pode-se entender o termo "psicopatia", pertencente à esfera psiquiátrico-forense, como um "diagnóstico legal". Não se pode falar ainda de tratamento eficaz para os chamados "serial killers". CONCLUSÃO: Os transtornos de personalidade, especialmente o tipo anti-social, representam ainda hoje um verdadeiro desafio para a psiquiatria forense. O local mais adequado e justo para seus portadores, bem como recomendação homogênea e padronizada de tratamento são questões ainda não respondidas.OBJECTIVE: To illustrate the basic characteristics of several specific personality disorders, focusing mainly in antisocial personality disorder. The differences between antisocial personality disorder and psychopathy are highlighted. Serial killers and its psychopathic aspects are also discussed. METHOD: A bibliographic review was completed in order to outline convergences and divergences among different authors about this controversial issue, especially those concerning the possibility of treatment. RESULTS: While anti-social personality disorder is a medical diagnosis, the term "psychopathy" (which belongs to the sphere of forensic psychiatry may be understood as a "legal diagnosis". It is not still possible to identify an effective treatment for serial killers. CONCLUSION: Personality disorders

  10. A Grand Challenge for CMOS Scaling: Alternate Gate Dielectrics

    Science.gov (United States)

    Wallace, Robert M.

    2001-03-01

    Many materials systems are currently under consideration as potential replacements for SiO2 as the gate dielectric material for sub-0.13 um complementary metal oxide semiconductor (CMOS) technology. The prospect of replacing SiO2 is a formidable task because the alternate gate dielectric must provide many properties that are, at a minimum, comparable to those of SiO2 yet with a much higher permittivity. A systematic examination of the required performance of gate dielectrics suggests that the key properties to consider in the selection an alternative gate dielectric candidate are (a) permittivity, band gap and band alignment to silicon, (b) thermodynamic stability, (c) film morphology, (d) interface quality, (e) compatibility with the current or expected materials to be used in processing for CMOS devices, (f) process compatibility, and (g) reliability. Many dielectrics appear favorable in some of these areas, but very few materials are promising with respect to all of these guidelines. We will review the performance requirements for materials associated with CMOS scaling, the challenges associated with these requirements, and the state-of-the-art in current research for alternate gate dielectrics. The requirements for process integration compatibility are remarkably demanding, and any serious candidates will emerge only through continued, intensive investigation.

  11. Robust Dehaze Algorithm for Degraded Image of CMOS Image Sensors

    Directory of Open Access Journals (Sweden)

    Chen Qu

    2017-09-01

    Full Text Available The CMOS (Complementary Metal-Oxide-Semiconductor is a new type of solid image sensor device widely used in object tracking, object recognition, intelligent navigation fields, and so on. However, images captured by outdoor CMOS sensor devices are usually affected by suspended atmospheric particles (such as haze, causing a reduction in image contrast, color distortion problems, and so on. In view of this, we propose a novel dehazing approach based on a local consistent Markov random field (MRF framework. The neighboring clique in traditional MRF is extended to the non-neighboring clique, which is defined on local consistent blocks based on two clues, where both the atmospheric light and transmission map satisfy the character of local consistency. In this framework, our model can strengthen the restriction of the whole image while incorporating more sophisticated statistical priors, resulting in more expressive power of modeling, thus, solving inadequate detail recovery effectively and alleviating color distortion. Moreover, the local consistent MRF framework can obtain details while maintaining better results for dehazing, which effectively improves the image quality captured by the CMOS image sensor. Experimental results verified that the method proposed has the combined advantages of detail recovery and color preservation.

  12. Advanced CMOS device technologies for 45 nm node and below

    Directory of Open Access Journals (Sweden)

    A. Veloso, T. Hoffmann, A. Lauwers, H. Yu, S. Severi, E. Augendre, S. Kubicek, P. Verheyen, N. Collaert, P. Absil, M. Jurczak and S. Biesemans

    2007-01-01

    Full Text Available We review and discuss the latest developments and technology options for 45 nm node and below, with scaled planar bulk MOSFETs and MuGFETs as emerging devices. One of the main metal gate (MG candidates for scaled CMOS technologies are fully silicided (FUSI gates. In this work, by means of a selective and controlled poly etch-back integration process, dual work-function Ni-based FUSI/HfSiON CMOS circuits with record ring oscillator performance (high-VT are reported (17 ps at VDD=1.1 V and 20 pA/μm Ioff, meeting the ITRS 45 nm node requirement for low-power (LP CMOS. Compatibility of FUSI and other MG with known stress boosters like stressed CESL (contact-etch-stop-layer with high intrinsic stress or embedded SiGe in the pMOS S/D regions is validated. To obtain MuGFET devices that are competitive, as compared to conventional planar bulk devices, and that meet the stringent drive and leakage current requirements for the 32 nm node and beyond, higher channel mobilities are required. Results obtained by several strain engineering methods are presented here.

  13. From vertex detectors to inner trackers with CMOS pixel sensors

    CERN Document Server

    Besson, A.

    2017-01-01

    The use of CMOS Pixel Sensors (CPS) for high resolution and low material vertex detectors has been validated with the 2014 and 2015 physics runs of the STAR-PXL detector at RHIC/BNL. This opens the door to the use of CPS for inner tracking devices, with 10-100 times larger sensitive area, which require therefore a sensor design privileging power saving, response uniformity and robustness. The 350 nm CMOS technology used for the STAR-PXL sensors was considered as too poorly suited to upcoming applications like the upgraded ALICE Inner Tracking System (ITS), which requires sensors with one order of magnitude improvement on readout speed and improved radiation tolerance. This triggered the exploration of a deeper sub-micron CMOS technology, Tower-Jazz 180 nm, for the design of a CPS well adapted for the new ALICE-ITS running conditions. This paper reports the R&D results for the conception of a CPS well adapted for the ALICE-ITS.

  14. Transient-induced latchup in CMOS integrated circuits

    CERN Document Server

    Ker, Ming-Dou

    2009-01-01

    "Transient-Induced Latchup in CMOS Integrated Circuits equips the practicing engineer with all the tools needed to address this regularly occurring problem while becoming more proficient at IC layout. Ker and Hsu introduce the phenomenon and basic physical mechanism of latchup, explaining the critical issues that have resurfaced for CMOS technologies. Once readers can gain an understanding of the standard practices for TLU, Ker and Hsu discuss the physical mechanism of TLU under a system-level ESD test, while introducing an efficient component-level TLU measurement setup. The authors then present experimental methodologies to extract safe and area-efficient compact layout rules for latchup prevention, including layout rules for I/O cells, internal circuits, and between I/O and internal circuits. The book concludes with an appendix giving a practical example of extracting layout rules and guidelines for latchup prevention in a 0.18-micrometer 1.8V/3.3V silicided CMOS process."--Publisher's description.

  15. Multi-target electrochemical biosensing enabled by integrated CMOS electronics

    International Nuclear Information System (INIS)

    Rothe, J; Lewandowska, M K; Heer, F; Frey, O; Hierlemann, A

    2011-01-01

    An integrated electrochemical measurement system, based on CMOS technology, is presented, which allows the detection of several analytes in parallel (multi-analyte) and enables simultaneous monitoring at different locations (multi-site). The system comprises a 576-electrode CMOS sensor chip, an FPGA module for chip control and data processing, and the measurement laptop. The advantages of the highly versatile system are demonstrated by two applications. First, a label-free, hybridization-based DNA sensor is enabled by the possibility of large-scale integration in CMOS technology. Second, the detection of the neurotransmitter choline is presented by assembling the chip with biosensor microprobe arrays. The low noise level enables a limit of detection of, e.g., 0.3 µM choline. The fully integrated system is self-contained: it features cleaning, functionalization and measurement functions without the need for additional electrical equipment. With the power supplied by the laptop, the system is very suitable for on-site measurements

  16. Nanosecond-laser induced crosstalk of CMOS image sensor

    Science.gov (United States)

    Zhu, Rongzhen; Wang, Yanbin; Chen, Qianrong; Zhou, Xuanfeng; Ren, Guangsen; Cui, Longfei; Li, Hua; Hao, Daoliang

    2018-02-01

    The CMOS Image Sensor (CIS) is photoelectricity image device which focused the photosensitive array, amplifier, A/D transfer, storage, DSP, computer interface circuit on the same silicon substrate[1]. It has low power consumption, high integration,low cost etc. With large scale integrated circuit technology progress, the noise suppression level of CIS is enhanced unceasingly, and its image quality is getting better and better. It has been in the security monitoring, biometrice, detection and imaging and even military reconnaissance and other field is widely used. CIS is easily disturbed and damaged while it is irradiated by laser. It is of great significance to study the effect of laser irradiation on optoelectronic countermeasure and device for the laser strengthening resistance is of great significance. There are some researchers have studied the laser induced disturbed and damaged of CIS. They focused on the saturation, supersaturated effects, and they observed different effects as for unsaturation, saturation, supersaturated, allsaturated and pixel flip etc. This paper research 1064nm laser interference effect in a typical before type CMOS, and observring the saturated crosstalk and half the crosstalk line. This paper extracted from cmos devices working principle and signal detection methods such as the Angle of the formation mechanism of the crosstalk line phenomenon are analyzed.

  17. First result on biased CMOS MAPs-on-diamond devices

    Energy Technology Data Exchange (ETDEWEB)

    Kanxheri, K., E-mail: keida.kanxheri@pg.infn.it [Università degli Studi di Perugia, Perugia (Italy); INFN Perugia, Perugia (Italy); Citroni, M.; Fanetti, S. [LENS Firenze, Florence (Italy); Lagomarsino, S. [Università degli Studi di Firenze, Florence (Italy); INFN Firenze, Pisa (Italy); Morozzi, A. [Università degli Studi di Perugia, Perugia (Italy); INFN Perugia, Perugia (Italy); Parrini, G. [Università degli Studi di Firenze, Florence (Italy); Passeri, D. [Università degli Studi di Perugia, Perugia (Italy); INFN Perugia, Perugia (Italy); Sciortino, S. [Università degli Studi di Firenze, Florence (Italy); INFN Firenze, Pisa (Italy); Servoli, L. [INFN Perugia, Perugia (Italy)

    2015-10-01

    Recently a new type of device, the MAPS-on-diamond, obtained bonding a thinned to 25 μm CMOS Monolithic Active Pixel Sensor to a standard 500 μm pCVD diamond substrate, has been proposed and fabricated, allowing a highly segmented readout (10×10 μm pixel size) of the signal produced in the diamond substrate. The bonding between the two materials has been obtained using a new laser technique to deliver the needed energy at the interface. A biasing scheme has been adopted to polarize the diamond substrate to allow the charge transport inside the diamond without disrupting the functionalities of the CMOS Monolithic Active Pixel Sensor. The main concept of this class of devices is the capability of the charges generated in the diamond by ionizing radiation to cross the silicon–diamond interface and to be collected by the MAPS photodiodes. In this work we demonstrate that such passage occurs and measure its overall efficiency. This study has been carried out first calibrating the CMOS MAPS with monochromatic X-rays, and then testing the device with charged particles (electrons) either with and without biasing the diamond substrate, to compare the amount of signal collected.

  18. Serial forced displacement in American cities, 1916-2010.

    Science.gov (United States)

    Fullilove, Mindy Thompson; Wallace, Rodrick

    2011-06-01

    Serial forced displacement has been defined as the repetitive, coercive upheaval of groups. In this essay, we examine the history of serial forced displacement in American cities due to federal, state, and local government policies. We propose that serial forced displacement sets up a dynamic process that includes an increase in interpersonal and structural violence, an inability to react in a timely fashion to patterns of threat or opportunity, and a cycle of fragmentation as a result of the first two. We present the history of the policies as they affected one urban neighborhood, Pittsburgh's Hill District. We conclude by examining ways in which this problematic process might be addressed.

  19. Serials cataloging at the turn of the century

    CERN Document Server

    Williams, James W

    2014-01-01

    An overview of the research topics and trends that have appeared over the last five years, Serials Cataloging at the Turn of the Century doesn't just tell you that there has been a lot of change--that the information environment is something of a chameleon, always beguiling and slipping out of grasp. Instead, it gives you the plain facts on the specific challenges serials catalogers have been facing and how they're meeting adversity head-on, ready to gain the advantage in the rumble with proliferating information and formats.Comprehensive, resource-packed, and easy-to-digest, Serials Catalogin

  20. The serial message-passing schedule for LDPC decoding algorithms

    Science.gov (United States)

    Liu, Mingshan; Liu, Shanshan; Zhou, Yuan; Jiang, Xue

    2015-12-01

    The conventional message-passing schedule for LDPC decoding algorithms is the so-called flooding schedule. It has the disadvantage that the updated messages cannot be used until next iteration, thus reducing the convergence speed . In this case, the Layered Decoding algorithm (LBP) based on serial message-passing schedule is proposed. In this paper the decoding principle of LBP algorithm is briefly introduced, and then proposed its two improved algorithms, the grouped serial decoding algorithm (Grouped LBP) and the semi-serial decoding algorithm .They can improve LBP algorithm's decoding speed while maintaining a good decoding performance.

  1. Serial CSTR digester configuration for improving biogas production from manure

    DEFF Research Database (Denmark)

    Boe, Kanokwan; Angelidaki, Irini

    2009-01-01

    distribution ratio of 80/20 and 90/10, and total HRT of 15 days. The results showed that the serial CSTR could obtain 11% higher biogas yield compared to the single CSTR. The increased biogas yield in the serial CSTR was mainly from the second reactor, which accounted for 16% and 12% of total biogas yield......A new configuration of manure digesters for improving biogas production has been investigated in laboratory scale. A single thermophilic continuous-flow stirred tank reactor (CSTR) operated with a hydraulic retention time (HRT) of 15 days was compared to a serial CSTR configuration with volume...

  2. Abutment region dosimetry for serial tomotherapy

    International Nuclear Information System (INIS)

    Low, Daniel A.; Mutic, Sasa; Dempsey, James F.; Markman, Jerry; Goddu, S. Murty; Purdy, James A.

    1999-01-01

    Purpose: A commercial intensity modulated radiation therapy system (Corvus, NOMOS Corp.) is presently used in our clinic to generate optimized dose distributions delivered using a proprietary dynamic multileaf collimator (DMLC) (MIMiC) composed of 20 opposed leaf pairs. On our accelerator (Clinac 600C/D, Varian Associates, Inc.) each MIMiC leaf projects to either 1.00 x 0.84 or 1.00 x 1.70 cm 2 (depending on the treatment plan and termed 1 cm or 2 cm mode, respectively). The MIMiC is used to deliver serial (axial) tomotherapy treatment plans, in which the beam is delivered to a nearly cylindrical volume as the DMLC is rotated about the patient. For longer targets, the patient is moved (indexed) between treatments a distance corresponding to the projected leaf width. The treatment relies on precise indexing and a method was developed to measure the precision of indexing devices. A treatment planning study of the dosimetric effects of incorrect patient indexing and concluded that a dose heterogeneity of 10% mm -1 resulted. Because the results may be sensitive to the dose model accuracy, we conducted a measurement-based investigation of the consequences of incorrect indexing using our accelerator. Although the indexing provides an accurate field abutment along the isocenter, due to beam divergence, hot and cold spots will be produced below and above isocenter, respectively, when less than 300 deg. arcs were used. A preliminary study recently determined that for a 290 deg. rotation in 1 cm mode, 15% cold and 7% hot spots were delivered to 7 cm above and below isocenter, respectively. This study completes the earlier work by investigating the dose heterogeneity as a function of position relative to the axis of rotation, arc length, and leaf width. The influence of random daily patient positioning errors is also investigated. Methods and Materials: Treatment plans were generated using 8.0 cm diameter cylindrical target volumes within a homogeneous rectilinear film

  3. Radiation hardness of CMOS monolithic active pixel sensors manufactured in a 0.18 μm CMOS process

    Energy Technology Data Exchange (ETDEWEB)

    Linnik, Benjamin [Goethe-Universitaet Frankfurt (Germany); Collaboration: CBM-MVD-Collaboration

    2015-07-01

    CMOS Monolithic Active Pixels Sensors (MAPS) are considered as the technology of choice for various vertex detectors in particle and heavy-ion physics including the STAR HFT, the upgrade of the ALICE ITS, the future ILC detectors and the CBM experiment at FAIR. To match the requirements of those detectors, their hardness to radiation is being improved, among others in a joined research activity of the Goethe University Frankfurt and the IPHC Strasbourg. It was assumed that combining an improved high resistivity (1-8 kΩcm) sensitive medium with the features of a 0.18 μm CMOS process, is suited to reach substantial improvements in terms of radiation hardness as compared to earlier sensor designs. This strategy was tested with a novel generation of sensor prototypes named MIMOSA-32 and MIMOSA-34. We show results on the radiation hardness of those sensors and discuss its impact on the design of future vertex detectors.

  4. Serial rotatostereography - A new diagnostic method

    International Nuclear Information System (INIS)

    Ottomo, Michinori; Nakanishi, Takeshi.

    1986-01-01

    In the previous study using cine, a cine film stereoprojector showed the adjacent two frames of cine film simultaneously, such as frames 1 and 2, 2 and 3, 3 and 4, and so on, consecutively. Because some intracranial lesions require emergency surgery immediately after angiography, a real time display method of serial rotatostereography was necessary. In order to show the consecutive adjacent two frames of a video disc simultaneously, using the same method as with the cine stereoprojector, a video disc recorder (VDR) (VM-1000M) and two video memories (Image Σ) were required. This VDR has the ability of advancing, stopping, and reversing the display of memories. A control unit was manufactured in order to display these memories advancing and reversing continuously. As a result of this continuous semirotation stereo display, the anteroposterior projection was reversed, showing the posteroanterior view during ''reversing mode''. Thus a lead relay circuit was manufactured to prevent this phenomenon. Recording was done using a memory disc recorder (FOM 2200F), which has the ability of recording 10,000 frames per disc. Each frame can also be recorded on imaging film using O · X Multi Camera 400X. Finally, stereoscopic views of cerebral circulation, using a single injection of contrast media and rapid rotation of the gantry, were obtained using two cathode-ray tubes (CRTs) and a stereoviewer (Continuous Semi-rotation Classical Stereo Display Method). Stereoscopic views were also obtained using a single CRT, which displayed the images in a semirotating fashion similar to a oscillating fan head (Continuous Semi-rotation New Stereo Display Method). (J.P.N.)

  5. Serial-omics characterization of equine urine.

    Directory of Open Access Journals (Sweden)

    Min Yuan

    Full Text Available Horse urine is easily collected and contains molecules readily measurable using mass spectrometry that can be used as biomarkers representative of health, disease or drug tampering. This study aimed at analyzing microliter levels of horse urine to purify, identify and quantify proteins, polar metabolites and non-polar lipids. Urine from a healthy 12 year old quarter horse mare on a diet of grass hay and vitamin/mineral supplements with limited pasture access was collected for serial-omics characterization. The urine was treated with methyl tert-butyl ether (MTBE and methanol to partition into three distinct layers for protein, non-polar lipid and polar metabolite content from a single liquid-liquid extraction and was repeated two times. Each layer was analyzed by high performance liquid chromatography-high resolution tandem mass spectrometry (LC-MS/MS to obtain protein sequence and relative protein levels as well as identify and quantify small polar metabolites and lipids. The results show 46 urine proteins, many related to normal kidney function, structural and circulatory proteins as well as 474 small polar metabolites but only 10 lipid molecules. Metabolites were mostly related to urea cycle and ammonia recycling as well as amino acid related pathways, plant diet specific molecules, etc. The few lipids represented triglycerides and phospholipids. These data show a complete mass spectrometry based-omics characterization of equine urine from a single 333 μL mid-stream urine aliquot. These omics data help serve as a baseline for healthy mare urine composition and the analyses can be used to monitor disease progression, health status, monitor drug use, etc.

  6. Opportunity recognition: delineating the process and motivators for serial entrepreneurs

    Directory of Open Access Journals (Sweden)

    Boris Urban

    2011-04-01

    Full Text Available Opportunity recognition is a fundamental research issue in entrepreneurship which this paper empirically investigates for serial entrepreneurs. Initially key definitions and boundary conditions of opportunity recognition are explored to elucidate the relevant motivators driving serial entrepreneurs. After operationalising the various concepts, data is collected by surveying serial entrepreneurs (n= 77 based on pre-determined selection criteria. Since the study’s objective is to build solid theory on these new phenomena, descriptive analysis on the empirical results is provided. To test the hypotheses inferential statistics employing parametric and non-parametric tests are used. The findings reveal that the opportunity recognition behaviours are manifest among serial entrepreneurs, with few significant differences on how many new, major businesses have been pursued, or whether they can be said to be successes.

  7. Attractive Serial Dependence in the Absence of an Explicit Task.

    Science.gov (United States)

    Fornaciai, Michele; Park, Joonkoo

    2018-03-01

    Attractive serial dependence refers to an adaptive change in the representation of sensory information, whereby a current stimulus appears to be similar to a previous one. The nature of this phenomenon is controversial, however, as serial dependence could arise from biased perceptual representations or from biased traces of working memory representation at a decisional stage. Here, we demonstrated a neural signature of serial dependence in numerosity perception emerging early in the visual processing stream even in the absence of an explicit task. Furthermore, a psychophysical experiment revealed that numerosity perception is biased by a previously presented stimulus in an attractive way, not by repulsive adaptation. These results suggest that serial dependence is a perceptual phenomenon starting from early levels of visual processing and occurring independently from a decision process, which is consistent with the view that these biases smooth out noise from neural signals to establish perceptual continuity.

  8. Fast Grasp Contact Computation for a Serial Robot

    Science.gov (United States)

    Shi, Jianying (Inventor); Hargrave, Brian (Inventor); Diftler, Myron A. (Inventor)

    2015-01-01

    A system includes a controller and a serial robot having links that are interconnected by a joint, wherein the robot can grasp a three-dimensional (3D) object in response to a commanded grasp pose. The controller receives input information, including the commanded grasp pose, a first set of information describing the kinematics of the robot, and a second set of information describing the position of the object to be grasped. The controller also calculates, in a two-dimensional (2D) plane, a set of contact points between the serial robot and a surface of the 3D object needed for the serial robot to achieve the commanded grasp pose. A required joint angle is then calculated in the 2D plane between the pair of links using the set of contact points. A control action is then executed with respect to the motion of the serial robot using the required joint angle.

  9. BRAIN Journal - Some Considerations on Seriality and Synchronicity

    OpenAIRE

    Elena Nechita

    2017-01-01

    ABSTRACT This paper presents an overview of the results that have been obtained lately on seriality and synchronicity and their link, in the light of the new theories and within the frame of complexity science.

  10. Serials Management In Polytechnic Libraries in Nigeria: A ...

    African Journals Online (AJOL)

    Serials Management In Polytechnic Libraries in Nigeria: A Comparative Study of Kaduna Polytechnic And Yaba College of Technology Libraries. ... Samaru Journal of Information Studies. Journal Home · ABOUT THIS JOURNAL · Advanced ...

  11. Energy information data base. Serial titles, February 1978--June 1979

    International Nuclear Information System (INIS)

    1979-06-01

    This supplement contains changes and additions to TID-4579-R10 (the authority list for serial titles used by TIC), and is intended to be used with that publication. Supplements are cumulative until another revision is issued

  12. Fault tolerance based on serial communication of FPGA

    International Nuclear Information System (INIS)

    Peng Jing; Fang Zongliang; Xu Quanzhou; Hu Jiewei; Ma Guizhen

    2012-01-01

    There maybe appear mistake in serial communication. This paper was described the intellectual detector of γ dose ratemeter communication with FPGA. The software of FPGA designed the code about fault tolerance, prevented mistake effectively. (authors)

  13. Using Behavior Sequence Analysis to Map Serial Killers' Life Histories.

    Science.gov (United States)

    Keatley, David A; Golightly, Hayley; Shephard, Rebecca; Yaksic, Enzo; Reid, Sasha

    2018-03-01

    The aim of the current research was to provide a novel method for mapping the developmental sequences of serial killers' life histories. An in-depth biographical account of serial killers' lives, from birth through to conviction, was gained and analyzed using Behavior Sequence Analysis. The analyses highlight similarities in behavioral events across the serial killers' lives, indicating not only which risk factors occur, but the temporal order of these factors. Results focused on early childhood environment, indicating the role of parental abuse; behaviors and events surrounding criminal histories of serial killers, showing that many had previous convictions and were known to police for other crimes; behaviors surrounding their murders, highlighting differences in victim choice and modus operandi; and, finally, trial pleas and convictions. The present research, therefore, provides a novel approach to synthesizing large volumes of data on criminals and presenting results in accessible, understandable outcomes.

  14. Optimization of CMOS active pixels for high resolution digital radiography

    International Nuclear Information System (INIS)

    Kim, Young Soo

    2007-02-01

    CMOS image sensors have poorer performance compared to conventional charge coupled devices (CCDs). Since CMOS Active Pixel Sensors (APSs) in general have higher temporal noise, higher dark current, smaller full well charge capacitance, and lower spectral response, they cannot provide the same wide dynamic range and superior signal-to-noise ratio as CCDs. In view of electronic noise, the main source for the CMOS APS is the pixel, along with other signal processing blocks such as row and column decoder, analog signal processor (ASP), analog-to-digital converter (ADC), and timing and control logic circuitry. Therefore, it is important and necessary to characterize noise of the active pixels in CMOS APSs. We developed our theoretical noise model to account for the temporal noise in active pixels, and then found out the optimum design parameters such as fill actor, each size of the three transistors (source follower, row selection transistor, bias transistor) comprising active pixels, bias current, and load capacitance that can have the maximum signal-to-noise ratio. To develop the theoretical noise model in active pixels, we considered the integration noise of the photodiode and the readout noise of the transistors related to readout. During integration, the shot noise due to the dark current and photocurrent, during readout, the thermal and flicker noise were considered. The developed model can take the input variables such as photocurrent, capacitance of the photodiode, integration time, transconductance of the transistors, channel resistance of the transistors, gate-to-source capacitance of the follower, and load capacitance etc. To validate our noise model, two types of test structures have been realized. Firstly, four types of photodiodes (n_d_i_f_f_u_s_i_o_n/p_s_u_b_s_t_r_a_t_e, n_w_e_l_l/p_s_u_b_s_t_r_a_t_e, n_d_i_f_f_u_s_i_o_n/p_e_p_i_t_a_x_i_a_l/p_s_u_b_s_t_r_a_t_e, n_w_e_l_l/p_e_p_i_t_a_x_i_a_l/p_s_u_b_s_t_r_a_t_e) used in CMOS active pixels were fabricated

  15. CMOS compatible thin-film ALD tungsten nanoelectromechanical devices

    Science.gov (United States)

    Davidson, Bradley Darren

    This research focuses on the development of a novel, low-temperature, CMOS compatible, atomic-layer-deposition (ALD) enabled NEMS fabrication process for the development of ALD Tungsten (WALD) NEMS devices. The devices are intended for use in CMOS/NEMS hybrid systems, and NEMS based micro-processors/controllers capable of reliable operation in harsh environments not accessible to standard CMOS technologies. The majority of NEMS switches/devices to date have been based on carbon-nano-tube (CNT) designs. The devices consume little power during actuation, and as expected, have demonstrated actuation voltages much smaller than MEMS switches. Unfortunately, NEMS CNT switches are not typically CMOS integrable due to the high temperatures required for their growth, and their fabrication typically results in extremely low and unpredictable yields. Thin-film NEMS devices offer great advantages over reported CNT devices for several reasons, including: higher fabrication yields, low-temperature (CMOS compatible) deposition techniques like ALD, and increased control over design parameters/device performance metrics, i.e., device geometry. Furthermore, top-down, thin-film, nano-fabrication techniques are better capable of producing complicated device geometries than CNT based processes, enabling the design and development of multi-terminal switches well-suited for low-power hybrid NEMS/CMOS systems as well as electromechanical transistors and logic devices for use in temperature/radiation hard computing architectures. In this work several novel, low-temperature, CMOS compatible fabrication technologies, employing WALD as a structural layer for MEMS or NEMS devices, were developed. The technologies developed are top-down nano-scale fabrication processes based on traditional micro-machining techniques commonly used in the fabrication of MEMS devices. Using these processes a variety of novel WALD NEMS devices have been successfully fabricated and characterized. Using two different

  16. How Do We Write about Performance in Serial Television?

    OpenAIRE

    Elliott Logan

    2015-01-01

    Television studies has produced few sustained analyses of performance in serial television. Yet film studies scholarship has shown how attending to the integration of performances with other aspects of film style is crucial to the interpretation and appreciation of expression and meaning in filmed narrative fictions. However, as a particle form of filmed serial narrative, series television raises a number of questions about performance that will not necessarily be satisfyingly addressed by th...

  17. Three more semantic serial position functions and a SIMPLE explanation.

    Science.gov (United States)

    Kelley, Matthew R; Neath, Ian; Surprenant, Aimée M

    2013-05-01

    There are innumerable demonstrations of serial position functions-with characteristic primacy and recency effects-in episodic tasks, but there are only a handful of such demonstrations in semantic memory tasks, and those demonstrations have used only two types of stimuli. Here, we provide three more examples of serial position functions when recalling from semantic memory. Participants were asked to reconstruct the order of (1) two cartoon theme song lyrics, (2) the seven Harry Potter books, and (3) two sets of movies, and all three demonstrations yielded conventional-looking serial position functions with primacy and recency effects. The data were well-fit by SIMPLE, a local distinctiveness model of memory that was originally designed to account for serial position effects in short- and long-term episodic memory. According to SIMPLE, serial position functions in both episodic and semantic memory tasks arise from the same type of processing: Items that are more separated from their close neighbors in psychological space at the time of recall will be better remembered. We argue that currently available evidence suggests that serial position functions observed when recalling items that are presumably in semantic memory arise because of the same processes as those observed when recalling items that are presumably in episodic memory.

  18. How Do We Write about Performance in Serial Television?

    Directory of Open Access Journals (Sweden)

    Elliott Logan

    2015-05-01

    Full Text Available Television studies has produced few sustained analyses of performance in serial television. Yet film studies scholarship has shown how attending to the integration of performances with other aspects of film style is crucial to the interpretation and appreciation of expression and meaning in filmed narrative fictions. However, as a particle form of filmed serial narrative, series television raises a number of questions about performance that will not necessarily be satisfyingly addressed by the direct adoption and application of approaches to writing about performance that have been honed in regard to film. How, then, do we write about performance in television serials in ways that recognise and accommodate the form’s relationship to film, while at the same time appropriately acknowledging and responding to long-form television’s serial status? To examine the difficulties and opportunities of approaching performance in serial television this way, the article conducts close readings of various pieces of television studies writing on performance, by scholars such as Jason Mittell, Sue Turnbull, George Toles, and Steven Peacock. Their work brings into view film and television’s points of common relation, and the distinctive challenges, achievements, and rewards of appreciating the best television serials, and the performances in them.

  19. Generation of continuously tunable, 5-12 {mu}m radiation by difference frequency mixing of output waves of a KTP optical parametric oscillator in a ZnGeP{sub 2} crystal

    Energy Technology Data Exchange (ETDEWEB)

    Haidar, S [Research Institute of Electrical Communication (RIEC), Tohoku University, 2-1-1 Katahira, Aoba-ku, Sendai-shi 980-8577 (Japan); Miyamoto, K [Research Institute of Electrical Communication (RIEC), Tohoku University, 2-1-1 Katahira, Aoba-ku, Sendai-shi 980-8577 (Japan); Ito, H [Research Institute of Electrical Communication (RIEC), Tohoku University, 2-1-1 Katahira, Aoba-ku, Sendai-shi 980-8577 (Japan)

    2004-12-07

    Signal and idlers waves obtained from a Nd : YAG laser pumped KTP optical parametric oscillator (OPO) are difference frequency mixed in a ZnGeP{sub 2} (ZGP) crystal to generate radiation in the mid-infrared. The KTP OPO is operated in the type-II phase matching mode, and the extraordinary and ordinary waves are tunable from 1.76 {mu}m to 2.36 {mu}m and from 2.61 {mu}m to 1.90 {mu}m, respectively. The orthogonally polarized waves are difference frequency mixed in a ZGP crystal to generate mid-IR radiation tunable from 5 to 12 {mu}m.

  20. “It’s Always the Same, and It’s Always Different” Mythologisation and the Serial Killer in Henry: Portrait of a Serial Killer.

    OpenAIRE

    Smyth, David A.

    2015-01-01

    Serial killers are important in American horror because of their ability to exist between ‘myth’ and ‘reality’. The serial killer is one of the most important American myths, but it is one firmly rooted in real life: unlike Paul Bunyan or Superman, serial killers do exist. This essay examines the relationship between the ‘myth’ and the ‘reality’ of serial killers, and the complex relationship between the American public and the serial killer, using Henry: Portrait of a Serial K...

  1. A Tactile Sensor Network System Using a Multiple Sensor Platform with a Dedicated CMOS-LSI for Robot Applications.

    Science.gov (United States)

    Shao, Chenzhong; Tanaka, Shuji; Nakayama, Takahiro; Hata, Yoshiyuki; Bartley, Travis; Nonomura, Yutaka; Muroyama, Masanori

    2017-08-28

    Robot tactile sensation can enhance human-robot communication in terms of safety, reliability and accuracy. The final goal of our project is to widely cover a robot body with a large number of tactile sensors, which has significant advantages such as accurate object recognition, high sensitivity and high redundancy. In this study, we developed a multi-sensor system with dedicated Complementary Metal-Oxide-Semiconductor (CMOS) Large-Scale Integration (LSI) circuit chips (referred to as "sensor platform LSI") as a framework of a serial bus-based tactile sensor network system. The sensor platform LSI supports three types of sensors: an on-chip temperature sensor, off-chip capacitive and resistive tactile sensors, and communicates with a relay node via a bus line. The multi-sensor system was first constructed on a printed circuit board to evaluate basic functions of the sensor platform LSI, such as capacitance-to-digital and resistance-to-digital conversion. Then, two kinds of external sensors, nine sensors in total, were connected to two sensor platform LSIs, and temperature, capacitive and resistive sensing data were acquired simultaneously. Moreover, we fabricated flexible printed circuit cables to demonstrate the multi-sensor system with 15 sensor platform LSIs operating simultaneously, which showed a more realistic implementation in robots. In conclusion, the multi-sensor system with up to 15 sensor platform LSIs on a bus line supporting temperature, capacitive and resistive sensing was successfully demonstrated.

  2. A 10 MS/s 8-bit charge-redistribution ADC for hybrid pixel applications in 65 m CMOS

    International Nuclear Information System (INIS)

    Kishishita, Tetsuichi; Hemperek, Tomasz; Krüger, Hans; Koch, Manuel; Germic, Leonard; Wermes, Norbert

    2013-01-01

    The design and measurement results of an 8-bit SAR ADC, based on a charge-redistribution DAC, are presented. This ADC is characterized by superior power efficiency and small area, realized by employing a lateral metal–metal capacitor array and a dynamic two-stage comparator. To avoid the need for a high-speed clock and its associated power consumption, an asynchronous logic was implemented in a logic control cell. A test chip has been developed in a 65 nm CMOS technology, including eight ADC channels with different layout flavors of the capacitor array, a transimpedance amplifier as a signal input structure, a serializer, and a custom-made LVDS driver for data transmission. The integral (INL) and differential (DNL) nonlinearities are measured below 0.5 LSB and 0.8 LSB, respectively, for the best channel operating at a sampling frequency of 10 MS/s. The area occupies 40μm×70μm for one ADC channel. The power consumption is estimated as 4μW at 1 MS/s and 38μW at 10 MS/s with a supply rail of 1.2 V. These excellent performance features and the natural radiation hardness of the design, due to the thin gate oxide thickness of transistors, are very interesting for front-end electronics ICs of future hybrid-pixel detector systems

  3. A 10 MS/s 8-bit charge-redistribution ADC for hybrid pixel applications in 65 m CMOS

    Energy Technology Data Exchange (ETDEWEB)

    Kishishita, Tetsuichi, E-mail: kisisita@physik.uni-bonn.de; Hemperek, Tomasz; Krüger, Hans; Koch, Manuel; Germic, Leonard; Wermes, Norbert

    2013-12-21

    The design and measurement results of an 8-bit SAR ADC, based on a charge-redistribution DAC, are presented. This ADC is characterized by superior power efficiency and small area, realized by employing a lateral metal–metal capacitor array and a dynamic two-stage comparator. To avoid the need for a high-speed clock and its associated power consumption, an asynchronous logic was implemented in a logic control cell. A test chip has been developed in a 65 nm CMOS technology, including eight ADC channels with different layout flavors of the capacitor array, a transimpedance amplifier as a signal input structure, a serializer, and a custom-made LVDS driver for data transmission. The integral (INL) and differential (DNL) nonlinearities are measured below 0.5 LSB and 0.8 LSB, respectively, for the best channel operating at a sampling frequency of 10 MS/s. The area occupies 40μm×70μm for one ADC channel. The power consumption is estimated as 4μW at 1 MS/s and 38μW at 10 MS/s with a supply rail of 1.2 V. These excellent performance features and the natural radiation hardness of the design, due to the thin gate oxide thickness of transistors, are very interesting for front-end electronics ICs of future hybrid-pixel detector systems.

  4. A 10MS/s 8-bit charge-redistribution ADC for hybrid pixel applications in 65m CMOS

    CERN Document Server

    Kishishita, T; Krüger, H; Koch, M; Germic, L; Wermes, N

    2013-01-01

    The design and measurement results of an 8-bit SAR ADC, based on a charge-redistribution DAC, are presented. This ADC is characterized by superior power efficiency and small area, realized by employing a lateral metal–metal capacitor array and a dynamic two-stage comparator. To avoid the need for a highspeed clock and its associated power consumption, an asynchronous logic was implemented in a logic control cell. A test chip has been developed in a 65 nm CMOS technology, including eight ADC channels with different layout flavors of the capacitor array, a transimpedance amplifier as a signal input structure, a serializer, and a custom-made LVDS driver for data transmission. The integral (INL) and differential (DNL) nonlinearities are measured below 0.5 LSB and 0.8 LSB, respectively, for the best channel operating at a sampling frequency of 10 MS/s. The area occupies 40 μm 70 μm for one ADC channel. The power consumption is estimated as 4 μW at 1 MS/s and 38 μW at 10 MS/s with a supply rail of 1.2 V. Th...

  5. A Tactile Sensor Network System Using a Multiple Sensor Platform with a Dedicated CMOS-LSI for Robot Applications †

    Science.gov (United States)

    Shao, Chenzhong; Tanaka, Shuji; Nakayama, Takahiro; Hata, Yoshiyuki; Bartley, Travis; Muroyama, Masanori

    2017-01-01

    Robot tactile sensation can enhance human–robot communication in terms of safety, reliability and accuracy. The final goal of our project is to widely cover a robot body with a large number of tactile sensors, which has significant advantages such as accurate object recognition, high sensitivity and high redundancy. In this study, we developed a multi-sensor system with dedicated Complementary Metal-Oxide-Semiconductor (CMOS) Large-Scale Integration (LSI) circuit chips (referred to as “sensor platform LSI”) as a framework of a serial bus-based tactile sensor network system. The sensor platform LSI supports three types of sensors: an on-chip temperature sensor, off-chip capacitive and resistive tactile sensors, and communicates with a relay node via a bus line. The multi-sensor system was first constructed on a printed circuit board to evaluate basic functions of the sensor platform LSI, such as capacitance-to-digital and resistance-to-digital conversion. Then, two kinds of external sensors, nine sensors in total, were connected to two sensor platform LSIs, and temperature, capacitive and resistive sensing data were acquired simultaneously. Moreover, we fabricated flexible printed circuit cables to demonstrate the multi-sensor system with 15 sensor platform LSIs operating simultaneously, which showed a more realistic implementation in robots. In conclusion, the multi-sensor system with up to 15 sensor platform LSIs on a bus line supporting temperature, capacitive and resistive sensing was successfully demonstrated. PMID:29061954

  6. Radiation imaging detectors made by wafer post-processing of CMOS chips

    NARCIS (Netherlands)

    Blanco Carballo, V.M.

    2009-01-01

    In this thesis several wafer post-processing steps have been applied to CMOS chips. Amplification gas strucutures are built on top of the microchips. A complete radiation imaging detector is obtained this way. Integrated Micromegas-like and GEM-like structures were fabricated on top of Timepix CMOS

  7. Above-CMOS a-Si and CIGS Solar Cells for Powering Autonomous Microsystems

    NARCIS (Netherlands)

    Lu, J.; Liu, W.; van der Werf, C.H.M.; Kovalgin, A.Y.; Sun, Y.; Schropp, R.E.I.; Schmitz, J.

    2010-01-01

    Two types of solar cells are successfully grown on chips from two CMOS generations. The efficiency of amorphous-silicon (a-Si) solar cells reaches 5.2%, copperindium-gallium-selenide (CIGS) cells 7.1%. CMOS functionality is unaffected. The main integration issues: adhesion, surface topography, metal

  8. Materials Characterization of CIGS solar cells on Top of CMOS chips

    NARCIS (Netherlands)

    Lu, J.; Liu, W.; Kovalgin, A.Y.; Sun, Y.; Schmitz, J.; Venkatasubramanian, R.; Radousky, H.; Liang, H.

    2011-01-01

    In the current work, we present a detailed study on the material properties of the CIGS layers, fabricated on top of the CMOS chips, and compare the results with the fabrication on standard glass substrates. Almost identical elemental composition on both glass and CMOS chips (within measurement

  9. Design rules for RCA self-aligned silicon-gate CMOS/SOS process

    Science.gov (United States)

    1977-01-01

    The CMOS/SOS design rules prepared by the RCA Solid State Technology Center (SSTC) are described. These rules specify the spacing and width requirements for each of the six design levels, the seventh level being used to define openings in the passivation level. An associated report, entitled Silicon-Gate CMOS/SOS Processing, provides further insight into the usage of these rules.

  10. Power Amplifiers in CMOS Technology: A contribution to power amplifier theory and techniques

    NARCIS (Netherlands)

    Acar, M.

    2011-01-01

    In order to meet the demands from the market on cheaper, miniaturized mobile communications devices realization of RF power amplifiers in the mainstream CMOS technology is essential. In general, CMOS Power Amplifiers (PAs) require high voltage to decrease the matching network losses and for high

  11. An Analytical Model for Spectral Peak Frequency Prediction of Substrate Noise in CMOS Substrates

    DEFF Research Database (Denmark)

    Shen, Ming; Mikkelsen, Jan H.

    2013-01-01

    This paper proposes an analytical model describing the generation of switching current noise in CMOS substrates. The model eliminates the need for SPICE simulations in existing methods by conducting a transient analysis on a generic CMOS inverter and approximating the switching current waveform us...

  12. A CMOS transconductance-C filter technique for very high frequencies

    NARCIS (Netherlands)

    Nauta, Bram

    1992-01-01

    CMOS circuits for integrated analog filters at very high frequencies, based on transconductance-C integrators, are presented. First a differential transconductance element based on CMOS inverters is described. With this circuit a linear, tunable integrator for very-high-frequency integrated filters

  13. Determining the thermal expansion coefficient of thin films for a CMOS MEMS process using test cantilevers

    International Nuclear Information System (INIS)

    Cheng, Chao-Lin; Fang, Weileun; Tsai, Ming-Han

    2015-01-01

    Many standard CMOS processes, provided by existing foundries, are available. These standard CMOS processes, with stacking of various metal and dielectric layers, have been extensively applied in integrated circuits as well as micro-electromechanical systems (MEMS). It is of importance to determine the material properties of the metal and dielectric films to predict the performance and reliability of micro devices. This study employs an existing approach to determine the coefficients of thermal expansion (CTEs) of metal and dielectric films for standard CMOS processes. Test cantilevers with different stacking of metal and dielectric layers for standard CMOS processes have been designed and implemented. The CTEs of standard CMOS films can be determined from measurements of the out-of-plane thermal deformations of the test cantilevers. To demonstrate the feasibility of the present approach, thin films prepared by the Taiwan Semiconductor Manufacture Company 0.35 μm 2P4M CMOS process are characterized. Eight test cantilevers with different stacking of CMOS layers and an auxiliary Si cantilever on a SOI wafer are fabricated. The equivalent elastic moduli and CTEs of the CMOS thin films including the metal and dielectric layers are determined, respectively, from the resonant frequency and static thermal deformation of the test cantilevers. Moreover, thermal deformations of cantilevers with stacked layers different to those of the test beams have been employed to verify the measured CTEs and elastic moduli. (paper)

  14. Integration of Solar Cells on Top of CMOS Chips Part I: a-Si Solar Cells

    NARCIS (Netherlands)

    Lu, J.; Kovalgin, Alexeij Y.; van der Werf, Karine H.M.; Schropp, Ruud E.I.; Schmitz, Jurriaan

    2011-01-01

    We present the monolithic integration of deepsubmicrometer complementary metal–oxide–semiconductor (CMOS) microchips with a-Si:H solar cells. Solar cells are manufactured directly on the CMOS chips. The microchips maintain comparable electronic performance, and the solar cells show efficiency values

  15. Evaluation of the upset risk in CMOS SRAM through full three dimensional simulation

    International Nuclear Information System (INIS)

    Moreau, Y.; Gasiot, J.; Duzellier, S.

    1995-01-01

    Upsets caused by incident heavy ion on CMOS static RAM are studied here. Three dimensional device simulations, based on a description of a full epitaxial CMOS inverter, and experimental results are reported for evaluation of single and multiple bit error risk. The particular influences of hit location and incidence angle are examined

  16. 77 FR 74513 - Certain CMOS Image Sensors and Products Containing Same; Investigations: Terminations...

    Science.gov (United States)

    2012-12-14

    ... INTERNATIONAL TRADE COMMISSION [Investigation No. 337-TA-846] Certain CMOS Image Sensors and Products Containing Same; Investigations: Terminations, Modifications and Rulings AGENCY: U.S... United States after importation of certain CMOS image sensors and products containing the same based on...

  17. Out-of-Plane Strain Effects on Physically Flexible FinFET CMOS

    KAUST Repository

    Ghoneim, Mohamed T.; Alfaraj, Nasir; Torres-Sevilla, Galo A.; Fahad, Hossain M.; Hussain, Muhammad Mustafa

    2016-01-01

    . The devices were fabricated using the state-of-the-art CMOS technology and then transformed into flexible form by using a CMOS-compatible maskless deep reactive-ion etching technique. Mechanical out-of-plane stresses (compressive and tensile) were applied

  18. Pr{sup 3+}-doped GeS{sub {ital x}}-based glasses for fiber amplifiers at 1.3 {mu}m

    Energy Technology Data Exchange (ETDEWEB)

    Simons, D.R.; Faber, A.J.; de Waal, H. [Glass Technology, Eindhoven University of Technology, P.O. Box 595, 5600 AN Eindhoven (Netherlands)

    1995-03-01

    The photoluminescence properties of Pr{sup 3+}-doped GeS{sub {ital x}}-based glasses are studied and compared with those of other sulfide and fluoride glasses. The possibility of highly pump-power-efficient fiber amplifiers based on these GeS{sub {ital x}}-containing glasses in the telecommunications window at 1.3 {mu}m is discussed.

  19. Room-temperature broadband InAsSb flip-chip photodiodes with {lambda}{sub cutoff} = 4.5 {mu}m

    Energy Technology Data Exchange (ETDEWEB)

    Zakhgeim, A L [Russian Academy of Sciences, Scientific-Technological Center for Microelectronics and Submicron Heterostructures at Ioffe Physicotechnical Institute (Russian Federation); Zotova, N V; Il' inskaya, N D; Karandashev, S A; Matveev, B. A., E-mail: bmat@iropt3.ioffe.rssi.ru; Remennyi, M A; Stus' , N M [Russian Academy of Sciences, Ioffe Physicotechnical Institute (Russian Federation); Chernyakov, A E [Russian Academy of Sciences, Scientific-Technological Center for Microelectronics and Submicron Heterostructures at Ioffe Physicotechnical Institute (Russian Federation)

    2009-03-15

    Equilibrium and nonequilibrium IR images of p-InAsSbP/n-InAsSb/n{sup +}-InAs photodiodes including the images obtained in the electroluminescence and negative luminescence modes have been analyzed. The contact reflectivity has been evaluated. The influence of the substrate's doping level and mesa depth on the quantum efficiency and sensitivity of a backside illuminated photodiode sensitive in the 2.7-4.5 {mu}m range is discussed.

  20. Fully depleted CMOS pixel sensor development and potential applications

    Energy Technology Data Exchange (ETDEWEB)

    Baudot, J.; Kachel, M. [Universite de Strasbourg, IPHC, 23 rue du Loess 67037 Strasbourg (France); CNRS, UMR7178, 67037 Strasbourg (France)

    2015-07-01

    CMOS pixel sensors are often opposed to hybrid pixel sensors due to their very different sensitive layer. In standard CMOS imaging processes, a thin (about 20 μm) low resistivity epitaxial layer acts as the sensitive volume and charge collection is mostly driven by thermal agitation. In contrast, the so-called hybrid pixel technology exploits a thick (typically 300 μm) silicon sensor with high resistivity allowing for the depletion of this volume, hence charges drift toward collecting electrodes. But this difference is fading away with the recent availability of some CMOS imaging processes based on a relatively thick (about 50 μm) high resistivity epitaxial layer which allows for full depletion. This evolution extents the range of applications for CMOS pixel sensors where their known assets, high sensitivity and granularity combined with embedded signal treatment, could potentially foster breakthrough in detection performances for specific scientific instruments. One such domain is the Xray detection for soft energies, typically below 10 keV, where the thin sensitive layer was previously severely impeding CMOS sensor usage. Another application becoming realistic for CMOS sensors, is the detection in environment with a high fluence of non-ionizing radiation, such as hadron colliders. However, when considering highly demanding applications, it is still to be proven that micro-circuits required to uniformly deplete the sensor at the pixel level, do not mitigate the sensitivity and efficiency required. Prototype sensors in two different technologies with resistivity higher than 1 kΩ, sensitive layer between 40 and 50 μm and featuring pixel pitch in the range 25 to 50 μm, have been designed and fabricated. Various biasing architectures were adopted to reach full depletion with only a few volts. Laboratory investigations with three types of sources (X-rays, β-rays and infrared light) demonstrated the validity of the approach with respect to depletion, keeping a