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Sample records for medipix2 cmos pixel

  1. Electron imaging with Medipix2 hybrid pixel detector

    CERN Document Server

    McMullan, G; Chen, S; Henderson, R; Llopart, X; Summerfield, C; Tlustos, L; Faruqi, A R

    2007-01-01

    The electron imaging performance of Medipix2 is described. Medipix2 is a hybrid pixel detector composed of two layers. It has a sensor layer and a layer of readout electronics, in which each 55 μm×55 μm pixel has upper and lower energy discrimination and MHz rate counting. The sensor layer consists of a 300 μm slab of pixellated monolithic silicon and this is bonded to the readout chip. Experimental measurement of the detective quantum efficiency, DQE(0) at 120 keV shows that it can reach 85% independent of electron exposure, since the detector has zero noise, and the DQE(Nyquist) can reach 35% of that expected for a perfect detector (4/π2). Experimental measurement of the modulation transfer function (MTF) at Nyquist resolution for 120 keV electrons using a 60 keV lower energy threshold, yields a value that is 50% of that expected for a perfect detector (2/π). Finally, Monte Carlo simulations of electron tracks and energy deposited in adjacent pixels have been performed and used to calculate expected v...

  2. Electron imaging with Medipix2 hybrid pixel detector

    International Nuclear Information System (INIS)

    McMullan, G.; Cattermole, D.M.; Chen, S.; Henderson, R.; Llopart, X.; Summerfield, C.; Tlustos, L.; Faruqi, A.R.

    2007-01-01

    The electron imaging performance of Medipix2 is described. Medipix2 is a hybrid pixel detector composed of two layers. It has a sensor layer and a layer of readout electronics, in which each 55 μmx55 μm pixel has upper and lower energy discrimination and MHz rate counting. The sensor layer consists of a 300 μm slab of pixellated monolithic silicon and this is bonded to the readout chip. Experimental measurement of the detective quantum efficiency, DQE(0) at 120 keV shows that it can reach ∼85% independent of electron exposure, since the detector has zero noise, and the DQE(Nyquist) can reach ∼35% of that expected for a perfect detector (4/π 2 ). Experimental measurement of the modulation transfer function (MTF) at Nyquist resolution for 120 keV electrons using a 60 keV lower energy threshold, yields a value that is 50% of that expected for a perfect detector (2/π). Finally, Monte Carlo simulations of electron tracks and energy deposited in adjacent pixels have been performed and used to calculate expected values for the MTF and DQE as a function of the threshold energy. The good agreement between theory and experiment allows suggestions for further improvements to be made with confidence. The present detector is already very useful for experiments that require a high DQE at very low doses

  3. Electron imaging with Medipix2 hybrid pixel detector.

    Science.gov (United States)

    McMullan, G; Cattermole, D M; Chen, S; Henderson, R; Llopart, X; Summerfield, C; Tlustos, L; Faruqi, A R

    2007-01-01

    The electron imaging performance of Medipix2 is described. Medipix2 is a hybrid pixel detector composed of two layers. It has a sensor layer and a layer of readout electronics, in which each 55 microm x 55 microm pixel has upper and lower energy discrimination and MHz rate counting. The sensor layer consists of a 300 microm slab of pixellated monolithic silicon and this is bonded to the readout chip. Experimental measurement of the detective quantum efficiency, DQE(0) at 120 keV shows that it can reach approximately 85% independent of electron exposure, since the detector has zero noise, and the DQE(Nyquist) can reach approximately 35% of that expected for a perfect detector (4/pi(2)). Experimental measurement of the modulation transfer function (MTF) at Nyquist resolution for 120 keV electrons using a 60 keV lower energy threshold, yields a value that is 50% of that expected for a perfect detector (2/pi). Finally, Monte Carlo simulations of electron tracks and energy deposited in adjacent pixels have been performed and used to calculate expected values for the MTF and DQE as a function of the threshold energy. The good agreement between theory and experiment allows suggestions for further improvements to be made with confidence. The present detector is already very useful for experiments that require a high DQE at very low doses.

  4. A Medipix2-based imaging system for digital mammography with silicon pixel detectors

    CERN Document Server

    Bisogni, M G; Fantacci, M E; Mettivier, G; Montesi, M C; Novelli, M; Quattrocchi, M; Rosso, V; Russo, P; Stefanini, A

    2004-01-01

    In this paper we present the first tests of a digital imaging system based on a silicon pixel detector bump-bonded to an integrated circuit operating in single photon counting mode. The X-rays sensor is a 300 mu m thick silicon, 14 by 14 mm/sup 2/, upon which a matrix of 256 * 256 pixels has been built. The read-out chip, named MEDIPIX2, has been developed at CERN within the MEDIPIX2 Collaboration and it is composed by a matrix of 256 * 256 cells, 55 * 55 mu m/sup 2/. The spatial resolution properties of the system have been assessed by measuring the square wave resolution function (SWRF) and first images of a standard mammographic phantom were acquired using a radiographic tube in the clinical irradiation condition. (5 refs).

  5. Spatial resolution of Medipix-2 device as neutron pixel detector

    Czech Academy of Sciences Publication Activity Database

    Jakůbek, J.; Holý, T.; Lehmann, E.; Pospíšil, S.; Uher, J.; Vacík, Jiří; Vavřík, D.

    2005-01-01

    Roč. 546, - (2005), s. 164-169 ISSN 0168-9002 R&D Projects: GA MŠk(CZ) 1P04LA211 Institutional research plan: CEZ:AV0Z10480505 Keywords : neutron detection * pixel detectors * neutronography Subject RIV: BG - Nuclear, Atomic and Molecular Physics, Colliders Impact factor: 1.224, year: 2005

  6. First images of a digital autoradiography system based on a Medipix2 hybrid silicon pixel detector.

    Science.gov (United States)

    Mettivier, Giovanni; Montesi, Maria Cristina; Russo, Paolo

    2003-06-21

    We present the first images of beta autoradiography obtained with the high-resolution hybrid pixel detector consisting of the Medipix2 single photon counting read-out chip bump-bonded to a 300 microm thick silicon pixel detector. This room temperature system has 256 x 256 square pixels of 55 microm pitch (total sensitive area of 14 x 14 mm2), with a double threshold discriminator and a 13-bit counter in each pixel. It is read out via a dedicated electronic interface and control software, also developed in the framework of the European Medipix2 Collaboration. Digital beta autoradiograms of 14C microscale standard strips (containing separate bands of increasing specific activity in the range 0.0038-32.9 kBq g(-1)) indicate system linearity down to a total background noise of 1.8 x 10(-3) counts mm(-2) s(-1). The minimum detectable activity is estimated to be 0.012 Bq for 36,000 s exposure and 0.023 Bq for 10,800 s exposure. The measured minimum detection threshold is less than 1600 electrons (equivalent to about 6 keV Si). This real-time system for beta autoradiography offers lower pixel pitch and higher sensitive area than the previous Medipix1-based system. It has a 14C sensitivity better than that of micro channel plate based systems, which, however, shows higher spatial resolution and sensitive area.

  7. Fabrication and characterization of n-on-n silicon pixel detectors compatible with the Medipix2 readout chip

    Energy Technology Data Exchange (ETDEWEB)

    Zorzi, N. [ITC-irst, Divisione Microsistemi, Via Sommarive 18, I-38050 Povo (Trento) (Italy)]. E-mail: zorzi@itc.it; Bisogni, M.G. [Dipartimento di Fisica, Universita di Pisa and Sezione INFN, Via Buonarroti 2, I-56127 Pisa (Italy); Boscardin, M. [ITC-irst, Divisione Microsistemi, Via Sommarive 18, I-38050 Povo (Trento) (Italy); Dalla Betta, G.-F. [Dipartimento di Informatica e Telecomunicazioni, Universita di Trento, Via Sommarive 14, I-38050 Povo (Trento) (Italy); Gregori, P. [ITC-irst, Divisione Microsistemi, Via Sommarive 18, I-38050 Povo (Trento) (Italy); Novelli, M. [Dipartimento di Fisica, Universita di Pisa and Sezione INFN, Via Buonarroti 2, I-56127 Pisa (Italy); Piemonte, C. [ITC-irst, Divisione Microsistemi, Via Sommarive 18, I-38050 Povo (Trento) (Italy); Quattrocchi, M. [Dipartimento di Fisica, Universita di Pisa and Sezione INFN, Via Buonarroti 2, I-56127 Pisa (Italy); Ronchin, S. [ITC-irst, Divisione Microsistemi, Via Sommarive 18, I-38050 Povo (Trento) (Italy); Rosso, V. [Dipartimento di Fisica, Universita di Pisa and Sezione INFN, Via Buonarroti 2, I-56127 Pisa (Italy)

    2005-07-01

    Pixel detectors for mammographic applications have been fabricated at ITC-irst on 800 {mu}m thick silicon wafers adopting a double side n{sup +}-on-n fabrication technology. The activity aims at increasing the X-ray detection efficiency in the energy range of interest minimizing the risk of electrical discharges in hybrid systems operating at high voltages. The detectors, having a layout compatible with the Medipix2 photon counting chip, feature two different design solutions for the p-isolation between neighboring n{sup +}-pixels. We report on the characterization of the fabrication process and on preliminary results of electrical measurements on full detectors and pixel test structures. In particular, we found that the detectors can be reliably operated above the full depletion voltage regardless of the isolation design, that however, impacts the performances in terms of current-voltage characteristics, single pixel currents, inter-pixel resistances and inter-pixel capacitances.

  8. Fabrication and characterization of n-on-n silicon pixel detectors compatible with the Medipix2 readout chip

    International Nuclear Information System (INIS)

    Zorzi, N.; Bisogni, M.G.; Boscardin, M.; Dalla Betta, G.-F.; Gregori, P.; Novelli, M.; Piemonte, C.; Quattrocchi, M.; Ronchin, S.; Rosso, V.

    2005-01-01

    Pixel detectors for mammographic applications have been fabricated at ITC-irst on 800 μm thick silicon wafers adopting a double side n + -on-n fabrication technology. The activity aims at increasing the X-ray detection efficiency in the energy range of interest minimizing the risk of electrical discharges in hybrid systems operating at high voltages. The detectors, having a layout compatible with the Medipix2 photon counting chip, feature two different design solutions for the p-isolation between neighboring n + -pixels. We report on the characterization of the fabrication process and on preliminary results of electrical measurements on full detectors and pixel test structures. In particular, we found that the detectors can be reliably operated above the full depletion voltage regardless of the isolation design, that however, impacts the performances in terms of current-voltage characteristics, single pixel currents, inter-pixel resistances and inter-pixel capacitances

  9. Pixelized M-pi-n CdTe detector coupled to Medipix2 readout chip

    CERN Document Server

    Kalliopuska, J; Penttila, R; Andersson, H; Nenonen, S; Gadda, A; Pohjonen, H; Vanttajac, I; Laaksoc, P; Likonen, J

    2011-01-01

    We have realized a simple method for patterning an M-pi-n CdTe diode with a deeply diffused pn-junction, such as indium anode on CdTe. The method relies on removing the semiconductor material on the anode-side of the diode until the physical junction has been reached. The pixelization of the p-type CdTe diode with an indium anode has been demonstrated by patterning perpendicular trenches with a high precision diamond blade and pulsed laser. Pixelization or microstrip pattering can be done on both sides of the diode, also on the cathode-side to realize double sided detector configuration. The article compares the patterning quality of the diamond blade process, pulsed pico-second and femto-second lasers processes. Leakage currents and inter-strip resistance have been measured and are used as the basis of the comparison. Secondary ion mass spectrometry (SIMS) characterization has been done for a diode to define the pn-junction depth and to see the effect of the thermal loads of the flip-chip bonding process. Th...

  10. JPL CMOS Active Pixel Sensor Technology

    Science.gov (United States)

    Fossum, E. R.

    1995-01-01

    This paper will present the JPL-developed complementary metal- oxide-semiconductor (CMOS) active pixel sensor (APS) technology. The CMOS APS has achieved performance comparable to charge coupled devices, yet features ultra low power operation, random access readout, on-chip timing and control, and on-chip analog to digital conversion. Previously published open literature will be reviewed.

  11. Medipix2 as a tool for proton beam characterization

    Science.gov (United States)

    Bisogni, M. G.; Cirrone, G. A. P.; Cuttone, G.; Del Guerra, A.; Lojacono, P.; Piliero, M. A.; Romano, F.; Rosso, V.; Sipala, V.; Stefanini, A.

    2009-08-01

    Proton therapy is a technique used to deliver a highly accurate and effective dose for the treatment of a variety of tumor diseases. The possibility to have an instrument able to give online information could reduce the time necessary to characterize the proton beam. To this aim we propose a detection system for online proton beam characterization based on the Medipix2 chip. Medipix2 is a detection system based on a single event counter read-out chip, bump-bonded to silicon pixel detector. The read-out chip is a matrix of 256×256 cells, 55×55 μm 2 each. To demonstrate the capabilities of Medipix2 as a proton detector, we have used a 62 MeV flux proton beam at the CATANA beam line of the LNS-INFN laboratory. The measurements performed confirmed the good imaging performances of the Medipix2 system also for the characterization of proton beams.

  12. Medipix2 as a tool for proton beam characterization

    Energy Technology Data Exchange (ETDEWEB)

    Bisogni, M.G. [Department of Physics, University of Pisa and INFN Sezione di Pisa, Pisa (Italy); Cirrone, G.A.P.; Cuttone, G. [INFN Laboratori Nazionali del Sud, Catania (Italy); Del Guerra, A. [Department of Physics, University of Pisa and INFN Sezione di Pisa, Pisa (Italy); Lojacono, P. [INFN Laboratori Nazionali del Sud, Catania (Italy); Piliero, M.A. [Department of Physics, University of Pisa and INFN Sezione di Pisa, Pisa (Italy); Romano, F. [INFN Laboratori Nazionali del Sud, Catania (Italy); Rosso, V. [Department of Physics, University of Pisa and INFN Sezione di Pisa, Pisa (Italy)], E-mail: valeria.rosso@pi.infn.it; Sipala, V. [Department of Physics and Astronomy, University of Catania and INFN Sezione di Catania, Catania (Italy); Stefanini, A. [Department of Physics, University of Pisa and INFN Sezione di Pisa, Pisa (Italy)

    2009-08-01

    Proton therapy is a technique used to deliver a highly accurate and effective dose for the treatment of a variety of tumor diseases. The possibility to have an instrument able to give online information could reduce the time necessary to characterize the proton beam. To this aim we propose a detection system for online proton beam characterization based on the Medipix2 chip. Medipix2 is a detection system based on a single event counter read-out chip, bump-bonded to silicon pixel detector. The read-out chip is a matrix of 256x256 cells, 55x55 {mu}m{sup 2} each. To demonstrate the capabilities of Medipix2 as a proton detector, we have used a 62 MeV flux proton beam at the CATANA beam line of the LNS-INFN laboratory. The measurements performed confirmed the good imaging performances of the Medipix2 system also for the characterization of proton beams.

  13. Medipix2 as a tool for proton beam characterization

    International Nuclear Information System (INIS)

    Bisogni, M.G.; Cirrone, G.A.P.; Cuttone, G.; Del Guerra, A.; Lojacono, P.; Piliero, M.A.; Romano, F.; Rosso, V.; Sipala, V.; Stefanini, A.

    2009-01-01

    Proton therapy is a technique used to deliver a highly accurate and effective dose for the treatment of a variety of tumor diseases. The possibility to have an instrument able to give online information could reduce the time necessary to characterize the proton beam. To this aim we propose a detection system for online proton beam characterization based on the Medipix2 chip. Medipix2 is a detection system based on a single event counter read-out chip, bump-bonded to silicon pixel detector. The read-out chip is a matrix of 256x256 cells, 55x55 μm 2 each. To demonstrate the capabilities of Medipix2 as a proton detector, we have used a 62 MeV flux proton beam at the CATANA beam line of the LNS-INFN laboratory. The measurements performed confirmed the good imaging performances of the Medipix2 system also for the characterization of proton beams.

  14. Planar pixel sensors in commercial CMOS technologies

    Energy Technology Data Exchange (ETDEWEB)

    Gonella, Laura; Hemperek, Tomasz; Huegging, Fabian; Krueger, Hans; Wermes, Norbert [Physikalisches Institut der Universitaet Bonn, Nussallee 12, 53115 Bonn (Germany); Macchiolo, Anna [Max-Planck-Institut fuer Physik, Foehringer Ring 6, 80805 Muenchen (Germany)

    2015-07-01

    For the upgrade of the ATLAS experiment at the high luminosity LHC, an all-silicon tracker is foreseen to cope with the increased rate and radiation levels. Pixel and strip detectors will have to cover an area of up to 200m2. To produce modules in high number at reduced costs, new sensor and bonding technologies have to be investigated. Commercial CMOS technologies on high resistive substrates can provide significant advantages in this direction. They offer cost effective, large volume sensor production. In addition to this, production is done on 8'' wafers allowing wafer-to-wafer bonding to the electronics, an interconnection technology substantially cheaper than the bump bonding process used for hybrid pixel detectors at the LHC. Both active and passive n-in-p pixel sensor prototypes have been submitted in a 150 nm CMOS technology on a 2kΩ cm substrate. The passive sensor design will be used to characterize sensor properties and to investigate wafer-to-wafer bonding technologies. This first prototype is made of a matrix of 36 x 16 pixels of size compatible with the FE-I4 readout chip (i.e. 50 μm x 250 μm). Results from lab characterization of this first submission are shown together with TCAD simulations. Work towards a full size FE-I4 sensor for wafer-to-wafer bonding is discussed.

  15. Low energy electron microscopy imaging using Medipix2 detector

    International Nuclear Information System (INIS)

    Sikharulidze, I.; Gastel, R. van; Schramm, S.; Abrahams, J.P.; Poelsema, B.; Tromp, R.M.; Molen, S.J. van der

    2011-01-01

    Low Energy Electron Microscopy (LEEM) and Photo-Emission Electron Microscopy (PEEM) predominantly use a combination of microchannel plate (MCP), phosphor screen and optical camera to record images formed by 10-20 keV electrons. We have tested the performance of a LEEM/PEEM instrument with a Medipix2 hybrid pixel detector using an Ir(1 1 1) sample with graphene flakes grown on its surface. We find that Medipix2 offers a number of advantages over the MCP. The adjustable threshold settings allow Medipix2 to operate as a noiseless detector, offering an improved signal-to-noise ratio for the same amount of signal compared to the MCP. At the same magnification Medipix2 images exhibit superior resolution and can handle significantly higher electron current densities than an MCP, offering the prospect of substantially higher frame rates in LEEM imaging. These factors make Medipix2 an excellent candidate to become the detector of choice for LEEM/PEEM applications.

  16. Low energy electron microscopy imaging using Medipix2 detector

    Energy Technology Data Exchange (ETDEWEB)

    Sikharulidze, I., E-mail: irakli@chem.leidenuniv.nl [Leiden Institute of Chemistry, Leiden University, P.O. Box 9502, 2300RA Leiden (Netherlands); Gastel, R. van [MESA Institute for Nanotechnology, University of Twente, P.O. Box 217, 7500AE Enschede (Netherlands); Schramm, S. [Kamerlingh Onnes Laboratory, Leiden University, P.O. Box 9504, 2300RA Leiden (Netherlands); Abrahams, J.P. [Leiden Institute of Chemistry, Leiden University, P.O. Box 9502, 2300RA Leiden (Netherlands); Poelsema, B. [MESA Institute for Nanotechnology, University of Twente, P.O. Box 217, 7500AE Enschede (Netherlands); Tromp, R.M. [Kamerlingh Onnes Laboratory, Leiden University, P.O. Box 9504, 2300RA Leiden (Netherlands); IBM Research Division, T. J. Watson Research Center, P.O. Box 218, Yorktown Heights, NY 10598 (United States); Molen, S.J. van der [Kamerlingh Onnes Laboratory, Leiden University, P.O. Box 9504, 2300RA Leiden (Netherlands)

    2011-05-15

    Low Energy Electron Microscopy (LEEM) and Photo-Emission Electron Microscopy (PEEM) predominantly use a combination of microchannel plate (MCP), phosphor screen and optical camera to record images formed by 10-20 keV electrons. We have tested the performance of a LEEM/PEEM instrument with a Medipix2 hybrid pixel detector using an Ir(1 1 1) sample with graphene flakes grown on its surface. We find that Medipix2 offers a number of advantages over the MCP. The adjustable threshold settings allow Medipix2 to operate as a noiseless detector, offering an improved signal-to-noise ratio for the same amount of signal compared to the MCP. At the same magnification Medipix2 images exhibit superior resolution and can handle significantly higher electron current densities than an MCP, offering the prospect of substantially higher frame rates in LEEM imaging. These factors make Medipix2 an excellent candidate to become the detector of choice for LEEM/PEEM applications.

  17. Medipix 2 detector applied to low energy electron microscopy

    International Nuclear Information System (INIS)

    Gastel, R. van; Sikharulidze, I.; Schramm, S.; Abrahams, J.P.; Poelsema, B.; Tromp, R.M.; Molen, S.J. van der

    2009-01-01

    Low energy electron microscopy (LEEM) and photo-emission electron microscopy (PEEM) traditionally use microchannel plates (MCPs), a phosphor screen and a CCD-camera to record images and diffraction patterns. In recent years, however, MCPs have become a limiting factor for these types of microscopy. Here, we report on a successful test series using a solid state hybrid pixel detector, Medipix 2, in LEEM and PEEM. Medipix 2 is a background-free detector with an infinite dynamic range, making it very promising for both real-space imaging and spectroscopy. We demonstrate a significant enhancement of both image contrast and resolution, as compared to MCPs. Since aging of the Medipix 2 detector is negligible for the electron energies used in LEEM/PEEM, we expect Medipix to become the detector of choice for a new generation of systems.

  18. Medipix 2 detector applied to low energy electron microscopy

    Energy Technology Data Exchange (ETDEWEB)

    Gastel, R. van, E-mail: R.vanGastel@utwente.nl [University of Twente, MESA Institute for Nanotechnology, P.O. Box 217, NL-7500 AE Enschede (Netherlands); Sikharulidze, I. [Leiden University, Leiden Institute of Chemistry, P.O. Box 9502, NL-2300 RA Leiden (Netherlands); Schramm, S. [Leiden University, Kamerlingh Onnes Laboratorium, P.O. Box 9504, NL-2300 RA Leiden (Netherlands); Abrahams, J.P. [Leiden University, Leiden Institute of Chemistry, P.O. Box 9502, NL-2300 RA Leiden (Netherlands); Poelsema, B. [University of Twente, MESA Institute for Nanotechnology, P.O. Box 217, NL-7500 AE Enschede (Netherlands); Tromp, R.M. [Leiden University, Kamerlingh Onnes Laboratorium, P.O. Box 9504, NL-2300 RA Leiden (Netherlands); IBM Research Division, T. J. Watson Research Center, P.O. Box 218, Yorktown Heights, NY 10598 (United States); Molen, S.J. van der [Leiden University, Kamerlingh Onnes Laboratorium, P.O. Box 9504, NL-2300 RA Leiden (Netherlands)

    2009-12-15

    Low energy electron microscopy (LEEM) and photo-emission electron microscopy (PEEM) traditionally use microchannel plates (MCPs), a phosphor screen and a CCD-camera to record images and diffraction patterns. In recent years, however, MCPs have become a limiting factor for these types of microscopy. Here, we report on a successful test series using a solid state hybrid pixel detector, Medipix 2, in LEEM and PEEM. Medipix 2 is a background-free detector with an infinite dynamic range, making it very promising for both real-space imaging and spectroscopy. We demonstrate a significant enhancement of both image contrast and resolution, as compared to MCPs. Since aging of the Medipix 2 detector is negligible for the electron energies used in LEEM/PEEM, we expect Medipix to become the detector of choice for a new generation of systems.

  19. CMOS Active Pixel Sensor Technology and Reliability Characterization Methodology

    Science.gov (United States)

    Chen, Yuan; Guertin, Steven M.; Pain, Bedabrata; Kayaii, Sammy

    2006-01-01

    This paper describes the technology, design features and reliability characterization methodology of a CMOS Active Pixel Sensor. Both overall chip reliability and pixel reliability are projected for the imagers.

  20. Characterization of active CMOS sensors for capacitively coupled pixel detectors

    Energy Technology Data Exchange (ETDEWEB)

    Hirono, Toko; Gonella, Laura; Janssen, Jens; Hemperek, Tomasz; Huegging, Fabian; Krueger, Hans; Wermes, Norbert [Institute of Physics, University of Bonn (Germany); Peric, Ivan [Institut fuer Prozessdatenverarbeitung und Elektronik, Karlsruher Institut fuer Technologie, Karlsruhe (Germany)

    2015-07-01

    Active CMOS pixel sensor is one of the most attractive candidates for detectors of upcoming particle physics experiments. In contrast to conventional sensors of hybrid detectors, signal processing circuit can be integrated in the active CMOS sensor. The characterization and optimization of the pixel circuit are indispensable to obtain a good performance from the sensors. The prototype chips of the active CMOS sensor were fabricated in the AMS 180nm and L-Foundry 150 nm CMOS processes, respectively a high voltage and high resistivity technology. Both chips have a charge sensitive amplifier and a comparator in each pixel. The chips are designed to be glued to the FEI4 pixel readout chip. The signals from 3 pixels of the prototype chips are capacitively coupled to the FEI4 input pads. We have performed lab tests and test beams to characterize the prototypes. In this presentation, the measurement results of the active CMOS prototype sensors are shown.

  1. Depleted CMOS pixels for LHC proton–proton experiments

    International Nuclear Information System (INIS)

    Wermes, N.

    2016-01-01

    While so far monolithic pixel detectors have remained in the realm of comparatively low rate and radiation applications outside LHC, new developments exploiting high resistivity substrates with three or four well CMOS process options allow reasonably large depletion depths and full CMOS circuitry in a monolithic structure. This opens up the possibility to target CMOS pixel detectors also for high radiation pp-experiments at the LHC upgrade, either in a hybrid-type fashion or even fully monolithic. Several pixel matrices have been prototyped with high ohmic substrates, high voltage options, and full CMOS electronics. They were characterized in the lab and in test beams. An overview of the necessary development steps and different approaches as well as prototype results are presented in this paper.

  2. CMOS Active-Pixel Image Sensor With Simple Floating Gates

    Science.gov (United States)

    Fossum, Eric R.; Nakamura, Junichi; Kemeny, Sabrina E.

    1996-01-01

    Experimental complementary metal-oxide/semiconductor (CMOS) active-pixel image sensor integrated circuit features simple floating-gate structure, with metal-oxide/semiconductor field-effect transistor (MOSFET) as active circuit element in each pixel. Provides flexibility of readout modes, no kTC noise, and relatively simple structure suitable for high-density arrays. Features desirable for "smart sensor" applications.

  3. E-Beam Effects on CMOS Active Pixel Sensors

    International Nuclear Information System (INIS)

    Kang, Dong Ook; Jo, Gyu Seong; Kim, Hyeon Daek; Kim, Hyunk Taek; Kim, Jong Yeol; Kim, Chan Kyu

    2011-01-01

    Three different CMOS active pixel structures manufactured in a deep submicron process have been evaluated with electron beam. The devices were exposed to 1 MeV electron beam up to 5kGy. Dark current increased after E-beam irradiation differently at each pixel structure. Dark current change is dependent on CMOS pixel structures. CMOS image sensors are now good candidates in demanding applications such as medical image sensor, particle detection and space remote sensing. In these situations, CISs are exposed to high doses of radiation. In fact radiation is known to generate trapped charge in CMOS oxides. It can lead to threshold voltage shifts and current leakages in MOSFETs and dark current increase in photodiodes. We studied ionizing effects in three types of CMOS APSs fabricated by 0.25 CMOS process. The devices were irradiated by a Co 60 source up to 50kGy. All irradiation took place at room temperature. The dark current in the three different pixels exhibits increase with electron beam exposure. From the above figure, the change of dark current is dependent on the pixel structure. Double junction structure has shown relatively small increase of dark current after electron beam irradiation. The dark current in the three different pixels exhibits increase with electron beam exposure. The contribution of the total ionizing dose to the dark current increase is small here, since the devices were left unbiased during the electron beam irradiation. Radiation hardness in dependent on the pixel structures. Pixel2 is relatively vulnerable to radiation exposure. Pixel3 has radiation hardened structure

  4. Small Pixel Hybrid CMOS X-ray Detectors

    Science.gov (United States)

    Hull, Samuel; Bray, Evan; Burrows, David N.; Chattopadhyay, Tanmoy; Falcone, Abraham; Kern, Matthew; McQuaide, Maria; Wages, Mitchell

    2018-01-01

    Concepts for future space-based X-ray observatories call for a large effective area and high angular resolution instrument to enable precision X-ray astronomy at high redshift and low luminosity. Hybrid CMOS detectors are well suited for such high throughput instruments, and the Penn State X-ray detector lab, in collaboration with Teledyne Imaging Sensors, has recently developed new small pixel hybrid CMOS X-ray detectors. These prototype 128x128 pixel devices have 12.5 micron pixel pitch, 200 micron fully depleted depth, and include crosstalk eliminating CTIA amplifiers and in-pixel correlated double sampling (CDS) capability. We report on characteristics of these new detectors, including the best read noise ever measured for an X-ray hybrid CMOS detector, 5.67 e- (RMS).

  5. A Single-Transistor Active Pixel CMOS Image Sensor Architecture

    International Nuclear Information System (INIS)

    Zhang Guo-An; He Jin; Zhang Dong-Wei; Su Yan-Mei; Wang Cheng; Chen Qin; Liang Hai-Lang; Ye Yun

    2012-01-01

    A single-transistor CMOS active pixel image sensor (1 T CMOS APS) architecture is proposed. By switching the photosensing pinned diode, resetting and selecting can be achieved by diode pull-up and capacitive coupling pull-down of the source follower. Thus, the reset and selected transistors can be removed. In addition, the reset and selected signal lines can be shared to reduce the metal signal line, leading to a very high fill factor. The pixel design and operation principles are discussed in detail. The functionality of the proposed 1T CMOS APS architecture has been experimentally verified using a fabricated chip in a standard 0.35 μm CMOS AMIS technology

  6. Characterization of active CMOS pixel sensors on high resistive substrate

    Energy Technology Data Exchange (ETDEWEB)

    Hirono, Toko; Hemperek, Tomasz; Huegging, Fabian; Krueger, Hans; Rymaszewski, Piotr; Wermes, Norbert [Physikalisches Institut, Universitaet Bonn, Bonn (Germany)

    2016-07-01

    Active CMOS pixel sensors are very attractive as radiation imaging pixel detector because they do not need cost-intensive fine pitch bump bonding. High radiation tolerance and time resolution are required to apply those sensors to upcoming particle physics experiments. To achieve these requirements, the active CMOS pixel sensors were developed on high resistive substrates. Signal charges are collected faster by drift in high resistive substrates than in standard low resistive substrates yielding also a higher radiation tolerance. A prototype of the active CMOS pixel sensor has been fabricated in the LFoundry 150 nm CMOS process on 2 kΩcm substrate. This prototype chip was thinned down to 300 μm and the backside has been processed and can contacted by an aluminum contact. The breakdown voltage is around -115 V, and the depletion width has been measured to be as large as 180 μm at a bias voltage of -110 V. Gain and noise of the readout circuitry agree with the designed values. Performance tests in the lab and test beam have been done before and after irradiation with X-rays and neutrons. In this presentation, the measurement results of the active CMOS prototype sensors are shown.

  7. Optically sensitive Medipix2 detector for adaptive optics wavefront sensing

    CERN Document Server

    Vallerga, John; Tremsina, Anton; Siegmund, Oswald; Mikulec, Bettina; Clark, Allan G; CERN. Geneva

    2005-01-01

    A new hybrid optical detector is described that has many of the attributes desired for the next generation adaptive optics (AO) wavefront sensors. The detector consists of a proximity focused microchannel plate (MCP) read out by multi-pixel application specific integrated circuit (ASIC) chips developed at CERN ("Medipix2") with individual pixels that amplify, discriminate and count input events. The detector has 256 x 256 pixels, zero readout noise (photon counting), can be read out at 1 kHz frame rates and is abutable on 3 sides. The Medipix2 readout chips can be electronically shuttered down to a temporal window of a few microseconds with an accuracy of 10 ns. When used in a Shack-Hartmann style wavefront sensor, a detector with 4 Medipix chips should be able to centroid approximately 5000 spots using 7 x 7 pixel sub-apertures resulting in very linear, off-null error correction terms. The quantum efficiency depends on the optical photocathode chosen for the bandpass of interest.

  8. Optically sensitive Medipix2 detector for adaptive optics wavefront sensing

    International Nuclear Information System (INIS)

    Vallerga, John; McPhate, Jason; Tremsin, Anton; Siegmund, Oswald; Mikulec, Bettina; Clark, Allan

    2005-01-01

    A new hybrid optical detector is described that has many of the attributes desired for the next generation adaptive optics (AO) wavefront sensors. The detector consists of a proximity focused microchannel plate (MCP) read out by multi-pixel application specific integrated circuit (ASIC) chips developed at CERN ('Medipix2') with individual pixels that amplify, discriminate and count input events. The detector has 256x256 pixels, zero readout noise (photon counting), can be read out at 1 kHz frame rates and is abutable on 3 sides. The Medipix2 readout chips can be electronically shuttered down to a temporal window of a few microseconds with an accuracy of 10 ns. When used in a Shack-Hartmann style wavefront sensor, a detector with 4 Medipix chips should be able to centroid approximately 5000 spots using 7x7 pixel sub-apertures resulting in very linear, off-null error correction terms. The quantum efficiency depends on the optical photocathode chosen for the bandpass of interest

  9. 32 x 16 CMOS smart pixel array for optical interconnects

    Science.gov (United States)

    Kim, Jongwoo; Guilfoyle, Peter S.; Stone, Richard V.; Hessenbruch, John M.; Choquette, Kent D.; Kiamilev, Fouad E.

    2000-05-01

    Free space optical interconnects can increase throughput capacities and eliminate much of the energy consumption required for `all electronic' systems. High speed optical interconnects can be achieved by integrating optoelectronic devices with conventional electronics. Smart pixel arrays have been developed which use optical interconnects. An individual smart pixel cell is composed of a vertical cavity surface emitting laser (VCSEL), a photodetector, an optical receiver, a laser driver, and digital logic circuitry. Oxide-confined VCSELs are being developed to operate at 850 nm with a threshold current of approximately 1 mA. Multiple quantum well photodetectors are being fabricated from AlGaAs for use with the 850 nm VCSELs. The VCSELs and photodetectors are being integrated with complementary metal oxide semiconductor (CMOS) circuitry using flip-chip bonding. CMOS circuitry is being integrated with a 32 X 16 smart pixel array. The 512 smart pixels are serially linked. Thus, an entire data stream may be clocked through the chip and output electrically by the last pixel. Electrical testing is being performed on the CMOS smart pixel array. Using an on-chip pseudo random number generator, a digital data sequence was cycled through the chip verifying operation of the digital circuitry. Although, the prototype chip was fabricated in 1.2 micrometers technology, simulations have demonstrated that the array can operate at 1 Gb/s per pixel using 0.5 micrometers technology.

  10. A passive CMOS pixel sensor for the high luminosity LHC

    Energy Technology Data Exchange (ETDEWEB)

    Daas, Michael; Gonella, Laura; Hemperek, Tomasz; Huegging, Fabian; Janssen, Jens; Krueger, Hans; Pohl, David-Leon; Wermes, Norbert [Physikalisches Institut der Universitaet Bonn (Germany); Macchiolo, Anna [Max-Planck-Institut fuer Physik, Muenchen (Germany)

    2016-07-01

    The high luminosity upgrade for the Large Hadron Collider at CERN requires a new inner tracking detector for the ATLAS experiment. About 200 m{sup 2} of silicon detectors are needed demanding new, low cost hybridization- and sensor technologies. One promising approach is to use commercial CMOS technologies to produce the passive sensor for a hybrid pixel detector design. In this talk a fully functional prototype of a 300 μm thick, backside biased CMOS pixel sensor in 150 nm LFoundry technology is presented. The sensor is bump bonded to the ATLAS FE-I4 with AC and DC coupled pixels. Results like leakage current, noise performance, and charge collection efficiency are presented and compared to the actual ATLAS pixel sensor design.

  11. CMOS VLSI Active-Pixel Sensor for Tracking

    Science.gov (United States)

    Pain, Bedabrata; Sun, Chao; Yang, Guang; Heynssens, Julie

    2004-01-01

    An architecture for a proposed active-pixel sensor (APS) and a design to implement the architecture in a complementary metal oxide semiconductor (CMOS) very-large-scale integrated (VLSI) circuit provide for some advanced features that are expected to be especially desirable for tracking pointlike features of stars. The architecture would also make this APS suitable for robotic- vision and general pointing and tracking applications. CMOS imagers in general are well suited for pointing and tracking because they can be configured for random access to selected pixels and to provide readout from windows of interest within their fields of view. However, until now, the architectures of CMOS imagers have not supported multiwindow operation or low-noise data collection. Moreover, smearing and motion artifacts in collected images have made prior CMOS imagers unsuitable for tracking applications. The proposed CMOS imager (see figure) would include an array of 1,024 by 1,024 pixels containing high-performance photodiode-based APS circuitry. The pixel pitch would be 9 m. The operations of the pixel circuits would be sequenced and otherwise controlled by an on-chip timing and control block, which would enable the collection of image data, during a single frame period, from either the full frame (that is, all 1,024 1,024 pixels) or from within as many as 8 different arbitrarily placed windows as large as 8 by 8 pixels each. A typical prior CMOS APS operates in a row-at-a-time ( grolling-shutter h) readout mode, which gives rise to exposure skew. In contrast, the proposed APS would operate in a sample-first/readlater mode, suppressing rolling-shutter effects. In this mode, the analog readout signals from the pixels corresponding to the windows of the interest (which windows, in the star-tracking application, would presumably contain guide stars) would be sampled rapidly by routing them through a programmable diagonal switch array to an on-chip parallel analog memory array. The

  12. Optimization of CMOS active pixels for high resolution digital radiography

    International Nuclear Information System (INIS)

    Kim, Young Soo

    2007-02-01

    CMOS image sensors have poorer performance compared to conventional charge coupled devices (CCDs). Since CMOS Active Pixel Sensors (APSs) in general have higher temporal noise, higher dark current, smaller full well charge capacitance, and lower spectral response, they cannot provide the same wide dynamic range and superior signal-to-noise ratio as CCDs. In view of electronic noise, the main source for the CMOS APS is the pixel, along with other signal processing blocks such as row and column decoder, analog signal processor (ASP), analog-to-digital converter (ADC), and timing and control logic circuitry. Therefore, it is important and necessary to characterize noise of the active pixels in CMOS APSs. We developed our theoretical noise model to account for the temporal noise in active pixels, and then found out the optimum design parameters such as fill actor, each size of the three transistors (source follower, row selection transistor, bias transistor) comprising active pixels, bias current, and load capacitance that can have the maximum signal-to-noise ratio. To develop the theoretical noise model in active pixels, we considered the integration noise of the photodiode and the readout noise of the transistors related to readout. During integration, the shot noise due to the dark current and photocurrent, during readout, the thermal and flicker noise were considered. The developed model can take the input variables such as photocurrent, capacitance of the photodiode, integration time, transconductance of the transistors, channel resistance of the transistors, gate-to-source capacitance of the follower, and load capacitance etc. To validate our noise model, two types of test structures have been realized. Firstly, four types of photodiodes (n_d_i_f_f_u_s_i_o_n/p_s_u_b_s_t_r_a_t_e, n_w_e_l_l/p_s_u_b_s_t_r_a_t_e, n_d_i_f_f_u_s_i_o_n/p_e_p_i_t_a_x_i_a_l/p_s_u_b_s_t_r_a_t_e, n_w_e_l_l/p_e_p_i_t_a_x_i_a_l/p_s_u_b_s_t_r_a_t_e) used in CMOS active pixels were fabricated

  13. Pixel front-end development in 65 nm CMOS technology

    International Nuclear Information System (INIS)

    Havránek, M; Hemperek, T; Kishishita, T; Krüger, H; Wermes, N

    2014-01-01

    Luminosity upgrade of the LHC (HL-LHC) imposes severe constraints on the detector tracking systems in terms of radiation hardness and capability to cope with higher hit rates. One possible way of keeping track with increasing luminosity is the usage of more advanced technologies. Ultra deep sub-micron CMOS technologies allow a design of complex and high speed electronics with high integration density. In addition, these technologies are inherently radiation hard. We present a prototype of analog pixel front-end integrated circuit designed in 65 nm CMOS technology with applications oriented towards the ATLAS Pixel Detector upgrade. The aspects of ultra deep sub-micron design and performance of the analog pixel front-end circuits will be discussed

  14. Monolithic active pixel sensors (MAPS) in a VLSI CMOS technology

    CERN Document Server

    Turchetta, R; Manolopoulos, S; Tyndel, M; Allport, P P; Bates, R; O'Shea, V; Hall, G; Raymond, M

    2003-01-01

    Monolithic Active Pixel Sensors (MAPS) designed in a standard VLSI CMOS technology have recently been proposed as a compact pixel detector for the detection of high-energy charged particle in vertex/tracking applications. MAPS, also named CMOS sensors, are already extensively used in visible light applications. With respect to other competing imaging technologies, CMOS sensors have several potential advantages in terms of low cost, low power, lower noise at higher speed, random access of pixels which allows windowing of region of interest, ability to integrate several functions on the same chip. This brings altogether to the concept of 'camera-on-a-chip'. In this paper, we review the use of CMOS sensors for particle physics and we analyse their performances in term of the efficiency (fill factor), signal generation, noise, readout speed and sensor area. In most of high-energy physics applications, data reduction is needed in the sensor at an early stage of the data processing before transfer of the data to ta...

  15. Fully depleted CMOS pixel sensor development and potential applications

    Energy Technology Data Exchange (ETDEWEB)

    Baudot, J.; Kachel, M. [Universite de Strasbourg, IPHC, 23 rue du Loess 67037 Strasbourg (France); CNRS, UMR7178, 67037 Strasbourg (France)

    2015-07-01

    CMOS pixel sensors are often opposed to hybrid pixel sensors due to their very different sensitive layer. In standard CMOS imaging processes, a thin (about 20 μm) low resistivity epitaxial layer acts as the sensitive volume and charge collection is mostly driven by thermal agitation. In contrast, the so-called hybrid pixel technology exploits a thick (typically 300 μm) silicon sensor with high resistivity allowing for the depletion of this volume, hence charges drift toward collecting electrodes. But this difference is fading away with the recent availability of some CMOS imaging processes based on a relatively thick (about 50 μm) high resistivity epitaxial layer which allows for full depletion. This evolution extents the range of applications for CMOS pixel sensors where their known assets, high sensitivity and granularity combined with embedded signal treatment, could potentially foster breakthrough in detection performances for specific scientific instruments. One such domain is the Xray detection for soft energies, typically below 10 keV, where the thin sensitive layer was previously severely impeding CMOS sensor usage. Another application becoming realistic for CMOS sensors, is the detection in environment with a high fluence of non-ionizing radiation, such as hadron colliders. However, when considering highly demanding applications, it is still to be proven that micro-circuits required to uniformly deplete the sensor at the pixel level, do not mitigate the sensitivity and efficiency required. Prototype sensors in two different technologies with resistivity higher than 1 kΩ, sensitive layer between 40 and 50 μm and featuring pixel pitch in the range 25 to 50 μm, have been designed and fabricated. Various biasing architectures were adopted to reach full depletion with only a few volts. Laboratory investigations with three types of sources (X-rays, β-rays and infrared light) demonstrated the validity of the approach with respect to depletion, keeping a

  16. A CMOS In-Pixel CTIA High Sensitivity Fluorescence Imager.

    Science.gov (United States)

    Murari, Kartikeya; Etienne-Cummings, Ralph; Thakor, Nitish; Cauwenberghs, Gert

    2011-10-01

    Traditionally, charge coupled device (CCD) based image sensors have held sway over the field of biomedical imaging. Complementary metal oxide semiconductor (CMOS) based imagers so far lack sensitivity leading to poor low-light imaging. Certain applications including our work on animal-mountable systems for imaging in awake and unrestrained rodents require the high sensitivity and image quality of CCDs and the low power consumption, flexibility and compactness of CMOS imagers. We present a 132×124 high sensitivity imager array with a 20.1 μm pixel pitch fabricated in a standard 0.5 μ CMOS process. The chip incorporates n-well/p-sub photodiodes, capacitive transimpedance amplifier (CTIA) based in-pixel amplification, pixel scanners and delta differencing circuits. The 5-transistor all-nMOS pixel interfaces with peripheral pMOS transistors for column-parallel CTIA. At 70 fps, the array has a minimum detectable signal of 4 nW/cm(2) at a wavelength of 450 nm while consuming 718 μA from a 3.3 V supply. Peak signal to noise ratio (SNR) was 44 dB at an incident intensity of 1 μW/cm(2). Implementing 4×4 binning allowed the frame rate to be increased to 675 fps. Alternately, sensitivity could be increased to detect about 0.8 nW/cm(2) while maintaining 70 fps. The chip was used to image single cell fluorescence at 28 fps with an average SNR of 32 dB. For comparison, a cooled CCD camera imaged the same cell at 20 fps with an average SNR of 33.2 dB under the same illumination while consuming over a watt.

  17. Real-time in-vivo μ-imaging with Medipix2

    International Nuclear Information System (INIS)

    Dammer, J.; Frallicciardi, P.M.; Jakubek, J.; Jakubek, M.; Pospisil, S.; Prenerova, E.; Vavrik, D.; Volter, L.; Weyda, F.; Zemek, R.

    2009-01-01

    An X-ray micro-radiographic system based on the Medipix2 semiconductor pixel detector for dynamic high spatial resolution and for high contrast imaging has been developed. Our system is based on a micro-focus and nano-focus X-ray tube and the hybrid single-photon counting silicon pixel detector Medipix2 (matrix 256x256 sq. pixels of 55 μm pitch). This compact table-top system stands promising as a new tool in the field of small animal imaging as well as in the in-vivo observation of dynamic processes inside living organisms. The main advantages of these Medipix2 pixel detectors include: high sensitivity to low-energy X-ray photons; position sensitive and noiseless single-photon detection with preselected photon energies; single-quantum counting in each pixel performed by digital counter (therefore there is no dark current); digital integration (providing unlimited dynamic range and absolute linearity in device response to number of photons, high sensitivity and high contrast); real-time digital information, high-speed digital communication and data transfer. We improve the picture quality with the help of statistical data analysis and extended the calibration of individual pixels response. 2D and 3D radiographic images of samples demonstrate the potential and applicability of our system for precise in-vivo X-ray high-resolution dynamic diagnostic and biological studies. Obtained results are shown on small animal and organic samples.

  18. Fully integrated CMOS pixel detector for high energy particles

    International Nuclear Information System (INIS)

    Vanstraelen, G.; Debusschere, I.; Claeys, C.; Declerck, G.

    1989-01-01

    A novel type of position and energy sensitive, monolithic pixel array with integrated readout electronics is proposed. Special features of the design are a reduction of the number of output channels and of the amount of output data, and the use of transistors on the high resistivity silicon. The number of output channels for the detector array is reduced by handling in parallel a number of pixels, chosen as a function of the time resolution required for the system, and by the use of an address decoder. A further reduction of data is achieved by reading out only those pixels which have been activated. The pixel detector circuit will be realized in a 3 μm p-well CMOS process, which is optimized for the full integration of readout electronics and detector diodes on high resistivity Si. A retrograde well is formed by means of a high energy implantation, followed by the appropriate temperature steps. The optimization of the well shape takes into account the high substrate bias applied during the detector operation. The design is largely based on the use of MOS transistors on the high resistivity silicon itself. These have proven to perform as well as transistors on standard doped substrate. The basic building elements as well as the design strategy of the integrated pixel detector are presented in detail. (orig.)

  19. On drift fields in CMOS monolithic active pixel sensors

    Energy Technology Data Exchange (ETDEWEB)

    Deveaux, Michael [Goethe-Universitaet, Frankfurt (Germany); Collaboration: CBM-MVD-Collaboration

    2016-07-01

    CMOS Monolithic Active Pixel Sensors (MAPS) combine an excellent spatial resolution of few μm with a very low material budget of 0.05% X{sub 0}. To extend their radiation tolerance to the level needed for future experiments like e.g. CBM, it is regularly considered to deplete their active volume. We discuss the limits of this strategy accounting for the specific features of the sensing elements of MAPS. Moreover, we introduce an alternative approach to generate the drift fields needed to provoke a faster charge collection by means of doping gradients.

  20. From vertex detectors to inner trackers with CMOS pixel sensors

    CERN Document Server

    Besson, A.

    2017-01-01

    The use of CMOS Pixel Sensors (CPS) for high resolution and low material vertex detectors has been validated with the 2014 and 2015 physics runs of the STAR-PXL detector at RHIC/BNL. This opens the door to the use of CPS for inner tracking devices, with 10-100 times larger sensitive area, which require therefore a sensor design privileging power saving, response uniformity and robustness. The 350 nm CMOS technology used for the STAR-PXL sensors was considered as too poorly suited to upcoming applications like the upgraded ALICE Inner Tracking System (ITS), which requires sensors with one order of magnitude improvement on readout speed and improved radiation tolerance. This triggered the exploration of a deeper sub-micron CMOS technology, Tower-Jazz 180 nm, for the design of a CPS well adapted for the new ALICE-ITS running conditions. This paper reports the R&D results for the conception of a CPS well adapted for the ALICE-ITS.

  1. From hybrid to CMOS pixels ... a possibility for LHC's pixel future?

    International Nuclear Information System (INIS)

    Wermes, N.

    2015-01-01

    Hybrid pixel detectors have been invented for the LHC to make tracking and vertexing possible at all in LHC's radiation intense environment. The LHC pixel detectors have meanwhile very successfully fulfilled their promises and R and D for the planned HL-LHC upgrade is in full swing, targeting even higher ionising doses and non-ionising fluences. In terms of rate and radiation tolerance hybrid pixels are unrivaled. But they have disadvantages as well, most notably material thickness, production complexity, and cost. Meanwhile also active pixel sensors (DEPFET, MAPS) have become real pixel detectors but they would by far not stand the rates and radiation faced from HL-LHC. New MAPS developments, so-called DMAPS (depleted MAPS) which are full CMOS-pixel structures with charge collection in a depleted region have come in the R and D focus for pixels at high rate/radiation levels. This goal can perhaps be realised exploiting HV technologies, high ohmic substrates and/or SOI based technologies. The paper covers the main ideas and some encouraging results from prototyping R and D, not hiding the difficulties

  2. Neutron irradiation test of depleted CMOS pixel detector prototypes

    International Nuclear Information System (INIS)

    Mandić, I.; Cindro, V.; Gorišek, A.; Hiti, B.; Kramberger, G.; Mikuž, M.; Zavrtanik, M.; Hemperek, T.; Daas, M.; Hügging, F.; Krüger, H.; Pohl, D.-L.; Wermes, N.; Gonella, L.

    2017-01-01

    Charge collection properties of depleted CMOS pixel detector prototypes produced on p-type substrate of 2 kΩ cm initial resistivity (by LFoundry 150 nm process) were studied using Edge-TCT method before and after neutron irradiation. The test structures were produced for investigation of CMOS technology in tracking detectors for experiments at HL-LHC upgrade. Measurements were made with passive detector structures in which current pulses induced on charge collecting electrodes could be directly observed. Thickness of depleted layer was estimated and studied as function of neutron irradiation fluence. An increase of depletion thickness was observed after first two irradiation steps to 1 · 10 13 n/cm 2 and 5 · 10 13 n/cm 2 and attributed to initial acceptor removal. At higher fluences the depletion thickness at given voltage decreases with increasing fluence because of radiation induced defects contributing to the effective space charge concentration. The behaviour is consistent with that of high resistivity silicon used for standard particle detectors. The measured thickness of the depleted layer after irradiation with 1 · 10 15 n/cm 2 is more than 50 μm at 100 V bias. This is sufficient to guarantee satisfactory signal/noise performance on outer layers of pixel trackers in HL-LHC experiments.

  3. CMOS monolithic active pixel sensors for high energy physics

    Energy Technology Data Exchange (ETDEWEB)

    Snoeys, W., E-mail: walter.snoeys@cern.ch

    2014-11-21

    Monolithic pixel detectors integrating sensor matrix and readout in one piece of silicon are only now starting to make their way into high energy physics. Two major requirements are radiation tolerance and low power consumption. For the most extreme radiation levels, signal charge has to be collected by drift from a depletion layer onto a designated collection electrode without losing the signal charge elsewhere in the in-pixel circuit. Low power consumption requires an optimization of Q/C, the ratio of the collected signal charge over the input capacitance [1]. Some solutions to combine sufficient Q/C and collection by drift require exotic fabrication steps. More conventional solutions up to now require a simple in-pixel readout circuit. Both high voltage CMOS technologies and Monolithic Active Pixel Sensors (MAPS) technologies with high resistivity epitaxial layers offer high voltage diodes. The choice between the two is not fundamental but more a question of how much depletion can be reached and also of availability and cost. This paper tries to give an overview.

  4. A 128 x 128 CMOS Active Pixel Image Sensor for Highly Integrated Imaging Systems

    Science.gov (United States)

    Mendis, Sunetra K.; Kemeny, Sabrina E.; Fossum, Eric R.

    1993-01-01

    A new CMOS-based image sensor that is intrinsically compatible with on-chip CMOS circuitry is reported. The new CMOS active pixel image sensor achieves low noise, high sensitivity, X-Y addressability, and has simple timing requirements. The image sensor was fabricated using a 2 micrometer p-well CMOS process, and consists of a 128 x 128 array of 40 micrometer x 40 micrometer pixels. The CMOS image sensor technology enables highly integrated smart image sensors, and makes the design, incorporation and fabrication of such sensors widely accessible to the integrated circuit community.

  5. A novel CMOS sensor with in-pixel auto-zeroed discrimination for charged particle tracking

    International Nuclear Information System (INIS)

    Degerli, Y; Guilloux, F; Orsini, F

    2014-01-01

    With the aim of developing fast and granular Monolithic Active Pixels Sensors (MAPS) as new charged particle tracking detectors for high energy physics experiments, a new rolling shutter binary pixel architecture concept (RSBPix) with in-pixel correlated double sampling, amplification and discrimination is presented. The discriminator features auto-zeroing in order to compensate process-related transistor mismatches. In order to validate the pixel, a first monolithic CMOS sensor prototype, including a pixel array of 96 × 64 pixels, has been designed and fabricated in the Tower-Jazz 0.18 μm CMOS Image Sensor (CIS) process. Results of laboratory tests are presented

  6. Improvement to the signaling interface for CMOS pixel sensors

    Energy Technology Data Exchange (ETDEWEB)

    Shi, Zhan, E-mail: sz1134@163.com [Dalian University of Technology, No.2 Linggong Road, 116024 Dalian (China); Tang, Zhenan, E-mail: tangza@dlut.edu.cn [Dalian University of Technology, No.2 Linggong Road, 116024 Dalian (China); Feng, Chong [Dalian University of Technology, No.2 Linggong Road, 116024 Dalian (China); Dalian Minzu University, No.18 Liaohe West Road, 116600 Dalian (China); Cai, Hong [Dalian University of Technology, No.2 Linggong Road, 116024 Dalian (China)

    2016-10-01

    The development of the readout speed of CMOS pixel sensors (CPS) is motivated by the demanding requirements of future high energy physics (HEP) experiments. As the interface between CPS and the data acquisition (DAQ) system, which inputs clock from the DAQ system and outputs data from CPS, the signaling interface should also be improved in terms of data rates. Meanwhile, the power consumption of the signaling interface should be maintained as low as possible. Consequently, a reduced swing differential signaling (RSDS) driver was adopted instead of a low-voltage differential signaling (LVDS) driver to transmit data from CPS to the DAQ system. In order to increase the capability of data rates, a serial source termination technique was employed. A LVDS/RSDS receiver was employed for transmitting clock from the DAQ system to CPS. A new method of generating hysteresis and a special current comparator were used to achieve a higher speed with lower power consumption. The signaling interface was designed and submitted for fabrication in a 0.18 µm CMOS image sensor (CIS) process. Measurement results indicate that the RSDS driver and the LVDS receiver can operate correctly at a data rate of 2 Gb/s with a power consumption of 19.1 mW.

  7. Study of plasma charging-induced white pixel defect increase in CMOS active pixel sensor

    International Nuclear Information System (INIS)

    Tokashiki, Ken; Bai, KeunHee; Baek, KyeHyun; Kim, Yongjin; Min, Gyungjin; Kang, Changjin; Cho, Hanku; Moon, Jootae

    2007-01-01

    Plasma process-induced 'white pixel defect' (WPD) of CMOS active pixel sensor (APS) is studied for Si3N4 spacer etch back process by using a magnetically enhanced reactive ion etching (MERIE) system. WPD preferably takes place at the wafer edge region when the magnetized plasma is applied to Si3N4 etch. Plasma charging analysis reveals that the plasma charge-up characteristic is well matching the edge-intensive WPD generation, rather than the UV radiation. Plasma charging on APS transfer gate might lead to a gate leakage, which could play a role in generation of signal noise or WPD. In this article the WPD generation mechanism will be discussed from plasma charging point of view

  8. CMOS pixel development for the ATLAS experiment at HL-LHC

    CERN Document Server

    Rimoldi, Marco; The ATLAS collaboration

    2017-01-01

    To cope with the rate and radiation environment expected at the HL-LHC new approaches are being developed on CMOS pixel detectors, providing charge collection in a depleted layer. They are based on: HV enabling technologies that allow to use high depletion voltages, high resistivity wafers for large depletion depths; radiation hard processed with multiple nested wells to allow CMOS electronics embedded with sufficient shielding into the sensor substrate and backside processing and thinning for material minimization and backside voltage application. Since 2014, members of more than 20 groups in the ATLAS experiment are actively pursuing CMOS pixel R$\\&$D in an ATLAS Demonstrator program pursuing sensor design and characterizations. The goal of this program is to demonstrate that depleted CMOS pixels are suited for high rate, fast timing and high radiation operation at LHC. For this a number of technologies have been explored and characterized. In this presentation the challenges for the usage of CMOS pixel...

  9. The scope of detector Medipix2 in micro-radiography of biological samples

    International Nuclear Information System (INIS)

    Dammer, J.; Weyda, F.; Jakubek, J.; Skrabal, P.; Sopko, V.; Vavrik, D.

    2011-01-01

    We present our experimental setup devoted to high resolution X-ray micro-radiography that is suitable for imaging of small biological samples. The photon source is a FeinFocus micro-focus X-ray tube. The single photon counting pixel device Medipix2 serves as imaging area. Recently used imaging detectors as radiography films or scintillator detectors, cannot visualize required information about inner structure of scanned sample. Detectors Medipix2 do not suffer from so-called dark current noise and work in unlimited dynamic range. These features of detectors confer high quality and high contrast of final images. The radiographic imaging with detectors Medipix2 represents non-invasive and non-destructive method of investigation. Hereby, we demonstrate results of micro-radiographic study of internal structures of tiny biological samples. In addition to morphological and anatomical studies, we would like to present preliminary study of dynamic processes inside of organisms using micro-radiographic video-capturing.

  10. The scope of detector Medipix2 in micro-radiography of biological samples

    Energy Technology Data Exchange (ETDEWEB)

    Dammer, J., E-mail: jiri.dammer@utef.cvut.cz [Institute of Experimental and Applied Physics, Czech Technical University in Prague, Horska 3a/22, CZ-12800 Prague 2 (Czech Republic); Weyda, F. [Biology Centre of the Academy of Sciences of the Czech Republic, Institute of Entomology, Branisovska 31, CZ-37005 Ceske Budejovice (Czech Republic); Faculty of Science, University of South Bohemia, Branisovska 31, CZ-37005 Ceske Budejovice (Czech Republic); Jakubek, J. [Institute of Experimental and Applied Physics, Czech Technical University in Prague, Horska 3a/22, CZ-12800 Prague 2 (Czech Republic); Skrabal, P. [Faculty of Biomedical Engineering, Czech Technical University in Prague, Nam. Sitna 3105, CZ-272 01 Kladno (Czech Republic); Sopko, V.; Vavrik, D. [Institute of Experimental and Applied Physics, Czech Technical University in Prague, Horska 3a/22, CZ-12800 Prague 2 (Czech Republic)

    2011-05-15

    We present our experimental setup devoted to high resolution X-ray micro-radiography that is suitable for imaging of small biological samples. The photon source is a FeinFocus micro-focus X-ray tube. The single photon counting pixel device Medipix2 serves as imaging area. Recently used imaging detectors as radiography films or scintillator detectors, cannot visualize required information about inner structure of scanned sample. Detectors Medipix2 do not suffer from so-called dark current noise and work in unlimited dynamic range. These features of detectors confer high quality and high contrast of final images. The radiographic imaging with detectors Medipix2 represents non-invasive and non-destructive method of investigation. Hereby, we demonstrate results of micro-radiographic study of internal structures of tiny biological samples. In addition to morphological and anatomical studies, we would like to present preliminary study of dynamic processes inside of organisms using micro-radiographic video-capturing.

  11. Electronic dosimetry and neutron metrology by CMOS active pixel sensor

    International Nuclear Information System (INIS)

    Vanstalle, M.

    2011-01-01

    This work aims at demonstrating the possibility to use active pixel sensors as operational neutron dosemeters. To do so, the sensor that has been used has to be γ-transparent and to be able to detect neutrons on a wide energy range with a high detection efficiency. The response of the device, made of the CMOS sensor MIMOSA-5 and a converter in front of the sensor (polyethylene for fast neutron detection and 10 B for thermal neutron detection), has been compared with Monte Carlo simulations carried out with MCNPX and GEANT4. These codes have been before-hand validated to check they can be used properly for our application. Experiments to characterize the sensor have been performed at IPHC and at IRSN/LMDN (Cadarache). The results of the sensor irradiation to photon sources and mixed field ( 241 AmBe source) show the γ-transparency of the sensor by applying an appropriate threshold on the deposited energy (around 100 keV). The associated detection efficiency is satisfactory with a value of 10 -3 , in good agreement with MCNPX and GEANT4. Other features of the device have been tested with the same source, like the angular response. The last part of this work deals with the detection of thermal neutrons (eV-neutrons). Assays have been done in Cadarache (IRSN) with a 252 Cf source moderated with heavy water (with and without cadmium shell). Results asserted a very high detection efficiency (up to 6*10 -3 for a pure 10 B converter) in good agreement with GEANT4. (author)

  12. Development of CMOS pixel sensors for tracking and vertexing in high energy physics experiments

    CERN Document Server

    Senyukov, Serhiy; Besson, Auguste; Claus, Giles; Cousin, Loic; Dulinski, Wojciech; Goffe, Mathieu; Hippolyte, Boris; Maria, Robert; Molnar, Levente; Sanchez Castro, Xitzel; Winter, Marc

    2014-01-01

    CMOS pixel sensors (CPS) represent a novel technological approach to building charged particle detectors. CMOS processes allow to integrate a sensing volume and readout electronics in a single silicon die allowing to build sensors with a small pixel pitch ($\\sim 20 \\mu m$) and low material budget ($\\sim 0.2-0.3\\% X_0$) per layer. These characteristics make CPS an attractive option for vertexing and tracking systems of high energy physics experiments. Moreover, thanks to the mass production industrial CMOS processes used for the manufacturing of CPS the fabrication construction cost can be significantly reduced in comparison to more standard semiconductor technologies. However, the attainable performance level of the CPS in terms of radiation hardness and readout speed is mostly determined by the fabrication parameters of the CMOS processes available on the market rather than by the CPS intrinsic potential. The permanent evolution of commercial CMOS processes towards smaller feature sizes and high resistivity ...

  13. CMOS pixel development for the ATLAS experiment at HL-LHC

    CERN Document Server

    Risti{c}, Branislav; The ATLAS collaboration

    2017-01-01

    To cope with the rate and radiation environment expected at the HL-LHC new approaches are being developed on CMOS pixel detectors, providing charge collection in a depleted layer. They are based on: HV enabling technologies that allow to use high depletion voltages (HV-MAPS), high resistivity wafers for large depletion depths (HR-MAPS); radiation hard processed with multiple nested wells to allow CMOS electronics embedded with sufficient shielding into the sensor substrate and backside processing and thinning for material minimization and backside voltage application. Since 2014, members of more than 20 groups in the ATLAS experiment are actively pursuing CMOS pixel R&D in an ATLAS Demonstrator program pursuing sensor design and characterizations. The goal of this program is to demonstrate that depleted CMOS pixels, with monolithic or hybrid designs, are suited for high rate, fast timing and high radiation operation at LHC. For this a number of technologies have been explored and characterized. In this pr...

  14. Development of radiation hard CMOS active pixel sensors for HL-LHC

    International Nuclear Information System (INIS)

    Pernegger, Heinz

    2016-01-01

    New pixel detectors, based on commercial high voltage and/or high resistivity full CMOS processes, hold promise as next-generation active pixel sensors for inner and intermediate layers of the upgraded ATLAS tracker. The use of commercial CMOS processes allow cost-effective detector construction and simpler hybridisation techniques. The paper gives an overview of the results obtained on AMS-produced CMOS sensors coupled to the ATLAS Pixel FE-I4 readout chips. The SOI (silicon-on-insulator) produced sensors by XFAB hold great promise as radiation hard SOI-CMOS sensors due to their combination of partially depleted SOI transistors reducing back-gate effects. The test results include pre-/post-irradiation comparison, measurements of charge collection regions as well as test beam results.

  15. CMOS Pixel Development for the ATLAS Experiment at HL-LHC

    CERN Document Server

    Gaudiello, Andrea; The ATLAS collaboration

    2017-01-01

    To cope with the rate and radiation environment expected at the HL-LHC new approaches are being developed on CMOS pixel detectors, providing charge collection in a depleted layer. They are based on: HV enabling technologies that allow to use high depletion voltages (HV-MAPS), high resistivity wafers for large depletion depths (HR-MAPS); radiation hard processed with multiple nested wells to allow CMOS electronics embedded with sufficient shielding into the sensor substrate and backside processing and thinning for material minimization and backside voltage application. Since 2014, members of more than 20 groups in the ATLAS experiment are actively pursuing CMOS pixel R&D in an ATLAS Demonstrator program pursuing sensor design and characterizations. The goal of this program is to demonstrate that depleted CMOS pixels, with monolithic or hybrid designs, are suited for high rate, fast timing and high radiation operation at LHC. For this a number of technologies have been explored and characterized. In this pr...

  16. The Measurement of Spectral Characteristics and Composition of Radiation in Atlas with MEDIPIX2-USB Devices

    Science.gov (United States)

    Campbell, M.; Doležal, Z.; Greiffenberg, D.; Heijne, E.; Holy, T.; Idárraga, J.; Jakůbek, J.; Král, V.; Králík, M.; Lebel, C.; Leroy, C.; Llopart, X.; Lord, G.; Maneuski, D.; Ouellette, O.; Sochor, V.; Pospíšil, S.; Suk, M.; Tlustos, L.; Vykydal, Z.; Wilhelm, I.

    2008-06-01

    A network of devices to perform real-time measurements of the spectral characteristics and composition of radiation in the ATLAS detector and cavern during its operation is being built. This system of detectors will be a stand alone system fully capable of delivering real-time images of fluxes and spectral composition of different particle species including slow and fast neutrons. The devices are based on MEDIPIX2 pixel silicon detectors that will be operated via active USB cables and USB-Ethernet extenders through an Ethernet network by a PC located in the USA15 ATLAS control room. The installation of 14 devices inside ATLAS (detector and cavern) is in progress.

  17. The Measurement of Spectral Characteristics and Composition of Radiation in ATLAS with MEDIPIX2-USB Devices

    CERN Document Server

    Campbell, M.; Greiffenberg, D.; Heijne, E.; Holy, T.; Idárraga, J.; Jakubek, J.; Král, V.; Králík, M.; Lebel, C.; Leroy, C.; Llopart, X.; Lord, G.; Maneuski, D.; Ouellette, O.; Sochor, V.; Prospísil, S.; Suk, M; Tlustos, L.; Vykydal, Z.; Wilhelm, I.

    2008-01-01

    A network of devices to perform real-time measurements of the spectral characteristics and composition of radiation in the ATLAS detector and cavern during its operation is being built. This system of detectors will be a stand alone system fully capable of delivering real-time images of fluxes and spectral composition of different particle species including slow and fast neutrons. The devices are based on MEDIPIX2 pixel silicon detectors that will be operated via active USB cables and USB-Ethernet extenders through an Ethernet network by a PC located in the USA15 ATLAS control room. The installation of 14 devices inside ATLAS (detector and cavern) is in progress.

  18. Spatial Resolution of the Medipix-2 as Neutron Pixel Detector

    Czech Academy of Sciences Publication Activity Database

    Jakůbek, J.; Holý, T.; Lehmann, E.; Pospíšil, S.; Uher, J.; Vacík, J.; Vavřík, Daniel

    2005-01-01

    Roč. 546, - (2005), s. 164-169 ISSN 0168-9002. [International Workshop on Radiation Imaging Detectors /6./. Glasgow, Scotland, 25.07.2004-29.07.2004] Institutional research plan: CEZ:AV0Z20710524 Keywords : neutron detection * neutronography * X-ray Subject RIV: JB - Sensors, Measurment, Regulation Impact factor: 1.224, year: 2005

  19. 4T CMOS Active Pixel Sensors under Ionizing Radiation

    NARCIS (Netherlands)

    Tan, J.

    2013-01-01

    This thesis investigates the ionizing radiation effects on 4T pixels and the elementary in-pixel test devices with regard to the electrical performance and the optical performance. In addition to an analysis of the macroscopic pixel parameter degradation, the radiation-induced degradation mechanisms

  20. CMOS pixel sensor development for the ATLAS experiment at the High Luminosity-LHC

    Science.gov (United States)

    Rimoldi, M.

    2017-12-01

    The current ATLAS Inner Detector will be replaced with a fully silicon based detector called Inner Tracker (ITk) before the start of the High Luminosity-LHC project (HL-LHC) in 2026. To cope with the harsh environment expected at the HL-LHC, new approaches are being developed for pixel detectors based on CMOS technology. Such detectors can provide charge collection, analog amplification and digital processing in the same silicon wafer. The radiation hardness is improved thanks to multiple nested wells which give the embedded CMOS electronics sufficient shielding. The goal of this programme is to demonstrate that depleted CMOS pixels are suitable for high rate, fast timing and high radiation operation at the LHC . A number of alternative solutions have been explored and characterised. In this document, test results of the sensors fabricated in different CMOS processes are reported.

  1. CMOS pixel sensor development for the ATLAS experiment at the High Luminosity-LHC

    CERN Document Server

    Rimoldi, Marco; The ATLAS collaboration

    2017-01-01

    The current ATLAS Inner Detector will be replaced with a fully silicon based detector called Inner Tracker (ITk) before the start of the High Luminosity-LHC project (HL-LHC) in 2026. To cope with the harsh environment expected at the HL-LHC, new approaches are being developed for pixel detector based on CMOS pixel techology. Such detectors provide charge collection, analog and digital amplification in the same silicon bulk. The radiation hardness is obtained with multiple nested wells that have embedded the CMOS electronics with sufficient shielding. The goal of this programme is to demonstrate that depleted CMOS pixels are suitable for high rate, fast timing and high radiation operation at the LHC. A number of alternative solutions have been explored and characterised, and are presented in this document.

  2. Radiation hard pixel sensors using high-resistive wafers in a 150 nm CMOS processing line

    Science.gov (United States)

    Pohl, D.-L.; Hemperek, T.; Caicedo, I.; Gonella, L.; Hügging, F.; Janssen, J.; Krüger, H.; Macchiolo, A.; Owtscharenko, N.; Vigani, L.; Wermes, N.

    2017-06-01

    Pixel sensors using 8'' CMOS processing technology have been designed and characterized offering the benefits of industrial sensor fabrication, including large wafers, high throughput and yield, as well as low cost. The pixel sensors are produced using a 150 nm CMOS technology offered by LFoundry in Avezzano. The technology provides multiple metal and polysilicon layers, as well as metal-insulator-metal capacitors that can be employed for AC-coupling and redistribution layers. Several prototypes were fabricated and are characterized with minimum ionizing particles before and after irradiation to fluences up to 1.1 × 1015 neq cm-2. The CMOS-fabricated sensors perform equally well as standard pixel sensors in terms of noise and hit detection efficiency. AC-coupled sensors even reach 100% hit efficiency in a 3.2 GeV electron beam before irradiation.

  3. CMOS Active Pixel Sensor Star Tracker with Regional Electronic Shutter

    Science.gov (United States)

    Yadid-Pecht, Orly; Pain, Bedabrata; Staller, Craig; Clark, Christopher; Fossum, Eric

    1996-01-01

    The guidance system in a spacecraft determines spacecraft attitude by matching an observed star field to a star catalog....An APS(active pixel sensor)-based system can reduce mass and power consumption and radiation effects compared to a CCD(charge-coupled device)-based system...This paper reports an APS (active pixel sensor) with locally variable times, achieved through individual pixel reset (IPR).

  4. 1T Pixel Using Floating-Body MOSFET for CMOS Image Sensors.

    Science.gov (United States)

    Lu, Guo-Neng; Tournier, Arnaud; Roy, François; Deschamps, Benoît

    2009-01-01

    We present a single-transistor pixel for CMOS image sensors (CIS). It is a floating-body MOSFET structure, which is used as photo-sensing device and source-follower transistor, and can be controlled to store and evacuate charges. Our investigation into this 1T pixel structure includes modeling to obtain analytical description of conversion gain. Model validation has been done by comparing theoretical predictions and experimental results. On the other hand, the 1T pixel structure has been implemented in different configurations, including rectangular-gate and ring-gate designs, and variations of oxidation parameters for the fabrication process. The pixel characteristics are presented and discussed.

  5. Integrated imaging sensor systems with CMOS active pixel sensor technology

    Science.gov (United States)

    Yang, G.; Cunningham, T.; Ortiz, M.; Heynssens, J.; Sun, C.; Hancock, B.; Seshadri, S.; Wrigley, C.; McCarty, K.; Pain, B.

    2002-01-01

    This paper discusses common approaches to CMOS APS technology, as well as specific results on the five-wire programmable digital camera-on-a-chip developed at JPL. The paper also reports recent research in the design, operation, and performance of APS imagers for several imager applications.

  6. A CMOS Image Sensor With In-Pixel Buried-Channel Source Follower and Optimized Row Selector

    NARCIS (Netherlands)

    Chen, Y.; Wang, X.; Mierop, A.J.; Theuwissen, A.J.P.

    2009-01-01

    This paper presents a CMOS imager sensor with pinned-photodiode 4T active pixels which use in-pixel buried-channel source followers (SFs) and optimized row selectors. The test sensor has been fabricated in a 0.18-mum CMOS process. The sensor characterization was carried out successfully, and the

  7. Application-specific architectures of CMOS monolithic active pixel sensors

    Energy Technology Data Exchange (ETDEWEB)

    Szelezniak, Michal [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France)]. E-mail: michal.szelezniak@ires.in2p3.fr; Besson, Auguste [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); Claus, Gilles; Colledani, Claude; [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); Degerli, Yavuz [CEA Saclay, DAPNIA, Gif-sur-Yvette Cedex (France); Deptuch, Grzegorz [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); Deveaux, Michael [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); GSI, Planckstrasse 1, Darmstadt 64291 (Germany); Dorokhov, Andrei [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); Dulinski, Wojciech [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); Fourches, Nicolas [CEA Saclay, DAPNIA, Gif-sur-Yvette Cedex (France); Goffe, Mathieu [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); Grandjean, Damien; Guilloux, Fabrice [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); Heini, Sebastien [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France)]|[GSI, Planckstrasse 1, Darmstadt 64291 (Germany); Himmi, Abdelkader [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); Hu, Christine [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); Jaaskelainen, Kimmo; Li, Yan; Lutz, Pierre; Orsini, Fabienne [CEA Saclay, DAPNIA, Gif-sur-Yvette Cedex (France); Pellicioli, Michel; Shabetai, Alexandre; Valin, Isabelle; Winter, Marc [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France)

    2006-11-30

    Several development directions intended to adapt and optimize monolithic active pixel sensors for specific applications are presented in this work. The first example, compatible with the STAR microvertex upgrade, is based on a simple two-transistor pixel circuitry. It is suited for a long integration time, room-temperature operation and minimum power dissipation. In another approach for this application, a specific readout method is proposed, allowing optimization of the integration time independently of the full frame-readout time. The circuit consists of an in-pixel front-end voltage amplifier, with a gain on the order of five, followed by two analog memory cells. The extended version of this scheme, based on the implementation of more memory cells per pixel, is the solution considered for the outer layers of a microvertex detector at the international linear collider. For the two innermost layers, a circuit allowing fast frame scans together with on-line, on-chip data sparsification is proposed. The first results of this prototype demonstrate that the fixed pattern dispersion is reduced below a noise level of 15 e{sup -}, allowing the use of a single comparator or a low-resolution ADC per pixel column. A common element for most of the mentioned readout schemes is a low-noise, low power consumption, layout efficient in-pixel amplifier. A review of possible solutions for this element together with some experimental results is presented.

  8. CMOS Pixel Development for the ATLAS Experiment at HL-LHC

    CERN Document Server

    Ristic, Branislav; The ATLAS collaboration

    2017-01-01

    To cope with the rate and radiation environment expected at the HL-LHC new approaches are being developed on CMOS pixel detectors, providing charge collection in a depleted layer. They are based on technologies that allow to use high depletion voltages (HV-MAPS) and high resistivity wafers (HR-MAPS) for large depletion depths; radiation hard processed with multiple nested wells to allow CMOS electronics to be embedded safely into the sensor substrate. We are investigating depleted CMOS pixels with monolithic or hybrid designs concerning their suitability for high rate, fast timing and high radiation operation at LHC. This paper will discuss recent results on the main candidate technologies and the current development towards a monolithic solution.

  9. TCAD simulations of High-Voltage-CMOS Pixel structures for the CLIC vertex detector

    CERN Document Server

    Buckland, Matthew Daniel

    2016-01-01

    The requirements for precision physics and the experimental conditions at CLIC result in stringent constraints for the vertex detector. Capacitively coupled active pixel sensors with 25 μm pitch implemented in a commercial 180 nm High-Voltage CMOS (HV-CMOS) process are currently under study as a candidate technology for the CLIC vertex detector. Laboratory calibration measurements and beam tests with prototypes are complemented by detailed TCAD and electronic circuit simulations, aiming for a comprehensive understanding of the signal formation in the HV-CMOS sensors and subsequent readout stages. In this note 2D and 3D TCAD simulation results of the prototype sensor, the Capacitively Coupled Pixel Detector version three (CCPDv3), will be presented. These include the electric field distribution, leakage current, well capacitance, transient response to minimum ionising particles and charge-collection.

  10. CMOS Active-Pixel Image Sensor With Intensity-Driven Readout

    Science.gov (United States)

    Langenbacher, Harry T.; Fossum, Eric R.; Kemeny, Sabrina

    1996-01-01

    Proposed complementary metal oxide/semiconductor (CMOS) integrated-circuit image sensor automatically provides readouts from pixels in order of decreasing illumination intensity. Sensor operated in integration mode. Particularly useful in number of image-sensing tasks, including diffractive laser range-finding, three-dimensional imaging, event-driven readout of sparse sensor arrays, and star tracking.

  11. Low Power Camera-on-a-Chip Using CMOS Active Pixel Sensor Technology

    Science.gov (United States)

    Fossum, E. R.

    1995-01-01

    A second generation image sensor technology has been developed at the NASA Jet Propulsion Laboratory as a result of the continuing need to miniaturize space science imaging instruments. Implemented using standard CMOS, the active pixel sensor (APS) technology permits the integration of the detector array with on-chip timing, control and signal chain electronics, including analog-to-digital conversion.

  12. CMOS Active Pixel Sensors for Low Power, Highly Miniaturized Imaging Systems

    Science.gov (United States)

    Fossum, Eric R.

    1996-01-01

    The complementary metal-oxide-semiconductor (CMOS) active pixel sensor (APS) technology has been developed over the past three years by NASA at the Jet Propulsion Laboratory, and has reached a level of performance comparable to CCDs with greatly increased functionality but at a very reduced power level.

  13. Geant4-based simulations of charge collection in CMOS Active Pixel Sensors

    International Nuclear Information System (INIS)

    Esposito, M.; Allinson, N.M.; Price, T.; Anaxagoras, T.

    2017-01-01

    Geant4 is an object-oriented toolkit for the simulation of the interaction of particles and radiation with matter. It provides a snapshot of the state of a simulated particle in time, as it travels through a specified geometry. One important area of application is the modelling of radiation detector systems. Here, we extend the abilities of such modelling to include charge transport and sharing in pixelated CMOS Active Pixel Sensors (APSs); though similar effects occur in other pixel detectors. The CMOS APSs discussed were developed in the framework of the PRaVDA consortium to assist the design of custom sensors to be used in an energy-range detector for proton Computed Tomography (pCT). The development of ad-hoc classes, providing a charge transport model for a CMOS APS and its integration into the standard Geant4 toolkit, is described. The proposed charge transport model includes, charge generation, diffusion, collection, and sharing across adjacent pixels, as well as the full electronic chain for a CMOS APS. The proposed model is validated against experimental data acquired with protons in an energy range relevant for pCT.

  14. Development of Pixel Front-End Electronics using Advanced Deep Submicron CMOS Technologies

    CERN Document Server

    Havránek, Miroslav; Dingfelder, Jochen

    The content of this thesis is oriented on the R&D; of microelectronic integrated circuits for processing the signal from particle sensors and partially on the sensors themselves. This work is motivated by ongoing upgrades of the ATLAS Pixel Detector at CERN laboratory and by exploration of new technologies for the future experiments in particle physics. Evolution of technologies for the fabrication of microelectronic circuits follows Moore’s laws. Transistors become smaller and electronic chips reach higher complexity. Apart from this, silicon foundries become more open to smaller customers and often provide non-standard process options. Two new directions in pixel technologies are explored in this thesis: design of pixel electronics using ultra deep submicron (65 nm) CMOS technology and Depleted Monolithic Active Pixel Sensors (DMAPS). An independent project concerning the measurement of pixel capacitance with a dedicated measurement chip is a part of this thesis. Pixel capacitance is one of the key pa...

  15. Proof of principle study of the use of a CMOS active pixel sensor for proton radiography.

    Science.gov (United States)

    Seco, Joao; Depauw, Nicolas

    2011-02-01

    Proof of principle study of the use of a CMOS active pixel sensor (APS) in producing proton radiographic images using the proton beam at the Massachusetts General Hospital (MGH). A CMOS APS, previously tested for use in s-ray radiation therapy applications, was used for proton beam radiographic imaging at the MGH. Two different setups were used as a proof of principle that CMOS can be used as proton imaging device: (i) a pen with two metal screws to assess spatial resolution of the CMOS and (ii) a phantom with lung tissue, bone tissue, and water to assess tissue contrast of the CMOS. The sensor was then traversed by a double scattered monoenergetic proton beam at 117 MeV, and the energy deposition inside the detector was recorded to assess its energy response. Conventional x-ray images with similar setup at voltages of 70 kVp and proton images using commercial Gafchromic EBT 2 and Kodak X-Omat V films were also taken for comparison purposes. Images were successfully acquired and compared to x-ray kVp and proton EBT2/X-Omat film images. The spatial resolution of the CMOS detector image is subjectively comparable to the EBT2 and Kodak X-Omat V film images obtained at the same object-detector distance. X-rays have apparent higher spatial resolution than the CMOS. However, further studies with different commercial films using proton beam irradiation demonstrate that the distance of the detector to the object is important to the amount of proton scatter contributing to the proton image. Proton images obtained with films at different distances from the source indicate that proton scatter significantly affects the CMOS image quality. Proton radiographic images were successfully acquired at MGH using a CMOS active pixel sensor detector. The CMOS demonstrated spatial resolution subjectively comparable to films at the same object-detector distance. Further work will be done in order to establish the spatial and energy resolution of the CMOS detector for protons. The

  16. Photodiode area effect on performance of X-ray CMOS active pixel sensors

    Science.gov (United States)

    Kim, M. S.; Kim, Y.; Kim, G.; Lim, K. T.; Cho, G.; Kim, D.

    2018-02-01

    Compared to conventional TFT-based X-ray imaging devices, CMOS-based X-ray imaging sensors are considered next generation because they can be manufactured in very small pixel pitches and can acquire high-speed images. In addition, CMOS-based sensors have the advantage of integration of various functional circuits within the sensor. The image quality can also be improved by the high fill-factor in large pixels. If the size of the subject is small, the size of the pixel must be reduced as a consequence. In addition, the fill factor must be reduced to aggregate various functional circuits within the pixel. In this study, 3T-APS (active pixel sensor) with photodiodes of four different sizes were fabricated and evaluated. It is well known that a larger photodiode leads to improved overall performance. Nonetheless, if the size of the photodiode is > 1000 μm2, the degree to which the sensor performance increases as the photodiode size increases, is reduced. As a result, considering the fill factor, pixel-pitch > 32 μm is not necessary to achieve high-efficiency image quality. In addition, poor image quality is to be expected unless special sensor-design techniques are included for sensors with a pixel pitch of 25 μm or less.

  17. Radiation hardness of CMOS monolithic active pixel sensors manufactured in a 0.18 μm CMOS process

    Energy Technology Data Exchange (ETDEWEB)

    Linnik, Benjamin [Goethe-Universitaet Frankfurt (Germany); Collaboration: CBM-MVD-Collaboration

    2015-07-01

    CMOS Monolithic Active Pixels Sensors (MAPS) are considered as the technology of choice for various vertex detectors in particle and heavy-ion physics including the STAR HFT, the upgrade of the ALICE ITS, the future ILC detectors and the CBM experiment at FAIR. To match the requirements of those detectors, their hardness to radiation is being improved, among others in a joined research activity of the Goethe University Frankfurt and the IPHC Strasbourg. It was assumed that combining an improved high resistivity (1-8 kΩcm) sensitive medium with the features of a 0.18 μm CMOS process, is suited to reach substantial improvements in terms of radiation hardness as compared to earlier sensor designs. This strategy was tested with a novel generation of sensor prototypes named MIMOSA-32 and MIMOSA-34. We show results on the radiation hardness of those sensors and discuss its impact on the design of future vertex detectors.

  18. Investigation of CMOS pixel sensor with 0.18 μm CMOS technology for high-precision tracking detector

    International Nuclear Information System (INIS)

    Zhang, L.; Wang, M.; Fu, M.; Zhang, Y.; Yan, W.

    2017-01-01

    The Circular Electron Positron Collider (CEPC) proposed by the Chinese high energy physics community is aiming to measure Higgs particles and their interactions precisely. The tracking detector including Silicon Inner Tracker (SIT) and Forward Tracking Disks (FTD) has driven stringent requirements on sensor technologies in term of spatial resolution, power consumption and readout speed. CMOS Pixel Sensor (CPS) is a promising candidate to approach these requirements. This paper presents the preliminary studies on the sensor optimization for tracking detector to achieve high collection efficiency while keeping necessary spatial resolution. Detailed studies have been performed on the charge collection using a 0.18 μm CMOS image sensor process. This process allows high resistivity epitaxial layer, leading to a significant improvement on the charge collection and therefore improving the radiation tolerance. Together with the simulation results, the first exploratory prototype has bee designed and fabricated. The prototype includes 9 different pixel arrays, which vary in terms of pixel pitch, diode size and geometry. The total area of the prototype amounts to 2 × 7.88 mm 2 .

  19. High-speed imaging using CMOS image sensor with quasi pixel-wise exposure

    Science.gov (United States)

    Sonoda, T.; Nagahara, H.; Endo, K.; Sugiyama, Y.; Taniguchi, R.

    2017-02-01

    Several recent studies in compressive video sensing have realized scene capture beyond the fundamental trade-off limit between spatial resolution and temporal resolution using random space-time sampling. However, most of these studies showed results for higher frame rate video that were produced by simulation experiments or using an optically simulated random sampling camera, because there are currently no commercially available image sensors with random exposure or sampling capabilities. We fabricated a prototype complementary metal oxide semiconductor (CMOS) image sensor with quasi pixel-wise exposure timing that can realize nonuniform space-time sampling. The prototype sensor can reset exposures independently by columns and fix these amount of exposure by rows for each 8x8 pixel block. This CMOS sensor is not fully controllable via the pixels, and has line-dependent controls, but it offers flexibility when compared with regular CMOS or charge-coupled device sensors with global or rolling shutters. We propose a method to realize pseudo-random sampling for high-speed video acquisition that uses the flexibility of the CMOS sensor. We reconstruct the high-speed video sequence from the images produced by pseudo-random sampling using an over-complete dictionary.

  20. Beam test results for the RAPS03 non-epitaxial CMOS active pixel sensor

    International Nuclear Information System (INIS)

    Biagetti, Daniele; Marras, Alessandro; Meroli, Stefano; Passeri, Daniele; Placidi, Pisana; Servoli, Leonello; Tucceri, Paola

    2011-01-01

    Recently our group has been investigating the possibility of using a standard CMOS technology - featuring no epitaxial layer - to fabricate a sensor for charged particle detection. In this work we present the results obtained exposing sensors with 256x256 pixels (10x10μm pixel size, two different pixel layouts) to 180 GeV protons and positrons at the SuperProtoSynchrotron facility (CERN). We have investigated the different response of the two architectural options in terms of S/N, cluster width, intrinsic spatial resolution, efficiency. The results show a good Landau response, S/N about 22 with an average cluster size of 4.5 pixels, and an intrinsic spatial resolution of 1.5μm (order of 1/7th of the pixel size).

  1. CMOS Pixel Sensors for High Precision Beam Telescopes and Vertex Detectors

    International Nuclear Information System (INIS)

    Masi, R. de; Baudot, J.; Fontaine, J.-Ch.

    2009-01-01

    CMOS sensors of the MIMOSA (standing for Minimum Ionising particle MOS Active pixel sensor) series are developed at IPHC since a decade and have ended up with full scale devices used in beam telescopes and in demonstrators of future vertex detectors. The sensors deliver analogue, unfiltered, signals and are therefore limited to read-out frequencies of ∼ 1 kframe/s. Since a few years, a fast architecture is being developed in collaboration with IRFU, which aims to speed up the read-out by 1-2 orders of magnitude. The first full scale sensor based on this architecture was fabricated recently and is being tested. Made of 660,000 pixels (18 μm pitch) covering an active area of ∼ 2 cm 2 , it delivers zero-suppressed binary signals, which allow running at ∼ 10 kframes/s. It will equip the beam telescope of the E.U. project EUDET and serve as a forerunner of the sensor equipping the 2 layers of the PIXEL detector of the STAR experiment at RHIC. The contribution to the conference will overview the main features and test results of this pioneering sensor. It will next describe its evolution towards read-out frequencies approaching 100 kframes/s, as required for the vertex detectors of the CBM experiment at FAIR and at the ILC. Finally, the issue of radiation tolerance will be addressed, in the context of a newly available CMOS process using a depleted substrate. A prototype sensor was fabricated in a such CMOS process. The talk will summarise beam test results showing, for the first time, that fluences of 10 14 n eq /cm 2 may be tolerable for CMOS sensors. Overall, the talk provides an overview of the status and plans of CMOS pixel sensors at the frontier of their achievements and outreach. (author)

  2. Development of CMOS Pixel Sensors fully adapted to the ILD Vertex Detector Requirements

    CERN Document Server

    Winter, Marc; Besson, Auguste; Claus, Gilles; Dorokhov, Andrei; Goffe, Mathieu; Hu-Guo, Christine; Morel, Frederic; Valin, Isabelle; Voutsinas, Georgios; Zhang, Liang

    2012-01-01

    CMOS Pixel Sensors are making steady progress towards the specifications of the ILD vertex detector. Recent developments are summarised, which show that these devices are close to comply with all major requirements, in particular the read-out speed needed to cope with the beam related background. This achievement is grounded on the double- sided ladder concept, which allows combining signals generated by a single particle in two different sensors, one devoted to spatial resolution and the other to time stamp, both assembled on the same mechanical support. The status of the development is overviewed as well as the plans to finalise it using an advanced CMOS process.

  3. Study of prototypes of LFoundry active CMOS pixels sensors for the ATLAS detector

    Science.gov (United States)

    Vigani, L.; Bortoletto, D.; Ambroz, L.; Plackett, R.; Hemperek, T.; Rymaszewski, P.; Wang, T.; Krueger, H.; Hirono, T.; Caicedo Sierra, I.; Wermes, N.; Barbero, M.; Bhat, S.; Breugnon, P.; Chen, Z.; Godiot, S.; Pangaud, P.; Rozanov, A.

    2018-02-01

    Current high energy particle physics experiments at the LHC use hybrid silicon detectors, in both pixel and strip configurations, for their inner trackers. These detectors have proven to be very reliable and performant. Nevertheless, there is great interest in depleted CMOS silicon detectors, which could achieve a similar performance at lower cost of production. We present recent developments of this technology in the framework of the ATLAS CMOS demonstrator project. In particular, studies of two active sensors from LFoundry, CCPD_LF and LFCPIX, are shown.

  4. Study of prototypes of LFoundry active CMOS pixels sensors for the ATLAS detector

    CERN Document Server

    Vigani, L.; Ambroz, L.; Plackett, R.; Hemperek, T.; Rymaszewski, P.; Wang, T.; Krueger, H.; Hirono, T.; Caicedo Sierra, I.; Wermes, N.; Barbero, M.; Bhat, S.; Breugnon, P.; Chen, Z.; Godiot, S.; Pangaud, P.; Rozanov, A.

    2018-01-01

    Current high energy particle physics experiments at the LHC use hybrid silicon detectors, in both pixel and strip configurations, for their inner trackers. These detectors have proven to be very reliable and performant. Nevertheless, there is great interest in depleted CMOS silicon detectors, which could achieve a similar performance at lower cost of production. We present recent developments of this technology in the framework of the ATLAS CMOS demonstrator project. In particular, studies of two active sensors from LFoundry, CCPD_LF and LFCPIX, are shown.

  5. Monolithic pixel development in 180 nm CMOS for the outer pixel layers in the ATLAS experiment

    CERN Document Server

    Kugathasan, Thanushan; Buttar, Craig; Berdalovic, Ivan; Blochet, Bastien; Cardella, Roberto Calogero; Dalla, Marco; Egidos Plaja, Nuria; Hemperek, Tomasz; Van Hoorne, Jacobus Willem; Maneuski, Dima; Marin Tobon, Cesar Augusto; Moustakas, Konstantinos; Mugnier, Herve; Musa, Luciano; Pernegger, Heinz; Riedler, Petra; Riegel, Christian; Rousset, Jerome; Sbarra, Carla; Schaefer, Douglas Michael; Schioppa, Enrico Junior; Sharma, Abhishek; Snoeys, Walter; Solans Sanchez, Carlos; Wang, Tianyang; Wermes, Norbert

    2017-01-01

    The ATLAS experiment at CERN plans to upgrade its Inner Tracking System for the High-Luminosity LHC in 2026. After the ALPIDE monolithic sensor for the ALICE ITS was successfully implemented in a 180 nm CMOS Imaging Sensor technology, the process was modified to combine full sensor depletion with a low sensor capacitance (≈ 2.5fF), for increased radiation tolerance and low analog power consumption. Efficiency and charge collection time were measured with comparisons before and after irradiation. This paper summarises the measurements and the ATLAS-specific development towards full-reticle size CMOS sensors and modules in this modified technology.

  6. Testbeam results of irradiated ams H18 HV-CMOS pixel sensor prototypes

    Science.gov (United States)

    Benoit, M.; Braccini, S.; Casse, G.; Chen, H.; Chen, K.; Di Bello, F. A.; Ferrere, D.; Golling, T.; Gonzalez-Sevilla, S.; Iacobucci, G.; Kiehn, M.; Lanni, F.; Liu, H.; Meng, L.; Merlassino, C.; Miucci, A.; Muenstermann, D.; Nessi, M.; Okawa, H.; Perić, I.; Rimoldi, M.; Ristić, B.; Barrero Pinto, M. Vicente; Vossebeld, J.; Weber, M.; Weston, T.; Wu, W.; Xu, L.; Zaffaroni, E.

    2018-02-01

    HV-CMOS pixel sensors are a promising option for the tracker upgrade of the ATLAS experiment at the LHC, as well as for other future tracking applications in which large areas are to be instrumented with radiation-tolerant silicon pixel sensors. We present results of testbeam characterisations of the 4th generation of Capacitively Coupled Pixel Detectors (CCPDv4) produced with the ams H18 HV-CMOS process that have been irradiated with different particles (reactor neutrons and 18 MeV protons) to fluences between 1× 1014 and 5× 1015 1-MeV- neq. The sensors were glued to ATLAS FE-I4 pixel readout chips and measured at the CERN SPS H8 beamline using the FE-I4 beam telescope. Results for all fluences are very encouraging with all hit efficiencies being better than 97% for bias voltages of 85 V. The sample irradiated to a fluence of 1× 1015 neq—a relevant value for a large volume of the upgraded tracker—exhibited 99.7% average hit efficiency. The results give strong evidence for the radiation tolerance of HV-CMOS sensors and their suitability as sensors for the experimental HL-LHC upgrades and future large-area silicon-based tracking detectors in high-radiation environments.

  7. Characterization of pixel sensor designed in 180 nm SOI CMOS technology

    Science.gov (United States)

    Benka, T.; Havranek, M.; Hejtmanek, M.; Jakovenko, J.; Janoska, Z.; Marcisovska, M.; Marcisovsky, M.; Neue, G.; Tomasek, L.; Vrba, V.

    2018-01-01

    A new type of X-ray imaging Monolithic Active Pixel Sensor (MAPS), X-CHIP-02, was developed using a 180 nm deep submicron Silicon On Insulator (SOI) CMOS commercial technology. Two pixel matrices were integrated into the prototype chip, which differ by the pixel pitch of 50 μm and 100 μm. The X-CHIP-02 contains several test structures, which are useful for characterization of individual blocks. The sensitive part of the pixel integrated in the handle wafer is one of the key structures designed for testing. The purpose of this structure is to determine the capacitance of the sensitive part (diode in the MAPS pixel). The measured capacitance is 2.9 fF for 50 μm pixel pitch and 4.8 fF for 100 μm pixel pitch at -100 V (default operational voltage). This structure was used to measure the IV characteristics of the sensitive diode. In this work, we report on a circuit designed for precise determination of sensor capacitance and IV characteristics of both pixel types with respect to X-ray irradiation. The motivation for measurement of the sensor capacitance was its importance for the design of front-end amplifier circuits. The design of pixel elements, as well as circuit simulation and laboratory measurement techniques are described. The experimental results are of great importance for further development of MAPS sensors in this technology.

  8. Design and Characterization of 64K Pixels Chips Working in Single Photon Processing Mode

    CERN Document Server

    Llopart Cudie, Xavier; Campbell, M

    2007-01-01

    Progress in CMOS technology and in fine pitch bump bonding has made possible the development of high granularity single photon counting detectors for X-ray imaging. This thesis studies the design and characterization of three pulse processing chips with 65536 square pixels of 55 µm x 55 µm designed in a commercial 0.25 µm 6-metal CMOS technology. The 3 chips share the same architecture and dimensions and are named Medipix2, Mpix2MXR20 and Timepix. The Medipix2 chip is a pixel detector readout chip consisting of 256 x 256 identical elements, each working in single photon counting mode for positive or negative input charge signals. The preamplifier feedback provides compensation for detector leakage current on a pixel by pixel basis. Two identical pulse height discriminators are used to define an energy window. Every event falling inside the energy window is counted with a 13 bit pseudo-random counter. The counter logic, based in a shift register, also behaves as the input/output register for the pixel. Each...

  9. Performance of a novel wafer scale CMOS active pixel sensor for bio-medical imaging

    International Nuclear Information System (INIS)

    Esposito, M; Evans, P M; Wells, K; Anaxagoras, T; Konstantinidis, A C; Zheng, Y; Speller, R D; Allinson, N M

    2014-01-01

    Recently CMOS active pixels sensors (APSs) have become a valuable alternative to amorphous silicon and selenium flat panel imagers (FPIs) in bio-medical imaging applications. CMOS APSs can now be scaled up to the standard 20 cm diameter wafer size by means of a reticle stitching block process. However, despite wafer scale CMOS APS being monolithic, sources of non-uniformity of response and regional variations can persist representing a significant challenge for wafer scale sensor response. Non-uniformity of stitched sensors can arise from a number of factors related to the manufacturing process, including variation of amplification, variation between readout components, wafer defects and process variations across the wafer due to manufacturing processes. This paper reports on an investigation into the spatial non-uniformity and regional variations of a wafer scale stitched CMOS APS. For the first time a per-pixel analysis of the electro-optical performance of a wafer CMOS APS is presented, to address inhomogeneity issues arising from the stitching techniques used to manufacture wafer scale sensors. A complete model of the signal generation in the pixel array has been provided and proved capable of accounting for noise and gain variations across the pixel array. This novel analysis leads to readout noise and conversion gain being evaluated at pixel level, stitching block level and in regions of interest, resulting in a coefficient of variation ⩽1.9%. The uniformity of the image quality performance has been further investigated in a typical x-ray application, i.e. mammography, showing a uniformity in terms of CNR among the highest when compared with mammography detectors commonly used in clinical practice. Finally, in order to compare the detection capability of this novel APS with the technology currently used (i.e. FPIs), theoretical evaluation of the detection quantum efficiency (DQE) at zero-frequency has been performed, resulting in a higher DQE for this

  10. Performance of a novel wafer scale CMOS active pixel sensor for bio-medical imaging.

    Science.gov (United States)

    Esposito, M; Anaxagoras, T; Konstantinidis, A C; Zheng, Y; Speller, R D; Evans, P M; Allinson, N M; Wells, K

    2014-07-07

    Recently CMOS active pixels sensors (APSs) have become a valuable alternative to amorphous silicon and selenium flat panel imagers (FPIs) in bio-medical imaging applications. CMOS APSs can now be scaled up to the standard 20 cm diameter wafer size by means of a reticle stitching block process. However, despite wafer scale CMOS APS being monolithic, sources of non-uniformity of response and regional variations can persist representing a significant challenge for wafer scale sensor response. Non-uniformity of stitched sensors can arise from a number of factors related to the manufacturing process, including variation of amplification, variation between readout components, wafer defects and process variations across the wafer due to manufacturing processes. This paper reports on an investigation into the spatial non-uniformity and regional variations of a wafer scale stitched CMOS APS. For the first time a per-pixel analysis of the electro-optical performance of a wafer CMOS APS is presented, to address inhomogeneity issues arising from the stitching techniques used to manufacture wafer scale sensors. A complete model of the signal generation in the pixel array has been provided and proved capable of accounting for noise and gain variations across the pixel array. This novel analysis leads to readout noise and conversion gain being evaluated at pixel level, stitching block level and in regions of interest, resulting in a coefficient of variation ⩽1.9%. The uniformity of the image quality performance has been further investigated in a typical x-ray application, i.e. mammography, showing a uniformity in terms of CNR among the highest when compared with mammography detectors commonly used in clinical practice. Finally, in order to compare the detection capability of this novel APS with the technology currently used (i.e. FPIs), theoretical evaluation of the detection quantum efficiency (DQE) at zero-frequency has been performed, resulting in a higher DQE for this

  11. Two-dimensional pixel image lag simulation and optimization in a 4-T CMOS image sensor

    Energy Technology Data Exchange (ETDEWEB)

    Yu Junting; Li Binqiao; Yu Pingping; Xu Jiangtao [School of Electronics Information Engineering, Tianjin University, Tianjin 300072 (China); Mou Cun, E-mail: xujiangtao@tju.edu.c [Logistics Management Office, Hebei University of Technology, Tianjin 300130 (China)

    2010-09-15

    Pixel image lag in a 4-T CMOS image sensor is analyzed and simulated in a two-dimensional model. Strategies of reducing image lag are discussed from transfer gate channel threshold voltage doping adjustment, PPD N-type doping dose/implant tilt adjustment and transfer gate operation voltage adjustment for signal electron transfer. With the computer analysis tool ISE-TCAD, simulation results show that minimum image lag can be obtained at a pinned photodiode n-type doping dose of 7.0 x 10{sup 12} cm{sup -2}, an implant tilt of -2{sup 0}, a transfer gate channel doping dose of 3.0 x 10{sup 12} cm{sup -2} and an operation voltage of 3.4 V. The conclusions of this theoretical analysis can be a guideline for pixel design to improve the performance of 4-T CMOS image sensors. (semiconductor devices)

  12. RAPS: an innovative active pixel for particle detection integrated in CMOS technology

    International Nuclear Information System (INIS)

    Passeri, Daniele; Placidi, Pisana; Verducci, Leonardo; Ciampolini, Paolo; Matrella, Guido; Marras, Alessandro; Bilei, G.M.

    2004-01-01

    In this paper we discuss some design, implementation and test issues, with respect to the development of the RAPS01 chip in the framework of the Radiation Active Pixel Sensors (RAPS) INFN project. The project aimed at verifying feasibility of smart, high-resolution pixel arrays with a fully standard, submicron CMOS technology for particle detection purposes. Layout optimization of the pixel, including sensitive element and local read and amplification circuits has been carried out. Different basic pixel schemes and read-out options have been proposed and devised. Chip fabrication has been completed and test phase is now under way: to this purpose a suitable test environment has been devised and test strategies have been planned

  13. 1T Pixel Using Floating-Body MOSFET for CMOS Image Sensors

    Directory of Open Access Journals (Sweden)

    Guo-Neng Lu

    2009-01-01

    Full Text Available We present a single-transistor pixel for CMOS image sensors (CIS. It is a floating-body MOSFET structure, which is used as photo-sensing device and source-follower transistor, and can be controlled to store and evacuate charges. Our investigation into this 1T pixel structure includes modeling to obtain analytical description of conversion gain. Model validation has been done by comparing theoretical predictions and experimental results. On the other hand, the 1T pixel structure has been implemented in different configurations, including rectangular-gate and ring-gate designs, and variations of oxidation parameters for the fabrication process. The pixel characteristics are presented and discussed.

  14. A 45 nm Stacked CMOS Image Sensor Process Technology for Submicron Pixel.

    Science.gov (United States)

    Takahashi, Seiji; Huang, Yi-Min; Sze, Jhy-Jyi; Wu, Tung-Ting; Guo, Fu-Sheng; Hsu, Wei-Cheng; Tseng, Tung-Hsiung; Liao, King; Kuo, Chin-Chia; Chen, Tzu-Hsiang; Chiang, Wei-Chieh; Chuang, Chun-Hao; Chou, Keng-Yu; Chung, Chi-Hsien; Chou, Kuo-Yu; Tseng, Chien-Hsien; Wang, Chuan-Joung; Yaung, Dun-Nien

    2017-12-05

    A submicron pixel's light and dark performance were studied by experiment and simulation. An advanced node technology incorporated with a stacked CMOS image sensor (CIS) is promising in that it may enhance performance. In this work, we demonstrated a low dark current of 3.2 e - /s at 60 °C, an ultra-low read noise of 0.90 e - ·rms, a high full well capacity (FWC) of 4100 e - , and blooming of 0.5% in 0.9 μm pixels with a pixel supply voltage of 2.8 V. In addition, the simulation study result of 0.8 μm pixels is discussed.

  15. CMOS pixel sensors on high resistive substrate for high-rate, high-radiation environments

    Energy Technology Data Exchange (ETDEWEB)

    Hirono, Toko, E-mail: thirono@uni-bonn.de [Physikalisches Institute der Universität Bonn, Bonn (Germany); Barbero, Marlon; Breugnon, Patrick; Godiot, Stephanie [CPPM, Aix-Marseille Universite, CNRS/IN2P3, Marseille (France); Gonella, Laura; Hemperek, Tomasz; Hügging, Fabian; Krüger, Hans [Physikalisches Institute der Universität Bonn, Bonn (Germany); Liu, Jian; Pangaud, Patrick [CPPM, Aix-Marseille Universite, CNRS/IN2P3, Marseille (France); Peric, Ivan [IPE, Karlsruher Institut für Technologie, Karlsruhe (Germany); Pohl, David-Leon [Physikalisches Institute der Universität Bonn, Bonn (Germany); Rozanov, Alexandre [CPPM, Aix-Marseille Universite, CNRS/IN2P3, Marseille (France); Rymaszewski, Piotr [Physikalisches Institute der Universität Bonn, Bonn (Germany); Wang, Anqing [CPPM, Aix-Marseille Universite, CNRS/IN2P3, Marseille (France); Wermes, Norbert [Physikalisches Institute der Universität Bonn, Bonn (Germany)

    2016-09-21

    A depleted CMOS active pixel sensor (DMAPS) has been developed on a substrate with high resistivity in a high voltage process. High radiation tolerance and high time resolution can be expected because of the charge collection by drift. A prototype of DMAPS was fabricated in a 150 nm process by LFoundry. Two variants of the pixel layout were tested, and the measured depletion depths of the variants are 166 μm and 80 μm. We report the results obtained with the prototype fabricated in this technology.

  16. Development of pixel front-end electronics using advanced deep submicron CMOS technologies

    International Nuclear Information System (INIS)

    Havranek, Miroslav

    2014-09-01

    The content of this thesis is oriented on the R and D of microelectronic integrated circuits for processing the signal from particle sensors and partially on the sensors themselves. This work is motivated by ongoing upgrades of the ATLAS Pixel Detector at CERN laboratory and by exploration of new technologies for the future experiments in particle physics. Evolution of technologies for the fabrication of microelectronic circuits follows Moore's laws. Transistors become smaller and electronic chips reach higher complexity. Apart from this, silicon foundries become more open to smaller customers and often provide non-standard process options. Two new directions in pixel technologies are explored in this thesis: design of pixel electronics using ultra deep submicron (65 nm) CMOS technology and Depleted Monolithic Active Pixel Sensors (DMAPS). An independent project concerning the measurement of pixel capacitance with a dedicated measurement chip is a part of this thesis. Pixel capacitance is one of the key parameters for design of the pixel front-end electronics and thus it is closely related to the content of the thesis. The theoretical background, aspects of chip design, performance of chip prototypes and prospect for design of large pixel chips are comprehensively described in five chapters of the thesis.

  17. Development of pixel front-end electronics using advanced deep submicron CMOS technologies

    Energy Technology Data Exchange (ETDEWEB)

    Havranek, Miroslav

    2014-09-15

    The content of this thesis is oriented on the R and D of microelectronic integrated circuits for processing the signal from particle sensors and partially on the sensors themselves. This work is motivated by ongoing upgrades of the ATLAS Pixel Detector at CERN laboratory and by exploration of new technologies for the future experiments in particle physics. Evolution of technologies for the fabrication of microelectronic circuits follows Moore's laws. Transistors become smaller and electronic chips reach higher complexity. Apart from this, silicon foundries become more open to smaller customers and often provide non-standard process options. Two new directions in pixel technologies are explored in this thesis: design of pixel electronics using ultra deep submicron (65 nm) CMOS technology and Depleted Monolithic Active Pixel Sensors (DMAPS). An independent project concerning the measurement of pixel capacitance with a dedicated measurement chip is a part of this thesis. Pixel capacitance is one of the key parameters for design of the pixel front-end electronics and thus it is closely related to the content of the thesis. The theoretical background, aspects of chip design, performance of chip prototypes and prospect for design of large pixel chips are comprehensively described in five chapters of the thesis.

  18. Analysis of 3D stacked fully functional CMOS Active Pixel Sensor detectors

    International Nuclear Information System (INIS)

    Passeri, D; Servoli, L; Meroli, S

    2009-01-01

    The IC technology trend is to move from 3D flexible configurations (package on package, stacked dies) to real 3D ICs. This is mainly due to i) the increased electrical performances and ii) the cost of 3D integration which may be cheaper than to keep shrinking 2D circuits. Perspective advantages for particle tracking and vertex detectors applications in High Energy Physics can be envisaged: in this work, we will focus on the capabilities of the state-of-the-art vertical scale integration technologies, allowing for the fabrication of very compact, fully functional, multiple layers CMOS Active Pixel Sensor (APS) detectors. The main idea is to exploit the features of the 3D technologies for the fabrication of a ''stack'' of very thin and precisely aligned CMOS APS layers, leading to a single, integrated, multi-layers pixel sensor. The adoption of multiple-layers single detectors can dramatically reduce the mass of conventional, separated detectors (thus reducing multiple scattering issues), at the same time allowing for very precise measurements of particle trajectory and momentum. As a proof of concept, an extensive device and circuit simulation activity has been carried out, aiming at evaluate the suitability of such a kind of CMOS active pixel layers for particle tracking purposes.

  19. CMOS Active Pixel Sensors as energy-range detectors for proton Computed Tomography

    International Nuclear Information System (INIS)

    Esposito, M.; Waltham, C.; Allinson, N.M.; Anaxagoras, T.; Evans, P.M.; Poludniowski, G.; Green, S.; Parker, D.J.; Price, T.; Manolopoulos, S.; Nieto-Camero, J.

    2015-01-01

    Since the first proof of concept in the early 70s, a number of technologies has been proposed to perform proton CT (pCT), as a means of mapping tissue stopping power for accurate treatment planning in proton therapy. Previous prototypes of energy-range detectors for pCT have been mainly based on the use of scintillator-based calorimeters, to measure proton residual energy after passing through the patient. However, such an approach is limited by the need for only a single proton passing through the energy-range detector in a read-out cycle. A novel approach to this problem could be the use of pixelated detectors, where the independent read-out of each pixel allows to measure simultaneously the residual energy of a number of protons in the same read-out cycle, facilitating a faster and more efficient pCT scan. This paper investigates the suitability of CMOS Active Pixel Sensors (APSs) to track individual protons as they go through a number of CMOS layers, forming an energy-range telescope. Measurements performed at the iThemba Laboratories will be presented and analysed in terms of correlation, to confirm capability of proton tracking for CMOS APSs

  20. CMOS Active Pixel Sensors as energy-range detectors for proton Computed Tomography.

    Science.gov (United States)

    Esposito, M; Anaxagoras, T; Evans, P M; Green, S; Manolopoulos, S; Nieto-Camero, J; Parker, D J; Poludniowski, G; Price, T; Waltham, C; Allinson, N M

    2015-06-03

    Since the first proof of concept in the early 70s, a number of technologies has been proposed to perform proton CT (pCT), as a means of mapping tissue stopping power for accurate treatment planning in proton therapy. Previous prototypes of energy-range detectors for pCT have been mainly based on the use of scintillator-based calorimeters, to measure proton residual energy after passing through the patient. However, such an approach is limited by the need for only a single proton passing through the energy-range detector in a read-out cycle. A novel approach to this problem could be the use of pixelated detectors, where the independent read-out of each pixel allows to measure simultaneously the residual energy of a number of protons in the same read-out cycle, facilitating a faster and more efficient pCT scan. This paper investigates the suitability of CMOS Active Pixel Sensors (APSs) to track individual protons as they go through a number of CMOS layers, forming an energy-range telescope. Measurements performed at the iThemba Laboratories will be presented and analysed in terms of correlation, to confirm capability of proton tracking for CMOS APSs.

  1. Image sensor pixel with on-chip high extinction ratio polarizer based on 65-nm standard CMOS technology.

    Science.gov (United States)

    Sasagawa, Kiyotaka; Shishido, Sanshiro; Ando, Keisuke; Matsuoka, Hitoshi; Noda, Toshihiko; Tokuda, Takashi; Kakiuchi, Kiyomi; Ohta, Jun

    2013-05-06

    In this study, we demonstrate a polarization sensitive pixel for a complementary metal-oxide-semiconductor (CMOS) image sensor based on 65-nm standard CMOS technology. Using such a deep-submicron CMOS technology, it is possible to design fine metal patterns smaller than the wavelengths of visible light by using a metal wire layer. We designed and fabricated a metal wire grid polarizer on a 20 × 20 μm(2) pixel for image sensor. An extinction ratio of 19.7 dB was observed at a wavelength 750 nm.

  2. Development of a 750x750 pixels CMOS imager sensor for tracking applications

    Science.gov (United States)

    Larnaudie, Franck; Guardiola, Nicolas; Saint-Pé, Olivier; Vignon, Bruno; Tulet, Michel; Davancens, Robert; Magnan, Pierre; Corbière, Franck; Martin-Gonthier, Philippe; Estribeau, Magali

    2017-11-01

    Solid-state optical sensors are now commonly used in space applications (navigation cameras, astronomy imagers, tracking sensors...). Although the charge-coupled devices are still widely used, the CMOS image sensor (CIS), which performances are continuously improving, is a strong challenger for Guidance, Navigation and Control (GNC) systems. This paper describes a 750x750 pixels CMOS image sensor that has been specially designed and developed for star tracker and tracking sensor applications. Such detector, that is featuring smart architecture enabling very simple and powerful operations, is built using the AMIS 0.5μm CMOS technology. It contains 750x750 rectangular pixels with 20μm pitch. The geometry of the pixel sensitive zone is optimized for applications based on centroiding measurements. The main feature of this device is the on-chip control and timing function that makes the device operation easier by drastically reducing the number of clocks to be applied. This powerful function allows the user to operate the sensor with high flexibility: measurement of dark level from masked lines, direct access to the windows of interest… A temperature probe is also integrated within the CMOS chip allowing a very precise measurement through the video stream. A complete electro-optical characterization of the sensor has been performed. The major parameters have been evaluated: dark current and its uniformity, read-out noise, conversion gain, Fixed Pattern Noise, Photo Response Non Uniformity, quantum efficiency, Modulation Transfer Function, intra-pixel scanning. The characterization tests are detailed in the paper. Co60 and protons irradiation tests have been also carried out on the image sensor and the results are presented. The specific features of the 750x750 image sensor such as low power CMOS design (3.3V, power consumption<100mW), natural windowing (that allows efficient and robust tracking algorithms), simple proximity electronics (because of the on

  3. Medipix2 based CdTe microprobe for dental imaging

    International Nuclear Information System (INIS)

    Vykydal, Z; Jakubek, J; Fauler, A; Fiederle, M; Zwerger, A; Svestkova, M

    2011-01-01

    Medical imaging devices and techniques are demanded to provide high resolution and low dose images of samples or patients. Hybrid semiconductor single photon counting devices together with suitable sensor materials and advanced techniques of image reconstruction fulfil these requirements. In particular cases such as the direct observation of dental implants also the size of the imaging device itself plays a critical role. This work presents the comparison of 2D radiographs of tooth provided by a standard commercial dental imaging system (Gendex 765DC X-ray tube with VisualiX scintillation detector) and two Medipix2 USB Lite detectors one equipped with a Si sensor (300 μm thick) and one with a CdTe sensor (1 mm thick). Single photon counting capability of the Medipix2 device allows virtually unlimited dynamic range of the images and thus increases the contrast significantly. The dimensions of the whole USB Lite device are only 15 mm × 60 mm of which 25% consists of the sensitive area. Detector of this compact size can be used directly inside the patients' mouth.

  4. Monolithic pixel development in TowerJazz 180 nm CMOS for the outer pixel layers in the ATLAS experiment

    Science.gov (United States)

    Berdalovic, I.; Bates, R.; Buttar, C.; Cardella, R.; Egidos Plaja, N.; Hemperek, T.; Hiti, B.; van Hoorne, J. W.; Kugathasan, T.; Mandic, I.; Maneuski, D.; Marin Tobon, C. A.; Moustakas, K.; Musa, L.; Pernegger, H.; Riedler, P.; Riegel, C.; Schaefer, D.; Schioppa, E. J.; Sharma, A.; Snoeys, W.; Solans Sanchez, C.; Wang, T.; Wermes, N.

    2018-01-01

    The upgrade of the ATLAS tracking detector (ITk) for the High-Luminosity Large Hadron Collider at CERN requires the development of novel radiation hard silicon sensor technologies. Latest developments in CMOS sensor processing offer the possibility of combining high-resistivity substrates with on-chip high-voltage biasing to achieve a large depleted active sensor volume. We have characterised depleted monolithic active pixel sensors (DMAPS), which were produced in a novel modified imaging process implemented in the TowerJazz 180 nm CMOS process in the framework of the monolithic sensor development for the ALICE experiment. Sensors fabricated in this modified process feature full depletion of the sensitive layer, a sensor capacitance of only a few fF and radiation tolerance up to 1015 neq/cm2. This paper summarises the measurements of charge collection properties in beam tests and in the laboratory using radioactive sources and edge TCT. The results of these measurements show significantly improved radiation hardness obtained for sensors manufactured using the modified process. This has opened the way to the design of two large scale demonstrators for the ATLAS ITk. To achieve a design compatible with the requirements of the outer pixel layers of the tracker, a charge sensitive front-end taking 500 nA from a 1.8 V supply is combined with a fast digital readout architecture. The low-power front-end with a 25 ns time resolution exploits the low sensor capacitance to reduce noise and analogue power, while the implemented readout architectures minimise power by reducing the digital activity.

  5. Photon small-field measurements with a CMOS active pixel sensor.

    Science.gov (United States)

    Spang, F Jiménez; Rosenberg, I; Hedin, E; Royle, G

    2015-06-07

    In this work the dosimetric performance of CMOS active pixel sensors for the measurement of small photon beams is presented. The detector used consisted of an array of 520  × 520 pixels on a 25 µm pitch. Dosimetric parameters measured with this sensor were compared with data collected with an ionization chamber, a film detector and GEANT4 Monte Carlo simulations. The sensor performance for beam profiles measurements was evaluated for field sizes of 0.5  × 0.5 cm(2). The high spatial resolution achieved with this sensor allowed the accurate measurement of profiles, beam penumbrae and field size under lateral electronic disequilibrium. Field size and penumbrae agreed within 5.4% and 2.2% respectively with film measurements. Agreements with ionization chambers better than 1.0% were obtained when measuring tissue-phantom ratios. Output factor measurements were in good agreement with ionization chamber and Monte Carlo simulation. The data obtained from this imaging sensor can be easily analyzed to extract dosimetric information. The results presented in this work are promising for the development and implementation of CMOS active pixel sensors for dosimetry applications.

  6. Applications and new developments in X-ray materials analysis with MEDIPIX2

    International Nuclear Information System (INIS)

    Bethke, K.; Vries, R. de; Kogan, V.; Vasterink, J.; Verbruggen, R.; Kidd, P.; Fewster, P.; Bethke, J.

    2006-01-01

    The detection system is a key part of an X-ray analysis system. Important developments in detection technology based on photon counting pixel chips, such as the MEDIPIX2 chip [1] are under way. This paper describes the results of the technology transfer collaboration with CERN and the associated MEDIPIX collaboration. Some preliminary results of some first experiments revealing basic detector properties will be presented. Furthermore, some examples of typical applications in X-ray diffraction will be shown and the expectations for later integration of pixel detectors discussed. A partnership consortium has recently been established, the partners being IMEC and CANBERRA in Belgium and NIKHEF and PANalytical in the Netherlands. A new EUREKA detector project (RELAXD: High REsolution Large Area X-ray Detector) has been initiated by the partners and approved for funding by the ministry of economic affairs in NL. Aim is to make technologies available that lead to large area pixel detectors with minimized dead spaces and high-speed data read-out. This concept will be explained

  7. Performance evaluation of a fully depleted monolithic pixel detector chip in 150 nm CMOS technology

    Energy Technology Data Exchange (ETDEWEB)

    Obermann, Theresa

    2017-06-15

    The depleted monolithic active pixel sensor (DMAPS) is a new concept integrating full CMOS circuitry onto a (fully) depletable silicon substrate wafer. The realization of prototypes of the DMAPS concept relies on the availability of multiple well CMOS processes and highly resistive substrates. The CMOS foundry ESPROS Photonics offers both and was chosen for prototyping. Two prototypes, EPCB01 and EPCB02, developed in a 150 nm process on a highly resistive n-type wafer of 50 μm thickness, were characterized. The prototypes have 352 square pixels of 40 μm pitch and a small n-well charge collection node with very low capacitance of 5 fF (n{sup +}-implantation size: 5 μm x 5 μm) and about 150 transistors per pixel (CSA and discriminator plus a small digital part). The characterization of the prototypes demonstrates the proof of principle of the concept. Prior to irradiation the prototypes show a signal from a minimum ionizing particle ranging from 2400 e{sup -} to 3000 e{sup -} while the noise is 30 e{sup -} due to the low capacitance. After the irradiation of the prototypes with neutrons up to a fluence of 5 x 10{sup 14} neutrons/cm{sup 2} the performance suffers from the radiation damage leading to a signal of 1000 e{sup -} and a higher noise of 60 e{sup -} due to the increase of the leakage current. The detection efficiency of the prototypes reduces from 94 % to 26 % after the fluence of 5 x 10{sup 14} particles/cm{sup 2}. Due to the small fill factor the detection efficiency shows are strong dependence on the position within the pixel after irradiation. Thus the DMAPS concept with low fill factor can be used for precise vertex reconstruction in High Energy Physics experiments without severe performance loss up to moderate fluences (< 1 x 10{sup 14} particles/cm{sup 2}). The expected particle fluences inside of the volume of the upgrade of the ATLAS pixel detector exceed this limit. However, possible applications could be at future linear collider (ILC or CLIC

  8. Performance evaluation of a fully depleted monolithic pixel detector chip in 150 nm CMOS technology

    International Nuclear Information System (INIS)

    Obermann, Theresa

    2017-06-01

    The depleted monolithic active pixel sensor (DMAPS) is a new concept integrating full CMOS circuitry onto a (fully) depletable silicon substrate wafer. The realization of prototypes of the DMAPS concept relies on the availability of multiple well CMOS processes and highly resistive substrates. The CMOS foundry ESPROS Photonics offers both and was chosen for prototyping. Two prototypes, EPCB01 and EPCB02, developed in a 150 nm process on a highly resistive n-type wafer of 50 μm thickness, were characterized. The prototypes have 352 square pixels of 40 μm pitch and a small n-well charge collection node with very low capacitance of 5 fF (n + -implantation size: 5 μm x 5 μm) and about 150 transistors per pixel (CSA and discriminator plus a small digital part). The characterization of the prototypes demonstrates the proof of principle of the concept. Prior to irradiation the prototypes show a signal from a minimum ionizing particle ranging from 2400 e - to 3000 e - while the noise is 30 e - due to the low capacitance. After the irradiation of the prototypes with neutrons up to a fluence of 5 x 10 14 neutrons/cm 2 the performance suffers from the radiation damage leading to a signal of 1000 e - and a higher noise of 60 e - due to the increase of the leakage current. The detection efficiency of the prototypes reduces from 94 % to 26 % after the fluence of 5 x 10 14 particles/cm 2 . Due to the small fill factor the detection efficiency shows are strong dependence on the position within the pixel after irradiation. Thus the DMAPS concept with low fill factor can be used for precise vertex reconstruction in High Energy Physics experiments without severe performance loss up to moderate fluences (< 1 x 10 14 particles/cm 2 ). The expected particle fluences inside of the volume of the upgrade of the ATLAS pixel detector exceed this limit. However, possible applications could be at future linear collider (ILC or CLIC) experiments and B-factories where the low material budget

  9. 3D monolithically stacked CMOS active pixel sensor detectors for particle tracking applications

    International Nuclear Information System (INIS)

    Passeri, D; Placidi, P; Servoli, L; Meroli, S; Magalotti, D; Marras, A

    2012-01-01

    In this work we propose an innovative approach to particle tracking based on CMOS Active Pixel Sensors layers, monolithically integrated in an all-in-one chip featuring multiple, stacked, fully functional detector layers capable to provide momentum measurement (particle impact point and direction) within a single detector. This will results in a very low material detector, thus dramatically reducing multiple scattering issues. To this purpose, we rely on the capabilities of the CMOS vertical scale integration (3D IC) technology. A first chip prototype has been fabricated within a multi-project run using a 130 nm CMOS Chartered/Tezzaron technology, featuring two layers bonded face-to-face. Tests have been carried out on full 3D structures, providing the functionalities of both tiers. To this purpose, laser scans have been carried out using highly focussed spot size obtaining coincidence responses of the two layers. Tests have been made as well with X-ray sources in order to calibrate the response of the sensor. Encouraging results have been found, fostering the suitability of both the adopted 3D-IC vertical scale fabrication technology and the proposed approach for particle tracking applications.

  10. Towards real-time VMAT verification using a prototype, high-speed CMOS active pixel sensor.

    Science.gov (United States)

    Zin, Hafiz M; Harris, Emma J; Osmond, John P F; Allinson, Nigel M; Evans, Philip M

    2013-05-21

    This work investigates the feasibility of using a prototype complementary metal oxide semiconductor active pixel sensor (CMOS APS) for real-time verification of volumetric modulated arc therapy (VMAT) treatment. The prototype CMOS APS used region of interest read out on the chip to allow fast imaging of up to 403.6 frames per second (f/s). The sensor was made larger (5.4 cm × 5.4 cm) using recent advances in photolithographic technique but retains fast imaging speed with the sensor's regional read out. There is a paradigm shift in radiotherapy treatment verification with the advent of advanced treatment techniques such as VMAT. This work has demonstrated that the APS can track multi leaf collimator (MLC) leaves moving at 18 mm s(-1) with an automatic edge tracking algorithm at accuracy better than 1.0 mm even at the fastest imaging speed. Evaluation of the measured fluence distribution for an example VMAT delivery sampled at 50.4 f/s was shown to agree well with the planned fluence distribution, with an average gamma pass rate of 96% at 3%/3 mm. The MLC leaves motion and linac pulse rate variation delivered throughout the VMAT treatment can also be measured. The results demonstrate the potential of CMOS APS technology as a real-time radiotherapy dosimeter for delivery of complex treatments such as VMAT.

  11. FDTD-based optical simulations methodology for CMOS image sensors pixels architecture and process optimization

    Science.gov (United States)

    Hirigoyen, Flavien; Crocherie, Axel; Vaillant, Jérôme M.; Cazaux, Yvon

    2008-02-01

    This paper presents a new FDTD-based optical simulation model dedicated to describe the optical performances of CMOS image sensors taking into account diffraction effects. Following market trend and industrialization constraints, CMOS image sensors must be easily embedded into even smaller packages, which are now equipped with auto-focus and short-term coming zoom system. Due to miniaturization, the ray-tracing models used to evaluate pixels optical performances are not accurate anymore to describe the light propagation inside the sensor, because of diffraction effects. Thus we adopt a more fundamental description to take into account these diffraction effects: we chose to use Maxwell-Boltzmann based modeling to compute the propagation of light, and to use a software with an FDTD-based (Finite Difference Time Domain) engine to solve this propagation. We present in this article the complete methodology of this modeling: on one hand incoherent plane waves are propagated to approximate a product-use diffuse-like source, on the other hand we use periodic conditions to limit the size of the simulated model and both memory and computation time. After having presented the correlation of the model with measurements we will illustrate its use in the case of the optimization of a 1.75μm pixel.

  12. Development of Fast and High Precision CMOS Pixel Sensors for an ILC Vertex Detector

    CERN Document Server

    Hu-Guo, Christine

    2010-01-01

    The development of CMOS pixel sensors with column parallel read-out and integrated zero-suppression has resulted in a full size, nearly 1 Megapixel, prototype with ~100 \\mu s read-out time. Its performances are quite close to the ILD vertex detector specifications, showing that the sensor architecture can presumably be evolved to meet these specifications exactly. Starting from the existing architecture and achieved performances, the paper will expose the details of how the sensor will be evolved in the coming 2-3 years in perspective of the ILD Detector Baseline Document, to be delivered in 2012. Two different devices are foreseen for this objective, one being optimized for the inner layers and their fast read-out requirement, while the other exploits the dimmed background in the outer layers to reduce the power consumption. The sensor evolution relies on a high resistivity epitaxial layer, on the use of an advanced CMOS process and on the combination of column-level ADCs with a pixel array. The paper will p...

  13. A high speed, low power consumption LVDS interface for CMOS pixel sensors

    Energy Technology Data Exchange (ETDEWEB)

    Shi, Zhan, E-mail: sz1134@163.com [Dalian University of Technology, No. 2 Linggong Road, 116024 Dalian (China); Tang, Zhenan, E-mail: tangza@dlut.edu.cn [Dalian University of Technology, No. 2 Linggong Road, 116024 Dalian (China); Tian, Yong [Dalian University of Technology, No. 2 Linggong Road, 116024 Dalian (China); Pham, Hung; Valin, Isabelle; Jaaskelainen, Kimmo [IPHC, 23 rue du Loess 67037 Strasbourg (France); CNRS, UMR7178, 67037 Strasbourg (France)

    2015-01-01

    The use of CMOS Pixel Sensors (CPSs) offers a promising approach to the design of vertex detectors in High Energy Physics (HEP) experiments. As the CPS equipping the upgraded Solenoidal Tracker at RHIC (STAR) pixel detector, ULTIMATE perfectly illustrates the potential of CPSs for HEP applications. However, further development of CPSs with respect to readout speed is required to fulfill the readout time requirement of the next generation HEP detectors, such as the upgrade of A Large Ion Collider Experiment (ALICE) Inner Tracking System (ITS), the International Linear Collider (ILC), and the Compressed Baryonic Matter (CBM) vertex detectors. One actual limitation of CPSs is related to the speed of the Low-Voltage Differential Signaling (LVDS) circuitry implementing the interface between the sensor and the Data Acquisition (DAQ) system. To improve the transmission rate while keeping the power consumption at a low level, a source termination technique and a special current comparator were adopted for the LVDS driver and receiver, respectively. Moreover, hardening techniques are used. The circuitry was designed and submitted for fabrication in a 0.18-µm CMOS Image Sensor (CIS) process at the end of 2011. The test results indicated that the LVDS driver and receiver can operate properly at the data rate of 1.2 Gb/s with power consumption of 19.6 mW.

  14. Performance of a Fast Binary Readout CMOS Active Pixel Sensor Chip Designed for Charged Particle Detection

    Science.gov (United States)

    Deerli, Yavuz; Besanon, Marc; Besson, Auguste; Claus, Gilles; Deptuch, Grzegorz; Dulinski, Wojciech; Fourches, Nicolas; Goffe, Mathieu; Himmi, Abdelkader; Li, Yan; Lutz, Pierre; Orsini, Fabienne; Szelezniak, Michal

    2006-12-01

    We report on the performance of the MIMOSA8 (HiMAPS1) chip. The chip is a 128times32 pixels array where 24 columns have discriminated binary outputs and eight columns analog test outputs. Offset correction techniques are used extensively in this chip to overcome process related mismatches. The array is divided in four blocks of pixels with different conversion factors and is controlled by a serially programmable sequencer. MIMOSA8 is a representative of the CMOS sensors development option considered as a promising candidate for the Vertex Detector of the future International Linear Collider (ILC). The readout technique, implemented on the chip, combines high spatial resolution capabilities with high processing readout speed. Data acquisition, providing control of the chip and signal buffering and linked to a VME system, was made on the eight analog outputs. Analog data, without and with a 55Fe X-ray source, were acquired and processed using off-line analysis software. From the reconstruction of pixel clusters, built around a central pixel, we deduce that the charge spread is limited to the closest 25 pixels and almost all the available charge is collected. The position of the total charge collection peak (and subsequently the charge-to-voltage conversion factor) stays unaffected when the clock frequency is increased even up to 150 MHz (13.6 mus readout time per frame). The discriminators, placed in the readout chain, have proved to be fully functional. Beam tests have been made with high energy electrons at DESY (Germany) to study detection efficiency. The results prove that MIMOSA8 is the first and fastest successful monolithic active pixel sensor with on-chip signal discrimination for detection of MIPs

  15. Three-dimensional cascaded system analysis of a 50 µm pixel pitch wafer-scale CMOS active pixel sensor x-ray detector for digital breast tomosynthesis.

    Science.gov (United States)

    Zhao, C; Vassiljev, N; Konstantinidis, A C; Speller, R D; Kanicki, J

    2017-03-07

    High-resolution, low-noise x-ray detectors based on the complementary metal-oxide-semiconductor (CMOS) active pixel sensor (APS) technology have been developed and proposed for digital breast tomosynthesis (DBT). In this study, we evaluated the three-dimensional (3D) imaging performance of a 50 µm pixel pitch CMOS APS x-ray detector named DynAMITe (Dynamic Range Adjustable for Medical Imaging Technology). The two-dimensional (2D) angle-dependent modulation transfer function (MTF), normalized noise power spectrum (NNPS), and detective quantum efficiency (DQE) were experimentally characterized and modeled using the cascaded system analysis at oblique incident angles up to 30°. The cascaded system model was extended to the 3D spatial frequency space in combination with the filtered back-projection (FBP) reconstruction method to calculate the 3D and in-plane MTF, NNPS and DQE parameters. The results demonstrate that the beam obliquity blurs the 2D MTF and DQE in the high spatial frequency range. However, this effect can be eliminated after FBP image reconstruction. In addition, impacts of the image acquisition geometry and detector parameters were evaluated using the 3D cascaded system analysis for DBT. The result shows that a wider projection angle range (e.g.  ±30°) improves the low spatial frequency (below 5 mm -1 ) performance of the CMOS APS detector. In addition, to maintain a high spatial resolution for DBT, a focal spot size of smaller than 0.3 mm should be used. Theoretical analysis suggests that a pixelated scintillator in combination with the 50 µm pixel pitch CMOS APS detector could further improve the 3D image resolution. Finally, the 3D imaging performance of the CMOS APS and an indirect amorphous silicon (a-Si:H) thin-film transistor (TFT) passive pixel sensor (PPS) detector was simulated and compared.

  16. First generation of deep n-well CMOS MAPS with in-pixel sparsification for the ILC vertex detector

    International Nuclear Information System (INIS)

    Traversi, Gianluca; Bulgheroni, Antonio; Caccia, Massimo; Jastrzab, Marcin; Manghisoni, Massimo; Pozzati, Enrico; Ratti, Lodovico; Re, Valerio

    2009-01-01

    In this paper we present the characterization results relevant to a deep n-well (DNW) CMOS active pixel sensor chip designed for vertexing applications at the International Linear Collider. In this chip, named sparsified digital readout (SDR0), for the first time we implemented a sparsification logic at the pixel level. The DNW available in deep submicron CMOS processes is used to collect the charge released in the substrate, and signal processing is performed by a classical optimum amplifying stage for capacitive detectors. In this work, the experimental characterization of the SDR0 chip, including data from radioactive source ( 55 Fe) tests, will be presented.

  17. Negative Offset Operation of Four-Transistor CMOS Image Pixels for Increased Well Capacity and Suppressed Dark Current

    OpenAIRE

    Mheen, B.; Song, Y.J.; Theuwissen, J.P.

    2008-01-01

    This letter presents an electrical method to reduce dark current as well as increase well capacity of four-transistor pixels in a CMOS image sensor, utilizing a small negative offset voltage to the gate of the transfer (TX) transistor particularly only when the TX transistor is off. As a result, using a commercial pixel in a 0.18 ?m CMOS process, the voltage drop due to dark current of the pinned photodiode (PPD) is reduced by 6.1 dB and the well capacity is enhanced by 4.4 dB, which is attri...

  18. A monolithic active pixel sensor for particle detection in 0.25 μm CMOS technology

    International Nuclear Information System (INIS)

    Velthuis, J.J.; Allport, P.P.; Casse, G.; Evans, A.; Turchetta, R.; Villani, G.

    2006-01-01

    We are developing CMOS monolithic active pixel sensors (MAPS) for High Energy Physics applications. We have successfully produced 3 test structures. They feature several different pixel types including: standard 3MOS, 4MOS allowing Correlated Double Sampling (CDS), charge amplifier pixels and a flexible APS (FAPS). The FAPS has a 10 deep pipeline on each pixel. This is specifically designed with the beam structure of the TESLA proposal for the Linear Collider in mind. Results of a laser test on our first device and source test results on two more recent test structures will be presented

  19. 50 μm pixel pitch wafer-scale CMOS active pixel sensor x-ray detector for digital breast tomosynthesis.

    Science.gov (United States)

    Zhao, C; Konstantinidis, A C; Zheng, Y; Anaxagoras, T; Speller, R D; Kanicki, J

    2015-12-07

    Wafer-scale CMOS active pixel sensors (APSs) have been developed recently for x-ray imaging applications. The small pixel pitch and low noise are very promising properties for medical imaging applications such as digital breast tomosynthesis (DBT). In this work, we evaluated experimentally and through modeling the imaging properties of a 50 μm pixel pitch CMOS APS x-ray detector named DynAMITe (Dynamic Range Adjustable for Medical Imaging Technology). A modified cascaded system model was developed for CMOS APS x-ray detectors by taking into account the device nonlinear signal and noise properties. The imaging properties such as modulation transfer function (MTF), noise power spectrum (NPS), and detective quantum efficiency (DQE) were extracted from both measurements and the nonlinear cascaded system analysis. The results show that the DynAMITe x-ray detector achieves a high spatial resolution of 10 mm(-1) and a DQE of around 0.5 at spatial frequencies  CMOS APS x-ray detector, image aquisition geometry and image reconstruction techniques should be considered.

  20. Pitch dependence of the tolerance of CMOS monolithic active pixel sensors to non-ionizing radiation

    International Nuclear Information System (INIS)

    Doering, D.; Deveaux, M.; Domachowski, M.; Fröhlich, I.; Koziel, M.; Müntz, C.; Scharrer, P.; Stroth, J.

    2013-01-01

    CMOS monolithic active pixel sensors (MAPS) have demonstrated excellent performance as tracking detectors for charged particles. They provide an outstanding spatial resolution (a few μm), a detection efficiency of ≳99.9%, very low material budget (0.05%X 0 ) and good radiation tolerance (≳1Mrad, ≳10 13 n eq /cm 2 ) (Deveaux et al. [1]). This makes them an interesting technology for various applications in heavy ion and particle physics. Their tolerance to bulk damage was recently improved by using high-resistivity (∼1kΩcm) epitaxial layers as sensitive volume (Deveaux et al. [1], Dorokhov et al. [2]). The radiation tolerance of conventional MAPS is known to depend on the pixel pitch. This is as a higher pitch extends the distance, which signal electrons have to travel by thermal diffusion before being collected. Increased diffusion paths turn into a higher probability of loosing signal charge due to recombination. Provided that a similar effect exists in MAPS with high-resistivity epitaxial layer, it could be used to extend their radiation tolerance further. We addressed this question with MIMOSA-18AHR prototypes, which were provided by the IPHC Strasbourg and irradiated with reactor neutrons. We report about the results of this study and provide evidences that MAPS with 10μm pixel pitch tolerate doses of ≳3×10 14 n eq /cm 2

  1. A 65 nm CMOS analog processor with zero dead time for future pixel detectors

    Energy Technology Data Exchange (ETDEWEB)

    Gaioni, L., E-mail: luigi.gaioni@unibg.it [Università di Bergamo, I-24044 Dalmine (Italy); INFN, Sezione di Pavia, I-27100 Pavia (Italy); Braga, D.; Christian, D.C.; Deptuch, G.; Fahim, F. [Fermi National Accelerator Laboratory, Batavia IL (United States); Nodari, B. [Università di Bergamo, I-24044 Dalmine (Italy); INFN, Sezione di Pavia, I-27100 Pavia (Italy); Centre National de Recherche Scientifique, APC/IN2P3, Paris (France); Ratti, L. [Università di Pavia, I-27100 Pavia (Italy); INFN, Sezione di Pavia, I-27100 Pavia (Italy); Re, V. [Università di Bergamo, I-24044 Dalmine (Italy); INFN, Sezione di Pavia, I-27100 Pavia (Italy); Zimmerman, T. [Fermi National Accelerator Laboratory, Batavia IL (United States)

    2017-02-11

    Next generation pixel chips at the High-Luminosity (HL) LHC will be exposed to extremely high levels of radiation and particle rates. In the so-called Phase II upgrade, ATLAS and CMS will need a completely new tracker detector, complying with the very demanding operating conditions and the delivered luminosity (up to 5×10{sup 34} cm{sup −2} s{sup −1} in the next decade). This work is concerned with the design of a synchronous analog processor with zero dead time developed in a 65 nm CMOS technology, conceived for pixel detectors at the HL-LHC experiment upgrades. It includes a low noise, fast charge sensitive amplifier featuring a detector leakage compensation circuit, and a compact, single ended comparator that guarantees very good performance in terms of channel-to-channel dispersion of threshold without needing any pixel-level trimming. A flash ADC is exploited for digital conversion immediately after the charge amplifier. A thorough discussion on the design of the charge amplifier and the comparator is provided along with an exhaustive set of simulation results.

  2. IR sensitivity enhancement of CMOS Image Sensor with diffractive light trapping pixels.

    Science.gov (United States)

    Yokogawa, Sozo; Oshiyama, Itaru; Ikeda, Harumi; Ebiko, Yoshiki; Hirano, Tomoyuki; Saito, Suguru; Oinoue, Takashi; Hagimoto, Yoshiya; Iwamoto, Hayato

    2017-06-19

    We report on the IR sensitivity enhancement of back-illuminated CMOS Image Sensor (BI-CIS) with 2-dimensional diffractive inverted pyramid array structure (IPA) on crystalline silicon (c-Si) and deep trench isolation (DTI). FDTD simulations of semi-infinite thick c-Si having 2D IPAs on its surface whose pitches over 400 nm shows more than 30% improvement of light absorption at λ = 850 nm and the maximum enhancement of 43% with the 540 nm pitch at the wavelength is confirmed. A prototype BI-CIS sample with pixel size of 1.2 μm square containing 400 nm pitch IPAs shows 80% sensitivity enhancement at λ = 850 nm compared to the reference sample with flat surface. This is due to diffraction with the IPA and total reflection at the pixel boundary. The NIR images taken by the demo camera equip with a C-mount lens show 75% sensitivity enhancement in the λ = 700-1200 nm wavelength range with negligible spatial resolution degradation. Light trapping CIS pixel technology promises to improve NIR sensitivity and appears to be applicable to many different image sensor applications including security camera, personal authentication, and range finding Time-of-Flight camera with IR illuminations.

  3. Negative Offset Operation of Four-Transistor CMOS Image Pixels for Increased Well Capacity and Suppressed Dark Current

    NARCIS (Netherlands)

    Mheen, B.; Song, Y.J.; Theuwissen, J.P.

    2008-01-01

    This letter presents an electrical method to reduce dark current as well as increase well capacity of four-transistor pixels in a CMOS image sensor, utilizing a small negative offset voltage to the gate of the transfer (TX) transistor particularly only when the TX transistor is off. As a result,

  4. A 10 MHz micropower CMOS front end for direct readout of pixel detectors

    International Nuclear Information System (INIS)

    Campbell, M.; Heijne, E.H.M.; Jarron, P.; Krummenacher, F.; Enz, C.C.; Declercq, M.; Vittoz, E.; Viertel, G.

    1990-01-01

    In the framework of the CERN-LAA project for detector R and D, a micropower circuit of 200 μmx200 μm with a current amplifier, a latched comparator and a digital memory element has been tested electrically and operated in connection with linear silicon detector arrays. The experimental direct-readout (DRO) chip comprises a matrix of 9x12 circuit cells and has been manufactured in a 3 μm CMOS technology. Particles and X-ray photons below 22 keV were detected, and thresholds can be set between 2000 and 20000 e - . The noise is less than 4 keV FWHM or 500 e - rms and the power dissipation per pixel element is 30 μW. The chip can be coupled to a detector matrix using bump bonding. (orig.)

  5. Architecture and characterization of the P4DI CMOS hybrid pixel sensor

    International Nuclear Information System (INIS)

    Chatzistratis, D.; Theodoratos, G.; Kazas, I.; Loukas, D.; Zervakis, E.; Lambropoulos, C.P.

    2017-01-01

    Gamma ray imaging can be used for the extraction either of the activity map of a source or of the attenuation map of an object or both, as well as for the identification of the material composition of the emitting source or the object. All these imaging modalities can benefit from instruments giving the information of the energy of the converted photons and also the spatial and time coordinates of the conversion. The P4DI CMOS and hybrid provides the core technology for this task being a 2-D array based on Cd(Zn)Te material for the sensing layer. It consists of 1250 pixels with 400 μ m pitch. The energy resolution of the 241 Am photopeak is 3.5 keV, time resolution is less than 12 μ s and power consumption is less than 100 mW. Architecture and characterization are described.

  6. An investigation into the use of CMOS active pixel technology in image-guided radiotherapy

    International Nuclear Information System (INIS)

    Osmond, J P F; Holland, A D; Harris, E J; Ott, R J; Evans, P M; Clark, A T

    2008-01-01

    The increased intelligence, read-out speed, radiation hardness and potential large size of CMOS active pixel sensors (APS) gives them a potential advantage over systems currently used for verification of complex treatments such as IMRT and the tracking of moving tumours. The aim of this work is to investigate the feasibility of using an APS-based system to image the megavoltage treatment beam produced by a linear accelerator (Linac), and to demonstrate the logic which may ultimately be incorporated into future sensor and FPGA design to evaluate treatment and track motion. A CMOS APS was developed by the MI 3 consortium and incorporated into a megavoltage imaging system using the standard lens and mirror configuration employed in camera-based EPIDs. The ability to resolve anatomical structure was evaluated using an Alderson RANDO head phantom, resolution evaluated using a quality control (QC3) phantom and contrast using an in-house developed phantom. A complex intensity-modulated radiotherapy (IMRT) treatment was imaged and two algorithms were used to determine the field-area and delivered dose, and the position of multi-leaf collimator (MLC) leaves off-line. Results were compared with prediction from the prescription and found to agree within a single image frame time for dose delivery and 0.02-0.03 cm for the position of collimator leaves. Such a system therefore shows potential as the basis for an on-line verification system capable of treatment verification and monitoring patient motion

  7. First tests of a novel radiation hard CMOS sensor process for Depleted Monolithic Active Pixel Sensors

    Science.gov (United States)

    Pernegger, H.; Bates, R.; Buttar, C.; Dalla, M.; van Hoorne, J. W.; Kugathasan, T.; Maneuski, D.; Musa, L.; Riedler, P.; Riegel, C.; Sbarra, C.; Schaefer, D.; Schioppa, E. J.; Snoeys, W.

    2017-06-01

    The upgrade of the ATLAS [1] tracking detector for the High-Luminosity Large Hadron Collider (LHC) at CERN requires novel radiation hard silicon sensor technologies. Significant effort has been put into the development of monolithic CMOS sensors but it has been a challenge to combine a low capacitance of the sensing node with full depletion of the sensitive layer. Low capacitance brings low analog power. Depletion of the sensitive layer causes the signal charge to be collected by drift sufficiently fast to separate hits from consecutive bunch crossings (25 ns at the LHC) and to avoid losing the charge by trapping. This paper focuses on the characterization of charge collection properties and detection efficiency of prototype sensors originally designed in the framework of the ALICE Inner Tracking System (ITS) upgrade [2]. The prototypes are fabricated both in the standard TowerJazz 180nm CMOS imager process [3] and in an innovative modification of this process developed in collaboration with the foundry, aimed to fully deplete the sensitive epitaxial layer and enhance the tolerance to non-ionizing energy loss. Sensors fabricated in standard and modified process variants were characterized using radioactive sources, focused X-ray beam and test beams before and after irradiation. Contrary to sensors manufactured in the standard process, sensors from the modified process remain fully functional even after a dose of 1015neq/cm2, which is the the expected NIEL radiation fluence for the outer pixel layers in the future ATLAS Inner Tracker (ITk) [4].

  8. Experimental single-chip color HDTV image acquisition system with 8M-pixel CMOS image sensor

    Science.gov (United States)

    Shimamoto, Hiroshi; Yamashita, Takayuki; Funatsu, Ryohei; Mitani, Kohji; Nojiri, Yuji

    2006-02-01

    We have developed an experimental single-chip color HDTV image acquisition system using 8M-pixel CMOS image sensor. The sensor has 3840 × 2160 effective pixels and is progressively scanned at 60 frames per second. We describe the color filter array and interpolation method to improve image quality with a high-pixel-count single-chip sensor. We also describe an experimental image acquisition system we used to measured spatial frequency characteristics in the horizontal direction. The results indicate good prospects for achieving a high quality single chip HDTV camera that reduces pseudo signals and maintains high spatial frequency characteristics within the frequency band for HDTV.

  9. Development of a thinned back-illuminated CMOS active pixel sensor for extreme ultraviolet spectroscopy and imaging in space science

    International Nuclear Information System (INIS)

    Waltham, N.R.; Prydderch, M.; Mapson-Menard, H.; Pool, P.; Harris, A.

    2007-01-01

    We describe our programme to develop a large-format, science-grade, monolithic CMOS active pixel sensor for future space science missions, and in particular an extreme ultraviolet (EUV) spectrograph for solar physics studies on ESA's Solar Orbiter. Our route to EUV sensitivity relies on adapting the back-thinning and rear-illumination techniques first developed for CCD sensors. Our first large-format sensor consists of 4kx3k 5 μm pixels fabricated on a 0.25 μm CMOS imager process. Wafer samples of these sensors have been thinned by e2v technologies with the aim of obtaining good sensitivity at EUV wavelengths. We present results from both front- and back-illuminated versions of this sensor. We also present our plans to develop a new sensor of 2kx2k 10 μm pixels, which will be fabricated on a 0.35 μm CMOS process. In progress towards this goal, we have designed a test-structure consisting of six arrays of 512x512 10 μm pixels. Each of the arrays has been given a different pixel design to allow verification of our models, and our progress towards optimizing a design for minimal system readout noise and maximum dynamic range. These sensors will also be back-thinned for characterization at EUV wavelengths

  10. Development of CMOS pixel sensors for the upgrade of the ALICE Inner Tracking System

    International Nuclear Information System (INIS)

    Molnar, L.

    2014-01-01

    The ALICE Collaboration is preparing a major upgrade of the current detector, planned for installation during the second long LHC shutdown in the years 2018-19, in order to enhance its low-momentum vertexing and tracking capability, and exploit the planned increase of the LHC luminosity with Pb beams. One of the cornerstones of the ALICE upgrade strategy is to replace the current Inner Tracking System in its entirety with a new, high resolution, low-material ITS detector. The new ITS will consist of seven concentric layers equipped with Monolithic Active Pixel Sensors (MAPS) implemented using the 0.18 μm CMOS technology of TowerJazz. In this contribution, the main key features of the ITS upgrade will be illustrated with emphasis on the functionality of the pixel chip. The ongoing developments on the readout architectures, which have been implemented in several fabricated prototypes, will be discussed. The operational features of these prototypes as well as the results of the characterisation tests before and after irradiation will also be presented

  11. Development of CMOS pixel sensors for the upgrade of the ALICE Inner Tracking System

    Science.gov (United States)

    Molnar, L.

    2014-12-01

    The ALICE Collaboration is preparing a major upgrade of the current detector, planned for installation during the second long LHC shutdown in the years 2018-19, in order to enhance its low-momentum vertexing and tracking capability, and exploit the planned increase of the LHC luminosity with Pb beams. One of the cornerstones of the ALICE upgrade strategy is to replace the current Inner Tracking System in its entirety with a new, high resolution, low-material ITS detector. The new ITS will consist of seven concentric layers equipped with Monolithic Active Pixel Sensors (MAPS) implemented using the 0.18 μm CMOS technology of TowerJazz. In this contribution, the main key features of the ITS upgrade will be illustrated with emphasis on the functionality of the pixel chip. The ongoing developments on the readout architectures, which have been implemented in several fabricated prototypes, will be discussed. The operational features of these prototypes as well as the results of the characterisation tests before and after irradiation will also be presented.

  12. 14C autoradiography with a novel wafer scale CMOS Active Pixel Sensor

    International Nuclear Information System (INIS)

    Esposito, M; Wells, K; Anaxagoras, T; Allinson, N M; Larner, J

    2013-01-01

    14 C autoradiography is a well established technique for structural and metabolic analysis of cells and tissues. The most common detection medium for this application is film emulsion, which offers unbeatable spatial resolution due to its fine granularity but at the same time has some limiting drawbacks such as poor linearity and rapid saturation. In recent years several digital detectors have been developed, following the technological transition from analog to digital-based detection systems in the medical and biological field. Even so such digital systems have been greatly limited by the size of their active area (a few square centimeters), which have made them unsuitable for routine use in many biological applications where sample areas are typically ∼ 10–100 cm 2 . The Multidimensional Integrated Intelligent Imaging (MI3-Plus) consortium has recently developed a new large area CMOS Active Pixel Sensor (12.8 cm × 13.1 cm). This detector, based on the use of two different pixel resolutions, is capable of providing simultaneously low noise and high dynamic range on a wafer scale. In this paper we will demonstrate the suitability of this detector for routine beta autoradiography in a comparative approach with widely used film emulsion.

  13. Active Pixel Sensors in ams H18/H35 HV-CMOS Technology for the ATLAS HL-LHC Upgrade

    CERN Document Server

    Ristic, Branislav

    2016-09-21

    Deep sub micron HV-CMOS processes offer the opportunity for sensors built by industry standard techniques while being HV tolerant, making them good candidates for drift-based, fast collecting, thus radiation-hard pixel detectors. For the upgrade of the ATLAS Pixel Detector towards the HL-LHC requirements, active pixel sensors in HV-CMOS technology were investigated. These implement amplifier and discriminator stages directly in insulating deep n-wells, which also act as collecting electrodes. The deep n-wells allow for bias voltages up to 150V leading to a depletion depth of several 10um. Prototype sensors in the ams H18 180nm and H35 350nm HV-CMOS processes have been manufactured, acting as a potential drop-in replacement for the current ATLAS Pixel sensors, thus leaving higher level processing such as trigger handling to dedicated read-out chips. Sensors were thoroughly tested in lab measurements as well as in testbeam experiments. Irradiation with X-rays and protons revealed a tolerance to ionizing doses o...

  14. Power and area efficient 4-bit column-level ADC in a CMOS pixel sensor for the ILD vertex detector

    International Nuclear Information System (INIS)

    Zhang, L; Morel, F; Hu-Guo, Ch; Hu, Y

    2013-01-01

    A 48 × 64 pixels prototype CMOS pixel sensor (CPS) integrated with 4-bit column-level, self triggered ADCs for the outer layers of the ILD vertex detector (VTX) was developed and fabricated in a 0.35 μm CMOS process with a pixel pitch of 35 μm. The pixel concept combines in-pixel amplification with a correlated double sampling (CDS) operation. The ADCs accommodating the pixel read out in a rolling shutter mode complete the conversion by performing a multi-bit/step approximation. The design was optimised for power saving at sampling frequency. The prototype sensor is currently at the stage of being started testing and evaluation. So what is described is based on post simulation results rather than test data. This 4-bit ADC dissipates, at a 3-V supply and 6.25-MS/s sampling rate, 486 μW in its inactive mode, which is by far the most frequent. This value rises to 714 μW in case of the active mode. Its footprint amounts to 35 × 545 μm 2 .

  15. First tests of a novel radiation hard CMOS sensor process for Depleted Monolithic Active Pixel Sensors

    International Nuclear Information System (INIS)

    Pernegger, H.; Hoorne, J.W. van; Kugathasan, T.; Musa, L.; Riedler, P.; Riegel, C.; Schaefer, D.; Schioppa, E.J.; Snoeys, W.; Bates, R.; Buttar, C.; Maneuski, D.; Dalla, M.; Sbarra, C.

    2017-01-01

    The upgrade of the ATLAS [1] tracking detector for the High-Luminosity Large Hadron Collider (LHC) at CERN requires novel radiation hard silicon sensor technologies. Significant effort has been put into the development of monolithic CMOS sensors but it has been a challenge to combine a low capacitance of the sensing node with full depletion of the sensitive layer. Low capacitance brings low analog power. Depletion of the sensitive layer causes the signal charge to be collected by drift sufficiently fast to separate hits from consecutive bunch crossings (25 ns at the LHC) and to avoid losing the charge by trapping. This paper focuses on the characterization of charge collection properties and detection efficiency of prototype sensors originally designed in the framework of the ALICE Inner Tracking System (ITS) upgrade [2]. The prototypes are fabricated both in the standard TowerJazz 180nm CMOS imager process [3] and in an innovative modification of this process developed in collaboration with the foundry, aimed to fully deplete the sensitive epitaxial layer and enhance the tolerance to non-ionizing energy loss. Sensors fabricated in standard and modified process variants were characterized using radioactive sources, focused X-ray beam and test beams before and after irradiation. Contrary to sensors manufactured in the standard process, sensors from the modified process remain fully functional even after a dose of 10"1"5 n _e_q/cm"2, which is the the expected NIEL radiation fluence for the outer pixel layers in the future ATLAS Inner Tracker (ITk) [4].

  16. 50 μm pixel pitch wafer-scale CMOS active pixel sensor x-ray detector for digital breast tomosynthesis

    International Nuclear Information System (INIS)

    Zhao, C; Kanicki, J; Konstantinidis, A C; Zheng, Y; Speller, R D; Anaxagoras, T

    2015-01-01

    Wafer-scale CMOS active pixel sensors (APSs) have been developed recently for x-ray imaging applications. The small pixel pitch and low noise are very promising properties for medical imaging applications such as digital breast tomosynthesis (DBT). In this work, we evaluated experimentally and through modeling the imaging properties of a 50 μm pixel pitch CMOS APS x-ray detector named DynAMITe (Dynamic Range Adjustable for Medical Imaging Technology). A modified cascaded system model was developed for CMOS APS x-ray detectors by taking into account the device nonlinear signal and noise properties. The imaging properties such as modulation transfer function (MTF), noise power spectrum (NPS), and detective quantum efficiency (DQE) were extracted from both measurements and the nonlinear cascaded system analysis. The results show that the DynAMITe x-ray detector achieves a high spatial resolution of 10 mm −1 and a DQE of around 0.5 at spatial frequencies  <1 mm −1 . In addition, the modeling results were used to calculate the image signal-to-noise ratio (SNR i ) of microcalcifications at various mean glandular dose (MGD). For an average breast (5 cm thickness, 50% glandular fraction), 165 μm microcalcifications can be distinguished at a MGD of 27% lower than the clinical value (∼1.3 mGy). To detect 100 μm microcalcifications, further optimizations of the CMOS APS x-ray detector, image aquisition geometry and image reconstruction techniques should be considered. (paper)

  17. A low-power and small-area column-level ADC for high frame-rate CMOS pixel sensor

    Energy Technology Data Exchange (ETDEWEB)

    Zhang, L., E-mail: liang.zhang@iphc.cnrs.fr [School of Physics, Key Laboratory of Particle Physics and Particle Irradiation, Shandong University, 250100 Jinan (China); Institut Pluridisciplinaire Hubert Curien, University of Strasbourg, CNRS/IN2P3/UDS, 23 rue du loess, BP 28, 67037 Strasbourg (France); Morel, F.; Hu-Guo, C.; Hu, Y. [Institut Pluridisciplinaire Hubert Curien, University of Strasbourg, CNRS/IN2P3/UDS, 23 rue du loess, BP 28, 67037 Strasbourg (France)

    2014-07-01

    CMOS pixel sensors (CPS) have demonstrated performances meeting the specifications of the International Linear Collider (ILC) vertex detector (VTX). This paper presents a low-power and small-area 4-bit column-level analog-to-digital converter (ADC) for CMOS pixel sensors. The ADC employs a self-timed trigger and completes the conversion by performing a multi-bit/step approximation. As in the outer layers of the ILC vertex detector hit density is of the order of a few per thousand, in order to reduce power consumption, the ADC is designed to work in two modes: active mode and idle mode. The ADC is fabricated in a 0.35 μm CMOS process with a pixel pitch of 35 μm. It is implemented with 48 columns in a sensor prototype. Each column ADC covers an area of 35 ×545 μm{sup 2}. The measured temporal noise and Fixed Pattern Noise (FPN) are 0.96 mV and 0.40 mV, respectively. The power consumption, for a 3 V supply and 6.25 MS/s sampling rate, is 486 μW during idle time, which is by far the most frequently employed one. This value rises to 714 μW in the case of the active mode. The measured differential nonlinearity (DNL) and integral nonlinearity (INL) are 0.49/−0.28 LSB and 0.29/−0.20 LSB, respectively. - Highlights: • CMOS sensor integrated with column-level ADC is proposed for ILC VTX outer layers. • A low-power and small-area column-level ADC for high frame-rate CPS is presented. • The test results demonstrate the power and area efficiency. • The architecture is suitable for the outer layer CMOS sensors.

  18. A low-power and small-area column-level ADC for high frame-rate CMOS pixel sensor

    International Nuclear Information System (INIS)

    Zhang, L.; Morel, F.; Hu-Guo, C.; Hu, Y.

    2014-01-01

    CMOS pixel sensors (CPS) have demonstrated performances meeting the specifications of the International Linear Collider (ILC) vertex detector (VTX). This paper presents a low-power and small-area 4-bit column-level analog-to-digital converter (ADC) for CMOS pixel sensors. The ADC employs a self-timed trigger and completes the conversion by performing a multi-bit/step approximation. As in the outer layers of the ILC vertex detector hit density is of the order of a few per thousand, in order to reduce power consumption, the ADC is designed to work in two modes: active mode and idle mode. The ADC is fabricated in a 0.35 μm CMOS process with a pixel pitch of 35 μm. It is implemented with 48 columns in a sensor prototype. Each column ADC covers an area of 35 ×545 μm 2 . The measured temporal noise and Fixed Pattern Noise (FPN) are 0.96 mV and 0.40 mV, respectively. The power consumption, for a 3 V supply and 6.25 MS/s sampling rate, is 486 μW during idle time, which is by far the most frequently employed one. This value rises to 714 μW in the case of the active mode. The measured differential nonlinearity (DNL) and integral nonlinearity (INL) are 0.49/−0.28 LSB and 0.29/−0.20 LSB, respectively. - Highlights: • CMOS sensor integrated with column-level ADC is proposed for ILC VTX outer layers. • A low-power and small-area column-level ADC for high frame-rate CPS is presented. • The test results demonstrate the power and area efficiency. • The architecture is suitable for the outer layer CMOS sensors

  19. Development of ultra-light pixelated systems based on CMOS sensors for future high precision vertex detectors

    Energy Technology Data Exchange (ETDEWEB)

    Winter, Marc [Institut Pluridisciplinaire Hubert Curien - IPHC, 23 rue du loess - BP28, 67037 Strasbourg cedex 2 (France)

    2010-07-01

    CMOS pixel sensors have demonstrated attractive performances in terms of spatial resolution and material budget. The recent emergence of high resistivity substrates in mass production CMOS processes has originated particularly high signal-to-noise ratios and improved the non-ionising radiation tolerance to fluences close to 10{sup 14} Neq/cm{sup 2}. These achievements, obtained with MIMOSA sensors developed at IPHC (Strasbourg) and IRFU (Saclay) will be overviewed and put in perspective of the numerous applications of the sensors. These include collider experiments at RHIC, LHC, ILC and CLIC. The development of ultra-light ladders composed of these sensors and featuring 0.1% to 0.3% of radiation length, will be summarised. The contribution to the conference will also address the evolution of these pixelated systems, including on-going R on multi-tier sensors exploiting vertical integration technologies. (author)

  20. Radiation-hard Active Pixel Sensors for HL-LHC Detector Upgrades based on HV-CMOS Technology

    International Nuclear Information System (INIS)

    Miucci, A; Gonzalez-Sevilla, S; Ferrere, D; Iacobucci, G; Rosa, A La; Muenstermann, D; Gonella, L; Hemperek, T; Hügging, F; Krüger, H; Obermann, T; Wermes, N; Garcia-Sciveres, M; Backhaus, M; Capeans, M; Feigl, S; Nessi, M; Pernegger, H; Ristic, B; George, M

    2014-01-01

    Luminosity upgrades are discussed for the LHC (HL-LHC) which would make updates to the detectors necessary, requiring in particular new, even more radiation-hard and granular, sensors for the inner detector region. A proposal for the next generation of inner detectors is based on HV-CMOS: a new family of silicon sensors based on commercial high-voltage CMOS technology, which enables the fabrication of part of the pixel electronics inside the silicon substrate itself. The main advantages of this technology with respect to the standard silicon sensor technology are: low material budget, fast charge collection time, high radiation tolerance, low cost and operation at room temperature. A traditional readout chip is still needed to receive and organize the data from the active sensor and to handle high-level functionality such as trigger management. HV-CMOS has been designed to be compatible with both pixel and strip readout. In this paper an overview of HV2FEI4, a HV-CMOS prototype in 180 nm AMS technology, will be given. Preliminary results after neutron and X-ray irradiation are shown

  1. Integrated X-ray and charged particle active pixel CMOS sensor arrays using an epitaxial silicon sensitive region

    International Nuclear Information System (INIS)

    Kleinfelder, Stuart; Bichsel, Hans; Bieser, Fred; Matis, Howard S.; Rai, Gulshan; Retiere, Fabrice; Weiman, Howard; Yamamoto, Eugene

    2002-01-01

    Integrated CMOS Active Pixel Sensor (APS) arrays have been fabricated and tested using X-ray and electron sources. The 128 by 128 pixel arrays, designed in a standard 0.25 micron process, use a ∼10 micron epitaxial silicon layer as a deep detection region. The epitaxial layer has a much greater thickness than the surface features used by standard CMOS APS, leading to stronger signals and potentially better signal-to-noise ratio (SNR). On the other hand, minority carriers confined within the epitaxial region may diffuse to neighboring pixels, blur images and reduce peak signal intensity. But for low-rate, sparse-event images, centroid analysis of this diffusion may be used to increase position resolution. Careful trade-offs involving pixel size and sense-node area verses capacitance must be made to optimize overall performance. The prototype sensor arrays, therefore, include a range of different pixel designs, including different APS circuits and a range of different epitaxial layer contact structures. The fabricated arrays were tested with 1.5 GeV electrons and Fe-55 X-ray sources, yielding a measured noise of 13 electrons RMS and an SNR for single Fe-55 X-rays of greater than 38

  2. Development of a Large-Format Science-Grade CMOS Active Pixel Sensor, for Extreme Ultra Violet Spectroscopy and Imaging in Space Science

    National Research Council Canada - National Science Library

    Waltham, N. R; Prydderch, M; Mapson-Menard, H; Morrissey, Q; Turchetta, R; Pool, P; Harris, A

    2005-01-01

    We describe our programme to develop a large-format science-grade CMOS active pixel sensor for future space science missions, and in particular an extreme ultra-violet spectrograph for solar physics...

  3. Analog front-end for pixel sensors in a 3D CMOS technology for the SuperB Layer0

    International Nuclear Information System (INIS)

    Manazza, A.; Gaioni, L.; Re, V.

    2011-01-01

    This work is concerned with the design of two different analog channels for hybrid and monolithic pixels readout in view of applications to the SVT at the SuperB Factory. The circuits have been designed in a 130nm CMOS, vertically integrated technology, which, among others, may provide some advantages in terms of functional density and electrical isolation between the analog and the digital sections of the front-end.

  4. First tests of CHERWELL, a Monolithic Active Pixel Sensor: A CMOS Image Sensor (CIS) using 180 nm technology

    Energy Technology Data Exchange (ETDEWEB)

    Mylroie-Smith, James, E-mail: j.mylroie-smith@qmul.ac.uk [Queen Mary, University of London (United Kingdom); Kolya, Scott; Velthuis, Jaap [University of Bristol (United Kingdom); Bevan, Adrian; Inguglia, Gianluca [Queen Mary, University of London (United Kingdom); Headspith, Jon; Lazarus, Ian; Lemon, Roy [Daresbury Laboratory, STFC (United Kingdom); Crooks, Jamie; Turchetta, Renato; Wilson, Fergus [Rutherford Appleton Laboratory, STFC (United Kingdom)

    2013-12-11

    The Cherwell is a 4T CMOS sensor in 180 nm technology developed for the detection of charged particles. Here, the different test structures on the sensor will be described and first results from tests on the reference pixel variant are shown. The sensors were shown to have a noise of 12 e{sup −} and a signal to noise up to 150 in {sup 55}Fe.

  5. Dynamic testing for radiation induced failures in a standard CMOS submicron technology pixel front-end

    International Nuclear Information System (INIS)

    Venuto, D. de; Corsi, F.; Ohletz, M.J.

    1999-01-01

    A testing method for the detection of performance degradation induced by high-dose irradiation in high-energy experiments has been developed. The method used is based on a fault signature generation defined on the basis of the state-space analysis for linear circuits. By sampling the response of the circuit under test (CUT) to a single rectangular pulse, a set of parameters α are evaluated which are functions of the circuit singularities and constitute a signature for the CUT. Amplitude perturbations of these parameters engendered by element drift failure indicate a possible faulty condition. The effects of radiation induced faults in the analogue CMOS front-end of a silicon pixel detector employed in high energy physics experiments has been investigated. The results show that, even for the 800 krad dose, the test devised is able to detect the degradation of the amplifier performances. The results show also that hardened devices do not necessarily produce high circuit immunity to radiation and the proposed test method provides a mean to detect these performance deviations and to monitor them during the operating life of the chip. (A.C.)

  6. Pixel readout chips in deep submicron CMOS for ALICE and LHCb tolerant to 10 Mrad and beyond

    International Nuclear Information System (INIS)

    Snoeys, W.; Burns, M.; Campbell, M.; Cantatore, E.; Cencelli, V.; Dinapoli, R.; Heijne, E.; Jarron, P.; Lamanna, P.; Minervini, D.; Morel, M.; O'Shea, V.; Quiquempoix, V.; Bello, D.S.S.D.San Segundo; Van Koningsveld, B.; Wyllie, K.

    2001-01-01

    The ALICE1LHCB chip is a mixed-mode integrated circuit designed to read out silicon pixel detectors for two different applications: particle tracking in the ALICE Silicon Pixel Detector and particle identification in the LHCb Ring Imaging Cherenkov detector. To satisfy the different needs for these two experiments, the chip can be operated in two different modes. In tracking mode all the 50 μmx425 μm pixel cells in the 256x32 array are read out individually, whilst in particle identification mode they are combined in groups of 8 to form a 32x32 array of 400 μmx425 μm cells. Radiation tolerance was enhanced through special circuit layout. Sensitivity to coupling of digital signals into the analog front end was minimized. System issues such as testability and uniformity further constrained the design. The circuit is currently being manufactured in a commercial 0.25 μm CMOS technology

  7. Charge collection and non-ionizing radiation tolerance of CMOS pixel sensors using a 0.18 μm CMOS process

    Science.gov (United States)

    Zhang, Ying; Zhu, Hongbo; Zhang, Liang; Fu, Min

    2016-09-01

    The proposed Circular Electron Positron Collider (CEPC) will be primarily aimed for precision measurements of the discovered Higgs boson. Its innermost vertex detector, which will play a critical role in heavy-flavor tagging, must be constructed with fine-pitched silicon pixel sensors with low power consumption and fast readout. CMOS pixel sensor (CPS), as one of the most promising candidate technologies, has already demonstrated its excellent performance in several high energy physics experiments. Therefore it has been considered for R&D for the CEPC vertex detector. In this paper, we present the preliminary studies to improve the collected signal charge over the equivalent input capacitance ratio (Q / C), which will be crucial to reduce the analog power consumption. We have performed detailed 3D device simulation and evaluated potential impacts from diode geometry, epitaxial layer properties and non-ionizing radiation damage. We have proposed a new approach to improve the treatment of the boundary conditions in simulation. Along with the TCAD simulation, we have designed the exploratory prototype utilizing the TowerJazz 0.18 μm CMOS imaging sensor process and we will verify the simulation results with future measurements.

  8. Depleted fully monolithic CMOS pixel detectors using a column based readout architecture for the ATLAS Inner Tracker upgrade

    Science.gov (United States)

    Wang, T.; Barbero, M.; Berdalovic, I.; Bespin, C.; Bhat, S.; Breugnon, P.; Caicedo, I.; Cardella, R.; Chen, Z.; Degerli, Y.; Egidos, N.; Godiot, S.; Guilloux, F.; Hemperek, T.; Hirono, T.; Krüger, H.; Kugathasan, T.; Hügging, F.; Marin Tobon, C. A.; Moustakas, K.; Pangaud, P.; Schwemling, P.; Pernegger, H.; Pohl, D.-L.; Rozanov, A.; Rymaszewski, P.; Snoeys, W.; Wermes, N.

    2018-03-01

    Depleted monolithic active pixel sensors (DMAPS), which exploit high voltage and/or high resistivity add-ons of modern CMOS technologies to achieve substantial depletion in the sensing volume, have proven to have high radiation tolerance towards the requirements of ATLAS in the high-luminosity LHC era. DMAPS integrating fast readout architectures are currently being developed as promising candidates for the outer pixel layers of the future ATLAS Inner Tracker, which will be installed during the phase II upgrade of ATLAS around year 2025. In this work, two DMAPS prototype designs, named LF-Monopix and TJ-Monopix, are presented. LF-Monopix was fabricated in the LFoundry 150 nm CMOS technology, and TJ-Monopix has been designed in the TowerJazz 180 nm CMOS technology. Both chips employ the same readout architecture, i.e. the column drain architecture, whereas different sensor implementation concepts are pursued. The paper makes a joint description of the two prototypes, so that their technical differences and challenges can be addressed in direct comparison. First measurement results for LF-Monopix will also be shown, demonstrating for the first time a fully functional fast readout DMAPS prototype implemented in the LFoundry technology.

  9. Linear analysis of signal and noise characteristics of a nonlinear CMOS active-pixel detector for mammography

    Energy Technology Data Exchange (ETDEWEB)

    Yun, Seungman [School of Mechanical Engineering, Pusan National University, Busan 46241 (Korea, Republic of); Kim, Ho Kyung, E-mail: hokyung@pusan.ac.kr [School of Mechanical Engineering, Pusan National University, Busan 46241 (Korea, Republic of); Center for Advanced Medical Engineering Research, Pusan National University, Busan 46241 (Korea, Republic of); Han, Jong Chul; Kam, Soohwa [School of Mechanical Engineering, Pusan National University, Busan 46241 (Korea, Republic of); Youn, Hanbean [Department of Radiation Oncology, Pusan National University Yangsan Hospital, Yangsan, Gyeongsangnam-do 50612 (Korea, Republic of); Cunningham, Ian A. [Robarts Research Institute, Western University, London, Ontario N6A 5C1 (Canada)

    2017-03-01

    The imaging properties of a complementary metal-oxide-semiconductor (CMOS) active-pixel photodiode array coupled to a thin gadolinium-based granular phosphor screen with a fiber-optic faceplate are investigated. It is shown that this system has a nonlinear response at low detector exposure levels (<10 mR), resulting in an over-estimation of the detective quantum efficiency (DQE) by a factor of two in some cases. Errors in performance metrics on this scale make it difficult to compare new technologies with established systems and predict performance benchmarks that can be achieved in practice and help understand performance bottlenecks. It is shown the CMOS response is described by a power-law model that can be used to linearize image data. Linearization removed an unexpected dependence of the DQE on detector exposure level. - Highlights: • A nonlinear response of a CMOS detector at low exposure levels can overestimate DQE. • A power-law form can model the response of a CMOS detector at low exposure levels, and can be used to linearize image data. • Performance evaluation of nonlinear imaging systems must incorporate adequate linearizations.

  10. Large area CMOS active pixel sensor x-ray imager for digital breast tomosynthesis: Analysis, modeling, and characterization.

    Science.gov (United States)

    Zhao, Chumin; Kanicki, Jerzy; Konstantinidis, Anastasios C; Patel, Tushita

    2015-11-01

    Large area x-ray imagers based on complementary metal-oxide-semiconductor (CMOS) active pixel sensor (APS) technology have been proposed for various medical imaging applications including digital breast tomosynthesis (DBT). The low electronic noise (50-300 e-) of CMOS APS x-ray imagers provides a possible route to shrink the pixel pitch to smaller than 75 μm for microcalcification detection and possible reduction of the DBT mean glandular dose (MGD). In this study, imaging performance of a large area (29×23 cm2) CMOS APS x-ray imager [Dexela 2923 MAM (PerkinElmer, London)] with a pixel pitch of 75 μm was characterized and modeled. The authors developed a cascaded system model for CMOS APS x-ray imagers using both a broadband x-ray radiation and monochromatic synchrotron radiation. The experimental data including modulation transfer function, noise power spectrum, and detective quantum efficiency (DQE) were theoretically described using the proposed cascaded system model with satisfactory consistency to experimental results. Both high full well and low full well (LFW) modes of the Dexela 2923 MAM CMOS APS x-ray imager were characterized and modeled. The cascaded system analysis results were further used to extract the contrast-to-noise ratio (CNR) for microcalcifications with sizes of 165-400 μm at various MGDs. The impact of electronic noise on CNR was also evaluated. The LFW mode shows better DQE at low air kerma (Ka<10 μGy) and should be used for DBT. At current DBT applications, air kerma (Ka∼10 μGy, broadband radiation of 28 kVp), DQE of more than 0.7 and ∼0.3 was achieved using the LFW mode at spatial frequency of 0.5 line pairs per millimeter (lp/mm) and Nyquist frequency ∼6.7 lp/mm, respectively. It is shown that microcalcifications of 165-400 μm in size can be resolved using a MGD range of 0.3-1 mGy, respectively. In comparison to a General Electric GEN2 prototype DBT system (at MGD of 2.5 mGy), an increased CNR (by ∼10) for

  11. Large area CMOS active pixel sensor x-ray imager for digital breast tomosynthesis: Analysis, modeling, and characterization

    International Nuclear Information System (INIS)

    Zhao, Chumin; Kanicki, Jerzy; Konstantinidis, Anastasios C.; Patel, Tushita

    2015-01-01

    Purpose: Large area x-ray imagers based on complementary metal-oxide-semiconductor (CMOS) active pixel sensor (APS) technology have been proposed for various medical imaging applications including digital breast tomosynthesis (DBT). The low electronic noise (50–300 e − ) of CMOS APS x-ray imagers provides a possible route to shrink the pixel pitch to smaller than 75 μm for microcalcification detection and possible reduction of the DBT mean glandular dose (MGD). Methods: In this study, imaging performance of a large area (29 × 23 cm 2 ) CMOS APS x-ray imager [Dexela 2923 MAM (PerkinElmer, London)] with a pixel pitch of 75 μm was characterized and modeled. The authors developed a cascaded system model for CMOS APS x-ray imagers using both a broadband x-ray radiation and monochromatic synchrotron radiation. The experimental data including modulation transfer function, noise power spectrum, and detective quantum efficiency (DQE) were theoretically described using the proposed cascaded system model with satisfactory consistency to experimental results. Both high full well and low full well (LFW) modes of the Dexela 2923 MAM CMOS APS x-ray imager were characterized and modeled. The cascaded system analysis results were further used to extract the contrast-to-noise ratio (CNR) for microcalcifications with sizes of 165–400 μm at various MGDs. The impact of electronic noise on CNR was also evaluated. Results: The LFW mode shows better DQE at low air kerma (K a < 10 μGy) and should be used for DBT. At current DBT applications, air kerma (K a ∼ 10 μGy, broadband radiation of 28 kVp), DQE of more than 0.7 and ∼0.3 was achieved using the LFW mode at spatial frequency of 0.5 line pairs per millimeter (lp/mm) and Nyquist frequency ∼6.7 lp/mm, respectively. It is shown that microcalcifications of 165–400 μm in size can be resolved using a MGD range of 0.3–1 mGy, respectively. In comparison to a General Electric GEN2 prototype DBT system (at MGD of 2.5 m

  12. Large area CMOS active pixel sensor x-ray imager for digital breast tomosynthesis: Analysis, modeling, and characterization

    Energy Technology Data Exchange (ETDEWEB)

    Zhao, Chumin; Kanicki, Jerzy, E-mail: kanicki@eecs.umich.edu [Solid-State Electronics Laboratory, Department of Electrical Engineering and Computer Science, University of Michigan, Ann Arbor, Michigan 48109 (United States); Konstantinidis, Anastasios C. [Department of Medical Physics and Biomedical Engineering, University College London, London WC1E 6BT, United Kingdom and Diagnostic Radiology and Radiation Protection, Christie Medical Physics and Engineering, The Christie NHS Foundation Trust, Manchester M20 4BX (United Kingdom); Patel, Tushita [Department of Physics, University of Virginia, Charlottesville, Virginia 22908 (United States)

    2015-11-15

    Purpose: Large area x-ray imagers based on complementary metal-oxide-semiconductor (CMOS) active pixel sensor (APS) technology have been proposed for various medical imaging applications including digital breast tomosynthesis (DBT). The low electronic noise (50–300 e{sup −}) of CMOS APS x-ray imagers provides a possible route to shrink the pixel pitch to smaller than 75 μm for microcalcification detection and possible reduction of the DBT mean glandular dose (MGD). Methods: In this study, imaging performance of a large area (29 × 23 cm{sup 2}) CMOS APS x-ray imager [Dexela 2923 MAM (PerkinElmer, London)] with a pixel pitch of 75 μm was characterized and modeled. The authors developed a cascaded system model for CMOS APS x-ray imagers using both a broadband x-ray radiation and monochromatic synchrotron radiation. The experimental data including modulation transfer function, noise power spectrum, and detective quantum efficiency (DQE) were theoretically described using the proposed cascaded system model with satisfactory consistency to experimental results. Both high full well and low full well (LFW) modes of the Dexela 2923 MAM CMOS APS x-ray imager were characterized and modeled. The cascaded system analysis results were further used to extract the contrast-to-noise ratio (CNR) for microcalcifications with sizes of 165–400 μm at various MGDs. The impact of electronic noise on CNR was also evaluated. Results: The LFW mode shows better DQE at low air kerma (K{sub a} < 10 μGy) and should be used for DBT. At current DBT applications, air kerma (K{sub a} ∼ 10 μGy, broadband radiation of 28 kVp), DQE of more than 0.7 and ∼0.3 was achieved using the LFW mode at spatial frequency of 0.5 line pairs per millimeter (lp/mm) and Nyquist frequency ∼6.7 lp/mm, respectively. It is shown that microcalcifications of 165–400 μm in size can be resolved using a MGD range of 0.3–1 mGy, respectively. In comparison to a General Electric GEN2 prototype DBT system (at

  13. Ultra-thin silicon (UTSi) on insulator CMOS transceiver and time-division multiplexed switch chips for smart pixel integration

    Science.gov (United States)

    Zhang, Liping; Sawchuk, Alexander A.

    2001-12-01

    We describe the design, fabrication and functionality of two different 0.5 micron CMOS optoelectronic integrated circuit (OEIC) chips based on the Peregrine Semiconductor Ultra-Thin Silicon on insulator technology. The Peregrine UTSi silicon- on-sapphire (SOS) technology is a member of the silicon-on- insulator (SOI) family. The low-loss synthetic sapphire substrate is optically transparent and has good thermal conductivity and coefficient of thermal expansion properties, which meet the requirements for flip-chip bonding of VCSELs and other optoelectronic input-output components. One chip contains transceiver and network components, including four channel high-speed CMOS transceiver modules, pseudo-random bit stream (PRBS) generators, a voltage controlled oscillator (VCO) and other test circuits. The transceiver chips can operate in both self-testing mode and networking mode. An on- chip clock and true-single-phase-clock (TSPC) D-flip-flop have been designed to generate a PRBS at over 2.5 Gb/s for the high-speed transceiver arrays to operate in self-testing mode. In the networking mode, an even number of transceiver chips forms a ring network through free-space or fiber ribbon interconnections. The second chip contains four channel optical time-division multiplex (TDM) switches, optical transceiver arrays, an active pixel detector and additional test devices. The eventual applications of these chips will require monolithic OEICs with integrated optical input and output. After fabrication and testing, the CMOS transceiver array dies will be packaged with 850 nm vertical cavity surface emitting lasers (VCSELs), and metal-semiconductor- metal (MSM) or GaAs p-i-n detector die arrays to achieve high- speed optical interconnections. The hybrid technique could be either wire bonding or flip-chip bonding of the CMOS SOS smart-pixel arrays with arrays of VCSELs and photodetectors onto an optoelectronic chip carrier as a multi-chip module (MCM).

  14. Characterization of the column-based priority logic readout of Topmetal-II− CMOS pixel direct charge sensor

    International Nuclear Information System (INIS)

    An, M.; Zhang, W.; Xiao, L.; Gao, C.; Chen, C.; Huang, G.; Ji, R.; Liu, J.; Pei, H.; Sun, X.; Wang, K.; Yang, P.; Zhou, W.; Han, M.; Mei, Y.; Li, X.; Sun, Q.

    2017-01-01

    We present the detailed study of the digital readout of Topmetal-II - CMOS pixel direct charge sensor. Topmetal-II - is an integrated sensor with an array of 72×72 pixels each capable of directly collecting external charge through exposed metal electrodes in the topmost metal layer. In addition to the time-shared multiplexing readout of the analog output from Charge Sensitive Amplifiers in each pixel, hits are also generated through comparators in each pixel with individually adjustable thresholds. The hits are read out via a column-based priority logic structure, retaining both hit location and time information. The in-array column-based priority logic features with a full clock-less circuitry hence there is no continuously running clock distributed in the pixel and matrix logic. These characteristics enable its use as the charge readout device in future Time Projection Chambers without gaseous gain mechanism, which has unique advantages in low background and low rate-density experiments. We studied the detailed working behavior and performance of this readout, and demonstrated its functional validity and potential in imaging applications.

  15. Pixelman: a multi-platform data acquisition and processing software package for Medipix2, Timepix and Medipix3 detectors

    International Nuclear Information System (INIS)

    Turecek, D; Holy, T; Jakubek, J; Pospisil, S; Vykydal, Z

    2011-01-01

    The semiconductor pixel detectors Medipix2, Timepix and Medipix3 (256x256 square pixels, 55x55 μm each) are superior imaging devices in terms of spatial resolution, linearity and dynamic range. This makes them suitable for various applications such as radiography, neutronography, micro-tomography and X-ray dynamic defectoscopy. In order to control and manage such complex measurements a multi-platform software package for acquisition and data processing with a Java graphical user interface has been developed. The functionality of the original version of Pixelman package has been upgraded and extended to include the new medipix devices. The software package can be run on Microsoft Windows, Linux and Mac OS X operating systems. The architecture is very flexible and the functionality can be extended by plugins in C++, Java or combinations of both. The software package may be used as a distributed acquisition system using computers with different operating systems over a local network or the Internet.

  16. Pixelman: a multi-platform data acquisition and processing software package for Medipix2, Timepix and Medipix3 detectors

    Energy Technology Data Exchange (ETDEWEB)

    Turecek, D; Holy, T; Jakubek, J; Pospisil, S; Vykydal, Z, E-mail: daniel.turecek@utef.cvut.cz [Institute of Experimental and Applied Physics, Czech Technical University in Prague, Horska 3a/22, 12800 Prague 2 (Czech Republic)

    2011-01-15

    The semiconductor pixel detectors Medipix2, Timepix and Medipix3 (256x256 square pixels, 55x55 {mu}m each) are superior imaging devices in terms of spatial resolution, linearity and dynamic range. This makes them suitable for various applications such as radiography, neutronography, micro-tomography and X-ray dynamic defectoscopy. In order to control and manage such complex measurements a multi-platform software package for acquisition and data processing with a Java graphical user interface has been developed. The functionality of the original version of Pixelman package has been upgraded and extended to include the new medipix devices. The software package can be run on Microsoft Windows, Linux and Mac OS X operating systems. The architecture is very flexible and the functionality can be extended by plugins in C++, Java or combinations of both. The software package may be used as a distributed acquisition system using computers with different operating systems over a local network or the Internet.

  17. Design and Test of a 65nm CMOS Front-End with Zero Dead Time for Next Generation Pixel Detectors

    Energy Technology Data Exchange (ETDEWEB)

    Gaioni, L. [INFN, Pavia; Braga, D. [Fermilab; Christian, D. [Fermilab; Deptuch, G. [Fermilab; Fahim. F., Fahim. F. [Fermilab; Nodari, B. [Lyon, IPN; Ratti, L. [INFN, Pavia; Re, V. [INFN, Pavia; Zimmerman, T. [Fermilab

    2017-09-01

    This work is concerned with the experimental characterization of a synchronous analog processor with zero dead time developed in a 65 nm CMOS technology, conceived for pixel detectors at the HL-LHC experiment upgrades. It includes a low noise, fast charge sensitive amplifier with detector leakage compensation circuit, and a compact, single ended comparator able to correctly process hits belonging to two consecutive bunch crossing periods. A 2-bit Flash ADC is exploited for digital conversion immediately after the preamplifier. A description of the circuits integrated in the front-end processor and the initial characterization results are provided

  18. Chip development in 65 nm CMOS technology for the high luminosity upgrade of the ATLAS pixel detector

    Energy Technology Data Exchange (ETDEWEB)

    Germic, Leonard; Hemperek, Tomasz; Kishishita, Testsuichi; Krueger, Hans; Rymaszewski, Piotr; Wermes, Norbert [University of Bonn, Bonn (Germany); Havranek, Miroslav [University of Bonn, Bonn (Germany); Institute of Physics of the Academy of Sciences, Prague (Czech Republic)

    2015-07-01

    The LHC High Luminosity upgrade will result in a significant change of environment in which particle detectors are going to operate, especially for devices very close to the interaction point like pixel detector electronics. Challenges coming from the higher hit rate will have to be solved by designing faster and more complex circuits, while at the same time keeping in mind very high radiation hardness requirements. Therefore matching the specification set by the high luminosity upgrade requires a large R and D effort. Our group is participating in such a joint development * namely the RD53 collaboration * which goal is to design a new pixel chip using an advanced 65 nm CMOS technology. During this presentation motivations and benefits of using this very deep-submicron technology will be shown together with a comparison with older technologies (130 nm, 250 nm). Most of the talk is allocated to presenting some of the circuits designed by our group, along with their performance measurement results.

  19. arXiv Characterization and Verification Environment for the RD53A Pixel Readout Chip in 65 nm CMOS

    CERN Document Server

    Vogt, M.; Hemperek, T.; Janssen, J.; Pohl, D.L.; Daas, M.

    2018-02-02

    The RD53 collaboration is currently designing a large scale prototype pixel readout chip in 65 nm CMOS technology for the phase 2 upgrades at the HL-LHC. The RD53A chip will be available by the end of the year 2017 and will be extensively tested to confirm if the circuit and the architecture make a solid foundation for the final pixel readout chips for the experiments at the HL-LHC. A test and data acquisition system for the RD53A chip is currently under development to perform single-chip and multi-chip module measurements. In addition, the verification of the RD53A design is performed in a dedicated simulation environment. The concept and the implementation of the test and data acquisition system and the simulation environment, which are based on a modular data acquisition and system testing framework, are presented in this work.

  20. Chip development in 65 nm CMOS technology for the high luminosity upgrade of the ATLAS pixel detector

    Energy Technology Data Exchange (ETDEWEB)

    Germic, Leonard; Hemperek, Tomasz; Kishishita, Tetsuichi; Krueger, Hans; Rymaszewski, Piotr; Wermes, Norbert [University of Bonn, Bonn (Germany)

    2016-07-01

    The LHC High Luminosity upgrade will result in a significant change of environment in which particle detectors are going to operate, especially for devices very close to the interaction point like pixel detector electronics. Challenges arising from the increased hit rate will have to be solved by designing faster and more complex readout electronics that will also have to withstand unprecedented radiation doses. Developing such integrated circuit requires a significant R and D effort and resources, therefore a joint development project between several institutes (including ours) was started. This collaboration, named RD53, aims to develop a pixel readout chip suitable for ATLAS' and CMS' upgrades using a 65nm CMOS technology. During this presentation motivations and benefits of using this very deep-submicron technology are discussed. Most of the talk is allocated to presenting some of the circuits designed by our group (focusing on developments connected to RD53 collaboration), along with their performance measurement results.

  1. A 20 Mfps high frame-depth CMOS burst-mode imager with low power in-pixel NMOS-only passive amplifier

    Science.gov (United States)

    Wu, L.; San Segundo Bello, D.; Coppejans, P.; Craninckx, J.; Wambacq, P.; Borremans, J.

    2017-02-01

    This paper presents a 20 Mfps 32 × 84 pixels CMOS burst-mode imager featuring high frame depth with a passive in-pixel amplifier. Compared to the CCD alternatives, CMOS burst-mode imagers are attractive for their low power consumption and integration of circuitry such as ADCs. Due to storage capacitor size and its noise limitations, CMOS burst-mode imagers usually suffer from a lower frame depth than CCD implementations. In order to capture fast transitions over a longer time span, an in-pixel CDS technique has been adopted to reduce the required memory cells for each frame by half. Moreover, integrated with in-pixel CDS, an in-pixel NMOS-only passive amplifier alleviates the kTC noise requirements of the memory bank allowing the usage of smaller capacitors. Specifically, a dense 108-cell MOS memory bank (10fF/cell) has been implemented inside a 30μm pitch pixel, with an area of 25 × 30μm2 occupied by the memory bank. There is an improvement of about 4x in terms of frame depth per pixel area by applying in-pixel CDS and amplification. With the amplifier's gain of 3.3, an FD input-referred RMS noise of 1mV is achieved at 20 Mfps operation. While the amplification is done without burning DC current, including the pixel source follower biasing, the full pixel consumes 10μA at 3.3V supply voltage at full speed. The chip has been fabricated in imec's 130nm CMOS CIS technology.

  2. High-voltage pixel detectors in commercial CMOS technologies for ATLAS, CLIC and Mu3e experiments

    CERN Document Server

    Peric,I et al.

    2013-01-01

    High-voltage particle detectors in commercial CMOS technologies are a detector family that allows implementation of low-cost, thin and radiation-tolerant detectors with a high time resolution. In the R/D phase of the development, a radiation tolerance of 1015 neq=cm2 , nearly 100% detection efficiency and a spatial resolution of about 3 μm were demonstrated. Since 2011 the HV detectors have first applications: the technology is presently the main option for the pixel detector of the planned Mu3e experiment at PSI (Switzerland). Several prototype sensors have been designed in a standard 180 nm HV CMOS process and successfully tested. Thanks to its high radiation tolerance, the HV detectors are also seen at CERN as a promising alternative to the standard options for ATLAS upgrade and CLIC. In order to test the concept, within ATLAS upgrade R/D, we are currently exploring an active pixel detector demonstrator HV2FEI4; also implemented in the 180 nm HV process.

  3. High-voltage pixel detectors in commercial CMOS technologies for ATLAS, CLIC and Mu3e experiments

    CERN Document Server

    Peric, Ivan; Backhaus, Malte; Barbero, Marlon; Benoit, Mathieu; Berger, Niklaus; Bompard, Frederic; Breugnon, Patrick; Clemens, Jean-Claude; Dannheim, Dominik; Dierlamm, Alexander; Feigl, Simon; Fischer, Peter; Fougeron, Denis; Garcia-Sciveres, Maurice; Heim, Timon; Hügging, Fabian; Kiehn, Moritz; Kreidl, Christian; Krüger, Hans; La Rosa, Alessandro; Liu, Jian; Lütticke, Florian; Mariñas, Carlos; Meng, Lingxin; Miucci, Antonio; Münstermann, Daniel; Nguyen, Hong Hanh; Obermann, Theresa; Pangaud, Patrick; Perrevoort, Ann-Kathrin; Rozanov, Alexandre; Schöning, André; Schwenker, Benjamin; Wiedner, Dirk

    2013-01-01

    High-voltage particle detectors in commercial CMOS technologies are a detector family that allows implementation of low-cost, thin and radiation-tolerant detectors with a high time resolution. In the R/D phase of the development, a radiation tolerance of 10 15 n eq = cm 2 , nearly 100% detection ef fi ciency and a spatial resolution of about 3 μ m were demonstrated. Since 2011 the HV detectors have fi rst applications: the technology is presently the main option for the pixel detector of the planned Mu3e experiment at PSI (Switzerland). Several prototype sensors have been designed in a standard 180 nm HV CMOS process and successfully tested. Thanks to its high radiation tolerance, the HV detectors are also seen at CERN as a promising alternative to the standard options for ATLAS upgrade and CLIC. In order to test the concept, within ATLAS upgrade R/D, we are currently exploring an active pixel detector demonstrator HV2FEI4; also implemented in the 180 nm HV process

  4. Transfer Function and Fluorescence Measurements on New CMOS Pixel Sensor for ATLAS

    CERN Document Server

    Kaemingk, Michael

    2017-01-01

    A new generation of pixel sensors is being designed for the phase II upgrade of the ATLAS Inner Tracker (ITk). These pixel sensors are being tested to ensure that they meet the demands of the ATLAS detector. As a summer student, I was involved in some of the measurements taken for this purpose.

  5. 1024-Pixel CMOS Multimodality Joint Cellular Sensor/Stimulator Array for Real-Time Holistic Cellular Characterization and Cell-Based Drug Screening.

    Science.gov (United States)

    Park, Jong Seok; Aziz, Moez Karim; Li, Sensen; Chi, Taiyun; Grijalva, Sandra Ivonne; Sung, Jung Hoon; Cho, Hee Cheol; Wang, Hua

    2018-02-01

    This paper presents a fully integrated CMOS multimodality joint sensor/stimulator array with 1024 pixels for real-time holistic cellular characterization and drug screening. The proposed system consists of four pixel groups and four parallel signal-conditioning blocks. Every pixel group contains 16 × 16 pixels, and each pixel includes one gold-plated electrode, four photodiodes, and in-pixel circuits, within a pixel footprint. Each pixel supports real-time extracellular potential recording, optical detection, charge-balanced biphasic current stimulation, and cellular impedance measurement for the same cellular sample. The proposed system is fabricated in a standard 130-nm CMOS process. Rat cardiomyocytes are successfully cultured on-chip. Measured high-resolution optical opacity images, extracellular potential recordings, biphasic current stimulations, and cellular impedance images demonstrate the unique advantages of the system for holistic cell characterization and drug screening. Furthermore, this paper demonstrates the use of optical detection on the on-chip cultured cardiomyocytes to real-time track their cyclic beating pattern and beating rate.

  6. Layout techniques to enhance the radiation tolerance of standard CMOS technologies demonstrated on a pixel detector readout chip

    CERN Document Server

    Snoeys, W; Burns, M; Campbell, M; Cantatore, E; Carrer, N; Casagrande, L; Cavagnoli, A; Dachs, C; Di Liberto, S; Formenti, F; Giraldo, A; Heijne, Erik H M; Jarron, Pierre; Letheren, M F; Marchioro, A; Martinengo, P; Meddi, F; Mikulec, B; Morando, M; Morel, M; Noah, E; Paccagnella, A; Ropotar, I; Saladino, S; Sansen, Willy; Santopietro, F; Scarlassara, F; Segato, G F; Signe, P M; Soramel, F; Vannucci, Luigi; Vleugels, K

    2000-01-01

    A new pixel readout prototype has been developed at CERN for high- energy physics applications. This full mixed mode circuit has been implemented in a commercial 0.5 mu m CMOS technology. Its radiation tolerance has been enhanced by designing all NMOS transistors in enclosed geometry and introducing guardrings wherever necessary. The technique is explained and its effectiveness demonstrated on various irradiation measurements on individual transistors and on the prototype. Circuit performance started to degrade only after a total dose of 600 krad-1.7 Mrad depending on the type of radiation. 10 keV X-rays, /sup 60/Co gamma-rays, 6.5 MeV protons, and minimum ionizing particles were used. Implications of this layout approach on the circuit design and perspectives for even deeper submicron technologies are discussed. (20 refs).

  7. CAcTμS: High-Voltage CMOS Monolithic Active Pixel Sensor for tracking and time tagging of charged particles

    CERN Document Server

    Guilloux, F.; Degerli, Y.; Elhosni, M.; Guyot, C.; Hemperek, T.; Lachkar, M.; Meyer, JP.; Ouraou, A.; Schwemling, P.; Vandenbroucke, M.

    2018-01-01

    The increase of luminosity foreseen for the Phase-II HL-LHC upgrades calls for new solutions to fight against the expected pile-up effects. One approach is to measure very accurately the time of arrival of the particles with a resolution of a few tens of picoseconds. In addition, a spatial granularity better than a few millimeter will be needed to obtain a fake jet rejection rate acceptable for physics analysis. These goals could be achieved by using the intrinsic benefits of a standard High-Voltage CMOS technology – in conjunction with a high-resistivity detector material – leading to a fast, integrated, rad-hard, fully depleted monolithic active pixel sensor ASIC.

  8. Radiation-hard Active Pixel Sensors for HL-LHC Detector Upgrades based on HV-CMOS Technology

    CERN Document Server

    Miucci, A; Hemperek, T.; Hügging, F.; Krüger, H.; Obermann, T.; Wermes, N.; Garcia-Sciveres, M.; Backhaus, M.; Capeans, M.; Feigl, S.; Nessi, M.; Pernegger, H.; Ristic, B.; Gonzalez-Sevilla, S.; Ferrere, D.; Iacobucci, G.; Rosa, A.La; Muenstermann, D.; George, M.; Grosse-Knetter, J.; Quadt, A.; Rieger, J.; Weingarten, J.; Bates, R.; Blue, A.; Buttar, C.; Hynds, D.; Kreidl, C.; Peric, I.; Breugnon, P.; Pangaud, P.; Godiot-Basolo, S.; Fougeron, D.; Bompard, F.; Clemens, J.C.; Liu, J; Barbero, M.; Rozanov, A

    2014-01-01

    Luminosity upgrades are discussed for the LHC (HL-LHC) which would make updates to the detectors necessary, requiring in particular new, even more radiation-hard and granular, sensors for the inner detector region. 1Corresponding author. c CERN 2014, published under the terms of the Creative Commons Attribution 3.0 License by IOP Publishing Ltd and Sissa Medialab srl. Any further distribution of this work must maintain attribution to the author(s) and the published article’s title, journal citation and DOI. doi:10.1088/1748-0221/9/05/C050642014 JINST 9 C05064 A proposal for the next generation of inner detectors is based on HV-CMOS: a new family of silicon sensors based on commercial high-voltage CMOS technology, which enables the fabrication of part of the pixel electronics inside the silicon substrate itself. The main advantages of this technology with respect to the standard silicon sensor technology are: low material budget, fast charge collection time, high radiation tolerance, low cost and operation a...

  9. Development of CMOS Monolithic Active Pixel Sensors for the ALICE-ITS Outer Barrel and for the CBM-MVD

    CERN Document Server

    Deveaux, Michael

    2015-01-01

    After more than a decade of R&D;, CMOS Monolithic Active Pixel Sensors (MAPS or CPS) have proven to offer concrete answers to the demanding requirements of subatomic physics experi- ments. Their main advantages result from their low material budget, their very high granularity and their integrated signal processing circuitry, which allows coping with high particle rates. Moreover, they offer a valuable radiation tolerance and may be produced at low cost. Sensors of the MIMOSA series have offered an opportunity for nuclear and particle physics exper- iments to address with improved sensitivity physics studies requiring an accurate reconstruction of short living and soft particles. One of their major applications is the STAR-PXL detector, which is the first vertex detector based on MAPS. While this experiment is successfully taking data since two years, it was found that the 0.35 m CMOS technology used for this purpose is not suited for upcoming applications like the CBM micro-vertex detector (MVD) and the ...

  10. Synchrotron based planar imaging and digital tomosynthesis of breast and biopsy phantoms using a CMOS active pixel sensor.

    Science.gov (United States)

    Szafraniec, Magdalena B; Konstantinidis, Anastasios C; Tromba, Giuliana; Dreossi, Diego; Vecchio, Sara; Rigon, Luigi; Sodini, Nicola; Naday, Steve; Gunn, Spencer; McArthur, Alan; Olivo, Alessandro

    2015-03-01

    The SYRMEP (SYnchrotron Radiation for MEdical Physics) beamline at Elettra is performing the first mammography study on human patients using free-space propagation phase contrast imaging. The stricter spatial resolution requirements of this method currently force the use of conventional films or specialized computed radiography (CR) systems. This also prevents the implementation of three-dimensional (3D) approaches. This paper explores the use of an X-ray detector based on complementary metal-oxide-semiconductor (CMOS) active pixel sensor (APS) technology as a possible alternative, for acquisitions both in planar and tomosynthesis geometry. Results indicate higher quality of the images acquired with the synchrotron set-up in both geometries. This improvement can be partly ascribed to the use of parallel, collimated and monochromatic synchrotron radiation (resulting in scatter rejection, no penumbra-induced blurring and optimized X-ray energy), and partly to phase contrast effects. Even though the pixel size of the used detector is still too large - and thus suboptimal - for free-space propagation phase contrast imaging, a degree of phase-induced edge enhancement can clearly be observed in the images. Copyright © 2014 Associazione Italiana di Fisica Medica. Published by Elsevier Ltd. All rights reserved.

  11. A new CMOS SiGeC avalanche photo-diode pixel for IR sensing

    Science.gov (United States)

    Augusto, Carlos; Forester, Lynn; Diniz, Pedro C.

    2009-05-01

    Near-infra-red sensing with silicon is limited by the bandgap of silicon, corresponding to a maximum wavelength of absorption of 1.1 μm. A new type of CMOS sensor is presented, which uses a SiGeC epitaxial film in conjunction with novel device architecture to extend absorption into the infra-red. The SiGeC film composition and thickness determine the spectrum of absorption; in particular for SiGeC superlattices, the layer ordering to create pseudo direct bandgaps is the critical parameter. In this new device architecture, the p-type SiGeC film is grown on an active region surrounded by STI, linked to the S/D region of an adjacent NMOS, under the STI by a floating N-Well. On a n-type active, a P-I-N device is formed, and on a p-type active, a P-I-P device is formed, each sensing different regions of the spectrum. The SiGeC films can be biased for avalanche operation, as the required vertical electric field is confined to the region near the heterojunction interface, thereby not affecting the gate oxide of the adjacent NMOS. With suitable heterojunction and doping profiles, the avalanche region can also be bandgap engineered, allowing for avalanche breakdown voltages that are compatible with CMOS devices.

  12. Direct reading of charge multipliers with a self-triggering CMOS analog chip with 105k pixels at 50 micron pitch

    CERN Document Server

    Bellazzini, R; Minuti, M; Baldini, L; Brez, A; Cavalca, F; Latronico, L; Omodei, N; Massai, M M; Sgro, C; Costa, E; Krummenacher, P S F; De Oliveira, R

    2006-01-01

    We report on a large active area (15x15mm2), high channel density (470 pixels/mm2), self-triggering CMOS analog chip that we have developed as pixelized charge collecting electrode of a Micropattern Gas Detector. This device, which represents a big step forward both in terms of size and performance, is the last version of three generations of custom ASICs of increasing complexity. The CMOS pixel array has the top metal layer patterned in a matrix of 105600 hexagonal pixels at 50 micron pitch. Each pixel is directly connected to the underneath full electronics chain which has been realized in the remaining five metal and two poly-silicon layers of a 0.18 micron VLSI technology. The chip has customizable self-triggering capability and includes a signal pre-processing function for the automatic localization of the event coordinates. In this way it is possible to reduce significantly the readout time and the data volume by limiting the signal output only to those pixels belonging to the region of interest. The ve...

  13. A CMOS active pixel sensor system for laboratory- based x-ray diffraction studies of biological tissue

    International Nuclear Information System (INIS)

    Bohndiek, Sarah E; Cook, Emily J; Arvanitis, Costas D; Olivo, Alessandro; Royle, Gary J; Clark, Andy T; Prydderch, Mark L; Turchetta, Renato; Speller, Robert D

    2008-01-01

    X-ray diffraction studies give material-specific information about biological tissue. Ideally, a large area, low noise, wide dynamic range digital x-ray detector is required for laboratory-based x-ray diffraction studies. The goal of this work is to introduce a novel imaging technology, the CMOS active pixel sensor (APS) that has the potential to fulfil all these requirements, and demonstrate its feasibility for coherent scatter imaging. A prototype CMOS APS has been included in an x-ray diffraction demonstration system. An industrial x-ray source with appropriate beam filtration is used to perform angle dispersive x-ray diffraction (ADXRD). Optimization of the experimental set-up is detailed including collimator options and detector operating parameters. Scatter signatures are measured for 11 different materials, covering three medical applications: breast cancer diagnosis, kidney stone identification and bone mineral density calculations. Scatter signatures are also recorded for three mixed samples of known composition. Results are verified using two independent models for predicting the APS scatter signature: (1) a linear systems model of the APS and (2) a linear superposition integral combining known monochromatic scatter signatures with the input polychromatic spectrum used in this case. Cross validation of experimental, modelled and literature results proves that APS are able to record biologically relevant scatter signatures. Coherent scatter signatures are sensitive to multiple materials present in a sample and provide a means to quantify composition. In the future, production of a bespoke APS imager for x-ray diffraction studies could enable simultaneous collection of the transmitted beam and scattered radiation in a laboratory-based coherent scatter system, making clinical transfer of the technique attainable

  14. GOSSIP: A vertex detector combining a thin gas layer as signal generator with a CMOS readout pixel array

    Energy Technology Data Exchange (ETDEWEB)

    Campbell, M. [CERN/MediPix Consortium, Geneva (Switzerland); Heijne, E.H.M. [CERN/MediPix Consortium, Geneva (Switzerland); Llopart, X. [CERN/MediPix Consortium, Geneva (Switzerland); Colas, P. [DAPNIA, CEA Saclay, 91191 Gif sur Yvette Cedex (France); Giganon, A. [DAPNIA, CEA Saclay, 91191 Gif sur Yvette Cedex (France); Giomataris, Y. [DAPNIA, CEA Saclay, 91191 Gif sur Yvette Cedex (France); Chefdeville, M. [NIKHEF, Amsterdam (Netherlands); Colijn, A.P. [NIKHEF, Amsterdam (Netherlands); Fornaini, A. [NIKHEF, Amsterdam (Netherlands); Graaf, H. van der [NIKHEF, Amsterdam (Netherlands)]. E-mail: vdgraaf@nikhef.nl; Kluit, P. [NIKHEF, Amsterdam (Netherlands); Timmermans, J. [NIKHEF, Amsterdam (Netherlands); Visschers, J.L. [NIKHEF, Amsterdam (Netherlands); Schmitz, J. [University of Twente/MESA (Netherlands)

    2006-05-01

    A small TPC has been read out by means of a Medipix2 chip as direct anode. A Micromegas foil was placed 50{mu}m above the chip, and electron multiplication occurred in the gap. With a He/isobutane 80/20 mixture, gas multiplication factors up to tens of thousands were achieved, resulting in an efficiency for detecting single electrons of better than 90%. With this new readout technology for gas-filled detectors we recorded many image frames containing 2D images with tracks from cosmic muons. Along these tracks, electron clusters were observed, as well as {delta}-rays. With a gas layer thickness of only 1mm, the device could be applied as vertex detector, outperforming all Si-based detectors.

  15. GOSSIP: A vertex detector combining a thin gas layer as signal generator with a CMOS readout pixel array

    International Nuclear Information System (INIS)

    Campbell, M.; Heijne, E.H.M.; Llopart, X.; Colas, P.; Giganon, A.; Giomataris, Y.; Chefdeville, M.; Colijn, A.P.; Fornaini, A.; Graaf, H. van der; Kluit, P.; Timmermans, J.; Visschers, J.L.; Schmitz, J.

    2006-01-01

    A small TPC has been read out by means of a Medipix2 chip as direct anode. A Micromegas foil was placed 50μm above the chip, and electron multiplication occurred in the gap. With a He/isobutane 80/20 mixture, gas multiplication factors up to tens of thousands were achieved, resulting in an efficiency for detecting single electrons of better than 90%. With this new readout technology for gas-filled detectors we recorded many image frames containing 2D images with tracks from cosmic muons. Along these tracks, electron clusters were observed, as well as δ-rays. With a gas layer thickness of only 1mm, the device could be applied as vertex detector, outperforming all Si-based detectors

  16. GOSSIP: A vertex detector combining a thin gas layer as signal generator with a CMOS readout pixel array

    Science.gov (United States)

    Campbell, M.; Heijne, E. H. M.; Llopart, X.; Colas, P.; Giganon, A.; Giomataris, Y.; Chefdeville, M.; Colijn, A. P.; Fornaini, A.; van der Graaf, H.; Kluit, P.; Timmermans, J.; Visschers, J. L.; Schmitz, J.

    2006-05-01

    A small TPC has been read out by means of a Medipix2 chip as direct anode. A Micromegas foil was placed 50 μm above the chip, and electron multiplication occurred in the gap. With a He/isobutane 80/20 mixture, gas multiplication factors up to tens of thousands were achieved, resulting in an efficiency for detecting single electrons of better than 90%. With this new readout technology for gas-filled detectors we recorded many image frames containing 2D images with tracks from cosmic muons. Along these tracks, electron clusters were observed, as well as δ-rays. With a gas layer thickness of only 1 mm, the device could be applied as vertex detector, outperforming all Si-based detectors.

  17. Imaging properties of the Medipix2 system exploiting single and dual energy thresholds

    CERN Document Server

    Tlustos, Lukas; Campbell, Michael; Heijne, Erik H M; Kincade, Karla Lorraine; Llopart-Cudie, Xavier; Stejskal, Pavel

    2006-01-01

    Low noise, high resolution and high dose efficiency are the common requirements for most X-ray imaging applications. Especially in medical applications the dose efficiency is a necessity for detector systems. We present the imaging performance of the Medipix2 readout chip bump bonded to a 300 mu m thick Si detector as a function of the detection threshold, a free parameter not available in conventional integrating imaging systems. Spatial resolution has been measured using the modulation transfer function (MTF) and it varies between 8.2 Ip/mm and 11.0 Ip/mm at 70%. An associated measurement of noise power spectrum (NPS) permits us to derive the detective quantum efficiency (DQE) which can be as a high as 25.5 % for a broadband incoming spectrum. The influence of charge diffusion in the sensor together with threshold variation in the readout chip is discussed. Although the Medipix2 system is used in photon counting mode with a single threshold in energy, the system is also capable of counting within a given en...

  18. Design of Pixellated CMOS Photon Detector for Secondary Electron Detection in the Scanning Electron Microscope

    Directory of Open Access Journals (Sweden)

    Joon Huang Chuah

    2011-01-01

    Full Text Available This paper presents a novel method of detecting secondary electrons generated in the scanning electron microscope (SEM. The method suggests that the photomultiplier tube (PMT, traditionally used in the Everhart-Thornley (ET detector, is to be replaced with a configurable multipixel solid-state photon detector offering the advantages of smaller dimension, lower supply voltage and power requirements, and potentially cheaper product cost. The design of the proposed detector has been implemented using a standard 0.35 μm CMOS technology with optical enhancement. This microchip comprises main circuit constituents of an array of photodiodes connecting to respective noise-optimised transimpedance amplifiers (TIAs, a selector-combiner (SC circuit, and a postamplifier (PA. The design possesses the capability of detecting photons with low input optical power in the range of 1 nW with 100 μm × 100 μm sized photodiodes and achieves a total amplification of 180 dBΩ at the output.

  19. The first fully functional 3D CMOS chip with Deep N-well active pixel sensors for the ILC vertex detector

    International Nuclear Information System (INIS)

    Traversi, G.; Gaioni, L.; Manazza, A.; Manghisoni, M.; Ratti, L.; Re, V.

    2013-01-01

    This work presents the characterization of Deep N-well (DNW) active pixel sensors fabricated in a vertically integrated technology. The DNW approach takes advantage of the triple well structure to lay out a sensor with relatively large charge collecting area (as compared to standard three transistor MAPS), while the readout is performed by a classical signal processing chain for capacitive detectors. This new 3D design relies upon stacking two homogeneous tiers fabricated in a 130 nm CMOS process where the top tier is thinned down to about 12μm to expose through silicon vias (TSV), therefore making connection to the buried circuits possible. This technology has been used to design a fine pitch 3D CMOS sensor with sparsification capabilities, in view of vertexing applications to the International Linear Collider (ILC) experiments. Results from the characterization of different kind of test structures, including single pixels, 3×3 and 8×8 matrices, are presented

  20. A 10 MS/s 8-bit charge-redistribution ADC for hybrid pixel applications in 65 m CMOS

    International Nuclear Information System (INIS)

    Kishishita, Tetsuichi; Hemperek, Tomasz; Krüger, Hans; Koch, Manuel; Germic, Leonard; Wermes, Norbert

    2013-01-01

    The design and measurement results of an 8-bit SAR ADC, based on a charge-redistribution DAC, are presented. This ADC is characterized by superior power efficiency and small area, realized by employing a lateral metal–metal capacitor array and a dynamic two-stage comparator. To avoid the need for a high-speed clock and its associated power consumption, an asynchronous logic was implemented in a logic control cell. A test chip has been developed in a 65 nm CMOS technology, including eight ADC channels with different layout flavors of the capacitor array, a transimpedance amplifier as a signal input structure, a serializer, and a custom-made LVDS driver for data transmission. The integral (INL) and differential (DNL) nonlinearities are measured below 0.5 LSB and 0.8 LSB, respectively, for the best channel operating at a sampling frequency of 10 MS/s. The area occupies 40μm×70μm for one ADC channel. The power consumption is estimated as 4μW at 1 MS/s and 38μW at 10 MS/s with a supply rail of 1.2 V. These excellent performance features and the natural radiation hardness of the design, due to the thin gate oxide thickness of transistors, are very interesting for front-end electronics ICs of future hybrid-pixel detector systems

  1. A 10 MS/s 8-bit charge-redistribution ADC for hybrid pixel applications in 65 m CMOS

    Energy Technology Data Exchange (ETDEWEB)

    Kishishita, Tetsuichi, E-mail: kisisita@physik.uni-bonn.de; Hemperek, Tomasz; Krüger, Hans; Koch, Manuel; Germic, Leonard; Wermes, Norbert

    2013-12-21

    The design and measurement results of an 8-bit SAR ADC, based on a charge-redistribution DAC, are presented. This ADC is characterized by superior power efficiency and small area, realized by employing a lateral metal–metal capacitor array and a dynamic two-stage comparator. To avoid the need for a high-speed clock and its associated power consumption, an asynchronous logic was implemented in a logic control cell. A test chip has been developed in a 65 nm CMOS technology, including eight ADC channels with different layout flavors of the capacitor array, a transimpedance amplifier as a signal input structure, a serializer, and a custom-made LVDS driver for data transmission. The integral (INL) and differential (DNL) nonlinearities are measured below 0.5 LSB and 0.8 LSB, respectively, for the best channel operating at a sampling frequency of 10 MS/s. The area occupies 40μm×70μm for one ADC channel. The power consumption is estimated as 4μW at 1 MS/s and 38μW at 10 MS/s with a supply rail of 1.2 V. These excellent performance features and the natural radiation hardness of the design, due to the thin gate oxide thickness of transistors, are very interesting for front-end electronics ICs of future hybrid-pixel detector systems.

  2. Pixel pitch and particle energy influence on the dark current distribution of neutron irradiated CMOS image sensors.

    Science.gov (United States)

    Belloir, Jean-Marc; Goiffon, Vincent; Virmontois, Cédric; Raine, Mélanie; Paillet, Philippe; Duhamel, Olivier; Gaillardin, Marc; Molina, Romain; Magnan, Pierre; Gilard, Olivier

    2016-02-22

    The dark current produced by neutron irradiation in CMOS Image Sensors (CIS) is investigated. Several CIS with different photodiode types and pixel pitches are irradiated with various neutron energies and fluences to study the influence of each of these optical detector and irradiation parameters on the dark current distribution. An empirical model is tested on the experimental data and validated on all the irradiated optical imagers. This model is able to describe all the presented dark current distributions with no parameter variation for neutron energies of 14 MeV or higher, regardless of the optical detector and irradiation characteristics. For energies below 1 MeV, it is shown that a single parameter has to be adjusted because of the lower mean damage energy per nuclear interaction. This model and these conclusions can be transposed to any silicon based solid-state optical imagers such as CIS or Charged Coupled Devices (CCD). This work can also be used when designing an optical imager instrument, to anticipate the dark current increase or to choose a mitigation technique.

  3. Monolithic pixel detectors in a 0.13μm CMOS technology with sensor level continuous time charge amplification and shaping

    International Nuclear Information System (INIS)

    Ratti, L.; Manghisoni, M.; Re, V.; Speziali, V.; Traversi, G.; Bettarini, S.; Calderini, G.; Cenci, R.; Giorgi, M.; Forti, F.; Morsani, F.; Rizzo, G.

    2006-01-01

    This work studies the feasibility of a new implementation of CMOS monolithic active pixel sensors (MAPS) for applications to charged particle tracking. As compared to standard three MOSFET MAPS, where the charge signal is readout by a source follower, the proposed front-end scheme relies upon a charge sensitive amplifier (CSA), embedded in the elementary pixel cell, to perform charge-to-voltage conversion. The area required for the integration of the front-end electronics is mostly provided by the collecting electrode, which consists of a deep n-type diffusion, available as a shielding frame for n-channel devices in deep submicron, triple well CMOS technologies. Based on the above concept, a chip, which includes several test structures differing in the sensitive element area, has been fabricated in a 0.13μm CMOS process. In this paper, the criteria underlying the design of the pixel level analog processor will be presented, together with some preliminary experimental results demonstrating the feasibility of the proposed approach

  4. Prototype of the front-end circuit for the GOSSIP (Gas On Slimmed Silicon Pixel) chip in the 0.13 μm CMOS technology

    CERN Document Server

    Gromov, V; van der Graaf, H

    2007-01-01

    The new GOSSIP detector, capable to detect single electrons in gas, has certain advantages with respect silicon (pixel) detectors. It does not require a Si sensor; it has a very low detector parasitic capacitance and a zero bias current at the pixel input. These are attractive features to design a compact, low-noise and low-power integrated input circuit. A prototype of the integrated circuit has been developed in 0.13 μm CMOS technology. It includes a few channels equipped with preamplifier, discriminator and the digital circuit to study the feasibility of the TDC-perpixel concept. The design demonstrates very low input referred noise (60e- RMS) in combination with a fast peaking time (40 ns) and an analog power dissipation as low as 2 μW per channel. Switching activity on the clock bus (up to 100 MHz) in the close vicinity of the pixel input pads does not cause noticeable extra noise.

  5. A Low-Noise CMOS THz Imager Based on Source Modulation and an In-Pixel High-Q Passive Switched-Capacitor N-Path Filter.

    Science.gov (United States)

    Boukhayma, Assim; Dupret, Antoine; Rostaing, Jean-Pierre; Enz, Christian

    2016-03-03

    This paper presents the first low noise complementary metal oxide semiconductor (CMOS) deletedCMOS terahertz (THz) imager based on source modulation and in-pixel high-Q filtering. The 31 × 31 focal plane array has been fully integrated in a 0 . 13 μ m standard CMOS process. The sensitivity has been improved significantly by modulating the active THz source that lights the scene and performing on-chip high-Q filtering. Each pixel encompass a broadband bow tie antenna coupled to an N-type metal-oxide-semiconductor (NMOS) detector that shifts the THz radiation, a low noise adjustable gain amplifier and a high-Q filter centered at the modulation frequency. The filter is based on a passive switched-capacitor (SC) N-path filter combined with a continuous-time broad-band Gm-C filter. A simplified analysis that helps in designing and tuning the passive SC N-path filter is provided. The characterization of the readout chain shows that a Q factor of 100 has been achieved for the filter with a good matching between the analytical calculation and the measurement results. An input-referred noise of 0 . 2 μ V RMS has been measured. Characterization of the chip with different THz wavelengths confirms the broadband feature of the antenna and shows that this THz imager reaches a total noise equivalent power of 0 . 6 nW at 270 GHz and 0 . 8 nW at 600 GHz.

  6. Experimental characterization of a 10 μW 55 μm-pitch FPN-compensated CMOS digital pixel sensor for X-ray imagers

    Energy Technology Data Exchange (ETDEWEB)

    Figueras, Roger, E-mail: roger.figueras@imb-cnm.csic.es [Institut de Microelectrònica de Barcelona IMB-CNM(CSIC), Bellaterra (Spain); Martínez, Ricardo; Terés, Lluís [Institut de Microelectrònica de Barcelona IMB-CNM(CSIC), Bellaterra (Spain); Serra-Graells, Francisco [Institut de Microelectrònica de Barcelona IMB-CNM(CSIC), Bellaterra (Spain); Department of Microelectronics and Electronic Systems, Universitat Autònoma de Barcelona, Bellaterra (Spain)

    2014-10-11

    This paper presents experimental results obtained from both electrical and radiation tests of a new room-temperature digital pixel sensor (DPS) circuit specifically optimized for digital direct X-ray imaging. The 10 μW 55 μm-pitch CMOS active pixel circuit under test includes self-bias capability, built-in test, selectable e{sup −}/h{sup +} collection, 10-bit charge-integration A/D conversion, individual gain tuning for fixed pattern noise (FPN) cancellation, and digital-only I/O interface, which make it suitable for 2D modular chip assemblies in large and seamless sensing areas. Experimental results for this DPS architecture in 0.18 μm 1P6M CMOS technology are reported, returning good performance in terms of linearity, 2ke{sub rms}{sup −} of ENC, inter-pixel crosstalk below 0.5 LSB, 50 Mbps of I/O speed, and good radiation response for its use in digital X-ray imaging.

  7. Charged particle detection performances of CMOS pixel sensors produced in a 0.18 um process with a high resistivity epitaxial layer

    OpenAIRE

    Senyukov, Serhiy; Baudot, Jerome; Besson, Auguste; Claus, Gilles; Cousin, Loic; Dorokhov, Andrei; Dulinski, Wojciech; Goffe, Mathieu; Hu-Guo, Christine; Winter, Marc

    2013-01-01

    The apparatus of the ALICE experiment at CERN will be upgraded in 2017/18 during the second long shutdown of the LHC (LS2). A major motivation for this upgrade is to extend the physics reach for charmed and beauty particles down to low transverse momenta. This requires a substantial improvement of the spatial resolution and the data rate capability of the ALICE Inner Tracking System (ITS). To achieve this goal, the new ITS will be equipped with 50 um thin CMOS Pixel Sensors (CPS) covering eit...

  8. Evaluation of 320x240 pixel LEC GaAs Schottky barrier X-ray imaging arrays, hybridized to CMOS readout circuit based on charge integration

    CERN Document Server

    Irsigler, R; Alverbro, J; Borglind, J; Froejdh, C; Helander, P; Manolopoulos, S; O'Shea, V; Smith, K

    1999-01-01

    320x240 pixels GaAs Schottky barrier detector arrays were fabricated, hybridized to silicon readout circuits, and subsequently evaluated. The detector chip was based on semi-insulating LEC GaAs material. The square shaped pixel detector elements were of the Schottky barrier type and had a pitch of 38 mu m. The GaAs wafers were thinned down prior to the fabrication of the ohmic back contact. After dicing, the chips were indium bump, flip-chip bonded to CMOS readout circuits based on charge integration, and finally evaluated. A bias voltage between 50 and 100 V was sufficient to operate the detector. Results on I-V characteristics, noise behaviour and response to X-ray radiation are presented. Images of various objects and slit patterns were acquired by using a standard dental imaging X-ray source. The work done was a part of the XIMAGE project financed by the European Community (Brite-Euram). (author)

  9. Readout electronics for low dark count pixel detectors based on Geiger mode avalanche photodiodes fabricated in conventional CMOS technologies for future linear colliders

    International Nuclear Information System (INIS)

    Vilella, E.; Arbat, A.; Comerma, A.; Trenado, J.; Alonso, O.; Gascon, D.; Vila, A.; Garrido, L.; Dieguez, A.

    2011-01-01

    High sensitivity and excellent timing accuracy of the Geiger mode avalanche photodiodes make them ideal sensors as pixel detectors for particle tracking in high energy physics experiments to be performed in future linear colliders. Nevertheless, it is well known that these sensors suffer from dark counts and afterpulsing noise, which induce false hits (indistinguishable from event detection) as well as an increase in the necessary area of the readout system. In this work, we present a comparison between APDs fabricated in a high voltage 0.35 μm and a high integration 0.13 μm commercially available CMOS technologies that has been performed to determine which of them best fits the particle collider requirements. In addition, a readout circuit that allows low noise operation is introduced. Experimental characterization of the proposed pixel is also presented in this work.

  10. Development of Gentle Slope Light Guide Structure in a 3.4 μm Pixel Pitch Global Shutter CMOS Image Sensor with Multiple Accumulation Shutter Technology.

    Science.gov (United States)

    Sekine, Hiroshi; Kobayashi, Masahiro; Onuki, Yusuke; Kawabata, Kazunari; Tsuboi, Toshiki; Matsuno, Yasushi; Takahashi, Hidekazu; Inoue, Shunsuke; Ichikawa, Takeshi

    2017-12-09

    CMOS image sensors (CISs) with global shutter (GS) function are strongly required in order to avoid image degradation. However, CISs with GS function have generally been inferior to the rolling shutter (RS) CIS in performance, because they have more components. This problem is remarkable in small pixel pitch. The newly developed 3.4 µm pitch GS CIS solves this problem by using multiple accumulation shutter technology and the gentle slope light guide structure. As a result, the developed GS pixel achieves 1.8 e - temporal noise and 16,200 e - full well capacity with charge domain memory in 120 fps operation. The sensitivity and parasitic light sensitivity are 28,000 e - /lx·s and -89 dB, respectively. Moreover, the incident light angle dependence of sensitivity and parasitic light sensitivity are improved by the gentle slope light guide structure.

  11. Empirical electro-optical and x-ray performance evaluation of CMOS active pixels sensor for low dose, high resolution x-ray medical imaging

    International Nuclear Information System (INIS)

    Arvanitis, C. D.; Bohndiek, S. E.; Royle, G.; Blue, A.; Liang, H. X.; Clark, A.; Prydderch, M.; Turchetta, R.; Speller, R.

    2007-01-01

    Monolithic complementary metal oxide semiconductor (CMOS) active pixel sensors with high performance have gained attention in the last few years in many scientific and space applications. In order to evaluate the increasing capabilities of this technology, in particular where low dose high resolution x-ray medical imaging is required, critical electro-optical and physical x-ray performance evaluation was determined. The electro-optical performance includes read noise, full well capacity, interacting quantum efficiency, and pixels cross talk. The x-ray performance, including x-ray sensitivity, modulation transfer function, noise power spectrum, and detection quantum efficiency, has been evaluated in the mammographic energy range. The sensor is a 525x525 standard three transistor CMOS active pixel sensor array with more than 75% fill factor and 25x25 μm pixel pitch. Reading at 10 f/s, it is found that the sensor has 114 electrons total additive noise, 10 5 electrons full well capacity with shot noise limited operation, and 34% interacting quantum efficiency at 530 nm. Two different structured CsI:Tl phosphors with thickness 95 and 115 μm, respectively, have been optically coupled via a fiber optic plate to the array resulting in two different system configurations. The sensitivity of the two different system configurations was 43 and 47 electrons per x-ray incident on the sensor. The MTF at 10% of the two different system configurations was 9.5 and 9 cycles/mm with detective quantum efficiency of 0.45 and 0.48, respectively, close to zero frequency at ∼0.44 μC/kg (1.72 mR) detector entrance exposure. The detector was quantum limited at low spatial frequencies and its performance was comparable with high resolution a:Si and charge coupled device based x-ray imagers. The detector also demonstrates almost an order of magnitude lower noise than active matrix flat panel imagers. The results suggest that CMOS active pixel sensors when coupled to structured CsI:Tl can

  12. Charged particle detection performances of CMOS pixel sensors produced in a 0.18 um process with a high resistivity epitaxial layer

    CERN Document Server

    Senyukov, Serhiy; Besson, Auguste; Claus, Gilles; Cousin, Loic; Dorokhov, Andrei; Dulinski, Wojciech; Goffe, Mathieu; Hu-Guo, Christine; Winter, Marc

    2013-01-01

    The apparatus of the ALICE experiment at CERN will be upgraded in 2017/18 during the second long shutdown of the LHC (LS2). A major motivation for this upgrade is to extend the physics reach for charmed and beauty particles down to low transverse momenta. This requires a substantial improvement of the spatial resolution and the data rate capability of the ALICE Inner Tracking System (ITS). To achieve this goal, the new ITS will be equipped with 50 um thin CMOS Pixel Sensors (CPS) covering either the 3 innermost layers or all the 7 layers of the detector. The CPS being developed for the ITS upgrade at IPHC (Strasbourg) is derived from the MIMOSA 28 sensor realised for the STAR-PXL at RHIC in a 0.35 um CMOS process. In order to satisfy the ITS upgrade requirements in terms of readout speed and radiation tolerance, a CMOS process with a reduced feature size and a high resistivity epitaxial layer should be exploited. In this respect, the charged particle detection performance and radiation hardness of the TowerJa...

  13. Low-Voltage 96 dB Snapshot CMOS Image Sensor with 4.5 nW Power Dissipation per Pixel

    Directory of Open Access Journals (Sweden)

    Orly Yadid-Pecht

    2012-07-01

    Full Text Available Modern “smart” CMOS sensors have penetrated into various applications, such as surveillance systems, bio-medical applications, digital cameras, cellular phones and many others. Reducing the power of these sensors continuously challenges designers. In this paper, a low power global shutter CMOS image sensor with Wide Dynamic Range (WDR ability is presented. This sensor features several power reduction techniques, including a dual voltage supply, a selective power down, transistors with different threshold voltages, a non-rationed logic, and a low voltage static memory. A combination of all these approaches has enabled the design of the low voltage “smart” image sensor, which is capable of reaching a remarkable dynamic range, while consuming very low power. The proposed power-saving solutions have allowed the maintenance of the standard architecture of the sensor, reducing both the time and the cost of the design. In order to maintain the image quality, a relation between the sensor performance and power has been analyzed and a mathematical model, describing the sensor Signal to Noise Ratio (SNR and Dynamic Range (DR as a function of the power supplies, is proposed. The described sensor was implemented in a 0.18 um CMOS process and successfully tested in the laboratory. An SNR of 48 dB and DR of 96 dB were achieved with a power dissipation of 4.5 nW per pixel.

  14. Low-voltage 96 dB snapshot CMOS image sensor with 4.5 nW power dissipation per pixel.

    Science.gov (United States)

    Spivak, Arthur; Teman, Adam; Belenky, Alexander; Yadid-Pecht, Orly; Fish, Alexander

    2012-01-01

    Modern "smart" CMOS sensors have penetrated into various applications, such as surveillance systems, bio-medical applications, digital cameras, cellular phones and many others. Reducing the power of these sensors continuously challenges designers. In this paper, a low power global shutter CMOS image sensor with Wide Dynamic Range (WDR) ability is presented. This sensor features several power reduction techniques, including a dual voltage supply, a selective power down, transistors with different threshold voltages, a non-rationed logic, and a low voltage static memory. A combination of all these approaches has enabled the design of the low voltage "smart" image sensor, which is capable of reaching a remarkable dynamic range, while consuming very low power. The proposed power-saving solutions have allowed the maintenance of the standard architecture of the sensor, reducing both the time and the cost of the design. In order to maintain the image quality, a relation between the sensor performance and power has been analyzed and a mathematical model, describing the sensor Signal to Noise Ratio (SNR) and Dynamic Range (DR) as a function of the power supplies, is proposed. The described sensor was implemented in a 0.18 um CMOS process and successfully tested in the laboratory. An SNR of 48 dB and DR of 96 dB were achieved with a power dissipation of 4.5 nW per pixel.

  15. Charged particle detection performances of CMOS pixel sensors produced in a 0.18 μm process with a high resistivity epitaxial layer

    Science.gov (United States)

    Senyukov, S.; Baudot, J.; Besson, A.; Claus, G.; Cousin, L.; Dorokhov, A.; Dulinski, W.; Goffe, M.; Hu-Guo, C.; Winter, M.

    2013-12-01

    The apparatus of the ALICE experiment at CERN will be upgraded in 2017/18 during the second long shutdown of the LHC (LS2). A major motivation for this upgrade is to extend the physics reach for charmed and beauty particles down to low transverse momenta. This requires a substantial improvement of the spatial resolution and the data rate capability of the ALICE Inner Tracking System (ITS). To achieve this goal, the new ITS will be equipped with 50 μm thin CMOS Pixel Sensors (CPS) covering either the three innermost layers or all the 7 layers of the detector. The CPS being developed for the ITS upgrade at IPHC (Strasbourg) is derived from the MIMOSA 28 sensor realised for the STAR-PXL at RHIC in a 0.35 μm CMOS process. In order to satisfy the ITS upgrade requirements in terms of readout speed and radiation tolerance, a CMOS process with a reduced feature size and a high resistivity epitaxial layer should be exploited. In this respect, the charged particle detection performance and radiation hardness of the TowerJazz 0.18 μm CMOS process were studied with the help of the first prototype chip MIMOSA 32. The beam tests performed with negative pions of 120 GeV/c at the CERN-SPS allowed to measure a signal-to-noise ratio (SNR) for the non-irradiated chip in the range between 22 and 32 depending on the pixel design. The chip irradiated with the combined dose of 1 MRad and 1013neq /cm2 was observed to yield an SNR ranging between 11 and 23 for coolant temperatures varying from 15 °C to 30 °C. These SNR values were measured to result in particle detection efficiencies above 99.5% and 98% before and after irradiation, respectively. These satisfactory results allow to validate the TowerJazz 0.18 μm CMOS process for the ALICE ITS upgrade.

  16. Charged particle detection performances of CMOS pixel sensors produced in a 0.18μm process with a high resistivity epitaxial layer

    Energy Technology Data Exchange (ETDEWEB)

    Senyukov, S., E-mail: serhiy.senyukov@cern.ch; Baudot, J.; Besson, A.; Claus, G.; Cousin, L.; Dorokhov, A.; Dulinski, W.; Goffe, M.; Hu-Guo, C.; Winter, M.

    2013-12-01

    The apparatus of the ALICE experiment at CERN will be upgraded in 2017/18 during the second long shutdown of the LHC (LS2). A major motivation for this upgrade is to extend the physics reach for charmed and beauty particles down to low transverse momenta. This requires a substantial improvement of the spatial resolution and the data rate capability of the ALICE Inner Tracking System (ITS). To achieve this goal, the new ITS will be equipped with 50μm thin CMOS Pixel Sensors (CPS) covering either the three innermost layers or all the 7 layers of the detector. The CPS being developed for the ITS upgrade at IPHC (Strasbourg) is derived from the MIMOSA 28 sensor realised for the STAR-PXL at RHIC in a 0.35μm CMOS process. In order to satisfy the ITS upgrade requirements in terms of readout speed and radiation tolerance, a CMOS process with a reduced feature size and a high resistivity epitaxial layer should be exploited. In this respect, the charged particle detection performance and radiation hardness of the TowerJazz0.18μm CMOS process were studied with the help of the first prototype chip MIMOSA 32. The beam tests performed with negative pions of 120 GeV/c at the CERN-SPS allowed to measure a signal-to-noise ratio (SNR) for the non-irradiated chip in the range between 22 and 32 depending on the pixel design. The chip irradiated with the combined dose of 1 MRad and 10{sup 13}n{sub eq}/cm{sup 2} was observed to yield an SNR ranging between 11 and 23 for coolant temperatures varying from 15 °C to 30 °C. These SNR values were measured to result in particle detection efficiencies above 99.5% and 98% before and after irradiation, respectively. These satisfactory results allow to validate the TowerJazz0.18μm CMOS process for the ALICE ITS upgrade.

  17. Results from CHIPIX-FE0, a Small-Scale Prototype of a New Generation Pixel Readout ASIC in 65 nm CMOS for HL-LHC

    CERN Document Server

    Pacher, L.; Demaria, N.; Rivetti, A.; Da Rocha Rolo, M.; Dellacasa, G.; Mazza, G.; Rotondo, F.; Wheadon, R.; Paternò, A.; Panati, S.; Loddo, F.; Licciulli, F.; Ciciriello, F.; Marzocca, C.; Gaioni, L.; Traversi, G.; Re, V.; De Canio, F.; Ratti, L.; Marconi, S.; Placidi, P.; Magazzù, G.; Stabile, A.; Mattiazzo, S.

    2018-01-01

    A prototype of a new-generation readout ASIC targeting High-Luminosity (HL) LHC pixel detector upgrades has been designed and fabricated as part of the Italian INFN CHIPIX65 project using a commercial 65 nm CMOS technology. This demonstrator, hereinafter referred to as CHIPIX-FE0, is composed of a matrix of 64 × 64 pixels with 50 μm × 50 μm pixel size embedding two different architectures of analog front-ends working in parallel. The final layout of the chip was submitted and accepted for fabrication on July 2016. Chips were received back from the foundry on October 2016 and successfully characterized before irradiation. Several irra- diation campaigns with X-rays have been accomplished during 2017 at Padova INFN and CERN EP/ESE facilities under different uniformity and temperature conditions up to 630 Mrad Total Ionizing Dose (TID). These studies corfirmed negligible degradation of analog front-ends per- formance after irradiation. First sample chips have been also bump-bonded to 50 μm × 50 μm and sin...

  18. Développement d'un capteur à pixels CMOS pour un dosimètre spatial embarqué de faible poids et avec une dissipation de puissance minimale

    OpenAIRE

    Zhou , Yang

    2014-01-01

    This thesis focuses on the development of a CMOS monolithic pixel sensor used for space ionizingparticles identification and counting in high flux. A new concept for single particle identification isproposed in this study, which is based on the analysis of particle triggered clusters. To validate thisnew concept, a full size sensor including the sensitive pixel matrix, an analogue signal processingchain, a 3-bit analogue to digital converter, and a digital processing stage was designed in a 0...

  19. The FoCal prototype—an extremely fine-grained electromagnetic calorimeter using CMOS pixel sensors

    Science.gov (United States)

    de Haas, A. P.; Nooren, G.; Peitzmann, T.; Reicher, M.; Rocco, E.; Röhrich, D.; Ullaland, K.; van den Brink, A.; van Leeuwen, M.; Wang, H.; Yang, S.; Zhang, C.

    2018-01-01

    A prototype of a Si-W EM calorimeter was built with Monolithic Active Pixel Sensors as the active elements. With a pixel size of 30 μm it allows digital calorimetry, i.e. the particle's energy is determined by counting pixels, not by measuring the energy deposited. Although of modest size, with a width of only four Moliere radii, it has 39 million pixels. In this article the construction and tuning of the prototype is described. Results from beam tests are compared with predictions of GEANT-based Monte Carlo simulations. The shape of showers caused by electrons is shown in unprecedented detail. Results for energy and position resolution are also given.

  20. A Prototype of a New Generation Readout ASIC in 65 nm CMOS for Pixel Detectors at HL-LHC

    CERN Document Server

    Pacher, L.; Paternò, A; Panati, S; Demaria, L; Rivetti, A; Da Rocha Rolo, M; Dellacasa, G; Mazza, G; Rotondo, F; Wheadon, R; Loddo, F; Licciulli, F; Ciciriello, F; Marzocca, C; Gaioni, L; Traversi, G; Re, V; De Canio, F; Ratti, L; Marconi, S; Placidi, P; Magazzù, G; Stabile, A; Mattiazzo, S

    2018-01-01

    The prototype is composed of a matrix of 64×64 pixels with 50 μm × 50 μm cells featuring a compact design, low-noise and low-power performance. The pixel array integrates two diffe- rent analogue front-end architectures working in parallel, one with asynchronous and one with synchronous hit discriminators. Common characteristics are a compact layout able to fit int...

  1. Performance of capacitively coupled active pixel sensors in 180 nm HV-CMOS technology after irradiation to HL-LHC fluences

    International Nuclear Information System (INIS)

    Feigl, S

    2014-01-01

    In this ATLAS upgrade R and D project, we explore the concept of using a deep-submicron HV-CMOS process to produce a drop-in replacement for traditional radiation-hard silicon sensors. Such active sensors contain simple circuits, e.g. amplifiers and discriminators, but still require a traditional (pixel or strip) readout chip. This approach yields most advantages of MAPS (improved resolution, reduced cost and material budget, etc.), without the complication of full integration on a single chip. After outlining the basic design of the HV2FEI4 test ASIC, results after irradiation with X-rays to 862 Mrad and neutrons up to 10 16 (1 MeV n eq )/cm 2 will be presented. Finally, a brief outlook on further development plans is given

  2. A Low-Noise CMOS THz Imager Based on Source Modulation and an In-Pixel High-Q Passive Switched-Capacitor N-Path Filter

    Science.gov (United States)

    Boukhayma, Assim; Dupret, Antoine; Rostaing, Jean-Pierre; Enz, Christian

    2016-01-01

    This paper presents the first low noise complementary metal oxide semiconductor (CMOS) terahertz (THz) imager based on source modulation and in-pixel high-Q filtering. The 31×31 focal plane array has been fully integrated in a 0.13μm standard CMOS process. The sensitivity has been improved significantly by modulating the active THz source that lights the scene and performing on-chip high-Q filtering. Each pixel encompass a broadband bow tie antenna coupled to an N-type metal-oxide-semiconductor (NMOS) detector that shifts the THz radiation, a low noise adjustable gain amplifier and a high-Q filter centered at the modulation frequency. The filter is based on a passive switched-capacitor (SC) N-path filter combined with a continuous-time broad-band Gm-C filter. A simplified analysis that helps in designing and tuning the passive SC N-path filter is provided. The characterization of the readout chain shows that a Q factor of 100 has been achieved for the filter with a good matching between the analytical calculation and the measurement results. An input-referred noise of 0.2μV RMS has been measured. Characterization of the chip with different THz wavelengths confirms the broadband feature of the antenna and shows that this THz imager reaches a total noise equivalent power of 0.6 nW at 270 GHz and 0.8 nW at 600 GHz. PMID:26950131

  3. First results on DEPFET Active Pixel Sensors fabricated in a CMOS foundry—a promising approach for new detector development and scientific instrumentation

    Science.gov (United States)

    Aschauer, S.; Majewski, P.; Lutz, G.; Soltau, H.; Holl, P.; Hartmann, R.; Schlosser, D.; Paschen, U.; Weyers, S.; Dreiner, S.; Klusmann, M.; Hauser, J.; Kalok, D.; Bechteler, A.; Heinzinger, K.; Porro, M.; Titze, B.; Strüder, L.

    2017-11-01

    DEPFET Active Pixel Sensors (APS) have been introduced as focal plane detectors for X-ray astronomy already in 1996. Fabricated on high resistivity, fully depleted silicon and back-illuminated they can provide high quantum efficiency and low noise operation even at very high read rates. In 2009 a new type of DEPFET APS, the DSSC (DEPFET Sensor with Signal Compression) was developed, which is dedicated to high-speed X-ray imaging at the European X-ray free electron laser facility (EuXFEL) in Hamburg. In order to resolve the enormous contrasts occurring in Free Electron Laser (FEL) experiments, this new DSSC-DEPFET sensor has the capability of nonlinear amplification, that is, high gain for low intensities in order to obtain single-photon detection capability, and reduced gain for high intensities to achieve high dynamic range for several thousand photons per pixel and frame. We call this property "signal compression". Starting in 2015, we have been fabricating DEPFET sensors in an industrial scale CMOS foundry maintaining the outstanding proven DEPFET properties and adding new capabilities due to the industrial-scale CMOS process. We will highlight these additional features and describe the progress achieved so far. In a first attempt on double-sided polished 725 μm thick 200 mm high resistivity float zone silicon wafers all relevant device related properties have been measured, such as leakage current, depletion voltage, transistor characteristics, noise and energy resolution for X-rays and the nonlinear response. The smaller feature size provided by the new technology allows for an advanced design and significant improvements in device performance. A brief summary of the present status will be given as well as an outlook on next steps and future perspectives.

  4. A 7 ke-SD-FWC 1.2 e-RMS Temporal Random Noise 128×256 Time-Resolved CMOS Image Sensor With Two In-Pixel SDs for Biomedical Applications.

    Science.gov (United States)

    Seo, Min-Woong; Kawahito, Shoji

    2017-12-01

    A large full well capacity (FWC) for wide signal detection range and low temporal random noise for high sensitivity lock-in pixel CMOS image sensor (CIS) embedded with two in-pixel storage diodes (SDs) has been developed and presented in this paper. For fast charge transfer from photodiode to SDs, a lateral electric field charge modulator (LEFM) is used for the developed lock-in pixel. As a result, the time-resolved CIS achieves a very large SD-FWC of approximately 7ke-, low temporal random noise of 1.2e-rms at 20 fps with true correlated double sampling operation and fast intrinsic response less than 500 ps at 635 nm. The proposed imager has an effective pixel array of and a pixel size of . The sensor chip is fabricated by Dongbu HiTek 1P4M 0.11 CIS process.

  5. PIXEL 2010 - A Resume

    International Nuclear Information System (INIS)

    Wermes, N.

    2011-01-01

    The Pixel 2010 conference focused on semiconductor pixel detectors for particle tracking/vertexing as well as for imaging, in particular for synchrotron light sources and XFELs. The big LHC hybrid pixel detectors have impressively started showing their capabilities. X-ray imaging detectors, also using the hybrid pixel technology, have greatly advanced the experimental possibilities for diffraction experiments. Monolithic or semi-monolithic devices like CMOS active pixels and DEPFET pixels have now reached a state such that complete vertex detectors for RHIC and superKEKB are being built with these technologies. Finally, new advances towards fully monolithic active pixel detectors, featuring full CMOS electronics merged with efficient signal charge collection, exploiting standard CMOS technologies, SOI and/or 3D integration, show the path for the future. This resume attempts to extract the main statements of the results and developments presented at this conference.

  6. Ionizing Radiation Effects on the Noise of 65 nm CMOS Transistors for Pixel Sensor Readout at Extreme Total Dose Levels

    CERN Document Server

    Re, V.; Manghisoni, M.; Riceputi, E.; Traversi, G.; Ratti, L.

    2018-01-01

    This paper is focused on the study of the noise performance of 65 nm CMOS transistors at extremely high total ionizing dose (TID) levels of the order of several hundreds of Mrad(SiO2). Noise measurements are reported and discussed, analyzing radiation effects on 1/ f noise and channel thermal noise. In nMOSFETs, up to 10 Mrad(SiO2), the experimental behavior is consistent with a damage mechanism mainly associ- ated with lateral isolation oxides, and can be modeled by parasitic transistors turning on after irradiation and contributing to the total noise of the device. At very high dose, these parasitic transistors tend to be turned off by negative charge accumulating in interface states and compensating radiation-induced positive charge building up inside thick isolation oxides. Effects associated with ionization and hydrogen transport in spacer oxides may become dominant at 600 Mrad(SiO2) and may explain the observed noise behavior at extremely high TID. The results of this analysis provide an understanding o...

  7. A 10MS/s 8-bit charge-redistribution ADC for hybrid pixel applications in 65m CMOS

    CERN Document Server

    Kishishita, T; Krüger, H; Koch, M; Germic, L; Wermes, N

    2013-01-01

    The design and measurement results of an 8-bit SAR ADC, based on a charge-redistribution DAC, are presented. This ADC is characterized by superior power efficiency and small area, realized by employing a lateral metal–metal capacitor array and a dynamic two-stage comparator. To avoid the need for a highspeed clock and its associated power consumption, an asynchronous logic was implemented in a logic control cell. A test chip has been developed in a 65 nm CMOS technology, including eight ADC channels with different layout flavors of the capacitor array, a transimpedance amplifier as a signal input structure, a serializer, and a custom-made LVDS driver for data transmission. The integral (INL) and differential (DNL) nonlinearities are measured below 0.5 LSB and 0.8 LSB, respectively, for the best channel operating at a sampling frequency of 10 MS/s. The area occupies 40 μm 70 μm for one ADC channel. The power consumption is estimated as 4 μW at 1 MS/s and 38 μW at 10 MS/s with a supply rail of 1.2 V. Th...

  8. Research and Development of Monolithic Active Pixel Sensors for the Detection of the Elementary Particles; Recherche et developpement de capteurs actifs monolithiques CMOS pour la detection de particules elementaires

    Energy Technology Data Exchange (ETDEWEB)

    Li, Y

    2007-09-15

    In order to develop high spatial resolution and readout speed vertex detectors for the future International Linear Collider (ILC), fast CMOS Monolithic Active Pixel Sensors (MAPS) are studied on this work. Two prototypes of MAPS, MIMOSA 8 and MIMOSA 16, based on the same micro-electronic architecture were developed in CMOS processes with different thickness of epitaxial layer. The size of pixel matrix is 32 x 128: 8 columns of the pixel array are readout directly with analog outputs and the other 24 columns are connected to the column level auto-zero discriminators. The Correlated Double Sampling (CDS) structures are successfully implemented inside pixel and discriminator. The photo diode type pixels with different diode sizes are used in these prototypes. With a {sup 55}Fe X-ray radioactive source, the important parameters, such as Temporal Noise, Fixed Pattern Noise (FPN), Signal-to-Noise Ratio (SNR), Charge-to-Voltage conversion Factor (CVF) and Charge Collection Efficiency (CCE), are studied as function of readout speed and diode size. For MIMOSA 8, the effect of fast neutrons irradiation is also. Two beam tests campaigns were made: at DESY with a 5 GeV electrons beam and at CERN with a 180 GeV pions beam. Detection Efficiency and Spatial Resolution are studied in function of the discriminator threshold. For these two parameters, the influences of diode size and SNR of the central pixel of a cluster are also discussed. In order to improve the spatial resolution of the digital outputs, a very compact (25 {mu}m x 1 mm) and low consumption (300 {mu}W) column level ADC is designed in AMS 0.35 {mu}m OPTO process. Based on successive approximation architecture, the auto-offset cancellation structure is integrated. A new column level auto-zero discriminator using static latch is also designed. (author)

  9. An Over 90 dB Intra-Scene Single-Exposure Dynamic Range CMOS Image Sensor Using a 3.0 μm Triple-Gain Pixel Fabricated in a Standard BSI Process

    Directory of Open Access Journals (Sweden)

    Isao Takayanagi

    2018-01-01

    Full Text Available To respond to the high demand for high dynamic range imaging suitable for moving objects with few artifacts, we have developed a single-exposure dynamic range image sensor by introducing a triple-gain pixel and a low noise dual-gain readout circuit. The developed 3 μm pixel is capable of having three conversion gains. Introducing a new split-pinned photodiode structure, linear full well reaches 40 ke−. Readout noise under the highest pixel gain condition is 1 e− with a low noise readout circuit. Merging two signals, one with high pixel gain and high analog gain, and the other with low pixel gain and low analog gain, a single exposure dynamic rage (SEHDR signal is obtained. Using this technology, a 1/2.7”, 2M-pixel CMOS image sensor has been developed and characterized. The image sensor also employs an on-chip linearization function, yielding a 16-bit linear signal at 60 fps, and an intra-scene dynamic range of higher than 90 dB was successfully demonstrated. This SEHDR approach inherently mitigates the artifacts from moving objects or time-varying light sources that can appear in the multiple exposure high dynamic range (MEHDR approach.

  10. An Over 90 dB Intra-Scene Single-Exposure Dynamic Range CMOS Image Sensor Using a 3.0 μm Triple-Gain Pixel Fabricated in a Standard BSI Process.

    Science.gov (United States)

    Takayanagi, Isao; Yoshimura, Norio; Mori, Kazuya; Matsuo, Shinichiro; Tanaka, Shunsuke; Abe, Hirofumi; Yasuda, Naoto; Ishikawa, Kenichiro; Okura, Shunsuke; Ohsawa, Shinji; Otaka, Toshinori

    2018-01-12

    To respond to the high demand for high dynamic range imaging suitable for moving objects with few artifacts, we have developed a single-exposure dynamic range image sensor by introducing a triple-gain pixel and a low noise dual-gain readout circuit. The developed 3 μm pixel is capable of having three conversion gains. Introducing a new split-pinned photodiode structure, linear full well reaches 40 ke - . Readout noise under the highest pixel gain condition is 1 e - with a low noise readout circuit. Merging two signals, one with high pixel gain and high analog gain, and the other with low pixel gain and low analog gain, a single exposure dynamic rage (SEHDR) signal is obtained. Using this technology, a 1/2.7", 2M-pixel CMOS image sensor has been developed and characterized. The image sensor also employs an on-chip linearization function, yielding a 16-bit linear signal at 60 fps, and an intra-scene dynamic range of higher than 90 dB was successfully demonstrated. This SEHDR approach inherently mitigates the artifacts from moving objects or time-varying light sources that can appear in the multiple exposure high dynamic range (MEHDR) approach.

  11. Low-noise low-jitter 32-pixels CMOS single-photon avalanche diodes array for single-photon counting from 300 nm to 900 nm

    Energy Technology Data Exchange (ETDEWEB)

    Scarcella, Carmelo; Tosi, Alberto, E-mail: alberto.tosi@polimi.it; Villa, Federica; Tisa, Simone; Zappa, Franco [Politecnico di Milano, Dipartimento di Elettronica, Informazione e Bioingegneria, Piazza Leonardo da Vinci 32, I-20133 Milano (Italy)

    2013-12-15

    We developed a single-photon counting multichannel detection system, based on a monolithic linear array of 32 CMOS SPADs (Complementary Metal-Oxide-Semiconductor Single-Photon Avalanche Diodes). All channels achieve a timing resolution of 100 ps (full-width at half maximum) and a photon detection efficiency of 50% at 400 nm. Dark count rate is very low even at room temperature, being about 125 counts/s for 50 μm active area diameter SPADs. Detection performance and microelectronic compactness of this CMOS SPAD array make it the best candidate for ultra-compact time-resolved spectrometers with single-photon sensitivity from 300 nm to 900 nm.

  12. The Design and Implementation in $0.13\\mu m$ CMOS of an Algorithm Permitting Spectroscopic Imaging with High Spatial Resolution for Hybrid Pixel Detectors

    CERN Document Server

    Ballabriga, Rafael; Vilasís-Cardona, Xavier

    2009-01-01

    Advances in pixel detector technology are opening up new possibilities in many fields of science. Modern High Energy Physics (HEP) experiments use pixel detectors in tracking systems where excellent spatial resolution, precise timing and high signal-to-noise ratio are required for accurate and clean track reconstruction. Many groups are working worldwide to adapt the hybrid pixel technology to other fields such as medical X-ray radiography, protein structure analysis or neutron imaging. The Medipix3 chip is a 256x256 channel hybrid pixel detector readout chip working in Single Photon Counting Mode. It has been developed with a new front-end architecture aimed at eliminating the spectral distortion produced by charge diffusion in highly segmented semiconductor detectors. In the new architecture neighbouring pixels communicate with one another. Charges can be summed event-by-event and the incoming quantum can be assigned as a single hit to the pixel with the biggest charge deposit. In the case where incoming X-...

  13. Charge Pump Clock Generation PLL for the Data Output Block of the Upgraded ATLAS Pixel Front-End in 130 nm CMOS

    CERN Document Server

    Kruth, A; Arutinov, D; Barbero, M; Gronewald, M; Hemperek, T; Karagounis, M; Krueger, H; Wermes, N; Fougeron, D; Menouni, M; Beccherle, R; Dube, S; Ellege, D; Garcia-Sciveres, M; Gnani, D; Mekkaoui, A; Gromov, V; Kluit, R; Schipper, J

    2009-01-01

    FE-I4 is the 130 nm ATLAS pixel IC currently under development for upgraded Large Hadron Collider (LHC) luminosities. FE-I4 is based on a low-power analog pixel array and digital architecture concepts tuned to higher hit rates [1]. An integrated Phase Locked Loop (PLL) has been developed that locally generates a clock signal for the 160 Mbit/s output data stream from the 40 MHz bunch crossing reference clock. This block is designed for low power, low area consumption and recovers quickly from loss of lock related to single-event transients in the high radiation environment of the ATLAS pixel detector. After a general introduction to the new FE-I4 pixel front-end chip, this work focuses on the FE-I4 output blocks and on a first PLL prototype test chip submitted in early 2009. The PLL is nominally operated from a 1.2V supply and consumes 3.84mW of DC power. Under nominal operating conditions, the control voltage settles to within 2% of its nominal value in less than 700 ns. The nominal operating frequency for t...

  14. CMOS foveal image sensor chip

    Science.gov (United States)

    Bandera, Cesar (Inventor); Scott, Peter (Inventor); Sridhar, Ramalingam (Inventor); Xia, Shu (Inventor)

    2002-01-01

    A foveal image sensor integrated circuit comprising a plurality of CMOS active pixel sensors arranged both within and about a central fovea region of the chip. The pixels in the central fovea region have a smaller size than the pixels arranged in peripheral rings about the central region. A new photocharge normalization scheme and associated circuitry normalizes the output signals from the different size pixels in the array. The pixels are assembled into a multi-resolution rectilinear foveal image sensor chip using a novel access scheme to reduce the number of analog RAM cells needed. Localized spatial resolution declines monotonically with offset from the imager's optical axis, analogous to biological foveal vision.

  15. CMOS image sensors: State-of-the-art

    Science.gov (United States)

    Theuwissen, Albert J. P.

    2008-09-01

    This paper gives an overview of the state-of-the-art of CMOS image sensors. The main focus is put on the shrinkage of the pixels : what is the effect on the performance characteristics of the imagers and on the various physical parameters of the camera ? How is the CMOS pixel architecture optimized to cope with the negative performance effects of the ever-shrinking pixel size ? On the other hand, the smaller dimensions in CMOS technology allow further integration on column level and even on pixel level. This will make CMOS imagers even smarter that they are already.

  16. How good is better? A comparison between the Medipix1 and the Medipix2 chip using mammographic phantoms

    International Nuclear Information System (INIS)

    Pfeiffer, K.F.G.

    2003-01-01

    Full text: The Mixed-up chip is the successor to the Medipix 1 chip and was also developed within the framework of the Medipix Colaboration. Both chips are pixel detector readout chips working in single photon counting mode and are designed for direct conversion X-ray imaging, for which they are bump-bonded to a pixelated semiconductor sensor layer. Both assemblies used in this comparison have a 300 μm thick sensor layer made of silicon. The main changes realized in the second chip generation are the smaller pixel size of 55 μm x 55 μm, the larger number of pixels (256 x 256) and a second adjustable energy threshold which facilitates energy windowing. For comparing the two detector generations, mammographic phantoms and a suitable X-ray tube have been used. By imaging selected parts of the phantoms with both detectors under the same conditions it is possible to make a direct comparison between the imaging properties of both chips. Main aspects of the experiments were the resolution of high-contrast details and low-contrast imaging. To provide a reference point for image quality the phantoms were also imaged using standard clinical equipment. Since these measurements have been made without an anti-scatter grid, additional simulations have been performed to estimate the influence of scattered photons on the image quality

  17. Large area CMOS image sensors

    International Nuclear Information System (INIS)

    Turchetta, R; Guerrini, N; Sedgwick, I

    2011-01-01

    CMOS image sensors, also known as CMOS Active Pixel Sensors (APS) or Monolithic Active Pixel Sensors (MAPS), are today the dominant imaging devices. They are omnipresent in our daily life, as image sensors in cellular phones, web cams, digital cameras, ... In these applications, the pixels can be very small, in the micron range, and the sensors themselves tend to be limited in size. However, many scientific applications, like particle or X-ray detection, require large format, often with large pixels, as well as other specific performance, like low noise, radiation hardness or very fast readout. The sensors are also required to be sensitive to a broad spectrum of radiation: photons from the silicon cut-off in the IR down to UV and X- and gamma-rays through the visible spectrum as well as charged particles. This requirement calls for modifications to the substrate to be introduced to provide optimized sensitivity. This paper will review existing CMOS image sensors, whose size can be as large as a single CMOS wafer, and analyse the technical requirements and specific challenges of large format CMOS image sensors.

  18. Statistical Analysis of the Random Telegraph Noise in a 1.1 μm Pixel, 8.3 MP CMOS Image Sensor Using On-Chip Time Constant Extraction Method.

    Science.gov (United States)

    Chao, Calvin Yi-Ping; Tu, Honyih; Wu, Thomas Meng-Hsiu; Chou, Kuo-Yu; Yeh, Shang-Fu; Yin, Chin; Lee, Chih-Lin

    2017-11-23

    A study of the random telegraph noise (RTN) of a 1.1 μm pitch, 8.3 Mpixel CMOS image sensor (CIS) fabricated in a 45 nm backside-illumination (BSI) technology is presented in this paper. A noise decomposition scheme is used to pinpoint the noise source. The long tail of the random noise (RN) distribution is directly linked to the RTN from the pixel source follower (SF). The full 8.3 Mpixels are classified into four categories according to the observed RTN histogram peaks. A theoretical formula describing the RTN as a function of the time difference between the two phases of the correlated double sampling (CDS) is derived and validated by measured data. An on-chip time constant extraction method is developed and applied to the RTN analysis. The effects of readout circuit bandwidth on the settling ratios of the RTN histograms are investigated and successfully accounted for in a simulation using a RTN behavior model.

  19. Investigation of photon counting pixel detectors for X-ray spectroscopy and imaging

    Energy Technology Data Exchange (ETDEWEB)

    Talla, Patrick Takoukam

    2011-04-07

    The Medipix2 and Medipix3 detectors are hybrid pixelated photon counting detectors with a pixel pitch of 55 {mu}m. The sensor material used in this thesis was silicon. Because of their small pixel size they suffer from charge sharing i.e. an incoming photon can be registered by more than one pixel. In order to correct for charge sharing due to lateral diffusion of charge carriers, the Medipix3 detector was developed: with its Charge Summing Mode, the charge collected in a cluster of 2 x 2 pixel is added up and attributed to only one pixel whose counter is incremented. The adjustable threshold of the detectors allows to count the photons and to gain information on their energy. The main purposes of the thesis are to investigate spectral and imaging properties of pixelated photon counting detectors from the Medipix family such as Medipix2 and Medipix3. The investigations are based on simulations and measurements. In order to investigate the spectral properties of the detectors measurements were performed using fluorescence lines of materials such as molybdenum, silver but also some radioactive sources such as Am-241 or Cd-109. From the measured data, parameters like the threshold dispersion and the gain variation from pixel-to-pixel were extracted and used as input in the Monte Carlo code ROSI to model the responses of the detector to monoenergetic photons. The measured data are well described by the simulations for Medipix2 and for Medipix3 operating in Charge Summing Mode. Due to charge sharing and due to the energy dependence of attenuation processes in silicon and to Compton scattering the incoming and the measured spectrum differ substantially from each other. Since the responses to monoenergetic photons are known, a deconvolution was performed to determine the true incoming spectrum. Several direct and iterative methods were successfully applied on measured and simulated data of an X-ray tube and radioactive sources. The knowledge of the X-ray spectrum is

  20. Investigation of photon counting pixel detectors for X-ray spectroscopy and imaging

    International Nuclear Information System (INIS)

    Talla, Patrick Takoukam

    2011-01-01

    The Medipix2 and Medipix3 detectors are hybrid pixelated photon counting detectors with a pixel pitch of 55 μm. The sensor material used in this thesis was silicon. Because of their small pixel size they suffer from charge sharing i.e. an incoming photon can be registered by more than one pixel. In order to correct for charge sharing due to lateral diffusion of charge carriers, the Medipix3 detector was developed: with its Charge Summing Mode, the charge collected in a cluster of 2 x 2 pixel is added up and attributed to only one pixel whose counter is incremented. The adjustable threshold of the detectors allows to count the photons and to gain information on their energy. The main purposes of the thesis are to investigate spectral and imaging properties of pixelated photon counting detectors from the Medipix family such as Medipix2 and Medipix3. The investigations are based on simulations and measurements. In order to investigate the spectral properties of the detectors measurements were performed using fluorescence lines of materials such as molybdenum, silver but also some radioactive sources such as Am-241 or Cd-109. From the measured data, parameters like the threshold dispersion and the gain variation from pixel-to-pixel were extracted and used as input in the Monte Carlo code ROSI to model the responses of the detector to monoenergetic photons. The measured data are well described by the simulations for Medipix2 and for Medipix3 operating in Charge Summing Mode. Due to charge sharing and due to the energy dependence of attenuation processes in silicon and to Compton scattering the incoming and the measured spectrum differ substantially from each other. Since the responses to monoenergetic photons are known, a deconvolution was performed to determine the true incoming spectrum. Several direct and iterative methods were successfully applied on measured and simulated data of an X-ray tube and radioactive sources. The knowledge of the X-ray spectrum is

  1. Gossip: Gaseous pixels

    Science.gov (United States)

    Koffeman, E. N.

    2007-12-01

    Several years ago a revolutionary miniature TPC was developed using a pixel chip with a Micromegas foil spanned over it. To overcome the mechanical stability problems and improve the positioning accuracy while spanning a foil on top of a small readout chip a process has been developed in which a Micromegas-like grid is applied on a CMOS wafer in a post-processing step. This aluminum grid is supported on insulating pillars that are created by etching after the grid has been made. The energy resolution (measured on the absorption of the X-rays from a 55Fe source) was remarkably good. Several geometries have since been tested and we now believe that a Gas On Slimmed Silicon Pixel chip' (Gossip) may be realized. The drift region of such a gaseous pixel detector would be reduced to a millimeter. Such a detector is potentially very radiation hard (SLHC vertexing) but aging and sparking must be eliminated.

  2. Gossip: Gaseous pixels

    Energy Technology Data Exchange (ETDEWEB)

    Koffeman, E.N. [Nikhef, Kruislaan 409, 1098 SJ Amsterdam (Netherlands)], E-mail: d77@nikhef.nl

    2007-12-01

    Several years ago a revolutionary miniature TPC was developed using a pixel chip with a Micromegas foil spanned over it. To overcome the mechanical stability problems and improve the positioning accuracy while spanning a foil on top of a small readout chip a process has been developed in which a Micromegas-like grid is applied on a CMOS wafer in a post-processing step. This aluminum grid is supported on insulating pillars that are created by etching after the grid has been made. The energy resolution (measured on the absorption of the X-rays from a {sup 55}Fe source) was remarkably good. Several geometries have since been tested and we now believe that a Gas On Slimmed Silicon Pixel chip' (Gossip) may be realized. The drift region of such a gaseous pixel detector would be reduced to a millimeter. Such a detector is potentially very radiation hard (SLHC vertexing) but aging and sparking must be eliminated.

  3. Gossip: Gaseous pixels

    International Nuclear Information System (INIS)

    Koffeman, E.N.

    2007-01-01

    Several years ago a revolutionary miniature TPC was developed using a pixel chip with a Micromegas foil spanned over it. To overcome the mechanical stability problems and improve the positioning accuracy while spanning a foil on top of a small readout chip a process has been developed in which a Micromegas-like grid is applied on a CMOS wafer in a post-processing step. This aluminum grid is supported on insulating pillars that are created by etching after the grid has been made. The energy resolution (measured on the absorption of the X-rays from a 55 Fe source) was remarkably good. Several geometries have since been tested and we now believe that a Gas On Slimmed Silicon Pixel chip' (Gossip) may be realized. The drift region of such a gaseous pixel detector would be reduced to a millimeter. Such a detector is potentially very radiation hard (SLHC vertexing) but aging and sparking must be eliminated

  4. Photoresponse analysis of the CMOS photodiodes for CMOS x-ray image sensor

    International Nuclear Information System (INIS)

    Kim, Young Soo; Ha, Jang Ho; Kim, Han Soo; Yeo, Sun Mok

    2012-01-01

    Although in the short term CMOS active pixel sensors (APSs) cannot compete with the conventionally used charge coupled devices (CCDs) for high quality scientific imaging, recent development in CMOS APSs indicate that CMOS performance level of CCDs in several domains. CMOS APSs possess thereby a number of advantages such as simpler driving requirements and low power operation. CMOS image sensors can be processed in standard CMOS technologies and the potential of on-chip integration of analog and digital circuitry makes them more suitable for several vision systems where system cost is of importance. Moreover, CMOS imagers can directly benefit from on-going technological progress in the field of CMOS technologies. Due to these advantages, the CMOS APSs are currently being investigated actively for various applications such as star tracker, navigation camera and X-ray imaging etc. In most detection systems, it is thought that the sensor is most important, since this decides the signal and noise level. So, in CMOS APSs, the pixel is very important compared to other functional blocks. In order to predict the performance of such image sensor, a detailed understanding of the photocurrent generation in the photodiodes that comprise the CMOS APS is required. In this work, we developed the analytical model that can calculate the photocurrent generated in CMOS photodiode comprising CMOS APSs. The photocurrent calculations and photo response simulations with respect to the wavelength of the incident photon were performed using this model for four types of photodiodes that can be fabricated in standard CMOS process. n + /p - sub and n + /p - epi/p - sub photodiode show better performance compared to n - well/p - sub and n - well/p - epi/p - sub due to the wider depletion width. Comparing n + /p - sub and n + /p - epi/p - sub photodiode, n + /p - sub has higher photo-responsivity in longer wavelength because of the higher electron diffusion current

  5. Gas pixel detectors

    International Nuclear Information System (INIS)

    Bellazzini, R.; Baldini, L.; Brez, A.; Cavalca, F.; Latronico, L.; Massai, M.M.; Minuti, M.; Omodei, N.; Pesce-Rollins, M.; Sgro, C.; Spandre, G.; Costa, E.; Soffitta, P.

    2007-01-01

    With the Gas Pixel Detector (GPD), the class of micro-pattern gas detectors has reached a complete integration between the gas amplification structure and the read-out electronics. To obtain this goal, three generations of application-specific integrated circuit of increased complexity and improved functionality has been designed and fabricated in deep sub-micron CMOS technology. This implementation has allowed manufacturing a monolithic device, which realizes, at the same time, the pixelized charge-collecting electrode and the amplifying, shaping and charge measuring front-end electronics of a GPD. A big step forward in terms of size and performances has been obtained in the last version of the 0.18 μm CMOS analog chip, where over a large active area of 15x15 mm 2 a very high channel density (470 pixels/mm 2 ) has been reached. On the top metal layer of the chip, 105,600 hexagonal pixels at 50 μm pitch have been patterned. The chip has customable self-trigger capability and includes a signal pre-processing function for the automatic localization of the event coordinates. In this way, by limiting the output signal to only those pixels belonging to the region of interest, it is possible to reduce significantly the read-out time and data volume. In-depth tests performed on a GPD built up by coupling this device to a fine pitch (50 μm) gas electron multiplier are reported. Matching of the gas amplification and read-out pitch has let to obtain optimal results. A possible application of this detector for X-ray polarimetry of astronomical sources is discussed

  6. Pixel 2010: A résumé

    CERN Document Server

    Wermes, Norbert

    2011-01-01

    The Pixel 2010 conference focused on semiconductor pixel detectors for particle tracking/vertexing as well as for imaging, in particular for synchrotron light sources and XFELs. The big LHC hybrid pixel detectors have impressively started showing their capabilities. X-ray imaging detectors, also using the hybrid pixel technology, have greatly advanced the experimental possibilities for diffraction experiments. Monolithic or semi-monolithic devices like CMOS active pixels and DEPFET pixels have now reached a state such that complete vertex detectors for RHIC and superKEKB are being built with these technologies. Finally, new advances towards fully monolithic active pixel detectors, featuring full CMOS electronics merged with efficient signal charge collection, exploiting standard CMOS technologies, SOI and/or 3D integration, show the path for the future. This résumé attempts to extract the main statements of the results and developments presented at this conference.

  7. Simulation of single-event energy-deposition spreading in a hybrid pixellated detector for gamma imaging

    CERN Document Server

    Manach, E

    2002-01-01

    In the framework of the Medipix2 Collaboration, a new photon-counting chip is being developed made of a 256x256 array of 55 mu m-side square pixels. Although the chip was primarily developed for semiconductor X-ray imagers, we think that this type of device could be used in applications such as decommissioning of nuclear facilities where typical sources have gamma-ray energies in the range of a few hundred keV. In order to enhance the detection efficiency in this energy range, we envisage connecting the Medipix2 chip to a CdTe or CdZnTe substrate (at least 1 mm thick). The small pixel size, the thickness of the Cd(Zn)Te substrate and the high photon energy motivate us to estimate first the spatial energy spreading following a photon interaction inside the detector. Estimations were made using the MCNP Monte Carlo package by simulating the individual energy distribution for each primary photon interaction. As an illustration of our results, simulating a 660 keV gamma source, we found that there are two pixels ...

  8. High-voltage pixel sensors for ATLAS upgrade

    Energy Technology Data Exchange (ETDEWEB)

    Perić, I., E-mail: ivan.peric@ziti.uni-heidelberg.de [Heidelberg University, Institute of Computer Engineering, Mannheim (Germany); Kreidl, C.; Fischer, P. [Heidelberg University, Institute of Computer Engineering, Mannheim (Germany); Bompard, F.; Breugnon, P.; Clemens, J.-C.; Fougeron, D.; Liu, J.; Pangaud, P.; Rozanov, A.; Barbero, M. [CPPM, Marseille (France); Feigl, S.; Capeans, M.; Ferrere, D.; Pernegger, H.; Ristic, B. [CERN, Geneve (Switzerland); Muenstermann, D.; Gonzalez Sevilla, S.; La Rosa, A.; Miucci, A. [University of Geneve (Switzerland); and others

    2014-11-21

    The high-voltage (HV-) CMOS pixel sensors offer several good properties: a fast charge collection by drift, the possibility to implement relatively complex CMOS in-pixel electronics and the compatibility with commercial processes. The sensor element is a deep n-well diode in a p-type substrate. The n-well contains CMOS pixel electronics. The main charge collection mechanism is drift in a shallow, high field region, which leads to a fast charge collection and a high radiation tolerance. We are currently evaluating the use of the high-voltage detectors implemented in 180 nm HV-CMOS technology for the high-luminosity ATLAS upgrade. Our approach is replacing the existing pixel and strip sensors with the CMOS sensors while keeping the presently used readout ASICs. By intelligence we mean the ability of the sensor to recognize a particle hit and generate the address information. In this way we could benefit from the advantages of the HV sensor technology such as lower cost, lower mass, lower operating voltage, smaller pitch, smaller clusters at high incidence angles. Additionally we expect to achieve a radiation hardness necessary for ATLAS upgrade. In order to test the concept, we have designed two HV-CMOS prototypes that can be readout in two ways: using pixel and strip readout chips. In the case of the pixel readout, the connection between HV-CMOS sensor and the readout ASIC can be established capacitively.

  9. 14C autoradiography with an energy-sensitive silicon pixel detector.

    Science.gov (United States)

    Esposito, M; Mettivier, G; Russo, P

    2011-04-07

    The first performance tests are presented of a carbon-14 ((14)C) beta-particle digital autoradiography system with an energy-sensitive hybrid silicon pixel detector based on the Timepix readout circuit. Timepix was developed by the Medipix2 Collaboration and it is similar to the photon-counting Medipix2 circuit, except for an added time-based synchronization logic which allows derivation of energy information from the time-over-threshold signal. This feature permits direct energy measurements in each pixel of the detector array. Timepix is bump-bonded to a 300 µm thick silicon detector with 256 × 256 pixels of 55 µm pitch. Since an energetic beta-particle could release its kinetic energy in more than one detector pixel as it slows down in the semiconductor detector, an off-line image analysis procedure was adopted in which the single-particle cluster of hit pixels is recognized; its total energy is calculated and the position of interaction on the detector surface is attributed to the centre of the charge cluster. Measurements reported are detector sensitivity, (4.11 ± 0.03) × 10(-3) cps mm(-2) kBq(-1) g, background level, (3.59 ± 0.01) × 10(-5) cps mm(-2), and minimum detectable activity, 0.0077 Bq. The spatial resolution is 76.9 µm full-width at half-maximum. These figures are compared with several digital imaging detectors for (14)C beta-particle digital autoradiography.

  10. Optoelectronic circuits in nanometer CMOS technology

    CERN Document Server

    Atef, Mohamed

    2016-01-01

    This book describes the newest implementations of integrated photodiodes fabricated in nanometer standard CMOS technologies. It also includes the required fundamentals, the state-of-the-art, and the design of high-performance laser drivers, transimpedance amplifiers, equalizers, and limiting amplifiers fabricated in nanometer CMOS technologies. This book shows the newest results for the performance of integrated optical receivers, laser drivers, modulator drivers and optical sensors in nanometer standard CMOS technologies. Nanometer CMOS technologies rapidly advanced, enabling the implementation of integrated optical receivers for high data rates of several Giga-bits per second and of high-pixel count optical imagers and sensors. In particular, low cost silicon CMOS optoelectronic integrated circuits became very attractive because they can be extensively applied to short-distance optical communications, such as local area network, chip-to-chip and board-to-board interconnects as well as to imaging and medical...

  11. Development of a Depleted Monolithic CMOS Sensor in a 150 nm CMOS Technology for the ATLAS Inner Tracker Upgrade

    CERN Document Server

    Wang, T.

    2017-01-01

    The recent R&D focus on CMOS sensors with charge collection in a depleted zone has opened new perspectives for CMOS sensors as fast and radiation hard pixel devices. These sensors, labelled as depleted CMOS sensors (DMAPS), have already shown promising performance as feasible candidates for the ATLAS Inner Tracker (ITk) upgrade, possibly replacing the current passive sensors. A further step to exploit the potential of DMAPS is to investigate the suitability of equipping the outer layers of the ATLAS ITk upgrade with fully monolithic CMOS sensors. This paper presents the development of a depleted monolithic CMOS pixel sensor designed in the LFoundry 150 nm CMOS technology, with the focus on design details and simulation results.

  12. High-voltage CMOS detectors

    International Nuclear Information System (INIS)

    Ehrler, F.; Blanco, R.; Leys, R.; Perić, I.

    2016-01-01

    High-voltage CMOS (HVCMOS) pixel sensors are depleted active pixel sensors implemented in standard commercial CMOS processes. The sensor element is the n-well/p-substrate diode. The sensor electronics are entirely placed inside the n-well which is at the same time used as the charge collection electrode. High voltage is used to deplete the part of the substrate around the n-well. HVCMOS sensors allow implementation of complex in-pixel electronics. This, together with fast signal collection, allows a good time resolution, which is required for particle tracking in high energy physics. HVCMOS sensors will be used in Mu3e experiment at PSI and are considered as an option for both ATLAS and CLIC (CERN). Radiation tolerance and time walk compensation have been tested and results are presented. - Highlights: • High-voltage CMOS sensors will be used in Mu3e experiment at PSI (Switzerland). • HVCMOS sensors are considered as an option for ATLAS (LHC/CERN) and CLIC (CERN). • Efficiency of more than 95% (99%) has been measured with (un-)irradiated chips. • The time resolution measured in the beam tests is nearly 100 ns. • We plan to improve time resolution and efficiency by using high-resistive substrate.

  13. High-voltage CMOS detectors

    Energy Technology Data Exchange (ETDEWEB)

    Ehrler, F., E-mail: felix.ehrler@student.kit.edu; Blanco, R.; Leys, R.; Perić, I.

    2016-07-11

    High-voltage CMOS (HVCMOS) pixel sensors are depleted active pixel sensors implemented in standard commercial CMOS processes. The sensor element is the n-well/p-substrate diode. The sensor electronics are entirely placed inside the n-well which is at the same time used as the charge collection electrode. High voltage is used to deplete the part of the substrate around the n-well. HVCMOS sensors allow implementation of complex in-pixel electronics. This, together with fast signal collection, allows a good time resolution, which is required for particle tracking in high energy physics. HVCMOS sensors will be used in Mu3e experiment at PSI and are considered as an option for both ATLAS and CLIC (CERN). Radiation tolerance and time walk compensation have been tested and results are presented. - Highlights: • High-voltage CMOS sensors will be used in Mu3e experiment at PSI (Switzerland). • HVCMOS sensors are considered as an option for ATLAS (LHC/CERN) and CLIC (CERN). • Efficiency of more than 95% (99%) has been measured with (un-)irradiated chips. • The time resolution measured in the beam tests is nearly 100 ns. • We plan to improve time resolution and efficiency by using high-resistive substrate.

  14. CMOS Image Sensors: Electronic Camera On A Chip

    Science.gov (United States)

    Fossum, E. R.

    1995-01-01

    Recent advancements in CMOS image sensor technology are reviewed, including both passive pixel sensors and active pixel sensors. On- chip analog to digital converters and on-chip timing and control circuits permit realization of an electronic camera-on-a-chip. Highly miniaturized imaging systems based on CMOS image sensor technology are emerging as a competitor to charge-coupled devices for low cost uses.

  15. Simulations of depleted CMOS sensors for high-radiation environments

    CERN Document Server

    Liu, J.; Bhat, S.; Breugnon, P.; Caicedo, I.; Chen, Z.; Degerli, Y.; Godiot-Basolo, S.; Guilloux, F.; Hemperek, T.; Hirono, T.; Hügging, F.; Krüger, H.; Moustakas, K.; Pangaud, P.; Rozanov, A.; Rymaszewski, P.; Schwemling, P.; Wang, M.; Wang, T.; Wermes, N.; Zhang, L.

    2017-01-01

    After the Phase II upgrade for the Large Hadron Collider (LHC), the increased luminosity requests a new upgraded Inner Tracker (ITk) for the ATLAS experiment. As a possible option for the ATLAS ITk, a new pixel detector based on High Voltage/High Resistivity CMOS (HV/HR CMOS) technology is under study. Meanwhile, a new CMOS pixel sensor is also under development for the tracker of Circular Electron Position Collider (CEPC). In order to explore the sensor electric properties, such as the breakdown voltage and charge collection efficiency, 2D/3D Technology Computer Aided Design (TCAD) simulations have been performed carefully for the above mentioned both of prototypes. In this paper, the guard-ring simulation for a HV/HR CMOS sensor developed for the ATLAS ITk and the charge collection efficiency simulation for a CMOS sensor explored for the CEPC tracker will be discussed in details. Some comparisons between the simulations and the latest measurements will also be addressed.

  16. Pixel Experiments

    DEFF Research Database (Denmark)

    Petersen, Kjell Yngve; Søndergaard, Karin; Augustesen, Christina

    2015-01-01

    Pixel Experiments The term pixel is traditionally defined as any of the minute elements that together constitute a larger context or image. A pixel has its own form and is the smallest unit seen within a larger structure. In working with the potentials of LED technology in architectural lighting...... for using LED lighting in lighting design practice. The speculative experiments that have been set-up have aimed to clarify the variables that can be used as parameters in the design of lighting applications; including, for example, the structuring and software control of light. The experiments also...... elucidate and exemplify already well-known problems in relation to the experience of vertical and horizontal lighting. Pixel Experiments exist as a synergy between speculative test setups and lighting design in practice. This book is one of four books that is published in connection with the research...

  17. Imaging properties of small-pixel spectroscopic x-ray detectors based on cadmium telluride sensors

    International Nuclear Information System (INIS)

    Koenig, Thomas; Schulze, Julia; Zuber, Marcus; Rink, Kristian; Oelfke, Uwe; Butzer, Jochen; Hamann, Elias; Cecilia, Angelica; Zwerger, Andreas; Fauler, Alex; Fiederle, Michael

    2012-01-01

    Spectroscopic x-ray imaging by means of photon counting detectors has received growing interest during the past years. Critical to the image quality of such devices is their pixel pitch and the sensor material employed. This paper describes the imaging properties of Medipix2 MXR multi-chip assemblies bump bonded to 1 mm thick CdTe sensors. Two systems were investigated with pixel pitches of 110 and 165 μm, which are in the order of the mean free path lengths of the characteristic x-rays produced in their sensors. Peak widths were found to be almost constant across the energy range of 10 to 60 keV, with values of 2.3 and 2.2 keV (FWHM) for the two pixel pitches. The average number of pixels responding to a single incoming photon are about 1.85 and 1.45 at 60 keV, amounting to detective quantum efficiencies of 0.77 and 0.84 at a spatial frequency of zero. Energy selective CT acquisitions are presented, and the two pixel pitches' abilities to discriminate between iodine and gadolinium contrast agents are examined. It is shown that the choice of the pixel pitch translates into a minimum contrast agent concentration for which material discrimination is still possible. We finally investigate saturation effects at high x-ray fluxes and conclude with the finding that higher maximum count rates come at the cost of a reduced energy resolution. (paper)

  18. Photoresponse analysis of the CMOS photodiodes for CMOS x-ray image sensor

    Energy Technology Data Exchange (ETDEWEB)

    Kim, Young Soo; Ha, Jang Ho; Kim, Han Soo; Yeo, Sun Mok [Korea Atomic Energy Research Institute, Daejeon (Korea, Republic of)

    2012-11-15

    Although in the short term CMOS active pixel sensors (APSs) cannot compete with the conventionally used charge coupled devices (CCDs) for high quality scientific imaging, recent development in CMOS APSs indicate that CMOS performance level of CCDs in several domains. CMOS APSs possess thereby a number of advantages such as simpler driving requirements and low power operation. CMOS image sensors can be processed in standard CMOS technologies and the potential of on-chip integration of analog and digital circuitry makes them more suitable for several vision systems where system cost is of importance. Moreover, CMOS imagers can directly benefit from on-going technological progress in the field of CMOS technologies. Due to these advantages, the CMOS APSs are currently being investigated actively for various applications such as star tracker, navigation camera and X-ray imaging etc. In most detection systems, it is thought that the sensor is most important, since this decides the signal and noise level. So, in CMOS APSs, the pixel is very important compared to other functional blocks. In order to predict the performance of such image sensor, a detailed understanding of the photocurrent generation in the photodiodes that comprise the CMOS APS is required. In this work, we developed the analytical model that can calculate the photocurrent generated in CMOS photodiode comprising CMOS APSs. The photocurrent calculations and photo response simulations with respect to the wavelength of the incident photon were performed using this model for four types of photodiodes that can be fabricated in standard CMOS process. n{sup +}/p{sup -}sub and n{sup +}/p{sup -}epi/p{sup -}sub photodiode show better performance compared to n{sup -}well/p{sup -}sub and n{sup -}well/p{sup -}epi/p{sup -}sub due to the wider depletion width. Comparing n{sup +}/p{sup -}sub and n{sup +}/p{sup -}epi/p{sup -}sub photodiode, n{sup +}/p{sup -}sub has higher photo-responsivity in longer wavelength because of

  19. Precision tracking with a single gaseous pixel detector

    NARCIS (Netherlands)

    Tsigaridas, S.; van Bakel, N.; Bilevych, Y.; Gromov, V.; Hartjes, F.; Hessey, N.P.; de Jong, P.; Kluit, R.

    2015-01-01

    The importance of micro-pattern gaseous detectors has grown over the past few years after successful usage in a large number of applications in physics experiments and medicine. We develop gaseous pixel detectors using micromegas-based amplification structures on top of CMOS pixel readout chips.

  20. CMOS circuits manual

    CERN Document Server

    Marston, R M

    1995-01-01

    CMOS Circuits Manual is a user's guide for CMOS. The book emphasizes the practical aspects of CMOS and provides circuits, tables, and graphs to further relate the fundamentals with the applications. The text first discusses the basic principles and characteristics of the CMOS devices. The succeeding chapters detail the types of CMOS IC, including simple inverter, gate and logic ICs and circuits, and complex counters and decoders. The last chapter presents a miscellaneous collection of two dozen useful CMOS circuits. The book will be useful to researchers and professionals who employ CMOS circu

  1. Pixel Experiments

    DEFF Research Database (Denmark)

    Petersen, Kjell Yngve; Søndergaard, Karin; Augustesen, Christina

    2015-01-01

    Pixel Experiments The term pixel is traditionally defined as any of the minute elements that together constitute a larger context or image. A pixel has its own form and is the smallest unit seen within a larger structure. In working with the potentials of LED technology in architectural lighting...... lighting design in practice, one quickly experiences and realises that there are untapped potentials in the attributes of LED technology. In this research, speculative studies have been made working with the attributes of LEDs in architectural contexts, with the ambition to ascertain new strategies...... for using LED lighting in lighting design practice. The speculative experiments that have been set-up have aimed to clarify the variables that can be used as parameters in the design of lighting applications; including, for example, the structuring and software control of light. The experiments also...

  2. CMOS Compressed Imaging by Random Convolution

    OpenAIRE

    Jacques, Laurent; Vandergheynst, Pierre; Bibet, Alexandre; Majidzadeh, Vahid; Schmid, Alexandre; Leblebici, Yusuf

    2009-01-01

    We present a CMOS imager with built-in capability to perform Compressed Sensing. The adopted sensing strategy is the random Convolution due to J. Romberg. It is achieved by a shift register set in a pseudo-random configuration. It acts as a convolutive filter on the imager focal plane, the current issued from each CMOS pixel undergoing a pseudo-random redirection controlled by each component of the filter sequence. A pseudo-random triggering of the ADC reading is finally applied to comp...

  3. CMOS-based avalanche photodiodes for direct particle detection

    International Nuclear Information System (INIS)

    Stapels, Christopher J.; Squillante, Michael R.; Lawrence, William G.; Augustine, Frank L.; Christian, James F.

    2007-01-01

    Active Pixel Sensors (APSs) in complementary metal-oxide-semiconductor (CMOS) technology are augmenting Charge-Coupled Devices (CCDs) as imaging devices and cameras in some demanding optical imaging applications. Radiation Monitoring Devices are investigating the APS concept for nuclear detection applications and has successfully migrated avalanche photodiode (APD) pixel fabrication to a CMOS environment, creating pixel detectors that can be operated with internal gain as proportional detectors. Amplification of the signal within the diode allows identification of events previously hidden within the readout noise of the electronics. Such devices can be used to read out a scintillation crystal, as in SPECT or PET, and as direct-conversion particle detectors. The charge produced by an ionizing particle in the epitaxial layer is collected by an electric field within the diode in each pixel. The monolithic integration of the readout circuitry with the pixel sensors represents an improved design compared to the current hybrid-detector technology that requires wire or bump bonding. In this work, we investigate designs for CMOS APD detector elements and compare these to typical values for large area devices. We characterize the achievable detector gain and the gain uniformity over the active area. The excess noise in two different pixel structures is compared. The CMOS APD performance is demonstrated by measuring the energy spectra of X-rays from 55 Fe

  4. Preliminary test of an imaging probe for nuclear medicine using hybrid pixel detectors

    International Nuclear Information System (INIS)

    Bertolucci, E.; Maiorino, M.; Mettivier, G.; Montesi, M.C.; Russo, P.

    2002-01-01

    We are investigating the feasibility of an intraoperative imaging probe for lymphoscintigraphy with Tc-99m tracer, for sentinel node radioguided surgery, using the Medipix series of hybrid detectors coupled to a collimator. These detectors are pixelated semiconductor detectors bump-bonded to the Medipix1 photon counting read-out chip (64x64 pixel, 170 μm pitch) or to the Medipix2 chip (256x256 pixel, 55 μm pitch), developed by the European Medipix collaboration. The pixel detector we plan to use in the final version of the probe is a semi-insulating GaAs detector or a 1-2 mm thick CdZnTe detector. For the preliminary tests presented here, we used 300-μm thick silicon detectors, hybridized via bump-bonding to the Medipix1 chip. We used a tungsten parallel-hole collimator (7 mm thick, matrix array of 64x64 100 μm circular holes with 170 μm pitch), and a 22, 60 and 122 keV point-like (1 mm diameter) radioactive sources, placed at various distances from the detector. These tests were conducted in order to investigate the general feasibility of this imaging probe and its resolving power. Measurements show the high resolution but low efficiency performance of the detector-collimator set, which is able to image the 122 keV source with <1 mm FWHM resolution

  5. Characterisation of edgeless technologies for pixellated and strip silicon detectors with a micro-focused X-ray beam

    Science.gov (United States)

    Bates, R.; Blue, A.; Christophersen, M.; Eklund, L.; Ely, S.; Fadeyev, V.; Gimenez, E.; Kachkanov, V.; Kalliopuska, J.; Macchiolo, A.; Maneuski, D.; Phlips, B. F.; Sadrozinski, H. F.-W.; Stewart, G.; Tartoni, N.; Zain, R. M.

    2013-01-01

    Reduced edge or ``edgeless'' detector design offers seamless tileability of sensors for a wide range of applications from particle physics to synchrotron and free election laser (FEL) facilities and medical imaging. Combined with through-silicon-via (TSV) technology, this would allow reduced material trackers for particle physics and an increase in the active area for synchrotron and FEL pixel detector systems. In order to quantify the performance of different edgeless fabrication methods, 2 edgeless detectors were characterized at the Diamond Light Source using an 11 μm FWHM 15 keV micro-focused X-ray beam. The devices under test were: a 150 μm thick silicon active edge pixel sensor fabricated at VTT and bump-bonded to a Medipix2 ROIC; and a 300 μm thick silicon strip sensor fabricated at CIS with edge reduction performed by SCIPP and the NRL and wire bonded to an ALiBaVa readout system. Sub-pixel resolution of the 55 μm active edge pixels was achieved. Further scans showed no drop in charge collection recorded between the centre and edge pixels, with a maximum deviation of 5% in charge collection between scanned edge pixels. Scans across the cleaved and standard guard ring edges of the strip detector also show no reduction in charge collection. These results indicate techniques such as the scribe, cleave and passivate (SCP) and active edge processes offer real potential for reduced edge, tiled sensors for imaging detection applications.

  6. Recent developments with CMOS SSPM photodetectors

    Energy Technology Data Exchange (ETDEWEB)

    Stapels, Christopher J. [Radiation Monitoring Devices, Inc., Watertown, MA (United States)], E-mail: CStapels@RMDInc.com; Barton, Paul [University of Michigan, Ann Arbor, MI (United States); Johnson, Erik B. [Radiation Monitoring Devices, Inc., Watertown, MA (United States); Wehe, David K. [University of Michigan, Ann Arbor, MI (United States); Dokhale, Purushottam; Shah, Kanai [Radiation Monitoring Devices, Inc., Watertown, MA (United States); Augustine, Frank L. [Augustine Engineering, Encinitas, CA (United States); Christian, James F. [Radiation Monitoring Devices, Inc., Watertown, MA (United States)

    2009-10-21

    Experiments and simulations using various solid-state photomultiplier (SSPM) designs have been performed to evaluate pixel layouts and explore design choices. SPICE simulations of a design for position-sensing SSPMs showed charge division in the resistor network, and anticipated timing performance of the device. The simulation results predict good position information for resistances in the range of 1-5 k{omega} and 150-{omega} preamplifier input impedance. Back-thinning of CMOS devices can possibly increase the fill factor to 100%, improve spectral sensitivity, and allow for the deposition of anti-reflective coatings after fabrication. We report initial results from back illuminating a CMOS SSPM, and single Geiger-mode avalanche photodiode (GPD) pixels, thinned to 50 {mu}m.

  7. All-CMOS night vision viewer with integrated microdisplay

    Science.gov (United States)

    Goosen, Marius E.; Venter, Petrus J.; du Plessis, Monuko; Faure, Nicolaas M.; Janse van Rensburg, Christo; Rademeyer, Pieter

    2014-02-01

    The unrivalled integration potential of CMOS has made it the dominant technology for digital integrated circuits. With the advent of visible light emission from silicon through hot carrier electroluminescence, several applications arose, all of which rely upon the advantages of mature CMOS technologies for a competitive edge in a very active and attractive market. In this paper we present a low-cost night vision viewer which employs only standard CMOS technologies. A commercial CMOS imager is utilized for near infrared image capturing with a 128x96 pixel all-CMOS microdisplay implemented to convey the image to the user. The display is implemented in a standard 0.35 μm CMOS process, with no process alterations or post processing. The display features a 25 μm pixel pitch and a 3.2 mm x 2.4 mm active area, which through magnification presents the virtual image to the user equivalent of a 19-inch display viewed from a distance of 3 meters. This work represents the first application of a CMOS microdisplay in a low-cost consumer product.

  8. Precision scans of the Pixel cell response of double sided 3D Pixel detectors to pion and X-ray beams

    CERN Document Server

    Mac Raighne, A; Crossley, M; Alianelli, L; Lozano, M; Dumps, R; Fleta, C; Collins, P; Rodrigues, E; Sawhney, K J S; Tlustos, L; Pennicard, D; Buytaert, J; Stewart, G; Parkes, C; Eklund, L; Campbell, M; Marchal, J; Akiba, K; Pellegrini, G; Llopart, X; Plackett, R; Maneuski, D; Gligorov, V V; Tartoni, N; Nicol, M; Bates, R; Gallas, A; Gimenez, E N; van Beuzekom, M; John, M

    2011-01-01

    Three-dimensional (3D) silicon sensors offer potential advantages over standard planar sensors for radiation hardness in future high energy physics experiments and reduced charge-sharing for X-ray applications, but may introduce inefficiencies due to the columnar electrodes. These inefficiencies are probed by studying variations in response across a unit pixel cell in a 55 m m pitch double-sided 3D pixel sensor bump bonded to TimePix and Medipix2 readout ASICs. Two complementary characterisation techniques are discussed: the first uses a custom built telescope and a 120GeV pion beam from the Super Proton Synchrotron (SPS) at CERN; the second employs a novel technique to illuminate the sensor with a micro-focused synchrotron X-ray beam at the Diamond Light Source, UK. For a pion beam incident perpendicular to the sensor plane an overall pixel efficiency of 93.0 +/- 0.5\\% is measured. After a 10 degrees rotation of the device the effect of the columnar region becomes negligible and the overall efficiency rises ...

  9. Technology development for SOI monolithic pixel detectors

    International Nuclear Information System (INIS)

    Marczewski, J.; Domanski, K.; Grabiec, P.; Grodner, M.; Jaroszewicz, B.; Kociubinski, A.; Kucharski, K.; Tomaszewski, D.; Caccia, M.; Kucewicz, W.; Niemiec, H.

    2006-01-01

    A monolithic detector of ionizing radiation has been manufactured using silicon on insulator (SOI) wafers with a high-resistivity substrate. In our paper the integration of a standard 3 μm CMOS technology, originally designed for bulk devices, with fabrication of pixels in the bottom wafer of a SOI substrate is described. Both technological sequences have been merged minimizing thermal budget and providing suitable properties of all the technological layers. The achieved performance proves that fully depleted monolithic active pixel matrix might be a viable option for a wide spectrum of future applications

  10. Active pixel image sensor with a winner-take-all mode of operation

    Science.gov (United States)

    Yadid-Pecht, Orly (Inventor); Fossum, Eric R. (Inventor); Mead, Carver (Inventor)

    2003-01-01

    An integrated CMOS semiconductor imaging device having two modes of operation that can be performed simultaneously to produce an output image and provide information of a brightest or darkest pixel in the image.

  11. Results of the 2015 testbeam of a 180 nm AMS High-Voltage CMOS sensor prototype

    CERN Document Server

    Benoit, M.

    2016-07-21

    Active pixel sensors based on the High-Voltage CMOS technology are being investigated as a viable option for the future pixel tracker of the ATLAS experiment at the High-Luminosity LHC. This paper reports on the testbeam measurements performed at the H8 beamline of the CERN Super Proton Synchrotron on a High-Voltage CMOS sensor prototype produced in 180 nm AMS technology. Results in terms of tracking efficiency and timing performance, for different threshold and bias conditions, are shown.

  12. Evaluation of the charge-sharing effects on spot intensity in XRD setup using photon-counting pixel detectors

    International Nuclear Information System (INIS)

    Nilsson, H.-E.; Mattsson, C.G.; Norlin, B.; Froejdh, C.; Bethke, K.; Vries, R. de

    2006-01-01

    In this study, we examine how charge loss due to charge sharing in photon-counting pixels detectors affects the recording of spot intensity in an X-ray diffraction (XRD) setup. In the photon-counting configuration, the charge from photons that are absorbed at the boarder of a pixel will be shared between two pixels. If the threshold is high enough, these photons will not be counted whereas if it is low enough, they will be counted twice. In an XRD setup, the intensity and position of various spots should be recorded. Thus, the intensity measure will be affected by the setting of the threshold. In this study, we used a system level Monte Carlo simulator to evaluate the variations in the intensity signals for different threshold settings and spot sizes. The simulated setup included an 8keV mono-chromatic source (providing a Gaussian shaped spot) and the MEDIPIX2 photon-counting pixel detector (55 μm x 55 μm pixel size with 300μm silicon) at various detector biases. Our study shows that the charge-sharing distortion can be compensated by numerical post processing and that high resolution in both charge distribution and position can be achieved

  13. A silicon pixel detector prototype for the CLIC vertex detector

    CERN Multimedia

    AUTHOR|(INSPIRE)INSPIRE-00714258

    2017-01-01

    A silicon pixel detector prototype for CLIC, currently under study for the innermost detector surrounding the collision point. The detector is made of a High-Voltage CMOS sensor (top) and a CLICpix2 readout chip (bottom) that are glued to each other. Both parts have a size of 3.3 x 4.0 $mm^2$ and consist of an array of 128 x 128 pixels of 25 x 25 $\\micro m^2$ size.

  14. Large Format CMOS-based Detectors for Diffraction Studies

    Science.gov (United States)

    Thompson, A. C.; Nix, J. C.; Achterkirchen, T. G.; Westbrook, E. M.

    2013-03-01

    Complementary Metal Oxide Semiconductor (CMOS) devices are rapidly replacing CCD devices in many commercial and medical applications. Recent developments in CMOS fabrication have improved their radiation hardness, device linearity, readout noise and thermal noise, making them suitable for x-ray crystallography detectors. Large-format (e.g. 10 cm × 15 cm) CMOS devices with a pixel size of 100 μm × 100 μm are now becoming available that can be butted together on three sides so that very large area detector can be made with no dead regions. Like CCD systems our CMOS systems use a GdOS:Tb scintillator plate to convert stopping x-rays into visible light which is then transferred with a fiber-optic plate to the sensitive surface of the CMOS sensor. The amount of light per x-ray on the sensor is much higher in the CMOS system than a CCD system because the fiber optic plate is only 3 mm thick while on a CCD system it is highly tapered and much longer. A CMOS sensor is an active pixel matrix such that every pixel is controlled and readout independently of all other pixels. This allows these devices to be readout while the sensor is collecting charge in all the other pixels. For x-ray diffraction detectors this is a major advantage since image frames can be collected continuously at up 20 Hz while the crystal is rotated. A complete diffraction dataset can be collected over five times faster than with CCD systems with lower radiation exposure to the crystal. In addition, since the data is taken fine-phi slice mode the 3D angular position of diffraction peaks is improved. We have developed a cooled 6 sensor CMOS detector with an active area of 28.2 × 29.5 cm with 100 μm × 100 μm pixels and a readout rate of 20 Hz. The detective quantum efficiency exceeds 60% over the range 8-12 keV. One, two and twelve sensor systems are also being developed for a variety of scientific applications. Since the sensors are butt able on three sides, even larger systems could be built at

  15. Large Format CMOS-based Detectors for Diffraction Studies

    International Nuclear Information System (INIS)

    Thompson, A C; Westbrook, E M; Nix, J C; Achterkirchen, T G

    2013-01-01

    Complementary Metal Oxide Semiconductor (CMOS) devices are rapidly replacing CCD devices in many commercial and medical applications. Recent developments in CMOS fabrication have improved their radiation hardness, device linearity, readout noise and thermal noise, making them suitable for x-ray crystallography detectors. Large-format (e.g. 10 cm × 15 cm) CMOS devices with a pixel size of 100 μm × 100 μm are now becoming available that can be butted together on three sides so that very large area detector can be made with no dead regions. Like CCD systems our CMOS systems use a GdOS:Tb scintillator plate to convert stopping x-rays into visible light which is then transferred with a fiber-optic plate to the sensitive surface of the CMOS sensor. The amount of light per x-ray on the sensor is much higher in the CMOS system than a CCD system because the fiber optic plate is only 3 mm thick while on a CCD system it is highly tapered and much longer. A CMOS sensor is an active pixel matrix such that every pixel is controlled and readout independently of all other pixels. This allows these devices to be readout while the sensor is collecting charge in all the other pixels. For x-ray diffraction detectors this is a major advantage since image frames can be collected continuously at up 20 Hz while the crystal is rotated. A complete diffraction dataset can be collected over five times faster than with CCD systems with lower radiation exposure to the crystal. In addition, since the data is taken fine-phi slice mode the 3D angular position of diffraction peaks is improved. We have developed a cooled 6 sensor CMOS detector with an active area of 28.2 × 29.5 cm with 100 μm × 100 μm pixels and a readout rate of 20 Hz. The detective quantum efficiency exceeds 60% over the range 8-12 keV. One, two and twelve sensor systems are also being developed for a variety of scientific applications. Since the sensors are butt able on three sides, even larger systems could be built at

  16. Temperature Sensors Integrated into a CMOS Image Sensor

    NARCIS (Netherlands)

    Abarca Prouza, A.N.; Xie, S.; Markenhof, Jules; Theuwissen, A.J.P.

    2017-01-01

    In this work, a novel approach is presented for measuring relative temperature variations inside the pixel array of a CMOS image sensor itself. This approach can give important information when compensation for dark (current) fixed pattern noise (FPN) is needed. The test image sensor consists of

  17. A CMOS image sensor with row and column profiling means

    NARCIS (Netherlands)

    Xie, N.; Theuwissen, A.J.P.; Wang, X.; Leijtens, J.A.P.; Hakkesteegt, H.; Jansen, H.

    2008-01-01

    This paper describes the implementation and firstmeasurement results of a new way that obtains row and column profile data from a CMOS Image Sensor, which is developed for a micro-Digital Sun Sensor (μDSS).The basic profiling action is achieved by the pixels with p-type MOS transistors which realize

  18. 18F-FDG positron autoradiography with a particle counting silicon pixel detector.

    Science.gov (United States)

    Russo, P; Lauria, A; Mettivier, G; Montesi, M C; Marotta, M; Aloj, L; Lastoria, S

    2008-11-07

    We report on tests of a room-temperature particle counting silicon pixel detector of the Medipix2 series as the detector unit of a positron autoradiography (AR) system, for samples labelled with (18)F-FDG radiopharmaceutical used in PET studies. The silicon detector (1.98 cm(2) sensitive area, 300 microm thick) has high intrinsic resolution (55 microm pitch) and works by counting all hits in a pixel above a certain energy threshold. The present work extends the detector characterization with (18)F-FDG of a previous paper. We analysed the system's linearity, dynamic range, sensitivity, background count rate, noise, and its imaging performance on biological samples. Tests have been performed in the laboratory with (18)F-FDG drops (37-37 000 Bq initial activity) and ex vivo in a rat injected with 88.8 MBq of (18)F-FDG. Particles interacting in the detector volume produced a hit in a cluster of pixels whose mean size was 4.3 pixels/event at 11 keV threshold and 2.2 pixels/event at 37 keV threshold. Results show a sensitivity for beta(+) of 0.377 cps Bq(-1), a dynamic range of at least five orders of magnitude and a lower detection limit of 0.0015 Bq mm(-2). Real-time (18)F-FDG positron AR images have been obtained in 500-1000 s exposure time of thin (10-20 microm) slices of a rat brain and compared with 20 h film autoradiography of adjacent slices. The analysis of the image contrast and signal-to-noise ratio in a rat brain slice indicated that Poisson noise-limited imaging can be approached in short (e.g. 100 s) exposures, with approximately 100 Bq slice activity, and that the silicon pixel detector produced a higher image quality than film-based AR.

  19. Design of CMOS imaging system based on FPGA

    Science.gov (United States)

    Hu, Bo; Chen, Xiaolai

    2017-10-01

    In order to meet the needs of engineering applications for high dynamic range CMOS camera under the rolling shutter mode, a complete imaging system is designed based on the CMOS imaging sensor NSC1105. The paper decides CMOS+ADC+FPGA+Camera Link as processing architecture and introduces the design and implementation of the hardware system. As for camera software system, which consists of CMOS timing drive module, image acquisition module and transmission control module, the paper designs in Verilog language and drives it to work properly based on Xilinx FPGA. The ISE 14.6 emulator ISim is used in the simulation of signals. The imaging experimental results show that the system exhibits a 1280*1024 pixel resolution, has a frame frequency of 25 fps and a dynamic range more than 120dB. The imaging quality of the system satisfies the requirement of the index.

  20. CMOS sensors for atmospheric imaging

    Science.gov (United States)

    Pratlong, Jérôme; Burt, David; Jerram, Paul; Mayer, Frédéric; Walker, Andrew; Simpson, Robert; Johnson, Steven; Hubbard, Wendy

    2017-09-01

    Recent European atmospheric imaging missions have seen a move towards the use of CMOS sensors for the visible and NIR parts of the spectrum. These applications have particular challenges that are completely different to those that have driven the development of commercial sensors for applications such as cell-phone or SLR cameras. This paper will cover the design and performance of general-purpose image sensors that are to be used in the MTG (Meteosat Third Generation) and MetImage satellites and the technology challenges that they have presented. We will discuss how CMOS imagers have been designed with 4T pixel sizes of up to 250 μm square achieving good charge transfer efficiency, or low lag, with signal levels up to 2M electrons and with high line rates. In both devices a low noise analogue read-out chain is used with correlated double sampling to suppress the readout noise and give a maximum dynamic range that is significantly larger than in standard commercial devices. Radiation hardness is a particular challenge for CMOS detectors and both of these sensors have been designed to be fully radiation hard with high latch-up and single-event-upset tolerances, which is now silicon proven on MTG. We will also cover the impact of ionising radiation on these devices. Because with such large pixels the photodiodes have a large open area, front illumination technology is sufficient to meet the detection efficiency requirements but with thicker than standard epitaxial silicon to give improved IR response (note that this makes latch up protection even more important). However with narrow band illumination reflections from the front and back of the dielectric stack on the top of the sensor produce Fabry-Perot étalon effects, which have been minimised with process modifications. We will also cover the addition of precision narrow band filters inside the MTG package to provide a complete imaging subsystem. Control of reflected light is also critical in obtaining the

  1. Design and realisation of integrated circuits for the readout of pixel sensors in high-energy physics and biomedical imaging

    Energy Technology Data Exchange (ETDEWEB)

    Peric, I.

    2004-08-01

    Radiation tolerant pixel-readout chip for the ATLAS pixel detector has been designed, implemented in a deep-submicron CMOS technology and successfully tested. The chip contains readout-channels with complex analog and digital circuits. Chip for steering of the DEPFET active-pixel matrix has been implemented in a high-voltage CMOS technology. The chip contains channels which generate fast sequences of high-voltage signals. Detector containing this chip has been successfully tested. Pixel-readout test chip for an X-ray imaging pixel sensor has been designed, implemented in a CMOS technology and tested. Pixel-readout channels are able to simultaneously count the signals generated by passage of individual photons and to sum the total charge generated during exposure time. (orig.)

  2. Smart CMOS image sensor for lightning detection and imaging.

    Science.gov (United States)

    Rolando, Sébastien; Goiffon, Vincent; Magnan, Pierre; Corbière, Franck; Molina, Romain; Tulet, Michel; Bréart-de-Boisanger, Michel; Saint-Pé, Olivier; Guiry, Saïprasad; Larnaudie, Franck; Leone, Bruno; Perez-Cuevas, Leticia; Zayer, Igor

    2013-03-01

    We present a CMOS image sensor dedicated to lightning detection and imaging. The detector has been designed to evaluate the potentiality of an on-chip lightning detection solution based on a smart sensor. This evaluation is performed in the frame of the predevelopment phase of the lightning detector that will be implemented in the Meteosat Third Generation Imager satellite for the European Space Agency. The lightning detection process is performed by a smart detector combining an in-pixel frame-to-frame difference comparison with an adjustable threshold and on-chip digital processing allowing an efficient localization of a faint lightning pulse on the entire large format array at a frequency of 1 kHz. A CMOS prototype sensor with a 256×256 pixel array and a 60 μm pixel pitch has been fabricated using a 0.35 μm 2P 5M technology and tested to validate the selected detection approach.

  3. A CMOS 128-APS linear array integrated with a LVOF for highsensitivity and high-resolution micro-spectrophotometry

    NARCIS (Netherlands)

    Liu, C.; Emadi, A.; Wu, H.; De Graaf, G.; Wolffenbuttel, R.F.

    2010-01-01

    A linear array of 128 Active Pixel Sensors has been developed in standard CMOS technology and a Linear Variable Optical Filter (LVOF) is added using CMOS-compatible post-process, resulting in a single chip highly-integrated highresolution microspectrometer. The optical requirements imposed by the

  4. Single photon detection and localization accuracy with an ebCMOS camera

    Energy Technology Data Exchange (ETDEWEB)

    Cajgfinger, T. [CNRS/IN2P3, Institut de Physique Nucléaire de Lyon, Villeurbanne F-69622 (France); Dominjon, A., E-mail: agnes.dominjon@nao.ac.jp [Université de Lyon, Université de Lyon 1, Lyon 69003 France. (France); Barbier, R. [CNRS/IN2P3, Institut de Physique Nucléaire de Lyon, Villeurbanne F-69622 (France); Université de Lyon, Université de Lyon 1, Lyon 69003 France. (France)

    2015-07-01

    The CMOS sensor technologies evolve very fast and offer today very promising solutions to existing issues facing by imaging camera systems. CMOS sensors are very attractive for fast and sensitive imaging thanks to their low pixel noise (1e-) and their possibility of backside illumination. The ebCMOS group of IPNL has produced a camera system dedicated to Low Light Level detection and based on a 640 kPixels ebCMOS with its acquisition system. After reminding the principle of detection of an ebCMOS and the characteristics of our prototype, we confront our camera to other imaging systems. We compare the identification efficiency and the localization accuracy of a point source by four different photo-detection devices: the scientific CMOS (sCMOS), the Charge Coupled Device (CDD), the Electron Multiplying CCD (emCCD) and the Electron Bombarded CMOS (ebCMOS). Our ebCMOS camera is able to identify a single photon source in less than 10 ms with a localization accuracy better than 1 µm. We report as well efficiency measurement and the false positive identification of the ebCMOS camera by identifying more than hundreds of single photon sources in parallel. About 700 spots are identified with a detection efficiency higher than 90% and a false positive percentage lower than 5. With these measurements, we show that our target tracking algorithm can be implemented in real time at 500 frames per second under a photon flux of the order of 8000 photons per frame. These results demonstrate that the ebCMOS camera concept with its single photon detection and target tracking algorithm is one of the best devices for low light and fast applications such as bioluminescence imaging, quantum dots tracking or adaptive optics.

  5. Monolithic pixels on moderate resistivity substrate and sparsifying readout architecture

    International Nuclear Information System (INIS)

    Giubilato, P.; Battaglia, M.; Bisello, D.; Caselle, M.; Chalmet, P.; Demaria, L.; Ikemoto, Y.; Kloukinas, K.; Mansuy, S.C.; Mattiazzo, S.; Marchioro, A.; Mugnier, H.; Pantano, D.; Potenza, A.; Rivetti, A.; Rousset, J.; Silvestrin, L.; Snoeys, W.

    2013-01-01

    The LePix projects aim realizing a new generation monolithic pixel detectors with improved performances at lesser cost with respect to both current state of the art monolithic and hybrid pixel sensors. The detector is built in a 90 nm CMOS process on a substrate of moderate resistivity. This allows charge collection by drift while maintaining the other advantages usually offered by MAPS, like having a single piece detector and using a standard CMOS production line. The collection by drift mechanism, coupled to the low capacitance design of the collecting node made possible by the monolithic approach, provides an excellent signal to noise ratio straight at the pixel cell together with a radiation tolerance far superior to conventional un-depleted MAPS. The excellent signal-to-noise performance is demonstrated by the device ability to separate the 6 keV 55 Fe double peak at room temperature. To achieve high granularity (10–20 µm pitch pixels) over large detector areas maintaining high readout speed, a completely new compressing architecture has been devised. This architecture departs from the mainstream hybrid pixel sparsification approach, which uses in-pixel logic to reduce data, by using topological compression to minimize pixel area and power consumption

  6. Design and Fabrication of Vertically-Integrated CMOS Image Sensors

    Science.gov (United States)

    Skorka, Orit; Joseph, Dileepan

    2011-01-01

    Technologies to fabricate integrated circuits (IC) with 3D structures are an emerging trend in IC design. They are based on vertical stacking of active components to form heterogeneous microsystems. Electronic image sensors will benefit from these technologies because they allow increased pixel-level data processing and device optimization. This paper covers general principles in the design of vertically-integrated (VI) CMOS image sensors that are fabricated by flip-chip bonding. These sensors are composed of a CMOS die and a photodetector die. As a specific example, the paper presents a VI-CMOS image sensor that was designed at the University of Alberta, and fabricated with the help of CMC Microsystems and Micralyne Inc. To realize prototypes, CMOS dies with logarithmic active pixels were prepared in a commercial process, and photodetector dies with metal-semiconductor-metal devices were prepared in a custom process using hydrogenated amorphous silicon. The paper also describes a digital camera that was developed to test the prototype. In this camera, scenes captured by the image sensor are read using an FPGA board, and sent in real time to a PC over USB for data processing and display. Experimental results show that the VI-CMOS prototype has a higher dynamic range and a lower dark limit than conventional electronic image sensors. PMID:22163860

  7. Photon detection with CMOS sensors for fast imaging

    International Nuclear Information System (INIS)

    Baudot, J.; Dulinski, W.; Winter, M.; Barbier, R.; Chabanat, E.; Depasse, P.; Estre, N.

    2009-01-01

    Pixel detectors employed in high energy physics aim to detect single minimum ionizing particle with micrometric positioning resolution. Monolithic CMOS sensors succeed in this task thanks to a low equivalent noise charge per pixel of around 10 to 15 e - , and a pixel pitch varying from 10 to a few 10 s of microns. Additionally, due to the possibility for integration of some data treatment in the sensor itself, readout times of 100μs have been reached for 100 kilo-pixels sensors. These aspects of CMOS sensors are attractive for applications in photon imaging. For X-rays of a few keV, the efficiency is limited to a few % due to the thin sensitive volume. For visible photons, the back-thinned version of CMOS sensor is sensitive to low intensity sources, of a few hundred photons. When a back-thinned CMOS sensor is combined with a photo-cathode, a new hybrid detector results (EBCMOS) and operates as a fast single photon imager. The first EBCMOS was produced in 2007 and demonstrated single photon counting with low dark current capability in laboratory conditions. It has been compared, in two different biological laboratories, with existing CCD-based 2D cameras for fluorescence microscopy. The current EBCMOS sensitivity and frame rate is comparable to existing EMCCDs. On-going developments aim at increasing this frame rate by, at least, an order of magnitude. We report in conclusion, the first test of a new CMOS sensor, LUCY, which reaches 1000 frames per second.

  8. Contact CMOS imaging of gaseous oxygen sensor array.

    Science.gov (United States)

    Daivasagaya, Daisy S; Yao, Lei; Yi Yung, Ka; Hajj-Hassan, Mohamad; Cheung, Maurice C; Chodavarapu, Vamsy P; Bright, Frank V

    2011-10-01

    We describe a compact luminescent gaseous oxygen (O 2 ) sensor microsystem based on the direct integration of sensor elements with a polymeric optical filter and placed on a low power complementary metal-oxide semiconductor (CMOS) imager integrated circuit (IC). The sensor operates on the measurement of excited-state emission intensity of O 2 -sensitive luminophore molecules tris(4,7-diphenyl-1,10-phenanthroline) ruthenium(II) ([Ru(dpp) 3 ] 2+ ) encapsulated within sol-gel derived xerogel thin films. The polymeric optical filter is made with polydimethylsiloxane (PDMS) that is mixed with a dye (Sudan-II). The PDMS membrane surface is molded to incorporate arrays of trapezoidal microstructures that serve to focus the optical sensor signals on to the imager pixels. The molded PDMS membrane is then attached with the PDMS color filter. The xerogel sensor arrays are contact printed on top of the PDMS trapezoidal lens-like microstructures. The CMOS imager uses a 32 × 32 (1024 elements) array of active pixel sensors and each pixel includes a high-gain phototransistor to convert the detected optical signals into electrical currents. Correlated double sampling circuit, pixel address, digital control and signal integration circuits are also implemented on-chip. The CMOS imager data is read out as a serial coded signal. The CMOS imager consumes a static power of 320 µW and an average dynamic power of 625 µW when operating at 100 Hz sampling frequency and 1.8 V DC. This CMOS sensor system provides a useful platform for the development of miniaturized optical chemical gas sensors.

  9. Development of radiation hardened pixel sensors for charged particle detection

    CERN Document Server

    Koziel, Michal

    2014-01-01

    CMOS Pixel Sensors are being developed since a few years to equip vertex detectors for future high-energy physics experiments with the crucial advantages of a low material budget and low production costs. The features simultaneously required are a short readout time, high granularity and high tolerance to radiation. This thesis mainly focuses on the radiation tolerance studies. To achieve the targeted readout time (tens of microseconds), the sensor pixel readout was organized in parallel columns restricting in addition the readout to pixels that had collected the signal charge. The pixels became then more complex, and consequently more sensitive to radiation. Different in-pixel architectures were studied and it was concluded that the tolerance to ionizing radiation was limited to 300 krad with the 0.35- m fabrication process currently used, while the targeted value was several Mrad. Improving this situation calls for implementation of the sensors in processes with a smaller feature size which naturally imp...

  10. CMOS active pixel sensor type imaging system on a chip

    Science.gov (United States)

    Fossum, Eric R. (Inventor); Nixon, Robert (Inventor)

    2011-01-01

    A single chip camera which includes an .[.intergrated.]. .Iadd.integrated .Iaddend.image acquisition portion and control portion and which has double sampling/noise reduction capabilities thereon. Part of the .[.intergrated.]. .Iadd.integrated .Iaddend.structure reduces the noise that is picked up during imaging.

  11. Beyond CMOS nanodevices 2

    CERN Document Server

    Balestra, Francis

    2014-01-01

    This book offers a comprehensive review of the state-of-the-art in innovative Beyond-CMOS nanodevices for developing novel functionalities, logic and memories dedicated to researchers, engineers and students. The book will particularly focus on the interest of nanostructures and nanodevices (nanowires, small slope switches, 2D layers, nanostructured materials, etc.) for advanced More than Moore (RF-nanosensors-energy harvesters, on-chip electronic cooling, etc.) and Beyond-CMOS logic and memories applications.

  12. Beyond CMOS nanodevices 1

    CERN Document Server

    Balestra, Francis

    2014-01-01

    This book offers a comprehensive review of the state-of-the-art in innovative Beyond-CMOS nanodevices for developing novel functionalities, logic and memories dedicated to researchers, engineers and students.  It particularly focuses on the interest of nanostructures and nanodevices (nanowires, small slope switches, 2D layers, nanostructured materials, etc.) for advanced More than Moore (RF-nanosensors-energy harvesters, on-chip electronic cooling, etc.) and Beyond-CMOS logic and memories applications

  13. Development of a versatile readout and test system and characterization of a capacitively coupled active pixel sensor

    Energy Technology Data Exchange (ETDEWEB)

    Janssen, Jens; Gonella, Laura; Hemperek, Tomasz; Hirono, Toko; Huegging, Fabian; Krueger, Hans; Wermes, Norbert [Institute of Physics, University of Bonn, Bonn (Germany); Peric, Ivan [Karlsruher Institut fuer Technologie, Karlsruhe (Germany); Collaboration: ATLAS-Collaboration

    2015-07-01

    With the availability of high voltage and high resistivity CMOS processes, active pixel sensors are becoming increasingly interesting for radiation detection in high energy physics experiments. Although the pixel signal-to-noise ratio and the sensor radiation tolerance were improved, active pixel sensors cannot yet compete with state-of-the-art hybrid pixel detector in a high radiation environment. Hence, active pixel sensors are possible candidates for the outer tracking detector in HEP experiments where production cost plays a role. The investigation of numerous prototyping steps and different technologies is still ongoing and requires a versatile test and readout system, which will be presented in this talk. A capacitively coupled active pixel sensor fabricated in AMS 180 nm high voltage CMOS process is investigated. The sensor is designed to be glued to existing front-end pixel readout chips. Results from the characterization are presented in this talk.

  14. Characterization and radiation studies of diode test structures in LFoundry CMOS technology

    Energy Technology Data Exchange (ETDEWEB)

    Daas, Michael; Gonella, Laura; Hemperek, Tomasz; Huegging, Fabian; Krueger, Hans; Pohl, David-Leon; Wermes, Norbert [Physikalisches Institut der Universitaet Bonn (Germany); Macchiolo, Anna [Max-Planck-Institut fuer Physik, Muenchen (Germany)

    2016-07-01

    In order to prepare for the High Luminosity upgrade of the LHC, all subdetector systems of the ATLAS experiment will be upgraded. In preparation for this process, different possibilities for new radiation-hard and cost-efficient silicon sensor technologies to be used as part of hybrid pixel detectors in the ATLAS inner tracker are being investigated. One promising way to optimize the cost-efficiency of silicon-based pixel detectors is to use commercially available CMOS technologies such as the 150 nm process by LFoundry. In this talk, several CMOS pixel test structures, such as simple diodes and small pixel arrays, that were manufactured in this technology are characterized regarding general performance and radiation hardness and compared to each other as well as to the current ATLAS pixel detector.

  15. Diamond Pixel Detectors

    International Nuclear Information System (INIS)

    Adam, W.; Berdermann, E.; Bergonzo, P.; Bertuccio, G.; Bogani, F.; Borchi, E.; Brambilla, A.; Bruzzi, M.; Colledani, C.; Conway, J.; D'Angelo, P.; Dabrowski, W.; Delpierre, P.; Deneuville, A.; Doroshenko, J.; Dulinski, W.; Eijk, B. van; Fallou, A.; Fizzotti, F.; Foster, J.; Foulon, F.; Friedl, M.; Gan, K.K.; Gheeraert, E.; Gobbi, B.; Grim, G.P.; Hallewell, G.; Han, S.; Hartjes, F.; Hrubec, J.; Husson, D.; Kagan, H.; Kania, D.; Kaplon, J.; Kass, R.; Koeth, T.; Krammer, M.; Lander, R.; Logiudice, A.; Lu, R.; Lynne, L.M.; Manfredotti, C.; Meier, D.; Mishina, M.; Moroni, L.; Oh, A.; Pan, L.S.; Pernicka, M.; Perera, L.; Pirollo, S.; Plano, R.; Procario, M.; Riester, J.L.; Roe, S.; Rott, C.; Rousseau, L.; Rudge, A.; Russ, J.; Sala, S.; Sampietro, M.; Schnetzer, S.; Sciortino, S.; Stelzer, H.; Stone, R.; Suter, B.; Tapper, R.J.; Tesarek, R.; Trischuk, W.; Tromson, D.; Vittone, E.; Wedenig, R.; Weilhammer, P.; White, C.; Zeuner, W.; Zoeller, M.

    2001-01-01

    Diamond based pixel detectors are a promising radiation-hard technology for use at the LHC. We present first results on a CMS diamond pixel sensor. With a threshold setting of 2000 electrons, an average pixel efficiency of 78% was obtained for normally incident minimum ionizing particles

  16. Diamond Pixel Detectors

    Energy Technology Data Exchange (ETDEWEB)

    Adam, W.; Berdermann, E.; Bergonzo, P.; Bertuccio, G.; Bogani, F.; Borchi, E.; Brambilla, A.; Bruzzi, M.; Colledani, C.; Conway, J.; D' Angelo, P.; Dabrowski, W.; Delpierre, P.; Deneuville, A.; Doroshenko, J.; Dulinski, W.; Eijk, B. van; Fallou, A.; Fizzotti, F.; Foster, J.; Foulon, F.; Friedl, M.; Gan, K.K.; Gheeraert, E.; Gobbi, B.; Grim, G.P.; Hallewell, G.; Han, S.; Hartjes, F.; Hrubec, J.; Husson, D.; Kagan, H.; Kania, D.; Kaplon, J.; Kass, R.; Koeth, T.; Krammer, M.; Lander, R.; Logiudice, A.; Lu, R.; Lynne, L.M.; Manfredotti, C.; Meier, D.; Mishina, M.; Moroni, L.; Oh, A.; Pan, L.S.; Pernicka, M.; Perera, L. E-mail: perera@physics.rutgers.edu; Pirollo, S.; Plano, R.; Procario, M.; Riester, J.L.; Roe, S.; Rott, C.; Rousseau, L.; Rudge, A.; Russ, J.; Sala, S.; Sampietro, M.; Schnetzer, S.; Sciortino, S.; Stelzer, H.; Stone, R.; Suter, B.; Tapper, R.J.; Tesarek, R.; Trischuk, W.; Tromson, D.; Vittone, E.; Wedenig, R.; Weilhammer, P.; White, C.; Zeuner, W.; Zoeller, M

    2001-06-01

    Diamond based pixel detectors are a promising radiation-hard technology for use at the LHC. We present first results on a CMS diamond pixel sensor. With a threshold setting of 2000 electrons, an average pixel efficiency of 78% was obtained for normally incident minimum ionizing particles.

  17. Monolithic CMOS imaging x-ray spectrometers

    Science.gov (United States)

    Kenter, Almus; Kraft, Ralph; Gauron, Thomas; Murray, Stephen S.

    2014-07-01

    The Smithsonian Astrophysical Observatory (SAO) in collaboration with SRI/Sarnoff is developing monolithic CMOS detectors optimized for x-ray astronomy. The goal of this multi-year program is to produce CMOS x-ray imaging spectrometers that are Fano noise limited over the 0.1-10keV energy band while incorporating the many benefits of CMOS technology. These benefits include: low power consumption, radiation "hardness", high levels of integration, and very high read rates. Small format test devices from a previous wafer fabrication run (2011-2012) have recently been back-thinned and tested for response below 1keV. These devices perform as expected in regards to dark current, read noise, spectral response and Quantum Efficiency (QE). We demonstrate that running these devices at rates ~> 1Mpix/second eliminates the need for cooling as shot noise from any dark current is greatly mitigated. The test devices were fabricated on 15μm, high resistivity custom (~30kΩ-cm) epitaxial silicon and have a 16 by 192 pixel format. They incorporate 16μm pitch, 6 Transistor Pinned Photo Diode (6TPPD) pixels which have ~40μV/electron sensitivity and a highly parallel analog CDS signal chain. Newer, improved, lower noise detectors have just been fabricated (October 2013). These new detectors are fabricated on 9μm epitaxial silicon and have a 1k by 1k format. They incorporate similar 16μm pitch, 6TPPD pixels but have ~ 50% higher sensitivity and much (3×) lower read noise. These new detectors have undergone preliminary testing for functionality in Front Illuminated (FI) form and are presently being prepared for back thinning and packaging. Monolithic CMOS devices such as these, would be ideal candidate detectors for the focal planes of Solar, planetary and other space-borne x-ray astronomy missions. The high through-put, low noise and excellent low energy response, provide high dynamic range and good time resolution; bright, time varying x-ray features could be temporally and

  18. A Biologically Inspired CMOS Image Sensor

    CERN Document Server

    Sarkar, Mukul

    2013-01-01

    Biological systems are a source of inspiration in the development of small autonomous sensor nodes. The two major types of optical vision systems found in nature are the single aperture human eye and the compound eye of insects. The latter are among the most compact and smallest vision sensors. The eye is a compound of individual lenses with their own photoreceptor arrays.  The visual system of insects allows them to fly with a limited intelligence and brain processing power. A CMOS image sensor replicating the perception of vision in insects is discussed and designed in this book for industrial (machine vision) and medical applications. The CMOS metal layer is used to create an embedded micro-polarizer able to sense polarization information. This polarization information is shown to be useful in applications like real time material classification and autonomous agent navigation. Further the sensor is equipped with in pixel analog and digital memories which allow variation of the dynamic range and in-pixel b...

  19. Recent progress in the development of 3D deep n-well CMOS MAPS

    International Nuclear Information System (INIS)

    Traversi, G; Manghisoni, M; Re, V; Gaioni, L; Manazza, A; Ratti, L; Zucca, S

    2012-01-01

    In the deep n-well (DNW) monolithic active pixel sensor (MAPS) a full in-pixel signal processing chain is integrated by exploiting the triple well option of a deep submicron CMOS process. This work is concerned with the design and characterization of DNW MAPS fabricated in a vertical integration (3D) CMOS technology. 3D processes can be very effective in overcoming typical limitations of monolithic active pixel sensors. This paper discusses the main features of a new analog processor for DNW MAPS (ApselVI) in view of applications to the SVT Layer0 of the SuperB Factory. It also presents the first experimental results from the test of a DNW MAPS prototype in the GlobalFoundries 130 nm CMOS technology.

  20. Implementation of large area CMOS image sensor module using the precision align inspection

    International Nuclear Information System (INIS)

    Kim, Byoung Wook; Kim, Toung Ju; Ryu, Cheol Woo; Lee, Kyung Yong; Kim, Jin Soo; Kim, Myung Soo; Cho, Gyu Seong

    2014-01-01

    This paper describes a large area CMOS image sensor module Implementation using the precision align inspection program. This work is needed because wafer cutting system does not always have high precision. The program check more than 8 point of sensor edges and align sensors with moving table. The size of a 2×1 butted CMOS image sensor module which except for the size of PCB is 170 mm×170 mm. And the pixel size is 55 μm×55 μm and the number of pixels is 3,072×3,072. The gap between the two CMOS image sensor module was arranged in less than one pixel size

  1. Implementation of large area CMOS image sensor module using the precision align inspection

    Energy Technology Data Exchange (ETDEWEB)

    Kim, Byoung Wook; Kim, Toung Ju; Ryu, Cheol Woo [Radiation Imaging Technology Center, JBTP, Iksan (Korea, Republic of); Lee, Kyung Yong; Kim, Jin Soo [Nano Sol-Tech INC., Iksan (Korea, Republic of); Kim, Myung Soo; Cho, Gyu Seong [Dept. of Nuclear and Quantum Engineering, KAIST, Daejeon (Korea, Republic of)

    2014-12-15

    This paper describes a large area CMOS image sensor module Implementation using the precision align inspection program. This work is needed because wafer cutting system does not always have high precision. The program check more than 8 point of sensor edges and align sensors with moving table. The size of a 2×1 butted CMOS image sensor module which except for the size of PCB is 170 mm×170 mm. And the pixel size is 55 μm×55 μm and the number of pixels is 3,072×3,072. The gap between the two CMOS image sensor module was arranged in less than one pixel size.

  2. Low-power high-accuracy micro-digital sun sensor by means of a CMOS image sensor

    NARCIS (Netherlands)

    Xie, N.; Theuwissen, A.J.P.

    2013-01-01

    A micro-digital sun sensor (?DSS) is a sun detector which senses a satellite’s instant attitude angle with respect to the sun. The core of this sensor is a system-on-chip imaging chip which is referred to as APS+. The APS+ integrates a CMOS active pixel sensor (APS) array of 368×368??pixels , a

  3. CMOS-sensors for energy-resolved X-ray imaging

    International Nuclear Information System (INIS)

    Doering, D.; Amar-Youcef, S.; Deveaux, M.; Linnik, B.; Müntz, C.; Stroth, Joachim; Baudot, J.; Dulinski, W.; Kachel, M.

    2016-01-01

    Due to their low noise, CMOS Monolithic Active Pixel Sensors are suited to sense X-rays with a few keV quantum energy, which is of interest for high resolution X-ray imaging. Moreover, the good energy resolution of the silicon sensors might be used to measure this quantum energy. Combining both features with the good spatial resolution of CMOS sensors opens the potential to build ''color sensitive' X-ray cameras. Taking such colored images is hampered by the need to operate the CMOS sensors in a single photon counting mode, which restricts the photon flux capability of the sensors. More importantly, the charge sharing between the pixels smears the potentially good energy resolution of the sensors. Based on our experience with CMOS sensors for charged particle tracking, we studied techniques to overcome the latter by means of an offline processing of the data obtained from a CMOS sensor prototype. We found that the energy resolution of the pixels can be recovered at the expense of reduced quantum efficiency. We will introduce the results of our study and discuss the feasibility of taking colored X-ray pictures with CMOS sensors

  4. A back-illuminated megapixel CMOS image sensor

    Science.gov (United States)

    Pain, Bedabrata; Cunningham, Thomas; Nikzad, Shouleh; Hoenk, Michael; Jones, Todd; Wrigley, Chris; Hancock, Bruce

    2005-01-01

    In this paper, we present the test and characterization results for a back-illuminated megapixel CMOS imager. The imager pixel consists of a standard junction photodiode coupled to a three transistor-per-pixel switched source-follower readout [1]. The imager also consists of integrated timing and control and bias generation circuits, and provides analog output. The analog column-scan circuits were implemented in such a way that the imager could be configured to run in off-chip correlated double-sampling (CDS) mode. The imager was originally designed for normal front-illuminated operation, and was fabricated in a commercially available 0.5 pn triple-metal CMOS-imager compatible process. For backside illumination, the imager was thinned by etching away the substrate was etched away in a post-fabrication processing step.

  5. Depleted Monolithic Pixels (DMAPS) in a 150 nm technology: lab and beam results

    International Nuclear Information System (INIS)

    Obermann, T.; Hemperek, T.; Hügging, F.; Krüger, H.; Pohl, D.-L.; Wermes, N.; Schwenker, B.

    2017-01-01

    The fully depleted monolithic active pixel sensor (DMAPS) is a new concept integrating full CMOS circuitry onto a fully depletable silicon substrate wafer. The realization of prototypes of the DMAPS concept relies on the availability of multiple well CMOS processes and high resistive substrates. The CMOS foundry ESPROS Photonics offers both and was chosen for prototyping. Two prototypes, EPCB01 and EPCB02, were developed in a 150 nm process on a high resistive n-type wafer of 50 μm thickness. The prototypes have 352 square pixels of 40 μm pitch and small n-well charge collection node with very low capacitance (n + -implantation size: 5 μm by 5 μm) and about 150 transistors per pixel (CSA and discriminator plus a small digital part).

  6. A functional hybrid memristor crossbar-array/CMOS system for data storage and neuromorphic applications.

    Science.gov (United States)

    Kim, Kuk-Hwan; Gaba, Siddharth; Wheeler, Dana; Cruz-Albrecht, Jose M; Hussain, Tahir; Srinivasa, Narayan; Lu, Wei

    2012-01-11

    Crossbar arrays based on two-terminal resistive switches have been proposed as a leading candidate for future memory and logic applications. Here we demonstrate a high-density, fully operational hybrid crossbar/CMOS system composed of a transistor- and diode-less memristor crossbar array vertically integrated on top of a CMOS chip by taking advantage of the intrinsic nonlinear characteristics of the memristor element. The hybrid crossbar/CMOS system can reliably store complex binary and multilevel 1600 pixel bitmap images using a new programming scheme. © 2011 American Chemical Society

  7. CMOS dot matrix microdisplay

    Science.gov (United States)

    Venter, Petrus J.; Bogalecki, Alfons W.; du Plessis, Monuko; Goosen, Marius E.; Nell, Ilse J.; Rademeyer, P.

    2011-03-01

    Display technologies always seem to find a wide range of interesting applications. As devices develop towards miniaturization, niche applications for small displays may emerge. While OLEDs and LCDs dominate the market for small displays, they have some shortcomings as relatively expensive technologies. Although CMOS is certainly not the dominating semiconductor for photonics, its widespread use, favourable cost and robustness present an attractive potential if it could find application in the microdisplay environment. Advances in improving the quantum efficiency of avalanche electroluminescence and the favourable spectral characteristics of light generated through the said mechanism may afford CMOS the possibility to be used as a display technology. This work shows that it is possible to integrate a fully functional display in a completely standard CMOS technology mainly geared towards digital design while using light sources completely compatible with the process and without any post processing required.

  8. Investigation of HV/HR-CMOS technology for the ATLAS Phase-II Strip Tracker Upgrade

    International Nuclear Information System (INIS)

    Fadeyev, V.; Galloway, Z.; Grabas, H.; Grillo, A.A.; Liang, Z.; Martinez-Mckinney, F.; Seiden, A.; Volk, J.; Affolder, A.; Buckland, M.; Meng, L.; Arndt, K.; Bortoletto, D.; Huffman, T.; John, J.; McMahon, S.; Nickerson, R.; Phillips, P.; Plackett, R.; Shipsey, I.

    2016-01-01

    ATLAS has formed strip CMOS project to study the use of CMOS MAPS devices as silicon strip sensors for the Phase-II Strip Tracker Upgrade. This choice of sensors promises several advantages over the conventional baseline design, such as better resolution, less material in the tracking volume, and faster construction speed. At the same time, many design features of the sensors are driven by the requirement of minimizing the impact on the rest of the detector. Hence the target devices feature long pixels which are grouped to form a virtual strip with binary-encoded z position. The key performance aspects are radiation hardness compatibility with HL-LHC environment, as well as extraction of the full hit position with full-reticle readout architecture. To date, several test chips have been submitted using two different CMOS technologies. The AMS 350 nm is a high voltage CMOS process (HV-CMOS), that features the sensor bias of up to 120 V. The TowerJazz 180 nm high resistivity CMOS process (HR-CMOS) uses a high resistivity epitaxial layer to provide the depletion region on top of the substrate. We have evaluated passive pixel performance, and charge collection projections. The results strongly support the radiation tolerance of these devices to radiation dose of the HL-LHC in the strip tracker region. We also describe design features for the next chip submission that are motivated by our technology evaluation.

  9. Investigation of HV/HR-CMOS technology for the ATLAS Phase-II Strip Tracker Upgrade

    Science.gov (United States)

    Fadeyev, V.; Galloway, Z.; Grabas, H.; Grillo, A. A.; Liang, Z.; Martinez-Mckinney, F.; Seiden, A.; Volk, J.; Affolder, A.; Buckland, M.; Meng, L.; Arndt, K.; Bortoletto, D.; Huffman, T.; John, J.; McMahon, S.; Nickerson, R.; Phillips, P.; Plackett, R.; Shipsey, I.; Vigani, L.; Bates, R.; Blue, A.; Buttar, C.; Kanisauskas, K.; Maneuski, D.; Benoit, M.; Di Bello, F.; Caragiulo, P.; Dragone, A.; Grenier, P.; Kenney, C.; Rubbo, F.; Segal, J.; Su, D.; Tamma, C.; Das, D.; Dopke, J.; Turchetta, R.; Wilson, F.; Worm, S.; Ehrler, F.; Peric, I.; Gregor, I. M.; Stanitzki, M.; Hoeferkamp, M.; Seidel, S.; Hommels, L. B. A.; Kramberger, G.; Mandić, I.; Mikuž, M.; Muenstermann, D.; Wang, R.; Zhang, J.; Warren, M.; Song, W.; Xiu, Q.; Zhu, H.

    2016-09-01

    ATLAS has formed strip CMOS project to study the use of CMOS MAPS devices as silicon strip sensors for the Phase-II Strip Tracker Upgrade. This choice of sensors promises several advantages over the conventional baseline design, such as better resolution, less material in the tracking volume, and faster construction speed. At the same time, many design features of the sensors are driven by the requirement of minimizing the impact on the rest of the detector. Hence the target devices feature long pixels which are grouped to form a virtual strip with binary-encoded z position. The key performance aspects are radiation hardness compatibility with HL-LHC environment, as well as extraction of the full hit position with full-reticle readout architecture. To date, several test chips have been submitted using two different CMOS technologies. The AMS 350 nm is a high voltage CMOS process (HV-CMOS), that features the sensor bias of up to 120 V. The TowerJazz 180 nm high resistivity CMOS process (HR-CMOS) uses a high resistivity epitaxial layer to provide the depletion region on top of the substrate. We have evaluated passive pixel performance, and charge collection projections. The results strongly support the radiation tolerance of these devices to radiation dose of the HL-LHC in the strip tracker region. We also describe design features for the next chip submission that are motivated by our technology evaluation.

  10. Investigation of HV/HR-CMOS technology for the ATLAS Phase-II Strip Tracker Upgrade

    Energy Technology Data Exchange (ETDEWEB)

    Fadeyev, V., E-mail: fadeyev@ucsc.edu [Santa Cruz Institute for Particle Physics, University of California, Santa Cruz, CA 95064 (United States); Galloway, Z.; Grabas, H.; Grillo, A.A.; Liang, Z.; Martinez-Mckinney, F.; Seiden, A.; Volk, J. [Santa Cruz Institute for Particle Physics, University of California, Santa Cruz, CA 95064 (United States); Affolder, A.; Buckland, M.; Meng, L. [Department of Physics, University of Liverpool, O. Lodge Laboratory, Oxford Street, Liverpool L69 7ZE (United Kingdom); Arndt, K.; Bortoletto, D.; Huffman, T.; John, J.; McMahon, S.; Nickerson, R.; Phillips, P.; Plackett, R.; Shipsey, I. [Department of Physics, Oxford University, Oxford (United Kingdom); and others

    2016-09-21

    ATLAS has formed strip CMOS project to study the use of CMOS MAPS devices as silicon strip sensors for the Phase-II Strip Tracker Upgrade. This choice of sensors promises several advantages over the conventional baseline design, such as better resolution, less material in the tracking volume, and faster construction speed. At the same time, many design features of the sensors are driven by the requirement of minimizing the impact on the rest of the detector. Hence the target devices feature long pixels which are grouped to form a virtual strip with binary-encoded z position. The key performance aspects are radiation hardness compatibility with HL-LHC environment, as well as extraction of the full hit position with full-reticle readout architecture. To date, several test chips have been submitted using two different CMOS technologies. The AMS 350 nm is a high voltage CMOS process (HV-CMOS), that features the sensor bias of up to 120 V. The TowerJazz 180 nm high resistivity CMOS process (HR-CMOS) uses a high resistivity epitaxial layer to provide the depletion region on top of the substrate. We have evaluated passive pixel performance, and charge collection projections. The results strongly support the radiation tolerance of these devices to radiation dose of the HL-LHC in the strip tracker region. We also describe design features for the next chip submission that are motivated by our technology evaluation.

  11. Wideband CMOS receivers

    CERN Document Server

    Oliveira, Luis

    2015-01-01

    This book demonstrates how to design a wideband receiver operating in current mode, in which the noise and non-linearity are reduced, implemented in a low cost single chip, using standard CMOS technology.  The authors present a solution to remove the transimpedance amplifier (TIA) block and connect directly the mixer’s output to a passive second-order continuous-time Σ∆ analog to digital converter (ADC), which operates in current-mode. These techniques enable the reduction of area, power consumption, and cost in modern CMOS receivers.

  12. Characterization of an x-ray hybrid CMOS detector with low interpixel capacitive crosstalk

    OpenAIRE

    Griffith, Christopher V.; Bongiorno, Stephen D.; Burrows, David N.; Falcone, Abraham D.; Prieskorn, Zachary R.

    2012-01-01

    We present the results of x-ray measurements on a hybrid CMOS detector that uses a H2RG ROIC and a unique bonding structure. The silicon absorber array has a 36{\\mu}m pixel size, and the readout array has a pitch of 18{\\mu}m; but only one readout circuit line is bonded to each 36x36{\\mu}m absorber pixel. This unique bonding structure gives the readout an effective pitch of 36{\\mu}m. We find the increased pitch between readout bonds significantly reduces the interpixel capacitance of the CMOS ...

  13. Optical and Electric Multifunctional CMOS Image Sensors for On-Chip Biosensing Applications

    Directory of Open Access Journals (Sweden)

    Kiyotaka Sasagawa

    2010-12-01

    Full Text Available In this review, the concept, design, performance, and a functional demonstration of multifunctional complementary metal-oxide-semiconductor (CMOS image sensors dedicated to on-chip biosensing applications are described. We developed a sensor architecture that allows flexible configuration of a sensing pixel array consisting of optical and electric sensing pixels, and designed multifunctional CMOS image sensors that can sense light intensity and electric potential or apply a voltage to an on-chip measurement target. We describe the sensors’ architecture on the basis of the type of electric measurement or imaging functionalities.

  14. SEU tolerant memory design for the ATLAS pixel readout chip

    International Nuclear Information System (INIS)

    Menouni, M; Barbero, M; Breugnon, P; Fougeron, D; Gensolen, F; Arutinov, D; Backhaus, M; Gonella, L; Hemperek, T; Karagounis, M; Beccherle, R; Darbo, G; Caminada, L; Dube, S; Fleury, J; Garcia-Sciveres, M; Gnani, D; Jensen, F; Gromov, V; Kluit, R

    2013-01-01

    The FE-I4 chip for the B-layer upgrade is designed in a 130 nm CMOS process. For this design, configuration memories are based on the DICE latches where layout considerations are followed to improve the tolerance to SEU. Tests have shown that DICE latches for which layout approaches are adopted are 30 times more tolerant to SEU than the standard DICE latches. To prepare for the new pixel readout chip planned for the future upgrades, a prototype chip containing 512 pixels has been designed in a 65 nm CMOS process and a new approach is adopted for SEU tolerant latches. Results in terms of SEU and TID tolerance are presented.

  15. Bio-Inspired Asynchronous Pixel Event Tricolor Vision Sensor.

    Science.gov (United States)

    Lenero-Bardallo, Juan Antonio; Bryn, D H; Hafliger, Philipp

    2014-06-01

    This article investigates the potential of the first ever prototype of a vision sensor that combines tricolor stacked photo diodes with the bio-inspired asynchronous pixel event communication protocol known as Address Event Representation (AER). The stacked photo diodes are implemented in a 22 × 22 pixel array in a standard STM 90 nm CMOS process. Dynamic range is larger than 60 dB and pixels fill factor is 28%. The pixels employ either simple pulse frequency modulation (PFM) or a Time-to-First-Spike (TFS) mode. A heuristic linear combination of the chip's inherent pseudo colors serves to approximate RGB color representation. Furthermore, the sensor outputs can be processed to represent the radiation in the near infrared (NIR) band without employing external filters, and to color-encode direction of motion due to an asymmetry in the update rates of the different diode layers.

  16. First result on biased CMOS MAPs-on-diamond devices

    Energy Technology Data Exchange (ETDEWEB)

    Kanxheri, K., E-mail: keida.kanxheri@pg.infn.it [Università degli Studi di Perugia, Perugia (Italy); INFN Perugia, Perugia (Italy); Citroni, M.; Fanetti, S. [LENS Firenze, Florence (Italy); Lagomarsino, S. [Università degli Studi di Firenze, Florence (Italy); INFN Firenze, Pisa (Italy); Morozzi, A. [Università degli Studi di Perugia, Perugia (Italy); INFN Perugia, Perugia (Italy); Parrini, G. [Università degli Studi di Firenze, Florence (Italy); Passeri, D. [Università degli Studi di Perugia, Perugia (Italy); INFN Perugia, Perugia (Italy); Sciortino, S. [Università degli Studi di Firenze, Florence (Italy); INFN Firenze, Pisa (Italy); Servoli, L. [INFN Perugia, Perugia (Italy)

    2015-10-01

    Recently a new type of device, the MAPS-on-diamond, obtained bonding a thinned to 25 μm CMOS Monolithic Active Pixel Sensor to a standard 500 μm pCVD diamond substrate, has been proposed and fabricated, allowing a highly segmented readout (10×10 μm pixel size) of the signal produced in the diamond substrate. The bonding between the two materials has been obtained using a new laser technique to deliver the needed energy at the interface. A biasing scheme has been adopted to polarize the diamond substrate to allow the charge transport inside the diamond without disrupting the functionalities of the CMOS Monolithic Active Pixel Sensor. The main concept of this class of devices is the capability of the charges generated in the diamond by ionizing radiation to cross the silicon–diamond interface and to be collected by the MAPS photodiodes. In this work we demonstrate that such passage occurs and measure its overall efficiency. This study has been carried out first calibrating the CMOS MAPS with monochromatic X-rays, and then testing the device with charged particles (electrons) either with and without biasing the diamond substrate, to compare the amount of signal collected.

  17. Gas Pixel Detectors for low energy X-ray polarimetry

    International Nuclear Information System (INIS)

    Spandre, Gloria

    2007-01-01

    Gas Pixel Detectors are position-sensitive proportional counters in which a complete integration between the gas amplification structure and the read-out electronics has been reached. Various generation of Application-Specific Integrated Circuit (ASIC) have been designed in deep submicron CMOS technology to realize a monolithic device which is at the same time the charge collecting electrode and the analog amplifying and charge measuring front-end electronics. The experimental response of a detector with 22060 pixels at 80 μm pitch to polarized and un-polarized X-ray radiation is shown and the application of this device for Astronomical X-ray Polarimetry discussed

  18. Front end optimization for the monolithic active pixel sensor of the ALICE Inner Tracking System upgrade

    International Nuclear Information System (INIS)

    Kim, D.; Rinella, G. Aglieri; Cavicchioli, C.; Hillemanns, H.; Hristozkov, S.; Junique, A.; Keil, M.; Kofarago, M.; Kugathasan, T.; Mager, M.; Chanlek, N.; Collu, A.; Degerli, Y.; Flouzat, C.; Guilloux, F.; Dorokhov, A.; Gajanana, D.; Gao, C.; Kwon, Y.; Lattuca, A.

    2016-01-01

    ALICE plans to replace its Inner Tracking System during the second long shut down of the LHC in 2019 with a new 10 m 2 tracker constructed entirely with monolithic active pixel sensors. The TowerJazz 180 nm CMOS imaging Sensor process has been selected to produce the sensor as it offers a deep pwell allowing full CMOS in-pixel circuitry and different starting materials. First full-scale prototypes have been fabricated and tested. Radiation tolerance has also been verified. In this paper the development of the charge sensitive front end and in particular its optimization for uniformity of charge threshold and time response will be presented

  19. Front end optimization for the monolithic active pixel sensor of the ALICE Inner Tracking System upgrade

    Science.gov (United States)

    Kim, D.; Aglieri Rinella, G.; Cavicchioli, C.; Chanlek, N.; Collu, A.; Degerli, Y.; Dorokhov, A.; Flouzat, C.; Gajanana, D.; Gao, C.; Guilloux, F.; Hillemanns, H.; Hristozkov, S.; Junique, A.; Keil, M.; Kofarago, M.; Kugathasan, T.; Kwon, Y.; Lattuca, A.; Mager, M.; Sielewicz, K. M.; Marin Tobon, C. A.; Marras, D.; Martinengo, P.; Mazza, G.; Mugnier, H.; Musa, L.; Pham, T. H.; Puggioni, C.; Reidt, F.; Riedler, P.; Rousset, J.; Siddhanta, S.; Snoeys, W.; Song, M.; Usai, G.; Van Hoorne, J. W.; Yang, P.

    2016-02-01

    ALICE plans to replace its Inner Tracking System during the second long shut down of the LHC in 2019 with a new 10 m2 tracker constructed entirely with monolithic active pixel sensors. The TowerJazz 180 nm CMOS imaging Sensor process has been selected to produce the sensor as it offers a deep pwell allowing full CMOS in-pixel circuitry and different starting materials. First full-scale prototypes have been fabricated and tested. Radiation tolerance has also been verified. In this paper the development of the charge sensitive front end and in particular its optimization for uniformity of charge threshold and time response will be presented.

  20. Front end optimization for the monolithic active pixel sensor of the ALICE Inner Tracking System upgrade

    OpenAIRE

    Kim, D; Rinella, G Aglieri; Cavicchioli, C; Chanlek, N; Collu, A; Degerli, Y; Dorokhov, A; Flouzat, C; Gajanana, D; Gao, C; Guilloux, F; Hillemanns, H; Hristozkov, S; Junique, A; Keil, M

    2016-01-01

    ALICE plans to replace its Inner Tracking System during the second long shut down of the LHC in 2019 with a new 10 m(2) tracker constructed entirely with monolithic active pixel sensors. The TowerJazz 180 nm CMOS imaging Sensor process has been selected to produce the sensor as it offers a deep pwell allowing full CMOS in-pixel circuitry and different starting materials. First full-scale prototypes have been fabricated and tested. Radiation tolerance has also been verified. In this paper the ...

  1. Performance Studies of Pixel Hybrid Photon Detectors for the LHCb RICH Counters

    CERN Document Server

    Aglieri Rinella, G; Piedigrossi, D; Van Lysebetten, A

    2004-01-01

    The Pixel Hybrid Photon Detector is a vacuum tube with a multi-alkali photo cathode, high voltage cross-focused electron optics and an anode consisting of a silicon pixel detector bump-bonded to a readout CMOS electronic chip fully encapsulated in the device. The Pixel HPD fulfils the requirements of the Ring Imaging Cherenkov counters of the LHCb experiment at LHC. The performances of the Pixel HPD will be discussed with reference to laboratory measurements, Cherenkov light imaging in recent beam tests, image distortions due to a magnetic field.

  2. International Workshop on Semiconductor Pixel Detectors for Particles and Imaging (PIXEL2016)

    CERN Document Server

    Rossi, Leonardo; PIXEL2016

    2016-01-01

    The workshop will cover various topics related to pixel detector technology. Development and applications will be discussed for charged particle tracking in High Energy Physics, Nuclear Physics and Astrophysics, and for X-ray imaging in Astronomy, Biology, Medicine and Material Science. The conference program will also include reports on front and back end electronics, radiation effects, low mass mechanics, environmental control and construction techniques. Emerging technologies, such as monolithic and HV&HR CMOS, will also be treated. Will be published in: http://pos.sissa.it/

  3. CMOS/SOS processing

    Science.gov (United States)

    Ramondetta, P.

    1980-01-01

    Report describes processes used in making complementary - metal - oxide - semiconductor/silicon-on-sapphire (CMOS/SOS) integrated circuits. Report lists processing steps ranging from initial preparation of sapphire wafers to final mapping of "good" and "bad" circuits on a wafer.

  4. Gamma and Proton-Induced Dark Current Degradation of 5T CMOS Pinned Photodiode 0.18 mu{m} CMOS Image Sensors

    Science.gov (United States)

    Martin, E.; Nuns, T.; David, J.-P.; Gilard, O.; Vaillant, J.; Fereyre, P.; Prevost, V.; Boutillier, M.

    2014-02-01

    The radiation tolerance of a 0.18 μm technology CMOS commercial image sensor has been evaluated with Co60 and proton irradiations. The effects of protons on the hot pixels and dynamic bias and duty cycle conditions during gamma irradiations are studied.

  5. OMNI: An optoelectronic multichannel network interface based on hybrid CMOS-SEED technology

    Science.gov (United States)

    Pinkston, Timothy M.

    1996-11-01

    This paper presents a hybrid CMOS-SEED multiprocessor network interface smart pixel design that implements a reservation-based channel control protocol for collisionless concurrent access to multiple optical interprocessor communication channels. An asynchronous optical token is used as the arbitration mechanism for reservation control instead of slotted access. This work demonstrates that complex network protocol functions can be implemented using optoelectronic smart pixel technology.

  6. A 75-ps Gated CMOS Image Sensor with Low Parasitic Light Sensitivity.

    Science.gov (United States)

    Zhang, Fan; Niu, Hanben

    2016-06-29

    In this study, a 40 × 48 pixel global shutter complementary metal-oxide-semiconductor (CMOS) image sensor with an adjustable shutter time as low as 75 ps was implemented using a 0.5-μm mixed-signal CMOS process. The implementation consisted of a continuous contact ring around each p+/n-well photodiode in the pixel array in order to apply sufficient light shielding. The parasitic light sensitivity of the in-pixel storage node was measured to be 1/8.5 × 10⁷ when illuminated by a 405-nm diode laser and 1/1.4 × 10⁴ when illuminated by a 650-nm diode laser. The pixel pitch was 24 μm, the size of the square p+/n-well photodiode in each pixel was 7 μm per side, the measured random readout noise was 217 e(-) rms, and the measured dynamic range of the pixel of the designed chip was 5500:1. The type of gated CMOS image sensor (CIS) that is proposed here can be used in ultra-fast framing cameras to observe non-repeatable fast-evolving phenomena.

  7. CMOS analog circuit design

    CERN Document Server

    Allen, Phillip E

    1987-01-01

    This text presents the principles and techniques for designing analog circuits to be implemented in a CMOS technology. The level is appropriate for seniors and graduate students familiar with basic electronics, including biasing, modeling, circuit analysis, and some familiarity with frequency response. Students learn the methodology of analog integrated circuit design through a hierarchically-oriented approach to the subject that provides thorough background and practical guidance for designing CMOS analog circuits, including modeling, simulation, and testing. The authors' vast industrial experience and knowledge is reflected in the circuits, techniques, and principles presented. They even identify the many common pitfalls that lie in the path of the beginning designer--expert advice from veteran designers. The text mixes the academic and practical viewpoints in a treatment that is neither superficial nor overly detailed, providing the perfect balance.

  8. Monolithic pixels on moderate resistivity substrate and sparsifying readout architecture

    CERN Document Server

    Giubilato, P; Snoeys, W; Bisello, D; Marchioro, A; Battaglia, M; Demaria, L; Mansuy, S C; Pantano, D; Rousset, J; Mattiazzo, S; Kloukinas, K; Potenza, A; Ikemoto, Y; Rivetti, A; Chalmet, P; Mugnier, H; Silvestrin, L

    2013-01-01

    The LePix projects aim realizing a new generation monolithic pixel detectors with improved performances at lesser cost with respect to both current state of the art monolithic and hybrid pixel sensors. The detector is built in a 90 nm CMOS process on a substrate of moderate resistivity. This allows charge collection by drift while maintaining the other advantages usually offered by MAPS, like having a single piece detector and using a standard CMOS production line. The collection by drift mechanism, coupled to the low capacitance design of the collecting node made possible by the monolithic approach, provides an excellent signal to noise ratio straight at the pixel cell together with a radiation tolerance far superior to conventional un-depleted MAPS. The excellent signal-to-noise performance is demonstrated by the device ability to separate the 6 keV Fe-55 double peak at room temperature. To achieve high granularity (10-20 mu m pitch pixels) over large detector areas maintaining high readout speed, a complet...

  9. Improved Space Object Orbit Determination Using CMOS Detectors

    Science.gov (United States)

    Schildknecht, T.; Peltonen, J.; Sännti, T.; Silha, J.; Flohrer, T.

    2014-09-01

    CMOS-sensors, or in general Active Pixel Sensors (APS), are rapidly replacing CCDs in the consumer camera market. Due to significant technological advances during the past years these devices start to compete with CCDs also for demanding scientific imaging applications, in particular in the astronomy community. CMOS detectors offer a series of inherent advantages compared to CCDs, due to the structure of their basic pixel cells, which each contains their own amplifier and readout electronics. The most prominent advantages for space object observations are the extremely fast and flexible readout capabilities, feasibility for electronic shuttering and precise epoch registration, and the potential to perform image processing operations on-chip and in real-time. The major challenges and design drivers for ground-based and space-based optical observation strategies have been analyzed. CMOS detector characteristics were critically evaluated and compared with the established CCD technology, especially with respect to the above mentioned observations. Similarly, the desirable on-chip processing functionalities which would further enhance the object detection and image segmentation were identified. Finally, we simulated several observation scenarios for ground- and space-based sensor by assuming different observation and sensor properties. We will introduce the analyzed end-to-end simulations of the ground- and space-based strategies in order to investigate the orbit determination accuracy and its sensitivity which may result from different values for the frame-rate, pixel scale, astrometric and epoch registration accuracies. Two cases were simulated, a survey using a ground-based sensor to observe objects in LEO for surveillance applications, and a statistical survey with a space-based sensor orbiting in LEO observing small-size debris in LEO. The ground-based LEO survey uses a dynamical fence close to the Earth shadow a few hours after sunset. For the space-based scenario

  10. Performance of the INTPIX6 SOI pixel detector

    Science.gov (United States)

    Arai, Y.; Bugiel, Sz.; Dasgupta, R.; Idzik, M.; Kapusta, P.; Kucewicz, W.; Miyoshi, T.; Turala, M.

    2017-01-01

    Characterization of the monolithic pixel detector INPTIX6, designed at KEK and fabricated in Lapis 0.2 μ m Fully-Depleted, Low-Leakage Silicon-On-Insulator (SOI) CMOS technology, was performed. The INTPIX6 comprises a large area of 1408 × 896 integrating type squared pixels of 12 micron pitch. In this work the performance and measurement results of the prototypes produced on lower resistivity Czochralski type (CZ-n) and high resistivity floating zone (FZ-n) sensor wafers are presented. Using 241Am radioactive source the noise of INTPIX6 was measured, showing the ENC (Equivalent Noise Charge) of about 70 e-. The resolution calculated from the FWHM of the Iron-55 X-ray peak was about 100 e-. The radiation hardness of the SOI pixel detector was also investigated. The CZ-n type INTPIX6 received a dose of 60 krad and its performance has been continuously monitored during the irradiation.

  11. Digital Power Consumption Estimations for CHIPIX65 Pixel Readout Chip

    CERN Document Server

    Marcotulli, Andrea

    2016-01-01

    New hybrid pixel detectors with improved resolution capable of dealing with hit rates up to 3 GHz/cm2 will be required for future High Energy Physics experiments in the Large Hadron Collider (LHC) at CERN. Given this, the RD53 collaboration works on the design of the next generation pixel readout chip needed for both the ATLAS and CMS detector phase 2 pixel upgrades. For the RD53 demonstrator chip in 65nm CMOS technology, different architectures are considered. In particular the purpose of this work is estimating the power consumption of the digital architecture of the readout ASIC developed by CHIPIX65 project of the INFN National Scientific Committee. This has been done with modern chip design tools integrated with the VEPIX53 simulation framework that has been developed within the RD53 collaboration in order to assess the performance of the system in very high rate, high energy physics experiments.

  12. Structured Analog CMOS Design

    CERN Document Server

    Stefanovic, Danica

    2008-01-01

    Structured Analog CMOS Design describes a structured analog design approach that makes it possible to simplify complex analog design problems and develop a design strategy that can be used for the design of large number of analog cells. It intentionally avoids treating the analog design as a mathematical problem, developing a design procedure based on the understanding of device physics and approximations that give insight into parameter interdependences. The proposed transistor-level design procedure is based on the EKV modeling approach and relies on the device inversion level as a fundament

  13. Comparative study of various pixel photodiodes for digital radiography: Junction structure, corner shape and noble window opening

    Science.gov (United States)

    Kang, Dong-Uk; Cho, Minsik; Lee, Dae Hee; Yoo, Hyunjun; Kim, Myung Soo; Bae, Jun Hyung; Kim, Hyoungtaek; Kim, Jongyul; Kim, Hyunduk; Cho, Gyuseong

    2012-05-01

    Recently, large-size 3-transistors (3-Tr) active pixel complementary metal-oxide silicon (CMOS) image sensors have been being used for medium-size digital X-ray radiography, such as dental computed tomography (CT), mammography and nondestructive testing (NDT) for consumer products. We designed and fabricated 50 µm × 50 µm 3-Tr test pixels having a pixel photodiode with various structures and shapes by using the TSMC 0.25-m standard CMOS process to compare their optical characteristics. The pixel photodiode output was continuously sampled while a test pixel was continuously illuminated by using 550-nm light at a constant intensity. The measurement was repeated 300 times for each test pixel to obtain reliable results on the mean and the variance of the pixel output at each sampling time. The sampling rate was 50 kHz, and the reset period was 200 msec. To estimate the conversion gain, we used the mean-variance method. From the measured results, the n-well/p-substrate photodiode, among 3 photodiode structures available in a standard CMOS process, showed the best performance at a low illumination equivalent to the typical X-ray signal range. The quantum efficiencies of the n+/p-well, n-well/p-substrate, and n+/p-substrate photodiodes were 18.5%, 62.1%, and 51.5%, respectively. From a comparison of pixels with rounded and rectangular corners, we found that a rounded corner structure could reduce the dark current in large-size pixels. A pixel with four rounded corners showed a reduced dark current of about 200fA compared to a pixel with four rectangular corners in our pixel sample size. Photodiodes with round p-implant openings showed about 5% higher dark current, but about 34% higher sensitivities, than the conventional photodiodes.

  14. Comparative study of various pixel photodiodes for digital radiography: junction structure, corner shape and noble window opening

    Energy Technology Data Exchange (ETDEWEB)

    Kang, Dong-Uk; Cho, Min-Sik; Lee, Dae-Hee; Yoo, Hyun-Jun; Kim, Myung-Soo; Bae, Jun-Hyung; Kim, Hyoung-Taek; Kim, Jong-Yul; Kim, Hyun-Duk; Cho, Gyu-Seong [Korea Advanced Institute of Science and Technology, Daejeon (Korea, Republic of)

    2012-05-15

    Recently, large-size 3-transistors (3-Tr) active pixel complementary metal-oxide silicon (CMOS) image sensors have been being used for medium-size digital X-ray radiography, such as dental computed tomography (CT), mammography and nondestructive testing (NDT) for consumer products. We designed and fabricated 50 μm x 50 μm 3-Tr test pixels having a pixel photodiode with various structures and shapes by using the TSMC 0.25-m standard CMOS process to compare their optical characteristics. The pixel photodiode output was continuously sampled while a test pixel was continuously illuminated by using 550-nm light at a constant intensity. The measurement was repeated 300 times for each test pixel to obtain reliable results on the mean and the variance of the pixel output at each sampling time. The sampling rate was 50 kHz, and the reset period was 200 msec. To estimate the conversion gain, we used the mean-variance method. From the measured results, the n-well/p-substrate photodiode, among 3 photodiode structures available in a standard CMOS process, showed the best performance at a low illumination equivalent to the typical X-ray signal range. The quantum efficiencies of the n+/p-well, n-well/p-substrate, and n+/p-substrate photodiodes were 18.5%, 62.1%, and 51.5%, respectively. From a comparison of pixels with rounded and rectangular corners, we found that a rounded corner structure could reduce the dark current in large-size pixels. A pixel with four rounded corners showed a reduced dark current of about 200 fA compared to a pixel with four rectangular corners in our pixel sample size. Photodiodes with round p-implant openings showed about 5% higher dark current, but about 34% higher sensitivities, than the conventional photodiodes.

  15. SEU-hardened design for shift register in CMOS APS

    International Nuclear Information System (INIS)

    Meng Liya; Liu Zedong; Hu Dajiang; Wang Qingxiang

    2012-01-01

    The inverter-based quasi-static shift register in CMOS APS, which is used in ionizing radiation environment, is susceptible to single event upset (SEU), thus affecting the CMOS active pixel sensor (APS) working. The analysis of the SEU for inverter-based quasi-static shift register concludes that the most sensitive node to single event transient (SET) exists in the input of inverter, and the threshold voltage and capacitance of input node of inverter determine the capability of anti-SEU. A new method was proposed, which replaced the inverter with Schmitt trigger in shift register. Because there is a hysteresis on voltage transfer characteristic of Schmitt trigger, there is high flip threshold, thus better capability of anti-SEU can be achieved. Simulation results show that the anti-SEU capability of Schmitt trigger is 10 times more than that of inverter. (authors)

  16. CMS Pixel Detector Upgrade

    CERN Document Server

    INSPIRE-00038772

    2011-01-01

    The present Compact Muon Solenoid silicon pixel tracking system has been designed for a peak luminosity of 1034cm-2s-1 and total dose corresponding to two years of the Large Hadron Collider (LHC) operation. With the steady increase of the luminosity expected at the LHC, a new pixel detector with four barrel layers and three endcap disks is being designed. We will present the key points of the design: the new geometry, which minimizes the material budget and increases the tracking points, and the development of a fast digital readout architecture, which ensures readout efficiency even at high rate. The expected performances for tracking and vertexing of the new pixel detector are also addressed.

  17. MediSPECT: Single photon emission computed tomography system for small field of view small animal imaging based on a CdTe hybrid pixel detector

    International Nuclear Information System (INIS)

    Accorsi, R.; Autiero, M.; Celentano, L.

    2007-01-01

    We describe MediSPECT, a new scanner developed at University and INFN Napoli, for SPECT studies on small animals with a small field of view (FOV) and high spatial resolution. The CdTe pixel detector (a 256x256 matrix of 55 μm square pixels) operating in single photon counting for detection of gamma-rays with low and medium energy (e.g. 125 I, 27-35 keV, 99m Tc, 140 keV), is bump bonded to the Medipix2 readout chip. The FOV of the MediSPECT scanner with a coded aperture mask collimator ranges from 6.3 mm (system spatial resolution 110 μm at 27-35 keV) to 24.3 mm. With a 0.30 mm pinhole the FOV ranges from 2.4 to 29 mm (where the system spatial resolution is 1.0 mm at 27-35 keV and 2.0 mm at 140 keV). MediSPECT will be used for in vivo imaging of small organs or tissue structures in mouse, e.g., brain, thyroid, heart or tumor

  18. The ATLAS Pixel Detector

    CERN Document Server

    Huegging, Fabian

    2006-06-26

    The contruction of the ATLAS Pixel Detector which is the innermost layer of the ATLAS tracking system is prgressing well. Because the pixel detector will contribute significantly to the ATLAS track and vertex reconstruction. The detector consists of identical sensor-chip-hybrid modules, arranged in three barrels in the centre and three disks on either side for the forward region. The position of the detector near the interaction point requires excellent radiation hardness, mechanical and thermal robustness, good long-term stability for all parts, combined with a low material budget. The final detector layout, new results from production modules and the status of assembly are presented.

  19. Characterization of Pixel Sensors

    CERN Document Server

    Oliveira, Felipe Ferraz

    2017-01-01

    It was commissioned at CERN ATLAS pixel group a fluorescence setup for characterization of pixel sensors. The idea is to measure the energies of different targets to calibrate your sensor. It was measured four matrices (80, 95, 98 and 106) of the Investigator1 sensor with different deep PW using copper, iron and titanium as target materials. The matrix 80 has a higher gain (0.065 ± 0.002) and matrix 106 has a better energy resolution (0.05 ± 0.04). The noise of the setup is around 3.6 mV .

  20. The DELPHI pixels

    International Nuclear Information System (INIS)

    Becks, K.H.; Brunet, J.M.

    1997-01-01

    To improve tracking in the very forward direction for running at LEP200, the angular acceptance of the DELPHI Vertex detector has been extended from 45 to 11 with respect to the beam axis. Pixel detector crowns cover the region between 25 and 13 . Due to very tight space and material thickness constraints it was necessary to develop new techniques (integrated busses in the detector substrate, high density layout on Kapton, etc.). About 1000 cm 2 of pixels are already installed and working in DELPHI. Techniques, tests and production of these detectors will be described, as well as the main problems encountered during this work. (orig.)

  1. FE-I4 Chip Development for Upgraded ATLAS Pixel Detector at LHC

    CERN Document Server

    Barbero, M; The ATLAS collaboration

    2010-01-01

    A new ATLAS pixel chip FE-I4 has been developed for use in upgraded LHC luminosity environments, including the near-term Insertable B-Layer upgrade. FE-I4 is designed in a 130 nm CMOS technology, presenting advantages in terms of radiation tolerance and digital logic density compared to the 0.25 μm CMOS technology used for the current ATLAS pixel IC, FE-I3. FE-I4 architecture is based on an array of 80×336 pixels, each 50×250 μm2, consisting of analog and digital sections. The analog pixel section is designed for low power consumption and compatibility to several sensor candidates. It is based on a two-stage architecture with a pre-amp AC-coupled to a second stage of amplification. It features leakage current compensation circuitry, local 4-bit pre-amp feedback tuning and a discriminator locally adjusted through 5 configuration bits. The digital architecture is based on a 4-pixel unit called Pixel Digital Region (PDR) allowing for local storage of hits in 5-deep data buffers at pixel level for the duratio...

  2. Status and perspectives of pixel sensors based on 3D vertical integration

    Energy Technology Data Exchange (ETDEWEB)

    Re, Valerio [Università di Bergamo, Dipartimento di Ingegneria, Viale Marconi, 5, 24044 Dalmine (Italy); INFN, Sezione di Pavia, Via Bassi, 6, 27100 Pavia (Italy)

    2014-11-21

    This paper reviews the most recent developments of 3D integration in the field of silicon pixel sensors and readout integrated circuits. This technology may address the needs of future high energy physics and photon science experiments by increasing the electronic functional density in small pixel readout cells and by stacking various device layers based on different technologies, each optimized for a different function. Current efforts are aimed at improving the performance of both hybrid pixel detectors and of CMOS sensors. The status of these activities is discussed here, taking into account experimental results on 3D devices developed in the frame of the 3D-IC consortium. The paper also provides an overview of the ideas that are being currently devised for novel 3D vertically integrated pixel sensors. - Highlights: • 3D integration is a promising technology for pixel sensors in high energy physics. • Experimental results on two-layer 3D CMOS pixel sensors are presented. • The outcome of the first run from the 3D-IC consortium is discussed. • The AIDA network is studying via-last 3D integration of heterogeneous layers. • New ideas based on 3D vertically integrated pixels are being developed for HEP.

  3. Status and perspectives of pixel sensors based on 3D vertical integration

    International Nuclear Information System (INIS)

    Re, Valerio

    2014-01-01

    This paper reviews the most recent developments of 3D integration in the field of silicon pixel sensors and readout integrated circuits. This technology may address the needs of future high energy physics and photon science experiments by increasing the electronic functional density in small pixel readout cells and by stacking various device layers based on different technologies, each optimized for a different function. Current efforts are aimed at improving the performance of both hybrid pixel detectors and of CMOS sensors. The status of these activities is discussed here, taking into account experimental results on 3D devices developed in the frame of the 3D-IC consortium. The paper also provides an overview of the ideas that are being currently devised for novel 3D vertically integrated pixel sensors. - Highlights: • 3D integration is a promising technology for pixel sensors in high energy physics. • Experimental results on two-layer 3D CMOS pixel sensors are presented. • The outcome of the first run from the 3D-IC consortium is discussed. • The AIDA network is studying via-last 3D integration of heterogeneous layers. • New ideas based on 3D vertically integrated pixels are being developed for HEP

  4. Further applications for mosaic pixel FPA technology

    Science.gov (United States)

    Liddiard, Kevin C.

    2011-06-01

    In previous papers to this SPIE forum the development of novel technology for next generation PIR security sensors has been described. This technology combines the mosaic pixel FPA concept with low cost optics and purpose-designed readout electronics to provide a higher performance and affordable alternative to current PIR sensor technology, including an imaging capability. Progressive development has resulted in increased performance and transition from conventional microbolometer fabrication to manufacture on 8 or 12 inch CMOS/MEMS fabrication lines. A number of spin-off applications have been identified. In this paper two specific applications are highlighted: high performance imaging IRFPA design and forest fire detection. The former involves optional design for small pixel high performance imaging. The latter involves cheap expendable sensors which can detect approaching fire fronts and send alarms with positional data via mobile phone or satellite link. We also introduce to this SPIE forum the application of microbolometer IR sensor technology to IoT, the Internet of Things.

  5. A CMOS Morlet Wavelet Generator

    Directory of Open Access Journals (Sweden)

    A. I. Bautista-Castillo

    2017-04-01

    Full Text Available The design and characterization of a CMOS circuit for Morlet wavelet generation is introduced. With the proposed Morlet wavelet circuit, it is possible to reach a~low power consumption, improve standard deviation (σ control and also have a small form factor. A prototype in a double poly, three metal layers, 0.5 µm CMOS process from MOSIS foundry was carried out in order to verify the functionality of the proposal. However, the design methodology can be extended to different CMOS processes. According to the performance exhibited by the circuit, may be useful in many different signal processing tasks such as nonlinear time-variant systems.

  6. Recent developments on CMOS MAPS for the SuperB Silicon Vertex Tracker

    Energy Technology Data Exchange (ETDEWEB)

    Rizzo, G., E-mail: rizzo@pi.infn.it [Università degli Studi di Pisa (Italy); Istituto Nazionale di Fisica Nucleare, Sezione di Pisa (Italy); Comott, D. [Università degli Studi di Bergamo (Italy); Manghisoni, M.; Re, V.; Traversi, G. [Università degli Studi di Bergamo (Italy); Istituto Nazionale di Fisica Nucleare, Sezione di Pavia (Italy); Fabbri, L.; Gabrielli, A. [Università degli Studi di Bologna (Italy); Istituto Nazionale di Fisica Nucleare, Sezione di Bologna (Italy); Giorgi, F.; Pellegrini, G.; Sbarra, C. [Istituto Nazionale di Fisica Nucleare, Sezione di Bologna (Italy); Semprini-Cesari, N.; Valentinetti, S.; Villa, M.; Zoccoli, A. [Università degli Studi di Bologna (Italy); Istituto Nazionale di Fisica Nucleare, Sezione di Bologna (Italy); Berra, A.; Lietti, D.; Prest, M. [Università dell' Insubria, Como (Italy); Istituto Nazionale di Fisica Nucleare, Sezione di Milano Bicocca (Italy); Bevan, A. [School of Physics and Astronomy, Queen Mary, University of London, London E1 4NS (United Kingdom); Wilson, F. [STFC, Rutherford Appleton Laboratory, Harwell Oxford, Didcot OX11 0QX (United Kingdom); Beck, G. [School of Physics and Astronomy, Queen Mary, University of London, London E1 4NS (United Kingdom); and others

    2013-08-01

    In the design of the Silicon Vertex Tracker for the high luminosity SuperB collider, very challenging requirements are set by physics and background conditions on its innermost Layer0: small radius (about 1.5 cm), resolution of 10–15μm in both coordinates, low material budget <1%X{sub 0}, and the ability to withstand a background hit rate of several tens of MHz/cm{sup 2}. Thanks to an intense R and D program the development of Deep NWell CMOS MAPS (with the ST Microelectronics 130 nm process) has reached a good level of maturity and allowed for the first time the implementation of thin CMOS sensors with similar functionalities as in hybrid pixels, such as pixel-level sparsification and fast time stamping. Further MAPS performance improvements are currently under investigation with two different approaches: the INMAPS CMOS process, featuring a quadruple well and a high resistivity substrate, and 3D CMOS MAPS, realized with vertical integration technology. In both cases specific features of the processes chosen can improve charge collection efficiency, with respect to a standard DNW MAPS design, and allow to implement a more complex in-pixel logic in order to develop a faster readout architecture. Prototypes of MAPS matrix, suitable for application in the SuperB Layer0, have been realized with the INMAPS 180 nm process and the 130 nm Chartered/Tezzaron 3D process and results of their characterization will be presented in this paper.

  7. CMOS Imaging of Temperature Effects on Pin-Printed Xerogel Sensor Microarrays.

    Science.gov (United States)

    Lei Yao; Ka Yi Yung; Chodavarapu, Vamsy P; Bright, Frank V

    2011-04-01

    In this paper, we study the effect of temperature on the operation and performance of a xerogel-based sensor microarrays coupled to a complementary metal-oxide semiconductor (CMOS) imager integrated circuit (IC) that images the photoluminescence response from the sensor microarray. The CMOS imager uses a 32 × 32 (1024 elements) array of active pixel sensors and each pixel includes a high-gain phototransistor to convert the detected optical signals into electrical currents. A correlated double sampling circuit and pixel address/digital control/signal integration circuit are also implemented on-chip. The CMOS imager data are read out as a serial coded signal. The sensor system uses a light-emitting diode to excite target analyte responsive organometallic luminophores doped within discrete xerogel-based sensor elements. As a proto type, we developed a 3 × 3 (9 elements) array of oxygen (O2) sensors. Each group of three sensor elements in the array (arranged in a column) is designed to provide a different and specific sensitivity to the target gaseous O2 concentration. This property of multiple sensitivities is achieved by using a mix of two O2 sensitive luminophores in each pin-printed xerogel sensor element. The CMOS imager is designed to be low noise and consumes a static power of 320.4 μW and an average dynamic power of 624.6 μW when operating at 100-Hz sampling frequency and 1.8-V dc power supply.

  8. Pixel detector readout chip

    CERN Multimedia

    1991-01-01

    Close-up of a pixel detector readout chip. The photograph shows an aera of 1 mm x 2 mm containing 12 separate readout channels. The entire chip contains 1000 readout channels (around 80 000 transistors) covering a sensitive area of 8 mm x 5 mm. The chip has been mounted on a silicon detector to detect high energy particles.

  9. ATLAS Pixel Detector Upgrade

    CERN Document Server

    Flick, T; The ATLAS collaboration

    2009-01-01

    The first upgrade for higher luminosity at LHC for the ATLAS pixel detector is the insertion of a forth layer, the IBL. The talk gives an overview about what the IBL is and how it will be set up, as well as to give a status of the research and develoment work.

  10. ALICE Silicon Pixel Detector

    CERN Multimedia

    Manzari, V

    2013-01-01

    The Silicon Pixel Detector (SPD) forms the innermost two layers of the 6-layer barrel Inner Tracking System (ITS). The SPD plays a key role in the determination of the position of the primary collision and in the reconstruction of the secondary vertices from particle decays.

  11. Electrical Interconnections Through CMOS Wafers

    DEFF Research Database (Denmark)

    Rasmussen, Frank Engel

    2003-01-01

    Chips with integrated vias are currently the ultimate miniaturizing solution for 3D packaging of microsystems. Previously the application of vias has almost exclusively been demonstrated within MEMS technology, and only a few of these via technologies have been CMOS compatible. This thesis...... describes the development of vias through a silicon wafer containing Complementary Metal-Oxide Semiconductor (CMOS) circuitry. Two via technologies have been developed and fabricated in blank silicon wafers; one based on KOH etching of wafer through-holes and one based on DRIE of wafer through......-holes. The most promising of these technologies --- the DRIE based process --- has been implemented in CMOS wafers containing hearing aid amplifiers. The main challenges in the development of a CMOS compatible via process depend on the chosen process for etching of wafer through-holes. In the case of KOH etching...

  12. A 256×256 low-light-level CMOS imaging sensor with digital CDS

    Science.gov (United States)

    Zou, Mei; Chen, Nan; Zhong, Shengyou; Li, Zhengfen; Zhang, Jicun; Yao, Li-bin

    2016-10-01

    In order to achieve high sensitivity for low-light-level CMOS image sensors (CIS), a capacitive transimpedance amplifier (CTIA) pixel circuit with a small integration capacitor is used. As the pixel and the column area are highly constrained, it is difficult to achieve analog correlated double sampling (CDS) to remove the noise for low-light-level CIS. So a digital CDS is adopted, which realizes the subtraction algorithm between the reset signal and pixel signal off-chip. The pixel reset noise and part of the column fixed-pattern noise (FPN) can be greatly reduced. A 256×256 CIS with CTIA array and digital CDS is implemented in the 0.35μm CMOS technology. The chip size is 7.7mm×6.75mm, and the pixel size is 15μm×15μm with a fill factor of 20.6%. The measured pixel noise is 24LSB with digital CDS in RMS value at dark condition, which shows 7.8× reduction compared to the image sensor without digital CDS. Running at 7fps, this low-light-level CIS can capture recognizable images with the illumination down to 0.1lux.

  13. ATLAS ITk Pixel detector

    CERN Document Server

    Gemme, Claudia; The ATLAS collaboration

    2016-01-01

    The high luminosity upgrade of the LHC (HL-LHC) in 2026 will provide new challenge to the ATLAS tracker. The current inner detector will be replaced with a whole silicon tracker which will consist of a five barrel layer Pixel detector surrounded by a four barrel layer Strip detector. The expected high radiation level are requiring the development of upgraded silicon sensors as well as new a front-end chip. The dense tracking environment will require finer granularity detectors. The data rates will require new technologies for high bandwidth data transmission and handling. The current status of the HL-LHC ATLA Pixel detector developments as well as the various layout options will be reviewed.

  14. CMS pixel upgrade project

    CERN Document Server

    Kaestli, Hans-Christian

    2010-01-01

    The LHC machine at CERN finished its first year of pp collisions at a center of mass energy of 7~TeV. While the commissioning to exploit its full potential is still ongoing, there are plans to upgrade its components to reach instantaneous luminosities beyond the initial design value after 2016. A corresponding upgrade of the innermost part of the CMS detector, the pixel detector, is needed. A full replacement of the pixel detector is planned in 2016. It will not only address limitations of the present system at higher data rates, but will aggressively lower the amount of material inside the fiducial tracking volume which will lead to better tracking and b-tagging performance. This article gives an overview of the project and illuminates the motivations and expected improvements in the detector performance.

  15. CMS pixel upgrade project

    CERN Document Server

    INSPIRE-00575876

    2011-01-01

    The LHC machine at CERN finished its first year of pp collisions at a center of mass energy of 7 TeV. While the commissioning to exploit its full potential is still ongoing, there are plans to upgrade its components to reach instantaneous luminosities beyond the initial design value after 2016. A corresponding upgrade of the innermost part of the CMS detector, the pixel detector, is needed. A full replacement of the pixel detector is planned in 2016. It will not only address limitations of the present system at higher data rates, but will aggressively lower the amount of material inside the fiducial tracking volume which will lead to better tracking and b-tagging performance. This article gives an overview of the project and illuminates the motivations and expected improvements in the detector performance.

  16. A prototype pixel readout chip for asynchronous detection applications

    International Nuclear Information System (INIS)

    Raymond, D.M.; Hall, G.; Lewis, A.J.; Sharp, P.H.

    1991-01-01

    A two-dimensional array of amplifier cells has been fabricated as a prototype readout system for a matching array of silicon diode detectors. Each cell contains a preamplifier, shaping amplifier, comparator and analogue signal storage in an area of 300 μmx320 μm using 3 μm CMOS technology. Full size chips will be bump bonded to pixel detector arrays. Low noise and asynchronous operation are novel design features. With noise levels of less than 250 rms electrons for input capacitances up to 600 fF, pixel detectors will be suitable for autoradiography, synchrotron X-ray and high energy particle detection applications. The design of the prototype chip is presented and future developments and prospects for applications are discussed. (orig.)

  17. Capacitively coupled hybrid pixel assemblies for the CLIC vertex detector

    CERN Document Server

    AUTHOR|(SzGeCERN)734627; Benoit, Mathieu; Dannheim, Dominik; Dette, Karola; Hynds, Daniel; Kulis, Szymon; Peric, Ivan; Petric, Marko; Redford, Sophie; Sicking, Eva; Valerio, Pierpaolo

    2016-01-01

    The vertex detector at the proposed CLIC multi-TeV linear e+e- collider must have minimal material content and high spatial resolution, combined with accurate time-stamping to cope with the expected high rate of beam-induced backgrounds. One of the options being considered is the use of active sensors implemented in a commercial high-voltage CMOS process, capacitively coupled to hybrid pixel ASICs. A prototype of such an assembly, using two custom designed chips (CCPDv3 as active sensor glued to a CLICpix readout chip), has been characterised both in the lab and in beam tests at the CERN SPS using 120 GeV/c positively charged hadrons. Results of these characterisation studies are presented both for single and dual amplification stages in the active sensor. Pixel cross-coupling results are also presented, showing the sensitivity to placement precision and planarity of the glue layer.

  18. Operation of a GEM-TPC with pixel readout

    CERN Document Server

    Brezina, C; Kaminski, J; Killenberg, M; Krautscheid, T

    2012-01-01

    A prototype time projection chamber with 26 cm drift length was operated with a short-spaced triple gas electron multiplier (GEM) stack in a setup triggering on cosmic muon tracks. A small part of the anode plane is read out with a CMOS pixel application-specified integrated circuit (ASIC) named Timepix, which provides ultimate readout granularity. Pixel clusters of charge depositions corresponding to single primary electrons are observed and analyzed to reconstruct charged particle tracks. A dataset of several weeks of cosmic ray data is analyzed. The number of clusters per track length is well described by simulation. The obtained single point resolution approaches 50 m at short drift distances and is well reproduced by a simple model of single-electron diffusion.

  19. Test-beam results of a SOI pixel detector prototype

    CERN Document Server

    Bugiel, Roma; Dannheim, Dominik; Fiergolski, Adrian; Hynds, Daniel; Idzik, Marek; Kapusta, P; Kucewicz, Wojciech; Munker, Ruth Magdalena; Nurnberg, Andreas Matthias

    2018-01-01

    This paper presents the test-beam results of a monolithic pixel-detector prototype fabricated in 200 nm Silicon-On-Insulator (SOI) CMOS technology. The SOI detector was tested at the CERN SPS H6 beam line. The detector is fabricated on a 500 μm thick high-resistivity float- zone n-type (FZ-n) wafer. The pixel size is 30 μm × 30 μm and its readout uses a source- follower configuration. The test-beam data are analysed in order to compute the spatial resolution and detector efficiency. The analysis chain includes pedestal and noise calculation, cluster reconstruction, as well as alignment and η-correction for non-linear charge sharing. The results show a spatial resolution of about 4.3 μm.

  20. Column-Parallel Single Slope ADC with Digital Correlated Multiple Sampling for Low Noise CMOS Image Sensors

    NARCIS (Netherlands)

    Chen, Y.; Theuwissen, A.J.P.; Chae, Y.

    2011-01-01

    This paper presents a low noise CMOS image sensor (CIS) using 10/12 bit configurable column-parallel single slope ADCs (SS-ADCs) and digital correlated multiple sampling (CMS). The sensor used is a conventional 4T active pixel with a pinned-photodiode as photon detector. The test sensor was

  1. Subpixel mapping and test beam studies with a HV2FEI4v2 CMOS-Sensor-Hybrid Module for the ATLAS inner detector upgrade

    Science.gov (United States)

    Bisanz, T.; Große-Knetter, J.; Quadt, A.; Rieger, J.; Weingarten, J.

    2017-08-01

    The upgrade to the High Luminosity Large Hadron Collider will increase the instantaneous luminosity by more than a factor of 5, thus creating significant challenges to the tracking systems of all experiments. Recent advancement of active pixel detectors designed in CMOS processes provide attractive alternatives to the well-established hybrid design using passive sensors since they allow for smaller pixel sizes and cost effective production. This article presents studies of a high-voltage CMOS active pixel sensor designed for the ATLAS tracker upgrade. The sensor is glued to the read-out chip of the Insertable B-Layer, forming a capacitively coupled pixel detector. The pixel pitch of the device under test is 33× 125 μm2, while the pixels of the read-out chip have a pitch of 50× 250 μm2. Three pixels of the CMOS device are connected to one read-out pixel, the information of which of these subpixels is hit is encoded in the amplitude of the output signal (subpixel encoding). Test beam measurements are presented that demonstrate the usability of this subpixel encoding scheme.

  2. Limits in point to point resolution of MOS based pixels detector arrays

    Science.gov (United States)

    Fourches, N.; Desforge, D.; Kebbiri, M.; Kumar, V.; Serruys, Y.; Gutierrez, G.; Leprêtre, F.; Jomard, F.

    2018-01-01

    In high energy physics point-to-point resolution is a key prerequisite for particle detector pixel arrays. Current and future experiments require the development of inner-detectors able to resolve the tracks of particles down to the micron range. Present-day technologies, although not fully implemented in actual detectors, can reach a 5-μm limit, this limit being based on statistical measurements, with a pixel-pitch in the 10 μm range. This paper is devoted to the evaluation of the building blocks for use in pixel arrays enabling accurate tracking of charged particles. Basing us on simulations we will make here a quantitative evaluation of the physical and technological limits in pixel size. Attempts to design small pixels based on SOI technology will be briefly recalled here. A design based on CMOS compatible technologies that allow a reduction of the pixel size below the micrometer is introduced here. Its physical principle relies on a buried carrier-localizing collecting gate. The fabrication process needed by this pixel design can be based on existing process steps used in silicon microelectronics. The pixel characteristics will be discussed as well as the design of pixel arrays. The existing bottlenecks and how to overcome them will be discussed in the light of recent ion implantation and material characterization experiments.

  3. Nanosecond-laser induced crosstalk of CMOS image sensor

    Science.gov (United States)

    Zhu, Rongzhen; Wang, Yanbin; Chen, Qianrong; Zhou, Xuanfeng; Ren, Guangsen; Cui, Longfei; Li, Hua; Hao, Daoliang

    2018-02-01

    The CMOS Image Sensor (CIS) is photoelectricity image device which focused the photosensitive array, amplifier, A/D transfer, storage, DSP, computer interface circuit on the same silicon substrate[1]. It has low power consumption, high integration,low cost etc. With large scale integrated circuit technology progress, the noise suppression level of CIS is enhanced unceasingly, and its image quality is getting better and better. It has been in the security monitoring, biometrice, detection and imaging and even military reconnaissance and other field is widely used. CIS is easily disturbed and damaged while it is irradiated by laser. It is of great significance to study the effect of laser irradiation on optoelectronic countermeasure and device for the laser strengthening resistance is of great significance. There are some researchers have studied the laser induced disturbed and damaged of CIS. They focused on the saturation, supersaturated effects, and they observed different effects as for unsaturation, saturation, supersaturated, allsaturated and pixel flip etc. This paper research 1064nm laser interference effect in a typical before type CMOS, and observring the saturated crosstalk and half the crosstalk line. This paper extracted from cmos devices working principle and signal detection methods such as the Angle of the formation mechanism of the crosstalk line phenomenon are analyzed.

  4. Development of a pixel sensor with fine space-time resolution based on SOI technology for the ILC vertex detector

    Energy Technology Data Exchange (ETDEWEB)

    Ono, Shun, E-mail: s-ono@champ.hep.sci.osaka-u.ac.jp [Osaka University, 1-1 Machikaneyama, Toyonaka (Japan); Togawa, Manabu; Tsuji, Ryoji; Mori, Teppei [Osaka University, 1-1 Machikaneyama, Toyonaka (Japan); Yamada, Miho; Arai, Yasuo; Tsuboyama, Toru; Hanagaki, Kazunori [Institute of Particle and Nuclear Studies, High Energy Accelerator Research Org. (KEK), 1-1 Oho, Tsukuba (Japan)

    2017-02-11

    We have been developing a new monolithic pixel sensor with silicon-on-insulator (SOI) technology for the International Linear Collider (ILC) vertex detector system. The SOI monolithic pixel detector is realized using standard CMOS circuits fabricated on a fully depleted sensor layer. The new SOI sensor SOFIST can store both the position and timing information of charged particles in each 20×20 μm{sup 2} pixel. The position resolution is further improved by the position weighted with the charges spread to multiple pixels. The pixel also records the hit timing with an embedded time-stamp circuit. The sensor chip has column-parallel analog-to-digital conversion (ADC) circuits and zero-suppression logic for high-speed data readout. We are designing and evaluating some prototype sensor chips for optimizing and minimizing the pixel circuit.

  5. Power pulsing of the CMOS sensor Mimosa 26

    International Nuclear Information System (INIS)

    Kuprash, Oleg

    2013-01-01

    Mimosa 26 is a monolithic active pixel sensor developed by IPHC (Strasbourg) and IRFU (Saclay) as a prototype for the ILC vertex detector studies. The resolution requirements for the ILC tracking detector are very extreme, demanding very low material in the detector, thus only air cooling can be considered. Power consumption has to be reduced as far as possible. The beam structure of the ILC allows the possibility of power pulsing: only for about the 1 ms long bunch train full power is required, and during the 199 ms long pauses between the bunch trains the power can be reduced to a minimum. Not being adapted for the power pulsing, the sensor shows in laboratory tests a good performance under power pulsing. The power pulsing allows to significantly reduce the heating of the chip and divides power consumption approximately by a factor of 6. In this report a summary of power pulsing studies using the digital readout of Mimosa 26 is given. -- Highlights: • First power pulsing studies using digital readout of Mimosa 26 CMOS sensor were done. • Fake hit rates under power pulsing conditions and under normal conditions were compared. • The measurements demonstrate that there is so far no showstopper to operate CMOS pixel sensors in power pulsing mode

  6. Investigation of Toshiba 130nm CMOS process as a possible candidate for active silicon sensors in HEP and X-ray experiments

    Energy Technology Data Exchange (ETDEWEB)

    Fu, Yunan; Hemperek, Tomasz; Kishishita, Testsuichi; Krueger, Hans; Rymaszewski, Piotr; Wermes, Norbert [University of Bonn, Bonn (Germany); Peric, Ivan [Karlsruhe Institute of Technology, Karlsruhe (Germany)

    2015-07-01

    Following the advances of commercial semiconductor manufacturing technologies there has recently been an increased interest within experimental physics community in applying CMOS manufacturing processes to developing active silicon sensors. Possibility of applying high voltage bias combined with high resistivity substrate allows for better depletion of sensor and therefore quicker and more efficient charge collection. One of processes that accommodates those features is Toshiba 130 nm CMOS technology (CMOS3E). Within our group a test chip was designed to examine the suitability of this technology for physics experiment (both for HEP and X-ray imaging). Design consisted of 4 pixel matrices with total of 12 different pixel flavors allowing for evaluation of various pixel geometries and architectures in terms of depletion depth, noise performance, charge collection efficiency, etc. During this talk initial outcome of this evaluation is presented, starting with brief introduction to technology itself, followed by results of TCAD simulations, description of final design and first measurements results.

  7. Absorbed dose by a CMOS in radiotherapy

    International Nuclear Information System (INIS)

    Borja H, C. G.; Valero L, C. Y.; Guzman G, K. A.; Banuelos F, A.; Hernandez D, V. M.; Vega C, H. R.; Paredes G, L. C.

    2011-10-01

    Absorbed dose by a complementary metal oxide semiconductor (CMOS) circuit as part of a pacemaker, has been estimated using Monte Carlo calculations. For a cancer patient who is a pacemaker carrier, scattered radiation could damage pacemaker CMOS circuits affecting patient's health. Absorbed dose in CMOS circuit due to scattered photons is too small and therefore is not the cause of failures in pacemakers, but neutron calculations shown an absorbed dose that could cause damage in CMOS due to neutron-hydrogen interactions. (Author)

  8. The ALICE Pixel Detector

    International Nuclear Information System (INIS)

    Mercado-Perez, Jorge

    2002-01-01

    The present document is a brief summary of the performed activities during the 2001 Summer Student Programme at CERN under the Scientific Summer at Foreign Laboratories Program organized by the Particles and Fields Division of the Mexican Physical Society (Sociedad Mexicana de Fisica). In this case, the activities were related with the ALICE Pixel Group of the EP-AIT Division, under the supervision of Jeroen van Hunen, research fellow in this group. First, I give an introduction and overview to the ALICE experiment; followed by a description of wafer probing. A brief summary of the test beam that we had from July 13th to July 25th is given as well

  9. Characterization of total ionizing dose damage in COTS pinned photodiode CMOS image sensors

    Energy Technology Data Exchange (ETDEWEB)

    Wang, Zujun, E-mail: wangzujun@nint.ac.cn; Ma, Wuying; Huang, Shaoyan; Yao, Zhibin; Liu, Minbo; He, Baoping; Sheng, Jiangkun; Xue, Yuan [State Key Laboratory of Intense Pulsed Radiation Simulation and Effect, Northwest Institute of Nuclear Technology, P.O.Box 69-10, Xi’an, Shaanxi 710024 (China); Liu, Jing [School of Materials Science and Engineering, Xiangtan University, Hunan (China)

    2016-03-15

    The characterization of total ionizing dose (TID) damage in COTS pinned photodiode (PPD) CMOS image sensors (CISs) is investigated. The radiation experiments are carried out at a {sup 60}Co γ-ray source. The CISs are produced by 0.18-μm CMOS technology and the pixel architecture is 8T global shutter pixel with correlated double sampling (CDS) based on a 4T PPD front end. The parameters of CISs such as temporal domain, spatial domain, and spectral domain are measured at the CIS test system as the EMVA 1288 standard before and after irradiation. The dark current, random noise, dark signal non-uniformity (DSNU), photo response non-uniformity (PRNU), overall system gain, saturation output, dynamic range (DR), signal to noise ratio (SNR), quantum efficiency (QE), and responsivity versus the TID are reported. The behaviors of the tested CISs show remarkable degradations after radiation. The degradation mechanisms of CISs induced by TID damage are also analyzed.

  10. An acquisition system for CMOS imagers with a genuine 10 Gbit/s bandwidth

    International Nuclear Information System (INIS)

    Guérin, C.; Mahroug, J.; Tromeur, W.; Houles, J.; Calabria, P.; Barbier, R.

    2012-01-01

    This paper presents a high data throughput acquisition system for pixel detector readout such as CMOS imagers. This CMOS acquisition board offers a genuine 10 Gbit/s bandwidth to the workstation and can provide an on-line and continuous high frame rate imaging capability. On-line processing can be implemented either on the Data Acquisition Board or on the multi-cores workstation depending on the complexity of the algorithms. The different parts composing the acquisition board have been designed to be used first with a single-photon detector called LUSIPHER (800×800 pixels), developed in our laboratory for scientific applications ranging from nano-photonics to adaptive optics. The architecture of the acquisition board is presented and the performances achieved by the produced boards are described. The future developments (hardware and software) concerning the on-line implementation of algorithms dedicated to single-photon imaging are tackled.

  11. Optical readout of a triple-GEM detector by means of a CMOS sensor

    Energy Technology Data Exchange (ETDEWEB)

    Marafini, M. [INFN Sezione di Roma (Italy); Museo Storico della Fisica e Centro Studi e Ricerche “E. Fermi”, Roma (Italy); Patera, V. [INFN Sezione di Roma (Italy); Museo Storico della Fisica e Centro Studi e Ricerche “E. Fermi”, Roma (Italy); Laboratori Nazionali di Frascati dell' INFN, Frascati (Italy); Pinci, D., E-mail: davide.pinci@roma1.infn.it [INFN Sezione di Roma (Italy); Sarti, A. [Laboratori Nazionali di Frascati dell' INFN, Frascati (Italy); Dipartimento di Scienze di Base e Applicate per Ingegneria, Sapienza Università di Roma (Italy); Sciubba, A. [INFN Sezione di Roma (Italy); Museo Storico della Fisica e Centro Studi e Ricerche “E. Fermi”, Roma (Italy); Dipartimento di Scienze di Base e Applicate per Ingegneria, Sapienza Università di Roma (Italy); Spiriti, E. [Laboratori Nazionali di Frascati dell' INFN, Frascati (Italy)

    2016-07-11

    In last years, the development of optical sensors has produced objects able to provide very interesting performance. Large granularity is offered along with a very high sensitivity. CMOS sensors with millions of pixels able to detect as few as two or three photons per pixel are commercially available and can be used to read-out the optical signals provided by tracking particle detectors. In this work the results obtained by optically reading-out a triple-GEM detector by a commercial CMOS sensor will be presented. A standard detector was assembled with a transparent window below the third GEM allowing the light to get out. The detector is supplied with an Ar/CF{sub 4} based gas mixture producing 650 nm wavelength photons matching the maximum quantum efficiency of the sensor.

  12. Module and Electronics Developments for the ATLAS ITK Pixel System

    CERN Document Server

    Rummler, Andr{e}; The ATLAS collaboration

    2016-01-01

    The entire tracking system of the ATLAS experiment will be replaced during the LHC Phase II shutdown around 2025 by an all-silicon detector (Inner Tracker, ITk). The pixel detector will be composed by the five innermost layers, instrumented with new sensor and readout electronics technologies to improve the tracking performance and cope with the severe HL-LHC environment in terms of occupancy and radiation. The total area of the new pixel system could measure up to 14 m^2, depending on the final layout choice that is expected to take place in early 2017. Different designs of planar, 3D, CMOS sensors are being investigated to identify the optimal technology for the different pixel layers. In parallel sensor-chip interconnection options are evaluated in collaboration with industrial partners to identify reliable technologies when employing 100-150 μm thin chips. While the new read-out chip is being developed by the RD53 Collaboration, the pixel off detector read-out electronics will be implemented in the frame...

  13. Module and Electronics Developments for the ATLAS ITK Pixel System

    CERN Document Server

    Nellist, Clara; The ATLAS collaboration

    2016-01-01

    ATLAS is preparing for an extensive modification of its detector in the course of the planned HL-LHC accelerator upgrade around 2025 which includes a replacement of the entire tracking system by an all-silicon detector (Inner Tracker, ITk). The five innermost layers of ITk will comprise of a pixel detector built of new sensor and readout electronics technologies to improve the tracking performance and cope with the severe HL-LHC environment in terms of occupancy and radiation. The total area of the new pixel system could measure up to 14 m$^{2}$, depending on the final layout choice that is expected to take place in early 2017. An intense R\\&D activity is taking place in the field of planar, 3D, CMOS sensors to identify the optimal technology for the different pixel layers. In parallel various sensor-chip interconnection options are explored to identify reliable technologies when employing 100-150~$\\mu$m thin chips. While the new read-out chip is being developed by the RD53 Collaboration, the pixel off de...

  14. The NUC and blind pixel eliminating in the DTDI application

    Science.gov (United States)

    Su, Xiao Feng; Chen, Fan Sheng; Pan, Sheng Da; Gong, Xue Yi; Dong, Yu Cui

    2013-12-01

    AS infrared CMOS Digital TDI (Time Delay and integrate) has a simple structure, excellent performance and flexible operation, it has been used in more and more applications. Because of the limitation of the Production process level, the plane array of the infrared detector has a large NU (non-uniformity) and a certain blind pixel rate. Both of the two will raise the noise and lead to the TDI works not very well. In this paper, for the impact of the system performance, the most important elements are analyzed, which are the NU of the optical system, the NU of the Plane array and the blind pixel in the Plane array. Here a reasonable algorithm which considers the background removal and the linear response model of the infrared detector is used to do the NUC (Non-uniformity correction) process, when the infrared detector array is used as a Digital TDI. In order to eliminate the impact of the blind pixel, the concept of surplus pixel method is introduced in, through the method, the SNR (signal to noise ratio) can be improved and the spatial and temporal resolution will not be changed. Finally we use a MWIR (Medium Ware Infrared) detector to do the experiment and the result proves the effectiveness of the method.

  15. Semiconductor micropattern pixel detectors: a review of the beginnings

    International Nuclear Information System (INIS)

    Heijne, E.H.M.

    2001-01-01

    The innovation in monolithic and hybrid semiconductor 'micropattern' or 'reactive' pixel detectors for tracking in particle physics was actually to fit logic and pulse processing electronics with μW power on a pixel area of less than 0.04 mm 2 , retaining the characteristics of a traditional nuclear amplifier chain. The ns timing precision in conjunction with local memory and logic operations allowed event selection at >10 MHz rates with unambiguous track reconstruction even at particle multiplicities >10 cm -2 . The noise in a channel was ∼100e - rms and enabled binary operation with random noise 'hits' at a level -8 . Rectangular pixels from 75 μmx500 μm down to 34 μmx125 μm have been used by different teams. In binary mode a tracking precision from 6 to 14 μm was obtained, and using analog interpolation one came close to 1 μm. Earlier work, still based on charge integrating imaging circuits, provided a starting point. Two systems each with more than 1 million sensor + readout channels have been built, for WA97-NA57 and for the Delphi very forward tracker. The use of 0.5 μm and 0.25 μm CMOS and enclosed geometry for the transistors in the pixel readout chips resulted in radiation hardness of ∼2 Mrad, respectively, >30 Mrad

  16. Design considerations for a new, high resolution Micro-Angiographic Fluoroscope based on a CMOS sensor (MAF-CMOS).

    Science.gov (United States)

    Loughran, Brendan; Swetadri Vasan, S N; Singh, Vivek; Ionita, Ciprian N; Jain, Amit; Bednarek, Daniel R; Titus, Albert; Rudin, Stephen

    2013-03-06

    The detectors that are used for endovascular image-guided interventions (EIGI), particularly for neurovascular interventions, do not provide clinicians with adequate visualization to ensure the best possible treatment outcomes. Developing an improved x-ray imaging detector requires the determination of estimated clinical x-ray entrance exposures to the detector. The range of exposures to the detector in clinical studies was found for the three modes of operation: fluoroscopic mode, high frame-rate digital angiographic mode (HD fluoroscopic mode), and DSA mode. Using these estimated detector exposure ranges and available CMOS detector technical specifications, design requirements were developed to pursue a quantum limited, high resolution, dynamic x-ray detector based on a CMOS sensor with 50 μm pixel size. For the proposed MAF-CMOS, the estimated charge collected within the full exposure range was found to be within the estimated full well capacity of the pixels. Expected instrumentation noise for the proposed detector was estimated to be 50-1,300 electrons. Adding a gain stage such as a light image intensifier would minimize the effect of the estimated instrumentation noise on total image noise but may not be necessary to ensure quantum limited detector operation at low exposure levels. A recursive temporal filter may decrease the effective total noise by 2 to 3 times, allowing for the improved signal to noise ratios at the lowest estimated exposures despite consequent loss in temporal resolution. This work can serve as a guide for further development of dynamic x-ray imaging prototypes or improvements for existing dynamic x-ray imaging systems.

  17. A low-power CMOS readout IC design for bolometer applications

    Science.gov (United States)

    Galioglu, Arman; Abbasi, Shahbaz; Shafique, Atia; Ceylan, Ömer; Yazici, Melik; Kaynak, Mehmet; Durmaz, Emre C.; Arsoy, Elif Gul; Gurbuz, Yasar

    2017-02-01

    A prototype of a readout IC (ROIC) designed for use in high temperature coefficient of resistance (TCR) SiGe microbolometers is presented. The prototype ROIC architecture implemented is based on a bridge with active and blind bolometer pixels with a capacitive transimpedance amplifier (CTIA) input stage and column parallel integration with serial readout. The ROIC is designed for use in high (>= 4 %/K) TCR and high detector resistance Si/SiGe microbolometers with 17x17 μm2 pixel sizes in development. The prototype has been designed and fabricated in 0.25- μm SiGe:C BiCMOS process.

  18. Simplified wide dynamic range CMOS image sensor with 3t APS reset-drain actuation

    OpenAIRE

    Carlos Augusto de Moraes Cruz

    2014-01-01

    Um sensor de imagem é uma matriz de pequenas células fotossensíveis chamadas sensores de pixeis. Um pixel, elemento el fotográfico (picture) pix, é a menor porção de uma imagem. Assim o sensor de pixel é a menor célula de um sensor de imagem, capaz de detectar um ponto singular da imagem. Este ponto é então usado para reconstruir um quadro completo de imagem. Sensores de imagem CMOS são atualmente largamente utilizados tanto em câmeras profissionais como em aparelhos moveis em geral como celu...

  19. Self-amplified CMOS image sensor using a current-mode readout circuit

    Science.gov (United States)

    Santos, Patrick M.; de Lima Monteiro, Davies W.; Pittet, Patrick

    2014-05-01

    The feature size of the CMOS processes decreased during the past few years and problems such as reduced dynamic range have become more significant in voltage-mode pixels, even though the integration of more functionality inside the pixel has become easier. This work makes a contribution on both sides: the possibility of a high signal excursion range using current-mode circuits together with functionality addition by making signal amplification inside the pixel. The classic 3T pixel architecture was rebuild with small modifications to integrate a transconductance amplifier providing a current as an output. The matrix with these new pixels will operate as a whole large transistor outsourcing an amplified current that will be used for signal processing. This current is controlled by the intensity of the light received by the matrix, modulated pixel by pixel. The output current can be controlled by the biasing circuits to achieve a very large range of output signal levels. It can also be controlled with the matrix size and this permits a very high degree of freedom on the signal level, observing the current densities inside the integrated circuit. In addition, the matrix can operate at very small integration times. Its applications would be those in which fast imaging processing, high signal amplification are required and low resolution is not a major problem, such as UV image sensors. Simulation results will be presented to support: operation, control, design, signal excursion levels and linearity for a matrix of pixels that was conceived using this new concept of sensor.

  20. CMOS Integrated Carbon Nanotube Sensor

    International Nuclear Information System (INIS)

    Perez, M. S.; Lerner, B.; Boselli, A.; Lamagna, A.; Obregon, P. D. Pareja; Julian, P. M.; Mandolesi, P. S.; Buffa, F. A.

    2009-01-01

    Recently carbon nanotubes (CNTs) have been gaining their importance as sensors for gases, temperature and chemicals. Advances in fabrication processes simplify the formation of CNT sensor on silicon substrate. We have integrated single wall carbon nanotubes (SWCNTs) with complementary metal oxide semiconductor process (CMOS) to produce a chip sensor system. The sensor prototype was designed and fabricated using a 0.30 um CMOS process. The main advantage is that the device has a voltage amplifier so the electrical measure can be taken and amplified inside the sensor. When the conductance of the SWCNTs varies in response to media changes, this is observed as a variation in the output tension accordingly.

  1. An Ultra-Low Power CMOS Image Sensor with On-Chip Energy Harvesting and Power Management Capability

    Directory of Open Access Journals (Sweden)

    Ismail Cevik

    2015-03-01

    Full Text Available An ultra-low power CMOS image sensor with on-chip energy harvesting and power management capability is introduced in this paper. The photodiode pixel array can not only capture images but also harvest solar energy. As such, the CMOS image sensor chip is able to switch between imaging and harvesting modes towards self-power operation. Moreover, an on-chip maximum power point tracking (MPPT-based power management system (PMS is designed for the dual-mode image sensor to further improve the energy efficiency. A new isolated P-well energy harvesting and imaging (EHI pixel with very high fill factor is introduced. Several ultra-low power design techniques such as reset and select boosting techniques have been utilized to maintain a wide pixel dynamic range. The chip was designed and fabricated in a 1.8 V, 1P6M 0.18 µm CMOS process. Total power consumption of the imager is 6.53 µW for a 96 × 96 pixel array with 1 V supply and 5 fps frame rate. Up to 30 μW of power could be generated by the new EHI pixels. The PMS is capable of providing 3× the power required during imaging mode with 50% efficiency allowing energy autonomous operation with a 72.5% duty cycle.

  2. An ultra-low power CMOS image sensor with on-chip energy harvesting and power management capability.

    Science.gov (United States)

    Cevik, Ismail; Huang, Xiwei; Yu, Hao; Yan, Mei; Ay, Suat U

    2015-03-06

    An ultra-low power CMOS image sensor with on-chip energy harvesting and power management capability is introduced in this paper. The photodiode pixel array can not only capture images but also harvest solar energy. As such, the CMOS image sensor chip is able to switch between imaging and harvesting modes towards self-power operation. Moreover, an on-chip maximum power point tracking (MPPT)-based power management system (PMS) is designed for the dual-mode image sensor to further improve the energy efficiency. A new isolated P-well energy harvesting and imaging (EHI) pixel with very high fill factor is introduced. Several ultra-low power design techniques such as reset and select boosting techniques have been utilized to maintain a wide pixel dynamic range. The chip was designed and fabricated in a 1.8 V, 1P6M 0.18 µm CMOS process. Total power consumption of the imager is 6.53 µW for a 96 × 96 pixel array with 1 V supply and 5 fps frame rate. Up to 30 μW of power could be generated by the new EHI pixels. The PMS is capable of providing 3× the power required during imaging mode with 50% efficiency allowing energy autonomous operation with a 72.5% duty cycle.

  3. The FE-I4 Pixel Readout Chip and the IBL Module

    Energy Technology Data Exchange (ETDEWEB)

    Barbero, Marlon; Arutinov, David; Backhaus, Malte; Fang, Xiao-Chao; Gonella, Laura; Hemperek, Tomasz; Karagounis, Michael; Hans, Kruger; Kruth, Andre; Wermes, Norbert; /Bonn U.; Breugnon, Patrick; Fougeron, Denis; Gensolen, Fabrice; Menouni, Mohsine; Rozanov, Alexander; /Marseille, CPPM; Beccherle, Roberto; Darbo, Giovanni; /INFN, Genoa; Caminada, Lea; Dube, Sourabh; Fleury, Julien; Gnani, Dario; /LBL, Berkeley /NIKHEF, Amsterdam /Gottingen U. /SLAC

    2012-05-01

    FE-I4 is the new ATLAS pixel readout chip for the upgraded ATLAS pixel detector. Designed in a CMOS 130 nm feature size process, the IC is able to withstand higher radiation levels compared to the present generation of ATLAS pixel Front-End FE-I3, and can also cope with higher hit rate. It is thus suitable for intermediate radii pixel detector layers in the High Luminosity LHC environment, but also for the inserted layer at 3.3 cm known as the 'Insertable B-Layer' project (IBL), at a shorter timescale. In this paper, an introduction to the FE-I4 will be given, focusing on test results from the first full size FE-I4A prototype which has been available since fall 2010. The IBL project will be introduced, with particular emphasis on the FE-I4-based module concept.

  4. Status and perspectives of pixel sensors based on 3D vertical integration

    CERN Document Server

    Re, V

    2014-01-01

    This paper reviews the most recent developments of 3D integration in the field of silicon pixel sensors and readout integrated circuits. This technology may address the needs of future high energy physics and photon science experiments by increasing the electronic functional density in small pixel readout cells and by stacking various device layers based on different technologies, each optimized for a different function. Current efforts are aimed at improving the performance of both hybrid pixel detectors and of CMOS sensors. The status of these activities is discussed here, taking into account experimental results on 3D devices developed in the frame of the 3D-IC consortium. The paper also provides an overview of the ideas that are being currently devised for novel 3D vertically integrated pixel sensors.

  5. Design and standalone characterisation of a capacitively coupled HV-CMOS sensor chip for the CLIC vertex detector

    Science.gov (United States)

    Kremastiotis, I.; Ballabriga, R.; Campbell, M.; Dannheim, D.; Fiergolski, A.; Hynds, D.; Kulis, S.; Peric, I.

    2017-09-01

    The concept of capacitive coupling between sensors and readout chips is under study for the vertex detector at the proposed high-energy CLIC electron positron collider. The CLICpix Capacitively Coupled Pixel Detector (C3PD) is an active High-Voltage CMOS sensor, designed to be capacitively coupled to the CLICpix2 readout chip. The chip is implemented in a commercial 180 nm HV-CMOS process and contains a matrix of 128×128 square pixels with 25μm pitch. First prototypes have been produced with a standard resistivity of ~20 Ωcm for the substrate and tested in standalone mode. The results show a rise time of ~20 ns, charge gain of 190 mV/ke- and ~40 e- RMS noise for a power consumption of 4.8μW/pixel. The main design aspects, as well as standalone measurement results, are presented.

  6. First Results from Cherwell, a Monolithic Active Pixel Sensor for Particle Physics

    CERN Document Server

    Nooney, Tamsin; Borri, Marcello; Crooks, Jamie; Headspith, Jon; Inguglia, Gianluca; Kolya, Scott; Lazarus, Ian; Lemmon, Roy; Mylroie-Smith, James; Turchetta, Renato; Velthuis, Jaap; Wilson, Fergus

    2014-01-01

    Cherwell is a CMOS Monolithic Active Pixel Sensor (MAPS) developed for digital calorimetry and charged particle tracking applications. Here, we outline the initial tests carried out to charac- terise the performance of Cherwell, give details of the test beam carried out at CERN and include the first results from this analysis. Three variations of the chip were tested; Type A, a high re- sistivity, low noise sensor, Type B, a standard resisivity, low noise sensor and Type C, a standard resistivity, standard noise sensor. The sensors yield an average RMS noise value per pixel of 9.6 e

  7. Random On-Board Pixel Sampling (ROPS) X-Ray Camera

    Energy Technology Data Exchange (ETDEWEB)

    Wang, Zhehui [Los Alamos; Iaroshenko, O. [Los Alamos; Li, S. [Los Alamos; Liu, T. [Fermilab; Parab, N. [Argonne (main); Chen, W. W. [Purdue U.; Chu, P. [Los Alamos; Kenyon, G. [Los Alamos; Lipton, R. [Fermilab; Sun, K.-X. [Nevada U., Las Vegas

    2017-09-25

    Recent advances in compressed sensing theory and algorithms offer new possibilities for high-speed X-ray camera design. In many CMOS cameras, each pixel has an independent on-board circuit that includes an amplifier, noise rejection, signal shaper, an analog-to-digital converter (ADC), and optional in-pixel storage. When X-ray images are sparse, i.e., when one of the following cases is true: (a.) The number of pixels with true X-ray hits is much smaller than the total number of pixels; (b.) The X-ray information is redundant; or (c.) Some prior knowledge about the X-ray images exists, sparse sampling may be allowed. Here we first illustrate the feasibility of random on-board pixel sampling (ROPS) using an existing set of X-ray images, followed by a discussion about signal to noise as a function of pixel size. Next, we describe a possible circuit architecture to achieve random pixel access and in-pixel storage. The combination of a multilayer architecture, sparse on-chip sampling, and computational image techniques, is expected to facilitate the development and applications of high-speed X-ray camera technology.

  8. Finite-element simulations of coupling capacitances in capacitively coupled pixel detectors

    CERN Document Server

    AUTHOR|(SzGeCERN)755510

    2017-01-01

    Capacitively coupled hybrid silicon pixel-detector assemblies are under study for the vertex detector at the proposed future CLIC linear electron-positron collider. The assemblies consist of active CCPDv3 sensors, with 25 μm pixel pitch implemented in a 180 nm High- Voltage CMOS process, which are glued to the CLICpix readout ASIC, with the same pixel pitch and processed in a commercial 65 nm CMOS technology. The signal created in the silicon bulk of the active sensors passes a two-stage amplifier, in each pixel, and gets transferred as a voltage pulse to metal pads facing the readout chip (ROC). The coupling of the signal to the metal pads on the ROC side proceeds through the capacitors formed between the two chips by a thin layer of epoxy glue. The coupling strength and the amount of unwanted cross coupling to neighbouring pixels depends critically on the uniformity of the glue layer, its thickness and on the alignment precision during the flip-chip assembly process. Finite-element calculations of the coup...

  9. Characterisation of capacitively coupled HV/HR-CMOS sensor chips for the CLIC vertex detector

    Science.gov (United States)

    Kremastiotis, I.

    2017-12-01

    The capacitive coupling between an active sensor and a readout ASIC has been considered in the framework of the CLIC vertex detector study. The CLICpix Capacitively Coupled Pixel Detector (C3PD) is a High-Voltage CMOS sensor chip produced in a commercial 180 nm HV-CMOS process for this purpose. The sensor was designed to be connected to the CLICpix2 readout chip. It therefore matches the dimensions of the readout chip, featuring a matrix of 128×128 square pixels with 25μm pitch. The sensor chip has been produced with the standard value for the substrate resistivity (~20 Ωcm) and it has been characterised in standalone testing mode, before receiving and testing capacitively coupled assemblies. The standalone measurement results show a rise time of ~20 ns for a power consumption of 5μW/pixel. Production of the C3PD HV-CMOS sensor chip with higher substrate resistivity wafers (~20, 80, 200 and 1000 Ωcm) is foreseen. The expected benefits of the higher substrate resistivity will be studied using future assemblies with the readout chip.

  10. Characterisation of capacitively coupled HV/HR-CMOS sensor chips for the CLIC vertex detector

    CERN Document Server

    AUTHOR|(SzGeCERN)756402

    2017-01-01

    The capacitive coupling between an active sensor and a readout ASIC has been considered in the framework of the CLIC vertex detector study. The CLICpix Capacitively Coupled Pixel Detector (C3PD) is a High-Voltage CMOS sensor chip produced in a commercial 180 nm HV-CMOS process for this purpose. The sensor was designed to be connected to the CLICpix2 readout chip. It therefore matches the dimensions of the readout chip, featuring a matrix of 128 × 128 square pixels with 25 μm pitch. The sensor chip has been produced with the standard value for the substrate resistivity (∼ 20 Ωcm) and it has been characterised in standalone testing mode, before receiving and testing capacitively coupled assemblies. The standalone measurement results show a rise time of ∼ 20 ns for a power consumption of 5 μW/pixel. Production of the C3PD HV-CMOS sensor chip with higher substrate resistivity wafers (∼ 20, 80, 200 and 1000 Ωcm) is foreseen. The expected benefits of the higher substrate resistivity will be studied using...

  11. Imaging system design and image interpolation based on CMOS image sensor

    Science.gov (United States)

    Li, Yu-feng; Liang, Fei; Guo, Rui

    2009-11-01

    An image acquisition system is introduced, which consists of a color CMOS image sensor (OV9620), SRAM (CY62148), CPLD (EPM7128AE) and DSP (TMS320VC5509A). The CPLD implements the logic and timing control to the system. SRAM stores the image data, and DSP controls the image acquisition system through the SCCB (Omni Vision Serial Camera Control Bus). The timing sequence of the CMOS image sensor OV9620 is analyzed. The imaging part and the high speed image data memory unit are designed. The hardware and software design of the image acquisition and processing system is given. CMOS digital cameras use color filter arrays to sample different spectral components, such as red, green, and blue. At the location of each pixel only one color sample is taken, and the other colors must be interpolated from neighboring samples. We use the edge-oriented adaptive interpolation algorithm for the edge pixels and bilinear interpolation algorithm for the non-edge pixels to improve the visual quality of the interpolated images. This method can get high processing speed, decrease the computational complexity, and effectively preserve the image edges.

  12. Pixel Interpolation Methods

    OpenAIRE

    Mintěl, Tomáš

    2009-01-01

    Tato diplomová práce se zabývá akcelerací interpolačních metod s využitím GPU a architektury NVIDIA (R) CUDA TM. Grafický výstup je reprezentován demonstrační aplikací pro transformaci obrazu nebo videa s použitím vybrané interpolace. Časově kritické části kódu jsou přesunuty na GPU a vykonány paralelně. Pro práci s obrazem a videem jsou použity vysoce optimalizované algoritmy z knihovny OpenCV, od firmy Intel. This master's thesis deals with acceleration of pixel interpolation methods usi...

  13. The ALICE pixel detector

    CERN Document Server

    Mercado Perez, J

    2002-01-01

    The present document is a brief summary of the performed activities during the 2001 Summer Student Programme at CERN under the Scientific Summer at Foreign Laboratories Program organized by the Particles and Fields Division of the Mexican Physical Society (Sociedad Mexicana de Fisica). In this case, the activities were related with the ALICE Pixel Group of the EP-AIT Division, under the supervision of Jeroen van Hunen, research fellow in this group. First, I give an introduction and overview to the ALICE experiment; followed by a description of wafer probing. A brief summary of the test beam that we had from July 13th to July 25th is given as well. (3 refs).

  14. CMOS MEMS Fabrication Technologies and Devices

    Directory of Open Access Journals (Sweden)

    Hongwei Qu

    2016-01-01

    Full Text Available This paper reviews CMOS (complementary metal-oxide-semiconductor MEMS (micro-electro-mechanical systems fabrication technologies and enabled micro devices of various sensors and actuators. The technologies are classified based on the sequence of the fabrication of CMOS circuitry and MEMS elements, while SOI (silicon-on-insulator CMOS MEMS are introduced separately. Introduction of associated devices follows the description of the respective CMOS MEMS technologies. Due to the vast array of CMOS MEMS devices, this review focuses only on the most typical MEMS sensors and actuators including pressure sensors, inertial sensors, frequency reference devices and actuators utilizing different physics effects and the fabrication processes introduced. Moreover, the incorporation of MEMS and CMOS is limited to monolithic integration, meaning wafer-bonding-based stacking and other integration approaches, despite their advantages, are excluded from the discussion. Both competitive industrial products and state-of-the-art research results on CMOS MEMS are covered.

  15. Advances in the development of pixel detector for the SuperB Silicon Vertex Tracker

    Energy Technology Data Exchange (ETDEWEB)

    Paoloni, E., E-mail: eugenio.paoloni@pi.infn.it [Università degli Studi di Pisa (Italy); Istituto Nazionale di Fisica Nucleare, Sezione di Pisa (Italy); Comotti, D. [Università degli Studi di Bergamo (Italy); Manghisoni, M.; Re, V.; Traversi, G. [Università degli Studi di Bergamo (Italy); Istituto Nazionale di Fisica Nucleare, Sezione di Pavia (Italy); Fabbri, L.; Gabrielli, A. [Università degli Studi di Bologna (Italy); Istituto Nazionale di Fisica Nucleare, Sezione di Bologna (Italy); Giorgi, F.; Pellegrini, G.; Sbarra, C. [Istituto Nazionale di Fisica Nucleare, Sezione di Bologna (Italy); Semprini-Cesari, N.; Valentinetti, S.; Villa, M.; Zoccoli, A. [Università degli Studi di Bologna (Italy); Istituto Nazionale di Fisica Nucleare, Sezione di Bologna (Italy); Berra, A.; Lietti, D.; Prest, M. [Università dell' Insubria, Como (Italy); Istituto Nazionale di Fisica Nucleare, Sezione di Milano Bicocca (Italy); Bevan, A. [School of Physics and Astronomy, Queen Mary University of London, London E1 4NS (United Kingdom); Wilson, F. [STFC Rutherford Appleton Laboratory, Harwell, Oxford Didcot OX11 0QX (United Kingdom); Beck, G. [School of Physics and Astronomy, Queen Mary University of London, London E1 4NS (United Kingdom); and others

    2013-12-11

    The latest advances in the design and characterization of several pixel sensors developed to satisfy the very demanding requirements of the innermost layer of the SuperB Silicon Vertex Tracker will be presented in this paper. The SuperB machine is an electron positron collider operating at the ϒ(4S) peak to be built in the very near future by the Cabibbo Lab consortium. A pixel detector based on extremely thin, radiation hard devices able to cope with rate in the tens of MHz/cm{sup 2} range will be the optimal solution for the upgrade of the inner layer of the SuperB tracking system. At present several options with different levels of maturity are being investigated to understand advantages and potential issues of the different technologies: thin hybrid pixels, Deep N-Well CMOS MAPS, INMAPS CMOS MAPS featuring a quadruple well and high resistivity substrates and CMOS MAPS realized with Vertical Integration technology. The newest results from beam test, the outcomes of the radiation damage studies and the laboratory characterization of the latest prototypes will be reported.

  16. Advances in the development of pixel detector for the SuperB Silicon Vertex Tracker

    International Nuclear Information System (INIS)

    Paoloni, E.; Comotti, D.; Manghisoni, M.; Re, V.; Traversi, G.; Fabbri, L.; Gabrielli, A.; Giorgi, F.; Pellegrini, G.; Sbarra, C.; Semprini-Cesari, N.; Valentinetti, S.; Villa, M.; Zoccoli, A.; Berra, A.; Lietti, D.; Prest, M.; Bevan, A.; Wilson, F.; Beck, G.

    2013-01-01

    The latest advances in the design and characterization of several pixel sensors developed to satisfy the very demanding requirements of the innermost layer of the SuperB Silicon Vertex Tracker will be presented in this paper. The SuperB machine is an electron positron collider operating at the ϒ(4S) peak to be built in the very near future by the Cabibbo Lab consortium. A pixel detector based on extremely thin, radiation hard devices able to cope with rate in the tens of MHz/cm 2 range will be the optimal solution for the upgrade of the inner layer of the SuperB tracking system. At present several options with different levels of maturity are being investigated to understand advantages and potential issues of the different technologies: thin hybrid pixels, Deep N-Well CMOS MAPS, INMAPS CMOS MAPS featuring a quadruple well and high resistivity substrates and CMOS MAPS realized with Vertical Integration technology. The newest results from beam test, the outcomes of the radiation damage studies and the laboratory characterization of the latest prototypes will be reported

  17. A 3D Vertically Integrated Deep N-Well CMOS MAPS for the SuperB Layer0

    International Nuclear Information System (INIS)

    Traversi, G; Manghisoni, M; Re, V; Gaioni, L; Ratti, L

    2011-01-01

    Deep N-Well (DNW) Monolithic Active Pixel Sensors (MAPS) have been developed in the last few years with the aim of building monolithic sensors with similar functionalities as hybrid pixels systems. In these devices the triple well option, available in deep submicron processes, is exploited to implement analog and digital signal processing at the pixel level. Many prototypes have been fabricated in a planar (2D) 130nm CMOS technology. A new kind of DNW-MAPS, namely Apsel5 3 D, which exploits the capabilities of vertical integration (3D) processes, is presented and discussed in this paper. The impact of 3D processes on the design and performance of DNW pixel sensors could be large, with significant advantages in terms of detection efficiency, pixel cell size and immunity to cross-talk, therefore complying with the severe constraints set by future HEP experiments.

  18. A 3D Vertically Integrated Deep N-Well CMOS MAPS for the SuperB Layer0

    Energy Technology Data Exchange (ETDEWEB)

    Traversi, G; Manghisoni, M; Re, V [University of Bergamo, Via Marconi 5, 24044 Dalmine (Italy); Gaioni, L; Ratti, L, E-mail: gianluca.traversi@unibg.it [INFN Pavia, Via Bassi 6, 27100 Pavia (Italy)

    2011-01-15

    Deep N-Well (DNW) Monolithic Active Pixel Sensors (MAPS) have been developed in the last few years with the aim of building monolithic sensors with similar functionalities as hybrid pixels systems. In these devices the triple well option, available in deep submicron processes, is exploited to implement analog and digital signal processing at the pixel level. Many prototypes have been fabricated in a planar (2D) 130nm CMOS technology. A new kind of DNW-MAPS, namely Apsel5{sub 3}D, which exploits the capabilities of vertical integration (3D) processes, is presented and discussed in this paper. The impact of 3D processes on the design and performance of DNW pixel sensors could be large, with significant advantages in terms of detection efficiency, pixel cell size and immunity to cross-talk, therefore complying with the severe constraints set by future HEP experiments.

  19. Recent X-ray hybrid CMOS detector developments and measurements

    Science.gov (United States)

    Hull, Samuel V.; Falcone, Abraham D.; Burrows, David N.; Wages, Mitchell; Chattopadhyay, Tanmoy; McQuaide, Maria; Bray, Evan; Kern, Matthew

    2017-08-01

    The Penn State X-ray detector lab, in collaboration with Teledyne Imaging Sensors (TIS), have progressed their efforts to improve soft X-ray Hybrid CMOS detector (HCD) technology on multiple fronts. Having newly acquired a Teledyne cryogenic SIDECARTM ASIC for use with HxRG devices, measurements were performed with an H2RG HCD and the cooled SIDECARTM. We report new energy resolution and read noise measurements, which show a significant improvement over room temperature SIDECARTM operation. Further, in order to meet the demands of future high-throughput and high spatial resolution X-ray observatories, detectors with fast readout and small pixel sizes are being developed. We report on characteristics of new X-ray HCDs with 12.5 micron pitch that include in-pixel CDS circuitry and crosstalk-eliminating CTIA amplifiers. In addition, PSU and TIS are developing a new large-scale array Speedster-EXD device. The original 64 × 64 pixel Speedster-EXD prototype used comparators in each pixel to enable event driven readout with order of magnitude higher effective readout rates, which will now be implemented in a 550 × 550 pixel device. Finally, the detector lab is involved in a sounding rocket mission that is slated to fly in 2018 with an off-plane reflection grating array and an H2RG X-ray HCD. We report on the planned detector configuration for this mission, which will increase the NASA technology readiness level of X-ray HCDs to TRL 9.

  20. Energy-correction photon counting pixel for photon energy extraction under pulse pile-up

    Energy Technology Data Exchange (ETDEWEB)

    Lee, Daehee; Park, Kyungjin; Lim, Kyung Taek; Cho, Gyuseong, E-mail: gscho@kaist.ac.kr

    2017-06-01

    A photon counting detector (PCD) has been proposed as an alternative solution to an energy-integrating detector (EID) in medical imaging field due to its high resolution, high efficiency, and low noise. The PCD has expanded to variety of fields such as spectral CT, k-edge imaging, and material decomposition owing to its capability to count and measure the number and the energy of an incident photon, respectively. Nonetheless, pulse pile-up, which is a superimposition of pulses at the output of a charge sensitive amplifier (CSA) in each PC pixel, occurs frequently as the X-ray flux increases due to the finite pulse processing time (PPT) in CSAs. Pulse pile-up induces not only a count loss but also distortion in the measured X-ray spectrum from each PC pixel and thus it is a main constraint on the use of PCDs in high flux X-ray applications. To minimize these effects, an energy-correction PC (ECPC) pixel is proposed to resolve pulse pile-up without cutting off the PPT by adding an energy correction logic (ECL) via a cross detection method (CDM). The ECPC pixel with a size of 200×200 µm{sup 2} was fabricated by using a 6-metal 1-poly 0.18 µm CMOS process with a static power consumption of 7.2 μW/pixel. The maximum count rate of the ECPC pixel was extended by approximately three times higher than that of a conventional PC pixel with a PPT of 500 nsec. The X-ray spectrum of 90 kVp, filtered by 3 mm Al filter, was measured as the X-ray current was increased using the CdTe and the ECPC pixel. As a result, the ECPC pixel dramatically reduced the energy spectrum distortion at 2 Mphotons/pixel/s when compared to that of the ERCP pixel with the same 500 nsec PPT.

  1. THE KEPLER PIXEL RESPONSE FUNCTION

    International Nuclear Information System (INIS)

    Bryson, Stephen T.; Haas, Michael R.; Dotson, Jessie L.; Koch, David G.; Borucki, William J.; Tenenbaum, Peter; Jenkins, Jon M.; Chandrasekaran, Hema; Caldwell, Douglas A.; Klaus, Todd; Gilliland, Ronald L.

    2010-01-01

    Kepler seeks to detect sequences of transits of Earth-size exoplanets orbiting solar-like stars. Such transit signals are on the order of 100 ppm. The high photometric precision demanded by Kepler requires detailed knowledge of how the Kepler pixels respond to starlight during a nominal observation. This information is provided by the Kepler pixel response function (PRF), defined as the composite of Kepler's optical point-spread function, integrated spacecraft pointing jitter during a nominal cadence and other systematic effects. To provide sub-pixel resolution, the PRF is represented as a piecewise-continuous polynomial on a sub-pixel mesh. This continuous representation allows the prediction of a star's flux value on any pixel given the star's pixel position. The advantages and difficulties of this polynomial representation are discussed, including characterization of spatial variation in the PRF and the smoothing of discontinuities between sub-pixel polynomial patches. On-orbit super-resolution measurements of the PRF across the Kepler field of view are described. Two uses of the PRF are presented: the selection of pixels for each star that maximizes the photometric signal-to-noise ratio for that star, and PRF-fitted centroids which provide robust and accurate stellar positions on the CCD, primarily used for attitude and plate scale tracking. Good knowledge of the PRF has been a critical component for the successful collection of high-precision photometry by Kepler.

  2. The Pixelated Revolution

    Directory of Open Access Journals (Sweden)

    Marko Stamenković

    2014-05-01

    Full Text Available The text foregrounds the relationship between three main elements: gaze, image and violence. Framed by the theoretical propositions in the selected texts by Marie-José Mondzain and Jean-Luc Nancy, this relationship is considered in the context of the current socio-political realities in the Middle East (Syria but also in the broader, global sense. I take contemporary visual practice as my starting point and consider “The Pixelated Revolution” (the project by the Lebanese artist Rabih Mroué as exemplary in this context in order to engage with the following phenomenon - recording one’s own death in the revolutionary and wartime conditions, at a level that connects several key elements of the debate: the visual character of mobile (phone technology, image-producing operations, the concept of self-sacrifice, and the mobilization of communities towards radical transformations. The purpose of this text is to encourage future reflections about the role images perform nowadays (in particular those created under the conditions of lethal threat and violence and about the implications of an external observer in this process, when looking at such images in the exhibition context from a ‘lateral’ (i.e., supposedly safe and neutral perspective.

  3. Diamond pixel modules

    International Nuclear Information System (INIS)

    Asner, D.; Barbero, M.; Bellini, V.; Belyaev, V.; Brom, J-M.; Bruzzi, M.; Chren, D.; Cindro, V.; Claus, G.; Cristinziani, M.; Costa, S.; D'Alessandro, R.; Boer, W. de; Dobos, D.; Dolenc, I.; Dulinski, W.; Duris, J.; Eremin, V.; Eusebi, R.; Frais-Koelbl, H.

    2011-01-01

    With the commissioning of the LHC in 2010 and upgrades expected in 2015, ATLAS and CMS are planning to upgrade their innermost tracking layers with radiation hard technologies. Chemical Vapor Deposition diamond has been used extensively in beam conditions monitors as the innermost detectors in the highest radiation areas of BaBar, Belle, CDF and all LHC experiments. This material is now being considered as a sensor material for use very close to the interaction region where the most extreme radiation conditions exist. Recently the RD42 collaboration constructed, irradiated and tested polycrystalline and single-crystal chemical vapor deposition diamond sensors to the highest fluences expected at the super-LHC. We present beam test results of chemical vapor deposition diamond up to fluences of 1.8x10 16 protons/cm 2 illustrating that both polycrystalline and single-crystal chemical vapor deposition diamonds follow a single damage curve. We also present beam test results of irradiated complete diamond pixel modules.

  4. Diamond pixel modules

    Energy Technology Data Exchange (ETDEWEB)

    Asner, D. [Carleton University, Ottawa (Canada); Barbero, M. [Universitaet Bonn (Germany); Bellini, V. [INFN/University of Catania (Italy); Belyaev, V. [MEPHI Institute, Moscow (Russian Federation); Brom, J-M. [IPHC, Strasbourg (France); Bruzzi, M. [INFN/University of Florence (Italy); Chren, D. [Czech Technical University, Prague (Czech Republic); Cindro, V. [Jozef Stefan Institute, Ljubljana (Slovenia); Claus, G. [IPHC, Strasbourg (France); Cristinziani, M. [Universitaet Bonn (Germany); Costa, S. [INFN/University of Catania (Italy); D' Alessandro, R. [Department of Energetics/INFN Florence (Italy); Boer, W. de [Universitaet Karlsruhe, Karlsruhe (Germany); Dobos, D. [CERN, Geneva (Switzerland); Dolenc, I. [Jozef Stefan Institute, Ljubljana (Slovenia); Dulinski, W. [IPHC, Strasbourg (France); Duris, J. [UCLA, Los Angeles, CA (United States); Eremin, V. [Ioffe Institute, St. Petersburg (Russian Federation); Eusebi, R. [FNAL, Batavia (United States); Frais-Koelbl, H. [Fachhochschule fuer Wirtschaft und Technik, Wiener Neustadt (Austria)

    2011-04-21

    With the commissioning of the LHC in 2010 and upgrades expected in 2015, ATLAS and CMS are planning to upgrade their innermost tracking layers with radiation hard technologies. Chemical Vapor Deposition diamond has been used extensively in beam conditions monitors as the innermost detectors in the highest radiation areas of BaBar, Belle, CDF and all LHC experiments. This material is now being considered as a sensor material for use very close to the interaction region where the most extreme radiation conditions exist. Recently the RD42 collaboration constructed, irradiated and tested polycrystalline and single-crystal chemical vapor deposition diamond sensors to the highest fluences expected at the super-LHC. We present beam test results of chemical vapor deposition diamond up to fluences of 1.8x10{sup 16} protons/cm{sup 2} illustrating that both polycrystalline and single-crystal chemical vapor deposition diamonds follow a single damage curve. We also present beam test results of irradiated complete diamond pixel modules.

  5. ATLAS Pixel Detector Operational Experience

    CERN Document Server

    Di Girolamo, B; The ATLAS collaboration

    2011-01-01

    The ATLAS Pixel Detector is the innermost detector of the ATLAS experiment at the Large Hadron Collider at CERN, providing high-resolution measurements of charged particle tracks in the high radiation environment close to the collision region. This capability is vital for the identification and measurement of proper decay times of long-lived particles such as b-hadrons, and thus vital for the ATLAS physics program. The detector provides hermetic coverage with three cylindrical layers and three layers of forward and backward pixel detectors. It consists of approximately 80 million pixels that are individually read out via chips bump-bonded to 1744 n-in-n silicon substrates. In this talk, results from the successful operation of the Pixel Detector at the LHC will be presented, including monitoring, calibration procedures, timing optimization and detector performance. The detector performance is excellent: 96.9% of the pixels are operational, noise occupancy and hit efficiency exceed the design specification, an...

  6. ALPIDE, the Monolithic Active Pixel Sensor for the ALICE ITS upgrade

    Science.gov (United States)

    Mager, M.; ALICE Collaboration

    2016-07-01

    A new 10 m2 inner tracking system based on seven concentric layers of Monolithic Active Pixel Sensors will be installed in the ALICE experiment during the second long shutdown of LHC in 2019-2020. The monolithic pixel sensors will be fabricated in the 180 nm CMOS Imaging Sensor process of TowerJazz. The ALPIDE design takes full advantage of a particular process feature, the deep p-well, which allows for full CMOS circuitry within the pixel matrix, while at the same time retaining the full charge collection efficiency. Together with the small feature size and the availability of six metal layers, this allowed a continuously active low-power front-end to be placed into each pixel and an in-matrix sparsification circuit to be used that sends only the addresses of hit pixels to the periphery. This approach led to a power consumption of less than 40 mWcm-2, a spatial resolution of around 5 μm, a peaking time of around 2 μs, while being radiation hard to some 1013 1 MeVneq /cm2, fulfilling or exceeding the ALICE requirements. Over the last years of R & D, several prototype circuits have been used to verify radiation hardness, and to optimize pixel geometry and in-pixel front-end circuitry. The positive results led to a submission of full-scale (3 cm×1.5 cm) sensor prototypes in 2014. They are being characterized in a comprehensive campaign that also involves several irradiation and beam tests. A summary of the results obtained and prospects towards the final sensor to instrument the ALICE Inner Tracking System are given.

  7. Development of the Continuous Acquisition Pixel (CAP) sensor for high luminosity lepton colliders

    International Nuclear Information System (INIS)

    Varner, G.; Aihara, H.; Barbero, M.; Bozek, A.; Browder, T.; Hazumi, M.; Kennedy, J.; Martin, E.; Mueller, J.; Olsen, S.; Palka, H.; Rosen, M.; Ruckman, L.; Stanic, S.; Trabelsi, K.; Tsuboyama, T.; Uchida, K.; Yang, Q.; Yarema, R.

    2006-01-01

    A future higher luminosity B-factory detector and concept study detectors for the proposed International Linear Collider require precision vertex reconstruction while coping with high track densities and radiation exposures. Compared with current silicon strip and hybrid pixels, a significant reduction in the overall detector material thickness is needed to achieve the desired vertex resolution. Considerable progress in the development of thin CMOS-based Monolithic Active Pixel Sensors (MAPS) in recent years makes them a viable technology option and feasibility studies are being actively pursued. The most serious concerns are their radiation hardness and their readout speed. To address these, several prototypes denoted as the Continuous Acquisition Pixel (CAP) sensors have been developed and tested. The latest of the CAP sensor prototypes is CAP3, designed in the TSMC 0.25μm process with a 5-deep Correlated Double Sample (CDS) pair pipeline in each pixel. A setup with several CAP3 sensors is under evaluation to assess the performance of a full-scale pixel readout system running at realistic readout speed. Given the similarity in the occupancy numbers and hit throughput requirements, per unit area, between a Belle vertex detector upgradation and the requirements for a future ILC pixel detector, this effort can be considered a small-scale functioning prototype for such a future system. The results and plans for the next stages of R and D towards a full Belle Pixel Vertex Detector (PVD) are presented

  8. Using polynomials to simplify fixed pattern noise and photometric correction of logarithmic CMOS image sensors.

    Science.gov (United States)

    Li, Jing; Mahmoodi, Alireza; Joseph, Dileepan

    2015-10-16

    An important class of complementary metal-oxide-semiconductor (CMOS) image sensors are those where pixel responses are monotonic nonlinear functions of light stimuli. This class includes various logarithmic architectures, which are easily capable of wide dynamic range imaging, at video rates, but which are vulnerable to image quality issues. To minimize fixed pattern noise (FPN) and maximize photometric accuracy, pixel responses must be calibrated and corrected due to mismatch and process variation during fabrication. Unlike literature approaches, which employ circuit-based models of varying complexity, this paper introduces a novel approach based on low-degree polynomials. Although each pixel may have a highly nonlinear response, an approximately-linear FPN calibration is possible by exploiting the monotonic nature of imaging. Moreover, FPN correction requires only arithmetic, and an optimal fixed-point implementation is readily derived, subject to a user-specified number of bits per pixel. Using a monotonic spline, involving cubic polynomials, photometric calibration is also possible without a circuit-based model, and fixed-point photometric correction requires only a look-up table. The approach is experimentally validated with a logarithmic CMOS image sensor and is compared to a leading approach from the literature. The novel approach proves effective and efficient.

  9. Temporal Noise Analysis of Charge-Domain Sampling Readout Circuits for CMOS Image Sensors

    Directory of Open Access Journals (Sweden)

    Xiaoliang Ge

    2018-02-01

    Full Text Available This paper presents a temporal noise analysis of charge-domain sampling readout circuits for Complementary Metal-Oxide Semiconductor (CMOS image sensors. In order to address the trade-off between the low input-referred noise and high dynamic range, a Gm-cell-based pixel together with a charge-domain correlated-double sampling (CDS technique has been proposed to provide a way to efficiently embed a tunable conversion gain along the read-out path. Such readout topology, however, operates in a non-stationery large-signal behavior, and the statistical properties of its temporal noise are a function of time. Conventional noise analysis methods for CMOS image sensors are based on steady-state signal models, and therefore cannot be readily applied for Gm-cell-based pixels. In this paper, we develop analysis models for both thermal noise and flicker noise in Gm-cell-based pixels by employing the time-domain linear analysis approach and the non-stationary noise analysis theory, which help to quantitatively evaluate the temporal noise characteristic of Gm-cell-based pixels. Both models were numerically computed in MATLAB using design parameters of a prototype chip, and compared with both simulation and experimental results. The good agreement between the theoretical and measurement results verifies the effectiveness of the proposed noise analysis models.

  10. Performance of the INTPIX6 SOI pixel detector

    International Nuclear Information System (INIS)

    Arai, Y.; Miyoshi, T.; Bugiel, Sz.; Dasgupta, R.; Idzik, M.; Kapusta, P.; Turala, M.; Kucewicz, W.

    2017-01-01

    Characterization of the monolithic pixel detector INPTIX6, designed at KEK and fabricated in Lapis 0.2 μ  m Fully-Depleted, Low-Leakage Silicon-On-Insulator (SOI) CMOS technology, was performed. The INTPIX6 comprises a large area of 1408 × 896 integrating type squared pixels of 12 micron pitch. In this work the performance and measurement results of the prototypes produced on lower resistivity Czochralski type (CZ-n) and high resistivity floating zone (FZ-n) sensor wafers are presented. Using 241 Am radioactive source the noise of INTPIX6 was measured, showing the ENC (Equivalent Noise Charge) of about 70 e − . The resolution calculated from the FWHM of the Iron-55 X-ray peak was about 100 e − . The radiation hardness of the SOI pixel detector was also investigated. The CZ-n type INTPIX6 received a dose of 60 krad and its performance has been continuously monitored during the irradiation.

  11. Module and electronics developments for the ATLAS ITK pixel system

    CERN Document Server

    Nellist, Clara; The ATLAS collaboration

    2016-01-01

    Summary ATLAS is preparing for an extensive modification of its detector in the course of the planned HL‐ LHC accelerator upgrade around 2025 which includes a replacement of the entire tracking system by an all‐silicon detector (Inner Tracker, ITk). A revised trigger and data taking system is foreseen with triggers expected at lowest level at an average rate of 1 MHz. The five innermost layers of ITk will comprise of a pixel detector built of new sensor and readout electronics technologies to improve the tracking performance and cope with the severe HL‐LHC environment in terms of occupancy and radiation. The total area of the new pixel system could measure up to 14 m2, depending on the final layout choice that is expected to take place in early 2017. A new on‐detector readout chip is designed in the context of the RD53 collaboration in 65 nm CMOS technology. This paper will present the on‐going R&D within the ATLAS ITK project towards the new pixel modules and the off‐detector electronics. Pla...

  12. Module and electronics developments for the ATLAS ITK pixel system

    CERN Document Server

    Munoz Sanchez, Francisca Javiela; The ATLAS collaboration

    2017-01-01

    ATLAS is preparing for an extensive modification of its detector in the course of the planned HL-LHC accelerator upgrade around 2025 which includes a replacement of the entire tracking system by an all-silicon detector (Inner Tracker, ITk). The five innermost layers of ITk will comprise of a pixel detector built of new sensor and readout electronics technologies to improve the tracking performance and cope with the severe HL-LHC environment in terms of occupancy and radiation. The total area of the new pixel system could measure up to 14 m2, depending on the final layout choice that is expected to take place in 2017. A new on-detector readout chip is designed in the context of the RD53 collaboration in 65 nm CMOS technology. This paper will present the on-going R&D within the ATLAS ITK project towards the new pixel modules and the off-detector electronics. Planar and 3D sensors are being re-designed with cell sizes of 50x50 or 25x100 μm2, compatible with the RD53 chip. A sensor thickness equal or less th...

  13. A beam monitor using silicon pixel sensors for hadron therapy

    Energy Technology Data Exchange (ETDEWEB)

    Wang, Zhen, E-mail: zwang@mails.ccnu.edu.cn; Zou, Shuguang; Fan, Yan; Liu, Jun; Sun, Xiangming, E-mail: sphy2007@126.com; Wang, Dong; Kang, Huili; Sun, Daming; Yang, Ping; Pei, Hua; Huang, Guangming; Xu, Nu; Gao, Chaosong; Xiao, Le

    2017-03-21

    We report the design and test results of a beam monitor developed for online monitoring in hadron therapy. The beam monitor uses eight silicon pixel sensors, Topmetal-II{sup -}, as the anode array. Topmetal-II{sup -} is a charge sensor designed in a CMOS 0.35 µm technology. Each Topmetal-II{sup -} sensor has 72×72 pixels and the pixel size is 83×83 µm{sup 2}. In our design, the beam passes through the beam monitor without hitting the electrodes, making the beam monitor especially suitable for monitoring heavy ion beams. This design also reduces radiation damage to the beam monitor itself. The beam monitor is tested with a carbon ion beam at the Heavy Ion Research Facility in Lanzhou (HIRFL). Results indicate that the beam monitor can measure position, incidence angle and intensity of the beam with a position resolution better than 20 µm, angular resolution about 0.5° and intensity statistical accuracy better than 2%.

  14. Neutron absorbed dose in a pacemaker CMOS

    International Nuclear Information System (INIS)

    Borja H, C. G.; Guzman G, K. A.; Valero L, C.; Banuelos F, A.; Hernandez D, V. M.; Vega C, H. R.; Paredes G, L.

    2012-01-01

    The neutron spectrum and the absorbed dose in a Complementary Metal Oxide Semiconductor (CMOS), has been estimated using Monte Carlo methods. Eventually a person with a pacemaker becomes an oncology patient that must be treated in a linear accelerator. Pacemaker has integrated circuits as CMOS that are sensitive to intense and pulsed radiation fields. Above 7 MV therapeutic beam is contaminated with photoneutrons that could damage the CMOS. Here, the neutron spectrum and the absorbed dose in a CMOS cell was calculated, also the spectra were calculated in two point-like detectors in the room. Neutron spectrum in the CMOS cell shows a small peak between 0.1 to 1 MeV and a larger peak in the thermal region, joined by epithermal neutrons, same features were observed in the point-like detectors. The absorbed dose in the CMOS was 1.522 x 10 -17 Gy per neutron emitted by the source. (Author)

  15. Neutron absorbed dose in a pacemaker CMOS

    Energy Technology Data Exchange (ETDEWEB)

    Borja H, C. G.; Guzman G, K. A.; Valero L, C.; Banuelos F, A.; Hernandez D, V. M.; Vega C, H. R. [Universidad Autonoma de Zacatecas, Unidad Academica de Estudios Nucleares, Cipres No. 10, Fracc. La Penuela, 98068 Zacatecas (Mexico); Paredes G, L., E-mail: fermineutron@yahoo.com [ININ, Carretera Mexico-Toluca s/n, 52750 Ocoyoacac, Estado de Mexico (Mexico)

    2012-06-15

    The neutron spectrum and the absorbed dose in a Complementary Metal Oxide Semiconductor (CMOS), has been estimated using Monte Carlo methods. Eventually a person with a pacemaker becomes an oncology patient that must be treated in a linear accelerator. Pacemaker has integrated circuits as CMOS that are sensitive to intense and pulsed radiation fields. Above 7 MV therapeutic beam is contaminated with photoneutrons that could damage the CMOS. Here, the neutron spectrum and the absorbed dose in a CMOS cell was calculated, also the spectra were calculated in two point-like detectors in the room. Neutron spectrum in the CMOS cell shows a small peak between 0.1 to 1 MeV and a larger peak in the thermal region, joined by epithermal neutrons, same features were observed in the point-like detectors. The absorbed dose in the CMOS was 1.522 x 10{sup -17} Gy per neutron emitted by the source. (Author)

  16. CMOS test and evaluation a physical perspective

    CERN Document Server

    Bhushan, Manjul

    2015-01-01

    This book extends test structure applications described in Microelectronic Test Struc­tures for CMOS Technology (Springer 2011) to digital CMOS product chips. Intended for engineering students and professionals, this book provides a single comprehensive source for evaluating CMOS technology and product test data from a basic knowledge of the physical behavior of the constituent components. Elementary circuits that exhibit key properties of complex CMOS chips are simulated and analyzed, and an integrated view of design, test and characterization is developed. Appropriately designed circuit monitors embedded in the CMOS chip serve to correlate CMOS technology models and circuit design tools to the hardware and also aid in test debug. Impact of silicon process variability, reliability, and power and performance sensitivities to a range of product application conditions are described. Circuit simulations exemplify the methodologies presented, and problems are included at the end of the chapters.

  17. Analog filters in nanometer CMOS

    CERN Document Server

    Uhrmann, Heimo; Zimmermann, Horst

    2014-01-01

    Starting from the basics of analog filters and the poor transistor characteristics in nanometer CMOS 10 high-performance analog filters developed by the authors in 120 nm and 65 nm CMOS are described extensively. Among them are gm-C filters, current-mode filters, and active filters for system-on-chip realization for Bluetooth, WCDMA, UWB, DVB-H, and LTE applications. For the active filters several operational amplifier designs are described. The book, furthermore, contains a review of the newest state of research on low-voltage low-power analog filters. To cover the topic of the book comprehensively, linearization issues and measurement methods for the characterization of advanced analog filters are introduced in addition. Numerous elaborate illustrations promote an easy comprehension. This book will be of value to engineers and researchers in industry as well as scientists and Ph.D students at universities. The book is also recommendable to graduate students specializing on nanoelectronics, microelectronics ...

  18. From Pixels to Planets

    Science.gov (United States)

    Brownston, Lee; Jenkins, Jon M.

    2015-01-01

    The Kepler Mission was launched in 2009 as NASAs first mission capable of finding Earth-size planets in the habitable zone of Sun-like stars. Its telescope consists of a 1.5-m primary mirror and a 0.95-m aperture. The 42 charge-coupled devices in its focal plane are read out every half hour, compressed, and then downlinked monthly. After four years, the second of four reaction wheels failed, ending the original mission. Back on earth, the Science Operations Center developed the Science Pipeline to analyze about 200,000 target stars in Keplers field of view, looking for evidence of periodic dimming suggesting that one or more planets had crossed the face of its host star. The Pipeline comprises several steps, from pixel-level calibration, through noise and artifact removal, to detection of transit-like signals and the construction of a suite of diagnostic tests to guard against false positives. The Kepler Science Pipeline consists of a pipeline infrastructure written in the Java programming language, which marshals data input to and output from MATLAB applications that are executed as external processes. The pipeline modules, which underwent continuous development and refinement even after data started arriving, employ several analytic techniques, many developed for the Kepler Project. Because of the large number of targets, the large amount of data per target and the complexity of the pipeline algorithms, the processing demands are daunting. Some pipeline modules require days to weeks to process all of their targets, even when run on NASA's 128-node Pleiades supercomputer. The software developers are still seeking ways to increase the throughput. To date, the Kepler project has discovered more than 4000 planetary candidates, of which more than 1000 have been independently confirmed or validated to be exoplanets. Funding for this mission is provided by NASAs Science Mission Directorate.

  19. CMOS Analog IC Design: Fundamentals

    OpenAIRE

    Bruun, Erik

    2018-01-01

    This book is intended for use as the main textbook for an introductory course in CMOS analog integrated circuit design. It is aimed at electronics engineering students who have followed basic courses in mathematics, physics, circuit theory, electronics and signal processing. It takes the students directly from a basic level to a level where they can start working on simple analog IC design projects or continue their studies using more advanced textbooks in the field. A distinct feature of thi...

  20. Increasing Linear Dynamic Range of a CMOS Image Sensor

    Science.gov (United States)

    Pain, Bedabrata

    2007-01-01

    A generic design and a corresponding operating sequence have been developed for increasing the linear-response dynamic range of a complementary metal oxide/semiconductor (CMOS) image sensor. The design provides for linear calibrated dual-gain pixels that operate at high gain at a low signal level and at low gain at a signal level above a preset threshold. Unlike most prior designs for increasing dynamic range of an image sensor, this design does not entail any increase in noise (including fixed-pattern noise), decrease in responsivity or linearity, or degradation of photometric calibration. The figure is a simplified schematic diagram showing the circuit of one pixel and pertinent parts of its column readout circuitry. The conventional part of the pixel circuit includes a photodiode having a small capacitance, CD. The unconventional part includes an additional larger capacitance, CL, that can be connected to the photodiode via a transfer gate controlled in part by a latch. In the high-gain mode, the signal labeled TSR in the figure is held low through the latch, which also helps to adapt the gain on a pixel-by-pixel basis. Light must be coupled to the pixel through a microlens or by back illumination in order to obtain a high effective fill factor; this is necessary to ensure high quantum efficiency, a loss of which would minimize the efficacy of the dynamic- range-enhancement scheme. Once the level of illumination of the pixel exceeds the threshold, TSR is turned on, causing the transfer gate to conduct, thereby adding CL to the pixel capacitance. The added capacitance reduces the conversion gain, and increases the pixel electron-handling capacity, thereby providing an extension of the dynamic range. By use of an array of comparators also at the bottom of the column, photocharge voltages on sampling capacitors in each column are compared with a reference voltage to determine whether it is necessary to switch from the high-gain to the low-gain mode. Depending upon

  1. CMOS optimization for radiation hardness

    International Nuclear Information System (INIS)

    Derbenwick, G.F.; Fossum, J.G.

    1975-01-01

    Several approaches to the attainment of radiation-hardened MOS circuits have been investigated in the last few years. These have included implanting the SiO 2 gate insulator with aluminum, using chrome-aluminum layered gate metallization, using Al 2 O 3 as the gate insulator, and optimizing the MOS fabrication process. Earlier process optimization studies were restricted primarily to p-channel devices operating with negative gate biases. Since knowledge of the hardness dependence upon processing and design parameters is essential in producing hardened integrated circuits, a comprehensive investigation of the effects of both process and design optimization on radiation-hardened CMOS integrated circuits was undertaken. The goals are to define and establish a radiation-hardened processing sequence for CMOS integrated circuits and to formulate quantitative relationships between process and design parameters and the radiation hardness. Using these equations, the basic CMOS design can then be optimized for radiation hardness and some understanding of the basic physics responsible for the radiation damage can be gained. Results are presented

  2. Thin n-in-p planar pixel modules for the ATLAS upgrade at HL-LHC

    International Nuclear Information System (INIS)

    Savic, N.; Bergbreiter, L.; Breuer, J.; La Rosa, A.; Macchiolo, A.; Nisius, R.; Terzo, S.

    2017-01-01

    The ATLAS experiment will undergo a major upgrade of the tracker system in view of the high luminosity phase of the LHC (HL-LHC) foreseen to start around 2025. Thin planar pixel modules are promising candidates to instrument the new pixel system, thanks to the reduced contribution to the material budget and their high charge collection efficiency after irradiation. New designs of the pixel cells, with an optimized biasing structure, have been implemented in n-in-p planar pixel productions with sensor thicknesses of 270 μm. Using beam tests, the gain in hit efficiency is investigated as a function of the received irradiation fluence. The outlook for future thin planar pixel sensor productions will be discussed, with a focus on thin sensors with a thickness of 100 and 150 μm and a novel design with the optimized biasing structure and small pixel cells (50×50 and 25×100 μm"2). These dimensions are foreseen for the new ATLAS read-out chip in 65 nm CMOS technology and the fine segmentation will represent a challenge for the tracking in the forward region of the pixel system at HL-LHC. To predict the performance of 50×50 μm"2 pixels at high η, FE-I4 compatible planar pixel sensors have been studied before and after irradiation in beam tests at high incidence angle with respect to the short pixel direction. Results on cluster shapes, charge collection- and hit efficiency will be shown.

  3. Thin n-in-p planar pixel modules for the ATLAS upgrade at HL-LHC

    Energy Technology Data Exchange (ETDEWEB)

    Savic, N., E-mail: natascha.savic@mpp.mpg.de; Bergbreiter, L.; Breuer, J.; La Rosa, A.; Macchiolo, A.; Nisius, R.; Terzo, S.

    2017-02-11

    The ATLAS experiment will undergo a major upgrade of the tracker system in view of the high luminosity phase of the LHC (HL-LHC) foreseen to start around 2025. Thin planar pixel modules are promising candidates to instrument the new pixel system, thanks to the reduced contribution to the material budget and their high charge collection efficiency after irradiation. New designs of the pixel cells, with an optimized biasing structure, have been implemented in n-in-p planar pixel productions with sensor thicknesses of 270 μm. Using beam tests, the gain in hit efficiency is investigated as a function of the received irradiation fluence. The outlook for future thin planar pixel sensor productions will be discussed, with a focus on thin sensors with a thickness of 100 and 150 μm and a novel design with the optimized biasing structure and small pixel cells (50×50 and 25×100 μm{sup 2}). These dimensions are foreseen for the new ATLAS read-out chip in 65 nm CMOS technology and the fine segmentation will represent a challenge for the tracking in the forward region of the pixel system at HL-LHC. To predict the performance of 50×50 μm{sup 2} pixels at high η, FE-I4 compatible planar pixel sensors have been studied before and after irradiation in beam tests at high incidence angle with respect to the short pixel direction. Results on cluster shapes, charge collection- and hit efficiency will be shown.

  4. LePIX: First results from a novel monolithic pixel sensor

    International Nuclear Information System (INIS)

    Mattiazzo, S.; Battaglia, M.; Bisello, D.; Caselle, M.; Chalmet, P.; Demaria, N.; Giubilato, P.; Ikemoto, Y.; Kloukinas, K.; Mansuy, C.; Marchioro, A.; Mugnier, H.; Pantano, D.; Potenza, A.; Rivetti, A.; Rousset, J.; Silvestrin, L.; Snoeys, W.; Wyss, J.

    2013-01-01

    We present a monolithic pixel sensor developed in the framework of the LePIX project aimed at tracking/triggering tasks where high granularity, low power consumption, material budget, radiation hardness and production costs are a concern. The detector is built in a 90 nm CMOS process on a substrate of moderate resistivity. This maintains the advantages usually offered by Monolithic Active Pixel Sensors (MAPS), like a low input capacitance, having a single piece detector and using a standard CMOS production line, but offers charge collection by drift from a depleted region and therefore an excellent signal to noise ratio and a radiation tolerance superior to conventional undepleted MAPS. Measurement results obtained with the first prototypes from laser, radioactive source and beam test experiments are described. The excellent signal-to-noise performance is demonstrated by the capability of the device to separate the peaks in the spectrum of a 55 Fe source. We will also highlight the interaction between pixel cell design and architecture which points toward a very precise direction in the development of such depleted monolithic pixel devices for high energy physics

  5. Absorbed dose by a CMOS in radiotherapy

    Energy Technology Data Exchange (ETDEWEB)

    Borja H, C. G.; Valero L, C. Y.; Guzman G, K. A.; Banuelos F, A.; Hernandez D, V. M.; Vega C, H. R. [Universidad Autonoma de Zacatecas, Unidad Academica de Estudios Nucleares, Calle Cipres No. 10, Fracc. La Penuela, 98068 Zacatecas (Mexico); Paredes G, L. C., E-mail: candy_borja@hotmail.com [ININ, Carretera Mexico-Toluca s/n, 52750 Ocoyoacac, Estado de Mexico (Mexico)

    2011-10-15

    Absorbed dose by a complementary metal oxide semiconductor (CMOS) circuit as part of a pacemaker, has been estimated using Monte Carlo calculations. For a cancer patient who is a pacemaker carrier, scattered radiation could damage pacemaker CMOS circuits affecting patient's health. Absorbed dose in CMOS circuit due to scattered photons is too small and therefore is not the cause of failures in pacemakers, but neutron calculations shown an absorbed dose that could cause damage in CMOS due to neutron-hydrogen interactions. (Author)

  6. Microelectronic test structures for CMOS technology

    CERN Document Server

    Ketchen, Mark B

    2011-01-01

    Microelectronic Test Structures for CMOS Technology and Products addresses the basic concepts of the design of test structures for incorporation within test-vehicles, scribe-lines, and CMOS products. The role of test structures in the development and monitoring of CMOS technologies and products has become ever more important with the increased cost and complexity of development and manufacturing. In this timely volume, IBM scientists Manjul Bhushan and Mark Ketchen emphasize high speed characterization techniques for digital CMOS circuit applications and bridging between circuit performance an

  7. CMS Barrel Pixel Detector Overview

    CERN Document Server

    Kästli, H C; Erdmann, W; Gabathuler, K; Hörmann, C; Horisberger, Roland Paul; König, S; Kotlinski, D; Meier, B; Robmann, P; Rohe, T; Streuli, S

    2007-01-01

    The pixel detector is the innermost tracking device of the CMS experiment at the LHC. It is built from two independent sub devices, the pixel barrel and the end disks. The barrel consists of three concentric layers around the beam pipe with mean radii of 4.4, 7.3 and 10.2 cm. There are two end disks on each side of the interaction point at 34.5 cm and 46.5 cm. This article gives an overview of the pixel barrel detector, its mechanical support structure, electronics components, services and its expected performance.

  8. Identification of radiation induced dark current sources in pinned photodiode CMOS image sensors

    International Nuclear Information System (INIS)

    Goiffon, V.; Virmontois, C.; Magnan, P.; Cervantes, P.; Place, S.; Estribeau, M.; Martin-Gonthier, P.; Gaillardin, M.; Girard, S.; Paillet, P.

    2012-01-01

    This paper presents an investigation of Total Ionizing Dose (TID) induced dark current sources in Pinned Photodiodes (PPD) CMOS Image Sensors based on pixel design variations. The influence of several layout parameters is studied. Only one parameter is changed at a time enabling the direct evaluation of its contribution to the observed device degradation. By this approach, the origin of radiation induced dark current in PPD is localized on the pixel layout. The PPD peripheral shallow trench isolation does not seem to play a role in the degradation. The PPD area and a transfer gate contribution independent of the pixel dimensions appear to be the main sources of the TID induced dark current increase. This study also demonstrates that applying a negative voltage on the transfer gate during integration strongly reduces the radiation induced dark current. (authors)

  9. NV-CMOS HD camera for day/night imaging

    Science.gov (United States)

    Vogelsong, T.; Tower, J.; Sudol, Thomas; Senko, T.; Chodelka, D.

    2014-06-01

    SRI International (SRI) has developed a new multi-purpose day/night video camera with low-light imaging performance comparable to an image intensifier, while offering the size, weight, ruggedness, and cost advantages enabled by the use of SRI's NV-CMOS HD digital image sensor chip. The digital video output is ideal for image enhancement, sharing with others through networking, video capture for data analysis, or fusion with thermal cameras. The camera provides Camera Link output with HD/WUXGA resolution of 1920 x 1200 pixels operating at 60 Hz. Windowing to smaller sizes enables operation at higher frame rates. High sensitivity is achieved through use of backside illumination, providing high Quantum Efficiency (QE) across the visible and near infrared (NIR) bands (peak QE camera, which operates from a single 5V supply. The NVCMOS HD camera provides a substantial reduction in size, weight, and power (SWaP) , ideal for SWaP-constrained day/night imaging platforms such as UAVs, ground vehicles, fixed mount surveillance, and may be reconfigured for mobile soldier operations such as night vision goggles and weapon sights. In addition the camera with the NV-CMOS HD imager is suitable for high performance digital cinematography/broadcast systems, biofluorescence/microscopy imaging, day/night security and surveillance, and other high-end applications which require HD video imaging with high sensitivity and wide dynamic range. The camera comes with an array of lens mounts including C-mount and F-mount. The latest test data from the NV-CMOS HD camera will be presented.

  10. Characterizing Subpixel Spatial Resolution of a Hybrid CMOS Detector

    Science.gov (United States)

    Bray, Evan; Burrows, Dave; Chattopadhyay, Tanmoy; Falcone, Abraham; Hull, Samuel; Kern, Matthew; McQuaide, Maria; Wages, Mitchell

    2018-01-01

    The detection of X-rays is a unique process relative to other wavelengths, and allows for some novel features that increase the scientific yield of a single observation. Unlike lower photon energies, X-rays liberate a large number of electrons from the silicon absorber array of the detector. This number is usually on the order of several hundred to a thousand for moderate-energy X-rays. These electrons tend to diffuse outward into what is referred to as the charge cloud. This cloud can then be picked up by several pixels, forming a specific pattern based on the exact incident location. By conducting the first ever “mesh experiment" on a hybrid CMOS detector (HCD), we have experimentally determined the charge cloud shape and used it to characterize responsivity of the detector with subpixel spatial resolution.

  11. Macromolecular crystallography with a large format CMOS detector

    Energy Technology Data Exchange (ETDEWEB)

    Nix, Jay C., E-mail: jcnix@lbl.gov [Molecular Biology Consortium 12003 S. Pulaski Rd. #166 Alsip, IL 60803 U.S.A (United States)

    2016-07-27

    Recent advances in CMOS technology have allowed the production of large surface area detectors suitable for macromolecular crystallography experiments [1]. The Molecular Biology Consortium (MBC) Beamline 4.2.2 at the Advanced Light Source in Berkeley, CA, has installed a 2952 x 2820 mm RDI CMOS-8M detector with funds from NIH grant S10OD012073. The detector has a 20nsec dead pixel time and performs well with shutterless data collection strategies. The sensor obtains sharp point response and minimal optical distortion by use of a thin fiber-optic plate between the phosphor and sensor module. Shutterless data collections produce high-quality redundant datasets that can be obtained in minutes. The fine-sliced data are suitable for processing in standard crystallographic software packages (XDS, HKL2000, D*TREK, MOSFLM). Faster collection times relative to the previous CCD detector have resulted in a record number of datasets collected in a calendar year and de novo phasing experiments have resulted in publications in both Science and Nature [2,3]. The faster collections are due to a combination of the decreased overhead requirements of shutterless collections combined with exposure times that have decreased by over a factor of 2 for images with comparable signal to noise of the NOIR-1 detector. The overall increased productivity has allowed the development of new beamline capabilities and data collection strategies.

  12. Parallel encoders for pixel detectors

    International Nuclear Information System (INIS)

    Nikityuk, N.M.

    1991-01-01

    A new method of fast encoding and determining the multiplicity and coordinates of fired pixels is described. A specific example construction of parallel encodes and MCC for n=49 and t=2 is given. 16 refs.; 6 figs.; 2 tabs

  13. TSV last for hybrid pixel detectors: Application to particle physics and imaging experiments

    CERN Document Server

    Henry, D; Berthelot, A; Cuchet, R; Chantre, C; Campbell, M

    Hybrid pixel detectors are now widely used in particle physics experiments and at synchrotron light sources. They have also stimulated growing interest in other fields and, in particular, in medical imaging. Through the continuous pursuit of miniaturization in CMOS it has been possible to increase the functionality per pixel while maintaining or even shrinking pixel dimensions. The main constraint on the more extensive use of the technology in all fields is the cost of module building and the difficulty of covering large areas seamlessly [1]. On another hand, in the field of electronic component integration, a new approach has been developed in the last years, called 3D Integration. This concept, based on using the vertical axis for component integration, allows improving the global performance of complex systems. Thanks to this technology, the cost and the form factor of components could be decreased and the performance of the global system could be enhanced. In the field of radiation imaging detectors the a...

  14. Heavy Ion Transient Characterization of a Photobit Hardened-by-Design Active Pixel Sensor Array

    Science.gov (United States)

    Marshall, Paul W.; Byers, Wheaton B.; Conger, Christopher; Eid, El-Sayed; Gee, George; Jones, Michael R.; Marshall, Cheryl J.; Reed, Robert; Pickel, Jim; Kniffin, Scott

    2002-01-01

    This paper presents heavy ion data on the single event transient (SET) response of a Photobit active pixel sensor (APS) four quadrant test chip with different radiation tolerant designs in a standard 0.35 micron CMOS process. The physical design techniques of enclosed geometry and P-channel guard rings are used to design the four N-type active photodiode pixels as described in a previous paper. Argon transient measurements on the 256 x 256 chip array as a function of incident angle show a significant variation in the amount of charge collected as well as the charge spreading dependent on the pixel type. The results are correlated with processing and design information provided by Photobit. In addition, there is a large degree of statistical variability between individual ion strikes. No latch-up is observed up to an LET of 106 MeV/mg/sq cm.

  15. Synchrotron applications of pixel and strip detectors at Diamond Light Source

    International Nuclear Information System (INIS)

    Marchal, J.; Tartoni, N.; Nave, C.

    2009-01-01

    A wide range of position-sensitive X-ray detectors have been commissioned on the synchrotron X-ray beamlines operating at the Diamond Light Source in UK. In addition to mature technologies such as image-plates, CCD-based detectors, multi-wire and micro-strip gas detectors, more recent detectors based on semiconductor pixel or strip sensors coupled to CMOS read-out chips are also in use for routine synchrotron X-ray diffraction and scattering experiments. The performance of several commercial and developmental pixel/strip detectors for synchrotron studies are discussed with emphasis on the image quality achieved with these devices. Examples of pixel or strip detector applications at Diamond Light Source as well as the status of the commissioning of these detectors on the beamlines are presented. Finally, priorities and ideas for future developments are discussed.

  16. Modeling and evaluation of a high-resolution CMOS detector for cone-beam CT of the extremities.

    Science.gov (United States)

    Cao, Qian; Sisniega, Alejandro; Brehler, Michael; Stayman, J Webster; Yorkston, John; Siewerdsen, Jeffrey H; Zbijewski, Wojciech

    2018-01-01

    Quantitative assessment of trabecular bone microarchitecture in extremity cone-beam CT (CBCT) would benefit from the high spatial resolution, low electronic noise, and fast scan time provided by complementary metal-oxide semiconductor (CMOS) x-ray detectors. We investigate the performance of CMOS sensors in extremity CBCT, in particular with respect to potential advantages of thin (CMOS x-ray detector incorporating the effects of CsI:Tl scintillator thickness was developed. Simulation studies were performed using nominal extremity CBCT acquisition protocols (90 kVp, 0.126 mAs/projection). A range of scintillator thickness (0.35-0.75 mm), pixel size (0.05-0.4 mm), focal spot size (0.05-0.7 mm), magnification (1.1-2.1), and dose (15-40 mGy) was considered. The detectability index was evaluated for both CMOS and a-Si:H flat-panel detector (FPD) configurations for a range of imaging tasks emphasizing spatial frequencies associated with feature size aobj. Experimental validation was performed on a CBCT test bench in the geometry of a compact orthopedic CBCT system (SAD = 43.1 cm, SDD = 56.0 cm, matching that of the Carestream OnSight 3D system). The test-bench studies involved a 0.3 mm focal spot x-ray source and two CMOS detectors (Dalsa Xineos-3030HR, 0.099 mm pixel pitch) - one with the standard CsI:Tl thickness of 0.7 mm (C700) and one with a custom 0.4 mm thick scintillator (C400). Measurements of modulation transfer function (MTF), detective quantum efficiency (DQE), and CBCT scans of a cadaveric knee (15 mGy) were obtained for each detector. Optimal detectability for high-frequency tasks (feature size of ~0.06 mm, consistent with the size of trabeculae) was ~4× for the C700 CMOS detector compared to the a-Si:H FPD at nominal system geometry of extremity CBCT. This is due to ~5× lower electronic noise of a CMOS sensor, which enables input quantum-limited imaging at smaller pixel size. Optimal pixel size for high-frequency tasks was CMOS

  17. Towards a new generation of pixel detector readout chips

    CERN Document Server

    Campbell, M; Ballabriga, R.; Frojdh, E.; Heijne, E.; Llopart, X.; Poikela, T.; Tlustos, L.; Valerio, P.; Wong, W.

    2016-01-01

    The Medipix3 Collaboration has broken new ground in spectroscopic X-ray imaging and in single particle detection and tracking. This paper will review briefly the performance and limitations of the present generation of pixel detector readout chips developed by the Collaboration. Through Silicon Via technology has the potential to provide a significant improvement in the tile- ability and more flexibility in the choice of readout architecture. This has been explored in the context of 3 projects with CEA-LETI using Medipix3 and Timepix3 wafers. The next generation of chips will aim to provide improved spectroscopic imaging performance at rates compatible with human CT. It will also aim to provide full spectroscopic images with unprecedented energy and spatial resolution. Some of the opportunities and challenges posed by moving to a more dense CMOS process will be discussed.

  18. A research on radiation calibration of high dynamic range based on the dual channel CMOS

    Science.gov (United States)

    Ma, Kai; Shi, Zhan; Pan, Xiaodong; Wang, Yongsheng; Wang, Jianghua

    2017-10-01

    The dual channel complementary metal-oxide semiconductor (CMOS) can get high dynamic range (HDR) image through extending the gray level of the image by using image fusion with high gain channel image and low gain channel image in a same frame. In the process of image fusion with dual channel, it adopts the coefficients of radiation response of a pixel from dual channel in a same frame, and then calculates the gray level of the pixel in the HDR image. For the coefficients of radiation response play a crucial role in image fusion, it has to find an effective method to acquire these parameters. In this article, it makes a research on radiation calibration of high dynamic range based on the dual channel CMOS, and designs an experiment to calibrate the coefficients of radiation response for the sensor it used. In the end, it applies these response parameters in the dual channel CMOS which calibrates, and verifies the correctness and feasibility of the method mentioned in this paper.

  19. Radiation damage studies on STAR250 CMOS sensor at 300 keV for electron microscopy

    International Nuclear Information System (INIS)

    Faruqi, A.R.; Henderson, R.; Holmes, J.

    2006-01-01

    There is a pressing need for better electronic detectors to replace film for recording high-resolution images using electron cryomicroscopy. Our previous work has shown that direct electron detection in CMOS sensors is promising in terms of resolution and efficiency at 120 keV [A.R. Faruqi, R. Henderson, M. Prydderch, R. Turchetta, P. Allport, A. Evans, Nucl. Instr. and Meth. 546 (2005) 170], but in addition, the detectors must not be damaged by the electron irradiation. We now present new measurements on the radiation tolerance of a 25 μm pitch CMOS active-pixel sensor, the STAR250, which was designed by FillFactory using radiation-hard technology for space applications. Our tests on the STAR250 aimed to establish the imaging performance at 300 keV following irradiation. The residual contrast, measured on shadow images of a 300 mesh grid, was >80% after corrections for increased dark current, following irradiation with up to 5x10 7 electrons/pixel (equivalent to 80,000 electron/μm 2 ). A CMOS sensor with this degree of radiation tolerance would survive a year of normal usage for low-dose electron cryomicroscopy, which is a very useful advance

  20. A Low Power Digital Accumulation Technique for Digital-Domain CMOS TDI Image Sensor.

    Science.gov (United States)

    Yu, Changwei; Nie, Kaiming; Xu, Jiangtao; Gao, Jing

    2016-09-23

    In this paper, an accumulation technique suitable for digital domain CMOS time delay integration (TDI) image sensors is proposed to reduce power consumption without degrading the rate of imaging. In terms of the slight variations of quantization codes among different pixel exposures towards the same object, the pixel array is divided into two groups: one is for coarse quantization of high bits only, and the other one is for fine quantization of low bits. Then, the complete quantization codes are composed of both results from the coarse-and-fine quantization. The equivalent operation comparably reduces the total required bit numbers of the quantization. In the 0.18 µm CMOS process, two versions of 16-stage digital domain CMOS TDI image sensor chains based on a 10-bit successive approximate register (SAR) analog-to-digital converter (ADC), with and without the proposed technique, are designed. The simulation results show that the average power consumption of slices of the two versions are 6 . 47 × 10 - 8 J/line and 7 . 4 × 10 - 8 J/line, respectively. Meanwhile, the linearity of the two versions are 99.74% and 99.99%, respectively.

  1. A Multi-Modality CMOS Sensor Array for Cell-Based Assay and Drug Screening.

    Science.gov (United States)

    Chi, Taiyun; Park, Jong Seok; Butts, Jessica C; Hookway, Tracy A; Su, Amy; Zhu, Chengjie; Styczynski, Mark P; McDevitt, Todd C; Wang, Hua

    2015-12-01

    In this paper, we present a fully integrated multi-modality CMOS cellular sensor array with four sensing modalities to characterize different cell physiological responses, including extracellular voltage recording, cellular impedance mapping, optical detection with shadow imaging and bioluminescence sensing, and thermal monitoring. The sensor array consists of nine parallel pixel groups and nine corresponding signal conditioning blocks. Each pixel group comprises one temperature sensor and 16 tri-modality sensor pixels, while each tri-modality sensor pixel can be independently configured for extracellular voltage recording, cellular impedance measurement (voltage excitation/current sensing), and optical detection. This sensor array supports multi-modality cellular sensing at the pixel level, which enables holistic cell characterization and joint-modality physiological monitoring on the same cellular sample with a pixel resolution of 80 μm × 100 μm. Comprehensive biological experiments with different living cell samples demonstrate the functionality and benefit of the proposed multi-modality sensing in cell-based assay and drug screening.

  2. The ALPIDE pixel sensor chip for the upgrade of the ALICE Inner Tracking System

    Energy Technology Data Exchange (ETDEWEB)

    Aglieri Rinella, Gianluca, E-mail: gianluca.aglieri.rinella@cern.ch

    2017-02-11

    The ALPIDE chip is a CMOS Monolithic Active Pixel Sensor being developed for the Upgrade of the ITS of the ALICE experiment at the CERN Large Hadron Collider. The ALPIDE chip is implemented with a 180 nm CMOS Imaging Process and fabricated on substrates with a high-resistivity epitaxial layer. It measures 15 mm×30 mm and contains a matrix of 512×1024 pixels with in-pixel amplification, shaping, discrimination and multi-event buffering. The readout of the sensitive matrix is hit driven. There is no signaling activity over the matrix if there are no hits to read out and power consumption is proportional to the occupancy. The sensor meets the experimental requirements of detection efficiency above 99%, fake-hit probability below 10{sup −5} and a spatial resolution of 5 μm. The capability to read out Pb–Pb interactions at 100 kHz is provided. The power density of the ALPIDE chip is projected to be less than 35 mW/cm{sup 2} for the application in the Inner Barrel Layers and below 20 mW/cm{sup 2} for the Outer Barrel Layers, where the occupancy is lower. This contribution describes the architecture and the main features of the final ALPIDE chip, planned for submission at the beginning of 2016. Early results from the experimental qualification of full scale prototype predecessors are also reported. - Highlights: • The ALPIDE chip, an innovative CMOS pixel particle detector is described. • It achieves excellent detection performance figures and very low power consumption. • The characterization of prototypes confirms the achievement of the specifications.

  3. Research and Development of Monolithic Active Pixel Sensors for the Detection of the Elementary Particles

    International Nuclear Information System (INIS)

    Li, Y.

    2007-09-01

    In order to develop high spatial resolution and readout speed vertex detectors for the future International Linear Collider (ILC), fast CMOS Monolithic Active Pixel Sensors (MAPS) are studied on this work. Two prototypes of MAPS, MIMOSA 8 and MIMOSA 16, based on the same micro-electronic architecture were developed in CMOS processes with different thickness of epitaxial layer. The size of pixel matrix is 32 x 128: 8 columns of the pixel array are readout directly with analog outputs and the other 24 columns are connected to the column level auto-zero discriminators. The Correlated Double Sampling (CDS) structures are successfully implemented inside pixel and discriminator. The photo diode type pixels with different diode sizes are used in these prototypes. With a 55 Fe X-ray radioactive source, the important parameters, such as Temporal Noise, Fixed Pattern Noise (FPN), Signal-to-Noise Ratio (SNR), Charge-to-Voltage conversion Factor (CVF) and Charge Collection Efficiency (CCE), are studied as function of readout speed and diode size. For MIMOSA 8, the effect of fast neutrons irradiation is also. Two beam tests campaigns were made: at DESY with a 5 GeV electrons beam and at CERN with a 180 GeV pions beam. Detection Efficiency and Spatial Resolution are studied in function of the discriminator threshold. For these two parameters, the influences of diode size and SNR of the central pixel of a cluster are also discussed. In order to improve the spatial resolution of the digital outputs, a very compact (25 μm x 1 mm) and low consumption (300 μW) column level ADC is designed in AMS 0.35 μm OPTO process. Based on successive approximation architecture, the auto-offset cancellation structure is integrated. A new column level auto-zero discriminator using static latch is also designed. (author)

  4. A 10-bit column-parallel cyclic ADC for high-speed CMOS image sensors

    International Nuclear Information System (INIS)

    Han Ye; Li Quanliang; Shi Cong; Wu Nanjian

    2013-01-01

    This paper presents a high-speed column-parallel cyclic analog-to-digital converter (ADC) for a CMOS image sensor. A correlated double sampling (CDS) circuit is integrated in the ADC, which avoids a stand-alone CDS circuit block. An offset cancellation technique is also introduced, which reduces the column fixed-pattern noise (FPN) effectively. One single channel ADC with an area less than 0.02 mm 2 was implemented in a 0.13 μm CMOS image sensor process. The resolution of the proposed ADC is 10-bit, and the conversion rate is 1.6 MS/s. The measured differential nonlinearity and integral nonlinearity are 0.89 LSB and 6.2 LSB together with CDS, respectively. The power consumption from 3.3 V supply is only 0.66 mW. An array of 48 10-bit column-parallel cyclic ADCs was integrated into an array of CMOS image sensor pixels. The measured results indicated that the ADC circuit is suitable for high-speed CMOS image sensors. (semiconductor integrated circuits)

  5. Recent progress in the development of a B-factory monolithic active pixel detector

    International Nuclear Information System (INIS)

    Stanic, S.; Aihara, H.; Barbero, M.; Bozek, A.; Browder, T.; Hazumi, M.; Kennedy, J.; Kent, N.; Olsen, S.; Palka, H.; Rosen, M.; Ruckman, L.; Trabelsi, K.; Tsuboyama, T.; Uchida, K.; Varner, G.; Yang, Q.

    2006-01-01

    Due to the need for precise vertexing at future higher luminosity B-factories with the expectedly increasing track densities and radiation exposures, upgrade of present silicon strip detectors with thin, radiation resistant pixel detectors is highly desired. Considerable progress in the technological development of thin CMOS based Monolithic Active Pixel Sensors (MAPS) in the last years makes them a realistic upgrade option and the feasibility studies of their application in Belle are actively pursued. The most serious concerns are their radiation hardness and their read-out speed. To address them, several prototypes denoted as Continuous Acquisition Pixel (CAP) sensors have been developed and tested. The latest of the CAP sensor prototypes is CAP3, designed in the TSMC 0.25μm process with a 5-deep sample pair pipeline in each pixel. A setup with several CAP3 sensors will be used to assess the performance of a full scale pixel read-out system running at realistic read-out speed. The results and plans for the next stages of R and D towards a full Pixel Vertex Detector (PVD) are presented

  6. High accuracy injection circuit for the calibration of a large pixel sensor matrix

    International Nuclear Information System (INIS)

    Quartieri, E.; Comotti, D.; Manghisoni, M.

    2013-01-01

    Semiconductor pixel detectors, for particle tracking and vertexing in high energy physics experiments as well as for X-ray imaging, in particular for synchrotron light sources and XFELs, require a large area sensor matrix. This work will discuss the design and the characterization of a high-linearity, low dispersion injection circuit to be used for pixel-level calibration of detector readout electronics in a large pixel sensor matrix. The circuit provides a useful tool for the characterization of the readout electronics of the pixel cell unit for both monolithic active pixel sensors and hybrid pixel detectors. In the latter case, the circuit allows for precise analogue test of the readout channel already at the chip level, when no sensor is connected. Moreover, it provides a simple means for calibration of readout electronics once the detector has been connected to the chip. Two injection techniques can be provided by the circuit: one for a charge sensitive amplification and the other for a transresistance readout channel. The aim of the paper is to describe the architecture and the design guidelines of the calibration circuit, which has been implemented in a 130 nm CMOS technology. Moreover, experimental results of the proposed injection circuit will be presented in terms of linearity and dispersion

  7. Fast Imaging Detector Readout Circuits with In-Pixel ADCs for Fourier Transform Imaging Spectrometers

    Science.gov (United States)

    Rider, D.; Blavier, J-F.; Cunningham, T.; Hancock, B.; Key, R.; Pannell, Z.; Sander, S.; Seshadri, S.; Sun, C.; Wrigley, C.

    2011-01-01

    Focal plane arrays (FPAs) with high frame rates and many pixels benefit several upcoming Earth science missions including GEO-CAPE, GACM, and ACE by enabling broader spatial coverage and higher spectral resolution. FPAs for the PanFTS, a high spatial resolution Fourier transform spectrometer and a candidate instrument for the GEO-CAPE mission are the focus of the developments reported here, but this FPA technology has the potential to enable a variety of future measurements and instruments. The ESTO ACT Program funded the developed of a fast readout integrated circuit (ROIC) based on an innovative in-pixel analog-to-digital converter (ADC). The 128 X 128 pixel ROIC features 60 ?m pixels, a 14-bit ADC in each pixel and operates at a continuous frame rate of 14 kHz consuming only 1.1 W of power. The ROIC outputs digitized data completely eliminating the bulky, power consuming signal chains needed by conventional FPAs. The 128 X 128 pixel ROIC has been fabricated in CMOS and tested at the Jet Propulsion Laboratory. The current version is designed to be hybridized with PIN photodiode arrays via indium bump bonding for light detection in the visible and ultraviolet spectral regions. However, the ROIC design incorporates a small photodiode in each cell to permit detailed characterization of the ROICperformance without the need for hybridization. We will describe the essential features of the ROIC design and present results of ROIC performance measurements.

  8. The Upgraded Pixel Detector of the ATLAS Experiment for Run-2 at the LHC

    CERN Document Server

    AUTHOR|(INSPIRE)INSPIRE-00084948; The ATLAS collaboration

    2016-01-01

    Run-2 of the LHC is providing new challenges to track and vertex reconstruction with higher energies, denser jets and higher rates. Therefore the ATLAS experiment has constructed the first 4-layer Pixel detector in HEP, installing a new Pixel layer, also called Insertable B-Layer (IBL). IBL is a fourth layer of pixel detectors, and has been installed in May 2014 at a radius of 3.3 cm between the existing Pixel Detector and a new smaller radius beam-pipe. The new detector, built to cope with high radiation and expected occupancy, is the first large scale application of 3D detectors and CMOS 130 nm technology. In addition the Pixel detector was refurbished with a new service quarter panel to recover about 3% of defective modules lost during run-1 and a new optical readout system to readout the data at higher speed while reducing the occupancy when running with increased luminosity. The commissioning and performance of the 4-layer Pixel Detector, in particular the IBL, will be presented using collision data.

  9. The Upgraded Pixel Detector of the ATLAS Experiment for Run-2

    CERN Document Server

    Ferrere, Didier; The ATLAS collaboration

    2016-01-01

    Run-2 of the LHC is providing new challenges to track and vertex reconstruction with higher energies, denser jets and higher rates. Therefore the ATLAS experiment has constructed the first 4-layer Pixel detector in HEP, installing a new Pixel layer, also called Insertable B-Layer (IBL). IBL is a fourth layer of pixel detectors, and has been installed in May 2014 at a radius of 3.3 cm between the existing Pixel Detector and a new smaller radius beam-pipe. The new detector, built to cope with high radiation and expected occupancy, is the first large scale application of 3D detectors and CMOS 130nm technology. In addition the Pixel detector was refurbished with a new service quarter panel to recover about 3% of defective modules lost during run-1 and a new optical readout system to readout the data at higher speed while reducing the occupancy when running with increased luminosity. The commissioning and performance of the 4-layer Pixel Detector, in particular the IBL, will be presented, using collision data.

  10. The upgraded Pixel Detector of the ATLAS experiment for Run-2 at the Large Hadron Collider

    CERN Document Server

    Giordani, MarioPaolo; The ATLAS collaboration

    2016-01-01

    Run-2 of the LHC is providing new challenges to track and vertex reconstruction with higher energies, denser jets and higher rates. Therefore the ATLAS experiment has constructed the first 4-layer Pixel detector in HEP, installing a new Pixel layer, also called Insertable B-Layer (IBL). IBL is a fourth layer of pixel detectors, and has been installed in May 2014 at a radius of 3.3 cm between the existing Pixel Detector and a new smaller radius beam-pipe. The new detector, built to cope with high radiation and expected occupancy, is the first large scale application of 3D detectors and CMOS 130nm technology. In addition the Pixel detector was refurbished with a new service quarter panel to recover about 3% of defective modules lost during run-1 and a new optical readout system to readout the data at higher speed while reducing the occupancy when running with increased luminosity. The commissioning and performance of the 4-layer Pixel Detector, in particular the IBL, will be presented, using collision data.

  11. Development of n-in-p pixel modules for the ATLAS upgrade at HL-LHC

    Science.gov (United States)

    Macchiolo, A.; Nisius, R.; Savic, N.; Terzo, S.

    2016-09-01

    Thin planar pixel modules are promising candidates to instrument the inner layers of the new ATLAS pixel detector for HL-LHC, thanks to the reduced contribution to the material budget and their high charge collection efficiency after irradiation. 100-200 μm thick sensors, interconnected to FE-I4 read-out chips, have been characterized with radioactive sources and beam tests at the CERN-SPS and DESY. The results of these measurements are reported for devices before and after irradiation up to a fluence of 14 ×1015 neq /cm2 . The charge collection and tracking efficiency of the different sensor thicknesses are compared. The outlook for future planar pixel sensor production is discussed, with a focus on sensor design with the pixel pitches (50×50 and 25×100 μm2) foreseen for the RD53 Collaboration read-out chip in 65 nm CMOS technology. An optimization of the biasing structures in the pixel cells is required to avoid the hit efficiency loss presently observed in the punch-through region after irradiation. For this purpose the performance of different layouts have been compared in FE-I4 compatible sensors at various fluence levels by using beam test data. Highly segmented sensors will represent a challenge for the tracking in the forward region of the pixel system at HL-LHC. In order to reproduce the performance of 50×50 μm2 pixels at high pseudo-rapidity values, FE-I4 compatible planar pixel sensors have been studied before and after irradiation in beam tests at high incidence angle (80°) with respect to the short pixel direction. Results on cluster shapes, charge collection and hit efficiency will be shown.

  12. Hybrid CMOS/Molecular Integrated Circuits

    Science.gov (United States)

    Stan, M. R.; Rose, G. S.; Ziegler, M. M.

    CMOS silicon technologies are likely to run out of steam in the next 10-15 years despite revolutionary advances in the past few decades. Molecular and other nanoscale technologies show significant promise but it is unlikely that they will completely replace CMOS, at least in the near term. This chapter explores opportunities for using CMOS and nanotechnology to enhance and complement each other in hybrid circuits. As an example of such a hybrid CMOS/nano system, a nanoscale programmable logic array (PLA) based on majority logic is described along with its supplemental CMOS circuitry. It is believed that such systems will be able to sustain the historical advances in the semiconductor industry while addressing manufacturability, yield, power, cost, and performance challenges.

  13. Design and image-quality performance of high resolution CMOS-based X-ray imaging detectors for digital mammography

    Science.gov (United States)

    Cha, B. K.; Kim, J. Y.; Kim, Y. J.; Yun, S.; Cho, G.; Kim, H. K.; Seo, C.-W.; Jeon, S.; Huh, Y.

    2012-04-01

    In digital X-ray imaging systems, X-ray imaging detectors based on scintillating screens with electronic devices such as charge-coupled devices (CCDs), thin-film transistors (TFT), complementary metal oxide semiconductor (CMOS) flat panel imagers have been introduced for general radiography, dental, mammography and non-destructive testing (NDT) applications. Recently, a large-area CMOS active-pixel sensor (APS) in combination with scintillation films has been widely used in a variety of digital X-ray imaging applications. We employed a scintillator-based CMOS APS image sensor for high-resolution mammography. In this work, both powder-type Gd2O2S:Tb and a columnar structured CsI:Tl scintillation screens with various thicknesses were fabricated and used as materials to convert X-ray into visible light. These scintillating screens were directly coupled to a CMOS flat panel imager with a 25 × 50 mm2 active area and a 48 μm pixel pitch for high spatial resolution acquisition. We used a W/Al mammographic X-ray source with a 30 kVp energy condition. The imaging characterization of the X-ray detector was measured and analyzed in terms of linearity in incident X-ray dose, modulation transfer function (MTF), noise-power spectrum (NPS) and detective quantum efficiency (DQE).

  14. Design of fundamental building blocks for fast binary readout CMOS sensors used in high-energy physics experiments

    Energy Technology Data Exchange (ETDEWEB)

    Degerli, Yavuz [CEA Saclay, IRFU/SEDI, 91191 Gif-sur-Yvette Cedex (France)], E-mail: degerli@cea.fr

    2009-04-21

    In this paper, design details of key building blocks for fast binary readout CMOS monolithic active pixel sensors developed for charged particle detection are presented. Firstly, an all-NMOS pixel architecture with in-pixel amplification and reset noise suppression which allows fast readout is presented. This pixel achieves high charge-to-voltage conversion factors (CVF) using a few number of transistors inside the pixel. It uses a pre-amplifying stage close to the detector and a simple double sampling (DS) circuitry to store the reset level of the detector. The DS removes the offset mismatches of amplifiers and the reset noise of the detector. Offset mismatches of the source follower are also corrected by a second column-level DS stage. The second important building block of these sensors, a low-power auto-zeroed column-level discriminator, is also presented. These two blocks transform the charge of the impinging particle into binary data. Finally, some experimental results obtained on CMOS chips designed using these blocks are presented.

  15. A monolithic pixel sensor (TRAPPISTe-2) for particle physics instrumentation in OKI 0.2μm SOI technology

    Science.gov (United States)

    Soung Yee, L.; Alvarez, P.; Martin, E.; Cortina, E.; Ferrer, C.

    2012-12-01

    A monolithic active pixel sensor for charged particle tracking has been developed within the frame of a research and development project called TRAPPISTe (Tracking Particles for Physics Instrumentation in SOI Technology). TRAPPISTe aims to study the feasibility of developing a monolithic pixel sensor with SOI technology. TRAPPISTe-2 is the second prototype in this series and was fabricated with an OKI 0.20μm fully depleted (FD-SOI) CMOS process. This device contains test transistors and amplifiers, as well as two pixel matrices with integrated 3-transistor and amplifier readout electronics. The results presented are based on the first electrical measurements performed on the test structures and laser measurements on the pixel matrices.

  16. Conceptual design of 3D integrated pixel sensors for the innermost layer of the ILC vertex detector

    International Nuclear Information System (INIS)

    Fu, Y; Hu-Guo, C; Dorokhov, A; Zhao, W; Hu, Y; Torheim, O

    2011-01-01

    The paper presents a design of CMOS Pixel Sensor (CPS) using the vertical integration technology (3DIT), expected to alleviate the most essential limitations of 2D-CPS. Our objective is to develop an intelligent architecture in order to meet the requirements of the innermost layer of the International Linear Collider (ILC) vertex detectors, which are particularly demanding in spatial resolution of less than 3 μm and associated frame readout time of 10 μs. The sensor, with a pixel pitch of 23 μm, will be composed of 3-tiers Integrated Circuits (IC) with different functionalities: detection with in pixel analogue processing, pixel-level 3-bit Analogue to Digital Conversion (ADC) and fast parallel sparse readout.

  17. Radiation hardness of two CMOS prototypes for the ATLAS HL-LHC upgrade project

    CERN Document Server

    Huffman, B T; Arndt, K; Bates, R; Benoit, M; Di Bello, F; Blue, A; Bortoletto, D; Buckland, M; Buttar, C; Caragiulo, P; Das, D; Dopke, J; Dragone, A; Ehrler, F; Fadeyev, V; Galloway, Z; Grabas, H; Gregor, I M; Grenier, P; Grillo, A; Hoeferkamp, M; Hommels, L B A; John, J; Kanisauskas, K; Kenney, C; Kramberger, J; Liang, Z; Mandic, I; Maneuski, D; Martinez-McKinney, F; McMahon, S; Meng, L; Mikuž, M; Muenstermann, D; Nickerson, R; Peric, I; Phillips, P; Plackett, R; Rubbo, F; Segal, J; Seidel, S; Seiden, A; Shipsey, I; Song, W; Stanitzki, M; Su, D; Tamma, C; Turchetta, R; Vigani, L; olk, J; Wang, R; Warren, M; Wilson, F; Worm, S; Xiu, Q; Zhang, J; Zhu, H

    2016-01-01

    The LHC luminosity upgrade, known as the High Luminosity LHC (HL-LHC), will require the replacement of the existing silicon strip tracker and the transistion radiation tracker. Although a baseline design for this tracker exists the ATLAS collaboration and other non-ATLAS groups are exploring the feasibility of using CMOS Monolithic Active Pixel Sensors (MAPS) which would be arranged in a strip-like fashion and would take advantage of the service and support structure already being developed for the upgrade. Two test devices made with theAMSH35 process (a High voltage or HV CMOS process) have been subjected to various radiation environments and have performed well. The results of these tests are presented in this paper.

  18. A CMOS silicon spin qubit

    Science.gov (United States)

    Maurand, R.; Jehl, X.; Kotekar-Patil, D.; Corna, A.; Bohuslavskyi, H.; Laviéville, R.; Hutin, L.; Barraud, S.; Vinet, M.; Sanquer, M.; de Franceschi, S.

    2016-11-01

    Silicon, the main constituent of microprocessor chips, is emerging as a promising material for the realization of future quantum processors. Leveraging its well-established complementary metal-oxide-semiconductor (CMOS) technology would be a clear asset to the development of scalable quantum computing architectures and to their co-integration with classical control hardware. Here we report a silicon quantum bit (qubit) device made with an industry-standard fabrication process. The device consists of a two-gate, p-type transistor with an undoped channel. At low temperature, the first gate defines a quantum dot encoding a hole spin qubit, the second one a quantum dot used for the qubit read-out. All electrical, two-axis control of the spin qubit is achieved by applying a phase-tunable microwave modulation to the first gate. The demonstrated qubit functionality in a basic transistor-like device constitutes a promising step towards the elaboration of scalable spin qubit geometries in a readily exploitable CMOS platform.

  19. CMOS Imaging of Pin-Printed Xerogel-Based Luminescent Sensor Microarrays.

    Science.gov (United States)

    Yao, Lei; Yung, Ka Yi; Khan, Rifat; Chodavarapu, Vamsy P; Bright, Frank V

    2010-12-01

    We present the design and implementation of a luminescence-based miniaturized multisensor system using pin-printed xerogel materials which act as host media for chemical recognition elements. We developed a CMOS imager integrated circuit (IC) to image the luminescence response of the xerogel-based sensor array. The imager IC uses a 26 × 20 (520 elements) array of active pixel sensors and each active pixel includes a high-gain phototransistor to convert the detected optical signals into electrical currents. The imager includes a correlated double sampling circuit and pixel address/digital control circuit; the image data is read-out as coded serial signal. The sensor system uses a light-emitting diode (LED) to excite the target analyte responsive luminophores doped within discrete xerogel-based sensor elements. As a prototype, we developed a 4 × 4 (16 elements) array of oxygen (O 2 ) sensors. Each group of 4 sensor elements in the array (arranged in a row) is designed to provide a different and specific sensitivity to the target gaseous O 2 concentration. This property of multiple sensitivities is achieved by using a strategic mix of two oxygen sensitive luminophores ([Ru(dpp) 3 ] 2+ and ([Ru(bpy) 3 ] 2+ ) in each pin-printed xerogel sensor element. The CMOS imager consumes an average power of 8 mW operating at 1 kHz sampling frequency driven at 5 V. The developed prototype system demonstrates a low cost and miniaturized luminescence multisensor system.

  20. Radiation hardness and timing studies of a monolithic TowerJazz pixel design for the new ATLAS Inner Tracker

    OpenAIRE

    Riegel, C; Backhaus, M; Hoorne, J W Van; Kugathasan, T; Musa, L; Pernegger, H; Riedler, P; Schaefer, D; Snoeys, W; Wagner, W

    2017-01-01

    A part of the upcoming HL-LHC upgrade of the ATLAS Detector is the construction of a new Inner Tracker. This upgrade opens new possibilities, but also presents challenges in terms of occupancy and radiation tolerance. For the pixel detector inside the inner tracker, hybrid modules containing passive silicon sensors and connected readout chips are presently used, but require expensive assembly techniques like fine-pitch bump bonding. Silicon devices fabricated in standard commercial CMOS techn...

  1. Few-Layer MoS2-Organic Thin-Film Hybrid Complementary Inverter Pixel Fabricated on a Glass Substrate.

    Science.gov (United States)

    Lee, Hee Sung; Shin, Jae Min; Jeon, Pyo Jin; Lee, Junyeong; Kim, Jin Sung; Hwang, Hyun Chul; Park, Eunyoung; Yoon, Woojin; Ju, Sang-Yong; Im, Seongil

    2015-05-13

    Few-layer MoS2-organic thin-film hybrid complementary inverters demonstrate a great deal of device performance with a decent voltage gain of ≈12, a few hundred pW power consumption, and 480 Hz switching speed. As fabricated on glass, this hybrid CMOS inverter operates as a light-detecting pixel as well, using a thin MoS2 channel. © 2015 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  2. Optical detection of ultrasound from optically rough surfaces using a custom CMOS sensor

    International Nuclear Information System (INIS)

    Achamfuo-Yeboah, S O; Light, R A; Sharpies, S D

    2015-01-01

    The optical detection of ultrasound from optically rough surfaces is severely limited when using a conventional interferometric or optical beam deflection (OBD) setup because the detected light is speckled. This means that complicated and expensive setups are required to detect ultrasound optically on rough surfaces. We present a CMOS integrated circuit that can detect laser ultrasound in the presence of speckle. The detector circuit is based on the simple knife edge detector. It is self-adapting and is fast, inxepensive, compact and robust. The CMOS circuit is implemented as a widefield array of 32×32 pixels. At each pixel the received light is compared with an adjacent pixel in order to determine the local light gradient. The result of this comparison is stored and used to connect each pixel to the positive or negative gradient output as appropriate (similar to a balanced knife edge detector). The perturbation of the surface due to ultrasound preserves the speckle distribution whilst deflecting it. The spatial disturbance of the speckle pattern due to the ultrasound is detected by considering each pair of pixels as a knife edge detector. The sensor can adapt itself to match the received optical speckle pattern in less than 0.1 μs, and then detect the ultrasound within 0.5 μs of adaptation. This makes it possible to repeatedly detect ultrasound from optically rough surfaces very quickly. The detector is capable of independent operation controlled by a local microcontroller, or it may be connected to a computer for more sophisticated configuration and control. We present the theory of its operation and discuss results validating the concept and operation of the device. We also present preliminary results from an improved design which grants a higher bandwidth, allowing for optical detection of higher frequency ultrasound

  3. Commercial CMOS image sensors as X-ray imagers and particle beam monitors

    International Nuclear Information System (INIS)

    Castoldi, A.; Guazzoni, C.; Maffessanti, S.; Montemurro, G.V.; Carraresi, L.

    2015-01-01

    CMOS image sensors are widely used in several applications such as mobile handsets webcams and digital cameras among others. Furthermore they are available across a wide range of resolutions with excellent spectral and chromatic responses. In order to fulfill the need of cheap systems as beam monitors and high resolution image sensors for scientific applications we exploited the possibility of using commercial CMOS image sensors as X-rays and proton detectors. Two different sensors have been mounted and tested. An Aptina MT9v034, featuring 752 × 480 pixels, 6μm × 6μm pixel size has been mounted and successfully tested as bi-dimensional beam profile monitor, able to take pictures of the incoming proton bunches at the DeFEL beamline (1–6 MeV pulsed proton beam) of the LaBeC of INFN in Florence. The naked sensor is able to successfully detect the interactions of the single protons. The sensor point-spread-function (PSF) has been qualified with 1MeV protons and is equal to one pixel (6 mm) r.m.s. in both directions. A second sensor MT9M032, featuring 1472 × 1096 pixels, 2.2 × 2.2 μm pixel size has been mounted on a dedicated board as high-resolution imager to be used in X-ray imaging experiments with table-top generators. In order to ease and simplify the data transfer and the image acquisition the system is controlled by a dedicated micro-processor board (DM3730 1GHz SoC ARM Cortex-A8) on which a modified LINUX kernel has been implemented. The paper presents the architecture of the sensor systems and the results of the experimental measurements

  4. Monolithic active pixel sensor development for the upgrade of the ALICE inner tracking system

    Science.gov (United States)

    Aglieri, G.; Cavicchioli, C.; Chalmet, P. L.; Chanlek, N.; Collu, A.; Giubilato, P.; Hillemanns, H.; Junique, A.; Keil, M.; Kim, D.; Kim, J.; Kugathasan, T.; Lattuca, A.; Mager, M.; Marin Tobon, C. A.; Marras, D.; Martinengo, P.; Mattiazzo, S.; Mazza, G.; Mugnier, H.; Musa, L.; Pantano, D.; Puggioni, C.; Rousset, J.; Reidt, F.; Riedler, P.; Siddhanta, S.; Snoeys, W.; Usai, G.; van Hoorne, J. W.; Yang, P.; Yi, J.

    2013-12-01

    ALICE plans an upgrade of its Inner Tracking System for 2018. The development of a monolithic active pixel sensor for this upgrade is described. The TowerJazz 180 nm CMOS imaging sensor process has been chosen as it is possible to use full CMOS in the pixel due to the offering of a deep pwell and also to use different starting materials. The ALPIDE development is an alternative to approaches based on a rolling shutter architecture, and aims to reduce power consumption and integration time by an order of magnitude below the ALICE specifications, which would be quite beneficial in terms of material budget and background. The approach is based on an in-pixel binary front-end combined with a hit-driven architecture. Several prototypes have already been designed, submitted for fabrication and some of them tested with X-ray sources and particles in a beam. Analog power consumption has been limited by optimizing the Q/C of the sensor using Explorer chips. Promising but preliminary first results have also been obtained with a prototype ALPIDE. Radiation tolerance up to the ALICE requirements has also been verified.

  5. Monolithic active pixel sensor development for the upgrade of the ALICE inner tracking system

    International Nuclear Information System (INIS)

    Aglieri, G; Cavicchioli, C; Hillemanns, H; Junique, A; Keil, M; Kugathasan, T; Mager, M; Tobon, C A Marin; Martinengo, P; Chalmet, P L; Mugnier, H; Chanlek, N; Collu, A; Marras, D; Giubilato, P; Mattiazzo, S; Kim, D; Kim, J; Lattuca, A; Mazza, G

    2013-01-01

    ALICE plans an upgrade of its Inner Tracking System for 2018. The development of a monolithic active pixel sensor for this upgrade is described. The TowerJazz 180 nm CMOS imaging sensor process has been chosen as it is possible to use full CMOS in the pixel due to the offering of a deep pwell and also to use different starting materials. The ALPIDE development is an alternative to approaches based on a rolling shutter architecture, and aims to reduce power consumption and integration time by an order of magnitude below the ALICE specifications, which would be quite beneficial in terms of material budget and background. The approach is based on an in-pixel binary front-end combined with a hit-driven architecture. Several prototypes have already been designed, submitted for fabrication and some of them tested with X-ray sources and particles in a beam. Analog power consumption has been limited by optimizing the Q/C of the sensor using Explorer chips. Promising but preliminary first results have also been obtained with a prototype ALPIDE. Radiation tolerance up to the ALICE requirements has also been verified

  6. The ALPIDE pixel sensor chip for the upgrade of the ALICE Inner Tracking System

    CERN Document Server

    Aglieri Rinella, Gianluca

    2017-01-01

    The ALPIDE chip is a CMOS Monolithic Active Pixel Sensor being developed for the Upgrade of the ITS of the ALICE experiment at the CERN Large Hadron Collider. The ALPIDE chip is implemented with a 180 nm CMOS Imaging Process and fabricated on substrates with a high-resistivity epitaxial layer. It measures 15 mm×30 mm and contains a matrix of 512×1024 pixels with in-pixel amplification, shaping, discrimination and multi-event buffering. The readout of the sensitive matrix is hit driven. There is no signaling activity over the matrix if there are no hits to read out and power consumption is proportional to the occupancy. The sensor meets the experimental requirements of detection efficiency above 99%, fake-hit probability below 10−5 and a spatial resolution of 5 μm. The capability to read out Pb–Pb interactions at 100 kHz is provided. The power density of the ALPIDE chip is projected to be less than 35 mW/cm2 for the application in the Inner Barrel Layers and below 20 mW/cm2 for the Outer Barrel Layers, ...

  7. A high efficiency readout architecture for a large matrix of pixels

    International Nuclear Information System (INIS)

    Gabrielli, A; Giorgi, F; Villa, M

    2010-01-01

    In this work we present a fast readout architecture for silicon pixel matrix sensors that has been designed to sustain very high rates, above 1 MHz/mm 2 for matrices greater than 80k pixels. This logic can be implemented within MAPS (Monolithic Active Pixel Sensors), a kind of high resolution sensor that integrates on the same bulk the sensor matrix and the CMOS logic for readout, but it can be exploited also with other technologies. The proposed architecture is based on three main concepts. First of all, the readout of the hits is performed by activating one column at a time; all the fired pixels on the active column are read, sparsified and reset in parallel in one clock cycle. This implies the use of global signals across the sensor matrix. The consequent reduction of metal interconnections improves the active area while maintaining a high granularity (down to a pixel pitch of 40 μm). Secondly, the activation for readout takes place only for those columns overlapping with a certain fired area, thus reducing the sweeping time of the whole matrix and reducing the pixel dead-time. Third, the sparsification (x-y address labeling of the hits) is performed with a lower granularity with respect to single pixels, by addressing vertical zones of 8 pixels each. The fine-grain Y resolution is achieved by appending the zone pattern to the zone address of a hit. We show then the benefits of this technique in presence of clusters. We describe this architecture from a schematic point of view, then presenting the efficiency results obtained by VHDL simulations.

  8. A high efficiency readout architecture for a large matrix of pixels.

    Science.gov (United States)

    Gabrielli, A.; Giorgi, F.; Villa, M.

    2010-07-01

    In this work we present a fast readout architecture for silicon pixel matrix sensors that has been designed to sustain very high rates, above 1 MHz/mm2 for matrices greater than 80k pixels. This logic can be implemented within MAPS (Monolithic Active Pixel Sensors), a kind of high resolution sensor that integrates on the same bulk the sensor matrix and the CMOS logic for readout, but it can be exploited also with other technologies. The proposed architecture is based on three main concepts. First of all, the readout of the hits is performed by activating one column at a time; all the fired pixels on the active column are read, sparsified and reset in parallel in one clock cycle. This implies the use of global signals across the sensor matrix. The consequent reduction of metal interconnections improves the active area while maintaining a high granularity (down to a pixel pitch of 40 μm). Secondly, the activation for readout takes place only for those columns overlapping with a certain fired area, thus reducing the sweeping time of the whole matrix and reducing the pixel dead-time. Third, the sparsification (x-y address labeling of the hits) is performed with a lower granularity with respect to single pixels, by addressing vertical zones of 8 pixels each. The fine-grain Y resolution is achieved by appending the zone pattern to the zone address of a hit. We show then the benefits of this technique in presence of clusters. We describe this architecture from a schematic point of view, then presenting the efficiency results obtained by VHDL simulations.

  9. Carbon Nanotube Integration with a CMOS Process

    Science.gov (United States)

    Perez, Maximiliano S.; Lerner, Betiana; Resasco, Daniel E.; Pareja Obregon, Pablo D.; Julian, Pedro M.; Mandolesi, Pablo S.; Buffa, Fabian A.; Boselli, Alfredo; Lamagna, Alberto

    2010-01-01

    This work shows the integration of a sensor based on carbon nanotubes using CMOS technology. A chip sensor (CS) was designed and manufactured using a 0.30 μm CMOS process, leaving a free window on the passivation layer that allowed the deposition of SWCNTs over the electrodes. We successfully investigated with the CS the effect of humidity and temperature on the electrical transport properties of SWCNTs. The possibility of a large scale integration of SWCNTs with CMOS process opens a new route in the design of more efficient, low cost sensors with high reproducibility in their manufacture. PMID:22319330

  10. CMOS Image Sensor and System for Imaging Hemodynamic Changes in Response to Deep Brain Stimulation.

    Science.gov (United States)

    Zhang, Xiao; Noor, Muhammad S; McCracken, Clinton B; Kiss, Zelma H T; Yadid-Pecht, Orly; Murari, Kartikeya

    2016-06-01

    Deep brain stimulation (DBS) is a therapeutic intervention used for a variety of neurological and psychiatric disorders, but its mechanism of action is not well understood. It is known that DBS modulates neural activity which changes metabolic demands and thus the cerebral circulation state. However, it is unclear whether there are correlations between electrophysiological, hemodynamic and behavioral changes and whether they have any implications for clinical benefits. In order to investigate these questions, we present a miniaturized system for spectroscopic imaging of brain hemodynamics. The system consists of a 144 ×144, [Formula: see text] pixel pitch, high-sensitivity, analog-output CMOS imager fabricated in a standard 0.35 μm CMOS process, along with a miniaturized imaging system comprising illumination, focusing, analog-to-digital conversion and μSD card based data storage. This enables stand alone operation without a computer, nor electrical or fiberoptic tethers. To achieve high sensitivity, the pixel uses a capacitive transimpedance amplifier (CTIA). The nMOS transistors are in the pixel while pMOS transistors are column-parallel, resulting in a fill factor (FF) of 26%. Running at 60 fps and exposed to 470 nm light, the CMOS imager has a minimum detectable intensity of 2.3 nW/cm(2) , a maximum signal-to-noise ratio (SNR) of 49 dB at 2.45 μW/cm(2) leading to a dynamic range (DR) of 61 dB while consuming 167 μA from a 3.3 V supply. In anesthetized rats, the system was able to detect temporal, spatial and spectral hemodynamic changes in response to DBS.

  11. New generation of monolithic active pixel sensors for charged particle detection

    International Nuclear Information System (INIS)

    Deptuch, G.

    2002-09-01

    Vertex detectors are of great importance in particle physics experiments, as the knowledge of the event flavour is becoming an issue for the physics programme at Future Linear Colliders. Monolithic Active Pixel Sensors (MAPS) based on a novel detector structure have been proposed. Their fabrication is compatible with a standard CMOS process. The sensor is inseparable from the readout electronics, since both of them are integrated on the same, low-resistivity silicon wafer. The basic pixel configuration comprises only three MOS transistors and a diode collecting the charge through thermal diffusion. The charge is generated in the thin non-depleted epitaxial layer underneath the readout electronics. This approach provides, at low cost, a high resolution and thin device with the whole area sensitive to radiation. Device simulations using the ISE-TCAD package have been carried out to study the charge collection mechanism. In order to demonstrate the viability of the technique, four prototype chips have been fabricated using different submicrometer CMOS processes. The pixel gain has been calibrated using a 55 Fe source and the Poisson sequence method. The prototypes have been exposed to high-energy particle beams at CERN. The tests proved excellent detection performances expressed in a single-track spatial resolution of 1.5 μm and detection efficiency close to 100%, resulting from a SNR ratio of more than 30. Irradiation tests showed immunity of MAPS to a level of a few times 10 12 n/cm 2 and a few hundred kRad of ionising radiation. The ideas for future work, including on-pixel signal amplification, double sampling operation and current mode pixel design are present as well. (author)

  12. Highly sensitive and area-efficient CMOS image sensor using a PMOSFET-type photodetector with a built-in transfer gate

    Science.gov (United States)

    Seo, Sang-Ho; Kim, Kyoung-Do; Kong, Jae-Sung; Shin, Jang-Kyoo; Choi, Pyung

    2007-02-01

    In this paper, a new CMOS image sensor is presented, which uses a PMOSFET-type photodetector with a transfer gate that has a high and variable sensitivity. The proposed CMOS image sensor has been fabricated using a 0.35 μm 2-poly 4- metal standard CMOS technology and is composed of a 256 × 256 array of 7.05 × 7.10 μm pixels. The unit pixel has a configuration of a pseudo 3-transistor active pixel sensor (APS) with the PMOSFET-type photodetector with a transfer gate, which has a function of conventional 4-transistor APS. The generated photocurrent is controlled by the transfer gate of the PMOSFET-type photodetector. The maximum responsivity of the photodetector is larger than 1.0 × 10 3 A/W without any optical lens. Fabricated 256 × 256 CMOS image sensor exhibits a good response to low-level illumination as low as 5 lux.

  13. X-ray performance of a wafer-scale CMOS flat panel imager for applications in medical imaging and nondestructive testing

    International Nuclear Information System (INIS)

    Cha, Bo Kyung; Jeon, Seongchae; Seo, Chang-Woo

    2016-01-01

    This paper presents a wafer-scale complementary metal-oxide semiconductor (CMOS)-based X-ray flat panel detector for medical imaging and nondestructive testing applications. In this study, our proposed X-ray CMOS flat panel imager has been fabricated by using a 0.35 µm 1-poly/4-metal CMOS process. The pixel size is 100 µm×100 µm and the pixel array format is 1200×1200 pixels, which provide a field-of-view (FOV) of 120mm×120 mm. The 14.3-bit extended counting analog-to digital converter (ADC) with built-in binning mode was used to reduce the area and simultaneously improve the image resolution. The different screens such as thallium-doped CsI (CsI:Tl) and terbium gadolinium oxysulfide (Gd_2O_2S:Tb) scintillators were used as conversion materials for X-rays to visible light photons. The X-ray imaging performance such as X-ray sensitivity as a function of X-ray exposure dose, spatial resolution, image lag and X-ray images of various objects were measured under practical medical and industrial application conditions. This paper results demonstrate that our prototype CMOS-based X-ray flat panel imager has the significant potential for medical imaging and non-destructive testing (NDT) applications with high-resolution and high speed rate.

  14. Study of built-in amplifier performance on HV-CMOS sensor for the ATLAS phase-II strip tracker upgrade

    Energy Technology Data Exchange (ETDEWEB)

    Liang, Z., E-mail: zhijun.liang@cern.ch [University of California Santa Cruz, Santa Cruz Institute for Particle Physics (SCIPP) (United States); Institute of High Energy Physics, Beijing (China); Affolder, A. [University of Liverpool (United Kingdom); Arndt, K. [University of Oxford (United Kingdom); Bates, R. [SUPA – School of Physics and Astronomy, University of Glasgow, Glasgow (United Kingdom); Benoit, M.; Di Bello, F. [University of Geneva (Switzerland); Blue, A. [SUPA – School of Physics and Astronomy, University of Glasgow, Glasgow (United Kingdom); Bortoletto, D. [University of Oxford (United Kingdom); Buckland, M. [University of Liverpool (United Kingdom); CERN, European Center for Nuclear Research (Switzerland); Buttar, C. [SUPA – School of Physics and Astronomy, University of Glasgow, Glasgow (United Kingdom); Caragiulo, P. [SLAC National Accelerator Laboratory (United States); Das, D.; Dopke, J. [Rutherford Appleton Laboratory, Didcot (United Kingdom); Dragone, A. [SLAC National Accelerator Laboratory (United States); Ehrler, F. [Karlsruhe Institute of Technology (Germany); Fadeyev, V.; Galloway, Z.; Grabas, H. [University of California Santa Cruz, Santa Cruz Institute for Particle Physics (SCIPP) (United States); Gregor, I.M. [Deutsches Elektronen-Synchrotron (Germany); Grenier, P. [SLAC National Accelerator Laboratory (United States); and others

    2016-09-21

    This paper focuses on the performance of analog readout electronics (built-in amplifier) integrated on the high-voltage (HV) CMOS silicon sensor chip, as well as its radiation hardness. Since the total collected charge from minimum ionizing particle (MIP) for the CMOS sensor is 10 times lower than for a conventional planar sensor, it is crucial to integrate a low noise built-in amplifier on the sensor chip to improve the signal to noise ratio of the system. As part of the investigation for the ATLAS strip detector upgrade, a test chip that comprises several pixel arrays with different geometries, as well as standalone built-in amplifiers and built-in amplifiers in pixel arrays has been fabricated in a 0.35 μm high-voltage CMOS process. Measurements of the gain and the noise of both the standalone amplifiers and built-in amplifiers in pixel arrays were performed before and after gamma radiation of up to 60 Mrad. Of special interest is the variation of the noise as a function of the sensor capacitance. We optimized the configuration of the amplifier for a fast rise time to adapt to the LHC bunch crossing period of 25 ns, and measured the timing characteristics including jitter. Our results indicate an adequate amplifier performance for monolithic structures used in HV-CMOS technology. The results have been incorporated in the next submission of a large-structure chip.

  15. X-ray performance of a wafer-scale CMOS flat panel imager for applications in medical imaging and nondestructive testing

    Energy Technology Data Exchange (ETDEWEB)

    Cha, Bo Kyung, E-mail: goldrain99@kaist.ac.kr [Advanced Medical Device Research Center, Korea Electrotechnology Research Institute, Ansan (Korea, Republic of); Jeon, Seongchae [Advanced Medical Device Research Center, Korea Electrotechnology Research Institute, Ansan (Korea, Republic of); Seo, Chang-Woo [Department of Radiological Science, Yonsei University, Gangwon-do 220-710 (Korea, Republic of)

    2016-09-21

    This paper presents a wafer-scale complementary metal-oxide semiconductor (CMOS)-based X-ray flat panel detector for medical imaging and nondestructive testing applications. In this study, our proposed X-ray CMOS flat panel imager has been fabricated by using a 0.35 µm 1-poly/4-metal CMOS process. The pixel size is 100 µm×100 µm and the pixel array format is 1200×1200 pixels, which provide a field-of-view (FOV) of 120mm×120 mm. The 14.3-bit extended counting analog-to digital converter (ADC) with built-in binning mode was used to reduce the area and simultaneously improve the image resolution. The different screens such as thallium-doped CsI (CsI:Tl) and terbium gadolinium oxysulfide (Gd{sub 2}O{sub 2}S:Tb) scintillators were used as conversion materials for X-rays to visible light photons. The X-ray imaging performance such as X-ray sensitivity as a function of X-ray exposure dose, spatial resolution, image lag and X-ray images of various objects were measured under practical medical and industrial application conditions. This paper results demonstrate that our prototype CMOS-based X-ray flat panel imager has the significant potential for medical imaging and non-destructive testing (NDT) applications with high-resolution and high speed rate.

  16. Which Photodiode to Use: A Comparison of CMOS-Compatible Structures.

    Science.gov (United States)

    Murari, Kartikeya; Etienne-Cummings, Ralph; Thakor, Nitish; Cauwenberghs, Gert

    2009-07-01

    While great advances have been made in optimizing fabrication process technologies for solid state image sensors, the need remains to be able to fabricate high quality photosensors in standard CMOS processes. The quality metrics depend on both the pixel architecture and the photosensitive structure. This paper presents a comparison of three photodiode structures in terms of spectral sensitivity, noise and dark current. The three structures are n(+)/p-sub, n-well/p-sub and p(+)/n-well/p-sub. All structures were fabricated in a 0.5 mum 3-metal, 2-poly, n-well process and shared the same pixel and readout architectures. Two pixel structures were fabricated-the standard three transistor active pixel sensor, where the output depends on the photodiode capacitance, and one incorporating an in-pixel capacitive transimpedance amplifier where the output is dependent only on a designed feedback capacitor. The n-well/p-sub diode performed best in terms of sensitivity (an improvement of 3.5 x and 1.6 x over the n(+)/p-sub and p(+)/n-well/p-sub diodes, respectively) and signal-to-noise ratio (1.5 x and 1.2 x improvement over the n(+)/p-sub and p(+)/n-well/p-sub diodes, respectively) while the p(+)/n-well/p-sub diode had the minimum (33% compared to other two structures) dark current for a given sensitivity.

  17. CMOS cassette for digital upgrade of film-based mammography systems

    Science.gov (United States)

    Baysal, Mehmet A.; Toker, Emre

    2006-03-01

    While full-field digital mammography (FFDM) technology is gaining clinical acceptance, the overwhelming majority (96%) of the installed base of mammography systems are conventional film-screen (FSM) systems. A high performance, and economical digital cassette based product to conveniently upgrade FSM systems to FFDM would accelerate the adoption of FFDM, and make the clinical and technical advantages of FFDM available to a larger population of women. The planned FFDM cassette is based on our commercial Digital Radiography (DR) cassette for 10 cm x 10 cm field-of-view spot imaging and specimen radiography, utilizing a 150 micron columnar CsI(Tl) scintillator and 48 micron active-pixel CMOS sensor modules. Unlike a Computer Radiography (CR) cassette, which requires an external digitizer, our DR cassette transfers acquired images to a display workstation within approximately 5 seconds of exposure, greatly enhancing patient flow. We will present the physical performance of our prototype system against other FFDM systems in clinical use today, using established objective criteria such as the Modulation Transfer Function (MTF), Detective Quantum Efficiency (DQE), and subjective criteria, such as a contrast-detail (CD-MAM) observer performance study. Driven by the strong demand from the computer industry, CMOS technology is one of the lowest cost, and the most readily accessible technologies available for FFDM today. Recent popular use of CMOS imagers in high-end consumer cameras have also resulted in significant advances in the imaging performance of CMOS sensors against rivaling CCD sensors. This study promises to take advantage of these unique features to develop the first CMOS based FFDM upgrade cassette.

  18. CMOS MAPS in a Homogeneous 3D Process for Charged Particle Tracking

    CERN Document Server

    Manazza, A; Manghisoni, M; Re, V; Traversi, G; Bettarini, S; Forti, F; Morsani, F; Rizzo, G; 10.1109/TNS.2014.2299341

    2014-01-01

    This work presents the characterization of deep n-well (DNW) CMOS monolithic active pixel sensors (MAPS) fabricated in a 130 nm homogeneous, vertically integrated technology. An evaluation of the 3D MAPS device performance, designed for application of the experiments at the future high luminosity colliders, is provided through the characterization of the prototypes, including tests with infrared (IR) laser, 55Fe and 90Sr sources. The radiation hardness study of the technology will also be presented together with its impact on 3D DNW MAPS performance.

  19. Visible Wavelength Color Filters Using Dielectric Subwavelength Gratings for Backside-Illuminated CMOS Image Sensor Technologies.

    Science.gov (United States)

    Horie, Yu; Han, Seunghoon; Lee, Jeong-Yub; Kim, Jaekwan; Kim, Yongsung; Arbabi, Amir; Shin, Changgyun; Shi, Lilong; Arbabi, Ehsan; Kamali, Seyedeh Mahsa; Lee, Hong-Seok; Hwang, Sungwoo; Faraon, Andrei

    2017-05-10

    We report transmissive color filters based on subwavelength dielectric gratings that can replace conventional dye-based color filters used in backside-illuminated CMOS image sensor (BSI CIS) technologies. The filters are patterned in an 80 nm-thick poly silicon film on a 115 nm-thick SiO 2 spacer layer. They are optimized for operating at the primary RGB colors, exhibit peak transmittance of 60-80%, and have an almost insensitive response over a ± 20° angular range. This technology enables shrinking of the pixel sizes down to near a micrometer.

  20. Single Photon Counting Performance and Noise Analysis of CMOS SPAD-Based Image Sensors

    Science.gov (United States)

    Dutton, Neale A. W.; Gyongy, Istvan; Parmesan, Luca; Henderson, Robert K.

    2016-01-01

    SPAD-based solid state CMOS image sensors utilising analogue integrators have attained deep sub-electron read noise (DSERN) permitting single photon counting (SPC) imaging. A new method is proposed to determine the read noise in DSERN image sensors by evaluating the peak separation and width (PSW) of single photon peaks in a photon counting histogram (PCH). The technique is used to identify and analyse cumulative noise in analogue integrating SPC SPAD-based pixels. The DSERN of our SPAD image sensor is exploited to confirm recent multi-photon threshold quanta image sensor (QIS) theory. Finally, various single and multiple photon spatio-temporal oversampling techniques are reviewed. PMID:27447643

  1. 18k Channels single photon counting readout circuit for hybrid pixel detector

    International Nuclear Information System (INIS)

    Maj, P.; Grybos, P.; Szczygiel, R.; Zoladz, M.; Sakumura, T.; Tsuji, Y.

    2013-01-01

    We have performed measurements of an integrated circuit named PXD18k designed for hybrid pixel semiconductor detectors used in X-ray imaging applications. The PXD18k integrated circuit, fabricated in CMOS 180 nm technology, has dimensions of 9.64 mm×20 mm and contains approximately 26 million transistors. The core of the IC is a matrix of 96×192 pixels with 100 μm×100 μm pixel size. Each pixel works in a single photon counting mode. A single pixel contains two charge sensitive amplifiers with Krummenacher feedback scheme, two shapers, two discriminators (with independent thresholds A and B) and two 16-bit ripple counters. The data are read out via eight low voltage differential signaling (LVDS) outputs with 100 Mbps rate. The power consumption is dominated by analog blocks and it is about 23 μW/pixel. The effective peaking time at the discriminator input is 30 ns and is mainly determined by the time constants of the charge sensitive amplifier (CSA). The gain is equal to 42.5 μV/e − and the equivalent noise charge is 168 e − rms (with bump-bonded silicon pixel detector). Thanks to the use of trim DACs in each pixel, the effective threshold spread at the discriminator input is only 1.79 mV. The dead time of the front end electronics for a standard setting is 172 ns (paralyzable model). In the standard readout mode (when the data collection time is separated from the time necessary to readout data from the chip) the PXD18k IC works with two energy thresholds per pixel. The PXD18k can also be operated in the continuous readout mode (with a zero dead time) where one can select the number of bits readout from each pixel to optimize the PXD18k frame rate. For example, for reading out 16 bits/pixel the frame rate is 2.7 kHz and for 4 bits/pixel it rises to 7.1 kHz.

  2. 18k Channels single photon counting readout circuit for hybrid pixel detector

    Energy Technology Data Exchange (ETDEWEB)

    Maj, P., E-mail: piotr.maj@agh.edu.pl [AGH University of Science and Technology, Department of Measurements and Electronics, Al. Mickiewicza 30, 30-059 Krakow (Poland); Grybos, P.; Szczygiel, R.; Zoladz, M. [AGH University of Science and Technology, Department of Measurements and Electronics, Al. Mickiewicza 30, 30-059 Krakow (Poland); Sakumura, T.; Tsuji, Y. [X-ray Analysis Division, Rigaku Corporation, Matsubara, Akishima, Tokyo 196-8666 (Japan)

    2013-01-01

    We have performed measurements of an integrated circuit named PXD18k designed for hybrid pixel semiconductor detectors used in X-ray imaging applications. The PXD18k integrated circuit, fabricated in CMOS 180 nm technology, has dimensions of 9.64 mm Multiplication-Sign 20 mm and contains approximately 26 million transistors. The core of the IC is a matrix of 96 Multiplication-Sign 192 pixels with 100 {mu}m Multiplication-Sign 100 {mu}m pixel size. Each pixel works in a single photon counting mode. A single pixel contains two charge sensitive amplifiers with Krummenacher feedback scheme, two shapers, two discriminators (with independent thresholds A and B) and two 16-bit ripple counters. The data are read out via eight low voltage differential signaling (LVDS) outputs with 100 Mbps rate. The power consumption is dominated by analog blocks and it is about 23 {mu}W/pixel. The effective peaking time at the discriminator input is 30 ns and is mainly determined by the time constants of the charge sensitive amplifier (CSA). The gain is equal to 42.5 {mu}V/e{sup -} and the equivalent noise charge is 168 e{sup -} rms (with bump-bonded silicon pixel detector). Thanks to the use of trim DACs in each pixel, the effective threshold spread at the discriminator input is only 1.79 mV. The dead time of the front end electronics for a standard setting is 172 ns (paralyzable model). In the standard readout mode (when the data collection time is separated from the time necessary to readout data from the chip) the PXD18k IC works with two energy thresholds per pixel. The PXD18k can also be operated in the continuous readout mode (with a zero dead time) where one can select the number of bits readout from each pixel to optimize the PXD18k frame rate. For example, for reading out 16 bits/pixel the frame rate is 2.7 kHz and for 4 bits/pixel it rises to 7.1 kHz.

  3. Development of n-in-p pixel modules for the ATLAS Upgrade at HL-LHC

    CERN Document Server

    Macchiolo, Anna; Savic, Natascha; Terzo, Stefano

    2016-09-21

    Thin planar pixel modules are promising candidates to instrument the inner layers of the new ATLAS pixel detector for HL-LHC, thanks to the reduced contribution to the material budget and their high charge collection efficiency after irradiation. 100-200 $\\mu$m thick sensors, interconnected to FE-I4 read-out chips, have been characterized with radioactive sources and beam tests at the CERN-SPS and DESY. The results of these measurements are reported for devices before and after irradiation up to a fluence of $14\\times10^{15}$ n$_{eq}$/cm$^2$. The charge collection and tracking efficiency of the different sensor thicknesses are compared. The outlook for future planar pixel sensor production is discussed, with a focus on sensor design with the pixel pitches (50x50 and 25x100 $\\mu$m$^2$) foreseen for the RD53 Collaboration read-out chip in 65 nm CMOS technology. An optimization of the biasing structures in the pixel cells is required to avoid the hit efficiency loss presently observed in the punch-through region...

  4. Development of monolithic pixel detector with SOI technology for the ILC vertex detector

    Science.gov (United States)

    Yamada, M.; Ono, S.; Tsuboyama, T.; Arai, Y.; Haba, J.; Ikegami, Y.; Kurachi, I.; Togawa, M.; Mori, T.; Aoyagi, W.; Endo, S.; Hara, K.; Honda, S.; Sekigawa, D.

    2018-01-01

    We have been developing a monolithic pixel sensor for the International Linear Collider (ILC) vertex detector with the 0.2 μm FD-SOI CMOS process by LAPIS Semiconductor Co., Ltd. We aim to achieve a 3 μm single-point resolution required for the ILC with a 20×20 μm2 pixel. Beam bunch crossing at the ILC occurs every 554 ns in 1-msec-long bunch trains with an interval of 200 ms. Each pixel must record the charge and time stamp of a hit to identify a collision bunch for event reconstruction. Necessary functions include the amplifier, comparator, shift register, analog memory and time stamp implementation in each pixel, and column ADC and Zero-suppression logic on the chip. We tested the first prototype sensor, SOFIST ver.1, with a 120 GeV proton beam at the Fermilab Test Beam Facility in January 2017. SOFIST ver.1 has a charge sensitive amplifier and two analog memories in each pixel, and an 8-bit Wilkinson-type ADC is implemented for each column on the chip. We measured the residual of the hit position to the reconstructed track. The standard deviation of the residual distribution fitted by a Gaussian is better than 3 μm.

  5. Design and characterization of novel monolithic pixel sensors for the ALICE ITS upgrade

    CERN Document Server

    Cavicchioli, C; Giubilato, P; Hillemanns, H; Junique, A; Kugathasan, T; Mager, M; Marin Tobon, C A; Martinengo, P; Mattiazzo, S; Mugnier, H; Musa, L; Pantano, D; Rousset, J; Reidt, F; Riedler, P; Snoeys, W; Van Hoorne, J W; Yang, P

    2014-01-01

    Within the R&D activities for the upgrade of the ALICE Inner Tracking System (ITS), Monolithic Active Pixel Sensors (MAPS) are being developed and studied, due to their lower material budget (~0.3%X0~0.3%X0 in total for each inner layer) and higher granularity (View the MathML source~20μm×20μm pixels) with respect to the present pixel detector. This paper presents the design and characterization results of the Explorer0 chip, manufactured in the TowerJazz 180 nm CMOS Imaging Sensor process, based on a wafer with high-resistivity View the MathML source(ρ>1kΩcm) and 18 μm thick epitaxial layer. The chip is organized in two sub-matrices with different pixel pitches (20 μm and 30 μm), each of them containing several pixel designs. The collection electrode size and shape, as well as the distance between the electrode and the surrounding electronics, are varied; the chip also offers the possibility to decouple the charge integration time from the readout time, and to change the sensor bias. The charge c...

  6. WE-AB-207A-01: BEST IN PHYSICS (IMAGING): High-Resolution Cone-Beam CT of the Extremities and Cancellous Bone Architecture with a CMOS Detector

    Energy Technology Data Exchange (ETDEWEB)

    Cao, Q; Brehler, M; Sisniega, A; Marinetto, E; Stayman, J; Siewerdsen, J; Zbijewski, W [Johns Hopkins University, Baltimore, MD (United States); Zyazin, A; Peters, I [Teledyne DALSA, Eindhoven (Netherlands); Yorkston, J [Carestream Health, Inc, Penfield, NY (United States)

    2016-06-15

    Purpose: Extremity cone-beam CT (CBCT) with an amorphous silicon (aSi) flat-panel detector (FPD) provides low-dose volumetric imaging with high spatial resolution. We investigate the performance of the newer complementary metal-oxide semiconductor (CMOS) detectors to enhance resolution of extremities CBCT to ∼0.1 mm, enabling morphological analysis of trabecular bone. Quantitative in-vivo imaging of bone microarchitecture could present an important advance for osteoporosis and osteoarthritis diagnosis and therapy assessment. Methods: Cascaded systems models of CMOS- and FPD-based extremities CBCT were implemented. Performance was compared for a range of pixel sizes (0.05–0.4 mm), focal spot sizes (0.3–0.6 FS), and x-ray techniques (0.05–0.8 mAs/projection) using detectability of high-, low-, and all-frequency tasks for a nonprewhitening observer. Test-bench implementation of CMOS-based extremity CBCT involved a Teledyne DALSA Xineos3030HR detector with 0.099 mm pixels and a compact rotating anode x-ray source with 0.3 FS (IMD RTM37). Metrics of bone morphology obtained using CMOS-based CBCT were compared in cadaveric specimens to FPD-based system using a Varian PaxScan4030 (0.194 mm pixels). Results: Finer pixel size and reduced electronic noise for CMOS (136 e compared to 2000 e for FPD) resulted in ∼1.9× increase in detectability for high-frequency tasks and ∼1.1× increase for all-frequency tasks. Incorporation of the new x-ray source with reduced focal spot size (0.3 FS vs. 0.5 FS used on current extremities CBCT) improved detectability for CMOS-based CBCT by ∼1.7× for high-frequency tasks. Compared to FPD CBCT, the CMOS detector yielded improved agreement with micro-CT in measurements of trabecular thickness (∼1.7× reduction in relative error), bone volume (∼1.5× reduction), and trabecular spacing (∼3.5× reduction). Conclusion: Imaging performance modelling and experimentation indicate substantial improvements for high

  7. WE-AB-207A-01: BEST IN PHYSICS (IMAGING): High-Resolution Cone-Beam CT of the Extremities and Cancellous Bone Architecture with a CMOS Detector

    International Nuclear Information System (INIS)

    Cao, Q; Brehler, M; Sisniega, A; Marinetto, E; Stayman, J; Siewerdsen, J; Zbijewski, W; Zyazin, A; Peters, I; Yorkston, J

    2016-01-01

    Purpose: Extremity cone-beam CT (CBCT) with an amorphous silicon (aSi) flat-panel detector (FPD) provides low-dose volumetric imaging with high spatial resolution. We investigate the performance of the newer complementary metal-oxide semiconductor (CMOS) detectors to enhance resolution of extremities CBCT to ∼0.1 mm, enabling morphological analysis of trabecular bone. Quantitative in-vivo imaging of bone microarchitecture could present an important advance for osteoporosis and osteoarthritis diagnosis and therapy assessment. Methods: Cascaded systems models of CMOS- and FPD-based extremities CBCT were implemented. Performance was compared for a range of pixel sizes (0.05–0.4 mm), focal spot sizes (0.3–0.6 FS), and x-ray techniques (0.05–0.8 mAs/projection) using detectability of high-, low-, and all-frequency tasks for a nonprewhitening observer. Test-bench implementation of CMOS-based extremity CBCT involved a Teledyne DALSA Xineos3030HR detector with 0.099 mm pixels and a compact rotating anode x-ray source with 0.3 FS (IMD RTM37). Metrics of bone morphology obtained using CMOS-based CBCT were compared in cadaveric specimens to FPD-based system using a Varian PaxScan4030 (0.194 mm pixels). Results: Finer pixel size and reduced electronic noise for CMOS (136 e compared to 2000 e for FPD) resulted in ∼1.9× increase in detectability for high-frequency tasks and ∼1.1× increase for all-frequency tasks. Incorporation of the new x-ray source with reduced focal spot size (0.3 FS vs. 0.5 FS used on current extremities CBCT) improved detectability for CMOS-based CBCT by ∼1.7× for high-frequency tasks. Compared to FPD CBCT, the CMOS detector yielded improved agreement with micro-CT in measurements of trabecular thickness (∼1.7× reduction in relative error), bone volume (∼1.5× reduction), and trabecular spacing (∼3.5× reduction). Conclusion: Imaging performance modelling and experimentation indicate substantial improvements for high

  8. Ultralow-loss CMOS copper plasmonic waveguides

    DEFF Research Database (Denmark)

    Fedyanin, Dmitry Yu.; Yakubovsky, Dmitry I.; Kirtaev, Roman V.

    2016-01-01

    with microelectronics manufacturing technologies. This prevents plasmonic components from integration with both silicon photonics and silicon microelectronics. Here, we demonstrate ultralow-loss copper plasmonic waveguides fabricated in a simple complementary metal-oxide semiconductor (CMOS) compatible process, which...

  9. Latch-up in CMOS integrated circuits

    International Nuclear Information System (INIS)

    Estreich, D.B.; Dutton, R.W.

    1978-04-01

    An analysis is presented of latch-up in CMOS integrated circuits. A latch-up prediction algorithm has been developed and used to evaluate methods to control latch-up. Experimental verification of the algorithm is demonstrated

  10. Nanometer CMOS ICs from basics to ASICs

    CERN Document Server

    J M Veendrick, Harry

    2017-01-01

    This textbook provides a comprehensive, fully-updated introduction to the essentials of nanometer CMOS integrated circuits. It includes aspects of scaling to even beyond 12nm CMOS technologies and designs. It clearly describes the fundamental CMOS operating principles and presents substantial insight into the various aspects of design implementation and application. Coverage includes all associated disciplines of nanometer CMOS ICs, including physics, lithography, technology, design, memories, VLSI, power consumption, variability, reliability and signal integrity, testing, yield, failure analysis, packaging, scaling trends and road blocks. The text is based upon in-house Philips, NXP Semiconductors, Applied Materials, ASML, IMEC, ST-Ericsson, TSMC, etc., courseware, which, to date, has been completed by more than 4500 engineers working in a large variety of related disciplines: architecture, design, test, fabrication process, packaging, failure analysis and software.

  11. Fast readout logic interfacing a 256-pixel matrix of a dual-layer 3D device

    International Nuclear Information System (INIS)

    Gabrielli, A; Giorgi, F; Villa, M; Morsani, F

    2010-01-01

    A prototype of a 3D ASIC built up of a fast readout architecture, with sparsification capabilities, which interfaces with a matrix of a 256-pixel sensor, was recently submitted. The chosen technology is CMOS Chartered 130 nm as it is compatible with the Tezzaron facility to interconnect face-to-face two silicon wafers allowing for a vertical integration structure by means of through-silicon-vias. Particularly, the readout logic uses one layer that will be stacked on a sensor layer at the end of the fabrication process.

  12. Fast readout logic interfacing a 256-pixel matrix of a dual-layer 3D device

    Energy Technology Data Exchange (ETDEWEB)

    Gabrielli, A; Giorgi, F; Villa, M [INFN-Bologna and Physics Department, University of Bologna, Viale Berti Pichat, 6/2, 40127, Bologna (Italy); Morsani, F, E-mail: alessandro.gabrielli@bo.infn.i [INFN-Pisa and University of Pisa, Largo B. Pontecorvo, 3, 56127, Pisa (Italy)

    2010-07-15

    A prototype of a 3D ASIC built up of a fast readout architecture, with sparsification capabilities, which interfaces with a matrix of a 256-pixel sensor, was recently submitted. The chosen technology is CMOS Chartered 130 nm as it is compatible with the Tezzaron facility to interconnect face-to-face two silicon wafers allowing for a vertical integration structure by means of through-silicon-vias. Particularly, the readout logic uses one layer that will be stacked on a sensor layer at the end of the fabrication process.

  13. ATLAS pixel IBL modules construction experience and developments for future upgrade

    Energy Technology Data Exchange (ETDEWEB)

    Gaudiello, A.

    2015-10-01

    The first upgrade of the ATLAS Pixel Detector is the Insertable B-Layer (IBL), installed in May 2014 in the core of ATLAS. Two different silicon sensor technologies, planar n-in-n and 3D, are used. Sensors are connected with the new generation 130 nm IBM CMOS FE-I4 read-out chip via solder bump-bonds. Production quality control tests were set up to verify and rate the performance of the modules before integration into staves. An overview of module design and construction, the quality control results and production yield will be discussed, as well as future developments foreseen for future detector upgrades.

  14. Variationen und ihre Kompensation in CMOS Digitalschaltungen

    OpenAIRE

    Baumann, Thomas

    2010-01-01

    Variationen bei der Herstellung und während des Betriebs von CMOS Schaltungen beeinflussen deren Geschwindigkeit und erschweren die Verifikation der in der Spezifikation zugesicherten Eigenschaften. In dieser Arbeit wird eine abstraktionsebenenübergreifende Vorgehensweise zur Abschätzung des Einflusses von Prozess- und betriebsbedingten Umgebungsvariationen auf die Geschwindigkeit einer Schaltung vorgestellt. Neben Untersuchungen der Laufzeitsensitivität in low-power CMOS Technologien von...

  15. Batch Processing of CMOS Compatible Feedthroughs

    DEFF Research Database (Denmark)

    Rasmussen, F.E.; Heschel, M.; Hansen, Ole

    2003-01-01

    . The feedthrough technology employs a simple solution to the well-known CMOS compatibility issue of KOH by protecting the CMOS side of the wafer using sputter deposited TiW/Au. The fabricated feedthroughs exhibit excellent electrical performance having a serial resistance of 40 mOmega and a parasitic capacitance...... of 2.5 pF. (C) 2003 Elsevier Science B.V. All rights reserved....

  16. A 2D 4×4 Channel Readout ASIC for Pixelated CdTe Detectors for Medical Imaging Applications.

    Science.gov (United States)

    Macias-Montero, Jose-Gabriel; Sarraj, Maher; Chmeissani, Mokhtar; Martínez, Ricardo; Puigdengoles, Carles

    2015-10-01

    We present a 16-channel readout integrated circuit (ROIC) with nanosecond-resolution time to digital converter (TDC) for pixelated Cadmium Telluride (CdTe) gamma-ray detectors. The 4 × 4 pixel array ROIC is the proof of concept of the 10 × 10 pixel array readout ASIC for positron-emission tomography (PET) scanner, positron-emission mammography (PEM) scanner, and Compton gamma camera. The electronics of each individual pixel integrates an analog front-end with switchable gain, an analog to digital converter (ADC), configuration registers, and a 4-state digital controller. For every detected photon, the pixel electronics provides the energy deposited in the detector with 10-bit resolution, and a fast trigger signal for time stamp. The ASIC contains the 16-pixel matrix electronics, a digital controller, five global voltage references, a TDC, a temperature sensor, and a band-gap based current reference. The ASIC has been fabricated with TSMC 0.25 μ m mixed-signal CMOS technology and occupies an area of 5.3 mm × 6.8 mm. The TDC shows a resolution of 95.5 ps, a precision of 600 ps at full width half maximum (FWHM), and a power consumption of 130 μ W. In acquisition mode, the total power consumption of every pixel is 200 μ W. An equivalent noise charge (ENC) of 160 e - RMS at maximum gain and negative polarity conditions has been measured at room temperature.

  17. Signal-Conditioning Block of a 1 × 200 CMOS Detector Array for a Terahertz Real-Time Imaging System

    Directory of Open Access Journals (Sweden)

    Jong-Ryul Yang

    2016-03-01

    Full Text Available A signal conditioning block of a 1 × 200 Complementary Metal-Oxide-Semiconductor (CMOS detector array is proposed to be employed with a real-time 0.2 THz imaging system for inspecting large areas. The plasmonic CMOS detector array whose pixel size including an integrated antenna is comparable to the wavelength of the THz wave for the imaging system, inevitably carries wide pixel-to-pixel variation. To make the variant outputs from the array uniform, the proposed signal conditioning block calibrates the responsivity of each pixel by controlling the gate bias of each detector and the voltage gain of the lock-in amplifiers in the block. The gate bias of each detector is modulated to 1 MHz to improve the signal-to-noise ratio of the imaging system via the electrical modulation by the conditioning block. In addition, direct current (DC offsets of the detectors in the array are cancelled by initializing the output voltage level from the block. Real-time imaging using the proposed signal conditioning block is demonstrated by obtaining images at the rate of 19.2 frame-per-sec of an object moving on the conveyor belt with a scan width of 20 cm and a scan speed of 25 cm/s.

  18. The FPGA Pixel Array Detector

    International Nuclear Information System (INIS)

    Hromalik, Marianne S.; Green, Katherine S.; Philipp, Hugh T.; Tate, Mark W.; Gruner, Sol M.

    2013-01-01

    A proposed design for a reconfigurable x-ray Pixel Array Detector (PAD) is described. It operates by integrating a high-end commercial field programmable gate array (FPGA) into a 3-layer device along with a high-resistivity diode detection layer and a custom, application-specific integrated circuit (ASIC) layer. The ASIC layer contains an energy-discriminating photon-counting front end with photon hits streamed directly to the FPGA via a massively parallel, high-speed data connection. FPGA resources can be allocated to perform user defined tasks on the pixel data streams, including the implementation of a direct time autocorrelation function (ACF) with time resolution down to 100 ns. Using the FPGA at the front end to calculate the ACF reduces the required data transfer rate by several orders of magnitude when compared to a fast framing detector. The FPGA-ASIC high-speed interface, as well as the in-FPGA implementation of a real-time ACF for x-ray photon correlation spectroscopy experiments has been designed and simulated. A 16×16 pixel prototype of the ASIC has been fabricated and is being tested. -- Highlights: ► We describe the novelty and need for the FPGA Pixel Array Detector. ► We describe the specifications and design of the Diode, ASIC and FPGA layers. ► We highlight the Autocorrelation Function (ACF) for speckle as an example application. ► Simulated FPGA output calculates the ACF for different input bitstreams to 100 ns. ► Reduced data transfer rate by 640× and sped up real-time ACF by 100× other methods.

  19. Low complexity pixel-based halftone detection

    Science.gov (United States)

    Ok, Jiheon; Han, Seong Wook; Jarno, Mielikainen; Lee, Chulhee

    2011-10-01

    With the rapid advances of the internet and other multimedia technologies, the digital document market has been growing steadily. Since most digital images use halftone technologies, quality degradation occurs when one tries to scan and reprint them. Therefore, it is necessary to extract the halftone areas to produce high quality printing. In this paper, we propose a low complexity pixel-based halftone detection algorithm. For each pixel, we considered a surrounding block. If the block contained any flat background regions, text, thin lines, or continuous or non-homogeneous regions, the pixel was classified as a non-halftone pixel. After excluding those non-halftone pixels, the remaining pixels were considered to be halftone pixels. Finally, documents were classified as pictures or photo documents by calculating the halftone pixel ratio. The proposed algorithm proved to be memory-efficient and required low computation costs. The proposed algorithm was easily implemented using GPU.

  20. Fabrication of CMOS-compatible nanopillars for smart bio-mimetic CMOS image sensors

    KAUST Repository

    Saffih, Faycal; Elshurafa, Amro M.; Mohammad, Mohammad Ali; Nelson-Fitzpatrick, Nathan E.; Evoy, S.

    2012-01-01

    . The fabrication of the nanopillars was carried out keeping the CMOS process in mind to ultimately obtain a CMOS-compatible process. This work serves as an initial step in the ultimate objective of integrating photo-sensors based on these nanopillars seamlessly

  1. Design and characterization of novel monolithic pixel sensors for the ALICE ITS upgrade

    Science.gov (United States)

    Cavicchioli, C.; Chalmet, P. L.; Giubilato, P.; Hillemanns, H.; Junique, A.; Kugathasan, T.; Mager, M.; Marin Tobon, C. A.; Martinengo, P.; Mattiazzo, S.; Mugnier, H.; Musa, L.; Pantano, D.; Rousset, J.; Reidt, F.; Riedler, P.; Snoeys, W.; Van Hoorne, J. W.; Yang, P.

    2014-11-01

    Within the R&D activities for the upgrade of the ALICE Inner Tracking System (ITS), Monolithic Active Pixel Sensors (MAPS) are being developed and studied, due to their lower material budget ( 0.3 %X0 in total for each inner layer) and higher granularity ( 20 μm × 20 μm pixels) with respect to the present pixel detector. This paper presents the design and characterization results of the Explorer0 chip, manufactured in the TowerJazz 180 nm CMOS Imaging Sensor process, based on a wafer with high-resistivity (ρ > 1 kΩ cm) and 18 μm thick epitaxial layer. The chip is organized in two sub-matrices with different pixel pitches (20 μm and 30 μm), each of them containing several pixel designs. The collection electrode size and shape, as well as the distance between the electrode and the surrounding electronics, are varied; the chip also offers the possibility to decouple the charge integration time from the readout time, and to change the sensor bias. The charge collection properties of the different pixel variants implemented in Explorer0 have been studied using a 55Fe X-ray source and 1-5 GeV/c electrons and positrons. The sensor capacitance has been estimated, and the effect of the sensor bias has also been examined in detail. A second version of the Explorer0 chip (called Explorer1) has been submitted for production in March 2013, together with a novel circuit with in-pixel discrimination and a sparsified readout. Results from these submissions are also presented.

  2. Design and characterization of novel monolithic pixel sensors for the ALICE ITS upgrade

    Energy Technology Data Exchange (ETDEWEB)

    Cavicchioli, C., E-mail: costanza.cavicchioli@cern.ch [CERN European Organization for Nuclear Research, CH-1211 Genève 23 (Switzerland); Chalmet, P.L. [MIND, Archamps Technopole, Saint-Julien-en-Genevois, Cedex 74166 (France); Giubilato, P. [Università and INFN, Padova (Italy); Hillemanns, H.; Junique, A.; Kugathasan, T.; Mager, M. [CERN European Organization for Nuclear Research, CH-1211 Genève 23 (Switzerland); Marin Tobon, C.A. [Valencia Polytechnic University, Valencia (Spain); Martinengo, P. [CERN European Organization for Nuclear Research, CH-1211 Genève 23 (Switzerland); Mattiazzo, S. [Università and INFN, Padova (Italy); Mugnier, H. [MIND, Archamps Technopole, Saint-Julien-en-Genevois, Cedex 74166 (France); Musa, L. [CERN European Organization for Nuclear Research, CH-1211 Genève 23 (Switzerland); Pantano, D. [Università and INFN, Padova (Italy); Rousset, J. [MIND, Archamps Technopole, Saint-Julien-en-Genevois, Cedex 74166 (France); Reidt, F. [CERN European Organization for Nuclear Research, CH-1211 Genève 23 (Switzerland); Physikalisches Institut, Ruprecht-Karls-Universitaet Heidelberg, Heidelberg (Germany); Riedler, P.; Snoeys, W. [CERN European Organization for Nuclear Research, CH-1211 Genève 23 (Switzerland); Van Hoorne, J.W. [CERN European Organization for Nuclear Research, CH-1211 Genève 23 (Switzerland); Technische Universitaet Wien, Vienna (Austria); Yang, P. [Central China Normal University CCNU, Wuhan (China)

    2014-11-21

    Within the R and D activities for the upgrade of the ALICE Inner Tracking System (ITS), Monolithic Active Pixel Sensors (MAPS) are being developed and studied, due to their lower material budget (∼0.3%X{sub 0} in total for each inner layer) and higher granularity (∼20μm×20μm pixels) with respect to the present pixel detector. This paper presents the design and characterization results of the Explorer0 chip, manufactured in the TowerJazz 180 nm CMOS Imaging Sensor process, based on a wafer with high-resistivity (ρ>1kΩcm) and 18 μm thick epitaxial layer. The chip is organized in two sub-matrices with different pixel pitches (20 μm and 30 μm), each of them containing several pixel designs. The collection electrode size and shape, as well as the distance between the electrode and the surrounding electronics, are varied; the chip also offers the possibility to decouple the charge integration time from the readout time, and to change the sensor bias. The charge collection properties of the different pixel variants implemented in Explorer0 have been studied using a {sup 55}Fe X-ray source and 1–5 GeV/c electrons and positrons. The sensor capacitance has been estimated, and the effect of the sensor bias has also been examined in detail. A second version of the Explorer0 chip (called Explorer1) has been submitted for production in March 2013, together with a novel circuit with in-pixel discrimination and a sparsified readout. Results from these submissions are also presented.

  3. Design and characterization of novel monolithic pixel sensors for the ALICE ITS upgrade

    International Nuclear Information System (INIS)

    Cavicchioli, C.; Chalmet, P.L.; Giubilato, P.; Hillemanns, H.; Junique, A.; Kugathasan, T.; Mager, M.; Marin Tobon, C.A.; Martinengo, P.; Mattiazzo, S.; Mugnier, H.; Musa, L.; Pantano, D.; Rousset, J.; Reidt, F.; Riedler, P.; Snoeys, W.; Van Hoorne, J.W.; Yang, P.

    2014-01-01

    Within the R and D activities for the upgrade of the ALICE Inner Tracking System (ITS), Monolithic Active Pixel Sensors (MAPS) are being developed and studied, due to their lower material budget (∼0.3%X 0 in total for each inner layer) and higher granularity (∼20μm×20μm pixels) with respect to the present pixel detector. This paper presents the design and characterization results of the Explorer0 chip, manufactured in the TowerJazz 180 nm CMOS Imaging Sensor process, based on a wafer with high-resistivity (ρ>1kΩcm) and 18 μm thick epitaxial layer. The chip is organized in two sub-matrices with different pixel pitches (20 μm and 30 μm), each of them containing several pixel designs. The collection electrode size and shape, as well as the distance between the electrode and the surrounding electronics, are varied; the chip also offers the possibility to decouple the charge integration time from the readout time, and to change the sensor bias. The charge collection properties of the different pixel variants implemented in Explorer0 have been studied using a 55 Fe X-ray source and 1–5 GeV/c electrons and positrons. The sensor capacitance has been estimated, and the effect of the sensor bias has also been examined in detail. A second version of the Explorer0 chip (called Explorer1) has been submitted for production in March 2013, together with a novel circuit with in-pixel discrimination and a sparsified readout. Results from these submissions are also presented

  4. Submission of the First Full Scale Prototype Chip for Upgraded ATLAS Pixel Detector at LHC, FE-I4A

    CERN Document Server

    Barbero, M; The ATLAS collaboration; Beccherle, R; Darbo, G; Dube, S; Elledge, D; Fleury, J; Fougeron, D; Garcia-Sciveres, M; Gensolen, F; Gnani, D; Gromov, V; Jensen, F; Hemperek, T; Karagounis, M; Kluit, R; Kruth, A; Mekkaoui, A; Menouni, M; Schipper, JD; Wermes, N; Zivkovic, V

    2010-01-01

    A new ATLAS pixel chip FE-I4 is being developed for use in upgraded LHC luminosity environments, including the near-term Insertable B-Layer (IBL) upgrade. FE-I4 is designed in a 130nm CMOS technology, presenting advantages in terms of radiation tolerance and digital logic density compared to the 250nm CMOS technology used for the current ATLAS pixel IC, FE-I3. The FE-I4 architecture is based on an array of 80x336 pixels, each 50x250um^2, consisting of analog and digital sections. In the summer 2010, a first full scale prototype FE-I4A was submitted for an engineering run. This IC features the full scale pixel array as well as the complex periphery of the future full-size FE-I4. The FE-I4A contains also various extra test features which should prove very useful for the chip characterization, but deviate from the needs for standard operation of the final FE-I4 for IBL. In this paper, focus will be brought to the various features implemented in the FE-I4A submission, while also underlining the main differences b...

  5. Low-power priority Address-Encoder and Reset-Decoder data-driven readout for Monolithic Active Pixel Sensors for tracker system

    Science.gov (United States)

    Yang, P.; Aglieri, G.; Cavicchioli, C.; Chalmet, P. L.; Chanlek, N.; Collu, A.; Gao, C.; Hillemanns, H.; Junique, A.; Kofarago, M.; Keil, M.; Kugathasan, T.; Kim, D.; Kim, J.; Lattuca, A.; Marin Tobon, C. A.; Marras, D.; Mager, M.; Martinengo, P.; Mazza, G.; Mugnier, H.; Musa, L.; Puggioni, C.; Rousset, J.; Reidt, F.; Riedler, P.; Snoeys, W.; Siddhanta, S.; Usai, G.; van Hoorne, J. W.; Yi, J.

    2015-06-01

    Active Pixel Sensors used in High Energy Particle Physics require low power consumption to reduce the detector material budget, low integration time to reduce the possibilities of pile-up and fast readout to improve the detector data capability. To satisfy these requirements, a novel Address-Encoder and Reset-Decoder (AERD) asynchronous circuit for a fast readout of a pixel matrix has been developed. The AERD data-driven readout architecture operates the address encoding and reset decoding based on an arbitration tree, and allows us to readout only the hit pixels. Compared to the traditional readout structure of the rolling shutter scheme in Monolithic Active Pixel Sensors (MAPS), AERD can achieve a low readout time and a low power consumption especially for low hit occupancies. The readout is controlled at the chip periphery with a signal synchronous with the clock, allows a good digital and analogue signal separation in the matrix and a reduction of the power consumption. The AERD circuit has been implemented in the TowerJazz 180 nm CMOS Imaging Sensor (CIS) process with full complementary CMOS logic in the pixel. It works at 10 MHz with a matrix height of 15 mm. The energy consumed to read out one pixel is around 72 pJ. A scheme to boost the readout speed to 40 MHz is also discussed. The sensor chip equipped with AERD has been produced and characterised. Test results including electrical beam measurement are presented.

  6. Low-power priority Address-Encoder and Reset-Decoder data-driven readout for Monolithic Active Pixel Sensors for tracker system

    International Nuclear Information System (INIS)

    Yang, P.; Aglieri, G.; Cavicchioli, C.; Chalmet, P.L.; Chanlek, N.; Collu, A.; Gao, C.; Hillemanns, H.; Junique, A.; Kofarago, M.; Keil, M.; Kugathasan, T.; Kim, D.; Kim, J.; Lattuca, A.; Marin Tobon, C.A.; Marras, D.; Mager, M.; Martinengo, P.; Mazza, G.

    2015-01-01

    Active Pixel Sensors used in High Energy Particle Physics require low power consumption to reduce the detector material budget, low integration time to reduce the possibilities of pile-up and fast readout to improve the detector data capability. To satisfy these requirements, a novel Address-Encoder and Reset-Decoder (AERD) asynchronous circuit for a fast readout of a pixel matrix has been developed. The AERD data-driven readout architecture operates the address encoding and reset decoding based on an arbitration tree, and allows us to readout only the hit pixels. Compared to the traditional readout structure of the rolling shutter scheme in Monolithic Active Pixel Sensors (MAPS), AERD can achieve a low readout time and a low power consumption especially for low hit occupancies. The readout is controlled at the chip periphery with a signal synchronous with the clock, allows a good digital and analogue signal separation in the matrix and a reduction of the power consumption. The AERD circuit has been implemented in the TowerJazz 180 nm CMOS Imaging Sensor (CIS) process with full complementary CMOS logic in the pixel. It works at 10 MHz with a matrix height of 15 mm. The energy consumed to read out one pixel is around 72 pJ. A scheme to boost the readout speed to 40 MHz is also discussed. The sensor chip equipped with AERD has been produced and characterised. Test results including electrical beam measurement are presented

  7. Low-power priority Address-Encoder and Reset-Decoder data-driven readout for Monolithic Active Pixel Sensors for tracker system

    Energy Technology Data Exchange (ETDEWEB)

    Yang, P., E-mail: yangping0710@126.com [Central China Normal University, Wuhan (China); Aglieri, G.; Cavicchioli, C. [CERN, 1210 Geneva 23 (Switzerland); Chalmet, P.L. [MIND, Archamps (France); Chanlek, N. [Suranaree University of Technology, Nakhon Ratchasima (Thailand); Collu, A. [University of Cagliari, Cagliari (Italy); INFN (Italy); Gao, C. [Central China Normal University, Wuhan (China); Hillemanns, H.; Junique, A. [CERN, 1210 Geneva 23 (Switzerland); Kofarago, M. [CERN, 1210 Geneva 23 (Switzerland); University of Utrecht, Utrecht (Netherlands); Keil, M.; Kugathasan, T. [CERN, 1210 Geneva 23 (Switzerland); Kim, D. [Dongguk and Yonsei University, Seoul (Korea, Republic of); Kim, J. [Pusan National University, Busan (Korea, Republic of); Lattuca, A. [University of Torino, Torino (Italy); INFN (Italy); Marin Tobon, C.A. [CERN, 1210 Geneva 23 (Switzerland); Marras, D. [University of Cagliari, Cagliari (Italy); INFN (Italy); Mager, M.; Martinengo, P. [CERN, 1210 Geneva 23 (Switzerland); Mazza, G. [University of Torino, Torino (Italy); INFN (Italy); and others

    2015-06-11

    Active Pixel Sensors used in High Energy Particle Physics require low power consumption to reduce the detector material budget, low integration time to reduce the possibilities of pile-up and fast readout to improve the detector data capability. To satisfy these requirements, a novel Address-Encoder and Reset-Decoder (AERD) asynchronous circuit for a fast readout of a pixel matrix has been developed. The AERD data-driven readout architecture operates the address encoding and reset decoding based on an arbitration tree, and allows us to readout only the hit pixels. Compared to the traditional readout structure of the rolling shutter scheme in Monolithic Active Pixel Sensors (MAPS), AERD can achieve a low readout time and a low power consumption especially for low hit occupancies. The readout is controlled at the chip periphery with a signal synchronous with the clock, allows a good digital and analogue signal separation in the matrix and a reduction of the power consumption. The AERD circuit has been implemented in the TowerJazz 180 nm CMOS Imaging Sensor (CIS) process with full complementary CMOS logic in the pixel. It works at 10 MHz with a matrix height of 15 mm. The energy consumed to read out one pixel is around 72 pJ. A scheme to boost the readout speed to 40 MHz is also discussed. The sensor chip equipped with AERD has been produced and characterised. Test results including electrical beam measurement are presented.

  8. Backside illuminated CMOS-TDI line scan sensor for space applications

    Science.gov (United States)

    Cohen, Omer; Ofer, Oren; Abramovich, Gil; Ben-Ari, Nimrod; Gershon, Gal; Brumer, Maya; Shay, Adi; Shamay, Yaron

    2018-05-01

    A multi-spectral backside illuminated Time Delayed Integration Radiation Hardened line scan sensor utilizing CMOS technology was designed for continuous scanning Low Earth Orbit small satellite applications. The sensor comprises a single silicon chip with 4 independent arrays of pixels where each array is arranged in 2600 columns with 64 TDI levels. A multispectral optical filter whose spectral responses per array are adjustable per system requirement is assembled at the package level. A custom 4T Pixel design provides the required readout speed, low-noise, very low dark current, and high conversion gains. A 2-phase internally controlled exposure mechanism improves the sensor's dynamic MTF. The sensor high level of integration includes on-chip 12 bit per pixel analog to digital converters, on-chip controller, and CMOS compatible voltage levels. Thus, the power consumption and the weight of the supporting electronics are reduced, and a simple electrical interface is provided. An adjustable gain provides a Full Well Capacity ranging from 150,000 electrons up to 500,000 electrons per column and an overall readout noise per column of less than 120 electrons. The imager supports line rates ranging from 50 to 10,000 lines/sec, with power consumption of less than 0.5W per array. Thus, the sensor is characterized by a high pixel rate, a high dynamic range and a very low power. To meet a Latch-up free requirement RadHard architecture and design rules were utilized. In this paper recent electrical and electro-optical measurements of the sensor's Flight Models will be presented for the first time.

  9. Mapping Electrical Crosstalk in Pixelated Sensor Arrays

    Science.gov (United States)

    Seshadri, Suresh (Inventor); Cole, David (Inventor); Smith, Roger M. (Inventor); Hancock, Bruce R. (Inventor)

    2017-01-01

    The effects of inter pixel capacitance in a pixilated array may be measured by first resetting all pixels in the array to a first voltage, where a first image is read out, followed by resetting only a subset of pixels in the array to a second voltage, where a second image is read out, where the difference in the first and second images provide information about the inter pixel capacitance. Other embodiments are described and claimed.

  10. Operational Experience with the ATLAS Pixel Detector

    CERN Document Server

    Djama, Fares; The ATLAS collaboration

    2017-01-01

    Run 2 of the LHC collider sets new challenges to track and vertex reconstruction because of its higher energy, pileup and luminosity. The ATLAS tracking performance relies critically on the Pixel Detector. Therefore, in view of Run 2, the ATLAS collaboration has constructed the first 4-layer pixel detector in Particle Physics by installing a new pixel layer, called Insertable B-Layer (IBL). Operational experience and performance of the 4-layer Pixel Detector during Run 2 are presented.

  11. The Belle II DEPFET pixel vertex detector. Development of a full-scale module prototype

    International Nuclear Information System (INIS)

    Lemarenko, Mikhail

    2013-11-01

    The Belle II experiment, which will start after 2015 at the SuperKEKB accelerator in Japan, will focus on the precision measurement of the CP-violation mechanism and on the search for physics beyond the Standard Model. A new detection system with an excellent spatial resolution and capable of coping with considerably increased background is required. To address this challenge, a pixel detector based on DEPFET technology has been proposed. A new all silicon integrated circuit, called Data Handling Processor (DHP), is implemented in 65 nm CMOS technology. It is designed to steer the detector and preprocess the generated data. The scope of this thesis covers DHP tests and optimization as well the development of its test environment, which is the first Full-Scale Module Prototype of the DEPFET Pixel Vertex detector.

  12. CVD diamond pixel detectors for LHC experiments

    CERN Document Server

    Wedenig, R; Bauer, C; Berdermann, E; Bergonzo, P; Bogani, F; Borchi, E; Brambilla, A; Bruzzi, Mara; Colledani, C; Conway, J; Dabrowski, W; Delpierre, P A; Deneuville, A; Dulinski, W; van Eijk, B; Fallou, A; Fizzotti, F; Foulon, F; Friedl, M; Gan, K K; Gheeraert, E; Grigoriev, E; Hallewell, G D; Hall-Wilton, R; Han, S; Hartjes, F G; Hrubec, Josef; Husson, D; Kagan, H; Kania, D R; Kaplon, J; Karl, C; Kass, R; Knöpfle, K T; Krammer, Manfred; Lo Giudice, A; Lü, R; Manfredi, P F; Manfredotti, C; Marshall, R D; Meier, D; Mishina, M; Oh, A; Pan, L S; Palmieri, V G; Pernicka, Manfred; Peitz, A; Pirollo, S; Polesello, P; Pretzl, Klaus P; Procario, M; Re, V; Riester, J L; Roe, S; Roff, D G; Rudge, A; Runólfsson, O; Russ, J; Schnetzer, S R; Sciortino, S; Speziali, V; Stelzer, H; Stone, R; Suter, B; Tapper, R J; Tesarek, R J; Trawick, M L; Trischuk, W; Vittone, E; Wagner, A; Walsh, A M; Weilhammer, Peter; White, C; Zeuner, W; Ziock, H J; Zöller, M

    1999-01-01

    This paper reviews the development of CVD diamond pixel detectors. The preparation of the diamond pixel sensors for bump-bonding to the pixel readout electronics for the LHC and the results from beam tests carried out at CERN are described. (9 refs).

  13. CVD diamond pixel detectors for LHC experiments

    Energy Technology Data Exchange (ETDEWEB)

    Wedenig, R.; Adam, W.; Bauer, C.; Berdermann, E.; Bergonzo, P.; Bogani, F.; Borchi, E.; Brambilla, A.; Bruzzi, M.; Colledani, C.; Conway, J.; Dabrowski, W.; Delpierre, P.; Deneuville, A.; Dulinski, W.; Eijk, B. van; Fallou, A.; Fizzotti, F.; Foulon, F.; Friedl, M.; Gan, K.K.; Gheeraert, E.; Grigoriev, E.; Hallewell, G.; Hall-Wilton, R.; Han, S.; Hartjes, F.; Hrubec, J.; Husson, D.; Kagan, H.; Kania, D.; Kaplon, J.; Karl, C.; Kass, R.; Knoepfle, K.T.; Krammer, M.; Logiudice, A.; Lu, R.; Manfredi, P.F.; Manfredotti, C.; Marshall, R.D.; Meier, D.; Mishina, M.; Oh, A.; Pan, L.S.; Palmieri, V.G.; Pernicka, M.; Peitz, A.; Pirollo, S.; Polesello, P.; Pretzl, K.; Procario, M.; Re, V.; Riester, J.L.; Roe, S.; Roff, D.; Rudge, A.; Runolfsson, O.; Russ, J.; Schnetzer, S.; Sciortino, S.; Speziali, V.; Stelzer, H.; Stone, R.; Suter, B.; Tapper, R.J.; Tesarek, R.; Trawick, M.; Trischuk, W.; Vittone, E.; Wagner, A.; Walsh, A.M.; Weilhammer, P.; White, C.; Zeuner, W.; Ziock, H.; Zoeller, M.; Blanquart, L.; Breugnion, P.; Charles, E.; Ciocio, A.; Clemens, J.C.; Dao, K.; Einsweiler, K.; Fasching, D.; Fischer, P.; Joshi, A.; Keil, M.; Klasen, V.; Kleinfelder, S.; Laugier, D.; Meuser, S.; Milgrome, O.; Mouthuy, T.; Richardson, J.; Sinervo, P.; Treis, J.; Wermes, N

    1999-08-01

    This paper reviews the development of CVD diamond pixel detectors. The preparation of the diamond pixel sensors for bump-bonding to the pixel readout electronics for the LHC and the results from beam tests carried out at CERN are described.

  14. CVD diamond pixel detectors for LHC experiments

    International Nuclear Information System (INIS)

    Wedenig, R.; Adam, W.; Bauer, C.; Berdermann, E.; Bergonzo, P.; Bogani, F.; Borchi, E.; Brambilla, A.; Bruzzi, M.; Colledani, C.; Conway, J.; Dabrowski, W.; Delpierre, P.; Deneuville, A.; Dulinski, W.; Eijk, B. van; Fallou, A.; Fizzotti, F.; Foulon, F.; Friedl, M.; Gan, K.K.; Gheeraert, E.; Grigoriev, E.; Hallewell, G.; Hall-Wilton, R.; Han, S.; Hartjes, F.; Hrubec, J.; Husson, D.; Kagan, H.; Kania, D.; Kaplon, J.; Karl, C.; Kass, R.; Knoepfle, K.T.; Krammer, M.; Logiudice, A.; Lu, R.; Manfredi, P.F.; Manfredotti, C.; Marshall, R.D.; Meier, D.; Mishina, M.; Oh, A.; Pan, L.S.; Palmieri, V.G.; Pernicka, M.; Peitz, A.; Pirollo, S.; Polesello, P.; Pretzl, K.; Procario, M.; Re, V.; Riester, J.L.; Roe, S.; Roff, D.; Rudge, A.; Runolfsson, O.; Russ, J.; Schnetzer, S.; Sciortino, S.; Speziali, V.; Stelzer, H.; Stone, R.; Suter, B.; Tapper, R.J.; Tesarek, R.; Trawick, M.; Trischuk, W.; Vittone, E.; Wagner, A.; Walsh, A.M.; Weilhammer, P.; White, C.; Zeuner, W.; Ziock, H.; Zoeller, M.; Blanquart, L.; Breugnion, P.; Charles, E.; Ciocio, A.; Clemens, J.C.; Dao, K.; Einsweiler, K.; Fasching, D.; Fischer, P.; Joshi, A.; Keil, M.; Klasen, V.; Kleinfelder, S.; Laugier, D.; Meuser, S.; Milgrome, O.; Mouthuy, T.; Richardson, J.; Sinervo, P.; Treis, J.; Wermes, N.

    1999-01-01

    This paper reviews the development of CVD diamond pixel detectors. The preparation of the diamond pixel sensors for bump-bonding to the pixel readout electronics for the LHC and the results from beam tests carried out at CERN are described

  15. CMS has a heart of pixels

    CERN Multimedia

    2003-01-01

    In the immediate vicinity of the collision point, CMS will be equipped with pixel detectors consisting of no fewer than 50 million pixels measuring 150 microns along each side. Each of the pixels, which receive the signal, is connected to its own electronic circuit by a tiny sphere (seen here in the electron microscope image) measuring 15 to 20 microns in diameter.

  16. Installation of a TCT set-up for characterization of novel HV-CMOS planar silicon sensors

    CERN Document Server

    Marx, Lisa

    2013-01-01

    For future upgrades of the LHC it is necessary to develop new tracking detectors: more radiation hard and cost efficient pixel detectors with high spacial resolution are required for the planned high luminosity version of the LHC (HL-LHC). For future tracking devices HV-CMOS active pixel sensors are great candidates since they fulfill all the demands mentioned above. First prototypes of these sensors are assembled on custom test boards and together with FE-I4 readout chips they make up the first test pixel detectors. One approach for testing these chips is through using lasers to induce electron-hole-pairs into the depletion zone of the sensor chip diodes to simulate an ionizing particle crossing through the bulk. Comparison measurements of irradiated/non-irradiated sensors are used to explore the radiation hardness of the sensors.

  17. Modelling and simulation of pixelated photon counting X-ray detectors for imaging; Modellierung und Simulation physikalischer Eigenschaften photonenzaehlender Roentgenpixeldetektoren fuer die Bildgebung

    Energy Technology Data Exchange (ETDEWEB)

    Durst, Juergen

    2008-07-22

    detail for Silicon and CdTe as sensor materials. For CdTe these results are shown beside the energy response spectrum for an ideal energy deposition detector, the ideal response of a Medipix2 detector and for the charge summing mode of the Medipix3 detector. (orig.)

  18. Neutron absorbed dose in a pacemaker CMOS

    Energy Technology Data Exchange (ETDEWEB)

    Borja H, C. G.; Guzman G, K. A.; Valero L, C. Y.; Banuelos F, A.; Hernandez D, V. M.; Vega C, H. R. [Universidad Autonoma de Zacatecas, Unidad Academica de Estudios Nucleares, Calle Cipres No. 10, Fracc. La Penuela, 98068 Zacatecas (Mexico); Paredes G, L., E-mail: candy_borja@hotmail.com [ININ, Carretera Mexico-Toluca s/n, 52750 Ocoyoacac, Estado de Mexico (Mexico)

    2011-11-15

    The absorbed dose due to neutrons by a Complementary Metal Oxide Semiconductor (CMOS) has been estimated using Monte Carlo methods. Eventually a person with a pacemaker becomes a patient that must be treated by radiotherapy with a linear accelerator; the pacemaker has integrated circuits as CMOS that are sensitive to intense and pulsed radiation fields. When the Linac is working in Bremsstrahlung mode an undesirable neutron field is produced due to photoneutron reactions; these neutrons could damage the CMOS putting the patient at risk during the radiotherapy treatment. In order to estimate the neutron dose in the CMOS a Monte Carlo calculation was carried out where a full radiotherapy vault room was modeled with a W-made spherical shell in whose center was located the source term of photoneutrons produced by a Linac head operating in Bremsstrahlung mode at 18 MV. In the calculations a phantom made of tissue equivalent was modeled while a beam of photoneutrons was applied on the phantom prostatic region using a field of 10 x 10 cm{sup 2}. During simulation neutrons were isotropically transported from the Linac head to the phantom chest, here a 1 {theta} x 1 cm{sup 2} cylinder made of polystyrene was modeled as the CMOS, where the neutron spectrum and the absorbed dose were estimated. Main damages to CMOS are by protons produced during neutron collisions protective cover made of H-rich materials, here the neutron spectrum that reach the CMOS was calculated showing a small peak around 0.1 MeV and a larger peak in the thermal region, both connected through epithermal neutrons. (Author)

  19. Experimental observation of the improvement in MTF from backthinning a CMOS direct electron detector

    International Nuclear Information System (INIS)

    McMullan, G.; Faruqi, A.R.; Henderson, R.; Guerrini, N.; Turchetta, R.; Jacobs, A.; Hoften, G. van

    2009-01-01

    The advantages of backthinning monolithic active pixel sensors (MAPS) based on complementary metal oxide semiconductor (CMOS) direct electron detectors for electron microscopy have been discussed previously; they include better spatial resolution (modulation transfer function or MTF) and efficiency at all spatial frequencies (detective quantum efficiency or DQE). It was suggested that a 'thin' CMOS detector would have the most outstanding properties because of a reduction in the proportion of backscattered electrons. In this paper we show, theoretically (using Monte Carlo simulations of electron trajectories) and experimentally that this is indeed the case. The modulation transfer functions of prototype backthinned CMOS direct electron detectors have been measured at 300 keV. At zero spatial frequency, in non-backthinned 700-μm-thick detectors, the backscattered component makes up over 40% of the total signal but, by backthinning to 100, 50 or 35 μm, this can be reduced to 25%, 15% and 10%, respectively. For the 35 μm backthinned detector, this reduction in backscatter increases the MTF by 40% for spatial frequencies between 0.1 and 1.0 Nyquist. As discussed in the main text, reducing backscattering in backthinned detectors should also improve DQE.

  20. An investigation of medical radiation detection using CMOS image sensors in smartphones

    Energy Technology Data Exchange (ETDEWEB)

    Kang, Han Gyu [Department of Senior Healthcare, Graduate School of Eulji University, Daejeon 301-746 (Korea, Republic of); Song, Jae-Jun [Department of Otorhinolaryngology-Head & Neck Surgery, Korea University, Guro Hospital,148, Gurodong-ro, Guro-gu, Seoul 152-703 (Korea, Republic of); Lee, Kwonhee [Graduate Program in Bio-medical Science, Korea University, 2511 Sejong-ro, Sejong City 339-770 (Korea, Republic of); Nam, Ki Chang [Department of Medical Engineering, College of Medicine, Dongguk University, 32 Dongguk-ro, Goyang-si, Gyeonggi-do 410-820 (Korea, Republic of); Hong, Seong Jong; Kim, Ho Chul [Department of Radiological Science, Eulji University, 553 Yangji-dong, Sujeong-gu, Seongnam-si, Gyeonggi-do 431-713 (Korea, Republic of)

    2016-07-01

    Medical radiation exposure to patients has increased with the development of diagnostic X-ray devices and multi-channel computed tomography (CT). Despite the fact that the low-dose CT technique can significantly reduce medical radiation exposure to patients, the increasing number of CT examinations has increased the total medical radiation exposure to patients. Therefore, medical radiation exposure to patients should be monitored to prevent cancers caused by diagnostic radiation. However, without using thermoluminescence or glass dosimeters, it is hardly measure doses received by patients during medical examinations accurately. Hence, it is necessary to develop radiation monitoring devices and algorithms that are reasonably priced and have superior radiation detection efficiencies. The aim of this study is to investigate the feasibility of medical dose measurement using complementary metal oxide semiconductor (CMOS) sensors in smartphone cameras with an algorithm to extract the X-ray interacted pixels. We characterized the responses of the CMOS sensors in a smartphone with respect to the X-rays generated by a general diagnostic X-ray system. The characteristics of the CMOS sensors in a smartphone camera, such as dose response linearity, dose rate dependence, energy dependence, angular dependence, and minimum detectable activity were evaluated. The high energy gamma-ray of 662 keV from Cs-137 can be detected using the smartphone camera. The smartphone cameras which employ the developed algorithm can detect medical radiations.