Properties of dual codes defined by nondegenerate forms

Directory of Open Access Journals (Sweden)

Steve Szabo

2017-01-01

Full Text Available Dual codes are defined with respect to non-degenerate sesquilinear or bilinear forms over a finite Frobenius ring. These dual codes have the properties one expects from a dual code: they satisfy a double-dual property, they have cardinality complementary to that of the primal code, and they satisfy the MacWilliams identities for the Hamming weight.

MacWilliams Identity for M-Spotty Weight Enumerator

Science.gov (United States)

Suzuki, Kazuyoshi; Fujiwara, Eiji

M-spotty byte error control codes are very effective for correcting/detecting errors in semiconductor memory systems that employ recent high-density RAM chips with wide I/O data (e.g., 8, 16, or 32bits). In this case, the width of the I/O data is one byte. A spotty byte error is defined as random t-bit errors within a byte of length b bits, where 1 le t ≤ b. Then, an error is called an m-spotty byte error if at least one spotty byte error is present in a byte. M-spotty byte error control codes are characterized by the m-spotty distance, which includes the Hamming distance as a special case for t =1 or t = b. The MacWilliams identity provides the relationship between the weight distribution of a code and that of its dual code. The present paper presents the MacWilliams identity for the m-spotty weight enumerator of m-spotty byte error control codes. In addition, the present paper clarifies that the indicated identity includes the MacWilliams identity for the Hamming weight enumerator as a special case.

Macs for dummies

CERN Document Server

Baig, Edward C

2014-01-01

Get the most out of your Mac with this comprehensive guide Macs For Dummies, 13th Edition is the ultimate guide to your Mac, fully updated to include information about the latest updates. The book walks you through troubleshooting, syncing mobile devices, integrating Windows, and more, so you can take advantage of everything Macs have to offer. Whether you're a new user, a recent convert, or you just want to get the most out of your Mac, this book puts all the information you need in one place. Discover what makes Macs superior computing machines. Learn the basics, from mastering the Dock and

A Dual Digital Signal Processor VME Board for Instrumentation and Control Applications

International Nuclear Information System (INIS)

H. Dong; R. Flood; C. Hovater; J. Musson

2001-01-01

A Dual Digital Signal Processing VME Board is being developed for the CEBAF Beam Current Monitor system at Jefferson Lab. It is a versatile general-purpose digital signal processing board using an open architecture, which allows for adaptation to various applications. The base design uses two independent Texas Instrument (TI) TMS320C6711, which are 900 MFLOPS floating-point digital signal processors (DSP). Applications that require a fixed point DSP can be implemented by replacing the baseline DSP with the pin-for-pin compatible TMS320C6211. Both parallel and serial protocols have been implemented for communicating with off board devices. The initial implementation makes use of TI Multi-channel Serial protocol and VME bus protocol. Other communication protocols can be implemented by reprogramming the FPGA. Each DSP is equipped with FLASH PROM and SDRAM for program and data storage. Additionally, each DSP has 16 bits of digital I/O, two digital analog converters, and two analog to digital converters. Dual 160 pins mezzanine connectors provide expansion capability without design modifications. The mezzanine interface conforms to the TI Expansion Daughter Card Interface standard. The design can be manufactured with a reduced chip set without redesigning the printed circuit board. For example, it can be implemented as a single-channel DSP with no analog I/O. The board supports JTAG 1149 boundary scan to facilitate testing, debugging, and programming. It is fully programmable using software development tools such as TI Code Composer Studio and a JTAG emulator such as Spectrum Digital DS510PP-PLUS. Using these tools allows one program the flash memory and FPGA through the JTAG ports, thus eliminating the need for a separate ROM/FPGA programmer. This work supported by U.S. DOE Contract No. DE-AC05-84ER40150

NMRFx Processor: a cross-platform NMR data processing program

International Nuclear Information System (INIS)

Norris, Michael; Fetler, Bayard; Marchant, Jan; Johnson, Bruce A.

2016-01-01

NMRFx Processor is a new program for the processing of NMR data. Written in the Java programming language, NMRFx Processor is a cross-platform application and runs on Linux, Mac OS X and Windows operating systems. The application can be run in both a graphical user interface (GUI) mode and from the command line. Processing scripts are written in the Python programming language and executed so that the low-level Java commands are automatically run in parallel on computers with multiple cores or CPUs. Processing scripts can be generated automatically from the parameters of NMR experiments or interactively constructed in the GUI. A wide variety of processing operations are provided, including methods for processing of non-uniformly sampled datasets using iterative soft thresholding. The interactive GUI also enables the use of the program as an educational tool for teaching basic and advanced techniques in NMR data analysis.

NMRFx Processor: a cross-platform NMR data processing program

Energy Technology Data Exchange (ETDEWEB)

Norris, Michael; Fetler, Bayard [One Moon Scientific, Inc. (United States); Marchant, Jan [University of Maryland Baltimore County, Howard Hughes Medical Institute (United States); Johnson, Bruce A., E-mail: bruce.johnson@asrc.cuny.edu [One Moon Scientific, Inc. (United States)

2016-08-15

NMRFx Processor is a new program for the processing of NMR data. Written in the Java programming language, NMRFx Processor is a cross-platform application and runs on Linux, Mac OS X and Windows operating systems. The application can be run in both a graphical user interface (GUI) mode and from the command line. Processing scripts are written in the Python programming language and executed so that the low-level Java commands are automatically run in parallel on computers with multiple cores or CPUs. Processing scripts can be generated automatically from the parameters of NMR experiments or interactively constructed in the GUI. A wide variety of processing operations are provided, including methods for processing of non-uniformly sampled datasets using iterative soft thresholding. The interactive GUI also enables the use of the program as an educational tool for teaching basic and advanced techniques in NMR data analysis.

Evaluation of the Intel Westmere-EP server processor

CERN Document Server

Jarp, S; Leduc, J; Nowak, A; CERN. Geneva. IT Department

2010-01-01

In this paper we report on a set of benchmark results recently obtained by CERN openlab when comparing the 6-core “Westmere-EP” processor with Intel’s previous generation of the same microarchitecture, the “Nehalem-EP”. The former is produced in a new 32nm process, the latter in 45nm. Both platforms are dual-socket servers. Multiple benchmarks were used to get a good understanding of the performance of the new processor. We used both industry-standard benchmarks, such as SPEC2006, and specific High Energy Physics benchmarks, representing both simulation of physics detectors and data analysis of physics events. Before summarizing the results we must stress the fact that benchmarking of modern processors is a very complex affair. One has to control (at least) the following features: processor frequency, overclocking via Turbo mode, the number of physical cores in use, the use of logical cores via Simultaneous Multi-Threading (SMT), the cache sizes available, the memory configuration installed, as well...

Mac Security Bible

CERN Document Server

Kissell, Joe

2010-01-01

Your essential, no-holds-barred guide to Mac security threats and solutions. Myth number one: Macs are safer than PCs. Not really, says author Joe Kissell, named one of MacTech's "25 Most Influential People" in the Mac community for 2008. In this timely guide, he not only takes you beyond the myths, he also delves into the nitty-gritty of each potential threat, helping you weigh the pros and cons of the solutions you might choose. Learn to measure risk versus inconvenience, make informed decisions, and protect your Mac computers, your privacy, and your data with this essential guide.

iMac portable genius

CERN Document Server

Hart-Davis, Guy

2010-01-01

The most up-to-date coverage on the latest iMac advice, tools, and shortcuts Cool and useful tips, full-color screenshots, and savvy advice show you how to get the most out of your iMac. Fully updated to cover the iMac's latest features and capabilities, this guide is packed with indispensible information on iLife '09 and Mac OS X Snow Leopard, and shows you how to customize your iMac in a way that it will work best for you.Explores all the bells and whistles of the iMac, including the new Magic Mouse, iLife apps such as iPhoto and iMovie, and Mac OS X Snow LeopardShows yo

MacBook for dummies

CERN Document Server

Chambers , Mark L

2014-01-01

Make friends with your MacBook the fun and easy way! Ultra-light, ultra-fast, and ultra-powerful, the MacBook is the coolest laptop in town, and longtime Mac guru Mark L. Chambers is just the guy to help you get to know your MacBook in no time. Take a closer look at the latest features, get the lowdown on OS X, unleash your creative forces with iLife, take care of business with the iWork applications, and sync it all with iCloud with the expert advice in this bestselling MacBook guide. Whether this is your first MacBook or your first laptop, period, you''ll learn to navigate the Mac desktop, c

UNIBUS processor interface for a FASTBUS data acquisition system

International Nuclear Information System (INIS)

Larwill, M.; Lagerlund, T.D.; Barsotti, E.; Taff, L.M.; Franzen, J.

1981-01-01

Current work on a FASTBUS data acquisition system at Fermilab is described. The system will consist of three pieces of FASTBUS hardware: a UNIBUS processor interface (UPI), a dual-ported bulk memory, and a FASTBUS ''event builder'' (i.e., data acquisition processor). Primary efforts have been on specifying and constructing a UPI. The present specification includes capability for all basic FASTBUS operations, including list processing of consecutive FASTBUS operations. Some possible FASTBUS data acquisition system architectures employing the UPI are discussed along with some detailed specifications of the UPI itself

Windows for Intel Macs

CERN Document Server

Ogasawara, Todd

2008-01-01

Even the most devoted Mac OS X user may need to use Windows XP, or may just be curious about XP and its applications. This Short Cut is a concise guide for OS X users who need to quickly get comfortable and become productive with Windows XP basics on their Macs. It covers: Security Networking ApplicationsMac users can easily install and use Windows thanks to Boot Camp and Parallels Desktop for Mac. Boot Camp lets an Intel-based Mac install and boot Windows XP on its own hard drive partition. Parallels Desktop for Mac uses virtualization technology to run Windows XP (or other operating systems

Evaluation of the Intel Nehalem-EX server processor

CERN Document Server

Jarp, S; Leduc, J; Nowak, A; CERN. Geneva. IT Department

2010-01-01

In this paper we report on a set of benchmark results recently obtained by the CERN openlab by comparing the 4-socket, 32-core Intel Xeon X7560 server with the previous generation 4-socket server, based on the Xeon X7460 processor. The Xeon X7560 processor represents a major change in many respects, especially the memory sub-system, so it was important to make multiple comparisons. In most benchmarks the two 4-socket servers were compared. It should be underlined that both servers represent the “top of the line” in terms of frequency. However, in some cases, it was important to compare systems that integrated the latest processor features, such as QPI links, Symmetric multithreading and over-clocking via Turbo mode, and in such situations the X7560 server was compared to a dual socket L5520 based system with an identical frequency of 2.26 GHz. Before summarizing the results we must stress the fact that benchmarking of modern processors is a very complex affair. One has to control (at least) the following ...

iMac for dummies

CERN Document Server

Chambers, Mark L

2014-01-01

Do it all with your iMac and this bestselling For Dummies guide! You're still a little giddy from finally scoring your new iMac, and you can't wait to get started. Even if you're already in love with your iMac, it helps to have a little guidance to really get the most out of this ultimate all-in-one computer. This updated edition of iMac For Dummies is the ideal way to learn the iMac fundamentals from setting up and personalizing your machine to importing files, making FaceTime video calls, surfing the web, using your favorite programs and apps, and everything in between. Trusted Mac guru Mark

Mac at Work

CERN Document Server

Sparks, David

2011-01-01

Bridge the gap between using a Mac at home and at the office. Now that you love your Mac at home, you want to use one at the office without missing a beat of productivity or professionalism. This unique guide shows you how.  You'll find best Mac business practices for handling word processing, spreadsheet and presentation creation, task and project management, and graphics. The book also explores topics such as hardware maintenance, how to synchronize with multiple computers, data backup, and communication with Windows networks.: Covers the nuts and bolts of using a Mac at work, including sync

Analysis of 3gpp-MAC and two-key 3gpp-MAC

DEFF Research Database (Denmark)

Knudsen, Lars Ramkilde; Mitchell, C.J.

2003-01-01

Forgery and key-recovery attacks are described on the 3gpp-MAC scheme, proposed for inclusion in the 3gpp specification. Three main classes of attack are given, all of which operate whether or not truncation is applied to the MAC value. Attacks in the first class use a large number of 'chosen MAC...

MacBook Teach Yourself VISUALLY

CERN Document Server

Miser, Brad

2010-01-01

Like the MacBook itself, Teach Yourself VISUALLY MacBook, Second Edition is designed to be visually appealing, while providing excellent functionality at the same time. By using this book, MacBook users will be empowered to do everyday tasks quickly and easily. From such basic steps as powering on or shutting down the MacBook, working on the Mac desktop with the Dashboard and its widgets to running Windows applications, Teach Yourself VISUALLY MacBook, Second Edition covers all the vital information and provides the help and support a reader needs—in many ways it's like having a Mac Genius at

iMac pocket genius

CERN Document Server

Hart-Davis, Guy

2010-01-01

If you want to get the very most out of your iMac, put this savvy Portable Genius guide to work. Want to make the most of the new Magic Mouse and the latest iLife apps? Set up a wireless network using your iMac's AirPort card? Watch television on your iMac, or show iMac videos and movies on your television? You'll find cool and useful Genius tips, full-color screenshots, and pages of easy-to-access shortcuts and tools that will save you time and let you enjoy your iMac to the max.

Enterprise Mac Administrator's Guide

CERN Document Server

Edge, Charles; Hunter, Beau

2009-01-01

Charles Edge, Zack Smith, and Beau Hunter provide detailed explanations of the technology required for large-scale Mac OS X deployments and show you how to integrate it with other operating systems and applications. Enterprise Mac Administrator's Guide addresses the growing size and spread of Mac OS X deployments in corporations and institutions worldwide. In some cases, this is due to the growth of traditional Mac environments, but for the most part it has to do with "switcher" campaigns, where Windows and/or Linux environments are migrating to Mac OS X. However, there is a steep cu

Implementation of an Ethernet-Based Communication Channel for the Patmos Processor

DEFF Research Database (Denmark)

Pezzarossa, Luca; Kenn Toft, Jakob; Lønbæk, Jesper

The Patmos processor, which is used as the intellectual property of the T-CREST platform, is only equipped with a RS-232 serial port for communication with the outside world. The serial port is a minimal input/output device with a limited speed and without native networking features. An Ethernet 10....../100BASE-T IEEE 802.3 based communication channel is a reliable and high speed communication interface (10/100 Mbits/s) that also supports networking. This technical report presents an implementation of an Ethernet-based communication channel for the Patmos processor, targeting the Terasic DE2......-115 development board. We have designed the hardware to interface the EthMac Ethernet controller from OpenCores to Patmos and to the physical chip of the development board, and we have implemented a software library to drive the controller and to support some essential protocols. The design was implemented...

iMac for dummies

CERN Document Server

Chambers, Mark L

2012-01-01

The bestselling guide to the ultimate all-in-one computer—now updated and revised throughout! If you're looking for speed, performance, and power, the iMac is the ultimate all-in-one computer. From its superior performance, powerful operating system, and amazing applications, the iMac is one awesome machine, and the fun, friendly, and approachable style of iMac For Dummies is an ideal way to get started with the basics. You'll learn the fundamentals of the iMac including setting up and customizing your iMac and the software that comes with it, importing files from your old computer, send

Macs For Dummies, Pocket Edition

CERN Document Server

Baig, Edward C

2011-01-01

The fun and easy way to make the most of your wonderful Mac. Simply Mac-nificent — all the cool things your Mac can do! This handy guide helps you figure out the nuts and bolts of your Mac. Navigate the Mac desktop, use the Safari Web browser to surf the Internet, e-mail photos to friends and family, create and print documents, rip audio CDs, and more. The fun begins right here!. Open the book and find: How to set up and configure your Mac; Tips for getting around on the Mac desktop; Steps for setting up an e-mail account and browsing the Internet; Details about the free programs that come wit

Enterprise Mac administrators guide

CERN Document Server

Smith, William

2015-01-01

IT departments everywhere will be integrating Macs and Mac OS X into their IT infrastructure and this book will tell them how to do it. It will serve as an authoritative, useful and frequently referenced book on Mac OS X administration.

Mac OS X Forensics

Science.gov (United States)

Craiger, Philip; Burke, Paul

This paper describes procedures for conducting forensic examinations of Apple Macs running Mac OS X. The target disk mode is used to create a forensic duplicate of a Mac hard drive and preview it. Procedures are discussed for recovering evidence from allocated space, unallocated space, slack space and virtual memory. Furthermore, procedures are described for recovering trace evidence from Mac OS X default email, web browser and instant messaging applications, as well as evidence pertaining to commands executed from a terminal.

Reconfigurable signal processor designs for advanced digital array radar systems

Science.gov (United States)

Suarez, Hernan; Zhang, Yan (Rockee); Yu, Xining

2017-05-01

The new challenges originated from Digital Array Radar (DAR) demands a new generation of reconfigurable backend processor in the system. The new FPGA devices can support much higher speed, more bandwidth and processing capabilities for the need of digital Line Replaceable Unit (LRU). This study focuses on using the latest Altera and Xilinx devices in an adaptive beamforming processor. The field reprogrammable RF devices from Analog Devices are used as analog front end transceivers. Different from other existing Software-Defined Radio transceivers on the market, this processor is designed for distributed adaptive beamforming in a networked environment. The following aspects of the novel radar processor will be presented: (1) A new system-on-chip architecture based on Altera's devices and adaptive processing module, especially for the adaptive beamforming and pulse compression, will be introduced, (2) Successful implementation of generation 2 serial RapidIO data links on FPGA, which supports VITA-49 radio packet format for large distributed DAR processing. (3) Demonstration of the feasibility and capabilities of the processor in a Micro-TCA based, SRIO switching backplane to support multichannel beamforming in real-time. (4) Application of this processor in ongoing radar system development projects, including OU's dual-polarized digital array radar, the planned new cylindrical array radars, and future airborne radars.

I-MAC: an incorporation MAC for wireless sensor networks

Science.gov (United States)

Zhao, Jumin; Li, Yikun; Li, Dengao; Lin, Xiaojie

2017-11-01

This paper proposes an innovative MAC protocol called I-MAC. Protocol for wireless sensor networks, which combines the advantages of collision tolerance and collision cancellation. The protocol increases the number of antenna in wireless sensor nodes. The purpose is to monitor the occurrence of packet collisions by increasing the number of antenna in real time. The built-in identity structure is used in the frame structure in order to help the sending node to identify the location of the receiving node after a data packet collision is detected. Packets can be recovered from where the conflict occurred. In this way, we can monitor the conflict for a fixed period of time. It can improve the channel utilisation through changing the transmission probability of collision nodes and solve the problem of hidden terminal through collision feedback mechanism. We have evaluated our protocol. Our results show that the throughput of I-MAC is 5 percentage points higher than that of carrier sense multiple access/collision notification. The network utilisation of I-MAC is more than 92%.

High speed vision processor with reconfigurable processing element array based on full-custom distributed memory

Science.gov (United States)

Chen, Zhe; Yang, Jie; Shi, Cong; Qin, Qi; Liu, Liyuan; Wu, Nanjian

2016-04-01

In this paper, a hybrid vision processor based on a compact full-custom distributed memory for near-sensor high-speed image processing is proposed. The proposed processor consists of a reconfigurable processing element (PE) array, a row processor (RP) array, and a dual-core microprocessor. The PE array includes two-dimensional processing elements with a compact full-custom distributed memory. It supports real-time reconfiguration between the PE array and the self-organized map (SOM) neural network. The vision processor is fabricated using a 0.18 µm CMOS technology. The circuit area of the distributed memory is reduced markedly into 1/3 of that of the conventional memory so that the circuit area of the vision processor is reduced by 44.2%. Experimental results demonstrate that the proposed design achieves correct functions.

TreeMAC: Localized TDMA MAC protocol for real-time high-data-rate sensor networks

Science.gov (United States)

Song, W.-Z.; Huang, R.; Shirazi, B.; Husent, R.L.

2009-01-01

Earlier sensor network MAC protocols focus on energy conservation in low-duty cycle applications, while some recent applications involve real-time high-data-rate signals. This motivates us to design an innovative localized TDMA MAC protocol to achieve high throughput and low congestion in data collection sensor networks, besides energy conservation. TreeMAC divides a time cycle into frames and frame into slots. Parent determines children's frame assigmnent based on their relative bandwidth demand, and each node calculates its own slot assignment based on its hop-count to the sink. This innovative 2-dimensional frame-slot assignment algorithm has the following nice theory properties. Firstly, given any node, at any time slot, there is at most one active sender in its neighborhood (includ ing itself). Secondly, the packet scheduling with TreelMAC is bufferless, which therefore minimizes the probability of network congestion. Thirdly, the data throughput to gateway is at least 1/3 of the optimum assuming reliable links. Our experiments on a 24 node test bed demonstrate that TreeMAC protocol significantly improves network throughput and energy efficiency, by comparing to the TinyOS's default CSMA MAC protocol and a recent TDMA MAC protocol Funneling-MAC[8]. ?? 2009 IEEE.

Gotcha! Macs lose their innocence

CERN Multimedia

Computer Security Team

2012-01-01

Still believe your Mac is secure because Microsoft PCs fall prey to viruses and worms but Macs don’t? Time to wake up! This year has seen the first major compromise of Macs worldwide*. How is yours doing?   The “Flashback” Trojan is affecting Apple’s own variant of Java and compromises Macs via so-called drive-by infections, i.e. when you visit an appropriately prepared (infected!) website - and this might not necessarily be a site with questionable contents, but could well be a popular, reputable one. Security Companies worldwide have been monitoring this particular Trojan for a while and have estimated that more than half a million Macs were compromised. Connected to a few central command and control servers, the compromised Macs were then supporting the malicious activity of the bad guys! Fortunately, the security companies have now been able to take over those command and control servers and stop their destructive drive. So, Mac users, face the f...

The periplasmic membrane proximal domain of MacA acts as a switch in stimulation of ATP hydrolysis by MacB transporter.

Science.gov (United States)

Modali, Sita D; Zgurskaya, Helen I

2011-08-01

Escherichia coli MacAB-TolC is a tripartite macrolide efflux transporter driven by hydrolysis of ATP. In this complex, MacA is the periplasmic membrane fusion protein that stimulates the activity of MacB transporter and establishes the link with the outer membrane channel TolC. The molecular mechanism by which MacA stimulates MacB remains unknown. Here, we report that the periplasmic membrane proximal domain of MacA plays a critical role in functional MacA-MacB interactions and stimulation of MacB ATPase activity. Binding of MacA to MacB stabilizes the ATP-bound conformation of MacB, whereas interactions with both MacB and TolC affect the conformation of MacA. A single G353A substitution in the C-terminus of MacA inactivates MacAB-TolC function by changing the conformation of the membrane proximal domain of MacA and disrupting the proper assembly of the MacA-MacB complex. We propose that MacA acts in transport by promoting MacB transition into the closed ATP-bound conformation and in this respect, is similar to the periplasmic solute-binding proteins. © 2011 Blackwell Publishing Ltd.

Power Saving MAC Protocols for WSNs and Optimization of S-MAC Protocol

Directory of Open Access Journals (Sweden)

Simarpreet Kaur

2012-11-01

Full Text Available Low power MAC protocols have received a lot of consideration in the last few years because of their influence on the lifetime of wireless sensor networks. Since, sensors typically operate on batteries, replacement of which is often difficult. A lot of work has been done to minimize the energy expenditure and prolong the sensor lifetime through energy efficient designs, across layers. Meanwhile, the sensor network should be able to maintain a certain throughput in order to fulfill the QoS requirements of the end user, and to ensure the constancy of the network. This paper introduces different types of MAC protocols used for WSNs and proposes S‐MAC, a Medium‐Access Control protocol designed for Wireless Sensor Networks. S‐MAC uses a few innovative techniques to reduce energy consumption and support selfconfiguration. A new protocol is suggested to improve the energy efficiency, latency and throughput of existing MAC protocol for WSNs. A modification of the protocol is then proposed to eliminate the need for some nodes to stay awake longer than the other nodes which improves the energy efficiency, latency and throughput and hence increases the life span of a wireless sensor network.

Mycobacterium Avium Complex (MAC)

Science.gov (United States)

... sweat, and saliva red-orange (may stain contact lenses); can interfere with birth control pills. Many drug interactions. CAN MAC BE PREVENTED? The bacteria that cause MAC are very common. It is ...

Upgrade of the PreProcessor System for the ATLAS Level-1 Calorimeter Trigger

CERN Document Server

Khomich, A

2010-01-01

The ATLAS Level-1 Calorimeter Trigger is a hardware-based pipelined system designed to identify high-pT objects in the ATLAS calorimeters within a fixed latency of 2.5\\,us. It consists of three subsystems: the PreProcessor which conditions and digitizes analogue signals and two digital processors. The majority of the PreProcessor's tasks are performed on a dense Multi-Chip Module(MCM) consisting of FADCs, a time-adjustment and digital processing ASICs, and LVDS serialisers designed and implemented in ten years old technologies. An MCM substitute, based on today's components (dual channel FADCs and FPGA), is being developed to profit from state-of-the-art electronics and to enhance the flexibility of the digital processing. Development and first test results are presented.

Upgrade of the PreProcessor System for the ATLAS LVL1 Calorimeter Trigger

CERN Document Server

Khomich, A; The ATLAS collaboration

2010-01-01

The ATLAS Level-1 Calorimeter Trigger is a hardware-based pipelined system designed to identify high-pT objects in the ATLAS calorimeters within a fixed latency of 2.5us. It consists of three subsystems: the PreProcessor which conditions and digitizes analogue signals and two digital processors. The majority of the PreProcessor's tasks are performed on a dense Multi-Chip Module(MCM) consisting of FADCs, a time-adjustment and digital processing ASICs, and LVDS serializers designed and implemented in ten years old technologies. An MCM substitute, based on today's components (dual channel FADCs and FPGA), is being developed to profit from state-of-the-art electronics and to enhance the flexibility of the digital processing. Development and first test results are presented.

Cognitive MAC designs for OSA networks

CERN Document Server

Derakhshani, Mahsa

2014-01-01

This SpringerBrief presents recent advances in the cognitive MAC designs for opportunistic spectrum access (OSA) networks. It covers the basic MAC functionalities and MAC enhancements of IEEE 802.11. Later chapters discuss the existing MAC protocols for OSA and classify them based on characteristic features. The authors provide new research in adaptive carrier sensing-based MAC designs tailored for OSA, which optimize spectrum utilization and ensure a peaceful coexistence of licensed and unlicensed systems. Analytically devised via optimization and game-theoretic approaches, these adaptive M

The periplasmic membrane proximal domain of MacA acts as a switch in stimulation of ATP hydrolysis by MacB transporter

OpenAIRE

Modali, Sita D.; Zgurskaya, Helen I.

2011-01-01

Escherichia coli MacAB-TolC is a tri-partite macrolide efflux transporter driven by hydrolysis of ATP. In this complex, MacA is the periplasmic membrane fusion protein that stimulates the activity of MacB transporter and establishes the link with the outer membrane channel TolC. The molecular mechanism by which MacA stimulates MacB remains unknown. Here, we report that the periplasmic membrane proximal domain of MacA plays a critical role in functional MacA-MacB interactions and stimulation o...

Learn Excel 2011 for Mac

CERN Document Server

Hart-Davis, Guy

2011-01-01

Microsoft Excel 2011 for Mac OS X is a powerful application, but many of its most impressive features can be difficult to find. Learn Excel 2011 for Mac by Guy Hart-Davis is a practical, hands-on approach to learning all of the details of Excel 2011 in order to get work done efficiently on Mac OS X. From using formulas and functions to creating databases, from analyzing data to automating tasks, you'll learn everything you need to know to put this powerful application to use for a variety of tasks. What you'll learn * The secrets of the Excel for Mac interface! * How to create effective workbo

Mac Programming for Absolute Beginners

CERN Document Server

Wang, Wallace

2011-01-01

Want to learn how to program on your Mac? Not sure where to begin? Best-selling author Wallace Wang will explain how to get started with Cocoa, Objective-C, and Xcode. Whether you are an experienced Windows coder moving to the Mac, or you are completely new to programming, you'll see how the basic design of a Mac OS X program works, how Objective-C differs from other languages you may have used, and how to use the Xcode development environment. Most importantly, you'll learn how to use elements of the Cocoa framework to create windows, store data, and respond to users in your own Mac programs.

Switching to a Mac For Dummies

CERN Document Server

Reinhold, Arnold

2007-01-01

Thinking of making the switch from your PC to a Mac? Congratulations! You're in for a great, virus-free ride. And Switching to Mac For Dummies makes it smoother than you ever imagined. From buying the Mac that's right for you to transferring your files to breaking your old Windows habits and learning to do things the (much easier) Mac way, it makes the whole process practically effortless. Whether you've been using Windows XP, Vista, or even Linux, you'll find simple, straightforward ways to make your transition go smoothly. That will leave you plenty of time to get familiar with Mac'

Enterprise Mac Managed Preferences

CERN Document Server

Marczak, Edward

2010-01-01

Many systems administrators on the Mac need a way to manage machine configuration after initial setup and deployment. Apple's Managed Preferences system (also known as MCX) is under-documented, often misunderstood, and sometimes outright unknown by sys admins. MCX is usually deployed in conjunction with an OS X server, but it can also be used in Windows environments or where no dedicated server exists at all. Enterprise Mac Managed Preferences is the definitive guide to Apple's Managed Client technology. With this book, you'll get the following: * An example-driven guide to Mac OS X Managed Pr

SACRB-MAC: A High-Capacity MAC Protocol for Cognitive Radio Sensor Networks in Smart Grid.

Science.gov (United States)

Yang, Zhutian; Shi, Zhenguo; Jin, Chunlin

2016-03-31

The Cognitive Radio Sensor Network (CRSN) is considered as a viable solution to enhance various aspects of the electric power grid and to realize a smart grid. However, several challenges for CRSNs are generated due to the harsh wireless environment in a smart grid. As a result, throughput and reliability become critical issues. On the other hand, the spectrum aggregation technique is expected to play an important role in CRSNs in a smart grid. By using spectrum aggregation, the throughput of CRSNs can be improved efficiently, so as to address the unique challenges of CRSNs in a smart grid. In this regard, we proposed Spectrum Aggregation Cognitive Receiver-Based MAC (SACRB-MAC), which employs the spectrum aggregation technique to improve the throughput performance of CRSNs in a smart grid. Moreover, SACRB-MAC is a receiver-based MAC protocol, which can provide a good reliability performance. Analytical and simulation results demonstrate that SACRB-MAC is a promising solution for CRSNs in a smart grid.

Mac OS X Tiger for Unix Geeks

CERN Document Server

Jepson, Brian

2005-01-01

If you're one of the many Unix developers drawn to Mac OS X for its Unix core, you'll find yourself in surprisingly unfamiliar territory. Unix and Mac OS X are kissing cousins, but there are enough pitfalls and minefields in going from one to another that even a Unix guru can stumble, and most guides to Mac OS X are written for Mac aficionados. For a Unix developer, approaching Tiger from the Mac side is a bit like learning Russian by reading the Russian side of a Russian-English dictionary. Fortunately, O'Reilly has been the Unix authority for over 25 years, and in Mac OS X Tiger for Unix Gee

Mac protocols for cyber-physical systems

CERN Document Server

Xia, Feng

2015-01-01

This book provides a literature review of various wireless MAC protocols and techniques for achieving real-time and reliable communications in the context of cyber-physical systems (CPS). The evaluation analysis of IEEE 802.15.4 for CPS therein will give insights into configuration and optimization of critical design parameters of MAC protocols. In addition, this book also presents the design and evaluation of an adaptive MAC protocol for medical CPS, which exemplifies how to facilitate real-time and reliable communications in CPS by exploiting IEEE 802.15.4 based MAC protocols. This book wil

AeroMACS system characterization and demonstrations

Science.gov (United States)

Kerczewski, R. J.; Apaza, R. D.; Dimond, R. P.

This The Aeronautical Mobile Airport Communications System (AeroMACS) is being developed to provide a new broadband wireless communications capability for safety critical communications in the airport surface domain, providing connectivity to aircraft and other ground vehicles as well as connections between other critical airport fixed assets. AeroMACS development has progressed from requirements definition through technology definition, prototype deployment and testing, and now into national and international standards development. The first prototype AeroMACS system has been deployed at the Cleveland Hopkins International Airport (CLE) and the adjacent NASA Glenn Research Center (GRC). During the past three years, extensive technical testing has taken place to characterize the performance of the AeroMACS prototype and provide technical support for the standards development process. The testing has characterized AeroMACS link and network performance over a variety of conditions for both fixed and mobile data transmission and has included basic system performance testing and fixed and mobile applications testing. This paper provides a summary of the AeroMACS performance testing and the status of standardization activities that the testing supports.

Concurrent Programming in Mac OS X and iOS Unleash Multicore Performance with Grand Central Dispatch

CERN Document Server

Nahavandipoor, Vandad

2011-01-01

Now that multicore processors are coming to mobile devices, wouldn't it be great to take advantage of all those cores without having to manage threads? This concise book shows you how to use Apple's Grand Central Dispatch (GCD) to simplify programming on multicore iOS devices and Mac OS X. Managing your application's resources on more than one core isn't easy, but it's vital. Apps that use only one core in a multicore environment will slow to a crawl. If you know how to program with Cocoa or Cocoa Touch, this guide will get you started with GCD right away, with many examples to help you writ

MacBook All-in-One For Dummies

CERN Document Server

Chambers, Mark L

2011-01-01

Get comfortable and confident with your MacBook! Combining the fun-but-straightforward content of nine minibooks, this new edition of MacBook All-in-One For Dummies delivers helpful coverage of the rich features and essential tools you need to know to use the MacBook to its fullest potential. You'll learn an array of MacBook basics while veteran author Mark Chambers walks you through setting up your MacBook, running programs, finding files with Finder, searching with Spotlight, keeping track with Address Book, enjoying music with iTunes, creating cool multimedia projects with iLife, and more.

Mac OS X Lion Server For Dummies

CERN Document Server

Rizzo, John

2011-01-01

The perfect guide to help administrators set up Apple's Mac OS X Lion Server With the overwhelming popularity of the iPhone and iPad, more Macs are appearing in corporate settings. The newest version of Mac Server is the ideal way to administer a Mac network. This friendly guide explains to both Windows and Mac administrators how to set up and configure the server, including services such as iCal Server, Podcast Producer, Wiki Server, Spotlight Server, iChat Server, File Sharing, Mail Services, and support for iPhone and iPad. It explains how to secure, administer, and troubleshoot the networ

Switching to the Mac The Missing Manual

CERN Document Server

Pogue, David

2010-01-01

Is Windows giving you pause? Ready to make the leap to the Mac instead? There has never been a better time to switch from Windows to Mac, and this incomparable guide will help you make a smooth transition. New York Times columnist and Missing Manuals creator David Pogue gets you past three challenges: transferring your stuff, assembling Mac programs so you can do what you did with Windows, and learning your way around Mac OS X. Learning to use a Mac is not a piece of cake, but once you do, the rewards are oh-so-much better. No viruses, worms, or spyware. No questionable firewalls, inefficien

Macs all-in-one for dummies

CERN Document Server

Hutsko, Joe

2014-01-01

Your all-in-one guide to unleashing your Mac's full potential It's a Mac world out there. But if you haven't read the instruction manual, you may be neglecting some of your computer's coolest features. Turn to Macs All-in-One For Dummies' jam-packed guide to access the incredible tools within your computer. With this fully updated reference, you will learn how to use Launchpad and Mission Control; protect your Mac; back up and restore data with Time Machine; sync across devices in iCloud; import, organize, and share photos; direct in iMovie; compose in GarageBand; and so much more. The possi

Tunable microwave signal generation based on an Opto-DMD processor and a photonic crystal fiber

International Nuclear Information System (INIS)

Wang Tao; Sang Xin-Zhu; Yan Bin-Bin; Li Yan; Song Fei-Jun; Zhang Xia; Wang Kui-Ru; Yuan Jin-Hui; Yu Chong-Xiu; Ai Qi; Chen Xiao; Zhang Ying; Chen Gen-Xiang; Xiao Feng; Kamal Alameh

2014-01-01

Frequency-tunable microwave signal generation is proposed and experimentally demonstrated with a dual-wavelength single-longitudinal-mode (SLM) erbium-doped fiber ring laser based on a digital Opto-DMD processor and four-wave mixing (FWM) in a high-nonlinear photonic crystal fiber (PCF). The high-nonlinear PCF is employed for the generation of the FWM to obtain stable and uniform dual-wavelength oscillation. Two different short passive sub-ring cavities in the main ring cavity serve as mode filters to make SLM lasing. The two lasing wavelengths are electronically selected by loading different gratings on the Opto-DMD processor controlled with a computer. The wavelength spacing can be smartly adjusted from 0.165 nm to 1.08 nm within a tuning accuracy of 0.055 nm. Two microwave signals at 17.23 GHz and 27.47 GHz are achieved. The stability of the microwave signal is discussed. The system has the ability to generate a 137.36-GHz photonic millimeter signal at room temperature

Mac protocols for wireless sensor network (wsn): a comparative study

International Nuclear Information System (INIS)

Arshad, J.; Akram, Q.; Saleem, Y.

2014-01-01

Data communication between nodes is carried out under Medium Access Control (MAC) protocol which is defined at data link layer. The MAC protocols are responsible to communicate and coordinate between nodes according to the defined standards in WSN (Wireless Sensor Networks). The design of a MAC protocol should also address the issues of energy efficiency and transmission efficiency. There are number of MAC protocols that exist in the literature proposed for WSN. In this paper, nine MAC protocols which includes S-MAC, T-MAC, Wise-MAC, Mu-MAC, Z-MAC, A-MAC, D-MAC, B-MAC and B-MAC+ for WSN have been explored, studied and analyzed. These nine protocols are classified in contention based and hybrid (combination of contention and schedule based) MAC protocols. The goal of this comparative study is to provide a basis for MAC protocols and to highlight different mechanisms used with respect to parameters for the evaluation of energy and transmission efficiency in WSN. This study also aims to give reader a better understanding of the concepts, processes and flow of information used in these MAC protocols for WSN. A comparison with respect to energy reservation scheme, idle listening avoidance, latency, fairness, data synchronization, and throughput maximization has been presented. It was analyzed that contention based MAC protocols are less energy efficient as compared to hybrid MAC protocols. From the analysis of contention based MAC protocols in term of energy consumption, it was being observed that protocols based on preamble sampling consume lesser energy than protocols based on static or dynamic sleep schedule. (author)

Mac OS X ja tietoturva

OpenAIRE

Herranen, Joni

2011-01-01

Tämän opinnäytetyön tavoitteena on luoda kattava kokonaiskuva Mac OS X -käyttöjärjestelmän sisäänrakennetuista tietoturvaratkaisuista ja selvittää miten tietoturvaratkaisut toteuttavat tietoturvan kolmea perustavoitetta eli luottamuksellisuutta, eheyttä ja saatavuutta. Työn kohderyhmäksi on valittu edistyneemmät tietokoneenkäyttäjät, joilla ei ole aikaisempaa Mac-kokemusta. Teoriaosuudessa syvennytään aluksi Apple-yhtiöön sekä Mac OS X -järjestelmän teknisiin ominaisuuksiin. Osuuden pääta...

Learn Mac OS X Snow Leopard

CERN Document Server

Meyers, Scott

2009-01-01

You're smart and savvy, but also busy. This comprehensive guide to Apple's Mac OS X 10.6, Snow Leopard, gives you everything you need to know to live a happy, productive Mac life. Learn Mac OS X Snow Leopard will have you up and connected lickity split. With a minimum of overhead and a maximum of useful information, you'll cover a lot of ground in the time it takes other books to get you plugged in. If this isn't your first experience with Mac OS X, skip right to the "What's New in Snow Leopard" sections. You may also find yourself using this book as a quick refresher course or a way

A light hydrocarbon fuel processor producing high-purity hydrogen

Science.gov (United States)

Löffler, Daniel G.; Taylor, Kyle; Mason, Dylan

This paper discusses the design process and presents performance data for a dual fuel (natural gas and LPG) fuel processor for PEM fuel cells delivering between 2 and 8 kW electric power in stationary applications. The fuel processor resulted from a series of design compromises made to address different design constraints. First, the product quality was selected; then, the unit operations needed to achieve that product quality were chosen from the pool of available technologies. Next, the specific equipment needed for each unit operation was selected. Finally, the unit operations were thermally integrated to achieve high thermal efficiency. Early in the design process, it was decided that the fuel processor would deliver high-purity hydrogen. Hydrogen can be separated from other gases by pressure-driven processes based on either selective adsorption or permeation. The pressure requirement made steam reforming (SR) the preferred reforming technology because it does not require compression of combustion air; therefore, steam reforming is more efficient in a high-pressure fuel processor than alternative technologies like autothermal reforming (ATR) or partial oxidation (POX), where the combustion occurs at the pressure of the process stream. A low-temperature pre-reformer reactor is needed upstream of a steam reformer to suppress coke formation; yet, low temperatures facilitate the formation of metal sulfides that deactivate the catalyst. For this reason, a desulfurization unit is needed upstream of the pre-reformer. Hydrogen separation was implemented using a palladium alloy membrane. Packed beds were chosen for the pre-reformer and reformer reactors primarily because of their low cost, relatively simple operation and low maintenance. Commercial, off-the-shelf balance of plant (BOP) components (pumps, valves, and heat exchangers) were used to integrate the unit operations. The fuel processor delivers up to 100 slm hydrogen >99.9% pure with <1 ppm CO, <3 ppm CO 2. The

Adaptive MAC-layer protocol for multiservice digital access via tree and branch communication networks

Science.gov (United States)

Sriram, Kotikalapudi; Li, Chia-Chang; Magill, Peter; Whitaker, Norman A.; Dail, James E.; Dajer, Miguel A.; Siller, Curtis A.

1995-11-01

Described here is an adaptive MAC-layer protocol that supports multiservice (STM and ATM) applications in the context of subscriber access to tree and branch (e.g., fiber-coaxial cable) networks. The protocol adapts to changing demands for a mix of circuit and cell mode applications, and efficiently allocates upstream and downstream bandwidth to a variety of bursty and isochronous traffic sources. In the case of a hybrid fiber-coaxial (HFC) network the protocol resides in customer premises equipment and a common head-end controller. A medium-access control (MAC) processor provides for dividing the time domain for a given digital bitstream into successive frames, each with multiple STM and ATM time slots. Within the STM region of a frame, variable length time slots are allocated to calls (e.g., telephony, video telephony) requiring different amounts of bandwidth. A contention access signaling channel is also provided in this region for call control and set-up requests. Within the ATM region fixed-length time slots accommodate one individual ATM cell. These ATM time slots may be reserved for a user for the duration of a call or burst of successive ATM cells, or shared via a contention process. At least one contention time slot is available for signaling messages related to ATM call control and set-up requests. Further, the fixed-length ATM time slots may be reserved by a user for the duration of a call, or shared through a contention process. This paper describes the MAC-layer protocol, its relation to circuit- and ATM- amenable applications, and its performance with respect to signaling throughput and latency, and bandwidth efficiency for several service scenarios.

Java and Mac OS X

CERN Document Server

Davis, T Gene

2010-01-01

Learn the guidelines of integrating Java with native Mac OS X applications with this Devloper Reference book. Java is used to create nearly every type of application that exists and is one of the most required skills of employers seeking computer programmers. Java code and its libraries can be integrated with Mac OS X features, and this book shows you how to do just that. You'll learn to write Java programs on OS X and you'll even discover how to integrate them with the Cocoa APIs.: Shows how Java programs can be integrated with any Mac OS X feature, such as NSView widgets or screen savers; Re

Development of high yielding Soybean variety MACS 450 by using Kalitur mutant-MACS 111

International Nuclear Information System (INIS)

Raut, V.M.; Taware, S.P.; Halvankar, G.B.; Varghese, Philips

2000-01-01

A mutant variety -MACS 111 developed by treating seeds of indigenous black seeded 'Kalitur' variety with gamma irradiation + Ethyleneimine was used in development of high yielding varieties. MACS 450 a promising high yielding variety was selected from Bragg x MACS 111 cross by pedigree selection method. This variety gave the highest average seed yield in station trials (3422 kg/ha), coordinated breeding trials (2361 kg/ha) and varieties cum plant population trial (2215 kg/ha). On the basis of its performance in these trials it was released for commercial cultivation in Southern India. On all India basis, it also recorded the highest seed yield of 4076 kg/ha and 3582 kg/ha in Front line Demonstrations conducted on the farmers' field during 1998 and 1999 respectively. (author)

Array processor architecture

Science.gov (United States)

Barnes, George H. (Inventor); Lundstrom, Stephen F. (Inventor); Shafer, Philip E. (Inventor)

1983-01-01

A high speed parallel array data processing architecture fashioned under a computational envelope approach includes a data base memory for secondary storage of programs and data, and a plurality of memory modules interconnected to a plurality of processing modules by a connection network of the Omega gender. Programs and data are fed from the data base memory to the plurality of memory modules and from hence the programs are fed through the connection network to the array of processors (one copy of each program for each processor). Execution of the programs occur with the processors operating normally quite independently of each other in a multiprocessing fashion. For data dependent operations and other suitable operations, all processors are instructed to finish one given task or program branch before all are instructed to proceed in parallel processing fashion on the next instruction. Even when functioning in the parallel processing mode however, the processors are not locked-step but execute their own copy of the program individually unless or until another overall processor array synchronization instruction is issued.

Take control the Mac OS X lexicon

CERN Document Server

Zardetto, Sharon

2009-01-01

This ebook explains a little bit of everything; in fact, it's The Mac OS X (and then some) Lexicon because it's never just you and your Mac. It's you and your Mac and the Web, and your email, and that article you just read that threw 17 new acronyms at you or assumed that you knew all sorts of networking terms. Or it's you and your Mac and Finder features you've never touched, such as burn folders, smart folders, or proxy icons, and that mysterious Services submenu. This book is a great guide for Macintosh users everywhere who have trouble keeping up with the latest jargon, fo

MacA, a periplasmic membrane fusion protein of the macrolide transporter MacAB-TolC, binds lipopolysaccharide core specifically and with high affinity.

Science.gov (United States)

Lu, Shuo; Zgurskaya, Helen I

2013-11-01

The Escherichia coli MacAB-TolC transporter has been implicated in efflux of macrolide antibiotics and secretion of enterotoxin STII. In this study, we found that purified MacA, a periplasmic membrane fusion protein, contains one tightly bound rough core lipopolysaccharide (R-LPS) molecule per MacA molecule. R-LPS was bound specifically to MacA protein with affinity exceeding that of polymyxin B. Sequence analyses showed that MacA contains two high-density clusters of positively charged amino acid residues located in the cytoplasmic N-terminal domain and the periplasmic C-terminal domain. Substitutions in the C-terminal cluster reducing the positive-charge density completely abolished binding of R-LPS. At the same time, these substitutions significantly reduced the functionality of MacA in the protection of E. coli against macrolides in vivo and in the in vitro MacB ATPase stimulation assays. Taken together, our results suggest that R-LPS or a similar glycolipid is a physiological substrate of MacAB-TolC.

Green Secure Processors: Towards Power-Efficient Secure Processor Design

Science.gov (United States)

Chhabra, Siddhartha; Solihin, Yan

With the increasing wealth of digital information stored on computer systems today, security issues have become increasingly important. In addition to attacks targeting the software stack of a system, hardware attacks have become equally likely. Researchers have proposed Secure Processor Architectures which utilize hardware mechanisms for memory encryption and integrity verification to protect the confidentiality and integrity of data and computation, even from sophisticated hardware attacks. While there have been many works addressing performance and other system level issues in secure processor design, power issues have largely been ignored. In this paper, we first analyze the sources of power (energy) increase in different secure processor architectures. We then present a power analysis of various secure processor architectures in terms of their increase in power consumption over a base system with no protection and then provide recommendations for designs that offer the best balance between performance and power without compromising security. We extend our study to the embedded domain as well. We also outline the design of a novel hybrid cryptographic engine that can be used to minimize the power consumption for a secure processor. We believe that if secure processors are to be adopted in future systems (general purpose or embedded), it is critically important that power issues are considered in addition to performance and other system level issues. To the best of our knowledge, this is the first work to examine the power implications of providing hardware mechanisms for security.

MacSelfService online tutorial

CERN Multimedia

CERN. Geneva

2016-01-01

Mac Self-Service is a functionality within the Mac Desktop Service built and maintained to empower CERN users by giving them easy access to applications and configurations through the Self-Service application. This tutorial (text attached to the event page) explains how to install Mac Self-Service and how to use it to install applications and printers. Content owner: Vincent Nicolas Bippus Presenter: Pedro Augusto de Freitas Batista Tell us what you think via e-learning.support at cern.ch More tutorials in the e-learning collection of the CERN Document Server (CDS) https://cds.cern.ch/collection/E-learning%20modules?ln=en All info about the CERN rapid e-learning project is linked from http://twiki.cern.ch/ELearning  

Design and implementation of a high performance network security processor

Science.gov (United States)

Wang, Haixin; Bai, Guoqiang; Chen, Hongyi

2010-03-01

The last few years have seen many significant progresses in the field of application-specific processors. One example is network security processors (NSPs) that perform various cryptographic operations specified by network security protocols and help to offload the computation intensive burdens from network processors (NPs). This article presents a high performance NSP system architecture implementation intended for both internet protocol security (IPSec) and secure socket layer (SSL) protocol acceleration, which are widely employed in virtual private network (VPN) and e-commerce applications. The efficient dual one-way pipelined data transfer skeleton and optimised integration scheme of the heterogenous parallel crypto engine arrays lead to a Gbps rate NSP, which is programmable with domain specific descriptor-based instructions. The descriptor-based control flow fragments large data packets and distributes them to the crypto engine arrays, which fully utilises the parallel computation resources and improves the overall system data throughput. A prototyping platform for this NSP design is implemented with a Xilinx XC3S5000 based FPGA chip set. Results show that the design gives a peak throughput for the IPSec ESP tunnel mode of 2.85 Gbps with over 2100 full SSL handshakes per second at a clock rate of 95 MHz.

Probabilistic programmable quantum processors

International Nuclear Information System (INIS)

Buzek, V.; Ziman, M.; Hillery, M.

2004-01-01

We analyze how to improve performance of probabilistic programmable quantum processors. We show how the probability of success of the probabilistic processor can be enhanced by using the processor in loops. In addition, we show that an arbitrary SU(2) transformations of qubits can be encoded in program state of a universal programmable probabilistic quantum processor. The probability of success of this processor can be enhanced by a systematic correction of errors via conditional loops. Finally, we show that all our results can be generalized also for qudits. (Abstract Copyright [2004], Wiley Periodicals, Inc.)

Psychopathological profile and prevalence of dual pathology on patients with alcoholic dependence undergoing outpatient treatment.

Science.gov (United States)

García-Carretero, Miguel A; Novalbos-Ruiz, José P; Robles-Martínez, María; Jordán-Quintero, María A; O'Ferrall-González, Cristina

2017-01-01

Assess the prevalence of dual pathology in patients with alcohol dependence and describe the psychopathological profile of mental disorders, impulsiveness, ADHD presence and craving. It is a cross-sectional study about dual pathology, carried out on 102 patients undergoing outpatient treatment. The presence of dual pathology is established by means of the MINI-5 interview and the MCMI-III test; DSM-IV being used as the alcohol abuse criteria. Impulsiveness, ADHD presence, craving and quality of life were measured through SIS, ASRSv1, MACS and SF-36. The prevalence of dual pathology ranges from 45.1% to 80.4% according to MCMI-III and MINI-5, respectively. The most frequent pathologies are current major depressive episodes, followed by current generalized anxiety disorders, suicide risk and current dysthymia disorders; 73.2% of dual patients present a moderate and intense global score according to MACS, 56.1% got a meaningful score in impulsiveness according to SIS and 41.5% has highly consistent symptoms with ADHD. As regards quality of life, 53.7% of the sample had bad mental health. In the case of dual patients consuming other substances, 30% had a history of bipolar disorders and 10% had a high suicide risk. The prevalence of psychiatric comorbidity in patients with alcohol dependence undergoing outpatient treatment varies depending on the detection method, MINI being the one identifying a greater number of cases. More than half of dual patients present impulsive behavior, a bad mental health state and high craving levels. Special attention should be paid to dual patients consuming other substances.

Comparison of Processor Performance of SPECint2006 Benchmarks of some Intel Xeon Processors

OpenAIRE

Abdul Kareem PARCHUR; Ram Asaray SINGH

2012-01-01

High performance is a critical requirement to all microprocessors manufacturers. The present paper describes the comparison of performance in two main Intel Xeon series processors (Type A: Intel Xeon X5260, X5460, E5450 and L5320 and Type B: Intel Xeon X5140, 5130, 5120 and E5310). The microarchitecture of these processors is implemented using the basis of a new family of processors from Intel starting with the Pentium 4 processor. These processors can provide a performance boost for many ke...

The LASS hardware processor

International Nuclear Information System (INIS)

Kunz, P.F.

1976-01-01

The problems of data analysis with hardware processors are reviewed and a description is given of a programmable processor. This processor, the 168/E, has been designed for use in the LASS multi-processor system; it has an execution speed comparable to the IBM 370/168 and uses the subset of IBM 370 instructions appropriate to the LASS analysis task. (Auth.)

MAC reduction of isoflurane by sufentanil.

Science.gov (United States)

Brunner, M D; Braithwaite, P; Jhaveri, R; McEwan, A I; Goodman, D K; Smith, L R; Glass, P S

1994-01-01

We have shown previously that a plasma fentanyl concentration of 1.67 ng ml-1 reduced the MAC of isoflurane by 50%. By comparing equal degrees of MAC reduction by sufentanil, we may determine the potency ratio of these opioids. Seventy-six patients were allocated randomly to receive predetermined infusions of sufentanil, and end-tidal concentrations of isoflurane in oxygen. Blood samples were obtained 10 min after the start of the infusion, and just before and after skin incision. Any purposeful movement by the patient was recorded. The MAC reduction of isoflurane produced by sufentanil was obtained using a logistic regression model. A sufentanil plasma concentration of 0.145 ng ml-1 (95% confidence limits 0.04, 0.26 ng ml-1) resulted in a 50% reduction in the MAC of isoflurane. At a plasma concentration greater than 0.5 ng ml-1, sufentanil exhibited a ceiling effect.

Office 2008 for Mac for dummies

CERN Document Server

LeVitus, Bob

2013-01-01

Office 2008 for Mac is here, with great new enhancements to all your favorite office productivity tools. Who better than "Dr. Mac, "Bob LeVitus, to show you how to load and use them all? From choosing the best version for your needs to managing your life with your online calendar, Office 2008 For Mac For Dummies covers what you need to know. It compares the Student/Teacher Edition, Standard Edition, and Professional Edition, then walks you through installing your preferred version and keeping it up to date. You'll find out all the things you can do with Word, Excel, PowerPoint, and Entourage,

Comparison of Processor Performance of SPECint2006 Benchmarks of some Intel Xeon Processors

Directory of Open Access Journals (Sweden)

Abdul Kareem PARCHUR

2012-08-01

Full Text Available High performance is a critical requirement to all microprocessors manufacturers. The present paper describes the comparison of performance in two main Intel Xeon series processors (Type A: Intel Xeon X5260, X5460, E5450 and L5320 and Type B: Intel Xeon X5140, 5130, 5120 and E5310. The microarchitecture of these processors is implemented using the basis of a new family of processors from Intel starting with the Pentium 4 processor. These processors can provide a performance boost for many key application areas in modern generation. The scaling of performance in two major series of Intel Xeon processors (Type A: Intel Xeon X5260, X5460, E5450 and L5320 and Type B: Intel Xeon X5140, 5130, 5120 and E5310 has been analyzed using the performance numbers of 12 CPU2006 integer benchmarks, performance numbers that exhibit significant differences in performance. The results and analysis can be used by performance engineers, scientists and developers to better understand the performance scaling in modern generation processors.

Simulation of a parallel processor on a serial processor: The neutron diffusion equation

International Nuclear Information System (INIS)

Honeck, H.C.

1981-01-01

Parallel processors could provide the nuclear industry with very high computing power at a very moderate cost. Will we be able to make effective use of this power. This paper explores the use of a very simple parallel processor for solving the neutron diffusion equation to predict power distributions in a nuclear reactor. We first describe a simple parallel processor and estimate its theoretical performance based on the current hardware technology. Next, we show how the parallel processor could be used to solve the neutron diffusion equation. We then present the results of some simulations of a parallel processor run on a serial processor and measure some of the expected inefficiencies. Finally we extrapolate the results to estimate how actual design codes would perform. We find that the standard numerical methods for solving the neutron diffusion equation are still applicable when used on a parallel processor. However, some simple modifications to these methods will be necessary if we are to achieve the full power of these new computers. (orig.) [de

Aeronautical Mobile Airport Communications System (AeroMACS)

Science.gov (United States)

Budinger, James M.; Hall, Edward

2011-01-01

To help increase the capacity and efficiency of the nation s airports, a secure wideband wireless communications system is proposed for use on the airport surface. This paper provides an overview of the research and development process for the Aeronautical Mobile Airport Communications System (AeroMACS). AeroMACS is based on a specific commercial profile of the Institute of Electrical and Electronics Engineers (IEEE) 802.16 standard known as Wireless Worldwide Interoperability for Microwave Access or WiMAX (WiMax Forum). The paper includes background on the need for global interoperability in air/ground data communications, describes potential AeroMACS applications, addresses allocated frequency spectrum constraints, summarizes the international standardization process, and provides findings and recommendations from the world s first AeroMACS prototype implemented in Cleveland, Ohio, USA.

McMAC: towards a MAC protocol with multi-constrained QoS provisioning for diverse traffic in Wireless Body Area Networks.

Science.gov (United States)

Monowar, Muhammad Mostafa; Hassan, Mohammad Mehedi; Bajaber, Fuad; Al-Hussein, Musaed; Alamri, Atif

2012-11-12

The emergence of heterogeneous applications with diverse requirements for resource-constrained Wireless Body Area Networks (WBANs) poses significant challenges for provisioning Quality of Service (QoS) with multi-constraints (delay and reliability) while preserving energy efficiency. To address such challenges, this paper proposes McMAC,a MAC protocol with multi-constrained QoS provisioning for diverse traffic classes in WBANs. McMAC classifies traffic based on their multi-constrained QoS demands and introduces a novel superframe structure based on the "transmit-whenever-appropriate"principle, which allows diverse periods for diverse traffic classes according to their respective QoS requirements. Furthermore, a novel emergency packet handling mechanism is proposedto ensure packet delivery with the least possible delay and the highest reliability. McMAC is also modeled analytically, and extensive simulations were performed to evaluate its performance. The results reveal that McMAC achieves the desired delay and reliability guarantee according to the requirements of a particular traffic class while achieving energy efficiency.

A Mobile Automated Characterization System (MACS) for indoor floor characterization

International Nuclear Information System (INIS)

Richardson, B.S.; Haley, D.C.; Dudar, A.M.; Ward, C.R.

1995-01-01

The Savannah River Technology Center (SRTC) and Oak Ridge National Laboratory are developing an advanced Mobile Automated Characterization System (MACS) to characterize indoor contaminated floors. MACS is based upon Semi-Intelligent Mobile Observing Navigator (SIMON), an earlier floor characterization system developed at SRTC. MACS will feature enhanced navigation systems, operator interface, and an interface to simplify integration of additional sensors. The enhanced navigation system will provide the capability to survey large open areas much more accurately than is now possible with SIMON, which is better suited for hallways and corridors that provide the means for recalibrating position and heading. MACS operator interface is designed to facilitate MACS's use as a tool for health physicists, thus eliminating the need for additional training in the robot's control language. Initial implementation of MACS will use radiation detectors. Additional sensors, such as PCB sensors currently being developed, will be integrated on MACS in the future. Initial use of MACS will be focused toward obtaining comparative results with manual methods. Surveys will be conducted both manually and with MACS to compare relative costs and data quality. While clear cost benefits anticipated, data quality benefits should be even more significant

Mac OS X for Unix Geeks (Leopard)

CERN Document Server

Rothman, Ernest E; Rosen, Rich

2009-01-01

If you've been lured to Mac OS X because of its Unix roots, this invaluable book serves as a bridge between Apple's Darwin OS and the more traditional Unix systems. The new edition offers a complete tour of Mac OS X's Unix shell for Leopard and Tiger, and helps you find the facilities that replace or correspond to standard Unix utilities. Learn how to compile code, link to libraries, and port Unix software to Mac OS X and much more with this concise guide.

Functional unit for a processor

NARCIS (Netherlands)

Rohani, A.; Kerkhoff, Hans G.

2013-01-01

The invention relates to a functional unit for a processor, such as a Very Large Instruction Word Processor. The invention further relates to a processor comprising at least one such functional unit. The invention further relates to a functional unit and processor capable of mitigating the effect of

Functional Implications of an Intermeshing Cogwheel-like Interaction between TolC and MacA in the Action of Macrolide-specific Efflux Pump MacAB-TolC*

Science.gov (United States)

Xu, Yongbin; Song, Saemee; Moeller, Arne; Kim, Nahee; Piao, Shunfu; Sim, Se-Hoon; Kang, Mooseok; Yu, Wookyung; Cho, Hyun-Soo; Chang, Iksoo; Lee, Kangseok; Ha, Nam-Chul

2011-01-01

Macrolide-specific efflux pump MacAB-TolC has been identified in diverse Gram-negative bacteria including Escherichia coli. The inner membrane transporter MacB requires the outer membrane factor TolC and the periplasmic adaptor protein MacA to form a functional tripartite complex. In this study, we used a chimeric protein containing the tip region of the TolC α-barrel to investigate the role of the TolC α-barrel tip region with regard to its interaction with MacA. The chimeric protein formed a stable complex with MacA, and the complex formation was abolished by substitution at the functionally essential residues located at the MacA α-helical tip region. Electron microscopic study delineated that this complex was made by tip-to-tip interaction between the tip regions of the α-barrels of TolC and MacA, which correlated well with the TolC and MacA complex calculated by molecular dynamics. Taken together, our results demonstrate that the MacA hexamer interacts with TolC in a tip-to-tip manner, and implies the manner by which MacA induces opening of the TolC channel. PMID:21325274

Functional implications of an intermeshing cogwheel-like interaction between TolC and MacA in the action of macrolide-specific efflux pump MacAB-TolC.

Science.gov (United States)

Xu, Yongbin; Song, Saemee; Moeller, Arne; Kim, Nahee; Piao, Shunfu; Sim, Se-Hoon; Kang, Mooseok; Yu, Wookyung; Cho, Hyun-Soo; Chang, Iksoo; Lee, Kangseok; Ha, Nam-Chul

2011-04-15

Macrolide-specific efflux pump MacAB-TolC has been identified in diverse gram-negative bacteria including Escherichia coli. The inner membrane transporter MacB requires the outer membrane factor TolC and the periplasmic adaptor protein MacA to form a functional tripartite complex. In this study, we used a chimeric protein containing the tip region of the TolC α-barrel to investigate the role of the TolC α-barrel tip region with regard to its interaction with MacA. The chimeric protein formed a stable complex with MacA, and the complex formation was abolished by substitution at the functionally essential residues located at the MacA α-helical tip region. Electron microscopic study delineated that this complex was made by tip-to-tip interaction between the tip regions of the α-barrels of TolC and MacA, which correlated well with the TolC and MacA complex calculated by molecular dynamics. Taken together, our results demonstrate that the MacA hexamer interacts with TolC in a tip-to-tip manner, and implies the manner by which MacA induces opening of the TolC channel.

Mac OS X Snow Leopard Server For Dummies

CERN Document Server

Rizzo, John

2009-01-01

Making Everything Easier!. Mac OS® X Snow Leopard Server for Dummies. Learn to::;. Set up and configure a Mac network with Snow Leopard Server;. Administer, secure, and troubleshoot the network;. Incorporate a Mac subnet into a Windows Active Directory® domain;. Take advantage of Unix® power and security. John Rizzo. Want to set up and administer a network even if you don't have an IT department? Read on!. Like everything Mac, Snow Leopard Server was designed to be easy to set up and use. Still, there are so many options and features that this book will save you heaps of time and effort. It wa

McMAC: Towards a MAC Protocol with Multi-Constrained QoS Provisioning for Diverse Traffic in Wireless Body Area Networks

OpenAIRE

Monowar, Muhammad; Hassan, Mohammad; Bajaber, Fuad; Al-Hussein, Musaed; Alamri, Atif

2012-01-01

The emergence of heterogeneous applications with diverse requirements for resource-constrained Wireless Body Area Networks (WBANs) poses significant challenges for provisioning Quality of Service (QoS) with multi-constraints (delay and reliability) while preserving energy efficiency. To address such challenges, this paper proposes McMAC, a MAC protocol with multi-constrained QoS provisioning for diverse traffic classes in WBANs. McMAC classifies traffic based on their multi-constrained QoS de...

Adaptive signal processor

Energy Technology Data Exchange (ETDEWEB)

Walz, H.V.

1980-07-01

An experimental, general purpose adaptive signal processor system has been developed, utilizing a quantized (clipped) version of the Widrow-Hoff least-mean-square adaptive algorithm developed by Moschner. The system accommodates 64 adaptive weight channels with 8-bit resolution for each weight. Internal weight update arithmetic is performed with 16-bit resolution, and the system error signal is measured with 12-bit resolution. An adapt cycle of adjusting all 64 weight channels is accomplished in 8 ..mu..sec. Hardware of the signal processor utilizes primarily Schottky-TTL type integrated circuits. A prototype system with 24 weight channels has been constructed and tested. This report presents details of the system design and describes basic experiments performed with the prototype signal processor. Finally some system configurations and applications for this adaptive signal processor are discussed.

Adaptive signal processor

International Nuclear Information System (INIS)

Walz, H.V.

1980-07-01

An experimental, general purpose adaptive signal processor system has been developed, utilizing a quantized (clipped) version of the Widrow-Hoff least-mean-square adaptive algorithm developed by Moschner. The system accommodates 64 adaptive weight channels with 8-bit resolution for each weight. Internal weight update arithmetic is performed with 16-bit resolution, and the system error signal is measured with 12-bit resolution. An adapt cycle of adjusting all 64 weight channels is accomplished in 8 μsec. Hardware of the signal processor utilizes primarily Schottky-TTL type integrated circuits. A prototype system with 24 weight channels has been constructed and tested. This report presents details of the system design and describes basic experiments performed with the prototype signal processor. Finally some system configurations and applications for this adaptive signal processor are discussed

iMac G3 Blueberry 350MHz

CERN Multimedia

2000-01-01

The iMac G3 is an all-in-one personal computer, encompassing both the monitor and the computer in one package. It allowed to revitalize the Apple brand that was in decline and close to financial ruin. Originally released in striking bondi blue and later a range of other translucent plastic envelopes in bright colors. The iMac comes with a keyboard and mouse matching the color of the case. The iMac G3 was sold from 1998 to 2003 and has been updated many times.

Multithreading in vector processors

Science.gov (United States)

Evangelinos, Constantinos; Kim, Changhoan; Nair, Ravi

2018-01-16

In one embodiment, a system includes a processor having a vector processing mode and a multithreading mode. The processor is configured to operate on one thread per cycle in the multithreading mode. The processor includes a program counter register having a plurality of program counters, and the program counter register is vectorized. Each program counter in the program counter register represents a distinct corresponding thread of a plurality of threads. The processor is configured to execute the plurality of threads by activating the plurality of program counters in a round robin cycle.

Una lectura interpretativa de Tras la virtud, de Alasdair MacIntyre - An Interpretive Reading of After Virtue, by Alasdair MacIntyre

Directory of Open Access Journals (Sweden)

Fernando Fernández-Llebrez

2010-12-01

Full Text Available This article centers on the thought of Alasdair MacIntyre, whose most prominente work, After Virtue, is considered a classic of political science. In contrast with other reviews, this article will examine After Virtue within the broader context of MacIntyre’s thinking and publications. An overview of MacIntyre’s literary corpus and the evolution of his thinking will shed light on the volume examined and trace certain ideas that are characteristic of this Scottish political philosopher. Matters that remained unsettled in After Virtue have become over time more defined in MacIntyre’s thinking, such as the influence exerted upon him by Thomas Aquinas.

George MacDonald's Estimate of Childhood

Science.gov (United States)

Pridmore, John

2007-01-01

The nineteenth-century fantasy writer George MacDonald believed that "it is better to be a child in a green field than a knight of many orders." In this paper, I shall explore the bearing of this high estimate of childhood on spiritual education. MacDonald explores the spirituality of the child in his essay "A Sketch of Individual Development" and…

Mac OS X : Tiger edition the missing manual

CERN Document Server

Pogue, David

2005-01-01

You can set your watch to it: As soon as Apple comes out with another version of Mac OS X, David Pogue hits the streets with another meticulous Missing Manual to cover it with a wealth of detail. The new Mac OS X 10.4, better known as Tiger, is faster than its predecessors, but nothing's too fast for Pogue and Mac OS X: The Missing Manual. There are many reasons why this is the most popular computer book of all time. With its hallmark objectivity, the Tiger Edition thoroughly explores the latest features to grace the Mac OS. Which ones work well and which do not? What should you look for? Th

Increased NMDA receptor inhibition at an increased Sevoflurane MAC

Directory of Open Access Journals (Sweden)

Brosnan Robert J

2012-06-01

Full Text Available Abstract Background Sevoflurane potently enhances glycine receptor currents and more modestly decreases NMDA receptor currents, each of which may contribute to immobility. This modest NMDA receptor antagonism by sevoflurane at a minimum alveolar concentration (MAC could be reciprocally related to large potentiation of other inhibitory ion channels. If so, then reduced glycine receptor potency should increase NMDA receptor antagonism by sevoflurane at MAC. Methods Indwelling lumbar subarachnoid catheters were surgically placed in 14 anesthetized rats. Rats were anesthetized with sevoflurane the next day, and a pre-infusion sevoflurane MAC was measured in duplicate using a tail clamp method. Artificial CSF (aCSF containing either 0 or 4 mg/mL strychnine was then infused intrathecally at 4 μL/min, and the post-infusion baseline sevoflurane MAC was measured. Finally, aCSF containing strychnine (either 0 or 4 mg/mL plus 0.4 mg/mL dizocilpine (MK-801 was administered intrathecally at 4 μL/min, and the post-dizocilpine sevoflurane MAC was measured. Results Pre-infusion sevoflurane MAC was 2.26%. Intrathecal aCSF alone did not affect MAC, but intrathecal strychnine significantly increased sevoflurane requirement. Addition of dizocilpine significantly decreased MAC in all rats, but this decrease was two times larger in rats without intrathecal strychnine compared to rats with intrathecal strychnine, a statistically significant (P  Conclusions Glycine receptor antagonism increases NMDA receptor antagonism by sevoflurane at MAC. The magnitude of anesthetic effects on a given ion channel may therefore depend on the magnitude of its effects on other receptors that modulate neuronal excitability.

MACS as a tool for international inspections

Energy Technology Data Exchange (ETDEWEB)

Curtiss, J.A.; Indusi, J.P.

1995-08-01

The MACS/ACRS (Managed Access by Controlled Sensing/Access by Controlled Remote Sensing) system is a collection of communication devices, video capability, and distance-measuring equipment which can effectively substitute for the physical presence of a challenge inspector within a facility. The MACS design allows growth of the prototype, developed in response to the Chemical Weapons Convention (CWC), into a versatile device for inspection of sensitive nuclear facilities under other international arrangements, for example the proposed Fissile Material Cutoff Convention. A MACS/ACRS-type system in a standard, international-recognized configuration could resolve sensitive information and safety concerns through providing a means of achieving the goals of an inspection while excluding the inspector. We believe the technology used to develop MACS for the Defense Nuclear Agency, followed by ACRS for the Department of Energy, is universally adaptable for minimally-intrusive managed-access international inspections of sensitive sites.

MACS as a tool for international inspections

International Nuclear Information System (INIS)

Curtiss, J.A.; Indusi, J.P.

1995-01-01

The MACS/ACRS (Managed Access by Controlled Sensing/Access by Controlled Remote Sensing) system is a collection of communication devices, video capability, and distance-measuring equipment which can effectively substitute for the physical presence of a challenge inspector within a facility. The MACS design allows growth of the prototype, developed in response to the Chemical Weapons Convention (CWC), into a versatile device for inspection of sensitive nuclear facilities under other international arrangements, for example the proposed Fissile Material Cutoff Convention. A MACS/ACRS-type system in a standard, international-recognized configuration could resolve sensitive information and safety concerns through providing a means of achieving the goals of an inspection while excluding the inspector. We believe the technology used to develop MACS for the Defense Nuclear Agency, followed by ACRS for the Department of Energy, is universally adaptable for minimally-intrusive managed-access international inspections of sensitive sites

3081/E processor

International Nuclear Information System (INIS)

Kunz, P.F.; Gravina, M.; Oxoby, G.

1984-04-01

The 3081/E project was formed to prepare a much improved IBM mainframe emulator for the future. Its design is based on a large amount of experience in using the 168/E processor to increase available CPU power in both online and offline environments. The processor will be at least equal to the execution speed of a 370/168 and up to 1.5 times faster for heavy floating point code. A single processor will thus be at least four times more powerful than the VAX 11/780, and five processors on a system would equal at least the performance of the IBM 3081K. With its large memory space and simple but flexible high speed interface, the 3081/E is well suited for the online and offline needs of high energy physics in the future

A Mac Protocol Implementation for Wireless Sensor Network

Directory of Open Access Journals (Sweden)

Jamila Bhar

2015-01-01

Full Text Available IEEE 802.15.4 is an important standard for Low Rate Wireless Personal Area Network (LRWPAN. The IEEE 802.15.4 presents a flexible MAC protocol that provides good efficiency for data transmission by adapting its parameters according to characteristics of different applications. In this research work, some restrictions of this standard are explained and an improvement of traffic efficiency by optimizing MAC layer is proposed. Implementation details for several blocks of communication system are carefully modeled. The protocol implementation is done using VHDL language. The analysis gives a full understanding of the behavior of the MAC protocol with regard to backoff delay, data loss probability, congestion probability, slot effectiveness, and traffic distribution for terminals. Two ideas are proposed and tested to improve efficiency of CSMA/CA mechanism for IEEE 802.15.4 MAC Layer. Primarily, we dynamically adjust the backoff exponent (BE according to queue level of each node. Secondly, we vary the number of consecutive clear channel assessment (CCA for packet transmission. We demonstrate also that slot compensation provided by the enhanced MAC protocol can greatly avoid unused slots. The results show the significant improvements expected by our approach among the IEEE 802.15.4 MAC standards. Synthesis results show also hardware performances of our proposed architecture.

Learn Office 2011 for Mac OS X

CERN Document Server

Hart-Davis, Guy

2011-01-01

Office for Mac remains the leading productivity suite for Mac, with Apple's iWork and the free OpenOffice.org trailing far behind. And now it's being updated with a cleaner interface and more compatibility with Exchange and SharePoint. Learn Office 2011 for Mac OS X offers a practical, hands-on approach to using Office 2011 applications to create and edit documents and get work done efficiently. You'll learn how to customize Office, design, create, and share documents, manipulate data in a spreadsheet, and create lively presentations. You'll also discover how to organize your email, contacts,

Integrated fuel processor development

International Nuclear Information System (INIS)

Ahmed, S.; Pereira, C.; Lee, S. H. D.; Krumpelt, M.

2001-01-01

The Department of Energy's Office of Advanced Automotive Technologies has been supporting the development of fuel-flexible fuel processors at Argonne National Laboratory. These fuel processors will enable fuel cell vehicles to operate on fuels available through the existing infrastructure. The constraints of on-board space and weight require that these fuel processors be designed to be compact and lightweight, while meeting the performance targets for efficiency and gas quality needed for the fuel cell. This paper discusses the performance of a prototype fuel processor that has been designed and fabricated to operate with liquid fuels, such as gasoline, ethanol, methanol, etc. Rated for a capacity of 10 kWe (one-fifth of that needed for a car), the prototype fuel processor integrates the unit operations (vaporization, heat exchange, etc.) and processes (reforming, water-gas shift, preferential oxidation reactions, etc.) necessary to produce the hydrogen-rich gas (reformate) that will fuel the polymer electrolyte fuel cell stacks. The fuel processor work is being complemented by analytical and fundamental research. With the ultimate objective of meeting on-board fuel processor goals, these studies include: modeling fuel cell systems to identify design and operating features; evaluating alternative fuel processing options; and developing appropriate catalysts and materials. Issues and outstanding challenges that need to be overcome in order to develop practical, on-board devices are discussed

Connectivity-Based Reliable Multicast MAC Protocol for IEEE 802.11 Wireless LANs

Directory of Open Access Journals (Sweden)

Woo-Yong Choi

2009-01-01

Full Text Available We propose the efficient reliable multicast MAC protocol based on the connectivity information among the recipients. Enhancing the BMMM (Batch Mode Multicast MAC protocol, the reliable multicast MAC protocol significantly reduces the RAK (Request for ACK frame transmissions in a reasonable computational time and enhances the MAC performance. By the analytical performance analysis, the throughputs of the BMMM protocol and our proposed MAC protocol are derived. Numerical examples show that our proposed MAC protocol increases the reliable multicast MAC performance for IEEE 802.11 wireless LANs.

Victor Bérard et la Macédoine

Directory of Open Access Journals (Sweden)

Ivan Savev

2011-01-01

Full Text Available Un helléniste convaincu, Victor Bérard, en vient, au début du XXe siècle à soutenir l’existence de « Macédoniens » et le slogan « la Macédoine aux Macédoniens”.Le Congrès de Berlin en 1878 avait laissé la Macédoine aux mains des Ottomans. La Grèce, la Serbie et la Bulgarie, parvenues à ses limites et prévoyant le retrait futur des Ottomans peaufinent les arguments linguistiques et historiques qui justifieront leurs revendications territoriales. Victor Bérard, un helléniste respecté et bon connaisseur de la région sud balkanique, effectue des enquêtes en Macédoine en 1896 et 1903 qu’il publie à Paris.Cette étude montre comment, dans le contexte de la propagande nationaliste des prétendants à la possession de la Macédoine, Victor Bérard en vient progressivement à affirmer qu’il existe une population autochtone, les Macédoniens. Il soutient leur programme pour la constitution d’une fédération ou confédération avec le slogan « la Macédoine aux Macédoniens » ce qui fait toute l’actualité de ses ouvrages.In 1878, the Congress of Berlin had left Macedonia in the hands of the Ottomans. Greece, Serbia and Bulgaria had reached its limits. Anticipating the Ottoman retreat, they polish language and historical arguments that will justify their territorial claims. Victor Bérard, a respected Hellenist and a good expert of the southern Balkans, is doing researches in Macedonia in 1896 and 1903. These will be later published in Paris.This study shows how, in the context of the nationalist propaganda build-up made by the candidates for the possession of Macedonia, Victor Bérard comes progressively to assert the existence of a native population: the Macedonians. He supports their program for the forming of a federation or confederation which slogan would be “Macedonia to Macedonians”. This makes his works very topical.

Sliding-Mode Control to Compensate PVT Variations in Dual Core Systems

NARCIS (Netherlands)

Pourshaghaghi, H.R.; Fatemi, S.H.; Pineda de Gyvez, J.

2012-01-01

In this paper, we present a novel robust sliding-mode controller for stabilizing supply voltage and clock frequency of dual core processors determined by dynamic voltage and frequency scaling (DVFS) methods in the presence of systematic and random variations. We show that maximum rejection for

Performance evaluation of throughput computing workloads using multi-core processors and graphics processors

Science.gov (United States)

Dave, Gaurav P.; Sureshkumar, N.; Blessy Trencia Lincy, S. S.

2017-11-01

Current trend in processor manufacturing focuses on multi-core architectures rather than increasing the clock speed for performance improvement. Graphic processors have become as commodity hardware for providing fast co-processing in computer systems. Developments in IoT, social networking web applications, big data created huge demand for data processing activities and such kind of throughput intensive applications inherently contains data level parallelism which is more suited for SIMD architecture based GPU. This paper reviews the architectural aspects of multi/many core processors and graphics processors. Different case studies are taken to compare performance of throughput computing applications using shared memory programming in OpenMP and CUDA API based programming.

The Molen Polymorphic Media Processor

NARCIS (Netherlands)

Kuzmanov, G.K.

2004-01-01

In this dissertation, we address high performance media processing based on a tightly coupled co-processor architectural paradigm. More specifically, we introduce a reconfigurable media augmentation of a general purpose processor and implement it into a fully operational processor prototype. The

Accuracy of the MacArthur competence assessment tool for clinical research (MacCAT-CR) for measuring children's competence to consent to clinical research.

Science.gov (United States)

Hein, Irma M; Troost, Pieter W; Lindeboom, Robert; Benninga, Marc A; Zwaan, C Michel; van Goudoever, Johannes B; Lindauer, Ramón J L

2014-12-01

An objective assessment of children's competence to consent to research participation is currently not possible. Age limits for asking children's consent vary considerably between countries, and, to our knowledge, the correlation between competence and children's age has never been systematically investigated. To test a standardized competence assessment instrument for children by modifying the MacArthur Competence Assessment Tool for Clinical Research (MacCAT-CR), to investigate its reliability and validity, and to examine the correlation of its assessment with age and estimate cutoff ages. This prospective study included children and adolescents aged 6 to 18 years in the inpatient and outpatient departments of allergology, gastroenterology, oncology, ophthalmology, and pulmonology from January 1, 2012, through January 1, 2014. Participants were eligible for clinical research studies, including observational studies and randomized clinical trials. Competence judgments by experts aware of the 4 relevant criteria-understanding, appreciation, reasoning, and choice-were used to establish the reference standard. The index test was the MacCAT-CR, which used a semistructured interview format. Interrater reliability, validity, and dimensionality of the MacCAT-CR and estimated cutoff ages for competence. Of 209 eligible patients, we included 161 (mean age, 10.6 years; 47.2% male). Good reproducibility of MacCAT-CR total and subscale scores was observed (intraclass correlation coefficient range, 0.68-0.92). We confirmed unidimensionality of the MacCAT-CR. By the reference standard, we judged 54 children (33.5%) to be incompetent; by the MacCAT-CR, 61 children (37.9%). Criterion-related validity of MacCAT-CR scores was supported by high overall accuracy in correctly classifying children as competent against the reference standard (area under the receiver operating characteristics curve, 0.78). Age was a good predictor of competence on the MacCAT-CR (area under the receiver

Power-Controlled MAC Protocols with Dynamic Neighbor Prediction for Ad hoc Networks

Institute of Scientific and Technical Information of China (English)

LI Meng; ZHANG Lin; XIAO Yong-kang; SHAN Xiu-ming

2004-01-01

Energy and bandwidth are the scarce resources in ad hoc networks because most of the mobile nodes are battery-supplied and share the exclusive wireless medium. Integrating the power control into MAC protocol is a promising technique to fully exploit these precious resources of ad hoc wireless networks. In this paper, a new intelligent power-controlled Medium Access Control (MAC) (iMAC) protocol with dynamic neighbor prediction is proposed. Through the elaborate design of the distributed transmit-receive strategy of mobile nodes, iMAC greatly outperforms the prevailing IEEE 802.11 MAC protocols in not only energy conservation but also network throughput. Using the Dynamic Neighbor Prediction (DNP), iMAC performs well in mobile scenes. To the best of our knowledge, iMAC is the first protocol that considers the performance deterioration of power-controlled MAC protocols in mobile scenes and then proposes a solution. Simulation results indicate that DNP is important and necessary for power-controlled MAC protocols in mobile ad hoc networks.

Towards a Time-predictable Dual-Issue Microprocessor: The Patmos Approach

DEFF Research Database (Denmark)

Schoeberl, Martin; Schleuniger, Pascal; Puffitsch, Wolfgang

2011-01-01

for low WCET bounds rather than high average case performance. Patmos is a dualissue, statically scheduled RISC processor. The instruction cache is organized as a method cache and the data cache is organized as a split cache in order to simplify the cache WCET analysis. To fill the dual-issue pipeline...

Multichannel MAC Layer In Mobile Ad—Hoc Network

Science.gov (United States)

Logesh, K.; Rao, Samba Siva

2010-11-01

This paper we presented the design objectives and technical challenges in Multichannel MAC protocols in Mobile Ad-hoc Network. In IEEE 802.11 a/b/g standards allow use of multiple channels, only a single channel is popularly used, due to the lack of efficient protocols that enable use of Multiple Channels. Even though complex environments in ad hoc networks require a combined control of physical (PHY) and medium access control (MAC) layers resources in order to optimize performance. And also we discuss the characteristics of cross-layer frame and give a multichannel MAC approach.

QL-MAC : a Q-learning based MAC for wireless sensor networks

NARCIS (Netherlands)

Galzarano, S.; Liotta, A.; Fortino, G.; Aversa, R.; Kolodziej, J.; Zhang, J.; Amato, F.; Fortino, G.

2013-01-01

WSNs are becoming an increasingly attractive technology thanks to the significant benefits they can offer to a wide range of application domains. Extending the system lifetime while preserving good network performance is one of the main challenges in WSNs. In this paper, a novel MAC protocol

McMAC: Towards a MAC Protocol with Multi-Constrained QoS Provisioning for Diverse Traffic in Wireless Body Area Networks

Directory of Open Access Journals (Sweden)

Muhammad Mostafa Monowar

2012-11-01

Full Text Available The emergence of heterogeneous applications with diverse requirements forresource-constrained Wireless Body Area Networks (WBANs poses significant challengesfor provisioning Quality of Service (QoS with multi-constraints (delay and reliability whilepreserving energy efficiency. To address such challenges, this paper proposes McMAC,a MAC protocol with multi-constrained QoS provisioning for diverse traffic classes inWBANs. McMAC classifies traffic based on their multi-constrained QoS demands andintroduces a novel superframe structure based on the "transmit-whenever-appropriate"principle, which allows diverse periods for diverse traffic classes according to their respectiveQoS requirements. Furthermore, a novel emergency packet handling mechanism is proposedto ensure packet delivery with the least possible delay and the highest reliability. McMACis also modeled analytically, and extensive simulations were performed to evaluate itsperformance. The results reveal that McMAC achieves the desired delay and reliabilityguarantee according to the requirements of a particular traffic class while achieving energyefficiency.

Library Signage: Applications for the Apple Macintosh and MacPaint.

Science.gov (United States)

Diskin, Jill A.; FitzGerald, Patricia

1984-01-01

Describes specific applications of the Macintosh computer at Carnegie-Mellon University Libraries, where MacPaint was used as a flexible, easy to use, and powerful tool to produce informational, instructional, and promotional signage. Profiles of system hardware and software, an evaluation of the computer program MacPaint, and MacPaint signage…

JPP: A Java Pre-Processor

OpenAIRE

Kiniry, Joseph R.; Cheong, Elaine

1998-01-01

The Java Pre-Processor, or JPP for short, is a parsing pre-processor for the Java programming language. Unlike its namesake (the C/C++ Pre-Processor, cpp), JPP provides functionality above and beyond simple textual substitution. JPP's capabilities include code beautification, code standard conformance checking, class and interface specification and testing, and documentation generation.

MacRuby Ruby and Cocoa on OS X

CERN Document Server

Aimonetti, Matt

2011-01-01

Want to build native Mac OS X applications with a sleek, developer-friendly alternative to Objective-C? MacRuby is an ideal choice. This in-depth guide shows you how Apple's implementation of Ruby gives you access to all the features available to Objective-C programmers. You'll get clear, detailed explanations of MacRuby, including quick programming techniques such as prototyping. Perfect for programmers at any level, this book is packed with code samples and complete project examples. If you use Ruby, you can tap your skills to take advantage of Interface Builder, Cocoa libraries, the Objec

MacBook Pro portable genius

CERN Document Server

Gruman, Galen

2013-01-01

Learn the skills, tools and shortcuts you need in order to make the most of your MacBook Pro This easy-to-use, compact guide skips the fluff and gets right to the essentials so that you can maximize all the latest features of the MacBook Pro. Packed with savvy insights and tips on key tools and shortcuts, this handy book aims to help you increase your productivity and save you time and hassle. From desktop sharing and wireless networking to running Windows applications and more, this book shows you what you want to know. Includes the latest version of OS X, iCloud, FaceTime, and moreCovers al

MacBook Pro Portable Genius

CERN Document Server

Miser, Brad

2012-01-01

Discover loads of tips and techniques for the newest MacBook Pro You're already ahead of the game with a MacBook Pro. Now you can get even more out the popular Apple notebook with the new edition of this handy, compact book. Crammed with savvy insights and tips on key tools and shortcuts, this book will help you increase your productivity and keep your Apple digital lifestyle on track. From desktop sharing and wireless networking to running Windows applications, this book avoids fluff, doesn't skimp on the essentials, saves you time and hassle, and shows you what you most want to know. Include

Learning Unix for Mac OS X Tiger Unlock the Power of Unix

CERN Document Server

Taylor, Dave

2005-01-01

Thoroughly revised and updated for Mac OS X Tiger, this new edition introduces Mac users to the Terminal application and shows you how to navigate the command interface, explore hundreds of Unix applications that come with the Mac, and, most importantly, how to take advantage of both the Mac and Unix interfaces. If you want to master the command-line, this gentle guide to using Unix on Mac OS X Tiger is well worth its cover price

DUAL-PROCESS, a highly reliable process control system

International Nuclear Information System (INIS)

Buerger, L.; Gossanyi, A.; Parkanyi, T.; Szabo, G.; Vegh, E.

1983-02-01

A multiprocessor process control system is described. During its development the reliability was the most important aspect because it is used in the computerized control of a 5 MW research reactor. DUAL-PROCESS is fully compatible with the earlier single processor control system PROCESS-24K. The paper deals in detail with the communication, synchronization, error detection and error recovery problems of the operating system. (author)

MAC layer security issues in wireless mesh networks

Science.gov (United States)

Reddy, K. Ganesh; Thilagam, P. Santhi

2016-03-01

Wireless Mesh Networks (WMNs) have emerged as a promising technology for a broad range of applications due to their self-organizing, self-configuring and self-healing capability, in addition to their low cost and easy maintenance. Securing WMNs is more challenging and complex issue due to their inherent characteristics such as shared wireless medium, multi-hop and inter-network communication, highly dynamic network topology and decentralized architecture. These vulnerable features expose the WMNs to several types of attacks in MAC layer. The existing MAC layer standards and implementations are inadequate to secure these features and fail to provide comprehensive security solutions to protect both backbone and client mesh. Hence, there is a need for developing efficient, scalable and integrated security solutions for WMNs. In this paper, we classify the MAC layer attacks and analyze the existing countermeasures. Based on attacks classification and countermeasures analysis, we derive the research directions to enhance the MAC layer security for WMNs.

A Fair Cooperative MAC Protocol in IEEE 802.11 WLAN

Directory of Open Access Journals (Sweden)

Seyed Davoud Mousavi

2018-05-01

Full Text Available Cooperative communication techniques have recently enabled wireless technologies to overcome their challenges. The main objective of these techniques is to improve resource allocation. In this paper, we propose a new protocol in medium access control (MAC of the IEEE 802.11 standard. In our new protocol, which is called Fair Cooperative MAC (FC-MAC, every relay node participates in cooperation proportionally to its provided cooperation gain. This technique improves network resource allocation by exploiting the potential capacity of all relay candidates. Simulation results demonstrate that the FC-MAC protocol presents better performance in terms of throughput, fairness, and network lifetime.

Producing chopped firewood with firewood processors

International Nuclear Information System (INIS)

Kaerhae, K.; Jouhiaho, A.

2009-01-01

The TTS Institute's research and development project studied both the productivity of new, chopped firewood processors (cross-cutting and splitting machines) suitable for professional and independent small-scale production, and the costs of the chopped firewood produced. Seven chopped firewood processors were tested in the research, six of which were sawing processors and one shearing processor. The chopping work was carried out using wood feeding racks and a wood lifter. The work was also carried out without any feeding appliances. Altogether 132.5 solid m 3 of wood were chopped in the time studies. The firewood processor used had the most significant impact on chopping work productivity. In addition to the firewood processor, the stem mid-diameter, the length of the raw material, and of the firewood were also found to affect productivity. The wood feeding systems also affected productivity. If there is a feeding rack and hydraulic grapple loader available for use in chopping firewood, then it is worth using the wood feeding rack. A wood lifter is only worth using with the largest stems (over 20 cm mid-diameter) if a feeding rack cannot be used. When producing chopped firewood from small-diameter wood, i.e. with a mid-diameter less than 10 cm, the costs of chopping work were over 10 EUR solid m -3 with sawing firewood processors. The shearing firewood processor with a guillotine blade achieved a cost level of 5 EUR solid m -3 when the mid-diameter of the chopped stem was 10 cm. In addition to the raw material, the cost-efficient chopping work also requires several hundred annual operating hours with a firewood processor, which is difficult for individual firewood entrepreneurs to achieve. The operating hours of firewood processors can be increased to the required level by the joint use of the processors by a number of firewood entrepreneurs. (author)

Douglas MacArthur- An Administrative Biography

OpenAIRE

Tehan III, William J.

2002-01-01

For more than a half century Douglas MacArthur was a servant of the United States. He is best remembered as a general and a soldier, especially for his leadership during World War II and the Korean War. MacArthur was also the Superintendent of West Point, Chief of Staff of the U.S. Army, Generalissimo ( Commander) of the Armed Forces and Military Advisor (Minister of Defense) to the President of the Commonwealth of the Philippines, and the Supreme Commander Allied Powers and the Military Gove...

Turning the Big Mac Index into the Medical MAC Index | Wilson ...

African Journals Online (AJOL)

Objective: The purpose of this study was to create a global medical earnings index, called the Medical MAC Index, to enable a comparison of what medical specialists earn in the countries included in the study. Design: The study gathered data on the earnings of specialist anaesthetists employed in state hospitals with five ...

Review of World of Money CD-ROM for PC/Mac [CD-ROM

Directory of Open Access Journals (Sweden)

Philip de Jersey

1998-12-01

Full Text Available Following on from the impressive development of the new HSBC Money Gallery in 1997, the British Museum has launched into the world of electronic publishing with the World of Money, an "interactive exploration of money worldwide from ancient times to the present day". Intended for ages ten to adult, the CD promises "a mine of information about the use, form, history and importance of money around the globe", and "fun and information for all the family". Reviewing in a Mac-unfriendly environment, I have been able to run the CD only on a PC. On a 166Mhz MMX with 32Mb RAM and a 12x CD it runs impressively quickly, with no more than two or three seconds of the "loading new page" display when switching between different parts of the program. Minimum requirements are listed as a 486 with 8Mb RAM, 40Mb free hard disk space, Windows 3.11 or Windows 95, 4x CD drive, 1Mb 256 colours graphics card, 16-bit Sound Blaster compatible sound card, and a VGA monitor. Minimum requirements for the Mac are listed as System 7, 603e processor, 16Mb RAM, 40MB free hard disk space, 6x CD drive, 1Mb video card and Apple monitor or Multisync with adaptor. The CD opens with an image of the British Museum portico, through which we are taken into the foyer, complete with the sound effects of massed ranks of tourists. We have four options available on a lectern, or by turning left, right or going upstairs: History of Money, Information Centre, Activities, and Options. Clicking on a large question mark brings up the Help screens (Figure 1.

Design of an autonomous decentralized MAC protocol for wireless sensor networks

NARCIS (Netherlands)

van Hoesel, L.F.W.; Dal Pont, L.; Havinga, Paul J.M.

In this document the design of a MAC protocol for wireless sensor networks is discussed. The autonomous decentralized TDMA based MAC protocol minimizes power consumtion by efficiency implementing unicast/omnicast, scheduled rendezvous times and wakeup calls. The MAC protocol is an ongoing research

XOP, a fast versatile processor, as a building block for parallel processing in high energy physics experiments

International Nuclear Information System (INIS)

Baehler, P.; Bosco, N.; Lingjaerde, T.; Ljuslin, C.; Van Praag, A.; Werner, P.

1986-01-01

The XOP processor has been designed for trigger calculation and data compression in high energy physics experiments. Therefore, emphasis has been placed upon fast execution and high input/output rate. The fast execution is achieved by a wide instruction word holding operations which are executed concurrently. Thus, the arithmetic operations, data address calculations, data accessing, condition checking, loop count checking and next instruction evaluation all overlap in time. In conventional micro-processors these operations are performed sequentially. In addition, the instruction set comprises not only the classical computer instructions, but also specialized instructions suitable for trigger calculations, such as bit search, population count, loose compare and vector instructions. In order to achieve a high input/output rate, each XOP ECLine interface board is equipped with an input and an output port which fulfil the LeCroy ECLine specifications. The autonomous input port allows a data rate of 40 Mbytes/sec, while the program controlled output port allows 20 Mbytes/sec. For Fastbus based systems a dual Fastbus master interface is under design which allows to build up a Fastbus multi-processor system. This design is being done in collaboration with LAPP Annecy for the CERN Lep L3 experiment. Their scheme comprises 4-5 XOP processors, each of them with a master interface on a data input segment and a master interface on a data output segment. This paper describes the structure of the XOP processor, the interface capabilities and the software development and debugging tools. (Auth.)

Alistair William MacDonald.

Science.gov (United States)

Callegari, Angus

2018-01-06

A devoted family man and churchgoer, Alistair MacDonald was a meticulous vet with a great sense of humour. Having served in the RAF during the Second World War, he had plenty of stories to tell. British Veterinary Association.

Office for iPad and Mac for dummies

CERN Document Server

Weverka, Peter

2015-01-01

The easy way to work with Office on your iPad or Mac Are you a Mac user who isn't accustomed to working with Microsoft Office? Consider this friendly guide your go-to reference! Written in plain English and packed with easy-to-follow, step-by-step instructions, Office for iPad and Mac For Dummies walks you through every facet of Office, from installing the software and opening files to working with Word, Excel, PowerPoint, and Outlook-and beyond. Plus, you'll discover how to manage files, share content and collaborate online through social media, and find help when you need it. Two things a

A Full-Duplex MAC Tailored for 5G Wireless Networks

Directory of Open Access Journals (Sweden)

Lucas de Melo Guimarães

2018-01-01

Full Text Available The increasing demands for high-data rate traffic stimulated the development of the fifth-generation (5G mobile networks. The envisioned 5G network is expected to meet its challenge by devising means to further improve spectrum usage. Many alternatives to enhance spectrum usage are being researched, such as massive MIMO, operation in mmWave frequency, cognitive radio, and the employment of full-duplex antennas. Efficient utilization of the potential of any of these technologies faces a set of challenges related to medium access control (MAC schemes. This work focuses on MAC schemes tailored for full-duplex antennas, since they are expected to play a major role in the foreseeable 5G networks. In this context, this paper presents a MAC layer technique to improve total transmission time when full-duplex antennas are employed. Several evaluations in different scenarios are conducted to assess the proposed MAC scheme. Numerical results show that the proposed scheme provides gains up to 156% when compared to a state-of-the-art full-duplex antenna MAC protocol. Compared to traditional half-duplex antenna MAC protocols, the proposed scheme yields gain up to 412%.

Wound Healing in Mac-1 Deficient Mice

Science.gov (United States)

2017-05-01

Dentistry, University of Illinois at Chicago, Chicago, IL, USA. 2 Department of Defense Biotechnology High Performance Computing Software...study, we used a commercially available Mac-1 deficient strain to examine whether this deficit 5 extends to slightly smaller wounds and incisional...levels of Collagen I and Collagen III in wounds from the two strains of mice at any time point. Unwounded skin from both WT and Mac-1 -/- mice contained

Optical Associative Processors For Visual Perception"

Science.gov (United States)

Casasent, David; Telfer, Brian

1988-05-01

We consider various associative processor modifications required to allow these systems to be used for visual perception, scene analysis, and object recognition. For these applications, decisions on the class of the objects present in the input image are required and thus heteroassociative memories are necessary (rather than the autoassociative memories that have been given most attention). We analyze the performance of both associative processors and note that there is considerable difference between heteroassociative and autoassociative memories. We describe associative processors suitable for realizing functions such as: distortion invariance (using linear discriminant function memory synthesis techniques), noise and image processing performance (using autoassociative memories in cascade with with a heteroassociative processor and with a finite number of autoassociative memory iterations employed), shift invariance (achieved through the use of associative processors operating on feature space data), and the analysis of multiple objects in high noise (which is achieved using associative processing of the output from symbolic correlators). We detail and provide initial demonstrations of the use of associative processors operating on iconic, feature space and symbolic data, as well as adaptive associative processors.

AMD's 64-bit Opteron processor

CERN Multimedia

CERN. Geneva

2003-01-01

This talk concentrates on issues that relate to obtaining peak performance from the Opteron processor. Compiler options, memory layout, MPI issues in multi-processor configurations and the use of a NUMA kernel will be covered. A discussion of recent benchmarking projects and results will also be included.BiographiesDavid RichDavid directs AMD's efforts in high performance computing and also in the use of Opteron processors...

Composable processor virtualization for embedded systems

NARCIS (Netherlands)

Molnos, A.M.; Milutinovic, A.; She, D.; Goossens, K.G.W.

2010-01-01

Processor virtualization divides a physical processor's time among a set of virual machines, enabling efficient hardware utilization, application security and allowing co-existence of different operating systems on the same processor. Through initially intended for the server domain, virtualization

Design of data transportation based on dual-port RAM in IMS system

International Nuclear Information System (INIS)

Zhang Guohui; Li Yongping

2010-01-01

Ion mobility spectroscopy (IMS) is a rugged, portable, sensitive, low cost, field instrumental technique capable of trace organic detection and monitoring for environmental pollutants, pesticides, explosives, narcotics, and other analytes, hence it is of great significance to social security and stability. High rate data transmission mechanism between DSP processor and ARM core is required in the electronic system of IMS. After careful comparison of UART and dual port RAM, a new design based on dual port RAM that can be applied to other similar systems. (authors)

Douglas MacArthur Upon Reflection

National Research Council Canada - National Science Library

Snitchler, Lowell

1998-01-01

.... This research recounts MacArthur's personality development from childhood, investigates his last military campaign, and, finally, applies the diagnosis of narcissistic personality disorder to the assembled data...

PCA/INCREMENT MEMORY interface for analog processors on-line with PC-XT/AT IBM

International Nuclear Information System (INIS)

Biri, S.; Buttsev, V.S.; Molnar, J.; Samojlov, V.N.

1989-01-01

The functional and operational descriptions on PCA/INCREMENT MEMORY interface are discussed. The following is solved with this unit: connection between the analogue signal processor and PC, nuclear spectrum acquisition up to 2 24 -1 counts/channel using increment or decrement method, data read/write from or to memory via data bus PC during the spectrum acquisition. Dual ported memory organization is 4096x24 bit, increment cycle time at 4.77 MHz system clock frequency is 1.05 μs. 6 refs.; 2 figs

Mammalian Synthetic Biology: Time for Big MACs.

Science.gov (United States)

Martella, Andrea; Pollard, Steven M; Dai, Junbiao; Cai, Yizhi

2016-10-21

The enabling technologies of synthetic biology are opening up new opportunities for engineering and enhancement of mammalian cells. This will stimulate diverse applications in many life science sectors such as regenerative medicine, development of biosensing cell lines, therapeutic protein production, and generation of new synthetic genetic regulatory circuits. Harnessing the full potential of these new engineering-based approaches requires the design and assembly of large DNA constructs-potentially up to chromosome scale-and the effective delivery of these large DNA payloads to the host cell. Random integration of large transgenes, encoding therapeutic proteins or genetic circuits into host chromosomes, has several drawbacks such as risks of insertional mutagenesis, lack of control over transgene copy-number and position-specific effects; these can compromise the intended functioning of genetic circuits. The development of a system orthogonal to the endogenous genome is therefore beneficial. Mammalian artificial chromosomes (MACs) are functional, add-on chromosomal elements, which behave as normal chromosomes-being replicating and portioned to daughter cells at each cell division. They are deployed as useful gene expression vectors as they remain independent from the host genome. MACs are maintained as a single-copy and can accommodate multiple gene expression cassettes of, in theory, unlimited DNA size (MACs up to 10 megabases have been constructed). MACs therefore enabled control over ectopic gene expression and represent an excellent platform to rapidly prototype and characterize novel synthetic gene circuits without recourse to engineering the host genome. This review describes the obstacles synthetic biologists face when working with mammalian systems and how the development of improved MACs can overcome these-particularly given the spectacular advances in DNA synthesis and assembly that are fuelling this research area.

RTEMS SMP and MTAPI for Efficient Multi-Core Space Applications on LEON3/LEON4 Processors

Science.gov (United States)

Cederman, Daniel; Hellstrom, Daniel; Sherrill, Joel; Bloom, Gedare; Patte, Mathieu; Zulianello, Marco

2015-09-01

This paper presents the final result of an European Space Agency (ESA) activity aimed at improving the software support for LEON processors used in SMP configurations. One of the benefits of using a multicore system in a SMP configuration is that in many instances it is possible to better utilize the available processing resources by load balancing between cores. This however comes with the cost of having to synchronize operations between cores, leading to increased complexity. While in an AMP system one can use multiple instances of operating systems that are only uni-processor capable, a SMP system requires the operating system to be written to support multicore systems. In this activity we have improved and extended the SMP support of the RTEMS real-time operating system and ensured that it fully supports the multicore capable LEON processors. The targeted hardware in the activity has been the GR712RC, a dual-core core LEON3FT processor, and the functional prototype of ESA's Next Generation Multiprocessor (NGMP), a quad core LEON4 processor. The final version of the NGMP is now available as a product under the name GR740. An implementation of the Multicore Task Management API (MTAPI) has been developed as part of this activity to aid in the parallelization of applications for RTEMS SMP. It allows for simplified development of parallel applications using the task-based programming model. An existing space application, the Gaia Video Processing Unit, has been ported to RTEMS SMP using the MTAPI implementation to demonstrate the feasibility and usefulness of multicore processors for space payload software. The activity is funded by ESA under contract 4000108560/13/NL/JK. Gedare Bloom is supported in part by NSF CNS-0934725.

Florence Jessie Mac Williams

Indian Academy of Sciences (India)

CPMGIKAlBGE-340/2003-05. Resonance - January 2005. Licenced to post WPP No.6 RT Nagar Postoffice. Florence Jessie Mac Williams. (1917 - 1990). Registered with Registrar of Newspapers in India vide Regn. No. 66273/96. ISSN 0971-8044. Price per copy: Rs 40.

Deterministic chaos in the processor load

International Nuclear Information System (INIS)

Halbiniak, Zbigniew; Jozwiak, Ireneusz J.

2007-01-01

In this article we present the results of research whose purpose was to identify the phenomenon of deterministic chaos in the processor load. We analysed the time series of the processor load during efficiency tests of database software. Our research was done on a Sparc Alpha processor working on the UNIX Sun Solaris 5.7 operating system. The conducted analyses proved the presence of the deterministic chaos phenomenon in the processor load in this particular case

Vehicle Health Management Communications Requirements for AeroMACS

Science.gov (United States)

Kerczewski, Robert J.; Clements, Donna J.; Apaza, Rafael D.

2012-01-01

As the development of standards for the aeronautical mobile airport communications system (AeroMACS) progresses, the process of identifying and quantifying appropriate uses for the system is progressing. In addition to defining important elements of AeroMACS standards, indentifying the systems uses impacts AeroMACS bandwidth requirements. Although an initial 59 MHz spectrum allocation for AeroMACS was established in 2007, the allocation may be inadequate; studies have indicated that 100 MHz or more of spectrum may be required to support airport surface communications. Hence additional spectrum allocations have been proposed. Vehicle health management (VHM) systems, which can produce large volumes of vehicle health data, were not considered in the original bandwidth requirements analyses, and are therefore of interest in supporting proposals for additional AeroMACS spectrum. VHM systems are an emerging development in air vehicle safety, and preliminary estimates of the amount of data that will be produced and transmitted off an aircraft, both in flight and on the ground, have been prepared based on estimates of data produced by on-board vehicle health sensors and initial concepts of data processing approaches. This allowed an initial estimate of VHM data transmission requirements for the airport surface. More recently, vehicle-level systems designed to process and analyze VHM data and draw conclusions on the current state of vehicle health have been undergoing testing and evaluation. These systems make use of vehicle system data that is mostly different from VHM data considered previously for airport surface transmission, and produce processed system outputs that will be also need to be archived, thus generating additional data load for AeroMACS. This paper provides an analysis of airport surface data transmission requirements resulting from the vehicle level reasoning systems, within the context of overall VHM data requirements.

Enhanced Sleep Mode MAC Control for EPON

DEFF Research Database (Denmark)

Yan, Ying; Dittmann, Lars

2011-01-01

This paper introduces sleep mode operations for EPON. New MAC control functions are proposed to schedule sleep periods. Traffic profiles are considered to optimize energy efficiency and network performances. Simulation results are analyzed in OPNET modeler.......This paper introduces sleep mode operations for EPON. New MAC control functions are proposed to schedule sleep periods. Traffic profiles are considered to optimize energy efficiency and network performances. Simulation results are analyzed in OPNET modeler....

A Priority-Based Adaptive MAC Protocol for Wireless Body Area Networks

Directory of Open Access Journals (Sweden)

Sabin Bhandari

2016-03-01

Full Text Available In wireless body area networks (WBANs, various sensors and actuators are placed on/inside the human body and connected wirelessly. WBANs have specific requirements for healthcare and medical applications, hence, standard protocols like the IEEE 802.15.4 cannot fulfill all the requirements. Consequently, many medium access control (MAC protocols, mostly derived from the IEEE 802.15.4 superframe structure, have been studied. Nevertheless, they do not support a differentiated quality of service (QoS for the various forms of traffic coexisting in a WBAN. In particular, a QoS-aware MAC protocol is essential for WBANs operating in the unlicensed Industrial, Scientific, and Medical (ISM bands, because different wireless services like Bluetooth, WiFi, and Zigbee may coexist there and cause severe interference. In this paper, we propose a priority-based adaptive MAC (PA-MAC protocol for WBANs in unlicensed bands, which allocates time slots dynamically, based on the traffic priority. Further, multiple channels are effectively utilized to reduce access delays in a WBAN, in the presence of coexisting systems. Our performance evaluation results show that the proposed PA-MAC outperforms the IEEE 802.15.4 MAC and the conventional priority-based MAC in terms of the average transmission time, throughput, energy consumption, and data collision ratio.

A Priority-Based Adaptive MAC Protocol for Wireless Body Area Networks.

Science.gov (United States)

Bhandari, Sabin; Moh, Sangman

2016-03-18

In wireless body area networks (WBANs), various sensors and actuators are placed on/inside the human body and connected wirelessly. WBANs have specific requirements for healthcare and medical applications, hence, standard protocols like the IEEE 802.15.4 cannot fulfill all the requirements. Consequently, many medium access control (MAC) protocols, mostly derived from the IEEE 802.15.4 superframe structure, have been studied. Nevertheless, they do not support a differentiated quality of service (QoS) for the various forms of traffic coexisting in a WBAN. In particular, a QoS-aware MAC protocol is essential for WBANs operating in the unlicensed Industrial, Scientific, and Medical (ISM) bands, because different wireless services like Bluetooth, WiFi, and Zigbee may coexist there and cause severe interference. In this paper, we propose a priority-based adaptive MAC (PA-MAC) protocol for WBANs in unlicensed bands, which allocates time slots dynamically, based on the traffic priority. Further, multiple channels are effectively utilized to reduce access delays in a WBAN, in the presence of coexisting systems. Our performance evaluation results show that the proposed PA-MAC outperforms the IEEE 802.15.4 MAC and the conventional priority-based MAC in terms of the average transmission time, throughput, energy consumption, and data collision ratio.

MAC calorimeters and applications

International Nuclear Information System (INIS)

MAC Collaboration.

1982-03-01

The MAC detector at PEP features a large solid-angle electromagnetic/hadronic calorimeter system, augmented by magnetic charged-particle tracking, muon analysis and scintillator triggering. Its implementation in the context of electron-positron annihilation physics is described, with emphasis on the utilization of calorimetry

Neurovision processor for designing intelligent sensors

Science.gov (United States)

Gupta, Madan M.; Knopf, George K.

1992-03-01

A programmable multi-task neuro-vision processor, called the Positive-Negative (PN) neural processor, is proposed as a plausible hardware mechanism for constructing robust multi-task vision sensors. The computational operations performed by the PN neural processor are loosely based on the neural activity fields exhibited by certain nervous tissue layers situated in the brain. The neuro-vision processor can be programmed to generate diverse dynamic behavior that may be used for spatio-temporal stabilization (STS), short-term visual memory (STVM), spatio-temporal filtering (STF) and pulse frequency modulation (PFM). A multi- functional vision sensor that performs a variety of information processing operations on time- varying two-dimensional sensory images can be constructed from a parallel and hierarchical structure of numerous individually programmed PN neural processors.

MACS as a tool for international inspections

International Nuclear Information System (INIS)

Curtiss, J.A.; Indusi, J.P.

1995-01-01

General acceptance of the challenge provision in the Chemical Weapons Convention has the potential for influence in other arms control areas. While most applications of the challenge inspection may be straightforward, there may be instances where access to the site by inspectors may be problematic. The MACS system described in this paper was developed to respond to these situations. Inspection and verification may be difficult when a host is unwilling,for valid reasons, to permit physical access to a site. We proposed a system of remote sensors which may be used to demonstrate compliance with Chemical Weapons Convention (CWC) challenge inspections even ff the inspector is physically excluded from a sensitive site. The system is based upon alternative-means-of-access provisions of the CWC. The Defense Nuclear Agency (DNA) funded design and construction of a system prototype, designated as MACS for Managed Access by Controlled Sensing. Features of the MACS design allow growth of the prototype into a versatile device for international monitoring of production facilities and other sites. MACS consists of instrumentation and communication equipment allowing site personnel to conduct a facility tour and perform acceptable measurements, while physically excluding the inspector from the facility. MACS consists of a base station used by the inspector, and a mobile unit used within the facility and manipulated by the facility staff. The base station and the mobile unit are at sign ed by a communication system, currently realized as a fiber optic cable. The mobile unit is equipped with television cameras and remote-reading distance-measuring equipment (DME) for use in verifying locations and dimensions. Global Positioning System receivers on the mobile unit provide both precise location and dead reckoning, suitable for tracking the mobile unit's position while within a building when satellite signals are not available

A Conflict-Free Low-Jitter Guaranteed-Rate MAC Protocol for Base-Station Communications in Wireless Mesh Networks

Science.gov (United States)

Szymanski, T. H.

A scheduling algorithm and MAC protocol which provides low-jitter guaranteed-rate (GR) communications between base-stations (BS) in a Wireless Mesh Network (WMN) is proposed. The protocol can provision long-term multimedia services such as VOIP, IPTV, or Video-on-Demand. The time-axis is partitioned into scheduling frames with F time-slots each. A directional antennae scheme is used to provide each directed link with a fixed transmission rate. A protocol such as IntServ is used to provision resources along an end-to-end path of BSs for GR sessions. The Guaranteed Rates between the BSs are then specified in a doubly stochastic traffic rate matrix, which is recursively decomposed to yield a low-jitter GR frame transmission schedule. In the resulting schedule, the end-to-end delay and jitter are small and bounded, and the cell loss rate due to primary scheduling conflicts is zero. For dual-channel WMNs, the MAC protocol can achieve 100% utilization, as well as near-minimal queueing delays and near minimal delay jitter. The scheduling time complexity is O(NFlogNF), where N is the number of BSs. Extensive simulation results are presented.

Mac OS X Snow Leopard for Power Users Advanced Capabilities and Techniques

CERN Document Server

Granneman, Scott

2010-01-01

Mac OS X Snow Leopard for Power Users: Advanced Capabilities and Techniques is for Mac OS X users who want to go beyond the obvious, the standard, and the easy. If want to dig deeper into Mac OS X and maximize your skills and productivity using the world's slickest and most elegant operating system, then this is the book for you. Written by Scott Granneman, an experienced teacher, developer, and consultant, Mac OS X for Power Users helps you push Mac OS X to the max, unveiling advanced techniques and options that you may have not known even existed. Create custom workflows and apps with Automa

VIRTUS: a multi-processor system in FASTBUS

International Nuclear Information System (INIS)

Ellett, J.; Jackson, R.; Ritter, R.; Schlein, P.; Yaeger, D.; Zweizig, J.

1986-01-01

VIRTUS is a system of parallel MC68000-based processors interconnected by FASTBUS that is used either on-line as an intelligent trigger component or off-line for full event processing. Each processor receives the complete set of data from one event. The host computer, a VAX 11/780, down-line loads all software to the processors, controls and monitors the functioning of all processors, and writes processed data to tape. Instructions, programs, and data are transferred among the processors and the host in the form of fixed format, variable length data blocks. (Auth.)

Macintosh Troubleshooting Pocket Guide for Mac OS

CERN Document Server

Lerner, David; Corporation, Tekserve

2009-01-01

The Macintosh Troubleshooting Pocket Guide covers the most common user hardware and software trouble. It's not just a book for Mac OS X (although it includes tips for OS X and Jaguar), it's for anyone who owns a Mac of any type-- there are software tips going back as far as OS 6. This slim guide distills the answers to the urgent questions that Tekserve's employee's answer every week into a handy guide that fits in your back pocket or alongside your keyboard.

A lock circuit for a multi-core processor

DEFF Research Database (Denmark)

2015-01-01

An integrated circuit comprising a multiple processor cores and a lock circuit that comprises a queue register with respective bits set or reset via respective, connections dedicated to respective processor cores, whereby the queue register identifies those among the multiple processor cores...... that are enqueued in the queue register. Furthermore, the integrated circuit comprises a current register and a selector circuit configured to select a processor core and identify that processor core by a value in the current register. A selected processor core is a prioritized processor core among the cores...... configured with an integrated circuit; and a silicon die configured with an integrated circuit....

Directional Medium Access Control (MAC Protocols in Wireless Ad Hoc and Sensor Networks: A Survey

Directory of Open Access Journals (Sweden)

David Tung Chong Wong

2015-06-01

Full Text Available This survey paper presents the state-of-the-art directional medium access control (MAC protocols in wireless ad hoc and sensor networks (WAHSNs. The key benefits of directional antennas over omni-directional antennas are longer communication range, less multipath interference, more spatial reuse, more secure communications, higher throughput and reduced latency. However, directional antennas lead to single-/multi-channel directional hidden/exposed terminals, deafness and neighborhood, head-of-line blocking, and MAC-layer capture which need to be overcome. Addressing these problems and benefits for directional antennas to MAC protocols leads to many classes of directional MAC protocols in WAHSNs. These classes of directional MAC protocols presented in this survey paper include single-channel, multi-channel, cooperative and cognitive directional MACs. Single-channel directional MAC protocols can be classified as contention-based or non-contention-based or hybrid-based, while multi-channel directional MAC protocols commonly use a common control channel for control packets/tones and one or more data channels for directional data transmissions. Cooperative directional MAC protocols improve throughput in WAHSNs via directional multi-rate/single-relay/multiple-relay/two frequency channels/polarization, while cognitive directional MAC protocols leverage on conventional directional MAC protocols with new twists to address dynamic spectrum access. All of these directional MAC protocols are the pillars for the design of future directional MAC protocols in WAHSNs.

Sensitometric control of roentgen film processors

International Nuclear Information System (INIS)

Forsberg, H.; Karolinska Sjukhuset, Stockholm

1987-01-01

Monitoring of film processors performance is essential since image quality, patient dose and costs are influenced by the performance. A system for sensitometric constancy control of film processors and their associated components is described. Experience with the system for 3 years is given when implemented on 17 film processors. Modern high quality film processors have a stability that makes a test frequency of once a week sufficient to maintain adequate image quality. The test system is so sensitive that corrective actions almost invariably have been taken before any technical problem degraded the image quality to a visible degree. (orig.)

Special purpose processors for high energy physics applications

International Nuclear Information System (INIS)

Verkerk, C.

1978-01-01

The review on the subject of hardware processors from very fast decision logic for the split field magnet facility at CERN, to a point-finding processor used to relieve the data-acquisition minicomputer from the task of monitoring the SPS experiment is given. Block diagrams of decision making processor, point-finding processor, complanarity and opening angle processor and programmable track selector module are presented and discussed. The applications of fully programmable but slower processor on the one hand, and very fast and programmable decision logic on the other hand are given in this review

The Central Trigger Processor (CTP)

CERN Multimedia

Franchini, Matteo

2016-01-01

The Central Trigger Processor (CTP) receives trigger information from the calorimeter and muon trigger processors, as well as from other sources of trigger. It makes the Level-1 decision (L1A) based on a trigger menu.

MacIntyre's Moral Theory and Moral Relativism

OpenAIRE

Ali Abedi Renani

2017-01-01

In this paper, I seek to explain the similarity and disparity between MacIntyre’s moral theory and moral relativism. I will argue that MacIntyre’s moral theory can escape the charge of moral relativism because both his earlier social and his later metaphysical approaches appeal to some criteria, the human telos or universal human qualities respectively. The notion of telos is wider than the notion of function which is defined in social contexts. If there is a context-transcending notion of te...

Very Long Instruction Word Processors

Indian Academy of Sciences (India)

Pentium Processor have modified the processor architecture to exploit parallelism in a program. .... The type of operation itself is encoded using 14 bits. .... text of designing simple architectures with low power consump- tion and execute x86 ...

Experimental testing of the noise-canceling processor.

Science.gov (United States)

Collins, Michael D; Baer, Ralph N; Simpson, Harry J

2011-09-01

Signal-processing techniques for localizing an acoustic source buried in noise are tested in a tank experiment. Noise is generated using a discrete source, a bubble generator, and a sprinkler. The experiment has essential elements of a realistic scenario in matched-field processing, including complex source and noise time series in a waveguide with water, sediment, and multipath propagation. The noise-canceling processor is found to outperform the Bartlett processor and provide the correct source range for signal-to-noise ratios below -10 dB. The multivalued Bartlett processor is found to outperform the Bartlett processor but not the noise-canceling processor. © 2011 Acoustical Society of America

The Assessment of Military Multitasking Performance: Validation of a Dual-Task and Multitask Protocol

Science.gov (United States)

2015-11-01

preliminary validity of the Walking and Remembering Test. Journal of geriatric physical therapy . 2009;32(1):2-9. 23. Mancini M, Salarian A, Carlson-Kuhta P...MacMillan), American Physical Therapy Association (APTA) 2014 Annual conference, Charlotte, NC 88 August 18-21, 2014 (paper) A novel dual...Multitasking Performance for Mild TBI. Federal Section, American Physical Therapy Association’s Combined Section Meeting, (Weightman, Scherer, McCulloch

A MAC Mode for Lightweight Block Ciphers

DEFF Research Database (Denmark)

Luykx, Atul; Preneel, Bart; Tischhauser, Elmar Wolfgang

2016-01-01

Lightweight cryptography strives to protect communication in constrained environments without sacrificing security. However, security often conflicts with efficiency, shown by the fact that many new lightweight block cipher designs have block sizes as low as 64 or 32 bits. Such low block sizes lead...... no effect on the security bound, allowing an order of magnitude more data to be processed per key. Furthermore, LightMAC is incredibly simple, has almost no overhead over the block cipher, and is parallelizable. As a result, LightMAC not only offers compact authentication for resource-constrained platforms...

Mr MacDonald's suitcase

DEFF Research Database (Denmark)

2017-01-01

Undervisningsforløbet Mr. MacDonald’s suitcase beskriver læringsmålstyret undervisning i faget engelsk i 1. klasse, hvor der arbejdes med kompetenceområdet mundtlig kommunikation. Undervisningsforløbet er bygget op omkring en engelsk tøjdukke, der besøger klassen og fortæller små historier...

Functional characterization of the copper transcription factor AfMac1 from Aspergillus fumigatus.

Science.gov (United States)

Park, Yong-Sung; Kim, Tae-Hyoung; Yun, Cheol-Won

2017-07-03

Although copper functions as a cofactor in many physiological processes, copper overload leads to harmful effects in living cells. Thus, copper homeostasis is tightly regulated. However, detailed copper metabolic pathways have not yet been identified in filamentous fungi. In this report, we investigated the copper transcription factor AfMac1 ( A spergillus f umigatus Mac1 homolog) and identified its regulatory mechanism in A. fumigatus AfMac1 has domains homologous to the DNA-binding and copper-binding domains of Mac1 from Saccharomyces cerevisiae , and AfMac1 efficiently complemented Mac1 in S. cerevisiae Expression of Afmac1 resulted in CTR1 up-regulation, and mutation of the DNA-binding domain of Afmac1 failed to activate CTR1 expression in S. cerevisiae The Afmac1 deletion strain of A. fumigatus failed to grow in copper-limited media, and its growth was restored by introducing ctrC We found that AfMac1 specifically bound to the promoter region of ctrC based on EMSA. The AfMac1-binding motif 5'-TGTGCTCA-3' was identified from the promoter region of ctrC , and the addition of mutant ctrC lacking the AfMac1-binding motif failed to up-regulate ctrC in A. fumigatus Furthermore, deletion of Afmac1 significantly reduced strain virulence and activated conidial killing activity by neutrophils and macrophages. Taken together, these results suggest that AfMac1 is a copper transcription factor that regulates cellular copper homeostasis in A. fumigatus . © 2017 The Author(s); published by Portland Press Limited on behalf of the Biochemical Society.

Traffic Adaptive MAC Protocols in Wireless Body Area Networks

Directory of Open Access Journals (Sweden)

Farhan Masud

2017-01-01

Full Text Available In Wireless Body Area Networks (WBANs, every healthcare application that is based on physical sensors is responsible for monitoring the vital signs data of patient. WBANs applications consist of heterogeneous and dynamic traffic loads. Routine patient’s observation is described as low-load traffic while an alarming situation that is unpredictable by nature is referred to as high-load traffic. This paper offers a thematic review of traffic adaptive Medium Access Control (MAC protocols in WBANs. First, we have categorized them based on their goals, methods, and metrics of evaluation. The Zigbee standard IEEE 802.15.4 and the baseline MAC IEEE 802.15.6 are also reviewed in terms of traffic adaptive approaches. Furthermore, a comparative analysis of the protocols is made and their performances are analyzed in terms of delay, packet delivery ratio (PDR, and energy consumption. The literature shows that no review work has been done on traffic adaptive MAC protocols in WBANs. This review work, therefore, could add enhancement to traffic adaptive MAC protocols and will stimulate a better way of solving the traffic adaptivity problem.

Development of a highly reliable CRT processor

International Nuclear Information System (INIS)

Shimizu, Tomoya; Saiki, Akira; Hirai, Kenji; Jota, Masayoshi; Fujii, Mikiya

1996-01-01

Although CRT processors have been employed by the main control board to reduce the operator's workload during monitoring, the control systems are still operated by hardware switches. For further advancement, direct controller operation through a display device is expected. A CRT processor providing direct controller operation must be as reliable as the hardware switches are. The authors are developing a new type of highly reliable CRT processor that enables direct controller operations. In this paper, we discuss the design principles behind a highly reliable CRT processor. The principles are defined by studies of software reliability and of the functional reliability of the monitoring and operation systems. The functional configuration of an advanced CRT processor is also addressed. (author)

Computer Generated Inputs for NMIS Processor Verification

International Nuclear Information System (INIS)

J. A. Mullens; J. E. Breeding; J. A. McEvers; R. W. Wysor; L. G. Chiang; J. R. Lenarduzzi; J. T. Mihalczo; J. K. Mattingly

2001-01-01

Proper operation of the Nuclear Identification Materials System (NMIS) processor can be verified using computer-generated inputs [BIST (Built-In-Self-Test)] at the digital inputs. Preselected sequences of input pulses to all channels with known correlation functions are compared to the output of the processor. These types of verifications have been utilized in NMIS type correlation processors at the Oak Ridge National Laboratory since 1984. The use of this test confirmed a malfunction in a NMIS processor at the All-Russian Scientific Research Institute of Experimental Physics (VNIIEF) in 1998. The NMIS processor boards were returned to the U.S. for repair and subsequently used in NMIS passive and active measurements with Pu at VNIIEF in 1999

Steven MacCall: Winner of LJ's 2010 Teaching Award

Science.gov (United States)

Berry, John N., III

2010-01-01

This article profiles Steven L. MacCall, winner of "Library Journal's" 2010 Teaching Award. An associate professor at the School of Library and Information Studies (SLIS) at the University of Alabama, Tuscaloosa, MacCall was nominated by Kathie Popadin, known as "Kpop" to the members of her cohort in the online MLIS program at SLIS. Sixteen of…

3081//sub E/ processor

International Nuclear Information System (INIS)

Kunz, P.F.; Gravina, M.; Oxoby, G.; Trang, Q.; Fucci, A.; Jacobs, D.; Martin, B.; Storr, K.

1983-03-01

Since the introduction of the 168//sub E/, emulating processors have been successful over an amazingly wide range of applications. This paper will describe a second generation processor, the 3081//sub E/. This new processor, which is being developed as a collaboration between SLAC and CERN, goes beyond just fixing the obvious faults of the 168//sub E/. Not only will the 3081//sub E/ have much more memory space, incorporate many more IBM instructions, and have much more memory space, incorporate many more IBM instructions, and have full double precision floating point arithmetic, but it will also have faster execution times and be much simpler to build, debug, and maintain. The simple interface and reasonable cost of the 168//sub E/ will be maintained for the 3081//sub E/

Multimode power processor

Science.gov (United States)

O'Sullivan, George A.; O'Sullivan, Joseph A.

1999-01-01

In one embodiment, a power processor which operates in three modes: an inverter mode wherein power is delivered from a battery to an AC power grid or load; a battery charger mode wherein the battery is charged by a generator; and a parallel mode wherein the generator supplies power to the AC power grid or load in parallel with the battery. In the parallel mode, the system adapts to arbitrary non-linear loads. The power processor may operate on a per-phase basis wherein the load may be synthetically transferred from one phase to another by way of a bumpless transfer which causes no interruption of power to the load when transferring energy sources. Voltage transients and frequency transients delivered to the load when switching between the generator and battery sources are minimized, thereby providing an uninterruptible power supply. The power processor may be used as part of a hybrid electrical power source system which may contain, in one embodiment, a photovoltaic array, diesel engine, and battery power sources.

PixonVision real-time video processor

Science.gov (United States)

Puetter, R. C.; Hier, R. G.

2007-09-01

PixonImaging LLC and DigiVision, Inc. have developed a real-time video processor, the PixonVision PV-200, based on the patented Pixon method for image deblurring and denoising, and DigiVision's spatially adaptive contrast enhancement processor, the DV1000. The PV-200 can process NTSC and PAL video in real time with a latency of 1 field (1/60 th of a second), remove the effects of aerosol scattering from haze, mist, smoke, and dust, improve spatial resolution by up to 2x, decrease noise by up to 6x, and increase local contrast by up to 8x. A newer version of the processor, the PV-300, is now in prototype form and can handle high definition video. Both the PV-200 and PV-300 are FPGA-based processors, which could be spun into ASICs if desired. Obvious applications of these processors include applications in the DOD (tanks, aircraft, and ships), homeland security, intelligence, surveillance, and law enforcement. If developed into an ASIC, these processors will be suitable for a variety of portable applications, including gun sights, night vision goggles, binoculars, and guided munitions. This paper presents a variety of examples of PV-200 processing, including examples appropriate to border security, battlefield applications, port security, and surveillance from unmanned aerial vehicles.

Processors and systems (picture processing)

Energy Technology Data Exchange (ETDEWEB)

Gemmar, P

1983-01-01

Automatic picture processing requires high performance computers and high transmission capacities in the processor units. The author examines the possibilities of operating processors in parallel in order to accelerate the processing of pictures. He therefore discusses a number of available processors and systems for picture processing and illustrates their capacities for special types of picture processing. He stresses the fact that the amount of storage required for picture processing is exceptionally high. The author concludes that it is as yet difficult to decide whether very large groups of simple processors or highly complex multiprocessor systems will provide the best solution. Both methods will be aided by the development of VLSI. New solutions have already been offered (systolic arrays and 3-d processing structures) but they also are subject to losses caused by inherently parallel algorithms. Greater efforts must be made to produce suitable software for multiprocessor systems. Some possibilities for future picture processing systems are discussed. 33 references.

Special processor for in-core control systems

International Nuclear Information System (INIS)

Golovanov, M.N.; Duma, V.R.; Levin, G.L.; Mel'nikov, A.V.; Polikanin, A.V.; Filatov, V.P.

1978-01-01

The BUTs-20 special processor is discussed, designed to control the units of the in-core control equipment which are incorporated into the VECTOR communication channel, and to provide preliminary data processing prior to computer calculations. A set of instructions and flowsheet of the processor, organization of its communication with memories and other units of the system are given. The processor components: a control unit and an arithmetic logical unit are discussed. It is noted that the special processor permits more effective utilization of the computer time

Outside-In Signal Transmission by Conformational Changes in Integrin Mac-11

Science.gov (United States)

Lefort, Craig T.; Hyun, Young-Min; Schultz, Joanne B.; Law, Foon-Yee; Waugh, Richard E.; Knauf, Philip A.; Kim, Minsoo

2010-01-01

Intracellular signals associated with or triggered by integrin ligation can control cell survival, differentiation, proliferation, and migration. Despite accumulating evidence that conformational changes regulate integrin affinity to its ligands, how integrin structure regulates signal transmission from the outside to the inside of the cell remains elusive. Using fluorescence resonance energy transfer, we addressed whether conformational changes in integrin Mac-1 are sufficient to transmit outside-in signals in human neutrophils. Mac-1 conformational activation induced by ligand occupancy or activating Ab binding, but not integrin clustering, triggered similar patterns of intracellular protein tyrosine phosphorylation, including Akt phosphorylation, and inhibited spontaneous neutrophil apoptosis, indicating that global conformational changes are critical for Mac-1-dependent outside-in signal transduction. In neutrophils and myeloid K562 cells, ligand ICAM-1 or activating Ab binding promoted switchblade-like extension of the Mac-1 extracellular domain and separation of the αM and β2 subunit cytoplasmic tails, two structural hallmarks of integrin activation. These data suggest the primacy of global conformational changes in the generation of Mac-1 outside-in signals. PMID:19864611

Mac OS X for Astronomy

Science.gov (United States)

Pierfederici, F.; Pirzkal, N.; Hook, R. N.

Mac OS X is the new Unix based version of the Macintosh operating system. It combines a high performance DisplayPDF user interface with a standard BSD UNIX subsystem and provides users with simultaneous access to a broad range of applications which were not previously available on a single system such as Microsoft Office and Adobe Photoshop, as well as legacy X11-based scientific tools and packages like IRAF, SuperMongo, MIDAS, etc. The combination of a modern GUI layered on top of a familiar UNIX environment paves the way for new, more flexible and powerful astronomical tools to be developed while assuring compatibility with already existing, older programs. In this paper, we outline the strengths of the Mac OS X platform in a scientific environment, astronomy in particular, and point to the numerous astronomical software packages available for this platform; most notably the Scisoft collection which we have compiled.

MacVEE - the intimate Macintosh-VME system

International Nuclear Information System (INIS)

Taylor, B.G.

1986-01-01

The marriage of a mass-produced personal computer with the versatile VMEbus and CAMAC systems creates a cost-effective solution to many laboratory small system requirements. This paper describes MacVEE (Microcomputer Applied to the Control of VME Electronic Equipment), a novel system in which an Apple Macintosh computer is equipped with a special interface which allows it direct memory-mapped access to single or multiple VME and CAMAC crates interconnected by a ribbon cable bus. The bus is driven by an electronics plinth called MacPlinth, which attaches to the computer and becomes an integral part of it. (Auth.)

Functional Verification of Enhanced RISC Processor

OpenAIRE

SHANKER NILANGI; SOWMYA L

2013-01-01

This paper presents design and verification of a 32-bit enhanced RISC processor core having floating point computations integrated within the core, has been designed to reduce the cost and complexity. The designed 3 stage pipelined 32-bit RISC processor is based on the ARM7 processor architecture with single precision floating point multiplier, floating point adder/subtractor for floating point operations and 32 x 32 booths multiplier added to the integer core of ARM7. The binary representati...

Effect of processor temperature on film dosimetry

International Nuclear Information System (INIS)

Srivastava, Shiv P.; Das, Indra J.

2012-01-01

Optical density (OD) of a radiographic film plays an important role in radiation dosimetry, which depends on various parameters, including beam energy, depth, field size, film batch, dose, dose rate, air film interface, postexposure processing time, and temperature of the processor. Most of these parameters have been studied for Kodak XV and extended dose range (EDR) films used in radiation oncology. There is very limited information on processor temperature, which is investigated in this study. Multiple XV and EDR films were exposed in the reference condition (d max. , 10 × 10 cm 2 , 100 cm) to a given dose. An automatic film processor (X-Omat 5000) was used for processing films. The temperature of the processor was adjusted manually with increasing temperature. At each temperature, a set of films was processed to evaluate OD at a given dose. For both films, OD is a linear function of processor temperature in the range of 29.4–40.6°C (85–105°F) for various dose ranges. The changes in processor temperature are directly related to the dose by a quadratic function. A simple linear equation is provided for the changes in OD vs. processor temperature, which could be used for correcting dose in radiation dosimetry when film is used.

C-MAC compared with direct laryngoscopy for intubation in patients with cervical spine immobilization: A manikin trial.

Science.gov (United States)

Smereka, Jacek; Ladny, Jerzy R; Naylor, Amanda; Ruetzler, Kurt; Szarpak, Lukasz

2017-08-01

The aim of this study was to compare C-MAC videolaryngoscopy with direct laryngoscopy for intubation in simulated cervical spine immobilization conditions. The study was designed as a prospective randomized crossover manikin trial. 70 paramedics with immobilization (Scenario A); manual inline cervical immobilization (Scenario B); cervical immobilization using cervical extraction collar (Scenario C). Scenario A: Nearly all participants performed successful intubations with both MAC and C-MAC on the first attempt (95.7% MAC vs. 100% C-MAC), with similar intubation times (16.5s MAC vs. 18s C-MAC). Scenario B: The results with C-MAC were significantly better than those with MAC (pimmobilization. Copyright © 2017 Elsevier Inc. All rights reserved.

Bank switched memory interface for an image processor

International Nuclear Information System (INIS)

Barron, M.; Downward, J.

1980-09-01

A commercially available image processor is interfaced to a PDP-11/45 through an 8K window of memory addresses. When the image processor was not in use it was desired to be able to use the 8K address space as real memory. The standard method of accomplishing this would have been to use UNIBUS switches to switch in either the physical 8K bank of memory or the image processor memory. This method has the disadvantage of being rather expensive. As a simple alternative, a device was built to selectively enable or disable either an 8K bank of memory or the image processor memory. To enable the image processor under program control, GEN is contracted in size, the memory is disabled, a device partition for the image processor is created above GEN, and the image processor memory is enabled. The process is reversed to restore memory to GEN. The hardware to enable/disable the image and computer memories is controlled using spare bits from a DR-11K output register. The image processor and physical memory can be switched in or out on line with no adverse affects on the system's operation

VON WISPR Family Processors: Volume 1

National Research Council Canada - National Science Library

Wagstaff, Ronald

1997-01-01

...) and the background noise they are embedded in. Processors utilizing those fluctuations such as the von WISPR Family Processors discussed herein, are methods or algorithms that preferentially attenuate the fluctuating signals and noise...

A Versatile Image Processor For Digital Diagnostic Imaging And Its Application In Computed Radiography

Science.gov (United States)

Blume, H.; Alexandru, R.; Applegate, R.; Giordano, T.; Kamiya, K.; Kresina, R.

1986-06-01

In a digital diagnostic imaging department, the majority of operations for handling and processing of images can be grouped into a small set of basic operations, such as image data buffering and storage, image processing and analysis, image display, image data transmission and image data compression. These operations occur in almost all nodes of the diagnostic imaging communications network of the department. An image processor architecture was developed in which each of these functions has been mapped into hardware and software modules. The modular approach has advantages in terms of economics, service, expandability and upgradeability. The architectural design is based on the principles of hierarchical functionality, distributed and parallel processing and aims at real time response. Parallel processing and real time response is facilitated in part by a dual bus system: a VME control bus and a high speed image data bus, consisting of 8 independent parallel 16-bit busses, capable of handling combined up to 144 MBytes/sec. The presented image processor is versatile enough to meet the video rate processing needs of digital subtraction angiography, the large pixel matrix processing requirements of static projection radiography, or the broad range of manipulation and display needs of a multi-modality diagnostic work station. Several hardware modules are described in detail. For illustrating the capabilities of the image processor, processed 2000 x 2000 pixel computed radiographs are shown and estimated computation times for executing the processing opera-tions are presented.

Balanced Bipartite Graph Based Register Allocation for Network Processors in Mobile and Wireless Networks

Directory of Open Access Journals (Sweden)

Feilong Tang

2010-01-01

Full Text Available Mobile and wireless networks are the integrant infrastructure of mobile and pervasive computing that aims at providing transparent and preferred information and services for people anytime anywhere. In such environments, end-to-end network bandwidth is crucial to improve user's transparent experience when providing on-demand services such as mobile video playing. As a result, powerful computing power is required for networked nodes, especially for routers. General-purpose processors cannot meet such requirements due to their limited processing ability, and poor programmability and scalability. Intel's network processor IXP is specially designed for fast packet processing to achieve a broad bandwidth. IXP provides a large number of registers to reduce the number of memory accesses. Registers in an IXP are physically partitioned as two banks so that two source operands in an instruction have to come from the two banks respectively, which makes the IXP register allocation tricky and different from conventional ones. In this paper, we investigate an approach for efficiently generating balanced bipartite graph and register allocation algorithms for the dual-bank register allocation in IXPs. The paper presents a graph uniform 2-way partition algorithm (FPT, which provides an optimal solution to the graph partition, and a heuristic algorithm for generating balanced bipartite graph. Finally, we design a framework for IXP register allocation. Experimental results demonstrate the framework and the algorithms are efficient in register allocation for IXP network processors.

Dolphin natures, human virtues: MacIntyre and ethical naturalism.

Science.gov (United States)

Glackin, Shane Nicholas

2008-09-01

Can biological facts explain human morality? Aristotelian 'virtue' ethics has traditionally assumed so. In recent years Alasdair MacIntyre has reintroduced a form of Aristotle's 'metaphysical biology' into his ethics. He argues that the ethological study of dependence and rationality in other species--dolphins in particular--sheds light on how those same traits in the typical lives of humans give rise to the moral virtues. However, some goal-oriented dolphin behaviour appears both dependent and rational in the precise manner which impresses MacIntyre, yet anything but ethically 'virtuous'. More damningly, dolphin ethologists consistently refuse to evaluate such behaviour in the manner MacIntyre claims is appropriate to moral judgement. In light of this, I argue that virtues--insofar as they name a biological or ethological category--do not name a morally significant one.

Many - body simulations using an array processor

International Nuclear Information System (INIS)

Rapaport, D.C.

1985-01-01

Simulations of microscopic models of water and polypeptides using molecular dynamics and Monte Carlo techniques have been carried out with the aid of an FPS array processor. The computational techniques are discussed, with emphasis on the development and optimization of the software to take account of the special features of the processor. The computing requirements of these simulations exceed what could be reasonably carried out on a normal 'scientific' computer. While the FPS processor is highly suited to the kinds of models described, several other computationally intensive problems in statistical mechanics are outlined for which alternative processor architectures are more appropriate

Multi-processor network implementations in Multibus II and VME

International Nuclear Information System (INIS)

Briegel, C.

1992-01-01

ACNET (Fermilab Accelerator Controls Network), a proprietary network protocol, is implemented in a multi-processor configuration for both Multibus II and VME. The implementations are contrasted by the bus protocol and software design goals. The Multibus II implementation provides for multiple processors running a duplicate set of tasks on each processor. For a network connected task, messages are distributed by a network round-robin scheduler. Further, messages can be stopped, continued, or re-routed for each task by user-callable commands. The VME implementation provides for multiple processors running one task across all processors. The process can either be fixed to a particular processor or dynamically allocated to an available processor depending on the scheduling algorithm of the multi-processing operating system. (author)

Efficient MAC Protocol for Hybrid Wireless Network with Heterogeneous Sensor Nodes

Directory of Open Access Journals (Sweden)

Md. Nasre Alam

2016-01-01

Full Text Available Although several Directional Medium Access Control (DMAC protocols have been designed for use with homogeneous networks, it can take a substantial amount of time to change sensor nodes that are equipped with an omnidirectional antenna for sensor nodes with a directional antenna. Thus, we require a novel MAC protocol for use with an intermediate wireless network that consists of heterogeneous sensor nodes equipped with either an omnidirectional antenna or a directional antenna. The MAC protocols that have been designed for use in homogeneous networks are not suitable for use in a hybrid network due to deaf, hidden, and exposed nodes. Therefore, we propose a MAC protocol that exploits the characteristics of a directional antenna and can also work efficiently with omnidirectional nodes in a hybrid network. In order to address the deaf, hidden, and exposed node problems, we define RTS/CTS for the neighbor (RTSN/CTSN and Neighbor Information (NIP packets. The performance of the proposed MAC protocol is evaluated through a numerical analysis using a Markov model. In addition, the analytical results of the MAC protocol are verified through an OPNET simulation.

Interference Analysis Status and Plans for Aeronautical Mobile Airport Communications System (AeroMACS)

Science.gov (United States)

Kerczewski, Robert J.; Wilson, Jeffrey D.

2010-01-01

Interference issues related to the operation of an aeronautical mobile airport communications system (AeroMACS) in the C-Band (specifically 5091-5150 MHz) is being investigated. The issue of primary interest is co-channel interference from AeroMACS into mobile-satellite system (MSS) feeder uplinks. The effort is focusing on establishing practical limits on AeroMACS transmissions from airports so that the threshold of interference into MSS is not exceeded. The analyses are being performed with the software package Visualyse Professional, developed by Transfinite Systems Limited. Results with omni-directional antennas and plans to extend the models to represent AeroMACS more accurately will be presented. These models should enable realistic analyses of emerging AeroMACS designs to be developed from NASA Test Bed, RTCA 223, and European results.

Mac OS X Snow Leopard pocket guide

CERN Document Server

Seiblod, Chris

2009-01-01

Whether you're new to the Mac or a longtime user, this handy book is the quickest way to get up to speed on Snow Leopard. Packed with concise information in an easy-to-read format, Mac OS X Snow Leopard Pocket Guide covers what you need to know and is an ideal resource for problem-solving on the fly. This book goes right to the heart of Snow Leopard, with details on system preferences, built-in applications, and utilities. You'll also find configuration tips, keyboard shortcuts, guides for troubleshooting, lots of step-by-step instructions, and more. Learn about new features and changes s

Array processors based on Gaussian fraction-free method

Energy Technology Data Exchange (ETDEWEB)

Peng, S; Sedukhin, S [Aizu Univ., Aizuwakamatsu, Fukushima (Japan); Sedukhin, I

1998-03-01

The design of algorithmic array processors for solving linear systems of equations using fraction-free Gaussian elimination method is presented. The design is based on a formal approach which constructs a family of planar array processors systematically. These array processors are synthesized and analyzed. It is shown that some array processors are optimal in the framework of linear allocation of computations and in terms of number of processing elements and computing time. (author)

Dependence of AeroMACS Interference on Airport Radiation Pattern Characteristics

Science.gov (United States)

Wilson, Jeffrey D.

2012-01-01

AeroMACS (Aeronautical Mobile Airport Communications System), which is based upon the IEEE 802.16e mobile wireless standard, is expected to be implemented in the 5091 to 5150 MHz frequency band. As this band is also occupied by Mobile Satellite Service (MSS) feeder uplinks, AeroMACS must be designed to avoid interference with this incumbent service. The aspects of AeroMACS operation that present potential interference are under analysis in order to enable the definition of standards that assure that such interference will be avoided. In this study, the cumulative interference power distribution at low earth orbit from AeroMACS transmitters at the 497 major airports in the contiguous United States was simulated with the Visualyse Professional software. The dependence of the interference power on the number of antenna beams per airport, gain patterns, and beam direction orientations was simulated. As a function of these parameters, the simulation results are presented in terms of the limitations on transmitter power required to maintain the cumulative interference power under the established threshold.

Multiple Embedded Processors for Fault-Tolerant Computing

Science.gov (United States)

Bolotin, Gary; Watson, Robert; Katanyoutanant, Sunant; Burke, Gary; Wang, Mandy

2005-01-01

A fault-tolerant computer architecture has been conceived in an effort to reduce vulnerability to single-event upsets (spurious bit flips caused by impingement of energetic ionizing particles or photons). As in some prior fault-tolerant architectures, the redundancy needed for fault tolerance is obtained by use of multiple processors in one computer. Unlike prior architectures, the multiple processors are embedded in a single field-programmable gate array (FPGA). What makes this new approach practical is the recent commercial availability of FPGAs that are capable of having multiple embedded processors. A working prototype (see figure) consists of two embedded IBM PowerPC 405 processor cores and a comparator built on a Xilinx Virtex-II Pro FPGA. This relatively simple instantiation of the architecture implements an error-detection scheme. A planned future version, incorporating four processors and two comparators, would correct some errors in addition to detecting them.

Online track processor for the CDF upgrade

International Nuclear Information System (INIS)

Thomson, E. J.

2002-01-01

A trigger track processor, called the eXtremely Fast Tracker (XFT), has been designed for the CDF upgrade. This processor identifies high transverse momentum (> 1.5 GeV/c) charged particles in the new central outer tracking chamber for CDF II. The XFT design is highly parallel to handle the input rate of 183 Gbits/s and output rate of 44 Gbits/s. The processor is pipelined and reports the result for a new event every 132 ns. The processor uses three stages: hit classification, segment finding, and segment linking. The pattern recognition algorithms for the three stages are implemented in programmable logic devices (PLDs) which allow in-situ modification of the algorithm at any time. The PLDs reside on three different types of modules. The complete system has been installed and commissioned at CDF II. An overview of the track processor and performance in CDF Run II are presented

Design Principles for Synthesizable Processor Cores

DEFF Research Database (Denmark)

Schleuniger, Pascal; McKee, Sally A.; Karlsson, Sven

2012-01-01

As FPGAs get more competitive, synthesizable processor cores become an attractive choice for embedded computing. Currently popular commercial processor cores do not fully exploit current FPGA architectures. In this paper, we propose general design principles to increase instruction throughput...

Data register and processor for multiwire chambers

International Nuclear Information System (INIS)

Karpukhin, V.V.

1985-01-01

A data register and a processor for data receiving and processing from drift chambers of a device for investigating relativistic positroniums are described. The data are delivered to the register input in the form of the Grey 8 bit code, memorized and transformed to a position code. The register information is delivered to the KAMAK trunk and to the front panel plug. The processor selects particle tracks in a horizontal plane of the facility. ΔY maximum coordinate divergence and minimum point quantity on the track are set from the processor front panel. Processor solution time is 16 μs maximum quantity of simultaneously analyzed coordinates is 16

Evaluation of video transmission of MAC protocols in wireless sensor network

Science.gov (United States)

Maulidin, Mahmuddin, M.; Kamaruddin, L. M.; Elsaikh, Mohamed

2016-08-01

Wireless Sensor Network (WSN) is a wireless network which consists of sensor nodes scattered in a particular area which are used to monitor physical or environment condition. Each node in WSN is also scattered in sensor field, so an appropriate scheme of MAC protocol should have to develop communication link for data transferring. Video transmission is one of the important applications for the future that can be transmitted with low aspect in side of cost and also power consumption. In this paper, comparison of five different MAC WSN protocol for video transmission namely IEEE 802.11 standard, IEEE 802.15.4 standard, CSMA/CA, Berkeley-MAC, and Lightweight-MAC protocol are studied. Simulation experiment has been conducted in OMNeT++ with INET network simulator software to evaluate the performance. Obtained results indicate that IEEE 802.11 works better than other protocol in term of packet delivery, throughput, and latency.

Development methods for VLSI-processors

International Nuclear Information System (INIS)

Horninger, K.; Sandweg, G.

1982-01-01

The aim of this project, which was originally planed for 3 years, was the development of modern system and circuit concepts, for VLSI-processors having a 32 bit wide data path. The result of this first years work is the concept of a general purpose processor. This processor is not only logically but also physically (on the chip) divided into four functional units: a microprogrammable instruction unit, an execution unit in slice technique, a fully associative cache memory and an I/O unit. For the ALU of the execution unit circuits in PLA and slice techniques have been realized. On the basis of regularity, area consumption and achievable performance the slice technique has been prefered. The designs utilize selftesting circuitry. (orig.) [de

The performance of an LSI-11/23 with a SKYMNK-Q array processor as a high speed front end processor

International Nuclear Information System (INIS)

Clark, D.L.

1983-01-01

The NSRL has recently installed a VAX-11/750 based data acquisition system which is networked to two LSI-11/23 satellite processors. Each of the LSI's are connected to CAMAC branch drivers. The LSI's have small array processors installed for use in preprocessing data. The objective is to provide an easy to use high speed processor that will relieve the VAX of some of the real-time data analysis tasks. The basic operation of the array processor and some of the results of performance tests are described

Embedded Processor Laboratory

Data.gov (United States)

Federal Laboratory Consortium — The Embedded Processor Laboratory provides the means to design, develop, fabricate, and test embedded computers for missile guidance electronics systems in support...

Architectural design and analysis of a programmable image processor

International Nuclear Information System (INIS)

Siyal, M.Y.; Chowdhry, B.S.; Rajput, A.Q.K.

2003-01-01

In this paper we present an architectural design and analysis of a programmable image processor, nicknamed Snake. The processor was designed with a high degree of parallelism to speed up a range of image processing operations. Data parallelism found in array processors has been included into the architecture of the proposed processor. The implementation of commonly used image processing algorithms and their performance evaluation are also discussed. The performance of Snake is also compared with other types of processor architectures. (author)

Analytical Bounds on the Threads in IXP1200 Network Processor

OpenAIRE

Ramakrishna, STGS; Jamadagni, HS

2003-01-01

Increasing link speeds have placed enormous burden on the processing requirements and the processors are expected to carry out a variety of tasks. Network Processors (NP) [1] [2] is the blanket name given to the processors, which are traded for flexibility and performance. Network Processors are offered by a number of vendors; to take the main burden of processing requirement of network related operations from the conventional processors. The Network Processors cover a spectrum of design trad...

Eliminating the Heart from the Curcumin Molecule: Monocarbonyl Curcumin Mimics (MACs

Directory of Open Access Journals (Sweden)

Dinesh Shetty

2014-12-01

Full Text Available Curcumin is a natural product with several thousand years of heritage. Its traditional Asian application to human ailments has been subjected in recent decades to worldwide pharmacological, biochemical and clinical investigations. Curcumin’s Achilles heel lies in its poor aqueous solubility and rapid degradation at pH ~ 7.4. Researchers have sought to unlock curcumin’s assets by chemical manipulation. One class of molecules under scrutiny are the monocarbonyl analogs of curcumin (MACs. A thousand plus such agents have been created and tested primarily against cancer and inflammation. The outcome is clear. In vitro, MACs furnish a 10–20 fold potency gain vs. curcumin for numerous cancer cell lines and cellular proteins. Similarly, MACs have successfully demonstrated better pharmacokinetic (PK profiles in mice and greater tumor regression in cancer xenografts in vivo than curcumin. The compounds reveal limited toxicity as measured by murine weight gain and histopathological assessment. To our knowledge, MAC members have not yet been monitored in larger animals or humans. However, Phase 1 clinical trials are certainly on the horizon. The present review focuses on the large and evolving body of work in cancer and inflammation, but also covers MAC structural diversity and early discovery for treatment of bacteria, tuberculosis, Alzheimer’s disease and malaria.

Eliminating the Heart from the Curcumin Molecule: Monocarbonyl Curcumin Mimics (MACs)

Science.gov (United States)

Shetty, Dinesh; Kim, Yong Joon; Shim, Hyunsuk; Snyder, James P.

2015-01-01

Curcumin is a natural product with several thousand years of heritage. Its traditional Asian application to human ailments has been subjected in recent decades to worldwide pharmacological, biochemical and clinical investigations. Curcumin’s Achilles heel lies in its poor aqueous solubility and rapid degradation at pH ~ 7.4. Researchers have sought to unlock curcumin’s assets by chemical manipulation. One class of molecules under scrutiny are the monocarbonyl analogs of curcumin (MACs). A thousand plus such agents have been created and tested primarily against cancer and inflammation. The outcome is clear. In vitro, MACs furnish a 10–20 fold potency gain vs. curcumin for numerous cancer cell lines and cellular proteins. Similarly, MACs have successfully demonstrated better pharmacokinetic (PK) profiles in mice and greater tumor regression in cancer xenografts in vivo than curcumin. The compounds reveal limited toxicity as measured by murine weight gain and histopathological assessment. To our knowledge, MAC members have not yet been monitored in larger animals or humans. However, Phase 1 clinical trials are certainly on the horizon. The present review focuses on the large and evolving body of work in cancer and inflammation, but also covers MAC structural diversity and early discovery for treatment of bacteria, tuberculosis, Alzheimer’s disease and malaria. PMID:25547726

A UNIX-based prototype biomedical virtual image processor

International Nuclear Information System (INIS)

Fahy, J.B.; Kim, Y.

1987-01-01

The authors have developed a multiprocess virtual image processor for the IBM PC/AT, in order to maximize image processing software portability for biomedical applications. An interprocess communication scheme, based on two-way metacode exchange, has been developed and verified for this purpose. Application programs call a device-independent image processing library, which transfers commands over a shared data bridge to one or more Autonomous Virtual Image Processors (AVIP). Each AVIP runs as a separate process in the UNIX operating system, and implements the device-independent functions on the image processor to which it corresponds. Application programs can control multiple image processors at a time, change the image processor configuration used at any time, and are completely portable among image processors for which an AVIP has been implemented. Run-time speeds have been found to be acceptable for higher level functions, although rather slow for lower level functions, owing to the overhead associated with sending commands and data over the shared data bridge

The communication processor of TUMULT-64

NARCIS (Netherlands)

Smit, Gerardus Johannes Maria; Jansen, P.G.

1988-01-01

Tumult (Twente University MULTi-processor system) is a modular extendible multi-processor system designed and implemented at the Twente University of Technology in co-operation with Oce Nederland B.V. and the Dr. Neher Laboratories (Dutch PTT). Characteristics of the hardware are: MIMD type,

Visualization of integrin Mac-1 in vivo.

Science.gov (United States)

Lim, Kihong; Hyun, Young-Min; Lambert-Emo, Kris; Topham, David J; Kim, Minsoo

2015-11-01

β2 integrins play critical roles in migration of immune cells and in the interaction with other cells, pathogens, and the extracellular matrix. Among the β2 integrins, Mac-1 (Macrophage antigen-1), composed of CD11b and CD18, is mainly expressed in innate immune cells and plays a major role in cell migration and trafficking. In order to image Mac-1-expressing cells both in live cells and mouse, we generated a knock-in (KI) mouse strain expressing CD11b conjugated with monomeric yellow fluorescent protein (mYFP). Expression of CD11b-mYFP protein was confirmed by Western blot and silver staining of CD11b-immunoprecipitates and total cell lysates from the mouse splenocytes. Mac-1-mediated functions of the KI neutrophils were comparable with those in WT cells. The fluorescence intensity of CD11b-mYFP was sufficient to image CD11b expressing cells in live mice using intravital two-photon microscopy. In vitro, dynamic changes in the intracellular localization of CD11b molecules could be measured by epifluorescent microscopy. Finally, CD11b-expressing immune cells from tissue were easily detected by flow cytometry without anti-CD11b antibody staining. Copyright © 2015 Elsevier B.V. All rights reserved.

MAC Version 3.2, MBA Version 1.3 acceptance test summary report

International Nuclear Information System (INIS)

Russell, V.K.

1994-01-01

The K Basins Materials Accounting (MAC) and Materials Balance (MBA) programs had the Paradox Conversion to 4.0 ATP run to check out the systems. This report describes the results of the test and provides the signoff sheets associated with the testing. The test primarily concentrated on verifying that MAC and MBA software would run properly in the Paradox 4.0 environment. Changes in the MAC and MBA programs were basically limited to superficial items needed to accommodate the enhanced method of execution

Geochemistry and petrography of the MacAlpine Hills lunar meteorites

Science.gov (United States)

Lindstrom, Marilyn M.; Mckay, David S.; Wentworth, Susan J.; Martinez, Rene R.; Mittlefehldt, David W.; Wang, Ming-Sheng; Lipschutz, Michael E.

1991-01-01

MacAlpine Hills 88104 and 88105, anorthositic lunar meteorites recovered form the same area in Antartica, are characterized. Petrographic studies show that MAC88104/5 is a polymict breccia dominated by impact melt clasts. It is better classified as a fragmental breccia than a regolith breccia. The bulk composition is ferroan and highly aluminous (Al2O3-28 percent).

Paradox applications integration ATP's for MAC and mass balance programs

International Nuclear Information System (INIS)

Russell, V.K.; Mullaney, J.E.

1994-01-01

The K Basins Materials Accounting (MAC) and Material Balance (MBA) database system were set up to run under one common applications program. This Acceptance Test Plan (ATP) describes how the code was to be tested to verify its correctness. The scope of the tests is minimal, since both MAC and MBA have already been tested in detail as stand-alone programs

Experimental Evaluation of Simulation Abstractions for Wireless Sensor Network MAC Protocols

Directory of Open Access Journals (Sweden)

G. P. Halkes

2010-01-01

Full Text Available The evaluation of MAC protocols for Wireless Sensor Networks (WSNs is often performed through simulation. These simulations necessarily abstract away from reality in many ways. However, the impact of these abstractions on the results of the simulations has received only limited attention. Moreover, many studies on the accuracy of simulation have studied either the physical layer and per link effects or routing protocol effects. To the best of our knowledge, no other work has focused on the study of the simulation abstractions with respect to MAC protocol performance. In this paper, we present the results of an experimental study of two often used abstractions in the simulation of WSN MAC protocols. We show that a simple SNR-based reception model can provide quite accurate results for metrics commonly used to evaluate MAC protocols. Furthermore, we provide an analysis of what the main sources of deviation are and thereby how the simulations can be improved to provide even better results.

MAC-layer protocol for TCP fairness in Wireless Mesh Networks

KAUST Repository

Nawab, Faisal

2012-08-01

In this paper we study the interactions of TCP and IEEE 802.11 MAC in Wireless Mesh Networks (WMNs). We use a Markov chain to capture the behavior of TCP sessions, particularly the impact on network throughput performance due to the effect of queue utilization and packet relaying. A closed form solution is derived to numerically determine the throughput. Based on the developed model, we propose a distributed MAC protocol to alleviate the unfairness problem in WMNs. Our protocol uses the age of packet as a priority metric for packet scheduling. Simulation is conducted to validate our model and to illustrate the fairness characteristics of our proposed MAC protocol. We conclude that we can achieve fairness with only little impact on network capacity.

Dual Wake-up Low Power Listening for Duty Cycled Wireless Sensor Networks

Directory of Open Access Journals (Sweden)

Jongkeun Na

2008-01-01

Full Text Available Energy management is an interesting research area for wireless sensor networks. Relevant dutycycling (or sleep scheduling algorithm has been actively studied at MAC, routing, and application levels. Low power listening (LPL MAC is one of effective dutycycling techniques. This paper proposes a novel approach called dual wake-up LPL (DW-LPL. Existing LPL scheme uses a preamble detection method for both broadcast and unicast, thus suffers from severe overhearing problem at unicast transmission. DW-LPL uses a different wake-up method for unicast while using LPL-like method for broadcast; DW-LPL introduces a receiver-initiated method in which a sender waits a signal from receiver to start unicast transmission, which incurs some signaling overhead but supports flexible adaptive listening as well as overhearing removal effect. Through analysis and Mote (Telosb experiment, we show that DW-LPL provides more energy saving than LPL and our adaptive listening scheme is effective for energy conservation in practical network topologies and traffic patterns.

Dual Wake-up Low Power Listening for Duty Cycled Wireless Sensor Networks

Directory of Open Access Journals (Sweden)

Lim Sangsoon

2008-01-01

Full Text Available Abstract Energy management is an interesting research area for wireless sensor networks. Relevant dutycycling (or sleep scheduling algorithm has been actively studied at MAC, routing, and application levels. Low power listening (LPL MAC is one of effective dutycycling techniques. This paper proposes a novel approach called dual wake-up LPL (DW-LPL. Existing LPL scheme uses a preamble detection method for both broadcast and unicast, thus suffers from severe overhearing problem at unicast transmission. DW-LPL uses a different wake-up method for unicast while using LPL-like method for broadcast; DW-LPL introduces a receiver-initiated method in which a sender waits a signal from receiver to start unicast transmission, which incurs some signaling overhead but supports flexible adaptive listening as well as overhearing removal effect. Through analysis and Mote (Telosb experiment, we show that DW-LPL provides more energy saving than LPL and our adaptive listening scheme is effective for energy conservation in practical network topologies and traffic patterns.

Detomidine reduces isoflurane anesthetic requirement (MAC) in horses.

Science.gov (United States)

Steffey, Eugene P; Pascoe, Peter J

2002-10-01

To quantitate the dose- and time-related magnitude of the anesthetic sparing effect of, and selected physiological responses to detomidine during isoflurane anesthesia in horses. Randomized cross-over study. Three, healthy, young adult horses weighing 485 ± 14 kg. Horses were anesthetized on two occasions to determine the minimum alveolar concentration (MAC) of isoflurane in O 2 and then to measure the anesthetic sparing effect (time-related MAC reduction) following IV detomidine (0.03 and 0.06 mg kg -1 ). Selected common measures of cardiopulmonary function, blood glucose and urinary output were also recorded. Isoflurane MAC was 1.44 ± 0.07% (mean ± SEM). This was reduced by 42.8 ± 5.4% and 44.8 ± 3.0% at 83 ± 23 and 125 ± 36 minutes, respectively, following 0.03 and 0.06 mg kg -1 , detomidine. The MAC reduction was detomidine dose- and time-dependent. There was a tendency for mild cardiovascular and respiratory depression, especially following the higher detomidine dose. Detomidine increased both blood glucose and urine flow; the magnitude of these changes was time- and dose-dependent CONCLUSIONS: Detomidine reduces anesthetic requirement for isoflurane and increases blood glucose concentration and urine flow in horses. These changes were dose- and time-related. The results imply potent anesthetic sparing actions by detomidine. The detomidine-related increased urine flow should be considered in designing anesthetic protocols for individual horses. Copyright © 2002 Association of Veterinary Anaesthetists and American College of Veterinary Anesthesia and Analgesia. Published by Elsevier Ltd. All rights reserved.

Accuracies Of Optical Processors For Adaptive Optics

Science.gov (United States)

Downie, John D.; Goodman, Joseph W.

1992-01-01

Paper presents analysis of accuracies and requirements concerning accuracies of optical linear-algebra processors (OLAP's) in adaptive-optics imaging systems. Much faster than digital electronic processor and eliminate some residual distortion. Question whether errors introduced by analog processing of OLAP overcome advantage of greater speed. Paper addresses issue by presenting estimate of accuracy required in general OLAP that yields smaller average residual aberration of wave front than digital electronic processor computing at given speed.

An Interview with Peter MacDonald.

Science.gov (United States)

American Indian Journal, 1979

1979-01-01

Peter MacDonald, Chairman of the Navajo Nation, the largest tribe in the United States speaks to such issues as energy development/management, oil companies, Navajo-Hopi relocation legislation, traditionalism, and the role of the Council of Energy Resource Tribes. (RTS)

Making CSB + -Trees Processor Conscious

DEFF Research Database (Denmark)

Samuel, Michael; Pedersen, Anders Uhl; Bonnet, Philippe

2005-01-01

of the CSB+-tree. We argue that it is necessary to consider a larger group of parameters in order to adapt CSB+-tree to processor architectures as different as Pentium and Itanium. We identify this group of parameters and study how it impacts the performance of CSB+-tree on Itanium 2. Finally, we propose......Cache-conscious indexes, such as CSB+-tree, are sensitive to the underlying processor architecture. In this paper, we focus on how to adapt the CSB+-tree so that it performs well on a range of different processor architectures. Previous work has focused on the impact of node size on the performance...... a systematic method for adapting CSB+-tree to new platforms. This work is a first step towards integrating CSB+-tree in MySQL’s heap storage manager....

Lipsi: Probably the Smallest Processor in the World

DEFF Research Database (Denmark)

Schoeberl, Martin

2018-01-01

While research on high-performance processors is important, it is also interesting to explore processor architectures at the other end of the spectrum: tiny processor cores for auxiliary functions. While it is common to implement small circuits for such functions, such as a serial port, in dedica...... at a minimal cost....

Recommending the heterogeneous cluster type multi-processor system computing

International Nuclear Information System (INIS)

Iijima, Nobukazu

2010-01-01

Real-time reactor simulator had been developed by reusing the equipment of the Musashi reactor and its performance improvement became indispensable for research tools to increase sampling rate with introduction of arithmetic units using multi-Digital Signal Processor(DSP) system (cluster). In order to realize the heterogeneous cluster type multi-processor system computing, combination of two kinds of Control Processor (CP) s, Cluster Control Processor (CCP) and System Control Processor (SCP), were proposed with Large System Control Processor (LSCP) for hierarchical cluster if needed. Faster computing performance of this system was well evaluated by simulation results for simultaneous execution of plural jobs and also pipeline processing between clusters, which showed the system led to effective use of existing system and enhancement of the cost performance. (T. Tanaka)

Teaching a Classic for All Ages: Fairy Tales and Stories of George MacDonald.

Science.gov (United States)

Sadler, Glenn Edward

1995-01-01

Discusses the life and writings of George MacDonald (1824-1905). Suggests that the most striking feature of MacDonald's children's books is his sensitivity toward spiritual values and the power of change within the lives of his characters. Appends a list of questions to stimulate student response to MacDonald's writings. (RS)

Are hamburgers harmless? : the Big Mac Index in the twenty-first century

OpenAIRE

Soo, Kwok Tong

2016-01-01

We make use of The Economist’s Big Mac Index (BMI) to investigate the Law of One Price (LOP) and whether the BMI can be used to predict future exchange rate and price changes. Deviations from Big Mac parity decay quickly, in approximately 1 year. The BMI is a better predictor of relative price changes than of exchange rate changes, and performs best when predicting a depreciation of a currency relative to the US dollar. Convergence to Big Mac parity occurs more rapidly for currencies with som...

First level trigger processor for the ZEUS calorimeter

International Nuclear Information System (INIS)

Dawson, J.W.; Talaga, R.L.; Burr, G.W.; Laird, R.J.; Smith, W.; Lackey, J.

1990-01-01

This paper discusses the design of the first level trigger processor for the ZEUS calorimeter. This processor accepts data from the 13,000 photomultipliers of the calorimeter which is topologically divided into 16 regions, and after regional preprocessing, performs logical and numerical operations which cross regional boundaries. Because the crossing period at the HERA collider is 96 ns, it is necessary that first-level trigger decisions be made in pipelined hardware. One microsecond is allowed for the processor to perform the required logical and numerical operations, during which time the data from ten crossings would be resident in the processor while being clocked through the pipelined hardware. The circuitry is implemented in 100K ECL, Advanced CMOS discrete devices, and programmable gate arrays, and operates in a VME environment. All tables and registers are written/read from VME, and all diagnostic codes are executed from VME. Preprocessed data flows into the processor at a rate of 5.2GB/s, and processed data flows from the processor to the Global First-Level Trigger at a rate of 700MB/s. The system allows for subsets of the logic to be configured by software and for various important variables to be histogrammed as they flow through the processor. 2 refs., 3 figs

First-level trigger processor for the ZEUS calorimeter

International Nuclear Information System (INIS)

Dawson, J.W.; Talaga, R.L.; Burr, G.W.; Laird, R.J.; Smith, W.; Lackey, J.

1990-01-01

The design of the first-level trigger processor for the Zeus calorimeter is discussed. This processor accepts data from the 13,000 photomultipliers of the calorimeter, which is topologically divided into 16 regions, and after regional preprocessing performs logical and numerical operations that cross regional boundaries. Because the crossing period at the HERA collider is 96 ns, it is necessary that first-level trigger decisions be made in pipelined hardware. One microsecond is allowed for the processor to perform the required logical and numerical operations, during which time the data from ten crossings would be resident in the processor while being clocked through the pipelined hardware. The circuitry is implemented in 100K emitter-coupled logic (ECL), advanced CMOS discrete devices and programmable gate arrays, and operates in a VME environment. All tables and registers are written/read from VME, and all diagnostic codes are executed from VME. Preprocessed data flows into the processor at a rate of 5.2 Gbyte/s, and processed data flows from the processor to the global first-level trigger at a rate of 70 Mbyte/s. The system allows for subsets of the logic to be configured by software and for various important variables to be histogrammed as they flow through the processor

GENETIC FINGERPRINTING OF MYCOBACTERIUM AVIUM COMPLEX (MAC) ORGANISMS ISOLATED FROM HOSPITAL PATIENTS AND THE ENVIRONMENT

Science.gov (United States)

A particularly pathogenic group of mycobacteria belong to the Mycobacterium avium complex (MAC), which includes M. avium and M. intracellulare. MAC organisms cause disease in children, the elderly, and immuno-compromised individuals. A critical step in preventing MAC infections...

MacIntyre, Managerialism and Universities

Science.gov (United States)

Stolz, Steven A.

2017-01-01

MacIntyre's earlier work and concern with social science enquiry not only exposes its limits, but also provides an insight into how its knowledge claims have been put to ideological use. He maintains that the institutional embodiment of these ideological ideas is the bureaucratic manager who has had a negative role to play in social structures…

Living in the Fragments of Dreams: Analysis of the Dual-Narrative Structure in Kenneth MacMillan's "Winter Dreams" from Narratological and Psychoanalytical Perspectives

Science.gov (United States)

Kodera, Ryota

2012-01-01

This essay investigates the ways dance narratives are constructed and aims to reconfirm the significance of dance narratives in the creation of meanings within dance practices. It draws on key concepts in narratology and psychoanalysis. These two critical perspectives are applied to the analysis of the narrative in Kenneth MacMillan's 1991 one-act…

A digital retina-like low-level vision processor.

Science.gov (United States)

Mertoguno, S; Bourbakis, N G

2003-01-01

This correspondence presents the basic design and the simulation of a low level multilayer vision processor that emulates to some degree the functional behavior of a human retina. This retina-like multilayer processor is the lower part of an autonomous self-organized vision system, called Kydon, that could be used on visually impaired people with a damaged visual cerebral cortex. The Kydon vision system, however, is not presented in this paper. The retina-like processor consists of four major layers, where each of them is an array processor based on hexagonal, autonomous processing elements that perform a certain set of low level vision tasks, such as smoothing and light adaptation, edge detection, segmentation, line recognition and region-graph generation. At each layer, the array processor is a 2D array of k/spl times/m hexagonal identical autonomous cells that simultaneously execute certain low level vision tasks. Thus, the hardware design and the simulation at the transistor level of the processing elements (PEs) of the retina-like processor and its simulated functionality with illustrative examples are provided in this paper.

MAP, MAC, and vortex-rings configurations in the Weinberg-Salam model

Science.gov (United States)

Teh, Rosy; Ng, Ban-Loong; Wong, Khai-Ming

2015-11-01

We report on the presence of new axially symmetric monopoles, antimonopoles and vortex-rings solutions of the SU(2)×U(1) Weinberg-Salam model of electromagnetic and weak interactions. When the ϕ-winding number n = 1, and 2, the configurations are monopole-antimonopole pair (MAP) and monopole-antimonopole chain (MAC) with poles of alternating sign magnetic charge arranged along the z-axis. Vortex-rings start to appear from the MAP and MAC configurations when the winding number n = 3. The MAP configurations possess zero net magnetic charge whereas the MAC configurations possess net magnetic charge of 4 πn / e. In the MAP configurations, the monopole-antimonopole pair is bounded by the Z0 field flux string and there is an electromagnetic current loop encircling it. The monopole and antimonopole possess magnetic charges ± 4πn/e sin2θW respectively. In the MAC configurations there is no string connecting the monopole and the adjacent antimonopole and they possess magnetic charges ± 4 πn/e respectively. The MAC configurations possess infinite total energy and zero magnetic dipole moment whereas the MAP configurations which are actually sphalerons possess finite total energy and magnetic dipole moment. The configurations were investigated for varying values of Higgs self-coupling constant 0 ≤ λ ≤ 40 at Weinberg angle θW = π/4.

Behavioral Modeling of WSN MAC Layer Security Attacks: A Sequential UML Approach

DEFF Research Database (Denmark)

Pawar, Pranav M.; Nielsen, Rasmus Hjorth; Prasad, Neeli R.

2012-01-01

is the vulnerability to security attacks/threats. The performance and behavior of a WSN are vastly affected by such attacks. In order to be able to better address the vulnerabilities of WSNs in terms of security, it is important to understand the behavior of the attacks. This paper addresses the behavioral modeling...... of medium access control (MAC) security attacks in WSNs. The MAC layer is responsible for energy consumption, delay and channel utilization of the network and attacks on this layer can introduce significant degradation of the individual sensor nodes due to energy drain and in performance due to delays....... The behavioral modeling of attacks will be beneficial for designing efficient and secure MAC layer protocols. The security attacks are modeled using a sequential diagram approach of Unified Modeling Language (UML). Further, a new attack definition, specific to hybrid MAC mechanisms, is proposed....

Median and Morphological Specialized Processors for a Real-Time Image Data Processing

Directory of Open Access Journals (Sweden)

Kazimierz Wiatr

2002-01-01

Full Text Available This paper presents the considerations on selecting a multiprocessor MISD architecture for fast implementation of the vision image processing. Using the author′s earlier experience with real-time systems, implementing of specialized hardware processors based on the programmable FPGA systems has been proposed in the pipeline architecture. In particular, the following processors are presented: median filter and morphological processor. The structure of a universal reconfigurable processor developed has been proposed as well. Experimental results are presented as delays on LCA level implementation for median filter, morphological processor, convolution processor, look-up-table processor, logic processor and histogram processor. These times compare with delays in general purpose processor and DSP processor.

Java Processor Optimized for RTSJ

Directory of Open Access Journals (Sweden)

Tu Shiliang

2007-01-01

Full Text Available Due to the preeminent work of the real-time specification for Java (RTSJ, Java is increasingly expected to become the leading programming language in real-time systems. To provide a Java platform suitable for real-time applications, a Java processor which can execute Java bytecode is directly proposed in this paper. It provides efficient support in hardware for some mechanisms specified in the RTSJ and offers a simpler programming model through ameliorating the scoped memory of the RTSJ. The worst case execution time (WCET of the bytecodes implemented in this processor is predictable by employing the optimization method proposed in our previous work, in which all the processing interfering predictability is handled before bytecode execution. Further advantage of this method is to make the implementation of the processor simpler and suited to a low-cost FPGA chip.

After MacIntyre : Kaasaegsest vooruseetikast / Meego Remmel

Index Scriptorium Estoniae

Remmel, Meego

2006-01-01

Alasdair MacIntyre panus 20. sajandi eetikasse. Tema käsitlus vooruseetikast ja vooruseetilisest perspektiivist, mida on võimalik näha komplekselt, vaadeldes voorust, praktikat, narratiivi ja traditsiooni mõisteid

Windowsista Mac-maailmaan

OpenAIRE

Sirkiä, Noora-Maria

2010-01-01

Nykyään yhä useampi harkitsee erilaisista syistä käyttöjärjestelmän vaihtamista tutusta Windowsista johonkin muuhun käyttöjärjestelmään. Applen Macintosh-tietokoneiden mukana tuleva Mac OS X -käyttöjärjestelmä on hyvä vaihtoehto Windowsille. Ihmiset siirtyvät siihen mm. tietoturvaseikkojen, luotettavuuden, ohjelmiston sekä Applen koneiden ja käyttöjärjestelmän ulkomuodon takia. Microsoftin tuotteista ei myöskään tarvitse luopua kokonaan, sillä monista tutuista Microsoftin ohjelmista (esim. Mi...

Data collection from FASTBUS to a DEC UNIBUS processor through the UNIBUS-Processor Interface

International Nuclear Information System (INIS)

Larwill, M.; Barsotti, E.; Lesny, D.; Pordes, R.

1983-01-01

This paper describes the use of the UNIBUS Processor Interface, an interface between FASTBUS and the Digital Equipment Corporation UNIBUS. The UPI was developed by Fermilab and the University of Illinois. Details of the use of this interface in a high energy physics experiment at Fermilab are given. The paper includes a discussion of the operation of the UPI on the UNIBUS of a VAX-11, and plans for using the UPI to perform data acquisition from FASTBUS to a VAX-11 Processor

New development for low energy electron beam processor

International Nuclear Information System (INIS)

Takei, Taro; Goto, Hitoshi; Oizumi, Matsutoshi; Hirakawa, Tetsuya; Ochi, Masafumi

2003-01-01

Newly developed low-energy electron beam (EB) processors that have unique designs and configurations compared to conventional ones enable electron-beam treatment of small three-dimensional objects, such as grain-like agricultural products and small plastic parts. As the EB processor can irradiate the products from the whole angles, the uniform EB treatment can be achieved at one time regardless the complex shapes of the product. Here presented are two new EB processors: the first system has cylindrical process zone, which allows three-dimensional objects to be irradiated with one-pass treatment. The second is a tube-type small EB processor, achieving not only its compactor design, but also higher beam extraction efficiency and flexible installation of the irradiation heads. The basic design of each processor and potential applications with them will be presented in this paper. (author)

A hybrid path-oriented code assignment CDMA-based MAC protocol for underwater acoustic sensor networks.

Science.gov (United States)

Chen, Huifang; Fan, Guangyu; Xie, Lei; Cui, Jun-Hong

2013-11-04

Due to the characteristics of underwater acoustic channel, media access control (MAC) protocols designed for underwater acoustic sensor networks (UWASNs) are quite different from those for terrestrial wireless sensor networks. Moreover, in a sink-oriented network with event information generation in a sensor field and message forwarding to the sink hop-by-hop, the sensors near the sink have to transmit more packets than those far from the sink, and then a funneling effect occurs, which leads to packet congestion, collisions and losses, especially in UWASNs with long propagation delays. An improved CDMA-based MAC protocol, named path-oriented code assignment (POCA) CDMA MAC (POCA-CDMA-MAC), is proposed for UWASNs in this paper. In the proposed MAC protocol, both the round-robin method and CDMA technology are adopted to make the sink receive packets from multiple paths simultaneously. Since the number of paths for information gathering is much less than that of nodes, the length of the spreading code used in the POCA-CDMA-MAC protocol is shorter greatly than that used in the CDMA-based protocols with transmitter-oriented code assignment (TOCA) or receiver-oriented code assignment (ROCA). Simulation results show that the proposed POCA-CDMA-MAC protocol achieves a higher network throughput and a lower end-to-end delay compared to other CDMA-based MAC protocols.

A Hybrid Path-Oriented Code Assignment CDMA-Based MAC Protocol for Underwater Acoustic Sensor Networks

Directory of Open Access Journals (Sweden)

Huifang Chen

2013-11-01

Full Text Available Due to the characteristics of underwater acoustic channel, media access control (MAC protocols designed for underwater acoustic sensor networks (UWASNs are quite different from those for terrestrial wireless sensor networks. Moreover, in a sink-oriented network with event information generation in a sensor field and message forwarding to the sink hop-by-hop, the sensors near the sink have to transmit more packets than those far from the sink, and then a funneling effect occurs, which leads to packet congestion, collisions and losses, especially in UWASNs with long propagation delays. An improved CDMA-based MAC protocol, named path-oriented code assignment (POCA CDMA MAC (POCA-CDMA-MAC, is proposed for UWASNs in this paper. In the proposed MAC protocol, both the round-robin method and CDMA technology are adopted to make the sink receive packets from multiple paths simultaneously. Since the number of paths for information gathering is much less than that of nodes, the length of the spreading code used in the POCA-CDMA-MAC protocol is shorter greatly than that used in the CDMA-based protocols with transmitter-oriented code assignment (TOCA or receiver-oriented code assignment (ROCA. Simulation results show that the proposed POCA-CDMA-MAC protocol achieves a higher network throughput and a lower end-to-end delay compared to other CDMA-based MAC protocols.

Reliable Multicast MAC Protocol for IEEE 802.11 Wireless LANs with Extended Service Range

Science.gov (United States)

Choi, Woo-Yong

2011-11-01

In this paper, we propose the efficient reliable multicast MAC protocol by which the AP (Access Point) can transmit reliably its multicast data frames to the recipients in the AP's one-hop or two-hop transmission range. The AP uses the STAs (Stations) that are directly associated with itself as the relays for the data delivery to the remote recipients that cannot be reached directly from itself. Based on the connectivity information among the recipients, the reliable multicast MAC protocol optimizes the number of the RAK (Request for ACK) frame transmissions in a reasonable computational time. Numerical examples show that our proposed MAC protocol significantly enhances the MAC performance compared with the BMMM (Batch Mode Multicast MAC) protocol that is extended to support the recipients that are in the AP's one-hop or two-hop transmission range in IEEE 802.11 wireless LANs.

Joining X-Ray to Lensing: An Accurate Combined Analysis of MACS J0416.1–2403

Energy Technology Data Exchange (ETDEWEB)

Bonamigo, M.; Grillo, C. [Dark Cosmology Centre, Niels Bohr Institute, University of Copenhagen, Juliane Maries Vej 30, DK-2100 Copenhagen (Denmark); Ettori, S. [INAF, Osservatorio Astronomico di Bologna, Via Piero Gobetti, 93/3, 40129 Bologna (Italy); Caminha, G. B.; Rosati, P. [Dipartimento di Fisica e Scienze della Terra, Università degli Studi di Ferrara, Via Saragat 1, I-44122 Ferrara (Italy); Mercurio, A. [INAF—Osservatorio Astronomico di Capodimonte, Via Moiariello 16, I-80131 Napoli (Italy); Annunziatella, M. [INAF—Osservatorio Astronomico di Trieste, Via G.B. Tiepolo, 11 I-34143 Trieste (Italy); Balestra, I. [University Observatory Munich, Scheinerstrasse 1, D-81679 Munich (Germany); Lombardi, M., E-mail: bonamigo@dark-cosmology.dk [Dipartimento di Fisica, Università degli Studi di Milano, via Celoria 16, I-20133 Milano (Italy)

2017-06-20

We present a novel approach for a combined analysis of X-ray and gravitational lensing data and apply this technique to the merging galaxy cluster MACS J0416.1–2403. The method exploits the information on the intracluster gas distribution that comes from a fit of the X-ray surface brightness and then includes the hot gas as a fixed mass component in the strong-lensing analysis. With our new technique, we can separate the collisional from the collision-less diffuse mass components, thus obtaining a more accurate reconstruction of the dark matter distribution in the core of a cluster. We introduce an analytical description of the X-ray emission coming from a set of dual pseudo-isothermal elliptical mass distributions, which can be directly used in most lensing softwares. By combining Chandra observations with Hubble Frontier Fields imaging and Multi Unit Spectroscopic Explorer spectroscopy in MACS J0416.1–2403, we measure a projected gas-to-total mass fraction of approximately 10% at 350 kpc from the cluster center. Compared to the results of a more traditional cluster mass model (diffuse halos plus member galaxies), we find a significant difference in the cumulative projected mass profile of the dark matter component and that the dark matter over total mass fraction is almost constant, out to more than 350 kpc. In the coming era of large surveys, these results show the need of multiprobe analyses for detailed dark matter studies in galaxy clusters.

Mapping of MAC Address with Moving WiFi Scanner

Directory of Open Access Journals (Sweden)

Arief Hidayat

2017-10-01

Full Text Available Recently, Wifi is one of the most useful technologies that can be used for detecting and counting MAC Address. This paper described using of WiFi scanner which carried out seven times circulated the bus. The method used WiFi and GPS are to counting MAC address as raw data from the pedestrian smartphone, bus passenger or WiFi devices near from the bus as long as the bus going around the route. There are seven processes to make map WiFi data.

Antibiotic Resistance Mediated by the MacB ABC Transporter Family: A Structural and Functional Perspective

Directory of Open Access Journals (Sweden)

Nicholas P. Greene

2018-05-01

Full Text Available The MacB ABC transporter forms a tripartite efflux pump with the MacA adaptor protein and TolC outer membrane exit duct to expel antibiotics and export virulence factors from Gram-negative bacteria. Here, we review recent structural and functional data on MacB and its homologs. MacB has a fold that is distinct from other structurally characterized ABC transporters and uses a unique molecular mechanism termed mechanotransmission. Unlike other bacterial ABC transporters, MacB does not transport substrates across the inner membrane in which it is based, but instead couples cytoplasmic ATP hydrolysis with transmembrane conformational changes that are used to perform work in the extra-cytoplasmic space. In the MacAB-TolC tripartite pump, mechanotransmission drives efflux of antibiotics and export of a protein toxin from the periplasmic space via the TolC exit duct. Homologous tripartite systems from pathogenic bacteria similarly export protein-like signaling molecules, virulence factors and siderophores. In addition, many MacB-like ABC transporters do not form tripartite pumps, but instead operate in diverse cellular processes including antibiotic sensing, cell division and lipoprotein trafficking.

Antibiotic Resistance Mediated by the MacB ABC Transporter Family: A Structural and Functional Perspective

Science.gov (United States)

Greene, Nicholas P.; Kaplan, Elise; Crow, Allister; Koronakis, Vassilis

2018-01-01

The MacB ABC transporter forms a tripartite efflux pump with the MacA adaptor protein and TolC outer membrane exit duct to expel antibiotics and export virulence factors from Gram-negative bacteria. Here, we review recent structural and functional data on MacB and its homologs. MacB has a fold that is distinct from other structurally characterized ABC transporters and uses a unique molecular mechanism termed mechanotransmission. Unlike other bacterial ABC transporters, MacB does not transport substrates across the inner membrane in which it is based, but instead couples cytoplasmic ATP hydrolysis with transmembrane conformational changes that are used to perform work in the extra-cytoplasmic space. In the MacAB-TolC tripartite pump, mechanotransmission drives efflux of antibiotics and export of a protein toxin from the periplasmic space via the TolC exit duct. Homologous tripartite systems from pathogenic bacteria similarly export protein-like signaling molecules, virulence factors and siderophores. In addition, many MacB-like ABC transporters do not form tripartite pumps, but instead operate in diverse cellular processes including antibiotic sensing, cell division and lipoprotein trafficking. PMID:29892271

A data base processor semantics specification package

Science.gov (United States)

Fishwick, P. A.

1983-01-01

A Semantics Specification Package (DBPSSP) for the Intel Data Base Processor (DBP) is defined. DBPSSP serves as a collection of cross assembly tools that allow the analyst to assemble request blocks on the host computer for passage to the DBP. The assembly tools discussed in this report may be effectively used in conjunction with a DBP compatible data communications protocol to form a query processor, precompiler, or file management system for the database processor. The source modules representing the components of DBPSSP are fully commented and included.

An energy-efficient MAC protocol using dynamic queue management for delay-tolerant mobile sensor networks.

Science.gov (United States)

Li, Jie; Li, Qiyue; Qu, Yugui; Zhao, Baohua

2011-01-01

Conventional MAC protocols for wireless sensor network perform poorly when faced with a delay-tolerant mobile network environment. Characterized by a highly dynamic and sparse topology, poor network connectivity as well as data delay-tolerance, delay-tolerant mobile sensor networks exacerbate the severe power constraints and memory limitations of nodes. This paper proposes an energy-efficient MAC protocol using dynamic queue management (EQ-MAC) for power saving and data queue management. Via data transfers initiated by the target sink and the use of a dynamic queue management strategy based on priority, EQ-MAC effectively avoids untargeted transfers, increases the chance of successful data transmission, and makes useful data reach the target terminal in a timely manner. Experimental results show that EQ-MAC has high energy efficiency in comparison with a conventional MAC protocol. It also achieves a 46% decrease in packet drop probability, 79% increase in system throughput, and 25% decrease in mean packet delay.

An Energy-Efficient MAC Protocol Using Dynamic Queue Management for Delay-Tolerant Mobile Sensor Networks

Directory of Open Access Journals (Sweden)

Yugui Qu

2011-02-01

Full Text Available Conventional MAC protocols for wireless sensor network perform poorly when faced with a delay-tolerant mobile network environment. Characterized by a highly dynamic and sparse topology, poor network connectivity as well as data delay-tolerance, delay-tolerant mobile sensor networks exacerbate the severe power constraints and memory limitations of nodes. This paper proposes an energy-efficient MAC protocol using dynamic queue management (EQ-MAC for power saving and data queue management. Via data transfers initiated by the target sink and the use of a dynamic queue management strategy based on priority, EQ-MAC effectively avoids untargeted transfers, increases the chance of successful data transmission, and makes useful data reach the target terminal in a timely manner. Experimental results show that EQ-MAC has high energy efficiency in comparison with a conventional MAC protocol. It also achieves a 46% decrease in packet drop probability, 79% increase in system throughput, and 25% decrease in mean packet delay.

TR-MAC: an energy-efficient MAC protocol for wireless sensor networks exploiting noise-based transmitted reference modulation

NARCIS (Netherlands)

Morshed, S.; Dimitrova, D.C.; Brogle, M.; Braun, T.; Heijenk, Gerhard J.

Energy-constrained behavior of sensor nodes is one of the most important criteria for successful deployment of wireless sensor net- works. The medium access control (MAC) protocol determines the time a sensor node transceiver spends listening or transmitting, and hence the energy consumption of the

Globe hosts launch of new processor

CERN Multimedia

2006-01-01

Launch of the quadecore processor chip at the Globe. On 14 November, in a series of major media events around the world, the chip-maker Intel launched its new 'quadcore' processor. For the regions of Europe, the Middle East and Africa, the day-long launch event took place in CERN's Globe of Science and Innovation, with over 30 journalists in attendance, coming from as far away as Johannesburg and Dubai. CERN was a significant choice for the event: the first tests of this new generation of processor in Europe had been made at CERN over the preceding months, as part of CERN openlab, a research partnership with leading IT companies such as Intel, HP and Oracle. The event also provided the opportunity for the journalists to visit ATLAS and the CERN Computer Centre. The strategy of putting multiple processor cores on the same chip, which has been pursued by Intel and other chip-makers in the last few years, represents an important departure from the more traditional improvements in the sheer speed of such chips. ...

Crystallization and preliminary X-ray crystallographic analysis of MacA from Actinobacillus actinomycetemcomitans

International Nuclear Information System (INIS)

Piao, Shunfu; Xu, Yongbin; Ha, Nam-Chul

2008-01-01

A periplasmic membrane-fusion protein MacA from Actinobacillus actinomycetemcomitans, an essential component of the multidrug efflux pump in Gram-negative bacteria, was crystallized. Periplasmic membrane-fusion proteins (MFPs) are an essential component of the multidrug efflux pump in Gram-negative bacteria. They play a crucial role in bridging the outer membrane porin TolC and two distinct types of inner membrane transporters. The MFP MacA bridges the inner membrane ABC-type multidrug transporter MacB and the outer membrane porin TolC. MacA from the pathogenic bacterium Actinobacillus actinomycetemcomitans was expressed in Escherichia coli B834 (DE3) and the recombinant protein was purified using Ni–NTA affinity, Q anion-exchange and gel-filtration chromatography. The purified MacA protein was crystallized using the vapour-diffusion method. A MAD diffraction data set was collected to a resolution of 3.0 Å at 100 K. The crystal belongs to space group P622, with unit-cell parameters a = b = 109.2, c = 255.4 Å, α = β = 90, γ = 120°, and contains one molecule in the asymmetric unit

Crystallization and preliminary X-ray crystallographic analysis of MacA from Actinobacillus actinomycetemcomitans

Energy Technology Data Exchange (ETDEWEB)

Piao, Shunfu; Xu, Yongbin; Ha, Nam-Chul, E-mail: hnc@pusan.ac.kr [College of Pharmacy and Research Institute for Drug Development, Pusan National University, Jangjeon-dong, Geumjeong-gu, Busan 609-735 (Korea, Republic of)

2008-05-01

A periplasmic membrane-fusion protein MacA from Actinobacillus actinomycetemcomitans, an essential component of the multidrug efflux pump in Gram-negative bacteria, was crystallized. Periplasmic membrane-fusion proteins (MFPs) are an essential component of the multidrug efflux pump in Gram-negative bacteria. They play a crucial role in bridging the outer membrane porin TolC and two distinct types of inner membrane transporters. The MFP MacA bridges the inner membrane ABC-type multidrug transporter MacB and the outer membrane porin TolC. MacA from the pathogenic bacterium Actinobacillus actinomycetemcomitans was expressed in Escherichia coli B834 (DE3) and the recombinant protein was purified using Ni–NTA affinity, Q anion-exchange and gel-filtration chromatography. The purified MacA protein was crystallized using the vapour-diffusion method. A MAD diffraction data set was collected to a resolution of 3.0 Å at 100 K. The crystal belongs to space group P622, with unit-cell parameters a = b = 109.2, c = 255.4 Å, α = β = 90, γ = 120°, and contains one molecule in the asymmetric unit.

Public Relations as "Practice": Applying the Theory of Alasdair MacIntyre.

Science.gov (United States)

Leeper, Roy V.; Leeper, Kathie A.

2001-01-01

Considers how public relation's search for a unifying theory may be fulfilled through application of Alasdair MacIntyre's concept of a "practice," a very specific and value-laden concept. Explores what it would mean to be a public relations practice in MacIntyre's concept of the term and argues that such an approach to public relations…

XL-100S microprogrammable processor

International Nuclear Information System (INIS)

Gorbunov, N.V.; Guzik, Z.; Sutulin, V.A.; Forytski, A.

1983-01-01

The XL-100S microprogrammable processor providing the multiprocessor operation mode in the XL system crate is described. The processor meets the EUR 6500 CAMAC standards, address up to 4 Mbyte memory, and interacts with 7 CAMAC branchas. Eight external requests initiate operations preset by a sequence of microcommands in a memory of the capacity up to 64 kwords of 32-Git. The microprocessor architecture allows one to emulate commands of the majority of mini- or micro-computers, including floating point operations. The XL-100S processor may be used in various branches of experimental physics: for physical experiment apparatus control, fast selection of useful physical events, organization of the of input/output operations, organization of direct assess to memory included, etc. The Am2900 microprocessor set is used as an elementary base. The device is made in the form of a single width CAMAC module

Improved b lifetime measurement from MAC

International Nuclear Information System (INIS)

Ford, W.T.

1984-03-01

Two recent publications, from the MAC and Mark II collaborations, have reported the somewhat surprising result that the lifetime of particles made up of b quarks is in the 1 to 2 picosecond range, or somewhat longer than the lifetimes of charm particles. Although the charm decays are favored transitions while those of b particles depend upon off-diagonal elements of the weak flavor mixing matrix, the smallness of the b decay rates in face of the large available phase space indicates that the off-diagonal elements are indeed very small. The possibility for complete determination of the mixing matrix was brought significantly nearer by the availability of the lifetime information; what is needed now is to reduce the uncertainty of the measurements, which was about 33% for both experiments. We describe here an extension of the b lifetime study with the MAC detector, incorporating some new data and improvements in the analysis. 12 references

Acoustooptic linear algebra processors - Architectures, algorithms, and applications

Science.gov (United States)

Casasent, D.

1984-01-01

Architectures, algorithms, and applications for systolic processors are described with attention to the realization of parallel algorithms on various optical systolic array processors. Systolic processors for matrices with special structure and matrices of general structure, and the realization of matrix-vector, matrix-matrix, and triple-matrix products and such architectures are described. Parallel algorithms for direct and indirect solutions to systems of linear algebraic equations and their implementation on optical systolic processors are detailed with attention to the pipelining and flow of data and operations. Parallel algorithms and their optical realization for LU and QR matrix decomposition are specifically detailed. These represent the fundamental operations necessary in the implementation of least squares, eigenvalue, and SVD solutions. Specific applications (e.g., the solution of partial differential equations, adaptive noise cancellation, and optimal control) are described to typify the use of matrix processors in modern advanced signal processing.

Simulation of a processor switching circuit with APLSV

International Nuclear Information System (INIS)

Dilcher, H.

1979-01-01

The report describes the simulation of a processor switching circuit with APL. Furthermore an APL function is represented to simulate a processor in an assembly like language. Both together serve as a tool for studying processor properties. By means of the programming function it is also possible to program other simulated processors. The processor is to be used in the processing of data in real time analysis that occur in high energy physics experiments. The data are already offered to the computer in digitalized form. A typical data rate is at 10 KB/ sec. The data are structured in blocks. The particular blocks are 1 KB wide and are independent from each other. Aprocessor has to decide, whether the block data belong to an event that is part of the backround noise and can therefore be forgotten, or whether the data should be saved for a later evaluation. (orig./WB) [de

Accuracy Limitations in Optical Linear Algebra Processors

Science.gov (United States)

Batsell, Stephen Gordon

1990-01-01

One of the limiting factors in applying optical linear algebra processors (OLAPs) to real-world problems has been the poor achievable accuracy of these processors. Little previous research has been done on determining noise sources from a systems perspective which would include noise generated in the multiplication and addition operations, noise from spatial variations across arrays, and from crosstalk. In this dissertation, we propose a second-order statistical model for an OLAP which incorporates all these system noise sources. We now apply this knowledge to determining upper and lower bounds on the achievable accuracy. This is accomplished by first translating the standard definition of accuracy used in electronic digital processors to analog optical processors. We then employ our second-order statistical model. Having determined a general accuracy equation, we consider limiting cases such as for ideal and noisy components. From the ideal case, we find the fundamental limitations on improving analog processor accuracy. From the noisy case, we determine the practical limitations based on both device and system noise sources. These bounds allow system trade-offs to be made both in the choice of architecture and in individual components in such a way as to maximize the accuracy of the processor. Finally, by determining the fundamental limitations, we show the system engineer when the accuracy desired can be achieved from hardware or architecture improvements and when it must come from signal pre-processing and/or post-processing techniques.

The Heidelberg POLYP - a flexible and fault-tolerant poly-processor

International Nuclear Information System (INIS)

Maenner, R.; Deluigi, B.

1981-01-01

The Heidelberg poly-processor system POLYP is described. It is intended to be used in nuclear physics for reprocessing of experimental data, in high energy physics as second-stage trigger processor, and generally in other applications requiring high-computing power. The POLYP system consists of any number of I/O-processors, processor modules (eventually of different types), global memory segments, and a host processor. All modules (up to several hundred) are connected by a multiple common-data-bus system; all processors, additionally, by a multiple sync bus system for processor/task-scheduling. All hard- and software is designed to be decentralized and free of bottle-necks. Most hardware-faults like single-bit errors in memory or multi-bit errors during transfers are automatically corrected. Defective modules, buses, etc., can be removed with only a graceful degradation of the system-throughput. (orig.)

Optimization and Verification of the TR-MAC Protocol for Wireless Sensor Networks

NARCIS (Netherlands)

Morshed, S.; Heijenk, Geert

2015-01-01

Energy-efficiency is an important requirement in the design of communication protocols for wireless sensor networks (WSN). TR-MAC is an energy-efficient medium access control (MAC) layer protocol for low power WSN that exploits transmitted-reference (TR) modulation in the physical layer. The

Modeling MAC layer for powerline communications networks

Science.gov (United States)

Hrasnica, Halid; Haidine, Abdelfatteh

2001-02-01

The usage of electrical power distribution networks for voice and data transmission, called Powerline Communications, becomes nowadays more and more attractive, particularly in the telecommunication access area. The most important reasons for that are the deregulation of the telecommunication market and a fact that the access networks are still property of former monopolistic companies. In this work, first we analyze a PLC network and system structure as well as a disturbance scenario in powerline networks. After that, we define a logical structure of the powerline MAC layer and propose the reservation MAC protocols for the usage in the PLC network which provides collision free data transmission. This makes possible better network utilization and realization of QoS guarantees which can make PLC networks competitive to other access technologies.

Essential Mac OS X panther server administration integrating Mac OS X server into heterogeneous networks

CERN Document Server

Bartosh, Michael

2004-01-01

If you've ever wondered how to safely manipulate Mac OS X Panther Server's many underlying configuration files or needed to explain AFP permission mapping--this book's for you. From the command line to Apple's graphical tools, the book provides insight into this powerful server software. Topics covered include installation, deployment, server management, web application services, data gathering, and more

A Critique of MacIntyrean Morality From a Kantian Perspective

OpenAIRE

Krishna Mani Pathak

2014-01-01

This article is a critical examination of MacIntyre’s notion of morality in reference to Kant’s deontological moral theory. The examination shows that MacIntyre (a) criticizes Kant’s moral theory to defend virtue ethics or neo-Aristotelian ethics with a weak notion of morality; (b) favors the idea of local morality, which does not leave any room for moral assessment and reciprocity in an intercultural domain; and (c) f...

A dedicated line-processor as used at the SHF

International Nuclear Information System (INIS)

Bevan, A.V.; Hatley, R.W.; Price, D.R.; Rankin, P.

1985-01-01

A hardwired trigger processor was used at the SLAC Hybrid Facility to find evidence for charged tracks originating from the fiducial volume of a 40'' rapidcycling bubble chamber. Straight-line projections of these tracks in the plane perpendicular to the applied magnetic field were searched for using data from three sets of proportional wire chambers (PWC). This information was made directly available to the processor by means of a special digitizing card. The results memory of the processor simulated read-only memory in a 168/E processor and was accessible by it. The 168/E controlled the issuing of a trigger command to the bubble chamber flash tubes. The same design of digitizer card used by the line processor was incorporated into the 168/E, again as read only memory, which allowed it access to the raw data for continual monitoring of trigger integrity. The design logic of the trigger processor was verified by running real PWC data through a FORTRAN simulation of the hardware. This enabled the debugging to become highly automated since a step by step, computer controlled comparison of processor registers to simulation predictions could be made

Identifying The Purchasing Power Parity of Indonesia Rupiah (IDR based on BIG MAC Index

Directory of Open Access Journals (Sweden)

Tongam Sihol Nababan

2016-12-01

Full Text Available The aim of this study is to identify : (1 profile of exchange rate and purchasing power parity of IDR against US $ based on Big Mac Index compared to the exchange rate of other countries, and (2 the position of the Big Mac Affordability of  Indonesia compared to other ASEAN countries. The results showed that based on Big Mac index during the period April 1998 up to January 2015, IDR exchange rate tends to be undervalued against the USA dollar. The cause of the currency tends to be in a position of undervalued due to the components of non-tradable have not been included in Big Mac index. The index of Big Mac Affordability indicates that there is a great disparity of income between Singapore and five other ASEAN countries. The purchasing power of the real income of the people in Singapore is nearly five times the real income of the people in Indonesia.

Embedded processor extensions for image processing

Science.gov (United States)

Thevenin, Mathieu; Paindavoine, Michel; Letellier, Laurent; Heyrman, Barthélémy

2008-04-01

The advent of camera phones marks a new phase in embedded camera sales. By late 2009, the total number of camera phones will exceed that of both conventional and digital cameras shipped since the invention of photography. Use in mobile phones of applications like visiophony, matrix code readers and biometrics requires a high degree of component flexibility that image processors (IPs) have not, to date, been able to provide. For all these reasons, programmable processor solutions have become essential. This paper presents several techniques geared to speeding up image processors. It demonstrates that a gain of twice is possible for the complete image acquisition chain and the enhancement pipeline downstream of the video sensor. Such results confirm the potential of these computing systems for supporting future applications.

Results from the MAC Vertex chamber

International Nuclear Information System (INIS)

Nelson, H.N.

1987-05-01

The design, construction, and performance characteristics of a high precision gaseous drift chamber made of thin walled proportional tubes are described. The device achieved an average spatial resolution of 45 μm in use for physics analysis with the MAC detector. The B-lifetime result obtained with this chamber is discussed

Microcrystallography, high-pressure cryocooling and BioSAXS at MacCHESS

Energy Technology Data Exchange (ETDEWEB)

Englich, Ulrich, E-mail: ue22@cornell.edu; Kriksunov, Irina A. [MacCHESS (Macromolecular Diffraction Facility at CHESS), Cornell University, Ithaca, NY 14853 (United States); Cerione, Richard A. [MacCHESS (Macromolecular Diffraction Facility at CHESS), Cornell University, Ithaca, NY 14853 (United States); Department of Chemistry and Chemical Biology, Cornell University, Ithaca, NY 14853 (United States); Cornell High Energy Synchrotron Source (CHESS), Cornell University, Ithaca, NY 14853 (United States); Cook, Michael J.; Gillilan, Richard [MacCHESS (Macromolecular Diffraction Facility at CHESS), Cornell University, Ithaca, NY 14853 (United States); Gruner, Sol M. [Field of Biophysics, Cornell University, Ithaca, NY 14853 (United States); Physics Department, Cornell University, Ithaca, NY 14853 (United States); Huang, Qingqui; Kim, Chae Un; Miller, William; Nielsen, Soren; Schuller, David; Smith, Scott; Szebenyi, Doletha M. E. [MacCHESS (Macromolecular Diffraction Facility at CHESS), Cornell University, Ithaca, NY 14853 (United States)

2011-01-01

Three research initiatives pursued by the Macromolecular Diffraction Facility at the Cornell High Energy Synchrotron Source (MacCHESS) are presented. The Macromolecular Diffraction Facility at the Cornell High Energy Synchrotron Source (MacCHESS) is a national research resource supported by the National Center for Research Resources of the US National Institutes of Health. MacCHESS is pursuing several research initiatives designed to benefit both CHESS users and the wider structural biology community. Three initiatives are presented in further detail: microcrystallography, which aims to improve the collection of diffraction data from crystals a few micrometers across, or small well diffracting regions of inhomogeneous crystals, so as to obtain high-resolution structures; pressure cryocooling, which can stabilize transient structures and reduce lattice damage during the cooling process; and BioSAXS (small-angle X-ray scattering on biological solutions), which can extract molecular shape and other structural information from macromolecules in solution.

Activity Modelling and Comparative Evaluation of WSN MAC Security Attacks

DEFF Research Database (Denmark)

Pawar, Pranav M.; Nielsen, Rasmus Hjorth; Prasad, Neeli R.

2012-01-01

and initiate security attacks that disturb the normal functioning of the network in a severe manner. Such attacks affect the performance of the network by increasing the energy consumption, by reducing throughput and by inducing long delays. Of all existing WSN attacks, MAC layer attacks are considered...... the most harmful as they directly affect the available resources and thus the nodes’ energy consumption. The first endeavour of this paper is to model the activities of MAC layer security attacks to understand the flow of activities taking place when mounting the attack and when actually executing it....... The second aim of the paper is to simulate these attacks on hybrid MAC mechanisms, which shows the performance degradation of aWSN under the considered attacks. The modelling and implementation of the security attacks give an actual view of the network which can be useful in further investigating secure...

MacMillan Pier Transportation Center Feasibility Study.

Science.gov (United States)

2006-06-01

The MacMillan Pier Transportation Center Feasibility Study examines two potential sites (landside and waterside) for a transportation center that provides a range of tourist and traveler information. It would serve as a gateway for Provincetown and t...

Sojourn time tails in processor-sharing systems

NARCIS (Netherlands)

Egorova, R.R.

2009-01-01

The processor-sharing discipline was originally introduced as a modeling abstraction for the design and performance analysis of the processing unit of a computer system. Under the processor-sharing discipline, all active tasks are assumed to be processed simultaneously, receiving an equal share of

An interactive parallel processor for data analysis

International Nuclear Information System (INIS)

Mong, J.; Logan, D.; Maples, C.; Rathbun, W.; Weaver, D.

1984-01-01

A parallel array of eight minicomputers has been assembled in an attempt to deal with kiloparameter data events. By exporting computer system functions to a separate processor, the authors have been able to achieve computer amplification linearly proportional to the number of executing processors

Optical Array Processor: Laboratory Results

Science.gov (United States)

Casasent, David; Jackson, James; Vaerewyck, Gerard

1987-01-01

A Space Integrating (SI) Optical Linear Algebra Processor (OLAP) is described and laboratory results on its performance in several practical engineering problems are presented. The applications include its use in the solution of a nonlinear matrix equation for optimal control and a parabolic Partial Differential Equation (PDE), the transient diffusion equation with two spatial variables. Frequency-multiplexed, analog and high accuracy non-base-two data encoding are used and discussed. A multi-processor OLAP architecture is described and partitioning and data flow issues are addressed.

Multiprocessor Real-Time Scheduling with Hierarchical Processor Affinities

OpenAIRE

Bonifaci , Vincenzo; Brandenburg , Björn; D'Angelo , Gianlorenzo; Marchetti-Spaccamela , Alberto

2016-01-01

International audience; Many multiprocessor real-time operating systems offer the possibility to restrict the migrations of any task to a specified subset of processors by setting affinity masks. A notion of " strong arbitrary processor affinity scheduling " (strong APA scheduling) has been proposed; this notion avoids schedulability losses due to overly simple implementations of processor affinities. Due to potential overheads, strong APA has not been implemented so far in a real-time operat...

Hardware trigger processor for the MDT system

CERN Document Server

AUTHOR|(SzGeCERN)757787; The ATLAS collaboration; Hazen, Eric; Butler, John; Black, Kevin; Gastler, Daniel Edward; Ntekas, Konstantinos; Taffard, Anyes; Martinez Outschoorn, Verena; Ishino, Masaya; Okumura, Yasuyuki

2017-01-01

We are developing a low-latency hardware trigger processor for the Monitored Drift Tube system in the Muon spectrometer. The processor will fit candidate Muon tracks in the drift tubes in real time, improving significantly the momentum resolution provided by the dedicated trigger chambers. We present a novel pure-FPGA implementation of a Legendre transform segment finder, an associative-memory alternative implementation, an ARM (Zynq) processor-based track fitter, and compact ATCA carrier board architecture. The ATCA architecture is designed to allow a modular, staged approach to deployment of the system and exploration of alternative technologies.

What are the key drivers of MAC curves? A partial-equilibrium modelling approach for the UK

International Nuclear Information System (INIS)

Kesicki, Fabian

2013-01-01

Marginal abatement cost (MAC) curves are widely used for the assessment of costs related to CO 2 emissions reduction in environmental economics, as well as domestic and international climate policy. Several meta-analyses and model comparisons have previously been performed that aim to identify the causes for the wide range of MAC curves. Most of these concentrate on general equilibrium models with a focus on aspects such as specific model type and technology learning, while other important aspects remain almost unconsidered, including the availability of abatement technologies and level of discount rates. This paper addresses the influence of several key parameters on MAC curves for the United Kingdom and the year 2030. A technology-rich energy system model, UK MARKAL, is used to derive the MAC curves. The results of this study show that MAC curves are robust even to extreme fossil fuel price changes, while uncertainty around the choice of the discount rate, the availability of key abatement technologies and the demand level were singled out as the most important influencing factors. By using a different model type and studying a wider range of influencing factors, this paper contributes to the debate on the sensitivity of MAC curves. - Highlights: ► A partial-equilibrium model is employed to test key sensitivities of MAC curves. ► MAC curves are found to be robust to wide-ranging changes in fossil fuel prices. ► Most influencing factors are the discount rate, availability of key technologies. ► Further important uncertainty in MAC curves is related to demand changes

A Power-Optimized Cooperative MAC Protocol for Lifetime Extension in Wireless Sensor Networks.

Science.gov (United States)

Liu, Kai; Wu, Shan; Huang, Bo; Liu, Feng; Xu, Zhen

2016-10-01

In wireless sensor networks, in order to satisfy the requirement of long working time of energy-limited nodes, we need to design an energy-efficient and lifetime-extended medium access control (MAC) protocol. In this paper, a node cooperation mechanism that one or multiple nodes with higher channel gain and sufficient residual energy help a sender relay its data packets to its recipient is employed to achieve this objective. We first propose a transmission power optimization algorithm to prolong network lifetime by optimizing the transmission powers of the sender and its cooperative nodes to maximize their minimum residual energy after their data packet transmissions. Based on it, we propose a corresponding power-optimized cooperative MAC protocol. A cooperative node contention mechanism is designed to ensure that the sender can effectively select a group of cooperative nodes with the lowest energy consumption and the best channel quality for cooperative transmissions, thus further improving the energy efficiency. Simulation results show that compared to typical MAC protocol with direct transmissions and energy-efficient cooperative MAC protocol, the proposed cooperative MAC protocol can efficiently improve the energy efficiency and extend the network lifetime.

Scheduled MAC in Beacon Overlay Networks for Underwater Localization and Time-Synchronization

NARCIS (Netherlands)

van Kleunen, W.A.P.; Meratnia, Nirvana; Havinga, Paul J.M.

2011-01-01

In this article we introduce a MAC protocol designed for underwater localization and time-synchronisation. The MAC protocol assumes a network of static reference nodes and allows blind nodes to be localized by listening-only to the beacon messages. Such a system is known to be very scalable. We show

Florence Jessie Mac Williams (1917-1990)

Indian Academy of Sciences (India)

Home; Journals; Resonance – Journal of Science Education; Volume 10; Issue 1. Florence Jessie Mac Williams (1917-1990). Featured Scientist Volume 10 Issue 1 January 2005 pp 98-98. Fulltext. Click here to view fulltext PDF. Permanent link: https://www.ias.ac.in/article/fulltext/reso/010/01/0098-0098. Resonance ...

Lifetime tests for MAC vertex chamber

International Nuclear Information System (INIS)

Nelson, H.N.

1986-07-01

A vertex chamber for MAC was proposed to increase precision in the measurement of the B hadron and tau lepton lifetimes. Thin-walled aluminized mylar drift tubes were used for detector elements. A study of radiation hardness was conducted under the conditions of the proposed design using different gases and different operating conditions

Impact of MAC Delay on AUV Localization: Underwater Localization Based on Hyperbolic Frequency Modulation Signal.

Science.gov (United States)

Kim, Sungryul; Yoo, Younghwan

2018-01-26

Medium Access Control (MAC) delay which occurs between the anchor node's transmissions is one of the error sources in underwater localization. In particular, in AUV localization, the MAC delay significantly degrades the ranging accuracy. The Cramer-Rao Low Bound (CRLB) definition theoretically proves that the MAC delay significantly degrades the localization performance. This paper proposes underwater localization combined with multiple access technology to decouple the localization performance from the MAC delay. Towards this goal, we adopt hyperbolic frequency modulation (HFM) signal that provides multiplexing based on its good property, high-temporal correlation. Owing to the multiplexing ability of the HFM signal, the anchor nodes can transmit packets without MAC delay, i.e., simultaneous transmission is possible. In addition, the simulation results show that the simultaneous transmission is not an optional communication scheme, but essential for the localization of mobile object in underwater.

Detection of constitutive heterodimerization of the integrin Mac-1 subunits by fluorescence resonance energy transfer in living cells

International Nuclear Information System (INIS)

Fu Guo; Yang Huayan; Wang Chen; Zhang Feng; You Zhendong; Wang Guiying; He Cheng; Chen Yizhang; Xu Zhihan

2006-01-01

Macrophage differentiation antigen associated with complement three receptor function (Mac-1) belongs to β 2 subfamily of integrins that mediate important cell-cell and cell-extracellular matrix interactions. Biochemical studies have indicated that Mac-1 is a constitutive heterodimer in vitro. Here, we detected the heterodimerization of Mac-1 subunits in living cells by means of two fluorescence resonance energy transfer (FRET) techniques (fluorescence microscopy and fluorescence spectroscopy) and our results demonstrated that there is constitutive heterodimerization of the Mac-1 subunits and this constitutive heterodimerization of the Mac-1 subunits is cell-type independent. Through FRET imaging, we found that heterodimers of Mac-1 mainly localized in plasma membrane, perinuclear, and Golgi area in living cells. Furthermore, through analysis of the estimated physical distances between cyan fluorescent protein (CFP) and yellow fluorescent protein (YFP) fused to Mac-1 subunits, we suggested that the conformation of Mac-1 subunits is not affected by the fusion of CFP or YFP and inferred that Mac-1 subunits take different conformation when expressed in Chinese hamster ovary (CHO) and human embryonic kidney (HEK) 293T cells, respectively

Towards a Process Algebra for Shared Processors

DEFF Research Database (Denmark)

Buchholtz, Mikael; Andersen, Jacob; Løvengreen, Hans Henrik

2002-01-01

We present initial work on a timed process algebra that models sharing of processor resources allowing preemption at arbitrary points in time. This enables us to model both the functional and the timely behaviour of concurrent processes executed on a single processor. We give a refinement relation...

A Cross-Layer Duty Cycle MAC Protocol Supporting a Pipeline Feature for Wireless Sensor Networks

Directory of Open Access Journals (Sweden)

Young-Chon Kim

2011-05-01

Full Text Available Although the conventional duty cycle MAC protocols for Wireless Sensor Networks (WSNs such as RMAC perform well in terms of saving energy and reducing end-to-end delivery latency, they were designed independently and require an extra routing protocol in the network layer to provide path information for the MAC layer. In this paper, we propose a new cross-layer duty cycle MAC protocol with data forwarding supporting a pipeline feature (P-MAC for WSNs. P-MAC first divides the whole network into many grades around the sink. Each node identifies its grade according to its logical hop distance to the sink and simultaneously establishes a sleep/wakeup schedule using the grade information. Those nodes in the same grade keep the same schedule, which is staggered with the schedule of the nodes in the adjacent grade. Then a variation of the RTS/CTS handshake mechanism is used to forward data continuously in a pipeline fashion from the higher grade to the lower grade nodes and finally to the sink. No extra routing overhead is needed, thus increasing the network scalability while maintaining the superiority of duty-cycling. The simulation results in OPNET show that P-MAC has better performance than S-MAC and RMAC in terms of packet delivery latency and energy efficiency.

High-speed packet filtering utilizing stream processors

Science.gov (United States)

Hummel, Richard J.; Fulp, Errin W.

2009-04-01

Parallel firewalls offer a scalable architecture for the next generation of high-speed networks. While these parallel systems can be implemented using multiple firewalls, the latest generation of stream processors can provide similar benefits with a significantly reduced latency due to locality. This paper describes how the Cell Broadband Engine (CBE), a popular stream processor, can be used as a high-speed packet filter. Results show the CBE can potentially process packets arriving at a rate of 1 Gbps with a latency less than 82 μ-seconds. Performance depends on how well the packet filtering process is translated to the unique stream processor architecture. For example the method used for transmitting data and control messages among the pseudo-independent processor cores has a significant impact on performance. Experimental results will also show the current limitations of a CBE operating system when used to process packets. Possible solutions to these issues will be discussed.

Installing Git under MacOS

OpenAIRE

Fitzpatrick, Benjamin

2015-01-01

Step by step guide to installing the version control software Git under the Macintosh Operating System MacOS X (and later). Includes a seqeunce of screenshots with hand drawn arrows ;-) These slides are part of the materials for an Introductory course on the R language and environment for statistial computing. Free and Open Source materials for this course hosted on GitHub: https://github.com/brfitzpatrick/Intro_to_R

Burgernomics: a big MacT guide to purchasing power parity

OpenAIRE

Michael R. Pakko; Patricia S. Pollard

2003-01-01

The theory of purchasing power parity (PPP) has long been a staple of international economic analysis. Recent years have seen the rise in popularity of a tongue-in-cheek, fast-food version of PPP: The Big Mac™ index. In this article, Michael Pakko and Patricia Pollard describe how comparisons of Big Mac prices around the world contain the ingredients necessary to demonstrate the fundamental principles of PPP. They show that the Big Mac index does nearly as well as more comprehensive measures ...

Fast processor for dilepton triggers

International Nuclear Information System (INIS)

Katsanevas, S.; Kostarakis, P.; Baltrusaitis, R.

1983-01-01

We describe a fast trigger processor, developed for and used in Fermilab experiment E-537, for selecting high-mass dimuon events produced by negative pions and anti-protons. The processor finds candidate tracks by matching hit information received from drift chambers and scintillation counters, and determines their momenta. Invariant masses are calculated for all possible pairs of tracks and an event is accepted if any invariant mass is greater than some preselectable minimum mass. The whole process, accomplished within 5 to 10 microseconds, achieves up to a ten-fold reduction in trigger rate

Design of RISC Processor Using VHDL and Cadence

Science.gov (United States)

Moslehpour, Saeid; Puliroju, Chandrasekhar; Abu-Aisheh, Akram

The project deals about development of a basic RISC processor. The processor is designed with basic architecture consisting of internal modules like clock generator, memory, program counter, instruction register, accumulator, arithmetic and logic unit and decoder. This processor is mainly used for simple general purpose like arithmetic operations and which can be further developed for general purpose processor by increasing the size of the instruction register. The processor is designed in VHDL by using Xilinx 8.1i version. The present project also serves as an application of the knowledge gained from past studies of the PSPICE program. The study will show how PSPICE can be used to simplify massive complex circuits designed in VHDL Synthesis. The purpose of the project is to explore the designed RISC model piece by piece, examine and understand the Input/ Output pins, and to show how the VHDL synthesis code can be converted to a simplified PSPICE model. The project will also serve as a collection of various research materials about the pieces of the circuit.

Performance analysis and improvement of WPAN MAC for home networks.

Science.gov (United States)

Mehta, Saurabh; Kwak, Kyung Sup

2010-01-01

The wireless personal area network (WPAN) is an emerging wireless technology for future short range indoor and outdoor communication applications. The IEEE 802.15.3 medium access control (MAC) is proposed to coordinate the access to the wireless medium among the competing devices, especially for short range and high data rate applications in home networks. In this paper we use analytical modeling to study the performance analysis of WPAN (IEEE 802.15.3) MAC in terms of throughput, efficient bandwidth utilization, and delay with various ACK policies under error channel condition. This allows us to introduce a K-Dly-ACK-AGG policy, payload size adjustment mechanism, and Improved Backoff algorithm to improve the performance of the WPAN MAC. Performance evaluation results demonstrate the impact of our improvements on network capacity. Moreover, these results can be very useful to WPAN application designers and protocol architects to easily and correctly implement WPAN for home networking.

Performance Analysis and Improvement of WPAN MAC for Home Networks

Directory of Open Access Journals (Sweden)

Saurabh Mehta

2010-03-01

Full Text Available The wireless personal area network (WPAN is an emerging wireless technology for future short range indoor and outdoor communication applications. The IEEE 802.15.3 medium access control (MAC is proposed to coordinate the access to the wireless medium among the competing devices, especially for short range and high data rate applications in home networks. In this paper we use analytical modeling to study the performance analysis of WPAN (IEEE 802.15.3 MAC in terms of throughput, efficient bandwidth utilization, and delay with various ACK policies under error channel condition. This allows us to introduce a K-Dly-ACK-AGG policy, payload size adjustment mechanism, and Improved Backoff algorithm to improve the performance of the WPAN MAC. Performance evaluation results demonstrate the impact of our improvements on network capacity. Moreover, these results can be very useful to WPAN application designers and protocol architects to easily and correctly implement WPAN for home networking.

The MacNew Heart Disease health-related quality of life instrument: A summary

Directory of Open Access Journals (Sweden)

Guyatt Gordon

2004-01-01

Full Text Available Abstract Background The measurement of health, the effects of disease, and the impact of health care include not only an indication of changes in disease frequency and severity but also an estimate of patients' perception of health status before and after treatment. One of the more important developments in health care in the past decade may be the recognition that the patient's perspective is as legitimate and valid as the clinician's in monitoring health care outcomes. This has lead to the development of instruments to quantify the patients' perception of their health status before and after treatment. Methods We review evidence supporting the measurement properties of the MacNew Heart Disease Health-related Quality of Life [MacNew] Questionnaire which was designed to evaluate how daily activities and physical, emotional, and social functioning are affected by coronary heart disease and its treatment. Results Reliability was demonstrated by using internal consistency and the intraclass correlation coefficients for the three domains in the Dutch, English, Farsi, German, and Spanish versions of the MacNew. With internal consistency and intraclass correlation coefficients =>0.73, reliability is high. Validity of the MacNew was examined with factor analysis and three core underlying factors, physical, emotional, and social, were identified, explaining 63.0 – 66.5% of the observed variance and replicated in the translations with psychometric data. Construct validity of the MacNew was further demonstrated by extensive substantiation of the logical relationships, defined a priori, between items and other comparison tools. The MacNew is responsive and sensitive to changes in HRQL following various interventions for patients with heart disease with 11 of 13 effect size statistics >0.80. Taking an average of 10 minutes or less to complete, the respondent-burden for the MacNew is low and its acceptability is demonstrated by response rates of over 90

Big Mac arvestab raha ostujõudu / Harli Uljas

Index Scriptorium Estoniae

Uljas, Harli

2005-01-01

The Economist võrdleb maailma valuutade suhestamiseks Big Mac'i burgeri hindu 120 riigis, kuna see meetod võimaldab saada ülevaate riikide elanikkonna tegelikust ostujõust. Tabel: Hamburgeri standard

Strategy, Operational Art and MacArthur in the Southwest Pacific 1944

Science.gov (United States)

2016-05-26

Guinea Campaign.11 It studies the campaign exclusively from the February 1944 through October 1944. The choice in dates argues that the campaign...the Pacific. King continued to maintain that MacArthur’s line of operation in SWPA, toward the Philippines to the exclusion of the central Pacific...with Nimitz allowed MacArthur the rare luxury of aircraft carriers providing a protective bubble over both the Morotai and Palaus operations. Escort

Real time processor for array speckle interferometry

Science.gov (United States)

Chin, Gordon; Florez, Jose; Borelli, Renan; Fong, Wai; Miko, Joseph; Trujillo, Carlos

1989-02-01

The authors are constructing a real-time processor to acquire image frames, perform array flat-fielding, execute a 64 x 64 element two-dimensional complex FFT (fast Fourier transform) and average the power spectrum, all within the 25 ms coherence time for speckles at near-IR (infrared) wavelength. The processor will be a compact unit controlled by a PC with real-time display and data storage capability. This will provide the ability to optimize observations and obtain results on the telescope rather than waiting several weeks before the data can be analyzed and viewed with offline methods. The image acquisition and processing, design criteria, and processor architecture are described.

Learn Objective-C on the Mac for OS X and iOS

CERN Document Server

Knaster, Scott; Malik, Waqar

2012-01-01

Learn to write apps for some of today's hottest technologies, including the iPhone and iPad (using iOS), as well as the Mac (using OS X). It starts with Objective-C, the base language on which the native iOS software development kit (SDK) and the OS X are based. Learn Objective-C on the Mac: For OS X and iOS, Second Edition updates a best selling book and is an extensive, newly updated guide to Objective-C. Objective-C is a powerful, object-oriented extension of C, making this update the perfect follow-up to Dave Mark's bestselling Learn C on the Mac. Whether you're an experienced C programmer

A Very Low Power MAC (VLPM Protocol for Wireless Body Area Networks

Directory of Open Access Journals (Sweden)

Kyung Sup Kwak

2011-03-01

Full Text Available Wireless Body Area Networks (WBANs consist of a limited number of battery operated nodes that are used to monitor the vital signs of a patient over long periods of time without restricting the patient’s movements. They are an easy and fast way to diagnose the patient’s status and to consult the doctor. Device as well as network lifetime are among the most important factors in a WBAN. Prolonging the lifetime of the WBAN strongly depends on controlling the energy consumption of sensor nodes. To achieve energy efficiency, low duty cycle MAC protocols are used, but for medical applications, especially in the case of pacemakers where data have time-limited relevance, these protocols increase latency which is highly undesirable and leads to system instability. In this paper, we propose a low power MAC protocol (VLPM based on existing wakeup radio approaches which reduce energy consumption as well as improving the response time of a node. We categorize the traffic into uplink and downlink traffic. The nodes are equipped with both a low power wake-up transmitter and receiver. The low power wake-up receiver monitors the activity on channel all the time with a very low power and keeps the MCU (Micro Controller Unit along with main radio in sleep mode. When a node [BN or BNC (BAN Coordinator] wants to communicate with another node, it uses the low-power radio to send a wakeup packet, which will prompt the receiver to power up its primary radio to listen for the message that follows shortly. The wake-up packet contains the desired node’s ID along with some other information to let the targeted node to wake-up and take part in communication and let all other nodes to go to sleep mode quickly. The VLPM protocol is proposed for applications having low traffic conditions. For high traffic rates, optimization is needed. Analytical results show that the proposed protocol outperforms both synchronized and unsynchronized MAC protocols like T-MAC, SCP-MAC, B-MAC

THE EFFECT OF TEMPERATURE ON THE GROWTH OF MYCOBACTERIUM AVIUM COMPLEX (MAC) ORGANISMS

Science.gov (United States)

MAC organisms are able to grow, persist, and colonize in water distribution systems and may amplify in hospital hot water systems. This study examined the response of MAC organisms (M. avium, M. intracellulare, and MX) to a range of temperatures commonly associated with drinking...

Florence Jessie MacWilliams (1917-1990)

Indian Academy of Sciences (India)

famous mathematician Oscar Zariski, well known for his work in algebraic geometry, at. Johns Hopkins University, following him to Harvard University to study with him for a year. There was a break in her studies for many years following her marriage in 1941 to. W al ter Mac Williams, an engineer, and the birth and raising of ...

Matrix-assisted cocrystallization (MAC) simultaneous production and formulation of pharmaceutical cocrystals by hot-melt extrusion.

Science.gov (United States)

Boksa, Kevin; Otte, Andrew; Pinal, Rodolfo

2014-09-01

A novel method for the simultaneous production and formulation of pharmaceutical cocrystals, matrix-assisted cocrystallization (MAC), is presented. Hot-melt extrusion (HME) is used to create cocrystals by coprocessing the drug and coformer in the presence of a matrix material. Carbamazepine (CBZ), nicotinamide (NCT), and Soluplus were used as a model drug, coformer, and matrix, respectively. The MAC product containing 80:20 (w/w) cocrystal:matrix was characterized by differential scanning calorimetry, Fourier transform infrared spectroscopy, and powder X-ray diffraction. A partial least squares (PLS) regression model was developed for quantifying the efficiency of cocrystal formation. The MAC product was estimated to be 78% (w/w) cocrystal (theoretical 80%), with approximately 0.3% mixture of free (unreacted) CBZ and NCT, and 21.6% Soluplus (theoretical 20%) with the PLS model. A physical mixture (PM) of a reference cocrystal (RCC), prepared by precipitation from solution, and Soluplus resulted in faster dissolution relative to the pure RCC. However, the MAC product with the exact same composition resulted in considerably faster dissolution and higher maximum concentration (∼five-fold) than those of the PM. The MAC product consists of high-quality cocrystals embedded in a matrix. The processing aspect of MAC plays a major role on the faster dissolution observed. The MAC approach offers a scalable process, suitable for the continuous manufacturing and formulation of pharmaceutical cocrystals. © 2014 Wiley Periodicals, Inc. and the American Pharmacists Association.

A Survey of MAC Protocols for Cognitive Radio Body Area Networks.

Science.gov (United States)

Bhandari, Sabin; Moh, Sangman

2015-04-20

The advancement in electronics, wireless communications and integrated circuits has enabled the development of small low-power sensors and actuators that can be placed on, in or around the human body. A wireless body area network (WBAN) can be effectively used to deliver the sensory data to a central server, where it can be monitored, stored and analyzed. For more than a decade, cognitive radio (CR) technology has been widely adopted in wireless networks, as it utilizes the available spectra of licensed, as well as unlicensed bands. A cognitive radio body area network (CRBAN) is a CR-enabled WBAN. Unlike other wireless networks, CRBANs have specific requirements, such as being able to automatically sense their environments and to utilize unused, licensed spectra without interfering with licensed users, but existing protocols cannot fulfill them. In particular, the medium access control (MAC) layer plays a key role in cognitive radio functions, such as channel sensing, resource allocation, spectrum mobility and spectrum sharing. To address various application-specific requirements in CRBANs, several MAC protocols have been proposed in the literature. In this paper, we survey MAC protocols for CRBANs. We then compare the different MAC protocols with one another and discuss challenging open issues in the relevant research.

Vector and parallel processors in computational science

International Nuclear Information System (INIS)

Duff, I.S.; Reid, J.K.

1985-01-01

These proceedings contain the articles presented at the named conference. These concern hardware and software for vector and parallel processors, numerical methods and algorithms for the computation on such processors, as well as applications of such methods to different fields of physics and related sciences. See hints under the relevant topics. (HSI)

Mac-1 (CD11b/CD18) is essential for Fc receptor-mediated neutrophil cytotoxicity and immunologic synapse formation.

Science.gov (United States)

van Spriel, A B; Leusen, J H; van Egmond, M; Dijkman, H B; Assmann, K J; Mayadas, T N; van de Winkel, J G

2001-04-15

Receptors for human immunoglobulin (Ig)G and IgA initiate potent cytolysis of antibody (Ab)-coated targets by polymorphonuclear leukocytes (PMNs). Mac-1 (complement receptor type 3, CD11b/CD18) has previously been implicated in receptor cooperation with Fc receptors (FcRs). The role of Mac-1 in FcR-mediated lysis of tumor cells was characterized by studying normal human PMNs, Mac-1-deficient mouse PMNs, and mouse PMNs transgenic for human FcR. All PMNs efficiently phagocytosed Ab-coated particles. However, antibody-dependent cellular cytotoxicity (ADCC) was abrogated in Mac-1(-/-) PMNs and in human PMNs blocked with anti-Mac-1 monoclonal Ab (mAb). Mac-1(-/-) PMNs were unable to spread on Ab-opsonized target cells and other Ab-coated surfaces. Confocal laser scanning and electron microscopy revealed a striking difference in immunologic synapse formation between Mac-1(-/-) and wild-type PMNs. Also, respiratory burst activity could be measured outside membrane-enclosed compartments by using Mac-1(-/-) PMNs bound to Ab-coated tumor cells, in contrast to wild-type PMNs. In summary, these data document an absolute requirement of Mac-1 for FcR-mediated PMN cytotoxicity toward tumor targets. Mac-1(-/-) PMNs exhibit defective spreading on Ab-coated targets, impaired formation of immunologic synapses, and absent tumor cytolysis.

High-contrast MacNeille-PBS-based LCOS projection systems

Science.gov (United States)

Chen, Jianmin; Robinson, Michael G.; Sharp, Gary D.

2005-04-01

Contrast limits are investigated for MacNeille PBS based LCOS projection systems that use retarder stack filters (RSF). The two contributing factors are considered separately; namely the color management system and the panel port. To enhance performance of the former, skew ray compensated RSFs are introduced. For the latter, a general methodology is presented to optimize contrast by compensating the LCOS panel. It is shown that the orientation of the LCOS panel and compensator, relative to the MacNeille PBS, is critical. The significant impact of AR coating performance on system contrast is also revealed. A high contrast architecture will be presented by way of example.

MPC Related Computational Capabilities of ARMv7A Processors

DEFF Research Database (Denmark)

Frison, Gianluca; Jørgensen, John Bagterp

2015-01-01

In recent years, the mass market of mobile devices has pushed the demand for increasingly fast but cheap processors. ARM, the world leader in this sector, has developed the Cortex-A series of processors with focus on computationally intensive applications. If properly programmed, these processors...... are powerful enough to solve the complex optimization problems arising in MPC in real-time, while keeping the traditional low-cost and low-power consumption. This makes these processors ideal candidates for use in embedded MPC. In this paper, we investigate the floating-point capabilities of Cortex A7, A9...... and A15 and show how to exploit the unique features of each processor to obtain the best performance, in the context of a novel implementation method for the linear-algebra routines used in MPC solvers. This method adapts high-performance computing techniques to the needs of embedded MPC. In particular...

Analysis of an Adaptive P-Persistent MAC Scheme for WLAN Providing Delay Fairness

Science.gov (United States)

Yen, Chih-Ming; Chang, Chung-Ju; Chen, Yih-Shen; Huang, Ching Yao

The paper proposes and analyzes an adaptive p-persistent-based (APP) medium access control (MAC) scheme for IEEE 802.11 WLAN. The APP MAC scheme intends to support delay fairness for every station in each access, denoting small delay variance. It differentiates permission probabilities of transmission for stations which are incurred with various packet delays. This permission probability is designed as a function of the numbers of retransmissions and re-backoffs so that stations with larger packet delay are endowed with higher permission probability. Also, the scheme is analyzed by a Markov-chain analysis, where the collision probability, the system throughput, and the average delay are successfully obtained. Numerical results show that the proposed APP MAC scheme can attain lower mean delay and higher mean throughput. In the mean time, simulation results are given to justify the validity of the analysis, and also show that the APP MAC scheme can achieve more delay fairness than conventional algorithms.

The Mac'OS X command line Unix under the hood

CERN Document Server

McElhearn, Kirk

2006-01-01

The Mac command line offers a faster, easier way to accomplish many tasks. It''s also the medium for many commands that aren''t accessible using the GUI. The Mac OS X Command Line is a clear, concise, tutorial-style introduction to all the major functionality provided by the command line. It''s also packed with information the experienced users need, including little-known shortcuts and several chapters devoted to advanced topics. This is a book to get you started, but also a book you won't soon outgrow.

A Critique of MacIntyrean Morality From a Kantian Perspective

Directory of Open Access Journals (Sweden)

Krishna Mani Pathak

2014-04-01

Full Text Available This article is a critical examination of MacIntyre’s notion of morality in reference to Kant’s deontological moral theory. The examination shows that MacIntyre (a criticizes Kant’s moral theory to defend virtue ethics or neo-Aristotelian ethics with a weak notion of morality; (b favors the idea of local morality, which does not leave any room for moral assessment and reciprocity in an intercultural domain; and (c fails to provide good arguments for his moral historicism and against Kant’s moral universalism.

Air-Lubricated Thermal Processor For Dry Silver Film

Science.gov (United States)

Siryj, B. W.

1980-09-01

Since dry silver film is processed by heat, it may be viewed on a light table only seconds after exposure. On the other hand, wet films require both bulky chemicals and substantial time before an image can be analyzed. Processing of dry silver film, although simple in concept, is not so simple when reduced to practice. The main concern is the effect of film temperature gradients on uniformity of optical film density. RCA has developed two thermal processors, different in implementation but based on the same philosophy. Pressurized air is directed to both sides of the film to support the film and to conduct the heat to the film. Porous graphite is used as the medium through which heat and air are introduced. The initial thermal processor was designed to process 9.5-inch-wide film moving at speeds ranging from 0.0034 to 0.008 inch per second. The processor configuration was curved to match the plane generated by the laser recording beam. The second thermal processor was configured to process 5-inch-wide film moving at a continuously variable rate ranging from 0.15 to 3.5 inches per second. Due to field flattening optics used in this laser recorder, the required film processing area was plane. In addition, this processor was sectioned in the direction of film motion, giving the processor the capability of varying both temperature and effective processing area.

Logistic Fuel Processor Development

National Research Council Canada - National Science Library

Salavani, Reza

2004-01-01

The Air Base Technologies Division of the Air Force Research Laboratory has developed a logistic fuel processor that removes the sulfur content of the fuel and in the process converts logistic fuel...

MacDUST - a powder diffraction package developed for the ''ADONE'' high resolution diffraction station

International Nuclear Information System (INIS)

Burattini, E.; Cappuccio, G.; Maistrelli, P.; Simeoni, S.

1993-01-01

A High Resolution Powder Diffraction Station (PO.DI.STA.) was installed at the beginning of 1991 on the ADONE-Wiggler magnet beam line. The station and the first powder diffraction spectra, collected with synchrotron radiation, were presented at the EPDIC-1 Conference. More details can also be found in. For this station, a very sophisticated software package ''MacDUST'' has been developed on an Apple Macintosh computer, using the Microsoft QuickBASIC compiler. It allows very easy and comfortable operations by means of a graphical user interface environment, typical of the Macintosh system. The package consists of five major programs. The main program, MacDIFF, performs all the graphic operations on the experimental data, including zooming, overlapping, cursor scanning and editing of patterns, control of output operations to printers and HPGL plotters. It also includes several analysis routines for data smoothing, a first derivative peak search algorithm, two background subtraction routines and two profile fitting programs: one based on the simplex method and the other on the Marquardt modification of a least-square algorithm. MacPDF and MacRIC are both dedicated to phase identification. The first program is an archive manager for searching, displaying and printing phase records; MacRIC is a graphic aided search-match program based on the Hanawalt algorithm. Mac3-DIM is a plot program, useful, e.g., for representing kinetics three dimensionally. MacRIET is a Macintosh version of the well known Rietveld refinement program. This version, besides conventional structure refinements, also allows the determination of micro structural parameters, i.e. micro strain and crystallite size. The program can also be used to simulate a pattern, once the structure of the compound is known. Taking advantage of the very intuitive Macintosh graphic user interface, through dialog and alert boxes, the program allows straightforward introduction and modification of the structure

Real time monitoring of electron processors

International Nuclear Information System (INIS)

Nablo, S.V.; Kneeland, D.R.; McLaughlin, W.L.

1995-01-01

A real time radiation monitor (RTRM) has been developed for monitoring the dose rate (current density) of electron beam processors. The system provides continuous monitoring of processor output, electron beam uniformity, and an independent measure of operating voltage or electron energy. In view of the device's ability to replace labor-intensive dosimetry in verification of machine performance on a real-time basis, its application to providing archival performance data for in-line processing is discussed. (author)

Novel memory architecture for video signal processor

Science.gov (United States)

Hung, Jen-Sheng; Lin, Chia-Hsing; Jen, Chein-Wei

1993-11-01

An on-chip memory architecture for video signal processor (VSP) is proposed. This memory structure is a two-level design for the different data locality in video applications. The upper level--Memory A provides enough storage capacity to reduce the impact on the limitation of chip I/O bandwidth, and the lower level--Memory B provides enough data parallelism and flexibility to meet the requirements of multiple reconfigurable pipeline function units in a single VSP chip. The needed memory size is decided by the memory usage analysis for video algorithms and the number of function units. Both levels of memory adopted a dual-port memory scheme to sustain the simultaneous read and write operations. Especially, Memory B uses multiple one-read-one-write memory banks to emulate the real multiport memory. Therefore, one can change the configuration of Memory B to several sets of memories with variable read/write ports by adjusting the bus switches. Then the numbers of read ports and write ports in proposed memory can meet requirement of data flow patterns in different video coding algorithms. We have finished the design of a prototype memory design using 1.2- micrometers SPDM SRAM technology and will fabricated it through TSMC, in Taiwan.

Fast track trigger processor for the OPAL detector at LEP

Energy Technology Data Exchange (ETDEWEB)

Carter, A A; Carter, J R; Ward, D R; Heuer, R D; Jaroslawski, S; Wagner, A

1986-09-20

A fast hardware track trigger processor being built for the OPAL experiment is described. The processor will analyse data from the central drift chambers of OPAL to determine whether any tracks come from the interaction region, and thereby eliminate background events. The processor will find tracks over a large angular range, vertical strokecos thetavertical stroke < or approx. 0.95. The design of the processor is described, together with a brief account of its hardware implementation for OPAL. The results of feasibility studies are also presented.

Alterações de linguagem em pacientes idosos portadores de demência avaliados com a Bateria MAC Language alterations in elderly patients with dementia assessed with the MAC Battery

Directory of Open Access Journals (Sweden)

Cristine Koehler

2012-03-01

Full Text Available OBJETIVO: Identificar as alterações de linguagem em um grupo de pacientes idosos portadores de demência nas tarefas de evocação lexical livre, com critério ortográfico e com critério semântico, interpretação de metáforas e discurso narrativo da Bateria Montreal de Avaliação da Comunicação - Bateria MAC, bem como, verificar a frequência de déficits. MÉTODOS: Participaram do estudo 13 pacientes com demência de grau leve a moderada, atendidos no Setor de Neurologia do Ambulatório de Distúrbios do Movimento e Demências do Hospital Santa Clara da Irmandade Santa Casa de Misericórdia de Porto Alegre (ISCMPA. O instrumento neuropsicológico de avaliação foi a Bateria MAC e a aplicação das tarefas seguiu a seguinte ordem: evocação lexical livre, evocação lexical com critério ortográfico, evocação lexical com critério semântico, interpretação de metáforas e discurso narrativo. RESULTADOS: O grupo de pacientes com demência apresentou desempenho deficitário em todas as tarefas da Bateria MAC que foram avaliadas, com diferença significativa. Além disso, os participantes apresentaram maior frequência de déficits, em ordem decrescente, nas tarefas de reconto parcial do discurso narrativo (informações essenciais e presentes, seguidas pelas tarefas de evocação lexical com critério ortográfico e com critério semântico, e reconto integral do discurso narrativo. Pelo menos dois pacientes apresentaram alterações de desempenho em alguma das cinco tarefas realizadas da Bateria MAC. CONCLUSÃO: A avaliação de linguagem através da Bateria MAC permitiu a verificação de alterações do processamento linguístico em idosos com demência, o que caracteriza que tal instrumento também é aplicável para esta população clínica.PURPOSE: To identify language deficits in a group of elderly patients with dementia in tasks of free lexical retrieval, lexical retrieval with orthographic and semantic criteria

Multi-processor data acquisition and monitoring systems for particle physics

International Nuclear Information System (INIS)

White, V.; Burch, B.; Eng, K.; Heinicke, P.; Pyatetsky, M.; Ritchie, D.

1983-01-01

A high speed distributed processing system, using PDP-11 and VAX processors, is being developed at Fermilab. The acquisition of data is done using one or more PDP-11s. Additional processors are connected to provide either data logging or extra data analysis capabilities. Within this framework, functional interchangeability of PDP-11 and VAX processors and of the PDP-11 operating systems, RT-11 and RSX-11M, has been maintained. Inter-processor connections have been implemented in a general way using the 5 megabit DR11-W hardware currently selected for the purpose. Using this approach the authors have been able to make use of several existing data acquisition and analysis packages, such as RT/MULTI, in a multi-processor system

Dark matter analysis of XENON100 data and cut development utilizing the novel PAX raw data processor

Energy Technology Data Exchange (ETDEWEB)

Wittweg, Christian [Institut fuer Kernphysik, Westfaelische Wilhelms-Universitaet, Muenster (Germany)

2016-07-01

The XENON100 experiment located at LNGS is aimed at the direct detection of weakly interacting massive particles (WIMPs). It utilizes an ultra-low background dual-phase xenon TPC which yields two separate scintillation signals that facilitate background discrimination and event selection. Limits on various interaction types have been published by the collaboration (Science 349 (2015) 6250, 851-854). In the analysis dark matter candidate events have to pass cuts with respect to data quality, consistency and physical features of the interaction. The former ones are implemented with regard to the used data processor's capabilities for noise discrimination and peak-finding. The Processor for Analyzing Xenon (PAX), developed for the XENON1T experiment, enhances these capabilities compared to XENON100. A greater robustness against noise and an increased peak-identification efficiency open up new opportunities for physically motivated cuts while rendering old ones obsolete. The poster will focus on the implementation of new cuts into the analysis chain. Both PAX and the xenon analysis will be introduced. A planned full-scale dark matter analysis of PAX-processed XENON100 data will be outlined.

Mac Leod's syndrome

International Nuclear Information System (INIS)

Schad, M.; Danesi, C.; Ricci, R.; Galluzzi, S.; Coviello, G.

1988-01-01

Mac Leod's syndrome is a rarely diagnosed disease; that is why an accurate differential diagnosis is needed by means of radiological imaging. This paper is aimed at discussing the differential diagnosis, with a special emphasis on the pathogenesis of the syndrome. The phenomenon of air trapping in absence of central bronchial lesions is a typical radiographic finding. Chest X-ray is performed in both inspiration and expiration. Posterior oblique tomography at 55 grade centigrade of the effected side is also performed. Diffuse bronchiolitis obliterans in infancy or early childhood ia widely accepted pathogenetic pattern. Pulmonary hypoventilation causes vasoconstriction and underdevelopment of pulmonary vessels, that are reduced in caliber. Differential diagnosis includes all the diseases resulting in pulmonary hyperlucency, i.e. pulmonary and pleural alterations, and skeletal anomalies

Dual-stroke heat pump field performance

Science.gov (United States)

Veyo, S. E.

1984-11-01

Two nearly identical proprototype systems, each employing a unique dual-stroke compressor, were built and tested. One was installed in an occupied residence in Jeannette, Pa. It has provided the heating and cooling required from that time to the present. The system has functioned without failure of any prototypical advanced components, although early field experience did suffer from deficiencies in the software for the breadboard micro processor control system. Analysis of field performance data indicates a heating performance factor (HSPF) of 8.13 Stu/Wa, and a cooling energy efficiency (SEER) of 8.35 Scu/Wh. Data indicate that the beat pump is oversized for the test house since the observed lower balance point is 3 F whereas 17 F La optimum. Oversizing coupled with the use of resistance heat ot maintain delivered air temperature warmer than 90 F results in the consumption of more resistance heat than expected, more unit cycling, and therefore lower than expected energy efficiency. Our analysis indicates that with optimal mixing the dual stroke heat pump will yield as HSFF 30% better than a single capacity heat pump representative of high efficiency units in the market place today for the observed weather profile.

Rapid prototyping and evaluation of programmable SIMD SDR processors in LISA

Science.gov (United States)

Chen, Ting; Liu, Hengzhu; Zhang, Botao; Liu, Dongpei

2013-03-01

With the development of international wireless communication standards, there is an increase in computational requirement for baseband signal processors. Time-to-market pressure makes it impossible to completely redesign new processors for the evolving standards. Due to its high flexibility and low power, software defined radio (SDR) digital signal processors have been proposed as promising technology to replace traditional ASIC and FPGA fashions. In addition, there are large numbers of parallel data processed in computation-intensive functions, which fosters the development of single instruction multiple data (SIMD) architecture in SDR platform. So a new way must be found to prototype the SDR processors efficiently. In this paper we present a bit-and-cycle accurate model of programmable SIMD SDR processors in a machine description language LISA. LISA is a language for instruction set architecture which can gain rapid model at architectural level. In order to evaluate the availability of our proposed processor, three common baseband functions, FFT, FIR digital filter and matrix multiplication have been mapped on the SDR platform. Analytical results showed that the SDR processor achieved the maximum of 47.1% performance boost relative to the opponent processor.

Identifying The Purchasing Power Parity of Indonesia Rupiah (IDR) based on BIG MAC Index

OpenAIRE

Tongam Sihol Nababan

2016-01-01

The aim of this study is to identify : (1) profile of exchange rate and purchasing power parity of IDR against US $ based on Big Mac Index compared to the exchange rate of other countries, and (2) the position of the Big Mac Affordability of Indonesia compared to other ASEAN countries. The results showed that based on Big Mac index during the period April 1998 up to January 2015, IDR exchange rate tends to be undervalued against the USA dollar. The cause of the currency tends to be in a posi...

Learn AppleScript The Comprehensive Guide to Scripting and Automation on MAC OS X

CERN Document Server

Rosenthal, Hanaan

2009-01-01

AppleScript is an English-like, easy-to-understand scripting language built into every Mac. AppleScript can automate hundreds of AppleScriptable applications, performing tasks both large and small, complex and simple. Learn AppleScript: The Comprehensive Guide to Scripting and Automation on Mac OS X, Third Edition has been completely updated for Mac OS X Snow Leopard. It's all here, with an emphasis on practical information that will help you solve any automation problem-from the most mundane repetitive tasks to highly integrated workflows of complex systems. * Friendly enough for beginners, d

Optical backplane interconnect switch for data processors and computers

Science.gov (United States)

Hendricks, Herbert D.; Benz, Harry F.; Hammer, Jacob M.

1989-01-01

An optoelectronic integrated device design is reported which can be used to implement an all-optical backplane interconnect switch. The switch is sized to accommodate an array of processors and memories suitable for direct replacement into the basic avionic multiprocessor backplane. The optical backplane interconnect switch is also suitable for direct replacement of the PI bus traffic switch and at the same time, suitable for supporting pipelining of the processor and memory. The 32 bidirectional switchable interconnects are configured with broadcast capability for controls, reconfiguration, and messages. The approach described here can handle a serial interconnection of data processors or a line-to-link interconnection of data processors. An optical fiber demonstration of this approach is presented.

MacA is a second cytochrome c peroxidase of Geobacter sulfurreducens.

Science.gov (United States)

Seidel, Julian; Hoffmann, Maren; Ellis, Katie E; Seidel, Antonia; Spatzal, Thomas; Gerhardt, Stefan; Elliott, Sean J; Einsle, Oliver

2012-04-03

The metal-reducing δ-proteobacterium Geobacter sulfurreducens produces a large number of c-type cytochromes, many of which have been implicated in the transfer of electrons to insoluble metal oxides. Among these, the dihemic MacA was assigned a central role. Here we have produced G. sulfurreducens MacA by recombinant expression in Escherichia coli and have solved its three-dimensional structure in three different oxidation states. Sequence comparisons group MacA into the family of diheme cytochrome c peroxidases, and the protein indeed showed hydrogen peroxide reductase activity with ABTS(-2) as an electron donor. The observed K(M) was 38.5 ± 3.7 μM H(2)O(2) and v(max) was 0.78 ± 0.03 μmol of H(2)O(2)·min(-1)·mg(-1), resulting in a turnover number k(cat) = 0.46 · s(-1). In contrast, no Fe(III) reductase activity was observed. MacA was found to display electrochemical properties similar to other bacterial diheme peroxidases, in addition to the ability to electrochemically mediate electron transfer to the soluble cytochrome PpcA. Differences in activity between CcpA and MacA can be rationalized with structural variations in one of the three loop regions, loop 2, that undergoes conformational changes during reductive activation of the enzyme. This loop is adjacent to the active site heme and forms an open loop structure rather than a more rigid helix as in CcpA. For the activation of the protein, the loop has to displace the distal ligand to the active site heme, H93, in loop 1. A H93G variant showed an unexpected formation of a helix in loop 2 and disorder in loop 1, while a M297H variant that altered the properties of the electron transfer heme abolished reductive activation.

Accelerating molecular dynamic simulation on the cell processor and Playstation 3.

Science.gov (United States)

Luttmann, Edgar; Ensign, Daniel L; Vaidyanathan, Vishal; Houston, Mike; Rimon, Noam; Øland, Jeppe; Jayachandran, Guha; Friedrichs, Mark; Pande, Vijay S

2009-01-30

Implementation of molecular dynamics (MD) calculations on novel architectures will vastly increase its power to calculate the physical properties of complex systems. Herein, we detail algorithmic advances developed to accelerate MD simulations on the Cell processor, a commodity processor found in PlayStation 3 (PS3). In particular, we discuss issues regarding memory access versus computation and the types of calculations which are best suited for streaming processors such as the Cell, focusing on implicit solvation models. We conclude with a comparison of improved performance on the PS3's Cell processor over more traditional processors. (c) 2008 Wiley Periodicals, Inc.

Fast digital processor for event selection according to particle number difference

International Nuclear Information System (INIS)

Basiladze, S.G.; Gus'kov, B.N.; Li Van Sun; Maksimov, A.N.; Parfenov, A.N.

1978-01-01

A fast digital processor for a magnetic spectrometer is described. It is used in experimental searches for charmed particles. The basic purpose of the processor is discriminating events in the difference of numbers of particles passing through two proportional chambers (PC). The processor consists of three units for detecting signals with PC, and a binary coder. The number of inputs of the processor is 32 for the first PC and 64 for the second. The difference in the number of particles discriminated is from 0 to 8. The resolution time is 180 ns. The processor is built in the CAMAC standard

Link-layer Jamming Attacks on S-MAC

NARCIS (Netherlands)

Law, Y.W.; Hartel, Pieter H.; den Hartog, Jeremy; Havinga, Paul J.M.

2004-01-01

We argue that among denial-of-service (DoS) attacks, link-layer jamming is a more attractive option to attackers than radio jamming is. By exploiting the semantics of the link-layer protocol (aka MAC protocol), an attacker can achieve better efficiency than blindly jamming the radio signals alone.

Link-layer jamming attacks on S-MAC

NARCIS (Netherlands)

Law, Y.W.; Hartel, Pieter H.; den Hartog, Jeremy; Havinga, Paul J.M.

We argue that among denial-of-service (DoS) attacks, link-layer jamming is a more attractive option to attackers than radio jamming is. By exploiting the semantics of the link-layer protocol (aka MAC protocol), an attacker can achieve better efficiency than blindly jamming the radio signals alone.

Short-term hydro generation scheduling of Three Gorges–Gezhouba cascaded hydropower plants using hybrid MACS-ADE approach

International Nuclear Information System (INIS)

Mo, Li; Lu, Peng; Wang, Chao; Zhou, Jianzhong

2013-01-01

Highlights: • MACS and ADE algorithms are hybridized as MACS-ADE method for solving STHGS problem. • An adaptive mutation is integrated into the proposed algorithm to avoid premature convergence. • MACS and ADE are run in parallel in search of better solution. • Several effective heuristic strategies are designed for dealing with various constraints of STHGS problem. - Abstract: Short-term hydro generation scheduling (STHGS) aims at determining optimal hydro generation scheduling to obtain minimum water consumption for one day or week while meeting various system constraints. In this paper, the STHGS problem is decomposed into two sub-problems: (i) unit commitment (UC) sub-problem; (ii) economic load dispatch (ELD) sub-problem. Then, we present a hybrid algorithm based on multi ant colony system (MACS) and differential evolution (DE) for solving the STHGS problem. First, MACS is used for dealing with UC sub-problem. A set of cooperating ant colonies cooperate to choose the unit state over the scheduled time horizon. Then, the adaptive differential evolution (ADE) is used to solve ELD sub-problem. MACS and ADE are run in parallel with adjusting their solutions in search of a better solution. Meanwhile, local and global pheromone updating rules in MACS and adaptive dynamic parameter adjusting strategy in DE are applied for enhancing the search ability of MACS-ADE. Finally, the proposed method is implemented to solve STHGS problem of Three Gorges–Gezhouba cascaded hydropower plants to verify the feasibility and effectiveness. Compared with other established methods, the simulation results reveal that the proposed MACS-ADE approach has the best convergence property, computational efficiency with less water consumption

Logistic Fuel Processor Development

National Research Council Canada - National Science Library

Salavani, Reza

2004-01-01

... to light gases then steam reform the light gases into hydrogen rich stream. This report documents the efforts in developing a fuel processor capable of providing hydrogen to a 3kW fuel cell stack...

Poincaré-MacMillan Equations of Motion for a Nonlinear Nonholonomic Dynamical System

Science.gov (United States)

Amjad, Hussain; Syed Tauseef, Mohyud-Din; Ahmet, Yildirim

2012-03-01

MacMillan's equations are extended to Poincaré's formalism, and MacMillan's equations for nonlinear nonholonomic systems are obtained in terms of Poincaré parameters. The equivalence of the results obtained here with other forms of equations of motion is demonstrated. An illustrative example of the theory is provided as well.

APRON: A Cellular Processor Array Simulation and Hardware Design Tool

Science.gov (United States)

Barr, David R. W.; Dudek, Piotr

2009-12-01

We present a software environment for the efficient simulation of cellular processor arrays (CPAs). This software (APRON) is used to explore algorithms that are designed for massively parallel fine-grained processor arrays, topographic multilayer neural networks, vision chips with SIMD processor arrays, and related architectures. The software uses a highly optimised core combined with a flexible compiler to provide the user with tools for the design of new processor array hardware architectures and the emulation of existing devices. We present performance benchmarks for the software processor array implemented on standard commodity microprocessors. APRON can be configured to use additional processing hardware if necessary and can be used as a complete graphical user interface and development environment for new or existing CPA systems, allowing more users to develop algorithms for CPA systems.

APRON: A Cellular Processor Array Simulation and Hardware Design Tool

Directory of Open Access Journals (Sweden)

David R. W. Barr

2009-01-01

Full Text Available We present a software environment for the efficient simulation of cellular processor arrays (CPAs. This software (APRON is used to explore algorithms that are designed for massively parallel fine-grained processor arrays, topographic multilayer neural networks, vision chips with SIMD processor arrays, and related architectures. The software uses a highly optimised core combined with a flexible compiler to provide the user with tools for the design of new processor array hardware architectures and the emulation of existing devices. We present performance benchmarks for the software processor array implemented on standard commodity microprocessors. APRON can be configured to use additional processing hardware if necessary and can be used as a complete graphical user interface and development environment for new or existing CPA systems, allowing more users to develop algorithms for CPA systems.

Macular telangiectasia type 2 (MacTel) in a 34-year-old patient.

Science.gov (United States)

Nicolai, Heleen; Wirix, Mieke; Spielberg, Leigh; Leys, Anita

2014-09-23

We report macular telangiectasia type 2 (MacTel) in a 34-year-old man, the youngest patient so far published with MacTel type 2. The patient presented with metamorphopsia and impaired reading ability. Diagnosis was based on bilateral abnormal macular autofluorescence, perifoveal telangiectasia with fluorescein angiographic hyperfluorescence without cystoid oedema, a small foveal avascular zone, asymmetric configuration of the foveal pit, disruptions in the inner segment/outer segment layer and hyper-reflective haze and spots in the outer nuclear layer. Although MacTel usually manifests with a slowly progressive decrease in visual acuity in the fifth to seventh decades of life, younger patients may occasionally be diagnosed with the disease. Awareness of subtle signs of the condition is essential for early diagnosis. 2014 BMJ Publishing Group Ltd.

Control structures for high speed processors

Science.gov (United States)

Maki, G. K.; Mankin, R.; Owsley, P. A.; Kim, G. M.

1982-01-01

A special processor was designed to function as a Reed Solomon decoder with throughput data rate in the Mhz range. This data rate is significantly greater than is possible with conventional digital architectures. To achieve this rate, the processor design includes sequential, pipelined, distributed, and parallel processing. The processor was designed using a high level language register transfer language. The RTL can be used to describe how the different processes are implemented by the hardware. One problem of special interest was the development of dependent processes which are analogous to software subroutines. For greater flexibility, the RTL control structure was implemented in ROM. The special purpose hardware required approximately 1000 SSI and MSI components. The data rate throughput is 2.5 megabits/second. This data rate is achieved through the use of pipelined and distributed processing. This data rate can be compared with 800 kilobits/second in a recently proposed very large scale integration design of a Reed Solomon encoder.

Integrated, Kerberized Login on MacOS X

Science.gov (United States)

Hotz, Henry B.

2006-01-01

Context for this information. MacOS X login process and available hooks. Authorization Services configuration. Authorization Services plug-in s. Kerberos plug-in s. Other bugs and recommendations. Authorization Services Called by loginwindow, screen saver and fast user switching. It calls Directory Services, Login Hook, and Login Items (System Preferences).

Conformational stability analyses of alpha subunit I domain of LFA-1 and Mac-1.

Directory of Open Access Journals (Sweden)

Debin Mao

Full Text Available β₂ integrin of lymphocyte function-associated antigen-1 (LFA-1 or macrophage-1 antigen (Mac-1 binds to their common ligand of intercellular adhesion molecule-1 (ICAM-1 and mediates leukocyte-endothelial cell (EC adhesions in inflammation cascade. Although the two integrins are known to have distinct functions, the corresponding micro-structural bases remain unclear. Here (steered-molecular dynamics simulations were employed to elucidate the conformational stability of α subunit I domains of LFA-1 and Mac-1 in different affinity states and relevant I domain-ICAM-1 interaction features. Compared with low affinity (LA Mac-1, the LA LFA-1 I domain was unstable in the presence or absence of ICAM-1 ligand, stemming from diverse orientations of its α₇-helix with different motifs of zipper-like hydrophobic junction between α₁- and α₇-helices. Meanwhile, spontaneous transition of LFA-1 I domain from LA state to intermediate affinity (IA state was first visualized. All the LA, IA, and high affinity (HA states of LFA-1 I domain and HA Mac-1 I domain were able to bind to ICAM-1 ligand effectively, while LA Mac-1 I domain was unfavorable for binding ligand presumably due to the specific orientation of S144 side-chain that capped the MIDAS ion. These results furthered our understanding in correlating the structural bases with their functions of LFA-1 and Mac-1 integrins from the viewpoint of I domain conformational stability and of the characteristics of I domain-ICAM-1 interactions.

Accuracy requirements of optical linear algebra processors in adaptive optics imaging systems

Science.gov (United States)

Downie, John D.; Goodman, Joseph W.

1989-10-01

The accuracy requirements of optical processors in adaptive optics systems are determined by estimating the required accuracy in a general optical linear algebra processor (OLAP) that results in a smaller average residual aberration than that achieved with a conventional electronic digital processor with some specific computation speed. Special attention is given to an error analysis of a general OLAP with regard to the residual aberration that is created in an adaptive mirror system by the inaccuracies of the processor, and to the effect of computational speed of an electronic processor on the correction. Results are presented on the ability of an OLAP to compete with a digital processor in various situations.

High performance graphics processors for medical imaging applications

International Nuclear Information System (INIS)

Goldwasser, S.M.; Reynolds, R.A.; Talton, D.A.; Walsh, E.S.

1989-01-01

This paper describes a family of high- performance graphics processors with special hardware for interactive visualization of 3D human anatomy. The basic architecture expands to multiple parallel processors, each processor using pipelined arithmetic and logical units for high-speed rendering of Computed Tomography (CT), Magnetic Resonance (MR) and Positron Emission Tomography (PET) data. User-selectable display alternatives include multiple 2D axial slices, reformatted images in sagittal or coronal planes and shaded 3D views. Special facilities support applications requiring color-coded display of multiple datasets (such as radiation therapy planning), or dynamic replay of time- varying volumetric data (such as cine-CT or gated MR studies of the beating heart). The current implementation is a single processor system which generates reformatted images in true real time (30 frames per second), and shaded 3D views in a few seconds per frame. It accepts full scale medical datasets in their native formats, so that minimal preprocessing delay exists between data acquisition and display

Keystone Business Models for Network Security Processors

OpenAIRE

Arthur Low; Steven Muegge

2013-01-01

Network security processors are critical components of high-performance systems built for cybersecurity. Development of a network security processor requires multi-domain experience in semiconductors and complex software security applications, and multiple iterations of both software and hardware implementations. Limited by the business models in use today, such an arduous task can be undertaken only by large incumbent companies and government organizations. Neither the “fabless semiconductor...

Development of level 2 processor for the readout of TMC

International Nuclear Information System (INIS)

Arai, Y.; Ikeno, M.; Murata, T.; Sudo, F.; Emura, T.

1995-01-01

We have developed a prototype 8-bit processor for the level 2 data processing for the Time Memory Cell (TMC). The first prototype processor successfully runs with 18 MHz clock. The operation of same clock frequency as TMC (30 MHz) will be easily achieved with simple modifications. Although the processor is very primitive one but shows its powerful performance and flexibility. To realize the compact TMC/L2P (Level 2 Processor) system, it is better to include the microcode memory within the chip. Encoding logic of the microcode must be included to reduce the microcode memory in this case. (J.P.N.)

Review of trigger and on-line processors at SLAC

International Nuclear Information System (INIS)

Lankford, A.J.

1984-07-01

The role of trigger and on-line processors in reducing data rates to manageable proportions in e + e - physics experiments is defined not by high physics or background rates, but by the large event sizes of the general-purpose detectors employed. The rate of e + e - annihilation is low, and backgrounds are not high; yet the number of physics processes which can be studied is vast and varied. This paper begins by briefly describing the role of trigger processors in the e + e - context. The usual flow of the trigger decision process is illustrated with selected examples of SLAC trigger processing. The features are mentioned of triggering at the SLC and the trigger processing plans of the two SLC detectors: The Mark II and the SLD. The most common on-line processors at SLAC, the BADC, the SLAC Scanner Processor, the SLAC FASTBUS Controller, and the VAX CAMAC Channel, are discussed. Uses of the 168/E, 3081/E, and FASTBUS VAX processors are mentioned. The manner in which these processors are interfaced and the function they serve on line is described. Finally, the accelerator control system for the SLC is outlined. This paper is a survey in nature, and hence, relies heavily upon references to previous publications for detailed description of work mentioned here. 27 references, 9 figures, 1 table

Manual Ability Classification System (MACS: reliability between therapists and parents in Brazil

Directory of Open Access Journals (Sweden)

Daniela B. R. Silva

2015-02-01

Full Text Available BACKGROUND: The Manual Ability Classification System (MACS has been widely used to describe the manual ability of children with cerebral palsy (CP; however its reliability has not been verified in Brazil. OBJECTIVE: To establish the inter- and intra-rater reliability of the Portuguese-Brazil version of the MACS by comparing the classifications given by therapists and parents of children with CP. METHOD: Data were obtained from 90 children with CP between the ages of 4 and 18 years, who were treated at the neurology and rehabilitation clinics of a Brazilian hospital. Therapists (an occupational therapist and a student classified manual ability (MACS through direct observation and information provided by parents. Therapists and parents used the Portuguese-Brazil version of the MACS. Intra- and inter-rater reliability was obtained using unweighted Kappa coefficient (k and intra-class correlation coefficient (ICC. The Chi-square test was used to identify the predominance of disagreements in the classification of parents and therapists. RESULTS: An almost perfect agreement resulted among therapists [K=0.90 (95% CI 0.83-0.97; ICC=0.97 (95%CI 0.96-0.98], as well as with intra-rater (therapists, with Kappa ranging between 0.83 and 0.95 and ICC between 0.96 and 0.99 for the evaluator with more and less experience in rehabilitation, respectively. The agreement between therapists and parents was fair [K=0.36 (95% CI 0.22-0.50; ICC=0.79 (95% CI 0.70-0.86]. CONCLUSIONS: The Portuguese version of the MACS is a reliable instrument to be used jointly by parents and therapists.

FY1995 study of design methodology and environment of high-performance processor architectures; 1995 nendo koseino processor architecture sekkeiho to sekkei kankyo no kenkyu

Energy Technology Data Exchange (ETDEWEB)

NONE

1997-03-01

The aim of our project is to develop high-performance processor architectures for both general purpose and application-specific purpose. We also plan to develop basic softwares, such as compliers, and various design aid tools for those architectures. We are particularly interested in performance evaluation at architecture design phase, design optimization, automatic generation of compliers from processor designs, and architecture design methodologies combined with circuit layout. We have investigated both microprocessor architectures and design methodologies / environments for the processors. Our goal is to establish design technologies for high-performance, low-power, low-cost and highly-reliable systems in system-on-silicon era. We have proposed PPRAM architecture for high-performance system using DRAM and logic mixture technology, Softcore processor architecture for special purpose processors in embedded systems, and Power-Pro architecture for low power systems. We also developed design methodologies and design environments for the above architectures as well as a new method for design verification of microprocessors. (NEDO)

Software-defined reconfigurable microwave photonics processor.

Science.gov (United States)

Pérez, Daniel; Gasulla, Ivana; Capmany, José

2015-06-01

We propose, for the first time to our knowledge, a software-defined reconfigurable microwave photonics signal processor architecture that can be integrated on a chip and is capable of performing all the main functionalities by suitable programming of its control signals. The basic configuration is presented and a thorough end-to-end design model derived that accounts for the performance of the overall processor taking into consideration the impact and interdependencies of both its photonic and RF parts. We demonstrate the model versatility by applying it to several relevant application examples.

Case Study of Using High Performance Commercial Processors in Space

Science.gov (United States)

Ferguson, Roscoe C.; Olivas, Zulema

2009-01-01

The purpose of the Space Shuttle Cockpit Avionics Upgrade project (1999 2004) was to reduce crew workload and improve situational awareness. The upgrade was to augment the Shuttle avionics system with new hardware and software. A major success of this project was the validation of the hardware architecture and software design. This was significant because the project incorporated new technology and approaches for the development of human rated space software. An early version of this system was tested at the Johnson Space Center for one month by teams of astronauts. The results were positive, but NASA eventually cancelled the project towards the end of the development cycle. The goal to reduce crew workload and improve situational awareness resulted in the need for high performance Central Processing Units (CPUs). The choice of CPU selected was the PowerPC family, which is a reduced instruction set computer (RISC) known for its high performance. However, the requirement for radiation tolerance resulted in the re-evaluation of the selected family member of the PowerPC line. Radiation testing revealed that the original selected processor (PowerPC 7400) was too soft to meet mission objectives and an effort was established to perform trade studies and performance testing to determine a feasible candidate. At that time, the PowerPC RAD750s were radiation tolerant, but did not meet the required performance needs of the project. Thus, the final solution was to select the PowerPC 7455. This processor did not have a radiation tolerant version, but had some ability to detect failures. However, its cache tags did not provide parity and thus the project incorporated a software strategy to detect radiation failures. The strategy was to incorporate dual paths for software generating commands to the legacy Space Shuttle avionics to prevent failures due to the softness of the upgraded avionics.

Designing a dataflow processor using CλaSH

NARCIS (Netherlands)

Niedermeier, A.; Wester, Rinse; Wester, Rinse; Rovers, K.C.; Baaij, C.P.R.; Kuper, Jan; Smit, Gerardus Johannes Maria

2010-01-01

In this paper we show how a simple dataflow processor can be fully implemented using CλaSH, a high level HDL based on the functional programming language Haskell. The processor was described using Haskell, the CλaSH compiler was then used to translate the design into a fully synthesisable VHDL code.

Researching, building a soft-processor and Ethernet interface circuit using EDK

International Nuclear Information System (INIS)

Tuong Thi Thu Huong; Pham Ngoc Tuan; Truong Van Dat, Dang Lanh; Chau Thi Nhu Quynh

2014-01-01

The processor is an indispensable component in the measurement and automatic control systems. This report describes the fabrication of a soft-processor (32-bits, on-chip block RAM 64K, 50M clock, internal and peripheral bus) for receiving, sending and processing of data Ethernet packets. This processor is fabricated using the XPS component from EDK (Xilinx) software toolkit. After that, it is configured on the FPGA named Spartan XC3S500E circuit. A firmware of a processor for controlling the interface between processor and Ethernet port is written in C language and can play a role of a HOST (station) which has its own IP to connect to Ethernet network. Besides, there are some needed parts as follows: an Ethernet interfacing controller chip, a suitable cable providing a speed up to 100 Mbs and an application program running under Window XP environment written in LabView to communicate with soft-processor. (author)

A high-accuracy optical linear algebra processor for finite element applications

Science.gov (United States)

Casasent, D.; Taylor, B. K.

1984-01-01

Optical linear processors are computationally efficient computers for solving matrix-matrix and matrix-vector oriented problems. Optical system errors limit their dynamic range to 30-40 dB, which limits their accuray to 9-12 bits. Large problems, such as the finite element problem in structural mechanics (with tens or hundreds of thousands of variables) which can exploit the speed of optical processors, require the 32 bit accuracy obtainable from digital machines. To obtain this required 32 bit accuracy with an optical processor, the data can be digitally encoded, thereby reducing the dynamic range requirements of the optical system (i.e., decreasing the effect of optical errors on the data) while providing increased accuracy. This report describes a new digitally encoded optical linear algebra processor architecture for solving finite element and banded matrix-vector problems. A linear static plate bending case study is described which quantities the processor requirements. Multiplication by digital convolution is explained, and the digitally encoded optical processor architecture is advanced.

[Spanish validation of the MacArthur Competence Assessment Tool for Treatment interview to assess patients competence to consent treatment].

Science.gov (United States)

Alvarez Marrodán, Ignacio; Baón Pérez, Beatriz; Navío Acosta, Mercedes; López-Antón, Raul; Lobo Escolar, Elena; Ventura Faci, Tirso

2014-09-09

To validate the MacArthur Competence Assessment Tool for Treatment (MacCAT-T) Spanish version, which assesses the mental capacity of patients to consent treatment, by examining 4 areas (Understanding, Appreciation, Reasoning and Expressing a choice). 160 subjects (80 Internal Medicine inpatients, 40 Psychiatric inpatients and 40 healthy controls). MacCAT-T, Mini-Mental Status Examination (MMSE). Feasibility study, reliability and validity calculations (against to gold standard of clinical expert). Mean duration of the MacCAT-T interview was 18min. Inter-rater reliability: Intraclass correlation coefficient for Understanding=0.98, Appreciation=0.97, Reasoning=0.98, Expressing a choice=0.91. Internal consistency (Cronbach's alpha): Understanding=0.87, for Appreciation=0.76, for Reasoning=0.86. Patients considered to be incapable (gold standard) scored lower in all the MacCAT-T areas. Poor performance on the MacCAT-T was related to cognitive impairment assessed by MMSE. Spanish version of the MacCAT-T is feasible, reliable, and valid for assessing the capacity of patients to consent treatment. Copyright © 2013 Elsevier España, S.L. All rights reserved.

Low voltage 80 KV to 125 KV electron processors

International Nuclear Information System (INIS)

Lauppi, U.V.

1999-01-01

The classic electron beam technology made use of accelerating energies in the voltage range of 300 to 800 kV. The first EB processors - built for the curing of coatings - operated at 300 kV. The products to be treated were thicker than a simple layer of coating with thicknesses up to 100g and more. It was only in the beginning of the 1970's that industrial EB processors with accelerating voltages below 300 kV appeared on the market. Our company developed the first commercial electron accelerator without a beam scanner. The new EB machine featured a linear cathode, emitting a shower or 'curtain' of electrons over the full width of the product. These units were much smaller than anv previous EB processors and dedicated to the curing of coatings and other thin layers. ESI's first EB units operated with accelerating voltages between 150 and 200 kV. In 1993 ESI announced the introduction of a new generation of Electrocure. EB processors operating at 120 kV, and in 1998, at the RadTech North America '98 Conference in Chicago, the introduction of an 80 kV electron beam processor under the designation Microbeam LV

A fast track trigger processor for the OPAL detector at LEP

International Nuclear Information System (INIS)

Carter, A.A.; Jaroslawski, S.; Wagner, A.

1986-01-01

A fast hardware track trigger processor being built for the OPAL experiment is described. The processor will analyse data from the central drift chambers of OPAL to determine whether any tracks come from the interaction region, and thereby eliminate background events. The processor will find tracks over a large angular range, vertical strokecos thetavertical stroke < or approx. 0.95. The design of the processor is described, together with a brief account of its hardware implementation for OPAL. The results of feasibility studies are also presented. (orig.)

Launching applications on compute and service processors running under different operating systems in scalable network of processor boards with routers

Science.gov (United States)

Tomkins, James L [Albuquerque, NM; Camp, William J [Albuquerque, NM

2009-03-17

A multiple processor computing apparatus includes a physical interconnect structure that is flexibly configurable to support selective segregation of classified and unclassified users. The physical interconnect structure also permits easy physical scalability of the computing apparatus. The computing apparatus can include an emulator which permits applications from the same job to be launched on processors that use different operating systems.

Satellite on-board real-time SAR processor prototype

Science.gov (United States)

Bergeron, Alain; Doucet, Michel; Harnisch, Bernd; Suess, Martin; Marchese, Linda; Bourqui, Pascal; Desnoyers, Nicholas; Legros, Mathieu; Guillot, Ludovic; Mercier, Luc; Châteauneuf, François

2017-11-01

A Compact Real-Time Optronic SAR Processor has been successfully developed and tested up to a Technology Readiness Level of 4 (TRL4), the breadboard validation in a laboratory environment. SAR, or Synthetic Aperture Radar, is an active system allowing day and night imaging independent of the cloud coverage of the planet. The SAR raw data is a set of complex data for range and azimuth, which cannot be compressed. Specifically, for planetary missions and unmanned aerial vehicle (UAV) systems with limited communication data rates this is a clear disadvantage. SAR images are typically processed electronically applying dedicated Fourier transformations. This, however, can also be performed optically in real-time. Originally the first SAR images were optically processed. The optical Fourier processor architecture provides inherent parallel computing capabilities allowing real-time SAR data processing and thus the ability for compression and strongly reduced communication bandwidth requirements for the satellite. SAR signal return data are in general complex data. Both amplitude and phase must be combined optically in the SAR processor for each range and azimuth pixel. Amplitude and phase are generated by dedicated spatial light modulators and superimposed by an optical relay set-up. The spatial light modulators display the full complex raw data information over a two-dimensional format, one for the azimuth and one for the range. Since the entire signal history is displayed at once, the processor operates in parallel yielding real-time performances, i.e. without resulting bottleneck. Processing of both azimuth and range information is performed in a single pass. This paper focuses on the onboard capabilities of the compact optical SAR processor prototype that allows in-orbit processing of SAR images. Examples of processed ENVISAT ASAR images are presented. Various SAR processor parameters such as processing capabilities, image quality (point target analysis), weight and

Particle simulation on a distributed memory highly parallel processor

International Nuclear Information System (INIS)

Sato, Hiroyuki; Ikesaka, Morio

1990-01-01

This paper describes parallel molecular dynamics simulation of atoms governed by local force interaction. The space in the model is divided into cubic subspaces and mapped to the processor array of the CAP-256, a distributed memory, highly parallel processor developed at Fujitsu Labs. We developed a new technique to avoid redundant calculation of forces between atoms in different processors. Experiments showed the communication overhead was less than 5%, and the idle time due to load imbalance was less than 11% for two model problems which contain 11,532 and 46,128 argon atoms. From the software simulation, the CAP-II which is under development is estimated to be about 45 times faster than CAP-256 and will be able to run the same problem about 40 times faster than Fujitsu's M-380 mainframe when 256 processors are used. (author)

Code compression for VLIW embedded processors

Science.gov (United States)

Piccinelli, Emiliano; Sannino, Roberto

2004-04-01

The implementation of processors for embedded systems implies various issues: main constraints are cost, power dissipation and die area. On the other side, new terminals perform functions that require more computational flexibility and effort. Long code streams must be loaded into memories, which are expensive and power consuming, to run on DSPs or CPUs. To overcome this issue, the "SlimCode" proprietary algorithm presented in this paper (patent pending technology) can reduce the dimensions of the program memory. It can run offline and work directly on the binary code the compiler generates, by compressing it and creating a new binary file, about 40% smaller than the original one, to be loaded into the program memory of the processor. The decompression unit will be a small ASIC, placed between the Memory Controller and the System bus of the processor, keeping unchanged the internal CPU architecture: this implies that the methodology is completely transparent to the core. We present comparisons versus the state-of-the-art IBM Codepack algorithm, along with its architectural implementation into the ST200 VLIW family core.

Recursive Matrix Inverse Update On An Optical Processor

Science.gov (United States)

Casasent, David P.; Baranoski, Edward J.

1988-02-01

A high accuracy optical linear algebraic processor (OLAP) using the digital multiplication by analog convolution (DMAC) algorithm is described for use in an efficient matrix inverse update algorithm with speed and accuracy advantages. The solution of the parameters in the algorithm are addressed and the advantages of optical over digital linear algebraic processors are advanced.

Graphical user interface for TOUGH/TOUGH2 - development of database, pre-processor, and post-processor

Energy Technology Data Exchange (ETDEWEB)

Sato, Tatsuya; Okabe, Takashi; Osato, Kazumi [Geothermal Energy Research and Development Co., Ltd., Tokyo (Japan)

1995-03-01

One of the advantages of the TOUGH/TOUGH2 (Pruess, 1987 and 1991) is the modeling using {open_quotes}free shape{close_quotes} polygonal blocks. However, the treatment of three-dimensional information, particularly for TOUGH/TOUGH2 is not easy because of the {open_quotes}free shape{close_quotes} polygonal blocks. Therefore, we have developed a database named {open_quotes}GEOBASE{close_quotes} and a pre/post-processor named {open_quotes}GEOGRAPH{close_quotes} for TOUGH/TOUGH2 on engineering work station (EWS). {open_quotes}GEOGRAPH{close_quotes} is based on the ORACLE{sup *1} relational database manager system to access data sets of surface exploration (geology, geophysics, geochemistry, etc.), drilling (well trajectory, geological column, logging, etc.), well testing (production test, injection test, interference test, tracer test, etc.) and production/injection history.{open_quotes}GEOGRAPH{close_quotes} consists of {open_quotes}Pre-processor{close_quotes} that can construct the three-dimensional free shape reservoir modeling by mouse operation on X-window and {open_quotes}Post-processor{close_quotes} that can display several kinds of two/three-dimensional maps and X-Y plots to compile data on {open_quotes}GEOBASE{close_quotes} and result of TOUGH/TOUGH2 calculation. This paper shows concept of the systems and examples of utilization.

MAC Version 3.3, MBA Version 1.3 acceptance test summary report

International Nuclear Information System (INIS)

Russell, V.K.

1994-01-01

The K Basins Materials Accounting (MAC) and Materials Balance (MBA) programs had the Paradox Code Cleanup ATP run to check out the systems. This report describes the results of the test and provides the signoff sheets associated with the testing. The Acceptance Test results indicate that the MAC and MBA systems are ready for operation using the cleaned up code. The final codes were removed to the production space on the customer server on April 15th

Biomass is beginning to threaten the wood-processors

International Nuclear Information System (INIS)

Beer, G.; Sobinkovic, B.

2004-01-01

In this issue an exploitation of biomass in Slovak Republic is analysed. Some new projects of constructing of the stoke-holds for biomass processing are published. The grants for biomass are ascending the prices of wood raw material, which is thus becoming less accessible for the wood-processors. An excessive wood export threatens the domestic processors

76 FR 71797 - Federal Agricultural Mortgage Corporation Funding and Fiscal Affairs; Farmer Mac Investments and...

Science.gov (United States)

2011-11-18

... diligence procedures that are required for investments, but we do not intend to change the fundamental... Federal Agricultural Mortgage Corporation Funding and Fiscal Affairs; Farmer Mac Investments and Liquidity... Mortgage Corporation Funding and Fiscal Affairs; Farmer Mac Investments and Liquidity Management AGENCY...

ASAP: A MAC Protocol for Dense and Time-Constrained RFID Systems

Directory of Open Access Journals (Sweden)

Kyounghwan Lee

2007-08-01

Full Text Available We introduce a novel medium access control (MAC protocol for radio frequency identification (RFID systems which exploits the statistical information collected at the reader. The protocol, termed adaptive slotted ALOHA protocol (ASAP, is motivated by the need to significantly improve the total read time performance of the currently suggested MAC protocols for RFID systems. In order to accomplish this task, ASAP estimates the dynamic tag population and adapts the frame size in the subsequent round via a simple policy that maximizes an appropriately defined efficiency function. We demonstrate that ASAP provides significant improvement in total read time performance over the current RFID MAC protocols. We next extend the design to accomplish reliable performance of ASAP in realistic scenarios such as the existence of constraints on frame size, and mobile RFID systems where tags move at constant velocity in the reader's field. We also consider the case where tags may fail to respond because of a physical breakdown or a temporary malfunction, and show the robustness in those scenarios as well.

Parallel processor for fast event analysis

International Nuclear Information System (INIS)

Hensley, D.C.

1983-01-01

Current maximum data rates from the Spin Spectrometer of approx. 5000 events/s (up to 1.3 MBytes/s) and minimum analysis requiring at least 3000 operations/event require a CPU cycle time near 70 ns. In order to achieve an effective cycle time of 70 ns, a parallel processing device is proposed where up to 4 independent processors will be implemented in parallel. The individual processors are designed around the Am2910 Microsequencer, the AM29116 μP, and the Am29517 Multiplier. Satellite histogramming in a mass memory system will be managed by a commercial 16-bit μP system

Asymmetrical floating point array processors, their application to exploration and exploitation

Energy Technology Data Exchange (ETDEWEB)

Geriepy, B L

1983-01-01

An asymmetrical floating point array processor is a special-purpose scientific computer which operates under asymmetrical control of a host computer. Although an array processor can receive fixed point input and produce fixed point output, its primary mode of operation is floating point. The first generation of array processors was oriented towards time series information. The next generation of array processors has proved much more versatile and their applicability ranges from petroleum reservoir simulation to speech syntheses. Array processors are becoming commonplace in mining, the primary usage being construction of grids-by usual methods or by kriging. The Australian mining community is among the world's leaders in regard to computer-assisted exploration and exploitation systems. Part of this leadership role must be providing guidance to computer vendors in regard to current and future requirements.

Comparison of the C-MAC video laryngoscope to the Macintosh laryngoscope for intubation of blunt trauma patients in the ED

Directory of Open Access Journals (Sweden)

Erkan Goksu

2016-06-01

Full Text Available Objectives: We aimed to compare the performance of the C-MAC video laryngoscope (C-MAC to the Macintosh laryngoscope for intubation of blunt trauma patients in the ED. Material and methods: This was a prospective randomized study. The primary outcome measure is overall successful intubation. Secondary outcome measures are first attempt successful intubation, Cormack–Lehane (CL grade, and indicators of the reasons for unsuccessful intubation at the first attempt with each device. Adult patients who suffered from blunt trauma and required intubation were randomized to video laryngoscopy with C-MAC device or direct laryngoscopy (DL. Results: During a 17-month period, a total of 150 trauma intubations were performed using a C-MAC and DL. Baseline characteristics of patients were similar between the C-MAC and DL group. Overall success for the C-MAC was 69/75 (92%, 95% CI 0.83 to 0.96 while for the DL it was 72/75 (96%, 95% CI 0.88 to 0.98. First attempt success for the C-MAC was 47/75 (62.7%, 95% CI 0.51 to 0.72 while for the DL it was 44/75 patients (58.7%, 95% CI 0.47 to 0.69. The mean time to achieve successful intubation was 33.4 ± 2.5 s for the C-MAC versus 42.4 ± 5.1 s for the DL (p = 0.93. There was a statistically significant difference between the DL and C-MAC in terms of visualizing the glottic opening and esophageal intubation in favor of the C-MAC (p = 0.002 and p = 0.013 respectively. Discussion and conclusion: The overall success rates were similar. The C-MAC demonstrated improved glottic view and decrease in esophageal intubation rate. Keywords: Airway management, Emergency medicine, Video laryngoscope

On the effective parallel programming of multi-core processors

NARCIS (Netherlands)

Varbanescu, A.L.

2010-01-01

Multi-core processors are considered now the only feasible alternative to the large single-core processors which have become limited by technological aspects such as power consumption and heat dissipation. However, due to their inherent parallel structure and their diversity, multi-cores are

The UA1 upgrade calorimeter trigger processor

International Nuclear Information System (INIS)

Bains, N.; Baird, S.A.; Biddulph, P.

1990-01-01

The increased luminosity of the improved CERN Collider and the more subtle signals of second-generation collider physics demand increasingly sophisticated triggering. We have built a new first-level trigger processor designed to use the excellent granularity of the UA1 upgrade calorimeter. This device is entirely digital and handles events in 1.5 μs, thus introducing no deadtime. Its most novel feature is fast two-dimensional electromagnetic cluster-finding with the possibility of demanding an isolated shower of limited penetration. The processor allows multiple combinations of triggers on electromagnetic showers, hadronic jets and energy sums, including a total-energy veto of multiple interactions and a full vector sum of missing transverse energy. This hard-wired processor is about five times more powerful than its predecessor, and makes extensive use of pipelining techniques. It was used extensively in the 1988 and 1989 runs of the CERN Collider. (author)

The UA1 upgrade calorimeter trigger processor

International Nuclear Information System (INIS)

Bains, M.; Charleton, D.; Ellis, N.; Garvey, J.; Gregory, J.; Jimack, M.P.; Jovanovic, P.; Kenyon, I.R.; Baird, S.A.; Campbell, D.; Cawthraw, M.; Coughlan, J.; Flynn, P.; Galagedera, S.; Grayer, G.; Halsall, R.; Shah, T.P.; Stephens, R.; Biddulph, P.; Eisenhandler, E.; Fensome, I.F.; Landon, M.; Robinson, D.; Oliver, J.; Sumorok, K.

1990-01-01

The increased luminosity of the improved CERN Collider and the more subtle signals of second-generation collider physics demand increasingly sophisticated triggering. We have built a new first-level trigger processor designed to use the excellent granularity of the UA1 upgrade calorimeter. This device is entirely digital and handles events in 1.5 μs, thus introducing no dead time. Its most novel feature is fast two-dimensional electromagnetic cluster-finding with the possibility of demanding an isolated shower of limited penetration. The processor allows multiple combinations of triggers on electromagnetic showers, hadronic jets and energy sums, including a total-energy veto of multiple interactions and a full vector sum of missing transverse energy. This hard-wired processor is about five times more powerful than its predecessor, and makes extensive use of pipelining techniques. It was used extensively in the 1988 and 1989 runs of the CERN Collider. (orig.)

Microfabricated inserts for magic angle coil spinning (MACS wireless NMR spectroscopy.

Directory of Open Access Journals (Sweden)

Vlad Badilita

Full Text Available This article describes the development and testing of the first automatically microfabricated probes to be used in conjunction with the magic angle coil spinning (MACS NMR technique. NMR spectroscopy is a versatile technique for a large range of applications, but its intrinsically low sensitivity poses significant difficulties in analyzing mass- and volume-limited samples. The combination of microfabrication technology and MACS addresses several well-known NMR issues in a concerted manner for the first time: (i reproducible wafer-scale fabrication of the first-in-kind on-chip LC microresonator for inductive coupling of the NMR signal and reliable exploitation of MACS capabilities; (ii improving the sensitivity and the spectral resolution by simultaneous spinning the detection microcoil together with the sample at the "magic angle" of 54.74° with respect to the direction of the magnetic field (magic angle spinning - MAS, accompanied by the wireless signal transmission between the microcoil and the primary circuit of the NMR spectrometer; (iii given the high spinning rates (tens of kHz involved in the MAS methodology, the microfabricated inserts exhibit a clear kinematic advantage over their previously demonstrated counterparts due to the inherent capability to produce small radius cylindrical geometries, thus tremendously reducing the mechanical stress and tearing forces on the sample. In order to demonstrate the versatility of the microfabrication technology, we have designed MACS probes for various Larmor frequencies (194, 500 and 700 MHz testing several samples such as water, Drosophila pupae, adamantane solid and LiCl at different magic angle spinning speeds.

CoCoMac 2.0 and the future of tract-tracing databases

OpenAIRE

Rembrandt eBakker; Rembrandt eBakker; Rembrandt eBakker; Thomas eWachtler; Markus eDiesmann; Markus eDiesmann; Markus eDiesmann

2012-01-01

The CoCoMac database contains the results of published axonal tract-tracing studies in the macaque brain. The combined data are used to construct the macaque macro-connectome. We discuss the redevelopment of CoCoMac and compare it to six connectome-related projects: two resources that provide online access to raw tracing data in rodents, a connectome viewer for advanced 3d graphics, a partial but highly detailed rat connectome, a brain data management system that generates custom connectivity...

Current evidence for the use of C-MAC videolaryngoscope in adult airway management: a review of the literature

Directory of Open Access Journals (Sweden)

Xue FS

2017-07-01

Full Text Available Fu-Shan Xue, Hui-Xian Li, Ya-Yang Liu, Gui-Zhen Yang Department of Anesthesiology, Plastic Surgery Hospital, Chinese Academy of Medical Sciences and Peking Union Medical College, Beijing, People’s Republic of China Abstract: The C-MAC videolaryngoscope is the first Macintosh-typed videolaryngoscope. Since the advent of its original version video Macintosh system in 1999, this device has been modified several times. A unique feature of C-MAC device is its ability to provide the 2 options of direct and video laryngoscopy with the same device. The available evidence shows that in patients with normal airways, C-MAC videolaryngoscope compared with direct laryngoscopy can provide comparable or better laryngeal views and exerts less force on maxillary incisors, but does not offer conclusive benefits with regard to intubation time, intubation success, number of intubation attempts, the use of adjuncts, and hemodynamic responses to intubation. In patients with predicted or known difficult airways, C-MAC videolaryngoscope can achieve a better laryngeal view, a higher intubation success rate and a shorter intubation time than direct laryngoscopy. Furthermore, the option to perform direct and video laryngoscopy with the same device makes C-MAC videolaryngoscope exceptionally useful for emergency intubation. In addition, the C-MAC videolaryngoscope is a very good tool for tracheal intubation teaching. However, tracheal intubation with C-MAC videolaryngoscope may occasionally fail and introduction of C-MAC videolaryngoscope in clinical practice must be accompanied by formal training programs in normal and difficult airway managements. Keywords: videolaryngoscopy, direct laryngoscopy, airway management, tracheal intubation, patient safety

MacCormack's technique-based pressure reconstruction approach for PIV data in compressible flows with shocks

Science.gov (United States)

Liu, Shun; Xu, Jinglei; Yu, Kaikai

2017-06-01

This paper proposes an improved approach for extraction of pressure fields from velocity data, such as obtained by particle image velocimetry (PIV), especially for steady compressible flows with strong shocks. The principle of this approach is derived from Navier-Stokes equations, assuming adiabatic condition and neglecting viscosity of flow field boundaries measured by PIV. The computing method is based on MacCormack's technique in computational fluid dynamics. Thus, this approach is called the MacCormack method. Moreover, the MacCormack method is compared with several approaches proposed in previous literature, including the isentropic method, the spatial integration and the Poisson method. The effects of velocity error level and PIV spatial resolution on these approaches are also quantified by using artificial velocity data containing shock waves. The results demonstrate that the MacCormack method has higher reconstruction accuracy than other approaches, and its advantages become more remarkable with shock strengthening. Furthermore, the performance of the MacCormack method is also validated by using synthetic PIV images with an oblique shock wave, confirming the feasibility and advantage of this approach in real PIV experiments. This work is highly significant for the studies on aerospace engineering, especially the outer flow fields of supersonic aircraft and the internal flow fields of ramjets.

Benchmarking NWP Kernels on Multi- and Many-core Processors

Science.gov (United States)

Michalakes, J.; Vachharajani, M.

2008-12-01

Increased computing power for weather, climate, and atmospheric science has provided direct benefits for defense, agriculture, the economy, the environment, and public welfare and convenience. Today, very large clusters with many thousands of processors are allowing scientists to move forward with simulations of unprecedented size. But time-critical applications such as real-time forecasting or climate prediction need strong scaling: faster nodes and processors, not more of them. Moreover, the need for good cost- performance has never been greater, both in terms of performance per watt and per dollar. For these reasons, the new generations of multi- and many-core processors being mass produced for commercial IT and "graphical computing" (video games) are being scrutinized for their ability to exploit the abundant fine- grain parallelism in atmospheric models. We present results of our work to date identifying key computational kernels within the dynamics and physics of a large community NWP model, the Weather Research and Forecast (WRF) model. We benchmark and optimize these kernels on several different multi- and many-core processors. The goals are to (1) characterize and model performance of the kernels in terms of computational intensity, data parallelism, memory bandwidth pressure, memory footprint, etc. (2) enumerate and classify effective strategies for coding and optimizing for these new processors, (3) assess difficulties and opportunities for tool or higher-level language support, and (4) establish a continuing set of kernel benchmarks that can be used to measure and compare effectiveness of current and future designs of multi- and many-core processors for weather and climate applications.

Processors for wavelet analysis and synthesis: NIFS and TI-C80 MVP

Science.gov (United States)

Brooks, Geoffrey W.

1996-03-01

Two processors are considered for image quadrature mirror filtering (QMF). The neuromorphic infrared focal-plane sensor (NIFS) is an existing prototype analog processor offering high speed spatio-temporal Gaussian filtering, which could be used for the QMF low- pass function, and difference of Gaussian filtering, which could be used for the QMF high- pass function. Although not designed specifically for wavelet analysis, the biologically- inspired system accomplishes the most computationally intensive part of QMF processing. The Texas Instruments (TI) TMS320C80 Multimedia Video Processor (MVP) is a 32-bit RISC master processor with four advanced digital signal processors (DSPs) on a single chip. Algorithm partitioning, memory management and other issues are considered for optimal performance. This paper presents these considerations with simulated results leading to processor implementation of high-speed QMF analysis and synthesis.

Global Mobile Satellite Service Interference Analysis for the AeroMACS

Science.gov (United States)

Wilson, Jeffrey D.; Apaza, Rafael D.; Hall, Ward; Phillips, Brent

2013-01-01

The AeroMACS (Aeronautical Mobile Airport Communications System), which is based on the IEEE 802.16-2009 mobile wireless standard, is envisioned as the wireless network which will cover all areas of airport surfaces for next generation air transportation. It is expected to be implemented in the 5091-5150 MHz frequency band which is also occupied by mobile satellite service uplinks. Thus the AeroMACS must be designed to avoid interference with this incumbent service. Simulations using Visualyse software were performed utilizing a global database of 6207 airports. Variations in base station and subscriber antenna distribution and gain pattern were examined. Based on these simulations, recommendations for global airport base station and subscriber antenna power transmission limitations are provided.

Nora Tully MacAlvay--Her Life in the Theatre.

Science.gov (United States)

Webb, Dorothy

1996-01-01

Recounts the life and times of a pioneer children's theater playwright and fiction author, Nora Tully MacAlvay (1900-86). Points out that her interest in children's theater and children's literature was lifelong and intense. (PA)

Learn Xcode Tools for Mac OS X and iPhone Development

CERN Document Server

Piper, I

2010-01-01

This book will give you a thorough grounding in the principal and supporting tools and technologies that make up the Xcode Developer Tools suite. Apple has provided a comprehensive collection of developer tools, and this is the first book to examine the complete Apple programming environment for both Mac OS X and iPhone. * Comprehensive coverage of all the Xcode developer tools * Additional coverage of useful third-party development tools* Not just a survey of features, but a serious examination of the complete development process for Mac OS X and iPhone applications What you'll learn* The boo

The Big Mac Standard: A statistical Illustration

OpenAIRE

Yukinobu Kitamura; Hiroshi Fujiki

2004-01-01

We demonstrate a statistical procedure for selecting the most suitable empirical model to test an economic theory, using the example of the test for purchasing power parity based on the Big Mac Index. Our results show that supporting evidence for purchasing power parity, conditional on the Balassa-Samuelson effect, depends crucially on the selection of models, sample periods and economies used for estimations.

ACP/R3000 processors in data acquisition systems

International Nuclear Information System (INIS)

Deppe, J.; Areti, H.; Atac, R.

1989-02-01

We describe ACP/R3000 processor based data acquisition systems for high energy physics. This VME bus compatible processor board, with a computational power equivalent to 15 VAX 11/780s or better, contains 8 Mb of memory for event buffering and has a high speed secondary bus that allows data gathering from front end electronics. 2 refs., 3 figs

GA103: A microprogrammable processor for online filtering

International Nuclear Information System (INIS)

Calzas, A.; Danon, G.; Bouquet, B.

1981-01-01

GA 103 is a 16 bit microprogrammable processor which emulates the PDP 11 instruction set. It is based on the Am 2900 slices. It allows user-implemented microinstructions and addition of hardwired processors. It will perform on-line filtering tasks in the NA 14 experiment at CERN, based on the reconstruction of transverse momentum of photons detected in a lead glass calorimeter. (orig.)

Real-time trajectory optimization on parallel processors

Science.gov (United States)

Psiaki, Mark L.

1993-01-01

A parallel algorithm has been developed for rapidly solving trajectory optimization problems. The goal of the work has been to develop an algorithm that is suitable to do real-time, on-line optimal guidance through repeated solution of a trajectory optimization problem. The algorithm has been developed on an INTEL iPSC/860 message passing parallel processor. It uses a zero-order-hold discretization of a continuous-time problem and solves the resulting nonlinear programming problem using a custom-designed augmented Lagrangian nonlinear programming algorithm. The algorithm achieves parallelism of function, derivative, and search direction calculations through the principle of domain decomposition applied along the time axis. It has been encoded and tested on 3 example problems, the Goddard problem, the acceleration-limited, planar minimum-time to the origin problem, and a National Aerospace Plane minimum-fuel ascent guidance problem. Execution times as fast as 118 sec of wall clock time have been achieved for a 128-stage Goddard problem solved on 32 processors. A 32-stage minimum-time problem has been solved in 151 sec on 32 processors. A 32-stage National Aerospace Plane problem required 2 hours when solved on 32 processors. A speed-up factor of 7.2 has been achieved by using 32-nodes instead of 1-node to solve a 64-stage Goddard problem.

The ATLAS Level-1 Central Trigger Processor (CTP)

CERN Document Server

Spiwoks, Ralf; Ellis, Nick; Farthouat, P; Gällnö, P; Haller, J; Krasznahorkay, A; Maeno, T; Pauly, T; Pessoa-Lima, H; Resurreccion-Arcas, I; Schuler, G; De Seixas, J M; Torga-Teixeira, R; Wengler, T

2005-01-01

The ATLAS Level-1 Central Trigger Processor (CTP) combines information from calorimeter and muon trigger processors and makes the final Level-1 Accept (L1A) decision on the basis of lists of selection criteria (trigger menus). In addition to the event-selection decision, the CTP also provides trigger summary information to the Level-2 trigger and the data acquisition system. It further provides accumulated and bunch-by-bunch scaler data for monitoring of the trigger, detector and beam conditions. The CTP is presented and results are shown from tests with the calorimeter adn muon trigger processors connected to detectors in a particle beam, as well as from stand-alone full-system tests in the laboratory which were used to validate the CTP.

A Processor-Sharing Scheduling Strategy for NFV Nodes

Directory of Open Access Journals (Sweden)

Giuseppe Faraci

2016-01-01

Full Text Available The introduction of the two paradigms SDN and NFV to “softwarize” the current Internet is making management and resource allocation two key challenges in the evolution towards the Future Internet. In this context, this paper proposes Network-Aware Round Robin (NARR, a processor-sharing strategy, to reduce delays in traversing SDN/NFV nodes. The application of NARR alleviates the job of the Orchestrator by automatically working at the intranode level, dynamically assigning the processor slices to the virtual network functions (VNFs according to the state of the queues associated with the output links of the network interface cards (NICs. An extensive simulation set is presented to show the improvements achieved with respect to two more processor-sharing strategies chosen as reference.

An Enhanced Reservation-Based MAC Protocol for IEEE 802.15.4 Networks

Science.gov (United States)

Afonso, José A.; Silva, Helder D.; Macedo, Pedro; Rocha, Luis A.

2011-01-01

The IEEE 802.15.4 Medium Access Control (MAC) protocol is an enabling standard for wireless sensor networks. In order to support applications requiring dedicated bandwidth or bounded delay, it provides a reservation-based scheme named Guaranteed Time Slot (GTS). However, the GTS scheme presents some drawbacks, such as inefficient bandwidth utilization and support to a maximum of only seven devices. This paper presents eLPRT (enhanced Low Power Real Time), a new reservation-based MAC protocol that introduces several performance enhancing features in comparison to the GTS scheme. This MAC protocol builds on top of LPRT (Low Power Real Time) and includes various mechanisms designed to increase data transmission reliability against channel errors, improve bandwidth utilization and increase the number of supported devices. A motion capture system based on inertial and magnetic sensors has been used to validate the protocol. The effectiveness of the performance enhancements introduced by each of the new features is demonstrated through the provision of both simulation and experimental results. PMID:22163826

Processor farming method for multi-scale analysis of masonry structures

Science.gov (United States)

Krejčí, Tomáš; Koudelka, Tomáš

2017-07-01

This paper describes a processor farming method for a coupled heat and moisture transport in masonry using a two-level approach. The motivation for the two-level description comes from difficulties connected with masonry structures, where the size of stone blocks is much larger than the size of mortar layers and very fine finite element mesh has to be used. The two-level approach is suitable for parallel computing because nearly all computations can be performed independently with little synchronization. This approach is called processor farming. The master processor is dealing with the macro-scale level - the structure and the slave processors are dealing with a homogenization procedure on the meso-scale level which is represented by an appropriate representative volume element.

[Improving speech comprehension using a new cochlear implant speech processor].

Science.gov (United States)

Müller-Deile, J; Kortmann, T; Hoppe, U; Hessel, H; Morsnowski, A

2009-06-01

The aim of this multicenter clinical field study was to assess the benefits of the new Freedom 24 sound processor for cochlear implant (CI) users implanted with the Nucleus 24 cochlear implant system. The study included 48 postlingually profoundly deaf experienced CI users who demonstrated speech comprehension performance with their current speech processor on the Oldenburg sentence test (OLSA) in quiet conditions of at least 80% correct scores and who were able to perform adaptive speech threshold testing using the OLSA in noisy conditions. Following baseline measures of speech comprehension performance with their current speech processor, subjects were upgraded to the Freedom 24 speech processor. After a take-home trial period of at least 2 weeks, subject performance was evaluated by measuring the speech reception threshold with the Freiburg multisyllabic word test and speech intelligibility with the Freiburg monosyllabic word test at 50 dB and 70 dB in the sound field. The results demonstrated highly significant benefits for speech comprehension with the new speech processor. Significant benefits for speech comprehension were also demonstrated with the new speech processor when tested in competing background noise.In contrast, use of the Abbreviated Profile of Hearing Aid Benefit (APHAB) did not prove to be a suitably sensitive assessment tool for comparative subjective self-assessment of hearing benefits with each processor. Use of the preprocessing algorithm known as adaptive dynamic range optimization (ADRO) in the Freedom 24 led to additional improvements over the standard upgrade map for speech comprehension in quiet and showed equivalent performance in noise. Through use of the preprocessing beam-forming algorithm BEAM, subjects demonstrated a highly significant improved signal-to-noise ratio for speech comprehension thresholds (i.e., signal-to-noise ratio for 50% speech comprehension scores) when tested with an adaptive procedure using the Oldenburg

Detection of Spoofed MAC Addresses in 802.11 Wireless Networks

Science.gov (United States)

Tao, Kai; Li, Jing; Sampalli, Srinivas

Medium Access Control (MAC) address spoofing is considered as an important first step in a hacker's attempt to launch a variety of attacks on 802.11 wireless networks. Unfortunately, MAC address spoofing is hard to detect. Most current spoofing detection systems mainly use the sequence number (SN) tracking technique, which has drawbacks. Firstly, it may lead to an increase in the number of false positives. Secondly, such techniques cannot be used in systems with wireless cards that do not follow standard 802.11 sequence number patterns. Thirdly, attackers can forge sequence numbers, thereby causing the attacks to go undetected. We present a new architecture called WISE GUARD (Wireless Security Guard) for detection of MAC address spoofing on 802.11 wireless LANs. It integrates three detection techniques - SN tracking, Operating System (OS) fingerprinting & tracking and Received Signal Strength (RSS) fingerprinting & tracking. It also includes the fingerprinting of Access Point (AP) parameters as an extension to the OS fingerprinting for detection of AP address spoofing. We have implemented WISE GUARD on a test bed using off-the-shelf wireless devices and open source drivers. Experimental results show that the new design enhances the detection effectiveness and reduces the number of false positives in comparison with current approaches.

Hardware processor for tracking particles in an alternating-gradient synchrotron

International Nuclear Information System (INIS)

Johnson, M.; Avilez, C.

1987-01-01

We discuss the design and performance of special-purpose processors for tracking particles through an alternating-gradient synchrotron. We present block diagram designs for two hardware processors. Both processors use algorithms based on the 'kick' approximation, i.e., transport matrices are used for dipoles and quadrupoles, and the thin-lens approximation is used for all higher multipoles. The faster processor makes extensive use of memory look-up tables for evaluating functions. For the case of magnets with multipoles up to pole 30 and using one kick per magnet, this processor can track 19 particles through an accelerator at a rate that is only 220 times slower than the time it takes real particles to travel around the machine. For a model consisting of only thin lenses, it is only 150 times slower than real particles. An additional factor of 2 can be obtained with chips now becoming available. The number of magnets in the accelerator is limited only by the amount of memory available for storing magnet parameters. (author) 20 refs., 7 figs., 2 tabs

High-speed special-purpose processor for event selection by number of direct tracks

International Nuclear Information System (INIS)

Kalinnikov, V.A.; Krastev, V.R.; Chudakov, E.A.

1986-01-01

A processor which uses data on events from five detector planes is described. To increase economy and speed in parallel processing, the processor converts the input data to superposition code and recognizes tracks by a generated search mask. The resolving time of the processor is ≤300 nsec. The processor is CAMAC-compatible and uses ECL integrated circuits

Energy Efficient MAC Scheme for Wireless Sensor Networks with High-Dimensional Data Aggregate

Directory of Open Access Journals (Sweden)

Seokhoon Kim

2015-01-01

Full Text Available This paper presents a novel and sustainable medium access control (MAC scheme for wireless sensor network (WSN systems that process high-dimensional aggregated data. Based on a preamble signal and buffer threshold analysis, it maximizes the energy efficiency of the wireless sensor devices which have limited energy resources. The proposed group management MAC (GM-MAC approach not only sets the buffer threshold value of a sensor device to be reciprocal to the preamble signal but also sets a transmittable group value to each sensor device by using the preamble signal of the sink node. The primary difference between the previous and the proposed approach is that existing state-of-the-art schemes use duty cycle and sleep mode to save energy consumption of individual sensor devices, whereas the proposed scheme employs the group management MAC scheme for sensor devices to maximize the overall energy efficiency of the whole WSN systems by minimizing the energy consumption of sensor devices located near the sink node. Performance evaluations show that the proposed scheme outperforms the previous schemes in terms of active time of sensor devices, transmission delay, control overhead, and energy consumption. Therefore, the proposed scheme is suitable for sensor devices in a variety of wireless sensor networking environments with high-dimensional data aggregate.

Mechatronical Aided Concept (MAC) in Intelligent Transport Vehicles Design

OpenAIRE

Pavel Pavlasek

2003-01-01

This article deals with the principles of synergy effect of mechatronical aided concept (MAC) to the design of intelligent transport vehicles products applying CA technologies and virtual reality design methods. Also includes presentation of intelligent railway vehicle development.

MAC mini acceptance test procedure, software Version 3.0

International Nuclear Information System (INIS)

Russell, V.K.

1994-01-01

The K Basins Materials Accounting (MAC) programs had some major improvements made to it to organize the main-tables by Location, Canister, and Material. This ATP describes how the code was to be tested to verify its correctness

Multibus-based parallel processor for simulation

Science.gov (United States)

Ogrady, E. P.; Wang, C.-H.

1983-01-01

A Multibus-based parallel processor simulation system is described. The system is intended to serve as a vehicle for gaining hands-on experience, testing system and application software, and evaluating parallel processor performance during development of a larger system based on the horizontal/vertical-bus interprocessor communication mechanism. The prototype system consists of up to seven Intel iSBC 86/12A single-board computers which serve as processing elements, a multiple transmission controller (MTC) designed to support system operation, and an Intel Model 225 Microcomputer Development System which serves as the user interface and input/output processor. All components are interconnected by a Multibus/IEEE 796 bus. An important characteristic of the system is that it provides a mechanism for a processing element to broadcast data to other selected processing elements. This parallel transfer capability is provided through the design of the MTC and a minor modification to the iSBC 86/12A board. The operation of the MTC, the basic hardware-level operation of the system, and pertinent details about the iSBC 86/12A and the Multibus are described.

Monitoring the performance of off-site processors

International Nuclear Information System (INIS)

Miller, C.C.

1995-01-01

Commercial nuclear power plants have been able to utilize the latest technologies and achieve large volume reduction by obtaining off-site waste processor services. Although the use of such services reduce the burden of waste processing it also reduces the utility's control over the process. Monitoring the performance of off-site processors is important so that the utility is cognizant of the waste disposition for required regulatory reporting. In addition to obtaining data for Reg Guide 1.21 reporting, Performance monitoring is important to determine which vendor and which services to utilize. Off-site processor services were initially offered for the decontamination of metallic waste. Since that time the list of services has expanded to include supercompaction, survey for release, incineration and metal melting. The number of vendors offering off-site services has increased and the services they offer vary. processing rates vary between vendors and have different charge bases. Determining which vendor to use for what service can be complicated and confusing

LFA-1 and Mac-1 integrins bind to the serine/threonine-rich domain of thrombomodulin

Energy Technology Data Exchange (ETDEWEB)

Kawamoto, Eiji [Department of Molecular Pathobiology and Cell Adhesion Biology, Mie University Graduate School of Medicine, 2-174 Edobashi, Tsu, Mie 514-8507 (Japan); Emergency and Critical Care Center, Mie University Hospital, 2-174 Edobashi, Tsu 514-8507 (Japan); Okamoto, Takayuki, E-mail: okamotot@doc.medic.mie-u.ac.jp [Department of Molecular Pathobiology and Cell Adhesion Biology, Mie University Graduate School of Medicine, 2-174 Edobashi, Tsu, Mie 514-8507 (Japan); Takagi, Yoshimi [Department of Molecular Pathobiology and Cell Adhesion Biology, Mie University Graduate School of Medicine, 2-174 Edobashi, Tsu, Mie 514-8507 (Japan); Honda, Goichi [Medical Affairs Department, Asahi Kasei Pharma Corporation, 1-105 Kanda Jinbo-cho, Chiyoda-ku, Tokyo 101-8101 (Japan); Suzuki, Koji [Faculty of Pharmaceutical Science, Suzuka University of Medical Science, 3500-3, Minamitamagaki-cho, Suzuka, Mie 513-8679 (Japan); Imai, Hiroshi [Emergency and Critical Care Center, Mie University Hospital, 2-174 Edobashi, Tsu 514-8507 (Japan); Shimaoka, Motomu, E-mail: shimaoka@doc.medic.mie-u.ac.jp [Department of Molecular Pathobiology and Cell Adhesion Biology, Mie University Graduate School of Medicine, 2-174 Edobashi, Tsu, Mie 514-8507 (Japan)

2016-05-13

LFA-1 (αLβ2) and Mac-1 (αMβ2) integrins regulate leukocyte trafficking in health and disease by binding primarily to IgSF ligand ICAM-1 and ICAM-2 on endothelial cells. Here we have shown that the anti-coagulant molecule thrombomodulin (TM), found on the surface of endothelial cells, functions as a potentially new ligand for leukocyte integrins. We generated a recombinant extracellular domain of human TM and Fc fusion protein (TM-domains 123-Fc), and showed that pheripheral blood mononuclear cells (PBMCs) bind to TM-domains 123-Fc dependent upon integrin activation. We then demonstrated that αL integrin-blocking mAb, αM integrin-blocking mAb, and β2 integrin-blocking mAb inhibited the binding of PBMCs to TM-domains 123-Fc. Furthermore, we show that the serine/threonine-rich domain (domain 3) of TM is required for the interaction with the LFA-1 (αLβ2) and Mac-1 (αMβ2) integrins to occur on PBMCs. These results demonstrate that the LFA-1 and Mac-1 integrins on leukocytes bind to TM, thereby establishing the molecular and structural basis underlying LFA-1 and Mac-1 integrin interaction with TM on endothelial cells. In fact, integrin-TM interactions might be involved in the dynamic regulation of leukocyte adhesion with endothelial cells. - Highlights: • LFA-1 and Mac-1 integrins bind to the anti-coagulant molecule thrombomodulin. • The serine/threonine-rich domain of thrombomodulin is essential to interact with the LFA-1 and Mac-1 integrins on PBMCs. • Integrin-TM interactions might be involved in the dynamic regulation of leukocyte adhesion with endothelial cells.

Digital Signal Processor System for AC Power Drivers

Directory of Open Access Journals (Sweden)

Ovidiu Neamtu

2009-10-01

Full Text Available DSP (Digital Signal Processor is the bestsolution for motor control systems to make possible thedevelopment of advanced motor drive systems. The motorcontrol processor calculates the required motor windingvoltage magnitude and frequency to operate the motor atthe desired speed. A PWM (Pulse Width Modulationcircuit controls the on and off duty cycle of the powerinverter switches to vary the magnitude of the motorvoltages.

Annie Marion MacLean: “the mother of contemporary etnography” and pioneer in sociology distance learning

Directory of Open Access Journals (Sweden)

Silvia García Dauder

2008-05-01

Full Text Available The article introduces Anne Marion MacLean into the United States' scientific sociology at its very origins (1892, when the Department of Sociology of the Chicago University was created. It also puts MacLean in a network called "Women's School of Chicago", and the forgotten contributions of these social sciences' pioneers, submitted to the American Journal of Sociology, are analyzed. Two MacLean's key contributions are highlighted: the correspondence courses in teaching sociology and her research by means of participant observation in workplaces focusing on women's work.

Early experience with the cochlear ESPrit ear-level speech processor in children.

Science.gov (United States)

Totten, C; Cope, Y; McCormick, B

2000-12-01

The ESPrit ear-level speech processor has recently become available in the United Kingdom for use with the Nucleus CI24M multichannel cochlear implant. We report on the use of this ear-level processor with 6 children, ages 8 to 15 years. In this study, all patients were initially fitted with the SPrint body-worn processor, this being a prerequisite for programming the ESPrit. Five of the children were fitted successfully with the ESPrit and are using their devices consistently. The results show that patient experience with the ESPrit has been favorable, although there have been some device and programming difficulties. Aided threshold measures show that the ESPrit processor performs at least as well as the SPrint processor, with a trend toward improved aided thresholds for the ESPrit processor compared with the SPrint processor. Further study of the functional benefit of both of these devices may confirm these potential gains. The ESPrit device currently has a disadvantage for children in that it does not support FM radio hearing aid use. Finally, caution is advised in the fitting of the ESPrit in very young children or inexperienced listeners, because of difficulties in monitoring device function.

Survey of cochlear implant user satisfaction with the Neptune™ waterproof sound processor

Directory of Open Access Journals (Sweden)

Jeroen J. Briaire

2016-04-01

Full Text Available A multi-center self-assessment survey was conducted to evaluate patient satisfaction with the Advanced Bionics Neptune™ waterproof sound processor used with the AquaMic™ totally submersible microphone. Subjective satisfaction with the different Neptune™ wearing options, comfort, ease of use, sound quality and use of the processor in a range of active and water related situations were assessed for 23 adults and 73 children, using an online and paper based questionnaire. Upgraded subjects compared their previous processor to the Neptune™. The Neptune™ was most popular for use in general sports and in the pool. Subjects were satisfied with the sound quality of the sound processor outside and under water and following submersion. Seventyeight percent of subjects rated waterproofness as being very useful and 83% of the newly implanted subjects selected waterproofness as one of the reasons why they chose the Neptune™ processor. Providing a waterproof sound processor is considered by cochlear implant recipients to be useful and important and is a factor in their processor choice. Subjects reported that they were satisfied with the Neptune™ sound quality, ease of use and different wearing options.

A word processor optimized for preparing journal articles and student papers.

Science.gov (United States)

Wolach, A H; McHale, M A

2001-11-01

A new Windows-based word processor for preparing journal articles and student papers is described. In addition to standard features found in word processors, the present word processor provides specific help in preparing manuscripts. Clicking on "Reference Help (APA Form)" in the "File" menu provides a detailed help system for entering the references in a journal article. Clicking on "Examples and Explanations of APA Form" provides a help system with examples of the various sections of a review article, journal article that has one experiment, or journal article that has two or more experiments. The word processor can automatically place the manuscript page header and page number at the top of each page using the form required by APA and Psychonomic Society journals. The "APA Form" submenu of the "Help" menu provides detailed information about how the word processor is optimized for preparing articles and papers.

78 FR 5320 - Federal Agricultural Mortgage Corporation Funding and Fiscal Affairs; Farmer Mac Capital Planning

Science.gov (United States)

2013-01-25

... the business planning period a required discussion of how factors might impact Farmer Mac's current... discussion of any expected changes to Farmer Mac's business plan that are likely to have a material impact on... conditions that cause increases in delinquency rates caused by any variety of factors (e.g., widespread...

Extended performance electric propulsion power processor design study. Volume 2: Technical summary

Science.gov (United States)

Biess, J. J.; Inouye, L. Y.; Schoenfeld, A. D.

1977-01-01

Electric propulsion power processor technology has processed during the past decade to the point that it is considered ready for application. Several power processor design concepts were evaluated and compared. Emphasis was placed on a 30 cm ion thruster power processor with a beam power rating supply of 2.2KW to 10KW for the main propulsion power stage. Extension in power processor performance were defined and were designed in sufficient detail to determine efficiency, component weight, part count, reliability and thermal control. A detail design was performed on a microprocessor as the thyristor power processor controller. A reliability analysis was performed to evaluate the effect of the control electronics redesign. Preliminary electrical design, mechanical design and thermal analysis were performed on a 6KW power transformer for the beam supply. Bi-Mod mechanical, structural and thermal control configurations were evaluated for the power processor and preliminary estimates of mechanical weight were determined.

First Results of an “Artificial Retina” Processor Prototype

International Nuclear Information System (INIS)

Cenci, Riccardo; Bedeschi, Franco; Marino, Pietro; Morello, Michael J.; Ninci, Daniele; Piucci, Alessio; Punzi, Giovanni; Ristori, Luciano; Spinella, Franco; Stracka, Simone; Tonelli, Diego; Walsh, John

2016-01-01

We report on the performance of a specialized processor capable of reconstructing charged particle tracks in a realistic LHC silicon tracker detector, at the same speed of the readout and with sub-microsecond latency. The processor is based on an innovative pattern-recognition algorithm, called “artificial retina algorithm”, inspired from the vision system of mammals. A prototype of the processor has been designed, simulated, and implemented on Tel62 boards equipped with high-bandwidth Altera Stratix III FPGA devices. The prototype is the first step towards a real-time track reconstruction device aimed at processing complex events of high-luminosity LHC experiments at 40 MHz crossing rate

Mechatronical Aided Concept (MAC in Intelligent Transport Vehicles Design

Directory of Open Access Journals (Sweden)

Pavel Pavlasek

2003-01-01

Full Text Available This article deals with the principles of synergy effect of mechatronical aided concept (MAC to the design of intelligent transport vehicles products applying CA technologies and virtual reality design methods. Also includes presentation of intelligent railway vehicle development.

Make your own video with QuickTime on the Mac

CERN Document Server

CERN. Geneva

2016-01-01

A step-by-step video tutorial on how to do a screen recording using QuickTime player on a Mac. QuickTime is a multimedia framework, which is natively installed on most Mac computers. This tutorial explains how to do a screen recording using Quicktime and how to export the video. A pdf document on the subject is available as material from the indico event page. Tell us what you think via e-learning.support at cern.ch More tutorials in the e-learning collection of the CERN Document Server (CDS) http://cds.cern.ch/collection/E-learning%20modules?ln=en All info about the CERN rapid e-learning project is linked from http://twiki.cern.ch/ELearning  

Computing effective properties of random heterogeneous materials on heterogeneous parallel processors

Science.gov (United States)

Leidi, Tiziano; Scocchi, Giulio; Grossi, Loris; Pusterla, Simone; D'Angelo, Claudio; Thiran, Jean-Philippe; Ortona, Alberto

2012-11-01

In recent decades, finite element (FE) techniques have been extensively used for predicting effective properties of random heterogeneous materials. In the case of very complex microstructures, the choice of numerical methods for the solution of this problem can offer some advantages over classical analytical approaches, and it allows the use of digital images obtained from real material samples (e.g., using computed tomography). On the other hand, having a large number of elements is often necessary for properly describing complex microstructures, ultimately leading to extremely time-consuming computations and high memory requirements. With the final objective of reducing these limitations, we improved an existing freely available FE code for the computation of effective conductivity (electrical and thermal) of microstructure digital models. To allow execution on hardware combining multi-core CPUs and a GPU, we first translated the original algorithm from Fortran to C, and we subdivided it into software components. Then, we enhanced the C version of the algorithm for parallel processing with heterogeneous processors. With the goal of maximizing the obtained performances and limiting resource consumption, we utilized a software architecture based on stream processing, event-driven scheduling, and dynamic load balancing. The parallel processing version of the algorithm has been validated using a simple microstructure consisting of a single sphere located at the centre of a cubic box, yielding consistent results. Finally, the code was used for the calculation of the effective thermal conductivity of a digital model of a real sample (a ceramic foam obtained using X-ray computed tomography). On a computer equipped with dual hexa-core Intel Xeon X5670 processors and an NVIDIA Tesla C2050, the parallel application version features near to linear speed-up progression when using only the CPU cores. It executes more than 20 times faster when additionally using the GPU.

The MacGyver effect: alive and well in health services research?

Directory of Open Access Journals (Sweden)

Moriarty Helen J

2011-09-01

Full Text Available Abstract Background In a manner similar to the television action hero MacGyver, health services researchers need to respond to the pressure of unpredictable demands and constrained time frames. The results are often both innovative and functional, with the creation of outputs that could not have been anticipated in the initial planning and design of the research. Discussion In the conduct of health services research many challenges to robust research processes are generated as a result of the interface between academic research, health policy and implementation agendas. Within a complex and rapidly evolving environment the task of the health services researcher is, therefore, to juggle sometimes contradictory pressures to produce valid results. Summary This paper identifies the MacGyver-type dilemmas which arise in health services research, wherein innovation may be called for, to maintain the intended scientific method and rigour. These 'MacGyver drivers' are framed as opposing issues from the perspective of both academic and public policy communities. The ideas expressed in this paper are illustrated by four examples from research projects positioned at the interface between public policy strategy and academia.

La République de Macédoine dans la presse française

Directory of Open Access Journals (Sweden)

Toni Glamcevski

2011-12-01

Full Text Available Les médias français s'intéressent à la République de Macédoine quand la Grèce refuse de la reconnaître, mais souvent adoptent des positions progrecques.Malgré son nom illustre, la Macédoine est un pays très mal connu en France. Jusqu’en 1991, très peu de gens connaissaient l’existence de la République de Macédoine. Les médias français commencent à s’intéresser au pays lors du blocus de sa reconnaissance par la Grèce (1991. De nombreux articles, commentaires, interviews tentent alors d’éclaircir la situation du pays, mais il y a eu très peu d’interventions de la part des intellectuels et « experts ». Cette communication montre les grandes lignes des articles parus en France dans la période entre 1991 et 2009. Mais la presse française, en assimilant le peuple macédonien au terme « Slaves », voulait sans doute pendant le conflit du Kosovo et le conflit de 2001, éclaircir la situation, mais l’utilisation de ce terme est aussi comprise comme une tentative de négation de l’existence du peuple macédonien. Le nom de la République de Macédoine bloque le pays dans son passé, c'est aux Macédoniens de définir leur identité, pas à leurs voisins ni aux membres de l'UE.In spite of its famous name, Macedonia is not well-known in France. Till 1991, very few persons even knew the existence of a Republic of Macedonia. The French Medias began to get interested in it with the Greek blocus of Macedonia. A lot of papers, comments, interviews tried then to explain the main lines of the country's situation but with a very light participation of experts or intellectuals. One can find in this paper the main lines of the French press on Macedonia from spring 1999 to September 2001. The French papers, as a whole, assimilating the “Macedonian” people to “Slaves”, perhaps to make a clear difference when explaining the situation during the Kossovo crisis or later, during the crisis inside Macedonia, contributed

Using The Economist’s Big Mac Index for Instruction

OpenAIRE

Stegelin, Forrest E.

2012-01-01

The Economist first launched the concept of the Big Mac Index in 1986 as a guide to whether currencies were at their correct exchange rate; it is not intended to be a precise predictor of currency movements around the globe, but simply a way to make exchange-rate theory and discussions a bit more digestible. First used as a humorous illustration, the term “burgernomics†was coined and the Big Mac index became an annual occurrence. It is based upon one of the oldest concepts in internationa...

Nonlinear Wave Simulation on the Xeon Phi Knights Landing Processor

Science.gov (United States)

Hristov, Ivan; Goranov, Goran; Hristova, Radoslava

2018-02-01

We consider an interesting from computational point of view standing wave simulation by solving coupled 2D perturbed Sine-Gordon equations. We make an OpenMP realization which explores both thread and SIMD levels of parallelism. We test the OpenMP program on two different energy equivalent Intel architectures: 2× Xeon E5-2695 v2 processors, (code-named "Ivy Bridge-EP") in the Hybrilit cluster, and Xeon Phi 7250 processor (code-named "Knights Landing" (KNL). The results show 2 times better performance on KNL processor.

Dynamic Channel Slot Allocation Scheme and Performance Analysis of Cyclic Quorum Multichannel MAC Protocol

Directory of Open Access Journals (Sweden)

Xing Hu

2017-01-01

Full Text Available In high diversity node situation, multichannel MAC protocol can improve the frequency efficiency, owing to fewer collisions compared with single-channel MAC protocol. And the performance of cyclic quorum-based multichannel (CQM MAC protocol is outstanding. Based on cyclic quorum system and channel slot allocation, it can avoid the bottleneck that others suffered from and can be easily realized with only one transceiver. To obtain the accurate performance of CQM MAC protocol, a Markov chain model, which combines the channel-hopping strategy of CQM protocol and IEEE 802.11 distributed coordination function (DCF, is proposed. The results of numerical analysis show that the optimal performance of CQM protocol can be obtained in saturation bound situation. And then we obtain the saturation bound of CQM system by bird swarm algorithm. In addition, to improve the performance of CQM protocol in unsaturation situation, a dynamic channel slot allocation of CQM (DCQM protocol is proposed, based on wavelet neural network. Finally, the performance of CQM protocol and DCQM protocol is simulated by Qualnet platform. And the simulation results show that the analytic and simulation results match very well; the DCQM performs better in unsaturation situation.

M7--a high speed digital processor for second level trigger selections

International Nuclear Information System (INIS)

Droege, T.F.; Gaines, I.; Turner, K.J.

1978-01-01

A digital processor is described which reconstructs mass and momentum as a second-level trigger selection. The processor is a five-address, microprogramed, pipelined, ECL machine with simultaneous memory access to four operands which load two parallel multipliers and an ALU. Source data modules are extensions of the processor

God, Sport Philosophy, Kinesiology: A MacIntyrean Examination

Science.gov (United States)

Twietmeyer, Gregg

2015-01-01

Sport philosophy is in crisis. This subdiscipline of kinesiology garners little to no respect and few tenure track lines in kinesiology departments. Why is this the case? Why isn't philosophy held in greater esteem? Is it possible that philosopher Alasdair MacIntyre's (2009) diagnosis found in "God, Philosophy, Universities" could…

Potential of Wake-Up Radio-Based MAC Protocols for Implantable Body Sensor Networks (IBSN—A Survey

Directory of Open Access Journals (Sweden)

Vignesh Raja Karuppiah Ramachandran

2016-11-01

Full Text Available With the advent of nano-technology, medical sensors and devices are becoming highly miniaturized. Consequently, the number of sensors and medical devices being implanted to accurately monitor and diagnose a disease is increasing. By measuring the symptoms and controlling a medical device as close as possible to the source, these implantable devices are able to save lives. A wireless link between medical sensors and implantable medical devices is essential in the case of closed-loop medical devices, in which symptoms of the diseases are monitored by sensors that are not placed in close proximity of the therapeutic device. Medium Access Control (MAC is crucial to make it possible for several medical devices to communicate using a shared wireless medium in such a way that minimum delay, maximum throughput, and increased network life-time are guaranteed. To guarantee this Quality of Service (QoS, the MAC protocols control the main sources of limited resource wastage, namely the idle-listening, packet collisions, over-hearing, and packet loss. Traditional MAC protocols designed for body sensor networks are not directly applicable to Implantable Body Sensor Networks (IBSN because of the dynamic nature of the radio channel within the human body and the strict QoS requirements of IBSN applications. Although numerous MAC protocols are available in the literature, the majority of them are designed for Body Sensor Network (BSN and Wireless Sensor Network (WSN. To the best of our knowledge, there is so far no research paper that explores the impact of these MAC protocols specifically for IBSN. MAC protocols designed for implantable devices are still in their infancy and one of their most challenging objectives is to be ultra-low-power. One of the technological solutions to achieve this objective so is to integrate the concept of Wake-up radio (WuR into the MAC design. In this survey, we present a taxonomy of MAC protocols based on their use of Wu

Mario Sironi nas chamadas Coleções Matarazzo do MAC USP

Directory of Open Access Journals (Sweden)

Andrea Ronqui

Full Text Available O acervo de arte moderna italiana do MAC-USP pode ser considerado a maior coleção desse gênero fora da Itália e vem sendo objeto de estudo nos últimos anos. Das 71 obras italianas, seis são de autoria de Mario Sironi. Este artigo propõe uma apresentação do percurso do artista, com breve análise de sua evolução pictórica, a partir dos estudos já existentes, a fim de situar as obras sironianas do acervo do MAC no contexto de sua produção.

Heroic Measures for an American Hero: Attempting to Save the Life of General Douglas MacArthur.

Science.gov (United States)

Pappas, Theodore N

2017-12-01

General Douglas MacArthur was a towering public figure on an international stage for the first half of the 20th century. He was healthy throughout his life but developed a series of medical problems when he entered his 80s. This article reviews the General's medical care during two separate life-threatening medical crises that required surgical intervention. The first episode occurred in 1960 when MacArthur presented with renal failure due to an obstructed prostate. Four years later after his 84th birthday, MacArthur developed bile duct obstruction from common duct stones. He underwent an uncomplicated cholecystectomy and common duct exploration but developed variceal bleeding requiring an emergent splenorenal shunt. His terminal event was precipitated by strangulated bowel in long-ignored very large inguinal hernias. MacArthur died, despite state-of-the-art surgical intervention, due to renal failure and hepatic coma.

Are Rural Costs of Living Lower? Evidence from a Big Mac Index Approach

OpenAIRE

Scott Loveridge; Dusan Paredes

2015-01-01

Rural leaders can point to low housing costs as a reason that their area should be competitive for business attraction. To what extent do rural housing costs offset transportation and other locational disadvantages in costs structures? The US lacks information to systematically answer the question. We adapt a strategy employed by The Economist in exploring purchasing power parity: the Big Mac Index. We gather information on Big Mac prices with a random sample of restaurants across the contigu...

Discussion paper for a highly parallel array processor-based machine

International Nuclear Information System (INIS)

Hagstrom, R.; Bolotin, G.; Dawson, J.

1984-01-01

The architectural plant for a quickly realizable implementation of a highly parallel special-purpose computer system with peak performance in the range of 6 billion floating point operations per second is discussed. The architecture is suitable to Lattice Gauge theoretical computations of fundamental physics interest and may be applicable to a range of other problems which deal with numerically intensive computational problems. The plan is quickly realizable because it employs a maximum of commercially available hardware subsystems and because the architecture is software-transparent to the individual processors, allowing straightforward re-use of whatever commercially available operating-systems and support software that is suitable to run on the commercially-produced processors. A tiny prototype instrument, designed along this architecture has already operated. A few elementary examples of programs which can run efficiently are presented. The large machine which the authors would propose to build would be based upon a highly competent array-processor, the ST-100 Array Processor, and specific design possibilities are discussed. The first step toward realizing this plan practically is to install a single ST-100 to allow algorithm development to proceed while a demonstration unit is built using two of the ST-100 Array Processors

Evaluation of the MacDonald scabbler for highway use.

Science.gov (United States)

1975-01-01

The MacDonald Scabbler is a small, hand held machine suitable for use in cleaning and roughening concrete surfaces, It weighs 308 pounds (140 kg), has 11 cutting heads, and, as a power source, requires a compressor capable of delivering 365 cubic foo...

MAC mini acceptance test procedures, software Version 3.3

International Nuclear Information System (INIS)

Russell, V.K.

1994-01-01

The K Basins Materials Accounting (MAC) programs had some improvements made to it to to change slightly the access authorized users had to the modification of critical data. This ATP describes how the code was to be tested to verify its correctness

SSC 254 Screen-Based Word Processors: Production Tests. The Lanier Word Processor.

Science.gov (United States)

Moyer, Ruth A.

Designed for use in Trident Technical College's Secretarial Lab, this series of 12 production tests focuses on the use of the Lanier Word Processor for a variety of tasks. In tests 1 and 2, students are required to type and print out letters. Tests 3 through 8 require students to reformat a text; make corrections on a letter; divide and combine…

Performance of Artificial Intelligence Workloads on the Intel Core 2 Duo Series Desktop Processors

OpenAIRE

Abdul Kareem PARCHUR; Kuppangari Krishna RAO; Fazal NOORBASHA; Ram Asaray SINGH

2010-01-01

As the processor architecture becomes more advanced, Intel introduced its Intel Core 2 Duo series processors. Performance impact on Intel Core 2 Duo processors are analyzed using SPEC CPU INT 2006 performance numbers. This paper studied the behavior of Artificial Intelligence (AI) benchmarks on Intel Core 2 Duo series processors. Moreover, we estimated the task completion time (TCT) @1 GHz, @2 GHz and @3 GHz Intel Core 2 Duo series processors frequency. Our results show the performance scalab...

The Starburst, a J-11 based front-end processor system

International Nuclear Information System (INIS)

Worm, F.H.; Klotz, D.V.

1984-01-01

This paper describes a coherent solution to the demand for ever-increasing performance in CAMAC-based data acquisition and pre-processing systems. It outlines the development of this modular high density system, covering the design decision and trade-offs from the hardware and software standpoints. Current applications are briefly described and the direction of future developments is indicated. The keystone of the system is a single-width module based on a DEC J-11 processor. It offers all the functions of an Auxiliary Crate Controller with programmable LAM-grader; at the same time functioning as an autonomous computer with a high-speed 64K word dual-port memory, console and Q22-bus peripheral interface. This structure supports extension on both, the CAMAC side and the Q-bus side; and the hardware design choices have been made with a view to allowing use of a large range of popular software. The principal module is supported on the CAMAC side by dedicated semi-autonomous memories, and on the computer side by portable winchester and floppy disk storage subsystems, while offering expansion capabilities through the Q22-bus port

Nonlinear Wave Simulation on the Xeon Phi Knights Landing Processor

Directory of Open Access Journals (Sweden)

Hristov Ivan

2018-01-01

Full Text Available We consider an interesting from computational point of view standing wave simulation by solving coupled 2D perturbed Sine-Gordon equations. We make an OpenMP realization which explores both thread and SIMD levels of parallelism. We test the OpenMP program on two different energy equivalent Intel architectures: 2× Xeon E5-2695 v2 processors, (code-named “Ivy Bridge-EP” in the Hybrilit cluster, and Xeon Phi 7250 processor (code-named “Knights Landing” (KNL. The results show 2 times better performance on KNL processor.

HTGR core seismic analysis using an array processor

International Nuclear Information System (INIS)

Shatoff, H.; Charman, C.M.

1983-01-01

A Floating Point Systems array processor performs nonlinear dynamic analysis of the high-temperature gas-cooled reactor (HTGR) core with significant time and cost savings. The graphite HTGR core consists of approximately 8000 blocks of various shapes which are subject to motion and impact during a seismic event. Two-dimensional computer programs (CRUNCH2D, MCOCO) can perform explicit step-by-step dynamic analyses of up to 600 blocks for time-history motions. However, use of two-dimensional codes was limited by the large cost and run times required. Three-dimensional analysis of the entire core, or even a large part of it, had been considered totally impractical. Because of the needs of the HTGR core seismic program, a Floating Point Systems array processor was used to enhance computer performance of the two-dimensional core seismic computer programs, MCOCO and CRUNCH2D. This effort began by converting the computational algorithms used in the codes to a form which takes maximum advantage of the parallel and pipeline processors offered by the architecture of the Floating Point Systems array processor. The subsequent conversion of the vectorized FORTRAN coding to the array processor required a significant programming effort to make the system work on the General Atomic (GA) UNIVAC 1100/82 host. These efforts were quite rewarding, however, since the cost of running the codes has been reduced approximately 50-fold and the time threefold. The core seismic analysis with large two-dimensional models has now become routine and extension to three-dimensional analysis is feasible. These codes simulate the one-fifth-scale full-array HTGR core model. This paper compares the analysis with the test results for sine-sweep motion

A network architecture for precision formation flying using the IEEE 802.11 MAC Protocol

Science.gov (United States)

Clare, Loren P.; Gao, Jay L.; Jennings, Esther H.; Okino, Clayton

2005-01-01

Precision Formation Flying missions involve the tracking and maintenance of spacecraft in a desired geometric formation. The strong coupling of spacecraft in formation flying control requires inter-spacecraft communication to exchange information. In this paper, we present a network architecture that supports PFF control, from the initial random deployment phase to the final formation. We show that a suitable MAC layer for the application protocol is IEEE's 802.11 MAC protocol. IEEE 802.11 MAC has two modes of operations: DCF and PCF. We show that DCF is suitable for the initial deployment phase while switching to PCF when the spacecraft are in formation improves jitter and throughput. We also consider the effect of routing on protocol performance and suggest when it is profitable to turn off route discovery to achieve better network performance.

Low-Power Embedded DSP Core for Communication Systems

Science.gov (United States)

Tsao, Ya-Lan; Chen, Wei-Hao; Tan, Ming Hsuan; Lin, Maw-Ching; Jou, Shyh-Jye

2003-12-01

This paper proposes a parameterized digital signal processor (DSP) core for an embedded digital signal processing system designed to achieve demodulation/synchronization with better performance and flexibility. The features of this DSP core include parameterized data path, dual MAC unit, subword MAC, and optional function-specific blocks for accelerating communication system modulation operations. This DSP core also has a low-power structure, which includes the gray-code addressing mode, pipeline sharing, and advanced hardware looping. Users can select the parameters and special functional blocks based on the character of their applications and then generating a DSP core. The DSP core has been implemented via a cell-based design method using a synthesizable Verilog code with TSMC 0.35[InlineEquation not available: see fulltext.]m SPQM and 0.25[InlineEquation not available: see fulltext.]m 1P5M library. The equivalent gate count of the core area without memory is approximately 50 k. Moreover, the maximum operating frequency of a[InlineEquation not available: see fulltext.] version is 100 MHz (0.35[InlineEquation not available: see fulltext.]m) and 140 MHz (0.25[InlineEquation not available: see fulltext.]m).

A single chip pulse processor for nuclear spectroscopy

International Nuclear Information System (INIS)

Hilsenrath, F.; Bakke, J.C.; Voss, H.D.

1985-01-01

A high performance digital pulse processor, integrated into a single gate array microcircuit, has been developed for spaceflight applications. The new approach takes advantage of the latest CMOS high speed A/D flash converters and low-power gated logic arrays. The pulse processor measures pulse height, pulse area and the required timing information (e.g. multi detector coincidence and pulse pile-up detection). The pulse processor features high throughput rate (e.g. 0.5 Mhz for 2 usec gausssian pulses) and improved differential linearity (e.g. + or - 0.2 LSB for a + or - 1 LSB A/D). Because of the parallel digital architecture of the device, the interface is microprocessor bus compatible. A satellite flight application of this module is presented for use in the X-ray imager and high energy particle spectrometers of the PEM experiment on the Upper Atmospheric Research Satellite

The hardware track finder processor in CMS at CERN

CERN Document Server

Kluge, A

1997-01-01

The work covers the design of the Track Finder Processor in the high energy experiment CMS (Compact Muon Solenoid, planned for 2005) at CERN/Geneva. The task of this processor is to identify muons and measure their transverse momentum. The track finder processor makes it possible to determine the physical relevance of each high energetic collision and to forward only interesting data to the data an alysis units. Data of more than two hundred thousand detector cells are used to determine the location of muons and measure their transverse momentum. Each 25 ns a new data set is generated. Measurem ent of location and transverse momentum of the muons can be terminated within 350 ns by using an ASIC (Application Specific Integrated Circuit). A pipeline architecture processes new data sets with th e required data rate of 40 MHz to ensure dead time free operation. In the framework of this study specifications and the overall concept of the track finder processor were worked out in detail. Simul ations were performed...

TMAC: Timestamp-Ordered MAC Protocol for Wireless Mesh Networks

KAUST Repository

Nawab, Faisal

2011-05-01

Wireless Mesh Networks (WMNs) have emerged to meet a need for a self-organized and self-configured multi-hop wireless network infrastructure. Low cost infrastructure and ease of deployment have made WMNs an attractive technology for last mile access. However, 802.11 based WMNs are subject to serious fairness issues. With backlogged TCP traffic, nodes which are two or more hops away from the gateway are subject to starvation, while the one-hop away node saturates the channel with its own local traffic. We study the interactions of TCP and IEEE 802.11 MAC in WMNs to aid us in understanding and overcoming the unfairness problem. We propose a Markov chain to capture the behavior of TCP sessions, particularly the impact on network throughput performance due to the effect of queue utilization and packet relaying. A closed form solution is derived to numerically derive the throughput. Based on the developed model, we propose a distributed MAC protocol called Timestamp-ordered MAC (TMAC), aiming to alleviate the unfairness problem in WMNs via a manipulative per-node scheduling mechanism which takes advantage of the age of each packet as a priority metric. Simulation is conducted to validate our model and to illustrate the fairness characteristics of TMAC. Our results show that TMAC achieves excellent resource allocation fairness while maintaining above 90% of maximum link capacity in parking lot and large grid topologies. Our work illuminates the factors affecting TCP fairness in WMNs. Our theoretical and empirical findings can be used in future research to develop more fairness-aware protocols for WMNs.

The Big Mac Index: A Shortcut To Inflation And Exchange Rate Dynamics? Price Tracking And Predictive Properties

OpenAIRE

Luis San Vicente Portes; Vidya Atal

2014-01-01

The Economist magazine has been publishing the Big Mac Index using it as a rule of thumb to determine the over- or under-valuation of international currencies based on the theory of Purchasing Power Parity since 1986. According to the theory, using the Big Mac as a tradable single-good basket, the Dollar-value of the hamburger should be equalized around the world due to arbitrage. The popularity and following of the Big Mac Index led the authors to the following two questions: 1) How effectiv...

La question macédonienne pendant la guerre civile grecque

Directory of Open Access Journals (Sweden)

Christina Alexopoulos

2012-05-01

Full Text Available Le traitement de la question macédonienne durant la guerre civile grecque interroge la mémoire du conflit entre oubli, déni et instrumentalisation politique. Le Parti communiste grec essaya de concilier la politique nationale avec la géopolitique internationale, en tenant compte des revendications macédoniennes et de la stratégie de Tito. L’engagement des Macédoniens slavophones de Grèce à la résistance communiste et à la guerre civile exprima une lutte identitaire et sociale. La propagande gouvernementale transforma la question macédonienne en « preuve suprême » d’une   trahison nationale » des communistes devant « le danger slave » et occulta le collaborationnisme dont les milices nationalistes se rendirent coupables. Malgré la démocratisation du pays et le travail de l’historiographie contemporaine, le traitement actuel de la question dans les discours politiques et journalistiques montre la vivacité du nationalisme d’antan au sein de la société civile.Treating the Macedonian question during Greek civil war means dealing with the memory of the conflict, somewhere between oblivion, denial and political instrumentation. The Greek Communist Party tried to reconcile national politics with international geopolitics in its consideration of the Macedonian demands and Tito’s strategy. On the other hand the engagement of slavophone Macedonians of Greece, in the communist resistance and the civil war, expressed a social struggle and an identity conflict. The governmental propaganda transformed the Macedonian question into the “ultimate proof” of the communists committing “national treason” with regard to the “Slavic danger” and did its best to hide the collaborationism, of which, the nationalist militia was guilty of. Despite the return of Democracy in the country, the way the question is actually being treated in politics and by the media is revelatory of the nationalism reigning in the past and still

UA1 upgrade first-level calorimeter trigger processor

International Nuclear Information System (INIS)

Bains, N.; Charlton, D.; Ellis, N.; Garvey, J.; Gregory, J.; Jimack, M.P.; Jovanovic, P.; Kenyon, I.R.; Baird, S.A.; Campbell, D.; Cawthraw, M.; Coughlan, J.; Flynn, P.; Galagedera, S.; Grayer, G.; Halsall, R.; Shah, T.P.; Stephens, R.; Eisenhandler, E.; Fensome, I.; Landon, M.

1989-01-01

A new first-level trigger processor has been built for the UA1 experiment on the Cern SppS Collider. The processor exploits the fine granularity of the new UA1 uranium-TMP calorimeter to improve the selectivity of the trigger. The new electron trigger has improved hadron jet rejection, achieved by requiring low energy deposition around the electromagnetic cluster. A missing transverse energy trigger and a total energy trigger have also been implemented. (orig.)

Application of the Computer Capacity to the Analysis of Processors Evolution

OpenAIRE

Ryabko, Boris; Rakitskiy, Anton

2017-01-01

The notion of computer capacity was proposed in 2012, and this quantity has been estimated for computers of different kinds. In this paper we show that, when designing new processors, the manufacturers change the parameters that affect the computer capacity. This allows us to predict the values of parameters of future processors. As the main example we use Intel processors, due to the accessibility of detailed description of all their technical characteristics.

Optimal processor for malfunction detection in operating nuclear reactor

International Nuclear Information System (INIS)

Ciftcioglu, O.

1990-01-01

An optimal processor for diagnosing operational transients in a nuclear reactor is described. Basic design of the processor involves real-time processing of noise signal obtained from a particular in core sensor and the optimality is based on minimum alarm failure in contrast to minimum false alarm criterion from the safe and reliable plant operation viewpoint

An updated program-controlled analog processor, model AP-006, for semiconductor detector spectrometers

International Nuclear Information System (INIS)

Shkola, N.F.; Shevchenko, Yu.A.

1989-01-01

An analog processor, model AP-006, is reported. The processor is a development of a series of spectrometric units based on a shaper of the type 'DL dif +TVS+gated ideal integrator'. Structural and circuits design features are described. The results of testing the processor in a setup with a Si(Li) detecting unit over an input count-rate range of up to 5x10 5 cps are presented. Processor applications are illustrated. (orig.)

Intelligent trigger processor for the crystal box

International Nuclear Information System (INIS)

Sanders, G.H.; Butler, H.S.; Cooper, M.D.

1981-01-01

A large solid angle modular NaI(Tl) detector with 432 phototubes and 88 trigger scintillators is being used to search simultaneously for three lepton flavor changing decays of muon. A beam of up to 10 6 muons stopping per second with a 6% duty factor would yield up to 1000 triggers per second from random triple coincidences. A reduction of the trigger rate to 10 Hz is required from a hardwired primary trigger processor described in this paper. Further reduction to < 1 Hz is achieved by a microprocessor based secondary trigger processor. The primary trigger hardware imposes voter coincidence logic, stringent timing requirements, and a non-adjacency requirement in the trigger scintillators defined by hardwired circuits. Sophisticated geometric requirements are imposed by a PROM-based matrix logic, and energy and vector-momentum cuts are imposed by a hardwired processor using LSI flash ADC's and digital arithmetic loci. The secondary trigger employs four satellite microprocessors to do a sparse data scan, multiplex the data acquisition channels and apply additional event filtering

Web Development with the Mac

CERN Document Server

Vegh, Aaron

2010-01-01

Learn Web development the Apple way and build a business. With a focus on both coding and creative development, this in-depth guide thoroughly covers what you need to know to build winning websites for clients — from what it takes to bring a business online to how to make your site interactive to how to run a freelance web business. In between, you'll master the technical tools of the trade — such as HTML, CSS, JavaScript, PHP, and Ruby on Rails — and learn how to create beautiful interfaces using Photoshop . This book covers everything a fledgling web developer working on a Mac needs to launc

Teach yourself visually Mac Mini

CERN Document Server

Hart-Davis, Guy

2012-01-01

The perfect how-to guide for visual learners Apple?s Mac Mini packs a powerful punch is in a small package, including both HDMI and Thunderbolt ports plus the acclaimed OS X. But if you want to get the very most from all this power and versatility, be sure to get this practical visual guide. With full-color, step-by-step instructions as well as screenshots and illustrations on every page, it clearly shows you how to accomplish tasks rather than burying you in pages of text. Discover helpful visuals and how-tos on the OS, hardware specs, Launchpad, the App Store, multimedia capabilities (such

40 CFR 80.840 - What requirements apply to transmix processors?

Science.gov (United States)

2010-07-01

... PROGRAMS (CONTINUED) REGULATION OF FUELS AND FUEL ADDITIVES Gasoline Toxics Gasoline Toxics Performance Requirements § 80.840 What requirements apply to transmix processors? Any transmix processor who produces gasoline or gasoline blendstock from transmix, or recovers gasoline or gasoline blendstock from transmix...

Multiple lupus-associated ITGAM variants alter Mac-1 functions on neutrophils.

Science.gov (United States)

Zhou, Yebin; Wu, Jianming; Kucik, Dennis F; White, Nathan B; Redden, David T; Szalai, Alexander J; Bullard, Daniel C; Edberg, Jeffrey C

2013-11-01

Multiple studies have demonstrated that single-nucleotide polymorphisms (SNPs) in the ITGAM locus (including the nonsynonymous SNPs rs1143679, rs1143678, and rs1143683) are associated with systemic lupus erythematosus (SLE). ITGAM encodes the protein CD11b, a subunit of the β2 integrin Mac-1. The purpose of this study was to determine the effects of ITGAM genetic variation on the biologic functions of neutrophil Mac-1. Neutrophils from ITGAM-genotyped and -sequenced healthy donors were isolated for functional studies. The phagocytic capacity of neutrophil ITGAM variants was probed with complement-coated erythrocytes, serum-treated zymosan, heat-treated zymosan, and IgG-coated erythrocytes. The adhesion capacity of ITGAM variants, in adhering to either purified intercellular adhesion molecule 1 or tumor necrosis factor α-stimulated endothelial cells, was assessed in a flow chamber. Expression levels of total CD11b and activation of CD11b were assessed by flow cytometry. Mac-1-mediated neutrophil phagocytosis, determined in cultures with 2 different complement-coated particles, was significantly reduced in individuals with nonsynonymous variant alleles of ITGAM. This reduction in phagocytosis was related to variation at either rs1143679 (in the β-propeller region) or rs1143678/rs1143683 (highly linked SNPs in the cytoplasmic/calf-1 regions). Phagocytosis mediated by Fcγ receptors was also significantly reduced in donors with variant ITGAM alleles. Similarly, firm adhesion of neutrophils was significantly reduced in individuals with variant ITGAM alleles. These functional alterations were not attributable to differences in total receptor expression or activation. The nonsynonymous ITGAM variants rs1143679 and rs1143678/rs113683 contribute to altered Mac-1 function on neutrophils. These results underscore the need to consider multiple nonsynonymous SNPs when assessing the functional consequences of ITGAM variation on immune cell processes and the risk of SLE

The Serial Link Processor for the Fast TracKer (FTK) processor at ATLAS

CERN Document Server

Biesuz, Nicolo Vladi; The ATLAS collaboration; Luciano, Pierluigi; Magalotti, Daniel; Rossi, Enrico

2015-01-01

The Associative Memory (AM) system of the Fast Tracker (FTK) processor has been designed to perform pattern matching using the hit information of the ATLAS experiment silicon tracker. The AM is the heart of FTK and is mainly based on the use of ASICs (AM chips) designed on purpose to execute pattern matching with a high degree of parallelism. It finds track candidates at low resolution that are seeds for a full resolution track fitting. To solve the very challenging data traffic problems inside FTK, multiple board and chip designs have been performed. The currently proposed solution is named the “Serial Link Processor” and is based on an extremely powerful network of 2 Gb/s serial links. This paper reports on the design of the Serial Link Processor consisting of two types of boards, the Local Associative Memory Board (LAMB), a mezzanine where the AM chips are mounted, and the Associative Memory Board (AMB), a 9U VME board which holds and exercises four LAMBs. We report on the performance of the intermedia...

The Serial Link Processor for the Fast TracKer (FTK) processor at ATLAS

CERN Document Server

Andreani, A; The ATLAS collaboration; Beccherle, R; Beretta, M; Cipriani, R; Citraro, S; Citterio, M; Colombo, A; Crescioli, F; Dimas, D; Donati, S; Giannetti, P; Kordas, K; Lanza, A; Liberali, V; Luciano, P; Magalotti, D; Neroutsos, P; Nikolaidis, S; Piendibene, M; Sakellariou, A; Shojaii, S; Sotiropoulou, C-L; Stabile, A

2014-01-01

The Associative Memory (AM) system of the FTK processor has been designed to perform pattern matching using the hit information of the ATLAS silicon tracker. The AM is the heart of the FTK and it finds track candidates at low resolution that are seeds for a full resolution track fitting. To solve the very challenging data traffic problems inside the FTK, multiple designs and tests have been performed. The currently proposed solution is named the “Serial Link Processor” and is based on an extremely powerful network of 2 Gb/s serial links. This paper reports on the design of the Serial Link Processor consisting of the AM chip, an ASIC designed and optimized to perform pattern matching, and two types of boards, the Local Associative Memory Board (LAMB), a mezzanine where the AM chips are mounted, and the Associative Memory Board (AMB), a 9U VME board which holds and exercises four LAMBs. Special relevance will be given to the AMchip design that includes two custom cells optimized for low consumption. We repo...

The Serial Link Processor for the Fast TracKer (FTK) processor at ATLAS

CERN Document Server

Biesuz, Nicolo Vladi; The ATLAS collaboration; Luciano, Pierluigi; Magalotti, Daniel; Rossi, Enrico

2015-01-01

The Associative Memory (AM) system of the Fast Tracker (FTK) processor has been designed to perform pattern matching using the hit information of the ATLAS experiment silicon tracker. The AM is the heart of FTK and is mainly based on the use of ASICs (AM chips) designed to execute pattern matching with a high degree of parallelism. The AM system finds track candidates at low resolution that are seeds for a full resolution track fitting. To solve the very challenging data traffic problems inside FTK, multiple board and chip designs have been performed. The currently proposed solution is named the “Serial Link Processor” and is based on an extremely powerful network of 828 2 Gbit/s serial links for a total in/out bandwidth of 56 Gb/s. This paper reports on the design of the Serial Link Processor consisting of two types of boards, the Local Associative Memory Board (LAMB), a mezzanine where the AM chips are mounted, and the Associative Memory Board (AMB), a 9U VME board which holds and exercises four LAMBs. ...

Application of the MacCormack scheme to overland flow routing for high-spatial resolution distributed hydrological model

Science.gov (United States)

Zhang, Ling; Nan, Zhuotong; Liang, Xu; Xu, Yi; Hernández, Felipe; Li, Lianxia

2018-03-01

Although process-based distributed hydrological models (PDHMs) are evolving rapidly over the last few decades, their extensive applications are still challenged by the computational expenses. This study attempted, for the first time, to apply the numerically efficient MacCormack algorithm to overland flow routing in a representative high-spatial resolution PDHM, i.e., the distributed hydrology-soil-vegetation model (DHSVM), in order to improve its computational efficiency. The analytical verification indicates that both the semi and full versions of the MacCormack schemes exhibit robust numerical stability and are more computationally efficient than the conventional explicit linear scheme. The full-version outperforms the semi-version in terms of simulation accuracy when a same time step is adopted. The semi-MacCormack scheme was implemented into DHSVM (version 3.1.2) to solve the kinematic wave equations for overland flow routing. The performance and practicality of the enhanced DHSVM-MacCormack model was assessed by performing two groups of modeling experiments in the Mercer Creek watershed, a small urban catchment near Bellevue, Washington. The experiments show that DHSVM-MacCormack can considerably improve the computational efficiency without compromising the simulation accuracy of the original DHSVM model. More specifically, with the same computational environment and model settings, the computational time required by DHSVM-MacCormack can be reduced to several dozen minutes for a simulation period of three months (in contrast with one day and a half by the original DHSVM model) without noticeable sacrifice of the accuracy. The MacCormack scheme proves to be applicable to overland flow routing in DHSVM, which implies that it can be coupled into other PHDMs for watershed routing to either significantly improve their computational efficiency or to make the kinematic wave routing for high resolution modeling computational feasible.

Safe and Efficient Support for Embeded Multi-Processors in ADA

Science.gov (United States)

Ruiz, Jose F.

2010-08-01

New software demands increasing processing power, and multi-processor platforms are spreading as the answer to achieve the required performance. Embedded real-time systems are also subject to this trend, but in the case of real-time mission-critical systems, the properties of reliability, predictability and analyzability are also paramount. The Ada 2005 language defined a subset of its tasking model, the Ravenscar profile, that provides the basis for the implementation of deterministic and time analyzable applications on top of a streamlined run-time system. This Ravenscar tasking profile, originally designed for single processors, has proven remarkably useful for modelling verifiable real-time single-processor systems. This paper proposes a simple extension to the Ravenscar profile to support multi-processor systems using a fully partitioned approach. The implementation of this scheme is simple, and it can be used to develop applications amenable to schedulability analysis.

A programmable systolic trigger processor for FERA bus data

International Nuclear Information System (INIS)

Appelquist, G.; Hovander, B.; Sellden, B.; Bohm, C.

1992-09-01

A generic CAMAC based trigger processor module for fast processing of large amounts of ADC data, has been designed. This module has been realised using complex programmable gate arrays (LCAs from XILINX). The gate arrays have been connected to memories and multipliers in such a way that different gate array configurations can cover a wide range of module applications. Using this module, it is possible to construct complex trigger processors. The module uses both the fast ECL FERA bus and the CAMAC bus for inputs and outputs. The latter, however, is primarily used for set-up and control but may also be used for data output. Large numbers of ADCs can be served by a hierarchical arrangement of trigger processor modules, processing ADC data with pipe-line arithmetics producing the final result at the apex of the pyramid. The trigger decision will be transmitted to the data acquisition system via a logic signal while numeric results may be extracted by the CAMAC controller. The trigger processor was originally developed for the proposed neutral particle search experiment at CERN, NUMASS. There it was designed to serve as a second level trigger processor. It was required to correct all ADC raw data for efficiency and pedestal, calculate the total calorimeter energy, obtain the optimal time of flight data and calculate the particle mass. A suitable mass cut would then deliver the trigger decision. More complex triggers were also considered. (au)

PaleoMac: A Macintosh™ application for treating paleomagnetic data and making plate reconstructions

Science.gov (United States)

Cogné, J. P.

2003-01-01

This brief note provides an overview of a new Macintosh™ application, PaleoMac, (MacOS 8.0 or later, 15Mb RAM required) which permits rapid processing of paleomagnetic data, from the demagnetization data acquired in the laboratory, to the treatment of paleomagnetic poles, plate reconstructions, finite rotation computations on a sphere, and characterization of relative plate motions. Capabilities of PaleoMac include (1) high interactivity between the user and data displayed on screen which provides a fast and easy way to handle, add and remove data or contours, perform computations on subsets of points, change projections, sizes, etc.; (2) performance of all standard principal component analysis and statistical processing on a sphere [, 1953] etc.); (3) output of high quality plots, compatible with graphic programs such as Adobe Illustrator, and output of numerical results as ASCII files. Beyond its usefulness in treating paleomagnetic data, its ability to handle plate motion computations should be of large interest to the Earth science community.

7 CFR 1215.14 - Processor.

Science.gov (United States)

2010-01-01

... 7 Agriculture 10 2010-01-01 2010-01-01 false Processor. 1215.14 Section 1215.14 Agriculture Regulations of the Department of Agriculture (Continued) AGRICULTURAL MARKETING SERVICE (MARKETING AGREEMENTS... CONSUMER INFORMATION Popcorn Promotion, Research, and Consumer Information Order Definitions § 1215.14...

Performance of Artificial Intelligence Workloads on the Intel Core 2 Duo Series Desktop Processors

Directory of Open Access Journals (Sweden)

Abdul Kareem PARCHUR

2010-12-01

Full Text Available As the processor architecture becomes more advanced, Intel introduced its Intel Core 2 Duo series processors. Performance impact on Intel Core 2 Duo processors are analyzed using SPEC CPU INT 2006 performance numbers. This paper studied the behavior of Artificial Intelligence (AI benchmarks on Intel Core 2 Duo series processors. Moreover, we estimated the task completion time (TCT @1 GHz, @2 GHz and @3 GHz Intel Core 2 Duo series processors frequency. Our results show the performance scalability in Intel Core 2 Duo series processors. Even though AI benchmarks have similar execution time, they have dissimilar characteristics which are identified using principal component analysis and dendogram. As the processor frequency increased from 1.8 GHz to 3.167 GHz the execution time is decreased by ~370 sec for AI workloads. In the case of Physics/Quantum Computing programs it was ~940 sec.

Design of a coincidence processing board for a dual-head PET scanner for breast imaging

International Nuclear Information System (INIS)

Martinez, J.D.; Toledo, J.; Esteve, R.; Sebastia, A.; Mora, F.J.; Benlloch, J.M.; Fernandez, M.M.; Gimenez, M.; Gimenez, E.N.; Lerche, Ch.W.; Pavon, N.; Sanchez, F.

2005-01-01

This paper describes the design of a coincidence processing board for a dual-head Positron Emission Tomography (PET) scanner for breast imaging. The proposed block-oriented data acquisition system relies on a high-speed DSP processor for fully digital trigger and on-line event processing that surpasses the performance of traditional analog coincidence detection systems. A mixed-signal board has been designed and manufactured. The analog section comprises 12 coaxial inputs (six per head) which are digitized by means of two 8-channel 12-bit 40-MHz ADCs in order to acquire the scintillation pulse, the charge division signals and the depth of interaction within the scintillator. At the digital section, a state-of-the-art FPGA is used as deserializer and also implements the DMA interface to the DSP processor by storing each digitized channel into a fast embedded FIFO memory. The system incorporates a high-speed USB 2.0 interface to the host computer

Photonics and Fiber Optics Processor Lab

Data.gov (United States)

Federal Laboratory Consortium — The Photonics and Fiber Optics Processor Lab develops, tests and evaluates high speed fiber optic network components as well as network protocols. In addition, this...

Slowdown in the $M/M/1$ discriminatory processor-sharing queue

NARCIS (Netherlands)

Cheung, S.K.; Kim, Bara; Kim, Jeongsim

2008-01-01

We consider a queue with multiple K job classes, Poisson arrivals, and exponentially distributed required service times in which a single processor serves according to the discriminatory processor-sharing (DPS) discipline. For this queue, we obtain the first and second moments of the slowdown, which

Online Fastbus processor for LEP

International Nuclear Information System (INIS)

Mueller, H.

1986-01-01

The author describes the online computing aspects of Fastbus systems using a processor module which has been developed at CERN and is now available commercially. These General Purpose Master/Slaves (GPMS) are based on 68000/10 (or optionally 68020/68881) processors. Applications include use as event-filters (DELPHI), supervisory controllers, Fastbus stand-alone diagnostic tools, and multiprocessor array components. The direct mapping of single, 32-bit assembly instructions to execute Fastbus protocols makes the use of a GPM both simple and flexible. Loosely coupled processing in Fastbus networks is possible between GPM's as they support access semaphores and use a two port memory as I/O buffer for Fastbus. Both master and slave-ports support block transfers up to 20 Mbytes/s. The CERN standard Fastbus software and the MoniCa symbolic debugging monitor are available on the GPM with real time, multiprocessing support. (Auth.)

Invasive tightly coupled processor arrays

CERN Document Server

LARI, VAHID

2016-01-01

This book introduces new massively parallel computer (MPSoC) architectures called invasive tightly coupled processor arrays. It proposes strategies, architecture designs, and programming interfaces for invasive TCPAs that allow invading and subsequently executing loop programs with strict requirements or guarantees of non-functional execution qualities such as performance, power consumption, and reliability. For the first time, such a configurable processor array architecture consisting of locally interconnected VLIW processing elements can be claimed by programs, either in full or in part, using the principle of invasive computing. Invasive TCPAs provide unprecedented energy efficiency for the parallel execution of nested loop programs by avoiding any global memory access such as GPUs and may even support loops with complex dependencies such as loop-carried dependencies that are not amenable to parallel execution on GPUs. For this purpose, the book proposes different invasion strategies for claiming a desire...

A Modular Pipelined Processor for High Resolution Gamma-Ray Spectroscopy

Science.gov (United States)

Veiga, Alejandro; Grunfeld, Christian

2016-02-01

The design of a digital signal processor for gamma-ray applications is presented in which a single ADC input can simultaneously provide temporal and energy characterization of gamma radiation for a wide range of applications. Applying pipelining techniques, the processor is able to manage and synchronize very large volumes of streamed real-time data. Its modular user interface provides a flexible environment for experimental design. The processor can fit in a medium-sized FPGA device operating at ADC sampling frequency, providing an efficient solution for multi-channel applications. Two experiments are presented in order to characterize its temporal and energy resolution.

A survey of Tumult, a real-time multi-processor system

International Nuclear Information System (INIS)

Jansen, P.G.

1986-01-01

Tumult (Twente University MULTi processor system) is the name of an ongoing project aiming at the design and implementation of a modular extendible multiprocessor system. All memory is distributed and processors communicate in parallel via a fast and reliable local switching network instead of a shared bus. A distributed real-time operating system is being designed and implemented, consisting of a multi-tasking subsystem per processor. Processes can communicate via a message passing mechanism. Communication links and processes are dynamically created and disposed by the application. In this article a brief description of the system is given; communication aspects are emphasized. (Auth.)

Increasing the permeability of Escherichia coli using MAC13243

DEFF Research Database (Denmark)

Muheim, Claudio; Götzke, Hansjörg; Eriksson, Anna U.

2017-01-01

molecules that make the outer membrane of Escherichia coli more permeable. We identified MAC13243, an inhibitor of the periplasmic chaperone LolA that traffics lipoproteins from the inner to the outer membrane. We observed that cells were (1) more permeable to the fluorescent probe 1-N...

Reaction-diffusion path planning in a hybrid chemical and cellular-automaton processor

International Nuclear Information System (INIS)

Adamatzky, Andrew; Lacy Costello, Benjamin de

2003-01-01

To find the shortest collision-free path in a room containing obstacles we designed a chemical processor and coupled it with a cellular-automaton processor. In the chemical processor obstacles are represented by sites of high concentration of potassium iodide and a planar substrate is saturated with palladium chloride. Potassium iodide diffuses into the substrate and reacts with palladium chloride. A dark coloured precipitate of palladium iodide is formed almost everywhere except sites where two or more diffusion wavefronts collide. The less coloured sites are situated at the furthest distance from obstacles. Thus, the chemical processor develops a repulsive field, generated by obstacles. A snapshot of the chemical processor is inputted to a cellular automaton. The automaton behaves like a discrete excitable media; also, every cell of the automaton is supplied with a pointer that shows an origin of the cell's excitation. The excitation spreads along the cells corresponding to precipitate depleted sites of the chemical processor. When the destination-site is excited, waves travel on the lattice and update the orientations of the pointers. Thus, the automaton constructs a spanning tree, made of pointers, that guides a traveler towards the destination point. Thus, the automaton medium generates an attractive field and combination of this attractive field with the repulsive field, generated by the chemical processor, provides us with a solution of the collision-free path problem

A VAX-FPS Loosely-Coupled Array of Processors

International Nuclear Information System (INIS)

Grosdidier, G.

1987-03-01

The main features of a VAX-FPS Loosely-Coupled Array of Processors (LCAP) set-up and the implementation of a High Energy Physics tracking program for off-line purposes will be described. This LCAP consists of a VAX 11/750 host and two FPS 64 bit attached processors. Before analyzing the performances of this LCAP, its characteristics will be outlined, especially from a user's point of vue, and will be briefly compared to those of the IBM-FPS LCAP

Reducing Competitive Cache Misses in Modern Processor Architectures

OpenAIRE

Prisagjanec, Milcho; Mitrevski, Pece

2017-01-01

The increasing number of threads inside the cores of a multicore processor, and competitive access to the shared cache memory, become the main reasons for an increased number of competitive cache misses and performance decline. Inevitably, the development of modern processor architectures leads to an increased number of cache misses. In this paper, we make an attempt to implement a technique for decreasing the number of competitive cache misses in the first level of cache memory. This tec...

16-Bit RISC Processor Design for Convolution Application

OpenAIRE

Anand Nandakumar Shardul

2013-01-01

In this project, we propose a 16-bit non-pipelined RISC processor, which is used for signal processing applications. The processor consists of the blocks, namely, program counter, clock control unit, ALU, IDU and registers. Advantageous architectural modifications have been made in the incremented circuit used in program counter and carry select adder unit of the ALU in the RISC CPU core. Furthermore, a high speed and low power modified modifies multiplier has been designed and introduced in ...

Modal Processor Effects Inspired by Hammond Tonewheel Organs

Directory of Open Access Journals (Sweden)

Kurt James Werner

2016-06-01

Full Text Available In this design study, we introduce a novel class of digital audio effects that extend the recently introduced modal processor approach to artificial reverberation and effects processing. These pitch and distortion processing effects mimic the design and sonics of a classic additive-synthesis-based electromechanical musical instrument, the Hammond tonewheel organ. As a reverb effect, the modal processor simulates a room response as the sum of resonant filter responses. This architecture provides precise, interactive control over the frequency, damping, and complex amplitude of each mode. Into this framework, we introduce two types of processing effects: pitch effects inspired by the Hammond organ’s equal tempered “tonewheels”, “drawbar” tone controls, vibrato/chorus circuit, and distortion effects inspired by the pseudo-sinusoidal shape of its tonewheels and electromagnetic pickup distortion. The result is an effects processor that imprints the Hammond organ’s sonics onto any audio input.

Safety-critical Java on a time-predictable processor

DEFF Research Database (Denmark)

Korsholm, Stephan E.; Schoeberl, Martin; Puffitsch, Wolfgang

2015-01-01

For real-time systems the whole execution stack needs to be time-predictable and analyzable for the worst-case execution time (WCET). This paper presents a time-predictable platform for safety-critical Java. The platform consists of (1) the Patmos processor, which is a time-predictable processor......; (2) a C compiler for Patmos with support for WCET analysis; (3) the HVM, which is a Java-to-C compiler; (4) the HVM-SCJ implementation which supports SCJ Level 0, 1, and 2 (for both single and multicore platforms); and (5) a WCET analysis tool. We show that real-time Java programs translated to C...... and compiled to a Patmos binary can be analyzed by the AbsInt aiT WCET analysis tool. To the best of our knowledge the presented system is the second WCET analyzable real-time Java system; and the first one on top of a RISC processor....

Stepping motor control processor reference manual. Volume I

International Nuclear Information System (INIS)

Holloway, F.W.; VanArsdall, P.J.; Suski, G.J.; Gant, R.G.; Rash, M.

1980-01-01

This manual is intended to serve several purposes. The first goal is to describe the capabilities and operation of the SMC processor package from an operator or user point of view. Secondly, the manual will describe in some detail the basic hardware elements and how they can be used effectively to implement a step motor control system. Practical information on the use, installation and checkout of the hardware set is presented in the following sections along with programming suggestions. Available related system software is described in this manual for reference and as an aid in understanding the system architecture. Section two presents an overview and operations manual of the SMC processor describing its composition and functional capabilities. Section three contains hardware descriptions in some detail for the LLL-designed hardware used in the SMC processor. Basic theory of operation and important features are explained

Competition at the Wireless Sensor Network MAC Layer: Low Power Probing interfering with X-MAC

International Nuclear Information System (INIS)

Zacharias, Sven; Newe, Thomas

2011-01-01

Wireless Sensor Networks (WSNs) combine sensors with computer networks and enable very dense, in-situ and live measurements of data over a large area. Since this emerging technology has the potential to be embedded almost everywhere for numberless applications, interference between different networks can become a serious issue. For most WSNs, it is assumed today that the network medium access is non-competitive. On the basis of X-MAC interfered by Low Power Probing, this paper shows the danger and the effects of different sensor networks communicating on a single wireless channel of the 2.4 GHz band, which is used by the IEEE 802.15.4 standard.

Competition at the Wireless Sensor Network MAC Layer: Low Power Probing interfering with X-MAC

Energy Technology Data Exchange (ETDEWEB)

Zacharias, Sven; Newe, Thomas, E-mail: Sven.Zacharias@ul.ie [University of Limerick (Ireland)

2011-08-17

Wireless Sensor Networks (WSNs) combine sensors with computer networks and enable very dense, in-situ and live measurements of data over a large area. Since this emerging technology has the potential to be embedded almost everywhere for numberless applications, interference between different networks can become a serious issue. For most WSNs, it is assumed today that the network medium access is non-competitive. On the basis of X-MAC interfered by Low Power Probing, this paper shows the danger and the effects of different sensor networks communicating on a single wireless channel of the 2.4 GHz band, which is used by the IEEE 802.15.4 standard.

Competition at the Wireless Sensor Network MAC Layer: Low Power Probing interfering with X-MAC

Science.gov (United States)

Zacharias, Sven; Newe, Thomas

2011-08-01

Wireless Sensor Networks (WSNs) combine sensors with computer networks and enable very dense, in-situ and live measurements of data over a large area. Since this emerging technology has the potential to be embedded almost everywhere for numberless applications, interference between different networks can become a serious issue. For most WSNs, it is assumed today that the network medium access is non-competitive. On the basis of X-MAC interfered by Low Power Probing, this paper shows the danger and the effects of different sensor networks communicating on a single wireless channel of the 2.4 GHz band, which is used by the IEEE 802.15.4 standard.

The Interface Between Redundant Processor Modules Of Safety Grade PLC Using Mass Storage DPRAM

International Nuclear Information System (INIS)

Hwang, Sung Jae; Song, Seong Hwan; No, Young Hun; Yun, Dong Hwa; Park, Gang Min; Kim, Min Gyu; Choi, Kyung Chul; Lee, Ui Taek

2010-01-01

Processor module of safety grade PLC (hereinafter called as POSAFE-Q) developed by POSCO ICT provides high reliability and safety. However, POSAFEQ would have suffered a malfunction when we think taking place of abnormal operation by exceptional environmental. POSAFE-Q would not able to conduct its function normally in such case. To prevent these situations, the necessity of redundant processor module has been raised. Therefore, redundant processor module, NCPU-2Q, has been developed which has not only functions of single processor module with high reliability and safety but also functions of redundant processor

DUAL TIMELIKE NORMAL AND DUAL TIMELIKE SPHERICAL CURVES IN DUAL MINKOWSKI SPACE

OpenAIRE

ÖNDER, Mehmet

2009-01-01

Abstract: In this paper, we give characterizations of dual timelike normal and dual timelike spherical curves in the dual Minkowski 3-space and we show that every dual timelike normal curve is also a dual timelike spherical curve. Keywords: Normal curves, Dual Minkowski 3-Space, Dual Timelike curves. Mathematics Subject Classifications (2000): 53C50, 53C40. DUAL MINKOWSKI UZAYINDA DUAL TIMELIKE NORMAL VE DUAL TIMELIKE KÜRESEL EĞRİLER Özet: Bu çalışmada, dual Minkowski 3-...

C-MAC videolaryngoscope versus Macintosh laryngoscope for tracheal intubation: A systematic review and meta-analysis with trial sequential analysis.

Science.gov (United States)

Hoshijima, Hiroshi; Mihara, Takahiro; Maruyama, Koichi; Denawa, Yohei; Mizuta, Kentaro; Shiga, Toshiya; Nagasaka, Hiroshi

2018-06-09

The C-MAC laryngoscope (C-MAC) is a videolaryngoscope that uses a modified Macintosh blade. Although several anecdotal reports exist, it remains unclear whether the C-MAC is superior to the Macintosh laryngoscope for tracheal intubation in the adult population. Systematic review, meta-analysis. Operating room, intensive care unit. For inclusion in our analysis, studies had to be prospective randomised trials which compared the C-MAC with the Macintosh laryngoscope for tracheal intubation in the adult population. Data on success rates, intubation time, glottic visualisation and incidence of external laryngeal manipulations (ELM) during tracheal intubation were extracted from the identified studies. In subgroup analysis, we separated those parameters to assess the influence of the airway condition (normal or difficult) and laryngoscopists (novice or experienced). We conducted a trial sequential analysis (TSA). Sixteen articles with 18 trials met the inclusion criteria. The C-MAC provided better glottic visualisation compared to the Macintosh (RR, 1.08; 95% CI, 1.03-1.14). TSA corrected the CI to 1.01-1.19; thus, total sample size reached the required information size (RIS). Success rates and intubation time did not differ significantly between the laryngoscopes. TSA showed that total sample size reached the RIS for success rates. The TSA Z curve surpassed the futility boundary. The C-MAC required less ELM compared to the Macintosh (RR, 0.83; 95% CI, 0.72-0.96). TSA corrected the CI to 0.67-1.03; 52.3% of the RIS was achieved. In difficult airways, the C-MAC showed superior success rates, glottic visualisation, and less ELM compared to the Macintosh. Among experienced laryngoscopists, the C-MAC offered better glottic visualisation with less ELM than the Macintosh. The C-MAC provided better glottic visualisation and less ELM (GRADE: Very Low or Moderate), with improved success rates, glottic visualisation, and less ELM in difficult airways. Copyright © 2018 Elsevier

The performances of coffee processors and coffee market in the Republic of Serbia

Directory of Open Access Journals (Sweden)

Nuševa Daniela

2017-01-01

Full Text Available The main aim of this paper is to investigate the performances of coffee processors and coffee market in Serbia based on the market concentration analysis, profitability analysis, and profitability determinants analysis. The research was based on the sample of 40 observations of coffee processing companies divided into two groups: large and small coffee processors. The results indicate that two large coffee processors have dominant market share. Even though the Serbian coffee market is an oligopolistic, profitability analysis indicates that small coffee processors have a significant better profitability ratio than large coffee processors. Furthermore, results show that profitability ratio is positively related to the inventory turnover and negatively related to the market share.

Hardware Synchronization for Embedded Multi-Core Processors

DEFF Research Database (Denmark)

Stoif, Christian; Schoeberl, Martin; Liccardi, Benito

2011-01-01

Multi-core processors are about to conquer embedded systems — it is not the question of whether they are coming but how the architectures of the microcontrollers should look with respect to the strict requirements in the field. We present the step from one to multiple cores in this paper, establi......Multi-core processors are about to conquer embedded systems — it is not the question of whether they are coming but how the architectures of the microcontrollers should look with respect to the strict requirements in the field. We present the step from one to multiple cores in this paper...

Is Kyoto Fatally Flawed? An Analysis with MacGEM

International Nuclear Information System (INIS)

Eyckmans, J.; Van Regemorter, D.; Van Steenberghe, V.

2002-06-01

In this paper we present some numerical simulations with the MacGEM model to evaluate the consequences of the recent Marrakesh agreements and the defection of the USA for the Kyoto Protocol. MacGEM is a global marginal abatement cost model for carbon emissions from fossil fuel use based on the GEM-E3-World general equilibrium. Nonparticipation of the USA causes the equilibrium carbon price in Annex B countries to fall by approximately 50% since an important share of permit demand falls out. Carbon sinks enhancement activities enable Parties to fulfil their reduction commitment at lower compliance costs and cause the equilibrium permit price to decrease by 40%. Finally, it is shown that the former Soviet Union and central European countries have substantial monopoly power in the Kyoto carbon permit market. We conclude that the recent accords have eroded completely the Kyoto Protocol's emission targets but that they have the merit to have saved the international climate change negotiation framework

The microelectronic and photonic test bed RISC processor and DRAM memory stack experiments

International Nuclear Information System (INIS)

Clark, K.A.; Meehan, T.J.

1999-01-01

This paper reports on the on-orbit data obtained from the MPTB RISC Processor Experiment, containing three Integrated Device Technologies R3081 processors. During operations, nine SEUs were observed in the processors, and four SEUs were observed in the memory and/or support circuitry. (authors)

Digital image processing software system using an array processor

International Nuclear Information System (INIS)

Sherwood, R.J.; Portnoff, M.R.; Journeay, C.H.; Twogood, R.E.

1981-01-01

A versatile array processor-based system for general-purpose image processing was developed. At the heart of this system is an extensive, flexible software package that incorporates the array processor for effective interactive image processing. The software system is described in detail, and its application to a diverse set of applications at LLNL is briefly discussed. 4 figures, 1 table

Embedded Processor Based Automatic Temperature Control of VLSI Chips

Directory of Open Access Journals (Sweden)

Narasimha Murthy Yayavaram

2009-01-01

Full Text Available This paper presents embedded processor based automatic temperature control of VLSI chips, using temperature sensor LM35 and ARM processor LPC2378. Due to the very high packing density, VLSI chips get heated very soon and if not cooled properly, the performance is very much affected. In the present work, the sensor which is kept very near proximity to the IC will sense the temperature and the speed of the fan arranged near to the IC is controlled based on the PWM signal generated by the ARM processor. A buzzer is also provided with the hardware, to indicate either the failure of the fan or overheating of the IC. The entire process is achieved by developing a suitable embedded C program.

gFEX, the ATLAS Calorimeter Level-1 Real Time Processor

CERN Document Server

AUTHOR|(SzGeCERN)759889; The ATLAS collaboration; Begel, Michael; Chen, Hucheng; Lanni, Francesco; Takai, Helio; Wu, Weihao

2016-01-01

The global feature extractor (gFEX) is a component of the Level-1 Calorimeter trigger Phase-I upgrade for the ATLAS experiment. It is intended to identify patterns of energy associated with the hadronic decays of high momentum Higgs, W, & Z bosons, top quarks, and exotic particles in real time at the LHC crossing rate. The single processor board will be packaged in an Advanced Telecommunications Computing Architecture (ATCA) module and implemented as a fast reconfigurable processor based on three Xilinx Vertex Ultra-scale FPGAs. The board will receive coarse-granularity information from all the ATLAS calorimeters on 276 optical fibers with the data transferred at the 40 MHz Large Hadron Collider (LHC) clock frequency. The gFEX will be controlled by a single system-on-chip processor, ZYNQ, that will be used to configure all the processor Field-Programmable Gate Array (FPGAs), monitor board health, and interface to external signals. Now, the pre-prototype board which includes one ZYNQ and one Vertex-7 FPGA ...

gFEX, the ATLAS Calorimeter Level 1 Real Time Processor

CERN Document Server

Tang, Shaochun; The ATLAS collaboration

2015-01-01

The global feature extractor (gFEX) is a component of the Level-1Calorimeter trigger Phase-I upgrade for the ATLAS experiment. It is intended to identify patterns of energy associated with the hadronic decays of high momentum Higgs, W, & Z bosons, top quarks, and exotic particles in real time at the LHC crossing rate. The single processor board will be packaged in an Advanced Telecommunications Computing Architecture (ATCA) module and implemented as a fast reconfigurable processor based on three Xilinx Ultra-scale FPGAs. The board will receive coarse-granularity information from all the ATLAS calorimeters on 264 optical fibers with the data transferred at the 40 MHz LHC clock frequency. The gFEX will be controlled by a single system-on-chip processor, ZYNQ, that will be used to configure all the processor FPGAs, monitor board health, and interface to external signals. Now, the pre-prototype board which includes one ZYNQ and one Vertex-7 FPGA has been designed for testing and verification. The performance ...

Scientific programming on massively parallel processor CP-PACS

International Nuclear Information System (INIS)

Boku, Taisuke

1998-01-01

The massively parallel processor CP-PACS takes various problems of calculation physics as the object, and it has been designed so that its architecture has been devised to do various numerical processings. In this report, the outline of the CP-PACS and the example of programming in the Kernel CG benchmark in NAS Parallel Benchmarks, version 1, are shown, and the pseudo vector processing mechanism and the parallel processing tuning of scientific and technical computation utilizing the three-dimensional hyper crossbar net, which are two great features of the architecture of the CP-PACS are described. As for the CP-PACS, the PUs based on RISC processor and added with pseudo vector processor are used. Pseudo vector processing is realized as the loop processing by scalar command. The features of the connection net of PUs are explained. The algorithm of the NPB version 1 Kernel CG is shown. The part that takes the time for processing most in the main loop is the product of matrix and vector (matvec), and the parallel processing of the matvec is explained. The time for the computation by the CPU is determined. As the evaluation of the performance, the evaluation of the time for execution, the short vector processing of pseudo vector processor based on slide window, and the comparison with other parallel computers are reported. (K.I.)

Standardization of the Korean version of Mini-Mental Adjustment to Cancer (K-Mini-MAC) scale: factor structure, reliability and validity.

Science.gov (United States)

Kang, Jee In; Chung, Hyun Cheol; Kim, Se Joo; Choi, Hye Jin; Ahn, Joong Bae; Jeung, Hei-Cheul; Namkoong, Kee

2008-06-01

Mental adjustment and coping affect the physical outcome and survival as well as quality of life in cancer patients. The Mini-Mental Adjustment to Cancer (Mini-MAC) scale is a new refined, economical and reliable self-rating instrument measuring cognitive and behavioral responses to cancer. The aim of this study was to evaluate the psychometric properties of the Mini-MAC in Korean cancer patients. A total of 208 cancer patients recruited from the Yonsei Cancer Center were assessed with the Mini-MAC and the Hospital Anxiety and Depression Scale (HADS). Principal component analysis with varimax rotation for the Korean version of Mini-MAC (K-Mini-MAC) confirmed four factors. Three had psychometric properties similar to Helpless-Hopeless (HH), Anxious Preoccupation (AP) and Cognitive Avoidance (CA) of the original Mini-MAC. A novel factor, named Positive Attitude, included items of both Fatalism (FA) and Fighting Spirit (FS) from the original version. The five subscales from the original version (AP, HH, FS, FA and CA) and Positive Attitude had acceptable internal reliabilities in our sample (Cronbach's alpha coefficient 0.50-0.86; correlation coefficient of test-retest 0.68-0.88). For the validity, significant interscale correlation was observed in the original five subscales and Positive Attitude. Each subscale including Positive Attitude was also significantly related to Depression and Anxiety of HADS. As a whole, the K-Mini-MAC was a reliable, valid and acceptable tool for Korean cancer patients. These findings can provide information about the cross-cultural validity of Mini-MAC scale's factor structure. Cultural differences were also discussed.

Investigation of Large Scale Cortical Models on Clustered Multi-Core Processors

Science.gov (United States)

2013-02-01

Playstation 3 with 6 available SPU cores outperforms the Intel Xeon processor (with 4 cores) by about 1.9 times for the HTM model and by 2.4 times...runtime breakdowns of the HTM and Dean models respectively on the Cell processor (on the Playstation 3) and the Intel Xeon processor ( 4 thread...YOUR FORM TO THE ABOVE ORGANIZATION. 1. REPORT DATE (DD-MM-YYYY) 2. REPORT TYPE 3. DATES COVERED (From - To) 4 . TITLE AND SUBTITLE 5a. CONTRACT NUMBER

Automation of ORIGEN2 calculations for the transuranic waste baseline inventory database using a pre-processor and a post-processor

International Nuclear Information System (INIS)

Liscum-Powell, J.

1997-06-01

The purpose of the work described in this report was to automate ORIGEN2 calculations for the Waste Isolation Pilot Plant (WIPP) Transuranic Waste Baseline Inventory Database (WTWBID); this was done by developing a pre-processor to generate ORIGEN2 input files from WWBID inventory files and a post-processor to remove excess information from the ORIGEN2 output files. The calculations performed with ORIGEN2 estimate the radioactive decay and buildup of various radionuclides in the waste streams identified in the WTWBID. The resulting radionuclide inventories are needed for performance assessment calculations for the WIPP site. The work resulted in the development of PreORG, which requires interaction with the user to generate ORIGEN2 input files on a site-by-site basis, and PostORG, which processes ORIGEN2 output into more manageable files. Both programs are written in the FORTRAN 77 computer language. After running PreORG, the user will run ORIGEN2 to generate the desired data; upon completion of ORIGEN2 calculations, the user can run PostORG to process the output to make it more manageable. All the programs run on a 386 PC or higher with a math co-processor or a computer platform running under VMS operating system. The pre- and post-processors for ORIGEN2 were generated for use with Rev. 1 data of the WTWBID and can also be used with Rev. 2 and 3 data of the TWBID (Transuranic Waste Baseline Inventory Database)

A design of a computer complex including vector processors

International Nuclear Information System (INIS)

Asai, Kiyoshi

1982-12-01

We, members of the Computing Center, Japan Atomic Energy Research Institute have been engaged for these six years in the research of adaptability of vector processing to large-scale nuclear codes. The research has been done in collaboration with researchers and engineers of JAERI and a computer manufacturer. In this research, forty large-scale nuclear codes were investigated from the viewpoint of vectorization. Among them, twenty-six codes were actually vectorized and executed. As the results of the investigation, it is now estimated that about seventy percents of nuclear codes and seventy percents of our total amount of CPU time of JAERI are highly vectorizable. Based on the data obtained by the investigation, (1)currently vectorizable CPU time, (2)necessary number of vector processors, (3)necessary manpower for vectorization of nuclear codes, (4)computing speed, memory size, number of parallel 1/0 paths, size and speed of 1/0 buffer of vector processor suitable for our applications, (5)necessary software and operational policy for use of vector processors are discussed, and finally (6)a computer complex including vector processors is presented in this report. (author)

Deformation, Failure, and Fatigue Life of SiC/Ti-15-3 Laminates Accurately Predicted by MAC/GMC

Science.gov (United States)

Bednarcyk, Brett A.; Arnold, Steven M.

2002-01-01

NASA Glenn Research Center's Micromechanics Analysis Code with Generalized Method of Cells (MAC/GMC) (ref.1) has been extended to enable fully coupled macro-micro deformation, failure, and fatigue life predictions for advanced metal matrix, ceramic matrix, and polymer matrix composites. Because of the multiaxial nature of the code's underlying micromechanics model, GMC--which allows the incorporation of complex local inelastic constitutive models--MAC/GMC finds its most important application in metal matrix composites, like the SiC/Ti-15-3 composite examined here. Furthermore, since GMC predicts the microscale fields within each constituent of the composite material, submodels for local effects such as fiber breakage, interfacial debonding, and matrix fatigue damage can and have been built into MAC/GMC. The present application of MAC/GMC highlights the combination of these features, which has enabled the accurate modeling of the deformation, failure, and life of titanium matrix composites.

Parallel computation for distributed parameter system-from vector processors to Adena computer

Energy Technology Data Exchange (ETDEWEB)

Nogi, T

1983-04-01

Research on advanced parallel hardware and software architectures for very high-speed computation deserves and needs more support and attention to fulfil its promise. Novel architectures for parallel processing are being made ready. Architectures for parallel processing can be roughly divided into two groups. One is a vector processor in which a single central processing unit involves multiple vector-arithmetic registers. The other is a processor array in which slave processors are connected to a host processor to perform parallel computation. In this review, the concept and data structure of the Adena (alternating-direction edition nexus array) architecture, which is conformable to distributed-parameter simulation algorithms, are described. 5 references.

Digital control card based on digital signal processor

International Nuclear Information System (INIS)

Hou Shigang; Yin Zhiguo; Xia Le

2008-01-01

A digital control card based on digital signal processor was developed. Two Freescale DSP-56303 processors were utilized to achieve 3 channels proportional- integral-differential regulations. The card offers high flexibility for 100 MeV cyclotron RF system development. It was used as feedback controller in low level radio frequency control prototype, with the feedback gain parameters continuously adjustable. By using high precision analog to digital converter with 500 kHz sampling rate, a regulation bandwidth of 20 kHz was achieved. (authors)

Scientific Computing and Apple's Intel Transition

CERN Document Server

CERN. Geneva

2006-01-01

Intel's published processor roadmap and how it may affect the future of personal and scientific computing About the speaker: Eric Albert is Senior Software Engineer in Apple's Core Technologies group. During Mac OS X's transition to Intel processors he has worked on almost every part of the operating system, from the OS kernel and compiler tools to appli...

Case Study of Using High Performance Commercial Processors in a Space Environment

Science.gov (United States)