WorldWideScience

Sample records for linear integrated circuits

  1. Linear integrated circuits

    CERN Document Server

    Carr, Joseph

    1996-01-01

    The linear IC market is large and growing, as is the demand for well trained technicians and engineers who understand how these devices work and how to apply them. Linear Integrated Circuits provides in-depth coverage of the devices and their operation, but not at the expense of practical applications in which linear devices figure prominently. This book is written for a wide readership from FE and first degree students, to hobbyists and professionals.Chapter 1 offers a general introduction that will provide students with the foundations of linear IC technology. From chapter 2 onwa

  2. DCal: A custom integrated circuit for calorimetry at the International Linear Collider

    Energy Technology Data Exchange (ETDEWEB)

    Hoff, James R.; Mekkaoui, Abderrazek; Yarema, Ray; /Fermilab; Drake, Gary; Repond, Jose; /Argonne

    2005-10-01

    A research and development collaboration has been started with the goal of producing a prototype hadron calorimeter section for the purpose of proving the Particle Flow Algorithm concept for the International Linear Collider. Given the unique requirements of a Particle Flow Algorithm calorimeter, custom readout electronics must be developed to service these detectors. This paper introduces the DCal or Digital Calorimetry Chip, a custom integrated circuit developed in a 0.25um CMOS process specifically for this International Linear Collider project. The DCal is capable of handling 64 channels, producing a 1-bit Digital-to-Analog conversion of the input (i.e. hit/no hit). It maintains a 24-bit timestamp and is capable of operating either in an externally triggered mode or in a self-triggered mode. Moreover, it is capable of operating either with or without a pipeline delay. Finally, in order to permit the testing of different calorimeter technologies, its analog front end is capable of servicing Particle Flow Algorithm calorimeters made from either Resistive Plate Chambers or Gaseous Electron Multipliers.

  3. SEM analysis of ionizing radiation effects in linear integrated circuits. [Scanning Electron Microscope

    Science.gov (United States)

    Stanley, A. G.; Gauthier, M. K.

    1977-01-01

    A successful diagnostic technique was developed using a scanning electron microscope (SEM) as a precision tool to determine ionization effects in integrated circuits. Previous SEM methods radiated the entire semiconductor chip or major areas. The large area exposure methods do not reveal the exact components which are sensitive to radiation. To locate these sensitive components a new method was developed, which consisted in successively irradiating selected components on the device chip with equal doses of electrons /10 to the 6th rad (Si)/, while the whole device was subjected to representative bias conditions. A suitable device parameter was measured in situ after each successive irradiation with the beam off.

  4. Quasi-Linear Circuit

    Science.gov (United States)

    Bradley, William; Bird, Ross; Eldred, Dennis; Zook, Jon; Knowles, Gareth

    2013-01-01

    This work involved developing spacequalifiable switch mode DC/DC power supplies that improve performance with fewer components, and result in elimination of digital components and reduction in magnetics. This design is for missions where systems may be operating under extreme conditions, especially at elevated temperature levels from 200 to 300 degC. Prior art for radiation-tolerant DC/DC converters has been accomplished utilizing classical magnetic-based switch mode converter topologies; however, this requires specific shielding and component de-rating to meet the high-reliability specifications. It requires complex measurement and feedback components, and will not enable automatic re-optimization for larger changes in voltage supply or electrical loading condition. The innovation is a switch mode DC/DC power supply that eliminates the need for processors and most magnetics. It can provide a well-regulated voltage supply with a gain of 1:100 step-up to 8:1 step down, tolerating an up to 30% fluctuation of the voltage supply parameters. The circuit incorporates a ceramic core transformer in a manner that enables it to provide a well-regulated voltage output without use of any processor components or magnetic transformers. The circuit adjusts its internal parameters to re-optimize its performance for changes in supply voltage, environmental conditions, or electrical loading at the output

  5. MOS integrated circuit design

    CERN Document Server

    Wolfendale, E

    2013-01-01

    MOS Integral Circuit Design aims to help in the design of integrated circuits, especially large-scale ones, using MOS Technology through teaching of techniques, practical applications, and examples. The book covers topics such as design equation and process parameters; MOS static and dynamic circuits; logic design techniques, system partitioning, and layout techniques. Also featured are computer aids such as logic simulation and mask layout, as well as examples on simple MOS design. The text is recommended for electrical engineers who would like to know how to use MOS for integral circuit desi

  6. Integrated circuits for multimedia applications

    DEFF Research Database (Denmark)

    Vandi, Luca

    2007-01-01

    This work presents several key aspects in the design of RF integrated circuits for portable multimedia devices. One chapter is dedicated to the application of negative-feedback topologies to receiver frontends. A novel feedback technique suitable for common multiplier-based mixers is described......, and it is applied to a broad-band dual-loop receiver architecture in order to boost the linearity performances of the stage. A simplified noise- and linearity analysis of the circuit is derived, and a comparison is provided with a more traditional dual-loop topology (a broad-band stage based on shunt...

  7. Military Curricula for Vocational & Technical Education. Basic Electricity and Electronics. CANTRAC A-100-0010. Module 34: Linear Integrated Circuits. Study Booklet.

    Science.gov (United States)

    Chief of Naval Education and Training Support, Pensacola, FL.

    This individualized learning module on linear integrated circuits is one in a series of modules for a course in basic electricity and electronics. The course is one of a number of military-developed curriculum packages selected for adaptation to vocational instructional and curriculum development in a civilian setting. Two lessons are included in…

  8. Monolithic microwave integrated circuits

    Science.gov (United States)

    Pucel, R. A.

    Monolithic microwave integrated circuits (MMICs), a new microwave technology which is expected to exert a profound influence on microwave circuit designs for future military systems as well as for the commercial and consumer markets, is discussed. The book contains an historical discussion followed by a comprehensive review presenting the current status in the field. The general topics of the volume are: design considerations, materials and processing considerations, monolithic circuit applications, and CAD, measurement, and packaging techniques. All phases of MMIC technology are covered, from design to testing.

  9. Heterogeneous photonic integrated circuits

    Science.gov (United States)

    Fang, Alexander W.; Fish, Gregory; Hall, Eric

    2012-01-01

    Photonic Integrated Circuits (PICs) have been dichotomized into circuits with high passive content (silica and silicon PLCs) and high active content (InP tunable lasers and transceivers) due to the trade-off in material characteristics used within these two classes. This has led to restrictions in the adoption of PICs to systems in which only one of the two classes of circuits are required to be made on a singular chip. Much work has been done to create convergence in these two classes by either engineering the materials to achieve the functionality of both device types on a single platform, or in epitaxial growth techniques to transfer one material to the next, but have yet to demonstrate performance equal to that of components fabricated in their native substrates. Advances in waferbonding techniques have led to a new class of heterogeneously integrated photonic circuits that allow for the concurrent use of active and passive materials within a photonic circuit, realizing components on a transferred substrate that have equivalent performance as their native substrate. In this talk, we review and compare advances made in heterogeneous integration along with demonstrations of components and circuits enabled by this technology.

  10. Photonic Integrated Circuits

    Science.gov (United States)

    Krainak, Michael; Merritt, Scott

    2016-01-01

    Integrated photonics generally is the integration of multiple lithographically defined photonic and electronic components and devices (e.g. lasers, detectors, waveguides passive structures, modulators, electronic control and optical interconnects) on a single platform with nanometer-scale feature sizes. The development of photonic integrated circuits permits size, weight, power and cost reductions for spacecraft microprocessors, optical communication, processor buses, advanced data processing, and integrated optic science instrument optical systems, subsystems and components. This is particularly critical for small spacecraft platforms. We will give an overview of some NASA applications for integrated photonics.

  11. Bioluminescent bioreporter integrated circuit

    Energy Technology Data Exchange (ETDEWEB)

    Simpson, Michael L. (Knoxville, TN); Sayler, Gary S. (Blaine, TN); Paulus, Michael J. (Knoxville, TN)

    2000-01-01

    Disclosed are monolithic bioelectronic devices comprising a bioreporter and an OASIC. These bioluminescent bioreporter integrated circuit are useful in detecting substances such as pollutants, explosives, and heavy-metals residing in inhospitable areas such as groundwater, industrial process vessels, and battlefields. Also disclosed are methods and apparatus for environmental pollutant detection, oil exploration, drug discovery, industrial process control, and hazardous chemical monitoring.

  12. Fractional linear systems and electrical circuits

    CERN Document Server

    Kaczorek, Tadeusz

    2015-01-01

    This monograph covers some selected problems of positive and fractional electrical circuits composed of resistors, coils, capacitors and voltage (current) sources. The book consists of 8 chapters, 4 appendices and a list of references. Chapter 1 is devoted to fractional standard and positive continuous-time and discrete-time linear systems without and with delays. In chapter 2 the standard and positive fractional electrical circuits are considered and the fractional electrical circuits in transient states are analyzed.  Descriptor linear electrical circuits and their properties are investigated in chapter 3,  while chapter 4 is devoted to the stability of fractional standard and positive linear electrical circuits. The reachability, observability and reconstructability of fractional positive electrical circuits and their decoupling zeros are analyzed in chapter 5. The fractional linear electrical circuits with feedbacks are considered in chapter 6. In chapter 7 solutions of minimum energy control for standa...

  13. Digital integrated circuits

    Science.gov (United States)

    Polasek, P.; Halamik, J.

    1984-05-01

    The term semicustom designed integrated circuits denotes integrated circuits of an all purpose character in which the production of chips is completed by using one to three custom design stencil type exposure masks. This involves in most cases interconnecting masks that are used to devise the circuit function desired by the customer. Silicon plates with an all purpose gate matrix are produced up to the interconnection level and can be kept at this phase in storage, after which a customer's specific demands can be met very expediently. All purpose logic fields containing 200 logic gates on a chip and an all purpose chip to be expanded to 1,000 logic gates are discussed. The technology facilitates the devising of fast gates with a delay of approximately 5 ns and power dissipation of 1 mW. In assembly it will be possible to make use of the entire assortment of the currently used casings with 16, 18, 20, 24, 28 and 40 outlets. In addition to the development of the mentioned technology, a general methodology for design of the mentioned gate fields is currently under way.

  14. The analysis and design of linear circuits

    CERN Document Server

    Thomas, Roland E; Toussaint, Gregory J

    2009-01-01

    The Analysis and Design of Linear Circuits, 6e gives the reader the opportunity to not only analyze, but also design and evaluate linear circuits as early as possible. The text's abundance of problems, applications, pedagogical tools, and realistic examples helps engineers develop the skills needed to solve problems, design practical alternatives, and choose the best design from several competing solutions. Engineers searching for an accessible introduction to resistance circuits will benefit from this book that emphasizes the early development of engineering judgment.

  15. Enhancement of Linear Circuit Program

    DEFF Research Database (Denmark)

    Gaunholt, Hans; Dabu, Mihaela; Beldiman, Octavian

    1996-01-01

    In this report a preliminary user friendly interface has been added to the LCP2 program making it possible to describe an electronic circuit by actually drawing the circuit on the screen. Component values and other options and parameters can easily be set by the aid of the interface. The interface...

  16. Enhancement of Linear Circuit Program

    DEFF Research Database (Denmark)

    Gaunholt, Hans; Dabu, Mihaela; Beldiman, Octavian

    1996-01-01

    In this report a preliminary user friendly interface has been added to the LCP2 program making it possible to describe an electronic circuit by actually drawing the circuit on the screen. Component values and other options and parameters can easily be set by the aid of the interface. The interfac...

  17. Nano integrated circuit process

    Energy Technology Data Exchange (ETDEWEB)

    Yoon, Yung Sup

    2004-02-15

    This book contains nine chapters, which are introduction of manufacture of semiconductor chip, oxidation such as Dry-oxidation, wet oxidation, oxidation model and oxide film, diffusion like diffusion process, diffusion equation, diffusion coefficient and diffusion system, ion implantation, including ion distribution, channeling, multiimplantation and masking and its system, sputtering such as CVD and PVD, lithography, wet etch and dry etch, interconnection and flattening like metal-silicon connection, silicide, multiple layer metal process and flattening, an integrated circuit process, including MOSFET and CMOS.

  18. Diamond Integrated Optomechanical Circuits

    CERN Document Server

    Rath, Patrik; Nebel, Christoph; Wild, Christoph; Pernice, Wolfram H P

    2013-01-01

    Diamond offers unique material advantages for the realization of micro- and nanomechanical resonators due to its high Young's modulus, compatibility with harsh environments and superior thermal properties. At the same time, the wide electronic bandgap of 5.45eV makes diamond a suitable material for integrated optics because of broadband transparency and the absence of free-carrier absorption commonly encountered in silicon photonics. Here we take advantage of both to engineer full-scale optomechanical circuits in diamond thin films. We show that polycrystalline diamond films fabricated by chemical vapour deposition provide a convenient waferscale substrate for the realization of high quality nanophotonic devices. Using free-standing nanomechanical resonators embedded in on-chip Mach-Zehnder interferometers, we demonstrate efficient optomechanical transduction via gradient optical forces. Fabricated diamond resonators reproducibly show high mechanical quality factors up to 11,200. Our low cost, wideband, carri...

  19. Solution methods for very highly integrated circuits.

    Energy Technology Data Exchange (ETDEWEB)

    Nong, Ryan; Thornquist, Heidi K.; Chen, Yao; Mei, Ting; Santarelli, Keith R.; Tuminaro, Raymond Stephen

    2010-12-01

    While advances in manufacturing enable the fabrication of integrated circuits containing tens-to-hundreds of millions of devices, the time-sensitive modeling and simulation necessary to design these circuits poses a significant computational challenge. This is especially true for mixed-signal integrated circuits where detailed performance analyses are necessary for the individual analog/digital circuit components as well as the full system. When the integrated circuit has millions of devices, performing a full system simulation is practically infeasible using currently available Electrical Design Automation (EDA) tools. The principal reason for this is the time required for the nonlinear solver to compute the solutions of large linearized systems during the simulation of these circuits. The research presented in this report aims to address the computational difficulties introduced by these large linearized systems by using Model Order Reduction (MOR) to (i) generate specialized preconditioners that accelerate the computation of the linear system solution and (ii) reduce the overall dynamical system size. MOR techniques attempt to produce macromodels that capture the desired input-output behavior of larger dynamical systems and enable substantial speedups in simulation time. Several MOR techniques that have been developed under the LDRD on 'Solution Methods for Very Highly Integrated Circuits' will be presented in this report. Among those presented are techniques for linear time-invariant dynamical systems that either extend current approaches or improve the time-domain performance of the reduced model using novel error bounds and a new approach for linear time-varying dynamical systems that guarantees dimension reduction, which has not been proven before. Progress on preconditioning power grid systems using multi-grid techniques will be presented as well as a framework for delivering MOR techniques to the user community using Trilinos and the Xyce circuit

  20. Secure integrated circuits and systems

    CERN Document Server

    Verbauwhede, Ingrid MR

    2010-01-01

    On any advanced integrated circuit or 'system-on-chip' there is a need for security. In many applications the actual implementation has become the weakest link in security rather than the algorithms or protocols. The purpose of the book is to give the integrated circuits and systems designer an insight into the basics of security and cryptography from the implementation point of view. As a designer of integrated circuits and systems it is important to know both the state-of-the-art attacks as well as the countermeasures. Optimizing for security is different from optimizations for speed, area,

  1. Modeling digital switching circuits with linear algebra

    CERN Document Server

    Thornton, Mitchell A

    2014-01-01

    Modeling Digital Switching Circuits with Linear Algebra describes an approach for modeling digital information and circuitry that is an alternative to Boolean algebra. While the Boolean algebraic model has been wildly successful and is responsible for many advances in modern information technology, the approach described in this book offers new insight and different ways of solving problems. Modeling the bit as a vector instead of a scalar value in the set {0, 1} allows digital circuits to be characterized with transfer functions in the form of a linear transformation matrix. The use of transf

  2. CADAT integrated circuit mask analysis

    Science.gov (United States)

    1981-01-01

    CADAT System Mask Analysis Program (MAPS2) is automated software tool for analyzing integrated-circuit mask design. Included in MAPS2 functions are artwork verification, device identification, nodal analysis, capacitance calculation, and logic equation generation.

  3. Integrated circuit cooled turbine blade

    Energy Technology Data Exchange (ETDEWEB)

    Lee, Ching-Pang; Jiang, Nan; Um, Jae Y.; Holloman, Harry; Koester, Steven

    2017-08-29

    A turbine rotor blade includes at least two integrated cooling circuits that are formed within the blade that include a leading edge circuit having a first cavity and a second cavity and a trailing edge circuit that includes at least a third cavity located aft of the second cavity. The trailing edge circuit flows aft with at least two substantially 180-degree turns at the tip end and the root end of the blade providing at least a penultimate cavity and a last cavity. The last cavity is located along a trailing edge of the blade. A tip axial cooling channel connects to the first cavity of the leading edge circuit and the penultimate cavity of the trailing edge circuit. At least one crossover hole connects the penultimate cavity to the last cavity substantially near the tip end of the blade.

  4. Integrated Circuits for Avionics

    Science.gov (United States)

    1989-10-01

    Filters A linear phase filter is one with a phase shift which is a linear function of frequency resulting in a constant time delay for all frequency...components. For a linear phase filter , the coefficients are symmetrical which permits a realization that is more efficient than the direct form. Since h(i...h(N- I -i), the implementation of a linear phase filter can be obtained as shown in Fig. 2.3. By taking advantage of the symmetry of coefficients

  5. Variational integrators for electric circuits

    Energy Technology Data Exchange (ETDEWEB)

    Ober-Blöbaum, Sina, E-mail: sinaob@math.upb.de [Computational Dynamics and Optimal Control, University of Paderborn (Germany); Tao, Molei [Courant Institute of Mathematical Sciences, New York University (United States); Cheng, Mulin [Applied and Computational Mathematics, California Institute of Technology (United States); Owhadi, Houman; Marsden, Jerrold E. [Control and Dynamical Systems, California Institute of Technology (United States); Applied and Computational Mathematics, California Institute of Technology (United States)

    2013-06-01

    In this contribution, we develop a variational integrator for the simulation of (stochastic and multiscale) electric circuits. When considering the dynamics of an electric circuit, one is faced with three special situations: 1. The system involves external (control) forcing through external (controlled) voltage sources and resistors. 2. The system is constrained via the Kirchhoff current (KCL) and voltage laws (KVL). 3. The Lagrangian is degenerate. Based on a geometric setting, an appropriate variational formulation is presented to model the circuit from which the equations of motion are derived. A time-discrete variational formulation provides an iteration scheme for the simulation of the electric circuit. Dependent on the discretization, the intrinsic degeneracy of the system can be canceled for the discrete variational scheme. In this way, a variational integrator is constructed that gains several advantages compared to standard integration tools for circuits; in particular, a comparison to BDF methods (which are usually the method of choice for the simulation of electric circuits) shows that even for simple LCR circuits, a better energy behavior and frequency spectrum preservation can be observed using the developed variational integrator.

  6. SEMICONDUCTOR INTEGRATED CIRCUITS A 900 MHz, 21 dBm CMOS linear power amplifier with 35% PAE for RFID readers

    Science.gov (United States)

    Kefeng, Han; Shengguo, Cao; Xi, Tan; Na, Yan; Junyu, Wang; Zhangwen, Tang; Hao, Min

    2010-12-01

    A two-stage differential linear power amplifier (PA) fabricated by 0.18 μm CMOS technology is presented. An output matching and harmonic termination network is exploited to enhance the output power, efficiency and harmonic performance. Measurements show that the designed PA reaches a saturated power of 21.1 dBm and the peak power added efficiency (PAE) is 35.4%, the power gain is 23.3 dB from a power supply of 1.8 V and the harmonics are well controlled. The total area with ESD protected PAD is 1.2 × 0.55 mm2. System measurements also show that this power amplifier meets the design specifications and can be applied for RFID reader.

  7. Vertically Integrated Circuits at Fermilab

    Energy Technology Data Exchange (ETDEWEB)

    Deptuch, Grzegorz; Demarteau, Marcel; Hoff, James; Lipton, Ronald; Shenai, Alpana; Trimpl, Marcel; Yarema, Raymond; Zimmerman, Tom; /Fermilab

    2009-01-01

    The exploration of the vertically integrated circuits, also commonly known as 3D-IC technology, for applications in radiation detection started at Fermilab in 2006. This paper examines the opportunities that vertical integration offers by looking at various 3D designs that have been completed by Fermilab. The emphasis is on opportunities that are presented by through silicon vias (TSV), wafer and circuit thinning and finally fusion bonding techniques to replace conventional bump bonding. Early work by Fermilab has led to an international consortium for the development of 3D-IC circuits for High Energy Physics. The consortium has submitted over 25 different designs for the Fermilab organized MPW run organized for the first time.

  8. Delay locked loop integrated circuit.

    Energy Technology Data Exchange (ETDEWEB)

    Brocato, Robert Wesley

    2007-10-01

    This report gives a description of the development of a Delay Locked Loop (DLL) integrated circuit (IC). The DLL was developed and tested as a stand-alone IC test chip to be integrated into a larger application specific integrated circuit (ASIC), the Quadrature Digital Waveform Synthesizer (QDWS). The purpose of the DLL is to provide a digitally programmable delay to enable synchronization between an internal system clock and external peripherals with unknown clock skew. The DLL was designed and fabricated in the IBM 8RF process, a 0.13 {micro}m CMOS process. It was designed to operate with a 300MHz clock and has been tested up to 500MHz.

  9. Radio frequency integrated circuit design

    CERN Document Server

    Rogers, John W M

    2010-01-01

    This newly revised and expanded edition of the 2003 Artech House classic, Radio Frequency Integrated Circuit Design, serves as an up-to-date, practical reference for complete RFIC know-how. The second edition includes numerous updates, including greater coverage of CMOS PA design, RFIC design with on-chip components, and more worked examples with simulation results. By emphasizing working designs, this book practically transports you into the authors' own RFIC lab so you can fully understand the function of each design detailed in this book. Among the RFIC designs examined are RF integrated LC

  10. High-linearity CMOS RF front-end circuits

    CERN Document Server

    Ding, Yongwang

    2005-01-01

    This monograph presents techniques to improve the performance of linear integrated circuits (IC) in CMOS at high frequencies. Those circuits are primarily used in radio-frequency (RF) front-ends of wireless communication systems, such as low noise amplifiers (LNA) and mixers in a receiver and power amplifiers (PA) in a transmitter. A novel linearization technique is presented. With a small trade-off of gain and power consumption this technique can improve the linearity of the majority of circuits by tens of dB. Particularly, for modern CMOS processes, most of which has device matching better than 1%, the distortion can be compressed by up to 40 dB at the output. A prototype LNA has been fabricated in a 0.25um CMOS process, with a measured +18 dBm IIP3. This technique improves the dynamic range of a receiver RF front-end by 12 dB. A new class of power amplifier (parallel class A&B) is also presented to extend the linear operation range and save the DC power consumption. It has been shown by both simulation...

  11. High Performance Linear 288×4 CMOS Readout Integrated Circuit with Time-Delay-Integration%具备时间延迟积分的高性能线阵288×4 CMOS读出电路

    Institute of Scientific and Technical Information of China (English)

    高峻; 鲁文高; 刘菁; 唐矩; 崔文涛; 赵宝瑛; 陈中建; 吉利久

    2004-01-01

    描述了一种高性能CMOS线阵288×4读出电路的设计.该读出电路是一个大规模混合信号电路,集成了时间延迟积分以提高信噪比,实现了缺陷像素剔除以提高阵列的可靠性.其他特征包括积分时间可调,多级增益,双向扫描,超采样,以及内建电测试.该芯片采用1.2μm双层多晶硅双层金属CMOS工艺.测量得到的总功耗约为24mW,工作电压5V.%A high performance CMOS linear 288×4 readout integrated circuit(ROIC)is detailed in this paper.It is a large-scale mixed-signal circuit with time-delay integration(TDI)function to enhance the signal to noise ratio(S/N),and defective element deselection(DED)function to decrease the probability of bad columns.The other features include adjustable integration time,multi gain,bi-direction of TDI scan,super-sample,and electrical test.Digital I/O ports are designed to control its work mode.It is fabricated using 1.2μm double poly double metal(DPDM)CMOS technology.The measured power consume is about 24mW at 5 V supply.

  12. Parallel sparse direct solver for integrated circuit simulation

    CERN Document Server

    Chen, Xiaoming; Yang, Huazhong

    2017-01-01

    This book describes algorithmic methods and parallelization techniques to design a parallel sparse direct solver which is specifically targeted at integrated circuit simulation problems. The authors describe a complete flow and detailed parallel algorithms of the sparse direct solver. They also show how to improve the performance by simple but effective numerical techniques. The sparse direct solver techniques described can be applied to any SPICE-like integrated circuit simulator and have been proven to be high-performance in actual circuit simulation. Readers will benefit from the state-of-the-art parallel integrated circuit simulation techniques described in this book, especially the latest parallel sparse matrix solution techniques. · Introduces complicated algorithms of sparse linear solvers, using concise principles and simple examples, without complex theory or lengthy derivations; · Describes a parallel sparse direct solver that can be adopted to accelerate any SPICE-like integrated circuit simulato...

  13. Graphene radio frequency receiver integrated circuit.

    Science.gov (United States)

    Han, Shu-Jen; Garcia, Alberto Valdes; Oida, Satoshi; Jenkins, Keith A; Haensch, Wilfried

    2014-01-01

    Graphene has attracted much interest as a future channel material in radio frequency electronics because of its superior electrical properties. Fabrication of a graphene integrated circuit without significantly degrading transistor performance has proven to be challenging, posing one of the major bottlenecks to compete with existing technologies. Here we present a fabrication method fully preserving graphene transistor quality, demonstrated with the implementation of a high-performance three-stage graphene integrated circuit. The circuit operates as a radio frequency receiver performing signal amplification, filtering and downconversion mixing. All circuit components are integrated into 0.6 mm(2) area and fabricated on 200 mm silicon wafers, showing the unprecedented graphene circuit complexity and silicon complementary metal-oxide-semiconductor process compatibility. The demonstrated circuit performance allow us to use graphene integrated circuit to perform practical wireless communication functions, receiving and restoring digital text transmitted on a 4.3-GHz carrier signal.

  14. Long-wavelength silicon photonic integrated circuits

    OpenAIRE

    2014-01-01

    In this paper we elaborate on our development of silicon photonic integrated circuits operating at wavelengths beyond the telecommunication wavelength window. Silicon-on-insulator waveguide circuits up to 3.8 mu m wavelength are demonstrated as well as germanium-on-silicon waveguide circuits operating in the 5-5 mu m wavelength range. The heterogeneous integration of III-V semiconductors and IV-VI semiconductors on this platform is described for the integration of lasers and photodetectors op...

  15. Scaling of graphene integrated circuits

    Science.gov (United States)

    Bianchi, Massimiliano; Guerriero, Erica; Fiocco, Marco; Alberti, Ruggero; Polloni, Laura; Behnam, Ashkan; Carrion, Enrique A.; Pop, Eric; Sordan, Roman

    2015-04-01

    The influence of transistor size reduction (scaling) on the speed of realistic multi-stage integrated circuits (ICs) represents the main performance metric of a given transistor technology. Despite extensive interest in graphene electronics, scaling efforts have so far focused on individual transistors rather than multi-stage ICs. Here we study the scaling of graphene ICs based on transistors from 3.3 to 0.5 μm gate lengths and with different channel widths, access lengths, and lead thicknesses. The shortest gate delay of 31 ps per stage was obtained in sub-micron graphene ROs oscillating at 4.3 GHz, which is the highest oscillation frequency obtained in any strictly low-dimensional material to date. We also derived the fundamental Johnson limit, showing that scaled graphene ICs could be used at high frequencies in applications with small voltage swing.The influence of transistor size reduction (scaling) on the speed of realistic multi-stage integrated circuits (ICs) represents the main performance metric of a given transistor technology. Despite extensive interest in graphene electronics, scaling efforts have so far focused on individual transistors rather than multi-stage ICs. Here we study the scaling of graphene ICs based on transistors from 3.3 to 0.5 μm gate lengths and with different channel widths, access lengths, and lead thicknesses. The shortest gate delay of 31 ps per stage was obtained in sub-micron graphene ROs oscillating at 4.3 GHz, which is the highest oscillation frequency obtained in any strictly low-dimensional material to date. We also derived the fundamental Johnson limit, showing that scaled graphene ICs could be used at high frequencies in applications with small voltage swing. Electronic supplementary information (ESI) available: Discussions on the cutoff frequency fT, the maximum frequency of oscillation fmax, and the intrinsic gate delay CV/I. See DOI: 10.1039/c5nr01126d

  16. On Multiplicative Linear Logic, Modality and Quantum Circuits

    Directory of Open Access Journals (Sweden)

    Ugo Dal Lago

    2012-10-01

    Full Text Available A logical system derived from linear logic and called QMLL is introduced and shown able to capture all unitary quantum circuits. Conversely, any proof is shown to compute, through a concrete GoI interpretation, some quantum circuits. The system QMLL, which enjoys cut-elimination, is obtained by endowing multiplicative linear logic with a quantum modality.

  17. A linear circuit analysis program with stiff systems capability

    Science.gov (United States)

    Cook, C. H.; Bavuso, S. J.

    1973-01-01

    Several existing network analysis programs have been modified and combined to employ a variable topological approach to circuit translation. Efficient numerical integration techniques are used for transient analysis.

  18. Active components for integrated plasmonic circuits

    DEFF Research Database (Denmark)

    Krasavin, A.V.; Bolger, P.M.; Zayats, A.V.;

    2009-01-01

    We present a comprehensive study of highly efficient and compact passive and active components for integrated plasmonic circuit based on dielectric-loaded surface plasmon polariton waveguides.......We present a comprehensive study of highly efficient and compact passive and active components for integrated plasmonic circuit based on dielectric-loaded surface plasmon polariton waveguides....

  19. Frequency and Phase Noise in Non-Linear Microwave Oscillator Circuits

    OpenAIRE

    Tannous, C.

    2003-01-01

    We have developed a new methodology and a time-domain software package for the estimation of the oscillation frequency and the phase noise spectrum of non-linear noisy microwave circuits based on the direct integration of the system of stochastic differential equations representing the circuit. Our theoretical evaluations can be used in order to make detailed comparisons with the experimental measurements of phase noise spectra in selected oscillating circuits.

  20. Superconducting single photon detectors integrated with diamond nanophotonic circuits

    CERN Document Server

    Rath, Patrik; Ferrari, Simone; Sproll, Fabian; Lewes-Malandrakis, Georgia; Brink, Dietmar; Ilin, Konstantin; Siegel, Michael; Nebel, Christoph; Pernice, Wolfram

    2015-01-01

    Photonic quantum technologies promise to repeat the success of integrated nanophotonic circuits in non-classical applications. Using linear optical elements, quantum optical computations can be performed with integrated optical circuits and thus allow for overcoming existing limitations in terms of scalability. Besides passive optical devices for realizing photonic quantum gates, active elements such as single photon sources and single photon detectors are essential ingredients for future optical quantum circuits. Material systems which allow for the monolithic integration of all components are particularly attractive, including III-V semiconductors, silicon and also diamond. Here we demonstrate nanophotonic integrated circuits made from high quality polycrystalline diamond thin films in combination with on-chip single photon detectors. Using superconducting nanowires coupled evanescently to travelling waves we achieve high detection efficiencies up to 66 % combined with low dark count rates and timing resolu...

  1. A Novel Design Of An NTC Thermistor Linearization Circuit

    Directory of Open Access Journals (Sweden)

    Lukić Jelena

    2015-09-01

    Full Text Available A novel design of a circuit used for NTC thermistor linearization is proposed. The novelty of the proposed design consists in a specific combination of two linearization circuits, a serial-parallel resistive voltage divider and a two-stage piecewise linear analog-to-digital converter. At the output of the first linearization circuit the quasi-linear voltage is obtained. To remove the residual voltage nonlinearity, the second linearization circuit, i.e., a two-stage piecewise linear analog-to-digital converter is employed. This circuit is composed of two flash analog-to-digital converters. The first analog-to-digital converter is piecewise linear and it is actually performing the linearization, while the second analog-to-digital converter is linear and it is performing the reduction of the quantization error introduced by the first converter. After the linearization is performed, the maximal absolute value of a difference between the measured and real temperatures is 0.014°C for the temperature range between −25 and 75°C, and 0.001°C for the temperature range between 10 and 40°C.

  2. Microcontroller based Integrated Circuit Tester

    Directory of Open Access Journals (Sweden)

    Yousif Taha Yousif Elamin

    2015-02-01

    Full Text Available The digital integrated circuit (IC tester is implemented by using the ATmega32 microcontroller . The microcontroller processes the inputs and outputs and displays the results on a Liquid Crystal Display (LCD. The basic function of the digital IC tester is to test a digital IC for correct logical functioning as described in the truth table and/or function table. The designed model can test digital ICs having 14 pins. Since it is programmable, any number of ICs can be tested . This model applies the necessary signals to the inputs of the IC, monitoring the outputs at each stage and comparing them with the outputs in the truth table. Any discrepancy in the functioning of the IC results in a fail indication, displays the faulty and good gates on the LCD. The testing procedure is accomplished with the help of keypad keys present on the main board design. The test has been accomplished with most commonly used digital IC's, mainly belonging to the 74 series. Digital IC tester tests three samples of IC's ( NAND, NOT, NOR. The design is flexible . We can add extra IC bases and subroutines to test any other IC in the 74 series.

  3. Wafer-scale graphene integrated circuit.

    Science.gov (United States)

    Lin, Yu-Ming; Valdes-Garcia, Alberto; Han, Shu-Jen; Farmer, Damon B; Meric, Inanc; Sun, Yanning; Wu, Yanqing; Dimitrakopoulos, Christos; Grill, Alfred; Avouris, Phaedon; Jenkins, Keith A

    2011-06-10

    A wafer-scale graphene circuit was demonstrated in which all circuit components, including graphene field-effect transistor and inductors, were monolithically integrated on a single silicon carbide wafer. The integrated circuit operates as a broadband radio-frequency mixer at frequencies up to 10 gigahertz. These graphene circuits exhibit outstanding thermal stability with little reduction in performance (less than 1 decibel) between 300 and 400 kelvin. These results open up possibilities of achieving practical graphene technology with more complex functionality and performance.

  4. Analog VLSI neural network integrated circuits

    Science.gov (United States)

    Kub, F. J.; Moon, K. K.; Just, E. A.

    1991-01-01

    Two analog very large scale integration (VLSI) vector matrix multiplier integrated circuit chips were designed, fabricated, and partially tested. They can perform both vector-matrix and matrix-matrix multiplication operations at high speeds. The 32 by 32 vector-matrix multiplier chip and the 128 by 64 vector-matrix multiplier chip were designed to perform 300 million and 3 billion multiplications per second, respectively. An additional circuit that has been developed is a continuous-time adaptive learning circuit. The performance achieved thus far for this circuit is an adaptivity of 28 dB at 300 KHz and 11 dB at 15 MHz. This circuit has demonstrated greater than two orders of magnitude higher frequency of operation than any previous adaptive learning circuit.

  5. RF Circuit linearity optimization using a general weak nonlinearity model

    NARCIS (Netherlands)

    Cheng, W.; Oude Alink, M.S.; Annema, Anne J.; Croon, Jeroen A.; Nauta, Bram

    2012-01-01

    This paper focuses on optimizing the linearity in known RF circuits, by exploring the circuit design space that is usually available in today’s deep submicron CMOS technologies. Instead of using brute force numerical optimizers we apply a generalized weak nonlinearity model that only involves AC

  6. The two independent equations of circuits in integral form of field theory: The fundamental law of circuits

    Institute of Scientific and Technical Information of China (English)

    CHEN Shennian

    2005-01-01

    Circuit theory is an extremely important basic theory in electrical and electronic sciences and technologies. Over more than a century, researchers have come to the conclusion that a fundamental law of circuits needs to satisfy the following three conditions: (1) Independency. It must be able to solve independently the basic problems of general solutions to the distribution of current and voltage in circuits. (2)Fundamentality. It cannot be derived from circuit theory and it must be the starting point for the establishment of circuit theory; it deduces the problem relevant to circuit theory by using purely logical inference, and establishes circuit theory into an independent deductive system. (3) Applicability. It must be widely applicable to all spheres of circuits,which includes sinusoidal steady-state linear and nonlinear networks, non-sinusoidal steady-state linear and nonlinear networks, transient-state processes, etc. From all networks to which the fundamental law of circuits applies, sinusoidal steady-state linear network is chosen as the most basic one to demonstrate that the two independent equations of circuits in integral form derived from Maxwell equations are able to meet these three conditions. Consequently, it is believed to be the fundamental law of circuits newly recognized today. This paper also makes the initiative to establish a circuit theory by which the basic rules of electromagnetic field govern the circuits, and the unity of electromagnetic fields and circuits is achieved.

  7. Silicon integrated circuits part A : supplement 2

    CERN Document Server

    Kahng, Dawon

    1981-01-01

    Applied Solid State Science, Supplement 2: Silicon Integrated Circuits, Part A focuses on MOS device physics. This book is divided into three chapters-physics of the MOS transistor; nonvolatile memories; and properties of silicon-on-sapphire substrates devices, and integrated circuits. The topics covered include the short channel effects, MOSFET structures, floating gate devices, technology for nonvolatile semiconductor memories, sapphire substrates, and SOS integrated circuits and systems. The MOS capacitor, MIOS devices, and SOS process and device technology are also deliberated. This public

  8. Semiconductors integrated circuit design for manufacturability

    CERN Document Server

    Balasinki, Artur

    2011-01-01

    Because of the continuous evolution of integrated circuit manufacturing (ICM) and design for manufacturability (DfM), most books on the subject are obsolete before they even go to press. That's why the field requires a reference that takes the focus off of numbers and concentrates more on larger economic concepts than on technical details. Semiconductors: Integrated Circuit Design for Manufacturability covers the gradual evolution of integrated circuit design (ICD) as a basis to propose strategies for improving return-on-investment (ROI) for ICD in manufacturing. Where most books put the spotl

  9. Linear circuit transfer functions an introduction to fast analytical techniques

    CERN Document Server

    Basso, Christophe P

    2016-01-01

    Linear Circuit Transfer Functions: An introduction to Fast Analytical Techniques teaches readers how to determine transfer functions of linear passive and active circuits by applying Fast Analytical Circuits Techniques. Building on their existing knowledge of classical loop/nodal analysis, the book improves and expands their skills to unveil transfer functions in a swift and efficient manner. Starting with simple examples, the author explains step-by-step how expressing circuits time constants in different configurations leads to writing transfer functions in a compact and insightful way. By learning how to organize numerators and denominators in the fastest possible way, readers will speed-up analysis and predict the frequency resp nse of simple to complex circuits. In some cases, they will be able to derive the final expression by inspection, without writing a line of algebra. Key features: * Emphasizes analysis through employing time constant-based methods discussed in other text books but not widely us...

  10. Optimization of linear parametric circuits by the control of stability

    Directory of Open Access Journals (Sweden)

    Yu. I. Shapovalov

    2013-07-01

    Full Text Available Introduction. A brief description of the symbolic frequency method for linear parametric circuit analysis is adduced. In particular it comes to parametric transfer functions and assessment of asymptotic stability of such circuits. The formulation of optimization task. The objective function formation is done via two functions - the function of goal defined by desirable circuit characteristics (goal of optimization and function characteristics of circuit defined by the selected values of the varied parameters during optimization of electrical circuit characteristics. The coincidence degree of these two functions is objective function which is formed on their basis by the chosen method. The procedure of optimization. The solution of optimization task is determining the values с0* and m* that provide minimum value of objective function, satisfy the condition of circuit stability and conditions of physical parametric element realizability Example. There is example of single-circuit parametric amplifier optimization using the objective function based on the calculation of parametric circuit transfer function with a symbolic representation of the parametric capacity parameters. Conclusions. Frequency symbolic analysis method allows solving optimization task of parametric linear circuits designing in the frequency domain based on use of the frequency symbolic transfer functions which are approximated by trigonometric polynomials of Fourier, particularly in complex form.

  11. Lateral power transistors in integrated circuits

    CERN Document Server

    Erlbacher, Tobias

    2014-01-01

    This book details and compares recent advancements in the development of novel lateral power transistors (LDMOS devices) for integrated circuits in power electronic applications. It includes the state-of-the-art concept of double-acting RESURF topologies.

  12. Radio-frequency integrated-circuit engineering

    CERN Document Server

    Nguyen, Cam

    2015-01-01

    Radio-Frequency Integrated-Circuit Engineering addresses the theory, analysis and design of passive and active RFIC's using Si-based CMOS and Bi-CMOS technologies, and other non-silicon based technologies. The materials covered are self-contained and presented in such detail that allows readers with only undergraduate electrical engineering knowledge in EM, RF, and circuits to understand and design RFICs. Organized into sixteen chapters, blending analog and microwave engineering, Radio-Frequency Integrated-Circuit Engineering emphasizes the microwave engineering approach for RFICs. Provide

  13. Integrated Circuit Stellar Magnitude Simulator

    Science.gov (United States)

    Blackburn, James A.

    1978-01-01

    Describes an electronic circuit which can be used to demonstrate the stellar magnitude scale. Six rectangular light-emitting diodes with independently adjustable duty cycles represent stars of magnitudes 1 through 6. Experimentally verifies the logarithmic response of the eye. (Author/GA)

  14. Handbook of microwave integrated circuits

    Science.gov (United States)

    Hoffmann, Reinmut K.

    The design and operation of ICs for use in the 0.5-20-GHz range are described in an introductory and reference work for industrial engineers. Chapters are devoted to an overview of microwave IC (MIC) technology, general stripline characteristics, microwave transmission line (MTL) parameters for microstrips with isotropic dielectric substrates, higher-order modes on a microstrip, the effects of metallic enclosure on MTL transmission parameters, losses in microstrips, the measurement of MTL parameters, and MTLs on anisotropic dielectric substrates. Consideration is given to coupled microstrips on dielectric substrates, microstrip discontinuities, radiation from microstrip circuits, MTL variations, coplanar MTLs, slotlines, and spurious modes in MTL circuits. Diagrams, drawings, graphs, and a glossary of symbols are provided.

  15. Experimental Device for Learning of Logical Circuit Design using Integrated Circuits

    OpenAIRE

    石橋, 孝昭

    2012-01-01

    This paper presents an experimental device for learning of logical circuit design using integrated circuits and breadboards. The experimental device can be made at a low cost and can be used for many subjects such as logical circuits, computer engineering, basic electricity, electrical circuits and electronic circuits. The proposed device is effective to learn the logical circuits than the usual lecture.

  16. NQR Spectrometer with a Two Integrated Circuits Radio Frequency Head

    Science.gov (United States)

    Zikumaru, Yushi

    1990-04-01

    An NQR spectrometer has been constructed using two linear integrated circuits in its oscillator-detector. This is very simple and compact and works in range 3-65 MHz. The radio frequency voltage can be varied from 10 mVp-p to 15 V p-p by changing the supply-voltage of an integrated circuit μA 733. The utility of the spectrometer is demonstrated by recording 35Cl NQR spectra in p-C6H4Cl2 , NaClO3 , and KClO3 .

  17. Progress in organic integrated circuit manufacture

    Science.gov (United States)

    Taylor, D. Martin

    2016-02-01

    This review article focuses on the development of processes for the manufacture of organic electronic circuits. Beginning with the first report of an organic transistor it highlights the key developments leading to the successful manufacture of microprocessors and other complex circuits incorporating organic transistors. Both batch processing (based on silicon integrated circuit technology) as well as mass-printing, roll-to-roll (R2R) approaches are discussed. Currently, the best circuit performances are achieved using batch processing. It is suggested that an emerging, large mass-market for electronic tags may dictate that R2R manufacture will likely be required to meet the high throughput rates needed. However, significant improvements in resolution and registration are necessary to achieve increased circuit operating speeds.

  18. Electronic circuits and systems: A compilation. [including integrated circuits, logic circuits, varactor diode circuits, low pass filters, and optical equipment circuits

    Science.gov (United States)

    1975-01-01

    Technological information is presented electronic circuits and systems which have potential utility outside the aerospace community. Topics discussed include circuit components such as filters, converters, and integrators, circuits designed for use with specific equipment or systems, and circuits designed primarily for use with optical equipment or displays.

  19. Experimental Demonstration of a Quantum Circuit using Linear Optics Gates

    CERN Document Server

    Pittman, T B; Franson, J D

    2004-01-01

    Probabilistic quantum logic gates can be constructed using linear optical elements, ancilla photons, and post-selection based on the results of measurements. Here we describe an experimental demonstration of a simple quantum circuit that combines two exclusive-OR (XOR) logic gates of that kind. Although circuits using XOR gates are not reversible, they may still be useful in a variety of applications such as generating non-classical states of light.

  20. Utilization of MATLAB in Simulation of Linear Hybrid Circuits

    OpenAIRE

    BRANCIK, L.

    2003-01-01

    In the paper a MATLAB-based method for simulating transient phenomena in linear hybrid circuits containing parts with both lumped and distributed parameters is presented. Distributed parts of the circuit are multiconductor transmission lines, which can generally be nonuniform, with frequency-dependent parameters, and under nonzero initial voltage and/or current distributions. In principle a solution is formulated using the modified nodal analysis method in the frequency domain. Subsequently a...

  1. Maximum Temperature Detection System for Integrated Circuits

    Science.gov (United States)

    Frankiewicz, Maciej; Kos, Andrzej

    2015-03-01

    The paper describes structure and measurement results of the system detecting present maximum temperature on the surface of an integrated circuit. The system consists of the set of proportional to absolute temperature sensors, temperature processing path and a digital part designed in VHDL. Analogue parts of the circuit where designed with full-custom technique. The system is a part of temperature-controlled oscillator circuit - a power management system based on dynamic frequency scaling method. The oscillator cooperates with microprocessor dedicated for thermal experiments. The whole system is implemented in UMC CMOS 0.18 μm (1.8 V) technology.

  2. Physical limits for scaling of integrated circuits

    Science.gov (United States)

    Nawrocki, Waldemar

    2010-11-01

    In this paper we discuss some physical limits for scaling of devices and conducting paths inside of semiconductor integrated circuits (ICs). Since 40 years only a semiconductor technology, mostly the CMOS and the TTL technologies, are used for fabrication of integrated circuits in the industrial scale. Miniaturization of electronic devices in integrated circuits has technological limits and physical limits as well. In 2010 best parameters of commercial ICs shown the dual-core Intel Core i5-670 processor manufactured in the technology of 32 nm. Its clock frequency in turbo mode is 3.73 GHz. A forecast of the development of the semiconductor industry (ITRS 2009) predicts that sizes of electronic devices in ICs circuits will be smaller than 10 nm in the next 10 years. The physical gate length in a MOSFET will even amount 7 nm in the year 2024. At least 5 physical effects should be taken into account if we discuss limits of scaling of integrated circuits.

  3. Millimeter And Submillimeter-Wave Integrated Circuits On Quartz

    Science.gov (United States)

    Mehdi, Imran; Mazed, Mohammad; Siegel, Peter; Smith, R. Peter

    1995-01-01

    Proposed Quartz substrate Upside-down Integrated Device (QUID) relies on UV-curable adhesive to bond semiconductor with quartz. Integrated circuits including planar GaAs Schottky diodes and passive circuit elements (such as bandpass filters) fabricated on quartz substrates. Circuits designed to operate as mixers in waveguide circuit at millimeter and submillimeter wavelengths. Integrated circuits mechanically more robust, larger, and easier to handle than planar Schottky diode chips. Quartz substrate more suitable for waveguide circuits than GaAs substrate.

  4. Human-friendly organic integrated circuits

    Directory of Open Access Journals (Sweden)

    Tsuyoshi Sekitani

    2011-09-01

    Full Text Available Many electronic systems such as flat-panel displays, optical detectors, and sensor arrays would benefit greatly from mechanical flexibility. Ultraflexible and foldable electronics demonstrate ultimate flexibility, and are highly portable. A major obstacle toward the development of foldable electronics is the fundamental compromise between operation voltage, transistor performance, and mechanical flexibility. This review describes foldable and conformable integrated circuits based on organic thin-film transistors (TFTs with very high mechanical stability. We review our work on such transistors and integrated circuits, that continue to operate without failure, without detectable degradation during folding of the plastic substrate.

  5. A parallel linear system solver for circuit simulation problems

    NARCIS (Netherlands)

    Bomhof, W.; Vorst, H.A. van der

    2001-01-01

    This paper presents a parallel mixed direct/iterative method for solving linear systems Ax = b arising from circuit simulation. The systems are solved by a block LU factorization with an iterative method for the Schur complement. The Schur complement is a small and rather dense matrix. Direct LU

  6. Classical Conditioning with Pulsed Integrated Neural Networks: Circuits and System

    DEFF Research Database (Denmark)

    Lehmann, Torsten

    1998-01-01

    In this paper we investigate on-chip learning for pulsed, integrated neural networks. We discuss the implementational problems the technology imposes on learning systems and we find that abiologically inspired approach using simple circuit structures is most likely to bring success. We develop...... a suitable learning algorithm -- a continuous-time version of a temporal differential Hebbian learning algorithm for pulsed neural systems with non-linear synapses -- as well as circuits for the electronic implementation. Measurements from an experimental CMOS chip are presented. Finally, we use our test...

  7. Design of Integrated Circuits Approaching Terahertz Frequencies

    DEFF Research Database (Denmark)

    Yan, Lei

    In this thesis, monolithic microwave integrated circuits(MMICs) are presented for millimeter-wave and submillimeter-wave or terahertz(THz) applications. Millimeter-wave power generation from solid state devices is not only crucial for the emerging high data rate wireless communications but also...

  8. Bottom-up organic integrated circuits

    NARCIS (Netherlands)

    Smits, Edsger C. P.; Mathijssen, Simon G. J.; van Hal, Paul A.; Setayesh, Sepas; Geuns, Thomas C. T.; Mutsaers, Kees A. H. A.; Cantatore, Eugenio; Wondergem, Harry J.; Werzer, Oliver; Resel, Roland; Kemerink, Martijn; Kirchmeyer, Stephan; Muzafarov, Aziz M.; Ponomarenko, Sergei A.; de Boer, Bert; Blom, Paul W. M.; de Leeuw, Dago M.

    2008-01-01

    Self- assembly - the autonomous organization of components into patterns and structures(1) - is a promising technology for the mass production of organic electronics. Making integrated circuits using a bottom- up approach involving self- assembling molecules was proposed(2) in the 1970s. The basic b

  9. Bioluminescent bioreporter integrated circuit detection methods

    Energy Technology Data Exchange (ETDEWEB)

    Simpson, Michael L.; Paulus, Michael J.; Sayler, Gary S.; Applegate, Bruce M.; Ripp, Steven A.

    2005-06-14

    Disclosed are monolithic bioelectronic devices comprising a bioreporter and an OASIC. These bioluminescent bioreporter integrated circuit are useful in detecting substances such as pollutants, explosives, and heavy-metals residing in inhospitable areas such as groundwater, industrial process vessels, and battlefields. Also disclosed are methods and apparatus for detection of particular analytes, including ammonia and estrogen compounds.

  10. LC Quadrature Generation in Integrated Circuits

    DEFF Research Database (Denmark)

    Christensen, Kåre Tais

    2001-01-01

    Today quadrature signals for IQ demodulation are provided through RC polyphase networks, quadrature oscillators or double frequency VCOs. This paper presents a new method for generating quadrature signals in integrated circuits using only inductors and capacitors. This LC quadrature generation me...

  11. Integrated Circuits in the Introductory Electronics Laboratory

    Science.gov (United States)

    English, Thomas C.; Lind, David A.

    1973-01-01

    Discusses the use of an integrated circuit operational amplifier in an introductory electronics laboratory course for undergraduate science majors. The advantages of this approach and the implications for scientific instrumentation are identified. Describes a number of experiments suitable for the undergraduate laboratory. (Author/DF)

  12. Silicon Photonic Integrated Circuit Mode Multiplexer

    DEFF Research Database (Denmark)

    Ding, Yunhong; Ou, Haiyan; Xu, Jing

    2013-01-01

    We propose and demonstrate a novel silicon photonic integrated circuit enabling multiplexing of orthogonal modes in a few-mode fiber (FMF). By selectively launching light to four vertical grating couplers, all six orthogonal spatial and polarization modes supported by the FMF are successfully...

  13. Accurate Electromagnetic Modeling Methods for Integrated Circuits

    NARCIS (Netherlands)

    Sheng, Z.

    2010-01-01

    The present development of modern integrated circuits (IC’s) is characterized by a number of critical factors that make their design and verification considerably more difficult than before. This dissertation addresses the important questions of modeling all electromagnetic behavior of features on t

  14. Data readout system utilizing photonic integrated circuit

    Energy Technology Data Exchange (ETDEWEB)

    Stopiński, S., E-mail: S.Stopinski@tue.nl [COBRA Research Institute, Eindhoven University of Technology (Netherlands); Institute of Microelectronics and Optoelectronics, Warsaw University of Technology (Poland); Malinowski, M.; Piramidowicz, R. [Institute of Microelectronics and Optoelectronics, Warsaw University of Technology (Poland); Smit, M.K.; Leijtens, X.J.M. [COBRA Research Institute, Eindhoven University of Technology (Netherlands)

    2013-10-11

    We describe a novel optical solution for data readout systems. The core of the system is an Indium-Phosphide photonic integrated circuit performing as a front-end readout unit. It functions as an optical serializer in which the serialization of the input signal is provided by means of on-chip optical delay lines. The circuit employs electro-optic phase shifters to build amplitude modulators, power splitters for signal distribution, semiconductor optical amplifiers for signal amplification as well as on-chip reflectors. We present the concept of the system, the design and first characterization results of the devices that were fabricated in a multi-project wafer run.

  15. Power management techniques for integrated circuit design

    CERN Document Server

    Chen, Ke-Horng

    2016-01-01

    This book begins with the premise that energy demands are directing scientists towards ever-greener methods of power management, so highly integrated power control ICs (integrated chip/circuit) are increasingly in demand for further reducing power consumption. * A timely and comprehensive reference guide for IC designers dealing with the increasingly widespread demand for integrated low power management * Includes new topics such as LED lighting, fast transient response, DVS-tracking and design with advanced technology nodes * Leading author (Chen) is an active and renowned contributor to the power management IC design field, and has extensive industry experience * Accompanying website includes presentation files with book illustrations, lecture notes, simulation circuits, solution manuals, instructors manuals, and program downloads.

  16. Development of 3D integrated circuits for HEP

    Energy Technology Data Exchange (ETDEWEB)

    Yarema, R.; /Fermilab

    2006-09-01

    Three dimensional integrated circuits are well suited to improving circuit bandwidth and increasing effective circuit density. Recent advances in industry have made 3D integrated circuits an option for HEP. The 3D technology is discussed in this paper and several examples are shown. Design of a 3D demonstrator chip for the ILC is presented.

  17. Electrostatic discharge current linear approach and circuit design method

    Energy Technology Data Exchange (ETDEWEB)

    Katsivelis, P. K.; Fotis, G. P.; Gonos, I. F.; Koussiouris, T. G.; Stathopulos, I. A. [School of Electrical and Computer Engineering, National Technical University of Athens, 9 Iroon Polytechniou Str., Zographou 157 80, Athens (Greece)

    2010-11-15

    The electrostatic discharge (ESD) phenomenon is a great threat to all electronic devices and ICs. An electric charge passing rapidly from a charged body to another can seriously harm the last one. However, there is a lack in a linear mathematical approach which will make it possible to design a circuit capable of producing such a sophisticated current waveform. The commonly accepted electrostatic discharge current waveform is the one set by the IEC 61000-4-2. However, the over-simplified circuit included in the same standard is incapable of producing such a waveform. Treating the electrostatic discharge current waveform of the IEC 61000-4-2 as reference, an approximation method, based on Prony's method, is developed and applied in order to obtain a linear system's response. Considering a known input, a method to design a circuit, able to generate this ESD current waveform in presented. The circuit synthesis assumes ideal active elements. A simulation is carried out using the PSpice software. (authors)

  18. Integrated circuit electrometer and sweep circuitry for an atmospheric probe

    Science.gov (United States)

    Zimmerman, L. E.

    1971-01-01

    The design of electrometer circuitry using an integrated circuit operational amplifier with a MOSFET input is described. Input protection against static voltages is provided by a dual ultra low leakage diode or a neon lamp. Factors affecting frequency response leakage resistance, and current stability are discussed, and methods are suggested for increasing response speed and for eliminating leakage resistance and current instabilities. Based on the above, two practical circuits, one having a linear response and the other a logarithmic response, were designed and evaluated experimentally. The design of a sweep circuit to implement mobility measurements using atmospheric probes is presented. A triangular voltage waveform is generated and shaped to contain a step in voltage from zero volts in both positive and negative directions.

  19. Design of a biochemical circuit motif for learning linear functions.

    Science.gov (United States)

    Lakin, Matthew R; Minnich, Amanda; Lane, Terran; Stefanovic, Darko

    2014-12-06

    Learning and adaptive behaviour are fundamental biological processes. A key goal in the field of bioengineering is to develop biochemical circuit architectures with the ability to adapt to dynamic chemical environments. Here, we present a novel design for a biomolecular circuit capable of supervised learning of linear functions, using a model based on chemical reactions catalysed by DNAzymes. To achieve this, we propose a novel mechanism of maintaining and modifying internal state in biochemical systems, thereby advancing the state of the art in biomolecular circuit architecture. We use simulations to demonstrate that the circuit is capable of learning behaviour and assess its asymptotic learning performance, scalability and robustness to noise. Such circuits show great potential for building autonomous in vivo nanomedical devices. While such a biochemical system can tell us a great deal about the fundamentals of learning in living systems and may have broad applications in biomedicine (e.g. autonomous and adaptive drugs), it also offers some intriguing challenges and surprising behaviours from a machine learning perspective.

  20. An integrator circuit in cerebellar cortex.

    Science.gov (United States)

    Maex, Reinoud; Steuber, Volker

    2013-09-01

    The brain builds dynamic models of the body and the outside world to predict the consequences of actions and stimuli. A well-known example is the oculomotor integrator, which anticipates the position-dependent elasticity forces acting on the eye ball by mathematically integrating over time oculomotor velocity commands. Many models of neural integration have been proposed, based on feedback excitation, lateral inhibition or intrinsic neuronal nonlinearities. We report here that a computational model of the cerebellar cortex, a structure thought to implement dynamic models, reveals a hitherto unrecognized integrator circuit. In this model, comprising Purkinje cells, molecular layer interneurons and parallel fibres, Purkinje cells were able to generate responses lasting more than 10 s, to which both neuronal and network mechanisms contributed. Activation of the somatic fast sodium current by subthreshold voltage fluctuations was able to maintain pulse-evoked graded persistent activity, whereas lateral inhibition among Purkinje cells via recurrent axon collaterals further prolonged the responses to step and sine wave stimulation. The responses of Purkinje cells decayed with a time-constant whose value depended on their baseline spike rate, with integration vanishing at low ( 30 per s). The model predicts that the apparently fast circuit of the cerebellar cortex may control the timing of slow processes without having to rely on sensory feedback. Thus, the cerebellar cortex may contain an adaptive temporal integrator, with the sensitivity of integration to the baseline spike rate offering a potential mechanism of plasticity of the response time-constant.

  1. Tomographic reconstruction of an integrated circuit interconnect

    Energy Technology Data Exchange (ETDEWEB)

    Levine, Z.H. [National Institute of Standards and Technology, Gaithersburg, Maryland 20899 (United States); Kalukin, A.R. [Physics Department, Rensselaer Polytechnic Institute, Troy, New York 12180-3590 (United States); Frigo, S.P.; McNulty, I. [Advanced Photon Source, Argonne National Laboratory, Argonne, Illinois 60439 (United States); Kuhn, M. [Digital Equipment Corporation, Hudson, Massachusetts 01749 (United States)

    1999-01-01

    An Al{endash}W-silica integrated circuit interconnect sample was thinned to several {mu}m and scanned across a 200 nm focal spot of a Fresnel zone plate operating at photon energy of 1573 eV. The experiment was performed on beamline 2-ID-B of the Advanced Photon Source, a third-generation synchrotron facility. Thirteen scanned projections of the sample were acquired over the angular range {plus_minus}69.2{degree}. At least 301{times}301 pixels were acquired at each angle with a step size of 77{times}57 nm. A three-dimensional image with an approximate uncertainty of 400 nm was reconstructed from projection data using a standard algorithm. The two layers of the integrated circuit and the presence of the focused ion beam markers on the surface of the sample are clearly shown in the reconstruction. {copyright} {ital 1999 American Institute of Physics.}

  2. Viewing Integrated-Circuit Interconnections By SEM

    Science.gov (United States)

    Lawton, Russel A.; Gauldin, Robert E.; Ruiz, Ronald P.

    1990-01-01

    Back-scattering of energetic electrons reveals hidden metal layers. Experiment shows that with suitable operating adjustments, scanning electron microscopy (SEM) used to look for defects in aluminum interconnections in integrated circuits. Enables monitoring, in situ, of changes in defects caused by changes in temperature. Gives truer picture of defects, as etching can change stress field of metal-and-passivation pattern, causing changes in defects.

  3. The RD53A Integrated Circuit

    CERN Document Server

    Garcia-Sciveres, Maurice

    2017-01-01

    Implementation details for the RD53A pixel readout integrated circuit designed by the RD53 Collaboration. This is a companion to the specifications document and will eventually become a reference for chip users. RD53A is not intended to be a final production IC for use in an experiment, and contains design variations for testing purposes, making the pixel matrix non-uniform. The chip size is 20.0 mm by 11.8 mm.

  4. Progress in radiation immune thermionic integrated circuits

    Energy Technology Data Exchange (ETDEWEB)

    Lynn, D.K.; McCormick, J.B. (comps.)

    1985-08-01

    This report describes the results of a program directed at evaluating the thermionic integrated circuit (TIC) technology for applicability to military systems. Previous programs under the sponsorship of the Department of Energy, Office of Basic Energy Sciences, have developed an initial TIC technology base and demonstrated operation in high-temperature and high-radiation environments. The program described in this report has two parts: (1) a technical portion in which experiments and analyses were conducted to refine perceptions of near-term as well as ultimate performance levels of the TIC technology and (2) an applications portion in which the technical conclusions were to be evaluated against potential military applications. This report draws several conclusions that strongly suggest that (1) useful radiation-hard/high-temperature operable integrated circuits can be developed using the TIC technology; (2) because of their ability to survive and operate in hostile environments, a variety of potential military applications have been projected for this technology; and (3) based on the above two conclusions, an aggressive TIC development program should be initiated to provide the designers of future systems with integrated circuits and devices with the unique features of the TICs.

  5. Progress in radiation immune thermionic integrated circuits

    Energy Technology Data Exchange (ETDEWEB)

    Lynn, D.K.; McCormick, J.B. (comps.)

    1985-08-01

    This report describes the results of a program directed at evaluating the thermionic integrated circuit (TIC) technology for applicability to military systems. Previous programs under the sponsorship of the Department of Energy, Office of Basic Energy Sciences, have developed an initial TIC technology base and demonstrated operation in high-temperature and high-radiation environments. The program described in this report has two parts: (1) a technical portion in which experiments and analyses were conducted to refine perceptions of near-term as well as ultimate performance levels of the TIC technology and (2) an applications portion in which the technical conclusions were to be evaluated against potential military applications. This report draws several conclusions that strongly suggest that (1) useful radiation-hard/high-temperature operable integrated circuits can be developed using the TIC technology; (2) because of their ability to survive and operate in hostile environments, a variety of potential military applications have been projected for this technology; and (3) based on the above two conclusions, an aggressive TIC development program should be initiated to provide the designers of future systems with integrated circuits and devices with the unique features of the TICs.

  6. STICAP: A linear circuit analysis program with stiff systems capability. Volume 1: Theory manual. [network analysis

    Science.gov (United States)

    Cooke, C. H.

    1975-01-01

    STICAP (Stiff Circuit Analysis Program) is a FORTRAN 4 computer program written for the CDC-6400-6600 computer series and SCOPE 3.0 operating system. It provides the circuit analyst a tool for automatically computing the transient responses and frequency responses of large linear time invariant networks, both stiff and nonstiff (algorithms and numerical integration techniques are described). The circuit description and user's program input language is engineer-oriented, making simple the task of using the program. Engineering theories underlying STICAP are examined. A user's manual is included which explains user interaction with the program and gives results of typical circuit design applications. Also, the program structure from a systems programmer's viewpoint is depicted and flow charts and other software documentation are given.

  7. Power system with an integrated lubrication circuit

    Science.gov (United States)

    Hoff, Brian D.; Akasam, Sivaprasad; Algrain, Marcelo C.; Johnson, Kris W.; Lane, William H.

    2009-11-10

    A power system includes an engine having a first lubrication circuit and at least one auxiliary power unit having a second lubrication circuit. The first lubrication circuit is in fluid communication with the second lubrication circuit.

  8. Total Dose Effects on Bipolar Integrated Circuits at Low Temperature

    Science.gov (United States)

    Johnston, A. H.; Swimm, R. T.; Thorbourn, D. O.

    2012-01-01

    Total dose damage in bipolar integrated circuits is investigated at low temperature, along with the temperature dependence of the electrical parameters of internal transistors. Bandgap narrowing causes the gain of npn transistors to decrease far more at low temperature compared to pnp transistors, due to the large difference in emitter doping concentration. When irradiations are done at temperatures of -140 deg C, no damage occurs until devices are warmed to temperatures above -50 deg C. After warm-up, subsequent cooling shows that damage is then present at low temperature. This can be explained by the very strong temperature dependence of dispersive transport in the continuous-time-random-walk model for hole transport. For linear integrated circuits, low temperature operation is affected by the strong temperature dependence of npn transistors along with the higher sensitivity of lateral and substrate pnp transistors to radiation damage.

  9. Sequential circuit design for radiation hardened multiple voltage integrated circuits

    Science.gov (United States)

    Clark, Lawrence T.; McIver, III, John K.

    2009-11-24

    The present invention includes a radiation hardened sequential circuit, such as a bistable circuit, flip-flop or other suitable design that presents substantial immunity to ionizing radiation while simultaneously maintaining a low operating voltage. In one embodiment, the circuit includes a plurality of logic elements that operate on relatively low voltage, and a master and slave latches each having storage elements that operate on a relatively high voltage.

  10. Integrated Circuits for Analog Signal Processing

    CERN Document Server

    2013-01-01

      This book presents theory, design methods and novel applications for integrated circuits for analog signal processing.  The discussion covers a wide variety of active devices, active elements and amplifiers, working in voltage mode, current mode and mixed mode.  This includes voltage operational amplifiers, current operational amplifiers, operational transconductance amplifiers, operational transresistance amplifiers, current conveyors, current differencing transconductance amplifiers, etc.  Design methods and challenges posed by nanometer technology are discussed and applications described, including signal amplification, filtering, data acquisition systems such as neural recording, sensor conditioning such as biomedical implants, actuator conditioning, noise generators, oscillators, mixers, etc.   Presents analysis and synthesis methods to generate all circuit topologies from which the designer can select the best one for the desired application; Includes design guidelines for active devices/elements...

  11. Utilization of MATLAB in Simulation of Linear Hybrid Circuits

    Directory of Open Access Journals (Sweden)

    L. Brancik

    2003-12-01

    Full Text Available In the paper a MATLAB-based method for simulating transientphenomena in linear hybrid circuits containing parts with both lumpedand distributed parameters is presented. Distributed parts of thecircuit are multiconductor transmission lines, which can generally benonuniform, with frequency-dependent parameters, and under nonzeroinitial voltage and/or current distributions. In principle a solutionis formulated using the modified nodal analysis method in the frequencydomain. Subsequently an improved fast method of the numerical inversionof Laplace transforms in the vector or matrix form is applied to obtainsolution in the time domain.

  12. Application prof iles of integrated circuits in various industry fields

    Institute of Scientific and Technical Information of China (English)

    Hongjing Zhang

    2014-01-01

    Integrated circuits play an increasingly important role in various fields. The aging effects, which lead to robustness problems in integrated circuits, has gained more attention. Therefore, during the design process the robustness problem must already be calculated. Generally, the time-dependent influences such as NBTI (negative bias temperature instability) and HCI (hot carrier injection) contribute to circuit aging problems [1] .

  13. Diode lasers and photonic integrated circuits

    CERN Document Server

    Coldren, Larry A; Mashanovitch, Milan L

    2011-01-01

    Diode Lasers and Photonic Integrated Circuits, Second Edition provides a comprehensive treatment of optical communication technology, its principles and theory, treating students as well as experienced engineers to an in-depth exploration of this field. Diode lasers are still of significant importance in the areas of optical communication, storage, and sensing. Using the the same well received theoretical foundations of the first edition, the Second Edition now introduces timely updates in the technology and in focus of the book. After 15 years of development in the field, this book wil

  14. An integrated circuit floating point accumulator

    Science.gov (United States)

    Goldsmith, T. C.

    1977-01-01

    Goddard Space Flight Center has developed a large scale integrated circuit (type 623) which can perform pulse counting, storage, floating point compression, and serial transmission, using a single monolithic device. Counts of 27 or 19 bits can be converted to transmitted values of 12 or 8 bits respectively. Use of the 623 has resulted in substantial savaings in weight, volume, and dollar resources on at least 11 scientific instruments to be flown on 4 NASA spacecraft. The design, construction, and application of the 623 are described.

  15. Thermoelectricity from wasted heat of integrated circuits

    KAUST Repository

    Fahad, Hossain M.

    2012-05-22

    We demonstrate that waste heat from integrated circuits especially computer microprocessors can be recycled as valuable electricity to power up a portion of the circuitry or other important accessories such as on-chip cooling modules, etc. This gives a positive spin to a negative effect of ever increasing heat dissipation associated with increased power consumption aligned with shrinking down trend of transistor dimension. This concept can also be used as an important vehicle for self-powered systemson- chip. We provide theoretical analysis supported by simulation data followed by experimental verification of on-chip thermoelectricity generation from dissipated (otherwise wasted) heat of a microprocessor.

  16. Accelerating functional verification of an integrated circuit

    Energy Technology Data Exchange (ETDEWEB)

    Deindl, Michael; Ruedinger, Jeffrey Joseph; Zoellin, Christian G.

    2015-10-27

    Illustrative embodiments include a method, system, and computer program product for accelerating functional verification in simulation testing of an integrated circuit (IC). Using a processor and a memory, a serial operation is replaced with a direct register access operation, wherein the serial operation is configured to perform bit shifting operation using a register in a simulation of the IC. The serial operation is blocked from manipulating the register in the simulation of the IC. Using the register in the simulation of the IC, the direct register access operation is performed in place of the serial operation.

  17. Testing Fixture For Microwave Integrated Circuits

    Science.gov (United States)

    Romanofsky, Robert; Shalkhauser, Kurt

    1989-01-01

    Testing fixture facilitates radio-frequency characterization of microwave and millimeter-wave integrated circuits. Includes base onto which two cosine-tapered ridge waveguide-to-microstrip transitions fastened. Length and profile of taper determined analytically to provide maximum bandwidth and minimum insertion loss. Each cosine taper provides transformation from high impedance of waveguide to characteristic impedance of microstrip. Used in conjunction with automatic network analyzer to provide user with deembedded scattering parameters of device under test. Operates from 26.5 to 40.0 GHz, but operation extends to much higher frequencies.

  18. Microwave plasmatrons for giant integrated circuit processing

    Energy Technology Data Exchange (ETDEWEB)

    Petrin, A.B.

    2000-02-01

    A method for calculating the interaction of a powerful microwave with a plane layer of magnetoactive low-pressure plasma under conditions of electron cyclotron resonance is presented. In this paper, the plasma layer is situated between a plane dielectric layer and a plane metal screen. The calculation model contains the microwave energy balance, particle balance, and electron energy balance. The equation that expressed microwave properties of nonuniform magnetoactive plasma is found. The numerical calculations of the microwave-plasma interaction for a one-dimensional model of the problem are considered. Applications of the results for microwave plasmatrons designed for processing giant integrated circuits are suggested.

  19. 3D packaging for integrated circuit systems

    Energy Technology Data Exchange (ETDEWEB)

    Chu, D.; Palmer, D.W. [eds.

    1996-11-01

    A goal was set for high density, high performance microelectronics pursued through a dense 3D packing of integrated circuits. A {open_quotes}tool set{close_quotes} of assembly processes have been developed that enable 3D system designs: 3D thermal analysis, silicon electrical through vias, IC thinning, mounting wells in silicon, adhesives for silicon stacking, pretesting of IC chips before commitment to stacks, and bond pad bumping. Validation of these process developments occurred through both Sandia prototypes and subsequent commercial examples.

  20. Computer Aided Engineering of Semiconductor Integrated Circuits

    Science.gov (United States)

    1976-04-01

    transistor opera tion; (4) theoretical invest! jations of carrifr mobli *!;y *"« inversion layer of an MOSFET; (5) mathematical investigations for high...satisfactory greLnt «Lh experiment. In time, the rapid groWth of se.r- oonduotor integrated circuit (IC, technology created ^ ^ °n" £or which this theory was...and Technology of Semiconductor Devices, John Wiley and Sons, Inc., N.Y. (1967). [2] S. K. Ghandi, The Theory and Practice of

  1. Laser Integration on Silicon Photonic Circuits Through Transfer Printing

    Science.gov (United States)

    2017-03-10

    AFRL-AFOSR-UK-TR-2017-0019 Laser integration on silicon photonic circuits through transfer printing Gunther Roelkens UNIVERSITEIT GENT VZW Final...TYPE Final 3. DATES COVERED (From - To) 15 Sep 2015 to 14 Sep 2016 4. TITLE AND SUBTITLE Laser integration on silicon photonic circuits through...parallel integration of III-V lasers on silicon photonic integrated circuits. The report discusses the technological process that has been developed as

  2. Harnessing optical forces in integrated photonic circuits.

    Science.gov (United States)

    Li, Mo; Pernice, W H P; Xiong, C; Baehr-Jones, T; Hochberg, M; Tang, H X

    2008-11-27

    The force exerted by photons is of fundamental importance in light-matter interactions. For example, in free space, optical tweezers have been widely used to manipulate atoms and microscale dielectric particles. This optical force is expected to be greatly enhanced in integrated photonic circuits in which light is highly concentrated at the nanoscale. Harnessing the optical force on a semiconductor chip will allow solid state devices, such as electromechanical systems, to operate under new physical principles. Indeed, recent experiments have elucidated the radiation forces of light in high-finesse optical microcavities, but the large footprint of these devices ultimately prevents scaling down to nanoscale dimensions. Recent theoretical work has predicted that a transverse optical force can be generated and used directly for electromechanical actuation without the need for a high-finesse cavity. However, on-chip exploitation of this force has been a significant challenge, primarily owing to the lack of efficient nanoscale mechanical transducers in the photonics domain. Here we report the direct detection and exploitation of transverse optical forces in an integrated silicon photonic circuit through an embedded nanomechanical resonator. The nanomechanical device, a free-standing waveguide, is driven by the optical force and read out through evanescent coupling of the guided light to the dielectric substrate. This new optical force enables all-optical operation of nanomechanical systems on a CMOS (complementary metal-oxide-semiconductor)-compatible platform, with substantial bandwidth and design flexibility compared to conventional electrical-based schemes.

  3. Universal discrete Fourier optics RF photonic integrated circuit architecture.

    Science.gov (United States)

    Hall, Trevor J; Hasan, Mehedi

    2016-04-04

    This paper describes a coherent electro-optic circuit architecture that generates a frequency comb consisting of N spatially separated orders using a generalised Mach-Zenhder interferometer (MZI) with its N × 1 combiner replaced by an optical N × N Discrete Fourier Transform (DFT). Advantage may be taken of the tight optical path-length control, component and circuit symmetries and emerging trimming algorithms offered by photonic integration in any platform that offers linear electro-optic phase modulation such as LiNbO3, silicon, III-V or hybrid technology. The circuit architecture subsumes all MZI-based RF photonic circuit architectures in the prior art given an appropriate choice of output port(s) and dimension N although the principal application envisaged is phase correlated subcarrier generation for all optical orthogonal frequency division multiplexing. A transfer matrix approach is used to model the operation of the architecture. The predictions of the model are validated by simulations performed using an industry standard software tool. Implementation is found to be practical.

  4. An automatic synthesis method of compact models of integrated circuit devices based on equivalent circuits

    Science.gov (United States)

    Abramov, I. I.

    2006-05-01

    An automatic synthesis method of equivalent circuits of integrated circuit devices is described in the paper. This method is based on a physical approach to construction of finite-difference approximation to basic equations of semiconductor device physics. It allows to synthesize compact equivalent circuits of different devices automatically as alternative to, for example, sufficiently formal BSIM2 and BSIM3 models used in circuit simulation programs of SPICE type. The method is one of possible variants of general methodology for automatic synthesis of compact equivalent circuits of almost arbitrary devices and circuit-type structures of micro- and nanoelecronics [1]. The method is easily extended in the case of necessity to account thermal effects in integrated circuits. It was shown that its application would be especially perspective for analysis of integrated circuit fragments as a whole and for identification of significant collective physical effects, including parasitic effects in VLSI and ULSI. In the paper the examples illustrating possibilities of the method for automatic synthesis of compact equivalent circuits of some of semiconductor devices and integrated circuit devices are considered. Special attention is given to examples of integrated circuit devices for coarse grids of spatial discretization (less than 10 nodes).

  5. Indium phosphide based photonic integrated circuits

    Science.gov (United States)

    Mason, Thomas Gordon Beck

    The continued advancement of growth and processing technology in compound semiconductor materials has opened up new possibilities for the creation of complex photonic devices and circuits. This dissertation discusses the design and development of a photonic circuit based on the monolithic integration of a widely tunable laser with an on chip wavelength monitor. The widely tunable laser is a four-section device with a pair of sampled grating distributed Bragg reflector mirrors. This enables it to use a Vernier effect tuning mechanism to overcome the Deltan/n characteristic which limits the wavelength range of conventional injection tuned semiconductor lasers. Index tuning in the laser is improved by using a thick low band gap waveguide with an optimized grating etch and regrowth technique. A record 22 nm quasi-continuous tuning range has been demonstrated for a ridge waveguide device. For even greater tuning range, a buried heterostructure device was developed that is capable of tuning over more than 47 nm, enabling it to cover almost 60 DWDM wavelength channels. The complexity of the tuning mechanism in these devices makes it desirable to have a wavelength monitor to provide feedback for control of the laser. In this work, we have developed a compact integrated wavelength monitor that can be fabricated on chip with the tunable sampled grating DBR laser. The wavelength monitor takes advantage of two-mode interference in a semiconductor waveguide to create a wavelength dependent splitter. Monitors based on this principle have been successfully integrated with both ridge waveguide and buried heterostructure sampled grating DBR lasers. This dissertation reviews all of the aspects of the design, growth, processing and packaging of these devices.

  6. Accurate pattern registration for integrated circuit tomography

    Energy Technology Data Exchange (ETDEWEB)

    Levine, Zachary H.; Grantham, Steven; Neogi, Suneeta; Frigo, Sean P.; McNulty, Ian; Retsch, Cornelia C.; Wang, Yuxin; Lucatorto, Thomas B.

    2001-07-15

    As part of an effort to develop high resolution microtomography for engineered structures, a two-level copper integrated circuit interconnect was imaged using 1.83 keV x rays at 14 angles employing a full-field Fresnel zone plate microscope. A major requirement for high resolution microtomography is the accurate registration of the reference axes in each of the many views needed for a reconstruction. A reconstruction with 100 nm resolution would require registration accuracy of 30 nm or better. This work demonstrates that even images that have strong interference fringes can be used to obtain accurate fiducials through the use of Radon transforms. We show that we are able to locate the coordinates of the rectilinear circuit patterns to 28 nm. The procedure is validated by agreement between an x-ray parallax measurement of 1.41{+-}0.17 {mu}m and a measurement of 1.58{+-}0.08 {mu}m from a scanning electron microscope image of a cross section.

  7. Monolithic Lumped Element Integrated Circuit (M2LEIC) Transistors.

    Science.gov (United States)

    INTEGRATED CIRCUITS, *MONOLITHIC STRUCTURES(ELECTRONICS), *TRANSISTORS, CHIPS(ELECTRONICS), FABRICATION, EPITAXIAL GROWTH, ULTRAHIGH FREQUENCY, POLYSILICONS, PHOTOLITHOGRAPHY, RADIOFREQUENCY POWER, IMPEDANCE MATCHING .

  8. Integrated Reconfigurable High-Voltage Transmitting Circuit for CMUTs

    DEFF Research Database (Denmark)

    Llimos Muntal, Pere; Larsen, Dennis Øland; Jørgensen, Ivan Harald Holger

    2014-01-01

    -out and measurements are performed on the integrated circuit. The transmitting circuit is reconfigurable externally making it able to drive a wide variety of CMUTs. The transmitting circuit can generate several pulse shapes, pulse voltages up to 100 V, maximum pulse range of 50 V and frequencies up to 5 MHz. The area...

  9. Photonic integrated circuits: new challenges for lithography

    Science.gov (United States)

    Bolten, Jens; Wahlbrink, Thorsten; Prinzen, Andreas; Porschatis, Caroline; Lerch, Holger; Giesecke, Anna Lena

    2016-10-01

    In this work routes towards the fabrication of photonic integrated circuits (PICs) and the challenges their fabrication poses on lithography, such as large differences in feature dimension of adjacent device features, non-Manhattan-type features, high aspect ratios and significant topographic steps as well as tight lithographic requirements with respect to critical dimension control, line edge roughness and other key figures of merit not only for very small but also for relatively large features, are highlighted. Several ways those challenges are faced in today's low-volume fabrication of PICs, including the concept multi project wafer runs and mix and match approaches, are presented and possible paths towards a real market uptake of PICs are discussed.

  10. Parallel Jacobi EVD Methods on Integrated Circuits

    Directory of Open Access Journals (Sweden)

    Chi-Chia Sun

    2014-01-01

    Full Text Available Design strategies for parallel iterative algorithms are presented. In order to further study different tradeoff strategies in design criteria for integrated circuits, A 10 × 10 Jacobi Brent-Luk-EVD array with the simplified μ-CORDIC processor is used as an example. The experimental results show that using the μ-CORDIC processor is beneficial for the design criteria as it yields a smaller area, faster overall computation time, and less energy consumption than the regular CORDIC processor. It is worth to notice that the proposed parallel EVD method can be applied to real-time and low-power array signal processing algorithms performing beamforming or DOA estimation.

  11. Post irradiation effects (PIE) in integrated circuits

    Science.gov (United States)

    Shaw, D. C.; Lowry, L.; Barnes, C.; Zakharia, M.; Agarwal, S.; Rax, B.

    1991-01-01

    Post-irradiation effects (PIE) ranging from normal recovery to catastrophic failure have been observed in integrated circuits during the PIE period. Data presented show failure due to rebound after a 10 krad(Si) dose. In particular, five device types are investigated with varying PIE response. Special attention has been given to the HI1-507A analog multiplexer because its PIE response is extreme. X-ray diffraction has been uniquely employed to measure physical stress in the HI1-507A metallization. An attempt has been made to show a relationship between stress relaxation and radiation effects. All data presented support the current MIL-STD Method 1019.4 but demonstrate the importance of performing PIE measurements, even when mission doses are as low as 10 krad(Si).

  12. Broadband plasmonic absorber for photonic integrated circuits

    CERN Document Server

    Xiong, Xiao; Ren, Xi-Feng; Guo, Guang-Can

    2013-01-01

    The loss of surface plasmon polaritons has long been considered as a fatal shortcoming in information transport. Here we propose a plasmonic absorber utilizing this "shortcoming" to absorb the stray light in photonic integrated circuits (PICs). Based on adiabatic mode evolution, its performance is insensitive to incident wavelength with bandwidth larger than 300nm, and robust against surrounding environment and temperature. Besides, the use of metal enables it to be very compact and beneficial to thermal dissipation. With this 40um-long absorber, the absorption efficiency can be over 99.8% at 1550nm, with both the reflectivity and transmittance of incident light reduced to less than 0.1%. Such device may find various applications in PICs, to eliminate the residual strong pump laser or stray light.

  13. RD53A Integrated Circuit Specifications

    CERN Document Server

    Garcia-Sciveres, Mauricio

    2015-01-01

    Specifications for the RD53 collaboration’s first engineering wafer run of an integrated circuit (IC) for hybrid pixel detector readout, called RD53A. RD53A is intended to demonstrate in a large format IC the suitability of the technology (including radiation tolerance), the stable low threshold operation, and the high hit and trigger rate capabilities, required for HL-LHC upgrades of ATLAS and CMS. The wafer scale production will permit the experiments to prototype bump bonding assembly with realistic sensors in this new technology and to measure the performance of hybrid assemblies. RD53A is not intended to be a final production IC for use in an experiment, and will contain design variations for testing purposes, making the pixel matrix non-uniform.

  14. State-variable analysis of non-linear circuits with a desk computer

    Science.gov (United States)

    Cohen, E.

    1981-01-01

    State variable analysis was used to analyze the transient performance of non-linear circuits on a desk top computer. The non-linearities considered were not restricted to any circuit element. All that is required for analysis is the relationship defining each non-linearity be known in terms of points on a curve.

  15. Topology Optimization of Building Blocks for Photonic Integrated Circuits

    DEFF Research Database (Denmark)

    Jensen, Jakob Søndergaard; Sigmund, Ole

    2005-01-01

    Photonic integrated circuits are likely candidates as high speed replacements for the standard electrical integrated circuits of today. However, in order to obtain a satisfactorily performance many design prob- lems that up until now have resulted in too high losses must be resolved. In this work...... we demonstrate how the method of topology optimization can be used to design a variety of high performance building blocks for the future circuits....

  16. Model GC1312S Multifunction Integrated Optical Circuit Devices

    Institute of Scientific and Technical Information of China (English)

    2001-01-01

    Model GC1312S multifunction integrated optical circuit device (MIOC) used in inertial-grade interferometric fiber optics gyroscopes (IFOGs) is fabricated by annealing and proton exchange process (APE). The unique feature of the device is the incorporation of the beat detection circuit besides all the features the conventional single Y-branch multifunction integrated optical circuit devices have. The device structure, operation principle and typical characteristics, etc., are briefly presented in this paper.

  17. A novel voltage output integrated circuit temperature sensor

    Institute of Scientific and Technical Information of China (English)

    吴晓波; 方志刚; 等

    2002-01-01

    The novel integrated circuit(IC) temperature sensor presented in this paper works similarly as a two-terminal Zener,has breakdown voltage directly proportional to Kelvin temperature at 10mV/℃,with typical error of less tha ±1.0℃ over a temperature range from-50℃to +120℃ .In addition to all the features that conventional IC temperature sensors have,the new device also has very low static power dissipation(0.5mW),low output impedance(less than 1Ω),execllent stability,high reproducibility,and high precision.The sensor's circuit design and layout are discussed in detail.Applications of the sensor include almost and type of temperature sensing over the range of -50℃-+125℃。The low impedance and linear output of the device make interfacing the readout or control circuitry especially easy.Due to the excellent performance and low cost of this sensor.more application of the sensor over wide temperature range are expected.

  18. Design of Nonlinear Circuits: The Linear Time-Varying Approach

    NARCIS (Netherlands)

    Kuijstermans, F.C.M.

    2003-01-01

    Over the last years the ever-growing demand for higher performance has led to much interest in using nonlinear circuit concepts for electronic circuit design. For this we have to deal with analysis and synthesis of dynamic nonlinear circuits. This thesis proposes to handle the nonlinear design

  19. Design of Nonlinear Circuits: The Linear Time-Varying Approach

    NARCIS (Netherlands)

    Kuijstermans, F.C.M.

    2003-01-01

    Over the last years the ever-growing demand for higher performance has led to much interest in using nonlinear circuit concepts for electronic circuit design. For this we have to deal with analysis and synthesis of dynamic nonlinear circuits. This thesis proposes to handle the nonlinear design comp

  20. Integrated capacitors for conductive lithographic film circuits

    OpenAIRE

    Harrey, PM; Evans, PSA; Harrison, DJ

    2001-01-01

    This paper reports on fabrication of low-value embedded capacitors in conductive lithographic film (CLF) circuit boards. The CLF process is a low-cost and high speed manufacturing technique for flexible circuits and systems. We report on the construction and electrical characteristics of CLF capacitor structures printed onto flexible substrates. These components comprise a single polyester dielectric layer, which separates the printed electrode films. Multilayer circuit boards with printed co...

  1. Counterfeit integrated circuits detection and avoidance

    CERN Document Server

    Tehranipoor, Mark (Mohammad); Forte, Domenic

    2015-01-01

    This timely and exhaustive study offers a much-needed examination of the scope and consequences of the electronic counterfeit trade.  The authors describe a variety of shortcomings and vulnerabilities in the electronic component supply chain, which can result in counterfeit integrated circuits (ICs).  Not only does this book provide an assessment of the current counterfeiting problems facing both the public and private sectors, it also offers practical, real-world solutions for combatting this substantial threat.   ·      Helps beginners and practitioners in the field by providing a comprehensive background on the counterfeiting problem; ·      Presents innovative taxonomies for counterfeit types, test methods, and counterfeit defects, which allows for a detailed analysis of counterfeiting and its mitigation; ·      Provides step-by-step solutions for detecting different types of counterfeit ICs; ·      Offers pragmatic and practice-oriented, realistic solutions to counterfeit IC d...

  2. Designing TSVs for 3D Integrated Circuits

    CERN Document Server

    Khan, Nauman

    2013-01-01

    This book explores the challenges and presents best strategies for designing Through-Silicon Vias (TSVs) for 3D integrated circuits.  It describes a novel technique to mitigate TSV-induced noise, the GND Plug, which is superior to others adapted from 2-D planar technologies, such as a backside ground plane and traditional substrate contacts. The book also investigates, in the form of a comparative study, the impact of TSV size and granularity, spacing of C4 connectors, off-chip power delivery network, shared and dedicated TSVs, and coaxial TSVs on the quality of power delivery in 3-D ICs. The authors provide detailed best design practices for designing 3-D power delivery networks.  Since TSVs occupy silicon real-estate and impact device density, this book provides four iterative algorithms to minimize the number of TSVs in a power delivery network. Unlike other existing methods, these algorithms can be applied in early design stages when only functional block- level behaviors and a floorplan are available....

  3. Ultraviolet integrated photonic circuits (Conference Presentation)

    Science.gov (United States)

    Fanto, Michael L.; Steidle, Jeffrey A.; Lu, Tsung-Ju; Preble, Stefan F.; Englund, Dirk R.; Tison, Christopher C.; Smith, Amos M.; Howland, Gregory A.; Soderberg, Kathy-Anne; Alsing, Paul M.

    2016-10-01

    Quantum information processing relies on the fundamental property of quantum interference, where the quality of the interference directly correlates to the indistinguishability of the interacting particles. The creation of these indistinguishable particles, photons in this case, has conventionally been accomplished with nonlinear crystals and optical filters to remove spectral distinguishability, albeit sacrificing the number of photons. This research describes the use of an integrated aluminum nitride microring resonator circuit to selectively generate photon pairs at the narrow cavity transmissions, thereby producing spectrally indistinguishable photons. These spectrally indistinguishable photons can then be routed through optical waveguide circuitry, concatenated interferometers, to manipulate and entangle the photons into the desired quantum states. Photon sources and circuitry are only two of the three required pieces of the puzzle. The final piece which this research is aimed at interfacing with are trapped ion quantum memories, based on trapped Ytterbium ions. These ions serve as very long lived and stable quantum memories with storage times on the order of 10's of minutes, compared with photonic quantum memories which are limited to 10-6 to 10-3 seconds. The caveat with trapped ions is the interaction wavelength of the photons is 369.5nm and therefore the goal of this research is to develop entangled photon sources and circuitry in that wavelength regime to interact directly with the trapped ions and bypass the need for frequency conversion.

  4. Securing Health Sensing Using Integrated Circuit Metric

    Directory of Open Access Journals (Sweden)

    Ruhma Tahir

    2015-10-01

    Full Text Available Convergence of technologies from several domains of computing and healthcare have aided in the creation of devices that can help health professionals in monitoring their patients remotely. An increase in networked healthcare devices has resulted in incidents related to data theft, medical identity theft and insurance fraud. In this paper, we discuss the design and implementation of a secure lightweight wearable health sensing system. The proposed system is based on an emerging security technology called Integrated Circuit Metric (ICMetric that extracts the inherent features of a device to generate a unique device identification. In this paper, we provide details of how the physical characteristics of a health sensor can be used for the generation of hardware “fingerprints”. The obtained fingerprints are used to deliver security services like authentication, confidentiality, secure admission and symmetric key generation. The generated symmetric key is used to securely communicate the health records and data of the patient. Based on experimental results and the security analysis of the proposed scheme, it is apparent that the proposed system enables high levels of security for health monitoring in resource optimized manner.

  5. Securing health sensing using integrated circuit metric.

    Science.gov (United States)

    Tahir, Ruhma; Tahir, Hasan; McDonald-Maier, Klaus

    2015-10-20

    Convergence of technologies from several domains of computing and healthcare have aided in the creation of devices that can help health professionals in monitoring their patients remotely. An increase in networked healthcare devices has resulted in incidents related to data theft, medical identity theft and insurance fraud. In this paper, we discuss the design and implementation of a secure lightweight wearable health sensing system. The proposed system is based on an emerging security technology called Integrated Circuit Metric (ICMetric) that extracts the inherent features of a device to generate a unique device identification. In this paper, we provide details of how the physical characteristics of a health sensor can be used for the generation of hardware "fingerprints". The obtained fingerprints are used to deliver security services like authentication, confidentiality, secure admission and symmetric key generation. The generated symmetric key is used to securely communicate the health records and data of the patient. Based on experimental results and the security analysis of the proposed scheme, it is apparent that the proposed system enables high levels of security for health monitoring in resource optimized manner.

  6. Design of 3D integrated circuits and systems

    CERN Document Server

    Sharma, Rohit

    2014-01-01

    Three-dimensional (3D) integration of microsystems and subsystems has become essential to the future of semiconductor technology development. 3D integration requires a greater understanding of several interconnected systems stacked over each other. While this vertical growth profoundly increases the system functionality, it also exponentially increases the design complexity. Design of 3D Integrated Circuits and Systems tackles all aspects of 3D integration, including 3D circuit and system design, new processes and simulation techniques, alternative communication schemes for 3D circuits and sys

  7. Integrated differential high-voltage transmitting circuit for CMUTs

    DEFF Research Database (Denmark)

    Llimos Muntal, Pere; Larsen, Dennis Øland; Farch, Kjartan

    2015-01-01

    In this paper an integrated differential high-voltage transmitting circuit for capacitive micromachined ultrasonic transducers (CMUTs) used in portable ultrasound scanners is designed and implemented in a 0.35 μm high-voltage process. Measurements are performed on the integrated circuit in order...... to assess its performance. The circuit generates pulses at differential voltage levels of 60V, 80V and 100 V, a frequency up to 5MHz and a measured driving strength of 1.75 V/ns with the CMUT connected. The total on-chip area occupied by the transmitting circuit is 0.18 mm2 and the power consumption...

  8. F-Paris: integrated electronic circuits [Tender

    CERN Multimedia

    2003-01-01

    "Fourniture, montage et tests des circuits imprimes et modules multi composants pour le trajectographe central de CMS. Maximum de 12 000 circuits imprimes et modules multi-composants necessaires au trajectographe central de l'experience CMS aupres du Large Hadron Collider" (1 page).

  9. Hybridization of detector array and integrated circuit for readout

    Science.gov (United States)

    Fossum, Eric R.; Grunthaner, Frank J.

    1992-04-01

    A process is explained for fabricating a detector array in a layer of semiconductor material on one substrate and an integrated readout circuit in a layer of semiconductor material on a separate substrate in order to select semiconductor material for optimum performance of each structure, such as GaAs for the detector array and Si for the integrated readout circuit. The detector array layer is lifted off its substrate, laminated on the metallized surface on the integrated surface, etched with reticulating channels to the surface of the integrated circuit, and provided with interconnections between the detector array pixels and the integrated readout circuit through the channels. The adhesive material for the lamination is selected to be chemically stable to provide electrical and thermal insulation and to provide stress release between the two structures fabricated in semiconductor materials that may have different coefficients of thermal expansion.

  10. On ageing effects in analogue integrated circuits

    OpenAIRE

    Salfelder, Felix (Dipl. Math.)

    2016-01-01

    The behaviour of electronic circuits is influenced by ageing effects. Modelling the behaviour of circuits is a standard approach for the design of faster, smaller, more reliable and more robust systems. In this thesis, we propose a formalization of robustness that is derived from a failure model, which is based purely on the behavioural specification of a system. For a given specification, simulation can reveal if a system does not comply with a specification, and thus provide a failure model...

  11. 76 FR 76434 - Certain Integrated Circuits, Chipsets, and Products Containing Same Including Televisions...

    Science.gov (United States)

    2011-12-07

    ... COMMISSION Certain Integrated Circuits, Chipsets, and Products Containing Same Including Televisions, Receipt... Commission has received a complaint entitled In Re Certain Integrated Circuits, Chipsets, And Products... importation of certain integrated circuits, chipsets, and products containing same including televisions....

  12. Four Quadrant Chopper Drive with Specialized Integrated Circuits

    Directory of Open Access Journals (Sweden)

    Alexandru Morar

    2009-12-01

    Full Text Available The paper presents a high performance system for separately-excited D.C. motor control, which was designed and performed with a specialized integrated circuit (L292, made by SGS-THOMSON Microelectronics Company. With an interface and an adequate software, L292 circuit can be used as a chopper in 2 or 4 quadrant.

  13. Four Quadrant Chopper Drive with Specialized Integrated Circuits

    OpenAIRE

    Alexandru Morar

    2009-01-01

    The paper presents a high performance system for separately-excited D.C. motor control, which was designed and performed with a specialized integrated circuit (L292), made by SGS-THOMSON Microelectronics Company. With an interface and an adequate software, L292 circuit can be used as a chopper in 2 or 4 quadrant.

  14. 35 GHz integrated circuit rectifying antenna with 33 percent efficiency

    Science.gov (United States)

    Yoo, T.-W.; Chang, K.

    1991-01-01

    A 35 GHz integrated circuit rectifying antenna (rectenna) has been developed using a microstrip dipole antenna and beam-lead mixer diode. Greater than 33 percent conversion efficiency has been achieved. The circuit should have applications in microwave/millimeter-wave power transmission and detection.

  15. A novel voltage output integrated circuit temperature sensor

    Institute of Scientific and Technical Information of China (English)

    吴晓波; 赵梦恋; 严晓浪; 方志刚

    2002-01-01

    The novel integrated circuit (IC) temperature sensor presented in this paper works similarly as a two-terminal Zener, has breakdown voltage directly proportional to Kelvin temperature at 10 mV/℃, with typical error of less than ±1.0℃ over a temperature range from -50℃ to +125℃. In addition to all the features that conventional IC temperature sensors have, the new device also has very low static power dissipation ( 0.5 mW ) , low output impedance ( less than 1Ω), excellent stability, high reproducibility, and high precision. The sensor's circuit design and layout are discussed in detail. Applications of the sensor include almost any type of temperature sensing over the range of -50℃-+125℃. The low impedance and linear output of the device make interfacing the readout or control circuitry especially easy. Due to the excellent performance and low cost of this sensor, more applications of the sensor over wide temperature range are expected.

  16. Radiation-hardened transistor and integrated circuit

    Science.gov (United States)

    Ma, Kwok K.

    2007-11-20

    A composite transistor is disclosed for use in radiation hardening a CMOS IC formed on an SOI or bulk semiconductor substrate. The composite transistor has a circuit transistor and a blocking transistor connected in series with a common gate connection. A body terminal of the blocking transistor is connected only to a source terminal thereof, and to no other connection point. The blocking transistor acts to prevent a single-event transient (SET) occurring in the circuit transistor from being coupled outside the composite transistor. Similarly, when a SET occurs in the blocking transistor, the circuit transistor prevents the SET from being coupled outside the composite transistor. N-type and P-type composite transistors can be used for each and every transistor in the CMOS IC to radiation harden the IC, and can be used to form inverters and transmission gates which are the building blocks of CMOS ICs.

  17. Isolation of Battery Chargers Integrated Into Printed Circuit Boards

    Energy Technology Data Exchange (ETDEWEB)

    Sullivan, James S. [Lawrence Livermore National Lab. (LLNL), Livermore, CA (United States)

    2013-11-21

    Present test procedures developed by the Federal Government (10 CFR Part 430 “Energy Conservation Program for Consumer Products”) to measure the energy consumption of battery chargers provide no method for the isolation of input power for battery chargers that have been integrated into printed circuit boards internal to electronic equipment. This prevents the measurement of Standby and Off Mode energy consumption. As a result, the energy consumption of battery chargers integrated into the printed circuit board cannot be measured.

  18. Addressable-Matrix Integrated-Circuit Test Structure

    Science.gov (United States)

    Sayah, Hoshyar R.; Buehler, Martin G.

    1991-01-01

    Method of quality control based on use of row- and column-addressable test structure speeds collection of data on widths of resistor lines and coverage of steps in integrated circuits. By use of straightforward mathematical model, line widths and step coverages deduced from measurements of electrical resistances in each of various combinations of lines, steps, and bridges addressable in test structure. Intended for use in evaluating processes and equipment used in manufacture of application-specific integrated circuits.

  19. Analog integrated circuits design for processing physiological signals.

    Science.gov (United States)

    Li, Yan; Poon, Carmen C Y; Zhang, Yuan-Ting

    2010-01-01

    Analog integrated circuits (ICs) designed for processing physiological signals are important building blocks of wearable and implantable medical devices used for health monitoring or restoring lost body functions. Due to the nature of physiological signals and the corresponding application scenarios, the ICs designed for these applications should have low power consumption, low cutoff frequency, and low input-referred noise. In this paper, techniques for designing the analog front-end circuits with these three characteristics will be reviewed, including subthreshold circuits, bulk-driven MOSFETs, floating gate MOSFETs, and log-domain circuits to reduce power consumption; methods for designing fully integrated low cutoff frequency circuits; as well as chopper stabilization (CHS) and other techniques that can be used to achieve a high signal-to-noise performance. Novel applications using these techniques will also be discussed.

  20. Multilayer microwave integrated quantum circuits for scalable quantum computing

    Science.gov (United States)

    Brecht, Teresa; Pfaff, Wolfgang; Wang, Chen; Chu, Yiwen; Frunzio, Luigi; Devoret, Michel H.; Schoelkopf, Robert J.

    2016-02-01

    As experimental quantum information processing (QIP) rapidly advances, an emerging challenge is to design a scalable architecture that combines various quantum elements into a complex device without compromising their performance. In particular, superconducting quantum circuits have successfully demonstrated many of the requirements for quantum computing, including coherence levels that approach the thresholds for scaling. However, it remains challenging to couple a large number of circuit components through controllable channels while suppressing any other interactions. We propose a hardware platform intended to address these challenges, which combines the advantages of integrated circuit fabrication and the long coherence times achievable in three-dimensional circuit quantum electrodynamics. This multilayer microwave integrated quantum circuit platform provides a path towards the realisation of increasingly complex superconducting devices in pursuit of a scalable quantum computer.

  1. Flatness-based linear output feedback control for disturbance rejection and tracking tasks on a Chua's circuit

    Science.gov (United States)

    Sira-Ramírez, H.; Luviano-Juárez, A.; Cortés-Romero, J.

    2012-05-01

    A linear output feedback controller is developed for trajectory tracking problems defined on a modified version of Chua's circuit. The circuit modification considers the introduction of a flat input, i.e. a suitable external control input channel guided by (a) the induction of the flatness property on a measurable output signal of the circuit and (b) the physical viability of the control input. A linear active disturbance rejection control based on a high-gain linear disturbance observer, is implemented on a laboratory prototype. We show that the state-dependent disturbance can be approximately, but arbitrarily closely, estimated through a linear high-gain observer, called a generalised proportional integral (GPI) observer, which contains a linear combination of a sufficient number of extra iterated integrals of the output estimation error. Experimental results are presented in the output reference trajectory tracking of a signal generated by an unrelated chaotic system of the Lorenz type. Laboratory experiments illustrate the proposed linear methodology for effectively controlling chaos.

  2. Secondary Side CMOS Feedback Control Integrated Circuit

    Science.gov (United States)

    1990-06-01

    Temperature ( Celc ~us) Figure 5.1: Experimental Temperature Dependence cf Untrimmed Bandgap Circuit 104 1. I I ’ - ’ 0 0.9 . -0-0 Ouput Voit -ge ---.o M...Schlecht and L.F. Casey, "Comparison of the Square-Wave and Quasi- Resonant Topologies," IEEE PESC Record, 1987, pp. 124-134. 132

  3. Hybrid and monolithic integration of planar lightwave circuits (PLCs)

    Science.gov (United States)

    Chen, Ray T.

    2008-02-01

    In this paper, we review the status of monolithic and hybrid integration of planar lightwave circuits (PLCs). Building blocks needed for system integration based on polymeric materials, III-V semiconductor materials, LiNbO 3 and SOI on Silicon are summarized with pros and cons. Due to the maturity of silicon CMOS technology, silicon becomes the platform of choice for optical application specific integrated circuits (OASICs). However, the indirect bandgap of silicon makes the formation of electrically pumped silicon laser a remote plausibility which requires hybrid integration of laser sources made out of III-V compound semicouductor.

  4. Integrated Circuit Electromagnetic Susceptibility Handbook. Phase III

    Science.gov (United States)

    1978-08-01

    LO.WS S* i •C SUCEWPTI3LITY HANDBOOK REPORT MD( E1929 I AUGUST Isis of the offset generator is as shown, while if the input transistors are PNP type...comparator input. If the input transistors are PNP type (as in 311 type comparators), the offset generator I! has the opposite polarity. The magnitude of the...Rectification in PN Junctions ... . . ........... 58 5.2 Interference in Transistors ........... ..... ..... ... 63 5.3 Computer-Aided Analysis of Circuit

  5. Integrating Neural Circuits Controlling Female Sexual Behavior

    Science.gov (United States)

    Micevych, Paul E.; Meisel, Robert L.

    2017-01-01

    The hypothalamus is most often associated with innate behaviors such as is hunger, thirst and sex. While the expression of these behaviors important for survival of the individual or the species is nested within the hypothalamus, the desire (i.e., motivation) for them is centered within the mesolimbic reward circuitry. In this review, we will use female sexual behavior as a model to examine the interaction of these circuits. We will examine the evidence for a hypothalamic circuit that regulates consummatory aspects of reproductive behavior, i.e., lordosis behavior, a measure of sexual receptivity that involves estradiol membrane-initiated signaling in the arcuate nucleus (ARH), activating β-endorphin projections to the medial preoptic nucleus (MPN), which in turn modulate ventromedial hypothalamic nucleus (VMH) activity—the common output from the hypothalamus. Estradiol modulates not only a series of neuropeptides, transmitters and receptors but induces dendritic spines that are for estrogenic induction of lordosis behavior. Simultaneously, in the nucleus accumbens of the mesolimbic system, the mating experience produces long term changes in dopamine signaling and structure. Sexual experience sensitizes the response of nucleus accumbens neurons to dopamine signaling through the induction of a long lasting early immediate gene. While estrogen alone increases spines in the ARH, sexual experience increases dendritic spine density in the nucleus accumbens. These two circuits appear to converge onto the medial preoptic area where there is a reciprocal influence of motivational circuits on consummatory behavior and vice versa. While it has not been formally demonstrated in the human, such circuitry is generally highly conserved and thus, understanding the anatomy, neurochemistry and physiology can provide useful insight into the motivation for sexual behavior and other innate behaviors in humans. PMID:28642689

  6. Fully integrated quantum photonic circuit with an electrically driven light source

    Science.gov (United States)

    Khasminskaya, Svetlana; Pyatkov, Felix; Słowik, Karolina; Ferrari, Simone; Kahl, Oliver; Kovalyuk, Vadim; Rath, Patrik; Vetter, Andreas; Hennrich, Frank; Kappes, Manfred M.; Gol'Tsman, G.; Korneev, A.; Rockstuhl, Carsten; Krupke, Ralph; Pernice, Wolfram H. P.

    2016-11-01

    Photonic quantum technologies allow quantum phenomena to be exploited in applications such as quantum cryptography, quantum simulation and quantum computation. A key requirement for practical devices is the scalable integration of single-photon sources, detectors and linear optical elements on a common platform. Nanophotonic circuits enable the realization of complex linear optical systems, while non-classical light can be measured with waveguide-integrated detectors. However, reproducible single-photon sources with high brightness and compatibility with photonic devices remain elusive for fully integrated systems. Here, we report the observation of antibunching in the light emitted from an electrically driven carbon nanotube embedded within a photonic quantum circuit. Non-classical light generated on chip is recorded under cryogenic conditions with waveguide-integrated superconducting single-photon detectors, without requiring optical filtering. Because exclusively scalable fabrication and deposition methods are used, our results establish carbon nanotubes as promising nanoscale single-photon emitters for hybrid quantum photonic devices.

  7. Innovative devices for integrated circuits - A design perspective

    Science.gov (United States)

    Schmitt-Landsiedel, D.; Werner, C.

    2009-04-01

    MOS devices go 3D, new quantum effect devices appear in the research labs. This paper discusses the impact of various innovative device architectures on circuit design. Examples of circuits with FinFETs or Multi-Gate-FETs are shown and their performance is compared with classically scaled CMOS circuits both for digital and analog applications. As an example for novel quantum effect devices beyond CMOS we discuss circuits with Tunneling Field Effect Transistors and their combination with classical MOSFETs and MuGFETs. Finally the potential of more substantial paradigm changes in circuit design will be exploited for the example of magnetic quantum cellular automata using a novel integrated magnetic field clocking scheme.

  8. Study of CMOS integrated signal processing circuit in capacitive sensors

    Institute of Scientific and Technical Information of China (English)

    CAO Yi-jiang; YU Xiang; WANG Lei

    2007-01-01

    A CMOS integrated signal processing circuit based on capacitance resonance principle whose structure is simple in capacitive sensors is designed. The waveform of output voltage is improved by choosing bootstrap reference current mirror with initiate circuit, CMOS analogy switch and positive feedback of double-stage inverter in the circuit. Output voltage of this circuit is a symmetric square wave signal. The variation of sensitive capacitance, which is part of the capacitive sensors, can be denoted by the change of output voltage's frequency. The whole circuit is designed with 1.5 μm P-well CMOS process and simulated by PSpice software.Output frequency varies from 261.05 kHz to 47.93 kHz if capacitance varies in the range of 1PF~15PF. And the variation of frequency can be easily detected using counter or SCU.

  9. Multi-channel detector readout method and integrated circuit

    Energy Technology Data Exchange (ETDEWEB)

    Moses, William W.; Beuville, Eric; Pedrali-Noy, Marzio

    2004-05-18

    An integrated circuit which provides multi-channel detector readout from a detector array. The circuit receives multiple signals from the elements of a detector array and compares the sampled amplitudes of these signals against a noise-floor threshold and against one another. A digital signal is generated which corresponds to the location of the highest of these signal amplitudes which exceeds the noise floor threshold. The digital signal is received by a multiplexing circuit which outputs an analog signal corresponding the highest of the input signal amplitudes. In addition a digital control section provides for programmatic control of the multiplexer circuit, amplifier gain, amplifier reset, masking selection, and test circuit functionality on each input thereof.

  10. Multi-channel detector readout method and integrated circuit

    Energy Technology Data Exchange (ETDEWEB)

    Moses, William W.; Beuville, Eric; Pedrali-Noy, Marzio

    2006-12-12

    An integrated circuit which provides multi-channel detector readout from a detector array. The circuit receives multiple signals from the elements of a detector array and compares the sampled amplitudes of these signals against a noise-floor threshold and against one another. A digital signal is generated which corresponds to the location of the highest of these signal amplitudes which exceeds the noise floor threshold. The digital signal is received by a multiplexing circuit which outputs an analog signal corresponding the highest of the input signal amplitudes. In addition a digital control section provides for programmatic control of the multiplexer circuit, amplifier gain, amplifier reset, masking selection, and test circuit functionality on each input thereof.

  11. Algorithms for numerical and symbolic analysis of linear circuits and methods of derivatives LU-decomposition

    Directory of Open Access Journals (Sweden)

    V. A. Golovin

    1986-04-01

    Full Text Available The algorithms of numerical and symbolic analysis methods of linear chains of derivatives and LU-decomposition. An example of the calculation circuit functions using programs that implement the proposed algorithms.

  12. Thermal-stress effects on enhanced low-dose-rate sensitivity of linear bipolar circuits

    Energy Technology Data Exchange (ETDEWEB)

    SHANEYFELT,MARTY R.; SCHWANK,JAMES R.; WITCZAK,STEVEN C.; RIEWE,LEONARD CHARLES; WINOKUR,PETER S.; HASH,GERALD L.; PEASE,R.L.; FLEETWOOD,D.M.

    2000-02-17

    Thermal-stress effects are shown to have a significant impact on the enhanced low-dose-rate sensitivity of linear bipolar circuits. Implications of these results on hardness assurance testing and mechanisms are discussed.

  13. Science Letters:The Moore's Law for photonic integrated circuits

    Institute of Scientific and Technical Information of China (English)

    THYL(E)N L.; HE Sai-ling; WOSINSKI L.; DAI Dao-xin

    2006-01-01

    We formulate a "Moore's law" for photonic integrated circuits (PICs) and their spatial integration density using two methods. One is decomposing the integrated photonics devices of diverse types into equivalent basic elements, which makes a comparison with the generic elements of electronic integrated circuits more meaningful. The other is making a complex component equivalent to a series of basic elements of the same functionality, which is used to calculate the integration density for functional components realized with different structures. The results serve as a benchmark of the evolution of PICs and we can conclude that the density of integration measured in this way roughly increases by a factor of 2 per year. The prospects for a continued increase of spatial integration density are discussed.

  14. Micro-relay technology for energy-efficient integrated circuits

    CERN Document Server

    Kam, Hei

    2015-01-01

    This book describes the design of relay-based circuit systems from device fabrication to circuit micro-architectures. This book is ideal for both device engineers as well as circuit system designers and highlights the importance of co-design across design hierarchies when optimizing system performance (in this case, energy-efficiency). This book is ideal for researchers and engineers focused on semiconductors, integrated circuits, and energy efficient electronics. This book also: ·         Covers microsystem fabrication, MEMS device design, circuit design, circuit micro-architecture, and CAD ·         Describes work previously done in the field and also lays the groundwork and criteria for future energy-efficient device and system design ·         Maximizes reader insights into the design and modeling of micro-relay, micro-relay reliability, integrated circuit design with micro-relays, and more

  15. Novel paradigm for integrated photonics circuits: transient interconnection network

    Science.gov (United States)

    Fazio, Eugenio; Belardini, Alessandro; Bastiani, Lorenzo; Alonzo, Massimo; Chauvet, Mathieu; Zheludev, Nikolay I.; Soci, Cesare

    2017-01-01

    Self-confined beams and spatial solitons were always investigated for a purely academic point of view, describing their formation and cross-interaction. We propose a novel paradigm for integrated photonics circuits based on self-confined interconnections. We consider that circuits are not designed since beginning; a network of writing lasers provide the circuit configuration inside which information at a different wavelength travels. we propose new designs for interconnections and both digital and analog switching gates somehow inspired by Nature, following analog decision routes used in biological networks like brain synapsis or animal path finding.

  16. Hybrid CMOS/Nanodevice Integrated Circuits Design and Fabrication

    Science.gov (United States)

    2008-08-25

    This approach combines a semiconductor transistor system with a nanowire crossbar, with simple two-terminal nanodevices self-assembled at each...hybrid CMOS/nanodevice integrated circuits [10-12]. Such circuit combines a semiconductor transistors system with a nanowire crossbar, with simple two...both with and without embedded metallic clusters), self-assembled molecular monolayers, and thin chalcogenide and crystalline perovskite layers [20

  17. Scalable Testing Platform for CMOS Read In Integrated Circuits

    Science.gov (United States)

    2016-03-31

    Distribution A Approved for Public Release – Distribution is unlimited Scalable Testing Platform for CMOS Read-In Integrated Circuits Miguel...research group. This paper describes a single scalable testing platform (STP) capable of testing all of our RIICs. This approach reduces the design...time and risk associated with RIIC testing . On the hardware side, our platform consists of several custom printed circuit boards. On the software

  18. Advances in organic field-effect transistors and integrated circuits

    Institute of Scientific and Technical Information of China (English)

    WANG Hong; JI ZhuoYu; LIU Ming; SHANG LiWei; LIU Ge; LIU XingHua; LIU Jiang; PENG YingQuan

    2009-01-01

    Organic field-effect transistors (OFETs) have received significant research interest because of their promising applications in low cast, lager area, plastic circuits, and tremendous progress has been made in materials, device performance, OFETs based circuits in recent years.In this article we intro-duce the advances in organic semiconductor materials, OFETs based integrating techniques, and in particular highlight the recent progress.Finally, the prospects and problems of OFETs are discussed.

  19. Advances in organic field-effect transistors and integrated circuits

    Institute of Scientific and Technical Information of China (English)

    2009-01-01

    Organic field-effect transistors (OFETs) have received significant research interest because of their promising applications in low cast, lager area, plastic circuits, and tremendous progress has been made in materials, device performance, OFETs based circuits in recent years. In this article we introduce the advances in organic semiconductor materials, OFETs based integrating techniques, and in particular highlight the recent progress. Finally, the prospects and problems of OFETs are discussed.

  20. Dielectric isolation for power integrated circuits; Isolation dielectrique enterree pour les circuits integres de puissance

    Energy Technology Data Exchange (ETDEWEB)

    Zerrouk, D.

    1997-07-18

    Considerable efforts have been recently directed towards integrating onto the same chip, sense or protection elements that is low voltage analog and/or digital control circuitry together with high voltage/high current devices. Most of these so called `smart power` devices use either self isolation, junction isolation or Silicon-On-Insulator (SOI) to integrate low voltage elements with vertical power devices. Dielectric isolation is superior to the other isolation techniques such as self isolation or junction isolation. Thesis work consists of the study of the feasibility of a dielectric technology based on the melting and the solidification in a Rapid Thermal Processing furnace (RTP), of thick polysilicon films deposited on oxide. The purpose of this technique is to obtain substrate with localized SOI structures for smart power applications. SOI technology offers significant potential advantages, such as non-occurrence of latch-up in CMOS structures, high packaging density, low parasitic capacitance and the possibility of 3D structures. In addition, SOI technology using thick silicon films (10-100 {mu}m) offers special advantages for high voltage integrated circuits. Several techniques have been developed to form SOI films. Zone melting recrystallization is one of the most promising for localized SOI. The SOI structures have first been analyzed in term of extended defects. N-channel MOSFET`s transistors have also been fabricated in the SOI substrates and electrically characterized (threshold voltages, off-state leakage current, mobilities,...). The SOI transistors exhibit good characteristics, although inferior to witness transistors. The recrystallized silicon films are therefore found to be suitable for the fabrication of SOI devices. (author) 106 refs.

  1. Process Variations and Probabilistic Integrated Circuit Design

    CERN Document Server

    Haase, Joachim

    2012-01-01

    Uncertainty in key parameters within a chip and between different chips in the deep sub micron era plays a more and more important role. As a result, manufacturing process spreads need to be considered during the design process.  Quantitative methodology is needed to ensure faultless functionality, despite existing process variations within given bounds, during product development.   This book presents the technological, physical, and mathematical fundamentals for a design paradigm shift, from a deterministic process to a probability-orientated design process for microelectronic circuits.  Readers will learn to evaluate the different sources of variations in the design flow in order to establish different design variants, while applying appropriate methods and tools to evaluate and optimize their design.  Trains IC designers to recognize problems caused by parameter variations during manufacturing and to choose the best methods available to mitigate these issues during the design process; Offers both qual...

  2. Graphene/Si CMOS Hybrid Hall Integrated Circuits

    OpenAIRE

    Huang, Le; Xu, Huilong; Zhang, Zhiyong; Chen, Chengying; Jiang, Jianhua; Ma, Xiaomeng; Chen, Bingyan; Li, Zishen; Zhong, Hua; Peng, Lian-Mao

    2014-01-01

    Graphene/silicon CMOS hybrid integrated circuits (ICs) should provide powerful functions which combines the ultra-high carrier mobility of graphene and the sophisticated functions of silicon CMOS ICs. But it is difficult to integrate these two kinds of heterogeneous devices on a single chip. In this work a low temperature process is developed for integrating graphene devices onto silicon CMOS ICs for the first time, and a high performance graphene/CMOS hybrid Hall IC is demonstrated. Signal a...

  3. Photonic integrated circuits based on silica and polymer PLC

    Science.gov (United States)

    Izuhara, T.; Fujita, J.; Gerhardt, R.; Sui, B.; Lin, W.; Grek, B.

    2013-03-01

    Various methods of hybrid integration of photonic circuits are discussed focusing on merits and challenges. Material platforms discussed in this report are mainly polymer and silica. We categorize the hybridization methods using silica and polymer waveguides into two types, chip-to-chip and on-chip integration. General reviews of these hybridization technologies from the past works are reviewed. An example for each method is discussed in details. We also discuss current status of our silica PLC hybrid integration technology.

  4. Fault diagnosis of analog circuit by integrating principal component analysis with linear discriminant analysis%基于主元和判别集成分析的模拟电路故障诊断

    Institute of Scientific and Technical Information of China (English)

    肖迎群; 何怡刚; 刘继乾; 张广辉; 朱珠

    2015-01-01

    The method of feature extraction on analog fault data by integrating principal component analysis(PCA) and linear discriminant analysis(LDA) is proposed. Firstly, PCA on analog fault data is carried out. Then, LDA is implemented in the transformed PCA space for obtaining the optimal discriminant features. Finally, the acquired patterns are applied to the pattern classifier for fault diagnosis. The simulation results show that the proposed method can take advantage of the simple computation of linear methods, enhance the performance of feature extraction of single PCA or LDA method, acquire the intrinsic features in fault data set, simplify the structure of the pattern classifier and reduce the computational cost of the diagnostic system.%提出了主元和线性判别的集成分析算法以实施模拟故障数据的特征提取过程和方法。该集成分析方法首先对模拟故障数据进行主元分析,然后在主元变换空间实行线性判别分析,最后将所获得的最优判别特征模式应用于模式分类器进行故障诊断。仿真结果表明,所提出的方法能够充分利用线性方法的计算简便优势,增强单一主元分析或线性判别分析的特征提取性能,获取故障数据集的本质特征,简化模式分类器的结构,降低系统运行的计算成本。

  5. Cascade photonic integrated circuit architecture for electro-optic in-phase quadrature/single sideband modulation or frequency conversion.

    Science.gov (United States)

    Hasan, Mehedi; Hall, Trevor

    2015-11-01

    A photonic integrated circuit architecture for implementing frequency upconversion is proposed. The circuit consists of a 1×2 splitter and 2×1 combiner interconnected by two stages of differentially driven phase modulators having 2×2 multimode interference coupler between the stages. A transfer matrix approach is used to model the operation of the architecture. The predictions of the model are validated by simulations performed using an industry standard software tool. The intrinsic conversion efficiency of the proposed design is improved by 6 dB over the alternative functionally equivalent circuit based on dual parallel Mach-Zehnder modulators known in the prior art. A two-tone analysis is presented to study the linearity of the proposed circuit, and a comparison is provided over the alternative. The proposed circuit is suitable for integration in any platform that offers linear electro-optic phase modulation such as LiNbO(3), silicon, III-V, or hybrid technology.

  6. Silicon integrated circuits advances in materials and device research

    CERN Document Server

    Kahng, Dawon

    1981-01-01

    Silicon Integrated Circuits, Part B covers the special considerations needed to achieve high-power Si-integrated circuits. The book presents articles about the most important operations needed for the high-power circuitry, namely impurity diffusion and oxidation; crystal defects under thermal equilibrium in silicon and the development of high-power device physics; and associated technology. The text also describes the ever-evolving processing technology and the most promising approaches, along with the understanding of processing-related areas of physics and chemistry. Physicists, chemists, an

  7. Thermally-induced voltage alteration for integrated circuit analysis

    Energy Technology Data Exchange (ETDEWEB)

    Cole, Jr., Edward I. (Albuquerque, NM)

    2000-01-01

    A thermally-induced voltage alteration (TIVA) apparatus and method are disclosed for analyzing an integrated circuit (IC) either from a device side of the IC or through the IC substrate to locate any open-circuit or short-circuit defects therein. The TIVA apparatus uses constant-current biasing of the IC while scanning a focused laser beam over electrical conductors (i.e. a patterned metallization) in the IC to produce localized heating of the conductors. This localized heating produces a thermoelectric potential due to the Seebeck effect in any conductors with open-circuit defects and a resistance change in any conductors with short-circuit defects, both of which alter the power demand by the IC and thereby change the voltage of a source or power supply providing the constant-current biasing. By measuring the change in the supply voltage and the position of the focused and scanned laser beam over time, any open-circuit or short-circuit defects in the IC can be located and imaged. The TIVA apparatus can be formed in part from a scanning optical microscope, and has applications for qualification testing or failure analysis of ICs.

  8. Thermally-induced voltage alteration for integrated circuit analysis

    Energy Technology Data Exchange (ETDEWEB)

    Cole, E.I. Jr.

    2000-06-20

    A thermally-induced voltage alteration (TIVA) apparatus and method are disclosed for analyzing an integrated circuit (IC) either from a device side of the IC or through the IC substrate to locate any open-circuit or short-circuit defects therein. The TIVA apparatus uses constant-current biasing of the IC while scanning a focused laser beam over electrical conductors (i.e. a patterned metallization) in the IC to produce localized heating of the conductors. This localized heating produces a thermoelectric potential due to the Seebeck effect in any conductors with open-circuit defects and a resistance change in any conductors with short-circuit defects, both of which alter the power demand by the IC and thereby change the voltage of a source or power supply providing the constant-current biasing. By measuring the change in the supply voltage and the position of the focused and scanned laser beam over time, any open-circuit or short-circuit defects in the IC can be located and imaged. The TIVA apparatus can be formed in part from a scanning optical microscope, and has applications for qualification testing or failure analysis of ICs.

  9. Integrated logic circuits using single-atom transistors.

    Science.gov (United States)

    Mol, J A; Verduijn, J; Levine, R D; Remacle, F; Rogge, S

    2011-08-23

    Scaling down the size of computing circuits is about to reach the limitations imposed by the discrete atomic structure of matter. Reducing the power requirements and thereby dissipation of integrated circuits is also essential. New paradigms are needed to sustain the rate of progress that society has become used to. Single-atom transistors, SATs, cascaded in a circuit are proposed as a promising route that is compatible with existing technology. We demonstrate the use of quantum degrees of freedom to perform logic operations in a complementary-metal-oxide-semiconductor device. Each SAT performs multilevel logic by electrically addressing the electronic states of a dopant atom. A single electron transistor decodes the physical multivalued output into the conventional binary output. A robust scalable circuit of two concatenated full adders is reported, where by utilizing charge and quantum degrees of freedom, the functionality of the transistor is pushed far beyond that of a simple switch.

  10. Biochips: The Integrated Circuit of Biology

    DEFF Research Database (Denmark)

    Madsen, Jan

    2012-01-01

    Microfluidic biochips integrate different biochemical analysis functionalities (e.g., dispensers, filters, mixers, separators, detectors) on-chip, miniaturizing the macroscopic chemical and biological processes often processed by lab-robots, to a sub-millimeter scale. These microsystems offer...... several advantages over the conventional biochemical analyzers, e.g., reduced sample and reagent volumes, speeded up biochemical reactions, ultra-sensitive detection and higher system throughput, with several assays being integrated on the same chip. Hence, microfluidic biochips are replacing...... the conventional biochemical analyzers, and areable to integrate on-chip all the necessary functions for biochemical analysis. Microfluidic biochips have an immense potential in multiple application areas, such as clinical diagnostics, advanced sequencing, drug discovery, and environmental monitoring, to name...

  11. Integrated circuits for particle physics experiments

    CERN Document Server

    Snoeys, W; Campbell, M; Cantatore, E; Faccio, F; Heijne, Erik H M; Jarron, Pierre; Kloukinas, Kostas C; Marchioro, A; Moreira, P; Toifl, Thomas H; Wyllie, Ken H

    2000-01-01

    High energy particle physics experiments investigate the nature of matter through the identification of subatomic particles produced in collisions of protons, electrons, or heavy ions which have been accelerated to very high energies. Future experiments will have hundreds of millions of detector channels to observe the interaction region where collisions take place at a 40 MHz rate. This paper gives an overview of the electronics requirements for such experiments and explains how data reduction, timing distribution, and radiation tolerance in commercial CMOS circuits are achieved for these big systems. As a detailed example, the electronics for the innermost layers of the future tracking detector, the pixel vertex detector, is discussed with special attention to system aspects. A small-scale prototype (130 channels) implemented in standard 0.25 mu m CMOS remains fully functional after a 30 Mrad(SiO/sub 2/) irradiation. A full-scale pixel readout chip containing 8000 readout channels in a 14 by 16 mm/sup 2/ ar...

  12. Printed organic thin-film transistor-based integrated circuits

    Science.gov (United States)

    Mandal, Saumen; Noh, Yong-Young

    2015-06-01

    Organic electronics is moving ahead on its journey towards reality. However, this technology will only be possible when it is able to meet specific criteria including flexibility, transparency, disposability and low cost. Printing is one of the conventional techniques to deposit thin films from solution-based ink. It is used worldwide for visual modes of information, and it is now poised to enter into the manufacturing processes of various consumer electronics. The continuous progress made in the field of functional organic semiconductors has achieved high solubility in common solvents as well as high charge carrier mobility, which offers ample opportunity for organic-based printed integrated circuits. In this paper, we present a comprehensive review of all-printed organic thin-film transistor-based integrated circuits, mainly ring oscillators. First, the necessity of all-printed organic integrated circuits is discussed; we consider how the gap between printed electronics and real applications can be bridged. Next, various materials for printed organic integrated circuits are discussed. The features of these circuits and their suitability for electronics using different printing and coating techniques follow. Interconnection technology is equally important to make this product industrially viable; much attention in this review is placed here. For high-frequency operation, channel length should be sufficiently small; this could be achievable with a combination of surface treatment-assisted printing or laser writing. Registration is also an important issue related to printing; the printed gate should be perfectly aligned with the source and drain to minimize parasitic capacitances. All-printed organic inverters and ring oscillators are discussed here, along with their importance. Finally, future applications of all-printed organic integrated circuits are highlighted.

  13. 77 FR 19032 - Certain Semiconductor Integrated Circuit Devices and Products Containing Same Notice of Receipt...

    Science.gov (United States)

    2012-03-29

    ...] [FR Doc No: 2012-7567] INTERNATIONAL TRADE COMMISSION [DN 2888] Certain Semiconductor Integrated... Certain Semiconductor Integrated Circuit Devices and Products Containing Same, DN 2888; the Commission is... importation of certain semiconductor integrated circuit devices and products containing same. The...

  14. 75 FR 51843 - In the Matter of Certain Large Scale Integrated Circuit Semiconductor Chips and Products...

    Science.gov (United States)

    2010-08-23

    ... Matter of Certain Large Scale Integrated Circuit Semiconductor Chips and Products Containing the Same... certain large scale integrated circuit semiconductor chips and products containing same by reason of... including the following: Freescale Semiconductor Xiqing Integrated Semiconductor Manufacturing...

  15. A Differential Monolithically Integrated Inductive Linear Displacement Measurement Microsystem

    Directory of Open Access Journals (Sweden)

    Matija Podhraški

    2016-03-01

    Full Text Available An inductive linear displacement measurement microsystem realized as a monolithic Application-Specific Integrated Circuit (ASIC is presented. The system comprises integrated microtransformers as sensing elements, and analog front-end electronics for signal processing and demodulation, both jointly fabricated in a conventional commercially available four-metal 350-nm CMOS process. The key novelty of the presented system is its full integration, straightforward fabrication, and ease of application, requiring no external light or magnetic field source. Such systems therefore have the possibility of substituting certain conventional position encoder types. The microtransformers are excited by an AC signal in MHz range. The displacement information is modulated into the AC signal by a metal grating scale placed over the microsystem, employing a differential measurement principle. Homodyne mixing is used for the demodulation of the scale displacement information, returned by the ASIC as a DC signal in two quadrature channels allowing the determination of linear position of the target scale. The microsystem design, simulations, and characterization are presented. Various system operating conditions such as frequency, phase, target scale material and distance have been experimentally evaluated. The best results have been achieved at 4 MHz, demonstrating a linear resolution of 20 µm with steel and copper scale, having respective sensitivities of 0.71 V/mm and 0.99 V/mm.

  16. A Differential Monolithically Integrated Inductive Linear Displacement Measurement Microsystem.

    Science.gov (United States)

    Podhraški, Matija; Trontelj, Janez

    2016-03-17

    An inductive linear displacement measurement microsystem realized as a monolithic Application-Specific Integrated Circuit (ASIC) is presented. The system comprises integrated microtransformers as sensing elements, and analog front-end electronics for signal processing and demodulation, both jointly fabricated in a conventional commercially available four-metal 350-nm CMOS process. The key novelty of the presented system is its full integration, straightforward fabrication, and ease of application, requiring no external light or magnetic field source. Such systems therefore have the possibility of substituting certain conventional position encoder types. The microtransformers are excited by an AC signal in MHz range. The displacement information is modulated into the AC signal by a metal grating scale placed over the microsystem, employing a differential measurement principle. Homodyne mixing is used for the demodulation of the scale displacement information, returned by the ASIC as a DC signal in two quadrature channels allowing the determination of linear position of the target scale. The microsystem design, simulations, and characterization are presented. Various system operating conditions such as frequency, phase, target scale material and distance have been experimentally evaluated. The best results have been achieved at 4 MHz, demonstrating a linear resolution of 20 µm with steel and copper scale, having respective sensitivities of 0.71 V/mm and 0.99 V/mm.

  17. A Differential Monolithically Integrated Inductive Linear Displacement Measurement Microsystem

    Science.gov (United States)

    Podhraški, Matija; Trontelj, Janez

    2016-01-01

    An inductive linear displacement measurement microsystem realized as a monolithic Application-Specific Integrated Circuit (ASIC) is presented. The system comprises integrated microtransformers as sensing elements, and analog front-end electronics for signal processing and demodulation, both jointly fabricated in a conventional commercially available four-metal 350-nm CMOS process. The key novelty of the presented system is its full integration, straightforward fabrication, and ease of application, requiring no external light or magnetic field source. Such systems therefore have the possibility of substituting certain conventional position encoder types. The microtransformers are excited by an AC signal in MHz range. The displacement information is modulated into the AC signal by a metal grating scale placed over the microsystem, employing a differential measurement principle. Homodyne mixing is used for the demodulation of the scale displacement information, returned by the ASIC as a DC signal in two quadrature channels allowing the determination of linear position of the target scale. The microsystem design, simulations, and characterization are presented. Various system operating conditions such as frequency, phase, target scale material and distance have been experimentally evaluated. The best results have been achieved at 4 MHz, demonstrating a linear resolution of 20 µm with steel and copper scale, having respective sensitivities of 0.71 V/mm and 0.99 V/mm. PMID:26999146

  18. Plasma Etching for Failure Analysis of Integrated Circuit Packages

    NARCIS (Netherlands)

    Tang, J.; Schelen, J.B.J.; Beenakker, C.I.M.

    2011-01-01

    Plastic integrated circuit packages with copper wire bonds are decapsulated by a Microwave Induced Plasma system. Improvements on microwave coupling of the system are achieved by frequency tuning and antenna modification. Plasmas with a mixture of O2 and CF4 showed a high etching rate around 2 mm3/m

  19. Electromagnetic Interactions in High-Speed Integrated Electronic Circuits

    Science.gov (United States)

    1989-03-31

    East Lansing, MI, December 1987. [81 D. P. Nyquist, M. S. Viola, M. J. Cloud, and M. Havrilla , "On Sommerfeld-integral electric field kernels for...KERNELS FOR NICROSTRIP-BASED CIRCUITS D.P. Nyquist, M.S. Viola, M.J. Cloud and M. Havrilla Department of Electrical Engineering Michigan State

  20. Performance of digital integrated circuit technologies at very high temperatures

    Energy Technology Data Exchange (ETDEWEB)

    Prince, J.L.; Draper, B.L.; Rapp, E.A.; Kromberg, J.N.; Fitch, L.T.

    1980-01-01

    Results of investigations of the performance and reliability of digital bipolar and CMOS integrated circuits over the 25 to 340/sup 0/C range are reported. Included in these results are both parametric variation information and analysis of the functional failure mechanisms. Although most of the work was done using commercially available circuits (TTL and CMOS) and test chips from commercially compatible processes, some results of experimental simulations of dielectrically isolated CMOS are also discussed. It was found that commercial Schottky clamped TTL, and dielectrically isolated, low power Schottky-clamped TTL, functioned to junction temperatures in excess of 325/sup 0/C. Standard gold doped TTL functioned only to 250/sup 0/C, while commercial, isolated I/sup 2/L functioned to the range 250/sup 0/C to 275/sup 0/C. Commercial junction isolated CMOS, buffered and unbuffered, functioned to the range 280/sup 0/C to 310/sup 0/C/sup +/, depending on the manufacturer. Experimental simulations of simple dielectrically isolated CMOS integrated circuits, fabricated with heavier doping levels than normal, functioned to temperatures in excess of 340/sup 0/C. High temperature life testing of experimental, silicone-encapsulated simple TTL and CMOS integrated circuits have shown no obvious life limiting problems to date. No barrier to reliable functionality of TTL bipolar or CMOS integrated ciruits at temperatures in excess of 300/sup 0/C has been found.

  1. Bioluminescent bioreporter integrated circuit devices and methods for detecting ammonia

    Energy Technology Data Exchange (ETDEWEB)

    Simpson, Michael L [Knoxville, TN; Paulus, Michael J [Knoxville, TN; Sayler, Gary S [Blaine, TN; Applegate, Bruce M [West Lafayette, IN; Ripp, Steven A [Knoxville, TN

    2007-04-24

    Monolithic bioelectronic devices for the detection of ammonia includes a microorganism that metabolizes ammonia and which harbors a lux gene fused with a heterologous promoter gene stably incorporated into the chromosome of the microorganism and an Optical Application Specific Integrated Circuit (OASIC). The microorganism is generally a bacterium.

  2. Photonic Integrated Circuits for mmW Systems

    DEFF Research Database (Denmark)

    Vegas Olmos, Juan José; Heck, M. J. R.; Tafur Monroy, Idelfonso

    and carrier frequencies required for high- capacity wireless networks and remote sensing applications. In this paper, we will introduce our e®orts to leverage the advantages of microwave photonics and photonic integrated circuits to de- velop low-cost and ubiquitous wireless technology enabled by silicon...

  3. Plasma Etching for Failure Analysis of Integrated Circuit Packages

    NARCIS (Netherlands)

    Tang, J.; Schelen, J.B.J.; Beenakker, C.I.M.

    2011-01-01

    Plastic integrated circuit packages with copper wire bonds are decapsulated by a Microwave Induced Plasma system. Improvements on microwave coupling of the system are achieved by frequency tuning and antenna modification. Plasmas with a mixture of O2 and CF4 showed a high etching rate around 2

  4. FUZZY NEURAL NETWORK FOR OBJECT IDENTIFICATION ON INTEGRATED CIRCUIT LAYOUTS

    Directory of Open Access Journals (Sweden)

    A. A. Doudkin

    2015-01-01

    Full Text Available Fuzzy neural network model based on neocognitron is proposed to identify layout objects on images of topological layers of integrated circuits. Testing of the model on images of real chip layouts was showed a highеr degree of identification of the proposed neural network in comparison to base neocognitron.

  5. 1998 technology roadmap for integrated circuits used in critical applications

    Energy Technology Data Exchange (ETDEWEB)

    Dellin, T.A.

    1998-09-01

    Integrated Circuits (ICs) are being extensively used in commercial and government applications that have extreme consequences of failure. The rapid evolution of the commercial microelectronics industry presents serious technical and supplier challenges to this niche critical IC marketplace. This Roadmap was developed in conjunction with the Using ICs in Critical Applications Workshop which was held in Albuquerque, NM, November 11--12, 1997.

  6. Printed Circuit Board Integrated Toroidal Radio Frequency Inductors

    DEFF Research Database (Denmark)

    Kamby, Peter; Knott, Arnold; Andersen, Michael A. E.

    2012-01-01

    implemented as solenoids, either in spiral or cylindrical form. Those have the disadvantage of excessive stray fields, which can cause losses and disturbances in adjacent circuitry. Therefore this paper presents the analysis, design and realization of a printed circuit board (PCB) integrated inductor under...

  7. Three-dimensional integrated circuit design

    CERN Document Server

    Xie, Yuan; Sapatnekar, Sachin S

    2009-01-01

    This book presents an overview of the field of 3D IC design, with an emphasis on electronic design automation (EDA) tools and algorithms that can enable the adoption of 3D ICs, and the architectural implementation and potential for future 3D system design. The aim of this book is to provide the reader with a complete understanding of: the promise of 3D ICs in building novel systems that enable the chip industry to continue along the path of performance scaling, the state of the art in fabrication technologies for 3D integration, the most prominent 3D-specific EDA challenges, along with solutio

  8. Radio frequency integrated circuit design for cognitive radio systems

    CERN Document Server

    Fahim, Amr

    2015-01-01

    This book fills a disconnect in the literature between Cognitive Radio systems and a detailed account of the circuit implementation and architectures required to implement such systems.  Throughout the book, requirements and constraints imposed by cognitive radio systems are emphasized when discussing the circuit implementation details.  In addition, this book details several novel concepts that advance state-of-the-art cognitive radio systems.  This is a valuable reference for anybody with background in analog and radio frequency (RF) integrated circuit design, needing to learn more about integrated circuits requirements and implementation for cognitive radio systems. ·         Describes in detail cognitive radio systems, as well as the circuit implementation and architectures required to implement them; ·         Serves as an excellent reference to state-of-the-art wideband transceiver design; ·         Emphasizes practical requirements and constraints imposed by cognitive radi...

  9. Renormalization group and linear integral equations

    Science.gov (United States)

    Klein, W.

    1983-04-01

    We develop a position-space renormalization-group transformation which can be employed to study general linear integral equations. In this Brief Report we employ our method to study one class of such equations pertinent to the equilibrium properties of fluids. The results of applying our method are in excellent agreement with known numerical calculations where they can be compared. We also obtain information about the singular behavior of this type of equation which could not be obtained numerically.

  10. Flexible circuits with integrated switches for robotic shape sensing

    Science.gov (United States)

    Harnett, C. K.

    2016-05-01

    Digital switches are commonly used for detecting surface contact and limb-position limits in robotics. The typical momentary-contact digital switch is a mechanical device made from metal springs, designed to connect with a rigid printed circuit board (PCB). However, flexible printed circuits are taking over from the rigid PCB in robotics because the circuits can bend while carrying signals and power through moving joints. This project is motivated by a previous work where an array of surface-mount momentary contact switches on a flexible circuit acted as an all-digital shape sensor compatible with the power resources of energy harvesting systems. Without a rigid segment, the smallest commercially-available surface-mount switches would detach from the flexible circuit after several bending cycles, sometimes violently. This report describes a low-cost, conductive fiber based method to integrate electromechanical switches into flexible circuits and other soft, bendable materials. Because the switches are digital (on/off), they differ from commercially-available continuous-valued bend/flex sensors. No amplification or analog-to-digital conversion is needed to read the signal, but the tradeoff is that the digital switches only give a threshold curvature value. Boundary conditions on the edges of the flexible circuit are key to setting the threshold curvature value for switching. This presentation will discuss threshold-setting, size scaling of the design, automation for inserting a digital switch into the flexible circuit fabrication process, and methods for reconstructing a shape from an array of digital switch states.

  11. Investigating Mesoscopic Non-linear Series Circuit with the Coherent Thermo State Representation

    Science.gov (United States)

    Wang, Xiu-Xia

    2017-03-01

    For the first time we considered the quantum effects of mesoscopic non-linear series circuit with the coherent thermo state representation | τ rangle . After introducing the representation |τ rangle , we derived the expression of the density matrix ρ and find that | ρ rangle T presents Gauss type with the representation | τ rangle . In addition, we derived the Wigner function and calculated the quantum fluctuation in the thermo vacuum state |0( β)>. It is shown that the circuit has the zero current fluctuation because the diode has the reverse saturation current, and the temperature affects the Wigner function of the circuit in thermo vacuum state deeply.

  12. Fundamental electric circuit elements based on the linear and nonlinear magnetoelectric effects (Presentation Recording)

    Science.gov (United States)

    Sun, Young; Shang, Dashan; Chai, Yisheng; Cao, Zexian; Lu, Jun

    2015-09-01

    From the viewpoint of electric circuit theory, the three fundamental two-terminal passive circuit elements, resistor R , capacitor C, and inductor L, are defined in terms of a relationship between two of the four basic circuit variables, charge q, current i, voltage v, and magnetic flux φ. From a symmetry concern, there should be a fourth fundamental element defined from the relationship between charge q and magnetic flux φ. Here we present both theoretical analysis and experimental evidences to demonstrate that a two-terminal passive device employing the magnetoelectric (ME) effects can exhibit a direct relationship between charge q and magnetic flux φ, and thus is able to act as the fourth fundamental circuit element. The ME effects refer to the induction of electric polarization by a magnetic field or magnetization by an electric field, and have attracted enormous interests due to their promise in many applications. However, no one has linked the ME effects with fundamental circuit theory. Both the linear and nonlinear-memory devices, termed transtor and memtranstor, respectively, have been experimentally realized using multiferroic materials showing strong ME effects. Based on our work, a full map of fundamental two-terminal circuit elements is constructed, which consists of four linear and four nonlinear-memory elements. This full map provides an invaluable guide to developing novel circuit functionalities in the future.

  13. High-Precision CMOS Analog Computational Circuits Based on a New Linearly Tunable OTA

    Directory of Open Access Journals (Sweden)

    A. Naderi Saatlo

    2016-06-01

    Full Text Available Implementation of CMOS current-mode analog computational circuits are presented in this paper. A new Linearly Tunable OTA is employed in a modified structure as a basic building block for implementation of the circuits either linear or nonlinear functions. The proposed trans-conductance amplifier provides a constant Gm over a wide range of input voltage which allows the implementation of high precision computational circuits including square rooting, squaring, multiplication and division functions. Layout pattern of the proposed circuit confirms that the circuit can be implemented in 102μm*69μm active area. In order to verify the performance of the circuits, the post layout simulation results are presented through the use of HSPICE and Cadence with TSMC level 49 (BSIM3v3 parameters for 0.18 μm CMOS technology, where under supply voltage of 1.8 V, the maximum relative error of the circuits within 500 µA of input range is about 11 μA (2.2 % error and the THD remains as low as 1.2 % for the worst case. Moreover, the power dissipation of the complete structure is found to be 0.66 mW.

  14. Quantum dot rolled-up microtube optoelectronic integrated circuit.

    Science.gov (United States)

    Bhowmick, Sishir; Frost, Thomas; Bhattacharya, Pallab

    2013-05-15

    A rolled-up microtube optoelectronic integrated circuit operating as a phototransceiver is demonstrated. The microtube is made of a InGaAs/GaAs strained bilayer with InAs self-organized quantum dots inserted in the GaAs layer. The phototransceiver consists of an optically pumped microtube laser and a microtube photoconductive detector connected by an a-Si/SiO2 waveguide. The loss in the waveguide and responsivity of the entire phototransceiver circuit are 7.96 dB/cm and 34 mA/W, respectively.

  15. Digital integrated circuit design using Verilog and SystemVerilog

    CERN Document Server

    Mehler, Ronald W

    2014-01-01

    For those with a basic understanding of digital design, this book teaches the essential skills to design digital integrated circuits using Verilog and the relevant extensions of SystemVerilog. In addition to covering the syntax of Verilog and SystemVerilog, the author provides an appreciation of design challenges and solutions for producing working circuits. The book covers not only the syntax and limitations of HDL coding, but deals extensively with design problems such as partitioning and synchronization, helping you to produce designs that are not only logically correct, but will actually

  16. Design of high-linear CMOS circuit using a constant transconductance method for gamma-ray spectroscopy system

    Energy Technology Data Exchange (ETDEWEB)

    Jung, I.I. [School of Electrical and Electronics Engineering, Chung-Ang University, Seoul 156-756 (Korea, Republic of); Lee, J.H. [Institute of Innovative Functional Imaging, Chung-Ang University, Seoul 156-756 (Korea, Republic of); Lee, C.S. [Department of Physics, Chung-Ang University, Seoul 156-756 (Korea, Republic of); Choi, Y.-W., E-mail: ychoi@cau.ac.k [School of Electrical and Electronics Engineering, Chung-Ang University, Seoul 156-756 (Korea, Republic of)

    2011-02-11

    We propose a novel circuit to be applied to the front-end integrated circuits of gamma-ray spectroscopy systems. Our circuit is designed as a type of current conveyor (ICON) employing a constant-g{sub m} (transconductance) method which can significantly improve the linearity in the amplified signals by using a large time constant and the time-invariant characteristics of an amplifier. The constant-g{sub m} method is obtained by a feedback control which keeps the transconductance of the input transistor constant. To verify the performance of the propose circuit, the time constant variations for the channel resistances are simulated with the TSMC 0.18{mu}m transistor parameters using HSPICE, and then compared with those of a conventional ICON. As a result, the proposed ICON shows only 0.02% output linearity variation and 0.19% time constant variation for the input amplitude up to 100 mV. These are significantly small values compared to a conventional ICON's 1.39% and 19.43%, respectively, for the same conditions.

  17. Development of a viable 3D integrated circuit technology

    Institute of Scientific and Technical Information of China (English)

    陈文新; 高秉强

    2001-01-01

    Three_dimensional integrated circuit technology with transistors stacked on top of one another in multi-layer silicon film has always been a vision in the future technology direction. While the idea is simple, the technique to obtain high performance multi-layer transistors is extraordinarily difficult. Not until recently does such technology become feasible. In this paper, the background and various techniques to form three-dimensional circuits will be reviewed. Recent development of a simple and promising technology to achieve three-dimensional integration using Metal-Induced-Lateral-Crystallization will be described. Preliminary results of 3D inverters will also be provided to demonstrate the viability for 3D integration.

  18. Millimeter-wave and terahertz integrated circuit antennas

    Science.gov (United States)

    Rebeiz, Gabriel M.

    1992-01-01

    This paper presents a comprehensive review of integrated circuit antennas suitable for millimeter and terahertz applications. A great deal of research was done on integrated circuit antennas in the last decade and many of the problems associated with electrically thick dielectric substrates, such as substrate modes and poor radiation patterns, have been understood and solved. Several new antennas, such as the integrated horn antenna, the dielectric-filled parabola, the Fresnel plate antenna, the dual-slot antenna, and the log-periodic and spiral antennas on extended hemispherical lenses, have resulted in excellent performance at millimeter-wave frequencies, and are covered in detail in this paper. Also, a review of the efficiency definitions used with planar antennas is given in detail in the appendix.

  19. Misaligned Image Integration With Local Linear Model.

    Science.gov (United States)

    Baba, Tatsuya; Matsuoka, Ryo; Shirai, Keiichiro; Okuda, Masahiro

    2016-05-01

    We present a new image integration technique for a flash and long-exposure image pair to capture a dark scene without incurring blurring or noisy artifacts. Most existing methods require well-aligned images for the integration, which is often a burdensome restriction in practical use. We address this issue by locally transferring the colors of the flash images using a small fraction of the corresponding pixels in the long-exposure images. We formulate the image integration as a convex optimization problem with the local linear model. The proposed method makes it possible to integrate the color of the long-exposure image with the detail of the flash image without causing any harmful effects to its contrast, where we do not need perfect alignment between the images by virtue of our new integration principle. We show that our method successfully outperforms the state of the art in the image integration and reference-based color transfer for challenging misaligned data sets.

  20. Integrated microchannel cooling in a three dimensional integrated circuit: A thermal management

    Directory of Open Access Journals (Sweden)

    Wang Kang-Jia

    2016-01-01

    Full Text Available Microchannel cooling is a promising technology for solving the three-dimensional integrated circuit thermal problems. However, the relationship between the microchannel cooling parameters and thermal behavior of the three dimensional integrated circuit is complex and difficult to understand. In this paper, we perform a detailed evaluation of the influence of the microchannel structure and the parameters of the cooling liquid on steady-state temperature profiles. The results presented in this paper are expected to aid in the development of thermal design guidelines for three dimensional integrated circuit with microchannel cooling.

  1. RF and microwave integrated circuit development technology, packaging and testing

    CERN Document Server

    Gamand, Patrice; Kelma, Christophe

    2017-01-01

    RF and Microwave Integrated Circuit Development bridges the gap between existing literature, which focus mainly on the 'front-end' part of a product development (system, architecture, design techniques), by providing the reader with an insight into the 'back-end' part of product development. In addition, the authors provide practical answers and solutions regarding the choice of technology, the packaging solutions and the effects on the performance on the circuit and to the industrial testing strategy. It will also discuss future trends and challenges and includes case studies to illustrate examples. * Offers an overview of the challenges in RF/microwave product design * Provides practical answers to packaging issues and evaluates its effect on the performance of the circuit * Includes industrial testing strategies * Examines relevant RF MIC technologies and the factors which affect the choice of technology for a particular application, e.g. technical performance and cost * Discusses future trends and challen...

  2. Total Dose Effects on Single Event Transients in Digital CMOS and Linear Bipolar Circuits

    Science.gov (United States)

    Buchner, S.; McMorrow, D.; Sibley, M.; Eaton, P.; Mavis, D.; Dusseau, L.; Roche, N. J-H.; Bernard, M.

    2009-01-01

    This presentation discusses the effects of ionizing radiation on single event transients (SETs) in circuits. The exposure of integrated circuits to ionizing radiation changes electrical parameters. The total ionizing dose effect is observed in both complementary metal-oxide-semiconductor (CMOS) and bipolar circuits. In bipolar circuits, transistors exhibit grain degradation, while in CMOS circuits, transistors exhibit threshold voltage shifts. Changes in electrical parameters can cause changes in single event upset(SEU)/SET rates. Depending on the effect, the rates may increase or decrease. Therefore, measures taken for SEU/SET mitigation might work at the beginning of a mission but not at the end following TID exposure. The effect of TID on SET rates should be considered if SETs cannot be tolerated.

  3. Quantum well intermixing for photonic integrated circuits

    Science.gov (United States)

    Sun, Xiaolan

    2007-12-01

    In this thesis, several aspects of GaAsSb/AlSb multiple quantum well (MQW) heterostructures have been studied. First, it was shown that the GaAsSb MQWs with a direct band gap near 1.5 mum at room temperature could be monolithically integrated with AlGaSb/AlSb or AlGaAsSb/AlAsSb Bragg mirrors, which can be applied to Vertical Cavity Surface Emitting Lasers (VCSELs). Secondly, an enhanced photoluminescence from GaAsSb MQWs was reported. The photoluminescence strength increased dramatically with arsenic fraction as conjectured. The peak photoluminescence from GaAs0.31Sb 0.69 was 208 times larger than that from GaSb. Thirdly, the strong photoluminescence from GaAsSb MQWs and the direct nature of the band gap near 1.5 mum at room temperature make the material favorable for intermixing studies. The samples were treated with ion implantation followed by rapid thermal annealing (RTA). A band gap blueshift as large as 198 nm was achieved with a modest ion dose and moderate annealing temperature. Photoluminescence strength for implanted samples generally increased with the annealing temperature. The energy blueshift was attributed to the interdiffusion of both the group III and group V sublattices. Finally, based on the interesting properties of GaAsSb MQWs, including the direct band gap near 1.5 mum, strong photoluminescence, a wide range of wavelength (1300--1500 nm) due to ion implantation-induced quantum well intermixing (QWI), and subpicosecond spin relaxation reported by Hall et al, we proposed to explore the possibilities for ultra-fast optical switching by investigating spin dynamics in semiconductor optical amplifiers (SOAs) containing InGaAs and GaSb MQWs. For circularly polarized pump and probe waves, the numerical simulation on the modal indices showed that the difference between the effective refractive index of the TE and TM modes was quite large, on the order of 0.03, resulting in a significant phase mismatch in a traveling length larger than 28 mum. Thus the

  4. Power-Integrated Circuit Active Leakage Current Detector

    Directory of Open Access Journals (Sweden)

    M. F. Bulacio

    2012-01-01

    Full Text Available Most of the failures of induction motors become insulation faults, causing a permanent damage. Using differential current transformers, a system capable of insulation fault detection was developed, based on the differential relay protection scheme. Both signal injection and fault detection circuitry were integrated in a single chip. The proposed scheme is faster than other existing protection and not restricted to protect induction motors, but several other devices (such as IGBTs and systems. This paper explains the principle of operation of fault protection scheme and analyzes an integrated implementation through simulations and experimental results. A power-integrated circuit (PIC implementation is presented.

  5. Attachment method for stacked integrated circuit (IC) chips

    Energy Technology Data Exchange (ETDEWEB)

    Bernhardt, Anthony F. (Berkeley, CA); Malba, Vincent (Livermore, CA)

    1999-01-01

    An attachment method for stacked integrated circuit (IC) chips. The method involves connecting stacked chips, such as DRAM memory chips, to each other and/or to a circuit board. Pads on the individual chips are rerouted to form pads on the side of the chip, after which the chips are stacked on top of each other whereby desired interconnections to other chips or a circuit board can be accomplished via the side-located pads. The pads on the side of a chip are connected to metal lines on a flexible plastic tape (flex) by anisotropically conductive adhesive (ACA). Metal lines on the flex are likewise connected to other pads on chips and/or to pads on a circuit board. In the case of a stack of DRAM chips, pads to corresponding address lines on the various chips may be connected to the same metal line on the flex to form an address bus. This method has the advantage of reducing the number of connections required to be made to the circuit board due to bussing; the flex can accommodate dimensional variation in the alignment of chips in the stack; bonding of the ACA is accomplished at low temperature and is otherwise simpler and less expensive than solder bonding; chips can be bonded to the ACA all at once if the sides of the chips are substantially coplanar, as in the case for stacks of identical chips, such as DRAM.

  6. Attachment method for stacked integrated circuit (IC) chips

    Energy Technology Data Exchange (ETDEWEB)

    Bernhardt, A.F.; Malba, V.

    1999-08-03

    An attachment method for stacked integrated circuit (IC) chips is disclosed. The method involves connecting stacked chips, such as DRAM memory chips, to each other and/or to a circuit board. Pads on the individual chips are rerouted to form pads on the side of the chip, after which the chips are stacked on top of each other whereby desired interconnections to other chips or a circuit board can be accomplished via the side-located pads. The pads on the side of a chip are connected to metal lines on a flexible plastic tape (flex) by anisotropically conductive adhesive (ACA). Metal lines on the flex are likewise connected to other pads on chips and/or to pads on a circuit board. In the case of a stack of DRAM chips, pads to corresponding address lines on the various chips may be connected to the same metal line on the flex to form an address bus. This method has the advantage of reducing the number of connections required to be made to the circuit board due to bussing; the flex can accommodate dimensional variation in the alignment of chips in the stack; bonding of the ACA is accomplished at low temperature and is otherwise simpler and less expensive than solder bonding; chips can be bonded to the ACA all at once if the sides of the chips are substantially coplanar, as in the case for stacks of identical chips, such as DRAM. 12 figs.

  7. Electrothermal Analysis of Three-Dimensional Integrated Circuits

    Science.gov (United States)

    Harris, Theodore Robert

    2011-12-01

    Transient electro-thermal simulation of a three dimensional integrated circuit (3DIC) is reported that uses a cell-based simulation to provide a selected transistor thermal profile while providing advantages of hierarchical simulation. Due to CPU and memory limitations, full transistor electro-thermal simulations on a useful scale are not possible. Standard cells are considered on a per-instance basis and modeled with electro-thermal macro-models developed in a multi-physics simulator. Simulations are compared favorably to measurements for a token-generating 3DIC clocking at a maximum of 1 GHz. The 3DIC, which is composed of 9 by 3 layers of repetitive frequency multipliers and dividers, was fabricated with the Massachusetts Institute of Technology Lincoln Laboratory (MITLL) 3DIC process. Measurements indicated a linear rise in temperature of the active areas over a range of applied background ambient temperatures. An average of 7.5 K change in temperature was measured across dense areas of circuitry. For thermal simulation, the physical characteristics of the 3DIC were extracted from flattened OpenAccess layout files. Material parameters, connections, and geometries were considered in order to create a more physically accurate resistive thermal mesh. Physical thermal networks extracted with resolutions of 10 mum and 5 mum connect thermal terminals of the electrothermal macromodel cell elements to active layers yielding temporal and spatial simulated dynamic thermal results in three dimensions. Coupled with model-order reduction techniques, hierarchical dynamic electrothermal simulation of large 3DICs is shown to be tractable, yielding spatial and temporal selected transistor-level thermal profiles.

  8. A Low Power Linear Phase Programmable Long Delay Circuit.

    Science.gov (United States)

    Rodriguez-Villegas, Esther; Logesparan, Lojini; Casson, Alexander J

    2014-06-01

    A novel linear phase programmable delay is being proposed and implemented in a 0.35 μm CMOS process. The delay line consists of N cascaded cells, each of which delays the input signal by Td/N, where Td is the total line delay. The delay generated by each cell is programmable by changing a clock frequency and is also fully independent of the frequency of the input signal. The total delay hence depends only on the chosen clock frequency and the total number of cascaded cells. The minimum clock frequency is limited by the maximum time a voltage signal can effectively be held by an individual cell. The maximum number of cascaded cells will be limited by the effects of accumulated offset due to transistor mismatch, which eventually will affect the operating mode of the individual transistors in a cell. This latter limitation has however been dealt with in the topology by having an offset compensation mechanism that makes possible having a large number of cascaded cells and hence a long resulting delay. The delay line has been designed for scalp-based neural activity analysis that is predominantly in the sub-100 Hz frequency range. For these signals, the delay generated by a 31-cell cascade has been demonstrated to be programmable from 30 ms to 3 s. Measurement results demonstrate a 31 stage, 50 Hz bandwidth, 0.3 s delay that operates from a 1.1 V supply with power consumption of 270 nW.

  9. Design of a high linearity and high gain accuracy analog baseband circuit for DAB receiver

    Science.gov (United States)

    Li, Ma; Zhigong, Wang; Jian, Xu; Yiqiang, Wu; Junliang, Wang; Mi, Tian; Jianping, Chen

    2015-02-01

    An analog baseband circuit of high linearity and high gain accuracy for a digital audio broadcasting receiver is implemented in a 0.18-μm RFCMOS process. The circuit comprises a 3rd-order active-RC complex filter (CF) and a programmable gain amplifier (PGA). An automatic tuning circuit is also designed to tune the CF's pass band. Instead of the class-A fully differential operational amplifier (FDOPA) adopted in the conventional CF and PGA design, a class-AB FDOPA is specially employed in this circuit to achieve a higher linearity and gain accuracy for its large current swing capability with lower static current consumption. In the PGA circuit, a novel DC offset cancellation technique based on the MOS resistor is introduced to reduce the settling time significantly. A reformative switching network is proposed, which can eliminate the switch resistor's influence on the gain accuracy of the PGA. The measurement result shows the gain range of the circuit is 10-50 dB with a 1-dB step size, and the gain accuracy is less than ±0.3 dB. The OIP3 is 23.3 dBm at the gain of 10 dB. Simulation results show that the settling time is reduced from 100 to 1 ms. The image band rejection is about 40 dB. It only draws 4.5 mA current from a 1.8 V supply voltage.

  10. 75 FR 75694 - Certain Semiconductor Integration Circuits Using Tungsten Metallization and Products Containing...

    Science.gov (United States)

    2010-12-06

    ... COMMISSION Certain Semiconductor Integration Circuits Using Tungsten Metallization and Products Containing... United States after importation of certain semiconductor integrated circuits using tungsten metallization... following six respondents ] remained in the investigation: Tower Semiconductor, Ltd. of Israel;...

  11. 76 FR 58041 - Certain Digital Televisions Containing Integrated Circuit Devices and Components Thereof; Notice...

    Science.gov (United States)

    2011-09-19

    ... COMMISSION Certain Digital Televisions Containing Integrated Circuit Devices and Components Thereof; Notice... certain digital televisions containing integrated circuit devices and components thereof by reason of... the sale within the United States after importation of certain digital televisions containing...

  12. 77 FR 42764 - Certain Integrated Circuits, Chipsets, & Products Containing Same Including Televisions; Notice...

    Science.gov (United States)

    2012-07-20

    ... From the Federal Register Online via the Government Publishing Office INTERNATIONAL TRADE COMMISSION Certain Integrated Circuits, Chipsets, & Products Containing Same Including Televisions; Notice of... limited exclusion order against certain integrated circuits, chipsets, and products containing the...

  13. Radiation Testing and Evaluation Issues for Modern Integrated Circuits

    Science.gov (United States)

    LaBel, Kenneth A.; Cohn, Lew M.

    2005-01-01

    Abstract. Changes in modern integrated circuit (IC) technologies have modified the way we approach and conduct radiation tolerance and testing of electronics. These changes include scaling of geometries, new materials, new packaging technologies, and overall speed and device complexity challenges. In this short course section, we will identify and discuss these issues as they impact radiation testing, modeling, and effects mitigation of modern integrated circuits. The focus will be on CMOS-based technologies, however, other high performance technologies will be discussed where appropriate. The effects of concern will be: Single-Event Effects (SEE) and steady state total ionizing dose (TID) IC response. However, due to the growing use of opto-electronics in space systems issues concerning displacement damage testing will also be considered. This short course section is not intended to provide detailed "how-to-test" information, but simply provide a snapshot of current challenges and some of the approaches being considered.

  14. A photospectrometer realized in a standard integrated circuit process

    Energy Technology Data Exchange (ETDEWEB)

    Simpson, M.L.; Dress, W.B.; Ericson, M.N.; Jellison, G.E.; Sitter, D.N.; Wintenberg, A.L. [Oak Ridge National Laboratory, P.O. Box 2008, MS 6006, Oak Ridge, Tennessee37831-6006 (United States); French, D.F. [Department of Electrical Engineering, Ferris Hall, University of Tennessee, Knoxville, Tennessee 37996-2100 (United States)

    1998-02-01

    A photospectrometer has been realized in a standard integrated circuit (IC) process. Only the masks, materials, and fabrication steps inherent to this IC process were used (i.e., no post processing to add mechanical or optical devices for filtering). The spectrometer was composed of a set of 18 photodetectors with independent spectral responses. The responses of these devices were weighted and summed to form outputs proportional to the input optical power in discrete wavelength bands in the region from {approximately}400 to {approximately}1100nm. With the solution space restricted to a 60 nm band, this instrument could resolve Gaussian input spectra ({sigma}=5nm) with a peak-to-peak spacing of less than 15 nm. This device could easily be integrated with additional analog, digital, or wireless circuits to realize a true laboratory instrument on-a-chip. {copyright} {ital 1998 American Institute of Physics.}

  15. Design techniques for low-voltage analog integrated circuits

    Science.gov (United States)

    Rakús, Matej; Stopjaková, Viera; Arbet, Daniel

    2017-08-01

    In this paper, a review and analysis of different design techniques for (ultra) low-voltage integrated circuits (IC) are performed. This analysis shows that the most suitable design methods for low-voltage analog IC design in a standard CMOS process include techniques using bulk-driven MOS transistors, dynamic threshold MOS transistors and MOS transistors operating in weak or moderate inversion regions. The main advantage of such techniques is that there is no need for any modification of standard CMOS structure or process. Basic circuit building blocks like differential amplifiers or current mirrors designed using these approaches are able to operate with the power supply voltage of 600 mV (or even lower), which is the key feature towards integrated systems for modern portable applications.

  16. A linearly and circularly polarized active integrated antenna

    Science.gov (United States)

    Khoshniat, Ali

    This thesis work presents a new harmonic suppression technique for microstrip patch antennas. Harmonic suppression in active integrated antennas is known as an effective method to improve the efficiency of amplifiers in transmitter side. In the proposed design, the antenna works as the radiating element and, at the same time, as the tuning load for the amplifier circuit that is directly matched to the antenna. The proposed active antenna architecture is easy to fabricate and is symmetric, so it can be conveniently mass-produced and designed to have circular polarization, which is preferred in many applications such as satellite communications. The antenna simulations were performed using Ansoft High Frequency System Simulator (HFSS) and all amplifier design steps were simulated by Advanced Design System (ADS). The final prototypes of the linearly polarized active integrated antenna and the circularly polarized active integrated antenna were fabricated using a circuit board milling machine. The antenna radiation pattern was measured inside Utah State University's anechoic chamber and the results were satisfactory. Power measurements for the amplifiers' performance were carried out inside the chamber and calculated by using the Friis transmission equation. It is seen that a significant improvement in the efficiency is achieved compared to the reference antenna without harmonic suppression. Based on the success in the single element active antenna design, the thesis also presents a feasibility of applying the active integrated antenna in array configuration, in particular, in scanning array design to yield a low-profile, low-cost alternative to the parabolic antenna transmitter of satellite communication systems.

  17. Circuits and systems based on delta modulation linear, nonlinear and mixed mode processing

    CERN Document Server

    Zrilic, Djuro G

    2005-01-01

    This book is intended for students and professionals who are interested in the field of digital signal processing of delta-sigma modulated sequences. The overall focus is on the development of algorithms and circuits for linear, non-linear, and mixed mode processing of delta-sigma modulated pulse streams. The material presented here is directly relevant to applications in digital communication, DSP, instrumentation, and control.

  18. Modified Hyperspheres Algorithm to Trace Homotopy Curves of Nonlinear Circuits Composed by Piecewise Linear Modelled Devices

    Directory of Open Access Journals (Sweden)

    H. Vazquez-Leal

    2014-01-01

    Full Text Available We present a homotopy continuation method (HCM for finding multiple operating points of nonlinear circuits composed of devices modelled by using piecewise linear (PWL representations. We propose an adaptation of the modified spheres path tracking algorithm to trace the homotopy trajectories of PWL circuits. In order to assess the benefits of this proposal, four nonlinear circuits composed of piecewise linear modelled devices are analysed to determine their multiple operating points. The results show that HCM can find multiple solutions within a single homotopy trajectory. Furthermore, we take advantage of the fact that homotopy trajectories are PWL curves meant to replace the multidimensional interpolation and fine tuning stages of the path tracking algorithm with a simple and highly accurate procedure based on the parametric straight line equation.

  19. Problems of Reliability of Semiconductor Integrated Circuits in Plastic Housings,

    Science.gov (United States)

    1980-10-24

    of PNP transistors in plastic housings (expressed in % per 1000 h) with the 90% confidence level as a function of the sum of temperature T (in oC) and...semiconductor integrated circuits are basically modified versions of transistor housings. The characteristic feature of that type of a housing is...utilization of well-mastered technological processes introduced directly from the transistor production. Those housings have been thoroughly studied and

  20. Ohmic Contacts for High Temperature Integrated Circuits in Silicon Carbide

    OpenAIRE

    2014-01-01

    In electrical devices and integrated circuits, ohmic contacts are necessary and a prerequisite for the current transport over the metal-semiconductor junctions. At the same time, a desired property of the ohmic contacts is to not add resistance or in other way disturb the performance. For high temperature electronics, the material demands are high regarding functionality and stability at elevated working temperatures, during and after temperature cycling and during long time of use.  Silicon ...

  1. Integrated Circuit Readout for the Silicon Sensor Test Station

    CERN Document Server

    Atkin, E; Silaev, A; Fedenko, A; Karmanov, D; Merkin, M; Voronin, A

    2009-01-01

    Various chips for the silicon sensors measurements are described. These chips are based on 0.35 um and 0.18um CMOS technology. Several analog chips together with self-trigger /derandomizer one allow to measure silicon sensors designed for different purposes. Tracking systems, calorimeters, particle charge measurement system and other application sensors can be investigated by the integrated circuit readout with laser or radioactive sources. Also electrical parameters of silicon sensors can be studied by such test setup.

  2. Optimization of Segmentation Quality of Integrated Circuit Images

    Directory of Open Access Journals (Sweden)

    Gintautas Mušketas

    2012-04-01

    Full Text Available The paper presents investigation into the application of genetic algorithms for the segmentation of the active regions of integrated circuit images. This article is dedicated to a theoretical examination of the applied methods (morphological dilation, erosion, hit-and-miss, threshold and describes genetic algorithms, image segmentation as optimization problem. The genetic optimization of the predefined filter sequence parameters is carried out. Improvement to segmentation accuracy using a non optimized filter sequence makes 6%.Artcile in Lithuanian

  3. Experimental study of surface crystallization on integrated circuit chips

    Institute of Scientific and Technical Information of China (English)

    Zhang Xin; Liu Meng-Xin; Gao Yong; Wang Cai-Lin; Wang Zhi-Wei; Zhang Xian

    2006-01-01

    A surface crystallization phenomenon on bonding pads and wires of integrated circuit chip is reported in this paper. Through a lot of experiments, an unknown failure effect caused by mixed crystalline matter is revealed, whereas non-plasma fluorine contamination cannot cause the failure of bonding pads. By experiments combined with infrared spectroscopy analysis, the surface crystallization effect is studied. The conclusion of the study can provide the guidance for IC fabrication, modelling and analysis.

  4. Advances in Developing Transitions in Microwave Integrated Circuits

    Institute of Scientific and Technical Information of China (English)

    ZHANG Yun-chuan; WANG Bing-zhong

    2005-01-01

    Advances in developing transitions in microwave integrated circuits during the last ten years are reviewed. Some typical structures of transition are introduced. Transition structures can be classified into two basic types: one is transition between the same kind of transmission lines on different planes of a common substrate, the other transition between different types of transmission lines.Furthermore, future development of transition structures is discussed.

  5. PECASE: All-Optical Photonic Integrated Circuits in Silicon

    Science.gov (United States)

    2011-01-14

    Soltani , and A. Adibi, “High Quality Planar Silicon Nitride Microdisk Resonators for Integrated Photonics in the Visible Wavelength Range,” Optics...contrast, high-Q resonators in chalcogenide glass for sensing,” Opt. Lett. 33, 2500–2502 (2008). [4] B. Momeni, S. Yegnanarayanan, M. Soltani , A. A...lightwave circuits,” J. Lightwave Technol. 17(11), 2032–2038 (1999). [14] B. Momeni, J. Huang, M. Soltani , M. Askari, S. Mohammadi, M. Rakhshandehroo, and

  6. Spectral integration of linear boundary value problems

    CERN Document Server

    Viswanath, Divakar

    2012-01-01

    Spectral integration is a method for solving linear boundary value problems which uses the Chebyshev series representation of functions to avoid the numerical discretization of derivatives. It is occasionally attributed to Zebib (J. of Computational Physics vol. 53 (1984), p. 443-455) and more often to Greengard (SIAM J. on Numerical Analysis vol. 28 (1991), p. 1071-1080). Its advantage is believed to be its relative immunity to errors that arise when nearby grid points are used to approximate derivatives. In this paper, we reformulate the method of spectral integration by changing it in four different ways. The changes consist of a more convenient integral formulation, a different way to treat and interpret boundary conditions, treatment of higher order problems in factored form, and the use of piecewise Chebyshev grid points. Our formulation of spectral integration is more flexible and powerful as show by its ability to solve a problem that would otherwise take 8192 grid points using only 96 grid points. So...

  7. Linear circuit analysis program for IBM 1620 Monitor 2, 1311/1443 data processing system /CIRCS/

    Science.gov (United States)

    Hatfield, J.

    1967-01-01

    CIRCS is modification of IBSNAP Circuit Analysis Program, for use on smaller systems. This data processing system retains the basic dc, transient analysis, and FORTRAN 2 formats. It can be used on the IBM 1620/1311 Monitor I Mod 5 system, and solves a linear network containing 15 nodes and 45 branches.

  8. Reconfigurable SDM Switching Using Novel Silicon Photonic Integrated Circuit

    CERN Document Server

    Ding, Yunhong; Dalgaard, Kjeld; Ye, Feihong; Asif, Rameez; Gross, Simon; Withford, Michael J; Galili, Michael; Morioka, Toshio; Oxenlowe, Leif Katsuo

    2016-01-01

    Space division multiplexing using multicore fibers is becoming a more and more promising technology. In space-division multiplexing fiber network, the reconfigurable switch is one of the most critical components in network nodes. In this paper we for the first time demonstrate reconfigurable space-division multiplexing switching using silicon photonic integrated circuit, which is fabricated on a novel silicon-on-insulator platform with buried Al mirror. The silicon photonic integrated circuit is composed of a 7x7 switch and low loss grating coupler array based multicore fiber couplers. Thanks to the Al mirror, grating couplers with ultra-low coupling loss with optical multicore fibers is achieved. The lowest total insertion loss of the silicon integrated circuit is as low as 4.5 dB, with low crosstalk lower than -30 dB. Excellent performances in terms of low insertion loss and low crosstalk are obtained for the whole C-band. 1 Tb/s/core transmission over a 2-km 7-core fiber and space-division multiplexing swi...

  9. 77 FR 25747 - Certain Semiconductor Integrated Circuit Devices and Products Containing Same; Institution of...

    Science.gov (United States)

    2012-05-01

    ... COMMISSION Certain Semiconductor Integrated Circuit Devices and Products Containing Same; Institution of... the sale within the United States after importation of certain semiconductor integrated circuit... semiconductor integrated circuit devices and products containing same that infringe one or more of claims 1,...

  10. 77 FR 1505 - Certain Integrated Circuits, Chipsets, and Products Containing Same Including Televisions; Notice...

    Science.gov (United States)

    2012-01-10

    ... COMMISSION Certain Integrated Circuits, Chipsets, and Products Containing Same Including Televisions; Notice... importation, and the sale within the United States after importation of certain integrated circuits, chipsets... importation, or the sale within the United States after importation of certain integrated circuits,...

  11. Diamond electro-optomechanical resonators integrated in nanophotonic circuits

    CERN Document Server

    Rath, P; Diewald, S; Lewes-Malandrakis, G; Brink, D; Heidrich, N; Nebel, C; Pernice, W H P

    2014-01-01

    Diamond integrated photonic devices are promising candidates for emerging applications in nanophotonics and quantum optics. Here we demonstrate active modulation of diamond nanophotonic circuits by exploiting mechanical degrees of freedom in free-standing diamond electro-optomechanical resonators. We obtain high quality factors up to 9600, allowing us to read out the driven nanomechanical response with integrated optical interferometers with high sensitivity. We are able to excite higher order mechanical modes up to 115 MHz and observe the nanomechanical response also under ambient conditions.

  12. Arbitrary modeling of TSVs for 3D integrated circuits

    CERN Document Server

    Salah, Khaled; El-Rouby, Alaa

    2014-01-01

    This book presents a wide-band and technology independent, SPICE-compatible RLC model for through-silicon vias (TSVs) in 3D integrated circuits. This model accounts for a variety of effects, including skin effect, depletion capacitance and nearby contact effects. Readers will benefit from in-depth coverage of concepts and technology such as 3D integration, Macro modeling, dimensional analysis and compact modeling, as well as closed form equations for the through silicon via parasitics. Concepts covered are demonstrated by using TSVs in applications such as a spiral inductor?and inductive-based

  13. Neuromorphic opto-electronic integrated circuits for optical signal processing

    Science.gov (United States)

    Romeira, B.; Javaloyes, J.; Balle, S.; Piro, O.; Avó, R.; Figueiredo, J. M. L.

    2014-08-01

    The ability to produce narrow optical pulses has been extensively investigated in laser systems with promising applications in photonics such as clock recovery, pulse reshaping, and recently in photonics artificial neural networks using spiking signal processing. Here, we investigate a neuromorphic opto-electronic integrated circuit (NOEIC) comprising a semiconductor laser driven by a resonant tunneling diode (RTD) photo-detector operating at telecommunication (1550 nm) wavelengths capable of excitable spiking signal generation in response to optical and electrical control signals. The RTD-NOEIC mimics biologically inspired neuronal phenomena and possesses high-speed response and potential for monolithic integration for optical signal processing applications.

  14. Photonic-integrated circuit for continuous-wave THz generation.

    Science.gov (United States)

    Theurer, Michael; Göbel, Thorsten; Stanze, Dennis; Troppenz, Ute; Soares, Francisco; Grote, Norbert; Schell, Martin

    2013-10-01

    We demonstrate a photonic-integrated circuit for continuous-wave (cw) terahertz (THz) generation. By comprising two lasers and an optical phase modulator on a single chip, the full control of the THz signal is enabled via a unique bidirectional operation technique. Integrated heaters allow for continuous tuning of the THz frequency over 570 GHz. Applied to a coherent cw THz photomixing system operated at 1.5 μm optical wavelength, we reach a signal-to-noise ratio of 44 dB at 1.25 THz, which is identical to the performance of a standard system based on discrete components.

  15. Pneumatic oscillator circuits for timing and control of integrated microfluidics.

    Science.gov (United States)

    Duncan, Philip N; Nguyen, Transon V; Hui, Elliot E

    2013-11-05

    Frequency references are fundamental to most digital systems, providing the basis for process synchronization, timing of outputs, and waveform synthesis. Recently, there has been growing interest in digital logic systems that are constructed out of microfluidics rather than electronics, as a possible means toward fully integrated laboratory-on-a-chip systems that do not require any external control apparatus. However, the full realization of this goal has not been possible due to the lack of on-chip frequency references, thus requiring timing signals to be provided from off-chip. Although microfluidic oscillators have been demonstrated, there have been no reported efforts to characterize, model, or optimize timing accuracy, which is the fundamental metric of a clock. Here, we report pneumatic ring oscillator circuits built from microfluidic valves and channels. Further, we present a compressible-flow analysis that differs fundamentally from conventional circuit theory, and we show the utility of this physically based model for the optimization of oscillator stability. Finally, we leverage microfluidic clocks to demonstrate circuits for the generation of phase-shifted waveforms, self-driving peristaltic pumps, and frequency division. Thus, pneumatic oscillators can serve as on-chip frequency references for microfluidic digital logic circuits. On-chip clocks and pumps both constitute critical building blocks on the path toward achieving autonomous laboratory-on-a-chip devices.

  16. FDTD-SPICE for Characterizing Metamaterials Integrated with Electronic Circuits

    Directory of Open Access Journals (Sweden)

    Zhengwei Hao

    2012-01-01

    Full Text Available A powerful time-domain FDTD-SPICE simulator is implemented and applied to the broadband analysis of metamaterials integrated with active and tunable circuit elements. First, the FDTD-SPICE modeling theory is studied and details of interprocess communication and hybridization of the two techniques are discussed. To verify the model, some simple cases are simulated with results in both time domain and frequency domain. Then, simulation of a metamaterial structure constructed from periodic resonant loops integrated with lumped capacitor elements is studied, which demonstrates tuning resonance frequency of medium by changing the capacitance of the integrated elements. To increase the bandwidth of the metamaterial, non-Foster transistor configurations are integrated with the loops and FDTD-SPICE is applied to successfully bridge the physics of electromagnetic and circuit topologies and to model the whole composite structure. Our model is also applied to the design and simulation of a metasurface integrated with nonlinear varactors featuring tunable reflection phase characteristic.

  17. Integral and Multidimensional Linear Distinguishers with Correlation Zero

    DEFF Research Database (Denmark)

    Bogdanov, Andrey; Leander, Gregor; Nyberg, Kaisa

    2012-01-01

    Zero-correlation cryptanalysis uses linear approximations holding with probability exactly 1/2. In this paper, we reveal fundamental links of zero-correlation distinguishers to integral distinguishers and multidimensional linear distinguishers. We show that an integral implies zero-correlation li......Zero-correlation cryptanalysis uses linear approximations holding with probability exactly 1/2. In this paper, we reveal fundamental links of zero-correlation distinguishers to integral distinguishers and multidimensional linear distinguishers. We show that an integral implies zero...

  18. Integrating anatomy and function for zebrafish circuit analysis.

    Science.gov (United States)

    Arrenberg, Aristides B; Driever, Wolfgang

    2013-01-01

    Due to its transparency, virtually every brain structure of the larval zebrafish is accessible to light-based interrogation of circuit function. Advanced stimulation techniques allow the activation of optogenetic actuators at different resolution levels, and genetically encoded calcium indicators report the activity of a large proportion of neurons in the CNS. Large datasets result and need to be analyzed to identify cells that have specific properties-e.g., activity correlation to sensory stimulation or behavior. Advances in three-dimensional (3D) functional mapping in zebrafish are promising; however, the mere coordinates of implicated neurons are not sufficient. To comprehensively understand circuit function, these functional maps need to be placed into the proper context of morphological features and projection patterns, neurotransmitter phenotypes, and key anatomical landmarks. We discuss the prospect of merging functional and anatomical data in an integrated atlas from the perspective of our work on long-range dopaminergic neuromodulation and the oculomotor system. We propose that such a resource would help researchers to surpass current hurdles in circuit analysis to achieve an integrated understanding of anatomy and function.

  19. Design automation for integrated nonlinear logic circuits (Conference Presentation)

    Science.gov (United States)

    Van Vaerenbergh, Thomas; Pelc, Jason; Santori, Charles; Bose, Ranojoy; Kielpinski, Dave; Beausoleil, Raymond G.

    2016-05-01

    A key enabler of the IT revolution of the late 20th century was the development of electronic design automation (EDA) tools allowing engineers to manage the complexity of electronic circuits with transistor counts now reaching into the billions. Recently, we have been developing large-scale nonlinear photonic integrated logic circuits for next generation all-optical information processing. At this time a sufficiently powerful EDA-style software tool chain to design this type of complex circuits does not yet exist. Here we describe a hierarchical approach to automating the design and validation of photonic integrated circuits, which can scale to several orders of magnitude higher complexity than the state of the art. Most photonic integrated circuits developed today consist of a small number of components, and only limited hierarchy. For example, a simple photonic transceiver may contain on the order of 10 building-block components, consisting of grating couplers for photonic I/O, modulators, and signal splitters/combiners. Because this is relatively easy to lay out by hand (or simple script) existing photonic design tools have relatively little automation in comparison to electronics tools. But demonstrating all-optical logic will require significantly more complex photonic circuits containing up to 1,000 components, hence becoming infeasible to design manually. Our design framework is based off Python-based software from Luceda Photonics which provides an environment to describe components, simulate their behavior, and export design files (GDS) to foundries for fabrication. At a fundamental level, a photonic component is described as a parametric cell (PCell) similarly to electronics design. PCells are described by geometric characteristics of their layout. A critical part of the design framework is the implementation of PCells as Python objects. PCell objects can then use inheritance to simplify design, and hierarchical designs can be made by creating composite

  20. SEMICONDUCTOR INTEGRATED CIRCUITS: Soft error generation analysis in combinational logic circuits

    Science.gov (United States)

    Qian, Ding; Yu, Wang; Rong, Luo; Hui, Wang; Huazhong, Yang

    2010-09-01

    Reliability is expected to become a big concern in future deep sub-micron integrated circuits design. Soft error rate (SER) of combinational logic is considered to be a great reliability problem. Previous SER analysis and models indicated that glitch width has a great impact on electrical masking and latch window masking effects, but they failed to achieve enough insights. In this paper, an analytical glitch generation model is proposed. This model shows that after an inflexion point the collected charge has an exponential relationship with glitch duration and the model only introduces an estimation error of on average 2.5%.

  1. Integrated Circuit Design in US High-Energy Physics

    CERN Document Server

    De Geronimo, G; Bebek, C; Garcia-Sciveres, M; Von der Lippe, H; Haller, G; Grillo, A A; Newcomer, M

    2013-01-01

    This whitepaper summarizes the status, plans, and challenges in the area of integrated circuit design in the United States for future High Energy Physics (HEP) experiments. It has been submitted to CPAD (Coordinating Panel for Advanced Detectors) and the HEP Community Summer Study 2013(Snowmass on the Mississippi) held in Minnesota July 29 to August 6, 2013. A workshop titled: US Workshop on IC Design for High Energy Physics, HEPIC2013 was held May 30 to June 1, 2013 at Lawrence Berkeley National Laboratory (LBNL). A draft of the whitepaper was distributed to the attendees before the workshop, the content was discussed at the meeting, and this document is the resulting final product. The scope of the whitepaper includes the following topics: Needs for IC technologies to enable future experiments in the three HEP frontiers Energy, Cosmic and Intensity Frontiers; Challenges in the different technology and circuit design areas and the related R&D needs; Motivation for using different fabrication technologies...

  2. Monocrystalline silicon used for integrated circuits: still on the way

    Institute of Scientific and Technical Information of China (English)

    Jia-he CHEN; De-ren YANG; Duan-lin QUE

    2008-01-01

    With the rapid development of semiconductor technology, highly integrated circuits (ICs) and future nano-scale devices require large diameter and defect-free monocrystalline silicon wafers. The ongoing innovation from silicon materials is one of the driving forces in future micro and nano-technologies. In this work, the recent developments in the controlling of large diameter silicon crystal growth processes, the improvement of material features by co-doping with the intend-introduced impur-ities, and the progress of defect engineered silicon wafers (epitaxial silicon wafer, strained silicon, silicon on insu-lator) are reviewed. It is proposed that the silicon man-ufacturing infrastructure could still meet the increasingly stringent requirements arising from ULSI circuits and will expand Moore's law into a couple of decades.

  3. Adaptive Voltage Management Enabling Energy Efficiency in Nanoscale Integrated Circuits

    Science.gov (United States)

    Shapiro, Alexander E.

    Battery powered devices emphasize energy efficiency in modern sub-22 nm CMOS microprocessors rendering classic power reduction solutions not sufficient. Classical solutions that reduce power consumption in high performance integrated circuits are superseded with novel and enhanced power reduction techniques to enable the greater energy efficiency desired in modern microprocessors and emerging mobile platforms. Dynamic power consumption is reduced by operating over a wide range of supply voltages. This region of operation is enabled by a high speed and power efficient level shifter which translates low voltage digital signals to higher voltages (and vice versa), a key component that enables communication among circuits operating at different voltage levels. Additionally, optimizing the wide supply voltage range of signals propagating across long interconnect enables greater energy savings. A closed-form delay model supporting wide voltage range is developed to enable this capability. The model supports an ultra-wide voltage range from nominal voltages to subthreshold voltages, and a wide range of repeater sizes. To mitigate the drawback of lower operating speed at reduced supply voltages, the high performance exhibited by MOS current mode logic technology is exploited. High performance and energy efficient circuits are enabled by combining this logic style with power efficient near threshold circuits. Many-core systems that operate at high frequencies and process highly parallel workloads benefit from this combination of MCML with NTC. Due to aggressive scaling, static power consumption can in some cases overshadow dynamic power. Techniques to lower leakage power have therefore become an important objective in modern microprocessors. To address this issue, an adaptive power gating technique is proposed. This technique utilizes high levels of granularity to save additional leakage power when a circuit is active as opposed to standard power gating that saves static

  4. Lithography for enabling advances in integrated circuits and devices.

    Science.gov (United States)

    Garner, C Michael

    2012-08-28

    Because the transistor was fabricated in volume, lithography has enabled the increase in density of devices and integrated circuits. With the invention of the integrated circuit, lithography enabled the integration of higher densities of field-effect transistors through evolutionary applications of optical lithography. In 1994, the semiconductor industry determined that continuing the increase in density transistors was increasingly difficult and required coordinated development of lithography and process capabilities. It established the US National Technology Roadmap for Semiconductors and this was expanded in 1999 to the International Technology Roadmap for Semiconductors to align multiple industries to provide the complex capabilities to continue increasing the density of integrated circuits to nanometre scales. Since the 1960s, lithography has become increasingly complex with the evolution from contact printers, to steppers, pattern reduction technology at i-line, 248 nm and 193 nm wavelengths, which required dramatic improvements of mask-making technology, photolithography printing and alignment capabilities and photoresist capabilities. At the same time, pattern transfer has evolved from wet etching of features, to plasma etch and more complex etching capabilities to fabricate features that are currently 32 nm in high-volume production. To continue increasing the density of devices and interconnects, new pattern transfer technologies will be needed with options for the future including extreme ultraviolet lithography, imprint technology and directed self-assembly. While complementary metal oxide semiconductors will continue to be extended for many years, these advanced pattern transfer technologies may enable development of novel memory and logic technologies based on different physical phenomena in the future to enhance and extend information processing.

  5. Quasi-linear vacancy dynamics modeling and circuit analysis of the bipolar memristor.

    Science.gov (United States)

    Abraham, Isaac

    2014-01-01

    The quasi-linear transport equation is investigated for modeling the bipolar memory resistor. The solution accommodates vacancy and circuit level perspectives on memristance. For the first time in literature the component resistors that constitute the contemporary dual variable resistor circuit model are quantified using vacancy parameters and derived from a governing partial differential equation. The model describes known memristor dynamics even as it generates new insight about vacancy migration, bottlenecks to switching speed and elucidates subtle relationships between switching resistance range and device parameters. The model is shown to comply with Chua's generalized equations for the memristor. Independent experimental results are used throughout, to validate the insights obtained from the model. The paper concludes by implementing a memristor-capacitor filter and compares its performance to a reference resistor-capacitor filter to demonstrate that the model is usable for practical circuit analysis.

  6. Experimental investigation of a four-qubit linear-optical quantum logic circuit

    Science.gov (United States)

    Stárek, R.; Mičuda, M.; Miková, M.; Straka, I.; Dušek, M.; Ježek, M.; Fiurášek, J.

    2016-09-01

    We experimentally demonstrate and characterize a four-qubit linear-optical quantum logic circuit. Our robust and versatile scheme exploits encoding of two qubits into polarization and path degrees of single photons and involves two crossed inherently stable interferometers. This approach allows us to design a complex quantum logic circuit that combines a genuine four-qubit C3Z gate and several two-qubit and single-qubit gates. The C3Z gate introduces a sign flip if and only if all four qubits are in the computational state |1>. We verify high-fidelity performance of this central four-qubit gate using Hofmann bounds on quantum gate fidelity and Monte Carlo fidelity sampling. We also experimentally demonstrate that the quantum logic circuit can generate genuine multipartite entanglement and we certify the entanglement with the use of suitably tailored entanglement witnesses.

  7. A Comprehensive Computational Design for Microstrip Passive and Active Linear Circuits

    Directory of Open Access Journals (Sweden)

    El-Sayed A. El-Badawy

    2012-08-01

    Full Text Available In this paper, a complete program called HHSS2 is introduced which is a user-oriented program capable of designing linear active and passive microstrip circuits such as amplifiers, oscillators, mixers, lowpass filters, and couplers. The substrate parameters and the characteristic impedance of the microstrip lines are given to the program as a common statement. Examples for the design of a 3-GHz high gain amplifier, 2.6-GHz oscillator, ring coupler operated at 3.33 GHz, Lange coupler operated at 3.3 GHz, and maximally-flat lowpass filter operated at 2 GHz with 0.75 GHz cutoff frequency are introduced.    Key Words: Computational Microstrip Circuit Design, Microwave Circuits, Computer Aided Design.

  8. Coherent integrated receiver for highly linear microwave photonic links

    Science.gov (United States)

    Klamkin, Jonathan

    Phase modulation can be used to improve the signal-to-noise ratio and spurfree dynamic range (SFDR) of microwave photonic links because phase modulation is not limited in input modulation swing and is inherently linear using certain electro-optic devices. Traditional interferometer-based phase demodulators have a sinusoidal response therefore a novel approach is required for achieving linear coherent detection at the receive end of a photonic link employing phase modulation. In this work, a balanced receiver with feedback to a reference tracking phase modulator was developed. With sufficient feedback loop gain, the received signal phase is closely tracked and the phase detection falls within the linear regime of the interferometer response. For stable operation at high frequency the delay of the feedback loop must be kept short, therefore a monolithic approach is required to realize a compact receiver architecture. The monolithic photonic integrated circuit (PIC) developed here consists of a high power balanced uni-traveling-carrier photodiode (UTC-PD), a compact 2x2 multimode interference (MMI) coupler, and multi-quantum well reference phase modulators. This PIC is hybrid integrated with an electronic IC that provides transconductance amplification of the feedback signal for increased loop gain. Novel concepts such as charge compensation, partially depleted absorption, and absorption profile modification were incorporated into the design of the waveguide UTCPDs resulting in record output saturation current and linearity. Both general interference surface ridge (SR) MMI couplers and restricted interference deep ridge (DR) MMI couplers were explored, the latter for reducing the loop delay. Current injection tuning was incorporated into the MMI couplers for fine tuning the output power splitting ratio. The quantum well design of the reference phase modulators was optimized for realizing low Vpi, low insertion loss, low absorption modulation, and improved linearity

  9. High-precision analog circuit technology for power supply integrated circuits; Dengen IC yo koseido anarogu kairo gijutsu

    Energy Technology Data Exchange (ETDEWEB)

    Nakamori, A.; Suzuki, T.; Mizoe, K. [Fuji Electric Corporate Research and Development,Ltd., Kanagawa (Japan)

    2000-08-10

    With the recent rapid spread of portable electronic appliances, specification requirements such as compact power supply and long operation with batteries have become severer. Power supply ICs (integrated circuits) are required to reduce power consumption in the circuit and perform high-precision control. To meet these requirements, Fuji Electric develops high-precision CMOS (complementary metal-oxide semiconductor) analog technology. This paper describes three analog circuit technologies of a voltage reference, an operational amplifier and a comparator as circuit components particularly important for the precision of power supply ICs. (author)

  10. 77 FR 66481 - Certain Integrated Circuits, Chipsets, and Products Containing Same Including Televisions; Notice...

    Science.gov (United States)

    2012-11-05

    ... COMMISSION Certain Integrated Circuits, Chipsets, and Products Containing Same Including Televisions; Notice..., and the sale within the United States after importation of certain integrated circuits, chipsets, and... Circuits, Chipsets, and Products Containing Same Including Televisions, Inv. No. 337-TA-786. On August...

  11. Implantable neurotechnologies: a review of integrated circuit neural amplifiers.

    Science.gov (United States)

    Ng, Kian Ann; Greenwald, Elliot; Xu, Yong Ping; Thakor, Nitish V

    2016-01-01

    Neural signal recording is critical in modern day neuroscience research and emerging neural prosthesis programs. Neural recording requires the use of precise, low-noise amplifier systems to acquire and condition the weak neural signals that are transduced through electrode interfaces. Neural amplifiers and amplifier-based systems are available commercially or can be designed in-house and fabricated using integrated circuit (IC) technologies, resulting in very large-scale integration or application-specific integrated circuit solutions. IC-based neural amplifiers are now used to acquire untethered/portable neural recordings, as they meet the requirements of a miniaturized form factor, light weight and low power consumption. Furthermore, such miniaturized and low-power IC neural amplifiers are now being used in emerging implantable neural prosthesis technologies. This review focuses on neural amplifier-based devices and is presented in two interrelated parts. First, neural signal recording is reviewed, and practical challenges are highlighted. Current amplifier designs with increased functionality and performance and without penalties in chip size and power are featured. Second, applications of IC-based neural amplifiers in basic science experiments (e.g., cortical studies using animal models), neural prostheses (e.g., brain/nerve machine interfaces) and treatment of neuronal diseases (e.g., DBS for treatment of epilepsy) are highlighted. The review concludes with future outlooks of this technology and important challenges with regard to neural signal amplification.

  12. Analysis and Evaluation of Statistical Models for Integrated Circuits Design

    Directory of Open Access Journals (Sweden)

    Sáenz-Noval J.J.

    2011-10-01

    Full Text Available Statistical models for integrated circuits (IC allow us to estimate the percentage of acceptable devices in the batch before fabrication. Actually, Pelgrom is the statistical model most accepted in the industry; however it was derived from a micrometer technology, which does not guarantee reliability in nanometric manufacturing processes. This work considers three of the most relevant statistical models in the industry and evaluates their limitations and advantages in analog design, so that the designer has a better criterion to make a choice. Moreover, it shows how several statistical models can be used for each one of the stages and design purposes.

  13. Noise estimation for deep sub-micron integrated circuits

    Institute of Scientific and Technical Information of China (English)

    陈彬; 杨华中; 汪惠

    2001-01-01

    Noise analysis and avoidance are an increasingly critical step in the design of deep submicron (DSM) integrated circuits (Ics). The crosstalk between neighboring interconnects gradually becomes the main noise sources in DSM Ics. We introduce an efficient and accurate noise-evaluation method for capacitively coupled nets of Ics. The method holds for a victim net with arbitrary number of aggressive nets under ramp input excitation. For common RC nets extracted by electronic design automation (EDA) tools, the deviation between our method and HSPICE is under 10%.

  14. Investigation of Optimal Integrated Circuit Raster Image Vectorization Method

    Directory of Open Access Journals (Sweden)

    Leonas Jasevičius

    2011-03-01

    Full Text Available Visual analysis of integrated circuit layer requires raster image vectorization stage to extract layer topology data to CAD tools. In this paper vectorization problems of raster IC layer images are presented. Various line extraction from raster images algorithms and their properties are discussed. Optimal raster image vectorization method was developed which allows utilization of common vectorization algorithms to achieve the best possible extracted vector data match with perfect manual vectorization results. To develop the optimal method, vectorized data quality dependence on initial raster image skeleton filter selection was assessed.Article in Lithuanian

  15. The FE-I4 pixel readout integrated circuit

    Energy Technology Data Exchange (ETDEWEB)

    Garcia-Sciveres, M., E-mail: mgarcia-sciveres@bl.gov [Lawrence Berkeley National Laboratory, Berkeley, CA (United States); Arutinov, D.; Barbero, M. [University of Bonn, Bonn (Germany); Beccherle, R. [Istituto Nazionale di Fisica Nucleare Sezione di Genova, Genova (Italy); Dube, S.; Elledge, D. [Lawrence Berkeley National Laboratory, Berkeley, CA (United States); Fleury, J. [Laboratoire de l' Accelerateur Lineaire, Orsay (France); Fougeron, D.; Gensolen, F. [Centre de Physique des Particules de Marseille, Marseille (France); Gnani, D. [Lawrence Berkeley National Laboratory, Berkeley, CA (United States); Gromov, V. [Nationaal Instituut voor Subatomaire Fysica, Amsterdam (Netherlands); Hemperek, T.; Karagounis, M. [University of Bonn, Bonn (Germany); Kluit, R. [Nationaal Instituut voor Subatomaire Fysica, Amsterdam (Netherlands); Kruth, A. [University of Bonn, Bonn (Germany); Mekkaoui, A. [Lawrence Berkeley National Laboratory, Berkeley, CA (United States); Menouni, M. [Centre de Physique des Particules de Marseille, Marseille (France); Schipper, J.-D. [Nationaal Instituut voor Subatomaire Fysica, Amsterdam (Netherlands)

    2011-04-21

    A new pixel readout integrated circuit denominated FE-I4 is being designed to meet the requirements of ATLAS experiment upgrades. It will be the largest readout IC produced to date for particle physics applications, filling the maximum allowed reticle area. This will significantly reduce the cost of future hybrid pixel detectors. In addition, FE-I4 will have smaller pixels and higher rate capability than the present generation of LHC pixel detectors. Design features are described along with simulation and test results, including low power and high rate readout architecture, mixed signal design strategy, and yield hardening.

  16. CALCULATIONS OF DOUBLE IMPURITY DIFFUSION IN INTEGRATED CIRCUIT PRODUCTION

    Directory of Open Access Journals (Sweden)

    V. A. Bondarev

    2005-01-01

    Full Text Available Analytical formulae for calculating simultaneous diffusion of two impurities in silicon are presented. The formulae are based on analytical solutions of diffusion equations that have been obtained for the first time by the author while using some special mathematical functions. In contrast to usual formal mathematical approaches, new functions are determined in the process of investigation of real physical models. Algorithms involve some important relations from thermodynamics of irreversible processes and also variational thermodynamic functionals that were previously obtained by the author for transfer processes. Calculations considerably reduce the time required for development of new integrated circuits

  17. Cycles of self-pulsations in a photonic integrated circuit.

    Science.gov (United States)

    Karsaklian Dal Bosco, Andreas; Kanno, Kazutaka; Uchida, Atsushi; Sciamanna, Marc; Harayama, Takahisa; Yoshimura, Kazuyuki

    2015-12-01

    We report experimentally on the bifurcation cascade leading to the appearance of self-pulsation in a photonic integrated circuit in which a laser diode is subjected to delayed optical feedback. We study the evolution of the self-pulsing frequency with the increase of both the feedback strength and the injection current. Experimental observations show good qualitative accordance with numerical results carried out with the Lang-Kobayashi rate equation model. We explain the mechanism underlying the self-pulsations by a phenomenon of beating between successive pairs of external cavity modes and antimodes.

  18. Integrated circuit authentication hardware Trojans and counterfeit detection

    CERN Document Server

    Tehranipoor, Mohammad; Zhang, Xuehui

    2013-01-01

    This book describes techniques to verify the authenticity of integrated circuits (ICs). It focuses on hardware Trojan detection and prevention and counterfeit detection and prevention. The authors discuss a variety of detection schemes and design methodologies for improving Trojan detection techniques, as well as various attempts at developing hardware Trojans in IP cores and ICs. While describing existing Trojan detection methods, the authors also analyze their effectiveness in disclosing various types of Trojans, and demonstrate several architecture-level solutions. 

  19. Transient-induced latchup in CMOS integrated circuits

    CERN Document Server

    Ker, Ming-Dou

    2009-01-01

    "Transient-Induced Latchup in CMOS Integrated Circuits equips the practicing engineer with all the tools needed to address this regularly occurring problem while becoming more proficient at IC layout. Ker and Hsu introduce the phenomenon and basic physical mechanism of latchup, explaining the critical issues that have resurfaced for CMOS technologies. Once readers can gain an understanding of the standard practices for TLU, Ker and Hsu discuss the physical mechanism of TLU under a system-level ESD test, while introducing an efficient component-level TLU measurement setup. The authors then present experimental methodologies to extract safe and area-efficient compact layout rules for latchup prevention, including layout rules for I/O cells, internal circuits, and between I/O and internal circuits. The book concludes with an appendix giving a practical example of extracting layout rules and guidelines for latchup prevention in a 0.18-micrometer 1.8V/3.3V silicided CMOS process."--Publisher's description.

  20. Stainless Steel NaK Circuit Integration and Fill Submission

    Science.gov (United States)

    Garber, Anne E.

    2006-01-01

    The Early Flight Fission Test Facilities (EFF-TF) team has been tasked by the Marshall Space Flight Center Nuclear Systems Office to design, fabricate, and test an actively pumped alkali metal flow circuit. The system, which was originally designed to hold a eutectic mixture of sodium potassium (NaK), was redesigned to hold lithium; but due to a shift in focus, it is once again being prepared for use with NaK. Changes made to the actively pumped, high temperature loop include the replacement of the expansion reservoir, addition of remotely operated valves, and modification of the support table. Basic circuit components include: reactor segment, NaK to gas heat exchanger, electromagnetic (EM) liquid metal pump, load/drain reservoir, expansion reservoir, instrumentation, and a spill reservoir. A 37-pin partial-array core (pin and flow path dimensions are the same as those in a full design) was selected for fabrication and test. This document summarizes the integration and fill of the pumped liquid metal NaK flow circuit.

  1. A Fully Differential Interface Circuit of Closed-loop Accelerometer with Force Feedback Linearization

    Institute of Scientific and Technical Information of China (English)

    HongLin Xu; HongNa Liu; Chong He; Liang Yin; XiaoWei Liu

    2014-01-01

    In this paper, a fifth-order fully differential interface circuit ( IC) is presented to improve the noise performance for micromechanical sigma-delta (Σ-Δ) accelerometer. A lead compensator is adopted to ensure the stability of the closed-loop high-order system. A low noise capacitance detection circuit is described with a correlated-double-sampling ( CDS) technique to decrease 1/f noise and offset of the operational amplifier. This paper also proposes a self-test technique for the interface circuit to test the harmonic distortion. An electrostatic force feedback linearization circuit is presented to reduce the harmonic distortion resulting in larger dynamic range ( DR) . The layout of the IC is implemented in a standard 0�6 μm CMOS technology and operates at a sampling frequency of 250 kHz. The interface consumes 20 mW from a 5 V supply. The post-simulation results indicate that the noise floor of the digital accelerometer is about -140 dBV/Hz1/2 at low frequency. The sensitivity is 2.5 V/g and the nonlinearity is 0�11%. The self-test function is achieved with 98�2 dB third-order harmonic distortion detection based on the electrostatic force feedback linearization.

  2. Automatic design of synthetic gene circuits through mixed integer non-linear programming.

    Science.gov (United States)

    Huynh, Linh; Kececioglu, John; Köppe, Matthias; Tagkopoulos, Ilias

    2012-01-01

    Automatic design of synthetic gene circuits poses a significant challenge to synthetic biology, primarily due to the complexity of biological systems, and the lack of rigorous optimization methods that can cope with the combinatorial explosion as the number of biological parts increases. Current optimization methods for synthetic gene design rely on heuristic algorithms that are usually not deterministic, deliver sub-optimal solutions, and provide no guaranties on convergence or error bounds. Here, we introduce an optimization framework for the problem of part selection in synthetic gene circuits that is based on mixed integer non-linear programming (MINLP), which is a deterministic method that finds the globally optimal solution and guarantees convergence in finite time. Given a synthetic gene circuit, a library of characterized parts, and user-defined constraints, our method can find the optimal selection of parts that satisfy the constraints and best approximates the objective function given by the user. We evaluated the proposed method in the design of three synthetic circuits (a toggle switch, a transcriptional cascade, and a band detector), with both experimentally constructed and synthetic promoter libraries. Scalability and robustness analysis shows that the proposed framework scales well with the library size and the solution space. The work described here is a step towards a unifying, realistic framework for the automated design of biological circuits.

  3. Design and application of multilayer monolithic microwave integrated circuit transformers

    Energy Technology Data Exchange (ETDEWEB)

    Economides, S.B

    1999-07-01

    fabricated on standard foundry processes. With careful modelling it is also feasible to integrate the two couplers into a single tri-filar transformer structure. This is a robust balun topology, which could be widely adopted. A push-pull MESFET amplifier with 8 dB gain demonstrated this at 12 GHz, using the balun chips connected to amplifier circuits. (author)

  4. Ultra-low power integrated circuit design circuits, systems, and applications

    CERN Document Server

    Li, Dongmei; Wang, Zhihua

    2014-01-01

    This book describes the design of CMOS circuits for ultra-low power consumption including analog, radio frequency (RF), and digital signal processing circuits (DSP). The book addresses issues from circuit and system design to production design, and applies the ultra-low power circuits described to systems for digital hearing aids and capsule endoscope devices. Provides a valuable introduction to ultra-low power circuit design, aimed at practicing design engineers; Describes all key building blocks of ultra-low power circuits, from a systems perspective; Applies circuits and systems described to real product examples such as hearing aids and capsule endoscopes.

  5. Chemistry integrated circuit: chemical system on a complementary metal oxide semiconductor integrated circuit.

    Science.gov (United States)

    Nakazato, Kazuo

    2014-03-28

    By integrating chemical reactions on a large-scale integration (LSI) chip, new types of device can be created. For biomedical applications, monolithically integrated sensor arrays for potentiometric, amperometric and impedimetric sensing of biomolecules have been developed. The potentiometric sensor array detects pH and redox reaction as a statistical distribution of fluctuations in time and space. For the amperometric sensor array, a microelectrode structure for measuring multiple currents at high speed has been proposed. The impedimetric sensor array is designed to measure impedance up to 10 MHz. The multimodal sensor array will enable synthetic analysis and make it possible to standardize biosensor chips. Another approach is to create new functional devices by integrating molecular systems with LSI chips, for example image sensors that incorporate biological materials with a sensor array. The quantum yield of the photoelectric conversion of photosynthesis is 100%, which is extremely difficult to achieve by artificial means. In a recently developed process, a molecular wire is plugged directly into a biological photosynthetic system to efficiently conduct electrons to a gold electrode. A single photon can be detected at room temperature using such a system combined with a molecular single-electron transistor.

  6. Chemistry integrated circuit: chemical system on a complementary metal oxide semiconductor integrated circuit

    Science.gov (United States)

    Nakazato, Kazuo

    2014-01-01

    By integrating chemical reactions on a large-scale integration (LSI) chip, new types of device can be created. For biomedical applications, monolithically integrated sensor arrays for potentiometric, amperometric and impedimetric sensing of biomolecules have been developed. The potentiometric sensor array detects pH and redox reaction as a statistical distribution of fluctuations in time and space. For the amperometric sensor array, a microelectrode structure for measuring multiple currents at high speed has been proposed. The impedimetric sensor array is designed to measure impedance up to 10 MHz. The multimodal sensor array will enable synthetic analysis and make it possible to standardize biosensor chips. Another approach is to create new functional devices by integrating molecular systems with LSI chips, for example image sensors that incorporate biological materials with a sensor array. The quantum yield of the photoelectric conversion of photosynthesis is 100%, which is extremely difficult to achieve by artificial means. In a recently developed process, a molecular wire is plugged directly into a biological photosynthetic system to efficiently conduct electrons to a gold electrode. A single photon can be detected at room temperature using such a system combined with a molecular single-electron transistor. PMID:24567475

  7. A new resonant circuit for 2.45 GHz LC VCO with linear frequency tuning

    OpenAIRE

    Zihir, Samet; Taşdemir, Ferhat; Tasdemir, Ferhat; Dinç, Tolga; Dinc, Tolga; Gürbüz, Yaşar; Gurbuz, Yasar

    2011-01-01

    A new MOS varactor bank is proposed to implement a 2.45 GHz SiGe BiCMOS LC-tank voltage controlled oscillator (VCO) with linear frequency tuning. Compared to a conventional VCO, the proposed technique improves the quality factor of the LC-tank while preserving the linearity of the circuit. Realized in 0.25-μm SiGe BiCMOS technology, VCO exhibits 35% VCO gain (KVCO) variation from 2.29 to 2.66 GHz with a 16% tuning ratio. The VCO also exhibits a phase noise of -113 dBc/Hz at 1 MHz offset fr...

  8. Bipolar integrated circuits in SiC for extreme environment operation

    Science.gov (United States)

    Zetterling, Carl-Mikael; Hallén, Anders; Hedayati, Raheleh; Kargarrazi, Saleh; Lanni, Luigia; Malm, B. Gunnar; Mardani, Shabnam; Norström, Hans; Rusu, Ana; Saveda Suvanam, Sethu; Tian, Ye; Östling, Mikael

    2017-03-01

    Silicon carbide (SiC) integrated circuits have been suggested for extreme environment operation. The challenge of a new technology is to develop process flow, circuit models and circuit designs for a wide temperature range. A bipolar technology was chosen to avoid the gate dielectric weakness and low mobility drawback of SiC MOSFETs. Higher operation temperatures and better radiation hardness have been demonstrated for bipolar integrated circuits. Both digital and analog circuits have been demonstrated in the range from room temperature to 500 °C. Future steps are to demonstrate some mixed signal circuits of greater complexity. There are remaining challenges in contacting, metallization, packaging and reliability.

  9. RELATIONAL THEORY APPLICATION FOR OPTIMAL DESIGN OF INTEGRATED CIRCUITS

    Directory of Open Access Journals (Sweden)

    D. V. Demidov

    2014-09-01

    Full Text Available This paper deals with a method of relational theory adaptation for integrated circuits CAD systems. A new algorithm is worked out for optimal search of implicit Don’t Care values for combinational multiple-level digital circuits. The algorithm is described in terms of the adapted relational theory that gives the possibility for a very simple algorithm description for both intuitive understanding and formal analysis. The proposed method makes it possible to apply progressive experience of relational databases in efficient implementation of relational algebra operations (including distributed ones. Comparative analysis of the proposed algorithm and a classic one for optimal search of implicit Don’t Cares is carried out. The analysis has proved formal correctness of the proposed algorithm and its considerably less worst-case complexity. The search of implicit Don’t Care values in the integrated circuits design makes it easier to optimize such characteristics of IC as chip area, power, verifiability and reliability. However, the classic algorithm for optimal search of implicit Don’t Care values is not used in practice due to its very high computational complexity. Application of algorithms for sub-optimal search doesn’t give the possibility to realize the potential of IC optimization to the full. Implementation of the proposed algorithm in IC CAD (a.k.a., EDA systems is adequate due to much lower computational complexity, and potentially makes it possible to improve the quality-development time ratio of IC (chip area, power, verifiability and reliability. Developed method gives the possibility for creation of distributed EDA system with higher computational power and, consequently, for design automation of more complex IC.

  10. Mixed signal custom integrated circuit development for physics instrumentation

    Energy Technology Data Exchange (ETDEWEB)

    Britton, C.L. Jr.; Bryan, W.L.; Emery, M.S. [and others

    1998-10-01

    The Monolithic Systems Development Group at the Oak Ridge National Laboratory has been greatly involved in custom mixed-mode integrated circuit development for the PHENIX detector at the Relativistic Heavy Ion collider (RHIC) at Brookhaven National Laboratory and position-sensitive germanium spectrometer front-ends for the Naval Research Laboratory (NRL). This paper will outline the work done for both PHENIX and the Naval Research Laboratory in the area of full-custom, mixed-signal CMOS integrated electronics. This paper presents the architectures chosen for the various PHENIX detectors which include position-sensitive silicon, capacitive pixel, and phototube detectors, and performance results for the subsystems as well as a system description of the NRL germanium strip system and its performance. The performance of the custom preamplifiers, discriminators, analog memories, analog-digital converters, and control circuitry for all systems will be presented.

  11. Neural CMOS-integrated circuit and its application to data classification.

    Science.gov (United States)

    Göknar, Izzet Cem; Yildiz, Merih; Minaei, Shahram; Deniz, Engin

    2012-05-01

    Implementation and new applications of a tunable complementary metal-oxide-semiconductor-integrated circuit (CMOS-IC) of a recently proposed classifier core-cell (CC) are presented and tested with two different datasets. With two algorithms-one based on Fisher's linear discriminant analysis and the other based on perceptron learning, used to obtain CCs' tunable parameters-the Haberman and Iris datasets are classified. The parameters so obtained are used for hard-classification of datasets with a neural network structured circuit. Classification performance and coefficient calculation times for both algorithms are given. The CC has 6-ns response time and 1.8-mW power consumption. The fabrication parameters used for the IC are taken from CMOS AMS 0.35-μm technology.

  12. Development of optical packet and circuit integrated ring network testbed.

    Science.gov (United States)

    Furukawa, Hideaki; Harai, Hiroaki; Miyazawa, Takaya; Shinada, Satoshi; Kawasaki, Wataru; Wada, Naoya

    2011-12-12

    We developed novel integrated optical packet and circuit switch-node equipment. Compared with our previous equipment, a polarization-independent 4 × 4 semiconductor optical amplifier switch subsystem, gain-controlled optical amplifiers, and one 100 Gbps optical packet transponder and seven 10 Gbps optical path transponders with 10 Gigabit Ethernet (10GbE) client-interfaces were newly installed in the present system. The switch and amplifiers can provide more stable operation without equipment adjustments for the frequent polarization-rotations and dynamic packet-rate changes of optical packets. We constructed an optical packet and circuit integrated ring network testbed consisting of two switch nodes for accelerating network development, and we demonstrated 66 km fiber transmission and switching operation of multiplexed 14-wavelength 10 Gbps optical paths and 100 Gbps optical packets encapsulating 10GbE frames. Error-free (frame error rate < 1×10(-4)) operation was achieved with optical packets of various packet lengths and packet rates, and stable operation of the network testbed was confirmed. In addition, 4K uncompressed video streaming over OPS links was successfully demonstrated.

  13. Wideband Monolithic Microwave Integrated Circuit Frequency Converters with GaAs mHEMT Technology

    DEFF Research Database (Denmark)

    Krozer, Viktor; Johansen, Tom Keinicke; Djurhuus, Torsten

    2005-01-01

    We present monolithic microwave integrated circuit (MMIC) frequency converter, which can be used for up and down conversion, due to the large RF and IF port bandwidth. The MMIC converters are based on commercially available GaAs mHEMT technology and are comprised of a Gilbert mixer cell core......, baluns and combiners. Single ended and balanced configurations DC and AC coupled have been investigated. The instantaneous 3 dB bandwidth at both the RF and the IF port of the frequency converters is ∼ 20 GHz with excellent amplitude and phase linearity. The predicted conversion gain is around 10 d...

  14. Graphene/Si CMOS hybrid hall integrated circuits.

    Science.gov (United States)

    Huang, Le; Xu, Huilong; Zhang, Zhiyong; Chen, Chengying; Jiang, Jianhua; Ma, Xiaomeng; Chen, Bingyan; Li, Zishen; Zhong, Hua; Peng, Lian-Mao

    2014-07-07

    Graphene/silicon CMOS hybrid integrated circuits (ICs) should provide powerful functions which combines the ultra-high carrier mobility of graphene and the sophisticated functions of silicon CMOS ICs. But it is difficult to integrate these two kinds of heterogeneous devices on a single chip. In this work a low temperature process is developed for integrating graphene devices onto silicon CMOS ICs for the first time, and a high performance graphene/CMOS hybrid Hall IC is demonstrated. Signal amplifying/process ICs are manufactured via commercial 0.18 um silicon CMOS technology, and graphene Hall elements (GHEs) are fabricated on top of the passivation layer of the CMOS chip via a low-temperature micro-fabrication process. The sensitivity of the GHE on CMOS chip is further improved by integrating the GHE with the CMOS amplifier on the Si chip. This work not only paves the way to fabricate graphene/Si CMOS Hall ICs with much higher performance than that of conventional Hall ICs, but also provides a general method for scalable integration of graphene devices with silicon CMOS ICs via a low-temperature process.

  15. Graphene/Si CMOS Hybrid Hall Integrated Circuits

    Science.gov (United States)

    Huang, Le; Xu, Huilong; Zhang, Zhiyong; Chen, Chengying; Jiang, Jianhua; Ma, Xiaomeng; Chen, Bingyan; Li, Zishen; Zhong, Hua; Peng, Lian-Mao

    2014-07-01

    Graphene/silicon CMOS hybrid integrated circuits (ICs) should provide powerful functions which combines the ultra-high carrier mobility of graphene and the sophisticated functions of silicon CMOS ICs. But it is difficult to integrate these two kinds of heterogeneous devices on a single chip. In this work a low temperature process is developed for integrating graphene devices onto silicon CMOS ICs for the first time, and a high performance graphene/CMOS hybrid Hall IC is demonstrated. Signal amplifying/process ICs are manufactured via commercial 0.18 um silicon CMOS technology, and graphene Hall elements (GHEs) are fabricated on top of the passivation layer of the CMOS chip via a low-temperature micro-fabrication process. The sensitivity of the GHE on CMOS chip is further improved by integrating the GHE with the CMOS amplifier on the Si chip. This work not only paves the way to fabricate graphene/Si CMOS Hall ICs with much higher performance than that of conventional Hall ICs, but also provides a general method for scalable integration of graphene devices with silicon CMOS ICs via a low-temperature process.

  16. Removal of Gross Air Embolization from Cardiopulmonary Bypass Circuits with Integrated Arterial Line Filters: A Comparison of Circuit Designs.

    Science.gov (United States)

    Reagor, James A; Holt, David W

    2016-03-01

    Advances in technology, the desire to minimize blood product transfusions, and concerns relating to inflammatory mediators have lead many practitioners and manufacturers to minimize cardiopulmonary bypass (CBP) circuit designs. The oxygenator and arterial line filter (ALF) have been integrated into one device as a method of attaining a reduction in prime volume and surface area. The instructions for use of a currently available oxygenator with integrated ALF recommends incorporating a recirculation line distal to the oxygenator. However, according to an unscientific survey, 70% of respondents utilize CPB circuits incorporating integrated ALFs without a path of recirculation distal to the oxygenator outlet. Considering this circuit design, the ability to quickly remove a gross air bolus in the blood path distal to the oxygenator may be compromised. This in vitro study was designed to determine if the time required to remove a gross air bolus from a CPB circuit without a path of recirculation distal to the oxygenator will be significantly longer than that of a circuit with a path of recirculation distal to the oxygenator. A significant difference was found in the mean time required to remove a gross air bolus between the circuit designs (p = .0003). Additionally, There was found to be a statistically significant difference in the mean time required to remove a gross air bolus between Trial 1 and Trials 4 (p = .015) and 5 (p =.014) irrespective of the circuit design. Under the parameters of this study, a recirculation line distal to an oxygenator with an integrated ALF significantly decreases the time it takes to remove an air bolus from the CPB circuit and may be safer for clinical use than the same circuit without a recirculation line.

  17. Mathematical methods linear algebra normed spaces distributions integration

    CERN Document Server

    Korevaar, Jacob

    1968-01-01

    Mathematical Methods, Volume I: Linear Algebra, Normed Spaces, Distributions, Integration focuses on advanced mathematical tools used in applications and the basic concepts of algebra, normed spaces, integration, and distributions.The publication first offers information on algebraic theory of vector spaces and introduction to functional analysis. Discussions focus on linear transformations and functionals, rectangular matrices, systems of linear equations, eigenvalue problems, use of eigenvectors and generalized eigenvectors in the representation of linear operators, metric and normed vector

  18. Multivariate analysis and optimization of linear periodically time-variable circuits at the enviroment of MAOPCs

    Directory of Open Access Journals (Sweden)

    Yu. I. Shapovalov

    2015-03-01

    Full Text Available Introduction. The architecture of MAOPCs functions system and examples of its application for solving the tasks of multivariate analysis of linear periodically time-variable (LPTV circuits based on the frequency symbolic method are considered in this paper. The method is based on approximation of transfer functions of LPTV circuits in the form of trigonometric polynomials of the Fourier. The MAOPCs functions system is implemented in the environment of MATLAB. Architecture and functions of the system MAOPCs. The system consists of 17 functions that are implemented in the environment of MATLAB. Each function has arguments and global variables and carries out over them identified transformation. Functions and global variables form the input data program for research LPTV circuit and should be defined (set at the time of calling the function. Conclusions. The MAOPCs functions system enables to investigate LPTV circuits, setting in program input data the algorithms for their research and to use a strong symbolic apparatus and other standard functions of the package MATLAB in full, without understanding the deep of mathematical apparatus of implemented methods.

  19. Active quench and reset integrated circuit with novel hold-off time control logic for Geiger-mode avalanche photodiodes.

    Science.gov (United States)

    Deng, Shijie; Morrison, Alan P

    2012-09-15

    This Letter presents an active quench-and-reset circuit for Geiger-mode avalanche photodiodes (GM-APDs). The integrated circuit was fabricated using a conventional 0.35 μm complementary metal oxide semiconductor process. Experimental results show that the circuit is capable of linearly setting the hold-off time from several nanoseconds to microseconds with a resolution of 6.5 ns. This allows the selection of the optimal afterpulse-free hold-off time for the GM-APD via external digital inputs or additional signal processing circuitry. Moreover, this circuit resets the APD automatically following the end of the hold-off period, thus simplifying the control for the end user. Results also show that a minimum dead time of 28.4 ns is achieved, demonstrating a saturated photon-counting rate of 35.2 Mcounts/s.

  20. 77 FR 57589 - Certain Integrated Circuits, Chipsets, and Products Containing Same Including Televisions...

    Science.gov (United States)

    2012-09-18

    ... COMMISSION Certain Integrated Circuits, Chipsets, and Products Containing Same Including Televisions... found that those Zoran products that were adjudicated in Integrated Circuits I are precluded under the... recommended a limited exclusion order barring entry of Zoran's and MediaTek's infringing integrated...

  1. CMOS analog integrated circuit design technology; CMOS anarogu IC sekkei gijutsu

    Energy Technology Data Exchange (ETDEWEB)

    Fujimoto, H.; Fujisawa, A. [Fuji Electric Co. Ltd., Tokyo (Japan)

    2000-08-10

    In the field of the LSI (large scale integrated circuit) in rapid progress toward high integration and advanced functions, CAD (computer-aided design) technology has become indispensable to LSI development within a short period. Fuji Electric has developed design technologies and automatic design system to develop high-quality analog ICs (integrated circuits), including power supply ICs. within a short period. This paper describes CMOS (complementary metal-oxide semiconductor) analog macro cell, circuit simulation, automatic routing, and backannotation technologies. (author)

  2. Integrated circuit for processing a low-frequency signal from a seismic detector

    Energy Technology Data Exchange (ETDEWEB)

    Malashevich, N. I.; Roslyakov, A. S.; Polomoshnov, S. A., E-mail: S.Polomoshnov@tsen.ru; Fedorov, R. A. [Research and Production Complex ' Technological Center' of the Moscow Institute of Electronic Technology (Russian Federation)

    2011-12-15

    Specific features for the detection and processing of a low-frequency signal from a seismic detector are considered in terms of an integrated circuit based on a large matrix crystal of the 5507 series. This integrated circuit is designed for the detection of human movements. The specific features of the information signal, obtained at the output of the seismic detector, and the main characteristics of the integrated circuit and its structure are reported.

  3. Minimizing the area required for time constants in integrated circuits

    Science.gov (United States)

    Lyons, J. C.

    1972-01-01

    When a medium- or large-scale integrated circuit is designed, efforts are usually made to avoid the use of resistor-capacitor time constant generators. The capacitor needed for this circuit usually takes up more surface area on the chip than several resistors and transistors. When the use of this network is unavoidable, the designer usually makes an effort to see that the choice of resistor and capacitor combinations is such that a minimum amount of surface area is consumed. The optimum ratio of resistance to capacitance that will result in this minimum area is equal to the ratio of resistance to capacitance which may be obtained from a unit of surface area for the particular process being used. The minimum area required is a function of the square root of the reciprocal of the products of the resistance and capacitance per unit area. This minimum occurs when the area required by the resistor is equal to the area required by the capacitor.

  4. A neural circuit architecture for angular integration in Drosophila.

    Science.gov (United States)

    Green, Jonathan; Adachi, Atsuko; Shah, Kunal K; Hirokawa, Jonathan D; Magani, Pablo S; Maimon, Gaby

    2017-06-01

    Many animals keep track of their angular heading over time while navigating through their environment. However, a neural-circuit architecture for computing heading has not been experimentally defined in any species. Here we describe a set of clockwise- and anticlockwise-shifting neurons in the Drosophila central complex whose wiring and physiology provide a means to rotate an angular heading estimate based on the fly's angular velocity. We show that each class of shifting neurons exists in two subtypes, with spatiotemporal activity profiles that suggest different roles for each subtype at the start and end of tethered-walking turns. Shifting neurons are required for the heading system to properly track the fly's heading in the dark, and stimulation of these neurons induces predictable shifts in the heading signal. The central features of this biological circuit are analogous to those of computational models proposed for head-direction cells in rodents and may shed light on how neural systems, in general, perform integration.

  5. Robust integral stabilization of regular linear systems

    Institute of Scientific and Technical Information of China (English)

    XU Chengzheng; FENG Dexing

    2004-01-01

    We consider regular systems with control and observation. We prove some necessary and sufficient condition for an exponentially stable regular system to admit an integral stabilizing controller. We propose also some robust integral controllers when they exist.

  6. Enabling the Internet of Things from integrated circuits to integrated systems

    CERN Document Server

    2017-01-01

    This book offers the first comprehensive view on integrated circuit and system design for the Internet of Things (IoT), and in particular for the tiny nodes at its edge. The authors provide a fresh perspective on how the IoT will evolve based on recent and foreseeable trends in the semiconductor industry, highlighting the key challenges, as well as the opportunities for circuit and system innovation to address them. This book describes what the IoT really means from the design point of view, and how the constraints imposed by applications translate into integrated circuit requirements and design guidelines. Chapter contributions equally come from industry and academia. After providing a system perspective on IoT nodes, this book focuses on state-of-the-art design techniques for IoT applications, encompassing the fundamental sub-systems encountered in Systems on Chip for IoT: ultra-low power digital architectures and circuits low- and zero-leakage memories (including emerging technologies) circuits for hardwar...

  7. Infrared transparent graphene heater for silicon photonic integrated circuits.

    Science.gov (United States)

    Schall, Daniel; Mohsin, Muhammad; Sagade, Abhay A; Otto, Martin; Chmielak, Bartos; Suckow, Stephan; Giesecke, Anna Lena; Neumaier, Daniel; Kurz, Heinrich

    2016-04-18

    Thermo-optical tuning of the refractive index is one of the pivotal operations performed in integrated silicon photonic circuits for thermal stabilization, compensation of fabrication tolerances, and implementation of photonic operations. Currently, heaters based on metal wires provide the temperature control in the silicon waveguide. The strong interaction of metal and light, however, necessitates a certain gap between the heater and the photonic structure to avoid significant transmission loss. Here we present a graphene heater that overcomes this constraint and enables an energy efficient tuning of the refractive index. We achieve a tuning power as low as 22 mW per free spectral range and fast response time of 3 µs, outperforming metal based waveguide heaters. Simulations support the experimental results and suggest that for graphene heaters the spacing to the silicon can be further reduced yielding the best possible energy efficiency and operation speed.

  8. Applications of Data Mining in Integrated Circuits Manufacturing

    Directory of Open Access Journals (Sweden)

    Sidda Reddy Kurakula

    2014-09-01

    Full Text Available Integrated circuits (a.k.a chips or IC’s are some of the most complex devices manufactured. Making chips is a complex process requiring hundreds of precisely controlled steps such as film deposition, etching and patterning of various materials until the final device structure is realized. Also, each chip goes through a huge number of complicated tests and inspection steps to ensure quality. In IC manufacturing, yield is defined as the percentage of chips in a finished wafer that pass all tests and function properly. Yield improvement translates directly into increased revenues. A humongous amount of data (Terabytes per day is logged from the equipment in the fab. This paper describes some applications of advanced data mining techniques used by chip makers and equipment suppliers in order to improve yield, match equipment, increase equipment output and also to predict the change in equipment performance before and after maintenance activities.

  9. Monolithic microwave integrated circuit devices for active array antennas

    Science.gov (United States)

    Mittra, R.

    1984-01-01

    Two different aspects of active antenna array design were investigated. The transition between monolithic microwave integrated circuits and rectangular waveguides was studied along with crosstalk in multiconductor transmission lines. The boundary value problem associated with a discontinuity in a microstrip line is formulated. This entailed, as a first step, the derivation of the propagating as well as evanescent modes of a microstrip line. The solution is derived to a simple discontinuity problem: change in width of the center strip. As for the multiconductor transmission line problem. A computer algorithm was developed for computing the crosstalk noise from the signal to the sense lines. The computation is based on the assumption that these lines are terminated in passive loads.

  10. Wireless Neural Recording With Single Low-Power Integrated Circuit

    Science.gov (United States)

    Harrison, Reid R.; Kier, Ryan J.; Chestek, Cynthia A.; Gilja, Vikash; Nuyujukian, Paul; Ryu, Stephen; Greger, Bradley; Solzbacher, Florian; Shenoy, Krishna V.

    2010-01-01

    We present benchtop and in vivo experimental results from an integrated circuit designed for wireless implantable neural recording applications. The chip, which was fabricated in a commercially available 0.6-μm 2P3M BiCMOS process, contains 100 amplifiers, a 10-bit analog-to-digital converter (ADC), 100 threshold-based spike detectors, and a 902–928 MHz frequency-shift-keying (FSK) transmitter. Neural signals from a selected amplifier are sampled by the ADC at 15.7 kSps and telemetered over the FSK wireless data link. Power, clock, and command signals are sent to the chip wirelessly over a 2.765-MHz inductive (coil-to-coil) link. The chip is capable of operating with only two off-chip components: a power/command receiving coil and a 100-nF capacitor. PMID:19497825

  11. Plasmonic nanopatch array for optical integrated circuit applications.

    Science.gov (United States)

    Qu, Shi-Wei; Nie, Zai-Ping

    2013-11-08

    Future plasmonic integrated circuits with the capability of extremely high-speed data processing at optical frequencies will be dominated by the efficient optical emission (excitation) from (of) plasmonic waveguides. Towards this goal, plasmonic nanoantennas, currently a hot topic in the field of plasmonics, have potential to bridge the mismatch between the wave vector of free-space photonics and that of the guided plasmonics. To manipulate light at will, plasmonic nanoantenna arrays will definitely be more efficient than isolated nanoantennas. In this article, the concepts of microwave antenna arrays are applied to efficiently convert plasmonic waves in the plasmonic waveguides into free-space optical waves or vice versa. The proposed plasmonic nanoantenna array, with nanopatch antennas and a coupled wedge plasmon waveguide, can also act as an efficient spectrometer to project different wavelengths into different directions, or as a spatial filter to absorb a specific wavelength at a specified incident angle.

  12. Plasmonic nanopatch array for optical integrated circuit applications

    Science.gov (United States)

    Qu, Shi-Wei; Nie, Zai-Ping

    2013-01-01

    Future plasmonic integrated circuits with the capability of extremely high-speed data processing at optical frequencies will be dominated by the efficient optical emission (excitation) from (of) plasmonic waveguides. Towards this goal, plasmonic nanoantennas, currently a hot topic in the field of plasmonics, have potential to bridge the mismatch between the wave vector of free-space photonics and that of the guided plasmonics. To manipulate light at will, plasmonic nanoantenna arrays will definitely be more efficient than isolated nanoantennas. In this article, the concepts of microwave antenna arrays are applied to efficiently convert plasmonic waves in the plasmonic waveguides into free-space optical waves or vice versa. The proposed plasmonic nanoantenna array, with nanopatch antennas and a coupled wedge plasmon waveguide, can also act as an efficient spectrometer to project different wavelengths into different directions, or as a spatial filter to absorb a specific wavelength at a specified incident angle. PMID:24201454

  13. Wireless neural recording with single low-power integrated circuit.

    Science.gov (United States)

    Harrison, Reid R; Kier, Ryan J; Chestek, Cynthia A; Gilja, Vikash; Nuyujukian, Paul; Ryu, Stephen; Greger, Bradley; Solzbacher, Florian; Shenoy, Krishna V

    2009-08-01

    We present benchtop and in vivo experimental results from an integrated circuit designed for wireless implantable neural recording applications. The chip, which was fabricated in a commercially available 0.6- mum 2P3M BiCMOS process, contains 100 amplifiers, a 10-bit analog-to-digital converter (ADC), 100 threshold-based spike detectors, and a 902-928 MHz frequency-shift-keying (FSK) transmitter. Neural signals from a selected amplifier are sampled by the ADC at 15.7 kSps and telemetered over the FSK wireless data link. Power, clock, and command signals are sent to the chip wirelessly over a 2.765-MHz inductive (coil-to-coil) link. The chip is capable of operating with only two off-chip components: a power/command receiving coil and a 100-nF capacitor.

  14. A kind of integrated method discuss of fOG signal processing circuit

    Science.gov (United States)

    Lu, Jun; Pan, Xin; Ying, Jiaju; Liu, Jie

    2014-12-01

    In view of the circuit miniaturization need in project application of fiber optic gyroscope(FOG), a new integrated technical scheme adopting system in package(SIP) for signal processing circuit of FOG was put forward. At first, the principle on signal processing circuit of FOG was analyzed, and the technical scheme adopting SIP based on low-temperature co-fired substrate technology was presented according to circuit characteristic and actual condition. Secondly, under the prerequisite of the concept introduction of SIP and LTCC, the SIP prototype of signal processing circuit of FOG was trialed produced,and it passed through the debug test. This SIP modular is an overall circuit complete integrated the signal processing circuit of FOG, and only a potentiometer and EPROM do not case outside. The testing results indicate that SIP is a kind of feasible scheme that carries out miniaturization for signal processing circuit of FOG.

  15. Detection of orbital angular momentum using a photonic integrated circuit.

    Science.gov (United States)

    Rui, Guanghao; Gu, Bing; Cui, Yiping; Zhan, Qiwen

    2016-06-20

    Orbital angular momentum (OAM) state of photons offer an attractive additional degree of freedom that has found a variety of applications. Measurement of OAM state, which is a critical task of these applications, demands photonic integrated devices for improved fidelity, miniaturization, and reconfiguration. Here we report the design of a silicon-integrated OAM receiver that is capable of detecting distinct and variable OAM states. Furthermore, the reconfiguration capability of the detector is achieved by applying voltage to the GeSe film to form gratings with alternate states. The resonant wavelength for arbitrary OAM state is demonstrated to be tunable in a quasi-linear manner through adjusting the duty cycle of the gratings. This work provides a viable approach for the realization of a compact integrated OAM detection device with enhanced functionality that may find important applications in optical communications and information processing with OAM states.

  16. Development of analog-digital readout integrated circuits for infrared focal plane arrays

    Science.gov (United States)

    Dem'yanenko, M. A.; Kozlov, A. I.; Marchishin, I. V.; Ovsyuk, V. N.

    2016-11-01

    This paper describes the design of readout integrated circuits (ROICs) for hybrid infrared focal plane arrays (IR FPAs). This work contains the estimation of the noise equivalent temperature difference (NETD) of IR FPAs based on frame and row integration of pixel signals in the spectral ranges of 8 to 14 and 3 to 5 μm. This paper also describes the development of ROICs for IR FPAs created with the use of mercury—cadmium—telluride (MCT) photodiodes and quantum well infrared photodetectors (QWIPs). The designed ROICs ensure the use of matrix and linear photodetector chips, including those with increased dark currents, in order to produce IR FPAs with temperature resolution corresponding to the world level of array analogs.

  17. Non-linear classical dynamics in a superconducting circuit containing a cavity and a Josephson junction

    Energy Technology Data Exchange (ETDEWEB)

    Meister, Selina; Kubala, Bjoern; Gramich, Vera; Mecklenburg, Michael; Stockburger, Juergen T.; Ankerhold, Joachim [Institute for Complex Quantum Systems, Ulm University, Albert-Einstein-Allee 11, 89069 Ulm (Germany)

    2015-07-01

    Motivated by recent experiments a superconducting hybrid circuit consisting of a voltage biased Josephson junction in series with a resonator is studied. For strong driving the dynamics of the system can be very complex, even in the classical regime. Studying the dissipative dynamics within a Langevin-type description, we obtain well-defined dynamical steady states. In contrast to the well-known case of anharmonic potentials, like the Duffing or parametric oscillator, in our case the non-linearity stems from the peculiar way the external drive couples to the system [2]. We investigate the resonance behaviour of this non-linear hybrid system, in particular when driving at higher- or subharmonics. The resulting down- and up-conversions can be observed both, as resonances in the I-V curve, and in the emitted microwave radiation, which yields additional spectral information.

  18. A novel mixed-synchronization phenomenon in coupled Chua's circuits via non-fragile linear control

    Institute of Scientific and Technical Information of China (English)

    Wang Jun-Wei; Ma Qing-Hua; Zeng Li

    2011-01-01

    Dynamical variables of coupled nonlinear oscillators can exhibit different synchronization patterns depending on the designed coupling scheme.In this paper,a non-fragile linear feedback control strategy with multiplicative controller gain uncertainties is proposed for realizing the mixed-synchronization of Chua's circuits connected in a drive-response configuration.In particular,in the mixed-synchronization regime,different state variables of the response system can evolve into complete synchronization,anti-synchronization and even amplitude death simultaneously with the drive variables for an appropriate choice of scaling matrix.Using Lyapunov stability theory,we derive some sufficient criteria for achieving global mixed-synchronization.It is shown that the desired non-fragile state feedback controller can be constructed by solving a set of linear matrix inequalities(LMIs).Numerical simulations are also provided to demonstrate the effectiveness of the proposed control approach.

  19. SDN architecture for optical packet and circuit integrated networks

    Science.gov (United States)

    Furukawa, Hideaki; Miyazawa, Takaya

    2016-02-01

    We have been developing an optical packet and circuit integrated (OPCI) network, which realizes dynamic optical path, high-density packet multiplexing, and flexible wavelength resource allocation. In the OPCI networks, a best-effort service and a QoS-guaranteed service are provided by employing optical packet switching (OPS) and optical circuit switching (OCS) respectively, and users can select these services. Different wavelength resources are assigned for OPS and OCS links, and the amount of their wavelength resources are dynamically changed in accordance with the service usage conditions. To apply OPCI networks into wide-area (core/metro) networks, we have developed an OPCI node with a distributed control mechanism. Moreover, our OPCI node works with a centralized control mechanism as well as a distributed one. It is therefore possible to realize SDN-based OPCI networks, where resource requests and a centralized configuration are carried out. In this paper, we show our SDN architecture for an OPS system that configures mapping tables between IP addresses and optical packet addresses and switching tables according to the requests from multiple users via a web interface. While OpenFlow-based centralized control protocol is coming into widespread use especially for single-administrative, small-area (LAN/data-center) networks. Here, we also show an interworking mechanism between OpenFlow-based networks (OFNs) and the OPCI network for constructing a wide-area network, and a control method of wavelength resource selection to automatically transfer diversified flows from OFNs to the OPCI network.

  20. Focused ion beam damage to MOS integrated circuits

    Energy Technology Data Exchange (ETDEWEB)

    FLEETWOOD,D.M.; CAMPBELL,ANN N.; HEMBREE,CHARLES E.; TANGYUNYONG,PAIBOON; JESSING,JEFFREY R.; SODEN,JERRY M.

    2000-05-10

    Commercial focused ion beam (FIB) systems are commonly used to image integrated circuits (ICS) after device processing, especially in failure analysis applications. FIB systems are also often employed to repair faults in metal lines for otherwise functioning ICS, and are being evaluated for applications in film deposition and nanofabrication. A problem that is often seen in FIB imaging and repair is that ICS can be damaged during the exposure process. This can result in degraded response or out-right circuit failure. Because FIB processes typically require the surface of an IC to be exposed to an intense beam of 30--50 keV Ga{sup +} ions, both charging and secondary radiation damage are potential concerns. In previous studies, both types of effects have been suggested as possible causes of device degradation, depending on the type of device examined and/or the bias conditions. Understanding the causes of this damage is important for ICS that are imaged or repaired by a FIB between manufacture and operation, since the performance and reliability of a given IC is otherwise at risk in subsequent system application. In this summary, the authors discuss the relative roles of radiation damage and charging effects during FIB imaging. Data from exposures of packaged parts under controlled bias indicate the possibility for secondary radiation damage during FIB exposure. On the other hand, FIB exposure of unbiased wafers (a more common application) typically results in damage caused by high-voltage stress or electrostatic discharge. Implications for FIB exposure and subsequent IC use are discussed.

  1. Development of wide range charge integration application specified integrated circuit for photo-sensor

    Energy Technology Data Exchange (ETDEWEB)

    Katayose, Yusaku, E-mail: katayose@ynu.ac.jp [Department of Physics, Yokohama National University, 79-5 Tokiwadai, Hodogaya-ku, Yokohama, Kanagawa 240-8501 (Japan); Ikeda, Hirokazu [Institute of Space and Astronautical Science (ISAS)/Japan Aerospace Exploration Agency (JAXA), 3-1-1 Yoshinodai, Chuo-ku, Sagamihara, Kanagawa 252-5210 (Japan); Tanaka, Manobu [National Laboratory for High Energy Physics, KEK, 1-1 Oho, Tsukuba, Ibaraki 305-0801 (Japan); Shibata, Makio [Department of Physics, Yokohama National University, 79-5 Tokiwadai, Hodogaya-ku, Yokohama, Kanagawa 240-8501 (Japan)

    2013-01-21

    A front-end application specified integrated circuit (ASIC) is developed with a wide dynamic range amplifier (WDAMP) to read-out signals from a photo-sensor like a photodiode. The WDAMP ASIC consists of a charge sensitive preamplifier, four wave-shaping circuits with different amplification factors and Wilkinson-type analog-to-digital converter (ADC). To realize a wider range, the integrating capacitor in the preamplifier can be changed from 4 pF to 16 pF by a two-bit switch. The output of a preamplifier is shared by the four wave-shaping circuits with four gains of 1, 4, 16 and 64 to adapt the input range of ADC. A 0.25-μm CMOS process (of UMC electronics CO., LTD) is used to fabricate the ASIC with four-channels. The dynamic range of four orders of magnitude is achieved with the maximum range over 20 pC and the noise performance of 0.46 fC + 6.4×10{sup −4} fC/pF. -- Highlights: ► A front-end ASIC is developed with a wide dynamic range amplifier. ► The ASIC consists of a CSA, four wave-shaping circuits and pulse-height-to-time converters. ► The dynamic range of four orders of magnitude is achieved with the maximum range over 20 pC.

  2. Circuit models and three-dimensional electromagnetic simulations of a 1-MA linear transformer driver stage

    Directory of Open Access Journals (Sweden)

    D. V. Rose

    2010-09-01

    Full Text Available A 3D fully electromagnetic (EM model of the principal pulsed-power components of a high-current linear transformer driver (LTD has been developed. LTD systems are a relatively new modular and compact pulsed-power technology based on high-energy density capacitors and low-inductance switches located within a linear-induction cavity. We model 1-MA, 100-kV, 100-ns rise-time LTD cavities [A. A. Kim et al., Phys. Rev. ST Accel. Beams 12, 050402 (2009PRABFM1098-440210.1103/PhysRevSTAB.12.050402] which can be used to drive z-pinch and material dynamics experiments. The model simulates the generation and propagation of electromagnetic power from individual capacitors and triggered gas switches to a radially symmetric output line. Multiple cavities, combined to provide voltage addition, drive a water-filled coaxial transmission line. A 3D fully EM model of a single 1-MA 100-kV LTD cavity driving a simple resistive load is presented and compared to electrical measurements. A new model of the current loss through the ferromagnetic cores is developed for use both in circuit representations of an LTD cavity and in the 3D EM simulations. Good agreement between the measured core current, a simple circuit model, and the 3D simulation model is obtained. A 3D EM model of an idealized ten-cavity LTD accelerator is also developed. The model results demonstrate efficient voltage addition when driving a matched impedance load, in good agreement with an idealized circuit model.

  3. 77 FR 39510 - Certain Semiconductor Integrated Circuit Devices and Products Containing Same; Determination Not...

    Science.gov (United States)

    2012-07-03

    ... From the Federal Register Online via the Government Publishing Office INTERNATIONAL TRADE COMMISSION Certain Semiconductor Integrated Circuit Devices and Products Containing Same; Determination Not... the sale within the United States after importation of certain semiconductor integrated...

  4. 75 FR 5804 - In the Matter of: Certain Semiconductor Integrated Circuits and Products Containing Same; Notice...

    Science.gov (United States)

    2010-02-04

    ... From the Federal Register Online via the Government Publishing Office INTERNATIONAL TRADE COMMISSION In the Matter of: Certain Semiconductor Integrated Circuits and Products Containing Same; Notice... importation, and sale within the United States after importation of certain semiconductor integrated...

  5. 75 FR 24742 - In the Matter of Certain Large Scale Integrated Circuit Semiconductor Chips and Products...

    Science.gov (United States)

    2010-05-05

    ... COMMISSION In the Matter of Certain Large Scale Integrated Circuit Semiconductor Chips and Products... semiconductor chips and products containing same by reason of infringement of certain claims of U.S. Patent Nos... certain large scale integrated circuit semiconductor chips or products containing the same that...

  6. Experimental Demonstration of 7 Tb/s Switching Using Novel Silicon Photonic Integrated Circuit

    DEFF Research Database (Denmark)

    Ding, Yunhong; Kamchevska, Valerija; Dalgaard, Kjeld;

    2016-01-01

    We demonstrate BER performance <10^-9 for a 1 Tb/s/core transmission over 7-core fiber and SDM switching using a novel silicon photonic integrated circuit composed of a 7x7 fiber switch and low loss SDM couplers.......We demonstrate BER performance integrated circuit composed of a 7x7 fiber switch and low loss SDM couplers....

  7. Plasmonic integrated circuits comprising metal waveguides, multiplexer/demultiplexer, detectors, and logic circuits on a silicon substrate

    Science.gov (United States)

    Fukuda, M.; Ota, M.; Sumimura, A.; Okahisa, S.; Ito, M.; Ishii, Y.; Ishiyama, T.

    2017-05-01

    A plasmonic integrated circuit configuration comprising plasmonic and electronic components is presented and the feasibility for high-speed signal processing applications is discussed. In integrated circuits, plasmonic signals transmit data at high transfer rates with light velocity. Plasmonic and electronic components such as wavelength-divisionmultiplexing (WDM) networks comprising metal wires, plasmonic multiplexers/demultiplexers, and crossing metal wires are connected via plasmonic waveguides on the nanometer or micrometer scales. To merge plasmonic and electronic components, several types of plasmonic components were developed. To ensure that the plasmonic components could be easily fabricated and monolithically integrated onto a silicon substrate using silicon complementary metal-oxide-semiconductor (CMOS)-compatible processes, the components were fabricated on a Si substrate and made from silicon, silicon oxides, and metal; no other materials were used in the fabrication. The plasmonic components operated in the 1300- and 1550-nm-wavelength bands, which are typically employed in optical fiber communication systems. The plasmonic logic circuits were formed by patterning a silicon oxide film on a metal film, and the operation as a half adder was confirmed. The computed plasmonic signals can propagate through the plasmonic WDM networks and be connected to electronic integrated circuits at high data-transfer rates.

  8. Monolithic Microwave Integrated Circuit (MMIC) Phased Array Demonstrated With ACTS

    Science.gov (United States)

    1996-01-01

    Monolithic Microwave Integrated Circuit (MMIC) arrays developed by the NASA Lewis Research Center and the Air Force Rome Laboratory were demonstrated in aeronautical terminals and in mobile or fixed Earth terminals linked with NASA's Advanced Communications Technology Satellite (ACTS). Four K/Ka-band experimental arrays were demonstrated between May 1994 and May 1995. Each array had GaAs MMIC devices at each radiating element for electronic beam steering and distributed power amplification. The 30-GHz transmit array used in uplinks to ACTS was developed by Lewis and Texas Instruments. The three 20-GHz receive arrays used in downlinks from ACTS were developed in cooperation with the Air Force Rome Laboratory, taking advantage of existing Air Force integrated-circuit, active-phased-array development contracts with the Boeing Company and Lockheed Martin Corporation. Four demonstrations, each related to an application of high interest to both commercial and Department of Defense organizations, were conducted. The location, type of link, and the data rate achieved for each of the applications is shown. In one demonstration-- an aeronautical terminal experiment called AERO-X--a duplex voice link between an aeronautical terminal on the Lewis Learjet and ACTS was achieved. Two others demonstrated duplex voice links (and in one case, interactive video links as well) between ACTS and an Army high-mobility, multipurpose wheeled vehicle (HMMWV, or "humvee"). In the fourth demonstration, the array was on a fixed mount and was electronically steered toward ACTS. Lewis served as project manager for all demonstrations and as overall system integrator. Lewis engineers developed the array system including a controller for open-loop tracking of ACTS during flight and HMMWV motion, as well as a laptop data display and recording system used in all demonstrations. The Jet Propulsion Laboratory supported the AERO-X program, providing elements of the ACTS Mobile Terminal. The successful

  9. Microcoil Spring Interconnects for Ceramic Grid Array Integrated Circuits

    Science.gov (United States)

    Strickland, S. M.; Hester, J. D.; Gowan, A. K.; Montgomery, R. K.; Geist, D. L.; Blanche, J. F.; McGuire, G. D.; Nash, T. S.

    2011-01-01

    As integrated circuit miniaturization trends continue, they drive the need for smaller higher input/output (I/O) packages. Hermetically sealed ceramic area array parts are the package of choice by the space community for high reliability space flight electronic hardware. Unfortunately, the coefficient of thermal expansion mismatch between the ceramic area array package and the epoxy glass printed wiring board limits the life of the interconnecting solder joint. This work presents the results of an investigation by Marshall Space Flight Center into a method to increase the life of this second level interconnection by the use of compliant microcoil springs. The design of the spring and its attachment process are presented along with thermal cycling results of microcoil springs (MCS) compared with state-of-the-art ball and column interconnections. Vibration testing has been conducted on MCS and high lead column parts. Radio frequency simulation and measurements have been made and the MCS has been modeled and a stress analysis performed. Thermal cycling and vibration testing have shown MCS interconnects to be significantly more reliable than solder columns. Also, MCS interconnects are less prone to handling damage than solder columns. Future work that includes shock testing, incorporation into a digital signal processor board, and process evaluation of expansion from a 400 I/O device to a device with over 1,100 I/O is identified.

  10. GaAs integrated circuits and heterojunction devices

    Science.gov (United States)

    Fowlis, Colin

    1986-06-01

    The state of the art of GaAs technology in the U.S. as it applies to digital and analog integrated circuits is examined. In a market projection, it is noted that whereas analog ICs now largely dominate the market, in 1994 they will amount to only 39 percent vs. 57 percent for digital ICs. The military segment of the market will remain the largest (42 percent in 1994 vs. 70 percent today). ICs using depletion-mode-only FETs can be constructed in various forms, the closest to production being BFL or buffered FET logic. Schottky diode FET logic - a lower power approach - can reach higher complexities and strong efforts are being made in this direction. Enhancement type devices appear essential to reach LSI and VLSI complexity, but process control is still very difficult; strong efforts are under way, both in the U.S. and in Japan. Heterojunction devices appear very promising, although structures are fairly complex, and special fabrication techniques, such as molecular beam epitaxy and MOCVD, are necessary. High-electron-mobility-transistor (HEMT) devices show significant performance advantages over MESFETs at low temperatures. Initial results of heterojunction bipolar transistor devices show promise for high speed A/D converter applications.

  11. Mathematical model of an integrated circuit cooling through cylindrical rods

    Directory of Open Access Journals (Sweden)

    Beltrán-Prieto Luis Antonio

    2017-01-01

    Full Text Available One of the main challenges in integrated circuits development is to propose alternatives to handle the extreme heat generated by high frequency of electrons moving in a reduced space that cause overheating and reduce the lifespan of the device. The use of cooling fins offers an alternative to enhance the heat transfer using combined a conduction-convection systems. Mathematical model of such process is important for parametric design and also to gain information about temperature distribution along the surface of the transistor. In this paper, we aim to obtain the equations for heat transfer along the chip and the fin by performing energy balance and heat transfer by conduction from the chip to the rod, followed by dissipation to the surrounding by convection. Newton's law of cooling and Fourier law were used to obtain the equations that describe the profile temperature in the rod and the surface of the chip. Ordinary differential equations were obtained and the respective analytical solutions were derived after consideration of boundary conditions. The temperature along the rod decreased considerably from the initial temperature (in contatct with the chip surface. This indicates the benefit of using a cilindrical rod to distribute the heat generated in the chip.

  12. PETRIC - A positron emission tomography readout integrated circuit

    Energy Technology Data Exchange (ETDEWEB)

    Pedrali-Noy, Marzio; Gruber, Gregory; Krieger, Bradley; Mandelli, Emmanuele; Meddeler, Gerrit; Moses, William; Rosso, Valeria

    2000-11-05

    We present architecture, critical design issues and performance measurements of PETRIC, a 64-channel mixed signal front-end integrated circuit (IC) for reading out a photodiode (PD) array coupled with LSO scintillator crystals for a medical imaging application (PET). Each channel consists of a low noise charge sensitive pre-amplifier (CSA), an RC-CR pulse shaper and a winner-take-all (WTA) multiplexer that selects the channel with the largest input signal. Triggered by an external timing signal, a switch opens and a capacitor stores the peak voltage of the winner channel. The shaper rise and fall times are adjustable by means of external current inputs over a continuous range of 0.7 (mu)s to 9 (mu)s. Power consumption is 5.4 mW per channel, measured Equivalent Noise Charge (ENC) at 1 (mu)s peaking time. Zero leakage current is 33 rms electrons plus 7.3 rms electrons per pF of input capacitance. Design is fabricated in 0.5 (mu)m 3.3V CMOS technology.

  13. MIRAGE read-in integrated circuit testing results

    Science.gov (United States)

    Hoelter, Theodore R.; Henry, Blake A.; Graff, John H.; Aziz, Naseem Y.

    1999-07-01

    This paper describes the test results for the MIRAGE read- in-integrated-circuit (RIIC) designed by Indigo Systems Corporation. This RIIC, when mated with suspended membrane, micro-machined resistive elements, forms a highly advanced emitter array. This emitter array is used by Indigo and Santa Barbara Infrared Incorporated in a jointly developed product for infrared scene generation, called MIRAGE. The MIRAGE RIIC is a 512 X 512 pixel design which incorporates a number of features that extend the state of the art for emitter array RIIC devices. These innovations include an all-digital interface for scene data, snapshot image updates (all pixels show the new frame simultaneously), frame rates up to 200 Hz, operating modes that control the device output, power consumption, and diagnostic configuration. Tests measuring operating speed, RIIC functionality and D/A converter performance were completed. At 2.1 X 2.3 cm, this die is also the largest nonstitched device ever made by Indigo's foundry, American Microsystems Incorporated. As with any IC design, die yield is a critical factor that typically scales with the size and complexity. Die yield, and a statistical breakdown of the failures observed will be discussed.

  14. Integrated circuits and electrode interfaces for noninvasive physiological monitoring.

    Science.gov (United States)

    Ha, Sohmyung; Kim, Chul; Chi, Yu M; Akinin, Abraham; Maier, Christoph; Ueno, Akinori; Cauwenberghs, Gert

    2014-05-01

    This paper presents an overview of the fundamentals and state of the-art in noninvasive physiological monitoring instrumentation with a focus on electrode and optrode interfaces to the body, and micropower-integrated circuit design for unobtrusive wearable applications. Since the electrode/optrode-body interface is a performance limiting factor in noninvasive monitoring systems, practical interface configurations are offered for biopotential acquisition, electrode-tissue impedance measurement, and optical biosignal sensing. A systematic approach to instrumentation amplifier (IA) design using CMOS transistors operating in weak inversion is shown to offer high energy and noise efficiency. Practical methodologies to obviate 1/f noise, counteract electrode offset drift, improve common-mode rejection ratio, and obtain subhertz high-pass cutoff are illustrated with a survey of the state-of-the-art IAs. Furthermore, fundamental principles and state-of-the-art technologies for electrode-tissue impedance measurement, photoplethysmography, functional near-infrared spectroscopy, and signal coding and quantization are reviewed, with additional guidelines for overall power management including wireless transmission. Examples are presented of practical dry-contact and noncontact cardiac, respiratory, muscle and brain monitoring systems, and their clinical applications.

  15. High Voltage Dielectrophoretic and Magnetophoretic Hybrid Integrated Circuit / Microfluidic Chip

    Science.gov (United States)

    Issadore, David; Franke, Thomas; Brown, Keith A.; Hunt, Thomas P.; Westervelt, Robert M.

    2010-01-01

    A hybrid integrated circuit (IC) / microfluidic chip is presented that independently and simultaneously traps and moves microscopic objects suspended in fluid using both electric and magnetic fields. This hybrid chip controls the location of dielectric objects, such as living cells and drops of fluid, on a 60 × 61 array of pixels that are 30 × 38 μm2 in size, each of which can be individually addressed with a 50 V peak-to-peak, DC to 10 MHz radio frequency voltage. These high voltage pixels produce electric fields above the chip’s surface with a magnitude , resulting in strong dielectrophoresis (DEP) forces . Underneath the array of DEP pixels there is a magnetic matrix that consists of two perpendicular sets of 60 metal wires running across the chip. Each wire can be sourced with 120 mA to trap and move magnetically susceptible objects using magnetophoresis (MP). The DEP pixel array and magnetic matrix can be used simultaneously to apply forces to microscopic objects, such as living cells or lipid vesicles, that are tagged with magnetic nanoparticles. The capabilities of the hybrid IC / microfluidic chip demonstrated in this paper provide important building blocks for a platform for biological and chemical applications. PMID:20625468

  16. Wireless Amperometric Neurochemical Monitoring Using an Integrated Telemetry Circuit

    Science.gov (United States)

    Roham, Masoud; Halpern, Jeffrey M.; Martin, Heidi B.; Chiel, Hillel J.

    2015-01-01

    An integrated circuit for wireless real-time monitoring of neurochemical activity in the nervous system is described. The chip is capable of conducting high-resolution amperometric measurements in four settings of the input current. The chip architecture includes a first-order ΔΣ modulator (ΔΣM) and a frequency-shift-keyed (FSK) voltage-controlled oscillator (VCO) operating near 433 MHz. It is fabricated using the AMI 0.5 μm double-poly triple-metal n-well CMOS process, and requires only one off-chip component for operation. Measured dc current resolutions of ~250 fA, ~1.5 pA, ~4.5 pA, and ~17 pA were achieved for input currents in the range of ±5, ±37, ±150, and ±600 nA, respectively. The chip has been interfaced with a diamond-coated, quartz-insulated, microneedle, tungsten electrode, and successfully recorded dopamine concentration levels as low as 0.5 μM wirelessly over a transmission distance of ~0.5 m in flow injection analysis experiments. PMID:18990633

  17. Tomography of integrated circuit interconnect with an electromigration void

    Energy Technology Data Exchange (ETDEWEB)

    Levine, Zachary H. [National Institute of Standards and Technology, Gaithersburg, Maryland 20899-8410 (United States); Rensselaer Polytechnic Institute, Troy, New York 12180-3590 (United States); Kalukin, Andrew R. [National Institute of Standards and Technology, Gaithersburg, Maryland 20899-8410 (United States); Kuhn, Markus [Intel Corporation RA1-329, 5200 Northeast Elam Young Parkway, Hillsboro, Oregon 74124 (United States); Frigo, Sean P. [Advanced Photon Source, Argonne National Laboratory, 9700 South Cass Avenue, Argonne, Illinois 60439 (United States); McNulty, Ian [Advanced Photon Source, Argonne National Laboratory, 9700 South Cass Avenue, Argonne, Illinois 60439 (United States); Retsch, Cornelia C. [Advanced Photon Source, Argonne National Laboratory, 9700 South Cass Avenue, Argonne, Illinois 60439 (United States); Wang, Yuxin [Advanced Photon Source, Argonne National Laboratory, 9700 South Cass Avenue, Argonne, Illinois 60439 (United States); Arp, Uwe [National Institute of Standards and Technology, Gaithersburg, Maryland 20899-8410 (United States); Lucatorto, Thomas B. [National Institute of Standards and Technology, Gaithersburg, Maryland 20899-8410 (United States); Ravel, Bruce D. [National Institute of Standards and Technology, Gaithersburg, Maryland 20899-8410 (United States)] (and others)

    2000-05-01

    An integrated circuit interconnect was subject to accelerated-life test conditions to induce an electromigration void. The silicon substrate was removed, leaving only the interconnect test structure encased in silica. We imaged the sample with 1750 eV photons using the 2-ID-B scanning transmission x-ray microscope at the Advanced Photon Source, a third-generation synchrotron facility. Fourteen views through the sample were obtained over a 170 degree sign range of angles (with a 40 degree sign gap) about a single rotation axis. Two sampled regions were selected for three-dimensional reconstruction: one of the ragged end of a wire depleted by the void, the other of the adjacent interlevel connection (or ''via''). We applied two reconstruction techniques: the simultaneous iterative reconstruction technique and a Bayesian reconstruction technique, the generalized Gaussian Markov random field method. The stated uncertainties are total, with one standard deviation, which resolved the sample to 200{+-}70 and 140{+-}30 nm, respectively. The tungsten via is distinguished from the aluminum wire by higher absorption. Within the void, the aluminum is entirely depleted from under the tungsten via. The reconstructed data show the applicability of this technique to three-dimensional imaging of buried defects in submicrometer structures relevant to the microelectronics industry. (c) 2000 American Institute of Physics.

  18. Neural Networks Integrated Circuit for Biomimetics MEMS Microrobot

    Directory of Open Access Journals (Sweden)

    Ken Saito

    2014-06-01

    Full Text Available In this paper, we will propose the neural networks integrated circuit (NNIC which is the driving waveform generator of the 4.0, 2.7, 2.5 mm, width, length, height in size biomimetics microelectromechanical systems (MEMS microrobot. The microrobot was made from silicon wafer fabricated by micro fabrication technology. The mechanical system of the robot was equipped with small size rotary type actuators, link mechanisms and six legs to realize the ant-like switching behavior. The NNIC generates the driving waveform using synchronization phenomena such as biological neural networks. The driving waveform can operate the actuators of the MEMS microrobot directly. Therefore, the NNIC bare chip realizes the robot control without using any software programs or A/D converters. The microrobot performed forward and backward locomotion, and also changes direction by inputting an external single trigger pulse. The locomotion speed of the microrobot was 26.4 mm/min when the step width was 0.88 mm. The power consumption of the system was 250 mWh when the room temperature was 298 K.

  19. Efficient Fingerprint Matching Algorithm for Integrated Circuit Cards

    Institute of Scientific and Technical Information of China (English)

    Jian-Wei Yang; Li-Feng Liu; Tian-Zi Jiang

    2004-01-01

    Fingerprint matching is a crucial step in fingerprint identification.Recently,a variety of algorithms for this issue have been developed.Each of them is application situation specific and has its advantages and disadvantages.It is highly desired to develop an efficient fingerprint verification technology for Integrated Circuit(IC)Cards or chips.IC cards have some special characteristics,such as very small storage space and slow processing speed,which hinder the use of most fingerprint matching algorithms in such situations.In order to solve this problem,the paper presents an improved minutia-pattern(minutiae-based)matching algorithm by employing the orientation field of the fingerprint as a new feature.Our algorithm not only inherits the advantages of the general minutia-pattern matching algorithms,but also overcomes their disadvantages.Experimental results show that the proposed algorithm can greatly improve the performance of fingerprint matching in both accuracy and efficiency,and it is very suitable for applications in IC cards.

  20. An integrated modelling framework for neural circuits with multiple neuromodulators

    Science.gov (United States)

    Vemana, Vinith

    2017-01-01

    Neuromodulators are endogenous neurochemicals that regulate biophysical and biochemical processes, which control brain function and behaviour, and are often the targets of neuropharmacological drugs. Neuromodulator effects are generally complex partly owing to the involvement of broad innervation, co-release of neuromodulators, complex intra- and extrasynaptic mechanism, existence of multiple receptor subtypes and high interconnectivity within the brain. In this work, we propose an efficient yet sufficiently realistic computational neural modelling framework to study some of these complex behaviours. Specifically, we propose a novel dynamical neural circuit model that integrates the effective neuromodulator-induced currents based on various experimental data (e.g. electrophysiology, neuropharmacology and voltammetry). The model can incorporate multiple interacting brain regions, including neuromodulator sources, simulate efficiently and easily extendable to large-scale brain models, e.g. for neuroimaging purposes. As an example, we model a network of mutually interacting neural populations in the lateral hypothalamus, dorsal raphe nucleus and locus coeruleus, which are major sources of neuromodulator orexin/hypocretin, serotonin and norepinephrine/noradrenaline, respectively, and which play significant roles in regulating many physiological functions. We demonstrate that such a model can provide predictions of systemic drug effects of the popular antidepressants (e.g. reuptake inhibitors), neuromodulator antagonists or their combinations. Finally, we developed user-friendly graphical user interface software for model simulation and visualization for both fundamental sciences and pharmacological studies. PMID:28100828

  1. Novel immunoassay formats for integrated microfluidic circuits: diffusion immunoassays (DIA)

    Science.gov (United States)

    Weigl, Bernhard H.; Hatch, Anson; Kamholz, Andrew E.; Yager, Paul

    2000-03-01

    Novel designs of integrated fluidic microchips allow separations, chemical reactions, and calibration-free analytical measurements to be performed directly in very small quantities of complex samples such as whole blood and contaminated environmental samples. This technology lends itself to applications such as clinical diagnostics, including tumor marker screening, and environmental sensing in remote locations. Lab-on-a-Chip based systems offer many *advantages over traditional analytical devices: They consume extremely low volumes of both samples and reagents. Each chip is inexpensive and small. The sampling-to-result time is extremely short. They perform all analytical functions, including sampling, sample pretreatment, separation, dilution, and mixing steps, chemical reactions, and detection in an integrated microfluidic circuit. Lab-on-a-Chip systems enable the design of small, portable, rugged, low-cost, easy to use, yet extremely versatile and capable diagnostic instruments. In addition, fluids flowing in microchannels exhibit unique characteristics ('microfluidics'), which allow the design of analytical devices and assay formats that would not function on a macroscale. Existing Lab-on-a-chip technologies work very well for highly predictable and homogeneous samples common in genetic testing and drug discovery processes. One of the biggest challenges for current Labs-on-a-chip, however, is to perform analysis in the presence of the complexity and heterogeneity of actual samples such as whole blood or contaminated environmental samples. Micronics has developed a variety of Lab-on-a-Chip assays that can overcome those shortcomings. We will now present various types of novel Lab- on-a-Chip-based immunoassays, including the so-called Diffusion Immunoassays (DIA) that are based on the competitive laminar diffusion of analyte molecules and tracer molecules into a region of the chip containing antibodies that target the analyte molecules. Advantages of this

  2. Linear integral equations and renormalization group

    Science.gov (United States)

    Klein, W.; Haymet, A. D. J.

    1984-08-01

    A formulation of the position-space renormalization-group (RG) technique is used to analyze the singular behavior of solutions to a number of integral equations used in the theory of the liquid state. In particular, we examine the truncated Kirkwood-Salsburg equation, the Ornstein-Zernike equation, and a simple nonlinear equation used in the mean-field theory of liquids. We discuss the differences in applying the position-space RG to lattice systems and to fluids, and the need for an explicit free-energy rescaling assumption in our formulation of the RG for integral equations. Our analysis provides one natural way to define a "fractal" dimension at a phase transition.

  3. Large scale MoS2 nanosheet logic circuits integrated by photolithography on glass

    Science.gov (United States)

    Kwon, Hyeokjae; Jeon, Pyo Jin; Kim, Jin Sung; Kim, Tae-Young; Yun, Hoyeol; Lee, Sang Wook; Lee, Takhee; Im, Seongil

    2016-12-01

    We demonstrate 500 × 500 μm2 large scale polygrain MoS2 nanosheets and field effect transistor (FET) circuits integrated using those nanosheets, which are initially grown on SiO2/p+-Si by chemical vapor deposition but transferred onto glass substrate to be patterned by photolithography. In fact, large scale growth of two-dimensional MoS2 and its conventional way of patterning for integrated devices have remained as one of the unresolved important issues. In the present study, we achieved maximum linear mobility of ˜9 cm2 V-1 s-1 from single-domain MoS2 FET on SiO2/p+-Si substrate and 0.5˜3.0 cm2 V-1 s-1 from large scale MoS2 sheet transferred onto glass. Such reduced mobility is attributed to the transfer process-induced wrinkles and crevices, domain boundaries, residue on MoS2, and loss of the back gate-charging effects that might exist due to SiO2/p+-Si substrate. Among 16 MoS2-based FETs, 13 devices successfully work (yield was more than 80%) producing NOT, NOR, and NAND logic circuits. Inverter (NOT gate) shows quite a high voltage gain over 12 at a supply voltage of 5 V, also displaying 60 μs switching speed in kilohertz dynamics.

  4. Diagnosis of soft faults in analog integrated circuits based on fractional correlation

    Institute of Scientific and Technical Information of China (English)

    Deng Yong; Shi Yibing; Zhang Wei

    2012-01-01

    Aiming at the problem of diagnosing soft faults in analog integrated circuits,an approach based on fractional correlation is proposed.First,the Volterra series of the circuit under test (CUT) decomposed by the fractional wavelet packet are used to calculate the fractional correlation functions.Then,the calculated fractional correlation functions are used to form the fault signatures of the CUT.By comparing the fault signatures,the different soft faulty conditions of the CUT are identified and the faults are located.Simulations of benchmark circuits illustrate the proposed method and validate its effectiveness in diagnosing soft faults in analog integrated circuits.

  5. Variable Time Base Integrator Circuit for Buffet Signal Measurements

    Science.gov (United States)

    Batts, Colossie N.

    1973-01-01

    A measurement circuit to obtain buffet data from wind tunnel models wherein a signal proportional to the average RMS value of buffet data is produced for subsequent recording. Feedback means are employed to suppress the D.C. portion of signals developed by the strain gages during dynamic testing. Automatic recording of gain settings of amplifiers employed in the circuit is also provided.

  6. Full Wave Simulation of Integrated Circuits Using Hybrid Numerical Methods

    Science.gov (United States)

    Tan, Jilin

    Transmission lines play an important role in digital electronics, and in microwave and millimeter-wave circuits. Analysis, modeling, and design of transmission lines are critical to the development of the circuitry in the chip, subsystem, and system levels. In the past several decays, at the EM modeling level, the quasi-static approximation has been widely used due to its great simplicity. As the clock rates increase, the inter-connect effects such as signal delay, distortion, dispersion, reflection, and crosstalk, limit the performance of microwave systems. Meanwhile, the quasi-static approach loses its validity for some complex system structures. Since the successful system design of the PCB, MCM, and the chip packaging, rely very much on the computer aided EM level modeling and simulation, many new methods have been developed, such as the full wave approach, to guarantee the successful design. Many difficulties exist in the rigorous EM level analysis. Some of these include the difficulties in describing the behavior of the conductors with finite thickness and finite conductivity, the field singularity, and the arbitrary multilayered multi-transmission lines structures. This dissertation concentrates on the full wave study of the multi-conductor transmission lines with finite conductivity and finite thickness buried in an arbitrary lossy multilayered environment. Two general approaches have been developed. The first one is the integral equation method in which the dyadic Green's function for arbitrary layered media has been correctly formulated and has been tested both analytically and numerically. By applying this method, the double layered high dielectric permitivitty problem and the heavy dielectrical lossy problem in multilayered media in the CMOS circuit design have been solved. The second approach is the edge element method. In this study, the correct functional for the two dimensional propagation problem has been successfully constructed in a rigorous way

  7. Dual-function photonic integrated circuit for frequency octo-tupling or single-side-band modulation.

    Science.gov (United States)

    Hasan, Mehedi; Maldonado-Basilio, Ramón; Hall, Trevor J

    2015-06-01

    A dual-function photonic integrated circuit for microwave photonic applications is proposed. The circuit consists of four linear electro-optic phase modulators connected optically in parallel within a generalized Mach-Zehnder interferometer architecture. The photonic circuit is arranged to have two separate output ports. A first port provides frequency up-conversion of a microwave signal from the electrical to the optical domain; equivalently single-side-band modulation. A second port provides tunable millimeter wave carriers by frequency octo-tupling of an appropriate amplitude RF carrier. The circuit exploits the intrinsic relative phases between the ports of multi-mode interference couplers to provide substantially all the static optical phases needed. The operation of the proposed dual-function photonic integrated circuit is verified by computer simulations. The performance of the frequency octo-tupling and up-conversion functions is analyzed in terms of the electrical signal to harmonic distortion ratio and the optical single side band to unwanted harmonics ratio, respectively.

  8. A Tool for Single-Fault Diagnosis in Linear Analog Circuits with Tolerance Using the T-Vector Approach

    Directory of Open Access Journals (Sweden)

    José A. Soares Augusto

    2008-01-01

    Full Text Available In previous works of these authors, a technique for doing single-fault diagnosis in linear analog circuits was developed. Under certain conditions, one of them assuming nominal values for the circuit parameters, it was shown that only two measurements taken on two selected circuit nodes, at a single frequency, were needed to detect and diagnose any parametric fault. In this paper, the practical value of the technique is improved by extending the application to the diagnosis of faults in circuits with parameters subject to tolerance. With this in mind, single parametric faults with several strengths are randomly injected in the circuit under study and, afterwards, these faults are diagnosed (or the diagnosis fails. Results are reported on a simple active filter. Conclusions are drawn about the robustness and effectiveness of the technique.

  9. Error Control of Iterative Linear Solvers for Integrated Groundwater Models

    CERN Document Server

    Dixon, Matthew; Brush, Charles; Chung, Francis; Dogrul, Emin; Kadir, Tariq

    2010-01-01

    An open problem that arises when using modern iterative linear solvers, such as the preconditioned conjugate gradient (PCG) method or Generalized Minimum RESidual method (GMRES) is how to choose the residual tolerance in the linear solver to be consistent with the tolerance on the solution error. This problem is especially acute for integrated groundwater models which are implicitly coupled to another model, such as surface water models, and resolve both multiple scales of flow and temporal interaction terms, giving rise to linear systems with variable scaling. This article uses the theory of 'forward error bound estimation' to show how rescaling the linear system affects the correspondence between the residual error in the preconditioned linear system and the solution error. Using examples of linear systems from models developed using the USGS GSFLOW package and the California State Department of Water Resources' Integrated Water Flow Model (IWFM), we observe that this error bound guides the choice of a prac...

  10. Development of an integrated circuit VLSI used for time measurement and selective read out in the front end electronics of the DIRC for the Babar experience at SLAC; Developpement d'un circuit integre VLSI assurant mesure de temps et lecture selective dans l'electronique frontale du compteur DIRC de l'experience babar a slac

    Energy Technology Data Exchange (ETDEWEB)

    Zhang, B

    1999-07-01

    This thesis deals with the design the development and the tests of an integrated circuit VLSI, supplying selective read and time measure for 16 channels. This circuit has been developed for a experiment of particles physics, BABAR, that will take place at SLAC (Stanford Linear Accelerator Center). A first part describes the physical stakes of the experiment, the electronic architecture and the place of the developed circuit in the research program. The second part presents the technical drawings of the circuit, the prototypes leading to the final design and the validity tests. (A.L.B.)

  11. Reduction of EMC Emissions in Mixed Signal Integrated Circuits with Embedded LIN Driver

    Directory of Open Access Journals (Sweden)

    P. Hartl

    2016-06-01

    Full Text Available This paper describes several methods for reduction of electromagnetic emissions (EME of mixed signal integrated circuits (IC. The focus is on the impact that a LIN bus communication block has on a complex IC which contains analog blocks, noisy digital block, micro-core (µC and several types of memories. It is used in an automotive environment, where EMC emission reduction is one of the key success factors. Several proposed methods for EME reduction are described and implemented on three test chips. These methods include current consumption reduction, internal on-chip decoupling, ground separation and different linear voltage regulator topologies. Measurement results of several fabricated test chips are shown and discussed.

  12. Application specific integrated circuit (ASIC) readout technologies for future ion beam analytical instruments

    Energy Technology Data Exchange (ETDEWEB)

    Whitlow, Harry J. E-mail: harry_j.whitlow@nuclear.lu.se

    2000-03-01

    New possibilities for ion beam analysis (IBA) are afforded by recent developments in detector technology which facilitate the parallel collection of data from a large number of channels. Application specific integrated circuit (ASIC) technologies, which have been widely employed for multi-channel readout systems in nuclear and particle physics, are more net-cost effective (160/channel for 1000 channels) and a more rational solution for readout of a large number of channels than afforded by conventional electronics. Based on results from existing and on-going chip designs, the possibilities and issues of ASIC readout technology are considered from the IBA viewpoint. Consideration is given to readout chip architecture and how the stringent resolution, linearity and stability requirements for IBA may be met. In addition the implications of the restrictions imposed by ASIC technology are discussed.

  13. Integrated reconfigurable high-voltage transmitting circuit for CMUTs

    DEFF Research Database (Denmark)

    Llimos Muntal, Pere; Larsen, Dennis Øland; Jørgensen, Ivan Harald Holger

    2015-01-01

    In this paper a high-voltage transmitting circuit aimed for capacitive micromachined ultrasonic transducers (CMUTs) used in scanners for medical applications is designed and implemented in a 0.35 μm high-voltage CMOS process. The transmitting circuit is reconfigurable externally making it able...... performance. The design occupies an on-chip area of 0.938 mm2 and the power consumption of a 128-element transmitting circuit array that would be used in an portable ultrasound scanner is found to be a maximum of 181 mW....

  14. Integrated reconfigurable high-voltage transmitting circuit for CMUTs

    DEFF Research Database (Denmark)

    Llimos Muntal, Pere; Larsen, Dennis Øland; Jørgensen, Ivan Harald Holger;

    2015-01-01

    In this paper a high-voltage transmitting circuit aimed for capacitive micromachined ultrasonic transducers (CMUTs) used in scanners for medical applications is designed and implemented in a 0.35 μm high-voltage CMOS process. The transmitting circuit is reconfigurable externally making it able...... performance. The design occupies an on-chip area of 0.938 mm2 and the power consumption of a 128-element transmitting circuit array that would be used in an portable ultrasound scanner is found to be a maximum of 181 mW....

  15. Highly integrated optical phased arrays: photonic integrated circuits for optical beam shaping and beam steering

    Directory of Open Access Journals (Sweden)

    Heck Martijn J.R.

    2017-01-01

    Full Text Available Technologies for efficient generation and fast scanning of narrow free-space laser beams find major applications in three-dimensional (3D imaging and mapping, like Lidar for remote sensing and navigation, and secure free-space optical communications. The ultimate goal for such a system is to reduce its size, weight, and power consumption, so that it can be mounted on, e.g. drones and autonomous cars. Moreover, beam scanning should ideally be done at video frame rates, something that is beyond the capabilities of current opto-mechanical systems. Photonic integrated circuit (PIC technology holds the promise of achieving low-cost, compact, robust and energy-efficient complex optical systems. PICs integrate, for example, lasers, modulators, detectors, and filters on a single piece of semiconductor, typically silicon or indium phosphide, much like electronic integrated circuits. This technology is maturing fast, driven by high-bandwidth communications applications, and mature fabrication facilities. State-of-the-art commercial PICs integrate hundreds of elements, and the integration of thousands of elements has been shown in the laboratory. Over the last few years, there has been a considerable research effort to integrate beam steering systems on a PIC, and various beam steering demonstrators based on optical phased arrays have been realized. Arrays of up to thousands of coherent emitters, including their phase and amplitude control, have been integrated, and various applications have been explored. In this review paper, I will present an overview of the state of the art of this technology and its opportunities, illustrated by recent breakthroughs.

  16. Highly integrated optical phased arrays: photonic integrated circuits for optical beam shaping and beam steering

    Science.gov (United States)

    Heck, Martijn J. R.

    2017-01-01

    Technologies for efficient generation and fast scanning of narrow free-space laser beams find major applications in three-dimensional (3D) imaging and mapping, like Lidar for remote sensing and navigation, and secure free-space optical communications. The ultimate goal for such a system is to reduce its size, weight, and power consumption, so that it can be mounted on, e.g. drones and autonomous cars. Moreover, beam scanning should ideally be done at video frame rates, something that is beyond the capabilities of current opto-mechanical systems. Photonic integrated circuit (PIC) technology holds the promise of achieving low-cost, compact, robust and energy-efficient complex optical systems. PICs integrate, for example, lasers, modulators, detectors, and filters on a single piece of semiconductor, typically silicon or indium phosphide, much like electronic integrated circuits. This technology is maturing fast, driven by high-bandwidth communications applications, and mature fabrication facilities. State-of-the-art commercial PICs integrate hundreds of elements, and the integration of thousands of elements has been shown in the laboratory. Over the last few years, there has been a considerable research effort to integrate beam steering systems on a PIC, and various beam steering demonstrators based on optical phased arrays have been realized. Arrays of up to thousands of coherent emitters, including their phase and amplitude control, have been integrated, and various applications have been explored. In this review paper, I will present an overview of the state of the art of this technology and its opportunities, illustrated by recent breakthroughs.

  17. Method for producing a hybridization of detector array and integrated circuit for readout

    Science.gov (United States)

    Fossum, Eric R.; Grunthaner, Frank J.

    1993-08-01

    A process is explained for fabricating a detector array in a layer of semiconductor material on one substrate and an integrated readout circuit in a layer of semiconductor material on a separate substrate in order to select semiconductor material for optimum performance of each structure, such as GaAs for the detector array and Si for the integrated readout circuit. The detector array layer is lifted off its substrate, laminated on the metallized surface on the integrated surface, etched with reticulating channels to the surface of the integrated circuit, and provided with interconnections between the detector array pixels and the integrated readout circuit through the channels. The adhesive material for the lamination is selected to be chemically stable to provide electrical and thermal insulation and to provide stress release between the two structures fabricated in semiconductor materials that may have different coefficients of thermal expansion.

  18. LINEAR SINGULAR INTEGRAL EQUATION ON DOMAINS COMPOSED BY BALLS

    Institute of Scientific and Technical Information of China (English)

    2006-01-01

    For domains composed by balls in Cn, this paper studies the boundary behaviour of Cauchy type integrals with discrete holomorphic kernels and the corresponding linear singular integral equation on each piece of smooth lower dimensional edges on the boundary of the domain.

  19. Translation and integration of numerical atomic orbitals in linear molecules

    Energy Technology Data Exchange (ETDEWEB)

    Heinäsmäki, Sami, E-mail: sami.heinasmaki@gmail.com [Department of Physics, University of Oulu, FIN-90014, Oulu (Finland)

    2014-02-14

    We present algorithms for translation and integration of atomic orbitals for LCAO calculations in linear molecules. The method applies to arbitrary radial functions given on a numerical mesh. The algorithms are based on pseudospectral differentiation matrices in two dimensions and the corresponding two-dimensional Gaussian quadratures. As a result, multicenter overlap and Coulomb integrals can be evaluated effectively.

  20. A new pulse width signal processing with delay-line and non-linear circuit (for ToT)

    Energy Technology Data Exchange (ETDEWEB)

    Orita, Tadashi, E-mail: orita@sophie.q.t.u-tokyo.ac.jp [Department of Nuclear Engineering and Management, Graduate School of Engineering, University of Tokyo (Japan); Takahashi, Hiroyuki; Shimazoe, Kenji; Fujiwara, Takeshi; Boxuan, Shi [Department of Nuclear Engineering and Management, Graduate School of Engineering, University of Tokyo (Japan)

    2011-08-21

    Traditional pulse-height-analysis systems suffer from the complexity arising from ADC circuits. In particular, it is difficult to be applied to a large format array of pixilated detectors. Each channel of such an energy resolving multichannel system must be low power consumption and therefore it must be composed of simple circuits. The time-over-threshold (ToT) method provides an inexpensive way in such a system. However, ToT method suffers from a poor linearity. We now propose a method to improve the linearity with the dynamic time-over-threshold method that relies on a dynamic threshold voltage and the trapezoidal shaping method.

  1. Flip-chip integration of tilted VCSELs onto a silicon photonic integrated circuit.

    Science.gov (United States)

    Lu, Huihui; Lee, Jun Su; Zhao, Yan; Scarcella, Carmelo; Cardile, Paolo; Daly, Aidan; Ortsiefer, Markus; Carroll, Lee; O'Brien, Peter

    2016-07-25

    In this article we describe a cost-effective approach for hybrid laser integration, in which vertical cavity surface emitting lasers (VCSELs) are passively-aligned and flip-chip bonded to a Si photonic integrated circuit (PIC), with a tilt-angle optimized for optical-insertion into standard grating-couplers. A tilt-angle of 10° is achieved by controlling the reflow of the solder ball deposition used for the electrical-contacting and mechanical-bonding of the VCSEL to the PIC. After flip-chip integration, the VCSEL-to-PIC insertion loss is -11.8 dB, indicating an excess coupling penalty of -5.9 dB, compared to Fibre-to-PIC coupling. Finite difference time domain simulations indicate that the penalty arises from the relatively poor match between the VCSEL mode and the grating-coupler.

  2. LINEARIZING THE RESPONSE OF THE NSRL SYNCHRONOUS RECYCLING-INTEGRATORS.

    Energy Technology Data Exchange (ETDEWEB)

    ODDO, P.; RUSEK, A.; RUSSO, T.

    2005-05-16

    The Lawrence Berkeley National Laboratory (LBNL) designed recycling-integrators used for the NASA Space Radiation Laboratory (NSRL) dosimetry feature excellent linearity. However, switching transients in the balancing source add a duty-cycle dependence to the response that manifests as a non-linearity near mid-scale and a slope-change above mid-scale. The onset of this non-linearity limits the typical usable dynamic range. Measurements during a recent run showed that at higher intensities the recycling-integrators would operate in the non-linear region enough to exceed the desired tolerance and over count the dose. This report will show how a FPGA, which implements the scalars, was used to compensate the non-linearity allowing higher dose-rates by effectively doubling the dynamic range of the dosimetry system.

  3. A Novel Analog Integrated Circuit Design Course Covering Design, Layout, and Resulting Chip Measurement

    Science.gov (United States)

    Lin, Wei-Liang; Cheng, Wang-Chuan; Wu, Chen-Hao; Wu, Hai-Ming; Wu, Chang-Yu; Ho, Kuan-Hsuan; Chan, Chueh-An

    2010-01-01

    This work describes a novel, first-year graduate-level analog integrated circuit (IC) design course. The course teaches students analog circuit design; an external manufacturer then produces their designs in three different silicon chips. The students, working in pairs, then test these chips to verify their success. All work is completed within…

  4. Low-power integrated-circuit driver for ferrite-memory word lines

    Science.gov (United States)

    Katz, S.

    1970-01-01

    Composite circuit uses both n-p-n bipolar and p-channel MOS transistors /BIMOS/. The BIMOS driver provides 1/ ease of integrated circuit construction, 2/ low standby power consumption, 3/ bidirectional current pulses, and 4/ current-pulse amplitudes and rise times independent of active device parameters.

  5. Design and Fabrication of a Monolithic Optoelectronic Integrated Circuit Chip Based on CMOS Compatible Technology

    Institute of Scientific and Technical Information of China (English)

    GUO Wei-Feng; ZHAO Yong; WANG Wan-Jun; SHAO Hai-Feng; YANG Jian-Yi; JIANG Xiao-Qing

    2012-01-01

    A monolithic optoelectronic integrated circuit chip on a silicon-on-insulator is designed and fabricated based on complementary metal oxide semiconductor compatible technology.The chip integrates an optical Mach-Zehnder modulator (MZM) and a CMOS driving circuit with the amplification function.Test results show that the extinction ratio of the MZM is close to 20dB and the small-signal gain of the CMOS driving circuit is about 26.9dB.A 50m V 10 MHz sine wave signal is amplified by the driving circuit,and then drives the MZM successfully.%A monolithic optoelectronic integrated circuit chip on a silicon-on-insulator is designed and fabricated based on complementary metal oxide semiconductor compatible technology. The chip integrates an optical Mach-Zehnder modulator (MZM) and a CMOS driving circuit with the amplification function. Test results show that the extinction ratio of the MZM is close to 20 dB and the small-signal gain of the CMOS driving circuit is about 26.9dB. A 50mV 10MHz sine wave signal is amplified by the driving circuit, and then drives the MZM successfully.

  6. A Novel Analog Integrated Circuit Design Course Covering Design, Layout, and Resulting Chip Measurement

    Science.gov (United States)

    Lin, Wei-Liang; Cheng, Wang-Chuan; Wu, Chen-Hao; Wu, Hai-Ming; Wu, Chang-Yu; Ho, Kuan-Hsuan; Chan, Chueh-An

    2010-01-01

    This work describes a novel, first-year graduate-level analog integrated circuit (IC) design course. The course teaches students analog circuit design; an external manufacturer then produces their designs in three different silicon chips. The students, working in pairs, then test these chips to verify their success. All work is completed within…

  7. Aluminum heat sink enables power transistors to be mounted integrally with printed circuit board

    Science.gov (United States)

    Seaward, R. C.

    1967-01-01

    Power transistor is provided with an integral flat plate aluminum heat sink which mounts directly on a printed circuit board containing associated circuitry. Standoff spacers are used to attach the heat sink to the printed circuit board containing the remainder of the circuitry.

  8. Links among impossible differential, integral and zero correlation linear cryptanalysis

    DEFF Research Database (Denmark)

    Sun, Bing; Liu, Zhiqiang; Rijmen, Vincent

    2015-01-01

    is to fix this gap and establish links between impossible differential cryptanalysis and integral cryptanalysis. Firstly, by introducing the concept of structure and dual structure, we prove that a → b is an impossible differential of a structure E if and only if it is a zero correlation linear hull...... linear hull always indicates the existence of an integral distinguisher. With this observation we improve the number of rounds of integral distinguishers of Feistel structures, CAST-256, SMS4 and Camellia. Finally, we conclude that an r-round impossible differential of E always leads to an r...

  9. SEMICONDUCTOR INTEGRATED CIRCUITS: A reconfigurable analog baseband circuit for WLAN, WCDMA, and Bluetooth

    Science.gov (United States)

    Tao, Tong; Baoyong, Chi; Ziqiang, Wang; Ying, Zhang; Hanjun, Jiang; Zhihua, Wang

    2010-05-01

    A reconfigurable analog baseband circuit for WLAN, WCDMA, and Bluetooth in 0.35 μm CMOS is presented. The circuit consists of two variable gain amplifiers (VGA) in cascade and a Gm-C elliptic low-pass filter (LPF). The filter-order and the cut-off frequency of the LPF can be reconfigured to satisfy the requirements of various applications. In order to achieve the optimum power consumption, the bandwidth of the VGAs can also be dynamically reconfigured and some Gm cells can be cut off in the given application. Simulation results show that the analog baseband circuit consumes 16.8 mW for WLAN, 8.9 mW for WCDMA and only 6.5 mW for Bluetooth, all with a 3 V power supply. The analog baseband circuit could provide -10 to +40 dB variable gain, third-order low pass filtering with 1 MHz cut-off frequency for Bluetooth, fourth-order low pass filtering with 2.2 MHz cut-off frequency for WCDMA, and fifth-order low pass filtering with 11 MHz cut-off frequency for WLAN, respectively.

  10. Integrated ionic liquid-based electrofluidic circuits for pressure sensing within polydimethylsiloxane microfluidic systems.

    Science.gov (United States)

    Wu, Chueh-Yu; Liao, Wei-Hao; Tung, Yi-Chung

    2011-05-21

    This paper reports a novel pressure sensor with an electrical readout based on electrofluidic circuits constructed by ionic liquid (IL)-filled microfluidic channels. The developed pressure sensor can be seamlessly fabricated into polydimethylsiloxane (PDMS) microfluidic systems using the well-developed multilayer soft lithography (MSL) technique without additional assembly or sophisticated cleanroom microfabrication processes. Therefore, the device can be easily scaled up and is fully disposable. The pressure sensing is achieved by measuring the pressure-induced electrical resistance variation of the constructed electrofluidic resistor. In addition, an electrofluidic Wheatstone bridge circuit is designed for accurate and stable resistance measurements. The pressure sensor is characterized using pressurized nitrogen gas and various liquids which flow into the microfluidic channels. The experimental results demonstrate the great long-term stability (more than a week), temperature stability (up to 100 °C), and linear characteristics of the developed pressure sensing scheme. Consequently, the integrated microfluidic pressure sensor developed in this paper is promising for better monitoring and for characterizing the flow conditions and liquid properties inside the PDMS microfluidic systems in an easier manner for various lab on a chip applications.

  11. A new pixel level digital read out integrated circuits for ultraviolet imaging sensors

    Science.gov (United States)

    Xu, Bin; Lan, Tian-yi; Yuan, Yong-gang; Li, Xiang-yang

    2014-11-01

    The ultraviolet imaging sensors consist of two important parts: the array of detectors and the read out integrated circuits. Along with the demand for the fine resolution, large input dynamic range and high integration degree of the imaging sensors, the functions of read out integrated circuits are becoming more and more important. The on chip analog to digital conversion is the main directions of research on this area. In this paper, we presented a new digital read out integrated circuits for ultraviolet imaging sensors. The proposed circuits have an analog to digital converter in each pixel, which enable the parallel analog to digital conversion of the whole pixel array. The developed circuits have a 50um×50um pixel area with a 128×128 size, and are designed in a 0.35um four metal double poly mixed signal CMOS process. The simulation results show that the designed analog to digital converter has an accuracy of 0.2mV and can achieve the dynamic range of 88dB. The proposed circuits realize the low noise and high speed digital output of read out integrated circuits for ultraviolet imaging sensors.

  12. 77 FR 60721 - Certain Semiconductor Integrated Circuit Devices and Products Containing Same; Notice of...

    Science.gov (United States)

    2012-10-04

    ... From the Federal Register Online via the Government Publishing Office INTERNATIONAL TRADE COMMISSION Certain Semiconductor Integrated Circuit Devices and Products Containing Same; Notice of... importation, and the sale within the United States after importation of certain semiconductor...

  13. Development of pixel readout integrated circuits for extreme rate and radiation

    CERN Document Server

    Garcia-Sciveres, M; CERN. Geneva. The LHC experiments Committee; LHCC

    2013-01-01

    Letter of Intent for RD Collaboration Proposal focused on development of a next generation pixel readout integrated circuits needed for high luminosity LHC detector upgrades. Brings together ATLAS and CMS pixel chip design communities.

  14. Light collection from scattering media in a silicon photonics integrated circuit

    OpenAIRE

    2011-01-01

    We present a silicon photonics integrated circuit to efficiently couple scattered light into a single mode waveguide. By modulating the phase of N light-capturing elements, the collection efficiency can be increased by a factor N.

  15. Waveguide Phase Modulator for Integrated Planar Lightwave Circuits in KTP Project

    Data.gov (United States)

    National Aeronautics and Space Administration — This SBIR Phase II effort proposes the development and integration of a Planar Lightwave Circuit (PLC) into an all fiber-based seed laser system used in high...

  16. 77 FR 40381 - Certain Digital Televisions Containing Integrated Circuit Devices and Components Thereof, Notice...

    Science.gov (United States)

    2012-07-09

    ... From the Federal Register Online via the Government Publishing Office INTERNATIONAL TRADE COMMISSION Certain Digital Televisions Containing Integrated Circuit Devices and Components Thereof, Notice of Commission Determination Not To Review an Initial Determination Terminating the Investigation as...

  17. An Integrated-Circuit Temperature Sensor for Calorimetry and Differential Temperature Measurement.

    Science.gov (United States)

    Muyskens, Mark A.

    1997-01-01

    Describes the application of an integrated-circuit (IC) chip which provides an easy-to-use, inexpensive, rugged, computer-interfaceable temperature sensor for calorimetry and differential temperature measurement. Discusses its design and advantages. (JRH)

  18. High-speed Integrated Circuits for electrical/Optical Interfaces

    DEFF Research Database (Denmark)

    Jespersen, Christoffer Felix

    2008-01-01

    This thesis is a continuation of the effort to increase the bandwidth of communicationnetworks. The thesis presents the results of the design of several high-speed electrical ircuits for an electrical/optical interface. These circuits have been a contribution to the ESTA project in collaboration ...... as examples. Finally, it is concluded that the VIP-2 process is suitable technology for creating circuits for 100 Gb/s communication networks. Keywords: Indium Phosphide (InP), DHBT, VCO, Colpitt, Static Divider, CDR, PLL, Transceiver...... represents the avant-garde of InP technology, with ft and fmax well above 300 GHz. Principles of high speed design are presented and described as a useful background before proceeding to circuits. A static divider is used as an example to illustrate many of the design principles. Theory and fundamentals...

  19. RNA signal amplifier circuit with integrated fluorescence output.

    Science.gov (United States)

    Akter, Farhima; Yokobayashi, Yohei

    2015-05-15

    We designed an in vitro signal amplification circuit that takes a short RNA input that catalytically activates the Spinach RNA aptamer to produce a fluorescent output. The circuit consists of three RNA strands: an internally blocked Spinach aptamer, a fuel strand, and an input strand (catalyst), as well as the Spinach aptamer ligand 3,5-difluoro-4-hydroxylbenzylidene imidazolinone (DFHBI). The input strand initially displaces the internal inhibitory strand to activate the fluorescent aptamer while exposing a toehold to which the fuel strand can bind to further displace and recycle the input strand. Under a favorable condition, one input strand was able to activate up to five molecules of the internally blocked Spinach aptamer in 185 min at 30 °C. The simple RNA circuit reported here serves as a model for catalytic activation of arbitrary RNA effectors by chemical triggers.

  20. A Powerful Optimization Tool for Analog Integrated Circuits Design

    Directory of Open Access Journals (Sweden)

    M. Kubar

    2013-09-01

    Full Text Available This paper presents a new optimization tool for analog circuit design. Proposed tool is based on the robust version of the differential evolution optimization method. Corners of technology, temperature, voltage and current supplies are taken into account during the optimization. That ensures robust resulting circuits. Those circuits usually do not need any schematic change and are ready for the layout.. The newly developed tool is implemented directly to the Cadence design environment to achieve very short setup time of the optimization task. The design automation procedure was enhanced by optimization watchdog feature. It was created to control optimization progress and moreover to reduce the search space to produce better design in shorter time. The optimization algorithm presented in this paper was successfully tested on several design examples.

  1. Experimental Demonstration of 7 Tb/s Switching Using Novel Silicon Photonic Integrated Circuit

    DEFF Research Database (Denmark)

    Ding, Yunhong; Kamchevska, Valerija; Dalgaard, Kjeld

    2016-01-01

    We demonstrate BER performance <10^-9 for a 1 Tb/s/core transmission over 7-core fiber and SDM switching using a novel silicon photonic integrated circuit composed of a 7x7 fiber switch and low loss SDM couplers.......We demonstrate BER performance Tb/s/core transmission over 7-core fiber and SDM switching using a novel silicon photonic integrated circuit composed of a 7x7 fiber switch and low loss SDM couplers....

  2. Radiation hardening of low-noise readout integrated circuit for infrared focal plane arrays

    Science.gov (United States)

    Lee, Min Su; Lee, Yong Soo; Lee, Hee Chul

    2010-04-01

    A radiation-resistant readout integrated circuit for focal plane arrays was studied to improve the reliability of infrared image systems operating in a radioactive environment, such as in space or in the surroundings of a nuclear reactor. First, as radiation-hardened NMOSFET structure, which includes a layout modification technique, was proposed. The readout integrated circuit for infrared focal plane arrays was then designed on basis of the proposed NMOSFET layout. Commercial 0.35 um process technology was used to fabricate the proposed unit NMOSFET and the designed readout integrated circuit which is based on the proposed NMOSFET. The measured electrical characteristics of the fabricated unit NMOSFET and readout integrated circuit are in good agreement with the simulated results. For verification of the radiation tolerance, the fabricated chip was exposed to 1 Mrad (Si) of gamma radiation, which is high enough to guarantee reliable usage in space or in a very harsh radiation environment. While exposed to gamma radiation, the fabricated chip was connected to a power supply (3.3 V) for testing under the worst conditions. After being exposed to 1 Mrad of gamma radiation, the unit NMOSFET showed only a slight increment of a few picoamperes in the leakage current, and the designed readout integrated circuit showed little change at an output voltage of less than 10% of a proper output voltage. The changes in the characteristics of the unit NMOSFET and the designed readout infrared integrated circuit are at an allowable level in relation to process variation.

  3. CMOS analog integrated circuits high-speed and power-efficient design

    CERN Document Server

    Ndjountche, Tertulien

    2011-01-01

    High-speed, power-efficient analog integrated circuits can be used as standalone devices or to interface modern digital signal processors and micro-controllers in various applications, including multimedia, communication, instrumentation, and control systems. New architectures and low device geometry of complementary metaloxidesemiconductor (CMOS) technologies have accelerated the movement toward system on a chip design, which merges analog circuits with digital, and radio-frequency components. CMOS: Analog Integrated Circuits: High-Speed and Power-Efficient Design describes the important tren

  4. V-band low-noise integrated circuit receiver. [for space communication systems

    Science.gov (United States)

    Chang, K.; Louie, K.; Grote, A. J.; Tahim, R. S.; Mlinar, M. J.; Hayashibara, G. M.; Sun, C.

    1983-01-01

    A compact low-noise V-band integrated circuit receiver has been developed for space communication systems. The receiver accepts an RF input of 60-63 GHz and generates an IF output of 3-6 GHz. A Gunn oscillator at 57 GHz is phaselocked to a low-frequency reference source to achieve high stability and low FM noise. The receiver has an overall single sideband noise figure of less than 10.5 dB and an RF to IF gain of 40 dB over a 3-GHz RF bandwidth. All RF circuits are fabricated in integrated circuits on a Duroid substrate.

  5. Impedance Matching Antenna-Integrated High-Efficiency Energy Harvesting Circuit.

    Science.gov (United States)

    Shinki, Yuharu; Shibata, Kyohei; Mansour, Mohamed; Kanaya, Haruichi

    2017-08-01

    This paper describes the design of a high-efficiency energy harvesting circuit with an integrated antenna. The circuit is composed of series resonance and boost rectifier circuits for converting radio frequency power into boosted direct current (DC) voltage. The measured output DC voltage is 5.67 V for an input of 100 mV at 900 MHz. Antenna input impedance matching is optimized for greater efficiency and miniaturization. The measured efficiency of this antenna-integrated energy harvester is 60% for -4.85 dBm input power and a load resistance equal to 20 kΩ at 905 MHz.

  6. Integrated Design Validation: Combining Simulation and Formal Verification for Digital Integrated Circuits

    Directory of Open Access Journals (Sweden)

    Lun Li

    2006-04-01

    Full Text Available The correct design of complex hardware continues to challenge engineers. Bugs in a design that are not uncovered in early design stages can be extremely expensive. Simulation is a predominantly used tool to validate a design in industry. Formal verification overcomes the weakness of exhaustive simulation by applying mathematical methodologies to validate a design. The work described here focuses upon a technique that integrates the best characteristics of both simulation and formal verification methods to provide an effective design validation tool, referred as Integrated Design Validation (IDV. The novelty in this approach consists of three components, circuit complexity analysis, partitioning based on design hierarchy, and coverage analysis. The circuit complexity analyzer and partitioning decompose a large design into sub-components and feed sub-components to different verification and/or simulation tools based upon known existing strengths of modern verification and simulation tools. The coverage analysis unit computes the coverage of design validation and improves the coverage by further partitioning. Various simulation and verification tools comprising IDV are evaluated and an example is used to illustrate the overall validation process. The overall process successfully validates the example to a high coverage rate within a short time. The experimental result shows that our approach is a very promising design validation method.

  7. A proposed hardness assurance test methodology for bipolar linear circuits and devices in a space ionizing radiation environment

    Energy Technology Data Exchange (ETDEWEB)

    Pease, R.L. [RLP Research, Albuquerque, NM (United States); Brown, D.B. [Naval Research Lab., Washington, DC (United States); Cohn, L. [Defense Special Weapons Agency, Alexandria, VA (United States)] [and others

    1997-04-01

    A hardness assurance test approach has been developed for bipolar linear circuits and devices in space. It consists of a screen for dose rate sensitivity and a characterization test method to develop the conditions for a lot acceptance test at high dose rate.

  8. Wideband LTE power amplifier with integrated novel analog pre-distorter linearizer for mobile wireless communications.

    Science.gov (United States)

    Uthirajoo, Eswaran; Ramiah, Harikrishnan; Kanesan, Jeevan; Reza, Ahmed Wasif

    2014-01-01

    For the first time, a new circuit to extend the linear operation bandwidth of a LTE (Long Term Evolution) power amplifier, while delivering a high efficiency is implemented in less than 1 mm2 chip area. The 950 µm × 900 µm monolithic microwave integrated circuit (MMIC) power amplifier (PA) is fabricated in a 2 µm InGaP/GaAs process. An on-chip analog pre-distorter (APD) is designed to improve the linearity of the PA, up to 20 MHz channel bandwidth. Intended for 1.95 GHz Band 1 LTE application, the PA satisfies adjacent channel leakage ratio (ACLR) and error vector magnitude (EVM) specifications for a wide LTE channel bandwidth of 20 MHz at a linear output power of 28 dBm with corresponding power added efficiency (PAE) of 52.3%. With a respective input and output return loss of 30 dB and 14 dB, the PA's power gain is measured to be 32.5 dB while exhibiting an unconditional stability characteristic from DC up to 5 GHz. The proposed APD technique serves to be a good solution to improve linearity of a PA without sacrificing other critical performance metrics.

  9. Wideband LTE power amplifier with integrated novel analog pre-distorter linearizer for mobile wireless communications.

    Directory of Open Access Journals (Sweden)

    Eswaran Uthirajoo

    Full Text Available For the first time, a new circuit to extend the linear operation bandwidth of a LTE (Long Term Evolution power amplifier, while delivering a high efficiency is implemented in less than 1 mm2 chip area. The 950 µm × 900 µm monolithic microwave integrated circuit (MMIC power amplifier (PA is fabricated in a 2 µm InGaP/GaAs process. An on-chip analog pre-distorter (APD is designed to improve the linearity of the PA, up to 20 MHz channel bandwidth. Intended for 1.95 GHz Band 1 LTE application, the PA satisfies adjacent channel leakage ratio (ACLR and error vector magnitude (EVM specifications for a wide LTE channel bandwidth of 20 MHz at a linear output power of 28 dBm with corresponding power added efficiency (PAE of 52.3%. With a respective input and output return loss of 30 dB and 14 dB, the PA's power gain is measured to be 32.5 dB while exhibiting an unconditional stability characteristic from DC up to 5 GHz. The proposed APD technique serves to be a good solution to improve linearity of a PA without sacrificing other critical performance metrics.

  10. Integrated-Circuit Controller For Brushless dc Motor

    Science.gov (United States)

    Le, Dong Tuan

    1994-01-01

    Generic circuit performs commutation-logic and power-switching functions for control of brushless dc motor. Controller includes commutation-logic and associated control circuitry, power supply, and inverters containing power transistors. Major advantages of controller are size, weight, and power consumption can be made less than other brushless-dc-motor controllers.

  11. High-voltage integrated transmitting circuit with differential driving for CMUTs

    DEFF Research Database (Denmark)

    Llimos Muntal, Pere; Larsen, Dennis Øland; Færch, Kjartan Ullitz;

    2016-01-01

    In this paper, a high-voltage integrated differential transmitting circuit for capacitive micromachined ultrasonic transducers (CMUTs) used in portable ultrasound scanners is presented. Due to its application, area and power consumption are critical and need to be minimized. The circuitry...... is designed and implemented in AMS 0.35 μ m high-voltage process. Measurements are performed on the fabricated integrated circuit in order to assess its performance. The transmitting circuit consists of a low-voltage control logic, pulse-triggered level shifters and a differential output stage that generates...... conditions is 0.936 mW including the load. The integrated circuits measured prove to be consistent and robust to local process variations by measurements....

  12. Integral Battery Power Limiting Circuit for Intrinsically Safe Applications

    Science.gov (United States)

    Burns, Bradley M.; Blalock, Norman N.

    2010-01-01

    A circuit topology has been designed to guarantee the output of intrinsically safe power for the operation of electrical devices in a hazardous environment. This design uses a MOSFET (metal oxide semiconductor field-effect transistor) as a switch to connect and disconnect power to a load. A test current is provided through a separate path to the load for monitoring by a comparator against a preset threshold level. The circuit is configured so that the test current will detect a fault in the load and open the switch before the main current can respond. The main current passes through the switch and then an inductor. When a fault occurs in the load, the current through the inductor cannot change immediately, but the voltage drops immediately to safe levels. The comparator detects this drop and opens the switch before the current in the inductor has a chance to respond. This circuit protects both the current and voltage from exceeding safe levels. Typically, this type of protection is accomplished by a fuse or a circuit breaker, but in order for a fuse or a circuit breaker to blow or trip, the current must exceed the safe levels momentarily, which may be just enough time to ignite anything in a hazardous environment. To prevent this from happening, a fuse is typically current-limited by the addition of the resistor to keep the current within safe levels while the fuse reacts. The use of a resistor is acceptable for non-battery applications where the wasted energy and voltage drop across the resistor can be tolerated. The use of the switch and inductor minimizes the wasted energy. For example, a circuit runs from a 3.6-V battery that must be current-limited to 200 mA. If the circuit normally draws 10 mA, then an 18-ohm resistor would drop 180 mV during normal operation, while a typical switch (0.02 ohm) and inductor (0.97 ohm) would only drop 9.9 mV. From a power standpoint, the current-limiting resistor protection circuit wastes about 18 times more power than the

  13. A linear coherent integrated receiver based on a broadband optical phase-locked loop

    Science.gov (United States)

    Ramaswamy, Anand

    Optical Phase-Locked Loops (OPLL) have diverse applications in future communication systems. They can be used in high sensitivity homodyne phase-shift keying receivers for phase noise reduction, provided sufficient loop bandwidth is maintained. Alternative phase-locked loop applications include coherent synchronization of laser arrays and frequency synthesis by offset locking. In this work, a broadband OPLL based coherent receiver is used for linear phase demodulation. Phase modulated (PM) analog optical links have the potential to outperform conventional direct detection links. However, their progress has been stymied by the lack of a linear phase demodulator. We describe how feedback can be used to suppress non-linearities arising from the phase demodulation process. The receiver concept is demonstrated at low frequencies and is found to improve the Spurious Free Dynamic Range (SFDR) of an experimental analog link by over 20dB. In order to extend the operation of the receiver to microwave frequencies, latencies arising from physical delays in the feedback path need to be dramatically reduced. To facilitate this, monolithic and hybrid versions of the receiver based on compact integration of InP photonic integrated circuits (PIC) with InP and SiGe electronic integrated circuits (EIC) have been developed at UCSB. In this work, we develop novel measurement techniques to characterize the linearity of the individual components of the PIC, namely, the semiconductor photodiodes and optical phase modulators. We then demonstrate the operation of the receiver in a high power analog link. The OPLL based receiver has a bandwidth of 1.5GHz. The link gain and shot-noise limited SFDR at 300MHz are -2dB and 125dB-Hz2/3, respectively. Further, optical sampling downconversion is demonstrated as a viable technique to increase the operating frequency of the receiver beyond the baseband range.

  14. Nanoscale on-chip all-optical logic parity checker in integrated plasmonic circuits in optical communication range

    Science.gov (United States)

    Wang, Feifan; Gong, Zibo; Hu, Xiaoyong; Yang, Xiaoyu; Yang, Hong; Gong, Qihuang

    2016-01-01

    The nanoscale chip-integrated all-optical logic parity checker is an essential core component for optical computing systems and ultrahigh-speed ultrawide-band information processing chips. Unfortunately, little experimental progress has been made in development of these devices to date because of material bottleneck limitations and a lack of effective realization mechanisms. Here, we report a simple and efficient strategy for direct realization of nanoscale chip-integrated all-optical logic parity checkers in integrated plasmonic circuits in the optical communication range. The proposed parity checker consists of two-level cascaded exclusive-OR (XOR) logic gates that are realized based on the linear interference of surface plasmon polaritons propagating in the plasmonic waveguides. The parity of the number of logic 1s in the incident four-bit logic signals is determined, and the output signal is given the logic state 0 for even parity (and 1 for odd parity). Compared with previous reports, the overall device feature size is reduced by more than two orders of magnitude, while ultralow energy consumption is maintained. This work raises the possibility of realization of large-scale integrated information processing chips based on integrated plasmonic circuits, and also provides a way to overcome the intrinsic limitations of serious surface plasmon polariton losses for on-chip integration applications. PMID:27073154

  15. A Multi-Gigahertz Analog Transient Recorder Integrated Circuit

    CERN Document Server

    Kleinfelder, Stuart A

    2015-01-01

    A monolithic multi-channel analog transient recorder, implemented using switched capacitor sample-and-hold circuits and a high-speed analogically-adjustable delay-line-based write clock, has been designed, fabricated and tested. The 2.1 by 6.9 mm layout, in 1.2 micron CMOS, includes over 31,000 transistors and 2048 double polysilicon capacitors. The circuit contains four parallel channels, each with a 512 deep switched-capacitor sample-and-hold system. A 512 deep edge sensitive tapped active delay line uses look-ahead and 16 way interleaving to develop the 512 sample and hold clocks, each as little as 3.2 ns wide and 200 ps apart. Measurements of the device have demonstrated 5 GHz maximum sample rate, at least 350 MHz bandwidth, an extrapolated rms aperture uncertainty per sample of 0.7 ps, and a signal to rms noise ratio of 2000:1.

  16. Signal Digitizer and Cross-Correlation Application Specific Integrated Circuit

    Science.gov (United States)

    Baranauskas, Dalius (Inventor); Baranauskas, Gytis (Inventor); Zelenin, Denis (Inventor); Kangaslahti, Pekka (Inventor); Tanner, Alan B. (Inventor); Lim, Boon H. (Inventor)

    2017-01-01

    According to one embodiment, a cross-correlator comprises a plurality of analog front ends (AFEs), a cross-correlation circuit and a data serializer. Each of the AFEs comprises a variable gain amplifier (VGA) and a corresponding analog-to-digital converter (ADC) in which the VGA receives and modifies a unique analog signal associates with a measured analog radio frequency (RF) signal and the ADC produces digital data associated with the modified analog signal. Communicatively coupled to the AFEs, the cross-correlation circuit performs a cross-correlation operation on the digital data produced from different measured analog RF signals. The data serializer is communicatively coupled to the summing and cross-correlating matrix and continuously outputs a prescribed amount of the correlated digital data.

  17. Linear energy-preserving integrators for Poisson systems

    OpenAIRE

    Cohen, David; Hairer, Ernst

    2011-01-01

    For Hamiltonian systems with non-canonical structure matrix a new class of numerical integrators is proposed. The methods exactly preserve energy, are invariant with respect to linear transformations, and have arbitrarily high order. Those of optimal order also preserve quadratic Casimir functions. The discussion of the order is based on an interpretation as partitioned Runge-Kutta method with infinitely many stages.

  18. Asymmetric Circuit Models and Parameter Measurement for PermanentMagnet Linear Synchronous Motor Considering Inductance Harmonics and Saliency

    Science.gov (United States)

    Yamamoto, Shu; Yamaguchi, Tomonobu; Hirahara, Hideaki; Ara, Takahiro

    This paper presents asymmetric circuit models and an inductance parameter measurement method for Permanent Magnet Linear Synchronous Motors (PMLSMs). The reason why the tested PMLSM with surface permanent magnet structure exhibits both asymmetry and salient pole natures is investigated. Asymmetric circuit models considering the saliency and inductance harmonic effects are discussed for PMLSM fed by three-phase three-wire power source systems. All fundamental and harmonic inductance parameters are easily determined by a standstill test using a single-phase commercial source. Experimental and simulation results on a single-sided PMLSM with a 3-phase, 4-pole and 14-slot mover demonstrate the validity of the proposed method.

  19. Stochastic Simulation of Integrated Circuits with Nonlinear Black-Box Components via Augmented Deterministic Equivalents

    Directory of Open Access Journals (Sweden)

    MANFREDI, P.

    2014-11-01

    Full Text Available This paper extends recent literature results concerning the statistical simulation of circuits affected by random electrical parameters by means of the polynomial chaos framework. With respect to previous implementations, based on the generation and simulation of augmented and deterministic circuit equivalents, the modeling is extended to generic and ?black-box? multi-terminal nonlinear subcircuits describing complex devices, like those found in integrated circuits. Moreover, based on recently-published works in this field, a more effective approach to generate the deterministic circuit equivalents is implemented, thus yielding more compact and efficient models for nonlinear components. The approach is fully compatible with commercial (e.g., SPICE-type circuit simulators and is thoroughly validated through the statistical analysis of a realistic interconnect structure with a 16-bit memory chip. The accuracy and the comparison against previous approaches are also carefully established.

  20. Split-cross-bridge resistor for testing for proper fabrication of integrated circuits

    Science.gov (United States)

    Buehler, M. G. (Inventor)

    1985-01-01

    An electrical testing structure and method is described whereby a test structure is fabricated on a large scale integrated circuit wafer along with the circuit components and has a van der Pauw cross resistor in conjunction with a bridge resistor and a split bridge resistor, the latter having two channels each a line width wide, corresponding to the line width of the wafer circuit components, and with the two channels separated by a space equal to the line spacing of the wafer circuit components. The testing structure has associated voltage and current contact pads arranged in a two by four array for conveniently passing currents through the test structure and measuring voltages at appropriate points to calculate the sheet resistance, line width, line spacing, and line pitch of the circuit components on the wafer electrically.

  1. Technological and Physical Compatibilities in Hybrid Integration of Laser and Monolithic Integration of Waveguide, Photodetector and CMOS Circuits on Silicon

    NARCIS (Netherlands)

    Zhou, M.J.; Ikkink, T.; Chalmers, J.; Kranenburg, H. van; Albers, H.; Holleman, J.; Lambeck, P.V.; Joppe, J.L.; Bekman, H.H.P.T.; Krijger, A.J.T. de

    1994-01-01

    In this paper, technological and physical compatibilities in hybrid integration of AlInGaP laser and monolithic integration of ZnO monomode waveguide, pin-photodetector, CMOS circuits for laser power control and signal amplification on silicon substrate are studied. Prospective problems and their po

  2. Technological and physical compatibilities in hybrid integration of laser and monolithic integration of waveguide, photodetector and CMOS circuits on silicon

    NARCIS (Netherlands)

    Zhou, Ming-Jiang; Ikkink, Ton; Chalmers, John; Kranenburg, van Herma; Albers, Hans; Holleman, Jisk; Lambeck, Paul; Joppe, Jan Leendert; Bekman, Herman; Krijger, de Ton; Lambeck, P.V.

    1994-01-01

    In this paper, technological and physical compatibilities in hybrid integration of AlInGaP laser and monolithic integration of ZnO monomode waveguide, pin-photodetector, CMOS circuits for laser power control and signal amplification on silicon substrate are studied. Prospective problems and their po

  3. On linear degeneracy of integrable quasilinear systems in higher dimensions

    CERN Document Server

    Ferapontov, E V; Klein, C

    2010-01-01

    We investigate $(d+1)$-dimensional quasilinear systems which are integrable by the method of hydrodynamic reductions. In the case $d\\geq 3$ we formulate a conjecture that any such system with an irreducible dispersion relation must be linearly degenerate. We prove this conjecture in the 2-component case, providing a complete classification of multi-dimensional integrable systems in question. In particular, our results imply the non-existence of 2-component integrable systems of hydrodynamic type for $d\\geq 6$. In the second half of the paper we discuss a numerical and analytical evidence for the impossibility of the breakdown of smooth initial data for linearly degenerate systems in 2+1 dimensions.

  4. III-V/silicon photonic integrated circuits for communication and sensing applications

    Science.gov (United States)

    Roelkens, Gunther; Keyvaninia, Shahram; Stankovic, Stevan; De Koninck, Yannick; Tassaert, Martijn; Mechet, Pauline; Spuesens, Thijs; Hattasan, N.; Gassenq, A.; Muneeb, M.; Ryckeboer, E.; Ghosh, Samir; Van Thourhout, D.; Baets, R.

    2013-03-01

    In this paper we review our work in the field of heterogeneous integration of III-V semiconductors and non-reciprocal optical materials on a silicon waveguide circuit. We elaborate on the heterogeneous integration technology based on adhesive DVS-BCB die-to-wafer bonding and discuss several device demonstrations. The presented devices are envisioned to be used in photonic integrated circuits for communication applications (telecommunications and optical interconnects) as well as in spectroscopic sensing systems operating in the short-wave infrared wavelength range.

  5. The Scalable Integration of long-lived quantum memories into a photonic circuit

    CERN Document Server

    Mouradian, Sara L; Poitras, Carl B; Li, Luozhou; Goldstein, Jordan; Chen, Edward H; Cardenas, Jaime; Markham, Matthew L; Twitchen, Daniel J; Lipson, Michal; Englund, Dirk

    2014-01-01

    We demonstrate a photonic circuit with integrated long-lived quantum memories. Pre-selected quantum nodes - diamond micro-waveguides containing single, stable, and negatively charged nitrogen vacancy centers - are deterministically integrated into low-loss silicon nitride waveguides. Each quantum memory node efficiently couples into the single-mode waveguide (> 1 Mcps collected into the waveguide) and exhibits long spin coherence times of up to 120 {\\mu}s. Our system facilitates the assembly of multiple quantum memories into a photonic integrated circuit with near unity yield, paving the way towards scalable quantum information processing.

  6. Plasmonic and electronic device-based integrated circuits and their characteristics

    Science.gov (United States)

    Sakai, H.; Okahisa, S.; Nakayama, Y.; Nakayama, K.; Fukuhara, M.; Kimura, Y.; Ishii, Y.; Fukuda, M.

    2016-11-01

    This paper presents a plasmonic circuit that has been monolithically integrated with electronic devices on a silicon substrate and then discusses the concept behind this circuit. To form the proposed circuit, two plasmonic waveguides and a detector are integrated with metal-oxide-semiconductor field-effect transistors (MOSFETs) on the substrate. In the circuit, intensity signals or coherent plasmonic signals are generated by coherent light at an operating wavelength at which silicon is transparent, and these signals propagate along the waveguides before they are converted into electrical signals by the detector. These electrical intensity and coherent signals then drive the MOSFETs during both DC and AC operation. The measured performances of the devices indicate that surface plasmon polaritons propagate on the metal surface at the speed of light and drive the electronic devices without any absorption in the silicon.

  7. High-voltage integrated transmitting circuit with differential driving for CMUTs

    DEFF Research Database (Denmark)

    Llimos Muntal, Pere; Larsen, Dennis Øland; Færch, Kjartan Ullitz

    2016-01-01

    In this paper, a high-voltage integrated differential transmitting circuit for capacitive micromachined ultrasonic transducers (CMUTs) used in portable ultrasound scanners is presented. Due to its application, area and power consumption are critical and need to be minimized. The circuitry...... is designed and implemented in AMS 0.35 μ m high-voltage process. Measurements are performed on the fabricated integrated circuit in order to assess its performance. The transmitting circuit consists of a low-voltage control logic, pulse-triggered level shifters and a differential output stage that generates...... pulses at differential voltage levels of 60, 80 and 100 V, a frequency up to 5 MHz and a measured driving strength of 2.03 V/ns with the CMUT electrical model connected. The total on-chip area occupied by the transmitting circuit is 0.18 mm2 and the power consumption at the ultrasound scanner operation...

  8. Rapid mapping of digital integrated circuit logic gates via multi-spectral backside imaging

    CERN Document Server

    Adato, Ronen; Zangeneh, Mahmoud; Zhou, Boyou; Joshi, Ajay; Goldberg, Bennett; Unlu, M Selim

    2016-01-01

    Modern semiconductor integrated circuits are increasingly fabricated at untrusted third party foundries. There now exist myriad security threats of malicious tampering at the hardware level and hence a clear and pressing need for new tools that enable rapid, robust and low-cost validation of circuit layouts. Optical backside imaging offers an attractive platform, but its limited resolution and throughput cannot cope with the nanoscale sizes of modern circuitry and the need to image over a large area. We propose and demonstrate a multi-spectral imaging approach to overcome these obstacles by identifying key circuit elements on the basis of their spectral response. This obviates the need to directly image the nanoscale components that define them, thereby relaxing resolution and spatial sampling requirements by 1 and 2 - 4 orders of magnitude respectively. Our results directly address critical security needs in the integrated circuit supply chain and highlight the potential of spectroscopic techniques to addres...

  9. 76 FR 14688 - In the Matter of Certain Large Scale Integrated Circuit Semiconductor Chips and Products...

    Science.gov (United States)

    2011-03-17

    ... COMMISSION In the Matter of Certain Large Scale Integrated Circuit Semiconductor Chips and Products... semiconductor chips and products containing same by reason of infringement of certain claims of U.S. Patent Nos... Semiconductor Xiqing Integrated Semiconductor Manufacturing Site (``Freescale Xiqing'') of China;...

  10. Heat management in integrated circuits on-chip and system-level monitoring and cooling

    CERN Document Server

    Ogrenci-Memik, Seda

    2016-01-01

    This essential overview covers the subject of thermal monitoring and management in integrated circuits. Specifically, it focuses on devices and materials that are intimately integrated on-chip (as opposed to in-package or on-board) for the purposes of thermal monitoring and thermal management.

  11. A numerical integration-based yield estimation method for integrated circuits

    Institute of Scientific and Technical Information of China (English)

    Liang Tao; Jia Xinzhang

    2011-01-01

    A novel integration-based yield estimation method is developed for yield optimization of integrated circuits. This method tries to integrate the joint probability density function on the acceptability region directly.To achieve this goal, the simulated performance data of unknown distribution should be converted to follow a multivariate normal distribution by using Box-Cox transformation (BCT). In order to reduce the estimation variances of the model parameters of the density function, orthogonal array-based modified Latin hypercube sampling (OA-MLHS) is presented to generate samples in the disturbance space during simulations. The principle of variance reduction of model parameters estimation through OA-MLHS together with BCT is also discussed. Two yield estimation examples, a fourth-order OTA-C filter and a three-dimensional (3D) quadratic function are used for comparison of our method with Monte Carlo based methods including Latin hypercube sampling and importance sampling under several combinations of sample sizes and yield values. Extensive simulations show that our method is superior to other methods with respect to accuracy and efficiency under all of the given cases. Therefore, our method is more suitable for parametric yield optimization.

  12. Cascaded all-optical operations in a hybrid integrated 80-Gb/s logic circuit.

    Science.gov (United States)

    LeGrange, J D; Dinu, M; Sochor, T; Bollond, P; Kasper, A; Cabot, S; Johnson, G S; Kang, I; Grant, A; Kay, J; Jaques, J

    2014-06-01

    We demonstrate logic functionalities in a high-speed all-optical logic circuit based on differential Mach-Zehnder interferometers with semiconductor optical amplifiers as the nonlinear optical elements. The circuit, implemented by hybrid integration of the semiconductor optical amplifiers on a planar lightwave circuit platform fabricated in silica glass, can be flexibly configured to realize a variety of Boolean logic gates. We present both simulations and experimental demonstrations of cascaded all-optical operations for 80-Gb/s on-off keyed data.

  13. Duplication-based Concurrent Detection of Hardware Trojans in Integrated Circuits

    OpenAIRE

    Palanichamy, Manikandan; Ba, Papa-Sidy; Dupuis, Sophie; Flottes, Marie-Lise; Di Natale, Giorgio; Rouzeyre, Bruno

    2016-01-01

    International audience; Outsourcing the fabrication process to low-cost locations has become a major trend in the Integrated Circuits (ICs) industry in the last decade. This trend raises the question about untrusted foundries in which an adversary can tamper with the circuit by inserting a malicious behavior in the ICs, referred to as Hardware Trojans (HTs). The serious impact of HTs in security applications and global economy brings extreme importance to detection as well as prevention techn...

  14. Flexible and low-voltage integrated circuits constructed from high-performance nanocrystal transistors.

    Science.gov (United States)

    Kim, David K; Lai, Yuming; Diroll, Benjamin T; Murray, Christopher B; Kagan, Cherie R

    2012-01-01

    Colloidal semiconductor nanocrystals are emerging as a new class of solution-processable materials for low-cost, flexible, thin-film electronics. Although these colloidal inks have been shown to form single, thin-film field-effect transistors with impressive characteristics, the use of multiple high-performance nanocrystal field-effect transistors in large-area integrated circuits has not been shown. This is needed to understand and demonstrate the applicability of these discrete nanocrystal field-effect transistors for advanced electronic technologies. Here we report solution-deposited nanocrystal integrated circuits, showing nanocrystal integrated circuit inverters, amplifiers and ring oscillators, constructed from high-performance, low-voltage, low-hysteresis CdSe nanocrystal field-effect transistors with electron mobilities of up to 22 cm(2) V(-1) s(-1), current modulation >10(6) and subthreshold swing of 0.28 V dec(-1). We fabricated the nanocrystal field-effect transistors and nanocrystal integrated circuits from colloidal inks on flexible plastic substrates and scaled the devices to operate at low voltages. We demonstrate that colloidal nanocrystal field-effect transistors can be used as building blocks to construct complex integrated circuits, promising a viable material for low-cost, flexible, large-area electronics.

  15. Integrated electrofluidic circuits: pressure sensing with analog and digital operation functionalities for microfluidics.

    Science.gov (United States)

    Wu, Chueh-Yu; Lu, Jau-Ching; Liu, Man-Chi; Tung, Yi-Chung

    2012-10-21

    Microfluidic technology plays an essential role in various lab on a chip devices due to its desired advantages. An automated microfluidic system integrated with actuators and sensors can further achieve better controllability. A number of microfluidic actuation schemes have been well developed. In contrast, most of the existing sensing methods still heavily rely on optical observations and external transducers, which have drawbacks including: costly instrumentation, professional operation, tedious interfacing, and difficulties of scaling up and further signal processing. This paper reports the concept of electrofluidic circuits - electrical circuits which are constructed using ionic liquid (IL)-filled fluidic channels. The developed electrofluidic circuits can be fabricated using a well-developed multi-layer soft lithography (MSL) process with polydimethylsiloxane (PDMS) microfluidic channels. Electrofluidic circuits allow seamless integration of pressure sensors with analog and digital operation functions into microfluidic systems and provide electrical readouts for further signal processing. In the experiments, the analog operation device is constructed based on electrofluidic Wheatstone bridge circuits with electrical outputs of the addition and subtraction results of the applied pressures. The digital operation (AND, OR, and XOR) devices are constructed using the electrofluidic pressure controlled switches, and output electrical signals of digital operations of the applied pressures. The experimental results demonstrate the designed functions for analog and digital operations of applied pressures are successfully achieved using the developed electrofluidic circuits, making them promising to develop integrated microfluidic systems with capabilities of precise pressure monitoring and further feedback control for advanced lab on a chip applications.

  16. Short circuit analysis of distribution system with integration of DG

    DEFF Research Database (Denmark)

    Su, Chi; Liu, Zhou; Chen, Zhe

    2014-01-01

    Integration of distributed generation (DG) such as wind turbines into distribution system is increasing all around the world, because of the flexible and environmentally friendly characteristics. However, DG integration may change the pattern of the fault currents in the distribution system...... as well. The results in this paper are based on mathematical analysis and simulation study in DIgSILENT PowerFactory....

  17. Linear Volterra Integral Equations as the Limit of Discrete Systems

    Institute of Scientific and Technical Information of China (English)

    M. Federson; R.Bianconi; L.Barbanti

    2004-01-01

    We consider the multidimensional abstract linear integral equation of Volterra typex (t)+(*)∫Rt a (s)x (s)ds =f (t),t∈R,as the limit of discrete Stieltjes-type systems and we prove results on the existence of continuous solutions.The functions x,a and f are Banach space-valued de .ned on a compact interval R of R n ,R t is a subinterval of R depending on t∈R and (*)∫denotes either the Bochner-Lebesgue integral or the Henstock integral.The results presented here generalize those in [1]and are in the spirit of [3].As a consequence of our approach,it is possible to study the properties of (1)by transferring the properties of the discrete systems.The Henstock integral setting enables us to consider highly oscillating functions.

  18. Very Large Scale Integrated Circuits for Military Systems.

    Science.gov (United States)

    1981-01-01

    26. Abraham Peled and Bede Liu, "A New Hardware Realization of Digital Filters," IEEE Trans. Acoust. Speech Signal Proc- essing, ASSP-22, pp. 456-462... Peled and Liu for the !!R filter, or any linear function of a orour of variables (Ref. 26). Linear operations on sampled data can be factored in a...sum of the MPY cycle and twice the ADD cycle before the loop stabilizes. In general, embodiments of the Peled and Liu look-up method appear to simplify

  19. Precision Instrumentation Amplifiers and Read-Out Integrated Circuits

    CERN Document Server

    Wu, Rong; Makinwa, Kofi A A

    2013-01-01

    This book presents innovative solutions in the design of precision instrumentation amplifier and read-out ICs, which can be used to boost millivolt-level signals transmitted by modern sensors, to levels compatible with the input ranges of typical Analog-to-Digital Converters (ADCs).  The discussion includes the theory, design and realization of interface electronics for bridge transducers and thermocouples. It describes the use of power efficient techniques to mitigate low frequency errors, resulting in interface electronics with high accuracy, low noise and low drift. Since this book is mainly about techniques for eliminating low frequency errors, it describes the nature of these errors and the associated dynamic offset cancellation techniques used to mitigate them.  Surveys comprehensively offset cancellation and accuracy improvement techniques applied in precision amplifier designs; Presents techniques in precision circuit design to mitigate low frequency errors in millivolt-level signals transmitted by ...

  20. System-level integrated circuit (SLIC) development for phased array antenna applications

    Science.gov (United States)

    Shalkhauser, K. A.; Raquet, C. A.

    1991-01-01

    A microwave/millimeter wave system-level integrated circuit (SLIC) being developed for use in phased array antenna applications is described. The program goal is to design, fabricate, test, and deliver an advanced integrated circuit that merges radio frequency (RF) monolithic microwave integrated circuit (MMIC) technologies with digital, photonic, and analog circuitry that provide control, support, and interface functions. As a whole, the SLIC will offer improvements in RF device performance, uniformity, and stability while enabling accurate, rapid, repeatable control of the RF signal. Furthermore, the SLIC program addresses issues relating to insertion of solid state devices into antenna systems, such as the reduction in number of bias, control, and signal lines. Program goals, approach, and status are discussed.

  1. Dictionary-based image reconstruction for superresolution in integrated circuit imaging.

    Science.gov (United States)

    Cilingiroglu, T Berkin; Uyar, Aydan; Tuysuzoglu, Ahmet; Karl, W Clem; Konrad, Janusz; Goldberg, Bennett B; Ünlü, M Selim

    2015-06-01

    Resolution improvement through signal processing techniques for integrated circuit imaging is becoming more crucial as the rapid decrease in integrated circuit dimensions continues. Although there is a significant effort to push the limits of optical resolution for backside fault analysis through the use of solid immersion lenses, higher order laser beams, and beam apodization, signal processing techniques are required for additional improvement. In this work, we propose a sparse image reconstruction framework which couples overcomplete dictionary-based representation with a physics-based forward model to improve resolution and localization accuracy in high numerical aperture confocal microscopy systems for backside optical integrated circuit analysis. The effectiveness of the framework is demonstrated on experimental data.

  2. A compact picosecond pulsed laser source using a fully integrated CMOS driver circuit

    Science.gov (United States)

    He, Yuting; Li, Yuhua; Yadid-Pecht, Orly

    2016-03-01

    Picosecond pulsed laser source have applications in areas such as optical communications, biomedical imaging and supercontinuum generation. Direct modulation of a laser diode with ultrashort current pulses offers a compact and efficient approach to generate picosecond laser pulses. A fully integrated complementary metaloxide- semiconductor (CMOS) driver circuit is designed and applied to operate a 4 GHz distributed feedback laser (DFB). The CMOS driver circuit combines sub-circuits including a voltage-controlled ring oscillator, a voltagecontrolled delay line, an exclusive-or (XOR) circuit and a current source circuit. Ultrashort current pulses are generated by the XOR circuit when the delayed square wave is XOR'ed with the original square wave from the on-chip oscillator. Circuit post-layout simulation shows that output current pulses injected into an equivalent circuit load of the laser have a pulse full width at half maximum (FWHM) of 200 ps, a peak current of 80 mA and a repetition rate of 5.8 MHz. This driver circuit is designed in a 0.13 μm CMOS process and taped out on a 0.3 mm2 chip area. This CMOS chip is packaged and interconnected with the laser diode on a printed circuit board (PCB). The optical output waveform from the laser source is captured by a 5 GHz bandwidth photodiode and an 8 GHz bandwidth oscilloscope. Measured results show that the proposed laser source can output light pulses with a pulse FWHM of 151 ps, a peak power of 6.4 mW (55 mA laser peak forward current) and a repetition rate of 5.3 MHz.

  3. 一种全集成的RSSI电路%A Fully Integrated RSSI Circuit

    Institute of Scientific and Technical Information of China (English)

    武振宇; 樊晓华; 张海英; 叶甜春

    2014-01-01

    Based on 0 .18μm RF CMOS Process , this paper presents a fully integrated received signal strength indicator ,which integrates limiting amplifier ,full wave rectifier ,offset subtractor ,dc-offset extractor and output buffer .The RSSI circuit provides amplified intermediate frequency output signal and RSSI output voltage to indicate the input signal strength .By applying weak current biased transconductor in the dc-offset extractor ,the layout area has been significantly reduced .It’s helpful to higher integration and lower cost .As a result ,the RSSI circuit is not only suitable for low IF receiver ,but also zero IF .Measurement results demonstrate the input linear detection range is larger than 55 dB .The prototype occupies active area of 0 .033 mm2 ,while consumes 3 .1 mA current .%基于0.18μm RF CMOS工艺,设计了一种全集成的接收信号强度指示计(RSSI)电路.该电路片内集成了限幅放大器,全波整流器,失调减法器,直流失调提取电路和输出缓冲器.该RSSI电路提供放大后的中频输出以及指示输入信号强度的RSSI电压输出.通过在直流失调提取电路中应用微电流偏置的跨导放大器,大幅减小了版图面积,提高了集成度,降低了成本.这种RSSI电路不仅适合低中频接收机,尤其适合于零中频应用.测试结果表明,电路实现了55 dB的输入线性检测范围,同时占用版图面积为0.033 mm2,功耗为3.1 mA .

  4. Integrated silicon and silicon nitride photonic circuits on flexible substrates.

    Science.gov (United States)

    Chen, Yu; Li, Mo

    2014-06-15

    Flexible integrated photonic devices based on crystalline materials on plastic substrates have a promising potential in many unconventional applications. In this Letter, we demonstrate a fully integrated photonic system including ring resonators and grating couplers, based on both crystalline silicon and silicon nitride, on flexible plastic substrate by using the stamping-transfer method. A high yield has been achieved by a simple, yet reliable transfer method without significant performance degradation.

  5. System and method for interfacing large-area electronics with integrated circuit devices

    Science.gov (United States)

    Verma, Naveen; Glisic, Branko; Sturm, James; Wagner, Sigurd

    2016-07-12

    A system and method for interfacing large-area electronics with integrated circuit devices is provided. The system may be implemented in an electronic device including a large area electronic (LAE) device disposed on a substrate. An integrated circuit IC is disposed on the substrate. A non-contact interface is disposed on the substrate and coupled between the LAE device and the IC. The non-contact interface is configured to provide at least one of a data acquisition path or control path between the LAE device and the IC.

  6. Relay Protection and Automation Systems Based on Programmable Logic Integrated Circuits

    Energy Technology Data Exchange (ETDEWEB)

    Lashin, A. V., E-mail: LashinAV@lhp.ru; Kozyrev, A. V. [JSC “Lenhydroproject” (Russian Federation)

    2015-09-15

    One of the most promising forms of developing the apparatus part of relay protection and automation devices is considered. The advantages of choosing programmable logic integrated circuits to obtain adaptive technological algorithms in power system protection and control systems are pointed out. The technical difficulties in the problems which today stand in the way of using relay protection and automation systems are indicated and a new technology for solving these problems is presented. Particular attention is devoted to the possibility of reconfiguring the logic of these devices, using programmable logic integrated circuits.

  7. Sub-micron imaging of buried integrated circuit structures using scanning confocal electron microscopy.

    Energy Technology Data Exchange (ETDEWEB)

    Frigo, S. P.; Levine, Z.; Zaluzec, N. J.; Materials Science Division; Northern Arizona Univ.; NIST

    2002-09-09

    Two-dimensional images of model integrated circuit components were collected using the technique of scanning confocal electron microscopy. For structures embedded about 5 {mu}m below the surface of a silicon oxide dielectric, a lateral resolution of 76{+-}9 nm was measured. Elemental mapping via x-ray emission spectrometry is demonstrated. A parallax analysis of images taken for various tilt angles to the electron beam allowed determination of the spacing between two wiring planes. The results show that scanning confocal electron microscopy is capable of probing buried structures at resolutions that will be necessary for the inspection of next-generation integrated circuit technology.

  8. Integrated Circuit Interconnect Lines on Lossy Silicon Substrate with Finite Element Method

    Directory of Open Access Journals (Sweden)

    Sarhan M. Musa,

    2014-01-01

    Full Text Available The silicon substrate has a significant effect on the inductance parameter of a lossy interconnect line on integrated circuit. It is essential to take this into account in determining the transmission line electrical parameters. In this paper, a new quasi-TEM capacitance and inductance analysis of multiconductor multilayer interconnects is successfully demonstrated using finite element method (FEM. We specifically illustrate the electrostatic modeling of single and coupled interconnected lines on a silicon-silicon oxide substrate. Also, we determine the quasi-static spectral for the potential distribution of the silicon-integrated circuit.

  9. Wafer-level testing and test during burn-in for integrated circuits

    CERN Document Server

    Bahukudumbi, Sudarshan

    2010-01-01

    Wafer-level testing refers to a critical process of subjecting integrated circuits and semiconductor devices to electrical testing while they are still in wafer form. Burn-in is a temperature/bias reliability stress test used in detecting and screening out potential early life device failures. This hands-on resource provides a comprehensive analysis of these methods, showing how wafer-level testing during burn-in (WLTBI) helps lower product cost in semiconductor manufacturing.Engineers learn how to implement the testing of integrated circuits at the wafer-level under various resource constrain

  10. A 77 GHz on-chip strip dipole antenna integrated with balun circuits for automotive radar

    OpenAIRE

    2012-01-01

    In this paper, design and implementation of a 77 GHz on-chip strip dipole antenna integrated with both lumped and transmission line based balun circuits are presented. The on-chip antenna is realized by using IHP’s 0.25 μm SiGe BiCMOS technology with localized back-side etch (LBE) module to decrease substrate loss. The strip dipole antenna is fed by both a lumped LC circuit and strip line tapered baluns integrated on the same substrate and occupies an area of 1x1.2 mm2 including the RF pads. ...

  11. An integrated control and readout circuit for implantable multi-target electrochemical biosensing.

    Science.gov (United States)

    Ghoreishizadeh, Sara S; Baj-Rossi, Camilla; Cavallini, Andrea; Carrara, Sandro; De Micheli, Giovanni

    2014-12-01

    We describe an integrated biosensor capable of sensing multiple molecular targets using both cyclic voltammetry (CV) and chronoamperometry (CA). In particular, we present our custom IC to realize voltage control and current readout of the biosensors. A mixed-signal circuit block generates sub-Hertz triangular waveform for the biosensors by means of a direct-digital-synthesizer to control CV. A current to pulse-width converter is realized to output the data for CA measurement. The IC is fabricated in 0.18 μm technology. It consumes 220 μW from 1.8 V supply voltage, making it suitable for remotely-powered applications. Electrical measurements show excellent linearity in sub- μA current range. Electrochemical measurements including CA measurements of glucose and lactate and CV measurements of the anti-cancer drug Etoposide have been acquired with the fabricated IC and compared with a commercial equipment. The results obtained with the fabricated IC are in good agreement with those of the commercial equipment for both CV and CA measurements.

  12. Three hydrogenated amorphous silicon photodiodes stacked for an above integrated circuit colour sensor

    Energy Technology Data Exchange (ETDEWEB)

    Gidon, Pierre; Giffard, Benoit; Moussy, Norbert; Parrein, Pascale; Poupinet, Ludovic [CEA-LETI, MINATEC, CEA-Grenoble, 17 rue des Martyrs, 38054 Grenoble Cedex 9 (France)

    2010-03-15

    We present theoretical simulation and experimental results of a new colour pixel structure. This pixel catches the light in three stacked amorphous silicon photodiodes encompassed between transparent electrodes. The optical structure has been simulated for signal optimisation. The thickness of each stacked layer is chosen in order to absorb the maximum of light and the three signals allow to linearly calculate the CIE colour coordinates 1 with minimum error and noise. The whole process is compatible with an above integrated circuit (IC) approach. Each photodiode is an n-i-p structure. For optical reason, the upper diode must be controlled down to 25 nm thickness. The first test pixel structure allows a good recovering of colour coordinates. The measured absorption spectrum of each photodiode is in good agreement with our simulations. This specific stack with three photodiodes per pixel totalises two times more signal than an above IC pixel under a standard Bayer pattern 2,3. In each square of this GretagMacbeth chart is the reference colour on the right and the experimentally measured colour on the left with three amorphous silicon photodiodes per pixel. (Abstract Copyright [2010], Wiley Periodicals, Inc.)

  13. Analog integrated circuits for the Lotka-Volterra competitive neural networks.

    Science.gov (United States)

    Asai, T; Ohtani, M; Yonezu, H

    1999-01-01

    A subthreshold MOS integrated circuit (IC) is designed and fabricated for implementing a competitive neural network of the Lotka-Volterra (LV) type which is derived from conventional membrane dynamics of neurons and is used for the selection of external inputs. The steady-state solutions to the LV equation can be classified into three types, each of which represents qualitatively different selection behavior. Among the solutions, the winners-share-all (WSA) solution in which a certain number of neurons remain activated in steady states is particularly useful owing to robustness in the selection of inputs from a noisy environment. The measured results of the fabricated LV IC's agree well with the theoretical prediction as long as the influence of device mismatches is small. Furthermore, results of extensive circuit simulations prove that the large-scale LV circuit producing the WSA solution does exhibit a reliable selection compared with winner-take-all circuits, in the possible presence of device mismatches.

  14. Monolithic Microwave Integrated Circuits (MMIC) Broadband Power Amplifiers (Part 2)

    Science.gov (United States)

    2013-07-01

    2 Figure 2. A 2-GHz load-pull simulation of output power (Pcomp-6 x 65 µm PHEMT). ..............2 Figure 3. A 2-GHz load-pull simulation of PAE (6...5. MMIC 1–5 GHz output power and PAE performance simulation (1, 2, 3, and 4 GHz...load-pull simulation of PAE (6 x 50 µm PHEMT). .......................................7 Figure 9. MMIC 10–19 GHz broadband power amplifier linear

  15. An integrated energy-efficient capacitive sensor digital interface circuit

    KAUST Repository

    Omran, Hesham

    2014-06-19

    In this paper, we propose an energy-efficient 13-bit capacitive sensor interface circuit. The proposed design fully relies on successive approximation algorithm, which eliminates the need for oversampling and digital decimation filtering, and thus low-power consumption is achieved. The proposed architecture employs a charge amplifier stage to acheive parasitic insensitive operation and fine absolute resolution. Moreover, the output code is not affected by offset voltages or charge injection. The successive approximation algorithm is implemented in the capacitance-domain using a coarse-fine programmable capacitor array, which allows digitizing wide capacitance range in compact area. Analysis for the maximum achievable resolution due to mismatch is provided. The proposed design is insensitive to any reference voltage or current which translates to low temperature sensitivity. The operation of a prototype fabricated in a standard CMOS technology is experimentally verified using both on-chip and off-chip capacitive sensors. Compared to similar prior work, the fabricated prototype achieves and excellent energy efficiency of 34 pJ/step.

  16. Photonic Integrated Circuits for Phased-Array Beamforming

    NARCIS (Netherlands)

    Vliet, F.E. van; Stulemeijer, J.; Benoist, K.W.; Maat, D.H.P.; Smit, M.K.; Dijk, R. van

    1999-01-01

    Photonic integration is very promising to bring down volume and weight of phased-array beamforming networks. In addition, photonics allows for increased functionality for wide bandwidth systems. In this paper we demonstrate the feasibiÌity of phase and amplitude control of a 16-elernent phased-array

  17. A microfabricated fringing field capacitive pH sensor with an integrated readout circuit

    Energy Technology Data Exchange (ETDEWEB)

    Arefin, Md Shamsul, E-mail: md.arefin@monash.edu; Redoute, Jean-Michel; Rasit Yuce, Mehmet [Electrical and Computer Systems Engineering, Monash University, Melbourne (Australia); Bulut Coskun, M.; Alan, Tuncay; Neild, Adrian [Mechanical and Aerospace Engineering, Monash University, Melbourne (Australia)

    2014-06-02

    This work presents a microfabricated fringe-field capacitive pH sensor using interdigitated electrodes and an integrated modulation-based readout circuit. The changes in capacitance of the sensor result from the permittivity changes due to pH variations and are converted to frequency shifts using a crossed-coupled voltage controlled oscillator readout circuit. The shift in resonant frequency of the readout circuit is 30.96 MHz for a change in pH of 1.0–5.0. The sensor can be used for the measurement of low pH levels, such as gastric acid, and can be integrated with electronic pills. The measurement results show high repeatability, low noise, and a stable output.

  18. Study on data acquisition circuit used in SSPA linear array detector X-ray detection

    CERN Document Server

    Wei Biao; Che Zhen Ping

    2002-01-01

    After SSPA used as X-ray array detector is developed, the authors take a research on the data acquisition circuit applied to the detector. The experiment designed has verified the feasibility of application of this array detector and its data acquisition circuit to X-ray computed tomography (X-CT). The preliminary test results indicate that the method of the X-ray detection is feasible for industry X-CT nondestructive testing, which brings about advantage for detecting and measuring with high resolution, good efficiency and low cost

  19. Tunable quantum interference in a 3D integrated circuit.

    Science.gov (United States)

    Chaboyer, Zachary; Meany, Thomas; Helt, L G; Withford, Michael J; Steel, M J

    2015-04-27

    Integrated photonics promises solutions to questions of stability, complexity, and size in quantum optics. Advances in tunable and non-planar integrated platforms, such as laser-inscribed photonics, continue to bring the realisation of quantum advantages in computation and metrology ever closer, perhaps most easily seen in multi-path interferometry. Here we demonstrate control of two-photon interference in a chip-scale 3D multi-path interferometer, showing a reduced periodicity and enhanced visibility compared to single photon measurements. Observed non-classical visibilities are widely tunable, and explained well by theoretical predictions based on classical measurements. With these predictions we extract Fisher information approaching a theoretical maximum. Our results open a path to quantum enhanced phase measurements.

  20. Restoring heart function and electrical integrity: closing the circuit

    Science.gov (United States)

    Monteiro, Luís Miguel; Vasques-Nóvoa, Francisco; Ferreira, Lino; Pinto-do-Ó, Perpétua; Nascimento, Diana Santos

    2017-04-01

    Cardiovascular diseases are the main cause of death in the world and are often associated with the occurrence of arrhythmias due to disruption of myocardial electrical integrity. Pathologies involving dysfunction of the specialized cardiac excitatory/conductive tissue are also common and constitute an added source of morbidity and mortality since current standard therapies withstand a great number of limitations. As electrical integrity is essential for a well-functioning heart, innovative strategies have been bioengineered to improve heart conduction and/or promote myocardial repair, based on: (1) gene and/or cell delivery; or (2) conductive biomaterials as tools for cardiac tissue engineering. Herein we aim to review the state-of-art in the area, while briefly describing the biological principles underlying the heart electrical/conduction system and how this system can be disrupted in heart disease. Suggestions regarding targets for future studies are also presented.

  1. Photonic integrated circuits based on quantum well intermixing techniques

    OpenAIRE

    Hou, Lianping; Marsh, John H.

    2016-01-01

    The passive sections of a monolithic device must have a wider bandgap than the active regions to reduce losses due to direct interband absorption. Such bandgap engineering is usually realized by complicated regrown butt-joint or selective-area growth techniques. We, however, have developed a simple, flexible and low-cost alternative technique – quantum well intermixing (QWI) – to increase the bandgap in selected areas of an integrated device post-growth. To verify the QWI process, we have fab...

  2. Photonic Integrated Circuits Based on Quantum well Intermixing Techniques

    OpenAIRE

    Hou, Lianping; John H. Marsh

    2016-01-01

    The passive sections of a monolithic device must have a wider bandgap than the active regions to reduce losses due to direct interband absorption. Such bandgap engineering is usually realized by complicated regrown butt-joint or selective-area growth techniques. We, however, have developed a simple, flexible and low-cost alternative technique – quantum well intermixing (QWI) – to increase the bandgap in selected areas of an integrated device post-growth. To verify the QWI process, we have fab...

  3. Hybrid integration of synthesized dielectric image waveguides in substrate integrated circuit technology and its millimeter wave applications

    Science.gov (United States)

    Patrovsky, Andreas

    -band (75 GHz to 110 GHz), a transition from rectangular waveguide to SIIG was developed. Another transition to either microstrip or CPW is essential to enable coplanar probe measurements and to achieve compatibility with monolithic millimeter wave integrated circuits (MMICs). Microstrip and image guide have very different requirements for the substrate thickness, for which reason efforts were concentrated on a wideband transition between the SIIG and CPW. The designed transition shows good broadband performance and minimal radiation loss. Other transitions from the SIIG to the Substrate Integrated Waveguide (SIW) are also presented in the context of substrate integrated circuits (SICs). The latter technology combines planar transmission lines and originally non-planar waveguide structures that are synthesized in planar form on a common substrate. High alignment precision is a direct consequence, which eliminates the necessity for additional tuning. As an open dielectric waveguide technology with very small transmission loss, the SIIG is particularly suitable for antennas and corresponding feed lines. The similarity of the SIIG with other dielectric waveguides and especially with the image guide suggests a knowledge transfer from known dielectric antennas. A planar SIIG rod antenna was designed and fabricated, as a derivative of the established polyrod antenna. The structural shape is simple and compact, and it provides a medium gain in the range of 10 dBi to 15 dBi. A second developed type, an SIIG traveling-wave linear array antenna, is frequency-steerable through broadside due to special radiation elements. The novel design of a slab-mode antenna forms an endfire beam by a planar lens configuration. In addition, all of those dielectric-based antennas are highly efficient. Being synthesized on a planar substrate, the SIIG can be combined in a hybrid way with other waveguide structures on the same substrate in so-called substrate integrated circuits (SICs). It joins the

  4. A heterogeneous III-V/silicon integration platform for on-chip quantum photonic circuits with single quantum dot devices

    CERN Document Server

    Davanco, Marcelo; Sapienza, Luca; Zhang, Chen-Zhao; Cardoso, Jose Vinicius De Miranda; Verma, Varun; Mirin, Richard; Nam, Sae Woo; Liu, Liu; Srinivasan, Kartik

    2016-01-01

    Photonic integration is an enabling technology for photonic quantum science, offering greater scalability, stability, and functionality than traditional bulk optics. Here, we describe a scalable, heterogeneous III-V/silicon integration platform to produce Si$_3$N$_4$ photonic circuits incorporating GaAs-based nanophotonic devices containing self-assembled InAs/GaAs quantum dots. We demonstrate pure singlephoton emission from individual quantum dots in GaAs waveguides and cavities - where strong control of spontaneous emission rate is observed - directly launched into Si$_3$N$_4$ waveguides with > 90 % efficiency through evanescent coupling. To date, InAs/GaAs quantum dots constitute the most promising solidstate triggered single-photon sources, offering bright, pure and indistinguishable emission that can be electrically and optically controlled. Si$_3$N$_4$ waveguides offer low-loss propagation, tailorable dispersion and high Kerr nonlinearities, desirable for linear and nonlinear optical signal processing d...

  5. An Integrated Expert System for Linear Scheduling Heavy Earthmoving Operations

    Directory of Open Access Journals (Sweden)

    Nizar Markiz

    2016-01-01

    Full Text Available Heavy earthmoving operations are repetitive in nature and vulnerable to time-related restraints and uncertainties. Therefore, at the conceptual stage, scheduling these operations can take a linear form, known as linear schedule or line of balance (LOB. In such type of work, generating a preliminary line of balance for variable sequencing of activities is crucial. In this paper, an integrated expert system for determining preliminary linear schedules for heavy earthmoving operations at the conceptual stage is presented. The proposed system incorporates numerous factors that influence the analysis of earthmoving operations, which include geological and topographical parameters used to determine productivity rates at the conceptual stage. Also, the proposed system is capable of automatically generating a line of balance based on a stochastic scheduling technique via the metaheuristic simulated annealing intelligent approach to incorporate randomness and uncertainties in performing the associated activities. A parametric analysis is conducted in order to quantify the system’s degree of accuracy. An actual case project is then utilized to illustrate its numerical capabilities. Generating accurate linear schedules for heavy earthmoving operations at the conceptual design stage is anticipated to be of major significance to infrastructure project stakeholders, engineers, and construction managers by detecting schedule’s conflicts early in order to enhance overall operational logistics.

  6. InP HEMT Integrated Circuits for Submillimeter Wave Radiometers in Earth Remote Sensing

    Science.gov (United States)

    Deal, William R.; Chattopadhyay, Goutam

    2012-01-01

    The operating frequency of InP integrated circuits has pushed well into the Submillimeter Wave frequency band, with amplification reported as high as 670 GHz. This paper provides an overview of current performance and potential application of InP HEMT to Submillimeter Wave radiometers for earth remote sensing.

  7. Geiger-Mode Avalanche Photodiode Arrays Integrated to All-Digital CMOS Circuits.

    Science.gov (United States)

    Aull, Brian

    2016-04-08

    This article reviews MIT Lincoln Laboratory's work over the past 20 years to develop photon-sensitive image sensors based on arrays of silicon Geiger-mode avalanche photodiodes. Integration of these detectors to all-digital CMOS readout circuits enable exquisitely sensitive solid-state imagers for lidar, wavefront sensing, and passive imaging.

  8. Silicon Compatible Materials, Processes, and Technologies for Advanced Integrated Circuits and Emerging Applications 6

    NARCIS (Netherlands)

    Roozeboom, F.; Narayanan, V.; Kakushima, K.; Timans, P.J.; Gusev, E.P.; Karim, Z.; Gendt, S. De

    2016-01-01

    The topics of this annual symposium continue to describe the evolution of traditional scaling in CMOS integrated circuit manufacturing (More Moore for short), combined with the opportunities from growing diversification and embedded functionality (More than Moore). Once again, the main objective was

  9. The Hybrid Integrated Circuit of the ALICE Inner Tracking System upgrade

    CERN Document Server

    Fiorenza, G; Pastore, C; Valentino, V

    2016-01-01

    The upgrade of the Inner Tracking System scheduled during the second long shutdown is an important milestone of the ALICE upgrade and it will provide a high improvement of its performances. In this contribution the smallest operator unit of the detector, the Hybrid Integrated Circuits, is presented.

  10. Geiger-Mode Avalanche Photodiode Arrays Integrated to All-Digital CMOS Circuits

    Directory of Open Access Journals (Sweden)

    Brian Aull

    2016-04-01

    Full Text Available This article reviews MIT Lincoln Laboratory's work over the past 20 years to develop photon-sensitive image sensors based on arrays of silicon Geiger-mode avalanche photodiodes. Integration of these detectors to all-digital CMOS readout circuits enable exquisitely sensitive solid-state imagers for lidar, wavefront sensing, and passive imaging.

  11. Geiger-Mode Avalanche Photodiode Arrays Integrated to All-Digital CMOS Circuits

    OpenAIRE

    Brian Aull

    2016-01-01

    This article reviews MIT Lincoln Laboratory's work over the past 20 years to develop photon-sensitive image sensors based on arrays of silicon Geiger-mode avalanche photodiodes. Integration of these detectors to all-digital CMOS readout circuits enable exquisitely sensitive solid-state imagers for lidar, wavefront sensing, and passive imaging.

  12. 78 FR 10635 - Certain Integrated Circuit Devices and Products Containing the Same; Notice of Receipt of...

    Science.gov (United States)

    2013-02-14

    ...Notice is hereby given that the U.S. International Trade Commission has received a complaint entitled Certain Integrated Circuit Devices and Products Containing the Same, DN 2938; the Commission is soliciting comments on any public interest issues raised by the complaint or complainant's filing under section 210.8(b) of the Commission's Rules of Practice and Procedure (19 CFR...

  13. 77 FR 33486 - Certain Integrated Circuit Packages Provided With Multiple Heat-Conducting Paths and Products...

    Science.gov (United States)

    2012-06-06

    ...Notice is hereby given that the U.S. International Trade Commission has received a complaint entitled Certain Integrated Circuit Packages Provided With Multiple Heat-Conducting Paths and Products Containing Same, DN 2899; the Commission is soliciting comments on any public interest issues raised by the complaint or complainant's filing under section 210.8(b) of the Commission's Rules of......

  14. Effective Teaching of the Physical Design of Integrated Circuits Using Educational Tools

    Science.gov (United States)

    Aziz, Syed Mahfuzul; Sicard, Etienne; Ben Dhia, Sonia

    2010-01-01

    This paper presents the strategies used for effective teaching and skill development in integrated circuit (IC) design using project-based learning (PBL) methodologies. It presents the contexts in which these strategies are applied to IC design courses at the University of South Australia, Adelaide, Australia, and the National Institute of Applied…

  15. Silicon Compatible Materials, Processes, and Technologies for Advanced Integrated Circuits and Emerging Applications 6

    NARCIS (Netherlands)

    Roozeboom, F.; Narayanan, V.; Kakushima, K.; Timans, P.J.; Gusev, E.P.; Karim, Z.; Gendt, S. De

    2016-01-01

    The topics of this annual symposium continue to describe the evolution of traditional scaling in CMOS integrated circuit manufacturing (More Moore for short), combined with the opportunities from growing diversification and embedded functionality (More than Moore). Once again, the main objective was

  16. Development of Application-specific Integrated Circuit for Detector Signal Readout

    Institute of Scientific and Technical Information of China (English)

    LIU; Hai-feng; WAN; Yu-qing; TIAN; Hua-yang

    2013-01-01

    In general,the development of nuclear electronics was mainly promoted by nuclear physics,high energy physics and other disciplines.As nuclear physics research developed,the requirement of detection equipment which contained a large number of detectors gave birth to nuclear electronics ASIC(application-specific integrated circuit).The institutions such as European Organization for Nuclear

  17. Mathematical Simulation for Integrated Linear Fresnel Spectrometer Chip

    Science.gov (United States)

    Park, Yeonjoon; Yoon, Hargoon; Lee, Uhn; King, Glen C.; Choi, Sang H.

    2012-01-01

    A miniaturized solid-state optical spectrometer chip was designed with a linear gradient-gap Fresnel grating which was mounted perpendicularly to a sensor array surface and simulated for its performance and functionality. Unlike common spectrometers which are based on Fraunhoffer diffraction with a regular periodic line grating, the new linear gradient grating Fresnel spectrometer chip can be miniaturized to a much smaller form-factor into the Fresnel regime exceeding the limit of conventional spectrometers. This mathematical calculation shows that building a tiny motionless multi-pixel microspectrometer chip which is smaller than 1 cubic millimter of optical path volume is possible. The new Fresnel spectrometer chip is proportional to the energy scale (hc/lambda), while the conventional spectrometers are proportional to the wavelength scale (lambda). We report the theoretical optical working principle and new data collection algorithm of the new Fresnel spectrometer to build a compact integrated optical chip.

  18. Ultra Linear Low-loss Varactors & Circuits for Adaptive RF Systems

    NARCIS (Netherlands)

    Huang, C.

    2010-01-01

    With the evolution of wireless communication, varactors can play an important role in enabling adaptive transceivers as well as phase-diversity systems. This thesis presents various varactor diode-based circuit topologies that facilitate RF adaptivity. The proposed varactor configurations can act as

  19. Flexible packaging of solid-state integrated circuit chips with elastomeric microfluidics

    OpenAIRE

    Bowei Zhang; Quan Dong; Korman, Can E.; Zhenyu Li; Zaghloul, Mona E.

    2013-01-01

    A flexible technology is proposed to integrate smart electronics and microfluidics all embedded in an elastomer package. The microfluidic channels are used to deliver both liquid samples and liquid metals to the integrated circuits (ICs). The liquid metals are used to realize electrical interconnects to the IC chip. This avoids the traditional IC packaging challenges, such as wire-bonding and flip-chip bonding, which are not compatible with current microfluidic technologies. As a demonstratio...

  20. Design of a co-integrated CMOS/NEMS oscillator with a simple electronic circuit

    OpenAIRE

    Arndt, Grégory; Colinet, Eric; Juillard, Jérôme

    2010-01-01

    This paper presents the theoretical study of a monolithically integrated NEMS/CMOS oscillator with electrostatic actuation and piezoresistive detection. A feedback circuit based on a single active transistor is implemented. The proposed architecture is so compact that it can be implemented with ease in a sensor array application for example. A brief description of the NEMS resonator is given and the conditions for oscillation build-up are stated. We show how the co-integration allows the use ...

  1. Millimeter-wave integrated circuits based on novel probe microstrip line and coplanar stripline exciters

    OpenAIRE

    Iezhov, Oleksandr; Omelianenko, Mykhaylo

    2009-01-01

    Novel designs of compact integrated waveguide exciters of microstrip line and coplanar stipline are presented in the paper. An E-plane microstrip 0-π phase-shift modulator with independent p-i-n diode control networks has been designed at 24 GHz on the basis of proposed exciters. The total length of the integrated circuit substrate including exciters is no more than 0.62 of waveguide wavelength.

  2. Geiger-Mode Avalanche Photodiode Arrays Integrated to All-Digital CMOS Circuits

    Science.gov (United States)

    2016-01-20

    bump bonds or through-silicon vias used in some wafer stacking processes. The process can be...function as bump bonds, but are much smaller) are patterned on each wafer and planarized along with the bonding oxide. When the wafers are bonded and...pads, the APD array is integrated with a CMOS readout circuit, using either bump bonding or a 3D integration technique. During this process

  3. A Full CMOS Integration Including ISFET Microsensors and Interface Circuit for Biochemical Applications

    Institute of Scientific and Technical Information of China (English)

    Jinbao Wei; Haigang Yang; Hongguang Sun; Zengjin Lin; Shanhong Xia

    2006-01-01

    One of today's challenges is the integration of ISFETs in chemical and biochemical Microsystems. This article presents a full integration of ISFET chip containing the ISFET/REFET (reference FET) pair, ISFET/REFET amplifiers, bias current generator, as well as a reference electrode structure, all integrated on the same chip based on CMOS technology. The sensor chip was fabricated in a standard 0.35 μm CMOS process (Chartered Semiconductor, Singapore). The extra post processing steps have been developed and added for depositing membranes. Finally, the pH response of the integrated sensor was measured with the interface circuit.

  4. A Novel Optimization Tool for Automated Design of Integrated Circuits based on MOSGA

    Directory of Open Access Journals (Sweden)

    Maryam Dehbashian

    2011-11-01

    Full Text Available In this paper a novel optimization method based on Multi-Objective Gravitational Search Algorithm (MOGSA is presented for automated design of analog integrated circuits. The recommended method firstly simulates a selected circuit using a simulator and then simulated results are optimized by MOGSA algorithm. Finally this process continues to meet its optimum result. The main programs of the proposed method have been implemented in MATLAB while analog circuits are simulated by HSPICE software. To show the capability of this method, its proficiency will be examined in the optimization of analog integrated circuits design. In this paper, an analog circuit sizing scheme -Optimum Automated Design of a Temperature independent Differential Op-amp using Widlar Current Source- is illustrated as a case study. The computer results obtained from implementing this method indicate that the design specifications are closely met. Moreover, according to various design criteria, this tool by proposing a varied set of answers can give more options to designers to choose a desirable scheme among other suggested results. MOGSA, the proposal algorithm, introduces a novel method in multi objective optimization on the basis of Gravitational Search Algorithm in which the concept of “Pareto-optimality” is used to determine “non-dominated” positions as well as an external repository to keep these positions. To ensure the accuracy of MOGSA performance, this algorithm is validated using several standard test functions from some specialized literatures. Final results indicate that our method is highly competitive with current multi objective optimization algorithms.

  5. CMOS-based carbon nanotube pass-transistor logic integrated circuits.

    Science.gov (United States)

    Ding, Li; Zhang, Zhiyong; Liang, Shibo; Pei, Tian; Wang, Sheng; Li, Yan; Zhou, Weiwei; Liu, Jie; Peng, Lian-Mao

    2012-02-14

    Field-effect transistors based on carbon nanotubes have been shown to be faster and less energy consuming than their silicon counterparts. However, ensuring these advantages are maintained for integrated circuits is a challenge. Here we demonstrate that a significant reduction in the use of field-effect transistors can be achieved by constructing carbon nanotube-based integrated circuits based on a pass-transistor logic configuration, rather than a complementary metal-oxide semiconductor configuration. Logic gates are constructed on individual carbon nanotubes via a doping-free approach and with a single power supply at voltages as low as 0.4 V. The pass-transistor logic configurarion provides a significant simplification of the carbon nanotube-based circuit design, a higher potential circuit speed and a significant reduction in power consumption. In particular, a full adder, which requires a total of 28 field-effect transistors to construct in the usual complementary metal-oxide semiconductor circuit, uses only three pairs of n- and p-field-effect transistors in the pass-transistor logic configuration.

  6. An analog integrated signal processing circuit for on-chip diffusion-based gas analysis

    Science.gov (United States)

    Sadeghi, Hesam; Ghafarinia, Vahid

    2013-07-01

    In diffusion-based gas analysis, the transient of gas diffusion process is recorded by a generic gas sensor to serve as a fingerprint for qualitative and quantitative analysis of gaseous samples. Following the acquisition of these specific signals, any standalone gas analyzer requires a pattern recognition system for pattern classification. The classic digital pattern recognition methods require computing hardware of adequate computational throughput. In this paper, we have followed a straightforward mathematical procedure to relate the signals to their associated target gases. We have shown that the procedure can be implemented by a set of analog functions. Based on the results, we have designed an analog integrated circuit, in 0.18 µm standard CMOS process, for processing the diffusion-based transient signals. The main circuit components are a low-pass filter, the differentiator, the feature extractor and an artificial neural network. The output of the circuit is a 2-bit binary code that specifies the target gas. The circuit successfully classified four alcoholic vapors by processing the experimentally obtained response patterns. The proposed signal processing circuit, the semiconductor gas sensor and the diffusion channel can all be implemented on a single substrate to fabricate an integrated micro gas analyzer.

  7. A High-Temperature Piezoresistive Pressure Sensor with an Integrated Signal-Conditioning Circuit

    Directory of Open Access Journals (Sweden)

    Zong Yao

    2016-06-01

    Full Text Available This paper focuses on the design and fabrication of a high-temperature piezoresistive pressure sensor with an integrated signal-conditioning circuit, which consists of an encapsulated pressure-sensitive chip, a temperature compensation circuit and a signal-conditioning circuit. A silicon on insulation (SOI material and a standard MEMS process are used in the pressure-sensitive chip fabrication, and high-temperature electronic components are adopted in the temperature-compensation and signal-conditioning circuits. The entire pressure sensor achieves a hermetic seal and can be operated long-term in the range of −50 °C to 220 °C. Unlike traditional pressure sensor output voltage ranges (in the dozens to hundreds of millivolts, the output voltage of this sensor is from 0 V to 5 V, which can significantly improve the signal-to-noise ratio and measurement accuracy in practical applications of long-term transmission based on experimental verification. Furthermore, because this flexible sensor’s output voltage is adjustable, general follow-up pressure transmitter devices for voltage converters need not be used, which greatly reduces the cost of the test system. Thus, the proposed high-temperature piezoresistive pressure sensor with an integrated signal-conditioning circuit is expected to be highly applicable to pressure measurements in harsh environments.

  8. A High-Temperature Piezoresistive Pressure Sensor with an Integrated Signal-Conditioning Circuit.

    Science.gov (United States)

    Yao, Zong; Liang, Ting; Jia, Pinggang; Hong, Yingping; Qi, Lei; Lei, Cheng; Zhang, Bin; Xiong, Jijun

    2016-06-18

    This paper focuses on the design and fabrication of a high-temperature piezoresistive pressure sensor with an integrated signal-conditioning circuit, which consists of an encapsulated pressure-sensitive chip, a temperature compensation circuit and a signal-conditioning circuit. A silicon on insulation (SOI) material and a standard MEMS process are used in the pressure-sensitive chip fabrication, and high-temperature electronic components are adopted in the temperature-compensation and signal-conditioning circuits. The entire pressure sensor achieves a hermetic seal and can be operated long-term in the range of -50 °C to 220 °C. Unlike traditional pressure sensor output voltage ranges (in the dozens to hundreds of millivolts), the output voltage of this sensor is from 0 V to 5 V, which can significantly improve the signal-to-noise ratio and measurement accuracy in practical applications of long-term transmission based on experimental verification. Furthermore, because this flexible sensor's output voltage is adjustable, general follow-up pressure transmitter devices for voltage converters need not be used, which greatly reduces the cost of the test system. Thus, the proposed high-temperature piezoresistive pressure sensor with an integrated signal-conditioning circuit is expected to be highly applicable to pressure measurements in harsh environments.

  9. Quasi-Linear Algebras and Integrability (the Heisenberg Picture

    Directory of Open Access Journals (Sweden)

    Alexei Zhedanov

    2008-02-01

    Full Text Available We study Poisson and operator algebras with the ''quasi-linear property'' from the Heisenberg picture point of view. This means that there exists a set of one-parameter groups yielding an explicit expression of dynamical variables (operators as functions of ''time'' t. We show that many algebras with nonlinear commutation relations such as the Askey-Wilson, q-Dolan-Grady and others satisfy this property. This provides one more (explicit Heisenberg evolution interpretation of the corresponding integrable systems.

  10. Hierarchical Non-linear Image Registration Integrating Deformable Segmentation

    Institute of Scientific and Technical Information of China (English)

    RAN Xin; QI Fei-hu

    2005-01-01

    A hierarchical non-linear method for image registration was presented, which integrates image segmentation and registration under a variational framework. An improved deformable model is used to simultaneously segment and register feature from multiple images. The objects in the image pair are segmented by evolving a single contour and meanwhile the parameters of affine registration transformation are found out. After that, a contour-constrained elastic registration is applied to register the images correctly. The experimental results indicate that the proposed approach is effective to segment and register medical images.

  11. First Integrals for Two Linearly Coupled Nonlinear Duffing Oscillators

    Directory of Open Access Journals (Sweden)

    R. Naz

    2011-01-01

    Full Text Available We investigate Noether and partial Noether operators of point type corresponding to a Lagrangian and a partial Lagrangian for a system of two linearly coupled nonlinear Duffing oscillators. Then, the first integrals with respect to Noether and partial Noether operators of point type are obtained explicitly by utilizing Noether and partial Noether theorems for the system under consideration. Moreover, if the partial Euler-Lagrange equations are independent of derivatives, then the partial Noether operators become Noether point symmetry generators for such equations. The difference arises in the gauge terms due to Lagrangians being different for respective approaches. This study points to new ways of constructing first integrals for nonlinear equations without regard to a Lagrangian. We have illustrated it here for nonlinear Duffing oscillators.

  12. A METHOD AND AN APPARATUS FOR PROVIDING TIMING SIGNALS TO A NUMBER OF CIRCUITS, AN INTEGRATED CIRCUIT AND A NODE

    DEFF Research Database (Denmark)

    2006-01-01

    A method of providing or transporting a timing signal between a number of circuits, electrical or optical, where each circuit is fed by a node. The nodes forward timing signals between each other, and at least one node is adapted to not transmit a timing signal before having received a timing...... signal from at least two nodes. In this manner, the direction of the timing skew between nodes and circuits is known and data transport between the circuits made easier....

  13. Power Management Integrated Circuit for Indoor Photovoltaic Energy Harvesting System

    Science.gov (United States)

    Jain, Vipul

    In today's world, power dissipation is a main concern for battery operated mobile devices. Key design decisions are being governed by power rather than area/delay because power requirements are growing more stringent every year. Hence, a hybrid power management system is proposed, which uses both a solar panel to harvest energy from indoor lighting and a battery to power the load. The system tracks the maximum power point of the solar panel and regulates the battery and microcontroller output load voltages through the use of an on-chip switched-capacitor DC-DC converter. System performance is verified through simulation at the 180nm technology node and is made to be integrated on-chip with 0.25 second startup time, 79% efficiency, --8/+14% ripple on the load, an average 1micro A of quiescent current (3.7micro W of power) and total on-chip area of 1.8mm2 .

  14. Algebraic circuits

    CERN Document Server

    Lloris Ruiz, Antonio; Parrilla Roure, Luis; García Ríos, Antonio

    2014-01-01

    This book presents a complete and accurate study of algebraic circuits, digital circuits whose performance can be associated with any algebraic structure. The authors distinguish between basic algebraic circuits, such as Linear Feedback Shift Registers (LFSRs) and cellular automata, and algebraic circuits, such as finite fields or Galois fields. The book includes a comprehensive review of representation systems, of arithmetic circuits implementing basic and more complex operations, and of the residue number systems (RNS). It presents a study of basic algebraic circuits such as LFSRs and cellular automata as well as a study of circuits related to Galois fields, including two real cryptographic applications of Galois fields.

  15. Integrated CMOS photodetectors and signal processing for very low-level chemical sensing with the bioluminescent bioreporter integrated circuit

    Science.gov (United States)

    Bolton, Eric K.; Sayler, Gary S.; Nivens, David E.; Rochelle, James M.; Ripp, Steven; Simpson, Michael L.

    2002-01-01

    We report an integrated CMOS microluminometer optimized for the detection of low-level bioluminescence as part of the bioluminescent bioreporter integrated circuit (BBIC). This microluminometer improves on previous devices through careful management of the sub-femtoampere currents, both signal and leakage, that flow in the front-end processing circuitry. In particular, the photodiode is operated with a reverse bias of only a few mV, requiring special attention to the reset circuitry of the current-to-frequency converter (CFC) that forms the front-end circuit. We report a sub-femtoampere leakage current and a minimum detectable signal (MDS) of 0.15 fA (1510 s integration time) using a room temperature 1.47 mm2 CMOS photodiode. This microluminometer can detect luminescence from as few as 5000 fully induced Pseudomonas fluorescens 5RL bacterial cells. c2002 Elsevier Science B.V. All rights reserved.

  16. Integrated CMOS photodetectors and signal processing for very low-level chemical sensing with the bioluminescent bioreporter integrated circuit

    Science.gov (United States)

    Bolton, Eric K.; Sayler, Gary S.; Nivens, David E.; Rochelle, James M.; Ripp, Steven; Simpson, Michael L.

    2002-01-01

    We report an integrated CMOS microluminometer optimized for the detection of low-level bioluminescence as part of the bioluminescent bioreporter integrated circuit (BBIC). This microluminometer improves on previous devices through careful management of the sub-femtoampere currents, both signal and leakage, that flow in the front-end processing circuitry. In particular, the photodiode is operated with a reverse bias of only a few mV, requiring special attention to the reset circuitry of the current-to-frequency converter (CFC) that forms the front-end circuit. We report a sub-femtoampere leakage current and a minimum detectable signal (MDS) of 0.15 fA (1510 s integration time) using a room temperature 1.47 mm2 CMOS photodiode. This microluminometer can detect luminescence from as few as 5000 fully induced Pseudomonas fluorescens 5RL bacterial cells. c2002 Elsevier Science B.V. All rights reserved.

  17. A novel high voltage start up circuit for an integrated switched mode power supply

    Energy Technology Data Exchange (ETDEWEB)

    Hu Hao; Chen Xingbi, E-mail: huhao21@uestc.edu.c [State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu 610054 (China)

    2010-09-15

    A novel high voltage start up circuit for providing an initial bias voltage to an integrated switched mode power supply (SMPS) is presented. An enhanced mode VDMOS transistor, the gate of which is biased by a floating p-island, is used to provide start up current and sustain high voltage. An NMOS transistor having a high source to ground breakdown voltage is included to extend the bias voltage range to the SMPS. Simulation results indicate that the high voltage start up circuit can start and restart as designed. The proposed structure is believed to be more energy saving and cost-effective compared with other solutions. (semiconductor devices)

  18. LARGE-SCALE PHOTONIC INTEGRATED CIRCUIT FOR QPSK REGENERATION AND WAVELENGTH CONVERSION USING SOA-MZI

    Directory of Open Access Journals (Sweden)

    V.BHARATHI

    2013-06-01

    Full Text Available We investigate through numerical studies and experiments the performance of QPSK regeneration and wavelength-conversion of a large scale, silica-on-silicon photonic integrated circuit using cross phase modulation in a semiconductor optical amplifier(SOA. The phase changing is obtained because of the XPM in SOA. The QPSK signal is generated from 10 Gb/s two NRZ- OOK signals and RZ clock pulse signal. Simulation studies reveal the wavelength conversion potential of the circuit with enhanced regenerative capability of QPSK modulation. The tolerance power, BER, and Q factor value is analytically evaluated. Also calculate the power penalty.

  19. Measurements of complex impedance in microwave high power systems with a new bluetooth integrated circuit.

    Science.gov (United States)

    Roussy, Georges; Dichtel, Bernard; Chaabane, Haykel

    2003-01-01

    By using a new integrated circuit, which is marketed for bluetooth applications, it is possible to simplify the method of measuring the complex impedance, complex reflection coefficient and complex transmission coefficient in an industrial microwave setup. The Analog Devices circuit AD 8302, which measures gain and phase up to 2.7 GHz, operates with variable level input signals and is less sensitive to both amplitude and frequency fluctuations of the industrial magnetrons than are mixers and AM crystal detectors. Therefore, accurate gain and phase measurements can be performed with low stability generators. A mechanical setup with an AD 8302 is described; the calibration procedure and its performance are presented.

  20. SEMICONDUCTOR DEVICES: A novel high voltage start up circuit for an integrated switched mode power supply

    Science.gov (United States)

    Hao, Hu; Xingbi, Chen

    2010-09-01

    A novel high voltage start up circuit for providing an initial bias voltage to an integrated switched mode power supply (SMPS) is presented. An enhanced mode VDMOS transistor, the gate of which is biased by a floating p-island, is used to provide start up current and sustain high voltage. An NMOS transistor having a high source to ground breakdown voltage is included to extend the bias voltage range to the SMPS. Simulation results indicate that the high voltage start up circuit can start and restart as designed. The proposed structure is believed to be more energy saving and cost-effective compared with other solutions.

  1. Escherichia coli flagellar genes as target sites for integration and expression of genetic circuits.

    Directory of Open Access Journals (Sweden)

    Mario Juhas

    Full Text Available E. coli is a model platform for engineering microbes, so genetic circuit design and analysis will be greatly facilitated by simple and effective approaches to introduce genetic constructs into the E. coli chromosome at well-characterised loci. We combined the Red recombinase system of bacteriophage λ and Isothermal Gibson Assembly for rapid integration of novel DNA constructs into the E. coli chromosome. We identified the flagellar region as a promising region for integration and expression of genetic circuits. We characterised integration and expression at four candidate loci, fliD, fliS, fliT, and fliY, of the E. coli flagellar region 3a. The integration efficiency and expression from the four integrations varied considerably. Integration into fliD and fliS significantly decreased motility, while integration into fliT and fliY had only a minor effect on the motility. None of the integrations had negative effects on the growth of the bacteria. Overall, we found that fliT was the most suitable integration site.

  2. A novel linear tracking integrator with integral compensation and its application.

    Science.gov (United States)

    Shao, Xingling; Liu, Jun; Wang, Honglun; Cao, Zhibin

    2017-09-27

    A novel linear tracking integrator (LTI) with integral compensation is proposed for efficient integral estimation from a contaminated measurement with a constant or time-varying bias. The limitation of finite-time convergent integral observer (FTCIO) in ruling out the integral drift is firstly revealed via describing function method. Subsequently, by the utilization of integral action in the feedback path, a simple but effective linear tracking integrator is established to provide a practical solution in achieving a drift-free integral estimate. The highlight is that the proposed LTI can simultaneously give the accurate integral and tracking estimates from a noisy measurement without relying on the condition of observability. In addition, frequency-domain analysis of LTI is investigated to give a viable guideline of parameter tuning. Illustrative simulations and comparison with Kalman filter are included to demonstrate the superiority of LTI in accomplishing precise integral tracking in the presence of constant or time-varying bias. Finally, the effectiveness of LTI is also confirmed by an application on autopilot design for aircraft. Copyright © 2017 ISA. Published by Elsevier Ltd. All rights reserved.

  3. The analysis of linear parametric circuits with switched capacitors by compact modified method of curve fitting

    Directory of Open Access Journals (Sweden)

    M. E. Artemenko

    2011-10-01

    Full Text Available The analytical connections  between the topological resistive element’s connection matrix of ARC-prototype and the topological switched capacitor’s connection matrices of resistor’s switch-capacitor  equivalents   for both phases of SC-circuits were established  that permits to  analyze a switched-capacitor networks on the base of  element’s connection matrix of ARC-prototype. The formal mathematical apparatus of forming the SC-circuits’ difference equations based on element’s connection matrix of ARC-prototype was developed which allows to reduce the dimension of the analyzed model of SC-circuits to the number of prototype’s capacitors.

  4. Impact-Based Area Allocation for Yield Optimization in Integrated Circuits

    Science.gov (United States)

    Abraham, Billion; Widodo, Arif; Chen, Poki

    2016-06-01

    In analog integrated circuit (IC) layout, area allocation is a very important issue for achieving good mismatch cancellation. However, most IC layout papers focus only on layout strategy to reduce systematic mismatch. In 2006, an outstanding paper presenting area allocation strategy was published to introduce technique for random mismatch reduction. Instead of using general theoretical study to prove the strategy, this research presented close-to-optimum simulations only on case-bycase basis. The impact-based area allocation for yield optimization in integrated circuits is proposed in this chapter. To demonstrate the corresponding strategy, not only a theoretical analysis but also an integral nonlinearity-based yield simulation will be given to derive optimum area allocation for binary weighted current steering digital-to-analog converter (DAC). The result will be concluded to convince IC designers how to allocate area for critical devices in an optimum way.

  5. Wafer scale millimeter-wave integrated circuits based on epitaxial graphene in high data rate communication

    Science.gov (United States)

    Habibpour, Omid; He, Zhongxia Simon; Strupinski, Wlodek; Rorsman, Niklas; Zirath, Herbert

    2017-01-01

    In recent years, the demand for high data rate wireless communications has increased dramatically, which requires larger bandwidth to sustain multi-user accessibility and quality of services. This can be achieved at millimeter wave frequencies. Graphene is a promising material for the development of millimeter-wave electronics because of its outstanding electron transport properties. Up to now, due to the lack of high quality material and process technology, the operating frequency of demonstrated circuits has been far below the potential of graphene. Here, we present monolithic integrated circuits based on epitaxial graphene operating at unprecedented high frequencies (80–100 GHz). The demonstrated circuits are capable of encoding/decoding of multi-gigabit-per-second information into/from the amplitude or phase of the carrier signal. The developed fabrication process is scalable to large wafer sizes. PMID:28145513

  6. Moving the boundary between wavelength resources in optical packet and circuit integrated ring network.

    Science.gov (United States)

    Furukawa, Hideaki; Miyazawa, Takaya; Wada, Naoya; Harai, Hiroaki

    2014-01-13

    Optical packet and circuit integrated (OPCI) networks provide both optical packet switching (OPS) and optical circuit switching (OCS) links on the same physical infrastructure using a wavelength multiplexing technique in order to deal with best-effort services and quality-guaranteed services. To immediately respond to changes in user demand for OPS and OCS links, OPCI networks should dynamically adjust the amount of wavelength resources for each link. We propose a resource-adjustable hybrid optical packet/circuit switch and transponder. We also verify that distributed control of resource adjustments can be applied to the OPCI ring network testbed we developed. In cooperation with the resource adjustment mechanism and the hybrid switch and transponder, we demonstrate that automatically allocating a shared resource and moving the wavelength resource boundary between OPS and OCS links can be successfully executed, depending on the number of optical paths in use.

  7. Study on Pulse Skip Modulation Mode in Smart Power Integrated Circuits and Its Test Technology

    Institute of Scientific and Technical Information of China (English)

    LUO Ping

    2005-01-01

    @@ Up to now, the popular control modes for smart power integrated circuit (SPIC) are PWM and PFM.PWM bases on constant frequency variable width (CFVW) control pulse, whereas, PFM bases on constant width variable frequency (CWVF) control pulse. PWM converter has low efficiency with light loads and high amplitude harmonic. On the other hand,the control circuit and filter for PFM are much complex. This dissertation proposes a novel modulation mode named pulse skip modulation (PSM)for SPIC converter, which bases on constant width constant frequency (CWCF) control pulse. It is shown that PSM converter would improve its efficiency and suppress EMI. It also has quick response speed, good interfere rejection and strong robust. Furthermore, it is easy to realize PSM control circuit. The modulating theories of PSM are firstly studied in the world according to the author's investigation.

  8. Wafer scale millimeter-wave integrated circuits based on epitaxial graphene in high data rate communication

    Science.gov (United States)

    Habibpour, Omid; He, Zhongxia Simon; Strupinski, Wlodek; Rorsman, Niklas; Zirath, Herbert

    2017-02-01

    In recent years, the demand for high data rate wireless communications has increased dramatically, which requires larger bandwidth to sustain multi-user accessibility and quality of services. This can be achieved at millimeter wave frequencies. Graphene is a promising material for the development of millimeter-wave electronics because of its outstanding electron transport properties. Up to now, due to the lack of high quality material and process technology, the operating frequency of demonstrated circuits has been far below the potential of graphene. Here, we present monolithic integrated circuits based on epitaxial graphene operating at unprecedented high frequencies (80–100 GHz). The demonstrated circuits are capable of encoding/decoding of multi-gigabit-per-second information into/from the amplitude or phase of the carrier signal. The developed fabrication process is scalable to large wafer sizes.

  9. An Integrated Circuit for Chip-Based Analysis of Enzyme Kinetics and Metabolite Quantification.

    Science.gov (United States)

    Cheah, Boon Chong; Macdonald, Alasdair Iain; Martin, Christopher; Streklas, Angelos J; Campbell, Gordon; Al-Rawhani, Mohammed A; Nemeth, Balazs; Grant, James P; Barrett, Michael P; Cumming, David R S

    2016-06-01

    We have created a novel chip-based diagnostic tools based upon quantification of metabolites using enzymes specific for their chemical conversion. Using this device we show for the first time that a solid-state circuit can be used to measure enzyme kinetics and calculate the Michaelis-Menten constant. Substrate concentration dependency of enzyme reaction rates is central to this aim. Ion-sensitive field effect transistors (ISFET) are excellent transducers for biosensing applications that are reliant upon enzyme assays, especially since they can be fabricated using mainstream microelectronics technology to ensure low unit cost, mass-manufacture, scaling to make many sensors and straightforward miniaturisation for use in point-of-care devices. Here, we describe an integrated ISFET array comprising 2(16) sensors. The device was fabricated with a complementary metal oxide semiconductor (CMOS) process. Unlike traditional CMOS ISFET sensors that use the Si3N4 passivation of the foundry for ion detection, the device reported here was processed with a layer of Ta2O5 that increased the detection sensitivity to 45 mV/pH unit at the sensor readout. The drift was reduced to 0.8 mV/hour with a linear pH response between pH 2-12. A high-speed instrumentation system capable of acquiring nearly 500 fps was developed to stream out the data. The device was then used to measure glucose concentration through the activity of hexokinase in the range of 0.05 mM-231 mM, encompassing glucose's physiological range in blood. Localised and temporal enzyme kinetics of hexokinase was studied in detail. These results present a roadmap towards a viable personal metabolome machine.

  10. Materials Integration and Doping of Carbon Nanotube-based Logic Circuits

    Science.gov (United States)

    Geier, Michael

    Over the last 20 years, extensive research into the structure and properties of single- walled carbon nanotube (SWCNT) has elucidated many of the exceptional qualities possessed by SWCNTs, including record-setting tensile strength, excellent chemical stability, distinctive optoelectronic features, and outstanding electronic transport characteristics. In order to exploit these remarkable qualities, many application-specific hurdles must be overcome before the material can be implemented in commercial products. For electronic applications, recent advances in sorting SWCNTs by electronic type have enabled significant progress towards SWCNT-based integrated circuits. Despite these advances, demonstrations of SWCNT-based devices with suitable characteristics for large-scale integrated circuits have been limited. The processing methodologies, materials integration, and mechanistic understanding of electronic properties developed in this dissertation have enabled unprecedented scales of SWCNT-based transistor fabrication and integrated circuit demonstrations. Innovative materials selection and processing methods are at the core of this work and these advances have led to transistors with the necessary transport properties required for modern circuit integration. First, extensive collaborations with other research groups allowed for the exploration of SWCNT thin-film transistors (TFTs) using a wide variety of materials and processing methods such as new dielectric materials, hybrid semiconductor materials systems, and solution-based printing of SWCNT TFTs. These materials were integrated into circuit demonstrations such as NOR and NAND logic gates, voltage-controlled ring oscillators, and D-flip-flops using both rigid and flexible substrates. This dissertation explores strategies for implementing complementary SWCNT-based circuits, which were developed by using local metal gate structures that achieve enhancement-mode p-type and n-type SWCNT TFTs with widely separated and

  11. Vibrational resonance and implementation of dynamic logic gate in a piecewise-linear Murali-Lakshmanan-Chua circuit

    Science.gov (United States)

    Venkatesh, P. R.; Venkatesan, A.

    2016-10-01

    We report the occurrence of vibrational resonance in piecewise-linear non-autonomous system. Especially, we show that an optimal amplitude of the high frequency second harmonic driving enhances the response of a piece-wise linear non-autonomous Murali-Lakshmanan-Chua (MLC) system to a low frequency first harmonic signal. This phenomenon is illustrated with the analytical solutions of circuit equations characterising the system and finally compared with the numerical method. Further, it has been enunciated explicitly, the implementation of the fundamental NOR/NAND gate via vibrational resonance, both by numerical and analytical solutions. In addition, these logical behaviours (AND/NAND/OR/NOR) can be decided by the amplitude of the input square waves without altering the system parameters.

  12. Highly Uniform Carbon Nanotube Field-Effect Transistors and Medium Scale Integrated Circuits.

    Science.gov (United States)

    Chen, Bingyan; Zhang, Panpan; Ding, Li; Han, Jie; Qiu, Song; Li, Qingwen; Zhang, Zhiyong; Peng, Lian-Mao

    2016-08-10

    Top-gated p-type field-effect transistors (FETs) have been fabricated in batch based on carbon nanotube (CNT) network thin films prepared from CNT solution and present high yield and highly uniform performance with small threshold voltage distribution with standard deviation of 34 mV. According to the property of FETs, various logical and arithmetical gates, shifters, and d-latch circuits were designed and demonstrated with rail-to-rail output. In particular, a 4-bit adder consisting of 140 p-type CNT FETs was demonstrated with higher packing density and lower supply voltage than other published integrated circuits based on CNT films, which indicates that CNT based integrated circuits can reach to medium scale. In addition, a 2-bit multiplier has been realized for the first time. Benefitted from the high uniformity and suitable threshold voltage of CNT FETs, all of the fabricated circuits based on CNT FETs can be driven by a single voltage as small as 2 V.

  13. A multiply-add engine with monolithically integrated 3D memristor crossbar/CMOS hybrid circuit

    Science.gov (United States)

    Chakrabarti, B.; Lastras-Montaño, M. A.; Adam, G.; Prezioso, M.; Hoskins, B.; Cheng, K.-T.; Strukov, D. B.

    2017-02-01

    Silicon (Si) based complementary metal-oxide semiconductor (CMOS) technology has been the driving force of the information-technology revolution. However, scaling of CMOS technology as per Moore’s law has reached a serious bottleneck. Among the emerging technologies memristive devices can be promising for both memory as well as computing applications. Hybrid CMOS/memristor circuits with CMOL (CMOS + “Molecular”) architecture have been proposed to combine the extremely high density of the memristive devices with the robustness of CMOS technology, leading to terabit-scale memory and extremely efficient computing paradigm. In this work, we demonstrate a hybrid 3D CMOL circuit with 2 layers of memristive crossbars monolithically integrated on a pre-fabricated CMOS substrate. The integrated crossbars can be fully operated through the underlying CMOS circuitry. The memristive devices in both layers exhibit analog switching behavior with controlled tunability and stable multi-level operation. We perform dot-product operations with the 2D and 3D memristive crossbars to demonstrate the applicability of such 3D CMOL hybrid circuits as a multiply-add engine. To the best of our knowledge this is the first demonstration of a functional 3D CMOL hybrid circuit.

  14. Integrated Power Flow and Short Circuit Calculation Method for Distribution Network with Inverter Based Distributed Generation

    Directory of Open Access Journals (Sweden)

    Shan Yang

    2016-01-01

    Full Text Available Power flow calculation and short circuit calculation are the basis of theoretical research for distribution network with inverter based distributed generation. The similarity of equivalent model for inverter based distributed generation during normal and fault conditions of distribution network and the differences between power flow and short circuit calculation are analyzed in this paper. Then an integrated power flow and short circuit calculation method for distribution network with inverter based distributed generation is proposed. The proposed method let the inverter based distributed generation be equivalent to Iθ bus, which makes it suitable to calculate the power flow of distribution network with a current limited inverter based distributed generation. And the low voltage ride through capability of inverter based distributed generation can be considered as well in this paper. Finally, some tests of power flow and short circuit current calculation are performed on a 33-bus distribution network. The calculated results from the proposed method in this paper are contrasted with those by the traditional method and the simulation method, whose results have verified the effectiveness of the integrated method suggested in this paper.

  15. A multiply-add engine with monolithically integrated 3D memristor crossbar/CMOS hybrid circuit

    Science.gov (United States)

    Chakrabarti, B.; Lastras-Montaño, M. A.; Adam, G.; Prezioso, M.; Hoskins, B.; Cheng, K.-T.; Strukov, D. B.

    2017-01-01

    Silicon (Si) based complementary metal-oxide semiconductor (CMOS) technology has been the driving force of the information-technology revolution. However, scaling of CMOS technology as per Moore’s law has reached a serious bottleneck. Among the emerging technologies memristive devices can be promising for both memory as well as computing applications. Hybrid CMOS/memristor circuits with CMOL (CMOS + “Molecular”) architecture have been proposed to combine the extremely high density of the memristive devices with the robustness of CMOS technology, leading to terabit-scale memory and extremely efficient computing paradigm. In this work, we demonstrate a hybrid 3D CMOL circuit with 2 layers of memristive crossbars monolithically integrated on a pre-fabricated CMOS substrate. The integrated crossbars can be fully operated through the underlying CMOS circuitry. The memristive devices in both layers exhibit analog switching behavior with controlled tunability and stable multi-level operation. We perform dot-product operations with the 2D and 3D memristive crossbars to demonstrate the applicability of such 3D CMOL hybrid circuits as a multiply-add engine. To the best of our knowledge this is the first demonstration of a functional 3D CMOL hybrid circuit. PMID:28195239

  16. Back End of Line Nanorelays for Ultra-low Power Monolithic Integrated NEMS-CMOS Circuits

    KAUST Repository

    Lechuga Aranda, Jesus Javier

    2016-05-01

    Since the introduction of Complementary-Metal-Oxide-Semiconductor (CMOS) technology, the chip industry has enjoyed many benefits of transistor feature size scaling, including higher speed and device density and improved energy efficiency. However, in the recent years, the IC designers have encountered a few roadblocks, namely reaching the physical limits of scaling and also increased device leakage which has resulted in a slow-down of supply voltage and power density scaling. Therefore, there has been an extensive hunt for alternative circuit architectures and switching devices that can alleviate or eliminate the current crisis in the semiconductor industry. The Nano-Electro-Mechanical (NEM) relay is a promising alternative switch that offers zero leakage and abrupt turn-on behaviour. Even though these devices are intrinsically slower than CMOS transistors, new circuit design techniques tailored for the electromechanical properties of such devices can be leveraged to design medium performance, ultra-low power integrated circuits. In this thesis, we deal with a new generation of such devices that is built in the back end of line (BEOL) CMOS process and is an ideal option for full integration with current CMOS transistor technology. Simulation and verification at the circuit and system level is a critical step in the design flow of microelectronic circuits, and this is especially important for new technologies that lack the standard design infrastructure and well-known verification platforms. Although most of the physical and electrical properties of NEM structures can be simulated using standard electronic automation software, there is no report of a reliable behavioural model for NEMS switches that enable large circuit simulations. In this work, we present an optimised model of a BEOL nano relay that encompasses all the electromechanical characteristics of the device and is robust and lightweight enough for VLSI applications that require simulation of thousands of

  17. Linear Quadratic Integral Control for the Active Suspension of Vehicle

    Institute of Scientific and Technical Information of China (English)

    2005-01-01

    The quarter model of an active suspension is established in the form of controllable autoregressive moving average (CARMA) model. An accelerometer can be mounted on the wheel hub for measuring road disturbance; this signal is used to identify the CARMA model parameters by recursive forgetting factors least square method. The linear quadratic integral (LQI) control method for the active suspension is presented. The LQI control algorithm is fit for vehicle suspension control, for the control performance index can comprise multi controlled variables. The simulation results show that the vertical acceleration and suspension travel both are decreased with the LQI control in the low frequency band, and the suspension travel is increased with the LQI control in the middle or high frequency band. The suspension travel is very small in the middle or high frequency band, the suspension bottoming stop will not happen, so the vehicle ride quality can be improved apparently by the LQI control.

  18. Amorphous Zinc Oxide Integrated Wavy Channel Thin Film Transistor Based High Performance Digital Circuits

    KAUST Repository

    Hanna, Amir

    2015-12-04

    High performance thin film transistor (TFT) can be a great driving force for display, sensor/actuator, integrated electronics, and distributed computation for Internet of Everything applications. While semiconducting oxides like zinc oxide (ZnO) present promising opportunity in that regard, still wide area of improvement exists to increase the performance further. Here, we show a wavy channel (WC) architecture for ZnO integrated TFT which increases transistor width without chip area penalty, enabling high performance in material agnostic way. We further demonstrate digital logic NAND circuit using the WC architecture and compare it to the conventional planar architecture. The WC architecture circuits have shown 2× higher peak-to-peak output voltage for the same input voltage. They also have 3× lower high-to-low propagation delay times, respectively, when compared to the planar architecture. The performance enhancement is attributed to both extra device width and enhanced field effect mobility due to higher gate field electrostatics control.

  19. Series-connected substrate-integrated lead-carbon hybrid ultracapacitors with voltage-management circuit

    Indian Academy of Sciences (India)

    A Banerjee; R Srinivasan; A K Shukla

    2015-02-01

    Cell voltage for a fully charged-substrate-integrated lead-carbon hybrid ultracapacitor is about 2.3 V. Therefore, for applications requiring higher DC voltage, several of these ultracapacitors need to be connected in series. However, voltage distribution across each series-connected ultracapacitor tends to be uneven due to tolerance in capacitance and parasitic parallel-resistance values. Accordingly, voltage-management circuit is required to protect constituent ultracapacitors from exceeding their rated voltage. In this study, the design and characterization of the substrate-integrated lead-carbon hybrid ultracapacitor with co-located terminals is discussed. Voltage-management circuit for the ultracapacitor is presented, and its effectiveness is validated experimentally.

  20. Silicon photonic integrated circuits with electrically programmable non-volatile memory functions.

    Science.gov (United States)

    Song, J-F; Lim, A E-J; Luo, X-S; Fang, Q; Li, C; Jia, L X; Tu, X-G; Huang, Y; Zhou, H-F; Liow, T-Y; Lo, G-Q

    2016-09-19

    Conventional silicon photonic integrated circuits do not normally possess memory functions, which require on-chip power in order to maintain circuit states in tuned or field-configured switching routes. In this context, we present an electrically programmable add/drop microring resonator with a wavelength shift of 426 pm between the ON/OFF states. Electrical pulses are used to control the choice of the state. Our experimental results show a wavelength shift of 2.8 pm/ms and a light intensity variation of ~0.12 dB/ms for a fixed wavelength in the OFF state. Theoretically, our device can accommodate up to 65 states of multi-level memory functions. Such memory functions can be integrated into wavelength division mutiplexing (WDM) filters and applied to optical routers and computing architectures fulfilling large data downloading demands.

  1. Integrated bistable generator for wideband energy harvesting with optimized synchronous electric charge extraction circuit

    Science.gov (United States)

    Liu, Weiqun; Badel, Adrien; Formosa, Fabien; Wu, Yipeng; Agbossou, Amen

    2013-12-01

    Bistable generators have been proposed as potential solutions to the challenge of variable vibration frequencies. In the authors' previous works, a specific BSM (Buckled-Spring-Mass) harvester architecture has been suggested. It presents some properties of interests: simplicity, compactness and wide bandwidth. Using a normalized model of the BSM generator for design and optimization at different scales, this paper presents a new integrated BSM bistable generator design with the OSECE (Optimized Synchronous Electric Charge Extraction) technique which is used for broadband energy harvesting. The experimental results obtained from an initial prototype device show that the BSM generator with the OSECE circuit exhibits better performance for low coupling cases or reverse sweep excitations. This is also confirmed by simulations for the proposed integrated generator. Good applications prospective is expected for the bistable generator with the nonlinear OSECE circuit.

  2. Advances in gallium arsenide monolithic microwave integrated-circuit technology for space communications systems

    Science.gov (United States)

    Bhasin, K. B.; Connolly, D. J.

    1986-01-01

    Future communications satellites are likely to use gallium arsenide (GaAs) monolithic microwave integrated-circuit (MMIC) technology in most, if not all, communications payload subsystems. Multiple-scanning-beam antenna systems are expected to use GaAs MMIC's to increase functional capability, to reduce volume, weight, and cost, and to greatly improve system reliability. RF and IF matrix switch technology based on GaAs MMIC's is also being developed for these reasons. MMIC technology, including gigabit-rate GaAs digital integrated circuits, offers substantial advantages in power consumption and weight over silicon technologies for high-throughput, on-board baseband processor systems. In this paper, current developments in GaAs MMIC technology are described, and the status and prospects of the technology are assessed.

  3. Localization and Imaging of Integrated Circuit Defect Using Simple Optical Feedback Detection

    Directory of Open Access Journals (Sweden)

    Vernon Julius Cemine

    2004-12-01

    Full Text Available High-contrast microscopy of semiconductor and metal edifices in integrated circuits is demonstrated by combining laser-scanning confocal reflectance microscopy, one-photon optical-beam-induced current (1P-OBIC imaging, and optical feedback detection via a commercially available semiconductor laser that also serves as the excitation source. The confocal microscope has a compact in-line arrangement with no external photodetector. Confocal and 1P-OBIC images are obtained simultaneously from the same focused beam that is scanned across the sample plane. Image pairs are processed to generate exclusive high-contrast distributions of the semiconductor, metal, and dielectric sites in a GaAs photodiode array sample. The method is then utilized to demonstrate defect localization and imaging in an integrated circuit.

  4. A multi-ring optical packet and circuit integrated network with optical buffering.

    Science.gov (United States)

    Furukawa, Hideaki; Shinada, Satoshi; Miyazawa, Takaya; Harai, Hiroaki; Kawasaki, Wataru; Saito, Tatsuhiko; Matsunaga, Koji; Toyozumi, Tatuya; Wada, Naoya

    2012-12-17

    We newly developed a 3 × 3 integrated optical packet and circuit switch-node. Optical buffers and burst-mode erbium-doped fiber amplifiers with the gain flatness are installed in the 3 × 3 switch-node. The optical buffer can prevent packet collisions and decrease packet loss. We constructed a multi-ring optical packet and circuit integrated network testbed connecting two single-ring networks and a client network by the 3 × 3 switch-node. For the first time, we demonstrated 244 km fiber transmission and 5-node hopping of multiplexed 14-wavelength 10 Gbps optical paths and 100 Gbps optical packets encapsulating 10 Gigabit Ethernet frames on the testbed. Error-free (frame error rate < 1 × 10(-4)) operation was achieved with optical packets of various packet lengths. In addition, successful avoidance of packet collisions by optical buffers was confirmed.

  5. Advanced field-solver techniques for RC extraction of integrated circuits

    CERN Document Server

    Yu, Wenjian

    2014-01-01

    Resistance and capacitance (RC) extraction is an essential step in modeling the interconnection wires and substrate coupling effect in nanometer-technology integrated circuits (IC). The field-solver techniques for RC extraction guarantee the accuracy of modeling, and are becoming increasingly important in meeting the demand for accurate modeling and simulation of VLSI designs. Advanced Field-Solver Techniques for RC Extraction of Integrated Circuits presents a systematic introduction to, and treatment of, the key field-solver methods for RC extraction of VLSI interconnects and substrate coupling in mixed-signal ICs. Various field-solver techniques are explained in detail, with real-world examples to illustrate the advantages and disadvantages of each algorithm. This book will benefit graduate students and researchers in the field of electrical and computer engineering, as well as engineers working in the IC design and design automation industries. Dr. Wenjian Yu is an Associate Professor at the Department of ...

  6. Integrated Circuit-Based Biofabrication with Common Biomaterials for Probing Cellular Biomechanics.

    Science.gov (United States)

    Sung, Chun-Yen; Yang, Chung-Yao; Yeh, J Andrew; Cheng, Chao-Min

    2016-02-01

    Recent advances in bioengineering have enabled the development of biomedical tools with modifiable surface features (small-scale architecture) to mimic extracellular matrices and aid in the development of well-controlled platforms that allow for the application of mechanical stimulation for studying cellular biomechanics. An overview of recent developments in common biomaterials that can be manufactured using integrated circuit-based biofabrication is presented. Integrated circuit-based biofabrication possesses advantages including mass and diverse production capacities for fabricating in vitro biomedical devices. This review highlights the use of common biomaterials that have been most frequently used to study cellular biomechanics. In addition, the influence of various small-scale characteristics on common biomaterial surfaces for a range of different cell types is discussed.

  7. Whispering-gallery microcavity semiconductor lasers suitable for photonic integrated circuits and optical interconnects

    Institute of Scientific and Technical Information of China (English)

    2009-01-01

    The characteristics of whispering-gallery-like modes in the equilateral triangle and square microresonators are introduced,including directional emission triangle and square microlasers connected to an output waveguide.We propose a photonic interconnect scheme by connecting two directional emission microlasers with an optical waveguide on silicon integrated circuit chip.The measurement indicates that the triangle microlasers can work as a resonance enhanced photodetector for optical interconnect.

  8. Evolution of the Department of Defense Millimeter and Microwave Monolithic Integrated Circuit Program

    Science.gov (United States)

    2007-02-01

    Dertouzos, Michael; Lester, Richard K.; Solow , Robert M.; Thorow, Lester C., “Toward a New Industrial America Scientific American, June 1989, pp...Vladimir Gelnovatch, Director of the U.S. Army Electronics Technology and Devices Laboratory; and Robert Heaston, Office of Under Secretary of Defense...Jack S. Kilby and Robert N. Noyce shared honors for the achievement. Hybrid microwave and millimeter wave integrated circuits achieved greater

  9. Simple Wide Frequency Range Impedance Meter Based on AD5933 Integrated Circuit

    OpenAIRE

    Chabowski Konrad; Piasecki Tomasz; Dzierka Andrzej; Nitsch Karol

    2015-01-01

    As it contains elements of complete digital impedance meter, the AD5933 integrated circuit is an interesting solution for impedance measurements. However, its use for measurements in a wide range of impedances and frequencies requires an additional digital and analogue circuitry. This paper presents the design and performance of a simple impedance meter based on the AD5933 IC. Apart from the AD5933 IC it consists of a clock generator with a programmable prescaler, a novel DC offset canceller ...

  10. Protecting integrated circuits from excessive charge accumulation during plasma cleaning of multichip modules

    Energy Technology Data Exchange (ETDEWEB)

    Rodenbeck, Christopher T; Girardi, Michael

    2015-04-21

    Internal nodes of a constituent integrated circuit (IC) package of a multichip module (MCM) are protected from excessive charge during plasma cleaning of the MCM. The protected nodes are coupled to an internal common node of the IC package by respectively associated discharge paths. The common node is connected to a bond pad of the IC package. During MCM assembly, and before plasma cleaning, this bond pad receives a wire bond to a ground bond pad on the MCM substrate.

  11. Self-contained sub-millimeter wave rectifying antenna integrated circuit

    Science.gov (United States)

    Siegel, Peter H. (Inventor)

    2004-01-01

    The invention is embodied in a monolithic semiconductor integrated circuit in which is formed an antenna, such as a slot dipole antenna, connected across a rectifying diode. In the preferred embodiment, the antenna is tuned to received an electromagnetic wave of about 2500 GHz so that the device is on the order of a wavelength in size, or about 200 microns across and 30 microns thick. This size is ideal for mounting on a microdevice such as a microrobot for example. The antenna is endowed with high gain in the direction of the incident radiation by providing a quarter-wavelength (30 microns) thick resonant cavity below the antenna, the cavity being formed as part of the monolithic integrated circuit. Preferably, the integrated circuit consists of a thin gallium arsenide membrane overlying the resonant cavity and supporting an epitaxial Gallium Arsenide semiconductor layer. The rectifying diode is a Schottky diode formed in the GaAs semiconductor layer and having an area that is a very small fraction of the wavelength of the 2500 GHz incident radiation. The cavity provides high forward gain in the antenna and isolation from surrounding structure.

  12. Scalable, Lightweight, Integrated and Quick-to-Assemble (SLIQ) Hyperdrives for Functional Circuit Dissection.

    Science.gov (United States)

    Liang, Li; Oline, Stefan N; Kirk, Justin C; Schmitt, Lukas Ian; Komorowski, Robert W; Remondes, Miguel; Halassa, Michael M

    2017-01-01

    Independently adjustable multielectrode arrays are routinely used to interrogate neuronal circuit function, enabling chronic in vivo monitoring of neuronal ensembles in freely behaving animals at a single-cell, single spike resolution. Despite the importance of this approach, its widespread use is limited by highly specialized design and fabrication methods. To address this, we have developed a Scalable, Lightweight, Integrated and Quick-to-assemble multielectrode array platform. This platform additionally integrates optical fibers with independently adjustable electrodes to allow simultaneous single unit recordings and circuit-specific optogenetic targeting and/or manipulation. In current designs, the fully assembled platforms are scalable from 2 to 32 microdrives, and yet range 1-3 g, light enough for small animals. Here, we describe the design process starting from intent in computer-aided design, parameter testing through finite element analysis and experimental means, and implementation of various applications across mice and rats. Combined, our methods may expand the utility of multielectrode recordings and their continued integration with other tools enabling functional dissection of intact neural circuits.

  13. Scalable, Lightweight, Integrated and Quick-to-Assemble (SLIQ) Hyperdrives for Functional Circuit Dissection

    Science.gov (United States)

    Liang, Li; Oline, Stefan N.; Kirk, Justin C.; Schmitt, Lukas Ian; Komorowski, Robert W.; Remondes, Miguel; Halassa, Michael M.

    2017-01-01

    Independently adjustable multielectrode arrays are routinely used to interrogate neuronal circuit function, enabling chronic in vivo monitoring of neuronal ensembles in freely behaving animals at a single-cell, single spike resolution. Despite the importance of this approach, its widespread use is limited by highly specialized design and fabrication methods. To address this, we have developed a Scalable, Lightweight, Integrated and Quick-to-assemble multielectrode array platform. This platform additionally integrates optical fibers with independently adjustable electrodes to allow simultaneous single unit recordings and circuit-specific optogenetic targeting and/or manipulation. In current designs, the fully assembled platforms are scalable from 2 to 32 microdrives, and yet range 1–3 g, light enough for small animals. Here, we describe the design process starting from intent in computer-aided design, parameter testing through finite element analysis and experimental means, and implementation of various applications across mice and rats. Combined, our methods may expand the utility of multielectrode recordings and their continued integration with other tools enabling functional dissection of intact neural circuits. PMID:28243194

  14. Hybrid-integrated coherent receiver using silica-based planar lightwave circuit technology

    Science.gov (United States)

    Kim, Jong-Hoi; Choe, Joong-Seon; Choi, Kwang-Seong; Youn, Chun-Ju; Kim, Duk-Jun; Jang, Sun-Hyok; Kwon, Yong-Hwan; Nam, Eun-Soo

    2011-12-01

    A hybrid-integrated coherent receiver module has been achieved using flip-chip bonding technology, consisting of a silica-based 90°-hybrid planar lightwave circuit (PLC) platform, a spot-size converter integrated waveguide photodiode (SSC-WG-PD), and a dual-channel transimpedance amplifier (TIA). The receiver module shows error-free operation up to 40Gb/s and OSNR sensitivity of 11.5 dB for BER = 10-3 at 25 Gb/s.

  15. Custom integrated front-end circuit for the CMS electromagnetic calorimeter

    CERN Document Server

    Walder, J P; Denes, P; Mathez, H; Pangaud, P

    2001-01-01

    A wide dynamic range multi-gain transimpedance amplifier custom integrated circuit has been developed for the readout of avalanche photodiode and vacuum photodiode in the CMS electromagnetic calorimeter for LHC experiment. The 92 db input dynamic range is divided into four ranges of 12 bits each in order to provide 40 MHz analog sampled data to a 12 bits ADC. This concept, which has been integrated in rad-hard full complementary bipolar technology, will be described. Experimental results obtained in lab and under irradiation will be presented along with test strategy being used for mass production. 6 Refs.

  16. 76 FR 19174 - In the Matter of Circuit Systems, Inc., Global Energy Group, Inc., Integrated Medical Resources...

    Science.gov (United States)

    2011-04-06

    ... From the Federal Register Online via the Government Publishing Office SECURITIES AND EXCHANGE COMMISSION File No. 500-1 In the Matter of Circuit Systems, Inc., Global Energy Group, Inc., Integrated... information concerning the securities of Circuit Systems, Inc. because it has not filed any periodic...

  17. A fully integral, differential, high-speed, low-power consumption CMOS recovery clock circuit

    Directory of Open Access Journals (Sweden)

    Daniel Pacheco Bautista

    2010-04-01

    Full Text Available The clock recovery circuit (CRC plays a fundamental role in electronic information recovery systems (hard disks, DVD and CD read/writeable units and baseband digital communication systems in recovering the clock signal contained in the received data. This signal is necessary for synchronising subsequent information processing. Nowadays, this task is difficult to achieve because of the data’s random nature and its high transfer rate. This paper presents the design of a high-performance integral CMOS technology clock recovery circuit (CRC wor-king at 1.2 Gbps and only consuming 17.4 mW using a 3.3V power supply. The circuit was fully differentially designed to obtain high performance. Circuit architecture was based on a conventional phase lock loop (PLL, current mode logic (MCML and a novel two stage ring-based voltage controlled oscillator (VCO. The design used 0.35 μm CMOS AMS process parameters. Hspice simulation results proved the circuit’s high performance, achieving tracking in less than 300 ns.

  18. Layout-aware simulation of soft errors in sub-100 nm integrated circuits

    Science.gov (United States)

    Balbekov, A.; Gorbunov, M.; Bobkov, S.

    2016-12-01

    Single Event Transient (SET) caused by charged particle traveling through the sensitive volume of integral circuit (IC) may lead to different errors in digital circuits in some cases. In technologies below 180 nm, a single particle can affect multiple devices causing multiple SET. This fact adds the complexity to fault tolerant devices design, because the schematic design techniques become useless without their layout consideration. The most common layout mitigation technique is a spatial separation of sensitive nodes of hardened circuits. Spatial separation decreases the circuit performance and increases power consumption. Spacing should thus be reasonable and its scaling follows the device dimensions' scaling trend. This paper presents the development of the SET simulation approach comprised of SPICE simulation with "double exponent" current source as SET model. The technique uses layout in GDSII format to locate nearby devices that can be affected by a single particle and that can share the generated charge. The developed software tool automatizes multiple simulations and gathers the produced data to present it as the sensitivity map. The examples of conducted simulations of fault tolerant cells and their sensitivity maps are presented in this paper.

  19. Design, Fabrication and Integration of a NaK-Cooled Circuit

    Science.gov (United States)

    Garber, Anne; Godfroy, Thomas

    2006-01-01

    The Early Flight Fission Test Facilities (EFF-TF) team has been tasked by the NASA Marshall Space Flight Center Nuclear Systems Office to design, fabricate, and test an actively pumped alkali metal flow circuit. The system, which was originally designed for use with a eutectic mixture of sodium potassium (NaK), was redesigned to for use with lithium. Due to a shi$ in focus, it is once again being prepared for use with NaK. Changes made to the actively pumped, high temperature circuit include the replacement of the expansion reservoir, addition of remotely operated valves, and modification of the support table. Basic circuit components include: reactor segment, NaK to gas heat exchanger, electromagnetic (EM) liquid metal pump, load/drain reservoir, expansion reservoir, instrumentation, and a spill reservoir. A 37-pin partial-array core (pin and flow path dimensions are the same as those in a fill design) was selected for fabrication and test. This paper summarizes the integration and preparations for the fill of the pumped liquid metal NaK flow circuit.

  20. A Fault Dictionary-Based Fault Diagnosis Approach for CMOS Analog Integrated Circuits

    Directory of Open Access Journals (Sweden)

    Mouna Karmani

    2011-09-01

    Full Text Available In this paper, we propose a simulation-before-test (SBT fault diagnosis methodology based on the use of a fault dictionary approach. This technique allows the detection and localization of the most likely defects of open-circuit type occurring in Complementary Metal–Oxide–Semiconductor (CMOS analog integrated circuits (ICs interconnects. The fault dictionary is built by simulating the most likely defects causing the faults to be detected at the layout level. Then, for each injected fault, the spectre’s frequency responses and the power consumption obtained by simulation are stored in a table which constitutes the fault dictionary.In fact, each line in the fault dictionary constitutes a fault signature used to identify and locate a considered defect. When testing, the circuit under test is excited with the same stimulus, and the responses obtained are compared to the stored ones. To prove the efficiency of the proposed technique, a full custom CMOS operational amplifier is implemented in 0.25 μm technology and the most likely faults of open circuit type are deliberately injected and simulated at the layout level.